diff options
Diffstat (limited to 'arch')
259 files changed, 13286 insertions, 4478 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 05fc7cf6711d..92951103255a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -644,6 +644,7 @@ config ARCH_S3C2410 | |||
644 | select ARCH_HAS_CPUFREQ | 644 | select ARCH_HAS_CPUFREQ |
645 | select HAVE_CLK | 645 | select HAVE_CLK |
646 | select ARCH_USES_GETTIMEOFFSET | 646 | select ARCH_USES_GETTIMEOFFSET |
647 | select HAVE_S3C2410_I2C | ||
647 | help | 648 | help |
648 | Samsung S3C2410X CPU based systems, such as the Simtec Electronics | 649 | Samsung S3C2410X CPU based systems, such as the Simtec Electronics |
649 | BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or | 650 | BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or |
@@ -673,6 +674,8 @@ config ARCH_S3C64XX | |||
673 | select S3C_DEV_NAND | 674 | select S3C_DEV_NAND |
674 | select USB_ARCH_HAS_OHCI | 675 | select USB_ARCH_HAS_OHCI |
675 | select SAMSUNG_GPIOLIB_4BIT | 676 | select SAMSUNG_GPIOLIB_4BIT |
677 | select HAVE_S3C2410_I2C | ||
678 | select HAVE_S3C2410_WATCHDOG | ||
676 | help | 679 | help |
677 | Samsung S3C64XX series based systems | 680 | Samsung S3C64XX series based systems |
678 | 681 | ||
@@ -681,7 +684,10 @@ config ARCH_S5P6440 | |||
681 | select CPU_V6 | 684 | select CPU_V6 |
682 | select GENERIC_GPIO | 685 | select GENERIC_GPIO |
683 | select HAVE_CLK | 686 | select HAVE_CLK |
687 | select HAVE_S3C2410_WATCHDOG | ||
684 | select ARCH_USES_GETTIMEOFFSET | 688 | select ARCH_USES_GETTIMEOFFSET |
689 | select HAVE_S3C2410_I2C | ||
690 | select HAVE_S3C_RTC | ||
685 | help | 691 | help |
686 | Samsung S5P6440 CPU based systems | 692 | Samsung S5P6440 CPU based systems |
687 | 693 | ||
@@ -691,6 +697,7 @@ config ARCH_S5P6442 | |||
691 | select GENERIC_GPIO | 697 | select GENERIC_GPIO |
692 | select HAVE_CLK | 698 | select HAVE_CLK |
693 | select ARCH_USES_GETTIMEOFFSET | 699 | select ARCH_USES_GETTIMEOFFSET |
700 | select HAVE_S3C2410_WATCHDOG | ||
694 | help | 701 | help |
695 | Samsung S5P6442 CPU based systems | 702 | Samsung S5P6442 CPU based systems |
696 | 703 | ||
@@ -701,6 +708,9 @@ config ARCH_S5PC100 | |||
701 | select CPU_V7 | 708 | select CPU_V7 |
702 | select ARM_L1_CACHE_SHIFT_6 | 709 | select ARM_L1_CACHE_SHIFT_6 |
703 | select ARCH_USES_GETTIMEOFFSET | 710 | select ARCH_USES_GETTIMEOFFSET |
711 | select HAVE_S3C2410_I2C | ||
712 | select HAVE_S3C_RTC | ||
713 | select HAVE_S3C2410_WATCHDOG | ||
704 | help | 714 | help |
705 | Samsung S5PC100 series based systems | 715 | Samsung S5PC100 series based systems |
706 | 716 | ||
@@ -711,9 +721,21 @@ config ARCH_S5PV210 | |||
711 | select HAVE_CLK | 721 | select HAVE_CLK |
712 | select ARM_L1_CACHE_SHIFT_6 | 722 | select ARM_L1_CACHE_SHIFT_6 |
713 | select ARCH_USES_GETTIMEOFFSET | 723 | select ARCH_USES_GETTIMEOFFSET |
724 | select HAVE_S3C2410_I2C | ||
725 | select HAVE_S3C_RTC | ||
726 | select HAVE_S3C2410_WATCHDOG | ||
714 | help | 727 | help |
715 | Samsung S5PV210/S5PC110 series based systems | 728 | Samsung S5PV210/S5PC110 series based systems |
716 | 729 | ||
730 | config ARCH_S5PV310 | ||
731 | bool "Samsung S5PV310/S5PC210" | ||
732 | select CPU_V7 | ||
733 | select GENERIC_GPIO | ||
734 | select HAVE_CLK | ||
735 | select GENERIC_CLOCKEVENTS | ||
736 | help | ||
737 | Samsung S5PV310 series based systems | ||
738 | |||
717 | config ARCH_SHARK | 739 | config ARCH_SHARK |
718 | bool "Shark" | 740 | bool "Shark" |
719 | select CPU_SA110 | 741 | select CPU_SA110 |
@@ -915,6 +937,8 @@ source "arch/arm/mach-s5pc100/Kconfig" | |||
915 | 937 | ||
916 | source "arch/arm/mach-s5pv210/Kconfig" | 938 | source "arch/arm/mach-s5pv210/Kconfig" |
917 | 939 | ||
940 | source "arch/arm/mach-s5pv310/Kconfig" | ||
941 | |||
918 | source "arch/arm/mach-shmobile/Kconfig" | 942 | source "arch/arm/mach-shmobile/Kconfig" |
919 | 943 | ||
920 | source "arch/arm/plat-stmp3xxx/Kconfig" | 944 | source "arch/arm/plat-stmp3xxx/Kconfig" |
@@ -1120,11 +1144,11 @@ config SMP | |||
1120 | bool "Symmetric Multi-Processing (EXPERIMENTAL)" | 1144 | bool "Symmetric Multi-Processing (EXPERIMENTAL)" |
1121 | depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\ | 1145 | depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\ |
1122 | MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\ | 1146 | MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\ |
1123 | ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_TEGRA) | 1147 | ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4) |
1124 | depends on GENERIC_CLOCKEVENTS | 1148 | depends on GENERIC_CLOCKEVENTS |
1125 | select USE_GENERIC_SMP_HELPERS | 1149 | select USE_GENERIC_SMP_HELPERS |
1126 | select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500 || \ | 1150 | select HAVE_ARM_SCU if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 ||\ |
1127 | ARCH_VEXPRESS_CA9X4 || ARCH_TEGRA) | 1151 | ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 |
1128 | help | 1152 | help |
1129 | This enables support for systems with more than one CPU. If you have | 1153 | This enables support for systems with more than one CPU. If you have |
1130 | a system with only one CPU, like most personal computers, say N. If | 1154 | a system with only one CPU, like most personal computers, say N. If |
@@ -1194,10 +1218,10 @@ config LOCAL_TIMERS | |||
1194 | bool "Use local timer interrupts" | 1218 | bool "Use local timer interrupts" |
1195 | depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \ | 1219 | depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \ |
1196 | REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ | 1220 | REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ |
1197 | ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_TEGRA) | 1221 | ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4) |
1198 | default y | 1222 | default y |
1199 | select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_VEXPRESS || ARCH_OMAP4 || \\ | 1223 | select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 || \ |
1200 | ARCH_U8500 || ARCH_TEGRA | 1224 | ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS |
1201 | help | 1225 | help |
1202 | Enable support for local timers on SMP platforms, rather then the | 1226 | Enable support for local timers on SMP platforms, rather then the |
1203 | legacy IPI broadcast method. Local timers allows the system | 1227 | legacy IPI broadcast method. Local timers allows the system |
@@ -1208,7 +1232,8 @@ source kernel/Kconfig.preempt | |||
1208 | 1232 | ||
1209 | config HZ | 1233 | config HZ |
1210 | int | 1234 | int |
1211 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210 | 1235 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \ |
1236 | ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 | ||
1212 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER | 1237 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
1213 | default AT91_TIMER_HZ if ARCH_AT91 | 1238 | default AT91_TIMER_HZ if ARCH_AT91 |
1214 | default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE | 1239 | default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index a8d4dca9da35..99b8200138d2 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -174,6 +174,7 @@ machine-$(CONFIG_ARCH_S5P6440) := s5p6440 | |||
174 | machine-$(CONFIG_ARCH_S5P6442) := s5p6442 | 174 | machine-$(CONFIG_ARCH_S5P6442) := s5p6442 |
175 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 | 175 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 |
176 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 | 176 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 |
177 | machine-$(CONFIG_ARCH_S5PV310) := s5pv310 | ||
177 | machine-$(CONFIG_ARCH_SA1100) := sa1100 | 178 | machine-$(CONFIG_ARCH_SA1100) := sa1100 |
178 | machine-$(CONFIG_ARCH_SHARK) := shark | 179 | machine-$(CONFIG_ARCH_SHARK) := shark |
179 | machine-$(CONFIG_ARCH_SHMOBILE) := shmobile | 180 | machine-$(CONFIG_ARCH_SHMOBILE) := shmobile |
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 7636c9b3f9a7..68775e33476c 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile | |||
@@ -33,7 +33,7 @@ ifeq ($(CONFIG_CPU_XSCALE),y) | |||
33 | OBJS += head-xscale.o | 33 | OBJS += head-xscale.o |
34 | endif | 34 | endif |
35 | 35 | ||
36 | ifeq ($(CONFIG_PXA_SHARPSL),y) | 36 | ifeq ($(CONFIG_PXA_SHARPSL_DETECT_MACH_ID),y) |
37 | OBJS += head-sharpsl.o | 37 | OBJS += head-sharpsl.o |
38 | endif | 38 | endif |
39 | 39 | ||
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index 7974baacafce..6c0913562455 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c | |||
@@ -263,14 +263,6 @@ static int it8152_pci_platform_notify_remove(struct device *dev) | |||
263 | return 0; | 263 | return 0; |
264 | } | 264 | } |
265 | 265 | ||
266 | int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) | ||
267 | { | ||
268 | dev_dbg(dev, "%s: dma_addr %08x, size %08x\n", | ||
269 | __func__, dma_addr, size); | ||
270 | return (dev->bus == &pci_bus_type) && | ||
271 | ((dma_addr + size - PHYS_OFFSET) >= SZ_64M); | ||
272 | } | ||
273 | |||
274 | int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) | 266 | int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) |
275 | { | 267 | { |
276 | it8152_io.start = IT8152_IO_BASE + 0x12000; | 268 | it8152_io.start = IT8152_IO_BASE + 0x12000; |
diff --git a/arch/arm/configs/s5pc110_defconfig b/arch/arm/configs/s5pc110_defconfig deleted file mode 100644 index 22c2d147f793..000000000000 --- a/arch/arm/configs/s5pc110_defconfig +++ /dev/null | |||
@@ -1,66 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
3 | CONFIG_BLK_DEV_INITRD=y | ||
4 | CONFIG_KALLSYMS_ALL=y | ||
5 | CONFIG_MODULES=y | ||
6 | CONFIG_MODULE_UNLOAD=y | ||
7 | # CONFIG_BLK_DEV_BSG is not set | ||
8 | CONFIG_ARCH_S5PV210=y | ||
9 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | ||
10 | CONFIG_MACH_SMDKC110=y | ||
11 | CONFIG_VMSPLIT_2G=y | ||
12 | CONFIG_PREEMPT=y | ||
13 | CONFIG_AEABI=y | ||
14 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" | ||
15 | CONFIG_VFP=y | ||
16 | CONFIG_NEON=y | ||
17 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
18 | CONFIG_BLK_DEV_LOOP=y | ||
19 | CONFIG_BLK_DEV_RAM=y | ||
20 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
21 | # CONFIG_MISC_DEVICES is not set | ||
22 | CONFIG_SCSI=y | ||
23 | CONFIG_BLK_DEV_SD=y | ||
24 | CONFIG_CHR_DEV_SG=y | ||
25 | CONFIG_INPUT_EVDEV=y | ||
26 | # CONFIG_INPUT_KEYBOARD is not set | ||
27 | # CONFIG_INPUT_MOUSE is not set | ||
28 | CONFIG_INPUT_TOUCHSCREEN=y | ||
29 | CONFIG_SERIAL_8250=y | ||
30 | CONFIG_SERIAL_SAMSUNG=y | ||
31 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y | ||
32 | CONFIG_HW_RANDOM=y | ||
33 | # CONFIG_HWMON is not set | ||
34 | # CONFIG_VGA_CONSOLE is not set | ||
35 | # CONFIG_HID_SUPPORT is not set | ||
36 | # CONFIG_USB_SUPPORT is not set | ||
37 | CONFIG_EXT2_FS=y | ||
38 | CONFIG_INOTIFY=y | ||
39 | CONFIG_MSDOS_FS=y | ||
40 | CONFIG_VFAT_FS=y | ||
41 | CONFIG_TMPFS=y | ||
42 | CONFIG_TMPFS_POSIX_ACL=y | ||
43 | CONFIG_CRAMFS=y | ||
44 | CONFIG_ROMFS_FS=y | ||
45 | CONFIG_PARTITION_ADVANCED=y | ||
46 | CONFIG_BSD_DISKLABEL=y | ||
47 | CONFIG_SOLARIS_X86_PARTITION=y | ||
48 | CONFIG_NLS_CODEPAGE_437=y | ||
49 | CONFIG_NLS_ASCII=y | ||
50 | CONFIG_NLS_ISO8859_1=y | ||
51 | CONFIG_MAGIC_SYSRQ=y | ||
52 | CONFIG_DEBUG_KERNEL=y | ||
53 | # CONFIG_DEBUG_PREEMPT is not set | ||
54 | CONFIG_DEBUG_RT_MUTEXES=y | ||
55 | CONFIG_DEBUG_SPINLOCK=y | ||
56 | CONFIG_DEBUG_MUTEXES=y | ||
57 | CONFIG_DEBUG_SPINLOCK_SLEEP=y | ||
58 | CONFIG_DEBUG_INFO=y | ||
59 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
60 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
61 | CONFIG_DEBUG_USER=y | ||
62 | CONFIG_DEBUG_ERRORS=y | ||
63 | CONFIG_DEBUG_LL=y | ||
64 | CONFIG_EARLY_PRINTK=y | ||
65 | CONFIG_DEBUG_S3C_UART=1 | ||
66 | CONFIG_CRC_CCITT=y | ||
diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig index 1753836d0055..0488a1eb4d7d 100644 --- a/arch/arm/configs/s5pv210_defconfig +++ b/arch/arm/configs/s5pv210_defconfig | |||
@@ -7,6 +7,11 @@ CONFIG_MODULE_UNLOAD=y | |||
7 | # CONFIG_BLK_DEV_BSG is not set | 7 | # CONFIG_BLK_DEV_BSG is not set |
8 | CONFIG_ARCH_S5PV210=y | 8 | CONFIG_ARCH_S5PV210=y |
9 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | 9 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 |
10 | CONFIG_S3C_DEV_FB=y | ||
11 | CONFIG_S5PV210_SETUP_FB_24BPP=y | ||
12 | CONFIG_MACH_AQUILA=y | ||
13 | CONFIG_MACH_GONI=y | ||
14 | CONFIG_MACH_SMDKC110=y | ||
10 | CONFIG_MACH_SMDKV210=y | 15 | CONFIG_MACH_SMDKV210=y |
11 | CONFIG_VMSPLIT_2G=y | 16 | CONFIG_VMSPLIT_2G=y |
12 | CONFIG_PREEMPT=y | 17 | CONFIG_PREEMPT=y |
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index 69ce0727edb5..b5ccc6a993d5 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h | |||
@@ -298,7 +298,15 @@ extern void dmabounce_unregister_dev(struct device *); | |||
298 | * DMA access and 1 if the buffer needs to be bounced. | 298 | * DMA access and 1 if the buffer needs to be bounced. |
299 | * | 299 | * |
300 | */ | 300 | */ |
301 | #ifdef CONFIG_SA1111 | ||
301 | extern int dma_needs_bounce(struct device*, dma_addr_t, size_t); | 302 | extern int dma_needs_bounce(struct device*, dma_addr_t, size_t); |
303 | #else | ||
304 | static inline int dma_needs_bounce(struct device *dev, dma_addr_t addr, | ||
305 | size_t size) | ||
306 | { | ||
307 | return 0; | ||
308 | } | ||
309 | #endif | ||
302 | 310 | ||
303 | /* | 311 | /* |
304 | * The DMA API, implemented by dmabounce.c. See below for descriptions. | 312 | * The DMA API, implemented by dmabounce.c. See below for descriptions. |
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h index 6750b8e45a49..5747a8baa413 100644 --- a/arch/arm/include/asm/elf.h +++ b/arch/arm/include/asm/elf.h | |||
@@ -59,6 +59,8 @@ typedef struct user_fp elf_fpregset_t; | |||
59 | 59 | ||
60 | #define R_ARM_THM_CALL 10 | 60 | #define R_ARM_THM_CALL 10 |
61 | #define R_ARM_THM_JUMP24 30 | 61 | #define R_ARM_THM_JUMP24 30 |
62 | #define R_ARM_THM_MOVW_ABS_NC 47 | ||
63 | #define R_ARM_THM_MOVT_ABS 48 | ||
62 | 64 | ||
63 | /* | 65 | /* |
64 | * These are used to set parameters in the core dumps. | 66 | * These are used to set parameters in the core dumps. |
diff --git a/arch/arm/include/asm/hardware/scoop.h b/arch/arm/include/asm/hardware/scoop.h index 46492a63a7c4..ebb3ceaa8fac 100644 --- a/arch/arm/include/asm/hardware/scoop.h +++ b/arch/arm/include/asm/hardware/scoop.h | |||
@@ -22,18 +22,23 @@ | |||
22 | #define SCOOP_GPWR 0x24 | 22 | #define SCOOP_GPWR 0x24 |
23 | #define SCOOP_GPRR 0x28 | 23 | #define SCOOP_GPRR 0x28 |
24 | 24 | ||
25 | #define SCOOP_GPCR_PA22 ( 1 << 12 ) | 25 | #define SCOOP_CPR_OUT (1 << 7) |
26 | #define SCOOP_GPCR_PA21 ( 1 << 11 ) | 26 | #define SCOOP_CPR_SD_3V (1 << 2) |
27 | #define SCOOP_GPCR_PA20 ( 1 << 10 ) | 27 | #define SCOOP_CPR_CF_XV (1 << 1) |
28 | #define SCOOP_GPCR_PA19 ( 1 << 9 ) | 28 | #define SCOOP_CPR_CF_3V (1 << 0) |
29 | #define SCOOP_GPCR_PA18 ( 1 << 8 ) | 29 | |
30 | #define SCOOP_GPCR_PA17 ( 1 << 7 ) | 30 | #define SCOOP_GPCR_PA22 (1 << 12) |
31 | #define SCOOP_GPCR_PA16 ( 1 << 6 ) | 31 | #define SCOOP_GPCR_PA21 (1 << 11) |
32 | #define SCOOP_GPCR_PA15 ( 1 << 5 ) | 32 | #define SCOOP_GPCR_PA20 (1 << 10) |
33 | #define SCOOP_GPCR_PA14 ( 1 << 4 ) | 33 | #define SCOOP_GPCR_PA19 (1 << 9) |
34 | #define SCOOP_GPCR_PA13 ( 1 << 3 ) | 34 | #define SCOOP_GPCR_PA18 (1 << 8) |
35 | #define SCOOP_GPCR_PA12 ( 1 << 2 ) | 35 | #define SCOOP_GPCR_PA17 (1 << 7) |
36 | #define SCOOP_GPCR_PA11 ( 1 << 1 ) | 36 | #define SCOOP_GPCR_PA16 (1 << 6) |
37 | #define SCOOP_GPCR_PA15 (1 << 5) | ||
38 | #define SCOOP_GPCR_PA14 (1 << 4) | ||
39 | #define SCOOP_GPCR_PA13 (1 << 3) | ||
40 | #define SCOOP_GPCR_PA12 (1 << 2) | ||
41 | #define SCOOP_GPCR_PA11 (1 << 1) | ||
37 | 42 | ||
38 | struct scoop_config { | 43 | struct scoop_config { |
39 | unsigned short io_out; | 44 | unsigned short io_out; |
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index c628bdf6c430..6b4605893f1e 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c | |||
@@ -102,7 +102,9 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, | |||
102 | unsigned long loc; | 102 | unsigned long loc; |
103 | Elf32_Sym *sym; | 103 | Elf32_Sym *sym; |
104 | s32 offset; | 104 | s32 offset; |
105 | #ifdef CONFIG_THUMB2_KERNEL | ||
105 | u32 upper, lower, sign, j1, j2; | 106 | u32 upper, lower, sign, j1, j2; |
107 | #endif | ||
106 | 108 | ||
107 | offset = ELF32_R_SYM(rel->r_info); | 109 | offset = ELF32_R_SYM(rel->r_info); |
108 | if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) { | 110 | if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) { |
@@ -185,6 +187,7 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, | |||
185 | (offset & 0x0fff); | 187 | (offset & 0x0fff); |
186 | break; | 188 | break; |
187 | 189 | ||
190 | #ifdef CONFIG_THUMB2_KERNEL | ||
188 | case R_ARM_THM_CALL: | 191 | case R_ARM_THM_CALL: |
189 | case R_ARM_THM_JUMP24: | 192 | case R_ARM_THM_JUMP24: |
190 | upper = *(u16 *)loc; | 193 | upper = *(u16 *)loc; |
@@ -233,9 +236,40 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, | |||
233 | *(u16 *)(loc + 2) = (u16)((lower & 0xd000) | | 236 | *(u16 *)(loc + 2) = (u16)((lower & 0xd000) | |
234 | (j1 << 13) | (j2 << 11) | | 237 | (j1 << 13) | (j2 << 11) | |
235 | ((offset >> 1) & 0x07ff)); | 238 | ((offset >> 1) & 0x07ff)); |
239 | break; | ||
240 | |||
241 | case R_ARM_THM_MOVW_ABS_NC: | ||
242 | case R_ARM_THM_MOVT_ABS: | ||
236 | upper = *(u16 *)loc; | 243 | upper = *(u16 *)loc; |
237 | lower = *(u16 *)(loc + 2); | 244 | lower = *(u16 *)(loc + 2); |
245 | |||
246 | /* | ||
247 | * MOVT/MOVW instructions encoding in Thumb-2: | ||
248 | * | ||
249 | * i = upper[10] | ||
250 | * imm4 = upper[3:0] | ||
251 | * imm3 = lower[14:12] | ||
252 | * imm8 = lower[7:0] | ||
253 | * | ||
254 | * imm16 = imm4:i:imm3:imm8 | ||
255 | */ | ||
256 | offset = ((upper & 0x000f) << 12) | | ||
257 | ((upper & 0x0400) << 1) | | ||
258 | ((lower & 0x7000) >> 4) | (lower & 0x00ff); | ||
259 | offset = (offset ^ 0x8000) - 0x8000; | ||
260 | offset += sym->st_value; | ||
261 | |||
262 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS) | ||
263 | offset >>= 16; | ||
264 | |||
265 | *(u16 *)loc = (u16)((upper & 0xfbf0) | | ||
266 | ((offset & 0xf000) >> 12) | | ||
267 | ((offset & 0x0800) >> 1)); | ||
268 | *(u16 *)(loc + 2) = (u16)((lower & 0x8f00) | | ||
269 | ((offset & 0x0700) << 4) | | ||
270 | (offset & 0x00ff)); | ||
238 | break; | 271 | break; |
272 | #endif | ||
239 | 273 | ||
240 | default: | 274 | default: |
241 | printk(KERN_ERR "%s: unknown relocation: %u\n", | 275 | printk(KERN_ERR "%s: unknown relocation: %u\n", |
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h index b3ebe9e4871f..d0b7d870be9c 100644 --- a/arch/arm/mach-clps711x/include/mach/hardware.h +++ b/arch/arm/mach-clps711x/include/mach/hardware.h | |||
@@ -69,13 +69,6 @@ | |||
69 | #define SYSPLD_VIRT_BASE 0xfe000000 | 69 | #define SYSPLD_VIRT_BASE 0xfe000000 |
70 | #define SYSPLD_BASE SYSPLD_VIRT_BASE | 70 | #define SYSPLD_BASE SYSPLD_VIRT_BASE |
71 | 71 | ||
72 | #ifndef __ASSEMBLER__ | ||
73 | |||
74 | #define PCIO_BASE IO_BASE | ||
75 | |||
76 | #endif | ||
77 | |||
78 | |||
79 | #if defined (CONFIG_ARCH_AUTCPU12) | 72 | #if defined (CONFIG_ARCH_AUTCPU12) |
80 | 73 | ||
81 | #define CS89712_VIRT_BASE CLPS7111_VIRT_BASE | 74 | #define CS89712_VIRT_BASE CLPS7111_VIRT_BASE |
diff --git a/arch/arm/mach-gemini/Kconfig b/arch/arm/mach-gemini/Kconfig index 515b75cf2e8b..6f066ee4bf24 100644 --- a/arch/arm/mach-gemini/Kconfig +++ b/arch/arm/mach-gemini/Kconfig | |||
@@ -2,6 +2,13 @@ if ARCH_GEMINI | |||
2 | 2 | ||
3 | menu "Cortina Systems Gemini Implementations" | 3 | menu "Cortina Systems Gemini Implementations" |
4 | 4 | ||
5 | config MACH_NAS4220B | ||
6 | bool "Raidsonic NAS-4220-B" | ||
7 | select GEMINI_MEM_SWAP | ||
8 | help | ||
9 | Say Y here if you intend to run this kernel on a | ||
10 | Raidsonic NAS-4220-B. | ||
11 | |||
5 | config MACH_RUT100 | 12 | config MACH_RUT100 |
6 | bool "Teltonika RUT100" | 13 | bool "Teltonika RUT100" |
7 | select GEMINI_MEM_SWAP | 14 | select GEMINI_MEM_SWAP |
@@ -9,6 +16,20 @@ config MACH_RUT100 | |||
9 | Say Y here if you intend to run this kernel on a | 16 | Say Y here if you intend to run this kernel on a |
10 | Teltonika 3G Router RUT100. | 17 | Teltonika 3G Router RUT100. |
11 | 18 | ||
19 | config MACH_WBD111 | ||
20 | bool "Wiliboard WBD-111" | ||
21 | select GEMINI_MEM_SWAP | ||
22 | help | ||
23 | Say Y here if you intend to run this kernel on a | ||
24 | Wiliboard WBD-111. | ||
25 | |||
26 | config MACH_WBD222 | ||
27 | bool "Wiliboard WBD-222" | ||
28 | select GEMINI_MEM_SWAP | ||
29 | help | ||
30 | Say Y here if you intend to run this kernel on a | ||
31 | Wiliboard WBD-222. | ||
32 | |||
12 | endmenu | 33 | endmenu |
13 | 34 | ||
14 | config GEMINI_MEM_SWAP | 35 | config GEMINI_MEM_SWAP |
diff --git a/arch/arm/mach-gemini/Makefile b/arch/arm/mach-gemini/Makefile index 719505b81821..c5b24b95a76e 100644 --- a/arch/arm/mach-gemini/Makefile +++ b/arch/arm/mach-gemini/Makefile | |||
@@ -7,4 +7,7 @@ | |||
7 | obj-y := irq.o mm.o time.o devices.o gpio.o | 7 | obj-y := irq.o mm.o time.o devices.o gpio.o |
8 | 8 | ||
9 | # Board-specific support | 9 | # Board-specific support |
10 | obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o | ||
10 | obj-$(CONFIG_MACH_RUT100) += board-rut1xx.o | 11 | obj-$(CONFIG_MACH_RUT100) += board-rut1xx.o |
12 | obj-$(CONFIG_MACH_WBD111) += board-wbd111.o | ||
13 | obj-$(CONFIG_MACH_WBD222) += board-wbd222.o | ||
diff --git a/arch/arm/mach-gemini/board-nas4220b.c b/arch/arm/mach-gemini/board-nas4220b.c new file mode 100644 index 000000000000..01f1d6daab44 --- /dev/null +++ b/arch/arm/mach-gemini/board-nas4220b.c | |||
@@ -0,0 +1,111 @@ | |||
1 | /* | ||
2 | * Support for Raidsonic NAS-4220-B | ||
3 | * | ||
4 | * Copyright (C) 2009 Janos Laube <janos.dev@gmail.com> | ||
5 | * | ||
6 | * based on rut1xx.c | ||
7 | * Copyright (C) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <linux/leds.h> | ||
19 | #include <linux/input.h> | ||
20 | #include <linux/gpio_keys.h> | ||
21 | #include <linux/mdio-gpio.h> | ||
22 | #include <linux/io.h> | ||
23 | |||
24 | #include <asm/setup.h> | ||
25 | #include <asm/mach-types.h> | ||
26 | #include <asm/mach/arch.h> | ||
27 | #include <asm/mach/time.h> | ||
28 | |||
29 | #include <mach/hardware.h> | ||
30 | #include <mach/global_reg.h> | ||
31 | |||
32 | #include "common.h" | ||
33 | |||
34 | static struct sys_timer ib4220b_timer = { | ||
35 | .init = gemini_timer_init, | ||
36 | }; | ||
37 | |||
38 | static struct gpio_led ib4220b_leds[] = { | ||
39 | { | ||
40 | .name = "nas4220b:orange:hdd", | ||
41 | .default_trigger = "none", | ||
42 | .gpio = 60, | ||
43 | }, | ||
44 | { | ||
45 | .name = "nas4220b:green:os", | ||
46 | .default_trigger = "heartbeat", | ||
47 | .gpio = 62, | ||
48 | }, | ||
49 | }; | ||
50 | |||
51 | static struct gpio_led_platform_data ib4220b_leds_data = { | ||
52 | .num_leds = ARRAY_SIZE(ib4220b_leds), | ||
53 | .leds = ib4220b_leds, | ||
54 | }; | ||
55 | |||
56 | static struct platform_device ib4220b_led_device = { | ||
57 | .name = "leds-gpio", | ||
58 | .id = -1, | ||
59 | .dev = { | ||
60 | .platform_data = &ib4220b_leds_data, | ||
61 | }, | ||
62 | }; | ||
63 | |||
64 | static struct gpio_keys_button ib4220b_keys[] = { | ||
65 | { | ||
66 | .code = KEY_SETUP, | ||
67 | .gpio = 61, | ||
68 | .active_low = 1, | ||
69 | .desc = "Backup Button", | ||
70 | .type = EV_KEY, | ||
71 | }, | ||
72 | { | ||
73 | .code = KEY_RESTART, | ||
74 | .gpio = 63, | ||
75 | .active_low = 1, | ||
76 | .desc = "Softreset Button", | ||
77 | .type = EV_KEY, | ||
78 | }, | ||
79 | }; | ||
80 | |||
81 | static struct gpio_keys_platform_data ib4220b_keys_data = { | ||
82 | .buttons = ib4220b_keys, | ||
83 | .nbuttons = ARRAY_SIZE(ib4220b_keys), | ||
84 | }; | ||
85 | |||
86 | static struct platform_device ib4220b_key_device = { | ||
87 | .name = "gpio-keys", | ||
88 | .id = -1, | ||
89 | .dev = { | ||
90 | .platform_data = &ib4220b_keys_data, | ||
91 | }, | ||
92 | }; | ||
93 | |||
94 | static void __init ib4220b_init(void) | ||
95 | { | ||
96 | gemini_gpio_init(); | ||
97 | platform_register_uart(); | ||
98 | platform_register_pflash(SZ_16M, NULL, 0); | ||
99 | platform_device_register(&ib4220b_led_device); | ||
100 | platform_device_register(&ib4220b_key_device); | ||
101 | } | ||
102 | |||
103 | MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B") | ||
104 | .phys_io = 0x7fffc000, | ||
105 | .io_pg_offst = ((0xffffc000) >> 18) & 0xfffc, | ||
106 | .boot_params = 0x100, | ||
107 | .map_io = gemini_map_io, | ||
108 | .init_irq = gemini_init_irq, | ||
109 | .timer = &ib4220b_timer, | ||
110 | .init_machine = ib4220b_init, | ||
111 | MACHINE_END | ||
diff --git a/arch/arm/mach-gemini/board-wbd111.c b/arch/arm/mach-gemini/board-wbd111.c new file mode 100644 index 000000000000..36538c15b3c4 --- /dev/null +++ b/arch/arm/mach-gemini/board-wbd111.c | |||
@@ -0,0 +1,143 @@ | |||
1 | /* | ||
2 | * Support for Wiliboard WBD-111 | ||
3 | * | ||
4 | * Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | */ | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/leds.h> | ||
15 | #include <linux/input.h> | ||
16 | #include <linux/skbuff.h> | ||
17 | #include <linux/gpio_keys.h> | ||
18 | #include <linux/mdio-gpio.h> | ||
19 | #include <linux/mtd/mtd.h> | ||
20 | #include <linux/mtd/partitions.h> | ||
21 | #include <asm/mach-types.h> | ||
22 | #include <asm/mach/arch.h> | ||
23 | #include <asm/mach/time.h> | ||
24 | |||
25 | |||
26 | #include "common.h" | ||
27 | |||
28 | static struct gpio_keys_button wbd111_keys[] = { | ||
29 | { | ||
30 | .code = KEY_SETUP, | ||
31 | .gpio = 5, | ||
32 | .active_low = 1, | ||
33 | .desc = "reset", | ||
34 | .type = EV_KEY, | ||
35 | }, | ||
36 | }; | ||
37 | |||
38 | static struct gpio_keys_platform_data wbd111_keys_data = { | ||
39 | .buttons = wbd111_keys, | ||
40 | .nbuttons = ARRAY_SIZE(wbd111_keys), | ||
41 | }; | ||
42 | |||
43 | static struct platform_device wbd111_keys_device = { | ||
44 | .name = "gpio-keys", | ||
45 | .id = -1, | ||
46 | .dev = { | ||
47 | .platform_data = &wbd111_keys_data, | ||
48 | }, | ||
49 | }; | ||
50 | |||
51 | static struct gpio_led wbd111_leds[] = { | ||
52 | { | ||
53 | .name = "L3red", | ||
54 | .gpio = 1, | ||
55 | }, | ||
56 | { | ||
57 | .name = "L4green", | ||
58 | .gpio = 2, | ||
59 | }, | ||
60 | { | ||
61 | .name = "L4red", | ||
62 | .gpio = 3, | ||
63 | }, | ||
64 | { | ||
65 | .name = "L3green", | ||
66 | .gpio = 5, | ||
67 | }, | ||
68 | }; | ||
69 | |||
70 | static struct gpio_led_platform_data wbd111_leds_data = { | ||
71 | .num_leds = ARRAY_SIZE(wbd111_leds), | ||
72 | .leds = wbd111_leds, | ||
73 | }; | ||
74 | |||
75 | static struct platform_device wbd111_leds_device = { | ||
76 | .name = "leds-gpio", | ||
77 | .id = -1, | ||
78 | .dev = { | ||
79 | .platform_data = &wbd111_leds_data, | ||
80 | }, | ||
81 | }; | ||
82 | |||
83 | static struct sys_timer wbd111_timer = { | ||
84 | .init = gemini_timer_init, | ||
85 | }; | ||
86 | |||
87 | #ifdef CONFIG_MTD_PARTITIONS | ||
88 | static struct mtd_partition wbd111_partitions[] = { | ||
89 | { | ||
90 | .name = "RedBoot", | ||
91 | .offset = 0, | ||
92 | .size = 0x020000, | ||
93 | .mask_flags = MTD_WRITEABLE, | ||
94 | } , { | ||
95 | .name = "kernel", | ||
96 | .offset = 0x020000, | ||
97 | .size = 0x100000, | ||
98 | } , { | ||
99 | .name = "rootfs", | ||
100 | .offset = 0x120000, | ||
101 | .size = 0x6a0000, | ||
102 | } , { | ||
103 | .name = "VCTL", | ||
104 | .offset = 0x7c0000, | ||
105 | .size = 0x010000, | ||
106 | .mask_flags = MTD_WRITEABLE, | ||
107 | } , { | ||
108 | .name = "cfg", | ||
109 | .offset = 0x7d0000, | ||
110 | .size = 0x010000, | ||
111 | .mask_flags = MTD_WRITEABLE, | ||
112 | } , { | ||
113 | .name = "FIS", | ||
114 | .offset = 0x7e0000, | ||
115 | .size = 0x010000, | ||
116 | .mask_flags = MTD_WRITEABLE, | ||
117 | } | ||
118 | }; | ||
119 | #define wbd111_num_partitions ARRAY_SIZE(wbd111_partitions) | ||
120 | #else | ||
121 | #define wbd111_partitions NULL | ||
122 | #define wbd111_num_partitions 0 | ||
123 | #endif /* CONFIG_MTD_PARTITIONS */ | ||
124 | |||
125 | static void __init wbd111_init(void) | ||
126 | { | ||
127 | gemini_gpio_init(); | ||
128 | platform_register_uart(); | ||
129 | platform_register_pflash(SZ_8M, wbd111_partitions, | ||
130 | wbd111_num_partitions); | ||
131 | platform_device_register(&wbd111_leds_device); | ||
132 | platform_device_register(&wbd111_keys_device); | ||
133 | } | ||
134 | |||
135 | MACHINE_START(WBD111, "Wiliboard WBD-111") | ||
136 | .phys_io = 0x7fffc000, | ||
137 | .io_pg_offst = ((0xffffc000) >> 18) & 0xfffc, | ||
138 | .boot_params = 0x100, | ||
139 | .map_io = gemini_map_io, | ||
140 | .init_irq = gemini_init_irq, | ||
141 | .timer = &wbd111_timer, | ||
142 | .init_machine = wbd111_init, | ||
143 | MACHINE_END | ||
diff --git a/arch/arm/mach-gemini/board-wbd222.c b/arch/arm/mach-gemini/board-wbd222.c new file mode 100644 index 000000000000..ece8b4c65110 --- /dev/null +++ b/arch/arm/mach-gemini/board-wbd222.c | |||
@@ -0,0 +1,143 @@ | |||
1 | /* | ||
2 | * Support for Wiliboard WBD-222 | ||
3 | * | ||
4 | * Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | */ | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/leds.h> | ||
15 | #include <linux/input.h> | ||
16 | #include <linux/skbuff.h> | ||
17 | #include <linux/gpio_keys.h> | ||
18 | #include <linux/mdio-gpio.h> | ||
19 | #include <linux/mtd/mtd.h> | ||
20 | #include <linux/mtd/partitions.h> | ||
21 | #include <asm/mach-types.h> | ||
22 | #include <asm/mach/arch.h> | ||
23 | #include <asm/mach/time.h> | ||
24 | |||
25 | |||
26 | #include "common.h" | ||
27 | |||
28 | static struct gpio_keys_button wbd222_keys[] = { | ||
29 | { | ||
30 | .code = KEY_SETUP, | ||
31 | .gpio = 5, | ||
32 | .active_low = 1, | ||
33 | .desc = "reset", | ||
34 | .type = EV_KEY, | ||
35 | }, | ||
36 | }; | ||
37 | |||
38 | static struct gpio_keys_platform_data wbd222_keys_data = { | ||
39 | .buttons = wbd222_keys, | ||
40 | .nbuttons = ARRAY_SIZE(wbd222_keys), | ||
41 | }; | ||
42 | |||
43 | static struct platform_device wbd222_keys_device = { | ||
44 | .name = "gpio-keys", | ||
45 | .id = -1, | ||
46 | .dev = { | ||
47 | .platform_data = &wbd222_keys_data, | ||
48 | }, | ||
49 | }; | ||
50 | |||
51 | static struct gpio_led wbd222_leds[] = { | ||
52 | { | ||
53 | .name = "L3red", | ||
54 | .gpio = 1, | ||
55 | }, | ||
56 | { | ||
57 | .name = "L4green", | ||
58 | .gpio = 2, | ||
59 | }, | ||
60 | { | ||
61 | .name = "L4red", | ||
62 | .gpio = 3, | ||
63 | }, | ||
64 | { | ||
65 | .name = "L3green", | ||
66 | .gpio = 5, | ||
67 | }, | ||
68 | }; | ||
69 | |||
70 | static struct gpio_led_platform_data wbd222_leds_data = { | ||
71 | .num_leds = ARRAY_SIZE(wbd222_leds), | ||
72 | .leds = wbd222_leds, | ||
73 | }; | ||
74 | |||
75 | static struct platform_device wbd222_leds_device = { | ||
76 | .name = "leds-gpio", | ||
77 | .id = -1, | ||
78 | .dev = { | ||
79 | .platform_data = &wbd222_leds_data, | ||
80 | }, | ||
81 | }; | ||
82 | |||
83 | static struct sys_timer wbd222_timer = { | ||
84 | .init = gemini_timer_init, | ||
85 | }; | ||
86 | |||
87 | #ifdef CONFIG_MTD_PARTITIONS | ||
88 | static struct mtd_partition wbd222_partitions[] = { | ||
89 | { | ||
90 | .name = "RedBoot", | ||
91 | .offset = 0, | ||
92 | .size = 0x020000, | ||
93 | .mask_flags = MTD_WRITEABLE, | ||
94 | } , { | ||
95 | .name = "kernel", | ||
96 | .offset = 0x020000, | ||
97 | .size = 0x100000, | ||
98 | } , { | ||
99 | .name = "rootfs", | ||
100 | .offset = 0x120000, | ||
101 | .size = 0x6a0000, | ||
102 | } , { | ||
103 | .name = "VCTL", | ||
104 | .offset = 0x7c0000, | ||
105 | .size = 0x010000, | ||
106 | .mask_flags = MTD_WRITEABLE, | ||
107 | } , { | ||
108 | .name = "cfg", | ||
109 | .offset = 0x7d0000, | ||
110 | .size = 0x010000, | ||
111 | .mask_flags = MTD_WRITEABLE, | ||
112 | } , { | ||
113 | .name = "FIS", | ||
114 | .offset = 0x7e0000, | ||
115 | .size = 0x010000, | ||
116 | .mask_flags = MTD_WRITEABLE, | ||
117 | } | ||
118 | }; | ||
119 | #define wbd222_num_partitions ARRAY_SIZE(wbd222_partitions) | ||
120 | #else | ||
121 | #define wbd222_partitions NULL | ||
122 | #define wbd222_num_partitions 0 | ||
123 | #endif /* CONFIG_MTD_PARTITIONS */ | ||
124 | |||
125 | static void __init wbd222_init(void) | ||
126 | { | ||
127 | gemini_gpio_init(); | ||
128 | platform_register_uart(); | ||
129 | platform_register_pflash(SZ_8M, wbd222_partitions, | ||
130 | wbd222_num_partitions); | ||
131 | platform_device_register(&wbd222_leds_device); | ||
132 | platform_device_register(&wbd222_keys_device); | ||
133 | } | ||
134 | |||
135 | MACHINE_START(WBD222, "Wiliboard WBD-222") | ||
136 | .phys_io = 0x7fffc000, | ||
137 | .io_pg_offst = ((0xffffc000) >> 18) & 0xfffc, | ||
138 | .boot_params = 0x100, | ||
139 | .map_io = gemini_map_io, | ||
140 | .init_irq = gemini_init_irq, | ||
141 | .timer = &wbd222_timer, | ||
142 | .init_machine = wbd222_init, | ||
143 | MACHINE_END | ||
diff --git a/arch/arm/mach-h720x/include/mach/hardware.h b/arch/arm/mach-h720x/include/mach/hardware.h index 6c19156e2a42..c55a52c6541d 100644 --- a/arch/arm/mach-h720x/include/mach/hardware.h +++ b/arch/arm/mach-h720x/include/mach/hardware.h | |||
@@ -182,8 +182,6 @@ | |||
182 | #define SERIAL_ENABLE_EN (1<<0) | 182 | #define SERIAL_ENABLE_EN (1<<0) |
183 | 183 | ||
184 | /* General defines to pacify gcc */ | 184 | /* General defines to pacify gcc */ |
185 | #define PCIO_BASE (0) /* for inb, outb and friends */ | ||
186 | #define PCIO_VIRT PCIO_BASE | ||
187 | 185 | ||
188 | #define __ASM_ARCH_HARDWARE_INCMACH_H | 186 | #define __ASM_ARCH_HARDWARE_INCMACH_H |
189 | #include "boards.h" | 187 | #include "boards.h" |
diff --git a/arch/arm/mach-integrator/include/mach/hardware.h b/arch/arm/mach-integrator/include/mach/hardware.h index 8e26360ce9a3..57f51ba11251 100644 --- a/arch/arm/mach-integrator/include/mach/hardware.h +++ b/arch/arm/mach-integrator/include/mach/hardware.h | |||
@@ -32,7 +32,6 @@ | |||
32 | #define IO_SIZE 0x0B000000 // How much? | 32 | #define IO_SIZE 0x0B000000 // How much? |
33 | #define IO_START INTEGRATOR_HDR_BASE // PA of IO | 33 | #define IO_START INTEGRATOR_HDR_BASE // PA of IO |
34 | 34 | ||
35 | #define PCIO_BASE PCI_IO_VADDR | ||
36 | #define PCIMEM_BASE PCI_MEMORY_VADDR | 35 | #define PCIMEM_BASE PCI_MEMORY_VADDR |
37 | 36 | ||
38 | #define pcibios_assign_all_busses() 1 | 37 | #define pcibios_assign_all_busses() 1 |
diff --git a/arch/arm/mach-ixp23xx/include/mach/hardware.h b/arch/arm/mach-ixp23xx/include/mach/hardware.h index c3192009a886..57b508bfe280 100644 --- a/arch/arm/mach-ixp23xx/include/mach/hardware.h +++ b/arch/arm/mach-ixp23xx/include/mach/hardware.h | |||
@@ -15,7 +15,6 @@ | |||
15 | #define __ASM_ARCH_HARDWARE_H | 15 | #define __ASM_ARCH_HARDWARE_H |
16 | 16 | ||
17 | /* PCI IO info */ | 17 | /* PCI IO info */ |
18 | #define PCIO_BASE IXP23XX_PCI_IO_VIRT | ||
19 | #define PCIBIOS_MIN_IO 0x00000000 | 18 | #define PCIBIOS_MIN_IO 0x00000000 |
20 | #define PCIBIOS_MIN_MEM 0xe0000000 | 19 | #define PCIBIOS_MIN_MEM 0xe0000000 |
21 | 20 | ||
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c index 244655d323ea..0629394a5fb9 100644 --- a/arch/arm/mach-mmp/aspenite.c +++ b/arch/arm/mach-mmp/aspenite.c | |||
@@ -150,9 +150,8 @@ static void __init common_init(void) | |||
150 | 150 | ||
151 | MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform") | 151 | MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform") |
152 | .phys_io = APB_PHYS_BASE, | 152 | .phys_io = APB_PHYS_BASE, |
153 | .boot_params = 0x00000100, | ||
154 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, | 153 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, |
155 | .map_io = pxa_map_io, | 154 | .map_io = mmp_map_io, |
156 | .init_irq = pxa168_init_irq, | 155 | .init_irq = pxa168_init_irq, |
157 | .timer = &pxa168_timer, | 156 | .timer = &pxa168_timer, |
158 | .init_machine = common_init, | 157 | .init_machine = common_init, |
@@ -160,9 +159,8 @@ MACHINE_END | |||
160 | 159 | ||
161 | MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform") | 160 | MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform") |
162 | .phys_io = APB_PHYS_BASE, | 161 | .phys_io = APB_PHYS_BASE, |
163 | .boot_params = 0x00000100, | ||
164 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, | 162 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, |
165 | .map_io = pxa_map_io, | 163 | .map_io = mmp_map_io, |
166 | .init_irq = pxa168_init_irq, | 164 | .init_irq = pxa168_init_irq, |
167 | .timer = &pxa168_timer, | 165 | .timer = &pxa168_timer, |
168 | .init_machine = common_init, | 166 | .init_machine = common_init, |
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c index 8c3fa5d14f4b..69bcba11f53f 100644 --- a/arch/arm/mach-mmp/avengers_lite.c +++ b/arch/arm/mach-mmp/avengers_lite.c | |||
@@ -42,9 +42,8 @@ static void __init avengers_lite_init(void) | |||
42 | 42 | ||
43 | MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform") | 43 | MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform") |
44 | .phys_io = APB_PHYS_BASE, | 44 | .phys_io = APB_PHYS_BASE, |
45 | .boot_params = 0x00000100, | ||
46 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, | 45 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, |
47 | .map_io = pxa_map_io, | 46 | .map_io = mmp_map_io, |
48 | .init_irq = pxa168_init_irq, | 47 | .init_irq = pxa168_init_irq, |
49 | .timer = &pxa168_timer, | 48 | .timer = &pxa168_timer, |
50 | .init_machine = avengers_lite_init, | 49 | .init_machine = avengers_lite_init, |
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c index e1e66c18b446..3b29fa7e9b08 100644 --- a/arch/arm/mach-mmp/common.c +++ b/arch/arm/mach-mmp/common.c | |||
@@ -31,7 +31,7 @@ static struct map_desc standard_io_desc[] __initdata = { | |||
31 | }, | 31 | }, |
32 | }; | 32 | }; |
33 | 33 | ||
34 | void __init pxa_map_io(void) | 34 | void __init mmp_map_io(void) |
35 | { | 35 | { |
36 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); | 36 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); |
37 | } | 37 | } |
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h index b4a0ba05a0f4..ec8d65ded25c 100644 --- a/arch/arm/mach-mmp/common.h +++ b/arch/arm/mach-mmp/common.h | |||
@@ -3,15 +3,6 @@ | |||
3 | struct sys_timer; | 3 | struct sys_timer; |
4 | 4 | ||
5 | extern void timer_init(int irq); | 5 | extern void timer_init(int irq); |
6 | extern void mmp2_clear_pmic_int(void); | ||
7 | |||
8 | extern struct sys_timer pxa168_timer; | ||
9 | extern struct sys_timer pxa910_timer; | ||
10 | extern struct sys_timer mmp2_timer; | ||
11 | extern void __init pxa168_init_irq(void); | ||
12 | extern void __init pxa910_init_irq(void); | ||
13 | extern void __init mmp2_init_icu(void); | ||
14 | extern void __init mmp2_init_irq(void); | ||
15 | 6 | ||
16 | extern void __init icu_init_irq(void); | 7 | extern void __init icu_init_irq(void); |
17 | extern void __init pxa_map_io(void); | 8 | extern void __init mmp_map_io(void); |
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c index 4ec7709a3462..e4312d238eae 100644 --- a/arch/arm/mach-mmp/flint.c +++ b/arch/arm/mach-mmp/flint.c | |||
@@ -114,9 +114,8 @@ static void __init flint_init(void) | |||
114 | 114 | ||
115 | MACHINE_START(FLINT, "Flint Development Platform") | 115 | MACHINE_START(FLINT, "Flint Development Platform") |
116 | .phys_io = APB_PHYS_BASE, | 116 | .phys_io = APB_PHYS_BASE, |
117 | .boot_params = 0x00000100, | ||
118 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, | 117 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, |
119 | .map_io = pxa_map_io, | 118 | .map_io = mmp_map_io, |
120 | .init_irq = mmp2_init_irq, | 119 | .init_irq = mmp2_init_irq, |
121 | .timer = &mmp2_timer, | 120 | .timer = &mmp2_timer, |
122 | .init_machine = flint_init, | 121 | .init_machine = flint_init, |
diff --git a/arch/arm/mach-mmp/include/mach/devices.h b/arch/arm/mach-mmp/include/mach/devices.h index 1fa0a492454a..d0ec7dae88e4 100644 --- a/arch/arm/mach-mmp/include/mach/devices.h +++ b/arch/arm/mach-mmp/include/mach/devices.h | |||
@@ -1,3 +1,6 @@ | |||
1 | #ifndef __MACH_DEVICE_H | ||
2 | #define __MACH_DEVICE_H | ||
3 | |||
1 | #include <linux/types.h> | 4 | #include <linux/types.h> |
2 | 5 | ||
3 | #define MAX_RESOURCE_DMA 2 | 6 | #define MAX_RESOURCE_DMA 2 |
@@ -47,3 +50,4 @@ struct pxa_device_desc mmp2_device_##_name __initdata = { \ | |||
47 | } | 50 | } |
48 | 51 | ||
49 | extern int pxa_register_device(struct pxa_device_desc *, void *, size_t); | 52 | extern int pxa_register_device(struct pxa_device_desc *, void *, size_t); |
53 | #endif /* __MACH_DEVICE_H */ | ||
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h index fec220bd5046..dbba6e8a60c4 100644 --- a/arch/arm/mach-mmp/include/mach/mmp2.h +++ b/arch/arm/mach-mmp/include/mach/mmp2.h | |||
@@ -1,6 +1,13 @@ | |||
1 | #ifndef __ASM_MACH_MMP2_H | 1 | #ifndef __ASM_MACH_MMP2_H |
2 | #define __ASM_MACH_MMP2_H | 2 | #define __ASM_MACH_MMP2_H |
3 | 3 | ||
4 | struct sys_timer; | ||
5 | |||
6 | extern struct sys_timer mmp2_timer; | ||
7 | extern void __init mmp2_init_icu(void); | ||
8 | extern void __init mmp2_init_irq(void); | ||
9 | extern void mmp2_clear_pmic_int(void); | ||
10 | |||
4 | #include <linux/i2c.h> | 11 | #include <linux/i2c.h> |
5 | #include <mach/devices.h> | 12 | #include <mach/devices.h> |
6 | #include <plat/i2c.h> | 13 | #include <plat/i2c.h> |
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index 3b2bd5d5eb05..27e1bc758623 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h | |||
@@ -1,6 +1,11 @@ | |||
1 | #ifndef __ASM_MACH_PXA168_H | 1 | #ifndef __ASM_MACH_PXA168_H |
2 | #define __ASM_MACH_PXA168_H | 2 | #define __ASM_MACH_PXA168_H |
3 | 3 | ||
4 | struct sys_timer; | ||
5 | |||
6 | extern struct sys_timer pxa168_timer; | ||
7 | extern void __init pxa168_init_irq(void); | ||
8 | |||
4 | #include <linux/i2c.h> | 9 | #include <linux/i2c.h> |
5 | #include <mach/devices.h> | 10 | #include <mach/devices.h> |
6 | #include <plat/i2c.h> | 11 | #include <plat/i2c.h> |
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h index 4f0b4ec6f5d0..f13c49d6f8dc 100644 --- a/arch/arm/mach-mmp/include/mach/pxa910.h +++ b/arch/arm/mach-mmp/include/mach/pxa910.h | |||
@@ -1,6 +1,11 @@ | |||
1 | #ifndef __ASM_MACH_PXA910_H | 1 | #ifndef __ASM_MACH_PXA910_H |
2 | #define __ASM_MACH_PXA910_H | 2 | #define __ASM_MACH_PXA910_H |
3 | 3 | ||
4 | struct sys_timer; | ||
5 | |||
6 | extern struct sys_timer pxa910_timer; | ||
7 | extern void __init pxa910_init_irq(void); | ||
8 | |||
4 | #include <linux/i2c.h> | 9 | #include <linux/i2c.h> |
5 | #include <mach/devices.h> | 10 | #include <mach/devices.h> |
6 | #include <plat/i2c.h> | 11 | #include <plat/i2c.h> |
diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c index cb18221c0af3..01342be91c3c 100644 --- a/arch/arm/mach-mmp/irq-mmp2.c +++ b/arch/arm/mach-mmp/irq-mmp2.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | 17 | ||
18 | #include <mach/regs-icu.h> | 18 | #include <mach/regs-icu.h> |
19 | #include <mach/mmp2.h> | ||
19 | 20 | ||
20 | #include "common.h" | 21 | #include "common.h" |
21 | 22 | ||
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c index d77dd41d60e1..80c3e7ab1e17 100644 --- a/arch/arm/mach-mmp/jasper.c +++ b/arch/arm/mach-mmp/jasper.c | |||
@@ -135,9 +135,8 @@ static void __init jasper_init(void) | |||
135 | 135 | ||
136 | MACHINE_START(MARVELL_JASPER, "Jasper Development Platform") | 136 | MACHINE_START(MARVELL_JASPER, "Jasper Development Platform") |
137 | .phys_io = APB_PHYS_BASE, | 137 | .phys_io = APB_PHYS_BASE, |
138 | .boot_params = 0x00000100, | ||
139 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, | 138 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, |
140 | .map_io = pxa_map_io, | 139 | .map_io = mmp_map_io, |
141 | .init_irq = mmp2_init_irq, | 140 | .init_irq = mmp2_init_irq, |
142 | .timer = &mmp2_timer, | 141 | .timer = &mmp2_timer, |
143 | .init_machine = jasper_init, | 142 | .init_machine = jasper_init, |
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c index 7f5eb059bb01..daf3993349f8 100644 --- a/arch/arm/mach-mmp/mmp2.c +++ b/arch/arm/mach-mmp/mmp2.c | |||
@@ -17,6 +17,7 @@ | |||
17 | 17 | ||
18 | #include <asm/hardware/cache-tauros2.h> | 18 | #include <asm/hardware/cache-tauros2.h> |
19 | 19 | ||
20 | #include <asm/mach/time.h> | ||
20 | #include <mach/addr-map.h> | 21 | #include <mach/addr-map.h> |
21 | #include <mach/regs-apbc.h> | 22 | #include <mach/regs-apbc.h> |
22 | #include <mach/regs-apmu.h> | 23 | #include <mach/regs-apmu.h> |
@@ -26,6 +27,7 @@ | |||
26 | #include <mach/mfp.h> | 27 | #include <mach/mfp.h> |
27 | #include <mach/gpio.h> | 28 | #include <mach/gpio.h> |
28 | #include <mach/devices.h> | 29 | #include <mach/devices.h> |
30 | #include <mach/mmp2.h> | ||
29 | 31 | ||
30 | #include "common.h" | 32 | #include "common.h" |
31 | #include "clock.h" | 33 | #include "clock.h" |
@@ -158,6 +160,26 @@ static int __init mmp2_init(void) | |||
158 | } | 160 | } |
159 | postcore_initcall(mmp2_init); | 161 | postcore_initcall(mmp2_init); |
160 | 162 | ||
163 | static void __init mmp2_timer_init(void) | ||
164 | { | ||
165 | unsigned long clk_rst; | ||
166 | |||
167 | __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS); | ||
168 | |||
169 | /* | ||
170 | * enable bus/functional clock, enable 6.5MHz (divider 4), | ||
171 | * release reset | ||
172 | */ | ||
173 | clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); | ||
174 | __raw_writel(clk_rst, APBC_MMP2_TIMERS); | ||
175 | |||
176 | timer_init(IRQ_MMP2_TIMER1); | ||
177 | } | ||
178 | |||
179 | struct sys_timer mmp2_timer = { | ||
180 | .init = mmp2_timer_init, | ||
181 | }; | ||
182 | |||
161 | /* on-chip devices */ | 183 | /* on-chip devices */ |
162 | MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5); | 184 | MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5); |
163 | MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21); | 185 | MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21); |
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c index 0e0c9220eaba..e81db7428215 100644 --- a/arch/arm/mach-mmp/tavorevb.c +++ b/arch/arm/mach-mmp/tavorevb.c | |||
@@ -100,9 +100,8 @@ static void __init tavorevb_init(void) | |||
100 | 100 | ||
101 | MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)") | 101 | MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)") |
102 | .phys_io = APB_PHYS_BASE, | 102 | .phys_io = APB_PHYS_BASE, |
103 | .boot_params = 0x00000100, | ||
104 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, | 103 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, |
105 | .map_io = pxa_map_io, | 104 | .map_io = mmp_map_io, |
106 | .init_irq = pxa910_init_irq, | 105 | .init_irq = pxa910_init_irq, |
107 | .timer = &pxa910_timer, | 106 | .timer = &pxa910_timer, |
108 | .init_machine = tavorevb_init, | 107 | .init_machine = tavorevb_init, |
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index cf75694e9687..66528193f939 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c | |||
@@ -200,24 +200,3 @@ void __init timer_init(int irq) | |||
200 | clocksource_register(&cksrc); | 200 | clocksource_register(&cksrc); |
201 | clockevents_register_device(&ckevt); | 201 | clockevents_register_device(&ckevt); |
202 | } | 202 | } |
203 | |||
204 | static void __init mmp2_timer_init(void) | ||
205 | { | ||
206 | unsigned long clk_rst; | ||
207 | |||
208 | __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS); | ||
209 | |||
210 | /* | ||
211 | * enable bus/functional clock, enable 6.5MHz (divider 4), | ||
212 | * release reset | ||
213 | */ | ||
214 | clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); | ||
215 | __raw_writel(clk_rst, APBC_MMP2_TIMERS); | ||
216 | |||
217 | timer_init(IRQ_MMP2_TIMER1); | ||
218 | } | ||
219 | |||
220 | struct sys_timer mmp2_timer = { | ||
221 | .init = mmp2_timer_init, | ||
222 | }; | ||
223 | |||
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c index b22dec4abf78..ee65e05f0cf1 100644 --- a/arch/arm/mach-mmp/ttc_dkb.c +++ b/arch/arm/mach-mmp/ttc_dkb.c | |||
@@ -123,9 +123,8 @@ static void __init ttc_dkb_init(void) | |||
123 | 123 | ||
124 | MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform") | 124 | MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform") |
125 | .phys_io = APB_PHYS_BASE, | 125 | .phys_io = APB_PHYS_BASE, |
126 | .boot_params = 0x00000100, | ||
127 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, | 126 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, |
128 | .map_io = pxa_map_io, | 127 | .map_io = mmp_map_io, |
129 | .init_irq = pxa910_init_irq, | 128 | .init_irq = pxa910_init_irq, |
130 | .timer = &pxa910_timer, | 129 | .timer = &pxa910_timer, |
131 | .init_machine = ttc_dkb_init, | 130 | .init_machine = ttc_dkb_init, |
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 3b51741a4810..7aefb9074852 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
@@ -238,6 +238,17 @@ config MACH_COLIBRI | |||
238 | bool "Toradex Colibri PXA270" | 238 | bool "Toradex Colibri PXA270" |
239 | select PXA27x | 239 | select PXA27x |
240 | 240 | ||
241 | config MACH_COLIBRI_PXA270_EVALBOARD | ||
242 | bool "Toradex Colibri Evaluation Carrier Board support (PXA270)" | ||
243 | depends on MACH_COLIBRI | ||
244 | |||
245 | config MACH_COLIBRI_PXA270_INCOME | ||
246 | bool "Income s.r.o. PXA270 SBC" | ||
247 | depends on MACH_COLIBRI | ||
248 | select PXA27x | ||
249 | select HAVE_PWM | ||
250 | select PXA_HAVE_BOARD_IRQS | ||
251 | |||
241 | config MACH_COLIBRI300 | 252 | config MACH_COLIBRI300 |
242 | bool "Toradex Colibri PXA300/310" | 253 | bool "Toradex Colibri PXA300/310" |
243 | select PXA3xx | 254 | select PXA3xx |
@@ -336,6 +347,9 @@ config ARCH_PXA_PALM | |||
336 | bool "PXA based Palm PDAs" | 347 | bool "PXA based Palm PDAs" |
337 | select HAVE_PWM | 348 | select HAVE_PWM |
338 | 349 | ||
350 | config MACH_PALM27X | ||
351 | bool | ||
352 | |||
339 | config MACH_PALMTE2 | 353 | config MACH_PALMTE2 |
340 | bool "Palm Tungsten|E2" | 354 | bool "Palm Tungsten|E2" |
341 | default y | 355 | default y |
@@ -360,6 +374,7 @@ config MACH_PALMT5 | |||
360 | depends on ARCH_PXA_PALM | 374 | depends on ARCH_PXA_PALM |
361 | select PXA27x | 375 | select PXA27x |
362 | select IWMMXT | 376 | select IWMMXT |
377 | select MACH_PALM27X | ||
363 | help | 378 | help |
364 | Say Y here if you intend to run this kernel on a Palm Tungsten|T5 | 379 | Say Y here if you intend to run this kernel on a Palm Tungsten|T5 |
365 | handheld computer. | 380 | handheld computer. |
@@ -370,6 +385,7 @@ config MACH_PALMTX | |||
370 | depends on ARCH_PXA_PALM | 385 | depends on ARCH_PXA_PALM |
371 | select PXA27x | 386 | select PXA27x |
372 | select IWMMXT | 387 | select IWMMXT |
388 | select MACH_PALM27X | ||
373 | help | 389 | help |
374 | Say Y here if you intend to run this kernel on a Palm T|X | 390 | Say Y here if you intend to run this kernel on a Palm T|X |
375 | handheld computer. | 391 | handheld computer. |
@@ -380,6 +396,7 @@ config MACH_PALMZ72 | |||
380 | depends on ARCH_PXA_PALM | 396 | depends on ARCH_PXA_PALM |
381 | select PXA27x | 397 | select PXA27x |
382 | select IWMMXT | 398 | select IWMMXT |
399 | select MACH_PALM27X | ||
383 | help | 400 | help |
384 | Say Y here if you intend to run this kernel on Palm Zire 72 | 401 | Say Y here if you intend to run this kernel on Palm Zire 72 |
385 | handheld computer. | 402 | handheld computer. |
@@ -390,6 +407,7 @@ config MACH_PALMLD | |||
390 | depends on ARCH_PXA_PALM | 407 | depends on ARCH_PXA_PALM |
391 | select PXA27x | 408 | select PXA27x |
392 | select IWMMXT | 409 | select IWMMXT |
410 | select MACH_PALM27X | ||
393 | help | 411 | help |
394 | Say Y here if you intend to run this kernel on a Palm LifeDrive | 412 | Say Y here if you intend to run this kernel on a Palm LifeDrive |
395 | handheld computer. | 413 | handheld computer. |
@@ -447,16 +465,13 @@ config PXA_SHARPSL | |||
447 | SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa) | 465 | SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa) |
448 | handheld computer. | 466 | handheld computer. |
449 | 467 | ||
450 | config SHARPSL_PM | 468 | config PXA_SHARPSL_DETECT_MACH_ID |
451 | bool | 469 | bool "Detect machine ID at run-time in the decompressor" |
452 | select APM_EMULATION | 470 | depends on PXA_SHARPSL |
453 | select SHARPSL_PM_MAX1111 | 471 | help |
454 | 472 | Say Y here if you want the zImage decompressor to detect | |
455 | config SHARPSL_PM_MAX1111 | 473 | the Zaurus machine ID at run-time. For latest kexec-based |
456 | bool | 474 | boot loader, this is not necessary. |
457 | depends on !CORGI_SSP_DEPRECATED | ||
458 | select HWMON | ||
459 | select SENSORS_MAX1111 | ||
460 | 475 | ||
461 | config MACH_POODLE | 476 | config MACH_POODLE |
462 | bool "Enable Sharp SL-5600 (Poodle) Support" | 477 | bool "Enable Sharp SL-5600 (Poodle) Support" |
@@ -510,6 +525,25 @@ config MACH_TOSA | |||
510 | select PXA25x | 525 | select PXA25x |
511 | select PXA_HAVE_BOARD_IRQS | 526 | select PXA_HAVE_BOARD_IRQS |
512 | 527 | ||
528 | config TOSA_BT | ||
529 | tristate "Control the state of built-in bluetooth chip on Sharp SL-6000" | ||
530 | depends on MACH_TOSA | ||
531 | select RFKILL | ||
532 | help | ||
533 | This is a simple driver that is able to control | ||
534 | the state of built in bluetooth chip on tosa. | ||
535 | |||
536 | config TOSA_USE_EXT_KEYCODES | ||
537 | bool "Tosa keyboard: use extended keycodes" | ||
538 | depends on MACH_TOSA | ||
539 | default n | ||
540 | help | ||
541 | Say Y here to enable the tosa keyboard driver to generate extended | ||
542 | (>= 127) keycodes. Be aware, that they can't be correctly interpreted | ||
543 | by either console keyboard driver or by Kdrive keybd driver. | ||
544 | |||
545 | Say Y only if you know, what you are doing! | ||
546 | |||
513 | config MACH_ICONTROL | 547 | config MACH_ICONTROL |
514 | bool "TMT iControl/SafeTCam based on the MXM-8x10 CoM" | 548 | bool "TMT iControl/SafeTCam based on the MXM-8x10 CoM" |
515 | select CPU_PXA320 | 549 | select CPU_PXA320 |
@@ -648,25 +682,15 @@ config PXA_SHARP_Cxx00 | |||
648 | help | 682 | help |
649 | Enable common support for Sharp Cxx00 models | 683 | Enable common support for Sharp Cxx00 models |
650 | 684 | ||
651 | config TOSA_BT | 685 | config SHARPSL_PM |
652 | tristate "Control the state of built-in bluetooth chip on Sharp SL-6000" | 686 | bool |
653 | depends on MACH_TOSA | 687 | select APM_EMULATION |
654 | select RFKILL | 688 | select SHARPSL_PM_MAX1111 |
655 | help | ||
656 | This is a simple driver that is able to control | ||
657 | the state of built in bluetooth chip on tosa. | ||
658 | |||
659 | config TOSA_USE_EXT_KEYCODES | ||
660 | bool "Tosa keyboard: use extended keycodes" | ||
661 | depends on MACH_TOSA | ||
662 | default n | ||
663 | help | ||
664 | Say Y here to enable the tosa keyboard driver to generate extended | ||
665 | (>= 127) keycodes. Be aware, that they can't be correctly interpreted | ||
666 | by either console keyboard driver or by Kdrive keybd driver. | ||
667 | |||
668 | Say Y only if you know, what you are doing! | ||
669 | 689 | ||
690 | config SHARPSL_PM_MAX1111 | ||
691 | bool | ||
692 | select HWMON | ||
693 | select SENSORS_MAX1111 | ||
670 | 694 | ||
671 | config PXA_HAVE_BOARD_IRQS | 695 | config PXA_HAVE_BOARD_IRQS |
672 | bool | 696 | bool |
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index b8f1f4bc7ca7..85c7fb324dbb 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile | |||
@@ -51,14 +51,16 @@ obj-$(CONFIG_MACH_CAPC7117) += capc7117.o mxm8x10.o | |||
51 | obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o | 51 | obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o |
52 | obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o | 52 | obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o |
53 | obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o | 53 | obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o |
54 | obj-$(CONFIG_MACH_INTELMOTE2) += imote2.o | 54 | obj-$(CONFIG_MACH_INTELMOTE2) += stargate2.o |
55 | obj-$(CONFIG_MACH_STARGATE2) += stargate2.o | 55 | obj-$(CONFIG_MACH_STARGATE2) += stargate2.o |
56 | obj-$(CONFIG_MACH_XCEP) += xcep.o | 56 | obj-$(CONFIG_MACH_XCEP) += xcep.o |
57 | obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o | 57 | obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o |
58 | obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o | 58 | obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o |
59 | obj-$(CONFIG_MACH_PCM027) += pcm027.o | 59 | obj-$(CONFIG_MACH_PCM027) += pcm027.o |
60 | obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o | 60 | obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o |
61 | obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o | 61 | obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o |
62 | obj-$(CONFIG_MACH_COLIBRI_PXA270_EVALBOARD) += colibri-pxa270-evalboard.o | ||
63 | obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME) += colibri-pxa270-income.o | ||
62 | obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o | 64 | obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o |
63 | obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o | 65 | obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o |
64 | obj-$(CONFIG_MACH_VPAC270) += vpac270.o | 66 | obj-$(CONFIG_MACH_VPAC270) += vpac270.o |
@@ -73,6 +75,7 @@ obj-$(CONFIG_PXA_EZX) += ezx.o | |||
73 | obj-$(CONFIG_MACH_MP900C) += mp900.o | 75 | obj-$(CONFIG_MACH_MP900C) += mp900.o |
74 | obj-$(CONFIG_MACH_PALMTE2) += palmte2.o | 76 | obj-$(CONFIG_MACH_PALMTE2) += palmte2.o |
75 | obj-$(CONFIG_MACH_PALMTC) += palmtc.o | 77 | obj-$(CONFIG_MACH_PALMTC) += palmtc.o |
78 | obj-$(CONFIG_MACH_PALM27X) += palm27x.o | ||
76 | obj-$(CONFIG_MACH_PALMT5) += palmt5.o | 79 | obj-$(CONFIG_MACH_PALMT5) += palmt5.o |
77 | obj-$(CONFIG_MACH_PALMTX) += palmtx.o | 80 | obj-$(CONFIG_MACH_PALMTX) += palmtx.o |
78 | obj-$(CONFIG_MACH_PALMZ72) += palmz72.o | 81 | obj-$(CONFIG_MACH_PALMZ72) += palmz72.o |
@@ -84,12 +87,6 @@ obj-$(CONFIG_MACH_POODLE) += poodle.o | |||
84 | obj-$(CONFIG_MACH_TOSA) += tosa.o | 87 | obj-$(CONFIG_MACH_TOSA) += tosa.o |
85 | obj-$(CONFIG_MACH_ICONTROL) += icontrol.o mxm8x10.o | 88 | obj-$(CONFIG_MACH_ICONTROL) += icontrol.o mxm8x10.o |
86 | obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o | 89 | obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o |
87 | obj-$(CONFIG_MACH_E330) += e330.o | ||
88 | obj-$(CONFIG_MACH_E350) += e350.o | ||
89 | obj-$(CONFIG_MACH_E740) += e740.o | ||
90 | obj-$(CONFIG_MACH_E750) += e750.o | ||
91 | obj-$(CONFIG_MACH_E400) += e400.o | ||
92 | obj-$(CONFIG_MACH_E800) += e800.o | ||
93 | obj-$(CONFIG_MACH_RAUMFELD_RC) += raumfeld.o | 90 | obj-$(CONFIG_MACH_RAUMFELD_RC) += raumfeld.o |
94 | obj-$(CONFIG_MACH_RAUMFELD_CONNECTOR) += raumfeld.o | 91 | obj-$(CONFIG_MACH_RAUMFELD_CONNECTOR) += raumfeld.o |
95 | obj-$(CONFIG_MACH_RAUMFELD_SPEAKER) += raumfeld.o | 92 | obj-$(CONFIG_MACH_RAUMFELD_SPEAKER) += raumfeld.o |
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index f3b5ace815e5..9041340fee1d 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c | |||
@@ -22,9 +22,14 @@ | |||
22 | #include <linux/fb.h> | 22 | #include <linux/fb.h> |
23 | #include <linux/gpio.h> | 23 | #include <linux/gpio.h> |
24 | #include <linux/ioport.h> | 24 | #include <linux/ioport.h> |
25 | #include <linux/ucb1400.h> | ||
25 | #include <linux/mtd/mtd.h> | 26 | #include <linux/mtd/mtd.h> |
26 | #include <linux/mtd/partitions.h> | 27 | #include <linux/mtd/partitions.h> |
27 | #include <linux/types.h> | 28 | #include <linux/types.h> |
29 | #include <linux/i2c/pcf857x.h> | ||
30 | #include <linux/mtd/nand.h> | ||
31 | #include <linux/mtd/physmap.h> | ||
32 | #include <linux/regulator/max1586.h> | ||
28 | 33 | ||
29 | #include <asm/setup.h> | 34 | #include <asm/setup.h> |
30 | #include <asm/mach-types.h> | 35 | #include <asm/mach-types.h> |
@@ -51,6 +56,59 @@ | |||
51 | #include "generic.h" | 56 | #include "generic.h" |
52 | #include "devices.h" | 57 | #include "devices.h" |
53 | 58 | ||
59 | /****************************************************************************** | ||
60 | * Pin configuration | ||
61 | ******************************************************************************/ | ||
62 | static unsigned long balloon3_pin_config[] __initdata = { | ||
63 | /* Select BTUART 'COM1/ttyS0' as IO option for pins 42/43/44/45 */ | ||
64 | GPIO42_BTUART_RXD, | ||
65 | GPIO43_BTUART_TXD, | ||
66 | GPIO44_BTUART_CTS, | ||
67 | GPIO45_BTUART_RTS, | ||
68 | |||
69 | /* Reset, configured as GPIO wakeup source */ | ||
70 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, | ||
71 | |||
72 | /* LEDs */ | ||
73 | GPIO9_GPIO, /* NAND activity LED */ | ||
74 | GPIO10_GPIO, /* Heartbeat LED */ | ||
75 | |||
76 | /* AC97 */ | ||
77 | GPIO28_AC97_BITCLK, | ||
78 | GPIO29_AC97_SDATA_IN_0, | ||
79 | GPIO30_AC97_SDATA_OUT, | ||
80 | GPIO31_AC97_SYNC, | ||
81 | GPIO113_AC97_nRESET, | ||
82 | GPIO95_GPIO, | ||
83 | |||
84 | /* MMC */ | ||
85 | GPIO32_MMC_CLK, | ||
86 | GPIO92_MMC_DAT_0, | ||
87 | GPIO109_MMC_DAT_1, | ||
88 | GPIO110_MMC_DAT_2, | ||
89 | GPIO111_MMC_DAT_3, | ||
90 | GPIO112_MMC_CMD, | ||
91 | |||
92 | /* USB Host */ | ||
93 | GPIO88_USBH1_PWR, | ||
94 | GPIO89_USBH1_PEN, | ||
95 | |||
96 | /* PC Card */ | ||
97 | GPIO48_nPOE, | ||
98 | GPIO49_nPWE, | ||
99 | GPIO50_nPIOR, | ||
100 | GPIO51_nPIOW, | ||
101 | GPIO85_nPCE_1, | ||
102 | GPIO54_nPCE_2, | ||
103 | GPIO79_PSKTSEL, | ||
104 | GPIO55_nPREG, | ||
105 | GPIO56_nPWAIT, | ||
106 | GPIO57_nIOIS16, | ||
107 | }; | ||
108 | |||
109 | /****************************************************************************** | ||
110 | * Compatibility: Parameter parsing | ||
111 | ******************************************************************************/ | ||
54 | static unsigned long balloon3_irq_enabled; | 112 | static unsigned long balloon3_irq_enabled; |
55 | 113 | ||
56 | static unsigned long balloon3_features_present = | 114 | static unsigned long balloon3_features_present = |
@@ -73,6 +131,321 @@ int __init parse_balloon3_features(char *arg) | |||
73 | } | 131 | } |
74 | early_param("balloon3_features", parse_balloon3_features); | 132 | early_param("balloon3_features", parse_balloon3_features); |
75 | 133 | ||
134 | /****************************************************************************** | ||
135 | * NOR Flash | ||
136 | ******************************************************************************/ | ||
137 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) | ||
138 | static struct mtd_partition balloon3_nor_partitions[] = { | ||
139 | { | ||
140 | .name = "Flash", | ||
141 | .offset = 0x00000000, | ||
142 | .size = MTDPART_SIZ_FULL, | ||
143 | } | ||
144 | }; | ||
145 | |||
146 | static struct physmap_flash_data balloon3_flash_data[] = { | ||
147 | { | ||
148 | .width = 2, /* bankwidth in bytes */ | ||
149 | .parts = balloon3_nor_partitions, | ||
150 | .nr_parts = ARRAY_SIZE(balloon3_nor_partitions) | ||
151 | } | ||
152 | }; | ||
153 | |||
154 | static struct resource balloon3_flash_resource = { | ||
155 | .start = PXA_CS0_PHYS, | ||
156 | .end = PXA_CS0_PHYS + SZ_64M - 1, | ||
157 | .flags = IORESOURCE_MEM, | ||
158 | }; | ||
159 | |||
160 | static struct platform_device balloon3_flash = { | ||
161 | .name = "physmap-flash", | ||
162 | .id = 0, | ||
163 | .resource = &balloon3_flash_resource, | ||
164 | .num_resources = 1, | ||
165 | .dev = { | ||
166 | .platform_data = balloon3_flash_data, | ||
167 | }, | ||
168 | }; | ||
169 | static void __init balloon3_nor_init(void) | ||
170 | { | ||
171 | platform_device_register(&balloon3_flash); | ||
172 | } | ||
173 | #else | ||
174 | static inline void balloon3_nor_init(void) {} | ||
175 | #endif | ||
176 | |||
177 | /****************************************************************************** | ||
178 | * Audio and Touchscreen | ||
179 | ******************************************************************************/ | ||
180 | #if defined(CONFIG_TOUCHSCREEN_UCB1400) || \ | ||
181 | defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) | ||
182 | static struct ucb1400_pdata vpac270_ucb1400_pdata = { | ||
183 | .irq = IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ), | ||
184 | }; | ||
185 | |||
186 | |||
187 | static struct platform_device balloon3_ucb1400_device = { | ||
188 | .name = "ucb1400_core", | ||
189 | .id = -1, | ||
190 | .dev = { | ||
191 | .platform_data = &vpac270_ucb1400_pdata, | ||
192 | }, | ||
193 | }; | ||
194 | |||
195 | static void __init balloon3_ts_init(void) | ||
196 | { | ||
197 | if (!balloon3_has(BALLOON3_FEATURE_AUDIO)) | ||
198 | return; | ||
199 | |||
200 | pxa_set_ac97_info(NULL); | ||
201 | platform_device_register(&balloon3_ucb1400_device); | ||
202 | } | ||
203 | #else | ||
204 | static inline void balloon3_ts_init(void) {} | ||
205 | #endif | ||
206 | |||
207 | /****************************************************************************** | ||
208 | * Framebuffer | ||
209 | ******************************************************************************/ | ||
210 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) | ||
211 | static struct pxafb_mode_info balloon3_lcd_modes[] = { | ||
212 | { | ||
213 | .pixclock = 38000, | ||
214 | .xres = 480, | ||
215 | .yres = 640, | ||
216 | .bpp = 16, | ||
217 | .hsync_len = 8, | ||
218 | .left_margin = 8, | ||
219 | .right_margin = 8, | ||
220 | .vsync_len = 2, | ||
221 | .upper_margin = 4, | ||
222 | .lower_margin = 5, | ||
223 | .sync = 0, | ||
224 | }, | ||
225 | }; | ||
226 | |||
227 | static struct pxafb_mach_info balloon3_lcd_screen = { | ||
228 | .modes = balloon3_lcd_modes, | ||
229 | .num_modes = ARRAY_SIZE(balloon3_lcd_modes), | ||
230 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | ||
231 | }; | ||
232 | |||
233 | static void balloon3_backlight_power(int on) | ||
234 | { | ||
235 | gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, on); | ||
236 | } | ||
237 | |||
238 | static void __init balloon3_lcd_init(void) | ||
239 | { | ||
240 | int ret; | ||
241 | |||
242 | if (!balloon3_has(BALLOON3_FEATURE_TOPPOLY)) | ||
243 | return; | ||
244 | |||
245 | ret = gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT, "BKL-ON"); | ||
246 | if (ret) { | ||
247 | pr_err("Requesting BKL-ON GPIO failed!\n"); | ||
248 | goto err; | ||
249 | } | ||
250 | |||
251 | ret = gpio_direction_output(BALLOON3_GPIO_RUN_BACKLIGHT, 1); | ||
252 | if (ret) { | ||
253 | pr_err("Setting BKL-ON GPIO direction failed!\n"); | ||
254 | goto err2; | ||
255 | } | ||
256 | |||
257 | balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power; | ||
258 | set_pxa_fb_info(&balloon3_lcd_screen); | ||
259 | return; | ||
260 | |||
261 | err2: | ||
262 | gpio_free(BALLOON3_GPIO_RUN_BACKLIGHT); | ||
263 | err: | ||
264 | return; | ||
265 | } | ||
266 | #else | ||
267 | static inline void balloon3_lcd_init(void) {} | ||
268 | #endif | ||
269 | |||
270 | /****************************************************************************** | ||
271 | * SD/MMC card controller | ||
272 | ******************************************************************************/ | ||
273 | #if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) | ||
274 | static struct pxamci_platform_data balloon3_mci_platform_data = { | ||
275 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
276 | .gpio_card_detect = -1, | ||
277 | .gpio_card_ro = -1, | ||
278 | .gpio_power = -1, | ||
279 | .detect_delay_ms = 200, | ||
280 | }; | ||
281 | |||
282 | static void __init balloon3_mmc_init(void) | ||
283 | { | ||
284 | pxa_set_mci_info(&balloon3_mci_platform_data); | ||
285 | } | ||
286 | #else | ||
287 | static inline void balloon3_mmc_init(void) {} | ||
288 | #endif | ||
289 | |||
290 | /****************************************************************************** | ||
291 | * USB Gadget | ||
292 | ******************************************************************************/ | ||
293 | #if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE) | ||
294 | static void balloon3_udc_command(int cmd) | ||
295 | { | ||
296 | if (cmd == PXA2XX_UDC_CMD_CONNECT) | ||
297 | UP2OCR |= UP2OCR_DPPUE | UP2OCR_DPPUBE; | ||
298 | else if (cmd == PXA2XX_UDC_CMD_DISCONNECT) | ||
299 | UP2OCR &= ~UP2OCR_DPPUE; | ||
300 | } | ||
301 | |||
302 | static int balloon3_udc_is_connected(void) | ||
303 | { | ||
304 | return 1; | ||
305 | } | ||
306 | |||
307 | static struct pxa2xx_udc_mach_info balloon3_udc_info __initdata = { | ||
308 | .udc_command = balloon3_udc_command, | ||
309 | .udc_is_connected = balloon3_udc_is_connected, | ||
310 | .gpio_pullup = -1, | ||
311 | }; | ||
312 | |||
313 | static void __init balloon3_udc_init(void) | ||
314 | { | ||
315 | pxa_set_udc_info(&balloon3_udc_info); | ||
316 | platform_device_register(&balloon3_gpio_vbus); | ||
317 | } | ||
318 | #else | ||
319 | static inline void balloon3_udc_init(void) {} | ||
320 | #endif | ||
321 | |||
322 | /****************************************************************************** | ||
323 | * IrDA | ||
324 | ******************************************************************************/ | ||
325 | #if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE) | ||
326 | static struct pxaficp_platform_data balloon3_ficp_platform_data = { | ||
327 | .transceiver_cap = IR_FIRMODE | IR_SIRMODE | IR_OFF, | ||
328 | }; | ||
329 | |||
330 | static void __init balloon3_irda_init(void) | ||
331 | { | ||
332 | pxa_set_ficp_info(&balloon3_ficp_platform_data); | ||
333 | } | ||
334 | #else | ||
335 | static inline void balloon3_irda_init(void) {} | ||
336 | #endif | ||
337 | |||
338 | /****************************************************************************** | ||
339 | * USB Host | ||
340 | ******************************************************************************/ | ||
341 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
342 | static struct pxaohci_platform_data balloon3_ohci_info = { | ||
343 | .port_mode = PMM_PERPORT_MODE, | ||
344 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, | ||
345 | }; | ||
346 | |||
347 | static void __init balloon3_uhc_init(void) | ||
348 | { | ||
349 | if (!balloon3_has(BALLOON3_FEATURE_OHCI)) | ||
350 | return; | ||
351 | pxa_set_ohci_info(&balloon3_ohci_info); | ||
352 | } | ||
353 | #else | ||
354 | static inline void balloon3_uhc_init(void) {} | ||
355 | #endif | ||
356 | |||
357 | /****************************************************************************** | ||
358 | * LEDs | ||
359 | ******************************************************************************/ | ||
360 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | ||
361 | struct gpio_led balloon3_gpio_leds[] = { | ||
362 | { | ||
363 | .name = "balloon3:green:idle", | ||
364 | .default_trigger = "heartbeat", | ||
365 | .gpio = BALLOON3_GPIO_LED_IDLE, | ||
366 | .active_low = 1, | ||
367 | }, { | ||
368 | .name = "balloon3:green:nand", | ||
369 | .default_trigger = "nand-disk", | ||
370 | .gpio = BALLOON3_GPIO_LED_NAND, | ||
371 | .active_low = 1, | ||
372 | }, | ||
373 | }; | ||
374 | |||
375 | static struct gpio_led_platform_data balloon3_gpio_led_info = { | ||
376 | .leds = balloon3_gpio_leds, | ||
377 | .num_leds = ARRAY_SIZE(balloon3_gpio_leds), | ||
378 | }; | ||
379 | |||
380 | static struct platform_device balloon3_leds = { | ||
381 | .name = "leds-gpio", | ||
382 | .id = 0, | ||
383 | .dev = { | ||
384 | .platform_data = &balloon3_gpio_led_info, | ||
385 | } | ||
386 | }; | ||
387 | |||
388 | struct gpio_led balloon3_pcf_gpio_leds[] = { | ||
389 | { | ||
390 | .name = "balloon3:green:led0", | ||
391 | .gpio = BALLOON3_PCF_GPIO_LED0, | ||
392 | .active_low = 1, | ||
393 | }, { | ||
394 | .name = "balloon3:green:led1", | ||
395 | .gpio = BALLOON3_PCF_GPIO_LED1, | ||
396 | .active_low = 1, | ||
397 | }, { | ||
398 | .name = "balloon3:orange:led2", | ||
399 | .gpio = BALLOON3_PCF_GPIO_LED2, | ||
400 | .active_low = 1, | ||
401 | }, { | ||
402 | .name = "balloon3:orange:led3", | ||
403 | .gpio = BALLOON3_PCF_GPIO_LED3, | ||
404 | .active_low = 1, | ||
405 | }, { | ||
406 | .name = "balloon3:orange:led4", | ||
407 | .gpio = BALLOON3_PCF_GPIO_LED4, | ||
408 | .active_low = 1, | ||
409 | }, { | ||
410 | .name = "balloon3:orange:led5", | ||
411 | .gpio = BALLOON3_PCF_GPIO_LED5, | ||
412 | .active_low = 1, | ||
413 | }, { | ||
414 | .name = "balloon3:red:led6", | ||
415 | .gpio = BALLOON3_PCF_GPIO_LED6, | ||
416 | .active_low = 1, | ||
417 | }, { | ||
418 | .name = "balloon3:red:led7", | ||
419 | .gpio = BALLOON3_PCF_GPIO_LED7, | ||
420 | .active_low = 1, | ||
421 | }, | ||
422 | }; | ||
423 | |||
424 | static struct gpio_led_platform_data balloon3_pcf_gpio_led_info = { | ||
425 | .leds = balloon3_pcf_gpio_leds, | ||
426 | .num_leds = ARRAY_SIZE(balloon3_pcf_gpio_leds), | ||
427 | }; | ||
428 | |||
429 | static struct platform_device balloon3_pcf_leds = { | ||
430 | .name = "leds-gpio", | ||
431 | .id = 1, | ||
432 | .dev = { | ||
433 | .platform_data = &balloon3_pcf_gpio_led_info, | ||
434 | } | ||
435 | }; | ||
436 | |||
437 | static void __init balloon3_leds_init(void) | ||
438 | { | ||
439 | platform_device_register(&balloon3_leds); | ||
440 | platform_device_register(&balloon3_pcf_leds); | ||
441 | } | ||
442 | #else | ||
443 | static inline void balloon3_leds_init(void) {} | ||
444 | #endif | ||
445 | |||
446 | /****************************************************************************** | ||
447 | * FPGA IRQ | ||
448 | ******************************************************************************/ | ||
76 | static void balloon3_mask_irq(unsigned int irq) | 449 | static void balloon3_mask_irq(unsigned int irq) |
77 | { | 450 | { |
78 | int balloon3_irq = (irq - BALLOON3_IRQ(0)); | 451 | int balloon3_irq = (irq - BALLOON3_IRQ(0)); |
@@ -98,7 +471,6 @@ static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
98 | { | 471 | { |
99 | unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) & | 472 | unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) & |
100 | balloon3_irq_enabled; | 473 | balloon3_irq_enabled; |
101 | |||
102 | do { | 474 | do { |
103 | /* clear useless edge notification */ | 475 | /* clear useless edge notification */ |
104 | if (desc->chip->ack) | 476 | if (desc->chip->ack) |
@@ -132,201 +504,259 @@ static void __init balloon3_init_irq(void) | |||
132 | "enabled\n", __func__, BALLOON3_AUX_NIRQ); | 504 | "enabled\n", __func__, BALLOON3_AUX_NIRQ); |
133 | } | 505 | } |
134 | 506 | ||
135 | static unsigned long balloon3_ac97_pin_config[] = { | 507 | /****************************************************************************** |
136 | GPIO28_AC97_BITCLK, | 508 | * GPIO expander |
137 | GPIO29_AC97_SDATA_IN_0, | 509 | ******************************************************************************/ |
138 | GPIO30_AC97_SDATA_OUT, | 510 | #if defined(CONFIG_GPIO_PCF857X) || defined(CONFIG_GPIO_PCF857X_MODULE) |
139 | GPIO31_AC97_SYNC, | 511 | static struct pcf857x_platform_data balloon3_pcf857x_pdata = { |
140 | GPIO113_AC97_nRESET, | 512 | .gpio_base = BALLOON3_PCF_GPIO_BASE, |
141 | }; | 513 | .n_latch = 0, |
142 | 514 | .setup = NULL, | |
143 | static void balloon3_backlight_power(int on) | 515 | .teardown = NULL, |
144 | { | 516 | .context = NULL, |
145 | pr_debug("%s: power is %s\n", __func__, on ? "on" : "off"); | ||
146 | gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, on); | ||
147 | } | ||
148 | |||
149 | static unsigned long balloon3_lcd_pin_config[] = { | ||
150 | /* LCD - 16bpp Active TFT */ | ||
151 | GPIOxx_LCD_TFT_16BPP, | ||
152 | |||
153 | GPIO99_GPIO, /* Backlight */ | ||
154 | }; | 517 | }; |
155 | 518 | ||
156 | static struct pxafb_mode_info balloon3_lcd_modes[] = { | 519 | static struct i2c_board_info __initdata balloon3_i2c_devs[] = { |
157 | { | 520 | { |
158 | .pixclock = 38000, | 521 | I2C_BOARD_INFO("pcf8574a", 0x38), |
159 | .xres = 480, | 522 | .platform_data = &balloon3_pcf857x_pdata, |
160 | .yres = 640, | ||
161 | .bpp = 16, | ||
162 | .hsync_len = 8, | ||
163 | .left_margin = 8, | ||
164 | .right_margin = 8, | ||
165 | .vsync_len = 2, | ||
166 | .upper_margin = 4, | ||
167 | .lower_margin = 5, | ||
168 | .sync = 0, | ||
169 | }, | 523 | }, |
170 | }; | 524 | }; |
171 | 525 | ||
172 | static struct pxafb_mach_info balloon3_pxafb_info = { | 526 | static void __init balloon3_i2c_init(void) |
173 | .modes = balloon3_lcd_modes, | 527 | { |
174 | .num_modes = ARRAY_SIZE(balloon3_lcd_modes), | 528 | pxa_set_i2c_info(NULL); |
175 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | 529 | i2c_register_board_info(0, ARRAY_AND_SIZE(balloon3_i2c_devs)); |
176 | .pxafb_backlight_power = balloon3_backlight_power, | 530 | } |
177 | }; | 531 | #else |
532 | static inline void balloon3_i2c_init(void) {} | ||
533 | #endif | ||
534 | |||
535 | /****************************************************************************** | ||
536 | * NAND | ||
537 | ******************************************************************************/ | ||
538 | #if defined(CONFIG_MTD_NAND_PLATFORM)||defined(CONFIG_MTD_NAND_PLATFORM_MODULE) | ||
539 | static uint16_t balloon3_ctl = | ||
540 | BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | | ||
541 | BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 | | ||
542 | BALLOON3_NAND_CONTROL_FLWP; | ||
543 | |||
544 | static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) | ||
545 | { | ||
546 | struct nand_chip *this = mtd->priv; | ||
178 | 547 | ||
179 | static unsigned long balloon3_mmc_pin_config[] = { | 548 | if (ctrl & NAND_CTRL_CHANGE) { |
180 | GPIO32_MMC_CLK, | 549 | if (ctrl & NAND_CLE) |
181 | GPIO92_MMC_DAT_0, | 550 | balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCLE; |
182 | GPIO109_MMC_DAT_1, | 551 | else |
183 | GPIO110_MMC_DAT_2, | 552 | balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLCLE; |
184 | GPIO111_MMC_DAT_3, | ||
185 | GPIO112_MMC_CMD, | ||
186 | }; | ||
187 | 553 | ||
188 | static void balloon3_mci_setpower(struct device *dev, unsigned int vdd) | 554 | if (ctrl & NAND_ALE) |
189 | { | 555 | balloon3_ctl |= BALLOON3_NAND_CONTROL_FLALE; |
190 | struct pxamci_platform_data *p_d = dev->platform_data; | 556 | else |
191 | 557 | balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLALE; | |
192 | if ((1 << vdd) & p_d->ocr_mask) { | 558 | |
193 | pr_debug("%s: on\n", __func__); | 559 | __raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG); |
194 | /* FIXME something to prod here? */ | ||
195 | } else { | ||
196 | pr_debug("%s: off\n", __func__); | ||
197 | /* FIXME something to prod here? */ | ||
198 | } | 560 | } |
561 | |||
562 | if (cmd != NAND_CMD_NONE) | ||
563 | writeb(cmd, this->IO_ADDR_W); | ||
199 | } | 564 | } |
200 | 565 | ||
201 | static struct pxamci_platform_data balloon3_mci_platform_data = { | 566 | static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip) |
202 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | 567 | { |
203 | .setpower = balloon3_mci_setpower, | 568 | if (chip < 0 || chip > 3) |
204 | }; | 569 | return; |
205 | 570 | ||
206 | static int balloon3_udc_is_connected(void) | 571 | balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCE0 | |
572 | BALLOON3_NAND_CONTROL_FLCE1 | | ||
573 | BALLOON3_NAND_CONTROL_FLCE2 | | ||
574 | BALLOON3_NAND_CONTROL_FLCE3; | ||
575 | |||
576 | /* Deassert correct nCE line */ | ||
577 | balloon3_ctl &= ~(BALLOON3_NAND_CONTROL_FLCE0 << chip); | ||
578 | |||
579 | __raw_writew(balloon3_ctl, BALLOON3_NAND_CONTROL_REG); | ||
580 | } | ||
581 | |||
582 | static int balloon3_nand_probe(struct platform_device *pdev) | ||
207 | { | 583 | { |
208 | pr_debug("%s: udc connected\n", __func__); | 584 | void __iomem *temp_map; |
209 | return 1; | 585 | uint16_t ver; |
586 | int ret; | ||
587 | |||
588 | __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, BALLOON3_NAND_CONTROL2_REG); | ||
589 | |||
590 | ver = __raw_readw(BALLOON3_FPGA_VER); | ||
591 | if (ver > 0x0201) | ||
592 | pr_warn("The FPGA code, version 0x%04x, is newer than rel-0.3. " | ||
593 | "NAND support might be broken in this version!", ver); | ||
594 | |||
595 | /* Power up the NAND chips */ | ||
596 | ret = gpio_request(BALLOON3_GPIO_RUN_NAND, "NAND"); | ||
597 | if (ret) | ||
598 | goto err1; | ||
599 | |||
600 | ret = gpio_direction_output(BALLOON3_GPIO_RUN_NAND, 1); | ||
601 | if (ret) | ||
602 | goto err2; | ||
603 | |||
604 | gpio_set_value(BALLOON3_GPIO_RUN_NAND, 1); | ||
605 | |||
606 | /* Deassert all nCE lines and write protect line */ | ||
607 | __raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG); | ||
608 | return 0; | ||
609 | |||
610 | err2: | ||
611 | gpio_free(BALLOON3_GPIO_RUN_NAND); | ||
612 | err1: | ||
613 | return ret; | ||
210 | } | 614 | } |
211 | 615 | ||
212 | static void balloon3_udc_command(int cmd) | 616 | static void balloon3_nand_remove(struct platform_device *pdev) |
213 | { | 617 | { |
214 | switch (cmd) { | 618 | /* Power down the NAND chips */ |
215 | case PXA2XX_UDC_CMD_CONNECT: | 619 | gpio_set_value(BALLOON3_GPIO_RUN_NAND, 0); |
216 | UP2OCR |= (UP2OCR_DPPUE + UP2OCR_DPPUBE); | 620 | gpio_free(BALLOON3_GPIO_RUN_NAND); |
217 | pr_debug("%s: connect\n", __func__); | ||
218 | break; | ||
219 | case PXA2XX_UDC_CMD_DISCONNECT: | ||
220 | UP2OCR &= ~UP2OCR_DPPUE; | ||
221 | pr_debug("%s: disconnect\n", __func__); | ||
222 | break; | ||
223 | } | ||
224 | } | 621 | } |
225 | 622 | ||
226 | static struct pxa2xx_udc_mach_info balloon3_udc_info = { | 623 | static struct mtd_partition balloon3_partition_info[] = { |
227 | .udc_is_connected = balloon3_udc_is_connected, | 624 | [0] = { |
228 | .udc_command = balloon3_udc_command, | 625 | .name = "Boot", |
626 | .offset = 0, | ||
627 | .size = SZ_4M, | ||
628 | }, | ||
629 | [1] = { | ||
630 | .name = "RootFS", | ||
631 | .offset = MTDPART_OFS_APPEND, | ||
632 | .size = MTDPART_SIZ_FULL | ||
633 | }, | ||
229 | }; | 634 | }; |
230 | 635 | ||
231 | static struct pxaficp_platform_data balloon3_ficp_platform_data = { | 636 | static const char *balloon3_part_probes[] = { "cmdlinepart", NULL }; |
232 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, | ||
233 | }; | ||
234 | 637 | ||
235 | static unsigned long balloon3_ohci_pin_config[] = { | 638 | struct platform_nand_data balloon3_nand_pdata = { |
236 | GPIO88_USBH1_PWR, | 639 | .chip = { |
237 | GPIO89_USBH1_PEN, | 640 | .nr_chips = 4, |
641 | .chip_offset = 0, | ||
642 | .nr_partitions = ARRAY_SIZE(balloon3_partition_info), | ||
643 | .partitions = balloon3_partition_info, | ||
644 | .chip_delay = 50, | ||
645 | .part_probe_types = balloon3_part_probes, | ||
646 | }, | ||
647 | .ctrl = { | ||
648 | .hwcontrol = 0, | ||
649 | .dev_ready = 0, | ||
650 | .select_chip = balloon3_nand_select_chip, | ||
651 | .cmd_ctrl = balloon3_nand_cmd_ctl, | ||
652 | .probe = balloon3_nand_probe, | ||
653 | .remove = balloon3_nand_remove, | ||
654 | }, | ||
238 | }; | 655 | }; |
239 | 656 | ||
240 | static struct pxaohci_platform_data balloon3_ohci_platform_data = { | 657 | static struct resource balloon3_nand_resource[] = { |
241 | .port_mode = PMM_PERPORT_MODE, | 658 | [0] = { |
242 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, | 659 | .start = BALLOON3_NAND_BASE, |
660 | .end = BALLOON3_NAND_BASE + 0x4, | ||
661 | .flags = IORESOURCE_MEM, | ||
662 | }, | ||
243 | }; | 663 | }; |
244 | 664 | ||
245 | static unsigned long balloon3_pin_config[] __initdata = { | 665 | static struct platform_device balloon3_nand = { |
246 | /* Select BTUART 'COM1/ttyS0' as IO option for pins 42/43/44/45 */ | 666 | .name = "gen_nand", |
247 | GPIO42_BTUART_RXD, | 667 | .num_resources = ARRAY_SIZE(balloon3_nand_resource), |
248 | GPIO43_BTUART_TXD, | 668 | .resource = balloon3_nand_resource, |
249 | GPIO44_BTUART_CTS, | 669 | .id = -1, |
250 | GPIO45_BTUART_RTS, | 670 | .dev = { |
251 | 671 | .platform_data = &balloon3_nand_pdata, | |
252 | /* Wakeup GPIO */ | 672 | } |
253 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, | ||
254 | |||
255 | /* NAND & IDLE LED GPIOs */ | ||
256 | GPIO9_GPIO, | ||
257 | GPIO10_GPIO, | ||
258 | }; | 673 | }; |
259 | 674 | ||
260 | static struct gpio_led balloon3_gpio_leds[] = { | 675 | static void __init balloon3_nand_init(void) |
676 | { | ||
677 | platform_device_register(&balloon3_nand); | ||
678 | } | ||
679 | #else | ||
680 | static inline void balloon3_nand_init(void) {} | ||
681 | #endif | ||
682 | |||
683 | /****************************************************************************** | ||
684 | * Core power regulator | ||
685 | ******************************************************************************/ | ||
686 | #if defined(CONFIG_REGULATOR_MAX1586) || \ | ||
687 | defined(CONFIG_REGULATOR_MAX1586_MODULE) | ||
688 | static struct regulator_consumer_supply balloon3_max1587a_consumers[] = { | ||
261 | { | 689 | { |
262 | .name = "balloon3:green:idle", | 690 | .supply = "vcc_core", |
263 | .default_trigger = "heartbeat", | 691 | } |
264 | .gpio = BALLOON3_GPIO_LED_IDLE, | 692 | }; |
265 | .active_low = 1, | 693 | |
694 | static struct regulator_init_data balloon3_max1587a_v3_info = { | ||
695 | .constraints = { | ||
696 | .name = "vcc_core range", | ||
697 | .min_uV = 900000, | ||
698 | .max_uV = 1705000, | ||
699 | .always_on = 1, | ||
700 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
266 | }, | 701 | }, |
702 | .consumer_supplies = balloon3_max1587a_consumers, | ||
703 | .num_consumer_supplies = ARRAY_SIZE(balloon3_max1587a_consumers), | ||
704 | }; | ||
705 | |||
706 | static struct max1586_subdev_data balloon3_max1587a_subdevs[] = { | ||
267 | { | 707 | { |
268 | .name = "balloon3:green:nand", | 708 | .name = "vcc_core", |
269 | .default_trigger = "nand-disk", | 709 | .id = MAX1586_V3, |
270 | .gpio = BALLOON3_GPIO_LED_NAND, | 710 | .platform_data = &balloon3_max1587a_v3_info, |
271 | .active_low = 1, | 711 | } |
272 | }, | ||
273 | }; | 712 | }; |
274 | 713 | ||
275 | static struct gpio_led_platform_data balloon3_gpio_leds_platform_data = { | 714 | static struct max1586_platform_data balloon3_max1587a_info = { |
276 | .leds = balloon3_gpio_leds, | 715 | .subdevs = balloon3_max1587a_subdevs, |
277 | .num_leds = ARRAY_SIZE(balloon3_gpio_leds), | 716 | .num_subdevs = ARRAY_SIZE(balloon3_max1587a_subdevs), |
717 | .v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */ | ||
278 | }; | 718 | }; |
279 | 719 | ||
280 | static struct platform_device balloon3led_device = { | 720 | static struct i2c_board_info __initdata balloon3_pi2c_board_info[] = { |
281 | .name = "leds-gpio", | 721 | { |
282 | .id = -1, | 722 | I2C_BOARD_INFO("max1586", 0x14), |
283 | .dev = { | 723 | .platform_data = &balloon3_max1587a_info, |
284 | .platform_data = &balloon3_gpio_leds_platform_data, | ||
285 | }, | 724 | }, |
286 | }; | 725 | }; |
287 | 726 | ||
288 | static void __init balloon3_init(void) | 727 | static void __init balloon3_pmic_init(void) |
289 | { | 728 | { |
290 | pr_info("Initialising Balloon3\n"); | 729 | pxa27x_set_i2c_power_info(NULL); |
730 | i2c_register_board_info(1, ARRAY_AND_SIZE(balloon3_pi2c_board_info)); | ||
731 | } | ||
732 | #else | ||
733 | static inline void balloon3_pmic_init(void) {} | ||
734 | #endif | ||
291 | 735 | ||
292 | /* system bus arbiter setting | 736 | /****************************************************************************** |
293 | * - Core_Park | 737 | * Machine init |
294 | * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 | 738 | ******************************************************************************/ |
295 | */ | 739 | static void __init balloon3_init(void) |
740 | { | ||
296 | ARB_CNTRL = ARB_CORE_PARK | 0x234; | 741 | ARB_CNTRL = ARB_CORE_PARK | 0x234; |
297 | 742 | ||
743 | pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config)); | ||
744 | |||
298 | pxa_set_ffuart_info(NULL); | 745 | pxa_set_ffuart_info(NULL); |
299 | pxa_set_btuart_info(NULL); | 746 | pxa_set_btuart_info(NULL); |
300 | pxa_set_stuart_info(NULL); | 747 | pxa_set_stuart_info(NULL); |
301 | 748 | ||
302 | pxa_set_i2c_info(NULL); | 749 | balloon3_i2c_init(); |
303 | if (balloon3_has(BALLOON3_FEATURE_AUDIO)) { | 750 | balloon3_irda_init(); |
304 | pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ac97_pin_config)); | 751 | balloon3_lcd_init(); |
305 | pxa_set_ac97_info(NULL); | 752 | balloon3_leds_init(); |
306 | } | 753 | balloon3_mmc_init(); |
307 | 754 | balloon3_nand_init(); | |
308 | if (balloon3_has(BALLOON3_FEATURE_TOPPOLY)) { | 755 | balloon3_nor_init(); |
309 | pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config)); | 756 | balloon3_pmic_init(); |
310 | gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT, | 757 | balloon3_ts_init(); |
311 | "LCD Backlight Power"); | 758 | balloon3_udc_init(); |
312 | gpio_direction_output(BALLOON3_GPIO_RUN_BACKLIGHT, 1); | 759 | balloon3_uhc_init(); |
313 | set_pxa_fb_info(&balloon3_pxafb_info); | ||
314 | } | ||
315 | |||
316 | if (balloon3_has(BALLOON3_FEATURE_MMC)) { | ||
317 | pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_mmc_pin_config)); | ||
318 | pxa_set_mci_info(&balloon3_mci_platform_data); | ||
319 | } | ||
320 | pxa_set_ficp_info(&balloon3_ficp_platform_data); | ||
321 | if (balloon3_has(BALLOON3_FEATURE_OHCI)) { | ||
322 | pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ohci_pin_config)); | ||
323 | pxa_set_ohci_info(&balloon3_ohci_platform_data); | ||
324 | } | ||
325 | pxa_set_udc_info(&balloon3_udc_info); | ||
326 | |||
327 | pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config)); | ||
328 | |||
329 | platform_device_register(&balloon3led_device); | ||
330 | } | 760 | } |
331 | 761 | ||
332 | static struct map_desc balloon3_io_desc[] __initdata = { | 762 | static struct map_desc balloon3_io_desc[] __initdata = { |
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index fdda6be6c391..c70e6c2f4e7c 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c | |||
@@ -689,6 +689,7 @@ static void __init cm_x300_init_da9030(void) | |||
689 | { | 689 | { |
690 | pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info); | 690 | pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info); |
691 | i2c_register_board_info(1, &cm_x300_pmic_info, 1); | 691 | i2c_register_board_info(1, &cm_x300_pmic_info, 1); |
692 | set_irq_wake(IRQ_WAKEUP0, 1); | ||
692 | } | 693 | } |
693 | 694 | ||
694 | static void __init cm_x300_init_wi2wi(void) | 695 | static void __init cm_x300_init_wi2wi(void) |
@@ -745,9 +746,10 @@ static void __init cm_x300_init(void) | |||
745 | { | 746 | { |
746 | cm_x300_init_mfp(); | 747 | cm_x300_init_mfp(); |
747 | 748 | ||
748 | pxa_set_ffuart_info(NULL); | ||
749 | pxa_set_btuart_info(NULL); | 749 | pxa_set_btuart_info(NULL); |
750 | pxa_set_stuart_info(NULL); | 750 | pxa_set_stuart_info(NULL); |
751 | if (cpu_is_pxa300()) | ||
752 | pxa_set_ffuart_info(NULL); | ||
751 | 753 | ||
752 | cm_x300_init_da9030(); | 754 | cm_x300_init_da9030(); |
753 | cm_x300_init_dm9000(); | 755 | cm_x300_init_dm9000(); |
diff --git a/arch/arm/mach-pxa/colibri-pxa270-evalboard.c b/arch/arm/mach-pxa/colibri-pxa270-evalboard.c new file mode 100644 index 000000000000..0f3b632c3b14 --- /dev/null +++ b/arch/arm/mach-pxa/colibri-pxa270-evalboard.c | |||
@@ -0,0 +1,111 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-pxa/colibri-pxa270-evalboard.c | ||
3 | * | ||
4 | * Support for Toradex PXA270 based Colibri Evaluation Carrier Board | ||
5 | * Daniel Mack <daniel@caiaq.de> | ||
6 | * Marek Vasut <marek.vasut@gmail.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/sysdev.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/gpio.h> | ||
19 | #include <asm/mach-types.h> | ||
20 | #include <mach/hardware.h> | ||
21 | #include <asm/mach/arch.h> | ||
22 | |||
23 | #include <mach/pxa27x.h> | ||
24 | #include <mach/colibri.h> | ||
25 | #include <mach/mmc.h> | ||
26 | #include <mach/ohci.h> | ||
27 | #include <mach/pxa27x-udc.h> | ||
28 | |||
29 | #include "generic.h" | ||
30 | #include "devices.h" | ||
31 | |||
32 | /****************************************************************************** | ||
33 | * Pin configuration | ||
34 | ******************************************************************************/ | ||
35 | static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = { | ||
36 | /* MMC */ | ||
37 | GPIO32_MMC_CLK, | ||
38 | GPIO92_MMC_DAT_0, | ||
39 | GPIO109_MMC_DAT_1, | ||
40 | GPIO110_MMC_DAT_2, | ||
41 | GPIO111_MMC_DAT_3, | ||
42 | GPIO112_MMC_CMD, | ||
43 | GPIO0_GPIO, /* SD detect */ | ||
44 | |||
45 | /* FFUART */ | ||
46 | GPIO39_FFUART_TXD, | ||
47 | GPIO34_FFUART_RXD, | ||
48 | |||
49 | /* UHC */ | ||
50 | GPIO88_USBH1_PWR, | ||
51 | GPIO89_USBH1_PEN, | ||
52 | GPIO119_USBH2_PWR, | ||
53 | GPIO120_USBH2_PEN, | ||
54 | }; | ||
55 | |||
56 | /****************************************************************************** | ||
57 | * SD/MMC card controller | ||
58 | ******************************************************************************/ | ||
59 | #if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) | ||
60 | static struct pxamci_platform_data colibri_pxa270_mci_platform_data = { | ||
61 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
62 | .gpio_power = -1, | ||
63 | .gpio_card_detect = GPIO0_COLIBRI_PXA270_SD_DETECT, | ||
64 | .gpio_card_ro = -1, | ||
65 | .detect_delay_ms = 200, | ||
66 | }; | ||
67 | |||
68 | static void __init colibri_pxa270_mmc_init(void) | ||
69 | { | ||
70 | pxa_set_mci_info(&colibri_pxa270_mci_platform_data); | ||
71 | } | ||
72 | #else | ||
73 | static inline void colibri_pxa270_mmc_init(void) {} | ||
74 | #endif | ||
75 | |||
76 | /****************************************************************************** | ||
77 | * USB Host | ||
78 | ******************************************************************************/ | ||
79 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
80 | static int colibri_pxa270_ohci_init(struct device *dev) | ||
81 | { | ||
82 | UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; | ||
83 | return 0; | ||
84 | } | ||
85 | |||
86 | static struct pxaohci_platform_data colibri_pxa270_ohci_info = { | ||
87 | .port_mode = PMM_PERPORT_MODE, | ||
88 | .flags = ENABLE_PORT1 | ENABLE_PORT2 | | ||
89 | POWER_CONTROL_LOW | POWER_SENSE_LOW, | ||
90 | .init = colibri_pxa270_ohci_init, | ||
91 | }; | ||
92 | |||
93 | static void __init colibri_pxa270_uhc_init(void) | ||
94 | { | ||
95 | pxa_set_ohci_info(&colibri_pxa270_ohci_info); | ||
96 | } | ||
97 | #else | ||
98 | static inline void colibri_pxa270_uhc_init(void) {} | ||
99 | #endif | ||
100 | |||
101 | void __init colibri_pxa270_evalboard_init(void) | ||
102 | { | ||
103 | pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_evalboard_pin_config)); | ||
104 | pxa_set_ffuart_info(NULL); | ||
105 | pxa_set_btuart_info(NULL); | ||
106 | pxa_set_stuart_info(NULL); | ||
107 | |||
108 | colibri_pxa270_mmc_init(); | ||
109 | colibri_pxa270_uhc_init(); | ||
110 | } | ||
111 | |||
diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c new file mode 100644 index 000000000000..37f0f3ed7c61 --- /dev/null +++ b/arch/arm/mach-pxa/colibri-pxa270-income.c | |||
@@ -0,0 +1,272 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-pxa/income.c | ||
3 | * | ||
4 | * Support for Income s.r.o. SH-Dmaster PXA270 SBC | ||
5 | * | ||
6 | * Copyright (C) 2010 | ||
7 | * Marek Vasut <marek.vasut@gmail.com> | ||
8 | * Pavel Revak <palo@bielyvlk.sk> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/bitops.h> | ||
16 | #include <linux/delay.h> | ||
17 | #include <linux/gpio.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/interrupt.h> | ||
20 | #include <linux/ioport.h> | ||
21 | #include <linux/kernel.h> | ||
22 | #include <linux/platform_device.h> | ||
23 | #include <linux/pwm_backlight.h> | ||
24 | #include <linux/sysdev.h> | ||
25 | |||
26 | #include <asm/irq.h> | ||
27 | #include <asm/mach-types.h> | ||
28 | |||
29 | #include <mach/hardware.h> | ||
30 | #include <mach/mmc.h> | ||
31 | #include <mach/ohci.h> | ||
32 | #include <mach/pxa27x.h> | ||
33 | #include <mach/pxa27x-udc.h> | ||
34 | #include <mach/pxafb.h> | ||
35 | |||
36 | #include <plat/i2c.h> | ||
37 | |||
38 | #include "devices.h" | ||
39 | #include "generic.h" | ||
40 | |||
41 | #define GPIO114_INCOME_ETH_IRQ (114) | ||
42 | #define GPIO0_INCOME_SD_DETECT (0) | ||
43 | #define GPIO0_INCOME_SD_RO (1) | ||
44 | #define GPIO54_INCOME_LED_A (54) | ||
45 | #define GPIO55_INCOME_LED_B (55) | ||
46 | #define GPIO113_INCOME_TS_IRQ (113) | ||
47 | |||
48 | /****************************************************************************** | ||
49 | * Pin configuration | ||
50 | ******************************************************************************/ | ||
51 | static mfp_cfg_t income_pin_config[] __initdata = { | ||
52 | /* MMC */ | ||
53 | GPIO32_MMC_CLK, | ||
54 | GPIO92_MMC_DAT_0, | ||
55 | GPIO109_MMC_DAT_1, | ||
56 | GPIO110_MMC_DAT_2, | ||
57 | GPIO111_MMC_DAT_3, | ||
58 | GPIO112_MMC_CMD, | ||
59 | GPIO0_GPIO, /* SD detect */ | ||
60 | GPIO1_GPIO, /* SD read-only */ | ||
61 | |||
62 | /* FFUART */ | ||
63 | GPIO39_FFUART_TXD, | ||
64 | GPIO34_FFUART_RXD, | ||
65 | |||
66 | /* BFUART */ | ||
67 | GPIO42_BTUART_RXD, | ||
68 | GPIO43_BTUART_TXD, | ||
69 | GPIO45_BTUART_RTS, | ||
70 | |||
71 | /* STUART */ | ||
72 | GPIO46_STUART_RXD, | ||
73 | GPIO47_STUART_TXD, | ||
74 | |||
75 | /* UHC */ | ||
76 | GPIO88_USBH1_PWR, | ||
77 | GPIO89_USBH1_PEN, | ||
78 | |||
79 | /* LCD */ | ||
80 | GPIOxx_LCD_TFT_16BPP, | ||
81 | |||
82 | /* PWM */ | ||
83 | GPIO16_PWM0_OUT, | ||
84 | |||
85 | /* I2C */ | ||
86 | GPIO117_I2C_SCL, | ||
87 | GPIO118_I2C_SDA, | ||
88 | |||
89 | /* LED */ | ||
90 | GPIO54_GPIO, /* LED A */ | ||
91 | GPIO55_GPIO, /* LED B */ | ||
92 | }; | ||
93 | |||
94 | /****************************************************************************** | ||
95 | * SD/MMC card controller | ||
96 | ******************************************************************************/ | ||
97 | #if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) | ||
98 | static struct pxamci_platform_data income_mci_platform_data = { | ||
99 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
100 | .gpio_power = -1, | ||
101 | .gpio_card_detect = GPIO0_INCOME_SD_DETECT, | ||
102 | .gpio_card_ro = GPIO0_INCOME_SD_RO, | ||
103 | .detect_delay_ms = 200, | ||
104 | }; | ||
105 | |||
106 | static void __init income_mmc_init(void) | ||
107 | { | ||
108 | pxa_set_mci_info(&income_mci_platform_data); | ||
109 | } | ||
110 | #else | ||
111 | static inline void income_mmc_init(void) {} | ||
112 | #endif | ||
113 | |||
114 | /****************************************************************************** | ||
115 | * USB Host | ||
116 | ******************************************************************************/ | ||
117 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
118 | static struct pxaohci_platform_data income_ohci_info = { | ||
119 | .port_mode = PMM_PERPORT_MODE, | ||
120 | .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW, | ||
121 | }; | ||
122 | |||
123 | static void __init income_uhc_init(void) | ||
124 | { | ||
125 | pxa_set_ohci_info(&income_ohci_info); | ||
126 | } | ||
127 | #else | ||
128 | static inline void income_uhc_init(void) {} | ||
129 | #endif | ||
130 | |||
131 | /****************************************************************************** | ||
132 | * LED | ||
133 | ******************************************************************************/ | ||
134 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | ||
135 | struct gpio_led income_gpio_leds[] = { | ||
136 | { | ||
137 | .name = "income:green:leda", | ||
138 | .default_trigger = "none", | ||
139 | .gpio = GPIO54_INCOME_LED_A, | ||
140 | .active_low = 1, | ||
141 | }, | ||
142 | { | ||
143 | .name = "income:green:ledb", | ||
144 | .default_trigger = "none", | ||
145 | .gpio = GPIO55_INCOME_LED_B, | ||
146 | .active_low = 1, | ||
147 | } | ||
148 | }; | ||
149 | |||
150 | static struct gpio_led_platform_data income_gpio_led_info = { | ||
151 | .leds = income_gpio_leds, | ||
152 | .num_leds = ARRAY_SIZE(income_gpio_leds), | ||
153 | }; | ||
154 | |||
155 | static struct platform_device income_leds = { | ||
156 | .name = "leds-gpio", | ||
157 | .id = -1, | ||
158 | .dev = { | ||
159 | .platform_data = &income_gpio_led_info, | ||
160 | } | ||
161 | }; | ||
162 | |||
163 | static void __init income_led_init(void) | ||
164 | { | ||
165 | platform_device_register(&income_leds); | ||
166 | } | ||
167 | #else | ||
168 | static inline void income_led_init(void) {} | ||
169 | #endif | ||
170 | |||
171 | /****************************************************************************** | ||
172 | * I2C | ||
173 | ******************************************************************************/ | ||
174 | #if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) | ||
175 | static struct i2c_board_info __initdata income_i2c_devs[] = { | ||
176 | { | ||
177 | I2C_BOARD_INFO("ds1340", 0x68), | ||
178 | }, { | ||
179 | I2C_BOARD_INFO("lm75", 0x4f), | ||
180 | }, | ||
181 | }; | ||
182 | |||
183 | static void __init income_i2c_init(void) | ||
184 | { | ||
185 | pxa_set_i2c_info(NULL); | ||
186 | pxa27x_set_i2c_power_info(NULL); | ||
187 | i2c_register_board_info(0, ARRAY_AND_SIZE(income_i2c_devs)); | ||
188 | } | ||
189 | #else | ||
190 | static inline void income_i2c_init(void) {} | ||
191 | #endif | ||
192 | |||
193 | /****************************************************************************** | ||
194 | * Framebuffer | ||
195 | ******************************************************************************/ | ||
196 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) | ||
197 | static struct pxafb_mode_info income_lcd_modes[] = { | ||
198 | { | ||
199 | .pixclock = 144700, | ||
200 | .xres = 320, | ||
201 | .yres = 240, | ||
202 | .bpp = 32, | ||
203 | .depth = 18, | ||
204 | |||
205 | .left_margin = 10, | ||
206 | .right_margin = 10, | ||
207 | .upper_margin = 7, | ||
208 | .lower_margin = 8, | ||
209 | |||
210 | .hsync_len = 20, | ||
211 | .vsync_len = 2, | ||
212 | |||
213 | .sync = FB_SYNC_VERT_HIGH_ACT, | ||
214 | }, | ||
215 | }; | ||
216 | |||
217 | static struct pxafb_mach_info income_lcd_screen = { | ||
218 | .modes = income_lcd_modes, | ||
219 | .num_modes = ARRAY_SIZE(income_lcd_modes), | ||
220 | .lcd_conn = LCD_COLOR_TFT_18BPP | LCD_PCLK_EDGE_FALL, | ||
221 | }; | ||
222 | |||
223 | static void __init income_lcd_init(void) | ||
224 | { | ||
225 | set_pxa_fb_info(&income_lcd_screen); | ||
226 | } | ||
227 | #else | ||
228 | static inline void income_lcd_init(void) {} | ||
229 | #endif | ||
230 | |||
231 | /****************************************************************************** | ||
232 | * Backlight | ||
233 | ******************************************************************************/ | ||
234 | #if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM__MODULE) | ||
235 | static struct platform_pwm_backlight_data income_backlight_data = { | ||
236 | .pwm_id = 0, | ||
237 | .max_brightness = 0x3ff, | ||
238 | .dft_brightness = 0x1ff, | ||
239 | .pwm_period_ns = 1000000, | ||
240 | }; | ||
241 | |||
242 | static struct platform_device income_backlight = { | ||
243 | .name = "pwm-backlight", | ||
244 | .dev = { | ||
245 | .parent = &pxa27x_device_pwm0.dev, | ||
246 | .platform_data = &income_backlight_data, | ||
247 | }, | ||
248 | }; | ||
249 | |||
250 | static void __init income_pwm_init(void) | ||
251 | { | ||
252 | platform_device_register(&income_backlight); | ||
253 | } | ||
254 | #else | ||
255 | static inline void income_pwm_init(void) {} | ||
256 | #endif | ||
257 | |||
258 | void __init colibri_pxa270_income_boardinit(void) | ||
259 | { | ||
260 | pxa2xx_mfp_config(ARRAY_AND_SIZE(income_pin_config)); | ||
261 | pxa_set_ffuart_info(NULL); | ||
262 | pxa_set_btuart_info(NULL); | ||
263 | pxa_set_stuart_info(NULL); | ||
264 | |||
265 | income_mmc_init(); | ||
266 | income_uhc_init(); | ||
267 | income_led_init(); | ||
268 | income_i2c_init(); | ||
269 | income_lcd_init(); | ||
270 | income_pwm_init(); | ||
271 | } | ||
272 | |||
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c index 061c45316de8..98673ac6efd0 100644 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ b/arch/arm/mach-pxa/colibri-pxa270.c | |||
@@ -3,6 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Support for Toradex PXA270 based Colibri module | 4 | * Support for Toradex PXA270 based Colibri module |
5 | * Daniel Mack <daniel@caiaq.de> | 5 | * Daniel Mack <daniel@caiaq.de> |
6 | * Marek Vasut <marek.vasut@gmail.com> | ||
6 | * | 7 | * |
7 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
@@ -10,49 +11,55 @@ | |||
10 | */ | 11 | */ |
11 | 12 | ||
12 | #include <linux/init.h> | 13 | #include <linux/init.h> |
13 | #include <linux/kernel.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/sysdev.h> | ||
16 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
17 | #include <linux/bitops.h> | 15 | #include <linux/kernel.h> |
18 | #include <linux/ioport.h> | ||
19 | #include <linux/delay.h> | ||
20 | #include <linux/mtd/mtd.h> | 16 | #include <linux/mtd/mtd.h> |
21 | #include <linux/mtd/partitions.h> | 17 | #include <linux/mtd/partitions.h> |
22 | #include <linux/mtd/physmap.h> | 18 | #include <linux/mtd/physmap.h> |
23 | #include <linux/gpio.h> | 19 | #include <linux/platform_device.h> |
24 | #include <asm/mach-types.h> | 20 | #include <linux/sysdev.h> |
25 | #include <mach/hardware.h> | 21 | #include <linux/ucb1400.h> |
26 | #include <asm/irq.h> | 22 | |
27 | #include <asm/sizes.h> | ||
28 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
29 | #include <asm/mach/map.h> | ||
30 | #include <asm/mach/irq.h> | ||
31 | #include <asm/mach/flash.h> | 24 | #include <asm/mach/flash.h> |
25 | #include <asm/mach-types.h> | ||
26 | #include <asm/sizes.h> | ||
32 | 27 | ||
33 | #include <mach/pxa27x.h> | 28 | #include <mach/audio.h> |
34 | #include <mach/colibri.h> | 29 | #include <mach/colibri.h> |
30 | #include <mach/pxa27x.h> | ||
35 | 31 | ||
36 | #include "generic.h" | ||
37 | #include "devices.h" | 32 | #include "devices.h" |
33 | #include "generic.h" | ||
38 | 34 | ||
39 | /* | 35 | /****************************************************************************** |
40 | * GPIO configuration | 36 | * Pin configuration |
41 | */ | 37 | ******************************************************************************/ |
42 | static mfp_cfg_t colibri_pxa270_pin_config[] __initdata = { | 38 | static mfp_cfg_t colibri_pxa270_pin_config[] __initdata = { |
39 | /* Ethernet */ | ||
43 | GPIO78_nCS_2, /* Ethernet CS */ | 40 | GPIO78_nCS_2, /* Ethernet CS */ |
44 | GPIO114_GPIO, /* Ethernet IRQ */ | 41 | GPIO114_GPIO, /* Ethernet IRQ */ |
42 | |||
43 | /* AC97 */ | ||
44 | GPIO28_AC97_BITCLK, | ||
45 | GPIO29_AC97_SDATA_IN_0, | ||
46 | GPIO30_AC97_SDATA_OUT, | ||
47 | GPIO31_AC97_SYNC, | ||
48 | GPIO95_AC97_nRESET, | ||
49 | GPIO98_AC97_SYSCLK, | ||
50 | GPIO113_GPIO, /* Touchscreen IRQ */ | ||
45 | }; | 51 | }; |
46 | 52 | ||
47 | /* | 53 | /****************************************************************************** |
48 | * NOR flash | 54 | * NOR Flash |
49 | */ | 55 | ******************************************************************************/ |
56 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) | ||
50 | static struct mtd_partition colibri_partitions[] = { | 57 | static struct mtd_partition colibri_partitions[] = { |
51 | { | 58 | { |
52 | .name = "Bootloader", | 59 | .name = "Bootloader", |
53 | .offset = 0x00000000, | 60 | .offset = 0x00000000, |
54 | .size = 0x00040000, | 61 | .size = 0x00040000, |
55 | .mask_flags = MTD_WRITEABLE /* force read-only */ | 62 | .mask_flags = MTD_WRITEABLE /* force read-only */ |
56 | }, { | 63 | }, { |
57 | .name = "Kernel", | 64 | .name = "Kernel", |
58 | .offset = 0x00040000, | 65 | .offset = 0x00040000, |
@@ -90,50 +97,113 @@ static struct platform_device colibri_pxa270_flash_device = { | |||
90 | .num_resources = 1, | 97 | .num_resources = 1, |
91 | }; | 98 | }; |
92 | 99 | ||
93 | /* | 100 | static void __init colibri_pxa270_nor_init(void) |
94 | * DM9000 Ethernet | 101 | { |
95 | */ | 102 | platform_device_register(&colibri_pxa270_flash_device); |
96 | #if defined(CONFIG_DM9000) | 103 | } |
97 | static struct resource dm9000_resources[] = { | 104 | #else |
98 | [0] = { | 105 | static inline void colibri_pxa270_nor_init(void) {} |
99 | .start = COLIBRI_PXA270_ETH_PHYS, | 106 | #endif |
100 | .end = COLIBRI_PXA270_ETH_PHYS + 3, | 107 | |
108 | /****************************************************************************** | ||
109 | * Ethernet | ||
110 | ******************************************************************************/ | ||
111 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | ||
112 | static struct resource colibri_pxa270_dm9000_resources[] = { | ||
113 | { | ||
114 | .start = PXA_CS2_PHYS, | ||
115 | .end = PXA_CS2_PHYS + 3, | ||
101 | .flags = IORESOURCE_MEM, | 116 | .flags = IORESOURCE_MEM, |
102 | }, | 117 | }, |
103 | [1] = { | 118 | { |
104 | .start = COLIBRI_PXA270_ETH_PHYS + 4, | 119 | .start = PXA_CS2_PHYS + 4, |
105 | .end = COLIBRI_PXA270_ETH_PHYS + 4 + 500, | 120 | .end = PXA_CS2_PHYS + 4 + 500, |
106 | .flags = IORESOURCE_MEM, | 121 | .flags = IORESOURCE_MEM, |
107 | }, | 122 | }, |
108 | [2] = { | 123 | { |
109 | .start = COLIBRI_PXA270_ETH_IRQ, | 124 | .start = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), |
110 | .end = COLIBRI_PXA270_ETH_IRQ, | 125 | .end = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), |
111 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, | 126 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, |
112 | }, | 127 | }, |
113 | }; | 128 | }; |
114 | 129 | ||
115 | static struct platform_device dm9000_device = { | 130 | static struct platform_device colibri_pxa270_dm9000_device = { |
116 | .name = "dm9000", | 131 | .name = "dm9000", |
117 | .id = -1, | 132 | .id = -1, |
118 | .num_resources = ARRAY_SIZE(dm9000_resources), | 133 | .num_resources = ARRAY_SIZE(colibri_pxa270_dm9000_resources), |
119 | .resource = dm9000_resources, | 134 | .resource = colibri_pxa270_dm9000_resources, |
120 | }; | 135 | }; |
121 | #endif /* CONFIG_DM9000 */ | ||
122 | 136 | ||
123 | static struct platform_device *colibri_pxa270_devices[] __initdata = { | 137 | static void __init colibri_pxa270_eth_init(void) |
124 | &colibri_pxa270_flash_device, | 138 | { |
125 | #if defined(CONFIG_DM9000) | 139 | platform_device_register(&colibri_pxa270_dm9000_device); |
126 | &dm9000_device, | 140 | } |
141 | #else | ||
142 | static inline void colibri_pxa270_eth_init(void) {} | ||
127 | #endif | 143 | #endif |
144 | |||
145 | /****************************************************************************** | ||
146 | * Audio and Touchscreen | ||
147 | ******************************************************************************/ | ||
148 | #if defined(CONFIG_TOUCHSCREEN_UCB1400) || \ | ||
149 | defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) | ||
150 | static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = { | ||
151 | .reset_gpio = 95, | ||
152 | }; | ||
153 | |||
154 | static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = { | ||
155 | .irq = gpio_to_irq(GPIO113_COLIBRI_PXA270_TS_IRQ), | ||
156 | }; | ||
157 | |||
158 | static struct platform_device colibri_pxa270_ucb1400_device = { | ||
159 | .name = "ucb1400_core", | ||
160 | .id = -1, | ||
161 | .dev = { | ||
162 | .platform_data = &colibri_pxa270_ucb1400_pdata, | ||
163 | }, | ||
128 | }; | 164 | }; |
129 | 165 | ||
166 | static void __init colibri_pxa270_tsc_init(void) | ||
167 | { | ||
168 | pxa_set_ac97_info(&colibri_pxa270_ac97_pdata); | ||
169 | platform_device_register(&colibri_pxa270_ucb1400_device); | ||
170 | } | ||
171 | #else | ||
172 | static inline void colibri_pxa270_tsc_init(void) {} | ||
173 | #endif | ||
174 | |||
175 | static int colibri_pxa270_baseboard; | ||
176 | core_param(colibri_pxa270_baseboard, colibri_pxa270_baseboard, int, 0444); | ||
177 | |||
130 | static void __init colibri_pxa270_init(void) | 178 | static void __init colibri_pxa270_init(void) |
131 | { | 179 | { |
132 | pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_pin_config)); | 180 | pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_pin_config)); |
133 | pxa_set_ffuart_info(NULL); | 181 | |
134 | pxa_set_btuart_info(NULL); | 182 | colibri_pxa270_nor_init(); |
135 | pxa_set_stuart_info(NULL); | 183 | colibri_pxa270_eth_init(); |
136 | platform_add_devices(ARRAY_AND_SIZE(colibri_pxa270_devices)); | 184 | colibri_pxa270_tsc_init(); |
185 | |||
186 | switch (colibri_pxa270_baseboard) { | ||
187 | case COLIBRI_PXA270_EVALBOARD: | ||
188 | colibri_pxa270_evalboard_init(); | ||
189 | break; | ||
190 | case COLIBRI_PXA270_INCOME: | ||
191 | colibri_pxa270_income_boardinit(); | ||
192 | break; | ||
193 | default: | ||
194 | printk(KERN_ERR "Illegal colibri_pxa270_baseboard type %d\n", | ||
195 | colibri_pxa270_baseboard); | ||
196 | } | ||
197 | } | ||
198 | |||
199 | /* The "Income s.r.o. SH-Dmaster PXA270 SBC" board can be booted either | ||
200 | * with the INCOME mach type or with COLIBRI and the kernel parameter | ||
201 | * "colibri_pxa270_baseboard=1" | ||
202 | */ | ||
203 | static void __init colibri_pxa270_income_init(void) | ||
204 | { | ||
205 | colibri_pxa270_baseboard = COLIBRI_PXA270_INCOME; | ||
206 | colibri_pxa270_init(); | ||
137 | } | 207 | } |
138 | 208 | ||
139 | MACHINE_START(COLIBRI, "Toradex Colibri PXA270") | 209 | MACHINE_START(COLIBRI, "Toradex Colibri PXA270") |
@@ -146,3 +216,13 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270") | |||
146 | .timer = &pxa_timer, | 216 | .timer = &pxa_timer, |
147 | MACHINE_END | 217 | MACHINE_END |
148 | 218 | ||
219 | MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") | ||
220 | .phys_io = 0x40000000, | ||
221 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
222 | .boot_params = 0xa0000100, | ||
223 | .init_machine = colibri_pxa270_income_init, | ||
224 | .map_io = pxa_map_io, | ||
225 | .init_irq = pxa27x_init_irq, | ||
226 | .timer = &pxa_timer, | ||
227 | MACHINE_END | ||
228 | |||
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index ae835fad7d10..99e850d84710 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/usb/gpio_vbus.h> | ||
19 | 20 | ||
20 | #include <asm/mach-types.h> | 21 | #include <asm/mach-types.h> |
21 | #include <asm/sizes.h> | 22 | #include <asm/sizes.h> |
@@ -28,6 +29,8 @@ | |||
28 | #include <mach/pxafb.h> | 29 | #include <mach/pxafb.h> |
29 | #include <mach/ohci.h> | 30 | #include <mach/ohci.h> |
30 | #include <mach/audio.h> | 31 | #include <mach/audio.h> |
32 | #include <mach/pxa27x-udc.h> | ||
33 | #include <mach/udc.h> | ||
31 | 34 | ||
32 | #include "generic.h" | 35 | #include "generic.h" |
33 | #include "devices.h" | 36 | #include "devices.h" |
@@ -101,6 +104,42 @@ void __init colibri_pxa320_init_ohci(void) | |||
101 | static inline void colibri_pxa320_init_ohci(void) {} | 104 | static inline void colibri_pxa320_init_ohci(void) {} |
102 | #endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */ | 105 | #endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */ |
103 | 106 | ||
107 | #if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE) | ||
108 | static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = { | ||
109 | .gpio_vbus = mfp_to_gpio(MFP_PIN_GPIO96), | ||
110 | .gpio_pullup = -1, | ||
111 | }; | ||
112 | |||
113 | static struct platform_device colibri_pxa320_gpio_vbus = { | ||
114 | .name = "gpio-vbus", | ||
115 | .id = -1, | ||
116 | .dev = { | ||
117 | .platform_data = &colibri_pxa320_gpio_vbus_info, | ||
118 | }, | ||
119 | }; | ||
120 | |||
121 | static void colibri_pxa320_udc_command(int cmd) | ||
122 | { | ||
123 | if (cmd == PXA2XX_UDC_CMD_CONNECT) | ||
124 | UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE; | ||
125 | else if (cmd == PXA2XX_UDC_CMD_DISCONNECT) | ||
126 | UP2OCR = UP2OCR_HXOE; | ||
127 | } | ||
128 | |||
129 | static struct pxa2xx_udc_mach_info colibri_pxa320_udc_info __initdata = { | ||
130 | .udc_command = colibri_pxa320_udc_command, | ||
131 | .gpio_pullup = -1, | ||
132 | }; | ||
133 | |||
134 | static void __init colibri_pxa320_init_udc(void) | ||
135 | { | ||
136 | pxa_set_udc_info(&colibri_pxa320_udc_info); | ||
137 | platform_device_register(&colibri_pxa320_gpio_vbus); | ||
138 | } | ||
139 | #else | ||
140 | static inline void colibri_pxa320_init_udc(void) {} | ||
141 | #endif | ||
142 | |||
104 | static mfp_cfg_t colibri_pxa320_mmc_pin_config[] __initdata = { | 143 | static mfp_cfg_t colibri_pxa320_mmc_pin_config[] __initdata = { |
105 | GPIO22_MMC1_CLK, | 144 | GPIO22_MMC1_CLK, |
106 | GPIO23_MMC1_CMD, | 145 | GPIO23_MMC1_CMD, |
@@ -212,6 +251,7 @@ void __init colibri_pxa320_init(void) | |||
212 | colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa320_mmc_pin_config), | 251 | colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa320_mmc_pin_config), |
213 | mfp_to_gpio(MFP_PIN_GPIO28)); | 252 | mfp_to_gpio(MFP_PIN_GPIO28)); |
214 | colibri_pxa320_init_uart(); | 253 | colibri_pxa320_init_uart(); |
254 | colibri_pxa320_init_udc(); | ||
215 | } | 255 | } |
216 | 256 | ||
217 | MACHINE_START(COLIBRI320, "Toradex Colibri PXA320") | 257 | MACHINE_START(COLIBRI320, "Toradex Colibri PXA320") |
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 461ba4080155..3fb0fc099080 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
@@ -50,14 +50,13 @@ | |||
50 | #include <mach/udc.h> | 50 | #include <mach/udc.h> |
51 | #include <mach/pxa2xx_spi.h> | 51 | #include <mach/pxa2xx_spi.h> |
52 | #include <mach/corgi.h> | 52 | #include <mach/corgi.h> |
53 | #include <mach/sharpsl.h> | 53 | #include <mach/sharpsl_pm.h> |
54 | 54 | ||
55 | #include <asm/mach/sharpsl_param.h> | 55 | #include <asm/mach/sharpsl_param.h> |
56 | #include <asm/hardware/scoop.h> | 56 | #include <asm/hardware/scoop.h> |
57 | 57 | ||
58 | #include "generic.h" | 58 | #include "generic.h" |
59 | #include "devices.h" | 59 | #include "devices.h" |
60 | #include "sharpsl.h" | ||
61 | 60 | ||
62 | static unsigned long corgi_pin_config[] __initdata = { | 61 | static unsigned long corgi_pin_config[] __initdata = { |
63 | /* Static Memory I/O */ | 62 | /* Static Memory I/O */ |
@@ -185,8 +184,6 @@ static struct scoop_pcmcia_config corgi_pcmcia_config = { | |||
185 | .num_devs = 1, | 184 | .num_devs = 1, |
186 | }; | 185 | }; |
187 | 186 | ||
188 | EXPORT_SYMBOL(corgiscoop_device); | ||
189 | |||
190 | static struct w100_mem_info corgi_fb_mem = { | 187 | static struct w100_mem_info corgi_fb_mem = { |
191 | .ext_cntl = 0x00040003, | 188 | .ext_cntl = 0x00040003, |
192 | .sdram_mode_reg = 0x00650021, | 189 | .sdram_mode_reg = 0x00650021, |
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index 3f1dc74ac048..29034778bfda 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c | |||
@@ -23,12 +23,11 @@ | |||
23 | #include <asm/mach-types.h> | 23 | #include <asm/mach-types.h> |
24 | #include <mach/hardware.h> | 24 | #include <mach/hardware.h> |
25 | 25 | ||
26 | #include <mach/sharpsl.h> | ||
27 | #include <mach/corgi.h> | 26 | #include <mach/corgi.h> |
28 | #include <mach/pxa2xx-regs.h> | 27 | #include <mach/pxa2xx-regs.h> |
28 | #include <mach/sharpsl_pm.h> | ||
29 | 29 | ||
30 | #include "generic.h" | 30 | #include "generic.h" |
31 | #include "sharpsl.h" | ||
32 | 31 | ||
33 | #define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ | 32 | #define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ |
34 | #define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */ | 33 | #define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */ |
@@ -134,11 +133,11 @@ unsigned long corgipm_read_devdata(int type) | |||
134 | case SHARPSL_STATUS_ACIN: | 133 | case SHARPSL_STATUS_ACIN: |
135 | return ((GPLR(CORGI_GPIO_AC_IN) & GPIO_bit(CORGI_GPIO_AC_IN)) != 0); | 134 | return ((GPLR(CORGI_GPIO_AC_IN) & GPIO_bit(CORGI_GPIO_AC_IN)) != 0); |
136 | case SHARPSL_STATUS_LOCK: | 135 | case SHARPSL_STATUS_LOCK: |
137 | return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batlock); | 136 | return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); |
138 | case SHARPSL_STATUS_CHRGFULL: | 137 | case SHARPSL_STATUS_CHRGFULL: |
139 | return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batfull); | 138 | return gpio_get_value(sharpsl_pm.machinfo->gpio_batfull); |
140 | case SHARPSL_STATUS_FATAL: | 139 | case SHARPSL_STATUS_FATAL: |
141 | return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_fatal); | 140 | return gpio_get_value(sharpsl_pm.machinfo->gpio_fatal); |
142 | case SHARPSL_ACIN_VOLT: | 141 | case SHARPSL_ACIN_VOLT: |
143 | return sharpsl_pm_pxa_read_max1111(MAX1111_ACIN_VOLT); | 142 | return sharpsl_pm_pxa_read_max1111(MAX1111_ACIN_VOLT); |
144 | case SHARPSL_BATT_TEMP: | 143 | case SHARPSL_BATT_TEMP: |
@@ -165,8 +164,6 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = { | |||
165 | .should_wakeup = corgi_should_wakeup, | 164 | .should_wakeup = corgi_should_wakeup, |
166 | #if defined(CONFIG_LCD_CORGI) | 165 | #if defined(CONFIG_LCD_CORGI) |
167 | .backlight_limit = corgi_lcd_limit_intensity, | 166 | .backlight_limit = corgi_lcd_limit_intensity, |
168 | #elif defined(CONFIG_BACKLIGHT_CORGI) | ||
169 | .backlight_limit = corgibl_limit_intensity, | ||
170 | #endif | 167 | #endif |
171 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, | 168 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, |
172 | .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, | 169 | .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, |
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index 8e10db148f1b..65447dc736c2 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c | |||
@@ -4,6 +4,7 @@ | |||
4 | #include <linux/platform_device.h> | 4 | #include <linux/platform_device.h> |
5 | #include <linux/dma-mapping.h> | 5 | #include <linux/dma-mapping.h> |
6 | 6 | ||
7 | #include <asm/pmu.h> | ||
7 | #include <mach/udc.h> | 8 | #include <mach/udc.h> |
8 | #include <mach/pxafb.h> | 9 | #include <mach/pxafb.h> |
9 | #include <mach/mmc.h> | 10 | #include <mach/mmc.h> |
@@ -31,6 +32,19 @@ void __init pxa_register_device(struct platform_device *dev, void *data) | |||
31 | dev_err(&dev->dev, "unable to register device: %d\n", ret); | 32 | dev_err(&dev->dev, "unable to register device: %d\n", ret); |
32 | } | 33 | } |
33 | 34 | ||
35 | static struct resource pxa_resource_pmu = { | ||
36 | .start = IRQ_PMU, | ||
37 | .end = IRQ_PMU, | ||
38 | .flags = IORESOURCE_IRQ, | ||
39 | }; | ||
40 | |||
41 | struct platform_device pxa_device_pmu = { | ||
42 | .name = "arm-pmu", | ||
43 | .id = ARM_PMU_DEVICE_CPU, | ||
44 | .resource = &pxa_resource_pmu, | ||
45 | .num_resources = 1, | ||
46 | }; | ||
47 | |||
34 | static struct resource pxamci_resources[] = { | 48 | static struct resource pxamci_resources[] = { |
35 | [0] = { | 49 | [0] = { |
36 | .start = 0x41100000, | 50 | .start = 0x41100000, |
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index 93817d99761e..50353ea49ba4 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h | |||
@@ -1,3 +1,4 @@ | |||
1 | extern struct platform_device pxa_device_pmu; | ||
1 | extern struct platform_device pxa_device_mci; | 2 | extern struct platform_device pxa_device_mci; |
2 | extern struct platform_device pxa3xx_device_mci2; | 3 | extern struct platform_device pxa3xx_device_mci2; |
3 | extern struct platform_device pxa3xx_device_mci3; | 4 | extern struct platform_device pxa3xx_device_mci3; |
diff --git a/arch/arm/mach-pxa/e330.c b/arch/arm/mach-pxa/e330.c deleted file mode 100644 index 8fde3387279d..000000000000 --- a/arch/arm/mach-pxa/e330.c +++ /dev/null | |||
@@ -1,78 +0,0 @@ | |||
1 | /* | ||
2 | * Hardware definitions for the Toshiba e330 PDAs | ||
3 | * | ||
4 | * Copyright (c) 2003 Ian Molton <spyro@f2s.com> | ||
5 | * | ||
6 | * This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/clk.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/mfd/tc6387xb.h> | ||
18 | |||
19 | #include <asm/setup.h> | ||
20 | #include <asm/mach/arch.h> | ||
21 | #include <asm/mach-types.h> | ||
22 | |||
23 | #include <mach/pxa25x.h> | ||
24 | #include <mach/eseries-gpio.h> | ||
25 | #include <mach/udc.h> | ||
26 | |||
27 | #include "generic.h" | ||
28 | #include "eseries.h" | ||
29 | #include "clock.h" | ||
30 | |||
31 | /* -------------------- e330 tc6387xb parameters -------------------- */ | ||
32 | |||
33 | static struct tc6387xb_platform_data e330_tc6387xb_info = { | ||
34 | .enable = &eseries_tmio_enable, | ||
35 | .disable = &eseries_tmio_disable, | ||
36 | .suspend = &eseries_tmio_suspend, | ||
37 | .resume = &eseries_tmio_resume, | ||
38 | }; | ||
39 | |||
40 | static struct platform_device e330_tc6387xb_device = { | ||
41 | .name = "tc6387xb", | ||
42 | .id = -1, | ||
43 | .dev = { | ||
44 | .platform_data = &e330_tc6387xb_info, | ||
45 | }, | ||
46 | .num_resources = 2, | ||
47 | .resource = eseries_tmio_resources, | ||
48 | }; | ||
49 | |||
50 | /* --------------------------------------------------------------- */ | ||
51 | |||
52 | static struct platform_device *devices[] __initdata = { | ||
53 | &e330_tc6387xb_device, | ||
54 | }; | ||
55 | |||
56 | static void __init e330_init(void) | ||
57 | { | ||
58 | pxa_set_ffuart_info(NULL); | ||
59 | pxa_set_btuart_info(NULL); | ||
60 | pxa_set_stuart_info(NULL); | ||
61 | eseries_register_clks(); | ||
62 | eseries_get_tmio_gpios(); | ||
63 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
64 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
65 | } | ||
66 | |||
67 | MACHINE_START(E330, "Toshiba e330") | ||
68 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
69 | .phys_io = 0x40000000, | ||
70 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
71 | .boot_params = 0xa0000100, | ||
72 | .map_io = pxa_map_io, | ||
73 | .init_irq = pxa25x_init_irq, | ||
74 | .fixup = eseries_fixup, | ||
75 | .init_machine = e330_init, | ||
76 | .timer = &pxa_timer, | ||
77 | MACHINE_END | ||
78 | |||
diff --git a/arch/arm/mach-pxa/e350.c b/arch/arm/mach-pxa/e350.c deleted file mode 100644 index f50f055f5720..000000000000 --- a/arch/arm/mach-pxa/e350.c +++ /dev/null | |||
@@ -1,79 +0,0 @@ | |||
1 | /* | ||
2 | * Hardware definitions for the Toshiba e350 PDAs | ||
3 | * | ||
4 | * Copyright (c) 2003 Ian Molton <spyro@f2s.com> | ||
5 | * | ||
6 | * This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/clk.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/mfd/t7l66xb.h> | ||
18 | |||
19 | #include <asm/setup.h> | ||
20 | #include <asm/mach/arch.h> | ||
21 | #include <asm/mach-types.h> | ||
22 | |||
23 | #include <mach/irqs.h> | ||
24 | #include <mach/pxa25x.h> | ||
25 | #include <mach/eseries-gpio.h> | ||
26 | #include <mach/udc.h> | ||
27 | |||
28 | #include "generic.h" | ||
29 | #include "eseries.h" | ||
30 | #include "clock.h" | ||
31 | |||
32 | /* -------------------- e350 t7l66xb parameters -------------------- */ | ||
33 | |||
34 | static struct t7l66xb_platform_data e350_t7l66xb_info = { | ||
35 | .irq_base = IRQ_BOARD_START, | ||
36 | .enable = &eseries_tmio_enable, | ||
37 | .suspend = &eseries_tmio_suspend, | ||
38 | .resume = &eseries_tmio_resume, | ||
39 | }; | ||
40 | |||
41 | static struct platform_device e350_t7l66xb_device = { | ||
42 | .name = "t7l66xb", | ||
43 | .id = -1, | ||
44 | .dev = { | ||
45 | .platform_data = &e350_t7l66xb_info, | ||
46 | }, | ||
47 | .num_resources = 2, | ||
48 | .resource = eseries_tmio_resources, | ||
49 | }; | ||
50 | |||
51 | /* ---------------------------------------------------------- */ | ||
52 | |||
53 | static struct platform_device *devices[] __initdata = { | ||
54 | &e350_t7l66xb_device, | ||
55 | }; | ||
56 | |||
57 | static void __init e350_init(void) | ||
58 | { | ||
59 | pxa_set_ffuart_info(NULL); | ||
60 | pxa_set_btuart_info(NULL); | ||
61 | pxa_set_stuart_info(NULL); | ||
62 | eseries_register_clks(); | ||
63 | eseries_get_tmio_gpios(); | ||
64 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
65 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
66 | } | ||
67 | |||
68 | MACHINE_START(E350, "Toshiba e350") | ||
69 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
70 | .phys_io = 0x40000000, | ||
71 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
72 | .boot_params = 0xa0000100, | ||
73 | .map_io = pxa_map_io, | ||
74 | .init_irq = pxa25x_init_irq, | ||
75 | .fixup = eseries_fixup, | ||
76 | .init_machine = e350_init, | ||
77 | .timer = &pxa_timer, | ||
78 | MACHINE_END | ||
79 | |||
diff --git a/arch/arm/mach-pxa/e400.c b/arch/arm/mach-pxa/e400.c deleted file mode 100644 index 55b950f12844..000000000000 --- a/arch/arm/mach-pxa/e400.c +++ /dev/null | |||
@@ -1,155 +0,0 @@ | |||
1 | /* | ||
2 | * Hardware definitions for the Toshiba eseries PDAs | ||
3 | * | ||
4 | * Copyright (c) 2003 Ian Molton <spyro@f2s.com> | ||
5 | * | ||
6 | * This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/clk.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/mfd/t7l66xb.h> | ||
18 | #include <linux/mtd/nand.h> | ||
19 | #include <linux/mtd/partitions.h> | ||
20 | |||
21 | #include <asm/setup.h> | ||
22 | #include <asm/mach/arch.h> | ||
23 | #include <asm/mach-types.h> | ||
24 | |||
25 | #include <mach/pxa25x.h> | ||
26 | #include <mach/eseries-gpio.h> | ||
27 | #include <mach/pxafb.h> | ||
28 | #include <mach/udc.h> | ||
29 | #include <mach/irqs.h> | ||
30 | |||
31 | #include "generic.h" | ||
32 | #include "eseries.h" | ||
33 | #include "clock.h" | ||
34 | |||
35 | /* ------------------------ E400 LCD definitions ------------------------ */ | ||
36 | |||
37 | static struct pxafb_mode_info e400_pxafb_mode_info = { | ||
38 | .pixclock = 140703, | ||
39 | .xres = 240, | ||
40 | .yres = 320, | ||
41 | .bpp = 16, | ||
42 | .hsync_len = 4, | ||
43 | .left_margin = 28, | ||
44 | .right_margin = 8, | ||
45 | .vsync_len = 3, | ||
46 | .upper_margin = 5, | ||
47 | .lower_margin = 6, | ||
48 | .sync = 0, | ||
49 | }; | ||
50 | |||
51 | static struct pxafb_mach_info e400_pxafb_mach_info = { | ||
52 | .modes = &e400_pxafb_mode_info, | ||
53 | .num_modes = 1, | ||
54 | .lcd_conn = LCD_COLOR_TFT_16BPP, | ||
55 | .lccr3 = 0, | ||
56 | .pxafb_backlight_power = NULL, | ||
57 | }; | ||
58 | |||
59 | /* ------------------------ E400 MFP config ----------------------------- */ | ||
60 | |||
61 | static unsigned long e400_pin_config[] __initdata = { | ||
62 | /* Chip selects */ | ||
63 | GPIO15_nCS_1, /* CS1 - Flash */ | ||
64 | GPIO80_nCS_4, /* CS4 - TMIO */ | ||
65 | |||
66 | /* Clocks */ | ||
67 | GPIO12_32KHz, | ||
68 | |||
69 | /* BTUART */ | ||
70 | GPIO42_BTUART_RXD, | ||
71 | GPIO43_BTUART_TXD, | ||
72 | GPIO44_BTUART_CTS, | ||
73 | |||
74 | /* TMIO controller */ | ||
75 | GPIO19_GPIO, /* t7l66xb #PCLR */ | ||
76 | GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */ | ||
77 | |||
78 | /* wakeup */ | ||
79 | GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, | ||
80 | }; | ||
81 | |||
82 | /* ---------------------------------------------------------------------- */ | ||
83 | |||
84 | static struct mtd_partition partition_a = { | ||
85 | .name = "Internal NAND flash", | ||
86 | .offset = 0, | ||
87 | .size = MTDPART_SIZ_FULL, | ||
88 | }; | ||
89 | |||
90 | static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; | ||
91 | |||
92 | static struct nand_bbt_descr e400_t7l66xb_nand_bbt = { | ||
93 | .options = 0, | ||
94 | .offs = 4, | ||
95 | .len = 2, | ||
96 | .pattern = scan_ff_pattern | ||
97 | }; | ||
98 | |||
99 | static struct tmio_nand_data e400_t7l66xb_nand_config = { | ||
100 | .num_partitions = 1, | ||
101 | .partition = &partition_a, | ||
102 | .badblock_pattern = &e400_t7l66xb_nand_bbt, | ||
103 | }; | ||
104 | |||
105 | static struct t7l66xb_platform_data e400_t7l66xb_info = { | ||
106 | .irq_base = IRQ_BOARD_START, | ||
107 | .enable = &eseries_tmio_enable, | ||
108 | .suspend = &eseries_tmio_suspend, | ||
109 | .resume = &eseries_tmio_resume, | ||
110 | |||
111 | .nand_data = &e400_t7l66xb_nand_config, | ||
112 | }; | ||
113 | |||
114 | static struct platform_device e400_t7l66xb_device = { | ||
115 | .name = "t7l66xb", | ||
116 | .id = -1, | ||
117 | .dev = { | ||
118 | .platform_data = &e400_t7l66xb_info, | ||
119 | }, | ||
120 | .num_resources = 2, | ||
121 | .resource = eseries_tmio_resources, | ||
122 | }; | ||
123 | |||
124 | /* ---------------------------------------------------------- */ | ||
125 | |||
126 | static struct platform_device *devices[] __initdata = { | ||
127 | &e400_t7l66xb_device, | ||
128 | }; | ||
129 | |||
130 | static void __init e400_init(void) | ||
131 | { | ||
132 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config)); | ||
133 | pxa_set_ffuart_info(NULL); | ||
134 | pxa_set_btuart_info(NULL); | ||
135 | pxa_set_stuart_info(NULL); | ||
136 | /* Fixme - e400 may have a switched clock */ | ||
137 | eseries_register_clks(); | ||
138 | eseries_get_tmio_gpios(); | ||
139 | set_pxa_fb_info(&e400_pxafb_mach_info); | ||
140 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
141 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
142 | } | ||
143 | |||
144 | MACHINE_START(E400, "Toshiba e400") | ||
145 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
146 | .phys_io = 0x40000000, | ||
147 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
148 | .boot_params = 0xa0000100, | ||
149 | .map_io = pxa_map_io, | ||
150 | .init_irq = pxa25x_init_irq, | ||
151 | .fixup = eseries_fixup, | ||
152 | .init_machine = e400_init, | ||
153 | .timer = &pxa_timer, | ||
154 | MACHINE_END | ||
155 | |||
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c deleted file mode 100644 index d578021d1a10..000000000000 --- a/arch/arm/mach-pxa/e740.c +++ /dev/null | |||
@@ -1,225 +0,0 @@ | |||
1 | /* | ||
2 | * Hardware definitions for the Toshiba eseries PDAs | ||
3 | * | ||
4 | * Copyright (c) 2003 Ian Molton <spyro@f2s.com> | ||
5 | * | ||
6 | * This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/device.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/fb.h> | ||
18 | #include <linux/clk.h> | ||
19 | #include <linux/mfd/t7l66xb.h> | ||
20 | |||
21 | #include <video/w100fb.h> | ||
22 | |||
23 | #include <asm/setup.h> | ||
24 | #include <asm/mach/arch.h> | ||
25 | #include <asm/mach-types.h> | ||
26 | |||
27 | #include <mach/pxa25x.h> | ||
28 | #include <mach/eseries-gpio.h> | ||
29 | #include <mach/udc.h> | ||
30 | #include <mach/irda.h> | ||
31 | #include <mach/irqs.h> | ||
32 | #include <mach/audio.h> | ||
33 | |||
34 | #include "generic.h" | ||
35 | #include "eseries.h" | ||
36 | #include "clock.h" | ||
37 | #include "devices.h" | ||
38 | |||
39 | /* ------------------------ e740 video support --------------------------- */ | ||
40 | |||
41 | static struct w100_gen_regs e740_lcd_regs = { | ||
42 | .lcd_format = 0x00008023, | ||
43 | .lcdd_cntl1 = 0x0f000000, | ||
44 | .lcdd_cntl2 = 0x0003ffff, | ||
45 | .genlcd_cntl1 = 0x00ffff03, | ||
46 | .genlcd_cntl2 = 0x003c0f03, | ||
47 | .genlcd_cntl3 = 0x000143aa, | ||
48 | }; | ||
49 | |||
50 | static struct w100_mode e740_lcd_mode = { | ||
51 | .xres = 240, | ||
52 | .yres = 320, | ||
53 | .left_margin = 20, | ||
54 | .right_margin = 28, | ||
55 | .upper_margin = 9, | ||
56 | .lower_margin = 8, | ||
57 | .crtc_ss = 0x80140013, | ||
58 | .crtc_ls = 0x81150110, | ||
59 | .crtc_gs = 0x80050005, | ||
60 | .crtc_vpos_gs = 0x000a0009, | ||
61 | .crtc_rev = 0x0040010a, | ||
62 | .crtc_dclk = 0xa906000a, | ||
63 | .crtc_gclk = 0x80050108, | ||
64 | .crtc_goe = 0x80050108, | ||
65 | .pll_freq = 57, | ||
66 | .pixclk_divider = 4, | ||
67 | .pixclk_divider_rotated = 4, | ||
68 | .pixclk_src = CLK_SRC_XTAL, | ||
69 | .sysclk_divider = 1, | ||
70 | .sysclk_src = CLK_SRC_PLL, | ||
71 | .crtc_ps1_active = 0x41060010, | ||
72 | }; | ||
73 | |||
74 | static struct w100_gpio_regs e740_w100_gpio_info = { | ||
75 | .init_data1 = 0x21002103, | ||
76 | .gpio_dir1 = 0xffffdeff, | ||
77 | .gpio_oe1 = 0x03c00643, | ||
78 | .init_data2 = 0x003f003f, | ||
79 | .gpio_dir2 = 0xffffffff, | ||
80 | .gpio_oe2 = 0x000000ff, | ||
81 | }; | ||
82 | |||
83 | static struct w100fb_mach_info e740_fb_info = { | ||
84 | .modelist = &e740_lcd_mode, | ||
85 | .num_modes = 1, | ||
86 | .regs = &e740_lcd_regs, | ||
87 | .gpio = &e740_w100_gpio_info, | ||
88 | .xtal_freq = 14318000, | ||
89 | .xtal_dbl = 1, | ||
90 | }; | ||
91 | |||
92 | static struct resource e740_fb_resources[] = { | ||
93 | [0] = { | ||
94 | .start = 0x0c000000, | ||
95 | .end = 0x0cffffff, | ||
96 | .flags = IORESOURCE_MEM, | ||
97 | }, | ||
98 | }; | ||
99 | |||
100 | static struct platform_device e740_fb_device = { | ||
101 | .name = "w100fb", | ||
102 | .id = -1, | ||
103 | .dev = { | ||
104 | .platform_data = &e740_fb_info, | ||
105 | }, | ||
106 | .num_resources = ARRAY_SIZE(e740_fb_resources), | ||
107 | .resource = e740_fb_resources, | ||
108 | }; | ||
109 | |||
110 | /* --------------------------- MFP Pin config -------------------------- */ | ||
111 | |||
112 | static unsigned long e740_pin_config[] __initdata = { | ||
113 | /* Chip selects */ | ||
114 | GPIO15_nCS_1, /* CS1 - Flash */ | ||
115 | GPIO79_nCS_3, /* CS3 - IMAGEON */ | ||
116 | GPIO80_nCS_4, /* CS4 - TMIO */ | ||
117 | |||
118 | /* Clocks */ | ||
119 | GPIO12_32KHz, | ||
120 | |||
121 | /* BTUART */ | ||
122 | GPIO42_BTUART_RXD, | ||
123 | GPIO43_BTUART_TXD, | ||
124 | GPIO44_BTUART_CTS, | ||
125 | |||
126 | /* TMIO controller */ | ||
127 | GPIO19_GPIO, /* t7l66xb #PCLR */ | ||
128 | GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */ | ||
129 | |||
130 | /* UDC */ | ||
131 | GPIO13_GPIO, | ||
132 | GPIO3_GPIO, | ||
133 | |||
134 | /* IrDA */ | ||
135 | GPIO38_GPIO | MFP_LPM_DRIVE_HIGH, | ||
136 | |||
137 | /* AC97 */ | ||
138 | GPIO28_AC97_BITCLK, | ||
139 | GPIO29_AC97_SDATA_IN_0, | ||
140 | GPIO30_AC97_SDATA_OUT, | ||
141 | GPIO31_AC97_SYNC, | ||
142 | |||
143 | /* Audio power control */ | ||
144 | GPIO16_GPIO, /* AC97 codec AVDD2 supply (analogue power) */ | ||
145 | GPIO40_GPIO, /* Mic amp power */ | ||
146 | GPIO41_GPIO, /* Headphone amp power */ | ||
147 | |||
148 | /* PC Card */ | ||
149 | GPIO8_GPIO, /* CD0 */ | ||
150 | GPIO44_GPIO, /* CD1 */ | ||
151 | GPIO11_GPIO, /* IRQ0 */ | ||
152 | GPIO6_GPIO, /* IRQ1 */ | ||
153 | GPIO27_GPIO, /* RST0 */ | ||
154 | GPIO24_GPIO, /* RST1 */ | ||
155 | GPIO20_GPIO, /* PWR0 */ | ||
156 | GPIO23_GPIO, /* PWR1 */ | ||
157 | GPIO48_nPOE, | ||
158 | GPIO49_nPWE, | ||
159 | GPIO50_nPIOR, | ||
160 | GPIO51_nPIOW, | ||
161 | GPIO52_nPCE_1, | ||
162 | GPIO53_nPCE_2, | ||
163 | GPIO54_nPSKTSEL, | ||
164 | GPIO55_nPREG, | ||
165 | GPIO56_nPWAIT, | ||
166 | GPIO57_nIOIS16, | ||
167 | |||
168 | /* wakeup */ | ||
169 | GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, | ||
170 | }; | ||
171 | |||
172 | /* -------------------- e740 t7l66xb parameters -------------------- */ | ||
173 | |||
174 | static struct t7l66xb_platform_data e740_t7l66xb_info = { | ||
175 | .irq_base = IRQ_BOARD_START, | ||
176 | .enable = &eseries_tmio_enable, | ||
177 | .suspend = &eseries_tmio_suspend, | ||
178 | .resume = &eseries_tmio_resume, | ||
179 | }; | ||
180 | |||
181 | static struct platform_device e740_t7l66xb_device = { | ||
182 | .name = "t7l66xb", | ||
183 | .id = -1, | ||
184 | .dev = { | ||
185 | .platform_data = &e740_t7l66xb_info, | ||
186 | }, | ||
187 | .num_resources = 2, | ||
188 | .resource = eseries_tmio_resources, | ||
189 | }; | ||
190 | |||
191 | /* ----------------------------------------------------------------------- */ | ||
192 | |||
193 | static struct platform_device *devices[] __initdata = { | ||
194 | &e740_fb_device, | ||
195 | &e740_t7l66xb_device, | ||
196 | }; | ||
197 | |||
198 | static void __init e740_init(void) | ||
199 | { | ||
200 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config)); | ||
201 | pxa_set_ffuart_info(NULL); | ||
202 | pxa_set_btuart_info(NULL); | ||
203 | pxa_set_stuart_info(NULL); | ||
204 | eseries_register_clks(); | ||
205 | clk_add_alias("CLK_CK48M", e740_t7l66xb_device.name, | ||
206 | "UDCCLK", &pxa25x_device_udc.dev), | ||
207 | eseries_get_tmio_gpios(); | ||
208 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
209 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
210 | pxa_set_ac97_info(NULL); | ||
211 | pxa_set_ficp_info(&e7xx_ficp_platform_data); | ||
212 | } | ||
213 | |||
214 | MACHINE_START(E740, "Toshiba e740") | ||
215 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
216 | .phys_io = 0x40000000, | ||
217 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
218 | .boot_params = 0xa0000100, | ||
219 | .map_io = pxa_map_io, | ||
220 | .init_irq = pxa25x_init_irq, | ||
221 | .fixup = eseries_fixup, | ||
222 | .init_machine = e740_init, | ||
223 | .timer = &pxa_timer, | ||
224 | MACHINE_END | ||
225 | |||
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c deleted file mode 100644 index af83caa52dd4..000000000000 --- a/arch/arm/mach-pxa/e750.c +++ /dev/null | |||
@@ -1,226 +0,0 @@ | |||
1 | /* | ||
2 | * Hardware definitions for the Toshiba eseries PDAs | ||
3 | * | ||
4 | * Copyright (c) 2003 Ian Molton <spyro@f2s.com> | ||
5 | * | ||
6 | * This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/device.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/fb.h> | ||
18 | #include <linux/mfd/tc6393xb.h> | ||
19 | |||
20 | #include <video/w100fb.h> | ||
21 | |||
22 | #include <asm/setup.h> | ||
23 | #include <asm/mach/arch.h> | ||
24 | #include <asm/mach-types.h> | ||
25 | |||
26 | #include <mach/pxa25x.h> | ||
27 | #include <mach/eseries-gpio.h> | ||
28 | #include <mach/udc.h> | ||
29 | #include <mach/irda.h> | ||
30 | #include <mach/irqs.h> | ||
31 | #include <mach/audio.h> | ||
32 | |||
33 | #include "generic.h" | ||
34 | #include "eseries.h" | ||
35 | #include "clock.h" | ||
36 | |||
37 | /* ---------------------- E750 LCD definitions -------------------- */ | ||
38 | |||
39 | static struct w100_gen_regs e750_lcd_regs = { | ||
40 | .lcd_format = 0x00008003, | ||
41 | .lcdd_cntl1 = 0x00000000, | ||
42 | .lcdd_cntl2 = 0x0003ffff, | ||
43 | .genlcd_cntl1 = 0x00fff003, | ||
44 | .genlcd_cntl2 = 0x003c0f03, | ||
45 | .genlcd_cntl3 = 0x000143aa, | ||
46 | }; | ||
47 | |||
48 | static struct w100_mode e750_lcd_mode = { | ||
49 | .xres = 240, | ||
50 | .yres = 320, | ||
51 | .left_margin = 21, | ||
52 | .right_margin = 22, | ||
53 | .upper_margin = 5, | ||
54 | .lower_margin = 4, | ||
55 | .crtc_ss = 0x80150014, | ||
56 | .crtc_ls = 0x8014000d, | ||
57 | .crtc_gs = 0xc1000005, | ||
58 | .crtc_vpos_gs = 0x00020147, | ||
59 | .crtc_rev = 0x0040010a, | ||
60 | .crtc_dclk = 0xa1700030, | ||
61 | .crtc_gclk = 0x80cc0015, | ||
62 | .crtc_goe = 0x80cc0015, | ||
63 | .crtc_ps1_active = 0x61060017, | ||
64 | .pll_freq = 57, | ||
65 | .pixclk_divider = 4, | ||
66 | .pixclk_divider_rotated = 4, | ||
67 | .pixclk_src = CLK_SRC_XTAL, | ||
68 | .sysclk_divider = 1, | ||
69 | .sysclk_src = CLK_SRC_PLL, | ||
70 | }; | ||
71 | |||
72 | static struct w100_gpio_regs e750_w100_gpio_info = { | ||
73 | .init_data1 = 0x01192f1b, | ||
74 | .gpio_dir1 = 0xd5ffdeff, | ||
75 | .gpio_oe1 = 0x000020bf, | ||
76 | .init_data2 = 0x010f010f, | ||
77 | .gpio_dir2 = 0xffffffff, | ||
78 | .gpio_oe2 = 0x000001cf, | ||
79 | }; | ||
80 | |||
81 | static struct w100fb_mach_info e750_fb_info = { | ||
82 | .modelist = &e750_lcd_mode, | ||
83 | .num_modes = 1, | ||
84 | .regs = &e750_lcd_regs, | ||
85 | .gpio = &e750_w100_gpio_info, | ||
86 | .xtal_freq = 14318000, | ||
87 | .xtal_dbl = 1, | ||
88 | }; | ||
89 | |||
90 | static struct resource e750_fb_resources[] = { | ||
91 | [0] = { | ||
92 | .start = 0x0c000000, | ||
93 | .end = 0x0cffffff, | ||
94 | .flags = IORESOURCE_MEM, | ||
95 | }, | ||
96 | }; | ||
97 | |||
98 | static struct platform_device e750_fb_device = { | ||
99 | .name = "w100fb", | ||
100 | .id = -1, | ||
101 | .dev = { | ||
102 | .platform_data = &e750_fb_info, | ||
103 | }, | ||
104 | .num_resources = ARRAY_SIZE(e750_fb_resources), | ||
105 | .resource = e750_fb_resources, | ||
106 | }; | ||
107 | |||
108 | /* -------------------- e750 MFP parameters -------------------- */ | ||
109 | |||
110 | static unsigned long e750_pin_config[] __initdata = { | ||
111 | /* Chip selects */ | ||
112 | GPIO15_nCS_1, /* CS1 - Flash */ | ||
113 | GPIO79_nCS_3, /* CS3 - IMAGEON */ | ||
114 | GPIO80_nCS_4, /* CS4 - TMIO */ | ||
115 | |||
116 | /* Clocks */ | ||
117 | GPIO11_3_6MHz, | ||
118 | |||
119 | /* BTUART */ | ||
120 | GPIO42_BTUART_RXD, | ||
121 | GPIO43_BTUART_TXD, | ||
122 | GPIO44_BTUART_CTS, | ||
123 | |||
124 | /* TMIO controller */ | ||
125 | GPIO19_GPIO, /* t7l66xb #PCLR */ | ||
126 | GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */ | ||
127 | |||
128 | /* UDC */ | ||
129 | GPIO13_GPIO, | ||
130 | GPIO3_GPIO, | ||
131 | |||
132 | /* IrDA */ | ||
133 | GPIO38_GPIO | MFP_LPM_DRIVE_HIGH, | ||
134 | |||
135 | /* AC97 */ | ||
136 | GPIO28_AC97_BITCLK, | ||
137 | GPIO29_AC97_SDATA_IN_0, | ||
138 | GPIO30_AC97_SDATA_OUT, | ||
139 | GPIO31_AC97_SYNC, | ||
140 | |||
141 | /* Audio power control */ | ||
142 | GPIO4_GPIO, /* Headphone amp power */ | ||
143 | GPIO7_GPIO, /* Speaker amp power */ | ||
144 | GPIO37_GPIO, /* Headphone detect */ | ||
145 | |||
146 | /* PC Card */ | ||
147 | GPIO8_GPIO, /* CD0 */ | ||
148 | GPIO44_GPIO, /* CD1 */ | ||
149 | GPIO11_GPIO, /* IRQ0 */ | ||
150 | GPIO6_GPIO, /* IRQ1 */ | ||
151 | GPIO27_GPIO, /* RST0 */ | ||
152 | GPIO24_GPIO, /* RST1 */ | ||
153 | GPIO20_GPIO, /* PWR0 */ | ||
154 | GPIO23_GPIO, /* PWR1 */ | ||
155 | GPIO48_nPOE, | ||
156 | GPIO49_nPWE, | ||
157 | GPIO50_nPIOR, | ||
158 | GPIO51_nPIOW, | ||
159 | GPIO52_nPCE_1, | ||
160 | GPIO53_nPCE_2, | ||
161 | GPIO54_nPSKTSEL, | ||
162 | GPIO55_nPREG, | ||
163 | GPIO56_nPWAIT, | ||
164 | GPIO57_nIOIS16, | ||
165 | |||
166 | /* wakeup */ | ||
167 | GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, | ||
168 | }; | ||
169 | |||
170 | /* ----------------- e750 tc6393xb parameters ------------------ */ | ||
171 | |||
172 | static struct tc6393xb_platform_data e750_tc6393xb_info = { | ||
173 | .irq_base = IRQ_BOARD_START, | ||
174 | .scr_pll2cr = 0x0cc1, | ||
175 | .scr_gper = 0, | ||
176 | .gpio_base = -1, | ||
177 | .suspend = &eseries_tmio_suspend, | ||
178 | .resume = &eseries_tmio_resume, | ||
179 | .enable = &eseries_tmio_enable, | ||
180 | .disable = &eseries_tmio_disable, | ||
181 | }; | ||
182 | |||
183 | static struct platform_device e750_tc6393xb_device = { | ||
184 | .name = "tc6393xb", | ||
185 | .id = -1, | ||
186 | .dev = { | ||
187 | .platform_data = &e750_tc6393xb_info, | ||
188 | }, | ||
189 | .num_resources = 2, | ||
190 | .resource = eseries_tmio_resources, | ||
191 | }; | ||
192 | |||
193 | /* ------------------------------------------------------------- */ | ||
194 | |||
195 | static struct platform_device *devices[] __initdata = { | ||
196 | &e750_fb_device, | ||
197 | &e750_tc6393xb_device, | ||
198 | }; | ||
199 | |||
200 | static void __init e750_init(void) | ||
201 | { | ||
202 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e750_pin_config)); | ||
203 | pxa_set_ffuart_info(NULL); | ||
204 | pxa_set_btuart_info(NULL); | ||
205 | pxa_set_stuart_info(NULL); | ||
206 | clk_add_alias("CLK_CK3P6MI", e750_tc6393xb_device.name, | ||
207 | "GPIO11_CLK", NULL), | ||
208 | eseries_get_tmio_gpios(); | ||
209 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
210 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
211 | pxa_set_ac97_info(NULL); | ||
212 | pxa_set_ficp_info(&e7xx_ficp_platform_data); | ||
213 | } | ||
214 | |||
215 | MACHINE_START(E750, "Toshiba e750") | ||
216 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
217 | .phys_io = 0x40000000, | ||
218 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
219 | .boot_params = 0xa0000100, | ||
220 | .map_io = pxa_map_io, | ||
221 | .init_irq = pxa25x_init_irq, | ||
222 | .fixup = eseries_fixup, | ||
223 | .init_machine = e750_init, | ||
224 | .timer = &pxa_timer, | ||
225 | MACHINE_END | ||
226 | |||
diff --git a/arch/arm/mach-pxa/e800.c b/arch/arm/mach-pxa/e800.c deleted file mode 100644 index 8ea97bf53fe1..000000000000 --- a/arch/arm/mach-pxa/e800.c +++ /dev/null | |||
@@ -1,229 +0,0 @@ | |||
1 | /* | ||
2 | * Hardware definitions for the Toshiba eseries PDAs | ||
3 | * | ||
4 | * Copyright (c) 2003 Ian Molton <spyro@f2s.com> | ||
5 | * | ||
6 | * This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/device.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/fb.h> | ||
18 | #include <linux/mfd/tc6393xb.h> | ||
19 | |||
20 | #include <video/w100fb.h> | ||
21 | |||
22 | #include <asm/setup.h> | ||
23 | #include <asm/mach/arch.h> | ||
24 | #include <asm/mach-types.h> | ||
25 | |||
26 | #include <mach/pxa25x.h> | ||
27 | #include <mach/eseries-gpio.h> | ||
28 | #include <mach/udc.h> | ||
29 | #include <mach/irqs.h> | ||
30 | #include <mach/audio.h> | ||
31 | |||
32 | #include "generic.h" | ||
33 | #include "eseries.h" | ||
34 | #include "clock.h" | ||
35 | |||
36 | /* ------------------------ e800 LCD definitions ------------------------- */ | ||
37 | |||
38 | static unsigned long e800_pin_config[] __initdata = { | ||
39 | /* AC97 */ | ||
40 | GPIO28_AC97_BITCLK, | ||
41 | GPIO29_AC97_SDATA_IN_0, | ||
42 | GPIO30_AC97_SDATA_OUT, | ||
43 | GPIO31_AC97_SYNC, | ||
44 | }; | ||
45 | |||
46 | static struct w100_gen_regs e800_lcd_regs = { | ||
47 | .lcd_format = 0x00008003, | ||
48 | .lcdd_cntl1 = 0x02a00000, | ||
49 | .lcdd_cntl2 = 0x0003ffff, | ||
50 | .genlcd_cntl1 = 0x000ff2a3, | ||
51 | .genlcd_cntl2 = 0x000002a3, | ||
52 | .genlcd_cntl3 = 0x000102aa, | ||
53 | }; | ||
54 | |||
55 | static struct w100_mode e800_lcd_mode[2] = { | ||
56 | [0] = { | ||
57 | .xres = 480, | ||
58 | .yres = 640, | ||
59 | .left_margin = 52, | ||
60 | .right_margin = 148, | ||
61 | .upper_margin = 2, | ||
62 | .lower_margin = 6, | ||
63 | .crtc_ss = 0x80350034, | ||
64 | .crtc_ls = 0x802b0026, | ||
65 | .crtc_gs = 0x80160016, | ||
66 | .crtc_vpos_gs = 0x00020003, | ||
67 | .crtc_rev = 0x0040001d, | ||
68 | .crtc_dclk = 0xe0000000, | ||
69 | .crtc_gclk = 0x82a50049, | ||
70 | .crtc_goe = 0x80ee001c, | ||
71 | .crtc_ps1_active = 0x00000000, | ||
72 | .pll_freq = 128, | ||
73 | .pixclk_divider = 4, | ||
74 | .pixclk_divider_rotated = 6, | ||
75 | .pixclk_src = CLK_SRC_PLL, | ||
76 | .sysclk_divider = 0, | ||
77 | .sysclk_src = CLK_SRC_PLL, | ||
78 | }, | ||
79 | [1] = { | ||
80 | .xres = 240, | ||
81 | .yres = 320, | ||
82 | .left_margin = 15, | ||
83 | .right_margin = 88, | ||
84 | .upper_margin = 0, | ||
85 | .lower_margin = 7, | ||
86 | .crtc_ss = 0xd010000f, | ||
87 | .crtc_ls = 0x80070003, | ||
88 | .crtc_gs = 0x80000000, | ||
89 | .crtc_vpos_gs = 0x01460147, | ||
90 | .crtc_rev = 0x00400003, | ||
91 | .crtc_dclk = 0xa1700030, | ||
92 | .crtc_gclk = 0x814b0008, | ||
93 | .crtc_goe = 0x80cc0015, | ||
94 | .crtc_ps1_active = 0x00000000, | ||
95 | .pll_freq = 100, | ||
96 | .pixclk_divider = 6, /* Wince uses 14 which gives a */ | ||
97 | .pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */ | ||
98 | .pixclk_src = CLK_SRC_PLL, | ||
99 | .sysclk_divider = 0, | ||
100 | .sysclk_src = CLK_SRC_PLL, | ||
101 | } | ||
102 | }; | ||
103 | |||
104 | |||
105 | static struct w100_gpio_regs e800_w100_gpio_info = { | ||
106 | .init_data1 = 0xc13fc019, | ||
107 | .gpio_dir1 = 0x3e40df7f, | ||
108 | .gpio_oe1 = 0x003c3000, | ||
109 | .init_data2 = 0x00000000, | ||
110 | .gpio_dir2 = 0x00000000, | ||
111 | .gpio_oe2 = 0x00000000, | ||
112 | }; | ||
113 | |||
114 | static struct w100_mem_info e800_w100_mem_info = { | ||
115 | .ext_cntl = 0x09640011, | ||
116 | .sdram_mode_reg = 0x00600021, | ||
117 | .ext_timing_cntl = 0x10001545, | ||
118 | .io_cntl = 0x7ddd7333, | ||
119 | .size = 0x1fffff, | ||
120 | }; | ||
121 | |||
122 | static void e800_tg_change(struct w100fb_par *par) | ||
123 | { | ||
124 | unsigned long tmp; | ||
125 | |||
126 | tmp = w100fb_gpio_read(W100_GPIO_PORT_A); | ||
127 | if (par->mode->xres == 480) | ||
128 | tmp |= 0x100; | ||
129 | else | ||
130 | tmp &= ~0x100; | ||
131 | w100fb_gpio_write(W100_GPIO_PORT_A, tmp); | ||
132 | } | ||
133 | |||
134 | static struct w100_tg_info e800_tg_info = { | ||
135 | .change = e800_tg_change, | ||
136 | }; | ||
137 | |||
138 | static struct w100fb_mach_info e800_fb_info = { | ||
139 | .modelist = e800_lcd_mode, | ||
140 | .num_modes = 2, | ||
141 | .regs = &e800_lcd_regs, | ||
142 | .gpio = &e800_w100_gpio_info, | ||
143 | .mem = &e800_w100_mem_info, | ||
144 | .tg = &e800_tg_info, | ||
145 | .xtal_freq = 16000000, | ||
146 | }; | ||
147 | |||
148 | static struct resource e800_fb_resources[] = { | ||
149 | [0] = { | ||
150 | .start = 0x0c000000, | ||
151 | .end = 0x0cffffff, | ||
152 | .flags = IORESOURCE_MEM, | ||
153 | }, | ||
154 | }; | ||
155 | |||
156 | static struct platform_device e800_fb_device = { | ||
157 | .name = "w100fb", | ||
158 | .id = -1, | ||
159 | .dev = { | ||
160 | .platform_data = &e800_fb_info, | ||
161 | }, | ||
162 | .num_resources = ARRAY_SIZE(e800_fb_resources), | ||
163 | .resource = e800_fb_resources, | ||
164 | }; | ||
165 | |||
166 | /* --------------------------- UDC definitions --------------------------- */ | ||
167 | |||
168 | static struct pxa2xx_udc_mach_info e800_udc_mach_info = { | ||
169 | .gpio_vbus = GPIO_E800_USB_DISC, | ||
170 | .gpio_pullup = GPIO_E800_USB_PULLUP, | ||
171 | .gpio_pullup_inverted = 1 | ||
172 | }; | ||
173 | |||
174 | /* ----------------- e800 tc6393xb parameters ------------------ */ | ||
175 | |||
176 | static struct tc6393xb_platform_data e800_tc6393xb_info = { | ||
177 | .irq_base = IRQ_BOARD_START, | ||
178 | .scr_pll2cr = 0x0cc1, | ||
179 | .scr_gper = 0, | ||
180 | .gpio_base = -1, | ||
181 | .suspend = &eseries_tmio_suspend, | ||
182 | .resume = &eseries_tmio_resume, | ||
183 | .enable = &eseries_tmio_enable, | ||
184 | .disable = &eseries_tmio_disable, | ||
185 | }; | ||
186 | |||
187 | static struct platform_device e800_tc6393xb_device = { | ||
188 | .name = "tc6393xb", | ||
189 | .id = -1, | ||
190 | .dev = { | ||
191 | .platform_data = &e800_tc6393xb_info, | ||
192 | }, | ||
193 | .num_resources = 2, | ||
194 | .resource = eseries_tmio_resources, | ||
195 | }; | ||
196 | |||
197 | /* ----------------------------------------------------------------------- */ | ||
198 | |||
199 | static struct platform_device *devices[] __initdata = { | ||
200 | &e800_fb_device, | ||
201 | &e800_tc6393xb_device, | ||
202 | }; | ||
203 | |||
204 | static void __init e800_init(void) | ||
205 | { | ||
206 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e800_pin_config)); | ||
207 | pxa_set_ffuart_info(NULL); | ||
208 | pxa_set_btuart_info(NULL); | ||
209 | pxa_set_stuart_info(NULL); | ||
210 | clk_add_alias("CLK_CK3P6MI", e800_tc6393xb_device.name, | ||
211 | "GPIO11_CLK", NULL), | ||
212 | eseries_get_tmio_gpios(); | ||
213 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
214 | pxa_set_udc_info(&e800_udc_mach_info); | ||
215 | pxa_set_ac97_info(NULL); | ||
216 | } | ||
217 | |||
218 | MACHINE_START(E800, "Toshiba e800") | ||
219 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
220 | .phys_io = 0x40000000, | ||
221 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
222 | .boot_params = 0xa0000100, | ||
223 | .map_io = pxa_map_io, | ||
224 | .init_irq = pxa25x_init_irq, | ||
225 | .fixup = eseries_fixup, | ||
226 | .init_machine = e800_init, | ||
227 | .timer = &pxa_timer, | ||
228 | MACHINE_END | ||
229 | |||
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index a0ab3082a000..349212a1cbd3 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c | |||
@@ -15,6 +15,13 @@ | |||
15 | #include <linux/gpio.h> | 15 | #include <linux/gpio.h> |
16 | #include <linux/delay.h> | 16 | #include <linux/delay.h> |
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/mfd/tc6387xb.h> | ||
19 | #include <linux/mfd/tc6393xb.h> | ||
20 | #include <linux/mfd/t7l66xb.h> | ||
21 | #include <linux/mtd/nand.h> | ||
22 | #include <linux/mtd/partitions.h> | ||
23 | |||
24 | #include <video/w100fb.h> | ||
18 | 25 | ||
19 | #include <asm/setup.h> | 26 | #include <asm/setup.h> |
20 | #include <asm/mach/arch.h> | 27 | #include <asm/mach/arch.h> |
@@ -22,9 +29,12 @@ | |||
22 | 29 | ||
23 | #include <mach/pxa25x.h> | 30 | #include <mach/pxa25x.h> |
24 | #include <mach/eseries-gpio.h> | 31 | #include <mach/eseries-gpio.h> |
32 | #include <mach/audio.h> | ||
33 | #include <mach/pxafb.h> | ||
25 | #include <mach/udc.h> | 34 | #include <mach/udc.h> |
26 | #include <mach/irda.h> | 35 | #include <mach/irda.h> |
27 | 36 | ||
37 | #include "devices.h" | ||
28 | #include "generic.h" | 38 | #include "generic.h" |
29 | #include "clock.h" | 39 | #include "clock.h" |
30 | 40 | ||
@@ -130,3 +140,802 @@ void eseries_register_clks(void) | |||
130 | clkdev_add_table(eseries_clkregs, ARRAY_SIZE(eseries_clkregs)); | 140 | clkdev_add_table(eseries_clkregs, ARRAY_SIZE(eseries_clkregs)); |
131 | } | 141 | } |
132 | 142 | ||
143 | #ifdef CONFIG_MACH_E330 | ||
144 | /* -------------------- e330 tc6387xb parameters -------------------- */ | ||
145 | |||
146 | static struct tc6387xb_platform_data e330_tc6387xb_info = { | ||
147 | .enable = &eseries_tmio_enable, | ||
148 | .disable = &eseries_tmio_disable, | ||
149 | .suspend = &eseries_tmio_suspend, | ||
150 | .resume = &eseries_tmio_resume, | ||
151 | }; | ||
152 | |||
153 | static struct platform_device e330_tc6387xb_device = { | ||
154 | .name = "tc6387xb", | ||
155 | .id = -1, | ||
156 | .dev = { | ||
157 | .platform_data = &e330_tc6387xb_info, | ||
158 | }, | ||
159 | .num_resources = 2, | ||
160 | .resource = eseries_tmio_resources, | ||
161 | }; | ||
162 | |||
163 | /* --------------------------------------------------------------- */ | ||
164 | |||
165 | static struct platform_device *e330_devices[] __initdata = { | ||
166 | &e330_tc6387xb_device, | ||
167 | }; | ||
168 | |||
169 | static void __init e330_init(void) | ||
170 | { | ||
171 | pxa_set_ffuart_info(NULL); | ||
172 | pxa_set_btuart_info(NULL); | ||
173 | pxa_set_stuart_info(NULL); | ||
174 | eseries_register_clks(); | ||
175 | eseries_get_tmio_gpios(); | ||
176 | platform_add_devices(ARRAY_AND_SIZE(e330_devices)); | ||
177 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
178 | } | ||
179 | |||
180 | MACHINE_START(E330, "Toshiba e330") | ||
181 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
182 | .phys_io = 0x40000000, | ||
183 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
184 | .boot_params = 0xa0000100, | ||
185 | .map_io = pxa_map_io, | ||
186 | .init_irq = pxa25x_init_irq, | ||
187 | .fixup = eseries_fixup, | ||
188 | .init_machine = e330_init, | ||
189 | .timer = &pxa_timer, | ||
190 | MACHINE_END | ||
191 | #endif | ||
192 | |||
193 | #ifdef CONFIG_MACH_E350 | ||
194 | /* -------------------- e350 t7l66xb parameters -------------------- */ | ||
195 | |||
196 | static struct t7l66xb_platform_data e350_t7l66xb_info = { | ||
197 | .irq_base = IRQ_BOARD_START, | ||
198 | .enable = &eseries_tmio_enable, | ||
199 | .suspend = &eseries_tmio_suspend, | ||
200 | .resume = &eseries_tmio_resume, | ||
201 | }; | ||
202 | |||
203 | static struct platform_device e350_t7l66xb_device = { | ||
204 | .name = "t7l66xb", | ||
205 | .id = -1, | ||
206 | .dev = { | ||
207 | .platform_data = &e350_t7l66xb_info, | ||
208 | }, | ||
209 | .num_resources = 2, | ||
210 | .resource = eseries_tmio_resources, | ||
211 | }; | ||
212 | |||
213 | /* ---------------------------------------------------------- */ | ||
214 | |||
215 | static struct platform_device *e350_devices[] __initdata = { | ||
216 | &e350_t7l66xb_device, | ||
217 | }; | ||
218 | |||
219 | static void __init e350_init(void) | ||
220 | { | ||
221 | pxa_set_ffuart_info(NULL); | ||
222 | pxa_set_btuart_info(NULL); | ||
223 | pxa_set_stuart_info(NULL); | ||
224 | eseries_register_clks(); | ||
225 | eseries_get_tmio_gpios(); | ||
226 | platform_add_devices(ARRAY_AND_SIZE(e350_devices)); | ||
227 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
228 | } | ||
229 | |||
230 | MACHINE_START(E350, "Toshiba e350") | ||
231 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
232 | .phys_io = 0x40000000, | ||
233 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
234 | .boot_params = 0xa0000100, | ||
235 | .map_io = pxa_map_io, | ||
236 | .init_irq = pxa25x_init_irq, | ||
237 | .fixup = eseries_fixup, | ||
238 | .init_machine = e350_init, | ||
239 | .timer = &pxa_timer, | ||
240 | MACHINE_END | ||
241 | #endif | ||
242 | |||
243 | #ifdef CONFIG_MACH_E400 | ||
244 | /* ------------------------ E400 LCD definitions ------------------------ */ | ||
245 | |||
246 | static struct pxafb_mode_info e400_pxafb_mode_info = { | ||
247 | .pixclock = 140703, | ||
248 | .xres = 240, | ||
249 | .yres = 320, | ||
250 | .bpp = 16, | ||
251 | .hsync_len = 4, | ||
252 | .left_margin = 28, | ||
253 | .right_margin = 8, | ||
254 | .vsync_len = 3, | ||
255 | .upper_margin = 5, | ||
256 | .lower_margin = 6, | ||
257 | .sync = 0, | ||
258 | }; | ||
259 | |||
260 | static struct pxafb_mach_info e400_pxafb_mach_info = { | ||
261 | .modes = &e400_pxafb_mode_info, | ||
262 | .num_modes = 1, | ||
263 | .lcd_conn = LCD_COLOR_TFT_16BPP, | ||
264 | .lccr3 = 0, | ||
265 | .pxafb_backlight_power = NULL, | ||
266 | }; | ||
267 | |||
268 | /* ------------------------ E400 MFP config ----------------------------- */ | ||
269 | |||
270 | static unsigned long e400_pin_config[] __initdata = { | ||
271 | /* Chip selects */ | ||
272 | GPIO15_nCS_1, /* CS1 - Flash */ | ||
273 | GPIO80_nCS_4, /* CS4 - TMIO */ | ||
274 | |||
275 | /* Clocks */ | ||
276 | GPIO12_32KHz, | ||
277 | |||
278 | /* BTUART */ | ||
279 | GPIO42_BTUART_RXD, | ||
280 | GPIO43_BTUART_TXD, | ||
281 | GPIO44_BTUART_CTS, | ||
282 | |||
283 | /* TMIO controller */ | ||
284 | GPIO19_GPIO, /* t7l66xb #PCLR */ | ||
285 | GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */ | ||
286 | |||
287 | /* wakeup */ | ||
288 | GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, | ||
289 | }; | ||
290 | |||
291 | /* ---------------------------------------------------------------------- */ | ||
292 | |||
293 | static struct mtd_partition partition_a = { | ||
294 | .name = "Internal NAND flash", | ||
295 | .offset = 0, | ||
296 | .size = MTDPART_SIZ_FULL, | ||
297 | }; | ||
298 | |||
299 | static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; | ||
300 | |||
301 | static struct nand_bbt_descr e400_t7l66xb_nand_bbt = { | ||
302 | .options = 0, | ||
303 | .offs = 4, | ||
304 | .len = 2, | ||
305 | .pattern = scan_ff_pattern | ||
306 | }; | ||
307 | |||
308 | static struct tmio_nand_data e400_t7l66xb_nand_config = { | ||
309 | .num_partitions = 1, | ||
310 | .partition = &partition_a, | ||
311 | .badblock_pattern = &e400_t7l66xb_nand_bbt, | ||
312 | }; | ||
313 | |||
314 | static struct t7l66xb_platform_data e400_t7l66xb_info = { | ||
315 | .irq_base = IRQ_BOARD_START, | ||
316 | .enable = &eseries_tmio_enable, | ||
317 | .suspend = &eseries_tmio_suspend, | ||
318 | .resume = &eseries_tmio_resume, | ||
319 | |||
320 | .nand_data = &e400_t7l66xb_nand_config, | ||
321 | }; | ||
322 | |||
323 | static struct platform_device e400_t7l66xb_device = { | ||
324 | .name = "t7l66xb", | ||
325 | .id = -1, | ||
326 | .dev = { | ||
327 | .platform_data = &e400_t7l66xb_info, | ||
328 | }, | ||
329 | .num_resources = 2, | ||
330 | .resource = eseries_tmio_resources, | ||
331 | }; | ||
332 | |||
333 | /* ---------------------------------------------------------- */ | ||
334 | |||
335 | static struct platform_device *e400_devices[] __initdata = { | ||
336 | &e400_t7l66xb_device, | ||
337 | }; | ||
338 | |||
339 | static void __init e400_init(void) | ||
340 | { | ||
341 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config)); | ||
342 | pxa_set_ffuart_info(NULL); | ||
343 | pxa_set_btuart_info(NULL); | ||
344 | pxa_set_stuart_info(NULL); | ||
345 | /* Fixme - e400 may have a switched clock */ | ||
346 | eseries_register_clks(); | ||
347 | eseries_get_tmio_gpios(); | ||
348 | set_pxa_fb_info(&e400_pxafb_mach_info); | ||
349 | platform_add_devices(ARRAY_AND_SIZE(e400_devices)); | ||
350 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
351 | } | ||
352 | |||
353 | MACHINE_START(E400, "Toshiba e400") | ||
354 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
355 | .phys_io = 0x40000000, | ||
356 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
357 | .boot_params = 0xa0000100, | ||
358 | .map_io = pxa_map_io, | ||
359 | .init_irq = pxa25x_init_irq, | ||
360 | .fixup = eseries_fixup, | ||
361 | .init_machine = e400_init, | ||
362 | .timer = &pxa_timer, | ||
363 | MACHINE_END | ||
364 | #endif | ||
365 | |||
366 | #ifdef CONFIG_MACH_E740 | ||
367 | /* ------------------------ e740 video support --------------------------- */ | ||
368 | |||
369 | static struct w100_gen_regs e740_lcd_regs = { | ||
370 | .lcd_format = 0x00008023, | ||
371 | .lcdd_cntl1 = 0x0f000000, | ||
372 | .lcdd_cntl2 = 0x0003ffff, | ||
373 | .genlcd_cntl1 = 0x00ffff03, | ||
374 | .genlcd_cntl2 = 0x003c0f03, | ||
375 | .genlcd_cntl3 = 0x000143aa, | ||
376 | }; | ||
377 | |||
378 | static struct w100_mode e740_lcd_mode = { | ||
379 | .xres = 240, | ||
380 | .yres = 320, | ||
381 | .left_margin = 20, | ||
382 | .right_margin = 28, | ||
383 | .upper_margin = 9, | ||
384 | .lower_margin = 8, | ||
385 | .crtc_ss = 0x80140013, | ||
386 | .crtc_ls = 0x81150110, | ||
387 | .crtc_gs = 0x80050005, | ||
388 | .crtc_vpos_gs = 0x000a0009, | ||
389 | .crtc_rev = 0x0040010a, | ||
390 | .crtc_dclk = 0xa906000a, | ||
391 | .crtc_gclk = 0x80050108, | ||
392 | .crtc_goe = 0x80050108, | ||
393 | .pll_freq = 57, | ||
394 | .pixclk_divider = 4, | ||
395 | .pixclk_divider_rotated = 4, | ||
396 | .pixclk_src = CLK_SRC_XTAL, | ||
397 | .sysclk_divider = 1, | ||
398 | .sysclk_src = CLK_SRC_PLL, | ||
399 | .crtc_ps1_active = 0x41060010, | ||
400 | }; | ||
401 | |||
402 | static struct w100_gpio_regs e740_w100_gpio_info = { | ||
403 | .init_data1 = 0x21002103, | ||
404 | .gpio_dir1 = 0xffffdeff, | ||
405 | .gpio_oe1 = 0x03c00643, | ||
406 | .init_data2 = 0x003f003f, | ||
407 | .gpio_dir2 = 0xffffffff, | ||
408 | .gpio_oe2 = 0x000000ff, | ||
409 | }; | ||
410 | |||
411 | static struct w100fb_mach_info e740_fb_info = { | ||
412 | .modelist = &e740_lcd_mode, | ||
413 | .num_modes = 1, | ||
414 | .regs = &e740_lcd_regs, | ||
415 | .gpio = &e740_w100_gpio_info, | ||
416 | .xtal_freq = 14318000, | ||
417 | .xtal_dbl = 1, | ||
418 | }; | ||
419 | |||
420 | static struct resource e740_fb_resources[] = { | ||
421 | [0] = { | ||
422 | .start = 0x0c000000, | ||
423 | .end = 0x0cffffff, | ||
424 | .flags = IORESOURCE_MEM, | ||
425 | }, | ||
426 | }; | ||
427 | |||
428 | static struct platform_device e740_fb_device = { | ||
429 | .name = "w100fb", | ||
430 | .id = -1, | ||
431 | .dev = { | ||
432 | .platform_data = &e740_fb_info, | ||
433 | }, | ||
434 | .num_resources = ARRAY_SIZE(e740_fb_resources), | ||
435 | .resource = e740_fb_resources, | ||
436 | }; | ||
437 | |||
438 | /* --------------------------- MFP Pin config -------------------------- */ | ||
439 | |||
440 | static unsigned long e740_pin_config[] __initdata = { | ||
441 | /* Chip selects */ | ||
442 | GPIO15_nCS_1, /* CS1 - Flash */ | ||
443 | GPIO79_nCS_3, /* CS3 - IMAGEON */ | ||
444 | GPIO80_nCS_4, /* CS4 - TMIO */ | ||
445 | |||
446 | /* Clocks */ | ||
447 | GPIO12_32KHz, | ||
448 | |||
449 | /* BTUART */ | ||
450 | GPIO42_BTUART_RXD, | ||
451 | GPIO43_BTUART_TXD, | ||
452 | GPIO44_BTUART_CTS, | ||
453 | |||
454 | /* TMIO controller */ | ||
455 | GPIO19_GPIO, /* t7l66xb #PCLR */ | ||
456 | GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */ | ||
457 | |||
458 | /* UDC */ | ||
459 | GPIO13_GPIO, | ||
460 | GPIO3_GPIO, | ||
461 | |||
462 | /* IrDA */ | ||
463 | GPIO38_GPIO | MFP_LPM_DRIVE_HIGH, | ||
464 | |||
465 | /* AC97 */ | ||
466 | GPIO28_AC97_BITCLK, | ||
467 | GPIO29_AC97_SDATA_IN_0, | ||
468 | GPIO30_AC97_SDATA_OUT, | ||
469 | GPIO31_AC97_SYNC, | ||
470 | |||
471 | /* Audio power control */ | ||
472 | GPIO16_GPIO, /* AC97 codec AVDD2 supply (analogue power) */ | ||
473 | GPIO40_GPIO, /* Mic amp power */ | ||
474 | GPIO41_GPIO, /* Headphone amp power */ | ||
475 | |||
476 | /* PC Card */ | ||
477 | GPIO8_GPIO, /* CD0 */ | ||
478 | GPIO44_GPIO, /* CD1 */ | ||
479 | GPIO11_GPIO, /* IRQ0 */ | ||
480 | GPIO6_GPIO, /* IRQ1 */ | ||
481 | GPIO27_GPIO, /* RST0 */ | ||
482 | GPIO24_GPIO, /* RST1 */ | ||
483 | GPIO20_GPIO, /* PWR0 */ | ||
484 | GPIO23_GPIO, /* PWR1 */ | ||
485 | GPIO48_nPOE, | ||
486 | GPIO49_nPWE, | ||
487 | GPIO50_nPIOR, | ||
488 | GPIO51_nPIOW, | ||
489 | GPIO52_nPCE_1, | ||
490 | GPIO53_nPCE_2, | ||
491 | GPIO54_nPSKTSEL, | ||
492 | GPIO55_nPREG, | ||
493 | GPIO56_nPWAIT, | ||
494 | GPIO57_nIOIS16, | ||
495 | |||
496 | /* wakeup */ | ||
497 | GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, | ||
498 | }; | ||
499 | |||
500 | /* -------------------- e740 t7l66xb parameters -------------------- */ | ||
501 | |||
502 | static struct t7l66xb_platform_data e740_t7l66xb_info = { | ||
503 | .irq_base = IRQ_BOARD_START, | ||
504 | .enable = &eseries_tmio_enable, | ||
505 | .suspend = &eseries_tmio_suspend, | ||
506 | .resume = &eseries_tmio_resume, | ||
507 | }; | ||
508 | |||
509 | static struct platform_device e740_t7l66xb_device = { | ||
510 | .name = "t7l66xb", | ||
511 | .id = -1, | ||
512 | .dev = { | ||
513 | .platform_data = &e740_t7l66xb_info, | ||
514 | }, | ||
515 | .num_resources = 2, | ||
516 | .resource = eseries_tmio_resources, | ||
517 | }; | ||
518 | |||
519 | /* ----------------------------------------------------------------------- */ | ||
520 | |||
521 | static struct platform_device *e740_devices[] __initdata = { | ||
522 | &e740_fb_device, | ||
523 | &e740_t7l66xb_device, | ||
524 | }; | ||
525 | |||
526 | static void __init e740_init(void) | ||
527 | { | ||
528 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config)); | ||
529 | pxa_set_ffuart_info(NULL); | ||
530 | pxa_set_btuart_info(NULL); | ||
531 | pxa_set_stuart_info(NULL); | ||
532 | eseries_register_clks(); | ||
533 | clk_add_alias("CLK_CK48M", e740_t7l66xb_device.name, | ||
534 | "UDCCLK", &pxa25x_device_udc.dev), | ||
535 | eseries_get_tmio_gpios(); | ||
536 | platform_add_devices(ARRAY_AND_SIZE(e740_devices)); | ||
537 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
538 | pxa_set_ac97_info(NULL); | ||
539 | pxa_set_ficp_info(&e7xx_ficp_platform_data); | ||
540 | } | ||
541 | |||
542 | MACHINE_START(E740, "Toshiba e740") | ||
543 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
544 | .phys_io = 0x40000000, | ||
545 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
546 | .boot_params = 0xa0000100, | ||
547 | .map_io = pxa_map_io, | ||
548 | .init_irq = pxa25x_init_irq, | ||
549 | .fixup = eseries_fixup, | ||
550 | .init_machine = e740_init, | ||
551 | .timer = &pxa_timer, | ||
552 | MACHINE_END | ||
553 | #endif | ||
554 | |||
555 | #ifdef CONFIG_MACH_E750 | ||
556 | /* ---------------------- E750 LCD definitions -------------------- */ | ||
557 | |||
558 | static struct w100_gen_regs e750_lcd_regs = { | ||
559 | .lcd_format = 0x00008003, | ||
560 | .lcdd_cntl1 = 0x00000000, | ||
561 | .lcdd_cntl2 = 0x0003ffff, | ||
562 | .genlcd_cntl1 = 0x00fff003, | ||
563 | .genlcd_cntl2 = 0x003c0f03, | ||
564 | .genlcd_cntl3 = 0x000143aa, | ||
565 | }; | ||
566 | |||
567 | static struct w100_mode e750_lcd_mode = { | ||
568 | .xres = 240, | ||
569 | .yres = 320, | ||
570 | .left_margin = 21, | ||
571 | .right_margin = 22, | ||
572 | .upper_margin = 5, | ||
573 | .lower_margin = 4, | ||
574 | .crtc_ss = 0x80150014, | ||
575 | .crtc_ls = 0x8014000d, | ||
576 | .crtc_gs = 0xc1000005, | ||
577 | .crtc_vpos_gs = 0x00020147, | ||
578 | .crtc_rev = 0x0040010a, | ||
579 | .crtc_dclk = 0xa1700030, | ||
580 | .crtc_gclk = 0x80cc0015, | ||
581 | .crtc_goe = 0x80cc0015, | ||
582 | .crtc_ps1_active = 0x61060017, | ||
583 | .pll_freq = 57, | ||
584 | .pixclk_divider = 4, | ||
585 | .pixclk_divider_rotated = 4, | ||
586 | .pixclk_src = CLK_SRC_XTAL, | ||
587 | .sysclk_divider = 1, | ||
588 | .sysclk_src = CLK_SRC_PLL, | ||
589 | }; | ||
590 | |||
591 | static struct w100_gpio_regs e750_w100_gpio_info = { | ||
592 | .init_data1 = 0x01192f1b, | ||
593 | .gpio_dir1 = 0xd5ffdeff, | ||
594 | .gpio_oe1 = 0x000020bf, | ||
595 | .init_data2 = 0x010f010f, | ||
596 | .gpio_dir2 = 0xffffffff, | ||
597 | .gpio_oe2 = 0x000001cf, | ||
598 | }; | ||
599 | |||
600 | static struct w100fb_mach_info e750_fb_info = { | ||
601 | .modelist = &e750_lcd_mode, | ||
602 | .num_modes = 1, | ||
603 | .regs = &e750_lcd_regs, | ||
604 | .gpio = &e750_w100_gpio_info, | ||
605 | .xtal_freq = 14318000, | ||
606 | .xtal_dbl = 1, | ||
607 | }; | ||
608 | |||
609 | static struct resource e750_fb_resources[] = { | ||
610 | [0] = { | ||
611 | .start = 0x0c000000, | ||
612 | .end = 0x0cffffff, | ||
613 | .flags = IORESOURCE_MEM, | ||
614 | }, | ||
615 | }; | ||
616 | |||
617 | static struct platform_device e750_fb_device = { | ||
618 | .name = "w100fb", | ||
619 | .id = -1, | ||
620 | .dev = { | ||
621 | .platform_data = &e750_fb_info, | ||
622 | }, | ||
623 | .num_resources = ARRAY_SIZE(e750_fb_resources), | ||
624 | .resource = e750_fb_resources, | ||
625 | }; | ||
626 | |||
627 | /* -------------------- e750 MFP parameters -------------------- */ | ||
628 | |||
629 | static unsigned long e750_pin_config[] __initdata = { | ||
630 | /* Chip selects */ | ||
631 | GPIO15_nCS_1, /* CS1 - Flash */ | ||
632 | GPIO79_nCS_3, /* CS3 - IMAGEON */ | ||
633 | GPIO80_nCS_4, /* CS4 - TMIO */ | ||
634 | |||
635 | /* Clocks */ | ||
636 | GPIO11_3_6MHz, | ||
637 | |||
638 | /* BTUART */ | ||
639 | GPIO42_BTUART_RXD, | ||
640 | GPIO43_BTUART_TXD, | ||
641 | GPIO44_BTUART_CTS, | ||
642 | |||
643 | /* TMIO controller */ | ||
644 | GPIO19_GPIO, /* t7l66xb #PCLR */ | ||
645 | GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */ | ||
646 | |||
647 | /* UDC */ | ||
648 | GPIO13_GPIO, | ||
649 | GPIO3_GPIO, | ||
650 | |||
651 | /* IrDA */ | ||
652 | GPIO38_GPIO | MFP_LPM_DRIVE_HIGH, | ||
653 | |||
654 | /* AC97 */ | ||
655 | GPIO28_AC97_BITCLK, | ||
656 | GPIO29_AC97_SDATA_IN_0, | ||
657 | GPIO30_AC97_SDATA_OUT, | ||
658 | GPIO31_AC97_SYNC, | ||
659 | |||
660 | /* Audio power control */ | ||
661 | GPIO4_GPIO, /* Headphone amp power */ | ||
662 | GPIO7_GPIO, /* Speaker amp power */ | ||
663 | GPIO37_GPIO, /* Headphone detect */ | ||
664 | |||
665 | /* PC Card */ | ||
666 | GPIO8_GPIO, /* CD0 */ | ||
667 | GPIO44_GPIO, /* CD1 */ | ||
668 | GPIO11_GPIO, /* IRQ0 */ | ||
669 | GPIO6_GPIO, /* IRQ1 */ | ||
670 | GPIO27_GPIO, /* RST0 */ | ||
671 | GPIO24_GPIO, /* RST1 */ | ||
672 | GPIO20_GPIO, /* PWR0 */ | ||
673 | GPIO23_GPIO, /* PWR1 */ | ||
674 | GPIO48_nPOE, | ||
675 | GPIO49_nPWE, | ||
676 | GPIO50_nPIOR, | ||
677 | GPIO51_nPIOW, | ||
678 | GPIO52_nPCE_1, | ||
679 | GPIO53_nPCE_2, | ||
680 | GPIO54_nPSKTSEL, | ||
681 | GPIO55_nPREG, | ||
682 | GPIO56_nPWAIT, | ||
683 | GPIO57_nIOIS16, | ||
684 | |||
685 | /* wakeup */ | ||
686 | GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, | ||
687 | }; | ||
688 | |||
689 | /* ----------------- e750 tc6393xb parameters ------------------ */ | ||
690 | |||
691 | static struct tc6393xb_platform_data e750_tc6393xb_info = { | ||
692 | .irq_base = IRQ_BOARD_START, | ||
693 | .scr_pll2cr = 0x0cc1, | ||
694 | .scr_gper = 0, | ||
695 | .gpio_base = -1, | ||
696 | .suspend = &eseries_tmio_suspend, | ||
697 | .resume = &eseries_tmio_resume, | ||
698 | .enable = &eseries_tmio_enable, | ||
699 | .disable = &eseries_tmio_disable, | ||
700 | }; | ||
701 | |||
702 | static struct platform_device e750_tc6393xb_device = { | ||
703 | .name = "tc6393xb", | ||
704 | .id = -1, | ||
705 | .dev = { | ||
706 | .platform_data = &e750_tc6393xb_info, | ||
707 | }, | ||
708 | .num_resources = 2, | ||
709 | .resource = eseries_tmio_resources, | ||
710 | }; | ||
711 | |||
712 | /* ------------------------------------------------------------- */ | ||
713 | |||
714 | static struct platform_device *e750_devices[] __initdata = { | ||
715 | &e750_fb_device, | ||
716 | &e750_tc6393xb_device, | ||
717 | }; | ||
718 | |||
719 | static void __init e750_init(void) | ||
720 | { | ||
721 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e750_pin_config)); | ||
722 | pxa_set_ffuart_info(NULL); | ||
723 | pxa_set_btuart_info(NULL); | ||
724 | pxa_set_stuart_info(NULL); | ||
725 | clk_add_alias("CLK_CK3P6MI", e750_tc6393xb_device.name, | ||
726 | "GPIO11_CLK", NULL), | ||
727 | eseries_get_tmio_gpios(); | ||
728 | platform_add_devices(ARRAY_AND_SIZE(e750_devices)); | ||
729 | pxa_set_udc_info(&e7xx_udc_mach_info); | ||
730 | pxa_set_ac97_info(NULL); | ||
731 | pxa_set_ficp_info(&e7xx_ficp_platform_data); | ||
732 | } | ||
733 | |||
734 | MACHINE_START(E750, "Toshiba e750") | ||
735 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
736 | .phys_io = 0x40000000, | ||
737 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
738 | .boot_params = 0xa0000100, | ||
739 | .map_io = pxa_map_io, | ||
740 | .init_irq = pxa25x_init_irq, | ||
741 | .fixup = eseries_fixup, | ||
742 | .init_machine = e750_init, | ||
743 | .timer = &pxa_timer, | ||
744 | MACHINE_END | ||
745 | #endif | ||
746 | |||
747 | #ifdef CONFIG_MACH_E800 | ||
748 | /* ------------------------ e800 LCD definitions ------------------------- */ | ||
749 | |||
750 | static unsigned long e800_pin_config[] __initdata = { | ||
751 | /* AC97 */ | ||
752 | GPIO28_AC97_BITCLK, | ||
753 | GPIO29_AC97_SDATA_IN_0, | ||
754 | GPIO30_AC97_SDATA_OUT, | ||
755 | GPIO31_AC97_SYNC, | ||
756 | }; | ||
757 | |||
758 | static struct w100_gen_regs e800_lcd_regs = { | ||
759 | .lcd_format = 0x00008003, | ||
760 | .lcdd_cntl1 = 0x02a00000, | ||
761 | .lcdd_cntl2 = 0x0003ffff, | ||
762 | .genlcd_cntl1 = 0x000ff2a3, | ||
763 | .genlcd_cntl2 = 0x000002a3, | ||
764 | .genlcd_cntl3 = 0x000102aa, | ||
765 | }; | ||
766 | |||
767 | static struct w100_mode e800_lcd_mode[2] = { | ||
768 | [0] = { | ||
769 | .xres = 480, | ||
770 | .yres = 640, | ||
771 | .left_margin = 52, | ||
772 | .right_margin = 148, | ||
773 | .upper_margin = 2, | ||
774 | .lower_margin = 6, | ||
775 | .crtc_ss = 0x80350034, | ||
776 | .crtc_ls = 0x802b0026, | ||
777 | .crtc_gs = 0x80160016, | ||
778 | .crtc_vpos_gs = 0x00020003, | ||
779 | .crtc_rev = 0x0040001d, | ||
780 | .crtc_dclk = 0xe0000000, | ||
781 | .crtc_gclk = 0x82a50049, | ||
782 | .crtc_goe = 0x80ee001c, | ||
783 | .crtc_ps1_active = 0x00000000, | ||
784 | .pll_freq = 128, | ||
785 | .pixclk_divider = 4, | ||
786 | .pixclk_divider_rotated = 6, | ||
787 | .pixclk_src = CLK_SRC_PLL, | ||
788 | .sysclk_divider = 0, | ||
789 | .sysclk_src = CLK_SRC_PLL, | ||
790 | }, | ||
791 | [1] = { | ||
792 | .xres = 240, | ||
793 | .yres = 320, | ||
794 | .left_margin = 15, | ||
795 | .right_margin = 88, | ||
796 | .upper_margin = 0, | ||
797 | .lower_margin = 7, | ||
798 | .crtc_ss = 0xd010000f, | ||
799 | .crtc_ls = 0x80070003, | ||
800 | .crtc_gs = 0x80000000, | ||
801 | .crtc_vpos_gs = 0x01460147, | ||
802 | .crtc_rev = 0x00400003, | ||
803 | .crtc_dclk = 0xa1700030, | ||
804 | .crtc_gclk = 0x814b0008, | ||
805 | .crtc_goe = 0x80cc0015, | ||
806 | .crtc_ps1_active = 0x00000000, | ||
807 | .pll_freq = 100, | ||
808 | .pixclk_divider = 6, /* Wince uses 14 which gives a */ | ||
809 | .pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */ | ||
810 | .pixclk_src = CLK_SRC_PLL, | ||
811 | .sysclk_divider = 0, | ||
812 | .sysclk_src = CLK_SRC_PLL, | ||
813 | } | ||
814 | }; | ||
815 | |||
816 | |||
817 | static struct w100_gpio_regs e800_w100_gpio_info = { | ||
818 | .init_data1 = 0xc13fc019, | ||
819 | .gpio_dir1 = 0x3e40df7f, | ||
820 | .gpio_oe1 = 0x003c3000, | ||
821 | .init_data2 = 0x00000000, | ||
822 | .gpio_dir2 = 0x00000000, | ||
823 | .gpio_oe2 = 0x00000000, | ||
824 | }; | ||
825 | |||
826 | static struct w100_mem_info e800_w100_mem_info = { | ||
827 | .ext_cntl = 0x09640011, | ||
828 | .sdram_mode_reg = 0x00600021, | ||
829 | .ext_timing_cntl = 0x10001545, | ||
830 | .io_cntl = 0x7ddd7333, | ||
831 | .size = 0x1fffff, | ||
832 | }; | ||
833 | |||
834 | static void e800_tg_change(struct w100fb_par *par) | ||
835 | { | ||
836 | unsigned long tmp; | ||
837 | |||
838 | tmp = w100fb_gpio_read(W100_GPIO_PORT_A); | ||
839 | if (par->mode->xres == 480) | ||
840 | tmp |= 0x100; | ||
841 | else | ||
842 | tmp &= ~0x100; | ||
843 | w100fb_gpio_write(W100_GPIO_PORT_A, tmp); | ||
844 | } | ||
845 | |||
846 | static struct w100_tg_info e800_tg_info = { | ||
847 | .change = e800_tg_change, | ||
848 | }; | ||
849 | |||
850 | static struct w100fb_mach_info e800_fb_info = { | ||
851 | .modelist = e800_lcd_mode, | ||
852 | .num_modes = 2, | ||
853 | .regs = &e800_lcd_regs, | ||
854 | .gpio = &e800_w100_gpio_info, | ||
855 | .mem = &e800_w100_mem_info, | ||
856 | .tg = &e800_tg_info, | ||
857 | .xtal_freq = 16000000, | ||
858 | }; | ||
859 | |||
860 | static struct resource e800_fb_resources[] = { | ||
861 | [0] = { | ||
862 | .start = 0x0c000000, | ||
863 | .end = 0x0cffffff, | ||
864 | .flags = IORESOURCE_MEM, | ||
865 | }, | ||
866 | }; | ||
867 | |||
868 | static struct platform_device e800_fb_device = { | ||
869 | .name = "w100fb", | ||
870 | .id = -1, | ||
871 | .dev = { | ||
872 | .platform_data = &e800_fb_info, | ||
873 | }, | ||
874 | .num_resources = ARRAY_SIZE(e800_fb_resources), | ||
875 | .resource = e800_fb_resources, | ||
876 | }; | ||
877 | |||
878 | /* --------------------------- UDC definitions --------------------------- */ | ||
879 | |||
880 | static struct pxa2xx_udc_mach_info e800_udc_mach_info = { | ||
881 | .gpio_vbus = GPIO_E800_USB_DISC, | ||
882 | .gpio_pullup = GPIO_E800_USB_PULLUP, | ||
883 | .gpio_pullup_inverted = 1 | ||
884 | }; | ||
885 | |||
886 | /* ----------------- e800 tc6393xb parameters ------------------ */ | ||
887 | |||
888 | static struct tc6393xb_platform_data e800_tc6393xb_info = { | ||
889 | .irq_base = IRQ_BOARD_START, | ||
890 | .scr_pll2cr = 0x0cc1, | ||
891 | .scr_gper = 0, | ||
892 | .gpio_base = -1, | ||
893 | .suspend = &eseries_tmio_suspend, | ||
894 | .resume = &eseries_tmio_resume, | ||
895 | .enable = &eseries_tmio_enable, | ||
896 | .disable = &eseries_tmio_disable, | ||
897 | }; | ||
898 | |||
899 | static struct platform_device e800_tc6393xb_device = { | ||
900 | .name = "tc6393xb", | ||
901 | .id = -1, | ||
902 | .dev = { | ||
903 | .platform_data = &e800_tc6393xb_info, | ||
904 | }, | ||
905 | .num_resources = 2, | ||
906 | .resource = eseries_tmio_resources, | ||
907 | }; | ||
908 | |||
909 | /* ----------------------------------------------------------------------- */ | ||
910 | |||
911 | static struct platform_device *e800_devices[] __initdata = { | ||
912 | &e800_fb_device, | ||
913 | &e800_tc6393xb_device, | ||
914 | }; | ||
915 | |||
916 | static void __init e800_init(void) | ||
917 | { | ||
918 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e800_pin_config)); | ||
919 | pxa_set_ffuart_info(NULL); | ||
920 | pxa_set_btuart_info(NULL); | ||
921 | pxa_set_stuart_info(NULL); | ||
922 | clk_add_alias("CLK_CK3P6MI", e800_tc6393xb_device.name, | ||
923 | "GPIO11_CLK", NULL), | ||
924 | eseries_get_tmio_gpios(); | ||
925 | platform_add_devices(ARRAY_AND_SIZE(e800_devices)); | ||
926 | pxa_set_udc_info(&e800_udc_mach_info); | ||
927 | pxa_set_ac97_info(NULL); | ||
928 | } | ||
929 | |||
930 | MACHINE_START(E800, "Toshiba e800") | ||
931 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
932 | .phys_io = 0x40000000, | ||
933 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
934 | .boot_params = 0xa0000100, | ||
935 | .map_io = pxa_map_io, | ||
936 | .init_irq = pxa25x_init_irq, | ||
937 | .fixup = eseries_fixup, | ||
938 | .init_machine = e800_init, | ||
939 | .timer = &pxa_timer, | ||
940 | MACHINE_END | ||
941 | #endif | ||
diff --git a/arch/arm/mach-pxa/imote2.c b/arch/arm/mach-pxa/imote2.c deleted file mode 100644 index 5161dca8ccc0..000000000000 --- a/arch/arm/mach-pxa/imote2.c +++ /dev/null | |||
@@ -1,590 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-pxa/imote2.c | ||
3 | * | ||
4 | * Author: Ed C. Epp | ||
5 | * Created: Nov 05, 2002 | ||
6 | * Copyright: Intel Corp. | ||
7 | * | ||
8 | * Modified 2008: Jonathan Cameron | ||
9 | * | ||
10 | * The Imote2 is a wireless sensor node platform sold | ||
11 | * by Crossbow (www.xbow.com). | ||
12 | */ | ||
13 | |||
14 | #include <linux/init.h> | ||
15 | #include <linux/device.h> | ||
16 | #include <linux/mtd/mtd.h> | ||
17 | #include <linux/mtd/partitions.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/regulator/machine.h> | ||
20 | #include <linux/gpio.h> | ||
21 | #include <linux/leds.h> | ||
22 | #include <linux/spi/spi.h> | ||
23 | #include <linux/i2c.h> | ||
24 | #include <linux/mfd/da903x.h> | ||
25 | #include <linux/sht15.h> | ||
26 | |||
27 | #include <asm/mach-types.h> | ||
28 | #include <asm/mach/arch.h> | ||
29 | #include <asm/mach/map.h> | ||
30 | #include <asm/mach/flash.h> | ||
31 | |||
32 | #include <mach/pxa27x.h> | ||
33 | #include <plat/i2c.h> | ||
34 | #include <mach/udc.h> | ||
35 | #include <mach/mmc.h> | ||
36 | #include <mach/pxa2xx_spi.h> | ||
37 | #include <mach/pxa27x-udc.h> | ||
38 | |||
39 | #include "devices.h" | ||
40 | #include "generic.h" | ||
41 | |||
42 | static unsigned long imote2_pin_config[] __initdata = { | ||
43 | |||
44 | /* Device Identification for wakeup*/ | ||
45 | GPIO102_GPIO, | ||
46 | |||
47 | /* Button */ | ||
48 | GPIO91_GPIO, | ||
49 | |||
50 | /* DA9030 */ | ||
51 | GPIO1_GPIO, | ||
52 | |||
53 | /* MMC */ | ||
54 | GPIO32_MMC_CLK, | ||
55 | GPIO112_MMC_CMD, | ||
56 | GPIO92_MMC_DAT_0, | ||
57 | GPIO109_MMC_DAT_1, | ||
58 | GPIO110_MMC_DAT_2, | ||
59 | GPIO111_MMC_DAT_3, | ||
60 | |||
61 | /* 802.15.4 radio - driver out of mainline */ | ||
62 | GPIO22_GPIO, /* CC_RSTN */ | ||
63 | GPIO114_GPIO, /* CC_FIFO */ | ||
64 | GPIO116_GPIO, /* CC_CCA */ | ||
65 | GPIO0_GPIO, /* CC_FIFOP */ | ||
66 | GPIO16_GPIO, /* CCSFD */ | ||
67 | GPIO115_GPIO, /* Power enable */ | ||
68 | |||
69 | /* I2C */ | ||
70 | GPIO117_I2C_SCL, | ||
71 | GPIO118_I2C_SDA, | ||
72 | |||
73 | /* SSP 3 - 802.15.4 radio */ | ||
74 | GPIO39_GPIO, /* Chip Select */ | ||
75 | GPIO34_SSP3_SCLK, | ||
76 | GPIO35_SSP3_TXD, | ||
77 | GPIO41_SSP3_RXD, | ||
78 | |||
79 | /* SSP 2 - to daughter boards */ | ||
80 | GPIO37_GPIO, /* Chip Select */ | ||
81 | GPIO36_SSP2_SCLK, | ||
82 | GPIO38_SSP2_TXD, | ||
83 | GPIO11_SSP2_RXD, | ||
84 | |||
85 | /* SSP 1 - to daughter boards */ | ||
86 | GPIO24_GPIO, /* Chip Select */ | ||
87 | GPIO23_SSP1_SCLK, | ||
88 | GPIO25_SSP1_TXD, | ||
89 | GPIO26_SSP1_RXD, | ||
90 | |||
91 | /* BTUART Basic Connector*/ | ||
92 | GPIO42_BTUART_RXD, | ||
93 | GPIO43_BTUART_TXD, | ||
94 | GPIO44_BTUART_CTS, | ||
95 | GPIO45_BTUART_RTS, | ||
96 | |||
97 | /* STUART Serial console via debug board*/ | ||
98 | GPIO46_STUART_RXD, | ||
99 | GPIO47_STUART_TXD, | ||
100 | |||
101 | /* Basic sensor board */ | ||
102 | GPIO96_GPIO, /* accelerometer interrupt */ | ||
103 | GPIO99_GPIO, /* ADC interrupt */ | ||
104 | |||
105 | /* SHT15 */ | ||
106 | GPIO100_GPIO, | ||
107 | GPIO98_GPIO, | ||
108 | |||
109 | /* Connector pins specified as gpios */ | ||
110 | GPIO94_GPIO, /* large basic connector pin 14 */ | ||
111 | GPIO10_GPIO, /* large basic connector pin 23 */ | ||
112 | |||
113 | /* LEDS */ | ||
114 | GPIO103_GPIO, /* red led */ | ||
115 | GPIO104_GPIO, /* green led */ | ||
116 | GPIO105_GPIO, /* blue led */ | ||
117 | }; | ||
118 | |||
119 | static struct sht15_platform_data platform_data_sht15 = { | ||
120 | .gpio_data = 100, | ||
121 | .gpio_sck = 98, | ||
122 | }; | ||
123 | |||
124 | static struct platform_device sht15 = { | ||
125 | .name = "sht15", | ||
126 | .id = -1, | ||
127 | .dev = { | ||
128 | .platform_data = &platform_data_sht15, | ||
129 | }, | ||
130 | }; | ||
131 | |||
132 | static struct regulator_consumer_supply imote2_sensor_3_con[] = { | ||
133 | { | ||
134 | .dev = &sht15.dev, | ||
135 | .supply = "vcc", | ||
136 | }, | ||
137 | }; | ||
138 | |||
139 | static struct gpio_led imote2_led_pins[] = { | ||
140 | { | ||
141 | .name = "imote2:red", | ||
142 | .gpio = 103, | ||
143 | .active_low = 1, | ||
144 | }, { | ||
145 | .name = "imote2:green", | ||
146 | .gpio = 104, | ||
147 | .active_low = 1, | ||
148 | }, { | ||
149 | .name = "imote2:blue", | ||
150 | .gpio = 105, | ||
151 | .active_low = 1, | ||
152 | }, | ||
153 | }; | ||
154 | |||
155 | static struct gpio_led_platform_data imote2_led_data = { | ||
156 | .num_leds = ARRAY_SIZE(imote2_led_pins), | ||
157 | .leds = imote2_led_pins, | ||
158 | }; | ||
159 | |||
160 | static struct platform_device imote2_leds = { | ||
161 | .name = "leds-gpio", | ||
162 | .id = -1, | ||
163 | .dev = { | ||
164 | .platform_data = &imote2_led_data, | ||
165 | }, | ||
166 | }; | ||
167 | |||
168 | /* Reverse engineered partly from Platformx drivers */ | ||
169 | enum imote2_ldos{ | ||
170 | vcc_vref, | ||
171 | vcc_cc2420, | ||
172 | vcc_mica, | ||
173 | vcc_bt, | ||
174 | /* The two voltages available to sensor boards */ | ||
175 | vcc_sensor_1_8, | ||
176 | vcc_sensor_3, | ||
177 | |||
178 | vcc_sram_ext, /* directly connected to the pxa271 */ | ||
179 | vcc_pxa_pll, | ||
180 | vcc_pxa_usim, /* Reference voltage for certain gpios */ | ||
181 | vcc_pxa_mem, | ||
182 | vcc_pxa_flash, | ||
183 | vcc_pxa_core, /*Dc-Dc buck not yet supported */ | ||
184 | vcc_lcd, | ||
185 | vcc_bb, | ||
186 | vcc_bbio, | ||
187 | vcc_io, /* cc2420 802.15.4 radio and pxa vcc_io ?*/ | ||
188 | }; | ||
189 | |||
190 | /* The values of the various regulator constraints are obviously dependent | ||
191 | * on exactly what is wired to each ldo. Unfortunately this information is | ||
192 | * not generally available. More information has been requested from Xbow | ||
193 | * but as of yet they haven't been forthcoming. | ||
194 | * | ||
195 | * Some of these are clearly Stargate 2 related (no way of plugging | ||
196 | * in an lcd on the IM2 for example!). | ||
197 | */ | ||
198 | static struct regulator_init_data imote2_ldo_init_data[] = { | ||
199 | [vcc_bbio] = { | ||
200 | .constraints = { /* board default 1.8V */ | ||
201 | .name = "vcc_bbio", | ||
202 | .min_uV = 1800000, | ||
203 | .max_uV = 1800000, | ||
204 | }, | ||
205 | }, | ||
206 | [vcc_bb] = { | ||
207 | .constraints = { /* board default 2.8V */ | ||
208 | .name = "vcc_bb", | ||
209 | .min_uV = 2700000, | ||
210 | .max_uV = 3000000, | ||
211 | }, | ||
212 | }, | ||
213 | [vcc_pxa_flash] = { | ||
214 | .constraints = {/* default is 1.8V */ | ||
215 | .name = "vcc_pxa_flash", | ||
216 | .min_uV = 1800000, | ||
217 | .max_uV = 1800000, | ||
218 | }, | ||
219 | }, | ||
220 | [vcc_cc2420] = { /* also vcc_io */ | ||
221 | .constraints = { | ||
222 | /* board default is 2.8V */ | ||
223 | .name = "vcc_cc2420", | ||
224 | .min_uV = 2700000, | ||
225 | .max_uV = 3300000, | ||
226 | }, | ||
227 | }, | ||
228 | [vcc_vref] = { /* Reference for what? */ | ||
229 | .constraints = { /* default 1.8V */ | ||
230 | .name = "vcc_vref", | ||
231 | .min_uV = 1800000, | ||
232 | .max_uV = 1800000, | ||
233 | }, | ||
234 | }, | ||
235 | [vcc_sram_ext] = { | ||
236 | .constraints = { /* default 2.8V */ | ||
237 | .name = "vcc_sram_ext", | ||
238 | .min_uV = 2800000, | ||
239 | .max_uV = 2800000, | ||
240 | }, | ||
241 | }, | ||
242 | [vcc_mica] = { | ||
243 | .constraints = { /* default 2.8V */ | ||
244 | .name = "vcc_mica", | ||
245 | .min_uV = 2800000, | ||
246 | .max_uV = 2800000, | ||
247 | }, | ||
248 | }, | ||
249 | [vcc_bt] = { | ||
250 | .constraints = { /* default 2.8V */ | ||
251 | .name = "vcc_bt", | ||
252 | .min_uV = 2800000, | ||
253 | .max_uV = 2800000, | ||
254 | }, | ||
255 | }, | ||
256 | [vcc_lcd] = { | ||
257 | .constraints = { /* default 2.8V */ | ||
258 | .name = "vcc_lcd", | ||
259 | .min_uV = 2700000, | ||
260 | .max_uV = 3300000, | ||
261 | }, | ||
262 | }, | ||
263 | [vcc_io] = { /* Same or higher than everything | ||
264 | * bar vccbat and vccusb */ | ||
265 | .constraints = { /* default 2.8V */ | ||
266 | .name = "vcc_io", | ||
267 | .min_uV = 2692000, | ||
268 | .max_uV = 3300000, | ||
269 | }, | ||
270 | }, | ||
271 | [vcc_sensor_1_8] = { | ||
272 | .constraints = { /* default 1.8V */ | ||
273 | .name = "vcc_sensor_1_8", | ||
274 | .min_uV = 1800000, | ||
275 | .max_uV = 1800000, | ||
276 | }, | ||
277 | }, | ||
278 | [vcc_sensor_3] = { /* curiously default 2.8V */ | ||
279 | .constraints = { | ||
280 | .name = "vcc_sensor_3", | ||
281 | .min_uV = 2800000, | ||
282 | .max_uV = 3000000, | ||
283 | }, | ||
284 | .num_consumer_supplies = ARRAY_SIZE(imote2_sensor_3_con), | ||
285 | .consumer_supplies = imote2_sensor_3_con, | ||
286 | }, | ||
287 | [vcc_pxa_pll] = { /* 1.17V - 1.43V, default 1.3V*/ | ||
288 | .constraints = { | ||
289 | .name = "vcc_pxa_pll", | ||
290 | .min_uV = 1170000, | ||
291 | .max_uV = 1430000, | ||
292 | }, | ||
293 | }, | ||
294 | [vcc_pxa_usim] = { | ||
295 | .constraints = { /* default 1.8V */ | ||
296 | .name = "vcc_pxa_usim", | ||
297 | .min_uV = 1710000, | ||
298 | .max_uV = 2160000, | ||
299 | }, | ||
300 | }, | ||
301 | [vcc_pxa_mem] = { | ||
302 | .constraints = { /* default 1.8V */ | ||
303 | .name = "vcc_pxa_mem", | ||
304 | .min_uV = 1800000, | ||
305 | .max_uV = 1800000, | ||
306 | }, | ||
307 | }, | ||
308 | }; | ||
309 | |||
310 | static struct da903x_subdev_info imote2_da9030_subdevs[] = { | ||
311 | { | ||
312 | .name = "da903x-regulator", | ||
313 | .id = DA9030_ID_LDO2, | ||
314 | .platform_data = &imote2_ldo_init_data[vcc_bbio], | ||
315 | }, { | ||
316 | .name = "da903x-regulator", | ||
317 | .id = DA9030_ID_LDO3, | ||
318 | .platform_data = &imote2_ldo_init_data[vcc_bb], | ||
319 | }, { | ||
320 | .name = "da903x-regulator", | ||
321 | .id = DA9030_ID_LDO4, | ||
322 | .platform_data = &imote2_ldo_init_data[vcc_pxa_flash], | ||
323 | }, { | ||
324 | .name = "da903x-regulator", | ||
325 | .id = DA9030_ID_LDO5, | ||
326 | .platform_data = &imote2_ldo_init_data[vcc_cc2420], | ||
327 | }, { | ||
328 | .name = "da903x-regulator", | ||
329 | .id = DA9030_ID_LDO6, | ||
330 | .platform_data = &imote2_ldo_init_data[vcc_vref], | ||
331 | }, { | ||
332 | .name = "da903x-regulator", | ||
333 | .id = DA9030_ID_LDO7, | ||
334 | .platform_data = &imote2_ldo_init_data[vcc_sram_ext], | ||
335 | }, { | ||
336 | .name = "da903x-regulator", | ||
337 | .id = DA9030_ID_LDO8, | ||
338 | .platform_data = &imote2_ldo_init_data[vcc_mica], | ||
339 | }, { | ||
340 | .name = "da903x-regulator", | ||
341 | .id = DA9030_ID_LDO9, | ||
342 | .platform_data = &imote2_ldo_init_data[vcc_bt], | ||
343 | }, { | ||
344 | .name = "da903x-regulator", | ||
345 | .id = DA9030_ID_LDO10, | ||
346 | .platform_data = &imote2_ldo_init_data[vcc_sensor_1_8], | ||
347 | }, { | ||
348 | .name = "da903x-regulator", | ||
349 | .id = DA9030_ID_LDO11, | ||
350 | .platform_data = &imote2_ldo_init_data[vcc_sensor_3], | ||
351 | }, { | ||
352 | .name = "da903x-regulator", | ||
353 | .id = DA9030_ID_LDO12, | ||
354 | .platform_data = &imote2_ldo_init_data[vcc_lcd], | ||
355 | }, { | ||
356 | .name = "da903x-regulator", | ||
357 | .id = DA9030_ID_LDO15, | ||
358 | .platform_data = &imote2_ldo_init_data[vcc_pxa_pll], | ||
359 | }, { | ||
360 | .name = "da903x-regulator", | ||
361 | .id = DA9030_ID_LDO17, | ||
362 | .platform_data = &imote2_ldo_init_data[vcc_pxa_usim], | ||
363 | }, { | ||
364 | .name = "da903x-regulator", | ||
365 | .id = DA9030_ID_LDO18, | ||
366 | .platform_data = &imote2_ldo_init_data[vcc_io], | ||
367 | }, { | ||
368 | .name = "da903x-regulator", | ||
369 | .id = DA9030_ID_LDO19, | ||
370 | .platform_data = &imote2_ldo_init_data[vcc_pxa_mem], | ||
371 | }, | ||
372 | }; | ||
373 | |||
374 | static struct da903x_platform_data imote2_da9030_pdata = { | ||
375 | .num_subdevs = ARRAY_SIZE(imote2_da9030_subdevs), | ||
376 | .subdevs = imote2_da9030_subdevs, | ||
377 | }; | ||
378 | |||
379 | /* As the the imote2 doesn't currently have a conventional SD slot | ||
380 | * there is no option to hotplug cards, making all this rather simple | ||
381 | */ | ||
382 | static int imote2_mci_get_ro(struct device *dev) | ||
383 | { | ||
384 | return 0; | ||
385 | } | ||
386 | |||
387 | /* Rather simple case as hotplugging not possible */ | ||
388 | static struct pxamci_platform_data imote2_mci_platform_data = { | ||
389 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* default anyway */ | ||
390 | .get_ro = imote2_mci_get_ro, | ||
391 | .gpio_card_detect = -1, | ||
392 | .gpio_card_ro = -1, | ||
393 | .gpio_power = -1, | ||
394 | }; | ||
395 | |||
396 | static struct mtd_partition imote2flash_partitions[] = { | ||
397 | { | ||
398 | .name = "Bootloader", | ||
399 | .size = 0x00040000, | ||
400 | .offset = 0, | ||
401 | .mask_flags = MTD_WRITEABLE, | ||
402 | }, { | ||
403 | .name = "Kernel", | ||
404 | .size = 0x00200000, | ||
405 | .offset = 0x00040000, | ||
406 | .mask_flags = 0, | ||
407 | }, { | ||
408 | .name = "Filesystem", | ||
409 | .size = 0x01DC0000, | ||
410 | .offset = 0x00240000, | ||
411 | .mask_flags = 0, | ||
412 | }, | ||
413 | }; | ||
414 | |||
415 | static struct resource flash_resources = { | ||
416 | .start = PXA_CS0_PHYS, | ||
417 | .end = PXA_CS0_PHYS + SZ_32M - 1, | ||
418 | .flags = IORESOURCE_MEM, | ||
419 | }; | ||
420 | |||
421 | static struct flash_platform_data imote2_flash_data = { | ||
422 | .map_name = "cfi_probe", | ||
423 | .parts = imote2flash_partitions, | ||
424 | .nr_parts = ARRAY_SIZE(imote2flash_partitions), | ||
425 | .name = "PXA27xOnChipROM", | ||
426 | .width = 2, | ||
427 | }; | ||
428 | |||
429 | static struct platform_device imote2_flash_device = { | ||
430 | .name = "pxa2xx-flash", | ||
431 | .id = 0, | ||
432 | .dev = { | ||
433 | .platform_data = &imote2_flash_data, | ||
434 | }, | ||
435 | .resource = &flash_resources, | ||
436 | .num_resources = 1, | ||
437 | }; | ||
438 | |||
439 | /* Some of the drivers here are out of kernel at the moment (parts of IIO) | ||
440 | * and it may be a while before they are in the mainline. | ||
441 | */ | ||
442 | static struct i2c_board_info __initdata imote2_i2c_board_info[] = { | ||
443 | { /* UCAM sensor board */ | ||
444 | .type = "max1239", | ||
445 | .addr = 0x35, | ||
446 | }, { /* ITS400 Sensor board only */ | ||
447 | .type = "max1363", | ||
448 | .addr = 0x34, | ||
449 | /* Through a nand gate - Also beware, on V2 sensor board the | ||
450 | * pull up resistors are missing. | ||
451 | */ | ||
452 | .irq = IRQ_GPIO(99), | ||
453 | }, { /* ITS400 Sensor board only */ | ||
454 | .type = "tsl2561", | ||
455 | .addr = 0x49, | ||
456 | /* Through a nand gate - Also beware, on V2 sensor board the | ||
457 | * pull up resistors are missing. | ||
458 | */ | ||
459 | .irq = IRQ_GPIO(99), | ||
460 | }, { /* ITS400 Sensor board only */ | ||
461 | .type = "tmp175", | ||
462 | .addr = 0x4A, | ||
463 | .irq = IRQ_GPIO(96), | ||
464 | }, { /* IMB400 Multimedia board */ | ||
465 | .type = "wm8940", | ||
466 | .addr = 0x1A, | ||
467 | }, | ||
468 | }; | ||
469 | |||
470 | static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = { | ||
471 | { | ||
472 | .type = "da9030", | ||
473 | .addr = 0x49, | ||
474 | .platform_data = &imote2_da9030_pdata, | ||
475 | .irq = gpio_to_irq(1), | ||
476 | }, | ||
477 | }; | ||
478 | |||
479 | static struct pxa2xx_spi_master pxa_ssp_master_0_info = { | ||
480 | .num_chipselect = 1, | ||
481 | }; | ||
482 | |||
483 | static struct pxa2xx_spi_master pxa_ssp_master_1_info = { | ||
484 | .num_chipselect = 1, | ||
485 | }; | ||
486 | |||
487 | static struct pxa2xx_spi_master pxa_ssp_master_2_info = { | ||
488 | .num_chipselect = 1, | ||
489 | }; | ||
490 | |||
491 | static struct pxa2xx_spi_chip staccel_chip_info = { | ||
492 | .tx_threshold = 8, | ||
493 | .rx_threshold = 8, | ||
494 | .dma_burst_size = 8, | ||
495 | .timeout = 235, | ||
496 | .gpio_cs = 24, | ||
497 | }; | ||
498 | |||
499 | static struct pxa2xx_spi_chip cc2420_info = { | ||
500 | .tx_threshold = 8, | ||
501 | .rx_threshold = 8, | ||
502 | .dma_burst_size = 8, | ||
503 | .timeout = 235, | ||
504 | .gpio_cs = 39, | ||
505 | }; | ||
506 | |||
507 | static struct spi_board_info spi_board_info[] __initdata = { | ||
508 | { /* Driver in IIO */ | ||
509 | .modalias = "lis3l02dq", | ||
510 | .max_speed_hz = 8000000,/* 8MHz max spi frequency at 3V */ | ||
511 | .bus_num = 1, | ||
512 | .chip_select = 0, | ||
513 | .controller_data = &staccel_chip_info, | ||
514 | .irq = IRQ_GPIO(96), | ||
515 | }, { /* Driver out of kernel as it needs considerable rewriting */ | ||
516 | .modalias = "cc2420", | ||
517 | .max_speed_hz = 6500000, | ||
518 | .bus_num = 3, | ||
519 | .chip_select = 0, | ||
520 | .controller_data = &cc2420_info, | ||
521 | }, | ||
522 | }; | ||
523 | |||
524 | static void im2_udc_command(int cmd) | ||
525 | { | ||
526 | switch (cmd) { | ||
527 | case PXA2XX_UDC_CMD_CONNECT: | ||
528 | UP2OCR |= UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE; | ||
529 | break; | ||
530 | case PXA2XX_UDC_CMD_DISCONNECT: | ||
531 | UP2OCR &= ~(UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE); | ||
532 | break; | ||
533 | } | ||
534 | } | ||
535 | |||
536 | static struct pxa2xx_udc_mach_info imote2_udc_info __initdata = { | ||
537 | .udc_command = im2_udc_command, | ||
538 | }; | ||
539 | |||
540 | static struct platform_device *imote2_devices[] = { | ||
541 | &imote2_flash_device, | ||
542 | &imote2_leds, | ||
543 | &sht15, | ||
544 | }; | ||
545 | |||
546 | static struct i2c_pxa_platform_data i2c_pwr_pdata = { | ||
547 | .fast_mode = 1, | ||
548 | }; | ||
549 | |||
550 | static struct i2c_pxa_platform_data i2c_pdata = { | ||
551 | .fast_mode = 1, | ||
552 | }; | ||
553 | |||
554 | static void __init imote2_init(void) | ||
555 | { | ||
556 | pxa2xx_mfp_config(ARRAY_AND_SIZE(imote2_pin_config)); | ||
557 | |||
558 | pxa_set_ffuart_info(NULL); | ||
559 | pxa_set_btuart_info(NULL); | ||
560 | pxa_set_stuart_info(NULL); | ||
561 | |||
562 | platform_add_devices(imote2_devices, ARRAY_SIZE(imote2_devices)); | ||
563 | |||
564 | pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info); | ||
565 | pxa2xx_set_spi_info(2, &pxa_ssp_master_1_info); | ||
566 | pxa2xx_set_spi_info(3, &pxa_ssp_master_2_info); | ||
567 | |||
568 | spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); | ||
569 | |||
570 | i2c_register_board_info(0, imote2_i2c_board_info, | ||
571 | ARRAY_SIZE(imote2_i2c_board_info)); | ||
572 | i2c_register_board_info(1, imote2_pwr_i2c_board_info, | ||
573 | ARRAY_SIZE(imote2_pwr_i2c_board_info)); | ||
574 | |||
575 | pxa27x_set_i2c_power_info(&i2c_pwr_pdata); | ||
576 | pxa_set_i2c_info(&i2c_pdata); | ||
577 | |||
578 | pxa_set_mci_info(&imote2_mci_platform_data); | ||
579 | pxa_set_udc_info(&imote2_udc_info); | ||
580 | } | ||
581 | |||
582 | MACHINE_START(INTELMOTE2, "IMOTE 2") | ||
583 | .phys_io = 0x40000000, | ||
584 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
585 | .map_io = pxa_map_io, | ||
586 | .init_irq = pxa27x_init_irq, | ||
587 | .timer = &pxa_timer, | ||
588 | .init_machine = imote2_init, | ||
589 | .boot_params = 0xA0000100, | ||
590 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h index 1a741065045f..eec92e6fd7cf 100644 --- a/arch/arm/mach-pxa/include/mach/balloon3.h +++ b/arch/arm/mach-pxa/include/mach/balloon3.h | |||
@@ -26,21 +26,55 @@ enum balloon3_features { | |||
26 | #define BALLOON3_FPGA_VIRT (0xf1000000) /* as per balloon2 */ | 26 | #define BALLOON3_FPGA_VIRT (0xf1000000) /* as per balloon2 */ |
27 | #define BALLOON3_FPGA_LENGTH 0x01000000 | 27 | #define BALLOON3_FPGA_LENGTH 0x01000000 |
28 | 28 | ||
29 | /* FPGA/CPLD registers */ | 29 | /* FPGA / CPLD registers for CF socket */ |
30 | #define BALLOON3_PCMCIA0_REG (BALLOON3_FPGA_VIRT + 0x00e00008) | 30 | #define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008) |
31 | /* fixme - same for now */ | 31 | #define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008) |
32 | #define BALLOON3_PCMCIA1_REG (BALLOON3_FPGA_VIRT + 0x00e00008) | 32 | /* FPGA / CPLD version register */ |
33 | #define BALLOON3_NANDIO_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000) | 33 | #define BALLOON3_FPGA_VER (BALLOON3_FPGA_VIRT + 0x00e0001c) |
34 | /* FPGA / CPLD registers for NAND flash */ | ||
35 | #define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000) | ||
36 | #define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000) | ||
37 | #define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010) | ||
38 | #define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00010) | ||
39 | #define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014) | ||
40 | |||
34 | /* fpga/cpld interrupt control register */ | 41 | /* fpga/cpld interrupt control register */ |
35 | #define BALLOON3_INT_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e0000C) | 42 | #define BALLOON3_INT_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e0000C) |
36 | #define BALLOON3_NANDIO_CTL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010) | ||
37 | #define BALLOON3_NANDIO_CTL_REG (BALLOON3_FPGA_VIRT + 0x00e00014) | ||
38 | #define BALLOON3_VERSION_REG (BALLOON3_FPGA_VIRT + 0x00e0001c) | 43 | #define BALLOON3_VERSION_REG (BALLOON3_FPGA_VIRT + 0x00e0001c) |
39 | 44 | ||
40 | #define BALLOON3_SAMOSA_ADDR_REG (BALLOON3_FPGA_VIRT + 0x00c00000) | 45 | #define BALLOON3_SAMOSA_ADDR_REG (BALLOON3_FPGA_VIRT + 0x00c00000) |
41 | #define BALLOON3_SAMOSA_DATA_REG (BALLOON3_FPGA_VIRT + 0x00c00004) | 46 | #define BALLOON3_SAMOSA_DATA_REG (BALLOON3_FPGA_VIRT + 0x00c00004) |
42 | #define BALLOON3_SAMOSA_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00c0001c) | 47 | #define BALLOON3_SAMOSA_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00c0001c) |
43 | 48 | ||
49 | /* CF Status Register bits (read-only) bits */ | ||
50 | #define BALLOON3_CF_nIRQ (1 << 0) | ||
51 | #define BALLOON3_CF_nSTSCHG_BVD1 (1 << 1) | ||
52 | |||
53 | /* CF Control Set Register bits / CF Control Clear Register bits (write-only) */ | ||
54 | #define BALLOON3_CF_RESET (1 << 0) | ||
55 | #define BALLOON3_CF_ENABLE (1 << 1) | ||
56 | #define BALLOON3_CF_ADD_ENABLE (1 << 2) | ||
57 | |||
58 | /* CF Interrupt sources */ | ||
59 | #define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0) | ||
60 | #define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1) | ||
61 | |||
62 | /* NAND Control register */ | ||
63 | #define BALLOON3_NAND_CONTROL_FLWP (1 << 7) | ||
64 | #define BALLOON3_NAND_CONTROL_FLSE (1 << 6) | ||
65 | #define BALLOON3_NAND_CONTROL_FLCE3 (1 << 5) | ||
66 | #define BALLOON3_NAND_CONTROL_FLCE2 (1 << 4) | ||
67 | #define BALLOON3_NAND_CONTROL_FLCE1 (1 << 3) | ||
68 | #define BALLOON3_NAND_CONTROL_FLCE0 (1 << 2) | ||
69 | #define BALLOON3_NAND_CONTROL_FLALE (1 << 1) | ||
70 | #define BALLOON3_NAND_CONTROL_FLCLE (1 << 0) | ||
71 | |||
72 | /* NAND Status register */ | ||
73 | #define BALLOON3_NAND_STAT_RNB (1 << 0) | ||
74 | |||
75 | /* NAND Control2 register */ | ||
76 | #define BALLOON3_NAND_CONTROL2_16BIT (1 << 0) | ||
77 | |||
44 | /* GPIOs for irqs */ | 78 | /* GPIOs for irqs */ |
45 | #define BALLOON3_GPIO_AUX_NIRQ (94) | 79 | #define BALLOON3_GPIO_AUX_NIRQ (94) |
46 | #define BALLOON3_GPIO_CODEC_IRQ (95) | 80 | #define BALLOON3_GPIO_CODEC_IRQ (95) |
@@ -54,20 +88,24 @@ enum balloon3_features { | |||
54 | 88 | ||
55 | #define BALLOON3_GPIO_S0_CD (105) | 89 | #define BALLOON3_GPIO_S0_CD (105) |
56 | 90 | ||
91 | /* NAND */ | ||
92 | #define BALLOON3_GPIO_RUN_NAND (102) | ||
93 | |||
94 | /* PCF8574A Leds */ | ||
95 | #define BALLOON3_PCF_GPIO_BASE 160 | ||
96 | #define BALLOON3_PCF_GPIO_LED0 (BALLOON3_PCF_GPIO_BASE + 0) | ||
97 | #define BALLOON3_PCF_GPIO_LED1 (BALLOON3_PCF_GPIO_BASE + 1) | ||
98 | #define BALLOON3_PCF_GPIO_LED2 (BALLOON3_PCF_GPIO_BASE + 2) | ||
99 | #define BALLOON3_PCF_GPIO_LED3 (BALLOON3_PCF_GPIO_BASE + 3) | ||
100 | #define BALLOON3_PCF_GPIO_LED4 (BALLOON3_PCF_GPIO_BASE + 4) | ||
101 | #define BALLOON3_PCF_GPIO_LED5 (BALLOON3_PCF_GPIO_BASE + 5) | ||
102 | #define BALLOON3_PCF_GPIO_LED6 (BALLOON3_PCF_GPIO_BASE + 6) | ||
103 | #define BALLOON3_PCF_GPIO_LED7 (BALLOON3_PCF_GPIO_BASE + 7) | ||
104 | |||
57 | /* FPGA Interrupt Mask/Acknowledge Register */ | 105 | /* FPGA Interrupt Mask/Acknowledge Register */ |
58 | #define BALLOON3_INT_S0_IRQ (1 << 0) /* PCMCIA 0 IRQ */ | 106 | #define BALLOON3_INT_S0_IRQ (1 << 0) /* PCMCIA 0 IRQ */ |
59 | #define BALLOON3_INT_S0_STSCHG (1 << 1) /* PCMCIA 0 status changed */ | 107 | #define BALLOON3_INT_S0_STSCHG (1 << 1) /* PCMCIA 0 status changed */ |
60 | 108 | ||
61 | /* CF Status Register */ | ||
62 | #define BALLOON3_PCMCIA_nIRQ (1 << 0) /* IRQ / ready signal */ | ||
63 | #define BALLOON3_PCMCIA_nSTSCHG_BVD1 (1 << 1) | ||
64 | /* VDD sense / card status changed */ | ||
65 | |||
66 | /* CF control register (write) */ | ||
67 | #define BALLOON3_PCMCIA_RESET (1 << 0) /* Card reset signal */ | ||
68 | #define BALLOON3_PCMCIA_ENABLE (1 << 1) | ||
69 | #define BALLOON3_PCMCIA_ADD_ENABLE (1 << 2) | ||
70 | |||
71 | /* CPLD (and FPGA) interface definitions */ | 109 | /* CPLD (and FPGA) interface definitions */ |
72 | #define CPLD_LCD0_DATA_SET 0x00 | 110 | #define CPLD_LCD0_DATA_SET 0x00 |
73 | #define CPLD_LCD0_DATA_CLR 0x10 | 111 | #define CPLD_LCD0_DATA_CLR 0x10 |
@@ -132,9 +170,6 @@ enum balloon3_features { | |||
132 | /* Balloon3 Interrupts */ | 170 | /* Balloon3 Interrupts */ |
133 | #define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) | 171 | #define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) |
134 | 172 | ||
135 | #define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0) | ||
136 | #define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1) | ||
137 | |||
138 | #define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ) | 173 | #define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ) |
139 | #define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ) | 174 | #define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ) |
140 | #define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD) | 175 | #define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD) |
diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h index 5f2ba8d9015c..58dada11054f 100644 --- a/arch/arm/mach-pxa/include/mach/colibri.h +++ b/arch/arm/mach-pxa/include/mach/colibri.h | |||
@@ -5,6 +5,27 @@ | |||
5 | #include <mach/mfp.h> | 5 | #include <mach/mfp.h> |
6 | 6 | ||
7 | /* | 7 | /* |
8 | * base board glue for PXA270 module | ||
9 | */ | ||
10 | |||
11 | enum { | ||
12 | COLIBRI_PXA270_EVALBOARD = 0, | ||
13 | COLIBRI_PXA270_INCOME, | ||
14 | }; | ||
15 | |||
16 | #if defined(CONFIG_MACH_COLIBRI_PXA270_EVALBOARD) | ||
17 | extern void colibri_pxa270_evalboard_init(void); | ||
18 | #else | ||
19 | static inline void colibri_pxa270_evalboard_init(void) {} | ||
20 | #endif | ||
21 | |||
22 | #if defined(CONFIG_MACH_COLIBRI_PXA270_INCOME) | ||
23 | extern void colibri_pxa270_income_boardinit(void); | ||
24 | #else | ||
25 | static inline void colibri_pxa270_income_boardinit(void) {} | ||
26 | #endif | ||
27 | |||
28 | /* | ||
8 | * common settings for all modules | 29 | * common settings for all modules |
9 | */ | 30 | */ |
10 | 31 | ||
@@ -33,13 +54,10 @@ static inline void colibri_pxa3xx_init_nand(void) {} | |||
33 | /* physical memory regions */ | 54 | /* physical memory regions */ |
34 | #define COLIBRI_SDRAM_BASE 0xa0000000 /* SDRAM region */ | 55 | #define COLIBRI_SDRAM_BASE 0xa0000000 /* SDRAM region */ |
35 | 56 | ||
36 | /* definitions for Colibri PXA270 */ | 57 | /* GPIO definitions for Colibri PXA270 */ |
37 | 58 | #define GPIO114_COLIBRI_PXA270_ETH_IRQ 114 | |
38 | #define COLIBRI_PXA270_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */ | 59 | #define GPIO0_COLIBRI_PXA270_SD_DETECT 0 |
39 | #define COLIBRI_PXA270_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet */ | 60 | #define GPIO113_COLIBRI_PXA270_TS_IRQ 113 |
40 | #define COLIBRI_PXA270_ETH_IRQ_GPIO 114 | ||
41 | #define COLIBRI_PXA270_ETH_IRQ \ | ||
42 | gpio_to_irq(mfp_to_gpio(COLIBRI_PXA270_ETH_IRQ_GPIO)) | ||
43 | 61 | ||
44 | #endif /* _COLIBRI_H_ */ | 62 | #endif /* _COLIBRI_H_ */ |
45 | 63 | ||
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h index 585970ef08ce..0011055bc3f9 100644 --- a/arch/arm/mach-pxa/include/mach/corgi.h +++ b/arch/arm/mach-pxa/include/mach/corgi.h | |||
@@ -109,10 +109,5 @@ | |||
109 | #define CORGI_GPIO_BACKLIGHT_CONT (CORGI_SCOOP_GPIO_BASE + 7) | 109 | #define CORGI_GPIO_BACKLIGHT_CONT (CORGI_SCOOP_GPIO_BASE + 7) |
110 | #define CORGI_GPIO_MIC_BIAS (CORGI_SCOOP_GPIO_BASE + 8) | 110 | #define CORGI_GPIO_MIC_BIAS (CORGI_SCOOP_GPIO_BASE + 8) |
111 | 111 | ||
112 | /* | ||
113 | * Shared data structures | ||
114 | */ | ||
115 | extern struct platform_device corgiscoop_device; | ||
116 | |||
117 | #endif /* __ASM_ARCH_CORGI_H */ | 112 | #endif /* __ASM_ARCH_CORGI_H */ |
118 | 113 | ||
diff --git a/arch/arm/mach-pxa/include/mach/gumstix.h b/arch/arm/mach-pxa/include/mach/gumstix.h index 06abd4160607..9b898680b206 100644 --- a/arch/arm/mach-pxa/include/mach/gumstix.h +++ b/arch/arm/mach-pxa/include/mach/gumstix.h | |||
@@ -14,25 +14,15 @@ | |||
14 | 14 | ||
15 | /* | 15 | /* |
16 | GPIOn - Input from MAX823 (or equiv), normalizing USB +5V into a clean | 16 | GPIOn - Input from MAX823 (or equiv), normalizing USB +5V into a clean |
17 | interrupt signal for determining cable presence. On the original gumstix, | 17 | interrupt signal for determining cable presence. On the gumstix F, |
18 | this is GPIO81, and GPIO83 needs to be defined as well. On the gumstix F, | ||
19 | this moves to GPIO17 and GPIO37. */ | 18 | this moves to GPIO17 and GPIO37. */ |
20 | 19 | ||
21 | /* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn | 20 | /* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn |
22 | has detected a cable insertion; driven low otherwise. */ | 21 | has detected a cable insertion; driven low otherwise. */ |
23 | 22 | ||
24 | #ifdef CONFIG_ARCH_GUMSTIX_ORIG | ||
25 | |||
26 | #define GPIO_GUMSTIX_USB_GPIOn 81 | ||
27 | #define GPIO_GUMSTIX_USB_GPIOx 83 | ||
28 | |||
29 | #else | ||
30 | |||
31 | #define GPIO_GUMSTIX_USB_GPIOn 35 | 23 | #define GPIO_GUMSTIX_USB_GPIOn 35 |
32 | #define GPIO_GUMSTIX_USB_GPIOx 41 | 24 | #define GPIO_GUMSTIX_USB_GPIOx 41 |
33 | 25 | ||
34 | #endif | ||
35 | |||
36 | /* usb state change */ | 26 | /* usb state change */ |
37 | #define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn) | 27 | #define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn) |
38 | 28 | ||
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index 3d8d8cb09685..7f64d24cd564 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h | |||
@@ -14,11 +14,6 @@ | |||
14 | #define __ASM_ARCH_HARDWARE_H | 14 | #define __ASM_ARCH_HARDWARE_H |
15 | 15 | ||
16 | /* | 16 | /* |
17 | * We requires absolute addresses. | ||
18 | */ | ||
19 | #define PCIO_BASE 0 | ||
20 | |||
21 | /* | ||
22 | * Workarounds for at least 2 errata so far require this. | 17 | * Workarounds for at least 2 errata so far require this. |
23 | * The mapping is set in mach-pxa/generic.c. | 18 | * The mapping is set in mach-pxa/generic.c. |
24 | */ | 19 | */ |
diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h b/arch/arm/mach-pxa/include/mach/palm27x.h new file mode 100644 index 000000000000..0a5e5eadebf5 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/palm27x.h | |||
@@ -0,0 +1,81 @@ | |||
1 | /* | ||
2 | * Common functions for Palm LD, T5, TX, Z72 | ||
3 | * | ||
4 | * Copyright (C) 2010 | ||
5 | * Marek Vasut <marek.vasut@gmail.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | */ | ||
12 | #ifndef __INCLUDE_MACH_PALM27X__ | ||
13 | #define __INCLUDE_MACH_PALM27X__ | ||
14 | |||
15 | #if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) | ||
16 | extern void __init palm27x_mmc_init(int detect, int ro, int power, | ||
17 | int power_inverted); | ||
18 | #else | ||
19 | static inline void palm27x_mmc_init(int detect, int ro, int power, | ||
20 | int power_inverted) | ||
21 | {} | ||
22 | #endif | ||
23 | |||
24 | #if defined(CONFIG_SUSPEND) | ||
25 | extern void __init palm27x_pm_init(unsigned long str_base); | ||
26 | #else | ||
27 | static inline void palm27x_pm_init(unsigned long str_base) {} | ||
28 | #endif | ||
29 | |||
30 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) | ||
31 | extern struct pxafb_mode_info palm_320x480_lcd_mode; | ||
32 | extern struct pxafb_mode_info palm_320x320_lcd_mode; | ||
33 | extern struct pxafb_mode_info palm_320x320_new_lcd_mode; | ||
34 | extern void __init palm27x_lcd_init(int power, | ||
35 | struct pxafb_mode_info *mode); | ||
36 | #else | ||
37 | static inline void palm27x_lcd_init(int power, struct pxafb_mode_info *mode) {} | ||
38 | #endif | ||
39 | |||
40 | #if defined(CONFIG_USB_GADGET_PXA27X) || \ | ||
41 | defined(CONFIG_USB_GADGET_PXA27X_MODULE) | ||
42 | extern void __init palm27x_udc_init(int vbus, int pullup, | ||
43 | int vbus_inverted); | ||
44 | #else | ||
45 | static inline void palm27x_udc_init(int vbus, int pullup, int vbus_inverted) {} | ||
46 | #endif | ||
47 | |||
48 | #if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE) | ||
49 | extern void __init palm27x_irda_init(int pwdn); | ||
50 | #else | ||
51 | static inline void palm27x_irda_init(int pwdn) {} | ||
52 | #endif | ||
53 | |||
54 | #if defined(CONFIG_TOUCHSCREEN_WM97XX) || \ | ||
55 | defined(CONFIG_TOUCHSCREEN_WM97XX_MODULE) | ||
56 | extern void __init palm27x_ac97_init(int minv, int maxv, int jack, | ||
57 | int reset); | ||
58 | #else | ||
59 | static inline void palm27x_ac97_init(int minv, int maxv, int jack, int reset) {} | ||
60 | #endif | ||
61 | |||
62 | #if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE) | ||
63 | extern void __init palm27x_pwm_init(int bl, int lcd); | ||
64 | #else | ||
65 | static inline void palm27x_pwm_init(int bl, int lcd) {} | ||
66 | #endif | ||
67 | |||
68 | #if defined(CONFIG_PDA_POWER) || defined(CONFIG_PDA_POWER_MODULE) | ||
69 | extern void __init palm27x_power_init(int ac, int usb); | ||
70 | #else | ||
71 | static inline void palm27x_power_init(int ac, int usb) {} | ||
72 | #endif | ||
73 | |||
74 | #if defined(CONFIG_REGULATOR_MAX1586) || \ | ||
75 | defined(CONFIG_REGULATOR_MAX1586_MODULE) | ||
76 | extern void __init palm27x_pmic_init(void); | ||
77 | #else | ||
78 | static inline void palm27x_pmic_init(void) {} | ||
79 | #endif | ||
80 | |||
81 | #endif /* __INCLUDE_MACH_PALM27X__ */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/pata_pxa.h b/arch/arm/mach-pxa/include/mach/pata_pxa.h new file mode 100644 index 000000000000..6cf7df1d5830 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/pata_pxa.h | |||
@@ -0,0 +1,33 @@ | |||
1 | /* | ||
2 | * Generic PXA PATA driver | ||
3 | * | ||
4 | * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2, or (at your option) | ||
9 | * any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; see the file COPYING. If not, write to | ||
18 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | ||
19 | */ | ||
20 | |||
21 | #ifndef __MACH_PATA_PXA_H__ | ||
22 | #define __MACH_PATA_PXA_H__ | ||
23 | |||
24 | struct pata_pxa_pdata { | ||
25 | /* PXA DMA DREQ<0:2> pin */ | ||
26 | uint32_t dma_dreq; | ||
27 | /* Register shift */ | ||
28 | uint32_t reg_shift; | ||
29 | /* IRQ flags */ | ||
30 | uint32_t irq_flags; | ||
31 | }; | ||
32 | |||
33 | #endif /* __MACH_PATA_PXA_H__ */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/sharpsl.h b/arch/arm/mach-pxa/include/mach/sharpsl.h deleted file mode 100644 index 8242e14a44fa..000000000000 --- a/arch/arm/mach-pxa/include/mach/sharpsl.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* | ||
2 | * SharpSL SSP Driver | ||
3 | */ | ||
4 | |||
5 | unsigned long corgi_ssp_ads7846_putget(unsigned long); | ||
6 | unsigned long corgi_ssp_ads7846_get(void); | ||
7 | void corgi_ssp_ads7846_put(unsigned long data); | ||
8 | void corgi_ssp_ads7846_lock(void); | ||
9 | void corgi_ssp_ads7846_unlock(void); | ||
10 | void corgi_ssp_lcdtg_send (unsigned char adrs, unsigned char data); | ||
11 | void corgi_ssp_blduty_set(int duty); | ||
12 | int corgi_ssp_max1111_get(unsigned long data); | ||
13 | |||
14 | /* | ||
15 | * SharpSL Touchscreen Driver | ||
16 | */ | ||
17 | |||
18 | struct corgits_machinfo { | ||
19 | unsigned long (*get_hsync_invperiod)(void); | ||
20 | void (*put_hsync)(void); | ||
21 | void (*wait_hsync)(void); | ||
22 | }; | ||
23 | |||
24 | |||
25 | /* | ||
26 | * SharpSL Backlight | ||
27 | */ | ||
28 | extern void corgibl_limit_intensity(int limit); | ||
29 | extern void corgi_lcd_limit_intensity(int limit); | ||
30 | |||
31 | |||
32 | /* | ||
33 | * SharpSL Battery/PM Driver | ||
34 | */ | ||
35 | extern void sharpsl_battery_kick(void); | ||
diff --git a/arch/arm/mach-pxa/include/mach/sharpsl_pm.h b/arch/arm/mach-pxa/include/mach/sharpsl_pm.h index 1920dc6b05dc..905be6755f04 100644 --- a/arch/arm/mach-pxa/include/mach/sharpsl_pm.h +++ b/arch/arm/mach-pxa/include/mach/sharpsl_pm.h | |||
@@ -93,6 +93,8 @@ struct sharpsl_pm_status { | |||
93 | 93 | ||
94 | extern struct sharpsl_pm_status sharpsl_pm; | 94 | extern struct sharpsl_pm_status sharpsl_pm; |
95 | 95 | ||
96 | extern struct battery_thresh sharpsl_battery_levels_acin[]; | ||
97 | extern struct battery_thresh sharpsl_battery_levels_noac[]; | ||
96 | 98 | ||
97 | #define SHARPSL_LED_ERROR 2 | 99 | #define SHARPSL_LED_ERROR 2 |
98 | #define SHARPSL_LED_ON 1 | 100 | #define SHARPSL_LED_ON 1 |
@@ -101,4 +103,11 @@ extern struct sharpsl_pm_status sharpsl_pm; | |||
101 | void sharpsl_battery_kick(void); | 103 | void sharpsl_battery_kick(void); |
102 | void sharpsl_pm_led(int val); | 104 | void sharpsl_pm_led(int val); |
103 | 105 | ||
106 | /* MAX1111 Channel Definitions */ | ||
107 | #define MAX1111_BATT_VOLT 4u | ||
108 | #define MAX1111_BATT_TEMP 2u | ||
109 | #define MAX1111_ACIN_VOLT 6u | ||
110 | int sharpsl_pm_pxa_read_max1111(int channel); | ||
111 | |||
112 | void corgi_lcd_limit_intensity(int limit); | ||
104 | #endif | 113 | #endif |
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h index fa1998caa78e..685749a51c42 100644 --- a/arch/arm/mach-pxa/include/mach/spitz.h +++ b/arch/arm/mach-pxa/include/mach/spitz.h | |||
@@ -185,7 +185,5 @@ | |||
185 | /* | 185 | /* |
186 | * Shared data structures | 186 | * Shared data structures |
187 | */ | 187 | */ |
188 | extern struct platform_device spitzscoop_device; | ||
189 | extern struct platform_device spitzscoop2_device; | ||
190 | extern struct platform_device spitzssp_device; | 188 | extern struct platform_device spitzssp_device; |
191 | extern struct sharpsl_charger_machinfo spitz_pm_machinfo; | 189 | extern struct sharpsl_charger_machinfo spitz_pm_machinfo; |
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index fa6a708b4099..dc66942ef9ab 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c | |||
@@ -34,7 +34,7 @@ | |||
34 | #include <linux/irq.h> | 34 | #include <linux/irq.h> |
35 | #include <linux/pda_power.h> | 35 | #include <linux/pda_power.h> |
36 | #include <linux/power_supply.h> | 36 | #include <linux/power_supply.h> |
37 | #include <linux/wm97xx_batt.h> | 37 | #include <linux/wm97xx.h> |
38 | #include <linux/mtd/physmap.h> | 38 | #include <linux/mtd/physmap.h> |
39 | #include <linux/usb/gpio_vbus.h> | 39 | #include <linux/usb/gpio_vbus.h> |
40 | #include <linux/regulator/max1586.h> | 40 | #include <linux/regulator/max1586.h> |
@@ -636,7 +636,7 @@ static struct platform_device power_dev = { | |||
636 | }, | 636 | }, |
637 | }; | 637 | }; |
638 | 638 | ||
639 | static struct wm97xx_batt_info mioa701_battery_data = { | 639 | static struct wm97xx_batt_pdata mioa701_battery_data = { |
640 | .batt_aux = WM97XX_AUX_ID1, | 640 | .batt_aux = WM97XX_AUX_ID1, |
641 | .temp_aux = -1, | 641 | .temp_aux = -1, |
642 | .charge_gpio = -1, | 642 | .charge_gpio = -1, |
@@ -648,6 +648,10 @@ static struct wm97xx_batt_info mioa701_battery_data = { | |||
648 | .batt_name = "mioa701_battery", | 648 | .batt_name = "mioa701_battery", |
649 | }; | 649 | }; |
650 | 650 | ||
651 | static struct wm97xx_pdata mioa701_wm97xx_pdata = { | ||
652 | .batt_pdata = &mioa701_battery_data, | ||
653 | }; | ||
654 | |||
651 | /* | 655 | /* |
652 | * Voltage regulation | 656 | * Voltage regulation |
653 | */ | 657 | */ |
@@ -716,6 +720,7 @@ struct i2c_pxa_platform_data i2c_pdata = { | |||
716 | 720 | ||
717 | static pxa2xx_audio_ops_t mioa701_ac97_info = { | 721 | static pxa2xx_audio_ops_t mioa701_ac97_info = { |
718 | .reset_gpio = 95, | 722 | .reset_gpio = 95, |
723 | .codec_pdata = { &mioa701_wm97xx_pdata, }, | ||
719 | }; | 724 | }; |
720 | 725 | ||
721 | /* | 726 | /* |
@@ -794,7 +799,6 @@ static void __init mioa701_machine_init(void) | |||
794 | set_pxa_fb_info(&mioa701_pxafb_info); | 799 | set_pxa_fb_info(&mioa701_pxafb_info); |
795 | pxa_set_mci_info(&mioa701_mci_info); | 800 | pxa_set_mci_info(&mioa701_mci_info); |
796 | pxa_set_keypad_info(&mioa701_keypad_info); | 801 | pxa_set_keypad_info(&mioa701_keypad_info); |
797 | wm97xx_bat_set_pdata(&mioa701_battery_data); | ||
798 | pxa_set_udc_info(&mioa701_udc_info); | 802 | pxa_set_udc_info(&mioa701_udc_info); |
799 | pxa_set_ac97_info(&mioa701_ac97_info); | 803 | pxa_set_ac97_info(&mioa701_ac97_info); |
800 | pm_power_off = mioa701_poweroff; | 804 | pm_power_off = mioa701_poweroff; |
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c new file mode 100644 index 000000000000..77ad6d34ab5b --- /dev/null +++ b/arch/arm/mach-pxa/palm27x.c | |||
@@ -0,0 +1,477 @@ | |||
1 | /* | ||
2 | * Common code for Palm LD, T5, TX, Z72 | ||
3 | * | ||
4 | * Copyright (C) 2010 | ||
5 | * Marek Vasut <marek.vasut@gmail.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/delay.h> | ||
15 | #include <linux/irq.h> | ||
16 | #include <linux/gpio_keys.h> | ||
17 | #include <linux/input.h> | ||
18 | #include <linux/pda_power.h> | ||
19 | #include <linux/pwm_backlight.h> | ||
20 | #include <linux/gpio.h> | ||
21 | #include <linux/wm97xx.h> | ||
22 | #include <linux/power_supply.h> | ||
23 | #include <linux/usb/gpio_vbus.h> | ||
24 | #include <linux/regulator/max1586.h> | ||
25 | |||
26 | #include <asm/mach-types.h> | ||
27 | #include <asm/mach/arch.h> | ||
28 | #include <asm/mach/map.h> | ||
29 | |||
30 | #include <mach/pxa27x.h> | ||
31 | #include <mach/audio.h> | ||
32 | #include <mach/mmc.h> | ||
33 | #include <mach/pxafb.h> | ||
34 | #include <mach/irda.h> | ||
35 | #include <mach/udc.h> | ||
36 | #include <mach/palmasoc.h> | ||
37 | #include <mach/palm27x.h> | ||
38 | |||
39 | #include <plat/i2c.h> | ||
40 | |||
41 | #include "generic.h" | ||
42 | #include "devices.h" | ||
43 | |||
44 | /****************************************************************************** | ||
45 | * SD/MMC card controller | ||
46 | ******************************************************************************/ | ||
47 | #if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) | ||
48 | static struct pxamci_platform_data palm27x_mci_platform_data = { | ||
49 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
50 | .detect_delay_ms = 200, | ||
51 | }; | ||
52 | |||
53 | void __init palm27x_mmc_init(int detect, int ro, int power, | ||
54 | int power_inverted) | ||
55 | { | ||
56 | palm27x_mci_platform_data.gpio_card_detect = detect; | ||
57 | palm27x_mci_platform_data.gpio_card_ro = ro; | ||
58 | palm27x_mci_platform_data.gpio_power = power; | ||
59 | palm27x_mci_platform_data.gpio_power_invert = power_inverted; | ||
60 | |||
61 | pxa_set_mci_info(&palm27x_mci_platform_data); | ||
62 | } | ||
63 | #endif | ||
64 | |||
65 | /****************************************************************************** | ||
66 | * Power management - standby | ||
67 | ******************************************************************************/ | ||
68 | #if defined(CONFIG_SUSPEND) | ||
69 | void __init palm27x_pm_init(unsigned long str_base) | ||
70 | { | ||
71 | static const unsigned long resume[] = { | ||
72 | 0xe3a00101, /* mov r0, #0x40000000 */ | ||
73 | 0xe380060f, /* orr r0, r0, #0x00f00000 */ | ||
74 | 0xe590f008, /* ldr pc, [r0, #0x08] */ | ||
75 | }; | ||
76 | |||
77 | /* | ||
78 | * Copy the bootloader. | ||
79 | * NOTE: PalmZ72 uses a different wakeup method! | ||
80 | */ | ||
81 | memcpy(phys_to_virt(str_base), resume, sizeof(resume)); | ||
82 | } | ||
83 | #endif | ||
84 | |||
85 | /****************************************************************************** | ||
86 | * Framebuffer | ||
87 | ******************************************************************************/ | ||
88 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) | ||
89 | struct pxafb_mode_info palm_320x480_lcd_mode = { | ||
90 | .pixclock = 57692, | ||
91 | .xres = 320, | ||
92 | .yres = 480, | ||
93 | .bpp = 16, | ||
94 | |||
95 | .left_margin = 32, | ||
96 | .right_margin = 1, | ||
97 | .upper_margin = 7, | ||
98 | .lower_margin = 1, | ||
99 | |||
100 | .hsync_len = 4, | ||
101 | .vsync_len = 1, | ||
102 | }; | ||
103 | |||
104 | struct pxafb_mode_info palm_320x320_lcd_mode = { | ||
105 | .pixclock = 115384, | ||
106 | .xres = 320, | ||
107 | .yres = 320, | ||
108 | .bpp = 16, | ||
109 | |||
110 | .left_margin = 27, | ||
111 | .right_margin = 7, | ||
112 | .upper_margin = 7, | ||
113 | .lower_margin = 8, | ||
114 | |||
115 | .hsync_len = 6, | ||
116 | .vsync_len = 1, | ||
117 | }; | ||
118 | |||
119 | struct pxafb_mode_info palm_320x320_new_lcd_mode = { | ||
120 | .pixclock = 86538, | ||
121 | .xres = 320, | ||
122 | .yres = 320, | ||
123 | .bpp = 16, | ||
124 | |||
125 | .left_margin = 20, | ||
126 | .right_margin = 8, | ||
127 | .upper_margin = 8, | ||
128 | .lower_margin = 5, | ||
129 | |||
130 | .hsync_len = 4, | ||
131 | .vsync_len = 1, | ||
132 | }; | ||
133 | |||
134 | static struct pxafb_mach_info palm27x_lcd_screen = { | ||
135 | .num_modes = 1, | ||
136 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | ||
137 | }; | ||
138 | |||
139 | static int palm27x_lcd_power; | ||
140 | static void palm27x_lcd_ctl(int on, struct fb_var_screeninfo *info) | ||
141 | { | ||
142 | gpio_set_value(palm27x_lcd_power, on); | ||
143 | } | ||
144 | |||
145 | void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode) | ||
146 | { | ||
147 | palm27x_lcd_screen.modes = mode; | ||
148 | |||
149 | if (gpio_is_valid(power)) { | ||
150 | if (!gpio_request(power, "LCD power")) { | ||
151 | pr_err("Palm27x: failed to claim lcd power gpio!\n"); | ||
152 | return; | ||
153 | } | ||
154 | if (!gpio_direction_output(power, 1)) { | ||
155 | pr_err("Palm27x: lcd power configuration failed!\n"); | ||
156 | return; | ||
157 | } | ||
158 | palm27x_lcd_power = power; | ||
159 | palm27x_lcd_screen.pxafb_lcd_power = palm27x_lcd_ctl; | ||
160 | } | ||
161 | |||
162 | set_pxa_fb_info(&palm27x_lcd_screen); | ||
163 | } | ||
164 | #endif | ||
165 | |||
166 | /****************************************************************************** | ||
167 | * USB Gadget | ||
168 | ******************************************************************************/ | ||
169 | #if defined(CONFIG_USB_GADGET_PXA27X) || \ | ||
170 | defined(CONFIG_USB_GADGET_PXA27X_MODULE) | ||
171 | static struct gpio_vbus_mach_info palm27x_udc_info = { | ||
172 | .gpio_vbus_inverted = 1, | ||
173 | }; | ||
174 | |||
175 | static struct platform_device palm27x_gpio_vbus = { | ||
176 | .name = "gpio-vbus", | ||
177 | .id = -1, | ||
178 | .dev = { | ||
179 | .platform_data = &palm27x_udc_info, | ||
180 | }, | ||
181 | }; | ||
182 | |||
183 | void __init palm27x_udc_init(int vbus, int pullup, int vbus_inverted) | ||
184 | { | ||
185 | palm27x_udc_info.gpio_vbus = vbus; | ||
186 | palm27x_udc_info.gpio_pullup = pullup; | ||
187 | |||
188 | palm27x_udc_info.gpio_vbus_inverted = vbus_inverted; | ||
189 | |||
190 | if (!gpio_request(pullup, "USB Pullup")) { | ||
191 | gpio_direction_output(pullup, | ||
192 | palm27x_udc_info.gpio_vbus_inverted); | ||
193 | gpio_free(pullup); | ||
194 | } else | ||
195 | return; | ||
196 | |||
197 | platform_device_register(&palm27x_gpio_vbus); | ||
198 | } | ||
199 | #endif | ||
200 | |||
201 | /****************************************************************************** | ||
202 | * IrDA | ||
203 | ******************************************************************************/ | ||
204 | #if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE) | ||
205 | static struct pxaficp_platform_data palm27x_ficp_platform_data = { | ||
206 | .transceiver_cap = IR_SIRMODE | IR_OFF, | ||
207 | }; | ||
208 | |||
209 | void __init palm27x_irda_init(int pwdn) | ||
210 | { | ||
211 | palm27x_ficp_platform_data.gpio_pwdown = pwdn; | ||
212 | pxa_set_ficp_info(&palm27x_ficp_platform_data); | ||
213 | } | ||
214 | #endif | ||
215 | |||
216 | /****************************************************************************** | ||
217 | * WM97xx audio, battery | ||
218 | ******************************************************************************/ | ||
219 | #if defined(CONFIG_TOUCHSCREEN_WM97XX) || \ | ||
220 | defined(CONFIG_TOUCHSCREEN_WM97XX_MODULE) | ||
221 | static struct wm97xx_batt_pdata palm27x_batt_pdata = { | ||
222 | .batt_aux = WM97XX_AUX_ID3, | ||
223 | .temp_aux = WM97XX_AUX_ID2, | ||
224 | .charge_gpio = -1, | ||
225 | .batt_mult = 1000, | ||
226 | .batt_div = 414, | ||
227 | .temp_mult = 1, | ||
228 | .temp_div = 1, | ||
229 | .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO, | ||
230 | .batt_name = "main-batt", | ||
231 | }; | ||
232 | |||
233 | static struct wm97xx_pdata palm27x_wm97xx_pdata = { | ||
234 | .batt_pdata = &palm27x_batt_pdata, | ||
235 | }; | ||
236 | |||
237 | static pxa2xx_audio_ops_t palm27x_ac97_pdata = { | ||
238 | .codec_pdata = { &palm27x_wm97xx_pdata, }, | ||
239 | }; | ||
240 | |||
241 | static struct palm27x_asoc_info palm27x_asoc_pdata = { | ||
242 | .jack_gpio = -1, | ||
243 | }; | ||
244 | |||
245 | static struct platform_device palm27x_asoc = { | ||
246 | .name = "palm27x-asoc", | ||
247 | .id = -1, | ||
248 | .dev = { | ||
249 | .platform_data = &palm27x_asoc_pdata, | ||
250 | }, | ||
251 | }; | ||
252 | |||
253 | void __init palm27x_ac97_init(int minv, int maxv, int jack, int reset) | ||
254 | { | ||
255 | palm27x_ac97_pdata.reset_gpio = reset; | ||
256 | palm27x_asoc_pdata.jack_gpio = jack; | ||
257 | |||
258 | if (minv < 0 || maxv < 0) { | ||
259 | palm27x_ac97_pdata.codec_pdata[0] = NULL; | ||
260 | pxa_set_ac97_info(&palm27x_ac97_pdata); | ||
261 | } else { | ||
262 | palm27x_batt_pdata.min_voltage = minv, | ||
263 | palm27x_batt_pdata.max_voltage = maxv, | ||
264 | |||
265 | pxa_set_ac97_info(&palm27x_ac97_pdata); | ||
266 | platform_device_register(&palm27x_asoc); | ||
267 | } | ||
268 | } | ||
269 | #endif | ||
270 | |||
271 | /****************************************************************************** | ||
272 | * Backlight | ||
273 | ******************************************************************************/ | ||
274 | #if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE) | ||
275 | static int palm_bl_power; | ||
276 | static int palm_lcd_power; | ||
277 | |||
278 | static int palm27x_backlight_init(struct device *dev) | ||
279 | { | ||
280 | int ret; | ||
281 | |||
282 | ret = gpio_request(palm_bl_power, "BL POWER"); | ||
283 | if (ret) | ||
284 | goto err; | ||
285 | ret = gpio_direction_output(palm_bl_power, 0); | ||
286 | if (ret) | ||
287 | goto err2; | ||
288 | |||
289 | if (gpio_is_valid(palm_lcd_power)) { | ||
290 | ret = gpio_request(palm_lcd_power, "LCD POWER"); | ||
291 | if (ret) | ||
292 | goto err2; | ||
293 | ret = gpio_direction_output(palm_lcd_power, 0); | ||
294 | if (ret) | ||
295 | goto err3; | ||
296 | } | ||
297 | |||
298 | return 0; | ||
299 | err3: | ||
300 | gpio_free(palm_lcd_power); | ||
301 | err2: | ||
302 | gpio_free(palm_bl_power); | ||
303 | err: | ||
304 | return ret; | ||
305 | } | ||
306 | |||
307 | static int palm27x_backlight_notify(struct device *dev, int brightness) | ||
308 | { | ||
309 | gpio_set_value(palm_bl_power, brightness); | ||
310 | if (gpio_is_valid(palm_lcd_power)) | ||
311 | gpio_set_value(palm_lcd_power, brightness); | ||
312 | return brightness; | ||
313 | } | ||
314 | |||
315 | static void palm27x_backlight_exit(struct device *dev) | ||
316 | { | ||
317 | gpio_free(palm_bl_power); | ||
318 | if (gpio_is_valid(palm_lcd_power)) | ||
319 | gpio_free(palm_lcd_power); | ||
320 | } | ||
321 | |||
322 | static struct platform_pwm_backlight_data palm27x_backlight_data = { | ||
323 | .pwm_id = 0, | ||
324 | .max_brightness = 0xfe, | ||
325 | .dft_brightness = 0x7e, | ||
326 | .pwm_period_ns = 3500, | ||
327 | .init = palm27x_backlight_init, | ||
328 | .notify = palm27x_backlight_notify, | ||
329 | .exit = palm27x_backlight_exit, | ||
330 | }; | ||
331 | |||
332 | static struct platform_device palm27x_backlight = { | ||
333 | .name = "pwm-backlight", | ||
334 | .dev = { | ||
335 | .parent = &pxa27x_device_pwm0.dev, | ||
336 | .platform_data = &palm27x_backlight_data, | ||
337 | }, | ||
338 | }; | ||
339 | |||
340 | void __init palm27x_pwm_init(int bl, int lcd) | ||
341 | { | ||
342 | palm_bl_power = bl; | ||
343 | palm_lcd_power = lcd; | ||
344 | platform_device_register(&palm27x_backlight); | ||
345 | } | ||
346 | #endif | ||
347 | |||
348 | /****************************************************************************** | ||
349 | * Power supply | ||
350 | ******************************************************************************/ | ||
351 | #if defined(CONFIG_PDA_POWER) || defined(CONFIG_PDA_POWER_MODULE) | ||
352 | static int palm_ac_state; | ||
353 | static int palm_usb_state; | ||
354 | |||
355 | static int palm27x_power_supply_init(struct device *dev) | ||
356 | { | ||
357 | int ret; | ||
358 | |||
359 | ret = gpio_request(palm_ac_state, "AC state"); | ||
360 | if (ret) | ||
361 | goto err1; | ||
362 | ret = gpio_direction_input(palm_ac_state); | ||
363 | if (ret) | ||
364 | goto err2; | ||
365 | |||
366 | if (gpio_is_valid(palm_usb_state)) { | ||
367 | ret = gpio_request(palm_usb_state, "USB state"); | ||
368 | if (ret) | ||
369 | goto err2; | ||
370 | ret = gpio_direction_input(palm_usb_state); | ||
371 | if (ret) | ||
372 | goto err3; | ||
373 | } | ||
374 | |||
375 | return 0; | ||
376 | err3: | ||
377 | gpio_free(palm_usb_state); | ||
378 | err2: | ||
379 | gpio_free(palm_ac_state); | ||
380 | err1: | ||
381 | return ret; | ||
382 | } | ||
383 | |||
384 | static void palm27x_power_supply_exit(struct device *dev) | ||
385 | { | ||
386 | gpio_free(palm_usb_state); | ||
387 | gpio_free(palm_ac_state); | ||
388 | } | ||
389 | |||
390 | static int palm27x_is_ac_online(void) | ||
391 | { | ||
392 | return gpio_get_value(palm_ac_state); | ||
393 | } | ||
394 | |||
395 | static int palm27x_is_usb_online(void) | ||
396 | { | ||
397 | return !gpio_get_value(palm_usb_state); | ||
398 | } | ||
399 | static char *palm27x_supplicants[] = { | ||
400 | "main-battery", | ||
401 | }; | ||
402 | |||
403 | static struct pda_power_pdata palm27x_ps_info = { | ||
404 | .init = palm27x_power_supply_init, | ||
405 | .exit = palm27x_power_supply_exit, | ||
406 | .is_ac_online = palm27x_is_ac_online, | ||
407 | .is_usb_online = palm27x_is_usb_online, | ||
408 | .supplied_to = palm27x_supplicants, | ||
409 | .num_supplicants = ARRAY_SIZE(palm27x_supplicants), | ||
410 | }; | ||
411 | |||
412 | static struct platform_device palm27x_power_supply = { | ||
413 | .name = "pda-power", | ||
414 | .id = -1, | ||
415 | .dev = { | ||
416 | .platform_data = &palm27x_ps_info, | ||
417 | }, | ||
418 | }; | ||
419 | |||
420 | void __init palm27x_power_init(int ac, int usb) | ||
421 | { | ||
422 | palm_ac_state = ac; | ||
423 | palm_usb_state = usb; | ||
424 | platform_device_register(&palm27x_power_supply); | ||
425 | } | ||
426 | #endif | ||
427 | |||
428 | /****************************************************************************** | ||
429 | * Core power regulator | ||
430 | ******************************************************************************/ | ||
431 | #if defined(CONFIG_REGULATOR_MAX1586) || \ | ||
432 | defined(CONFIG_REGULATOR_MAX1586_MODULE) | ||
433 | static struct regulator_consumer_supply palm27x_max1587a_consumers[] = { | ||
434 | { | ||
435 | .supply = "vcc_core", | ||
436 | } | ||
437 | }; | ||
438 | |||
439 | static struct regulator_init_data palm27x_max1587a_v3_info = { | ||
440 | .constraints = { | ||
441 | .name = "vcc_core range", | ||
442 | .min_uV = 900000, | ||
443 | .max_uV = 1705000, | ||
444 | .always_on = 1, | ||
445 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
446 | }, | ||
447 | .consumer_supplies = palm27x_max1587a_consumers, | ||
448 | .num_consumer_supplies = ARRAY_SIZE(palm27x_max1587a_consumers), | ||
449 | }; | ||
450 | |||
451 | static struct max1586_subdev_data palm27x_max1587a_subdevs[] = { | ||
452 | { | ||
453 | .name = "vcc_core", | ||
454 | .id = MAX1586_V3, | ||
455 | .platform_data = &palm27x_max1587a_v3_info, | ||
456 | } | ||
457 | }; | ||
458 | |||
459 | static struct max1586_platform_data palm27x_max1587a_info = { | ||
460 | .subdevs = palm27x_max1587a_subdevs, | ||
461 | .num_subdevs = ARRAY_SIZE(palm27x_max1587a_subdevs), | ||
462 | .v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */ | ||
463 | }; | ||
464 | |||
465 | static struct i2c_board_info __initdata palm27x_pi2c_board_info[] = { | ||
466 | { | ||
467 | I2C_BOARD_INFO("max1586", 0x14), | ||
468 | .platform_data = &palm27x_max1587a_info, | ||
469 | }, | ||
470 | }; | ||
471 | |||
472 | void __init palm27x_pmic_init(void) | ||
473 | { | ||
474 | i2c_register_board_info(1, ARRAY_AND_SIZE(palm27x_pi2c_board_info)); | ||
475 | pxa27x_set_i2c_power_info(NULL); | ||
476 | } | ||
477 | #endif | ||
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c index 1963819dba98..91038eeafe44 100644 --- a/arch/arm/mach-pxa/palmld.c +++ b/arch/arm/mach-pxa/palmld.c | |||
@@ -22,7 +22,7 @@ | |||
22 | #include <linux/pda_power.h> | 22 | #include <linux/pda_power.h> |
23 | #include <linux/pwm_backlight.h> | 23 | #include <linux/pwm_backlight.h> |
24 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
25 | #include <linux/wm97xx_batt.h> | 25 | #include <linux/wm97xx.h> |
26 | #include <linux/power_supply.h> | 26 | #include <linux/power_supply.h> |
27 | #include <linux/sysdev.h> | 27 | #include <linux/sysdev.h> |
28 | #include <linux/mtd/mtd.h> | 28 | #include <linux/mtd/mtd.h> |
@@ -41,6 +41,7 @@ | |||
41 | #include <mach/irda.h> | 41 | #include <mach/irda.h> |
42 | #include <mach/pxa27x_keypad.h> | 42 | #include <mach/pxa27x_keypad.h> |
43 | #include <mach/palmasoc.h> | 43 | #include <mach/palmasoc.h> |
44 | #include <mach/palm27x.h> | ||
44 | 45 | ||
45 | #include "generic.h" | 46 | #include "generic.h" |
46 | #include "devices.h" | 47 | #include "devices.h" |
@@ -127,6 +128,7 @@ static unsigned long palmld_pin_config[] __initdata = { | |||
127 | /****************************************************************************** | 128 | /****************************************************************************** |
128 | * NOR Flash | 129 | * NOR Flash |
129 | ******************************************************************************/ | 130 | ******************************************************************************/ |
131 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) | ||
130 | static struct mtd_partition palmld_partitions[] = { | 132 | static struct mtd_partition palmld_partitions[] = { |
131 | { | 133 | { |
132 | .name = "Flash", | 134 | .name = "Flash", |
@@ -160,20 +162,18 @@ static struct platform_device palmld_flash = { | |||
160 | }, | 162 | }, |
161 | }; | 163 | }; |
162 | 164 | ||
163 | /****************************************************************************** | 165 | static void __init palmld_nor_init(void) |
164 | * SD/MMC card controller | 166 | { |
165 | ******************************************************************************/ | 167 | platform_device_register(&palmld_flash); |
166 | static struct pxamci_platform_data palmld_mci_platform_data = { | 168 | } |
167 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | 169 | #else |
168 | .gpio_card_detect = GPIO_NR_PALMLD_SD_DETECT_N, | 170 | static inline void palmld_nor_init(void) {} |
169 | .gpio_card_ro = GPIO_NR_PALMLD_SD_READONLY, | 171 | #endif |
170 | .gpio_power = GPIO_NR_PALMLD_SD_POWER, | ||
171 | .detect_delay_ms = 200, | ||
172 | }; | ||
173 | 172 | ||
174 | /****************************************************************************** | 173 | /****************************************************************************** |
175 | * GPIO keyboard | 174 | * GPIO keyboard |
176 | ******************************************************************************/ | 175 | ******************************************************************************/ |
176 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) | ||
177 | static unsigned int palmld_matrix_keys[] = { | 177 | static unsigned int palmld_matrix_keys[] = { |
178 | KEY(0, 1, KEY_F2), | 178 | KEY(0, 1, KEY_F2), |
179 | KEY(0, 2, KEY_UP), | 179 | KEY(0, 2, KEY_UP), |
@@ -200,9 +200,18 @@ static struct pxa27x_keypad_platform_data palmld_keypad_platform_data = { | |||
200 | .debounce_interval = 30, | 200 | .debounce_interval = 30, |
201 | }; | 201 | }; |
202 | 202 | ||
203 | static void __init palmld_kpc_init(void) | ||
204 | { | ||
205 | pxa_set_keypad_info(&palmld_keypad_platform_data); | ||
206 | } | ||
207 | #else | ||
208 | static inline void palmld_kpc_init(void) {} | ||
209 | #endif | ||
210 | |||
203 | /****************************************************************************** | 211 | /****************************************************************************** |
204 | * GPIO keys | 212 | * GPIO keys |
205 | ******************************************************************************/ | 213 | ******************************************************************************/ |
214 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | ||
206 | static struct gpio_keys_button palmld_pxa_buttons[] = { | 215 | static struct gpio_keys_button palmld_pxa_buttons[] = { |
207 | {KEY_F8, GPIO_NR_PALMLD_HOTSYNC_BUTTON_N, 1, "HotSync Button" }, | 216 | {KEY_F8, GPIO_NR_PALMLD_HOTSYNC_BUTTON_N, 1, "HotSync Button" }, |
208 | {KEY_F9, GPIO_NR_PALMLD_LOCK_SWITCH, 0, "Lock Switch" }, | 217 | {KEY_F9, GPIO_NR_PALMLD_LOCK_SWITCH, 0, "Lock Switch" }, |
@@ -222,77 +231,18 @@ static struct platform_device palmld_pxa_keys = { | |||
222 | }, | 231 | }, |
223 | }; | 232 | }; |
224 | 233 | ||
225 | /****************************************************************************** | 234 | static void __init palmld_keys_init(void) |
226 | * Backlight | ||
227 | ******************************************************************************/ | ||
228 | static int palmld_backlight_init(struct device *dev) | ||
229 | { | ||
230 | int ret; | ||
231 | |||
232 | ret = gpio_request(GPIO_NR_PALMLD_BL_POWER, "BL POWER"); | ||
233 | if (ret) | ||
234 | goto err; | ||
235 | ret = gpio_direction_output(GPIO_NR_PALMLD_BL_POWER, 0); | ||
236 | if (ret) | ||
237 | goto err2; | ||
238 | ret = gpio_request(GPIO_NR_PALMLD_LCD_POWER, "LCD POWER"); | ||
239 | if (ret) | ||
240 | goto err2; | ||
241 | ret = gpio_direction_output(GPIO_NR_PALMLD_LCD_POWER, 0); | ||
242 | if (ret) | ||
243 | goto err3; | ||
244 | |||
245 | return 0; | ||
246 | err3: | ||
247 | gpio_free(GPIO_NR_PALMLD_LCD_POWER); | ||
248 | err2: | ||
249 | gpio_free(GPIO_NR_PALMLD_BL_POWER); | ||
250 | err: | ||
251 | return ret; | ||
252 | } | ||
253 | |||
254 | static int palmld_backlight_notify(struct device *dev, int brightness) | ||
255 | { | 235 | { |
256 | gpio_set_value(GPIO_NR_PALMLD_BL_POWER, brightness); | 236 | platform_device_register(&palmld_pxa_keys); |
257 | gpio_set_value(GPIO_NR_PALMLD_LCD_POWER, brightness); | ||
258 | return brightness; | ||
259 | } | 237 | } |
260 | 238 | #else | |
261 | static void palmld_backlight_exit(struct device *dev) | 239 | static inline void palmld_keys_init(void) {} |
262 | { | 240 | #endif |
263 | gpio_free(GPIO_NR_PALMLD_BL_POWER); | ||
264 | gpio_free(GPIO_NR_PALMLD_LCD_POWER); | ||
265 | } | ||
266 | |||
267 | static struct platform_pwm_backlight_data palmld_backlight_data = { | ||
268 | .pwm_id = 0, | ||
269 | .max_brightness = PALMLD_MAX_INTENSITY, | ||
270 | .dft_brightness = PALMLD_MAX_INTENSITY, | ||
271 | .pwm_period_ns = PALMLD_PERIOD_NS, | ||
272 | .init = palmld_backlight_init, | ||
273 | .notify = palmld_backlight_notify, | ||
274 | .exit = palmld_backlight_exit, | ||
275 | }; | ||
276 | |||
277 | static struct platform_device palmld_backlight = { | ||
278 | .name = "pwm-backlight", | ||
279 | .dev = { | ||
280 | .parent = &pxa27x_device_pwm0.dev, | ||
281 | .platform_data = &palmld_backlight_data, | ||
282 | }, | ||
283 | }; | ||
284 | |||
285 | /****************************************************************************** | ||
286 | * IrDA | ||
287 | ******************************************************************************/ | ||
288 | static struct pxaficp_platform_data palmld_ficp_platform_data = { | ||
289 | .gpio_pwdown = GPIO_NR_PALMLD_IR_DISABLE, | ||
290 | .transceiver_cap = IR_SIRMODE | IR_OFF, | ||
291 | }; | ||
292 | 241 | ||
293 | /****************************************************************************** | 242 | /****************************************************************************** |
294 | * LEDs | 243 | * LEDs |
295 | ******************************************************************************/ | 244 | ******************************************************************************/ |
245 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | ||
296 | struct gpio_led gpio_leds[] = { | 246 | struct gpio_led gpio_leds[] = { |
297 | { | 247 | { |
298 | .name = "palmld:green:led", | 248 | .name = "palmld:green:led", |
@@ -318,174 +268,34 @@ static struct platform_device palmld_leds = { | |||
318 | } | 268 | } |
319 | }; | 269 | }; |
320 | 270 | ||
321 | /****************************************************************************** | 271 | static void __init palmld_leds_init(void) |
322 | * Power supply | ||
323 | ******************************************************************************/ | ||
324 | static int power_supply_init(struct device *dev) | ||
325 | { | ||
326 | int ret; | ||
327 | |||
328 | ret = gpio_request(GPIO_NR_PALMLD_POWER_DETECT, "CABLE_STATE_AC"); | ||
329 | if (ret) | ||
330 | goto err1; | ||
331 | ret = gpio_direction_input(GPIO_NR_PALMLD_POWER_DETECT); | ||
332 | if (ret) | ||
333 | goto err2; | ||
334 | |||
335 | ret = gpio_request(GPIO_NR_PALMLD_USB_DETECT_N, "CABLE_STATE_USB"); | ||
336 | if (ret) | ||
337 | goto err2; | ||
338 | ret = gpio_direction_input(GPIO_NR_PALMLD_USB_DETECT_N); | ||
339 | if (ret) | ||
340 | goto err3; | ||
341 | |||
342 | return 0; | ||
343 | |||
344 | err3: | ||
345 | gpio_free(GPIO_NR_PALMLD_USB_DETECT_N); | ||
346 | err2: | ||
347 | gpio_free(GPIO_NR_PALMLD_POWER_DETECT); | ||
348 | err1: | ||
349 | return ret; | ||
350 | } | ||
351 | |||
352 | static int palmld_is_ac_online(void) | ||
353 | { | 272 | { |
354 | return gpio_get_value(GPIO_NR_PALMLD_POWER_DETECT); | 273 | platform_device_register(&palmld_leds); |
355 | } | 274 | } |
356 | 275 | #else | |
357 | static int palmld_is_usb_online(void) | 276 | static inline void palmld_leds_init(void) {} |
358 | { | 277 | #endif |
359 | return !gpio_get_value(GPIO_NR_PALMLD_USB_DETECT_N); | ||
360 | } | ||
361 | |||
362 | static void power_supply_exit(struct device *dev) | ||
363 | { | ||
364 | gpio_free(GPIO_NR_PALMLD_USB_DETECT_N); | ||
365 | gpio_free(GPIO_NR_PALMLD_POWER_DETECT); | ||
366 | } | ||
367 | |||
368 | static char *palmld_supplicants[] = { | ||
369 | "main-battery", | ||
370 | }; | ||
371 | |||
372 | static struct pda_power_pdata power_supply_info = { | ||
373 | .init = power_supply_init, | ||
374 | .is_ac_online = palmld_is_ac_online, | ||
375 | .is_usb_online = palmld_is_usb_online, | ||
376 | .exit = power_supply_exit, | ||
377 | .supplied_to = palmld_supplicants, | ||
378 | .num_supplicants = ARRAY_SIZE(palmld_supplicants), | ||
379 | }; | ||
380 | |||
381 | static struct platform_device power_supply = { | ||
382 | .name = "pda-power", | ||
383 | .id = -1, | ||
384 | .dev = { | ||
385 | .platform_data = &power_supply_info, | ||
386 | }, | ||
387 | }; | ||
388 | |||
389 | /****************************************************************************** | ||
390 | * WM97xx battery | ||
391 | ******************************************************************************/ | ||
392 | static struct wm97xx_batt_info wm97xx_batt_pdata = { | ||
393 | .batt_aux = WM97XX_AUX_ID3, | ||
394 | .temp_aux = WM97XX_AUX_ID2, | ||
395 | .charge_gpio = -1, | ||
396 | .max_voltage = PALMLD_BAT_MAX_VOLTAGE, | ||
397 | .min_voltage = PALMLD_BAT_MIN_VOLTAGE, | ||
398 | .batt_mult = 1000, | ||
399 | .batt_div = 414, | ||
400 | .temp_mult = 1, | ||
401 | .temp_div = 1, | ||
402 | .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO, | ||
403 | .batt_name = "main-batt", | ||
404 | }; | ||
405 | |||
406 | /****************************************************************************** | ||
407 | * aSoC audio | ||
408 | ******************************************************************************/ | ||
409 | static struct palm27x_asoc_info palmld_asoc_pdata = { | ||
410 | .jack_gpio = GPIO_NR_PALMLD_EARPHONE_DETECT, | ||
411 | }; | ||
412 | |||
413 | static pxa2xx_audio_ops_t palmld_ac97_pdata = { | ||
414 | .reset_gpio = 95, | ||
415 | }; | ||
416 | |||
417 | static struct platform_device palmld_asoc = { | ||
418 | .name = "palm27x-asoc", | ||
419 | .id = -1, | ||
420 | .dev = { | ||
421 | .platform_data = &palmld_asoc_pdata, | ||
422 | }, | ||
423 | }; | ||
424 | 278 | ||
425 | /****************************************************************************** | 279 | /****************************************************************************** |
426 | * HDD | 280 | * HDD |
427 | ******************************************************************************/ | 281 | ******************************************************************************/ |
428 | static struct platform_device palmld_hdd = { | 282 | #if defined(CONFIG_PATA_PALMLD) || defined(CONFIG_PATA_PALMLD_MODULE) |
283 | static struct platform_device palmld_ide_device = { | ||
429 | .name = "pata_palmld", | 284 | .name = "pata_palmld", |
430 | .id = -1, | 285 | .id = -1, |
431 | }; | 286 | }; |
432 | 287 | ||
433 | /****************************************************************************** | 288 | static void __init palmld_ide_init(void) |
434 | * Framebuffer | ||
435 | ******************************************************************************/ | ||
436 | static struct pxafb_mode_info palmld_lcd_modes[] = { | ||
437 | { | ||
438 | .pixclock = 57692, | ||
439 | .xres = 320, | ||
440 | .yres = 480, | ||
441 | .bpp = 16, | ||
442 | |||
443 | .left_margin = 32, | ||
444 | .right_margin = 1, | ||
445 | .upper_margin = 7, | ||
446 | .lower_margin = 1, | ||
447 | |||
448 | .hsync_len = 4, | ||
449 | .vsync_len = 1, | ||
450 | }, | ||
451 | }; | ||
452 | |||
453 | static struct pxafb_mach_info palmld_lcd_screen = { | ||
454 | .modes = palmld_lcd_modes, | ||
455 | .num_modes = ARRAY_SIZE(palmld_lcd_modes), | ||
456 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | ||
457 | }; | ||
458 | |||
459 | /****************************************************************************** | ||
460 | * Power management - standby | ||
461 | ******************************************************************************/ | ||
462 | static void __init palmld_pm_init(void) | ||
463 | { | 289 | { |
464 | static u32 resume[] = { | 290 | platform_device_register(&palmld_ide_device); |
465 | 0xe3a00101, /* mov r0, #0x40000000 */ | ||
466 | 0xe380060f, /* orr r0, r0, #0x00f00000 */ | ||
467 | 0xe590f008, /* ldr pc, [r0, #0x08] */ | ||
468 | }; | ||
469 | |||
470 | /* copy the bootloader */ | ||
471 | memcpy(phys_to_virt(PALMLD_STR_BASE), resume, sizeof(resume)); | ||
472 | } | 291 | } |
292 | #else | ||
293 | static inline void palmld_ide_init(void) {} | ||
294 | #endif | ||
473 | 295 | ||
474 | /****************************************************************************** | 296 | /****************************************************************************** |
475 | * Machine init | 297 | * Machine init |
476 | ******************************************************************************/ | 298 | ******************************************************************************/ |
477 | static struct platform_device *devices[] __initdata = { | ||
478 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | ||
479 | &palmld_pxa_keys, | ||
480 | #endif | ||
481 | &palmld_backlight, | ||
482 | &palmld_leds, | ||
483 | &power_supply, | ||
484 | &palmld_asoc, | ||
485 | &palmld_hdd, | ||
486 | &palmld_flash, | ||
487 | }; | ||
488 | |||
489 | static struct map_desc palmld_io_desc[] __initdata = { | 299 | static struct map_desc palmld_io_desc[] __initdata = { |
490 | { | 300 | { |
491 | .virtual = PALMLD_IDE_VIRT, | 301 | .virtual = PALMLD_IDE_VIRT, |
@@ -510,20 +320,26 @@ static void __init palmld_map_io(void) | |||
510 | static void __init palmld_init(void) | 320 | static void __init palmld_init(void) |
511 | { | 321 | { |
512 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmld_pin_config)); | 322 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmld_pin_config)); |
513 | |||
514 | pxa_set_ffuart_info(NULL); | 323 | pxa_set_ffuart_info(NULL); |
515 | pxa_set_btuart_info(NULL); | 324 | pxa_set_btuart_info(NULL); |
516 | pxa_set_stuart_info(NULL); | 325 | pxa_set_stuart_info(NULL); |
517 | 326 | ||
518 | palmld_pm_init(); | 327 | palm27x_mmc_init(GPIO_NR_PALMLD_SD_DETECT_N, GPIO_NR_PALMLD_SD_READONLY, |
519 | set_pxa_fb_info(&palmld_lcd_screen); | 328 | GPIO_NR_PALMLD_SD_POWER, 0); |
520 | pxa_set_mci_info(&palmld_mci_platform_data); | 329 | palm27x_pm_init(PALMLD_STR_BASE); |
521 | pxa_set_ac97_info(&palmld_ac97_pdata); | 330 | palm27x_lcd_init(-1, &palm_320x480_lcd_mode); |
522 | pxa_set_ficp_info(&palmld_ficp_platform_data); | 331 | palm27x_irda_init(GPIO_NR_PALMLD_IR_DISABLE); |
523 | pxa_set_keypad_info(&palmld_keypad_platform_data); | 332 | palm27x_ac97_init(PALMLD_BAT_MIN_VOLTAGE, PALMLD_BAT_MAX_VOLTAGE, |
524 | wm97xx_bat_set_pdata(&wm97xx_batt_pdata); | 333 | GPIO_NR_PALMLD_EARPHONE_DETECT, 95); |
525 | 334 | palm27x_pwm_init(GPIO_NR_PALMLD_BL_POWER, GPIO_NR_PALMLD_LCD_POWER); | |
526 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 335 | palm27x_power_init(GPIO_NR_PALMLD_POWER_DETECT, |
336 | GPIO_NR_PALMLD_USB_DETECT_N); | ||
337 | palm27x_pmic_init(); | ||
338 | palmld_kpc_init(); | ||
339 | palmld_keys_init(); | ||
340 | palmld_nor_init(); | ||
341 | palmld_leds_init(); | ||
342 | palmld_ide_init(); | ||
527 | } | 343 | } |
528 | 344 | ||
529 | MACHINE_START(PALMLD, "Palm LifeDrive") | 345 | MACHINE_START(PALMLD, "Palm LifeDrive") |
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c index 5e92d84fe50d..1c281995f658 100644 --- a/arch/arm/mach-pxa/palmt5.c +++ b/arch/arm/mach-pxa/palmt5.c | |||
@@ -25,7 +25,7 @@ | |||
25 | #include <linux/pda_power.h> | 25 | #include <linux/pda_power.h> |
26 | #include <linux/pwm_backlight.h> | 26 | #include <linux/pwm_backlight.h> |
27 | #include <linux/gpio.h> | 27 | #include <linux/gpio.h> |
28 | #include <linux/wm97xx_batt.h> | 28 | #include <linux/wm97xx.h> |
29 | #include <linux/power_supply.h> | 29 | #include <linux/power_supply.h> |
30 | #include <linux/usb/gpio_vbus.h> | 30 | #include <linux/usb/gpio_vbus.h> |
31 | 31 | ||
@@ -42,6 +42,7 @@ | |||
42 | #include <mach/pxa27x_keypad.h> | 42 | #include <mach/pxa27x_keypad.h> |
43 | #include <mach/udc.h> | 43 | #include <mach/udc.h> |
44 | #include <mach/palmasoc.h> | 44 | #include <mach/palmasoc.h> |
45 | #include <mach/palm27x.h> | ||
45 | 46 | ||
46 | #include "generic.h" | 47 | #include "generic.h" |
47 | #include "devices.h" | 48 | #include "devices.h" |
@@ -104,19 +105,9 @@ static unsigned long palmt5_pin_config[] __initdata = { | |||
104 | }; | 105 | }; |
105 | 106 | ||
106 | /****************************************************************************** | 107 | /****************************************************************************** |
107 | * SD/MMC card controller | ||
108 | ******************************************************************************/ | ||
109 | static struct pxamci_platform_data palmt5_mci_platform_data = { | ||
110 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
111 | .gpio_card_detect = GPIO_NR_PALMT5_SD_DETECT_N, | ||
112 | .gpio_card_ro = GPIO_NR_PALMT5_SD_READONLY, | ||
113 | .gpio_power = GPIO_NR_PALMT5_SD_POWER, | ||
114 | .detect_delay_ms = 200, | ||
115 | }; | ||
116 | |||
117 | /****************************************************************************** | ||
118 | * GPIO keyboard | 108 | * GPIO keyboard |
119 | ******************************************************************************/ | 109 | ******************************************************************************/ |
110 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) | ||
120 | static unsigned int palmt5_matrix_keys[] = { | 111 | static unsigned int palmt5_matrix_keys[] = { |
121 | KEY(0, 0, KEY_POWER), | 112 | KEY(0, 0, KEY_POWER), |
122 | KEY(0, 1, KEY_F1), | 113 | KEY(0, 1, KEY_F1), |
@@ -142,9 +133,18 @@ static struct pxa27x_keypad_platform_data palmt5_keypad_platform_data = { | |||
142 | .debounce_interval = 30, | 133 | .debounce_interval = 30, |
143 | }; | 134 | }; |
144 | 135 | ||
136 | static void __init palmt5_kpc_init(void) | ||
137 | { | ||
138 | pxa_set_keypad_info(&palmt5_keypad_platform_data); | ||
139 | } | ||
140 | #else | ||
141 | static inline void palmt5_kpc_init(void) {} | ||
142 | #endif | ||
143 | |||
145 | /****************************************************************************** | 144 | /****************************************************************************** |
146 | * GPIO keys | 145 | * GPIO keys |
147 | ******************************************************************************/ | 146 | ******************************************************************************/ |
147 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | ||
148 | static struct gpio_keys_button palmt5_pxa_buttons[] = { | 148 | static struct gpio_keys_button palmt5_pxa_buttons[] = { |
149 | {KEY_F8, GPIO_NR_PALMT5_HOTSYNC_BUTTON_N, 1, "HotSync Button" }, | 149 | {KEY_F8, GPIO_NR_PALMT5_HOTSYNC_BUTTON_N, 1, "HotSync Button" }, |
150 | }; | 150 | }; |
@@ -162,241 +162,17 @@ static struct platform_device palmt5_pxa_keys = { | |||
162 | }, | 162 | }, |
163 | }; | 163 | }; |
164 | 164 | ||
165 | /****************************************************************************** | 165 | static void __init palmt5_keys_init(void) |
166 | * Backlight | ||
167 | ******************************************************************************/ | ||
168 | static int palmt5_backlight_init(struct device *dev) | ||
169 | { | ||
170 | int ret; | ||
171 | |||
172 | ret = gpio_request(GPIO_NR_PALMT5_BL_POWER, "BL POWER"); | ||
173 | if (ret) | ||
174 | goto err; | ||
175 | ret = gpio_direction_output(GPIO_NR_PALMT5_BL_POWER, 0); | ||
176 | if (ret) | ||
177 | goto err2; | ||
178 | ret = gpio_request(GPIO_NR_PALMT5_LCD_POWER, "LCD POWER"); | ||
179 | if (ret) | ||
180 | goto err2; | ||
181 | ret = gpio_direction_output(GPIO_NR_PALMT5_LCD_POWER, 0); | ||
182 | if (ret) | ||
183 | goto err3; | ||
184 | |||
185 | return 0; | ||
186 | err3: | ||
187 | gpio_free(GPIO_NR_PALMT5_LCD_POWER); | ||
188 | err2: | ||
189 | gpio_free(GPIO_NR_PALMT5_BL_POWER); | ||
190 | err: | ||
191 | return ret; | ||
192 | } | ||
193 | |||
194 | static int palmt5_backlight_notify(struct device *dev, int brightness) | ||
195 | { | ||
196 | gpio_set_value(GPIO_NR_PALMT5_BL_POWER, brightness); | ||
197 | gpio_set_value(GPIO_NR_PALMT5_LCD_POWER, brightness); | ||
198 | return brightness; | ||
199 | } | ||
200 | |||
201 | static void palmt5_backlight_exit(struct device *dev) | ||
202 | { | ||
203 | gpio_free(GPIO_NR_PALMT5_BL_POWER); | ||
204 | gpio_free(GPIO_NR_PALMT5_LCD_POWER); | ||
205 | } | ||
206 | |||
207 | static struct platform_pwm_backlight_data palmt5_backlight_data = { | ||
208 | .pwm_id = 0, | ||
209 | .max_brightness = PALMT5_MAX_INTENSITY, | ||
210 | .dft_brightness = PALMT5_MAX_INTENSITY, | ||
211 | .pwm_period_ns = PALMT5_PERIOD_NS, | ||
212 | .init = palmt5_backlight_init, | ||
213 | .notify = palmt5_backlight_notify, | ||
214 | .exit = palmt5_backlight_exit, | ||
215 | }; | ||
216 | |||
217 | static struct platform_device palmt5_backlight = { | ||
218 | .name = "pwm-backlight", | ||
219 | .dev = { | ||
220 | .parent = &pxa27x_device_pwm0.dev, | ||
221 | .platform_data = &palmt5_backlight_data, | ||
222 | }, | ||
223 | }; | ||
224 | |||
225 | /****************************************************************************** | ||
226 | * IrDA | ||
227 | ******************************************************************************/ | ||
228 | static struct pxaficp_platform_data palmt5_ficp_platform_data = { | ||
229 | .gpio_pwdown = GPIO_NR_PALMT5_IR_DISABLE, | ||
230 | .transceiver_cap = IR_SIRMODE | IR_OFF, | ||
231 | }; | ||
232 | |||
233 | /****************************************************************************** | ||
234 | * UDC | ||
235 | ******************************************************************************/ | ||
236 | static struct gpio_vbus_mach_info palmt5_udc_info = { | ||
237 | .gpio_vbus = GPIO_NR_PALMT5_USB_DETECT_N, | ||
238 | .gpio_vbus_inverted = 1, | ||
239 | .gpio_pullup = GPIO_NR_PALMT5_USB_PULLUP, | ||
240 | }; | ||
241 | |||
242 | static struct platform_device palmt5_gpio_vbus = { | ||
243 | .name = "gpio-vbus", | ||
244 | .id = -1, | ||
245 | .dev = { | ||
246 | .platform_data = &palmt5_udc_info, | ||
247 | }, | ||
248 | }; | ||
249 | |||
250 | /****************************************************************************** | ||
251 | * Power supply | ||
252 | ******************************************************************************/ | ||
253 | static int power_supply_init(struct device *dev) | ||
254 | { | ||
255 | int ret; | ||
256 | |||
257 | ret = gpio_request(GPIO_NR_PALMT5_POWER_DETECT, "CABLE_STATE_AC"); | ||
258 | if (ret) | ||
259 | goto err1; | ||
260 | ret = gpio_direction_input(GPIO_NR_PALMT5_POWER_DETECT); | ||
261 | if (ret) | ||
262 | goto err2; | ||
263 | |||
264 | return 0; | ||
265 | err2: | ||
266 | gpio_free(GPIO_NR_PALMT5_POWER_DETECT); | ||
267 | err1: | ||
268 | return ret; | ||
269 | } | ||
270 | |||
271 | static int palmt5_is_ac_online(void) | ||
272 | { | ||
273 | return gpio_get_value(GPIO_NR_PALMT5_POWER_DETECT); | ||
274 | } | ||
275 | |||
276 | static void power_supply_exit(struct device *dev) | ||
277 | { | ||
278 | gpio_free(GPIO_NR_PALMT5_POWER_DETECT); | ||
279 | } | ||
280 | |||
281 | static char *palmt5_supplicants[] = { | ||
282 | "main-battery", | ||
283 | }; | ||
284 | |||
285 | static struct pda_power_pdata power_supply_info = { | ||
286 | .init = power_supply_init, | ||
287 | .is_ac_online = palmt5_is_ac_online, | ||
288 | .exit = power_supply_exit, | ||
289 | .supplied_to = palmt5_supplicants, | ||
290 | .num_supplicants = ARRAY_SIZE(palmt5_supplicants), | ||
291 | }; | ||
292 | |||
293 | static struct platform_device power_supply = { | ||
294 | .name = "pda-power", | ||
295 | .id = -1, | ||
296 | .dev = { | ||
297 | .platform_data = &power_supply_info, | ||
298 | }, | ||
299 | }; | ||
300 | |||
301 | /****************************************************************************** | ||
302 | * WM97xx battery | ||
303 | ******************************************************************************/ | ||
304 | static struct wm97xx_batt_info wm97xx_batt_pdata = { | ||
305 | .batt_aux = WM97XX_AUX_ID3, | ||
306 | .temp_aux = WM97XX_AUX_ID2, | ||
307 | .charge_gpio = -1, | ||
308 | .max_voltage = PALMT5_BAT_MAX_VOLTAGE, | ||
309 | .min_voltage = PALMT5_BAT_MIN_VOLTAGE, | ||
310 | .batt_mult = 1000, | ||
311 | .batt_div = 414, | ||
312 | .temp_mult = 1, | ||
313 | .temp_div = 1, | ||
314 | .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO, | ||
315 | .batt_name = "main-batt", | ||
316 | }; | ||
317 | |||
318 | /****************************************************************************** | ||
319 | * aSoC audio | ||
320 | ******************************************************************************/ | ||
321 | static struct palm27x_asoc_info palmt5_asoc_pdata = { | ||
322 | .jack_gpio = GPIO_NR_PALMT5_EARPHONE_DETECT, | ||
323 | }; | ||
324 | |||
325 | static pxa2xx_audio_ops_t palmt5_ac97_pdata = { | ||
326 | .reset_gpio = 95, | ||
327 | }; | ||
328 | |||
329 | static struct platform_device palmt5_asoc = { | ||
330 | .name = "palm27x-asoc", | ||
331 | .id = -1, | ||
332 | .dev = { | ||
333 | .platform_data = &palmt5_asoc_pdata, | ||
334 | }, | ||
335 | }; | ||
336 | |||
337 | /****************************************************************************** | ||
338 | * Framebuffer | ||
339 | ******************************************************************************/ | ||
340 | static struct pxafb_mode_info palmt5_lcd_modes[] = { | ||
341 | { | ||
342 | .pixclock = 57692, | ||
343 | .xres = 320, | ||
344 | .yres = 480, | ||
345 | .bpp = 16, | ||
346 | |||
347 | .left_margin = 32, | ||
348 | .right_margin = 1, | ||
349 | .upper_margin = 7, | ||
350 | .lower_margin = 1, | ||
351 | |||
352 | .hsync_len = 4, | ||
353 | .vsync_len = 1, | ||
354 | }, | ||
355 | }; | ||
356 | |||
357 | static struct pxafb_mach_info palmt5_lcd_screen = { | ||
358 | .modes = palmt5_lcd_modes, | ||
359 | .num_modes = ARRAY_SIZE(palmt5_lcd_modes), | ||
360 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | ||
361 | }; | ||
362 | |||
363 | /****************************************************************************** | ||
364 | * Power management - standby | ||
365 | ******************************************************************************/ | ||
366 | static void __init palmt5_pm_init(void) | ||
367 | { | 166 | { |
368 | static u32 resume[] = { | 167 | platform_device_register(&palmt5_pxa_keys); |
369 | 0xe3a00101, /* mov r0, #0x40000000 */ | ||
370 | 0xe380060f, /* orr r0, r0, #0x00f00000 */ | ||
371 | 0xe590f008, /* ldr pc, [r0, #0x08] */ | ||
372 | }; | ||
373 | |||
374 | /* copy the bootloader */ | ||
375 | memcpy(phys_to_virt(PALMT5_STR_BASE), resume, sizeof(resume)); | ||
376 | } | 168 | } |
169 | #else | ||
170 | static inline void palmt5_keys_init(void) {} | ||
171 | #endif | ||
377 | 172 | ||
378 | /****************************************************************************** | 173 | /****************************************************************************** |
379 | * Machine init | 174 | * Machine init |
380 | ******************************************************************************/ | 175 | ******************************************************************************/ |
381 | static struct platform_device *devices[] __initdata = { | ||
382 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | ||
383 | &palmt5_pxa_keys, | ||
384 | #endif | ||
385 | &palmt5_backlight, | ||
386 | &power_supply, | ||
387 | &palmt5_asoc, | ||
388 | &palmt5_gpio_vbus, | ||
389 | }; | ||
390 | |||
391 | /* setup udc GPIOs initial state */ | ||
392 | static void __init palmt5_udc_init(void) | ||
393 | { | ||
394 | if (!gpio_request(GPIO_NR_PALMT5_USB_PULLUP, "UDC Vbus")) { | ||
395 | gpio_direction_output(GPIO_NR_PALMT5_USB_PULLUP, 1); | ||
396 | gpio_free(GPIO_NR_PALMT5_USB_PULLUP); | ||
397 | } | ||
398 | } | ||
399 | |||
400 | static void __init palmt5_reserve(void) | 176 | static void __init palmt5_reserve(void) |
401 | { | 177 | { |
402 | memblock_reserve(0xa0200000, 0x1000); | 178 | memblock_reserve(0xa0200000, 0x1000); |
@@ -405,21 +181,24 @@ static void __init palmt5_reserve(void) | |||
405 | static void __init palmt5_init(void) | 181 | static void __init palmt5_init(void) |
406 | { | 182 | { |
407 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmt5_pin_config)); | 183 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmt5_pin_config)); |
408 | |||
409 | pxa_set_ffuart_info(NULL); | 184 | pxa_set_ffuart_info(NULL); |
410 | pxa_set_btuart_info(NULL); | 185 | pxa_set_btuart_info(NULL); |
411 | pxa_set_stuart_info(NULL); | 186 | pxa_set_stuart_info(NULL); |
412 | 187 | ||
413 | palmt5_pm_init(); | 188 | palm27x_mmc_init(GPIO_NR_PALMT5_SD_DETECT_N, GPIO_NR_PALMT5_SD_READONLY, |
414 | set_pxa_fb_info(&palmt5_lcd_screen); | 189 | GPIO_NR_PALMT5_SD_POWER, 0); |
415 | pxa_set_mci_info(&palmt5_mci_platform_data); | 190 | palm27x_pm_init(PALMT5_STR_BASE); |
416 | palmt5_udc_init(); | 191 | palm27x_lcd_init(-1, &palm_320x480_lcd_mode); |
417 | pxa_set_ac97_info(&palmt5_ac97_pdata); | 192 | palm27x_udc_init(GPIO_NR_PALMT5_USB_DETECT_N, |
418 | pxa_set_ficp_info(&palmt5_ficp_platform_data); | 193 | GPIO_NR_PALMT5_USB_PULLUP, 1); |
419 | pxa_set_keypad_info(&palmt5_keypad_platform_data); | 194 | palm27x_irda_init(GPIO_NR_PALMT5_IR_DISABLE); |
420 | wm97xx_bat_set_pdata(&wm97xx_batt_pdata); | 195 | palm27x_ac97_init(PALMT5_BAT_MIN_VOLTAGE, PALMT5_BAT_MAX_VOLTAGE, |
421 | 196 | GPIO_NR_PALMT5_EARPHONE_DETECT, 95); | |
422 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 197 | palm27x_pwm_init(GPIO_NR_PALMT5_BL_POWER, GPIO_NR_PALMT5_LCD_POWER); |
198 | palm27x_power_init(GPIO_NR_PALMT5_POWER_DETECT, -1); | ||
199 | palm27x_pmic_init(); | ||
200 | palmt5_kpc_init(); | ||
201 | palmt5_keys_init(); | ||
423 | } | 202 | } |
424 | 203 | ||
425 | MACHINE_START(PALMT5, "Palm Tungsten|T5") | 204 | MACHINE_START(PALMT5, "Palm Tungsten|T5") |
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c index 3d284ff1a64e..93c11a0438d5 100644 --- a/arch/arm/mach-pxa/palmte2.c +++ b/arch/arm/mach-pxa/palmte2.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include <linux/pda_power.h> | 23 | #include <linux/pda_power.h> |
24 | #include <linux/pwm_backlight.h> | 24 | #include <linux/pwm_backlight.h> |
25 | #include <linux/gpio.h> | 25 | #include <linux/gpio.h> |
26 | #include <linux/wm97xx_batt.h> | 26 | #include <linux/wm97xx.h> |
27 | #include <linux/power_supply.h> | 27 | #include <linux/power_supply.h> |
28 | #include <linux/usb/gpio_vbus.h> | 28 | #include <linux/usb/gpio_vbus.h> |
29 | 29 | ||
@@ -271,9 +271,9 @@ static struct platform_device power_supply = { | |||
271 | }; | 271 | }; |
272 | 272 | ||
273 | /****************************************************************************** | 273 | /****************************************************************************** |
274 | * WM97xx battery | 274 | * WM97xx audio, battery |
275 | ******************************************************************************/ | 275 | ******************************************************************************/ |
276 | static struct wm97xx_batt_info wm97xx_batt_pdata = { | 276 | static struct wm97xx_batt_pdata palmte2_batt_pdata = { |
277 | .batt_aux = WM97XX_AUX_ID3, | 277 | .batt_aux = WM97XX_AUX_ID3, |
278 | .temp_aux = WM97XX_AUX_ID2, | 278 | .temp_aux = WM97XX_AUX_ID2, |
279 | .charge_gpio = -1, | 279 | .charge_gpio = -1, |
@@ -287,9 +287,14 @@ static struct wm97xx_batt_info wm97xx_batt_pdata = { | |||
287 | .batt_name = "main-batt", | 287 | .batt_name = "main-batt", |
288 | }; | 288 | }; |
289 | 289 | ||
290 | /****************************************************************************** | 290 | static struct wm97xx_pdata palmte2_wm97xx_pdata = { |
291 | * aSoC audio | 291 | .batt_pdata = &palmte2_batt_pdata, |
292 | ******************************************************************************/ | 292 | }; |
293 | |||
294 | static pxa2xx_audio_ops_t palmte2_ac97_pdata = { | ||
295 | .codec_pdata = { &palmte2_wm97xx_pdata, }, | ||
296 | }; | ||
297 | |||
293 | static struct palm27x_asoc_info palmte2_asoc_pdata = { | 298 | static struct palm27x_asoc_info palmte2_asoc_pdata = { |
294 | .jack_gpio = GPIO_NR_PALMTE2_EARPHONE_DETECT, | 299 | .jack_gpio = GPIO_NR_PALMTE2_EARPHONE_DETECT, |
295 | }; | 300 | }; |
@@ -361,9 +366,8 @@ static void __init palmte2_init(void) | |||
361 | set_pxa_fb_info(&palmte2_lcd_screen); | 366 | set_pxa_fb_info(&palmte2_lcd_screen); |
362 | pxa_set_mci_info(&palmte2_mci_platform_data); | 367 | pxa_set_mci_info(&palmte2_mci_platform_data); |
363 | palmte2_udc_init(); | 368 | palmte2_udc_init(); |
364 | pxa_set_ac97_info(NULL); | 369 | pxa_set_ac97_info(&palmte2_ac97_pdata); |
365 | pxa_set_ficp_info(&palmte2_ficp_platform_data); | 370 | pxa_set_ficp_info(&palmte2_ficp_platform_data); |
366 | wm97xx_bat_set_pdata(&wm97xx_batt_pdata); | ||
367 | 371 | ||
368 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 372 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
369 | } | 373 | } |
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c index 3d0c9cc2a406..52defd5e42e5 100644 --- a/arch/arm/mach-pxa/palmtreo.c +++ b/arch/arm/mach-pxa/palmtreo.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <linux/pda_power.h> | 24 | #include <linux/pda_power.h> |
25 | #include <linux/pwm_backlight.h> | 25 | #include <linux/pwm_backlight.h> |
26 | #include <linux/gpio.h> | 26 | #include <linux/gpio.h> |
27 | #include <linux/wm97xx_batt.h> | ||
28 | #include <linux/power_supply.h> | 27 | #include <linux/power_supply.h> |
29 | #include <linux/sysdev.h> | 28 | #include <linux/sysdev.h> |
30 | #include <linux/w1-gpio.h> | 29 | #include <linux/w1-gpio.h> |
@@ -46,6 +45,7 @@ | |||
46 | #include <mach/pxa2xx-regs.h> | 45 | #include <mach/pxa2xx-regs.h> |
47 | #include <mach/palmasoc.h> | 46 | #include <mach/palmasoc.h> |
48 | #include <mach/camera.h> | 47 | #include <mach/camera.h> |
48 | #include <mach/palm27x.h> | ||
49 | 49 | ||
50 | #include <sound/pxa2xx-lib.h> | 50 | #include <sound/pxa2xx-lib.h> |
51 | 51 | ||
@@ -160,31 +160,9 @@ static unsigned long centro685_pin_config[] __initdata = { | |||
160 | #endif /* CONFIG_MACH_CENTRO */ | 160 | #endif /* CONFIG_MACH_CENTRO */ |
161 | 161 | ||
162 | /****************************************************************************** | 162 | /****************************************************************************** |
163 | * SD/MMC card controller | ||
164 | ******************************************************************************/ | ||
165 | #ifdef CONFIG_MACH_TREO680 | ||
166 | static struct pxamci_platform_data treo680_mci_platform_data = { | ||
167 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
168 | .gpio_card_detect = GPIO_NR_TREO_SD_DETECT_N, | ||
169 | .gpio_card_ro = GPIO_NR_TREO680_SD_READONLY, | ||
170 | .gpio_power = GPIO_NR_TREO680_SD_POWER, | ||
171 | }; | ||
172 | #endif /* CONFIG_MACH_TREO680 */ | ||
173 | |||
174 | #ifdef CONFIG_MACH_CENTRO | ||
175 | static struct pxamci_platform_data centro_mci_platform_data = { | ||
176 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
177 | .gpio_card_detect = GPIO_NR_TREO_SD_DETECT_N, | ||
178 | .gpio_card_ro = -1, | ||
179 | .gpio_power = GPIO_NR_CENTRO_SD_POWER, | ||
180 | .gpio_power_invert = 1, | ||
181 | }; | ||
182 | #endif /* CONFIG_MACH_CENTRO */ | ||
183 | |||
184 | /****************************************************************************** | ||
185 | * GPIO keyboard | 163 | * GPIO keyboard |
186 | ******************************************************************************/ | 164 | ******************************************************************************/ |
187 | #ifdef CONFIG_MACH_TREO680 | 165 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) |
188 | static unsigned int treo680_matrix_keys[] = { | 166 | static unsigned int treo680_matrix_keys[] = { |
189 | KEY(0, 0, KEY_F8), /* Red/Off/Power */ | 167 | KEY(0, 0, KEY_F8), /* Red/Off/Power */ |
190 | KEY(0, 1, KEY_LEFT), | 168 | KEY(0, 1, KEY_LEFT), |
@@ -244,19 +222,6 @@ static unsigned int treo680_matrix_keys[] = { | |||
244 | KEY(7, 5, KEY_I), | 222 | KEY(7, 5, KEY_I), |
245 | }; | 223 | }; |
246 | 224 | ||
247 | static struct pxa27x_keypad_platform_data treo680_keypad_platform_data = { | ||
248 | .matrix_key_rows = 8, | ||
249 | .matrix_key_cols = 7, | ||
250 | .matrix_key_map = treo680_matrix_keys, | ||
251 | .matrix_key_map_size = ARRAY_SIZE(treo680_matrix_keys), | ||
252 | .direct_key_map = { KEY_CONNECT }, | ||
253 | .direct_key_num = 1, | ||
254 | |||
255 | .debounce_interval = 30, | ||
256 | }; | ||
257 | #endif /* CONFIG_MACH_TREO680 */ | ||
258 | |||
259 | #ifdef CONFIG_MACH_CENTRO | ||
260 | static unsigned int centro_matrix_keys[] = { | 225 | static unsigned int centro_matrix_keys[] = { |
261 | KEY(0, 0, KEY_F9), /* Home */ | 226 | KEY(0, 0, KEY_F9), /* Home */ |
262 | KEY(0, 1, KEY_LEFT), | 227 | KEY(0, 1, KEY_LEFT), |
@@ -316,157 +281,50 @@ static unsigned int centro_matrix_keys[] = { | |||
316 | KEY(7, 5, KEY_I), | 281 | KEY(7, 5, KEY_I), |
317 | }; | 282 | }; |
318 | 283 | ||
319 | static struct pxa27x_keypad_platform_data centro_keypad_platform_data = { | 284 | static struct pxa27x_keypad_platform_data treo680_keypad_pdata = { |
320 | .matrix_key_rows = 8, | 285 | .matrix_key_rows = 8, |
321 | .matrix_key_cols = 7, | 286 | .matrix_key_cols = 7, |
322 | .matrix_key_map = centro_matrix_keys, | 287 | .matrix_key_map = treo680_matrix_keys, |
323 | .matrix_key_map_size = ARRAY_SIZE(centro_matrix_keys), | 288 | .matrix_key_map_size = ARRAY_SIZE(treo680_matrix_keys), |
324 | .direct_key_map = { KEY_CONNECT }, | 289 | .direct_key_map = { KEY_CONNECT }, |
325 | .direct_key_num = 1, | 290 | .direct_key_num = 1, |
326 | 291 | ||
327 | .debounce_interval = 30, | 292 | .debounce_interval = 30, |
328 | }; | 293 | }; |
329 | #endif /* CONFIG_MACH_CENTRO */ | ||
330 | 294 | ||
331 | /****************************************************************************** | 295 | static void __init palmtreo_kpc_init(void) |
332 | * aSoC audio | ||
333 | ******************************************************************************/ | ||
334 | |||
335 | static pxa2xx_audio_ops_t treo_ac97_pdata = { | ||
336 | .reset_gpio = 95, | ||
337 | }; | ||
338 | |||
339 | /****************************************************************************** | ||
340 | * Backlight | ||
341 | ******************************************************************************/ | ||
342 | static int treo_backlight_init(struct device *dev) | ||
343 | { | 296 | { |
344 | int ret; | 297 | static struct pxa27x_keypad_platform_data *data = &treo680_keypad_pdata; |
345 | |||
346 | ret = gpio_request(GPIO_NR_TREO_BL_POWER, "BL POWER"); | ||
347 | if (ret) | ||
348 | goto err; | ||
349 | ret = gpio_direction_output(GPIO_NR_TREO_BL_POWER, 0); | ||
350 | if (ret) | ||
351 | goto err2; | ||
352 | |||
353 | return 0; | ||
354 | 298 | ||
355 | err2: | 299 | if (machine_is_centro()) { |
356 | gpio_free(GPIO_NR_TREO_BL_POWER); | 300 | data->matrix_key_map = centro_matrix_keys; |
357 | err: | 301 | data->matrix_key_map_size = ARRAY_SIZE(centro_matrix_keys); |
358 | return ret; | 302 | } |
359 | } | ||
360 | |||
361 | static int treo_backlight_notify(struct device *dev, int brightness) | ||
362 | { | ||
363 | gpio_set_value(GPIO_NR_TREO_BL_POWER, brightness); | ||
364 | return TREO_MAX_INTENSITY - brightness; | ||
365 | }; | ||
366 | 303 | ||
367 | static void treo_backlight_exit(struct device *dev) | 304 | pxa_set_keypad_info(&treo680_keypad_pdata); |
368 | { | ||
369 | gpio_free(GPIO_NR_TREO_BL_POWER); | ||
370 | } | 305 | } |
371 | 306 | #else | |
372 | static struct platform_pwm_backlight_data treo_backlight_data = { | 307 | static inline void palmtreo_kpc_init(void) {} |
373 | .pwm_id = 0, | 308 | #endif |
374 | .max_brightness = TREO_MAX_INTENSITY, | ||
375 | .dft_brightness = TREO_DEFAULT_INTENSITY, | ||
376 | .pwm_period_ns = TREO_PERIOD_NS, | ||
377 | .init = treo_backlight_init, | ||
378 | .notify = treo_backlight_notify, | ||
379 | .exit = treo_backlight_exit, | ||
380 | }; | ||
381 | |||
382 | static struct platform_device treo_backlight = { | ||
383 | .name = "pwm-backlight", | ||
384 | .dev = { | ||
385 | .parent = &pxa27x_device_pwm0.dev, | ||
386 | .platform_data = &treo_backlight_data, | ||
387 | }, | ||
388 | }; | ||
389 | |||
390 | /****************************************************************************** | ||
391 | * IrDA | ||
392 | ******************************************************************************/ | ||
393 | static struct pxaficp_platform_data treo_ficp_info = { | ||
394 | .gpio_pwdown = GPIO_NR_TREO_IR_EN, | ||
395 | .transceiver_cap = IR_SIRMODE | IR_OFF, | ||
396 | }; | ||
397 | |||
398 | /****************************************************************************** | ||
399 | * UDC | ||
400 | ******************************************************************************/ | ||
401 | static struct pxa2xx_udc_mach_info treo_udc_info __initdata = { | ||
402 | .gpio_vbus = GPIO_NR_TREO_USB_DETECT, | ||
403 | .gpio_vbus_inverted = 1, | ||
404 | .gpio_pullup = GPIO_NR_TREO_USB_PULLUP, | ||
405 | }; | ||
406 | |||
407 | 309 | ||
408 | /****************************************************************************** | 310 | /****************************************************************************** |
409 | * USB host | 311 | * USB host |
410 | ******************************************************************************/ | 312 | ******************************************************************************/ |
411 | #ifdef CONFIG_MACH_TREO680 | 313 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
412 | static struct pxaohci_platform_data treo680_ohci_info = { | 314 | static struct pxaohci_platform_data treo680_ohci_info = { |
413 | .port_mode = PMM_PERPORT_MODE, | 315 | .port_mode = PMM_PERPORT_MODE, |
414 | .flags = ENABLE_PORT1 | ENABLE_PORT3, | 316 | .flags = ENABLE_PORT1 | ENABLE_PORT3, |
415 | .power_budget = 0, | 317 | .power_budget = 0, |
416 | }; | 318 | }; |
417 | #endif /* CONFIG_MACH_TREO680 */ | ||
418 | 319 | ||
419 | /****************************************************************************** | 320 | static void __init palmtreo_uhc_init(void) |
420 | * Power supply | ||
421 | ******************************************************************************/ | ||
422 | static int power_supply_init(struct device *dev) | ||
423 | { | 321 | { |
424 | int ret; | 322 | if (machine_is_treo680()) |
425 | 323 | pxa_set_ohci_info(&treo680_ohci_info); | |
426 | ret = gpio_request(GPIO_NR_TREO_POWER_DETECT, "CABLE_STATE_AC"); | ||
427 | if (ret) | ||
428 | goto err1; | ||
429 | ret = gpio_direction_input(GPIO_NR_TREO_POWER_DETECT); | ||
430 | if (ret) | ||
431 | goto err2; | ||
432 | |||
433 | return 0; | ||
434 | |||
435 | err2: | ||
436 | gpio_free(GPIO_NR_TREO_POWER_DETECT); | ||
437 | err1: | ||
438 | return ret; | ||
439 | } | ||
440 | |||
441 | static int treo_is_ac_online(void) | ||
442 | { | ||
443 | return gpio_get_value(GPIO_NR_TREO_POWER_DETECT); | ||
444 | } | 324 | } |
445 | 325 | #else | |
446 | static void power_supply_exit(struct device *dev) | 326 | static inline void palmtreo_uhc_init(void) {} |
447 | { | 327 | #endif |
448 | gpio_free(GPIO_NR_TREO_POWER_DETECT); | ||
449 | } | ||
450 | |||
451 | static char *treo_supplicants[] = { | ||
452 | "main-battery", | ||
453 | }; | ||
454 | |||
455 | static struct pda_power_pdata power_supply_info = { | ||
456 | .init = power_supply_init, | ||
457 | .is_ac_online = treo_is_ac_online, | ||
458 | .exit = power_supply_exit, | ||
459 | .supplied_to = treo_supplicants, | ||
460 | .num_supplicants = ARRAY_SIZE(treo_supplicants), | ||
461 | }; | ||
462 | |||
463 | static struct platform_device power_supply = { | ||
464 | .name = "pda-power", | ||
465 | .id = -1, | ||
466 | .dev = { | ||
467 | .platform_data = &power_supply_info, | ||
468 | }, | ||
469 | }; | ||
470 | 328 | ||
471 | /****************************************************************************** | 329 | /****************************************************************************** |
472 | * Vibra and LEDs | 330 | * Vibra and LEDs |
@@ -495,16 +353,6 @@ static struct gpio_led_platform_data treo680_gpio_led_info = { | |||
495 | .num_leds = ARRAY_SIZE(treo680_gpio_leds), | 353 | .num_leds = ARRAY_SIZE(treo680_gpio_leds), |
496 | }; | 354 | }; |
497 | 355 | ||
498 | static struct platform_device treo680_leds = { | ||
499 | .name = "leds-gpio", | ||
500 | .id = -1, | ||
501 | .dev = { | ||
502 | .platform_data = &treo680_gpio_led_info, | ||
503 | } | ||
504 | }; | ||
505 | #endif /* CONFIG_MACH_TREO680 */ | ||
506 | |||
507 | #ifdef CONFIG_MACH_CENTRO | ||
508 | static struct gpio_led centro_gpio_leds[] = { | 356 | static struct gpio_led centro_gpio_leds[] = { |
509 | { | 357 | { |
510 | .name = "centro:vibra:vibra", | 358 | .name = "centro:vibra:vibra", |
@@ -529,145 +377,67 @@ static struct gpio_led_platform_data centro_gpio_led_info = { | |||
529 | .num_leds = ARRAY_SIZE(centro_gpio_leds), | 377 | .num_leds = ARRAY_SIZE(centro_gpio_leds), |
530 | }; | 378 | }; |
531 | 379 | ||
532 | static struct platform_device centro_leds = { | 380 | static struct platform_device palmtreo_leds = { |
533 | .name = "leds-gpio", | 381 | .name = "leds-gpio", |
534 | .id = -1, | 382 | .id = -1, |
535 | .dev = { | 383 | .dev = { |
536 | .platform_data = ¢ro_gpio_led_info, | 384 | .platform_data = &treo680_gpio_led_info, |
537 | } | 385 | } |
538 | }; | 386 | }; |
539 | #endif /* CONFIG_MACH_CENTRO */ | ||
540 | |||
541 | /****************************************************************************** | ||
542 | * Framebuffer | ||
543 | ******************************************************************************/ | ||
544 | /* TODO: add support for 324x324 */ | ||
545 | static struct pxafb_mode_info treo_lcd_modes[] = { | ||
546 | { | ||
547 | .pixclock = 86538, | ||
548 | .xres = 320, | ||
549 | .yres = 320, | ||
550 | .bpp = 16, | ||
551 | |||
552 | .left_margin = 20, | ||
553 | .right_margin = 8, | ||
554 | .upper_margin = 8, | ||
555 | .lower_margin = 5, | ||
556 | |||
557 | .hsync_len = 4, | ||
558 | .vsync_len = 1, | ||
559 | }, | ||
560 | }; | ||
561 | 387 | ||
562 | static void treo_lcd_power(int on, struct fb_var_screeninfo *info) | 388 | static void __init palmtreo_leds_init(void) |
563 | { | 389 | { |
564 | gpio_set_value(GPIO_NR_TREO_BL_POWER, on); | 390 | if (machine_is_centro()) |
565 | } | 391 | palmtreo_leds.dev.platform_data = ¢ro_gpio_led_info; |
566 | |||
567 | static struct pxafb_mach_info treo_lcd_screen = { | ||
568 | .modes = treo_lcd_modes, | ||
569 | .num_modes = ARRAY_SIZE(treo_lcd_modes), | ||
570 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | ||
571 | }; | ||
572 | 392 | ||
573 | /****************************************************************************** | 393 | platform_device_register(&palmtreo_leds); |
574 | * Power management - standby | ||
575 | ******************************************************************************/ | ||
576 | static void __init treo_pm_init(void) | ||
577 | { | ||
578 | static u32 resume[] = { | ||
579 | 0xe3a00101, /* mov r0, #0x40000000 */ | ||
580 | 0xe380060f, /* orr r0, r0, #0x00f00000 */ | ||
581 | 0xe590f008, /* ldr pc, [r0, #0x08] */ | ||
582 | }; | ||
583 | |||
584 | /* this is where the bootloader jumps */ | ||
585 | memcpy(phys_to_virt(TREO_STR_BASE), resume, sizeof(resume)); | ||
586 | } | 394 | } |
395 | #else | ||
396 | static inline void palmtreo_leds_init(void) {} | ||
397 | #endif | ||
587 | 398 | ||
588 | /****************************************************************************** | 399 | /****************************************************************************** |
589 | * Machine init | 400 | * Machine init |
590 | ******************************************************************************/ | 401 | ******************************************************************************/ |
591 | static struct platform_device *treo_devices[] __initdata = { | ||
592 | &treo_backlight, | ||
593 | &power_supply, | ||
594 | }; | ||
595 | |||
596 | #ifdef CONFIG_MACH_TREO680 | ||
597 | static struct platform_device *treo680_devices[] __initdata = { | ||
598 | &treo680_leds, | ||
599 | }; | ||
600 | #endif /* CONFIG_MACH_TREO680 */ | ||
601 | |||
602 | #ifdef CONFIG_MACH_CENTRO | ||
603 | static struct platform_device *centro_devices[] __initdata = { | ||
604 | ¢ro_leds, | ||
605 | }; | ||
606 | #endif /* CONFIG_MACH_CENTRO */ | ||
607 | |||
608 | /* setup udc GPIOs initial state */ | ||
609 | static void __init treo_udc_init(void) | ||
610 | { | ||
611 | if (!gpio_request(GPIO_NR_TREO_USB_PULLUP, "UDC Vbus")) { | ||
612 | gpio_direction_output(GPIO_NR_TREO_USB_PULLUP, 1); | ||
613 | gpio_free(GPIO_NR_TREO_USB_PULLUP); | ||
614 | } | ||
615 | } | ||
616 | |||
617 | static void __init treo_lcd_power_init(void) | ||
618 | { | ||
619 | int ret; | ||
620 | |||
621 | ret = gpio_request(GPIO_NR_TREO_LCD_POWER, "LCD POWER"); | ||
622 | if (ret) { | ||
623 | pr_err("Treo680: LCD power GPIO request failed!\n"); | ||
624 | return; | ||
625 | } | ||
626 | |||
627 | ret = gpio_direction_output(GPIO_NR_TREO_LCD_POWER, 0); | ||
628 | if (ret) { | ||
629 | pr_err("Treo680: setting LCD power GPIO direction failed!\n"); | ||
630 | gpio_free(GPIO_NR_TREO_LCD_POWER); | ||
631 | return; | ||
632 | } | ||
633 | |||
634 | treo_lcd_screen.pxafb_lcd_power = treo_lcd_power; | ||
635 | } | ||
636 | |||
637 | static void __init treo_reserve(void) | 402 | static void __init treo_reserve(void) |
638 | { | 403 | { |
639 | memblock_reserve(0xa0000000, 0x1000); | 404 | memblock_reserve(0xa0000000, 0x1000); |
640 | memblock_reserve(0xa2000000, 0x1000); | 405 | memblock_reserve(0xa2000000, 0x1000); |
641 | } | 406 | } |
642 | 407 | ||
643 | static void __init treo_init(void) | 408 | static void __init palmphone_common_init(void) |
644 | { | 409 | { |
410 | pxa2xx_mfp_config(ARRAY_AND_SIZE(treo_pin_config)); | ||
645 | pxa_set_ffuart_info(NULL); | 411 | pxa_set_ffuart_info(NULL); |
646 | pxa_set_btuart_info(NULL); | 412 | pxa_set_btuart_info(NULL); |
647 | pxa_set_stuart_info(NULL); | 413 | pxa_set_stuart_info(NULL); |
648 | 414 | palm27x_pm_init(TREO_STR_BASE); | |
649 | treo_pm_init(); | 415 | palm27x_lcd_init(GPIO_NR_TREO_BL_POWER, &palm_320x320_new_lcd_mode); |
650 | pxa2xx_mfp_config(ARRAY_AND_SIZE(treo_pin_config)); | 416 | palm27x_udc_init(GPIO_NR_TREO_USB_DETECT, GPIO_NR_TREO_USB_PULLUP, 1); |
651 | treo_lcd_power_init(); | 417 | palm27x_irda_init(GPIO_NR_TREO_IR_EN); |
652 | set_pxa_fb_info(&treo_lcd_screen); | 418 | palm27x_ac97_init(-1, -1, -1, 95); |
653 | treo_udc_init(); | 419 | palm27x_pwm_init(GPIO_NR_TREO_BL_POWER, -1); |
654 | pxa_set_udc_info(&treo_udc_info); | 420 | palm27x_power_init(GPIO_NR_TREO_POWER_DETECT, -1); |
655 | pxa_set_ac97_info(&treo_ac97_pdata); | 421 | palm27x_pmic_init(); |
656 | pxa_set_ficp_info(&treo_ficp_info); | 422 | palmtreo_kpc_init(); |
657 | 423 | palmtreo_uhc_init(); | |
658 | platform_add_devices(ARRAY_AND_SIZE(treo_devices)); | 424 | palmtreo_leds_init(); |
659 | } | 425 | } |
660 | 426 | ||
661 | #ifdef CONFIG_MACH_TREO680 | ||
662 | static void __init treo680_init(void) | 427 | static void __init treo680_init(void) |
663 | { | 428 | { |
664 | treo_init(); | ||
665 | pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config)); | 429 | pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config)); |
666 | pxa_set_mci_info(&treo680_mci_platform_data); | 430 | palmphone_common_init(); |
667 | pxa_set_keypad_info(&treo680_keypad_platform_data); | 431 | palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, GPIO_NR_TREO680_SD_READONLY, |
668 | pxa_set_ohci_info(&treo680_ohci_info); | 432 | GPIO_NR_TREO680_SD_POWER, 0); |
433 | } | ||
669 | 434 | ||
670 | platform_add_devices(ARRAY_AND_SIZE(treo680_devices)); | 435 | static void __init centro_init(void) |
436 | { | ||
437 | pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config)); | ||
438 | palmphone_common_init(); | ||
439 | palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, -1, | ||
440 | GPIO_NR_CENTRO_SD_POWER, 1); | ||
671 | } | 441 | } |
672 | 442 | ||
673 | MACHINE_START(TREO680, "Palm Treo 680") | 443 | MACHINE_START(TREO680, "Palm Treo 680") |
@@ -680,19 +450,6 @@ MACHINE_START(TREO680, "Palm Treo 680") | |||
680 | .timer = &pxa_timer, | 450 | .timer = &pxa_timer, |
681 | .init_machine = treo680_init, | 451 | .init_machine = treo680_init, |
682 | MACHINE_END | 452 | MACHINE_END |
683 | #endif /* CONFIG_MACH_TREO680 */ | ||
684 | |||
685 | #ifdef CONFIG_MACH_CENTRO | ||
686 | static void __init centro_init(void) | ||
687 | { | ||
688 | treo_init(); | ||
689 | pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config)); | ||
690 | pxa_set_mci_info(¢ro_mci_platform_data); | ||
691 | |||
692 | pxa_set_keypad_info(¢ro_keypad_platform_data); | ||
693 | |||
694 | platform_add_devices(ARRAY_AND_SIZE(centro_devices)); | ||
695 | } | ||
696 | 453 | ||
697 | MACHINE_START(CENTRO, "Palm Centro 685") | 454 | MACHINE_START(CENTRO, "Palm Centro 685") |
698 | .phys_io = TREO_PHYS_IO_START, | 455 | .phys_io = TREO_PHYS_IO_START, |
@@ -702,6 +459,5 @@ MACHINE_START(CENTRO, "Palm Centro 685") | |||
702 | .reserve = treo_reserve, | 459 | .reserve = treo_reserve, |
703 | .init_irq = pxa27x_init_irq, | 460 | .init_irq = pxa27x_init_irq, |
704 | .timer = &pxa_timer, | 461 | .timer = &pxa_timer, |
705 | .init_machine = centro_init, | 462 | .init_machine = centro_init, |
706 | MACHINE_END | 463 | MACHINE_END |
707 | #endif /* CONFIG_MACH_CENTRO */ | ||
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index ecc1a401598e..144dc2b6911f 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c | |||
@@ -25,7 +25,7 @@ | |||
25 | #include <linux/pda_power.h> | 25 | #include <linux/pda_power.h> |
26 | #include <linux/pwm_backlight.h> | 26 | #include <linux/pwm_backlight.h> |
27 | #include <linux/gpio.h> | 27 | #include <linux/gpio.h> |
28 | #include <linux/wm97xx_batt.h> | 28 | #include <linux/wm97xx.h> |
29 | #include <linux/power_supply.h> | 29 | #include <linux/power_supply.h> |
30 | #include <linux/usb/gpio_vbus.h> | 30 | #include <linux/usb/gpio_vbus.h> |
31 | #include <linux/mtd/nand.h> | 31 | #include <linux/mtd/nand.h> |
@@ -46,6 +46,7 @@ | |||
46 | #include <mach/pxa27x_keypad.h> | 46 | #include <mach/pxa27x_keypad.h> |
47 | #include <mach/udc.h> | 47 | #include <mach/udc.h> |
48 | #include <mach/palmasoc.h> | 48 | #include <mach/palmasoc.h> |
49 | #include <mach/palm27x.h> | ||
49 | 50 | ||
50 | #include "generic.h" | 51 | #include "generic.h" |
51 | #include "devices.h" | 52 | #include "devices.h" |
@@ -129,6 +130,7 @@ static unsigned long palmtx_pin_config[] __initdata = { | |||
129 | /****************************************************************************** | 130 | /****************************************************************************** |
130 | * NOR Flash | 131 | * NOR Flash |
131 | ******************************************************************************/ | 132 | ******************************************************************************/ |
133 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) | ||
132 | static struct mtd_partition palmtx_partitions[] = { | 134 | static struct mtd_partition palmtx_partitions[] = { |
133 | { | 135 | { |
134 | .name = "Flash", | 136 | .name = "Flash", |
@@ -162,20 +164,18 @@ static struct platform_device palmtx_flash = { | |||
162 | }, | 164 | }, |
163 | }; | 165 | }; |
164 | 166 | ||
165 | /****************************************************************************** | 167 | static void __init palmtx_nor_init(void) |
166 | * SD/MMC card controller | 168 | { |
167 | ******************************************************************************/ | 169 | platform_device_register(&palmtx_flash); |
168 | static struct pxamci_platform_data palmtx_mci_platform_data = { | 170 | } |
169 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | 171 | #else |
170 | .gpio_card_detect = GPIO_NR_PALMTX_SD_DETECT_N, | 172 | static inline void palmtx_nor_init(void) {} |
171 | .gpio_card_ro = GPIO_NR_PALMTX_SD_READONLY, | 173 | #endif |
172 | .gpio_power = GPIO_NR_PALMTX_SD_POWER, | ||
173 | .detect_delay_ms = 200, | ||
174 | }; | ||
175 | 174 | ||
176 | /****************************************************************************** | 175 | /****************************************************************************** |
177 | * GPIO keyboard | 176 | * GPIO keyboard |
178 | ******************************************************************************/ | 177 | ******************************************************************************/ |
178 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) | ||
179 | static unsigned int palmtx_matrix_keys[] = { | 179 | static unsigned int palmtx_matrix_keys[] = { |
180 | KEY(0, 0, KEY_POWER), | 180 | KEY(0, 0, KEY_POWER), |
181 | KEY(0, 1, KEY_F1), | 181 | KEY(0, 1, KEY_F1), |
@@ -201,9 +201,18 @@ static struct pxa27x_keypad_platform_data palmtx_keypad_platform_data = { | |||
201 | .debounce_interval = 30, | 201 | .debounce_interval = 30, |
202 | }; | 202 | }; |
203 | 203 | ||
204 | static void __init palmtx_kpc_init(void) | ||
205 | { | ||
206 | pxa_set_keypad_info(&palmtx_keypad_platform_data); | ||
207 | } | ||
208 | #else | ||
209 | static inline void palmtx_kpc_init(void) {} | ||
210 | #endif | ||
211 | |||
204 | /****************************************************************************** | 212 | /****************************************************************************** |
205 | * GPIO keys | 213 | * GPIO keys |
206 | ******************************************************************************/ | 214 | ******************************************************************************/ |
215 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | ||
207 | static struct gpio_keys_button palmtx_pxa_buttons[] = { | 216 | static struct gpio_keys_button palmtx_pxa_buttons[] = { |
208 | {KEY_F8, GPIO_NR_PALMTX_HOTSYNC_BUTTON_N, 1, "HotSync Button" }, | 217 | {KEY_F8, GPIO_NR_PALMTX_HOTSYNC_BUTTON_N, 1, "HotSync Button" }, |
209 | }; | 218 | }; |
@@ -221,208 +230,18 @@ static struct platform_device palmtx_pxa_keys = { | |||
221 | }, | 230 | }, |
222 | }; | 231 | }; |
223 | 232 | ||
224 | /****************************************************************************** | 233 | static void __init palmtx_keys_init(void) |
225 | * Backlight | ||
226 | ******************************************************************************/ | ||
227 | static int palmtx_backlight_init(struct device *dev) | ||
228 | { | ||
229 | int ret; | ||
230 | |||
231 | ret = gpio_request(GPIO_NR_PALMTX_BL_POWER, "BL POWER"); | ||
232 | if (ret) | ||
233 | goto err; | ||
234 | ret = gpio_direction_output(GPIO_NR_PALMTX_BL_POWER, 0); | ||
235 | if (ret) | ||
236 | goto err2; | ||
237 | ret = gpio_request(GPIO_NR_PALMTX_LCD_POWER, "LCD POWER"); | ||
238 | if (ret) | ||
239 | goto err2; | ||
240 | ret = gpio_direction_output(GPIO_NR_PALMTX_LCD_POWER, 0); | ||
241 | if (ret) | ||
242 | goto err3; | ||
243 | |||
244 | return 0; | ||
245 | err3: | ||
246 | gpio_free(GPIO_NR_PALMTX_LCD_POWER); | ||
247 | err2: | ||
248 | gpio_free(GPIO_NR_PALMTX_BL_POWER); | ||
249 | err: | ||
250 | return ret; | ||
251 | } | ||
252 | |||
253 | static int palmtx_backlight_notify(struct device *dev, int brightness) | ||
254 | { | ||
255 | gpio_set_value(GPIO_NR_PALMTX_BL_POWER, brightness); | ||
256 | gpio_set_value(GPIO_NR_PALMTX_LCD_POWER, brightness); | ||
257 | return brightness; | ||
258 | } | ||
259 | |||
260 | static void palmtx_backlight_exit(struct device *dev) | ||
261 | { | ||
262 | gpio_free(GPIO_NR_PALMTX_BL_POWER); | ||
263 | gpio_free(GPIO_NR_PALMTX_LCD_POWER); | ||
264 | } | ||
265 | |||
266 | static struct platform_pwm_backlight_data palmtx_backlight_data = { | ||
267 | .pwm_id = 0, | ||
268 | .max_brightness = PALMTX_MAX_INTENSITY, | ||
269 | .dft_brightness = PALMTX_MAX_INTENSITY, | ||
270 | .pwm_period_ns = PALMTX_PERIOD_NS, | ||
271 | .init = palmtx_backlight_init, | ||
272 | .notify = palmtx_backlight_notify, | ||
273 | .exit = palmtx_backlight_exit, | ||
274 | }; | ||
275 | |||
276 | static struct platform_device palmtx_backlight = { | ||
277 | .name = "pwm-backlight", | ||
278 | .dev = { | ||
279 | .parent = &pxa27x_device_pwm0.dev, | ||
280 | .platform_data = &palmtx_backlight_data, | ||
281 | }, | ||
282 | }; | ||
283 | |||
284 | /****************************************************************************** | ||
285 | * IrDA | ||
286 | ******************************************************************************/ | ||
287 | static struct pxaficp_platform_data palmtx_ficp_platform_data = { | ||
288 | .gpio_pwdown = GPIO_NR_PALMTX_IR_DISABLE, | ||
289 | .transceiver_cap = IR_SIRMODE | IR_OFF, | ||
290 | }; | ||
291 | |||
292 | /****************************************************************************** | ||
293 | * UDC | ||
294 | ******************************************************************************/ | ||
295 | static struct gpio_vbus_mach_info palmtx_udc_info = { | ||
296 | .gpio_vbus = GPIO_NR_PALMTX_USB_DETECT_N, | ||
297 | .gpio_vbus_inverted = 1, | ||
298 | .gpio_pullup = GPIO_NR_PALMTX_USB_PULLUP, | ||
299 | }; | ||
300 | |||
301 | static struct platform_device palmtx_gpio_vbus = { | ||
302 | .name = "gpio-vbus", | ||
303 | .id = -1, | ||
304 | .dev = { | ||
305 | .platform_data = &palmtx_udc_info, | ||
306 | }, | ||
307 | }; | ||
308 | |||
309 | /****************************************************************************** | ||
310 | * Power supply | ||
311 | ******************************************************************************/ | ||
312 | static int power_supply_init(struct device *dev) | ||
313 | { | ||
314 | int ret; | ||
315 | |||
316 | ret = gpio_request(GPIO_NR_PALMTX_POWER_DETECT, "CABLE_STATE_AC"); | ||
317 | if (ret) | ||
318 | goto err1; | ||
319 | ret = gpio_direction_input(GPIO_NR_PALMTX_POWER_DETECT); | ||
320 | if (ret) | ||
321 | goto err2; | ||
322 | |||
323 | return 0; | ||
324 | |||
325 | err2: | ||
326 | gpio_free(GPIO_NR_PALMTX_POWER_DETECT); | ||
327 | err1: | ||
328 | return ret; | ||
329 | } | ||
330 | |||
331 | static int palmtx_is_ac_online(void) | ||
332 | { | ||
333 | return gpio_get_value(GPIO_NR_PALMTX_POWER_DETECT); | ||
334 | } | ||
335 | |||
336 | static void power_supply_exit(struct device *dev) | ||
337 | { | 234 | { |
338 | gpio_free(GPIO_NR_PALMTX_POWER_DETECT); | 235 | platform_device_register(&palmtx_pxa_keys); |
339 | } | 236 | } |
340 | 237 | #else | |
341 | static char *palmtx_supplicants[] = { | 238 | static inline void palmtx_keys_init(void) {} |
342 | "main-battery", | 239 | #endif |
343 | }; | ||
344 | |||
345 | static struct pda_power_pdata power_supply_info = { | ||
346 | .init = power_supply_init, | ||
347 | .is_ac_online = palmtx_is_ac_online, | ||
348 | .exit = power_supply_exit, | ||
349 | .supplied_to = palmtx_supplicants, | ||
350 | .num_supplicants = ARRAY_SIZE(palmtx_supplicants), | ||
351 | }; | ||
352 | |||
353 | static struct platform_device power_supply = { | ||
354 | .name = "pda-power", | ||
355 | .id = -1, | ||
356 | .dev = { | ||
357 | .platform_data = &power_supply_info, | ||
358 | }, | ||
359 | }; | ||
360 | |||
361 | /****************************************************************************** | ||
362 | * WM97xx battery | ||
363 | ******************************************************************************/ | ||
364 | static struct wm97xx_batt_info wm97xx_batt_pdata = { | ||
365 | .batt_aux = WM97XX_AUX_ID3, | ||
366 | .temp_aux = WM97XX_AUX_ID2, | ||
367 | .charge_gpio = -1, | ||
368 | .max_voltage = PALMTX_BAT_MAX_VOLTAGE, | ||
369 | .min_voltage = PALMTX_BAT_MIN_VOLTAGE, | ||
370 | .batt_mult = 1000, | ||
371 | .batt_div = 414, | ||
372 | .temp_mult = 1, | ||
373 | .temp_div = 1, | ||
374 | .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO, | ||
375 | .batt_name = "main-batt", | ||
376 | }; | ||
377 | |||
378 | /****************************************************************************** | ||
379 | * aSoC audio | ||
380 | ******************************************************************************/ | ||
381 | static struct palm27x_asoc_info palmtx_asoc_pdata = { | ||
382 | .jack_gpio = GPIO_NR_PALMTX_EARPHONE_DETECT, | ||
383 | }; | ||
384 | |||
385 | static pxa2xx_audio_ops_t palmtx_ac97_pdata = { | ||
386 | .reset_gpio = 95, | ||
387 | }; | ||
388 | |||
389 | static struct platform_device palmtx_asoc = { | ||
390 | .name = "palm27x-asoc", | ||
391 | .id = -1, | ||
392 | .dev = { | ||
393 | .platform_data = &palmtx_asoc_pdata, | ||
394 | }, | ||
395 | }; | ||
396 | |||
397 | /****************************************************************************** | ||
398 | * Framebuffer | ||
399 | ******************************************************************************/ | ||
400 | static struct pxafb_mode_info palmtx_lcd_modes[] = { | ||
401 | { | ||
402 | .pixclock = 57692, | ||
403 | .xres = 320, | ||
404 | .yres = 480, | ||
405 | .bpp = 16, | ||
406 | |||
407 | .left_margin = 32, | ||
408 | .right_margin = 1, | ||
409 | .upper_margin = 7, | ||
410 | .lower_margin = 1, | ||
411 | |||
412 | .hsync_len = 4, | ||
413 | .vsync_len = 1, | ||
414 | }, | ||
415 | }; | ||
416 | |||
417 | static struct pxafb_mach_info palmtx_lcd_screen = { | ||
418 | .modes = palmtx_lcd_modes, | ||
419 | .num_modes = ARRAY_SIZE(palmtx_lcd_modes), | ||
420 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | ||
421 | }; | ||
422 | 240 | ||
423 | /****************************************************************************** | 241 | /****************************************************************************** |
424 | * NAND Flash | 242 | * NAND Flash |
425 | ******************************************************************************/ | 243 | ******************************************************************************/ |
244 | #if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE) | ||
426 | static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd, | 245 | static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd, |
427 | unsigned int ctrl) | 246 | unsigned int ctrl) |
428 | { | 247 | { |
@@ -482,36 +301,17 @@ static struct platform_device palmtx_nand = { | |||
482 | } | 301 | } |
483 | }; | 302 | }; |
484 | 303 | ||
485 | /****************************************************************************** | 304 | static void __init palmtx_nand_init(void) |
486 | * Power management - standby | ||
487 | ******************************************************************************/ | ||
488 | static void __init palmtx_pm_init(void) | ||
489 | { | 305 | { |
490 | static u32 resume[] = { | 306 | platform_device_register(&palmtx_nand); |
491 | 0xe3a00101, /* mov r0, #0x40000000 */ | ||
492 | 0xe380060f, /* orr r0, r0, #0x00f00000 */ | ||
493 | 0xe590f008, /* ldr pc, [r0, #0x08] */ | ||
494 | }; | ||
495 | |||
496 | /* copy the bootloader */ | ||
497 | memcpy(phys_to_virt(PALMTX_STR_BASE), resume, sizeof(resume)); | ||
498 | } | 307 | } |
308 | #else | ||
309 | static inline void palmtx_nand_init(void) {} | ||
310 | #endif | ||
499 | 311 | ||
500 | /****************************************************************************** | 312 | /****************************************************************************** |
501 | * Machine init | 313 | * Machine init |
502 | ******************************************************************************/ | 314 | ******************************************************************************/ |
503 | static struct platform_device *devices[] __initdata = { | ||
504 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | ||
505 | &palmtx_pxa_keys, | ||
506 | #endif | ||
507 | &palmtx_backlight, | ||
508 | &power_supply, | ||
509 | &palmtx_asoc, | ||
510 | &palmtx_gpio_vbus, | ||
511 | &palmtx_flash, | ||
512 | &palmtx_nand, | ||
513 | }; | ||
514 | |||
515 | static struct map_desc palmtx_io_desc[] __initdata = { | 315 | static struct map_desc palmtx_io_desc[] __initdata = { |
516 | { | 316 | { |
517 | .virtual = PALMTX_PCMCIA_VIRT, | 317 | .virtual = PALMTX_PCMCIA_VIRT, |
@@ -537,34 +337,29 @@ static void __init palmtx_map_io(void) | |||
537 | iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc)); | 337 | iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc)); |
538 | } | 338 | } |
539 | 339 | ||
540 | /* setup udc GPIOs initial state */ | ||
541 | static void __init palmtx_udc_init(void) | ||
542 | { | ||
543 | if (!gpio_request(GPIO_NR_PALMTX_USB_PULLUP, "UDC Vbus")) { | ||
544 | gpio_direction_output(GPIO_NR_PALMTX_USB_PULLUP, 1); | ||
545 | gpio_free(GPIO_NR_PALMTX_USB_PULLUP); | ||
546 | } | ||
547 | } | ||
548 | |||
549 | |||
550 | static void __init palmtx_init(void) | 340 | static void __init palmtx_init(void) |
551 | { | 341 | { |
552 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config)); | 342 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config)); |
553 | |||
554 | pxa_set_ffuart_info(NULL); | 343 | pxa_set_ffuart_info(NULL); |
555 | pxa_set_btuart_info(NULL); | 344 | pxa_set_btuart_info(NULL); |
556 | pxa_set_stuart_info(NULL); | 345 | pxa_set_stuart_info(NULL); |
557 | 346 | ||
558 | palmtx_pm_init(); | 347 | palm27x_mmc_init(GPIO_NR_PALMTX_SD_DETECT_N, GPIO_NR_PALMTX_SD_READONLY, |
559 | set_pxa_fb_info(&palmtx_lcd_screen); | 348 | GPIO_NR_PALMTX_SD_POWER, 0); |
560 | pxa_set_mci_info(&palmtx_mci_platform_data); | 349 | palm27x_pm_init(PALMTX_STR_BASE); |
561 | palmtx_udc_init(); | 350 | palm27x_lcd_init(-1, &palm_320x480_lcd_mode); |
562 | pxa_set_ac97_info(&palmtx_ac97_pdata); | 351 | palm27x_udc_init(GPIO_NR_PALMTX_USB_DETECT_N, |
563 | pxa_set_ficp_info(&palmtx_ficp_platform_data); | 352 | GPIO_NR_PALMTX_USB_PULLUP, 1); |
564 | pxa_set_keypad_info(&palmtx_keypad_platform_data); | 353 | palm27x_irda_init(GPIO_NR_PALMTX_IR_DISABLE); |
565 | wm97xx_bat_set_pdata(&wm97xx_batt_pdata); | 354 | palm27x_ac97_init(PALMTX_BAT_MIN_VOLTAGE, PALMTX_BAT_MAX_VOLTAGE, |
566 | 355 | GPIO_NR_PALMTX_EARPHONE_DETECT, 95); | |
567 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 356 | palm27x_pwm_init(GPIO_NR_PALMTX_BL_POWER, GPIO_NR_PALMTX_LCD_POWER); |
357 | palm27x_power_init(GPIO_NR_PALMTX_POWER_DETECT, -1); | ||
358 | palm27x_pmic_init(); | ||
359 | palmtx_kpc_init(); | ||
360 | palmtx_keys_init(); | ||
361 | palmtx_nor_init(); | ||
362 | palmtx_nand_init(); | ||
568 | } | 363 | } |
569 | 364 | ||
570 | MACHINE_START(PALMTX, "Palm T|X") | 365 | MACHINE_START(PALMTX, "Palm T|X") |
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c index 3a7925ca3944..87e4b1044e0b 100644 --- a/arch/arm/mach-pxa/palmz72.c +++ b/arch/arm/mach-pxa/palmz72.c | |||
@@ -27,7 +27,7 @@ | |||
27 | #include <linux/pda_power.h> | 27 | #include <linux/pda_power.h> |
28 | #include <linux/pwm_backlight.h> | 28 | #include <linux/pwm_backlight.h> |
29 | #include <linux/gpio.h> | 29 | #include <linux/gpio.h> |
30 | #include <linux/wm97xx_batt.h> | 30 | #include <linux/wm97xx.h> |
31 | #include <linux/power_supply.h> | 31 | #include <linux/power_supply.h> |
32 | #include <linux/usb/gpio_vbus.h> | 32 | #include <linux/usb/gpio_vbus.h> |
33 | 33 | ||
@@ -44,6 +44,7 @@ | |||
44 | #include <mach/pxa27x_keypad.h> | 44 | #include <mach/pxa27x_keypad.h> |
45 | #include <mach/udc.h> | 45 | #include <mach/udc.h> |
46 | #include <mach/palmasoc.h> | 46 | #include <mach/palmasoc.h> |
47 | #include <mach/palm27x.h> | ||
47 | 48 | ||
48 | #include <mach/pm.h> | 49 | #include <mach/pm.h> |
49 | 50 | ||
@@ -109,21 +110,9 @@ static unsigned long palmz72_pin_config[] __initdata = { | |||
109 | }; | 110 | }; |
110 | 111 | ||
111 | /****************************************************************************** | 112 | /****************************************************************************** |
112 | * SD/MMC card controller | ||
113 | ******************************************************************************/ | ||
114 | /* SD_POWER is not actually power, but it is more like chip | ||
115 | * select, i.e. it is inverted */ | ||
116 | static struct pxamci_platform_data palmz72_mci_platform_data = { | ||
117 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
118 | .gpio_card_detect = GPIO_NR_PALMZ72_SD_DETECT_N, | ||
119 | .gpio_card_ro = GPIO_NR_PALMZ72_SD_RO, | ||
120 | .gpio_power = GPIO_NR_PALMZ72_SD_POWER_N, | ||
121 | .gpio_power_invert = 1, | ||
122 | }; | ||
123 | |||
124 | /****************************************************************************** | ||
125 | * GPIO keyboard | 113 | * GPIO keyboard |
126 | ******************************************************************************/ | 114 | ******************************************************************************/ |
115 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) | ||
127 | static unsigned int palmz72_matrix_keys[] = { | 116 | static unsigned int palmz72_matrix_keys[] = { |
128 | KEY(0, 0, KEY_POWER), | 117 | KEY(0, 0, KEY_POWER), |
129 | KEY(0, 1, KEY_F1), | 118 | KEY(0, 1, KEY_F1), |
@@ -149,77 +138,18 @@ static struct pxa27x_keypad_platform_data palmz72_keypad_platform_data = { | |||
149 | .debounce_interval = 30, | 138 | .debounce_interval = 30, |
150 | }; | 139 | }; |
151 | 140 | ||
152 | /****************************************************************************** | 141 | static void __init palmz72_kpc_init(void) |
153 | * Backlight | ||
154 | ******************************************************************************/ | ||
155 | static int palmz72_backlight_init(struct device *dev) | ||
156 | { | 142 | { |
157 | int ret; | 143 | pxa_set_keypad_info(&palmz72_keypad_platform_data); |
158 | |||
159 | ret = gpio_request(GPIO_NR_PALMZ72_BL_POWER, "BL POWER"); | ||
160 | if (ret) | ||
161 | goto err; | ||
162 | ret = gpio_direction_output(GPIO_NR_PALMZ72_BL_POWER, 0); | ||
163 | if (ret) | ||
164 | goto err2; | ||
165 | ret = gpio_request(GPIO_NR_PALMZ72_LCD_POWER, "LCD POWER"); | ||
166 | if (ret) | ||
167 | goto err2; | ||
168 | ret = gpio_direction_output(GPIO_NR_PALMZ72_LCD_POWER, 0); | ||
169 | if (ret) | ||
170 | goto err3; | ||
171 | |||
172 | return 0; | ||
173 | err3: | ||
174 | gpio_free(GPIO_NR_PALMZ72_LCD_POWER); | ||
175 | err2: | ||
176 | gpio_free(GPIO_NR_PALMZ72_BL_POWER); | ||
177 | err: | ||
178 | return ret; | ||
179 | } | ||
180 | |||
181 | static int palmz72_backlight_notify(struct device *dev, int brightness) | ||
182 | { | ||
183 | gpio_set_value(GPIO_NR_PALMZ72_BL_POWER, brightness); | ||
184 | gpio_set_value(GPIO_NR_PALMZ72_LCD_POWER, brightness); | ||
185 | return brightness; | ||
186 | } | ||
187 | |||
188 | static void palmz72_backlight_exit(struct device *dev) | ||
189 | { | ||
190 | gpio_free(GPIO_NR_PALMZ72_BL_POWER); | ||
191 | gpio_free(GPIO_NR_PALMZ72_LCD_POWER); | ||
192 | } | 144 | } |
193 | 145 | #else | |
194 | static struct platform_pwm_backlight_data palmz72_backlight_data = { | 146 | static inline void palmz72_kpc_init(void) {} |
195 | .pwm_id = 0, | 147 | #endif |
196 | .max_brightness = PALMZ72_MAX_INTENSITY, | ||
197 | .dft_brightness = PALMZ72_MAX_INTENSITY, | ||
198 | .pwm_period_ns = PALMZ72_PERIOD_NS, | ||
199 | .init = palmz72_backlight_init, | ||
200 | .notify = palmz72_backlight_notify, | ||
201 | .exit = palmz72_backlight_exit, | ||
202 | }; | ||
203 | |||
204 | static struct platform_device palmz72_backlight = { | ||
205 | .name = "pwm-backlight", | ||
206 | .dev = { | ||
207 | .parent = &pxa27x_device_pwm0.dev, | ||
208 | .platform_data = &palmz72_backlight_data, | ||
209 | }, | ||
210 | }; | ||
211 | |||
212 | /****************************************************************************** | ||
213 | * IrDA | ||
214 | ******************************************************************************/ | ||
215 | static struct pxaficp_platform_data palmz72_ficp_platform_data = { | ||
216 | .gpio_pwdown = GPIO_NR_PALMZ72_IR_DISABLE, | ||
217 | .transceiver_cap = IR_SIRMODE | IR_OFF, | ||
218 | }; | ||
219 | 148 | ||
220 | /****************************************************************************** | 149 | /****************************************************************************** |
221 | * LEDs | 150 | * LEDs |
222 | ******************************************************************************/ | 151 | ******************************************************************************/ |
152 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | ||
223 | static struct gpio_led gpio_leds[] = { | 153 | static struct gpio_led gpio_leds[] = { |
224 | { | 154 | { |
225 | .name = "palmz72:green:led", | 155 | .name = "palmz72:green:led", |
@@ -241,139 +171,13 @@ static struct platform_device palmz72_leds = { | |||
241 | } | 171 | } |
242 | }; | 172 | }; |
243 | 173 | ||
244 | /****************************************************************************** | 174 | static void __init palmz72_leds_init(void) |
245 | * UDC | ||
246 | ******************************************************************************/ | ||
247 | static struct gpio_vbus_mach_info palmz72_udc_info = { | ||
248 | .gpio_vbus = GPIO_NR_PALMZ72_USB_DETECT_N, | ||
249 | .gpio_pullup = GPIO_NR_PALMZ72_USB_PULLUP, | ||
250 | }; | ||
251 | |||
252 | static struct platform_device palmz72_gpio_vbus = { | ||
253 | .name = "gpio-vbus", | ||
254 | .id = -1, | ||
255 | .dev = { | ||
256 | .platform_data = &palmz72_udc_info, | ||
257 | }, | ||
258 | }; | ||
259 | |||
260 | /****************************************************************************** | ||
261 | * Power supply | ||
262 | ******************************************************************************/ | ||
263 | static int power_supply_init(struct device *dev) | ||
264 | { | ||
265 | int ret; | ||
266 | |||
267 | ret = gpio_request(GPIO_NR_PALMZ72_POWER_DETECT, "CABLE_STATE_AC"); | ||
268 | if (ret) | ||
269 | goto err1; | ||
270 | ret = gpio_direction_input(GPIO_NR_PALMZ72_POWER_DETECT); | ||
271 | if (ret) | ||
272 | goto err2; | ||
273 | |||
274 | ret = gpio_request(GPIO_NR_PALMZ72_USB_DETECT_N, "CABLE_STATE_USB"); | ||
275 | if (ret) | ||
276 | goto err2; | ||
277 | ret = gpio_direction_input(GPIO_NR_PALMZ72_USB_DETECT_N); | ||
278 | if (ret) | ||
279 | goto err3; | ||
280 | |||
281 | return 0; | ||
282 | err3: | ||
283 | gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N); | ||
284 | err2: | ||
285 | gpio_free(GPIO_NR_PALMZ72_POWER_DETECT); | ||
286 | err1: | ||
287 | return ret; | ||
288 | } | ||
289 | |||
290 | static int palmz72_is_ac_online(void) | ||
291 | { | ||
292 | return gpio_get_value(GPIO_NR_PALMZ72_POWER_DETECT); | ||
293 | } | ||
294 | |||
295 | static int palmz72_is_usb_online(void) | ||
296 | { | 175 | { |
297 | return !gpio_get_value(GPIO_NR_PALMZ72_USB_DETECT_N); | 176 | platform_device_register(&palmz72_leds); |
298 | } | 177 | } |
299 | 178 | #else | |
300 | static void power_supply_exit(struct device *dev) | 179 | static inline void palmz72_leds_init(void) {} |
301 | { | 180 | #endif |
302 | gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N); | ||
303 | gpio_free(GPIO_NR_PALMZ72_POWER_DETECT); | ||
304 | } | ||
305 | |||
306 | static char *palmz72_supplicants[] = { | ||
307 | "main-battery", | ||
308 | }; | ||
309 | |||
310 | static struct pda_power_pdata power_supply_info = { | ||
311 | .init = power_supply_init, | ||
312 | .is_ac_online = palmz72_is_ac_online, | ||
313 | .is_usb_online = palmz72_is_usb_online, | ||
314 | .exit = power_supply_exit, | ||
315 | .supplied_to = palmz72_supplicants, | ||
316 | .num_supplicants = ARRAY_SIZE(palmz72_supplicants), | ||
317 | }; | ||
318 | |||
319 | static struct platform_device power_supply = { | ||
320 | .name = "pda-power", | ||
321 | .id = -1, | ||
322 | .dev = { | ||
323 | .platform_data = &power_supply_info, | ||
324 | }, | ||
325 | }; | ||
326 | |||
327 | /****************************************************************************** | ||
328 | * WM97xx battery | ||
329 | ******************************************************************************/ | ||
330 | static struct wm97xx_batt_info wm97xx_batt_pdata = { | ||
331 | .batt_aux = WM97XX_AUX_ID3, | ||
332 | .temp_aux = WM97XX_AUX_ID2, | ||
333 | .charge_gpio = -1, | ||
334 | .max_voltage = PALMZ72_BAT_MAX_VOLTAGE, | ||
335 | .min_voltage = PALMZ72_BAT_MIN_VOLTAGE, | ||
336 | .batt_mult = 1000, | ||
337 | .batt_div = 414, | ||
338 | .temp_mult = 1, | ||
339 | .temp_div = 1, | ||
340 | .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO, | ||
341 | .batt_name = "main-batt", | ||
342 | }; | ||
343 | |||
344 | /****************************************************************************** | ||
345 | * aSoC audio | ||
346 | ******************************************************************************/ | ||
347 | static struct platform_device palmz72_asoc = { | ||
348 | .name = "palm27x-asoc", | ||
349 | .id = -1, | ||
350 | }; | ||
351 | |||
352 | /****************************************************************************** | ||
353 | * Framebuffer | ||
354 | ******************************************************************************/ | ||
355 | static struct pxafb_mode_info palmz72_lcd_modes[] = { | ||
356 | { | ||
357 | .pixclock = 115384, | ||
358 | .xres = 320, | ||
359 | .yres = 320, | ||
360 | .bpp = 16, | ||
361 | |||
362 | .left_margin = 27, | ||
363 | .right_margin = 7, | ||
364 | .upper_margin = 7, | ||
365 | .lower_margin = 8, | ||
366 | |||
367 | .hsync_len = 6, | ||
368 | .vsync_len = 1, | ||
369 | }, | ||
370 | }; | ||
371 | |||
372 | static struct pxafb_mach_info palmz72_lcd_screen = { | ||
373 | .modes = palmz72_lcd_modes, | ||
374 | .num_modes = ARRAY_SIZE(palmz72_lcd_modes), | ||
375 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | ||
376 | }; | ||
377 | 181 | ||
378 | #ifdef CONFIG_PM | 182 | #ifdef CONFIG_PM |
379 | 183 | ||
@@ -452,40 +256,26 @@ device_initcall(palmz72_pm_init); | |||
452 | /****************************************************************************** | 256 | /****************************************************************************** |
453 | * Machine init | 257 | * Machine init |
454 | ******************************************************************************/ | 258 | ******************************************************************************/ |
455 | static struct platform_device *devices[] __initdata = { | ||
456 | &palmz72_backlight, | ||
457 | &palmz72_leds, | ||
458 | &palmz72_asoc, | ||
459 | &power_supply, | ||
460 | &palmz72_gpio_vbus, | ||
461 | }; | ||
462 | |||
463 | /* setup udc GPIOs initial state */ | ||
464 | static void __init palmz72_udc_init(void) | ||
465 | { | ||
466 | if (!gpio_request(GPIO_NR_PALMZ72_USB_PULLUP, "USB Pullup")) { | ||
467 | gpio_direction_output(GPIO_NR_PALMZ72_USB_PULLUP, 0); | ||
468 | gpio_free(GPIO_NR_PALMZ72_USB_PULLUP); | ||
469 | } | ||
470 | } | ||
471 | |||
472 | static void __init palmz72_init(void) | 259 | static void __init palmz72_init(void) |
473 | { | 260 | { |
474 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config)); | 261 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config)); |
475 | |||
476 | pxa_set_ffuart_info(NULL); | 262 | pxa_set_ffuart_info(NULL); |
477 | pxa_set_btuart_info(NULL); | 263 | pxa_set_btuart_info(NULL); |
478 | pxa_set_stuart_info(NULL); | 264 | pxa_set_stuart_info(NULL); |
479 | 265 | ||
480 | set_pxa_fb_info(&palmz72_lcd_screen); | 266 | palm27x_mmc_init(GPIO_NR_PALMZ72_SD_DETECT_N, GPIO_NR_PALMZ72_SD_RO, |
481 | pxa_set_mci_info(&palmz72_mci_platform_data); | 267 | GPIO_NR_PALMZ72_SD_POWER_N, 1); |
482 | palmz72_udc_init(); | 268 | palm27x_lcd_init(-1, &palm_320x320_lcd_mode); |
483 | pxa_set_ac97_info(NULL); | 269 | palm27x_udc_init(GPIO_NR_PALMZ72_USB_DETECT_N, |
484 | pxa_set_ficp_info(&palmz72_ficp_platform_data); | 270 | GPIO_NR_PALMZ72_USB_PULLUP, 0); |
485 | pxa_set_keypad_info(&palmz72_keypad_platform_data); | 271 | palm27x_irda_init(GPIO_NR_PALMZ72_IR_DISABLE); |
486 | wm97xx_bat_set_pdata(&wm97xx_batt_pdata); | 272 | palm27x_ac97_init(PALMZ72_BAT_MIN_VOLTAGE, PALMZ72_BAT_MAX_VOLTAGE, |
487 | 273 | -1, 113); | |
488 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 274 | palm27x_pwm_init(-1, -1); |
275 | palm27x_power_init(-1, -1); | ||
276 | palm27x_pmic_init(); | ||
277 | palmz72_kpc_init(); | ||
278 | palmz72_leds_init(); | ||
489 | } | 279 | } |
490 | 280 | ||
491 | MACHINE_START(PALMZ72, "Palm Zire72") | 281 | MACHINE_START(PALMZ72, "Palm Zire72") |
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index bc2758b54446..55e8fcde0141 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c | |||
@@ -43,7 +43,6 @@ | |||
43 | #include <mach/irda.h> | 43 | #include <mach/irda.h> |
44 | #include <mach/poodle.h> | 44 | #include <mach/poodle.h> |
45 | #include <mach/pxafb.h> | 45 | #include <mach/pxafb.h> |
46 | #include <mach/sharpsl.h> | ||
47 | #include <mach/pxa2xx_spi.h> | 46 | #include <mach/pxa2xx_spi.h> |
48 | #include <plat/i2c.h> | 47 | #include <plat/i2c.h> |
49 | 48 | ||
@@ -53,7 +52,6 @@ | |||
53 | 52 | ||
54 | #include "generic.h" | 53 | #include "generic.h" |
55 | #include "devices.h" | 54 | #include "devices.h" |
56 | #include "sharpsl.h" | ||
57 | 55 | ||
58 | static unsigned long poodle_pin_config[] __initdata = { | 56 | static unsigned long poodle_pin_config[] __initdata = { |
59 | /* I/O */ | 57 | /* I/O */ |
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 0b9ad30bfd51..de53f2e4aa39 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
@@ -322,6 +322,7 @@ void __init pxa26x_init_irq(void) | |||
322 | 322 | ||
323 | static struct platform_device *pxa25x_devices[] __initdata = { | 323 | static struct platform_device *pxa25x_devices[] __initdata = { |
324 | &pxa25x_device_udc, | 324 | &pxa25x_device_udc, |
325 | &pxa_device_pmu, | ||
325 | &pxa_device_i2s, | 326 | &pxa_device_i2s, |
326 | &sa1100_device_rtc, | 327 | &sa1100_device_rtc, |
327 | &pxa25x_device_ssp, | 328 | &pxa25x_device_ssp, |
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index c059dac02b61..12e5b9f01e6f 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
@@ -383,6 +383,7 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info) | |||
383 | 383 | ||
384 | static struct platform_device *devices[] __initdata = { | 384 | static struct platform_device *devices[] __initdata = { |
385 | &pxa27x_device_udc, | 385 | &pxa27x_device_udc, |
386 | &pxa_device_pmu, | ||
386 | &pxa_device_i2s, | 387 | &pxa_device_i2s, |
387 | &sa1100_device_rtc, | 388 | &sa1100_device_rtc, |
388 | &pxa_device_rtc, | 389 | &pxa_device_rtc, |
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index f544e58e1536..fa0014847c71 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
@@ -52,7 +52,7 @@ | |||
52 | static unsigned char smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, }; | 52 | static unsigned char smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, }; |
53 | 53 | ||
54 | /* crystal frequency to HSIO bus frequency multiplier (HSS) */ | 54 | /* crystal frequency to HSIO bus frequency multiplier (HSS) */ |
55 | static unsigned char hss_mult[4] = { 8, 12, 16, 0 }; | 55 | static unsigned char hss_mult[4] = { 8, 12, 16, 24 }; |
56 | 56 | ||
57 | /* | 57 | /* |
58 | * Get the clock frequency as reflected by CCSR and the turbo flag. | 58 | * Get the clock frequency as reflected by CCSR and the turbo flag. |
@@ -552,11 +552,23 @@ static void pxa_unmask_ext_wakeup(unsigned int irq) | |||
552 | PECR |= PECR_IE(irq - IRQ_WAKEUP0); | 552 | PECR |= PECR_IE(irq - IRQ_WAKEUP0); |
553 | } | 553 | } |
554 | 554 | ||
555 | static int pxa_set_ext_wakeup_type(unsigned int irq, unsigned int flow_type) | ||
556 | { | ||
557 | if (flow_type & IRQ_TYPE_EDGE_RISING) | ||
558 | PWER |= 1 << (irq - IRQ_WAKEUP0); | ||
559 | |||
560 | if (flow_type & IRQ_TYPE_EDGE_FALLING) | ||
561 | PWER |= 1 << (irq - IRQ_WAKEUP0 + 2); | ||
562 | |||
563 | return 0; | ||
564 | } | ||
565 | |||
555 | static struct irq_chip pxa_ext_wakeup_chip = { | 566 | static struct irq_chip pxa_ext_wakeup_chip = { |
556 | .name = "WAKEUP", | 567 | .name = "WAKEUP", |
557 | .ack = pxa_ack_ext_wakeup, | 568 | .ack = pxa_ack_ext_wakeup, |
558 | .mask = pxa_mask_ext_wakeup, | 569 | .mask = pxa_mask_ext_wakeup, |
559 | .unmask = pxa_unmask_ext_wakeup, | 570 | .unmask = pxa_unmask_ext_wakeup, |
571 | .set_type = pxa_set_ext_wakeup_type, | ||
560 | }; | 572 | }; |
561 | 573 | ||
562 | static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) | 574 | static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) |
@@ -596,6 +608,7 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info) | |||
596 | 608 | ||
597 | static struct platform_device *devices[] __initdata = { | 609 | static struct platform_device *devices[] __initdata = { |
598 | &pxa27x_device_udc, | 610 | &pxa27x_device_udc, |
611 | &pxa_device_pmu, | ||
599 | &pxa_device_i2s, | 612 | &pxa_device_i2s, |
600 | &sa1100_device_rtc, | 613 | &sa1100_device_rtc, |
601 | &pxa_device_rtc, | 614 | &pxa_device_rtc, |
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c index d4b61b3f08f3..67e04f4e07c1 100644 --- a/arch/arm/mach-pxa/raumfeld.c +++ b/arch/arm/mach-pxa/raumfeld.c | |||
@@ -745,13 +745,32 @@ static int raumfeld_is_usb_online(void) | |||
745 | 745 | ||
746 | static char *raumfeld_power_supplicants[] = { "ds2760-battery.0" }; | 746 | static char *raumfeld_power_supplicants[] = { "ds2760-battery.0" }; |
747 | 747 | ||
748 | static void raumfeld_power_signal_charged(void) | ||
749 | { | ||
750 | struct power_supply *psy = | ||
751 | power_supply_get_by_name(raumfeld_power_supplicants[0]); | ||
752 | |||
753 | if (psy) | ||
754 | power_supply_set_battery_charged(psy); | ||
755 | } | ||
756 | |||
757 | static int raumfeld_power_resume(void) | ||
758 | { | ||
759 | /* check if GPIO_CHARGE_DONE went low while we were sleeping */ | ||
760 | if (!gpio_get_value(GPIO_CHARGE_DONE)) | ||
761 | raumfeld_power_signal_charged(); | ||
762 | |||
763 | return 0; | ||
764 | } | ||
765 | |||
748 | static struct pda_power_pdata power_supply_info = { | 766 | static struct pda_power_pdata power_supply_info = { |
749 | .init = power_supply_init, | 767 | .init = power_supply_init, |
750 | .is_ac_online = raumfeld_is_ac_online, | 768 | .is_ac_online = raumfeld_is_ac_online, |
751 | .is_usb_online = raumfeld_is_usb_online, | 769 | .is_usb_online = raumfeld_is_usb_online, |
752 | .exit = power_supply_exit, | 770 | .exit = power_supply_exit, |
753 | .supplied_to = raumfeld_power_supplicants, | 771 | .supplied_to = raumfeld_power_supplicants, |
754 | .num_supplicants = ARRAY_SIZE(raumfeld_power_supplicants) | 772 | .num_supplicants = ARRAY_SIZE(raumfeld_power_supplicants), |
773 | .resume = raumfeld_power_resume, | ||
755 | }; | 774 | }; |
756 | 775 | ||
757 | static struct resource power_supply_resources[] = { | 776 | static struct resource power_supply_resources[] = { |
@@ -766,13 +785,7 @@ static struct resource power_supply_resources[] = { | |||
766 | 785 | ||
767 | static irqreturn_t charge_done_irq(int irq, void *dev_id) | 786 | static irqreturn_t charge_done_irq(int irq, void *dev_id) |
768 | { | 787 | { |
769 | struct power_supply *psy; | 788 | raumfeld_power_signal_charged(); |
770 | |||
771 | psy = power_supply_get_by_name("ds2760-battery.0"); | ||
772 | |||
773 | if (psy) | ||
774 | power_supply_set_battery_charged(psy); | ||
775 | |||
776 | return IRQ_HANDLED; | 789 | return IRQ_HANDLED; |
777 | } | 790 | } |
778 | 791 | ||
diff --git a/arch/arm/mach-pxa/sharpsl.h b/arch/arm/mach-pxa/sharpsl.h deleted file mode 100644 index 0cc1203c5bef..000000000000 --- a/arch/arm/mach-pxa/sharpsl.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2004-2005 Richard Purdie | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | * | ||
8 | */ | ||
9 | |||
10 | #include <mach/sharpsl_pm.h> | ||
11 | |||
12 | /* | ||
13 | * SharpSL Battery/PM Driver | ||
14 | */ | ||
15 | #define READ_GPIO_BIT(x) (GPLR(x) & GPIO_bit(x)) | ||
16 | |||
17 | /* MAX1111 Channel Definitions */ | ||
18 | #define MAX1111_BATT_VOLT 4u | ||
19 | #define MAX1111_BATT_TEMP 2u | ||
20 | #define MAX1111_ACIN_VOLT 6u | ||
21 | |||
22 | extern struct battery_thresh sharpsl_battery_levels_acin[]; | ||
23 | extern struct battery_thresh sharpsl_battery_levels_noac[]; | ||
24 | int sharpsl_pm_pxa_read_max1111(int channel); | ||
25 | |||
26 | |||
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index cb4767251f3c..8fed027b12dc 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c | |||
@@ -29,11 +29,8 @@ | |||
29 | #include <mach/pm.h> | 29 | #include <mach/pm.h> |
30 | #include <mach/pxa2xx-regs.h> | 30 | #include <mach/pxa2xx-regs.h> |
31 | #include <mach/regs-rtc.h> | 31 | #include <mach/regs-rtc.h> |
32 | #include <mach/sharpsl.h> | ||
33 | #include <mach/sharpsl_pm.h> | 32 | #include <mach/sharpsl_pm.h> |
34 | 33 | ||
35 | #include "sharpsl.h" | ||
36 | |||
37 | /* | 34 | /* |
38 | * Constants | 35 | * Constants |
39 | */ | 36 | */ |
@@ -180,17 +177,12 @@ int sharpsl_pm_pxa_read_max1111(int channel) | |||
180 | if (machine_is_tosa()) | 177 | if (machine_is_tosa()) |
181 | return 0; | 178 | return 0; |
182 | 179 | ||
183 | #ifdef CONFIG_CORGI_SSP_DEPRECATED | ||
184 | return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1 | ||
185 | | MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR); | ||
186 | #else | ||
187 | extern int max1111_read_channel(int); | 180 | extern int max1111_read_channel(int); |
188 | 181 | ||
189 | /* max1111 accepts channels from 0-3, however, | 182 | /* max1111 accepts channels from 0-3, however, |
190 | * it is encoded from 0-7 here in the code. | 183 | * it is encoded from 0-7 here in the code. |
191 | */ | 184 | */ |
192 | return max1111_read_channel(channel >> 1); | 185 | return max1111_read_channel(channel >> 1); |
193 | #endif | ||
194 | } | 186 | } |
195 | 187 | ||
196 | static int get_percentage(int voltage) | 188 | static int get_percentage(int voltage) |
@@ -277,21 +269,6 @@ static void sharpsl_battery_thread(struct work_struct *private_) | |||
277 | dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %ld\n", voltage, | 269 | dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %ld\n", voltage, |
278 | sharpsl_pm.battstat.mainbat_status, sharpsl_pm.battstat.mainbat_percent, jiffies); | 270 | sharpsl_pm.battstat.mainbat_status, sharpsl_pm.battstat.mainbat_percent, jiffies); |
279 | 271 | ||
280 | #ifdef CONFIG_BACKLIGHT_CORGI | ||
281 | /* If battery is low. limit backlight intensity to save power. */ | ||
282 | if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE) | ||
283 | && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) | ||
284 | || (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL))) { | ||
285 | if (!(sharpsl_pm.flags & SHARPSL_BL_LIMIT)) { | ||
286 | sharpsl_pm.machinfo->backlight_limit(1); | ||
287 | sharpsl_pm.flags |= SHARPSL_BL_LIMIT; | ||
288 | } | ||
289 | } else if (sharpsl_pm.flags & SHARPSL_BL_LIMIT) { | ||
290 | sharpsl_pm.machinfo->backlight_limit(0); | ||
291 | sharpsl_pm.flags &= ~SHARPSL_BL_LIMIT; | ||
292 | } | ||
293 | #endif | ||
294 | |||
295 | /* Suspend if critical battery level */ | 272 | /* Suspend if critical battery level */ |
296 | if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE) | 273 | if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE) |
297 | && (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL) | 274 | && (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL) |
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index 2ed95f369cfc..52c30b01a671 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S | |||
@@ -339,10 +339,6 @@ ENTRY(pxa_cpu_resume) | |||
339 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs | 339 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs |
340 | mcr p15, 0, r1, c7, c7, 0 @ invalidate I & D caches, BTB | 340 | mcr p15, 0, r1, c7, c7, 0 @ invalidate I & D caches, BTB |
341 | 341 | ||
342 | #ifdef CONFIG_XSCALE_CACHE_ERRATA | ||
343 | bic r9, r9, #0x0004 @ see cpu_xscale_proc_init | ||
344 | #endif | ||
345 | |||
346 | mcr p14, 0, r3, c6, c0, 0 @ clock configuration, turbo mode. | 342 | mcr p14, 0, r3, c6, c0, 0 @ clock configuration, turbo mode. |
347 | mcr p15, 0, r4, c15, c1, 0 @ CP access reg | 343 | mcr p15, 0, r4, c15, c1, 0 @ CP access reg |
348 | mcr p15, 0, r5, c13, c0, 0 @ PID | 344 | mcr p15, 0, r5, c13, c0, 0 @ PID |
@@ -368,9 +364,6 @@ sleep_save_sp: | |||
368 | 364 | ||
369 | .text | 365 | .text |
370 | resume_after_mmu: | 366 | resume_after_mmu: |
371 | #ifdef CONFIG_XSCALE_CACHE_ERRATA | ||
372 | bl cpu_xscale_proc_init | ||
373 | #endif | ||
374 | ldmfd sp!, {r2, r3} | 367 | ldmfd sp!, {r2, r3} |
375 | #ifndef CONFIG_IWMMXT | 368 | #ifndef CONFIG_IWMMXT |
376 | mar acc0, r2, r3 | 369 | mar acc0, r2, r3 |
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 51756c723557..1cd99cb87bb1 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
@@ -18,14 +18,15 @@ | |||
18 | #include <linux/gpio_keys.h> | 18 | #include <linux/gpio_keys.h> |
19 | #include <linux/gpio.h> | 19 | #include <linux/gpio.h> |
20 | #include <linux/leds.h> | 20 | #include <linux/leds.h> |
21 | #include <linux/mtd/physmap.h> | ||
22 | #include <linux/i2c.h> | 21 | #include <linux/i2c.h> |
23 | #include <linux/i2c/pca953x.h> | 22 | #include <linux/i2c/pca953x.h> |
24 | #include <linux/spi/spi.h> | 23 | #include <linux/spi/spi.h> |
25 | #include <linux/spi/ads7846.h> | 24 | #include <linux/spi/ads7846.h> |
26 | #include <linux/spi/corgi_lcd.h> | 25 | #include <linux/spi/corgi_lcd.h> |
26 | #include <linux/mtd/physmap.h> | ||
27 | #include <linux/mtd/sharpsl.h> | 27 | #include <linux/mtd/sharpsl.h> |
28 | #include <linux/input/matrix_keypad.h> | 28 | #include <linux/input/matrix_keypad.h> |
29 | #include <linux/regulator/machine.h> | ||
29 | 30 | ||
30 | #include <asm/setup.h> | 31 | #include <asm/setup.h> |
31 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
@@ -33,22 +34,25 @@ | |||
33 | #include <asm/mach/sharpsl_param.h> | 34 | #include <asm/mach/sharpsl_param.h> |
34 | #include <asm/hardware/scoop.h> | 35 | #include <asm/hardware/scoop.h> |
35 | 36 | ||
36 | |||
37 | #include <mach/pxa27x.h> | 37 | #include <mach/pxa27x.h> |
38 | #include <mach/pxa27x-udc.h> | 38 | #include <mach/pxa27x-udc.h> |
39 | #include <mach/reset.h> | 39 | #include <mach/reset.h> |
40 | #include <plat/i2c.h> | ||
41 | #include <mach/irda.h> | 40 | #include <mach/irda.h> |
42 | #include <mach/mmc.h> | 41 | #include <mach/mmc.h> |
43 | #include <mach/ohci.h> | 42 | #include <mach/ohci.h> |
44 | #include <mach/pxafb.h> | 43 | #include <mach/pxafb.h> |
45 | #include <mach/pxa2xx_spi.h> | 44 | #include <mach/pxa2xx_spi.h> |
46 | #include <mach/spitz.h> | 45 | #include <mach/spitz.h> |
46 | #include <mach/sharpsl_pm.h> | ||
47 | |||
48 | #include <plat/i2c.h> | ||
47 | 49 | ||
48 | #include "generic.h" | 50 | #include "generic.h" |
49 | #include "devices.h" | 51 | #include "devices.h" |
50 | #include "sharpsl.h" | ||
51 | 52 | ||
53 | /****************************************************************************** | ||
54 | * Pin configuration | ||
55 | ******************************************************************************/ | ||
52 | static unsigned long spitz_pin_config[] __initdata = { | 56 | static unsigned long spitz_pin_config[] __initdata = { |
53 | /* Chip Selects */ | 57 | /* Chip Selects */ |
54 | GPIO78_nCS_2, /* SCOOP #2 */ | 58 | GPIO78_nCS_2, /* SCOOP #2 */ |
@@ -124,10 +128,13 @@ static unsigned long spitz_pin_config[] __initdata = { | |||
124 | GPIO1_GPIO | WAKEUP_ON_EDGE_FALL, /* SPITZ_GPIO_RESET */ | 128 | GPIO1_GPIO | WAKEUP_ON_EDGE_FALL, /* SPITZ_GPIO_RESET */ |
125 | }; | 129 | }; |
126 | 130 | ||
127 | /* | 131 | |
128 | * Spitz SCOOP Device #1 | 132 | /****************************************************************************** |
129 | */ | 133 | * Scoop GPIO expander |
130 | static struct resource spitz_scoop_resources[] = { | 134 | ******************************************************************************/ |
135 | #if defined(CONFIG_SHARP_SCOOP) || defined(CONFIG_SHARP_SCOOP_MODULE) | ||
136 | /* SCOOP Device #1 */ | ||
137 | static struct resource spitz_scoop_1_resources[] = { | ||
131 | [0] = { | 138 | [0] = { |
132 | .start = 0x10800000, | 139 | .start = 0x10800000, |
133 | .end = 0x10800fff, | 140 | .end = 0x10800fff, |
@@ -135,7 +142,7 @@ static struct resource spitz_scoop_resources[] = { | |||
135 | }, | 142 | }, |
136 | }; | 143 | }; |
137 | 144 | ||
138 | static struct scoop_config spitz_scoop_setup = { | 145 | static struct scoop_config spitz_scoop_1_setup = { |
139 | .io_dir = SPITZ_SCP_IO_DIR, | 146 | .io_dir = SPITZ_SCP_IO_DIR, |
140 | .io_out = SPITZ_SCP_IO_OUT, | 147 | .io_out = SPITZ_SCP_IO_OUT, |
141 | .suspend_clr = SPITZ_SCP_SUS_CLR, | 148 | .suspend_clr = SPITZ_SCP_SUS_CLR, |
@@ -143,20 +150,18 @@ static struct scoop_config spitz_scoop_setup = { | |||
143 | .gpio_base = SPITZ_SCP_GPIO_BASE, | 150 | .gpio_base = SPITZ_SCP_GPIO_BASE, |
144 | }; | 151 | }; |
145 | 152 | ||
146 | struct platform_device spitzscoop_device = { | 153 | struct platform_device spitz_scoop_1_device = { |
147 | .name = "sharp-scoop", | 154 | .name = "sharp-scoop", |
148 | .id = 0, | 155 | .id = 0, |
149 | .dev = { | 156 | .dev = { |
150 | .platform_data = &spitz_scoop_setup, | 157 | .platform_data = &spitz_scoop_1_setup, |
151 | }, | 158 | }, |
152 | .num_resources = ARRAY_SIZE(spitz_scoop_resources), | 159 | .num_resources = ARRAY_SIZE(spitz_scoop_1_resources), |
153 | .resource = spitz_scoop_resources, | 160 | .resource = spitz_scoop_1_resources, |
154 | }; | 161 | }; |
155 | 162 | ||
156 | /* | 163 | /* SCOOP Device #2 */ |
157 | * Spitz SCOOP Device #2 | 164 | static struct resource spitz_scoop_2_resources[] = { |
158 | */ | ||
159 | static struct resource spitz_scoop2_resources[] = { | ||
160 | [0] = { | 165 | [0] = { |
161 | .start = 0x08800040, | 166 | .start = 0x08800040, |
162 | .end = 0x08800fff, | 167 | .end = 0x08800fff, |
@@ -164,7 +169,7 @@ static struct resource spitz_scoop2_resources[] = { | |||
164 | }, | 169 | }, |
165 | }; | 170 | }; |
166 | 171 | ||
167 | static struct scoop_config spitz_scoop2_setup = { | 172 | static struct scoop_config spitz_scoop_2_setup = { |
168 | .io_dir = SPITZ_SCP2_IO_DIR, | 173 | .io_dir = SPITZ_SCP2_IO_DIR, |
169 | .io_out = SPITZ_SCP2_IO_OUT, | 174 | .io_out = SPITZ_SCP2_IO_OUT, |
170 | .suspend_clr = SPITZ_SCP2_SUS_CLR, | 175 | .suspend_clr = SPITZ_SCP2_SUS_CLR, |
@@ -172,82 +177,110 @@ static struct scoop_config spitz_scoop2_setup = { | |||
172 | .gpio_base = SPITZ_SCP2_GPIO_BASE, | 177 | .gpio_base = SPITZ_SCP2_GPIO_BASE, |
173 | }; | 178 | }; |
174 | 179 | ||
175 | struct platform_device spitzscoop2_device = { | 180 | struct platform_device spitz_scoop_2_device = { |
176 | .name = "sharp-scoop", | 181 | .name = "sharp-scoop", |
177 | .id = 1, | 182 | .id = 1, |
178 | .dev = { | 183 | .dev = { |
179 | .platform_data = &spitz_scoop2_setup, | 184 | .platform_data = &spitz_scoop_2_setup, |
180 | }, | 185 | }, |
181 | .num_resources = ARRAY_SIZE(spitz_scoop2_resources), | 186 | .num_resources = ARRAY_SIZE(spitz_scoop_2_resources), |
182 | .resource = spitz_scoop2_resources, | 187 | .resource = spitz_scoop_2_resources, |
183 | }; | 188 | }; |
184 | 189 | ||
185 | #define SPITZ_PWR_SD 0x01 | 190 | static void __init spitz_scoop_init(void) |
186 | #define SPITZ_PWR_CF 0x02 | 191 | { |
192 | platform_device_register(&spitz_scoop_1_device); | ||
193 | |||
194 | /* Akita doesn't have the second SCOOP chip */ | ||
195 | if (!machine_is_akita()) | ||
196 | platform_device_register(&spitz_scoop_2_device); | ||
197 | } | ||
187 | 198 | ||
188 | /* Power control is shared with between one of the CF slots and SD */ | 199 | /* Power control is shared with between one of the CF slots and SD */ |
189 | static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr) | 200 | static void spitz_card_pwr_ctrl(uint8_t enable, uint8_t new_cpr) |
190 | { | 201 | { |
191 | unsigned short cpr = read_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR); | 202 | unsigned short cpr; |
203 | unsigned long flags; | ||
192 | 204 | ||
193 | if (new_cpr & 0x0007) { | 205 | if (new_cpr & 0x7) { |
194 | gpio_set_value(SPITZ_GPIO_CF_POWER, 1); | 206 | gpio_set_value(SPITZ_GPIO_CF_POWER, 1); |
195 | if (!(cpr & 0x0002) && !(cpr & 0x0004)) | 207 | mdelay(5); |
196 | mdelay(5); | 208 | } |
197 | if (device == SPITZ_PWR_CF) | 209 | |
198 | cpr |= 0x0002; | 210 | local_irq_save(flags); |
199 | if (device == SPITZ_PWR_SD) | 211 | |
200 | cpr |= 0x0004; | 212 | cpr = read_scoop_reg(&spitz_scoop_1_device.dev, SCOOP_CPR); |
201 | write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr); | 213 | |
202 | } else { | 214 | if (enable & new_cpr) |
203 | if (device == SPITZ_PWR_CF) | 215 | cpr |= new_cpr; |
204 | cpr &= ~0x0002; | 216 | else |
205 | if (device == SPITZ_PWR_SD) | 217 | cpr &= ~enable; |
206 | cpr &= ~0x0004; | 218 | |
207 | if (!(cpr & 0x0002) && !(cpr & 0x0004)) { | 219 | write_scoop_reg(&spitz_scoop_1_device.dev, SCOOP_CPR, cpr); |
208 | write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, 0x0000); | 220 | |
209 | mdelay(1); | 221 | local_irq_restore(flags); |
210 | gpio_set_value(SPITZ_GPIO_CF_POWER, 0); | 222 | |
211 | } else { | 223 | if (!(cpr & 0x7)) { |
212 | write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr); | 224 | mdelay(1); |
213 | } | 225 | gpio_set_value(SPITZ_GPIO_CF_POWER, 0); |
214 | } | 226 | } |
215 | } | 227 | } |
216 | 228 | ||
217 | static void spitz_pcmcia_pwr(struct device *scoop, unsigned short cpr, int nr) | 229 | #else |
230 | static inline void spitz_scoop_init(void) {} | ||
231 | static inline void spitz_card_pwr_ctrl(uint8_t enable, uint8_t new_cpr) {} | ||
232 | #endif | ||
233 | |||
234 | /****************************************************************************** | ||
235 | * PCMCIA | ||
236 | ******************************************************************************/ | ||
237 | #if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE) | ||
238 | static void spitz_pcmcia_pwr(struct device *scoop, uint16_t cpr, int nr) | ||
218 | { | 239 | { |
219 | /* Only need to override behaviour for slot 0 */ | 240 | /* Only need to override behaviour for slot 0 */ |
220 | if (nr == 0) | 241 | if (nr == 0) |
221 | spitz_card_pwr_ctrl(SPITZ_PWR_CF, cpr); | 242 | spitz_card_pwr_ctrl( |
243 | cpr & (SCOOP_CPR_CF_3V | SCOOP_CPR_CF_XV), cpr); | ||
222 | else | 244 | else |
223 | write_scoop_reg(scoop, SCOOP_CPR, cpr); | 245 | write_scoop_reg(scoop, SCOOP_CPR, cpr); |
224 | } | 246 | } |
225 | 247 | ||
226 | static struct scoop_pcmcia_dev spitz_pcmcia_scoop[] = { | 248 | static struct scoop_pcmcia_dev spitz_pcmcia_scoop[] = { |
227 | { | 249 | { |
228 | .dev = &spitzscoop_device.dev, | 250 | .dev = &spitz_scoop_1_device.dev, |
229 | .irq = SPITZ_IRQ_GPIO_CF_IRQ, | 251 | .irq = SPITZ_IRQ_GPIO_CF_IRQ, |
230 | .cd_irq = SPITZ_IRQ_GPIO_CF_CD, | 252 | .cd_irq = SPITZ_IRQ_GPIO_CF_CD, |
231 | .cd_irq_str = "PCMCIA0 CD", | 253 | .cd_irq_str = "PCMCIA0 CD", |
232 | },{ | 254 | }, { |
233 | .dev = &spitzscoop2_device.dev, | 255 | .dev = &spitz_scoop_2_device.dev, |
234 | .irq = SPITZ_IRQ_GPIO_CF2_IRQ, | 256 | .irq = SPITZ_IRQ_GPIO_CF2_IRQ, |
235 | .cd_irq = -1, | 257 | .cd_irq = -1, |
236 | }, | 258 | }, |
237 | }; | 259 | }; |
238 | 260 | ||
239 | static struct scoop_pcmcia_config spitz_pcmcia_config = { | 261 | static struct scoop_pcmcia_config spitz_pcmcia_config = { |
240 | .devs = &spitz_pcmcia_scoop[0], | 262 | .devs = &spitz_pcmcia_scoop[0], |
241 | .num_devs = 2, | 263 | .num_devs = 2, |
242 | .power_ctrl = spitz_pcmcia_pwr, | 264 | .power_ctrl = spitz_pcmcia_pwr, |
243 | }; | 265 | }; |
244 | 266 | ||
245 | EXPORT_SYMBOL(spitzscoop_device); | 267 | static void __init spitz_pcmcia_init(void) |
246 | EXPORT_SYMBOL(spitzscoop2_device); | 268 | { |
269 | /* Akita has only one PCMCIA slot used */ | ||
270 | if (machine_is_akita()) | ||
271 | spitz_pcmcia_config.num_devs = 1; | ||
272 | |||
273 | platform_scoop_config = &spitz_pcmcia_config; | ||
274 | } | ||
275 | #else | ||
276 | static inline void spitz_pcmcia_init(void) {} | ||
277 | #endif | ||
278 | |||
279 | /****************************************************************************** | ||
280 | * GPIO keyboard | ||
281 | ******************************************************************************/ | ||
282 | #if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE) | ||
247 | 283 | ||
248 | /* | ||
249 | * Spitz Keyboard Device | ||
250 | */ | ||
251 | #define SPITZ_KEY_CALENDAR KEY_F1 | 284 | #define SPITZ_KEY_CALENDAR KEY_F1 |
252 | #define SPITZ_KEY_ADDRESS KEY_F2 | 285 | #define SPITZ_KEY_ADDRESS KEY_F2 |
253 | #define SPITZ_KEY_FN KEY_F3 | 286 | #define SPITZ_KEY_FN KEY_F3 |
@@ -263,7 +296,7 @@ EXPORT_SYMBOL(spitzscoop2_device); | |||
263 | #define SPITZ_KEY_OK KEY_F11 | 296 | #define SPITZ_KEY_OK KEY_F11 |
264 | #define SPITZ_KEY_MENU KEY_F12 | 297 | #define SPITZ_KEY_MENU KEY_F12 |
265 | 298 | ||
266 | static const uint32_t spitzkbd_keymap[] = { | 299 | static const uint32_t spitz_keymap[] = { |
267 | KEY(0, 0, KEY_LEFTCTRL), | 300 | KEY(0, 0, KEY_LEFTCTRL), |
268 | KEY(0, 1, KEY_1), | 301 | KEY(0, 1, KEY_1), |
269 | KEY(0, 2, KEY_3), | 302 | KEY(0, 2, KEY_3), |
@@ -330,36 +363,47 @@ static const uint32_t spitzkbd_keymap[] = { | |||
330 | KEY(6, 8, KEY_RIGHT), | 363 | KEY(6, 8, KEY_RIGHT), |
331 | }; | 364 | }; |
332 | 365 | ||
333 | static const struct matrix_keymap_data spitzkbd_keymap_data = { | 366 | static const struct matrix_keymap_data spitz_keymap_data = { |
334 | .keymap = spitzkbd_keymap, | 367 | .keymap = spitz_keymap, |
335 | .keymap_size = ARRAY_SIZE(spitzkbd_keymap), | 368 | .keymap_size = ARRAY_SIZE(spitz_keymap), |
336 | }; | 369 | }; |
337 | 370 | ||
338 | static const uint32_t spitzkbd_row_gpios[] = | 371 | static const uint32_t spitz_row_gpios[] = |
339 | { 12, 17, 91, 34, 36, 38, 39 }; | 372 | { 12, 17, 91, 34, 36, 38, 39 }; |
340 | static const uint32_t spitzkbd_col_gpios[] = | 373 | static const uint32_t spitz_col_gpios[] = |
341 | { 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 }; | 374 | { 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 }; |
342 | 375 | ||
343 | static struct matrix_keypad_platform_data spitzkbd_pdata = { | 376 | static struct matrix_keypad_platform_data spitz_mkp_pdata = { |
344 | .keymap_data = &spitzkbd_keymap_data, | 377 | .keymap_data = &spitz_keymap_data, |
345 | .row_gpios = spitzkbd_row_gpios, | 378 | .row_gpios = spitz_row_gpios, |
346 | .col_gpios = spitzkbd_col_gpios, | 379 | .col_gpios = spitz_col_gpios, |
347 | .num_row_gpios = ARRAY_SIZE(spitzkbd_row_gpios), | 380 | .num_row_gpios = ARRAY_SIZE(spitz_row_gpios), |
348 | .num_col_gpios = ARRAY_SIZE(spitzkbd_col_gpios), | 381 | .num_col_gpios = ARRAY_SIZE(spitz_col_gpios), |
349 | .col_scan_delay_us = 10, | 382 | .col_scan_delay_us = 10, |
350 | .debounce_ms = 10, | 383 | .debounce_ms = 10, |
351 | .wakeup = 1, | 384 | .wakeup = 1, |
352 | }; | 385 | }; |
353 | 386 | ||
354 | static struct platform_device spitzkbd_device = { | 387 | static struct platform_device spitz_mkp_device = { |
355 | .name = "matrix-keypad", | 388 | .name = "matrix-keypad", |
356 | .id = -1, | 389 | .id = -1, |
357 | .dev = { | 390 | .dev = { |
358 | .platform_data = &spitzkbd_pdata, | 391 | .platform_data = &spitz_mkp_pdata, |
359 | }, | 392 | }, |
360 | }; | 393 | }; |
361 | 394 | ||
395 | static void __init spitz_mkp_init(void) | ||
396 | { | ||
397 | platform_device_register(&spitz_mkp_device); | ||
398 | } | ||
399 | #else | ||
400 | static inline void spitz_mkp_init(void) {} | ||
401 | #endif | ||
362 | 402 | ||
403 | /****************************************************************************** | ||
404 | * GPIO keys | ||
405 | ******************************************************************************/ | ||
406 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | ||
363 | static struct gpio_keys_button spitz_gpio_keys[] = { | 407 | static struct gpio_keys_button spitz_gpio_keys[] = { |
364 | { | 408 | { |
365 | .type = EV_PWR, | 409 | .type = EV_PWR, |
@@ -396,10 +440,18 @@ static struct platform_device spitz_gpio_keys_device = { | |||
396 | }, | 440 | }, |
397 | }; | 441 | }; |
398 | 442 | ||
443 | static void __init spitz_keys_init(void) | ||
444 | { | ||
445 | platform_device_register(&spitz_gpio_keys_device); | ||
446 | } | ||
447 | #else | ||
448 | static inline void spitz_keys_init(void) {} | ||
449 | #endif | ||
399 | 450 | ||
400 | /* | 451 | /****************************************************************************** |
401 | * Spitz LEDs | 452 | * LEDs |
402 | */ | 453 | ******************************************************************************/ |
454 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | ||
403 | static struct gpio_led spitz_gpio_leds[] = { | 455 | static struct gpio_led spitz_gpio_leds[] = { |
404 | { | 456 | { |
405 | .name = "spitz:amber:charge", | 457 | .name = "spitz:amber:charge", |
@@ -418,20 +470,27 @@ static struct gpio_led_platform_data spitz_gpio_leds_info = { | |||
418 | .num_leds = ARRAY_SIZE(spitz_gpio_leds), | 470 | .num_leds = ARRAY_SIZE(spitz_gpio_leds), |
419 | }; | 471 | }; |
420 | 472 | ||
421 | static struct platform_device spitzled_device = { | 473 | static struct platform_device spitz_led_device = { |
422 | .name = "leds-gpio", | 474 | .name = "leds-gpio", |
423 | .id = -1, | 475 | .id = -1, |
424 | .dev = { | 476 | .dev = { |
425 | .platform_data = &spitz_gpio_leds_info, | 477 | .platform_data = &spitz_gpio_leds_info, |
426 | }, | 478 | }, |
427 | }; | 479 | }; |
428 | 480 | ||
429 | #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) | 481 | static void __init spitz_leds_init(void) |
430 | static struct pxa2xx_spi_master spitz_spi_info = { | 482 | { |
431 | .num_chipselect = 3, | 483 | platform_device_register(&spitz_led_device); |
432 | }; | 484 | } |
485 | #else | ||
486 | static inline void spitz_leds_init(void) {} | ||
487 | #endif | ||
433 | 488 | ||
434 | static void spitz_wait_for_hsync(void) | 489 | /****************************************************************************** |
490 | * SSP Devices | ||
491 | ******************************************************************************/ | ||
492 | #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) | ||
493 | static void spitz_ads7846_wait_for_hsync(void) | ||
435 | { | 494 | { |
436 | while (gpio_get_value(SPITZ_GPIO_HSYNC)) | 495 | while (gpio_get_value(SPITZ_GPIO_HSYNC)) |
437 | cpu_relax(); | 496 | cpu_relax(); |
@@ -447,7 +506,7 @@ static struct ads7846_platform_data spitz_ads7846_info = { | |||
447 | .y_plate_ohms = 486, | 506 | .y_plate_ohms = 486, |
448 | .pressure_max = 1024, | 507 | .pressure_max = 1024, |
449 | .gpio_pendown = SPITZ_GPIO_TP_INT, | 508 | .gpio_pendown = SPITZ_GPIO_TP_INT, |
450 | .wait_for_sync = spitz_wait_for_hsync, | 509 | .wait_for_sync = spitz_ads7846_wait_for_hsync, |
451 | }; | 510 | }; |
452 | 511 | ||
453 | static struct pxa2xx_spi_chip spitz_ads7846_chip = { | 512 | static struct pxa2xx_spi_chip spitz_ads7846_chip = { |
@@ -485,72 +544,88 @@ static struct pxa2xx_spi_chip spitz_max1111_chip = { | |||
485 | 544 | ||
486 | static struct spi_board_info spitz_spi_devices[] = { | 545 | static struct spi_board_info spitz_spi_devices[] = { |
487 | { | 546 | { |
488 | .modalias = "ads7846", | 547 | .modalias = "ads7846", |
489 | .max_speed_hz = 1200000, | 548 | .max_speed_hz = 1200000, |
490 | .bus_num = 2, | 549 | .bus_num = 2, |
491 | .chip_select = 0, | 550 | .chip_select = 0, |
492 | .platform_data = &spitz_ads7846_info, | 551 | .platform_data = &spitz_ads7846_info, |
493 | .controller_data= &spitz_ads7846_chip, | 552 | .controller_data = &spitz_ads7846_chip, |
494 | .irq = gpio_to_irq(SPITZ_GPIO_TP_INT), | 553 | .irq = gpio_to_irq(SPITZ_GPIO_TP_INT), |
495 | }, { | 554 | }, { |
496 | .modalias = "corgi-lcd", | 555 | .modalias = "corgi-lcd", |
497 | .max_speed_hz = 50000, | 556 | .max_speed_hz = 50000, |
498 | .bus_num = 2, | 557 | .bus_num = 2, |
499 | .chip_select = 1, | 558 | .chip_select = 1, |
500 | .platform_data = &spitz_lcdcon_info, | 559 | .platform_data = &spitz_lcdcon_info, |
501 | .controller_data= &spitz_lcdcon_chip, | 560 | .controller_data = &spitz_lcdcon_chip, |
502 | }, { | 561 | }, { |
503 | .modalias = "max1111", | 562 | .modalias = "max1111", |
504 | .max_speed_hz = 450000, | 563 | .max_speed_hz = 450000, |
505 | .bus_num = 2, | 564 | .bus_num = 2, |
506 | .chip_select = 2, | 565 | .chip_select = 2, |
507 | .controller_data= &spitz_max1111_chip, | 566 | .controller_data = &spitz_max1111_chip, |
508 | }, | 567 | }, |
509 | }; | 568 | }; |
510 | 569 | ||
511 | static void __init spitz_init_spi(void) | 570 | static struct pxa2xx_spi_master spitz_spi_info = { |
571 | .num_chipselect = 3, | ||
572 | }; | ||
573 | |||
574 | static void __init spitz_spi_init(void) | ||
512 | { | 575 | { |
576 | struct corgi_lcd_platform_data *lcd_data = &spitz_lcdcon_info; | ||
577 | |||
513 | if (machine_is_akita()) { | 578 | if (machine_is_akita()) { |
514 | spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT; | 579 | lcd_data->gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT; |
515 | spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON; | 580 | lcd_data->gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON; |
516 | } | 581 | } |
517 | 582 | ||
518 | pxa2xx_set_spi_info(2, &spitz_spi_info); | 583 | pxa2xx_set_spi_info(2, &spitz_spi_info); |
519 | spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices)); | 584 | spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices)); |
520 | } | 585 | } |
521 | #else | 586 | #else |
522 | static inline void spitz_init_spi(void) {} | 587 | static inline void spitz_spi_init(void) {} |
523 | #endif | 588 | #endif |
524 | 589 | ||
590 | /****************************************************************************** | ||
591 | * SD/MMC card controller | ||
592 | ******************************************************************************/ | ||
593 | #if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) | ||
525 | /* | 594 | /* |
526 | * MMC/SD Device | 595 | * NOTE: The card detect interrupt isn't debounced so we delay it by 250ms to |
527 | * | 596 | * give the card a chance to fully insert/eject. |
528 | * The card detect interrupt isn't debounced so we delay it by 250ms | ||
529 | * to give the card a chance to fully insert/eject. | ||
530 | */ | 597 | */ |
531 | static void spitz_mci_setpower(struct device *dev, unsigned int vdd) | 598 | static void spitz_mci_setpower(struct device *dev, unsigned int vdd) |
532 | { | 599 | { |
533 | struct pxamci_platform_data* p_d = dev->platform_data; | 600 | struct pxamci_platform_data* p_d = dev->platform_data; |
534 | 601 | ||
535 | if (( 1 << vdd) & p_d->ocr_mask) | 602 | if ((1 << vdd) & p_d->ocr_mask) |
536 | spitz_card_pwr_ctrl(SPITZ_PWR_SD, 0x0004); | 603 | spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, SCOOP_CPR_SD_3V); |
537 | else | 604 | else |
538 | spitz_card_pwr_ctrl(SPITZ_PWR_SD, 0x0000); | 605 | spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, 0x0); |
539 | } | 606 | } |
540 | 607 | ||
541 | static struct pxamci_platform_data spitz_mci_platform_data = { | 608 | static struct pxamci_platform_data spitz_mci_platform_data = { |
542 | .detect_delay_ms = 250, | 609 | .detect_delay_ms = 250, |
543 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | 610 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
544 | .setpower = spitz_mci_setpower, | 611 | .setpower = spitz_mci_setpower, |
545 | .gpio_card_detect = SPITZ_GPIO_nSD_DETECT, | 612 | .gpio_card_detect = SPITZ_GPIO_nSD_DETECT, |
546 | .gpio_card_ro = SPITZ_GPIO_nSD_WP, | 613 | .gpio_card_ro = SPITZ_GPIO_nSD_WP, |
547 | .gpio_power = -1, | 614 | .gpio_power = -1, |
548 | }; | 615 | }; |
549 | 616 | ||
617 | static void __init spitz_mmc_init(void) | ||
618 | { | ||
619 | pxa_set_mci_info(&spitz_mci_platform_data); | ||
620 | } | ||
621 | #else | ||
622 | static inline void spitz_mmc_init(void) {} | ||
623 | #endif | ||
550 | 624 | ||
551 | /* | 625 | /****************************************************************************** |
552 | * USB Host (OHCI) | 626 | * USB Host |
553 | */ | 627 | ******************************************************************************/ |
628 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
554 | static int spitz_ohci_init(struct device *dev) | 629 | static int spitz_ohci_init(struct device *dev) |
555 | { | 630 | { |
556 | int err; | 631 | int err; |
@@ -559,9 +634,7 @@ static int spitz_ohci_init(struct device *dev) | |||
559 | if (err) | 634 | if (err) |
560 | return err; | 635 | return err; |
561 | 636 | ||
562 | /* Only Port 2 is connected | 637 | /* Only Port 2 is connected, setup USB Port 2 Output Control Register */ |
563 | * Setup USB Port 2 Output Control Register | ||
564 | */ | ||
565 | UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; | 638 | UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; |
566 | 639 | ||
567 | return gpio_direction_output(SPITZ_GPIO_USB_HOST, 1); | 640 | return gpio_direction_output(SPITZ_GPIO_USB_HOST, 1); |
@@ -580,67 +653,95 @@ static struct pxaohci_platform_data spitz_ohci_platform_data = { | |||
580 | .power_budget = 150, | 653 | .power_budget = 150, |
581 | }; | 654 | }; |
582 | 655 | ||
656 | static void __init spitz_uhc_init(void) | ||
657 | { | ||
658 | pxa_set_ohci_info(&spitz_ohci_platform_data); | ||
659 | } | ||
660 | #else | ||
661 | static inline void spitz_uhc_init(void) {} | ||
662 | #endif | ||
583 | 663 | ||
584 | /* | 664 | /****************************************************************************** |
585 | * Irda | 665 | * IrDA |
586 | */ | 666 | ******************************************************************************/ |
587 | 667 | #if defined(CONFIG_PXA_FICP) || defined(CONFIG_PXA_FICP_MODULE) | |
588 | static struct pxaficp_platform_data spitz_ficp_platform_data = { | 668 | static struct pxaficp_platform_data spitz_ficp_platform_data = { |
589 | /* .gpio_pwdown is set in spitz_init() and akita_init() accordingly */ | ||
590 | .transceiver_cap = IR_SIRMODE | IR_OFF, | 669 | .transceiver_cap = IR_SIRMODE | IR_OFF, |
591 | }; | 670 | }; |
592 | 671 | ||
672 | static void __init spitz_irda_init(void) | ||
673 | { | ||
674 | if (machine_is_akita()) | ||
675 | spitz_ficp_platform_data.gpio_pwdown = AKITA_GPIO_IR_ON; | ||
676 | else | ||
677 | spitz_ficp_platform_data.gpio_pwdown = SPITZ_GPIO_IR_ON; | ||
593 | 678 | ||
594 | /* | 679 | pxa_set_ficp_info(&spitz_ficp_platform_data); |
595 | * Spitz PXA Framebuffer | 680 | } |
596 | */ | 681 | #else |
682 | static inline void spitz_irda_init(void) {} | ||
683 | #endif | ||
597 | 684 | ||
685 | /****************************************************************************** | ||
686 | * Framebuffer | ||
687 | ******************************************************************************/ | ||
688 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) | ||
598 | static struct pxafb_mode_info spitz_pxafb_modes[] = { | 689 | static struct pxafb_mode_info spitz_pxafb_modes[] = { |
599 | { | 690 | { |
600 | .pixclock = 19231, | 691 | .pixclock = 19231, |
601 | .xres = 480, | 692 | .xres = 480, |
602 | .yres = 640, | 693 | .yres = 640, |
603 | .bpp = 16, | 694 | .bpp = 16, |
604 | .hsync_len = 40, | 695 | .hsync_len = 40, |
605 | .left_margin = 46, | 696 | .left_margin = 46, |
606 | .right_margin = 125, | 697 | .right_margin = 125, |
607 | .vsync_len = 3, | 698 | .vsync_len = 3, |
608 | .upper_margin = 1, | 699 | .upper_margin = 1, |
609 | .lower_margin = 0, | 700 | .lower_margin = 0, |
610 | .sync = 0, | 701 | .sync = 0, |
611 | },{ | 702 | }, { |
612 | .pixclock = 134617, | 703 | .pixclock = 134617, |
613 | .xres = 240, | 704 | .xres = 240, |
614 | .yres = 320, | 705 | .yres = 320, |
615 | .bpp = 16, | 706 | .bpp = 16, |
616 | .hsync_len = 20, | 707 | .hsync_len = 20, |
617 | .left_margin = 20, | 708 | .left_margin = 20, |
618 | .right_margin = 46, | 709 | .right_margin = 46, |
619 | .vsync_len = 2, | 710 | .vsync_len = 2, |
620 | .upper_margin = 1, | 711 | .upper_margin = 1, |
621 | .lower_margin = 0, | 712 | .lower_margin = 0, |
622 | .sync = 0, | 713 | .sync = 0, |
623 | }, | 714 | }, |
624 | }; | 715 | }; |
625 | 716 | ||
626 | static struct pxafb_mach_info spitz_pxafb_info = { | 717 | static struct pxafb_mach_info spitz_pxafb_info = { |
627 | .modes = &spitz_pxafb_modes[0], | 718 | .modes = spitz_pxafb_modes, |
628 | .num_modes = 2, | 719 | .num_modes = ARRAY_SIZE(spitz_pxafb_modes), |
629 | .fixed_modes = 1, | 720 | .fixed_modes = 1, |
630 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_ALTERNATE_MAPPING, | 721 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_ALTERNATE_MAPPING, |
631 | }; | 722 | }; |
632 | 723 | ||
633 | static struct mtd_partition sharpsl_nand_partitions[] = { | 724 | static void __init spitz_lcd_init(void) |
725 | { | ||
726 | set_pxa_fb_info(&spitz_pxafb_info); | ||
727 | } | ||
728 | #else | ||
729 | static inline void spitz_lcd_init(void) {} | ||
730 | #endif | ||
731 | |||
732 | /****************************************************************************** | ||
733 | * Framebuffer | ||
734 | ******************************************************************************/ | ||
735 | #if defined(CONFIG_MTD_NAND_SHARPSL) || defined(CONFIG_MTD_NAND_SHARPSL_MODULE) | ||
736 | static struct mtd_partition spitz_nand_partitions[] = { | ||
634 | { | 737 | { |
635 | .name = "System Area", | 738 | .name = "System Area", |
636 | .offset = 0, | 739 | .offset = 0, |
637 | .size = 7 * 1024 * 1024, | 740 | .size = 7 * 1024 * 1024, |
638 | }, | 741 | }, { |
639 | { | ||
640 | .name = "Root Filesystem", | 742 | .name = "Root Filesystem", |
641 | .offset = 7 * 1024 * 1024, | 743 | .offset = 7 * 1024 * 1024, |
642 | }, | 744 | }, { |
643 | { | ||
644 | .name = "Home Filesystem", | 745 | .name = "Home Filesystem", |
645 | .offset = MTDPART_OFS_APPEND, | 746 | .offset = MTDPART_OFS_APPEND, |
646 | .size = MTDPART_SIZ_FULL, | 747 | .size = MTDPART_SIZ_FULL, |
@@ -649,37 +750,72 @@ static struct mtd_partition sharpsl_nand_partitions[] = { | |||
649 | 750 | ||
650 | static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; | 751 | static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; |
651 | 752 | ||
652 | static struct nand_bbt_descr sharpsl_bbt = { | 753 | static struct nand_bbt_descr spitz_nand_bbt = { |
653 | .options = 0, | 754 | .options = 0, |
654 | .offs = 4, | 755 | .offs = 4, |
655 | .len = 2, | 756 | .len = 2, |
656 | .pattern = scan_ff_pattern | 757 | .pattern = scan_ff_pattern |
758 | }; | ||
759 | |||
760 | static struct nand_ecclayout akita_oobinfo = { | ||
761 | .oobfree = { {0x08, 0x09} }, | ||
762 | .eccbytes = 24, | ||
763 | .eccpos = { | ||
764 | 0x05, 0x01, 0x02, 0x03, 0x06, 0x07, 0x15, 0x11, | ||
765 | 0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23, | ||
766 | 0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37, | ||
767 | }, | ||
657 | }; | 768 | }; |
658 | 769 | ||
659 | static struct sharpsl_nand_platform_data sharpsl_nand_platform_data = { | 770 | static struct sharpsl_nand_platform_data spitz_nand_pdata = { |
660 | .badblock_pattern = &sharpsl_bbt, | 771 | .badblock_pattern = &spitz_nand_bbt, |
661 | .partitions = sharpsl_nand_partitions, | 772 | .partitions = spitz_nand_partitions, |
662 | .nr_partitions = ARRAY_SIZE(sharpsl_nand_partitions), | 773 | .nr_partitions = ARRAY_SIZE(spitz_nand_partitions), |
663 | }; | 774 | }; |
664 | 775 | ||
665 | static struct resource sharpsl_nand_resources[] = { | 776 | static struct resource spitz_nand_resources[] = { |
666 | { | 777 | { |
667 | .start = 0x0C000000, | 778 | .start = PXA_CS3_PHYS, |
668 | .end = 0x0C000FFF, | 779 | .end = PXA_CS3_PHYS + SZ_4K - 1, |
669 | .flags = IORESOURCE_MEM, | 780 | .flags = IORESOURCE_MEM, |
670 | }, | 781 | }, |
671 | }; | 782 | }; |
672 | 783 | ||
673 | static struct platform_device sharpsl_nand_device = { | 784 | static struct platform_device spitz_nand_device = { |
674 | .name = "sharpsl-nand", | 785 | .name = "sharpsl-nand", |
675 | .id = -1, | 786 | .id = -1, |
676 | .resource = sharpsl_nand_resources, | 787 | .resource = spitz_nand_resources, |
677 | .num_resources = ARRAY_SIZE(sharpsl_nand_resources), | 788 | .num_resources = ARRAY_SIZE(spitz_nand_resources), |
678 | .dev.platform_data = &sharpsl_nand_platform_data, | 789 | .dev = { |
790 | .platform_data = &spitz_nand_pdata, | ||
791 | } | ||
679 | }; | 792 | }; |
680 | 793 | ||
794 | static void __init spitz_nand_init(void) | ||
795 | { | ||
796 | if (machine_is_spitz()) { | ||
797 | spitz_nand_partitions[1].size = 5 * 1024 * 1024; | ||
798 | } else if (machine_is_akita()) { | ||
799 | spitz_nand_partitions[1].size = 58 * 1024 * 1024; | ||
800 | spitz_nand_bbt.len = 1; | ||
801 | spitz_nand_pdata.ecc_layout = &akita_oobinfo; | ||
802 | } else if (machine_is_borzoi()) { | ||
803 | spitz_nand_partitions[1].size = 32 * 1024 * 1024; | ||
804 | spitz_nand_bbt.len = 1; | ||
805 | spitz_nand_pdata.ecc_layout = &akita_oobinfo; | ||
806 | } | ||
807 | |||
808 | platform_device_register(&spitz_nand_device); | ||
809 | } | ||
810 | #else | ||
811 | static inline void spitz_nand_init(void) {} | ||
812 | #endif | ||
681 | 813 | ||
682 | static struct mtd_partition sharpsl_rom_parts[] = { | 814 | /****************************************************************************** |
815 | * NOR Flash | ||
816 | ******************************************************************************/ | ||
817 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) | ||
818 | static struct mtd_partition spitz_rom_parts[] = { | ||
683 | { | 819 | { |
684 | .name ="Boot PROM Filesystem", | 820 | .name ="Boot PROM Filesystem", |
685 | .offset = 0x00140000, | 821 | .offset = 0x00140000, |
@@ -687,37 +823,105 @@ static struct mtd_partition sharpsl_rom_parts[] = { | |||
687 | }, | 823 | }, |
688 | }; | 824 | }; |
689 | 825 | ||
690 | static struct physmap_flash_data sharpsl_rom_data = { | 826 | static struct physmap_flash_data spitz_rom_data = { |
691 | .width = 2, | 827 | .width = 2, |
692 | .nr_parts = ARRAY_SIZE(sharpsl_rom_parts), | 828 | .nr_parts = ARRAY_SIZE(spitz_rom_parts), |
693 | .parts = sharpsl_rom_parts, | 829 | .parts = spitz_rom_parts, |
694 | }; | 830 | }; |
695 | 831 | ||
696 | static struct resource sharpsl_rom_resources[] = { | 832 | static struct resource spitz_rom_resources[] = { |
697 | { | 833 | { |
698 | .start = 0x00000000, | 834 | .start = PXA_CS0_PHYS, |
699 | .end = 0x007fffff, | 835 | .end = PXA_CS0_PHYS + SZ_8M - 1, |
700 | .flags = IORESOURCE_MEM, | 836 | .flags = IORESOURCE_MEM, |
701 | }, | 837 | }, |
702 | }; | 838 | }; |
703 | 839 | ||
704 | static struct platform_device sharpsl_rom_device = { | 840 | static struct platform_device spitz_rom_device = { |
705 | .name = "physmap-flash", | 841 | .name = "physmap-flash", |
706 | .id = -1, | 842 | .id = -1, |
707 | .resource = sharpsl_rom_resources, | 843 | .resource = spitz_rom_resources, |
708 | .num_resources = ARRAY_SIZE(sharpsl_rom_resources), | 844 | .num_resources = ARRAY_SIZE(spitz_rom_resources), |
709 | .dev.platform_data = &sharpsl_rom_data, | 845 | .dev = { |
846 | .platform_data = &spitz_rom_data, | ||
847 | }, | ||
710 | }; | 848 | }; |
711 | 849 | ||
712 | static struct platform_device *devices[] __initdata = { | 850 | static void __init spitz_nor_init(void) |
713 | &spitzscoop_device, | 851 | { |
714 | &spitzkbd_device, | 852 | platform_device_register(&spitz_rom_device); |
715 | &spitz_gpio_keys_device, | 853 | } |
716 | &spitzled_device, | 854 | #else |
717 | &sharpsl_nand_device, | 855 | static inline void spitz_nor_init(void) {} |
718 | &sharpsl_rom_device, | 856 | #endif |
857 | |||
858 | /****************************************************************************** | ||
859 | * GPIO expander | ||
860 | ******************************************************************************/ | ||
861 | #if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) | ||
862 | static struct pca953x_platform_data akita_pca953x_pdata = { | ||
863 | .gpio_base = AKITA_IOEXP_GPIO_BASE, | ||
719 | }; | 864 | }; |
720 | 865 | ||
866 | static struct i2c_board_info spitz_i2c_devs[] = { | ||
867 | { | ||
868 | .type = "wm8750", | ||
869 | .addr = 0x1b, | ||
870 | }, { | ||
871 | .type = "max7310", | ||
872 | .addr = 0x18, | ||
873 | .platform_data = &akita_pca953x_pdata, | ||
874 | }, | ||
875 | }; | ||
876 | |||
877 | static struct regulator_consumer_supply isl6271a_consumers[] = { | ||
878 | { | ||
879 | .supply = "vcc_core", | ||
880 | } | ||
881 | }; | ||
882 | |||
883 | static struct regulator_init_data isl6271a_info[] = { | ||
884 | { | ||
885 | .constraints = { | ||
886 | .name = "vcc_core range", | ||
887 | .min_uV = 850000, | ||
888 | .max_uV = 1600000, | ||
889 | .always_on = 1, | ||
890 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
891 | }, | ||
892 | .consumer_supplies = isl6271a_consumers, | ||
893 | .num_consumer_supplies = ARRAY_SIZE(isl6271a_consumers), | ||
894 | } | ||
895 | }; | ||
896 | |||
897 | static struct i2c_board_info spitz_pi2c_devs[] = { | ||
898 | { | ||
899 | .type = "isl6271a", | ||
900 | .addr = 0x0c, | ||
901 | .platform_data = &isl6271a_info, | ||
902 | }, | ||
903 | }; | ||
904 | |||
905 | static void __init spitz_i2c_init(void) | ||
906 | { | ||
907 | int size = ARRAY_SIZE(spitz_i2c_devs); | ||
908 | |||
909 | /* Only Akita has the max7310 chip */ | ||
910 | if (!machine_is_akita()) | ||
911 | size--; | ||
912 | |||
913 | pxa_set_i2c_info(NULL); | ||
914 | pxa27x_set_i2c_power_info(NULL); | ||
915 | i2c_register_board_info(0, spitz_i2c_devs, size); | ||
916 | i2c_register_board_info(1, ARRAY_AND_SIZE(spitz_pi2c_devs)); | ||
917 | } | ||
918 | #else | ||
919 | static inline void spitz_i2c_init(void) {} | ||
920 | #endif | ||
921 | |||
922 | /****************************************************************************** | ||
923 | * Machine init | ||
924 | ******************************************************************************/ | ||
721 | static void spitz_poweroff(void) | 925 | static void spitz_poweroff(void) |
722 | { | 926 | { |
723 | arm_machine_restart('g', NULL); | 927 | arm_machine_restart('g', NULL); |
@@ -726,26 +930,18 @@ static void spitz_poweroff(void) | |||
726 | static void spitz_restart(char mode, const char *cmd) | 930 | static void spitz_restart(char mode, const char *cmd) |
727 | { | 931 | { |
728 | /* Bootloader magic for a reboot */ | 932 | /* Bootloader magic for a reboot */ |
729 | if((MSC0 & 0xffff0000) == 0x7ff00000) | 933 | if ((MSC0 & 0xffff0000) == 0x7ff00000) |
730 | MSC0 = (MSC0 & 0xffff) | 0x7ee00000; | 934 | MSC0 = (MSC0 & 0xffff) | 0x7ee00000; |
731 | 935 | ||
732 | spitz_poweroff(); | 936 | spitz_poweroff(); |
733 | } | 937 | } |
734 | 938 | ||
735 | static void __init common_init(void) | 939 | static void __init spitz_init(void) |
736 | { | 940 | { |
737 | init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0); | 941 | init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0); |
738 | pm_power_off = spitz_poweroff; | 942 | pm_power_off = spitz_poweroff; |
739 | arm_pm_restart = spitz_restart; | 943 | arm_pm_restart = spitz_restart; |
740 | 944 | ||
741 | if (machine_is_spitz()) { | ||
742 | sharpsl_nand_partitions[1].size = 5 * 1024 * 1024; | ||
743 | } else if (machine_is_akita()) { | ||
744 | sharpsl_nand_partitions[1].size = 58 * 1024 * 1024; | ||
745 | } else if (machine_is_borzoi()) { | ||
746 | sharpsl_nand_partitions[1].size = 32 * 1024 * 1024; | ||
747 | } | ||
748 | |||
749 | PMCR = 0x00; | 945 | PMCR = 0x00; |
750 | 946 | ||
751 | /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ | 947 | /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ |
@@ -757,91 +953,22 @@ static void __init common_init(void) | |||
757 | pxa_set_btuart_info(NULL); | 953 | pxa_set_btuart_info(NULL); |
758 | pxa_set_stuart_info(NULL); | 954 | pxa_set_stuart_info(NULL); |
759 | 955 | ||
760 | spitz_init_spi(); | 956 | spitz_spi_init(); |
761 | 957 | spitz_scoop_init(); | |
762 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 958 | spitz_mkp_init(); |
763 | pxa_set_mci_info(&spitz_mci_platform_data); | 959 | spitz_keys_init(); |
764 | pxa_set_ohci_info(&spitz_ohci_platform_data); | 960 | spitz_leds_init(); |
765 | pxa_set_ficp_info(&spitz_ficp_platform_data); | 961 | spitz_mmc_init(); |
766 | set_pxa_fb_info(&spitz_pxafb_info); | 962 | spitz_pcmcia_init(); |
767 | pxa_set_i2c_info(NULL); | 963 | spitz_irda_init(); |
964 | spitz_uhc_init(); | ||
965 | spitz_lcd_init(); | ||
966 | spitz_nor_init(); | ||
967 | spitz_nand_init(); | ||
968 | spitz_i2c_init(); | ||
768 | } | 969 | } |
769 | 970 | ||
770 | #if defined(CONFIG_MACH_AKITA) || defined(CONFIG_MACH_BORZOI) | 971 | static void __init spitz_fixup(struct machine_desc *desc, |
771 | static struct nand_bbt_descr sharpsl_akita_bbt = { | ||
772 | .options = 0, | ||
773 | .offs = 4, | ||
774 | .len = 1, | ||
775 | .pattern = scan_ff_pattern | ||
776 | }; | ||
777 | |||
778 | static struct nand_ecclayout akita_oobinfo = { | ||
779 | .eccbytes = 24, | ||
780 | .eccpos = { | ||
781 | 0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11, | ||
782 | 0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23, | ||
783 | 0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37}, | ||
784 | .oobfree = {{0x08, 0x09}} | ||
785 | }; | ||
786 | #endif | ||
787 | |||
788 | #if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI) | ||
789 | static void __init spitz_init(void) | ||
790 | { | ||
791 | spitz_ficp_platform_data.gpio_pwdown = SPITZ_GPIO_IR_ON; | ||
792 | |||
793 | #ifdef CONFIG_MACH_BORZOI | ||
794 | if (machine_is_borzoi()) { | ||
795 | sharpsl_nand_platform_data.badblock_pattern = &sharpsl_akita_bbt; | ||
796 | sharpsl_nand_platform_data.ecc_layout = &akita_oobinfo; | ||
797 | } | ||
798 | #endif | ||
799 | |||
800 | platform_scoop_config = &spitz_pcmcia_config; | ||
801 | |||
802 | common_init(); | ||
803 | |||
804 | platform_device_register(&spitzscoop2_device); | ||
805 | } | ||
806 | #endif | ||
807 | |||
808 | #ifdef CONFIG_MACH_AKITA | ||
809 | /* | ||
810 | * Akita IO Expander | ||
811 | */ | ||
812 | static struct pca953x_platform_data akita_ioexp = { | ||
813 | .gpio_base = AKITA_IOEXP_GPIO_BASE, | ||
814 | }; | ||
815 | |||
816 | static struct i2c_board_info akita_i2c_board_info[] = { | ||
817 | { | ||
818 | .type = "max7310", | ||
819 | .addr = 0x18, | ||
820 | .platform_data = &akita_ioexp, | ||
821 | }, { | ||
822 | .type = "wm8750", | ||
823 | .addr = 0x1b, | ||
824 | }, | ||
825 | }; | ||
826 | |||
827 | static void __init akita_init(void) | ||
828 | { | ||
829 | spitz_ficp_platform_data.gpio_pwdown = AKITA_GPIO_IR_ON; | ||
830 | |||
831 | sharpsl_nand_platform_data.badblock_pattern = &sharpsl_akita_bbt; | ||
832 | sharpsl_nand_platform_data.ecc_layout = &akita_oobinfo; | ||
833 | |||
834 | /* We just pretend the second element of the array doesn't exist */ | ||
835 | spitz_pcmcia_config.num_devs = 1; | ||
836 | platform_scoop_config = &spitz_pcmcia_config; | ||
837 | |||
838 | i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info)); | ||
839 | |||
840 | common_init(); | ||
841 | } | ||
842 | #endif | ||
843 | |||
844 | static void __init fixup_spitz(struct machine_desc *desc, | ||
845 | struct tag *tags, char **cmdline, struct meminfo *mi) | 972 | struct tag *tags, char **cmdline, struct meminfo *mi) |
846 | { | 973 | { |
847 | sharpsl_save_param(); | 974 | sharpsl_save_param(); |
@@ -854,7 +981,7 @@ static void __init fixup_spitz(struct machine_desc *desc, | |||
854 | MACHINE_START(SPITZ, "SHARP Spitz") | 981 | MACHINE_START(SPITZ, "SHARP Spitz") |
855 | .phys_io = 0x40000000, | 982 | .phys_io = 0x40000000, |
856 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | 983 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, |
857 | .fixup = fixup_spitz, | 984 | .fixup = spitz_fixup, |
858 | .map_io = pxa_map_io, | 985 | .map_io = pxa_map_io, |
859 | .init_irq = pxa27x_init_irq, | 986 | .init_irq = pxa27x_init_irq, |
860 | .init_machine = spitz_init, | 987 | .init_machine = spitz_init, |
@@ -866,7 +993,7 @@ MACHINE_END | |||
866 | MACHINE_START(BORZOI, "SHARP Borzoi") | 993 | MACHINE_START(BORZOI, "SHARP Borzoi") |
867 | .phys_io = 0x40000000, | 994 | .phys_io = 0x40000000, |
868 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | 995 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, |
869 | .fixup = fixup_spitz, | 996 | .fixup = spitz_fixup, |
870 | .map_io = pxa_map_io, | 997 | .map_io = pxa_map_io, |
871 | .init_irq = pxa27x_init_irq, | 998 | .init_irq = pxa27x_init_irq, |
872 | .init_machine = spitz_init, | 999 | .init_machine = spitz_init, |
@@ -878,10 +1005,10 @@ MACHINE_END | |||
878 | MACHINE_START(AKITA, "SHARP Akita") | 1005 | MACHINE_START(AKITA, "SHARP Akita") |
879 | .phys_io = 0x40000000, | 1006 | .phys_io = 0x40000000, |
880 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | 1007 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, |
881 | .fixup = fixup_spitz, | 1008 | .fixup = spitz_fixup, |
882 | .map_io = pxa_map_io, | 1009 | .map_io = pxa_map_io, |
883 | .init_irq = pxa27x_init_irq, | 1010 | .init_irq = pxa27x_init_irq, |
884 | .init_machine = akita_init, | 1011 | .init_machine = spitz_init, |
885 | .timer = &pxa_timer, | 1012 | .timer = &pxa_timer, |
886 | MACHINE_END | 1013 | MACHINE_END |
887 | #endif | 1014 | #endif |
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 4209ddf6da61..7fe74067d85f 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c | |||
@@ -22,11 +22,10 @@ | |||
22 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
24 | 24 | ||
25 | #include <mach/sharpsl.h> | ||
26 | #include <mach/spitz.h> | 25 | #include <mach/spitz.h> |
27 | #include <mach/pxa27x.h> | 26 | #include <mach/pxa27x.h> |
27 | #include <mach/sharpsl_pm.h> | ||
28 | 28 | ||
29 | #include "sharpsl.h" | ||
30 | #include "generic.h" | 29 | #include "generic.h" |
31 | 30 | ||
32 | #define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ | 31 | #define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ |
@@ -178,11 +177,11 @@ unsigned long spitzpm_read_devdata(int type) | |||
178 | case SHARPSL_STATUS_ACIN: | 177 | case SHARPSL_STATUS_ACIN: |
179 | return (((~GPLR(SPITZ_GPIO_AC_IN)) & GPIO_bit(SPITZ_GPIO_AC_IN)) != 0); | 178 | return (((~GPLR(SPITZ_GPIO_AC_IN)) & GPIO_bit(SPITZ_GPIO_AC_IN)) != 0); |
180 | case SHARPSL_STATUS_LOCK: | 179 | case SHARPSL_STATUS_LOCK: |
181 | return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batlock); | 180 | return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); |
182 | case SHARPSL_STATUS_CHRGFULL: | 181 | case SHARPSL_STATUS_CHRGFULL: |
183 | return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batfull); | 182 | return gpio_get_value(sharpsl_pm.machinfo->gpio_batfull); |
184 | case SHARPSL_STATUS_FATAL: | 183 | case SHARPSL_STATUS_FATAL: |
185 | return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_fatal); | 184 | return gpio_get_value(sharpsl_pm.machinfo->gpio_fatal); |
186 | case SHARPSL_ACIN_VOLT: | 185 | case SHARPSL_ACIN_VOLT: |
187 | return sharpsl_pm_pxa_read_max1111(MAX1111_ACIN_VOLT); | 186 | return sharpsl_pm_pxa_read_max1111(MAX1111_ACIN_VOLT); |
188 | case SHARPSL_BATT_TEMP: | 187 | case SHARPSL_BATT_TEMP: |
@@ -212,8 +211,6 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = { | |||
212 | .should_wakeup = spitz_should_wakeup, | 211 | .should_wakeup = spitz_should_wakeup, |
213 | #if defined(CONFIG_LCD_CORGI) | 212 | #if defined(CONFIG_LCD_CORGI) |
214 | .backlight_limit = corgi_lcd_limit_intensity, | 213 | .backlight_limit = corgi_lcd_limit_intensity, |
215 | #elif defined(CONFIG_BACKLIGHT_CORGI) | ||
216 | .backlight_limit = corgibl_limit_intensity, | ||
217 | #endif | 214 | #endif |
218 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, | 215 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, |
219 | .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, | 216 | .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, |
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c index af40d2a12d37..a654d1e6b38a 100644 --- a/arch/arm/mach-pxa/stargate2.c +++ b/arch/arm/mach-pxa/stargate2.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/i2c/at24.h> | 29 | #include <linux/i2c/at24.h> |
30 | #include <linux/smc91x.h> | 30 | #include <linux/smc91x.h> |
31 | #include <linux/gpio.h> | 31 | #include <linux/gpio.h> |
32 | #include <linux/leds.h> | ||
32 | 33 | ||
33 | #include <asm/types.h> | 34 | #include <asm/types.h> |
34 | #include <asm/setup.h> | 35 | #include <asm/setup.h> |
@@ -62,37 +63,12 @@ | |||
62 | #define SG2_GPIO_nSD_DETECT 90 | 63 | #define SG2_GPIO_nSD_DETECT 90 |
63 | #define SG2_SD_POWER_ENABLE 89 | 64 | #define SG2_SD_POWER_ENABLE 89 |
64 | 65 | ||
65 | static unsigned long stargate2_pin_config[] __initdata = { | 66 | static unsigned long sg2_im2_unified_pin_config[] __initdata = { |
66 | |||
67 | GPIO15_nCS_1, /* SRAM */ | ||
68 | /* SMC91x */ | ||
69 | GPIO80_nCS_4, | ||
70 | GPIO40_GPIO, /*cable detect?*/ | ||
71 | /* Device Identification for wakeup*/ | 67 | /* Device Identification for wakeup*/ |
72 | GPIO102_GPIO, | 68 | GPIO102_GPIO, |
73 | |||
74 | /* Button */ | ||
75 | GPIO91_GPIO | WAKEUP_ON_LEVEL_HIGH, | ||
76 | |||
77 | /* DA9030 */ | 69 | /* DA9030 */ |
78 | GPIO1_GPIO, | 70 | GPIO1_GPIO, |
79 | 71 | ||
80 | /* Compact Flash */ | ||
81 | GPIO79_PSKTSEL, | ||
82 | GPIO48_nPOE, | ||
83 | GPIO49_nPWE, | ||
84 | GPIO50_nPIOR, | ||
85 | GPIO51_nPIOW, | ||
86 | GPIO85_nPCE_1, | ||
87 | GPIO54_nPCE_2, | ||
88 | GPIO55_nPREG, | ||
89 | GPIO56_nPWAIT, | ||
90 | GPIO57_nIOIS16, | ||
91 | GPIO120_GPIO, /* Buff ctrl */ | ||
92 | GPIO108_GPIO, /* Power ctrl */ | ||
93 | GPIO82_GPIO, /* Reset */ | ||
94 | GPIO53_GPIO, /* SG2_S0_GPIO_DETECT */ | ||
95 | |||
96 | /* MMC */ | 72 | /* MMC */ |
97 | GPIO32_MMC_CLK, | 73 | GPIO32_MMC_CLK, |
98 | GPIO112_MMC_CMD, | 74 | GPIO112_MMC_CMD, |
@@ -100,49 +76,44 @@ static unsigned long stargate2_pin_config[] __initdata = { | |||
100 | GPIO109_MMC_DAT_1, | 76 | GPIO109_MMC_DAT_1, |
101 | GPIO110_MMC_DAT_2, | 77 | GPIO110_MMC_DAT_2, |
102 | GPIO111_MMC_DAT_3, | 78 | GPIO111_MMC_DAT_3, |
103 | GPIO90_GPIO, /* nSD detect */ | ||
104 | GPIO89_GPIO, /* SD_POWER_ENABLE */ | ||
105 | 79 | ||
106 | /* Bluetooth */ | 80 | /* 802.15.4 radio - driver out of mainline */ |
107 | GPIO81_GPIO, /* reset */ | 81 | GPIO22_GPIO, /* CC_RSTN */ |
108 | 82 | GPIO114_GPIO, /* CC_FIFO */ | |
109 | /* cc2420 802.15.4 radio */ | 83 | GPIO116_GPIO, /* CC_CCA */ |
110 | GPIO22_GPIO, /* CC_RSTN (out)*/ | 84 | GPIO0_GPIO, /* CC_FIFOP */ |
111 | GPIO114_GPIO, /* CC_FIFO (in) */ | 85 | GPIO16_GPIO, /* CCSFD */ |
112 | GPIO116_GPIO, /* CC_CCA (in) */ | 86 | GPIO115_GPIO, /* Power enable */ |
113 | GPIO0_GPIO, /* CC_FIFOP (in) */ | ||
114 | GPIO16_GPIO, /* CCSFD (in) */ | ||
115 | GPIO39_GPIO, /* CSn (out) */ | ||
116 | 87 | ||
117 | /* I2C */ | 88 | /* I2C */ |
118 | GPIO117_I2C_SCL, | 89 | GPIO117_I2C_SCL, |
119 | GPIO118_I2C_SDA, | 90 | GPIO118_I2C_SDA, |
120 | 91 | ||
121 | /* SSP 3 - 802.15.4 radio */ | 92 | /* SSP 3 - 802.15.4 radio */ |
122 | GPIO39_GPIO, /* chip select */ | 93 | GPIO39_GPIO, /* Chip Select */ |
123 | GPIO34_SSP3_SCLK, | 94 | GPIO34_SSP3_SCLK, |
124 | GPIO35_SSP3_TXD, | 95 | GPIO35_SSP3_TXD, |
125 | GPIO41_SSP3_RXD, | 96 | GPIO41_SSP3_RXD, |
126 | 97 | ||
127 | /* SSP 2 */ | 98 | /* SSP 2 to daughter boards */ |
128 | GPIO11_SSP2_RXD, | 99 | GPIO11_SSP2_RXD, |
129 | GPIO38_SSP2_TXD, | 100 | GPIO38_SSP2_TXD, |
130 | GPIO36_SSP2_SCLK, | 101 | GPIO36_SSP2_SCLK, |
131 | GPIO37_GPIO, /* chip select */ | 102 | GPIO37_GPIO, /* chip select */ |
132 | 103 | ||
133 | /* SSP 1 */ | 104 | /* SSP 1 - to daughter boards */ |
134 | GPIO26_SSP1_RXD, | 105 | GPIO24_GPIO, /* Chip Select */ |
135 | GPIO25_SSP1_TXD, | ||
136 | GPIO23_SSP1_SCLK, | 106 | GPIO23_SSP1_SCLK, |
137 | GPIO24_GPIO, /* chip select */ | 107 | GPIO25_SSP1_TXD, |
108 | GPIO26_SSP1_RXD, | ||
138 | 109 | ||
139 | /* BTUART */ | 110 | /* BTUART Basic Connector*/ |
140 | GPIO42_BTUART_RXD, | 111 | GPIO42_BTUART_RXD, |
141 | GPIO43_BTUART_TXD, | 112 | GPIO43_BTUART_TXD, |
142 | GPIO44_BTUART_CTS, | 113 | GPIO44_BTUART_CTS, |
143 | GPIO45_BTUART_RTS, | 114 | GPIO45_BTUART_RTS, |
144 | 115 | ||
145 | /* STUART */ | 116 | /* STUART - IM2 via debug board not sure on SG2*/ |
146 | GPIO46_STUART_RXD, | 117 | GPIO46_STUART_RXD, |
147 | GPIO47_STUART_TXD, | 118 | GPIO47_STUART_TXD, |
148 | 119 | ||
@@ -150,47 +121,17 @@ static unsigned long stargate2_pin_config[] __initdata = { | |||
150 | GPIO96_GPIO, /* accelerometer interrupt */ | 121 | GPIO96_GPIO, /* accelerometer interrupt */ |
151 | GPIO99_GPIO, /* ADC interrupt */ | 122 | GPIO99_GPIO, /* ADC interrupt */ |
152 | 123 | ||
153 | /* Connector pins specified as gpios */ | ||
154 | GPIO94_GPIO, /* large basic connector pin 14 */ | ||
155 | GPIO10_GPIO, /* large basic connector pin 23 */ | ||
156 | |||
157 | /* SHT15 */ | 124 | /* SHT15 */ |
158 | GPIO100_GPIO, | 125 | GPIO100_GPIO, |
159 | GPIO98_GPIO, | 126 | GPIO98_GPIO, |
160 | }; | ||
161 | 127 | ||
162 | /** | 128 | /* Basic sensor board */ |
163 | * stargate2_reset_bluetooth() reset the bluecore to ensure consistent state | 129 | GPIO96_GPIO, /* accelerometer interrupt */ |
164 | **/ | 130 | GPIO99_GPIO, /* ADC interrupt */ |
165 | static int stargate2_reset_bluetooth(void) | ||
166 | { | ||
167 | int err; | ||
168 | err = gpio_request(SG2_BT_RESET, "SG2_BT_RESET"); | ||
169 | if (err) { | ||
170 | printk(KERN_ERR "Could not get gpio for bluetooth reset \n"); | ||
171 | return err; | ||
172 | } | ||
173 | gpio_direction_output(SG2_BT_RESET, 1); | ||
174 | mdelay(5); | ||
175 | /* now reset it - 5 msec minimum */ | ||
176 | gpio_set_value(SG2_BT_RESET, 0); | ||
177 | mdelay(10); | ||
178 | gpio_set_value(SG2_BT_RESET, 1); | ||
179 | gpio_free(SG2_BT_RESET); | ||
180 | return 0; | ||
181 | } | ||
182 | 131 | ||
183 | static struct led_info stargate2_leds[] = { | 132 | /* Connector pins specified as gpios */ |
184 | { | 133 | GPIO94_GPIO, /* large basic connector pin 14 */ |
185 | .name = "sg2:red", | 134 | GPIO10_GPIO, /* large basic connector pin 23 */ |
186 | .flags = DA9030_LED_RATE_ON, | ||
187 | }, { | ||
188 | .name = "sg2:blue", | ||
189 | .flags = DA9030_LED_RATE_ON, | ||
190 | }, { | ||
191 | .name = "sg2:green", | ||
192 | .flags = DA9030_LED_RATE_ON, | ||
193 | }, | ||
194 | }; | 135 | }; |
195 | 136 | ||
196 | static struct sht15_platform_data platform_data_sht15 = { | 137 | static struct sht15_platform_data platform_data_sht15 = { |
@@ -352,20 +293,184 @@ static struct regulator_init_data stargate2_ldo_init_data[] = { | |||
352 | }, | 293 | }, |
353 | }; | 294 | }; |
354 | 295 | ||
355 | static struct da903x_subdev_info stargate2_da9030_subdevs[] = { | 296 | static struct mtd_partition stargate2flash_partitions[] = { |
356 | { | 297 | { |
357 | .name = "da903x-led", | 298 | .name = "Bootloader", |
358 | .id = DA9030_ID_LED_2, | 299 | .size = 0x00040000, |
359 | .platform_data = &stargate2_leds[0], | 300 | .offset = 0, |
301 | .mask_flags = 0, | ||
360 | }, { | 302 | }, { |
361 | .name = "da903x-led", | 303 | .name = "Kernel", |
362 | .id = DA9030_ID_LED_3, | 304 | .size = 0x00200000, |
363 | .platform_data = &stargate2_leds[2], | 305 | .offset = 0x00040000, |
306 | .mask_flags = 0 | ||
364 | }, { | 307 | }, { |
365 | .name = "da903x-led", | 308 | .name = "Filesystem", |
366 | .id = DA9030_ID_LED_4, | 309 | .size = 0x01DC0000, |
367 | .platform_data = &stargate2_leds[1], | 310 | .offset = 0x00240000, |
311 | .mask_flags = 0 | ||
312 | }, | ||
313 | }; | ||
314 | |||
315 | static struct resource flash_resources = { | ||
316 | .start = PXA_CS0_PHYS, | ||
317 | .end = PXA_CS0_PHYS + SZ_32M - 1, | ||
318 | .flags = IORESOURCE_MEM, | ||
319 | }; | ||
320 | |||
321 | static struct flash_platform_data stargate2_flash_data = { | ||
322 | .map_name = "cfi_probe", | ||
323 | .parts = stargate2flash_partitions, | ||
324 | .nr_parts = ARRAY_SIZE(stargate2flash_partitions), | ||
325 | .name = "PXA27xOnChipROM", | ||
326 | .width = 2, | ||
327 | }; | ||
328 | |||
329 | static struct platform_device stargate2_flash_device = { | ||
330 | .name = "pxa2xx-flash", | ||
331 | .id = 0, | ||
332 | .dev = { | ||
333 | .platform_data = &stargate2_flash_data, | ||
334 | }, | ||
335 | .resource = &flash_resources, | ||
336 | .num_resources = 1, | ||
337 | }; | ||
338 | |||
339 | static struct pxa2xx_spi_master pxa_ssp_master_0_info = { | ||
340 | .num_chipselect = 1, | ||
341 | }; | ||
342 | |||
343 | static struct pxa2xx_spi_master pxa_ssp_master_1_info = { | ||
344 | .num_chipselect = 1, | ||
345 | }; | ||
346 | |||
347 | static struct pxa2xx_spi_master pxa_ssp_master_2_info = { | ||
348 | .num_chipselect = 1, | ||
349 | }; | ||
350 | |||
351 | /* An upcoming kernel change will scrap SFRM usage so these | ||
352 | * drivers have been moved to use gpio's via cs_control */ | ||
353 | static struct pxa2xx_spi_chip staccel_chip_info = { | ||
354 | .tx_threshold = 8, | ||
355 | .rx_threshold = 8, | ||
356 | .dma_burst_size = 8, | ||
357 | .timeout = 235, | ||
358 | .gpio_cs = 24, | ||
359 | }; | ||
360 | |||
361 | static struct pxa2xx_spi_chip cc2420_info = { | ||
362 | .tx_threshold = 8, | ||
363 | .rx_threshold = 8, | ||
364 | .dma_burst_size = 8, | ||
365 | .timeout = 235, | ||
366 | .gpio_cs = 39, | ||
367 | }; | ||
368 | |||
369 | static struct spi_board_info spi_board_info[] __initdata = { | ||
370 | { | ||
371 | .modalias = "lis3l02dq", | ||
372 | .max_speed_hz = 8000000,/* 8MHz max spi frequency at 3V */ | ||
373 | .bus_num = 1, | ||
374 | .chip_select = 0, | ||
375 | .controller_data = &staccel_chip_info, | ||
376 | .irq = IRQ_GPIO(96), | ||
368 | }, { | 377 | }, { |
378 | .modalias = "cc2420", | ||
379 | .max_speed_hz = 6500000, | ||
380 | .bus_num = 3, | ||
381 | .chip_select = 0, | ||
382 | .controller_data = &cc2420_info, | ||
383 | }, | ||
384 | }; | ||
385 | |||
386 | static void sg2_udc_command(int cmd) | ||
387 | { | ||
388 | switch (cmd) { | ||
389 | case PXA2XX_UDC_CMD_CONNECT: | ||
390 | UP2OCR |= UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE; | ||
391 | break; | ||
392 | case PXA2XX_UDC_CMD_DISCONNECT: | ||
393 | UP2OCR &= ~(UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE); | ||
394 | break; | ||
395 | } | ||
396 | } | ||
397 | |||
398 | static struct i2c_pxa_platform_data i2c_pwr_pdata = { | ||
399 | .fast_mode = 1, | ||
400 | }; | ||
401 | |||
402 | static struct i2c_pxa_platform_data i2c_pdata = { | ||
403 | .fast_mode = 1, | ||
404 | }; | ||
405 | |||
406 | static void __init imote2_stargate2_init(void) | ||
407 | { | ||
408 | |||
409 | pxa2xx_mfp_config(ARRAY_AND_SIZE(sg2_im2_unified_pin_config)); | ||
410 | |||
411 | pxa_set_ffuart_info(NULL); | ||
412 | pxa_set_btuart_info(NULL); | ||
413 | pxa_set_stuart_info(NULL); | ||
414 | |||
415 | pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info); | ||
416 | pxa2xx_set_spi_info(2, &pxa_ssp_master_1_info); | ||
417 | pxa2xx_set_spi_info(3, &pxa_ssp_master_2_info); | ||
418 | spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); | ||
419 | |||
420 | |||
421 | pxa27x_set_i2c_power_info(&i2c_pwr_pdata); | ||
422 | pxa_set_i2c_info(&i2c_pdata); | ||
423 | } | ||
424 | |||
425 | #ifdef CONFIG_MACH_INTELMOTE2 | ||
426 | /* As the the imote2 doesn't currently have a conventional SD slot | ||
427 | * there is no option to hotplug cards, making all this rather simple | ||
428 | */ | ||
429 | static int imote2_mci_get_ro(struct device *dev) | ||
430 | { | ||
431 | return 0; | ||
432 | } | ||
433 | |||
434 | /* Rather simple case as hotplugging not possible */ | ||
435 | static struct pxamci_platform_data imote2_mci_platform_data = { | ||
436 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* default anyway */ | ||
437 | .get_ro = imote2_mci_get_ro, | ||
438 | .gpio_card_detect = -1, | ||
439 | .gpio_card_ro = -1, | ||
440 | .gpio_power = -1, | ||
441 | }; | ||
442 | |||
443 | static struct gpio_led imote2_led_pins[] = { | ||
444 | { | ||
445 | .name = "imote2:red", | ||
446 | .gpio = 103, | ||
447 | .active_low = 1, | ||
448 | }, { | ||
449 | .name = "imote2:green", | ||
450 | .gpio = 104, | ||
451 | .active_low = 1, | ||
452 | }, { | ||
453 | .name = "imote2:blue", | ||
454 | .gpio = 105, | ||
455 | .active_low = 1, | ||
456 | }, | ||
457 | }; | ||
458 | |||
459 | static struct gpio_led_platform_data imote2_led_data = { | ||
460 | .num_leds = ARRAY_SIZE(imote2_led_pins), | ||
461 | .leds = imote2_led_pins, | ||
462 | }; | ||
463 | |||
464 | static struct platform_device imote2_leds = { | ||
465 | .name = "leds-gpio", | ||
466 | .id = -1, | ||
467 | .dev = { | ||
468 | .platform_data = &imote2_led_data, | ||
469 | }, | ||
470 | }; | ||
471 | |||
472 | static struct da903x_subdev_info imote2_da9030_subdevs[] = { | ||
473 | { | ||
369 | .name = "da903x-regulator", | 474 | .name = "da903x-regulator", |
370 | .id = DA9030_ID_LDO2, | 475 | .id = DA9030_ID_LDO2, |
371 | .platform_data = &stargate2_ldo_init_data[vcc_bbio], | 476 | .platform_data = &stargate2_ldo_init_data[vcc_bbio], |
@@ -428,9 +533,121 @@ static struct da903x_subdev_info stargate2_da9030_subdevs[] = { | |||
428 | }, | 533 | }, |
429 | }; | 534 | }; |
430 | 535 | ||
431 | static struct da903x_platform_data stargate2_da9030_pdata = { | 536 | static struct da903x_platform_data imote2_da9030_pdata = { |
432 | .num_subdevs = ARRAY_SIZE(stargate2_da9030_subdevs), | 537 | .num_subdevs = ARRAY_SIZE(imote2_da9030_subdevs), |
433 | .subdevs = stargate2_da9030_subdevs, | 538 | .subdevs = imote2_da9030_subdevs, |
539 | }; | ||
540 | |||
541 | static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = { | ||
542 | { | ||
543 | .type = "da9030", | ||
544 | .addr = 0x49, | ||
545 | .platform_data = &imote2_da9030_pdata, | ||
546 | .irq = gpio_to_irq(1), | ||
547 | }, | ||
548 | }; | ||
549 | |||
550 | static struct i2c_board_info __initdata imote2_i2c_board_info[] = { | ||
551 | { /* UCAM sensor board */ | ||
552 | .type = "max1239", | ||
553 | .addr = 0x35, | ||
554 | }, { /* ITS400 Sensor board only */ | ||
555 | .type = "max1363", | ||
556 | .addr = 0x34, | ||
557 | /* Through a nand gate - Also beware, on V2 sensor board the | ||
558 | * pull up resistors are missing. | ||
559 | */ | ||
560 | .irq = IRQ_GPIO(99), | ||
561 | }, { /* ITS400 Sensor board only */ | ||
562 | .type = "tsl2561", | ||
563 | .addr = 0x49, | ||
564 | /* Through a nand gate - Also beware, on V2 sensor board the | ||
565 | * pull up resistors are missing. | ||
566 | */ | ||
567 | .irq = IRQ_GPIO(99), | ||
568 | }, { /* ITS400 Sensor board only */ | ||
569 | .type = "tmp175", | ||
570 | .addr = 0x4A, | ||
571 | .irq = IRQ_GPIO(96), | ||
572 | }, { /* IMB400 Multimedia board */ | ||
573 | .type = "wm8940", | ||
574 | .addr = 0x1A, | ||
575 | }, | ||
576 | }; | ||
577 | |||
578 | static unsigned long imote2_pin_config[] __initdata = { | ||
579 | |||
580 | /* Button */ | ||
581 | GPIO91_GPIO, | ||
582 | |||
583 | /* LEDS */ | ||
584 | GPIO103_GPIO, /* red led */ | ||
585 | GPIO104_GPIO, /* green led */ | ||
586 | GPIO105_GPIO, /* blue led */ | ||
587 | }; | ||
588 | |||
589 | static struct pxa2xx_udc_mach_info imote2_udc_info __initdata = { | ||
590 | .udc_command = sg2_udc_command, | ||
591 | }; | ||
592 | |||
593 | static struct platform_device *imote2_devices[] = { | ||
594 | &stargate2_flash_device, | ||
595 | &imote2_leds, | ||
596 | &sht15, | ||
597 | }; | ||
598 | |||
599 | static void __init imote2_init(void) | ||
600 | { | ||
601 | pxa2xx_mfp_config(ARRAY_AND_SIZE(imote2_pin_config)); | ||
602 | |||
603 | imote2_stargate2_init(); | ||
604 | |||
605 | platform_add_devices(imote2_devices, ARRAY_SIZE(imote2_devices)); | ||
606 | |||
607 | i2c_register_board_info(0, imote2_i2c_board_info, | ||
608 | ARRAY_SIZE(imote2_i2c_board_info)); | ||
609 | i2c_register_board_info(1, imote2_pwr_i2c_board_info, | ||
610 | ARRAY_SIZE(imote2_pwr_i2c_board_info)); | ||
611 | |||
612 | pxa_set_mci_info(&imote2_mci_platform_data); | ||
613 | pxa_set_udc_info(&imote2_udc_info); | ||
614 | } | ||
615 | #endif | ||
616 | |||
617 | #ifdef CONFIG_MACH_STARGATE2 | ||
618 | |||
619 | static unsigned long stargate2_pin_config[] __initdata = { | ||
620 | |||
621 | GPIO15_nCS_1, /* SRAM */ | ||
622 | /* SMC91x */ | ||
623 | GPIO80_nCS_4, | ||
624 | GPIO40_GPIO, /*cable detect?*/ | ||
625 | |||
626 | /* Button */ | ||
627 | GPIO91_GPIO | WAKEUP_ON_LEVEL_HIGH, | ||
628 | |||
629 | /* Compact Flash */ | ||
630 | GPIO79_PSKTSEL, | ||
631 | GPIO48_nPOE, | ||
632 | GPIO49_nPWE, | ||
633 | GPIO50_nPIOR, | ||
634 | GPIO51_nPIOW, | ||
635 | GPIO85_nPCE_1, | ||
636 | GPIO54_nPCE_2, | ||
637 | GPIO55_nPREG, | ||
638 | GPIO56_nPWAIT, | ||
639 | GPIO57_nIOIS16, | ||
640 | GPIO120_GPIO, /* Buff ctrl */ | ||
641 | GPIO108_GPIO, /* Power ctrl */ | ||
642 | GPIO82_GPIO, /* Reset */ | ||
643 | GPIO53_GPIO, /* SG2_S0_GPIO_DETECT */ | ||
644 | |||
645 | /* MMC not shared with imote2 */ | ||
646 | GPIO90_GPIO, /* nSD detect */ | ||
647 | GPIO89_GPIO, /* SD_POWER_ENABLE */ | ||
648 | |||
649 | /* Bluetooth */ | ||
650 | GPIO81_GPIO, /* reset */ | ||
434 | }; | 651 | }; |
435 | 652 | ||
436 | static struct resource smc91x_resources[] = { | 653 | static struct resource smc91x_resources[] = { |
@@ -463,7 +680,6 @@ static struct platform_device smc91x_device = { | |||
463 | }; | 680 | }; |
464 | 681 | ||
465 | 682 | ||
466 | |||
467 | /* | 683 | /* |
468 | * The card detect interrupt isn't debounced so we delay it by 250ms | 684 | * The card detect interrupt isn't debounced so we delay it by 250ms |
469 | * to give the card a chance to fully insert / eject. | 685 | * to give the card a chance to fully insert / eject. |
@@ -532,48 +748,6 @@ static struct pxamci_platform_data stargate2_mci_platform_data = { | |||
532 | .exit = stargate2_mci_exit, | 748 | .exit = stargate2_mci_exit, |
533 | }; | 749 | }; |
534 | 750 | ||
535 | static struct mtd_partition stargate2flash_partitions[] = { | ||
536 | { | ||
537 | .name = "Bootloader", | ||
538 | .size = 0x00040000, | ||
539 | .offset = 0, | ||
540 | .mask_flags = 0, | ||
541 | }, { | ||
542 | .name = "Kernel", | ||
543 | .size = 0x00200000, | ||
544 | .offset = 0x00040000, | ||
545 | .mask_flags = 0 | ||
546 | }, { | ||
547 | .name = "Filesystem", | ||
548 | .size = 0x01DC0000, | ||
549 | .offset = 0x00240000, | ||
550 | .mask_flags = 0 | ||
551 | }, | ||
552 | }; | ||
553 | |||
554 | static struct resource flash_resources = { | ||
555 | .start = PXA_CS0_PHYS, | ||
556 | .end = PXA_CS0_PHYS + SZ_32M - 1, | ||
557 | .flags = IORESOURCE_MEM, | ||
558 | }; | ||
559 | |||
560 | static struct flash_platform_data stargate2_flash_data = { | ||
561 | .map_name = "cfi_probe", | ||
562 | .parts = stargate2flash_partitions, | ||
563 | .nr_parts = ARRAY_SIZE(stargate2flash_partitions), | ||
564 | .name = "PXA27xOnChipROM", | ||
565 | .width = 2, | ||
566 | }; | ||
567 | |||
568 | static struct platform_device stargate2_flash_device = { | ||
569 | .name = "pxa2xx-flash", | ||
570 | .id = 0, | ||
571 | .dev = { | ||
572 | .platform_data = &stargate2_flash_data, | ||
573 | }, | ||
574 | .resource = &flash_resources, | ||
575 | .num_resources = 1, | ||
576 | }; | ||
577 | 751 | ||
578 | /* | 752 | /* |
579 | * SRAM - The Stargate 2 has 32MB of SRAM. | 753 | * SRAM - The Stargate 2 has 32MB of SRAM. |
@@ -616,6 +790,129 @@ static struct at24_platform_data pca9500_eeprom_pdata = { | |||
616 | .page_size = 4, | 790 | .page_size = 4, |
617 | }; | 791 | }; |
618 | 792 | ||
793 | /** | ||
794 | * stargate2_reset_bluetooth() reset the bluecore to ensure consistent state | ||
795 | **/ | ||
796 | static int stargate2_reset_bluetooth(void) | ||
797 | { | ||
798 | int err; | ||
799 | err = gpio_request(SG2_BT_RESET, "SG2_BT_RESET"); | ||
800 | if (err) { | ||
801 | printk(KERN_ERR "Could not get gpio for bluetooth reset\n"); | ||
802 | return err; | ||
803 | } | ||
804 | gpio_direction_output(SG2_BT_RESET, 1); | ||
805 | mdelay(5); | ||
806 | /* now reset it - 5 msec minimum */ | ||
807 | gpio_set_value(SG2_BT_RESET, 0); | ||
808 | mdelay(10); | ||
809 | gpio_set_value(SG2_BT_RESET, 1); | ||
810 | gpio_free(SG2_BT_RESET); | ||
811 | return 0; | ||
812 | } | ||
813 | |||
814 | static struct led_info stargate2_leds[] = { | ||
815 | { | ||
816 | .name = "sg2:red", | ||
817 | .flags = DA9030_LED_RATE_ON, | ||
818 | }, { | ||
819 | .name = "sg2:blue", | ||
820 | .flags = DA9030_LED_RATE_ON, | ||
821 | }, { | ||
822 | .name = "sg2:green", | ||
823 | .flags = DA9030_LED_RATE_ON, | ||
824 | }, | ||
825 | }; | ||
826 | |||
827 | static struct da903x_subdev_info stargate2_da9030_subdevs[] = { | ||
828 | { | ||
829 | .name = "da903x-led", | ||
830 | .id = DA9030_ID_LED_2, | ||
831 | .platform_data = &stargate2_leds[0], | ||
832 | }, { | ||
833 | .name = "da903x-led", | ||
834 | .id = DA9030_ID_LED_3, | ||
835 | .platform_data = &stargate2_leds[2], | ||
836 | }, { | ||
837 | .name = "da903x-led", | ||
838 | .id = DA9030_ID_LED_4, | ||
839 | .platform_data = &stargate2_leds[1], | ||
840 | }, { | ||
841 | .name = "da903x-regulator", | ||
842 | .id = DA9030_ID_LDO2, | ||
843 | .platform_data = &stargate2_ldo_init_data[vcc_bbio], | ||
844 | }, { | ||
845 | .name = "da903x-regulator", | ||
846 | .id = DA9030_ID_LDO3, | ||
847 | .platform_data = &stargate2_ldo_init_data[vcc_bb], | ||
848 | }, { | ||
849 | .name = "da903x-regulator", | ||
850 | .id = DA9030_ID_LDO4, | ||
851 | .platform_data = &stargate2_ldo_init_data[vcc_pxa_flash], | ||
852 | }, { | ||
853 | .name = "da903x-regulator", | ||
854 | .id = DA9030_ID_LDO5, | ||
855 | .platform_data = &stargate2_ldo_init_data[vcc_cc2420], | ||
856 | }, { | ||
857 | .name = "da903x-regulator", | ||
858 | .id = DA9030_ID_LDO6, | ||
859 | .platform_data = &stargate2_ldo_init_data[vcc_vref], | ||
860 | }, { | ||
861 | .name = "da903x-regulator", | ||
862 | .id = DA9030_ID_LDO7, | ||
863 | .platform_data = &stargate2_ldo_init_data[vcc_sram_ext], | ||
864 | }, { | ||
865 | .name = "da903x-regulator", | ||
866 | .id = DA9030_ID_LDO8, | ||
867 | .platform_data = &stargate2_ldo_init_data[vcc_mica], | ||
868 | }, { | ||
869 | .name = "da903x-regulator", | ||
870 | .id = DA9030_ID_LDO9, | ||
871 | .platform_data = &stargate2_ldo_init_data[vcc_bt], | ||
872 | }, { | ||
873 | .name = "da903x-regulator", | ||
874 | .id = DA9030_ID_LDO10, | ||
875 | .platform_data = &stargate2_ldo_init_data[vcc_sensor_1_8], | ||
876 | }, { | ||
877 | .name = "da903x-regulator", | ||
878 | .id = DA9030_ID_LDO11, | ||
879 | .platform_data = &stargate2_ldo_init_data[vcc_sensor_3], | ||
880 | }, { | ||
881 | .name = "da903x-regulator", | ||
882 | .id = DA9030_ID_LDO12, | ||
883 | .platform_data = &stargate2_ldo_init_data[vcc_lcd], | ||
884 | }, { | ||
885 | .name = "da903x-regulator", | ||
886 | .id = DA9030_ID_LDO15, | ||
887 | .platform_data = &stargate2_ldo_init_data[vcc_pxa_pll], | ||
888 | }, { | ||
889 | .name = "da903x-regulator", | ||
890 | .id = DA9030_ID_LDO17, | ||
891 | .platform_data = &stargate2_ldo_init_data[vcc_pxa_usim], | ||
892 | }, { | ||
893 | .name = "da903x-regulator", /*pxa vcc i/o and cc2420 vcc i/o */ | ||
894 | .id = DA9030_ID_LDO18, | ||
895 | .platform_data = &stargate2_ldo_init_data[vcc_io], | ||
896 | }, { | ||
897 | .name = "da903x-regulator", | ||
898 | .id = DA9030_ID_LDO19, | ||
899 | .platform_data = &stargate2_ldo_init_data[vcc_pxa_mem], | ||
900 | }, | ||
901 | }; | ||
902 | |||
903 | static struct da903x_platform_data stargate2_da9030_pdata = { | ||
904 | .num_subdevs = ARRAY_SIZE(stargate2_da9030_subdevs), | ||
905 | .subdevs = stargate2_da9030_subdevs, | ||
906 | }; | ||
907 | |||
908 | static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = { | ||
909 | { | ||
910 | .type = "da9030", | ||
911 | .addr = 0x49, | ||
912 | .platform_data = &stargate2_da9030_pdata, | ||
913 | .irq = gpio_to_irq(1), | ||
914 | }, | ||
915 | }; | ||
619 | 916 | ||
620 | static struct i2c_board_info __initdata stargate2_i2c_board_info[] = { | 917 | static struct i2c_board_info __initdata stargate2_i2c_board_info[] = { |
621 | /* Techically this a pca9500 - but it's compatible with the 8574 | 918 | /* Techically this a pca9500 - but it's compatible with the 8574 |
@@ -653,74 +950,6 @@ static struct i2c_board_info __initdata stargate2_i2c_board_info[] = { | |||
653 | }, | 950 | }, |
654 | }; | 951 | }; |
655 | 952 | ||
656 | static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = { | ||
657 | { | ||
658 | .type = "da9030", | ||
659 | .addr = 0x49, | ||
660 | .platform_data = &stargate2_da9030_pdata, | ||
661 | .irq = gpio_to_irq(1), | ||
662 | }, | ||
663 | }; | ||
664 | |||
665 | static struct pxa2xx_spi_master pxa_ssp_master_0_info = { | ||
666 | .num_chipselect = 1, | ||
667 | }; | ||
668 | |||
669 | static struct pxa2xx_spi_master pxa_ssp_master_1_info = { | ||
670 | .num_chipselect = 1, | ||
671 | }; | ||
672 | |||
673 | static struct pxa2xx_spi_master pxa_ssp_master_2_info = { | ||
674 | .num_chipselect = 1, | ||
675 | }; | ||
676 | |||
677 | /* An upcoming kernel change will scrap SFRM usage so these | ||
678 | * drivers have been moved to use gpio's via cs_control */ | ||
679 | static struct pxa2xx_spi_chip staccel_chip_info = { | ||
680 | .tx_threshold = 8, | ||
681 | .rx_threshold = 8, | ||
682 | .dma_burst_size = 8, | ||
683 | .timeout = 235, | ||
684 | .gpio_cs = 24, | ||
685 | }; | ||
686 | |||
687 | static struct pxa2xx_spi_chip cc2420_info = { | ||
688 | .tx_threshold = 8, | ||
689 | .rx_threshold = 8, | ||
690 | .dma_burst_size = 8, | ||
691 | .timeout = 235, | ||
692 | .gpio_cs = 39, | ||
693 | }; | ||
694 | |||
695 | static struct spi_board_info spi_board_info[] __initdata = { | ||
696 | { | ||
697 | .modalias = "lis3l02dq", | ||
698 | .max_speed_hz = 8000000,/* 8MHz max spi frequency at 3V */ | ||
699 | .bus_num = 1, | ||
700 | .chip_select = 0, | ||
701 | .controller_data = &staccel_chip_info, | ||
702 | .irq = IRQ_GPIO(96), | ||
703 | }, { | ||
704 | .modalias = "cc2420", | ||
705 | .max_speed_hz = 6500000, | ||
706 | .bus_num = 3, | ||
707 | .chip_select = 0, | ||
708 | .controller_data = &cc2420_info, | ||
709 | }, | ||
710 | }; | ||
711 | |||
712 | static void sg2_udc_command(int cmd) | ||
713 | { | ||
714 | switch (cmd) { | ||
715 | case PXA2XX_UDC_CMD_CONNECT: | ||
716 | UP2OCR |= UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE; | ||
717 | break; | ||
718 | case PXA2XX_UDC_CMD_DISCONNECT: | ||
719 | UP2OCR &= ~(UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE); | ||
720 | break; | ||
721 | } | ||
722 | } | ||
723 | |||
724 | /* Board doesn't support cable detection - so always lie and say | 953 | /* Board doesn't support cable detection - so always lie and say |
725 | * something is there. | 954 | * something is there. |
726 | */ | 955 | */ |
@@ -741,14 +970,6 @@ static struct platform_device *stargate2_devices[] = { | |||
741 | &sht15, | 970 | &sht15, |
742 | }; | 971 | }; |
743 | 972 | ||
744 | static struct i2c_pxa_platform_data i2c_pwr_pdata = { | ||
745 | .fast_mode = 1, | ||
746 | }; | ||
747 | |||
748 | static struct i2c_pxa_platform_data i2c_pdata = { | ||
749 | .fast_mode = 1, | ||
750 | }; | ||
751 | |||
752 | static void __init stargate2_init(void) | 973 | static void __init stargate2_init(void) |
753 | { | 974 | { |
754 | /* This is probably a board specific hack as this must be set | 975 | /* This is probably a board specific hack as this must be set |
@@ -757,22 +978,13 @@ static void __init stargate2_init(void) | |||
757 | 978 | ||
758 | pxa2xx_mfp_config(ARRAY_AND_SIZE(stargate2_pin_config)); | 979 | pxa2xx_mfp_config(ARRAY_AND_SIZE(stargate2_pin_config)); |
759 | 980 | ||
760 | pxa_set_ffuart_info(NULL); | 981 | imote2_stargate2_init(); |
761 | pxa_set_btuart_info(NULL); | ||
762 | pxa_set_stuart_info(NULL); | ||
763 | 982 | ||
764 | platform_add_devices(ARRAY_AND_SIZE(stargate2_devices)); | 983 | platform_add_devices(ARRAY_AND_SIZE(stargate2_devices)); |
765 | 984 | ||
766 | pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info); | ||
767 | pxa2xx_set_spi_info(2, &pxa_ssp_master_1_info); | ||
768 | pxa2xx_set_spi_info(3, &pxa_ssp_master_2_info); | ||
769 | spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); | ||
770 | |||
771 | i2c_register_board_info(0, ARRAY_AND_SIZE(stargate2_i2c_board_info)); | 985 | i2c_register_board_info(0, ARRAY_AND_SIZE(stargate2_i2c_board_info)); |
772 | i2c_register_board_info(1, | 986 | i2c_register_board_info(1, stargate2_pwr_i2c_board_info, |
773 | ARRAY_AND_SIZE(stargate2_pwr_i2c_board_info)); | 987 | ARRAY_SIZE(stargate2_pwr_i2c_board_info)); |
774 | pxa27x_set_i2c_power_info(&i2c_pwr_pdata); | ||
775 | pxa_set_i2c_info(&i2c_pdata); | ||
776 | 988 | ||
777 | pxa_set_mci_info(&stargate2_mci_platform_data); | 989 | pxa_set_mci_info(&stargate2_mci_platform_data); |
778 | 990 | ||
@@ -780,7 +992,21 @@ static void __init stargate2_init(void) | |||
780 | 992 | ||
781 | stargate2_reset_bluetooth(); | 993 | stargate2_reset_bluetooth(); |
782 | } | 994 | } |
995 | #endif | ||
996 | |||
997 | #ifdef CONFIG_MACH_INTELMOTE2 | ||
998 | MACHINE_START(INTELMOTE2, "IMOTE 2") | ||
999 | .phys_io = 0x40000000, | ||
1000 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
1001 | .map_io = pxa_map_io, | ||
1002 | .init_irq = pxa27x_init_irq, | ||
1003 | .timer = &pxa_timer, | ||
1004 | .init_machine = imote2_init, | ||
1005 | .boot_params = 0xA0000100, | ||
1006 | MACHINE_END | ||
1007 | #endif | ||
783 | 1008 | ||
1009 | #ifdef CONFIG_MACH_STARGATE2 | ||
784 | MACHINE_START(STARGATE2, "Stargate 2") | 1010 | MACHINE_START(STARGATE2, "Stargate 2") |
785 | .phys_io = 0x40000000, | 1011 | .phys_io = 0x40000000, |
786 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | 1012 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, |
@@ -790,3 +1016,4 @@ MACHINE_START(STARGATE2, "Stargate 2") | |||
790 | .init_machine = stargate2_init, | 1016 | .init_machine = stargate2_init, |
791 | .boot_params = 0xA0000100, | 1017 | .boot_params = 0xA0000100, |
792 | MACHINE_END | 1018 | MACHINE_END |
1019 | #endif | ||
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 69689112eae7..0acff172ef22 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c | |||
@@ -530,13 +530,9 @@ static void __init trizeps4_init(void) | |||
530 | i2c_register_board_info(0, trizeps4_i2c_devices, | 530 | i2c_register_board_info(0, trizeps4_i2c_devices, |
531 | ARRAY_SIZE(trizeps4_i2c_devices)); | 531 | ARRAY_SIZE(trizeps4_i2c_devices)); |
532 | 532 | ||
533 | #ifdef CONFIG_IDE_PXA_CF | ||
534 | /* if boot direct from compact flash dont disable power */ | ||
535 | trizeps_conxs_bcr = 0x0009; | ||
536 | #else | ||
537 | /* this is the reset value */ | 533 | /* this is the reset value */ |
538 | trizeps_conxs_bcr = 0x00A0; | 534 | trizeps_conxs_bcr = 0x00A0; |
539 | #endif | 535 | |
540 | BCR_writew(trizeps_conxs_bcr); | 536 | BCR_writew(trizeps_conxs_bcr); |
541 | board_backlight_power(1); | 537 | board_backlight_power(1); |
542 | } | 538 | } |
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c index 9884fa978f16..c9b747cedea8 100644 --- a/arch/arm/mach-pxa/vpac270.c +++ b/arch/arm/mach-pxa/vpac270.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/dm9000.h> | 25 | #include <linux/dm9000.h> |
26 | #include <linux/ucb1400.h> | 26 | #include <linux/ucb1400.h> |
27 | #include <linux/ata_platform.h> | 27 | #include <linux/ata_platform.h> |
28 | #include <linux/regulator/max1586.h> | ||
28 | 29 | ||
29 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
30 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
@@ -37,6 +38,7 @@ | |||
37 | #include <mach/ohci.h> | 38 | #include <mach/ohci.h> |
38 | #include <mach/pxa27x-udc.h> | 39 | #include <mach/pxa27x-udc.h> |
39 | #include <mach/udc.h> | 40 | #include <mach/udc.h> |
41 | #include <mach/pata_pxa.h> | ||
40 | 42 | ||
41 | #include <plat/i2c.h> | 43 | #include <plat/i2c.h> |
42 | 44 | ||
@@ -464,7 +466,6 @@ static struct i2c_board_info __initdata vpac270_i2c_devs[] = { | |||
464 | 466 | ||
465 | static void __init vpac270_rtc_init(void) | 467 | static void __init vpac270_rtc_init(void) |
466 | { | 468 | { |
467 | pxa_set_i2c_info(NULL); | ||
468 | i2c_register_board_info(0, ARRAY_AND_SIZE(vpac270_i2c_devs)); | 469 | i2c_register_board_info(0, ARRAY_AND_SIZE(vpac270_i2c_devs)); |
469 | } | 470 | } |
470 | #else | 471 | #else |
@@ -492,7 +493,55 @@ static struct pxafb_mode_info vpac270_lcd_modes[] = { | |||
492 | .vsync_len = 2, | 493 | .vsync_len = 2, |
493 | 494 | ||
494 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | 495 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
495 | }, | 496 | }, { /* CRT 640x480 */ |
497 | .pixclock = 35000, | ||
498 | .xres = 640, | ||
499 | .yres = 480, | ||
500 | .bpp = 16, | ||
501 | .depth = 16, | ||
502 | |||
503 | .left_margin = 96, | ||
504 | .right_margin = 48, | ||
505 | .upper_margin = 33, | ||
506 | .lower_margin = 10, | ||
507 | |||
508 | .hsync_len = 48, | ||
509 | .vsync_len = 1, | ||
510 | |||
511 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | ||
512 | }, { /* CRT 800x600 H=30kHz V=48HZ */ | ||
513 | .pixclock = 25000, | ||
514 | .xres = 800, | ||
515 | .yres = 600, | ||
516 | .bpp = 16, | ||
517 | .depth = 16, | ||
518 | |||
519 | .left_margin = 50, | ||
520 | .right_margin = 1, | ||
521 | .upper_margin = 21, | ||
522 | .lower_margin = 12, | ||
523 | |||
524 | .hsync_len = 8, | ||
525 | .vsync_len = 1, | ||
526 | |||
527 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | ||
528 | }, { /* CRT 1024x768 H=40kHz V=50Hz */ | ||
529 | .pixclock = 15000, | ||
530 | .xres = 1024, | ||
531 | .yres = 768, | ||
532 | .bpp = 16, | ||
533 | .depth = 16, | ||
534 | |||
535 | .left_margin = 220, | ||
536 | .right_margin = 8, | ||
537 | .upper_margin = 33, | ||
538 | .lower_margin = 2, | ||
539 | |||
540 | .hsync_len = 48, | ||
541 | .vsync_len = 1, | ||
542 | |||
543 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | ||
544 | } | ||
496 | }; | 545 | }; |
497 | 546 | ||
498 | static struct pxafb_mach_info vpac270_lcd_screen = { | 547 | static struct pxafb_mach_info vpac270_lcd_screen = { |
@@ -538,9 +587,10 @@ static inline void vpac270_lcd_init(void) {} | |||
538 | /****************************************************************************** | 587 | /****************************************************************************** |
539 | * PATA IDE | 588 | * PATA IDE |
540 | ******************************************************************************/ | 589 | ******************************************************************************/ |
541 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | 590 | #if defined(CONFIG_PATA_PXA) || defined(CONFIG_PATA_PXA_MODULE) |
542 | static struct pata_platform_info vpac270_pata_pdata = { | 591 | static struct pata_pxa_pdata vpac270_pata_pdata = { |
543 | .ioport_shift = 1, | 592 | .reg_shift = 1, |
593 | .dma_dreq = 1, | ||
544 | .irq_flags = IRQF_TRIGGER_RISING, | 594 | .irq_flags = IRQF_TRIGGER_RISING, |
545 | }; | 595 | }; |
546 | 596 | ||
@@ -555,7 +605,12 @@ static struct resource vpac270_ide_resources[] = { | |||
555 | .end = PXA_CS3_PHYS + 0x15f, | 605 | .end = PXA_CS3_PHYS + 0x15f, |
556 | .flags = IORESOURCE_MEM | 606 | .flags = IORESOURCE_MEM |
557 | }, | 607 | }, |
558 | [2] = { /* IDE IRQ pin */ | 608 | [2] = { /* DMA Base address */ |
609 | .start = PXA_CS3_PHYS + 0x20, | ||
610 | .end = PXA_CS3_PHYS + 0x2f, | ||
611 | .flags = IORESOURCE_DMA | ||
612 | }, | ||
613 | [3] = { /* IDE IRQ pin */ | ||
559 | .start = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), | 614 | .start = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), |
560 | .end = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), | 615 | .end = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), |
561 | .flags = IORESOURCE_IRQ | 616 | .flags = IORESOURCE_IRQ |
@@ -563,11 +618,12 @@ static struct resource vpac270_ide_resources[] = { | |||
563 | }; | 618 | }; |
564 | 619 | ||
565 | static struct platform_device vpac270_ide_device = { | 620 | static struct platform_device vpac270_ide_device = { |
566 | .name = "pata_platform", | 621 | .name = "pata_pxa", |
567 | .num_resources = ARRAY_SIZE(vpac270_ide_resources), | 622 | .num_resources = ARRAY_SIZE(vpac270_ide_resources), |
568 | .resource = vpac270_ide_resources, | 623 | .resource = vpac270_ide_resources, |
569 | .dev = { | 624 | .dev = { |
570 | .platform_data = &vpac270_pata_pdata, | 625 | .platform_data = &vpac270_pata_pdata, |
626 | .coherent_dma_mask = 0xffffffff, | ||
571 | } | 627 | } |
572 | }; | 628 | }; |
573 | 629 | ||
@@ -580,6 +636,59 @@ static inline void vpac270_ide_init(void) {} | |||
580 | #endif | 636 | #endif |
581 | 637 | ||
582 | /****************************************************************************** | 638 | /****************************************************************************** |
639 | * Core power regulator | ||
640 | ******************************************************************************/ | ||
641 | #if defined(CONFIG_REGULATOR_MAX1586) || \ | ||
642 | defined(CONFIG_REGULATOR_MAX1586_MODULE) | ||
643 | static struct regulator_consumer_supply vpac270_max1587a_consumers[] = { | ||
644 | { | ||
645 | .supply = "vcc_core", | ||
646 | } | ||
647 | }; | ||
648 | |||
649 | static struct regulator_init_data vpac270_max1587a_v3_info = { | ||
650 | .constraints = { | ||
651 | .name = "vcc_core range", | ||
652 | .min_uV = 900000, | ||
653 | .max_uV = 1705000, | ||
654 | .always_on = 1, | ||
655 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
656 | }, | ||
657 | .consumer_supplies = vpac270_max1587a_consumers, | ||
658 | .num_consumer_supplies = ARRAY_SIZE(vpac270_max1587a_consumers), | ||
659 | }; | ||
660 | |||
661 | static struct max1586_subdev_data vpac270_max1587a_subdevs[] = { | ||
662 | { | ||
663 | .name = "vcc_core", | ||
664 | .id = MAX1586_V3, | ||
665 | .platform_data = &vpac270_max1587a_v3_info, | ||
666 | } | ||
667 | }; | ||
668 | |||
669 | static struct max1586_platform_data vpac270_max1587a_info = { | ||
670 | .subdevs = vpac270_max1587a_subdevs, | ||
671 | .num_subdevs = ARRAY_SIZE(vpac270_max1587a_subdevs), | ||
672 | .v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */ | ||
673 | }; | ||
674 | |||
675 | static struct i2c_board_info __initdata vpac270_pi2c_board_info[] = { | ||
676 | { | ||
677 | I2C_BOARD_INFO("max1586", 0x14), | ||
678 | .platform_data = &vpac270_max1587a_info, | ||
679 | }, | ||
680 | }; | ||
681 | |||
682 | static void __init vpac270_pmic_init(void) | ||
683 | { | ||
684 | i2c_register_board_info(1, ARRAY_AND_SIZE(vpac270_pi2c_board_info)); | ||
685 | } | ||
686 | #else | ||
687 | static inline void vpac270_pmic_init(void) {} | ||
688 | #endif | ||
689 | |||
690 | |||
691 | /****************************************************************************** | ||
583 | * Machine init | 692 | * Machine init |
584 | ******************************************************************************/ | 693 | ******************************************************************************/ |
585 | static void __init vpac270_init(void) | 694 | static void __init vpac270_init(void) |
@@ -589,7 +698,10 @@ static void __init vpac270_init(void) | |||
589 | pxa_set_ffuart_info(NULL); | 698 | pxa_set_ffuart_info(NULL); |
590 | pxa_set_btuart_info(NULL); | 699 | pxa_set_btuart_info(NULL); |
591 | pxa_set_stuart_info(NULL); | 700 | pxa_set_stuart_info(NULL); |
701 | pxa_set_i2c_info(NULL); | ||
702 | pxa27x_set_i2c_power_info(NULL); | ||
592 | 703 | ||
704 | vpac270_pmic_init(); | ||
593 | vpac270_lcd_init(); | 705 | vpac270_lcd_init(); |
594 | vpac270_mmc_init(); | 706 | vpac270_mmc_init(); |
595 | vpac270_nor_init(); | 707 | vpac270_nor_init(); |
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index d303c6929d32..f0d02288b4ca 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/mtd/mtd.h> | 17 | #include <linux/mtd/mtd.h> |
18 | #include <linux/mtd/partitions.h> | 18 | #include <linux/mtd/partitions.h> |
19 | #include <linux/pwm_backlight.h> | 19 | #include <linux/pwm_backlight.h> |
20 | #include <linux/z2_battery.h> | ||
20 | #include <linux/dma-mapping.h> | 21 | #include <linux/dma-mapping.h> |
21 | #include <linux/spi/spi.h> | 22 | #include <linux/spi/spi.h> |
22 | #include <linux/spi/libertas_spi.h> | 23 | #include <linux/spi/libertas_spi.h> |
@@ -26,6 +27,7 @@ | |||
26 | #include <linux/gpio.h> | 27 | #include <linux/gpio.h> |
27 | #include <linux/gpio_keys.h> | 28 | #include <linux/gpio_keys.h> |
28 | #include <linux/delay.h> | 29 | #include <linux/delay.h> |
30 | #include <linux/regulator/machine.h> | ||
29 | 31 | ||
30 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
31 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
@@ -162,7 +164,7 @@ static struct mtd_partition z2_flash_parts[] = { | |||
162 | }, { | 164 | }, { |
163 | .name = "U-Boot Environment", | 165 | .name = "U-Boot Environment", |
164 | .offset = 0x40000, | 166 | .offset = 0x40000, |
165 | .size = 0x60000, | 167 | .size = 0x20000, |
166 | }, { | 168 | }, { |
167 | .name = "Flash", | 169 | .name = "Flash", |
168 | .offset = 0x60000, | 170 | .offset = 0x60000, |
@@ -452,6 +454,42 @@ static inline void z2_keys_init(void) {} | |||
452 | #endif | 454 | #endif |
453 | 455 | ||
454 | /****************************************************************************** | 456 | /****************************************************************************** |
457 | * Battery | ||
458 | ******************************************************************************/ | ||
459 | #if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) | ||
460 | static struct z2_battery_info batt_chip_info = { | ||
461 | .batt_I2C_bus = 0, | ||
462 | .batt_I2C_addr = 0x55, | ||
463 | .batt_I2C_reg = 2, | ||
464 | .charge_gpio = GPIO0_ZIPITZ2_AC_DETECT, | ||
465 | .min_voltage = 2400000, | ||
466 | .max_voltage = 3700000, | ||
467 | .batt_div = 69, | ||
468 | .batt_mult = 1000000, | ||
469 | .batt_tech = POWER_SUPPLY_TECHNOLOGY_LION, | ||
470 | .batt_name = "Z2", | ||
471 | }; | ||
472 | |||
473 | static struct i2c_board_info __initdata z2_i2c_board_info[] = { | ||
474 | { | ||
475 | I2C_BOARD_INFO("aer915", 0x55), | ||
476 | .platform_data = &batt_chip_info, | ||
477 | }, { | ||
478 | I2C_BOARD_INFO("wm8750", 0x1b), | ||
479 | }, | ||
480 | |||
481 | }; | ||
482 | |||
483 | static void __init z2_i2c_init(void) | ||
484 | { | ||
485 | pxa_set_i2c_info(NULL); | ||
486 | i2c_register_board_info(0, ARRAY_AND_SIZE(z2_i2c_board_info)); | ||
487 | } | ||
488 | #else | ||
489 | static inline void z2_i2c_init(void) {} | ||
490 | #endif | ||
491 | |||
492 | /****************************************************************************** | ||
455 | * SSP Devices - WiFi and LCD control | 493 | * SSP Devices - WiFi and LCD control |
456 | ******************************************************************************/ | 494 | ******************************************************************************/ |
457 | #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) | 495 | #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) |
@@ -573,23 +611,95 @@ static inline void z2_spi_init(void) {} | |||
573 | #endif | 611 | #endif |
574 | 612 | ||
575 | /****************************************************************************** | 613 | /****************************************************************************** |
614 | * Core power regulator | ||
615 | ******************************************************************************/ | ||
616 | #if defined(CONFIG_REGULATOR_TPS65023) || \ | ||
617 | defined(CONFIG_REGULATOR_TPS65023_MODULE) | ||
618 | static struct regulator_consumer_supply z2_tps65021_consumers[] = { | ||
619 | { | ||
620 | .supply = "vcc_core", | ||
621 | } | ||
622 | }; | ||
623 | |||
624 | static struct regulator_init_data z2_tps65021_info[] = { | ||
625 | { | ||
626 | .constraints = { | ||
627 | .name = "vcc_core range", | ||
628 | .min_uV = 800000, | ||
629 | .max_uV = 1600000, | ||
630 | .always_on = 1, | ||
631 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
632 | }, | ||
633 | .consumer_supplies = z2_tps65021_consumers, | ||
634 | .num_consumer_supplies = ARRAY_SIZE(z2_tps65021_consumers), | ||
635 | }, { | ||
636 | .constraints = { | ||
637 | .name = "DCDC2", | ||
638 | .min_uV = 3300000, | ||
639 | .max_uV = 3300000, | ||
640 | .always_on = 1, | ||
641 | }, | ||
642 | }, { | ||
643 | .constraints = { | ||
644 | .name = "DCDC3", | ||
645 | .min_uV = 1800000, | ||
646 | .max_uV = 1800000, | ||
647 | .always_on = 1, | ||
648 | }, | ||
649 | }, { | ||
650 | .constraints = { | ||
651 | .name = "LDO1", | ||
652 | .min_uV = 1000000, | ||
653 | .max_uV = 3150000, | ||
654 | .always_on = 1, | ||
655 | }, | ||
656 | }, { | ||
657 | .constraints = { | ||
658 | .name = "LDO2", | ||
659 | .min_uV = 1050000, | ||
660 | .max_uV = 3300000, | ||
661 | .always_on = 1, | ||
662 | }, | ||
663 | } | ||
664 | }; | ||
665 | |||
666 | static struct i2c_board_info __initdata z2_pi2c_board_info[] = { | ||
667 | { | ||
668 | I2C_BOARD_INFO("tps65021", 0x48), | ||
669 | .platform_data = &z2_tps65021_info, | ||
670 | }, | ||
671 | }; | ||
672 | |||
673 | static void __init z2_pmic_init(void) | ||
674 | { | ||
675 | pxa27x_set_i2c_power_info(NULL); | ||
676 | i2c_register_board_info(1, ARRAY_AND_SIZE(z2_pi2c_board_info)); | ||
677 | } | ||
678 | #else | ||
679 | static inline void z2_pmic_init(void) {} | ||
680 | #endif | ||
681 | |||
682 | /****************************************************************************** | ||
576 | * Machine init | 683 | * Machine init |
577 | ******************************************************************************/ | 684 | ******************************************************************************/ |
578 | static void __init z2_init(void) | 685 | static void __init z2_init(void) |
579 | { | 686 | { |
580 | pxa2xx_mfp_config(ARRAY_AND_SIZE(z2_pin_config)); | 687 | pxa2xx_mfp_config(ARRAY_AND_SIZE(z2_pin_config)); |
581 | 688 | ||
689 | pxa_set_ffuart_info(NULL); | ||
690 | pxa_set_btuart_info(NULL); | ||
691 | pxa_set_stuart_info(NULL); | ||
692 | |||
582 | z2_lcd_init(); | 693 | z2_lcd_init(); |
583 | z2_mmc_init(); | 694 | z2_mmc_init(); |
584 | z2_mkp_init(); | 695 | z2_mkp_init(); |
585 | 696 | z2_i2c_init(); | |
586 | pxa_set_i2c_info(NULL); | ||
587 | |||
588 | z2_spi_init(); | 697 | z2_spi_init(); |
589 | z2_nor_init(); | 698 | z2_nor_init(); |
590 | z2_pwm_init(); | 699 | z2_pwm_init(); |
591 | z2_leds_init(); | 700 | z2_leds_init(); |
592 | z2_keys_init(); | 701 | z2_keys_init(); |
702 | z2_pmic_init(); | ||
593 | } | 703 | } |
594 | 704 | ||
595 | MACHINE_START(ZIPIT2, "Zipit Z2") | 705 | MACHINE_START(ZIPIT2, "Zipit Z2") |
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index f5a59727949f..071e8a1e0765 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig | |||
@@ -57,11 +57,21 @@ config S3C64XX_SETUP_I2C1 | |||
57 | help | 57 | help |
58 | Common setup code for i2c bus 1. | 58 | Common setup code for i2c bus 1. |
59 | 59 | ||
60 | config S3C64XX_SETUP_IDE | ||
61 | bool | ||
62 | help | ||
63 | Common setup code for S3C64XX IDE. | ||
64 | |||
60 | config S3C64XX_SETUP_FB_24BPP | 65 | config S3C64XX_SETUP_FB_24BPP |
61 | bool | 66 | bool |
62 | help | 67 | help |
63 | Common setup code for S3C64XX with an 24bpp RGB display helper. | 68 | Common setup code for S3C64XX with an 24bpp RGB display helper. |
64 | 69 | ||
70 | config S3C64XX_SETUP_KEYPAD | ||
71 | bool | ||
72 | help | ||
73 | Common setup code for S3C64XX KEYPAD GPIO configurations | ||
74 | |||
65 | config S3C64XX_SETUP_SDHCI_GPIO | 75 | config S3C64XX_SETUP_SDHCI_GPIO |
66 | bool | 76 | bool |
67 | help | 77 | help |
@@ -95,15 +105,20 @@ config MACH_SMDK6410 | |||
95 | select S3C_DEV_HSMMC | 105 | select S3C_DEV_HSMMC |
96 | select S3C_DEV_HSMMC1 | 106 | select S3C_DEV_HSMMC1 |
97 | select S3C_DEV_I2C1 | 107 | select S3C_DEV_I2C1 |
108 | select SAMSUNG_DEV_IDE | ||
98 | select S3C_DEV_FB | 109 | select S3C_DEV_FB |
110 | select S3C_DEV_RTC | ||
99 | select SAMSUNG_DEV_TS | 111 | select SAMSUNG_DEV_TS |
100 | select S3C_DEV_USB_HOST | 112 | select S3C_DEV_USB_HOST |
101 | select S3C_DEV_USB_HSOTG | 113 | select S3C_DEV_USB_HSOTG |
102 | select S3C_DEV_WDT | 114 | select S3C_DEV_WDT |
115 | select SAMSUNG_DEV_KEYPAD | ||
103 | select HAVE_S3C2410_WATCHDOG | 116 | select HAVE_S3C2410_WATCHDOG |
104 | select S3C64XX_SETUP_SDHCI | 117 | select S3C64XX_SETUP_SDHCI |
105 | select S3C64XX_SETUP_I2C1 | 118 | select S3C64XX_SETUP_I2C1 |
119 | select S3C64XX_SETUP_IDE | ||
106 | select S3C64XX_SETUP_FB_24BPP | 120 | select S3C64XX_SETUP_FB_24BPP |
121 | select S3C64XX_SETUP_KEYPAD | ||
107 | help | 122 | help |
108 | Machine support for the Samsung SMDK6410 | 123 | Machine support for the Samsung SMDK6410 |
109 | 124 | ||
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index 9d1006938f5c..48d3dfac8dd7 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile | |||
@@ -35,6 +35,8 @@ obj-$(CONFIG_S3C64XX_DMA) += dma.o | |||
35 | 35 | ||
36 | obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o | 36 | obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o |
37 | obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o | 37 | obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o |
38 | obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o | ||
39 | obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o | ||
38 | obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o | 40 | obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o |
39 | obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o | 41 | obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o |
40 | obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | 42 | obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o |
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index fbd85a9b7bbf..7e03f0ae2fc8 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c | |||
@@ -133,6 +133,12 @@ static struct clk init_clocks_disable[] = { | |||
133 | .id = -1, | 133 | .id = -1, |
134 | .parent = &clk_h, | 134 | .parent = &clk_h, |
135 | }, { | 135 | }, { |
136 | .name = "rtc", | ||
137 | .id = -1, | ||
138 | .parent = &clk_p, | ||
139 | .enable = s3c64xx_pclk_ctrl, | ||
140 | .ctrlbit = S3C_CLKCON_PCLK_RTC, | ||
141 | }, { | ||
136 | .name = "adc", | 142 | .name = "adc", |
137 | .id = -1, | 143 | .id = -1, |
138 | .parent = &clk_p, | 144 | .parent = &clk_p, |
@@ -165,6 +171,12 @@ static struct clk init_clocks_disable[] = { | |||
165 | .ctrlbit = S3C6410_CLKCON_PCLK_IIS2, | 171 | .ctrlbit = S3C6410_CLKCON_PCLK_IIS2, |
166 | }, { | 172 | }, { |
167 | #endif | 173 | #endif |
174 | .name = "keypad", | ||
175 | .id = -1, | ||
176 | .parent = &clk_p, | ||
177 | .enable = s3c64xx_pclk_ctrl, | ||
178 | .ctrlbit = S3C_CLKCON_PCLK_KEYPAD, | ||
179 | }, { | ||
168 | .name = "spi", | 180 | .name = "spi", |
169 | .id = 0, | 181 | .id = 0, |
170 | .parent = &clk_p, | 182 | .parent = &clk_p, |
@@ -295,12 +307,6 @@ static struct clk init_clocks[] = { | |||
295 | .enable = s3c64xx_pclk_ctrl, | 307 | .enable = s3c64xx_pclk_ctrl, |
296 | .ctrlbit = S3C_CLKCON_PCLK_UART3, | 308 | .ctrlbit = S3C_CLKCON_PCLK_UART3, |
297 | }, { | 309 | }, { |
298 | .name = "rtc", | ||
299 | .id = -1, | ||
300 | .parent = &clk_p, | ||
301 | .enable = s3c64xx_pclk_ctrl, | ||
302 | .ctrlbit = S3C_CLKCON_PCLK_RTC, | ||
303 | }, { | ||
304 | .name = "watchdog", | 310 | .name = "watchdog", |
305 | .id = -1, | 311 | .id = -1, |
306 | .parent = &clk_p, | 312 | .parent = &clk_p, |
@@ -310,6 +316,12 @@ static struct clk init_clocks[] = { | |||
310 | .id = -1, | 316 | .id = -1, |
311 | .parent = &clk_p, | 317 | .parent = &clk_p, |
312 | .ctrlbit = S3C_CLKCON_PCLK_AC97, | 318 | .ctrlbit = S3C_CLKCON_PCLK_AC97, |
319 | }, { | ||
320 | .name = "cfcon", | ||
321 | .id = -1, | ||
322 | .parent = &clk_h, | ||
323 | .enable = s3c64xx_hclk_ctrl, | ||
324 | .ctrlbit = S3C_CLKCON_HCLK_IHOST, | ||
313 | } | 325 | } |
314 | }; | 326 | }; |
315 | 327 | ||
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index c3e9e73bd0f9..9648fbc36eec 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c | |||
@@ -12,11 +12,11 @@ | |||
12 | #include <linux/string.h> | 12 | #include <linux/string.h> |
13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
14 | #include <linux/dma-mapping.h> | 14 | #include <linux/dma-mapping.h> |
15 | #include <linux/gpio.h> | ||
15 | 16 | ||
16 | #include <mach/irqs.h> | 17 | #include <mach/irqs.h> |
17 | #include <mach/map.h> | 18 | #include <mach/map.h> |
18 | #include <mach/dma.h> | 19 | #include <mach/dma.h> |
19 | #include <mach/gpio.h> | ||
20 | 20 | ||
21 | #include <plat/devs.h> | 21 | #include <plat/devs.h> |
22 | #include <plat/audio.h> | 22 | #include <plat/audio.h> |
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c index 29c32d088515..a492b982aa06 100644 --- a/arch/arm/mach-s3c64xx/dev-spi.c +++ b/arch/arm/mach-s3c64xx/dev-spi.c | |||
@@ -12,10 +12,10 @@ | |||
12 | #include <linux/string.h> | 12 | #include <linux/string.h> |
13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
14 | #include <linux/dma-mapping.h> | 14 | #include <linux/dma-mapping.h> |
15 | #include <linux/gpio.h> | ||
15 | 16 | ||
16 | #include <mach/dma.h> | 17 | #include <mach/dma.h> |
17 | #include <mach/map.h> | 18 | #include <mach/map.h> |
18 | #include <mach/gpio.h> | ||
19 | #include <mach/gpio-bank-c.h> | 19 | #include <mach/gpio-bank-c.h> |
20 | #include <mach/spi-clocks.h> | 20 | #include <mach/spi-clocks.h> |
21 | 21 | ||
diff --git a/arch/arm/mach-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c index 60c929a3cab6..300dee4a667b 100644 --- a/arch/arm/mach-s3c64xx/gpiolib.c +++ b/arch/arm/mach-s3c64xx/gpiolib.c | |||
@@ -15,9 +15,9 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/irq.h> | 16 | #include <linux/irq.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | #include <linux/gpio.h> | ||
18 | 19 | ||
19 | #include <mach/map.h> | 20 | #include <mach/map.h> |
20 | #include <mach/gpio.h> | ||
21 | 21 | ||
22 | #include <plat/gpio-core.h> | 22 | #include <plat/gpio-core.h> |
23 | #include <plat/gpio-cfg.h> | 23 | #include <plat/gpio-cfg.h> |
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h index e1eab3c94aea..a1f13f02c841 100644 --- a/arch/arm/mach-s3c64xx/include/mach/map.h +++ b/arch/arm/mach-s3c64xx/include/mach/map.h | |||
@@ -67,6 +67,7 @@ | |||
67 | #define S3C64XX_PA_USB_HSOTG (0x7C000000) | 67 | #define S3C64XX_PA_USB_HSOTG (0x7C000000) |
68 | #define S3C64XX_PA_WATCHDOG (0x7E004000) | 68 | #define S3C64XX_PA_WATCHDOG (0x7E004000) |
69 | #define S3C64XX_PA_RTC (0x7E005000) | 69 | #define S3C64XX_PA_RTC (0x7E005000) |
70 | #define S3C64XX_PA_KEYPAD (0x7E00A000) | ||
70 | #define S3C64XX_PA_ADC (0x7E00B000) | 71 | #define S3C64XX_PA_ADC (0x7E00B000) |
71 | #define S3C64XX_PA_SYSCON (0x7E00F000) | 72 | #define S3C64XX_PA_SYSCON (0x7E00F000) |
72 | #define S3C64XX_PA_AC97 (0x7F001000) | 73 | #define S3C64XX_PA_AC97 (0x7F001000) |
@@ -86,6 +87,9 @@ | |||
86 | #define S3C64XX_SZ_GPIO SZ_4K | 87 | #define S3C64XX_SZ_GPIO SZ_4K |
87 | 88 | ||
88 | #define S3C64XX_PA_SDRAM (0x50000000) | 89 | #define S3C64XX_PA_SDRAM (0x50000000) |
90 | |||
91 | #define S3C64XX_PA_CFCON (0x70300000) | ||
92 | |||
89 | #define S3C64XX_PA_VIC0 (0x71200000) | 93 | #define S3C64XX_PA_VIC0 (0x71200000) |
90 | #define S3C64XX_PA_VIC1 (0x71300000) | 94 | #define S3C64XX_PA_VIC1 (0x71300000) |
91 | 95 | ||
@@ -120,5 +124,7 @@ | |||
120 | #define S3C_PA_WDT S3C64XX_PA_WATCHDOG | 124 | #define S3C_PA_WDT S3C64XX_PA_WATCHDOG |
121 | 125 | ||
122 | #define SAMSUNG_PA_ADC S3C64XX_PA_ADC | 126 | #define SAMSUNG_PA_ADC S3C64XX_PA_ADC |
127 | #define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON | ||
128 | #define SAMSUNG_PA_KEYPAD S3C64XX_PA_KEYPAD | ||
123 | 129 | ||
124 | #endif /* __ASM_ARCH_6400_MAP_H */ | 130 | #endif /* __ASM_ARCH_6400_MAP_H */ |
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h index 0114eb0c1fe7..05332b998ec0 100644 --- a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h | |||
@@ -34,6 +34,7 @@ | |||
34 | #define S3C_SCLK_GATE S3C_CLKREG(0x38) | 34 | #define S3C_SCLK_GATE S3C_CLKREG(0x38) |
35 | #define S3C_MEM0_GATE S3C_CLKREG(0x3C) | 35 | #define S3C_MEM0_GATE S3C_CLKREG(0x3C) |
36 | #define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C) | 36 | #define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C) |
37 | #define S3C_MEM_SYS_CFG S3C_CLKREG(0x120) | ||
37 | 38 | ||
38 | /* CLKDIV0 */ | 39 | /* CLKDIV0 */ |
39 | #define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12) | 40 | #define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12) |
@@ -154,4 +155,8 @@ | |||
154 | #define S3C6400_CLKSRC_EPLL_MOUT_SHIFT (2) | 155 | #define S3C6400_CLKSRC_EPLL_MOUT_SHIFT (2) |
155 | #define S3C6400_CLKSRC_MFC (1 << 4) | 156 | #define S3C6400_CLKSRC_MFC (1 << 4) |
156 | 157 | ||
158 | /* MEM_SYS_CFG */ | ||
159 | #define MEM_SYS_CFG_INDEP_CF 0x4000 | ||
160 | #define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30 | ||
161 | |||
157 | #endif /* _PLAT_REGS_CLOCK_H */ | 162 | #endif /* _PLAT_REGS_CLOCK_H */ |
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index d9a03555f88b..b5d78616c774 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/list.h> | 17 | #include <linux/list.h> |
18 | #include <linux/timer.h> | 18 | #include <linux/timer.h> |
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/input.h> | ||
20 | #include <linux/serial_core.h> | 21 | #include <linux/serial_core.h> |
21 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
22 | #include <linux/io.h> | 23 | #include <linux/io.h> |
@@ -56,6 +57,7 @@ | |||
56 | #include <mach/regs-gpio.h> | 57 | #include <mach/regs-gpio.h> |
57 | #include <mach/regs-sys.h> | 58 | #include <mach/regs-sys.h> |
58 | #include <mach/regs-srom.h> | 59 | #include <mach/regs-srom.h> |
60 | #include <plat/ata.h> | ||
59 | #include <plat/iic.h> | 61 | #include <plat/iic.h> |
60 | #include <plat/fb.h> | 62 | #include <plat/fb.h> |
61 | #include <plat/gpio-cfg.h> | 63 | #include <plat/gpio-cfg.h> |
@@ -66,6 +68,7 @@ | |||
66 | #include <plat/cpu.h> | 68 | #include <plat/cpu.h> |
67 | #include <plat/adc.h> | 69 | #include <plat/adc.h> |
68 | #include <plat/ts.h> | 70 | #include <plat/ts.h> |
71 | #include <plat/keypad.h> | ||
69 | 72 | ||
70 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | 73 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK |
71 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 74 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
@@ -242,6 +245,29 @@ static struct platform_device smdk6410_b_pwr_5v = { | |||
242 | }; | 245 | }; |
243 | #endif | 246 | #endif |
244 | 247 | ||
248 | static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = { | ||
249 | .setup_gpio = s3c64xx_ide_setup_gpio, | ||
250 | }; | ||
251 | |||
252 | static uint32_t smdk6410_keymap[] __initdata = { | ||
253 | /* KEY(row, col, keycode) */ | ||
254 | KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3), | ||
255 | KEY(0, 6, KEY_4), KEY(0, 7, KEY_5), | ||
256 | KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C), | ||
257 | KEY(1, 6, KEY_D), KEY(1, 7, KEY_E) | ||
258 | }; | ||
259 | |||
260 | static struct matrix_keymap_data smdk6410_keymap_data __initdata = { | ||
261 | .keymap = smdk6410_keymap, | ||
262 | .keymap_size = ARRAY_SIZE(smdk6410_keymap), | ||
263 | }; | ||
264 | |||
265 | static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = { | ||
266 | .keymap_data = &smdk6410_keymap_data, | ||
267 | .rows = 2, | ||
268 | .cols = 8, | ||
269 | }; | ||
270 | |||
245 | static struct map_desc smdk6410_iodesc[] = {}; | 271 | static struct map_desc smdk6410_iodesc[] = {}; |
246 | 272 | ||
247 | static struct platform_device *smdk6410_devices[] __initdata = { | 273 | static struct platform_device *smdk6410_devices[] __initdata = { |
@@ -257,6 +283,7 @@ static struct platform_device *smdk6410_devices[] __initdata = { | |||
257 | &s3c_device_ohci, | 283 | &s3c_device_ohci, |
258 | &s3c_device_usb_hsotg, | 284 | &s3c_device_usb_hsotg, |
259 | &s3c64xx_device_iisv4, | 285 | &s3c64xx_device_iisv4, |
286 | &samsung_device_keypad, | ||
260 | 287 | ||
261 | #ifdef CONFIG_REGULATOR | 288 | #ifdef CONFIG_REGULATOR |
262 | &smdk6410_b_pwr_5v, | 289 | &smdk6410_b_pwr_5v, |
@@ -265,6 +292,8 @@ static struct platform_device *smdk6410_devices[] __initdata = { | |||
265 | 292 | ||
266 | &smdk6410_smsc911x, | 293 | &smdk6410_smsc911x, |
267 | &s3c_device_adc, | 294 | &s3c_device_adc, |
295 | &s3c_device_cfcon, | ||
296 | &s3c_device_rtc, | ||
268 | &s3c_device_ts, | 297 | &s3c_device_ts, |
269 | &s3c_device_wdt, | 298 | &s3c_device_wdt, |
270 | }; | 299 | }; |
@@ -636,6 +665,8 @@ static void __init smdk6410_machine_init(void) | |||
636 | s3c_i2c1_set_platdata(NULL); | 665 | s3c_i2c1_set_platdata(NULL); |
637 | s3c_fb_set_platdata(&smdk6410_lcd_pdata); | 666 | s3c_fb_set_platdata(&smdk6410_lcd_pdata); |
638 | 667 | ||
668 | samsung_keypad_set_platdata(&smdk6410_keypad_data); | ||
669 | |||
639 | s3c24xx_ts_set_platdata(&s3c_ts_platform); | 670 | s3c24xx_ts_set_platdata(&s3c_ts_platform); |
640 | 671 | ||
641 | /* configure nCS1 width to 16 bits */ | 672 | /* configure nCS1 width to 16 bits */ |
@@ -665,6 +696,8 @@ static void __init smdk6410_machine_init(void) | |||
665 | i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); | 696 | i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); |
666 | i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); | 697 | i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); |
667 | 698 | ||
699 | s3c_ide_set_platdata(&smdk6410_ide_pdata); | ||
700 | |||
668 | platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices)); | 701 | platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices)); |
669 | } | 702 | } |
670 | 703 | ||
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c index 014401c39f36..312aa6b115e8 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c | |||
@@ -37,8 +37,9 @@ | |||
37 | #include <plat/devs.h> | 37 | #include <plat/devs.h> |
38 | #include <plat/clock.h> | 38 | #include <plat/clock.h> |
39 | #include <plat/sdhci.h> | 39 | #include <plat/sdhci.h> |
40 | #include <plat/ata-core.h> | ||
41 | #include <plat/adc-core.h> | ||
40 | #include <plat/iic-core.h> | 42 | #include <plat/iic-core.h> |
41 | #include <plat/adc.h> | ||
42 | #include <plat/onenand-core.h> | 43 | #include <plat/onenand-core.h> |
43 | #include <mach/s3c6400.h> | 44 | #include <mach/s3c6400.h> |
44 | #include <mach/s3c6410.h> | 45 | #include <mach/s3c6410.h> |
@@ -54,10 +55,11 @@ void __init s3c6410_map_io(void) | |||
54 | s3c_i2c0_setname("s3c2440-i2c"); | 55 | s3c_i2c0_setname("s3c2440-i2c"); |
55 | s3c_i2c1_setname("s3c2440-i2c"); | 56 | s3c_i2c1_setname("s3c2440-i2c"); |
56 | 57 | ||
57 | s3c_device_adc.name = "s3c64xx-adc"; | 58 | s3c_adc_setname("s3c64xx-adc"); |
58 | s3c_device_nand.name = "s3c6400-nand"; | 59 | s3c_device_nand.name = "s3c6400-nand"; |
59 | s3c_onenand_setname("s3c6410-onenand"); | 60 | s3c_onenand_setname("s3c6410-onenand"); |
60 | s3c64xx_onenand1_setname("s3c6410-onenand"); | 61 | s3c64xx_onenand1_setname("s3c6410-onenand"); |
62 | s3c_cfcon_setname("s3c64xx-pata"); | ||
61 | } | 63 | } |
62 | 64 | ||
63 | void __init s3c6410_init_clocks(int xtal) | 65 | void __init s3c6410_init_clocks(int xtal) |
diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c index 8e28e448dd20..000736877df2 100644 --- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c +++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c | |||
@@ -15,9 +15,9 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/types.h> | 16 | #include <linux/types.h> |
17 | #include <linux/fb.h> | 17 | #include <linux/fb.h> |
18 | #include <linux/gpio.h> | ||
18 | 19 | ||
19 | #include <mach/regs-fb.h> | 20 | #include <mach/regs-fb.h> |
20 | #include <mach/gpio.h> | ||
21 | #include <plat/fb.h> | 21 | #include <plat/fb.h> |
22 | #include <plat/gpio-cfg.h> | 22 | #include <plat/gpio-cfg.h> |
23 | 23 | ||
diff --git a/arch/arm/mach-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c64xx/setup-i2c0.c index d1b11e6e77e8..406192a43c6e 100644 --- a/arch/arm/mach-s3c64xx/setup-i2c0.c +++ b/arch/arm/mach-s3c64xx/setup-i2c0.c | |||
@@ -14,10 +14,10 @@ | |||
14 | 14 | ||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/types.h> | 16 | #include <linux/types.h> |
17 | #include <linux/gpio.h> | ||
17 | 18 | ||
18 | struct platform_device; /* don't need the contents */ | 19 | struct platform_device; /* don't need the contents */ |
19 | 20 | ||
20 | #include <mach/gpio.h> | ||
21 | #include <mach/gpio-bank-b.h> | 21 | #include <mach/gpio-bank-b.h> |
22 | #include <plat/iic.h> | 22 | #include <plat/iic.h> |
23 | #include <plat/gpio-cfg.h> | 23 | #include <plat/gpio-cfg.h> |
diff --git a/arch/arm/mach-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c64xx/setup-i2c1.c index 2dce57d8c6f8..1ee62c97cd7f 100644 --- a/arch/arm/mach-s3c64xx/setup-i2c1.c +++ b/arch/arm/mach-s3c64xx/setup-i2c1.c | |||
@@ -14,10 +14,10 @@ | |||
14 | 14 | ||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/types.h> | 16 | #include <linux/types.h> |
17 | #include <linux/gpio.h> | ||
17 | 18 | ||
18 | struct platform_device; /* don't need the contents */ | 19 | struct platform_device; /* don't need the contents */ |
19 | 20 | ||
20 | #include <mach/gpio.h> | ||
21 | #include <mach/gpio-bank-b.h> | 21 | #include <mach/gpio-bank-b.h> |
22 | #include <plat/iic.h> | 22 | #include <plat/iic.h> |
23 | #include <plat/gpio-cfg.h> | 23 | #include <plat/gpio-cfg.h> |
diff --git a/arch/arm/mach-s3c64xx/setup-ide.c b/arch/arm/mach-s3c64xx/setup-ide.c new file mode 100644 index 000000000000..c12c315f33bc --- /dev/null +++ b/arch/arm/mach-s3c64xx/setup-ide.c | |||
@@ -0,0 +1,46 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/setup-ide.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S3C64XX setup information for IDE | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/gpio.h> | ||
15 | #include <linux/io.h> | ||
16 | |||
17 | #include <mach/map.h> | ||
18 | #include <mach/regs-clock.h> | ||
19 | #include <plat/gpio-cfg.h> | ||
20 | |||
21 | void s3c64xx_ide_setup_gpio(void) | ||
22 | { | ||
23 | u32 reg; | ||
24 | u32 gpio = 0; | ||
25 | |||
26 | reg = readl(S3C_MEM_SYS_CFG) & (~0x3f); | ||
27 | |||
28 | /* Independent CF interface, CF chip select configuration */ | ||
29 | writel(reg | MEM_SYS_CFG_INDEP_CF | | ||
30 | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S3C_MEM_SYS_CFG); | ||
31 | |||
32 | s3c_gpio_cfgpin(S3C64XX_GPB(4), S3C_GPIO_SFN(4)); | ||
33 | |||
34 | /* Set XhiDATA[15:0] pins as CF Data[15:0] */ | ||
35 | for (gpio = S3C64XX_GPK(0); gpio <= S3C64XX_GPK(15); gpio++) | ||
36 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(5)); | ||
37 | |||
38 | /* Set XhiADDR[2:0] pins as CF ADDR[2:0] */ | ||
39 | for (gpio = S3C64XX_GPL(0); gpio <= S3C64XX_GPL(2); gpio++) | ||
40 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6)); | ||
41 | |||
42 | /* Set Xhi ctrl pins as CF ctrl pins(IORDY, IOWR, IORD, CE[0:1]) */ | ||
43 | s3c_gpio_cfgpin(S3C64XX_GPM(5), S3C_GPIO_SFN(1)); | ||
44 | for (gpio = S3C64XX_GPM(0); gpio <= S3C64XX_GPM(4); gpio++) | ||
45 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6)); | ||
46 | } | ||
diff --git a/arch/arm/mach-s3c64xx/setup-keypad.c b/arch/arm/mach-s3c64xx/setup-keypad.c new file mode 100644 index 000000000000..abc34e4e1a93 --- /dev/null +++ b/arch/arm/mach-s3c64xx/setup-keypad.c | |||
@@ -0,0 +1,34 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/setup-keypad.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * GPIO configuration for S3C64XX KeyPad device | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/gpio.h> | ||
14 | #include <plat/gpio-cfg.h> | ||
15 | |||
16 | void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) | ||
17 | { | ||
18 | unsigned int gpio; | ||
19 | unsigned int end; | ||
20 | |||
21 | /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */ | ||
22 | end = S3C64XX_GPK(8 + rows); | ||
23 | for (gpio = S3C64XX_GPK(8); gpio < end; gpio++) { | ||
24 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
25 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
26 | } | ||
27 | |||
28 | /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */ | ||
29 | end = S3C64XX_GPL(0 + cols); | ||
30 | for (gpio = S3C64XX_GPL(0); gpio < end; gpio++) { | ||
31 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
32 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
33 | } | ||
34 | } | ||
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c index a58c0cc7ba5e..322359591374 100644 --- a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c | |||
@@ -16,12 +16,14 @@ | |||
16 | #include <linux/interrupt.h> | 16 | #include <linux/interrupt.h> |
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | #include <linux/gpio.h> | ||
19 | 20 | ||
20 | #include <mach/gpio.h> | ||
21 | #include <plat/gpio-cfg.h> | 21 | #include <plat/gpio-cfg.h> |
22 | #include <plat/sdhci.h> | ||
22 | 23 | ||
23 | void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | 24 | void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) |
24 | { | 25 | { |
26 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | ||
25 | unsigned int gpio; | 27 | unsigned int gpio; |
26 | unsigned int end; | 28 | unsigned int end; |
27 | 29 | ||
@@ -33,12 +35,15 @@ void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | |||
33 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | 35 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); |
34 | } | 36 | } |
35 | 37 | ||
36 | s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); | 38 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { |
37 | s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2)); | 39 | s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); |
40 | s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2)); | ||
41 | } | ||
38 | } | 42 | } |
39 | 43 | ||
40 | void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | 44 | void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) |
41 | { | 45 | { |
46 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | ||
42 | unsigned int gpio; | 47 | unsigned int gpio; |
43 | unsigned int end; | 48 | unsigned int end; |
44 | 49 | ||
@@ -50,8 +55,10 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | |||
50 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | 55 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); |
51 | } | 56 | } |
52 | 57 | ||
53 | s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); | 58 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { |
54 | s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); | 59 | s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); |
60 | s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); | ||
61 | } | ||
55 | } | 62 | } |
56 | 63 | ||
57 | void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) | 64 | void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) |
diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig index f066fae07c57..6a4af7f57584 100644 --- a/arch/arm/mach-s5p6440/Kconfig +++ b/arch/arm/mach-s5p6440/Kconfig | |||
@@ -13,13 +13,20 @@ config CPU_S5P6440 | |||
13 | help | 13 | help |
14 | Enable S5P6440 CPU support | 14 | Enable S5P6440 CPU support |
15 | 15 | ||
16 | config S5P6440_SETUP_I2C1 | ||
17 | bool | ||
18 | help | ||
19 | Common setup code for i2c bus 1. | ||
20 | |||
16 | config MACH_SMDK6440 | 21 | config MACH_SMDK6440 |
17 | bool "SMDK6440" | 22 | bool "SMDK6440" |
18 | select CPU_S5P6440 | 23 | select CPU_S5P6440 |
19 | select SAMSUNG_DEV_TS | 24 | select S3C_DEV_I2C1 |
20 | select SAMSUNG_DEV_ADC | 25 | select S3C_DEV_RTC |
21 | select S3C_DEV_WDT | 26 | select S3C_DEV_WDT |
22 | select HAVE_S3C2410_WATCHDOG | 27 | select SAMSUNG_DEV_ADC |
28 | select SAMSUNG_DEV_TS | ||
29 | select S5P6440_SETUP_I2C1 | ||
23 | help | 30 | help |
24 | Machine support for the Samsung SMDK6440 | 31 | Machine support for the Samsung SMDK6440 |
25 | 32 | ||
diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile index be3c53aab23f..c3fe4d3662a9 100644 --- a/arch/arm/mach-s5p6440/Makefile +++ b/arch/arm/mach-s5p6440/Makefile | |||
@@ -22,3 +22,4 @@ obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o | |||
22 | # device support | 22 | # device support |
23 | obj-y += dev-audio.o | 23 | obj-y += dev-audio.o |
24 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | 24 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o |
25 | obj-$(CONFIG_S5P6440_SETUP_I2C1) += setup-i2c1.o | ||
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c index b2fe6a58155a..526f33adb31d 100644 --- a/arch/arm/mach-s5p6440/cpu.c +++ b/arch/arm/mach-s5p6440/cpu.c | |||
@@ -37,6 +37,7 @@ | |||
37 | #include <plat/devs.h> | 37 | #include <plat/devs.h> |
38 | #include <plat/clock.h> | 38 | #include <plat/clock.h> |
39 | #include <plat/s5p6440.h> | 39 | #include <plat/s5p6440.h> |
40 | #include <plat/adc-core.h> | ||
40 | 41 | ||
41 | static void s5p6440_idle(void) | 42 | static void s5p6440_idle(void) |
42 | { | 43 | { |
@@ -61,7 +62,7 @@ static void s5p6440_idle(void) | |||
61 | void __init s5p6440_map_io(void) | 62 | void __init s5p6440_map_io(void) |
62 | { | 63 | { |
63 | /* initialize any device information early */ | 64 | /* initialize any device information early */ |
64 | s3c_device_adc.name = "s3c64xx-adc"; | 65 | s3c_adc_setname("s3c64xx-adc"); |
65 | } | 66 | } |
66 | 67 | ||
67 | void __init s5p6440_init_clocks(int xtal) | 68 | void __init s5p6440_init_clocks(int xtal) |
diff --git a/arch/arm/mach-s5p6440/dev-audio.c b/arch/arm/mach-s5p6440/dev-audio.c index 0c5367962830..3ca0d2b8275d 100644 --- a/arch/arm/mach-s5p6440/dev-audio.c +++ b/arch/arm/mach-s5p6440/dev-audio.c | |||
@@ -10,11 +10,11 @@ | |||
10 | 10 | ||
11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
12 | #include <linux/dma-mapping.h> | 12 | #include <linux/dma-mapping.h> |
13 | #include <linux/gpio.h> | ||
13 | 14 | ||
14 | #include <plat/gpio-cfg.h> | 15 | #include <plat/gpio-cfg.h> |
15 | #include <plat/audio.h> | 16 | #include <plat/audio.h> |
16 | 17 | ||
17 | #include <mach/gpio.h> | ||
18 | #include <mach/map.h> | 18 | #include <mach/map.h> |
19 | #include <mach/dma.h> | 19 | #include <mach/dma.h> |
20 | #include <mach/irqs.h> | 20 | #include <mach/irqs.h> |
diff --git a/arch/arm/mach-s5p6440/dev-spi.c b/arch/arm/mach-s5p6440/dev-spi.c index 0a30280019c0..510af44d180c 100644 --- a/arch/arm/mach-s5p6440/dev-spi.c +++ b/arch/arm/mach-s5p6440/dev-spi.c | |||
@@ -10,11 +10,11 @@ | |||
10 | 10 | ||
11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
12 | #include <linux/dma-mapping.h> | 12 | #include <linux/dma-mapping.h> |
13 | #include <linux/gpio.h> | ||
13 | 14 | ||
14 | #include <mach/dma.h> | 15 | #include <mach/dma.h> |
15 | #include <mach/map.h> | 16 | #include <mach/map.h> |
16 | #include <mach/irqs.h> | 17 | #include <mach/irqs.h> |
17 | #include <mach/gpio.h> | ||
18 | #include <mach/spi-clocks.h> | 18 | #include <mach/spi-clocks.h> |
19 | 19 | ||
20 | #include <plat/s3c64xx-spi.h> | 20 | #include <plat/s3c64xx-spi.h> |
diff --git a/arch/arm/mach-s5p6440/gpio.c b/arch/arm/mach-s5p6440/gpio.c index 92efc05b1ba2..8bf6e0ce51c9 100644 --- a/arch/arm/mach-s5p6440/gpio.c +++ b/arch/arm/mach-s5p6440/gpio.c | |||
@@ -13,9 +13,11 @@ | |||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/irq.h> | 14 | #include <linux/irq.h> |
15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
16 | #include <linux/gpio.h> | ||
17 | |||
16 | #include <mach/map.h> | 18 | #include <mach/map.h> |
17 | #include <mach/gpio.h> | ||
18 | #include <mach/regs-gpio.h> | 19 | #include <mach/regs-gpio.h> |
20 | |||
19 | #include <plat/gpio-core.h> | 21 | #include <plat/gpio-core.h> |
20 | #include <plat/gpio-cfg.h> | 22 | #include <plat/gpio-cfg.h> |
21 | #include <plat/gpio-cfg-helpers.h> | 23 | #include <plat/gpio-cfg-helpers.h> |
diff --git a/arch/arm/mach-s5p6440/include/mach/irqs.h b/arch/arm/mach-s5p6440/include/mach/irqs.h index 911854d9ad42..16a761270de1 100644 --- a/arch/arm/mach-s5p6440/include/mach/irqs.h +++ b/arch/arm/mach-s5p6440/include/mach/irqs.h | |||
@@ -51,7 +51,7 @@ | |||
51 | #define IRQ_DISPCON3 S5P_IRQ_VIC1(19) | 51 | #define IRQ_DISPCON3 S5P_IRQ_VIC1(19) |
52 | #define IRQ_FIMGVG S5P_IRQ_VIC1(20) | 52 | #define IRQ_FIMGVG S5P_IRQ_VIC1(20) |
53 | #define IRQ_EINT_GROUPS S5P_IRQ_VIC1(21) | 53 | #define IRQ_EINT_GROUPS S5P_IRQ_VIC1(21) |
54 | #define IRQ_PMUIRQ S5P_IRQ_VIC1(23) | 54 | #define IRQ_PMU S5P_IRQ_VIC1(23) |
55 | #define IRQ_HSMMC0 S5P_IRQ_VIC1(24) | 55 | #define IRQ_HSMMC0 S5P_IRQ_VIC1(24) |
56 | #define IRQ_HSMMC1 S5P_IRQ_VIC1(25) | 56 | #define IRQ_HSMMC1 S5P_IRQ_VIC1(25) |
57 | #define IRQ_HSMMC2 IRQ_SPI1 /* shared with SPI1 */ | 57 | #define IRQ_HSMMC2 IRQ_SPI1 /* shared with SPI1 */ |
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h index 44011b91fbd1..6cc5cbc88ffb 100644 --- a/arch/arm/mach-s5p6440/include/mach/map.h +++ b/arch/arm/mach-s5p6440/include/mach/map.h | |||
@@ -38,7 +38,6 @@ | |||
38 | #define S5P_PA_TIMER S5P6440_PA_TIMER | 38 | #define S5P_PA_TIMER S5P6440_PA_TIMER |
39 | 39 | ||
40 | #define S5P6440_PA_RTC (0xEA100000) | 40 | #define S5P6440_PA_RTC (0xEA100000) |
41 | #define S5P_PA_RTC S5P6440_PA_RTC | ||
42 | 41 | ||
43 | #define S5P6440_PA_WDT (0xEA200000) | 42 | #define S5P6440_PA_WDT (0xEA200000) |
44 | #define S5P_PA_WDT S5P6440_PA_WDT | 43 | #define S5P_PA_WDT S5P6440_PA_WDT |
@@ -53,6 +52,7 @@ | |||
53 | #define S5P_SZ_UART SZ_256 | 52 | #define S5P_SZ_UART SZ_256 |
54 | 53 | ||
55 | #define S5P6440_PA_IIC0 (0xEC104000) | 54 | #define S5P6440_PA_IIC0 (0xEC104000) |
55 | #define S5P6440_PA_IIC1 (0xEC20F000) | ||
56 | 56 | ||
57 | #define S5P6440_PA_SPI0 0xEC400000 | 57 | #define S5P6440_PA_SPI0 0xEC400000 |
58 | #define S5P6440_PA_SPI1 0xEC500000 | 58 | #define S5P6440_PA_SPI1 0xEC500000 |
@@ -77,6 +77,8 @@ | |||
77 | /* compatibiltiy defines. */ | 77 | /* compatibiltiy defines. */ |
78 | #define S3C_PA_UART S5P6440_PA_UART | 78 | #define S3C_PA_UART S5P6440_PA_UART |
79 | #define S3C_PA_IIC S5P6440_PA_IIC0 | 79 | #define S3C_PA_IIC S5P6440_PA_IIC0 |
80 | #define S3C_PA_RTC S5P6440_PA_RTC | ||
81 | #define S3C_PA_IIC1 S5P6440_PA_IIC1 | ||
80 | #define S3C_PA_WDT S5P6440_PA_WDT | 82 | #define S3C_PA_WDT S5P6440_PA_WDT |
81 | 83 | ||
82 | #define SAMSUNG_PA_ADC S5P6440_PA_ADC | 84 | #define SAMSUNG_PA_ADC S5P6440_PA_ADC |
diff --git a/arch/arm/mach-s5p6440/include/mach/system.h b/arch/arm/mach-s5p6440/include/mach/system.h index d2dd817da66a..a359ee3fa510 100644 --- a/arch/arm/mach-s5p6440/include/mach/system.h +++ b/arch/arm/mach-s5p6440/include/mach/system.h | |||
@@ -13,12 +13,9 @@ | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | 13 | #ifndef __ASM_ARCH_SYSTEM_H |
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | 14 | #define __ASM_ARCH_SYSTEM_H __FILE__ |
15 | 15 | ||
16 | static void arch_idle(void) | 16 | #include <plat/system-reset.h> |
17 | { | ||
18 | /* nothing here yet */ | ||
19 | } | ||
20 | 17 | ||
21 | static void arch_reset(char mode, const char *cmd) | 18 | static void arch_idle(void) |
22 | { | 19 | { |
23 | /* nothing here yet */ | 20 | /* nothing here yet */ |
24 | } | 21 | } |
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p6440/mach-smdk6440.c index 8291fecc701a..9202aaac3b56 100644 --- a/arch/arm/mach-s5p6440/mach-smdk6440.c +++ b/arch/arm/mach-s5p6440/mach-smdk6440.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/timer.h> | 15 | #include <linux/timer.h> |
16 | #include <linux/delay.h> | 16 | #include <linux/delay.h> |
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/i2c.h> | ||
18 | #include <linux/serial_core.h> | 19 | #include <linux/serial_core.h> |
19 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
20 | #include <linux/io.h> | 21 | #include <linux/io.h> |
@@ -37,20 +38,21 @@ | |||
37 | #include <mach/regs-clock.h> | 38 | #include <mach/regs-clock.h> |
38 | #include <plat/devs.h> | 39 | #include <plat/devs.h> |
39 | #include <plat/cpu.h> | 40 | #include <plat/cpu.h> |
41 | #include <plat/iic.h> | ||
40 | #include <plat/pll.h> | 42 | #include <plat/pll.h> |
41 | #include <plat/adc.h> | 43 | #include <plat/adc.h> |
42 | #include <plat/ts.h> | 44 | #include <plat/ts.h> |
43 | 45 | ||
44 | #define S5P6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 46 | #define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
45 | S3C2410_UCON_RXILEVEL | \ | 47 | S3C2410_UCON_RXILEVEL | \ |
46 | S3C2410_UCON_TXIRQMODE | \ | 48 | S3C2410_UCON_TXIRQMODE | \ |
47 | S3C2410_UCON_RXIRQMODE | \ | 49 | S3C2410_UCON_RXIRQMODE | \ |
48 | S3C2410_UCON_RXFIFO_TOI | \ | 50 | S3C2410_UCON_RXFIFO_TOI | \ |
49 | S3C2443_UCON_RXERR_IRQEN) | 51 | S3C2443_UCON_RXERR_IRQEN) |
50 | 52 | ||
51 | #define S5P6440_ULCON_DEFAULT S3C2410_LCON_CS8 | 53 | #define SMDK6440_ULCON_DEFAULT S3C2410_LCON_CS8 |
52 | 54 | ||
53 | #define S5P6440_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | 55 | #define SMDK6440_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ |
54 | S3C2440_UFCON_TXTRIG16 | \ | 56 | S3C2440_UFCON_TXTRIG16 | \ |
55 | S3C2410_UFCON_RXTRIG8) | 57 | S3C2410_UFCON_RXTRIG8) |
56 | 58 | ||
@@ -58,40 +60,51 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = { | |||
58 | [0] = { | 60 | [0] = { |
59 | .hwport = 0, | 61 | .hwport = 0, |
60 | .flags = 0, | 62 | .flags = 0, |
61 | .ucon = S5P6440_UCON_DEFAULT, | 63 | .ucon = SMDK6440_UCON_DEFAULT, |
62 | .ulcon = S5P6440_ULCON_DEFAULT, | 64 | .ulcon = SMDK6440_ULCON_DEFAULT, |
63 | .ufcon = S5P6440_UFCON_DEFAULT, | 65 | .ufcon = SMDK6440_UFCON_DEFAULT, |
64 | }, | 66 | }, |
65 | [1] = { | 67 | [1] = { |
66 | .hwport = 1, | 68 | .hwport = 1, |
67 | .flags = 0, | 69 | .flags = 0, |
68 | .ucon = S5P6440_UCON_DEFAULT, | 70 | .ucon = SMDK6440_UCON_DEFAULT, |
69 | .ulcon = S5P6440_ULCON_DEFAULT, | 71 | .ulcon = SMDK6440_ULCON_DEFAULT, |
70 | .ufcon = S5P6440_UFCON_DEFAULT, | 72 | .ufcon = SMDK6440_UFCON_DEFAULT, |
71 | }, | 73 | }, |
72 | [2] = { | 74 | [2] = { |
73 | .hwport = 2, | 75 | .hwport = 2, |
74 | .flags = 0, | 76 | .flags = 0, |
75 | .ucon = S5P6440_UCON_DEFAULT, | 77 | .ucon = SMDK6440_UCON_DEFAULT, |
76 | .ulcon = S5P6440_ULCON_DEFAULT, | 78 | .ulcon = SMDK6440_ULCON_DEFAULT, |
77 | .ufcon = S5P6440_UFCON_DEFAULT, | 79 | .ufcon = SMDK6440_UFCON_DEFAULT, |
78 | }, | 80 | }, |
79 | [3] = { | 81 | [3] = { |
80 | .hwport = 3, | 82 | .hwport = 3, |
81 | .flags = 0, | 83 | .flags = 0, |
82 | .ucon = S5P6440_UCON_DEFAULT, | 84 | .ucon = SMDK6440_UCON_DEFAULT, |
83 | .ulcon = S5P6440_ULCON_DEFAULT, | 85 | .ulcon = SMDK6440_ULCON_DEFAULT, |
84 | .ufcon = S5P6440_UFCON_DEFAULT, | 86 | .ufcon = SMDK6440_UFCON_DEFAULT, |
85 | }, | 87 | }, |
86 | }; | 88 | }; |
87 | 89 | ||
88 | static struct platform_device *smdk6440_devices[] __initdata = { | 90 | static struct platform_device *smdk6440_devices[] __initdata = { |
89 | &s5p6440_device_iis, | 91 | &s5p6440_device_iis, |
90 | &s3c_device_adc, | 92 | &s3c_device_adc, |
93 | &s3c_device_rtc, | ||
94 | &s3c_device_i2c0, | ||
95 | &s3c_device_i2c1, | ||
91 | &s3c_device_ts, | 96 | &s3c_device_ts, |
92 | &s3c_device_wdt, | 97 | &s3c_device_wdt, |
93 | }; | 98 | }; |
94 | 99 | ||
100 | static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = { | ||
101 | { I2C_BOARD_INFO("24c08", 0x50), }, | ||
102 | }; | ||
103 | |||
104 | static struct i2c_board_info smdk6440_i2c_devs1[] __initdata = { | ||
105 | /* To be populated */ | ||
106 | }; | ||
107 | |||
95 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { | 108 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { |
96 | .delay = 10000, | 109 | .delay = 10000, |
97 | .presc = 49, | 110 | .presc = 49, |
@@ -109,6 +122,14 @@ static void __init smdk6440_machine_init(void) | |||
109 | { | 122 | { |
110 | s3c24xx_ts_set_platdata(&s3c_ts_platform); | 123 | s3c24xx_ts_set_platdata(&s3c_ts_platform); |
111 | 124 | ||
125 | /* I2C */ | ||
126 | s3c_i2c0_set_platdata(NULL); | ||
127 | s3c_i2c1_set_platdata(NULL); | ||
128 | i2c_register_board_info(0, smdk6440_i2c_devs0, | ||
129 | ARRAY_SIZE(smdk6440_i2c_devs0)); | ||
130 | i2c_register_board_info(1, smdk6440_i2c_devs1, | ||
131 | ARRAY_SIZE(smdk6440_i2c_devs1)); | ||
132 | |||
112 | platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); | 133 | platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); |
113 | } | 134 | } |
114 | 135 | ||
diff --git a/arch/arm/mach-s5p6440/setup-i2c0.c b/arch/arm/mach-s5p6440/setup-i2c0.c index 69e8a664aedb..2c99d14f7ac7 100644 --- a/arch/arm/mach-s5p6440/setup-i2c0.c +++ b/arch/arm/mach-s5p6440/setup-i2c0.c | |||
@@ -17,9 +17,14 @@ | |||
17 | 17 | ||
18 | struct platform_device; /* don't need the contents */ | 18 | struct platform_device; /* don't need the contents */ |
19 | 19 | ||
20 | #include <linux/gpio.h> | ||
21 | #include <plat/gpio-cfg.h> | ||
20 | #include <plat/iic.h> | 22 | #include <plat/iic.h> |
21 | 23 | ||
22 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) | 24 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) |
23 | { | 25 | { |
24 | /* Will be populated later */ | 26 | s3c_gpio_cfgpin(S5P6440_GPB(5), S3C_GPIO_SFN(2)); |
27 | s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP); | ||
28 | s3c_gpio_cfgpin(S5P6440_GPB(6), S3C_GPIO_SFN(2)); | ||
29 | s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP); | ||
25 | } | 30 | } |
diff --git a/arch/arm/mach-s5p6440/setup-i2c1.c b/arch/arm/mach-s5p6440/setup-i2c1.c new file mode 100644 index 000000000000..9a1537f786e0 --- /dev/null +++ b/arch/arm/mach-s5p6440/setup-i2c1.c | |||
@@ -0,0 +1,30 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/setup-i2c1.c | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * I2C1 GPIO configuration. | ||
7 | * | ||
8 | * Based on plat-s3c64xx/setup-i2c0.c | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/gpio.h> | ||
18 | |||
19 | struct platform_device; /* don't need the contents */ | ||
20 | |||
21 | #include <plat/gpio-cfg.h> | ||
22 | #include <plat/iic.h> | ||
23 | |||
24 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) | ||
25 | { | ||
26 | s3c_gpio_cfgpin(S5P6440_GPR(9), S3C_GPIO_SFN(6)); | ||
27 | s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP); | ||
28 | s3c_gpio_cfgpin(S5P6440_GPR(10), S3C_GPIO_SFN(6)); | ||
29 | s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP); | ||
30 | } | ||
diff --git a/arch/arm/mach-s5p6442/Kconfig b/arch/arm/mach-s5p6442/Kconfig index 0fd41b447915..0fda0a5df968 100644 --- a/arch/arm/mach-s5p6442/Kconfig +++ b/arch/arm/mach-s5p6442/Kconfig | |||
@@ -19,6 +19,7 @@ config CPU_S5P6442 | |||
19 | config MACH_SMDK6442 | 19 | config MACH_SMDK6442 |
20 | bool "SMDK6442" | 20 | bool "SMDK6442" |
21 | select CPU_S5P6442 | 21 | select CPU_S5P6442 |
22 | select S3C_DEV_WDT | ||
22 | help | 23 | help |
23 | Machine support for Samsung SMDK6442 | 24 | Machine support for Samsung SMDK6442 |
24 | 25 | ||
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c index 087e57f20ad5..dcd20f17212a 100644 --- a/arch/arm/mach-s5p6442/clock.c +++ b/arch/arm/mach-s5p6442/clock.c | |||
@@ -361,6 +361,12 @@ static struct clk init_clocks[] = { | |||
361 | .enable = s5p6442_clk_ip3_ctrl, | 361 | .enable = s5p6442_clk_ip3_ctrl, |
362 | .ctrlbit = (1<<19), | 362 | .ctrlbit = (1<<19), |
363 | }, { | 363 | }, { |
364 | .name = "watchdog", | ||
365 | .id = -1, | ||
366 | .parent = &clk_pclkd1, | ||
367 | .enable = s5p6442_clk_ip3_ctrl, | ||
368 | .ctrlbit = (1 << 22), | ||
369 | }, { | ||
364 | .name = "timers", | 370 | .name = "timers", |
365 | .id = -1, | 371 | .id = -1, |
366 | .parent = &clk_pclkd1, | 372 | .parent = &clk_pclkd1, |
diff --git a/arch/arm/mach-s5p6442/dev-audio.c b/arch/arm/mach-s5p6442/dev-audio.c index cb801e1f5e23..7a4e34720b7b 100644 --- a/arch/arm/mach-s5p6442/dev-audio.c +++ b/arch/arm/mach-s5p6442/dev-audio.c | |||
@@ -10,11 +10,11 @@ | |||
10 | 10 | ||
11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
12 | #include <linux/dma-mapping.h> | 12 | #include <linux/dma-mapping.h> |
13 | #include <linux/gpio.h> | ||
13 | 14 | ||
14 | #include <plat/gpio-cfg.h> | 15 | #include <plat/gpio-cfg.h> |
15 | #include <plat/audio.h> | 16 | #include <plat/audio.h> |
16 | 17 | ||
17 | #include <mach/gpio.h> | ||
18 | #include <mach/map.h> | 18 | #include <mach/map.h> |
19 | #include <mach/dma.h> | 19 | #include <mach/dma.h> |
20 | #include <mach/irqs.h> | 20 | #include <mach/irqs.h> |
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c index 30199525daca..e894651a88bd 100644 --- a/arch/arm/mach-s5p6442/dev-spi.c +++ b/arch/arm/mach-s5p6442/dev-spi.c | |||
@@ -10,11 +10,11 @@ | |||
10 | 10 | ||
11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
12 | #include <linux/dma-mapping.h> | 12 | #include <linux/dma-mapping.h> |
13 | #include <linux/gpio.h> | ||
13 | 14 | ||
14 | #include <mach/dma.h> | 15 | #include <mach/dma.h> |
15 | #include <mach/map.h> | 16 | #include <mach/map.h> |
16 | #include <mach/irqs.h> | 17 | #include <mach/irqs.h> |
17 | #include <mach/gpio.h> | ||
18 | #include <mach/spi-clocks.h> | 18 | #include <mach/spi-clocks.h> |
19 | 19 | ||
20 | #include <plat/s3c64xx-spi.h> | 20 | #include <plat/s3c64xx-spi.h> |
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h index 02c23749c023..3fbc6c3ad2da 100644 --- a/arch/arm/mach-s5p6442/include/mach/irqs.h +++ b/arch/arm/mach-s5p6442/include/mach/irqs.h | |||
@@ -32,7 +32,7 @@ | |||
32 | #define IRQ_GPIOINT S5P_IRQ_VIC0(30) | 32 | #define IRQ_GPIOINT S5P_IRQ_VIC0(30) |
33 | 33 | ||
34 | /* VIC1 */ | 34 | /* VIC1 */ |
35 | #define IRQ_nPMUIRQ S5P_IRQ_VIC1(0) | 35 | #define IRQ_PMU S5P_IRQ_VIC1(0) |
36 | #define IRQ_ONENAND S5P_IRQ_VIC1(7) | 36 | #define IRQ_ONENAND S5P_IRQ_VIC1(7) |
37 | #define IRQ_UART0 S5P_IRQ_VIC1(10) | 37 | #define IRQ_UART0 S5P_IRQ_VIC1(10) |
38 | #define IRQ_UART1 S5P_IRQ_VIC1(11) | 38 | #define IRQ_UART1 S5P_IRQ_VIC1(11) |
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h index 32ca424ef7f9..281d256faafb 100644 --- a/arch/arm/mach-s5p6442/include/mach/map.h +++ b/arch/arm/mach-s5p6442/include/mach/map.h | |||
@@ -42,6 +42,8 @@ | |||
42 | 42 | ||
43 | #define S5P6442_PA_SYSTIMER (0xEA100000) | 43 | #define S5P6442_PA_SYSTIMER (0xEA100000) |
44 | 44 | ||
45 | #define S5P6442_PA_WATCHDOG (0xEA200000) | ||
46 | |||
45 | #define S5P6442_PA_UART (0xEC000000) | 47 | #define S5P6442_PA_UART (0xEC000000) |
46 | 48 | ||
47 | #define S5P_PA_UART0 (S5P6442_PA_UART + 0x0) | 49 | #define S5P_PA_UART0 (S5P6442_PA_UART + 0x0) |
@@ -65,6 +67,7 @@ | |||
65 | #define S5P6442_PA_PCM1 0xF2500000 | 67 | #define S5P6442_PA_PCM1 0xF2500000 |
66 | 68 | ||
67 | /* compatibiltiy defines. */ | 69 | /* compatibiltiy defines. */ |
70 | #define S3C_PA_WDT S5P6442_PA_WATCHDOG | ||
68 | #define S3C_PA_UART S5P6442_PA_UART | 71 | #define S3C_PA_UART S5P6442_PA_UART |
69 | #define S3C_PA_IIC S5P6442_PA_IIC0 | 72 | #define S3C_PA_IIC S5P6442_PA_IIC0 |
70 | 73 | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/system.h b/arch/arm/mach-s5p6442/include/mach/system.h index 8bcd8ed0c3c3..c30c1cc1b97e 100644 --- a/arch/arm/mach-s5p6442/include/mach/system.h +++ b/arch/arm/mach-s5p6442/include/mach/system.h | |||
@@ -13,12 +13,9 @@ | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | 13 | #ifndef __ASM_ARCH_SYSTEM_H |
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | 14 | #define __ASM_ARCH_SYSTEM_H __FILE__ |
15 | 15 | ||
16 | static void arch_idle(void) | 16 | #include <plat/system-reset.h> |
17 | { | ||
18 | /* nothing here yet */ | ||
19 | } | ||
20 | 17 | ||
21 | static void arch_reset(char mode, const char *cmd) | 18 | static void arch_idle(void) |
22 | { | 19 | { |
23 | /* nothing here yet */ | 20 | /* nothing here yet */ |
24 | } | 21 | } |
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c index ebcf99777259..8d8d04272f85 100644 --- a/arch/arm/mach-s5p6442/mach-smdk6442.c +++ b/arch/arm/mach-s5p6442/mach-smdk6442.c | |||
@@ -27,16 +27,16 @@ | |||
27 | #include <plat/cpu.h> | 27 | #include <plat/cpu.h> |
28 | 28 | ||
29 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 29 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
30 | #define S5P6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 30 | #define SMDK6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
31 | S3C2410_UCON_RXILEVEL | \ | 31 | S3C2410_UCON_RXILEVEL | \ |
32 | S3C2410_UCON_TXIRQMODE | \ | 32 | S3C2410_UCON_TXIRQMODE | \ |
33 | S3C2410_UCON_RXIRQMODE | \ | 33 | S3C2410_UCON_RXIRQMODE | \ |
34 | S3C2410_UCON_RXFIFO_TOI | \ | 34 | S3C2410_UCON_RXFIFO_TOI | \ |
35 | S3C2443_UCON_RXERR_IRQEN) | 35 | S3C2443_UCON_RXERR_IRQEN) |
36 | 36 | ||
37 | #define S5P6442_ULCON_DEFAULT S3C2410_LCON_CS8 | 37 | #define SMDK6442_ULCON_DEFAULT S3C2410_LCON_CS8 |
38 | 38 | ||
39 | #define S5P6442_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | 39 | #define SMDK6442_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ |
40 | S5PV210_UFCON_TXTRIG4 | \ | 40 | S5PV210_UFCON_TXTRIG4 | \ |
41 | S5PV210_UFCON_RXTRIG4) | 41 | S5PV210_UFCON_RXTRIG4) |
42 | 42 | ||
@@ -44,28 +44,29 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = { | |||
44 | [0] = { | 44 | [0] = { |
45 | .hwport = 0, | 45 | .hwport = 0, |
46 | .flags = 0, | 46 | .flags = 0, |
47 | .ucon = S5P6442_UCON_DEFAULT, | 47 | .ucon = SMDK6442_UCON_DEFAULT, |
48 | .ulcon = S5P6442_ULCON_DEFAULT, | 48 | .ulcon = SMDK6442_ULCON_DEFAULT, |
49 | .ufcon = S5P6442_UFCON_DEFAULT, | 49 | .ufcon = SMDK6442_UFCON_DEFAULT, |
50 | }, | 50 | }, |
51 | [1] = { | 51 | [1] = { |
52 | .hwport = 1, | 52 | .hwport = 1, |
53 | .flags = 0, | 53 | .flags = 0, |
54 | .ucon = S5P6442_UCON_DEFAULT, | 54 | .ucon = SMDK6442_UCON_DEFAULT, |
55 | .ulcon = S5P6442_ULCON_DEFAULT, | 55 | .ulcon = SMDK6442_ULCON_DEFAULT, |
56 | .ufcon = S5P6442_UFCON_DEFAULT, | 56 | .ufcon = SMDK6442_UFCON_DEFAULT, |
57 | }, | 57 | }, |
58 | [2] = { | 58 | [2] = { |
59 | .hwport = 2, | 59 | .hwport = 2, |
60 | .flags = 0, | 60 | .flags = 0, |
61 | .ucon = S5P6442_UCON_DEFAULT, | 61 | .ucon = SMDK6442_UCON_DEFAULT, |
62 | .ulcon = S5P6442_ULCON_DEFAULT, | 62 | .ulcon = SMDK6442_ULCON_DEFAULT, |
63 | .ufcon = S5P6442_UFCON_DEFAULT, | 63 | .ufcon = SMDK6442_UFCON_DEFAULT, |
64 | }, | 64 | }, |
65 | }; | 65 | }; |
66 | 66 | ||
67 | static struct platform_device *smdk6442_devices[] __initdata = { | 67 | static struct platform_device *smdk6442_devices[] __initdata = { |
68 | &s5p6442_device_iis0, | 68 | &s5p6442_device_iis0, |
69 | &s3c_device_wdt, | ||
69 | }; | 70 | }; |
70 | 71 | ||
71 | static void __init smdk6442_map_io(void) | 72 | static void __init smdk6442_map_io(void) |
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig index b2a11dfa3399..77ae4bfb74ba 100644 --- a/arch/arm/mach-s5pc100/Kconfig +++ b/arch/arm/mach-s5pc100/Kconfig | |||
@@ -25,6 +25,16 @@ config S5PC100_SETUP_I2C1 | |||
25 | help | 25 | help |
26 | Common setup code for i2c bus 1. | 26 | Common setup code for i2c bus 1. |
27 | 27 | ||
28 | config S5PC100_SETUP_IDE | ||
29 | bool | ||
30 | help | ||
31 | Common setup code for S5PC100 IDE GPIO configurations | ||
32 | |||
33 | config S5PC100_SETUP_KEYPAD | ||
34 | bool | ||
35 | help | ||
36 | Common setup code for KEYPAD GPIO configurations. | ||
37 | |||
28 | config S5PC100_SETUP_SDHCI | 38 | config S5PC100_SETUP_SDHCI |
29 | bool | 39 | bool |
30 | select S5PC100_SETUP_SDHCI_GPIO | 40 | select S5PC100_SETUP_SDHCI_GPIO |
@@ -40,13 +50,24 @@ config MACH_SMDKC100 | |||
40 | bool "SMDKC100" | 50 | bool "SMDKC100" |
41 | select CPU_S5PC100 | 51 | select CPU_S5PC100 |
42 | select S3C_DEV_FB | 52 | select S3C_DEV_FB |
43 | select S3C_DEV_I2C1 | ||
44 | select S3C_DEV_HSMMC | 53 | select S3C_DEV_HSMMC |
45 | select S3C_DEV_HSMMC1 | 54 | select S3C_DEV_HSMMC1 |
46 | select S3C_DEV_HSMMC2 | 55 | select S3C_DEV_HSMMC2 |
56 | select S3C_DEV_I2C1 | ||
57 | select S3C_DEV_RTC | ||
58 | select S3C_DEV_WDT | ||
59 | select SAMSUNG_DEV_ADC | ||
60 | select SAMSUNG_DEV_IDE | ||
61 | select SAMSUNG_DEV_KEYPAD | ||
62 | select SAMSUNG_DEV_TS | ||
47 | select S5PC100_SETUP_FB_24BPP | 63 | select S5PC100_SETUP_FB_24BPP |
48 | select S5PC100_SETUP_I2C1 | 64 | select S5PC100_SETUP_I2C1 |
65 | select S5PC100_SETUP_IDE | ||
66 | select S5PC100_SETUP_KEYPAD | ||
49 | select S5PC100_SETUP_SDHCI | 67 | select S5PC100_SETUP_SDHCI |
68 | select S5P_DEV_FIMC0 | ||
69 | select S5P_DEV_FIMC1 | ||
70 | select S5P_DEV_FIMC2 | ||
50 | help | 71 | help |
51 | Machine support for the Samsung SMDKC100 | 72 | Machine support for the Samsung SMDKC100 |
52 | 73 | ||
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile index 543f3de5131e..a021ed1fb4b6 100644 --- a/arch/arm/mach-s5pc100/Makefile +++ b/arch/arm/mach-s5pc100/Makefile | |||
@@ -19,6 +19,8 @@ obj-$(CONFIG_CPU_S5PC100) += dma.o | |||
19 | 19 | ||
20 | obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o | 20 | obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o |
21 | obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o | 21 | obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o |
22 | obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o | ||
23 | obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o | ||
22 | obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o | 24 | obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o |
23 | obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | 25 | obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o |
24 | 26 | ||
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c index e3fed4cfe7ad..084abd13b0a5 100644 --- a/arch/arm/mach-s5pc100/clock.c +++ b/arch/arm/mach-s5pc100/clock.c | |||
@@ -737,7 +737,7 @@ static struct clk init_clocks_disable[] = { | |||
737 | .enable = s5pc100_d1_5_ctrl, | 737 | .enable = s5pc100_d1_5_ctrl, |
738 | .ctrlbit = (1 << 7), | 738 | .ctrlbit = (1 << 7), |
739 | }, { | 739 | }, { |
740 | .name = "keyif", | 740 | .name = "keypad", |
741 | .id = -1, | 741 | .id = -1, |
742 | .parent = &clk_div_d1_bus.clk, | 742 | .parent = &clk_div_d1_bus.clk, |
743 | .enable = s5pc100_d1_5_ctrl, | 743 | .enable = s5pc100_d1_5_ctrl, |
@@ -1078,7 +1078,7 @@ static struct clksrc_clk clksrcs[] = { | |||
1078 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 }, | 1078 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 }, |
1079 | }, { | 1079 | }, { |
1080 | .clk = { | 1080 | .clk = { |
1081 | .name = "mmc_bus", | 1081 | .name = "sclk_mmc", |
1082 | .id = 0, | 1082 | .id = 0, |
1083 | .ctrlbit = (1 << 12), | 1083 | .ctrlbit = (1 << 12), |
1084 | .enable = s5pc100_sclk1_ctrl, | 1084 | .enable = s5pc100_sclk1_ctrl, |
@@ -1089,7 +1089,7 @@ static struct clksrc_clk clksrcs[] = { | |||
1089 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 }, | 1089 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 }, |
1090 | }, { | 1090 | }, { |
1091 | .clk = { | 1091 | .clk = { |
1092 | .name = "mmc_bus", | 1092 | .name = "sclk_mmc", |
1093 | .id = 1, | 1093 | .id = 1, |
1094 | .ctrlbit = (1 << 13), | 1094 | .ctrlbit = (1 << 13), |
1095 | .enable = s5pc100_sclk1_ctrl, | 1095 | .enable = s5pc100_sclk1_ctrl, |
@@ -1100,7 +1100,7 @@ static struct clksrc_clk clksrcs[] = { | |||
1100 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 }, | 1100 | .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 }, |
1101 | }, { | 1101 | }, { |
1102 | .clk = { | 1102 | .clk = { |
1103 | .name = "mmc_bus", | 1103 | .name = "sclk_mmc", |
1104 | .id = 2, | 1104 | .id = 2, |
1105 | .ctrlbit = (1 << 14), | 1105 | .ctrlbit = (1 << 14), |
1106 | .enable = s5pc100_sclk1_ctrl, | 1106 | .enable = s5pc100_sclk1_ctrl, |
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c index 7b5bdbc9a5df..799d22f41fcd 100644 --- a/arch/arm/mach-s5pc100/cpu.c +++ b/arch/arm/mach-s5pc100/cpu.c | |||
@@ -38,8 +38,10 @@ | |||
38 | #include <plat/cpu.h> | 38 | #include <plat/cpu.h> |
39 | #include <plat/devs.h> | 39 | #include <plat/devs.h> |
40 | #include <plat/clock.h> | 40 | #include <plat/clock.h> |
41 | #include <plat/ata-core.h> | ||
41 | #include <plat/iic-core.h> | 42 | #include <plat/iic-core.h> |
42 | #include <plat/sdhci.h> | 43 | #include <plat/sdhci.h> |
44 | #include <plat/adc-core.h> | ||
43 | #include <plat/onenand-core.h> | 45 | #include <plat/onenand-core.h> |
44 | 46 | ||
45 | #include <plat/s5pc100.h> | 47 | #include <plat/s5pc100.h> |
@@ -87,11 +89,14 @@ void __init s5pc100_map_io(void) | |||
87 | s5pc100_default_sdhci1(); | 89 | s5pc100_default_sdhci1(); |
88 | s5pc100_default_sdhci2(); | 90 | s5pc100_default_sdhci2(); |
89 | 91 | ||
92 | s3c_adc_setname("s3c64xx-adc"); | ||
93 | |||
90 | /* the i2c devices are directly compatible with s3c2440 */ | 94 | /* the i2c devices are directly compatible with s3c2440 */ |
91 | s3c_i2c0_setname("s3c2440-i2c"); | 95 | s3c_i2c0_setname("s3c2440-i2c"); |
92 | s3c_i2c1_setname("s3c2440-i2c"); | 96 | s3c_i2c1_setname("s3c2440-i2c"); |
93 | 97 | ||
94 | s3c_onenand_setname("s5pc100-onenand"); | 98 | s3c_onenand_setname("s5pc100-onenand"); |
99 | s3c_cfcon_setname("s5pc100-pata"); | ||
95 | } | 100 | } |
96 | 101 | ||
97 | void __init s5pc100_init_clocks(int xtal) | 102 | void __init s5pc100_init_clocks(int xtal) |
diff --git a/arch/arm/mach-s5pc100/dev-audio.c b/arch/arm/mach-s5pc100/dev-audio.c index 18cfe9ae1936..a699ed6acc23 100644 --- a/arch/arm/mach-s5pc100/dev-audio.c +++ b/arch/arm/mach-s5pc100/dev-audio.c | |||
@@ -10,11 +10,11 @@ | |||
10 | 10 | ||
11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
12 | #include <linux/dma-mapping.h> | 12 | #include <linux/dma-mapping.h> |
13 | #include <linux/gpio.h> | ||
13 | 14 | ||
14 | #include <plat/gpio-cfg.h> | 15 | #include <plat/gpio-cfg.h> |
15 | #include <plat/audio.h> | 16 | #include <plat/audio.h> |
16 | 17 | ||
17 | #include <mach/gpio.h> | ||
18 | #include <mach/map.h> | 18 | #include <mach/map.h> |
19 | #include <mach/dma.h> | 19 | #include <mach/dma.h> |
20 | #include <mach/irqs.h> | 20 | #include <mach/irqs.h> |
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c index 14618c346057..a0ef7c302c16 100644 --- a/arch/arm/mach-s5pc100/dev-spi.c +++ b/arch/arm/mach-s5pc100/dev-spi.c | |||
@@ -10,10 +10,10 @@ | |||
10 | 10 | ||
11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
12 | #include <linux/dma-mapping.h> | 12 | #include <linux/dma-mapping.h> |
13 | #include <linux/gpio.h> | ||
13 | 14 | ||
14 | #include <mach/dma.h> | 15 | #include <mach/dma.h> |
15 | #include <mach/map.h> | 16 | #include <mach/map.h> |
16 | #include <mach/gpio.h> | ||
17 | #include <mach/spi-clocks.h> | 17 | #include <mach/spi-clocks.h> |
18 | 18 | ||
19 | #include <plat/s3c64xx-spi.h> | 19 | #include <plat/s3c64xx-spi.h> |
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h index 28aa551dc3a8..06513e647242 100644 --- a/arch/arm/mach-s5pc100/include/mach/irqs.h +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h | |||
@@ -29,7 +29,7 @@ | |||
29 | #define IRQ_GPIOINT S5P_IRQ_VIC0(30) | 29 | #define IRQ_GPIOINT S5P_IRQ_VIC0(30) |
30 | 30 | ||
31 | /* VIC1: ARM, power, memory, connectivity */ | 31 | /* VIC1: ARM, power, memory, connectivity */ |
32 | #define IRQ_CORTEX0 S5P_IRQ_VIC1(0) | 32 | #define IRQ_PMU S5P_IRQ_VIC1(0) |
33 | #define IRQ_CORTEX1 S5P_IRQ_VIC1(1) | 33 | #define IRQ_CORTEX1 S5P_IRQ_VIC1(1) |
34 | #define IRQ_CORTEX2 S5P_IRQ_VIC1(2) | 34 | #define IRQ_CORTEX2 S5P_IRQ_VIC1(2) |
35 | #define IRQ_CORTEX3 S5P_IRQ_VIC1(3) | 35 | #define IRQ_CORTEX3 S5P_IRQ_VIC1(3) |
@@ -38,7 +38,7 @@ | |||
38 | #define IRQ_IEMIEC S5P_IRQ_VIC1(6) | 38 | #define IRQ_IEMIEC S5P_IRQ_VIC1(6) |
39 | #define IRQ_ONENAND S5P_IRQ_VIC1(7) | 39 | #define IRQ_ONENAND S5P_IRQ_VIC1(7) |
40 | #define IRQ_NFC S5P_IRQ_VIC1(8) | 40 | #define IRQ_NFC S5P_IRQ_VIC1(8) |
41 | #define IRQ_CFC S5P_IRQ_VIC1(9) | 41 | #define IRQ_CFCON S5P_IRQ_VIC1(9) |
42 | #define IRQ_UART0 S5P_IRQ_VIC1(10) | 42 | #define IRQ_UART0 S5P_IRQ_VIC1(10) |
43 | #define IRQ_UART1 S5P_IRQ_VIC1(11) | 43 | #define IRQ_UART1 S5P_IRQ_VIC1(11) |
44 | #define IRQ_UART2 S5P_IRQ_VIC1(12) | 44 | #define IRQ_UART2 S5P_IRQ_VIC1(12) |
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h index cadae4305688..01b9134feff0 100644 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h | |||
@@ -61,6 +61,8 @@ | |||
61 | 61 | ||
62 | #define S5PC100_PA_ONENAND (0xE7100000) | 62 | #define S5PC100_PA_ONENAND (0xE7100000) |
63 | 63 | ||
64 | #define S5PC100_PA_CFCON (0xE7800000) | ||
65 | |||
64 | /* DMA */ | 66 | /* DMA */ |
65 | #define S5PC100_PA_MDMA (0xE8100000) | 67 | #define S5PC100_PA_MDMA (0xE8100000) |
66 | #define S5PC100_PA_PDMA0 (0xE9000000) | 68 | #define S5PC100_PA_PDMA0 (0xE9000000) |
@@ -72,6 +74,9 @@ | |||
72 | 74 | ||
73 | #define S5PC100_PA_SYSTIMER (0xEA100000) | 75 | #define S5PC100_PA_SYSTIMER (0xEA100000) |
74 | 76 | ||
77 | #define S5PC100_PA_WATCHDOG (0xEA200000) | ||
78 | #define S5PC100_PA_RTC (0xEA300000) | ||
79 | |||
75 | #define S5PC100_PA_UART (0xEC000000) | 80 | #define S5PC100_PA_UART (0xEC000000) |
76 | 81 | ||
77 | #define S5P_PA_UART0 (S5PC100_PA_UART + 0x0) | 82 | #define S5P_PA_UART0 (S5PC100_PA_UART + 0x0) |
@@ -94,6 +99,10 @@ | |||
94 | 99 | ||
95 | #define S5PC100_PA_FB (0xEE000000) | 100 | #define S5PC100_PA_FB (0xEE000000) |
96 | 101 | ||
102 | #define S5PC100_PA_FIMC0 (0xEE200000) | ||
103 | #define S5PC100_PA_FIMC1 (0xEE300000) | ||
104 | #define S5PC100_PA_FIMC2 (0xEE400000) | ||
105 | |||
97 | #define S5PC100_PA_I2S0 (0xF2000000) | 106 | #define S5PC100_PA_I2S0 (0xF2000000) |
98 | #define S5PC100_PA_I2S1 (0xF2100000) | 107 | #define S5PC100_PA_I2S1 (0xF2100000) |
99 | #define S5PC100_PA_I2S2 (0xF2200000) | 108 | #define S5PC100_PA_I2S2 (0xF2200000) |
@@ -104,6 +113,8 @@ | |||
104 | #define S5PC100_PA_PCM0 0xF2400000 | 113 | #define S5PC100_PA_PCM0 0xF2400000 |
105 | #define S5PC100_PA_PCM1 0xF2500000 | 114 | #define S5PC100_PA_PCM1 0xF2500000 |
106 | 115 | ||
116 | #define S5PC100_PA_TSADC (0xF3000000) | ||
117 | |||
107 | /* KEYPAD */ | 118 | /* KEYPAD */ |
108 | #define S5PC100_PA_KEYPAD (0xF3100000) | 119 | #define S5PC100_PA_KEYPAD (0xF3100000) |
109 | 120 | ||
@@ -130,9 +141,19 @@ | |||
130 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) | 141 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) |
131 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) | 142 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) |
132 | #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD | 143 | #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD |
144 | #define S3C_PA_WDT S5PC100_PA_WATCHDOG | ||
133 | #define S3C_PA_TSADC S5PC100_PA_TSADC | 145 | #define S3C_PA_TSADC S5PC100_PA_TSADC |
134 | #define S3C_PA_ONENAND S5PC100_PA_ONENAND | 146 | #define S3C_PA_ONENAND S5PC100_PA_ONENAND |
135 | #define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF | 147 | #define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF |
136 | #define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF | 148 | #define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF |
149 | #define S3C_PA_RTC S5PC100_PA_RTC | ||
150 | |||
151 | #define SAMSUNG_PA_ADC S5PC100_PA_TSADC | ||
152 | #define SAMSUNG_PA_CFCON S5PC100_PA_CFCON | ||
153 | #define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD | ||
154 | |||
155 | #define S5P_PA_FIMC0 S5PC100_PA_FIMC0 | ||
156 | #define S5P_PA_FIMC1 S5PC100_PA_FIMC1 | ||
157 | #define S5P_PA_FIMC2 S5PC100_PA_FIMC2 | ||
137 | 158 | ||
138 | #endif /* __ASM_ARCH_C100_MAP_H */ | 159 | #endif /* __ASM_ARCH_C100_MAP_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-clock.h b/arch/arm/mach-s5pc100/include/mach/regs-clock.h index 5d27d286d504..bc92da2e0ba2 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-clock.h | |||
@@ -71,7 +71,10 @@ | |||
71 | #define S5P_CLKDIV1_PCLKD1_SHIFT (16) | 71 | #define S5P_CLKDIV1_PCLKD1_SHIFT (16) |
72 | 72 | ||
73 | #define S5PC100_SWRESET S5PC100_REG_OTHERS(0x000) | 73 | #define S5PC100_SWRESET S5PC100_REG_OTHERS(0x000) |
74 | #define S5PC100_MEM_SYS_CFG S5PC100_REG_OTHERS(0x200) | ||
74 | 75 | ||
75 | #define S5PC100_SWRESET_RESETVAL 0xc100 | 76 | #define S5PC100_SWRESET_RESETVAL 0xc100 |
76 | 77 | ||
78 | #define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30 | ||
79 | |||
77 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ | 80 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h index 681f626a9ae1..a9ea57c06600 100644 --- a/arch/arm/mach-s5pc100/include/mach/system.h +++ b/arch/arm/mach-s5pc100/include/mach/system.h | |||
@@ -11,18 +11,11 @@ | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | 11 | #ifndef __ASM_ARCH_SYSTEM_H |
12 | #define __ASM_ARCH_SYSTEM_H __FILE__ | 12 | #define __ASM_ARCH_SYSTEM_H __FILE__ |
13 | 13 | ||
14 | #include <linux/io.h> | 14 | #include <plat/system-reset.h> |
15 | #include <mach/map.h> | ||
16 | #include <mach/regs-clock.h> | ||
17 | 15 | ||
18 | static void arch_idle(void) | 16 | static void arch_idle(void) |
19 | { | 17 | { |
20 | /* nothing here yet */ | 18 | /* nothing here yet */ |
21 | } | 19 | } |
22 | 20 | ||
23 | static void arch_reset(char mode, const char *cmd) | ||
24 | { | ||
25 | __raw_writel(S5PC100_SWRESET_RESETVAL, S5PC100_SWRESET); | ||
26 | return; | ||
27 | } | ||
28 | #endif /* __ASM_ARCH_IRQ_H */ | 21 | #endif /* __ASM_ARCH_IRQ_H */ |
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c index af22f8202a07..2dc519c172ec 100644 --- a/arch/arm/mach-s5pc100/mach-smdkc100.c +++ b/arch/arm/mach-s5pc100/mach-smdkc100.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/i2c.h> | 22 | #include <linux/i2c.h> |
23 | #include <linux/fb.h> | 23 | #include <linux/fb.h> |
24 | #include <linux/delay.h> | 24 | #include <linux/delay.h> |
25 | #include <linux/input.h> | ||
25 | 26 | ||
26 | #include <asm/mach/arch.h> | 27 | #include <asm/mach/arch.h> |
27 | #include <asm/mach/map.h> | 28 | #include <asm/mach/map.h> |
@@ -42,18 +43,22 @@ | |||
42 | #include <plat/s5pc100.h> | 43 | #include <plat/s5pc100.h> |
43 | #include <plat/fb.h> | 44 | #include <plat/fb.h> |
44 | #include <plat/iic.h> | 45 | #include <plat/iic.h> |
46 | #include <plat/ata.h> | ||
47 | #include <plat/adc.h> | ||
48 | #include <plat/keypad.h> | ||
49 | #include <plat/ts.h> | ||
45 | 50 | ||
46 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 51 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
47 | #define S5PC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 52 | #define SMDKC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
48 | S3C2410_UCON_RXILEVEL | \ | 53 | S3C2410_UCON_RXILEVEL | \ |
49 | S3C2410_UCON_TXIRQMODE | \ | 54 | S3C2410_UCON_TXIRQMODE | \ |
50 | S3C2410_UCON_RXIRQMODE | \ | 55 | S3C2410_UCON_RXIRQMODE | \ |
51 | S3C2410_UCON_RXFIFO_TOI | \ | 56 | S3C2410_UCON_RXFIFO_TOI | \ |
52 | S3C2443_UCON_RXERR_IRQEN) | 57 | S3C2443_UCON_RXERR_IRQEN) |
53 | 58 | ||
54 | #define S5PC100_ULCON_DEFAULT S3C2410_LCON_CS8 | 59 | #define SMDKC100_ULCON_DEFAULT S3C2410_LCON_CS8 |
55 | 60 | ||
56 | #define S5PC100_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | 61 | #define SMDKC100_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ |
57 | S3C2440_UFCON_RXTRIG8 | \ | 62 | S3C2440_UFCON_RXTRIG8 | \ |
58 | S3C2440_UFCON_TXTRIG16) | 63 | S3C2440_UFCON_TXTRIG16) |
59 | 64 | ||
@@ -61,30 +66,30 @@ static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = { | |||
61 | [0] = { | 66 | [0] = { |
62 | .hwport = 0, | 67 | .hwport = 0, |
63 | .flags = 0, | 68 | .flags = 0, |
64 | .ucon = S5PC100_UCON_DEFAULT, | 69 | .ucon = SMDKC100_UCON_DEFAULT, |
65 | .ulcon = S5PC100_ULCON_DEFAULT, | 70 | .ulcon = SMDKC100_ULCON_DEFAULT, |
66 | .ufcon = S5PC100_UFCON_DEFAULT, | 71 | .ufcon = SMDKC100_UFCON_DEFAULT, |
67 | }, | 72 | }, |
68 | [1] = { | 73 | [1] = { |
69 | .hwport = 1, | 74 | .hwport = 1, |
70 | .flags = 0, | 75 | .flags = 0, |
71 | .ucon = S5PC100_UCON_DEFAULT, | 76 | .ucon = SMDKC100_UCON_DEFAULT, |
72 | .ulcon = S5PC100_ULCON_DEFAULT, | 77 | .ulcon = SMDKC100_ULCON_DEFAULT, |
73 | .ufcon = S5PC100_UFCON_DEFAULT, | 78 | .ufcon = SMDKC100_UFCON_DEFAULT, |
74 | }, | 79 | }, |
75 | [2] = { | 80 | [2] = { |
76 | .hwport = 2, | 81 | .hwport = 2, |
77 | .flags = 0, | 82 | .flags = 0, |
78 | .ucon = S5PC100_UCON_DEFAULT, | 83 | .ucon = SMDKC100_UCON_DEFAULT, |
79 | .ulcon = S5PC100_ULCON_DEFAULT, | 84 | .ulcon = SMDKC100_ULCON_DEFAULT, |
80 | .ufcon = S5PC100_UFCON_DEFAULT, | 85 | .ufcon = SMDKC100_UFCON_DEFAULT, |
81 | }, | 86 | }, |
82 | [3] = { | 87 | [3] = { |
83 | .hwport = 3, | 88 | .hwport = 3, |
84 | .flags = 0, | 89 | .flags = 0, |
85 | .ucon = S5PC100_UCON_DEFAULT, | 90 | .ucon = SMDKC100_UCON_DEFAULT, |
86 | .ulcon = S5PC100_ULCON_DEFAULT, | 91 | .ulcon = SMDKC100_ULCON_DEFAULT, |
87 | .ufcon = S5PC100_UFCON_DEFAULT, | 92 | .ufcon = SMDKC100_UFCON_DEFAULT, |
88 | }, | 93 | }, |
89 | }; | 94 | }; |
90 | 95 | ||
@@ -149,16 +154,54 @@ static struct s3c_fb_platdata smdkc100_lcd_pdata __initdata = { | |||
149 | .setup_gpio = s5pc100_fb_gpio_setup_24bpp, | 154 | .setup_gpio = s5pc100_fb_gpio_setup_24bpp, |
150 | }; | 155 | }; |
151 | 156 | ||
157 | static struct s3c_ide_platdata smdkc100_ide_pdata __initdata = { | ||
158 | .setup_gpio = s5pc100_ide_setup_gpio, | ||
159 | }; | ||
160 | |||
161 | static uint32_t smdkc100_keymap[] __initdata = { | ||
162 | /* KEY(row, col, keycode) */ | ||
163 | KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3), | ||
164 | KEY(0, 6, KEY_4), KEY(0, 7, KEY_5), | ||
165 | KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C), | ||
166 | KEY(1, 6, KEY_D), KEY(1, 7, KEY_E) | ||
167 | }; | ||
168 | |||
169 | static struct matrix_keymap_data smdkc100_keymap_data __initdata = { | ||
170 | .keymap = smdkc100_keymap, | ||
171 | .keymap_size = ARRAY_SIZE(smdkc100_keymap), | ||
172 | }; | ||
173 | |||
174 | static struct samsung_keypad_platdata smdkc100_keypad_data __initdata = { | ||
175 | .keymap_data = &smdkc100_keymap_data, | ||
176 | .rows = 2, | ||
177 | .cols = 8, | ||
178 | }; | ||
179 | |||
152 | static struct platform_device *smdkc100_devices[] __initdata = { | 180 | static struct platform_device *smdkc100_devices[] __initdata = { |
181 | &s3c_device_adc, | ||
182 | &s3c_device_cfcon, | ||
153 | &s3c_device_i2c0, | 183 | &s3c_device_i2c0, |
154 | &s3c_device_i2c1, | 184 | &s3c_device_i2c1, |
155 | &s3c_device_fb, | 185 | &s3c_device_fb, |
156 | &s3c_device_hsmmc0, | 186 | &s3c_device_hsmmc0, |
157 | &s3c_device_hsmmc1, | 187 | &s3c_device_hsmmc1, |
158 | &s3c_device_hsmmc2, | 188 | &s3c_device_hsmmc2, |
189 | &s3c_device_ts, | ||
190 | &s3c_device_wdt, | ||
159 | &smdkc100_lcd_powerdev, | 191 | &smdkc100_lcd_powerdev, |
160 | &s5pc100_device_iis0, | 192 | &s5pc100_device_iis0, |
193 | &samsung_device_keypad, | ||
161 | &s5pc100_device_ac97, | 194 | &s5pc100_device_ac97, |
195 | &s3c_device_rtc, | ||
196 | &s5p_device_fimc0, | ||
197 | &s5p_device_fimc1, | ||
198 | &s5p_device_fimc2, | ||
199 | }; | ||
200 | |||
201 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { | ||
202 | .delay = 10000, | ||
203 | .presc = 49, | ||
204 | .oversampling_shift = 2, | ||
162 | }; | 205 | }; |
163 | 206 | ||
164 | static void __init smdkc100_map_io(void) | 207 | static void __init smdkc100_map_io(void) |
@@ -170,6 +213,8 @@ static void __init smdkc100_map_io(void) | |||
170 | 213 | ||
171 | static void __init smdkc100_machine_init(void) | 214 | static void __init smdkc100_machine_init(void) |
172 | { | 215 | { |
216 | s3c24xx_ts_set_platdata(&s3c_ts_platform); | ||
217 | |||
173 | /* I2C */ | 218 | /* I2C */ |
174 | s3c_i2c0_set_platdata(NULL); | 219 | s3c_i2c0_set_platdata(NULL); |
175 | s3c_i2c1_set_platdata(NULL); | 220 | s3c_i2c1_set_platdata(NULL); |
@@ -177,6 +222,9 @@ static void __init smdkc100_machine_init(void) | |||
177 | i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); | 222 | i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); |
178 | 223 | ||
179 | s3c_fb_set_platdata(&smdkc100_lcd_pdata); | 224 | s3c_fb_set_platdata(&smdkc100_lcd_pdata); |
225 | s3c_ide_set_platdata(&smdkc100_ide_pdata); | ||
226 | |||
227 | samsung_keypad_set_platdata(&smdkc100_keypad_data); | ||
180 | 228 | ||
181 | /* LCD init */ | 229 | /* LCD init */ |
182 | gpio_request(S5PC100_GPD(0), "GPD"); | 230 | gpio_request(S5PC100_GPD(0), "GPD"); |
diff --git a/arch/arm/mach-s5pc100/setup-ide.c b/arch/arm/mach-s5pc100/setup-ide.c new file mode 100644 index 000000000000..83575671fb59 --- /dev/null +++ b/arch/arm/mach-s5pc100/setup-ide.c | |||
@@ -0,0 +1,70 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/setup-ide.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5PC100 setup information for IDE | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/gpio.h> | ||
15 | #include <linux/io.h> | ||
16 | |||
17 | #include <mach/regs-clock.h> | ||
18 | #include <plat/gpio-cfg.h> | ||
19 | |||
20 | void s5pc100_ide_setup_gpio(void) | ||
21 | { | ||
22 | u32 reg; | ||
23 | u32 gpio = 0; | ||
24 | |||
25 | /* Independent CF interface, CF chip select configuration */ | ||
26 | reg = readl(S5PC100_MEM_SYS_CFG) & (~0x3f); | ||
27 | writel(reg | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S5PC100_MEM_SYS_CFG); | ||
28 | |||
29 | /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */ | ||
30 | for (gpio = S5PC100_GPJ0(0); gpio <= S5PC100_GPJ0(7); gpio++) { | ||
31 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); | ||
32 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
33 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
34 | } | ||
35 | |||
36 | /*CF_Data[0 - 7] */ | ||
37 | for (gpio = S5PC100_GPJ2(0); gpio <= S5PC100_GPJ2(7); gpio++) { | ||
38 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); | ||
39 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
40 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
41 | } | ||
42 | |||
43 | /* CF_Data[8 - 15] */ | ||
44 | for (gpio = S5PC100_GPJ3(0); gpio <= S5PC100_GPJ3(7); gpio++) { | ||
45 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); | ||
46 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
47 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
48 | } | ||
49 | |||
50 | /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */ | ||
51 | for (gpio = S5PC100_GPJ4(0); gpio <= S5PC100_GPJ4(3); gpio++) { | ||
52 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); | ||
53 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
54 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
55 | } | ||
56 | |||
57 | /* EBI_OE, EBI_WE */ | ||
58 | for (gpio = S5PC100_GPK0(6); gpio <= S5PC100_GPK0(7); gpio++) | ||
59 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0)); | ||
60 | |||
61 | /* CF_OE, CF_WE */ | ||
62 | for (gpio = S5PC100_GPK1(6); gpio <= S5PC100_GPK1(7); gpio++) { | ||
63 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
64 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
65 | } | ||
66 | |||
67 | /* CF_CD */ | ||
68 | s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2)); | ||
69 | s3c_gpio_setpull(S5PC100_GPK3(5), S3C_GPIO_PULL_NONE); | ||
70 | } | ||
diff --git a/arch/arm/mach-s5pc100/setup-keypad.c b/arch/arm/mach-s5pc100/setup-keypad.c new file mode 100644 index 000000000000..d0837a72a58e --- /dev/null +++ b/arch/arm/mach-s5pc100/setup-keypad.c | |||
@@ -0,0 +1,34 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/setup-keypad.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * GPIO configuration for S5PC100 KeyPad device | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/gpio.h> | ||
14 | #include <plat/gpio-cfg.h> | ||
15 | |||
16 | void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) | ||
17 | { | ||
18 | unsigned int gpio; | ||
19 | unsigned int end; | ||
20 | |||
21 | /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ | ||
22 | end = S5PC100_GPH3(rows); | ||
23 | for (gpio = S5PC100_GPH3(0); gpio < end; gpio++) { | ||
24 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
25 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
26 | } | ||
27 | |||
28 | /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ | ||
29 | end = S5PC100_GPH2(cols); | ||
30 | for (gpio = S5PC100_GPH2(0); gpio < end; gpio++) { | ||
31 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
32 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
33 | } | ||
34 | } | ||
diff --git a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c index 7769c760c9ef..dc7208c639ea 100644 --- a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c | |||
@@ -20,9 +20,11 @@ | |||
20 | 20 | ||
21 | #include <plat/gpio-cfg.h> | 21 | #include <plat/gpio-cfg.h> |
22 | #include <plat/regs-sdhci.h> | 22 | #include <plat/regs-sdhci.h> |
23 | #include <plat/sdhci.h> | ||
23 | 24 | ||
24 | void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | 25 | void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) |
25 | { | 26 | { |
27 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | ||
26 | unsigned int gpio; | 28 | unsigned int gpio; |
27 | unsigned int end; | 29 | unsigned int end; |
28 | unsigned int num; | 30 | unsigned int num; |
@@ -47,12 +49,15 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | |||
47 | } | 49 | } |
48 | } | 50 | } |
49 | 51 | ||
50 | s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP); | 52 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { |
51 | s3c_gpio_cfgpin(S5PC100_GPG1(2), S3C_GPIO_SFN(2)); | 53 | s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP); |
54 | s3c_gpio_cfgpin(S5PC100_GPG1(2), S3C_GPIO_SFN(2)); | ||
55 | } | ||
52 | } | 56 | } |
53 | 57 | ||
54 | void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | 58 | void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) |
55 | { | 59 | { |
60 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | ||
56 | unsigned int gpio; | 61 | unsigned int gpio; |
57 | unsigned int end; | 62 | unsigned int end; |
58 | 63 | ||
@@ -64,12 +69,15 @@ void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | |||
64 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | 69 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); |
65 | } | 70 | } |
66 | 71 | ||
67 | s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); | 72 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { |
68 | s3c_gpio_cfgpin(S5PC100_GPG2(6), S3C_GPIO_SFN(2)); | 73 | s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); |
74 | s3c_gpio_cfgpin(S5PC100_GPG2(6), S3C_GPIO_SFN(2)); | ||
75 | } | ||
69 | } | 76 | } |
70 | 77 | ||
71 | void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) | 78 | void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) |
72 | { | 79 | { |
80 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | ||
73 | unsigned int gpio; | 81 | unsigned int gpio; |
74 | unsigned int end; | 82 | unsigned int end; |
75 | 83 | ||
@@ -81,6 +89,8 @@ void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) | |||
81 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | 89 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); |
82 | } | 90 | } |
83 | 91 | ||
84 | s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); | 92 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { |
85 | s3c_gpio_cfgpin(S5PC100_GPG3(6), S3C_GPIO_SFN(2)); | 93 | s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); |
94 | s3c_gpio_cfgpin(S5PC100_GPG3(6), S3C_GPIO_SFN(2)); | ||
95 | } | ||
86 | } | 96 | } |
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c index ea7ff19adb95..f16946e456e9 100644 --- a/arch/arm/mach-s5pc100/setup-sdhci.c +++ b/arch/arm/mach-s5pc100/setup-sdhci.c | |||
@@ -26,10 +26,10 @@ | |||
26 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | 26 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ |
27 | 27 | ||
28 | char *s5pc100_hsmmc_clksrcs[4] = { | 28 | char *s5pc100_hsmmc_clksrcs[4] = { |
29 | [0] = "hsmmc", | 29 | [0] = "hsmmc", /* HCLK */ |
30 | [1] = "hsmmc", | 30 | /* [1] = "hsmmc", - duplicate HCLK entry */ |
31 | /* [2] = "mmc_bus", not yet successfully used yet */ | 31 | [2] = "sclk_mmc", /* mmc_bus */ |
32 | /* [3] = "48m", - note not successfully used yet */ | 32 | /* [3] = "48m", - note not successfully used yet */ |
33 | }; | 33 | }; |
34 | 34 | ||
35 | 35 | ||
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index 0761eac9aaea..d3a38955c741 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig | |||
@@ -27,11 +27,21 @@ config S5PV210_SETUP_I2C2 | |||
27 | help | 27 | help |
28 | Common setup code for i2c bus 2. | 28 | Common setup code for i2c bus 2. |
29 | 29 | ||
30 | config S5PV210_SETUP_IDE | ||
31 | bool | ||
32 | help | ||
33 | Common setup code for S5PV210 IDE GPIO configurations | ||
34 | |||
30 | config S5PV210_SETUP_FB_24BPP | 35 | config S5PV210_SETUP_FB_24BPP |
31 | bool | 36 | bool |
32 | help | 37 | help |
33 | Common setup code for S5PV210 with an 24bpp RGB display helper. | 38 | Common setup code for S5PV210 with an 24bpp RGB display helper. |
34 | 39 | ||
40 | config S5PV210_SETUP_KEYPAD | ||
41 | bool | ||
42 | help | ||
43 | Common setup code for keypad. | ||
44 | |||
35 | config S5PV210_SETUP_SDHCI | 45 | config S5PV210_SETUP_SDHCI |
36 | bool | 46 | bool |
37 | select S5PV210_SETUP_SDHCI_GPIO | 47 | select S5PV210_SETUP_SDHCI_GPIO |
@@ -43,14 +53,27 @@ config S5PV210_SETUP_SDHCI_GPIO | |||
43 | help | 53 | help |
44 | Common setup code for SDHCI gpio. | 54 | Common setup code for SDHCI gpio. |
45 | 55 | ||
46 | # machine support | 56 | config S5PC110_DEV_ONENAND |
57 | bool | ||
58 | help | ||
59 | Compile in platform device definition for OneNAND1 controller | ||
60 | |||
61 | menu "S5PC110 Machines" | ||
47 | 62 | ||
48 | config MACH_AQUILA | 63 | config MACH_AQUILA |
49 | bool "Samsung Aquila" | 64 | bool "Aquila" |
50 | select CPU_S5PV210 | 65 | select CPU_S5PV210 |
51 | select ARCH_SPARSEMEM_ENABLE | 66 | select ARCH_SPARSEMEM_ENABLE |
52 | select S5PV210_SETUP_FB_24BPP | ||
53 | select S3C_DEV_FB | 67 | select S3C_DEV_FB |
68 | select S5P_DEV_FIMC0 | ||
69 | select S5P_DEV_FIMC1 | ||
70 | select S5P_DEV_FIMC2 | ||
71 | select S3C_DEV_HSMMC | ||
72 | select S3C_DEV_HSMMC1 | ||
73 | select S3C_DEV_HSMMC2 | ||
74 | select S5PC110_DEV_ONENAND | ||
75 | select S5PV210_SETUP_FB_24BPP | ||
76 | select S5PV210_SETUP_SDHCI | ||
54 | help | 77 | help |
55 | Machine support for the Samsung Aquila target based on S5PC110 SoC | 78 | Machine support for the Samsung Aquila target based on S5PC110 SoC |
56 | 79 | ||
@@ -58,34 +81,64 @@ config MACH_GONI | |||
58 | bool "GONI" | 81 | bool "GONI" |
59 | select CPU_S5PV210 | 82 | select CPU_S5PV210 |
60 | select ARCH_SPARSEMEM_ENABLE | 83 | select ARCH_SPARSEMEM_ENABLE |
84 | select S3C_DEV_FB | ||
85 | select S5P_DEV_FIMC0 | ||
86 | select S5P_DEV_FIMC1 | ||
87 | select S5P_DEV_FIMC2 | ||
88 | select S3C_DEV_HSMMC | ||
89 | select S3C_DEV_HSMMC1 | ||
90 | select S3C_DEV_HSMMC2 | ||
91 | select S5PC110_DEV_ONENAND | ||
92 | select S5PV210_SETUP_FB_24BPP | ||
93 | select S5PV210_SETUP_SDHCI | ||
61 | help | 94 | help |
62 | Machine support for Samsung GONI board | 95 | Machine support for Samsung GONI board |
63 | S5PC110(MCP) is one of package option of S5PV210 | 96 | S5PC110(MCP) is one of package option of S5PV210 |
64 | 97 | ||
65 | config S5PC110_DEV_ONENAND | 98 | config MACH_SMDKC110 |
66 | bool | 99 | bool "SMDKC110" |
100 | select CPU_S5PV210 | ||
101 | select ARCH_SPARSEMEM_ENABLE | ||
102 | select S3C_DEV_I2C1 | ||
103 | select S3C_DEV_I2C2 | ||
104 | select S3C_DEV_RTC | ||
105 | select S3C_DEV_WDT | ||
106 | select SAMSUNG_DEV_IDE | ||
107 | select S5PV210_SETUP_I2C1 | ||
108 | select S5PV210_SETUP_I2C2 | ||
109 | select S5PV210_SETUP_IDE | ||
67 | help | 110 | help |
68 | Compile in platform device definition for OneNAND1 controller | 111 | Machine support for Samsung SMDKC110 |
112 | S5PC110(MCP) is one of package option of S5PV210 | ||
113 | |||
114 | endmenu | ||
115 | |||
116 | menu "S5PV210 Machines" | ||
69 | 117 | ||
70 | config MACH_SMDKV210 | 118 | config MACH_SMDKV210 |
71 | bool "SMDKV210" | 119 | bool "SMDKV210" |
72 | select CPU_S5PV210 | 120 | select CPU_S5PV210 |
73 | select ARCH_SPARSEMEM_ENABLE | 121 | select ARCH_SPARSEMEM_ENABLE |
122 | select S3C_DEV_HSMMC | ||
123 | select S3C_DEV_HSMMC1 | ||
124 | select S3C_DEV_HSMMC2 | ||
125 | select S3C_DEV_HSMMC3 | ||
126 | select S3C_DEV_I2C1 | ||
127 | select S3C_DEV_I2C2 | ||
128 | select S3C_DEV_RTC | ||
129 | select S3C_DEV_WDT | ||
74 | select SAMSUNG_DEV_ADC | 130 | select SAMSUNG_DEV_ADC |
131 | select SAMSUNG_DEV_IDE | ||
132 | select SAMSUNG_DEV_KEYPAD | ||
75 | select SAMSUNG_DEV_TS | 133 | select SAMSUNG_DEV_TS |
76 | select S3C_DEV_WDT | 134 | select S5PV210_SETUP_I2C1 |
77 | select HAVE_S3C2410_WATCHDOG | 135 | select S5PV210_SETUP_I2C2 |
136 | select S5PV210_SETUP_IDE | ||
137 | select S5PV210_SETUP_KEYPAD | ||
138 | select S5PV210_SETUP_SDHCI | ||
78 | help | 139 | help |
79 | Machine support for Samsung SMDKV210 | 140 | Machine support for Samsung SMDKV210 |
80 | 141 | ||
81 | config MACH_SMDKC110 | 142 | endmenu |
82 | bool "SMDKC110" | ||
83 | select CPU_S5PV210 | ||
84 | select ARCH_SPARSEMEM_ENABLE | ||
85 | select S3C_DEV_WDT | ||
86 | select HAVE_S3C2410_WATCHDOG | ||
87 | help | ||
88 | Machine support for Samsung SMDKC110 | ||
89 | S5PC110(MCP) is one of package option of S5PV210 | ||
90 | 143 | ||
91 | endif | 144 | endif |
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index 30be9a6a4620..05048c5aa4c6 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile | |||
@@ -31,5 +31,7 @@ obj-$(CONFIG_S5PC110_DEV_ONENAND) += dev-onenand.o | |||
31 | obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o | 31 | obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o |
32 | obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o | 32 | obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o |
33 | obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o | 33 | obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o |
34 | obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o | ||
35 | obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o | ||
34 | obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o | 36 | obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o |
35 | obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | 37 | obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o |
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c index 411a4a9cbfc7..c7e0b8a65c4a 100644 --- a/arch/arm/mach-s5pv210/cpu.c +++ b/arch/arm/mach-s5pv210/cpu.c | |||
@@ -32,8 +32,13 @@ | |||
32 | #include <plat/devs.h> | 32 | #include <plat/devs.h> |
33 | #include <plat/clock.h> | 33 | #include <plat/clock.h> |
34 | #include <plat/s5pv210.h> | 34 | #include <plat/s5pv210.h> |
35 | #include <plat/adc-core.h> | ||
36 | #include <plat/ata-core.h> | ||
37 | #include <plat/fimc-core.h> | ||
35 | #include <plat/iic-core.h> | 38 | #include <plat/iic-core.h> |
39 | #include <plat/keypad-core.h> | ||
36 | #include <plat/sdhci.h> | 40 | #include <plat/sdhci.h> |
41 | #include <plat/reset.h> | ||
37 | 42 | ||
38 | /* Initial IO mappings */ | 43 | /* Initial IO mappings */ |
39 | 44 | ||
@@ -69,6 +74,11 @@ static void s5pv210_idle(void) | |||
69 | local_irq_enable(); | 74 | local_irq_enable(); |
70 | } | 75 | } |
71 | 76 | ||
77 | static void s5pv210_sw_reset(void) | ||
78 | { | ||
79 | __raw_writel(0x1, S5P_SWRESET); | ||
80 | } | ||
81 | |||
72 | /* s5pv210_map_io | 82 | /* s5pv210_map_io |
73 | * | 83 | * |
74 | * register the standard cpu IO areas | 84 | * register the standard cpu IO areas |
@@ -76,21 +86,29 @@ static void s5pv210_idle(void) | |||
76 | 86 | ||
77 | void __init s5pv210_map_io(void) | 87 | void __init s5pv210_map_io(void) |
78 | { | 88 | { |
79 | #ifdef CONFIG_S3C_DEV_ADC | ||
80 | s3c_device_adc.name = "s3c64xx-adc"; | ||
81 | #endif | ||
82 | |||
83 | iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); | 89 | iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); |
84 | 90 | ||
85 | /* initialise device information early */ | 91 | /* initialise device information early */ |
86 | s5pv210_default_sdhci0(); | 92 | s5pv210_default_sdhci0(); |
87 | s5pv210_default_sdhci1(); | 93 | s5pv210_default_sdhci1(); |
88 | s5pv210_default_sdhci2(); | 94 | s5pv210_default_sdhci2(); |
95 | s5pv210_default_sdhci3(); | ||
96 | |||
97 | s3c_adc_setname("s3c64xx-adc"); | ||
98 | |||
99 | s3c_cfcon_setname("s5pv210-pata"); | ||
100 | |||
101 | s3c_fimc_setname(0, "s5pv210-fimc"); | ||
102 | s3c_fimc_setname(1, "s5pv210-fimc"); | ||
103 | s3c_fimc_setname(2, "s5pv210-fimc"); | ||
89 | 104 | ||
90 | /* the i2c devices are directly compatible with s3c2440 */ | 105 | /* the i2c devices are directly compatible with s3c2440 */ |
91 | s3c_i2c0_setname("s3c2440-i2c"); | 106 | s3c_i2c0_setname("s3c2440-i2c"); |
92 | s3c_i2c1_setname("s3c2440-i2c"); | 107 | s3c_i2c1_setname("s3c2440-i2c"); |
93 | s3c_i2c2_setname("s3c2440-i2c"); | 108 | s3c_i2c2_setname("s3c2440-i2c"); |
109 | |||
110 | /* Use s5pv210-keypad instead of samsung-keypad */ | ||
111 | samsung_keypad_setname("s5pv210-keypad"); | ||
94 | } | 112 | } |
95 | 113 | ||
96 | void __init s5pv210_init_clocks(int xtal) | 114 | void __init s5pv210_init_clocks(int xtal) |
@@ -138,5 +156,8 @@ int __init s5pv210_init(void) | |||
138 | /* set idle function */ | 156 | /* set idle function */ |
139 | pm_idle = s5pv210_idle; | 157 | pm_idle = s5pv210_idle; |
140 | 158 | ||
159 | /* set sw_reset function */ | ||
160 | s5p_reset_hook = s5pv210_sw_reset; | ||
161 | |||
141 | return sysdev_register(&s5pv210_sysdev); | 162 | return sysdev_register(&s5pv210_sysdev); |
142 | } | 163 | } |
diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c index 6e215330a1be..21dc6cf955c3 100644 --- a/arch/arm/mach-s5pv210/dev-audio.c +++ b/arch/arm/mach-s5pv210/dev-audio.c | |||
@@ -10,11 +10,11 @@ | |||
10 | 10 | ||
11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
12 | #include <linux/dma-mapping.h> | 12 | #include <linux/dma-mapping.h> |
13 | #include <linux/gpio.h> | ||
13 | 14 | ||
14 | #include <plat/gpio-cfg.h> | 15 | #include <plat/gpio-cfg.h> |
15 | #include <plat/audio.h> | 16 | #include <plat/audio.h> |
16 | 17 | ||
17 | #include <mach/gpio.h> | ||
18 | #include <mach/map.h> | 18 | #include <mach/map.h> |
19 | #include <mach/dma.h> | 19 | #include <mach/dma.h> |
20 | #include <mach/irqs.h> | 20 | #include <mach/irqs.h> |
diff --git a/arch/arm/mach-s5pv210/dev-onenand.c b/arch/arm/mach-s5pv210/dev-onenand.c index 34997b752f93..f8ede33ee82b 100644 --- a/arch/arm/mach-s5pv210/dev-onenand.c +++ b/arch/arm/mach-s5pv210/dev-onenand.c | |||
@@ -27,9 +27,14 @@ static struct resource s5pc110_onenand_resources[] = { | |||
27 | }, | 27 | }, |
28 | [1] = { | 28 | [1] = { |
29 | .start = S5PC110_PA_ONENAND_DMA, | 29 | .start = S5PC110_PA_ONENAND_DMA, |
30 | .end = S5PC110_PA_ONENAND_DMA + SZ_2K - 1, | 30 | .end = S5PC110_PA_ONENAND_DMA + SZ_8K - 1, |
31 | .flags = IORESOURCE_MEM, | 31 | .flags = IORESOURCE_MEM, |
32 | }, | 32 | }, |
33 | [2] = { | ||
34 | .start = IRQ_ONENAND_AUDI, | ||
35 | .end = IRQ_ONENAND_AUDI, | ||
36 | .flags = IORESOURCE_IRQ, | ||
37 | }, | ||
33 | }; | 38 | }; |
34 | 39 | ||
35 | struct platform_device s5pc110_device_onenand = { | 40 | struct platform_device s5pc110_device_onenand = { |
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c index 337a62b57a0b..826cdbc43e20 100644 --- a/arch/arm/mach-s5pv210/dev-spi.c +++ b/arch/arm/mach-s5pv210/dev-spi.c | |||
@@ -10,11 +10,11 @@ | |||
10 | 10 | ||
11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
12 | #include <linux/dma-mapping.h> | 12 | #include <linux/dma-mapping.h> |
13 | #include <linux/gpio.h> | ||
13 | 14 | ||
14 | #include <mach/dma.h> | 15 | #include <mach/dma.h> |
15 | #include <mach/map.h> | 16 | #include <mach/map.h> |
16 | #include <mach/irqs.h> | 17 | #include <mach/irqs.h> |
17 | #include <mach/gpio.h> | ||
18 | #include <mach/spi-clocks.h> | 18 | #include <mach/spi-clocks.h> |
19 | 19 | ||
20 | #include <plat/s3c64xx-spi.h> | 20 | #include <plat/s3c64xx-spi.h> |
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c index 9ea8972e023d..0d459112d039 100644 --- a/arch/arm/mach-s5pv210/gpiolib.c +++ b/arch/arm/mach-s5pv210/gpiolib.c | |||
@@ -207,6 +207,20 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = { | |||
207 | .label = "MP03", | 207 | .label = "MP03", |
208 | }, | 208 | }, |
209 | }, { | 209 | }, { |
210 | .config = &gpio_cfg_noint, | ||
211 | .chip = { | ||
212 | .base = S5PV210_MP04(0), | ||
213 | .ngpio = S5PV210_GPIO_MP04_NR, | ||
214 | .label = "MP04", | ||
215 | }, | ||
216 | }, { | ||
217 | .config = &gpio_cfg_noint, | ||
218 | .chip = { | ||
219 | .base = S5PV210_MP05(0), | ||
220 | .ngpio = S5PV210_GPIO_MP05_NR, | ||
221 | .label = "MP05", | ||
222 | }, | ||
223 | }, { | ||
210 | .base = (S5P_VA_GPIO + 0xC00), | 224 | .base = (S5P_VA_GPIO + 0xC00), |
211 | .config = &gpio_cfg_noint, | 225 | .config = &gpio_cfg_noint, |
212 | .chip = { | 226 | .chip = { |
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h index d6461ba2b71d..1f4b595534c2 100644 --- a/arch/arm/mach-s5pv210/include/mach/gpio.h +++ b/arch/arm/mach-s5pv210/include/mach/gpio.h | |||
@@ -52,6 +52,8 @@ | |||
52 | #define S5PV210_GPIO_MP01_NR (8) | 52 | #define S5PV210_GPIO_MP01_NR (8) |
53 | #define S5PV210_GPIO_MP02_NR (4) | 53 | #define S5PV210_GPIO_MP02_NR (4) |
54 | #define S5PV210_GPIO_MP03_NR (8) | 54 | #define S5PV210_GPIO_MP03_NR (8) |
55 | #define S5PV210_GPIO_MP04_NR (8) | ||
56 | #define S5PV210_GPIO_MP05_NR (8) | ||
55 | 57 | ||
56 | /* GPIO bank numbers */ | 58 | /* GPIO bank numbers */ |
57 | 59 | ||
@@ -94,6 +96,8 @@ enum s5p_gpio_number { | |||
94 | S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4), | 96 | S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4), |
95 | S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01), | 97 | S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01), |
96 | S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02), | 98 | S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02), |
99 | S5PV210_GPIO_MP04_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP03), | ||
100 | S5PV210_GPIO_MP05_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP04), | ||
97 | }; | 101 | }; |
98 | 102 | ||
99 | /* S5PV210 GPIO number definitions */ | 103 | /* S5PV210 GPIO number definitions */ |
@@ -127,13 +131,15 @@ enum s5p_gpio_number { | |||
127 | #define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr)) | 131 | #define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr)) |
128 | #define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr)) | 132 | #define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr)) |
129 | #define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr)) | 133 | #define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr)) |
134 | #define S5PV210_MP04(_nr) (S5PV210_GPIO_MP04_START + (_nr)) | ||
135 | #define S5PV210_MP05(_nr) (S5PV210_GPIO_MP05_START + (_nr)) | ||
130 | 136 | ||
131 | /* the end of the S5PV210 specific gpios */ | 137 | /* the end of the S5PV210 specific gpios */ |
132 | #define S5PV210_GPIO_END (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + 1) | 138 | #define S5PV210_GPIO_END (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + 1) |
133 | #define S3C_GPIO_END S5PV210_GPIO_END | 139 | #define S3C_GPIO_END S5PV210_GPIO_END |
134 | 140 | ||
135 | /* define the number of gpios we need to the one after the MP03() range */ | 141 | /* define the number of gpios we need to the one after the MP05() range */ |
136 | #define ARCH_NR_GPIOS (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + \ | 142 | #define ARCH_NR_GPIOS (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + \ |
137 | CONFIG_SAMSUNG_GPIO_EXTRA + 1) | 143 | CONFIG_SAMSUNG_GPIO_EXTRA + 1) |
138 | 144 | ||
139 | #include <asm-generic/gpio.h> | 145 | #include <asm-generic/gpio.h> |
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h index 96895378ea27..e1c020e5a49b 100644 --- a/arch/arm/mach-s5pv210/include/mach/irqs.h +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h | |||
@@ -36,7 +36,7 @@ | |||
36 | 36 | ||
37 | /* VIC1: ARM, Power, Memory, Connectivity, Storage */ | 37 | /* VIC1: ARM, Power, Memory, Connectivity, Storage */ |
38 | 38 | ||
39 | #define IRQ_CORTEX0 S5P_IRQ_VIC1(0) | 39 | #define IRQ_PMU S5P_IRQ_VIC1(0) |
40 | #define IRQ_CORTEX1 S5P_IRQ_VIC1(1) | 40 | #define IRQ_CORTEX1 S5P_IRQ_VIC1(1) |
41 | #define IRQ_CORTEX2 S5P_IRQ_VIC1(2) | 41 | #define IRQ_CORTEX2 S5P_IRQ_VIC1(2) |
42 | #define IRQ_CORTEX3 S5P_IRQ_VIC1(3) | 42 | #define IRQ_CORTEX3 S5P_IRQ_VIC1(3) |
@@ -45,7 +45,7 @@ | |||
45 | #define IRQ_IEMIEC S5P_IRQ_VIC1(6) | 45 | #define IRQ_IEMIEC S5P_IRQ_VIC1(6) |
46 | #define IRQ_ONENAND S5P_IRQ_VIC1(7) | 46 | #define IRQ_ONENAND S5P_IRQ_VIC1(7) |
47 | #define IRQ_NFC S5P_IRQ_VIC1(8) | 47 | #define IRQ_NFC S5P_IRQ_VIC1(8) |
48 | #define IRQ_CFC S5P_IRQ_VIC1(9) | 48 | #define IRQ_CFCON S5P_IRQ_VIC1(9) |
49 | #define IRQ_UART0 S5P_IRQ_VIC1(10) | 49 | #define IRQ_UART0 S5P_IRQ_VIC1(10) |
50 | #define IRQ_UART1 S5P_IRQ_VIC1(11) | 50 | #define IRQ_UART1 S5P_IRQ_VIC1(11) |
51 | #define IRQ_UART2 S5P_IRQ_VIC1(12) | 51 | #define IRQ_UART2 S5P_IRQ_VIC1(12) |
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h index 34eb168ec950..dd4fb6bf14b5 100644 --- a/arch/arm/mach-s5pv210/include/mach/map.h +++ b/arch/arm/mach-s5pv210/include/mach/map.h | |||
@@ -32,6 +32,8 @@ | |||
32 | #define S5PV210_PA_SPI0 0xE1300000 | 32 | #define S5PV210_PA_SPI0 0xE1300000 |
33 | #define S5PV210_PA_SPI1 0xE1400000 | 33 | #define S5PV210_PA_SPI1 0xE1400000 |
34 | 34 | ||
35 | #define S5PV210_PA_KEYPAD (0xE1600000) | ||
36 | |||
35 | #define S5PV210_PA_IIC0 (0xE1800000) | 37 | #define S5PV210_PA_IIC0 (0xE1800000) |
36 | #define S5PV210_PA_IIC1 (0xFAB00000) | 38 | #define S5PV210_PA_IIC1 (0xFAB00000) |
37 | #define S5PV210_PA_IIC2 (0xE1A00000) | 39 | #define S5PV210_PA_IIC2 (0xE1A00000) |
@@ -43,6 +45,7 @@ | |||
43 | 45 | ||
44 | #define S5PV210_PA_WATCHDOG (0xE2700000) | 46 | #define S5PV210_PA_WATCHDOG (0xE2700000) |
45 | 47 | ||
48 | #define S5PV210_PA_RTC (0xE2800000) | ||
46 | #define S5PV210_PA_UART (0xE2900000) | 49 | #define S5PV210_PA_UART (0xE2900000) |
47 | 50 | ||
48 | #define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) | 51 | #define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) |
@@ -54,12 +57,18 @@ | |||
54 | 57 | ||
55 | #define S5PV210_PA_SROMC (0xE8000000) | 58 | #define S5PV210_PA_SROMC (0xE8000000) |
56 | 59 | ||
60 | #define S5PV210_PA_CFCON (0xE8200000) | ||
61 | |||
57 | #define S5PV210_PA_MDMA 0xFA200000 | 62 | #define S5PV210_PA_MDMA 0xFA200000 |
58 | #define S5PV210_PA_PDMA0 0xE0900000 | 63 | #define S5PV210_PA_PDMA0 0xE0900000 |
59 | #define S5PV210_PA_PDMA1 0xE0A00000 | 64 | #define S5PV210_PA_PDMA1 0xE0A00000 |
60 | 65 | ||
61 | #define S5PV210_PA_FB (0xF8000000) | 66 | #define S5PV210_PA_FB (0xF8000000) |
62 | 67 | ||
68 | #define S5PV210_PA_FIMC0 (0xFB200000) | ||
69 | #define S5PV210_PA_FIMC1 (0xFB300000) | ||
70 | #define S5PV210_PA_FIMC2 (0xFB400000) | ||
71 | |||
63 | #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) | 72 | #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) |
64 | 73 | ||
65 | #define S5PV210_PA_VIC0 (0xF2000000) | 74 | #define S5PV210_PA_VIC0 (0xF2000000) |
@@ -97,12 +106,19 @@ | |||
97 | #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) | 106 | #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) |
98 | #define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) | 107 | #define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) |
99 | #define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) | 108 | #define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) |
109 | #define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3) | ||
100 | #define S3C_PA_IIC S5PV210_PA_IIC0 | 110 | #define S3C_PA_IIC S5PV210_PA_IIC0 |
101 | #define S3C_PA_IIC1 S5PV210_PA_IIC1 | 111 | #define S3C_PA_IIC1 S5PV210_PA_IIC1 |
102 | #define S3C_PA_IIC2 S5PV210_PA_IIC2 | 112 | #define S3C_PA_IIC2 S5PV210_PA_IIC2 |
103 | #define S3C_PA_FB S5PV210_PA_FB | 113 | #define S3C_PA_FB S5PV210_PA_FB |
114 | #define S3C_PA_RTC S5PV210_PA_RTC | ||
104 | #define S3C_PA_WDT S5PV210_PA_WATCHDOG | 115 | #define S3C_PA_WDT S5PV210_PA_WATCHDOG |
116 | #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 | ||
117 | #define S5P_PA_FIMC1 S5PV210_PA_FIMC1 | ||
118 | #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 | ||
105 | 119 | ||
106 | #define SAMSUNG_PA_ADC S5PV210_PA_ADC | 120 | #define SAMSUNG_PA_ADC S5PV210_PA_ADC |
121 | #define SAMSUNG_PA_CFCON S5PV210_PA_CFCON | ||
122 | #define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD | ||
107 | 123 | ||
108 | #endif /* __ASM_ARCH_MAP_H */ | 124 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5pv210/include/mach/memory.h b/arch/arm/mach-s5pv210/include/mach/memory.h index 379117e27600..d503e0c4ce4f 100644 --- a/arch/arm/mach-s5pv210/include/mach/memory.h +++ b/arch/arm/mach-s5pv210/include/mach/memory.h | |||
@@ -16,8 +16,13 @@ | |||
16 | #define PHYS_OFFSET UL(0x20000000) | 16 | #define PHYS_OFFSET UL(0x20000000) |
17 | #define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M) | 17 | #define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M) |
18 | 18 | ||
19 | /* Maximum of 256MiB in one bank */ | 19 | /* |
20 | #define MAX_PHYSMEM_BITS 32 | 20 | * Sparsemem support |
21 | * Physical memory can be located from 0x20000000 to 0x7fffffff, | ||
22 | * so MAX_PHYSMEM_BITS is 31. | ||
23 | */ | ||
24 | |||
25 | #define MAX_PHYSMEM_BITS 31 | ||
21 | #define SECTION_SIZE_BITS 28 | 26 | #define SECTION_SIZE_BITS 28 |
22 | 27 | ||
23 | #endif /* __ASM_ARCH_MEMORY_H */ | 28 | #endif /* __ASM_ARCH_MEMORY_H */ |
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h index 2a25ab40c863..499aef737476 100644 --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h | |||
@@ -90,6 +90,8 @@ | |||
90 | #define S5P_CLKDIV0_PCLK66_SHIFT (28) | 90 | #define S5P_CLKDIV0_PCLK66_SHIFT (28) |
91 | #define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT) | 91 | #define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT) |
92 | 92 | ||
93 | #define S5P_SWRESET S5P_CLKREG(0x2000) | ||
94 | |||
93 | /* Registers related to power management */ | 95 | /* Registers related to power management */ |
94 | #define S5P_PWR_CFG S5P_CLKREG(0xC000) | 96 | #define S5P_PWR_CFG S5P_CLKREG(0xC000) |
95 | #define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004) | 97 | #define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004) |
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h index 1ca04d5025b3..af8a200b2135 100644 --- a/arch/arm/mach-s5pv210/include/mach/system.h +++ b/arch/arm/mach-s5pv210/include/mach/system.h | |||
@@ -13,12 +13,9 @@ | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | 13 | #ifndef __ASM_ARCH_SYSTEM_H |
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | 14 | #define __ASM_ARCH_SYSTEM_H __FILE__ |
15 | 15 | ||
16 | static void arch_idle(void) | 16 | #include <plat/system-reset.h> |
17 | { | ||
18 | /* nothing here yet */ | ||
19 | } | ||
20 | 17 | ||
21 | static void arch_reset(char mode, const char *cmd) | 18 | static void arch_idle(void) |
22 | { | 19 | { |
23 | /* nothing here yet */ | 20 | /* nothing here yet */ |
24 | } | 21 | } |
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c index 10bc76ec4025..e41266419a3f 100644 --- a/arch/arm/mach-s5pv210/mach-aquila.c +++ b/arch/arm/mach-s5pv210/mach-aquila.c | |||
@@ -13,6 +13,12 @@ | |||
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/serial_core.h> | 14 | #include <linux/serial_core.h> |
15 | #include <linux/fb.h> | 15 | #include <linux/fb.h> |
16 | #include <linux/i2c.h> | ||
17 | #include <linux/i2c-gpio.h> | ||
18 | #include <linux/mfd/max8998.h> | ||
19 | #include <linux/gpio_keys.h> | ||
20 | #include <linux/input.h> | ||
21 | #include <linux/gpio.h> | ||
16 | 22 | ||
17 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
18 | #include <asm/mach/map.h> | 24 | #include <asm/mach/map.h> |
@@ -23,54 +29,63 @@ | |||
23 | #include <mach/regs-clock.h> | 29 | #include <mach/regs-clock.h> |
24 | #include <mach/regs-fb.h> | 30 | #include <mach/regs-fb.h> |
25 | 31 | ||
32 | #include <plat/gpio-cfg.h> | ||
26 | #include <plat/regs-serial.h> | 33 | #include <plat/regs-serial.h> |
27 | #include <plat/s5pv210.h> | 34 | #include <plat/s5pv210.h> |
28 | #include <plat/devs.h> | 35 | #include <plat/devs.h> |
29 | #include <plat/cpu.h> | 36 | #include <plat/cpu.h> |
30 | #include <plat/fb.h> | 37 | #include <plat/fb.h> |
38 | #include <plat/fimc-core.h> | ||
39 | #include <plat/sdhci.h> | ||
31 | 40 | ||
32 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 41 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
33 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 42 | #define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
34 | S3C2410_UCON_RXILEVEL | \ | 43 | S3C2410_UCON_RXILEVEL | \ |
35 | S3C2410_UCON_TXIRQMODE | \ | 44 | S3C2410_UCON_TXIRQMODE | \ |
36 | S3C2410_UCON_RXIRQMODE | \ | 45 | S3C2410_UCON_RXIRQMODE | \ |
37 | S3C2410_UCON_RXFIFO_TOI | \ | 46 | S3C2410_UCON_RXFIFO_TOI | \ |
38 | S3C2443_UCON_RXERR_IRQEN) | 47 | S3C2443_UCON_RXERR_IRQEN) |
39 | 48 | ||
40 | #define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 | 49 | #define AQUILA_ULCON_DEFAULT S3C2410_LCON_CS8 |
41 | 50 | ||
42 | #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | 51 | #define AQUILA_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE |
43 | S5PV210_UFCON_TXTRIG4 | \ | ||
44 | S5PV210_UFCON_RXTRIG4) | ||
45 | 52 | ||
46 | static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { | 53 | static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = { |
47 | [0] = { | 54 | [0] = { |
48 | .hwport = 0, | 55 | .hwport = 0, |
49 | .flags = 0, | 56 | .flags = 0, |
50 | .ucon = S5PV210_UCON_DEFAULT, | 57 | .ucon = AQUILA_UCON_DEFAULT, |
51 | .ulcon = S5PV210_ULCON_DEFAULT, | 58 | .ulcon = AQUILA_ULCON_DEFAULT, |
52 | .ufcon = S5PV210_UFCON_DEFAULT, | 59 | /* |
60 | * Actually UART0 can support 256 bytes fifo, but aquila board | ||
61 | * supports 128 bytes fifo because of initial chip bug | ||
62 | */ | ||
63 | .ufcon = AQUILA_UFCON_DEFAULT | | ||
64 | S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128, | ||
53 | }, | 65 | }, |
54 | [1] = { | 66 | [1] = { |
55 | .hwport = 1, | 67 | .hwport = 1, |
56 | .flags = 0, | 68 | .flags = 0, |
57 | .ucon = S5PV210_UCON_DEFAULT, | 69 | .ucon = AQUILA_UCON_DEFAULT, |
58 | .ulcon = S5PV210_ULCON_DEFAULT, | 70 | .ulcon = AQUILA_ULCON_DEFAULT, |
59 | .ufcon = S5PV210_UFCON_DEFAULT, | 71 | .ufcon = AQUILA_UFCON_DEFAULT | |
72 | S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64, | ||
60 | }, | 73 | }, |
61 | [2] = { | 74 | [2] = { |
62 | .hwport = 2, | 75 | .hwport = 2, |
63 | .flags = 0, | 76 | .flags = 0, |
64 | .ucon = S5PV210_UCON_DEFAULT, | 77 | .ucon = AQUILA_UCON_DEFAULT, |
65 | .ulcon = S5PV210_ULCON_DEFAULT, | 78 | .ulcon = AQUILA_ULCON_DEFAULT, |
66 | .ufcon = S5PV210_UFCON_DEFAULT, | 79 | .ufcon = AQUILA_UFCON_DEFAULT | |
80 | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, | ||
67 | }, | 81 | }, |
68 | [3] = { | 82 | [3] = { |
69 | .hwport = 3, | 83 | .hwport = 3, |
70 | .flags = 0, | 84 | .flags = 0, |
71 | .ucon = S5PV210_UCON_DEFAULT, | 85 | .ucon = AQUILA_UCON_DEFAULT, |
72 | .ulcon = S5PV210_ULCON_DEFAULT, | 86 | .ulcon = AQUILA_ULCON_DEFAULT, |
73 | .ufcon = S5PV210_UFCON_DEFAULT, | 87 | .ufcon = AQUILA_UFCON_DEFAULT | |
88 | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, | ||
74 | }, | 89 | }, |
75 | }; | 90 | }; |
76 | 91 | ||
@@ -116,19 +131,383 @@ static struct s3c_fb_platdata aquila_lcd_pdata __initdata = { | |||
116 | .setup_gpio = s5pv210_fb_gpio_setup_24bpp, | 131 | .setup_gpio = s5pv210_fb_gpio_setup_24bpp, |
117 | }; | 132 | }; |
118 | 133 | ||
134 | /* MAX8998 regulators */ | ||
135 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) | ||
136 | |||
137 | static struct regulator_init_data aquila_ldo2_data = { | ||
138 | .constraints = { | ||
139 | .name = "VALIVE_1.1V", | ||
140 | .min_uV = 1100000, | ||
141 | .max_uV = 1100000, | ||
142 | .apply_uV = 1, | ||
143 | .always_on = 1, | ||
144 | .state_mem = { | ||
145 | .enabled = 1, | ||
146 | }, | ||
147 | }, | ||
148 | }; | ||
149 | |||
150 | static struct regulator_init_data aquila_ldo3_data = { | ||
151 | .constraints = { | ||
152 | .name = "VUSB/MIPI_1.1V", | ||
153 | .min_uV = 1100000, | ||
154 | .max_uV = 1100000, | ||
155 | .apply_uV = 1, | ||
156 | .always_on = 1, | ||
157 | }, | ||
158 | }; | ||
159 | |||
160 | static struct regulator_init_data aquila_ldo4_data = { | ||
161 | .constraints = { | ||
162 | .name = "VDAC_3.3V", | ||
163 | .min_uV = 3300000, | ||
164 | .max_uV = 3300000, | ||
165 | .apply_uV = 1, | ||
166 | }, | ||
167 | }; | ||
168 | |||
169 | static struct regulator_init_data aquila_ldo5_data = { | ||
170 | .constraints = { | ||
171 | .name = "VTF_2.8V", | ||
172 | .min_uV = 2800000, | ||
173 | .max_uV = 2800000, | ||
174 | .apply_uV = 1, | ||
175 | }, | ||
176 | }; | ||
177 | |||
178 | static struct regulator_init_data aquila_ldo6_data = { | ||
179 | .constraints = { | ||
180 | .name = "VCC_3.3V", | ||
181 | .min_uV = 3300000, | ||
182 | .max_uV = 3300000, | ||
183 | .apply_uV = 1, | ||
184 | }, | ||
185 | }; | ||
186 | |||
187 | static struct regulator_init_data aquila_ldo7_data = { | ||
188 | .constraints = { | ||
189 | .name = "VCC_3.0V", | ||
190 | .min_uV = 3000000, | ||
191 | .max_uV = 3000000, | ||
192 | .apply_uV = 1, | ||
193 | .boot_on = 1, | ||
194 | .always_on = 1, | ||
195 | }, | ||
196 | }; | ||
197 | |||
198 | static struct regulator_init_data aquila_ldo8_data = { | ||
199 | .constraints = { | ||
200 | .name = "VUSB/VADC_3.3V", | ||
201 | .min_uV = 3300000, | ||
202 | .max_uV = 3300000, | ||
203 | .apply_uV = 1, | ||
204 | .always_on = 1, | ||
205 | }, | ||
206 | }; | ||
207 | |||
208 | static struct regulator_init_data aquila_ldo9_data = { | ||
209 | .constraints = { | ||
210 | .name = "VCC/VCAM_2.8V", | ||
211 | .min_uV = 2800000, | ||
212 | .max_uV = 2800000, | ||
213 | .apply_uV = 1, | ||
214 | .always_on = 1, | ||
215 | }, | ||
216 | }; | ||
217 | |||
218 | static struct regulator_init_data aquila_ldo10_data = { | ||
219 | .constraints = { | ||
220 | .name = "VPLL_1.1V", | ||
221 | .min_uV = 1100000, | ||
222 | .max_uV = 1100000, | ||
223 | .apply_uV = 1, | ||
224 | .boot_on = 1, | ||
225 | }, | ||
226 | }; | ||
227 | |||
228 | static struct regulator_init_data aquila_ldo11_data = { | ||
229 | .constraints = { | ||
230 | .name = "CAM_IO_2.8V", | ||
231 | .min_uV = 2800000, | ||
232 | .max_uV = 2800000, | ||
233 | .apply_uV = 1, | ||
234 | .always_on = 1, | ||
235 | }, | ||
236 | }; | ||
237 | |||
238 | static struct regulator_init_data aquila_ldo12_data = { | ||
239 | .constraints = { | ||
240 | .name = "CAM_ISP_1.2V", | ||
241 | .min_uV = 1200000, | ||
242 | .max_uV = 1200000, | ||
243 | .apply_uV = 1, | ||
244 | .always_on = 1, | ||
245 | }, | ||
246 | }; | ||
247 | |||
248 | static struct regulator_init_data aquila_ldo13_data = { | ||
249 | .constraints = { | ||
250 | .name = "CAM_A_2.8V", | ||
251 | .min_uV = 2800000, | ||
252 | .max_uV = 2800000, | ||
253 | .apply_uV = 1, | ||
254 | .always_on = 1, | ||
255 | }, | ||
256 | }; | ||
257 | |||
258 | static struct regulator_init_data aquila_ldo14_data = { | ||
259 | .constraints = { | ||
260 | .name = "CAM_CIF_1.8V", | ||
261 | .min_uV = 1800000, | ||
262 | .max_uV = 1800000, | ||
263 | .apply_uV = 1, | ||
264 | .always_on = 1, | ||
265 | }, | ||
266 | }; | ||
267 | |||
268 | static struct regulator_init_data aquila_ldo15_data = { | ||
269 | .constraints = { | ||
270 | .name = "CAM_AF_3.3V", | ||
271 | .min_uV = 3300000, | ||
272 | .max_uV = 3300000, | ||
273 | .apply_uV = 1, | ||
274 | .always_on = 1, | ||
275 | }, | ||
276 | }; | ||
277 | |||
278 | static struct regulator_init_data aquila_ldo16_data = { | ||
279 | .constraints = { | ||
280 | .name = "VMIPI_1.8V", | ||
281 | .min_uV = 1800000, | ||
282 | .max_uV = 1800000, | ||
283 | .apply_uV = 1, | ||
284 | .always_on = 1, | ||
285 | }, | ||
286 | }; | ||
287 | |||
288 | static struct regulator_init_data aquila_ldo17_data = { | ||
289 | .constraints = { | ||
290 | .name = "CAM_8M_1.8V", | ||
291 | .min_uV = 1800000, | ||
292 | .max_uV = 1800000, | ||
293 | .apply_uV = 1, | ||
294 | .always_on = 1, | ||
295 | }, | ||
296 | }; | ||
297 | |||
298 | /* BUCK */ | ||
299 | static struct regulator_consumer_supply buck1_consumer[] = { | ||
300 | { .supply = "vddarm", }, | ||
301 | }; | ||
302 | |||
303 | static struct regulator_consumer_supply buck2_consumer[] = { | ||
304 | { .supply = "vddint", }, | ||
305 | }; | ||
306 | |||
307 | static struct regulator_init_data aquila_buck1_data = { | ||
308 | .constraints = { | ||
309 | .name = "VARM_1.2V", | ||
310 | .min_uV = 1200000, | ||
311 | .max_uV = 1200000, | ||
312 | .apply_uV = 1, | ||
313 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
314 | REGULATOR_CHANGE_STATUS, | ||
315 | }, | ||
316 | .num_consumer_supplies = ARRAY_SIZE(buck1_consumer), | ||
317 | .consumer_supplies = buck1_consumer, | ||
318 | }; | ||
319 | |||
320 | static struct regulator_init_data aquila_buck2_data = { | ||
321 | .constraints = { | ||
322 | .name = "VINT_1.2V", | ||
323 | .min_uV = 1200000, | ||
324 | .max_uV = 1200000, | ||
325 | .apply_uV = 1, | ||
326 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
327 | REGULATOR_CHANGE_STATUS, | ||
328 | }, | ||
329 | .num_consumer_supplies = ARRAY_SIZE(buck2_consumer), | ||
330 | .consumer_supplies = buck2_consumer, | ||
331 | }; | ||
332 | |||
333 | static struct regulator_init_data aquila_buck3_data = { | ||
334 | .constraints = { | ||
335 | .name = "VCC_1.8V", | ||
336 | .min_uV = 1800000, | ||
337 | .max_uV = 1800000, | ||
338 | .apply_uV = 1, | ||
339 | .state_mem = { | ||
340 | .enabled = 1, | ||
341 | }, | ||
342 | }, | ||
343 | }; | ||
344 | |||
345 | static struct regulator_init_data aquila_buck4_data = { | ||
346 | .constraints = { | ||
347 | .name = "CAM_CORE_1.2V", | ||
348 | .min_uV = 1200000, | ||
349 | .max_uV = 1200000, | ||
350 | .apply_uV = 1, | ||
351 | .always_on = 1, | ||
352 | }, | ||
353 | }; | ||
354 | |||
355 | static struct max8998_regulator_data aquila_regulators[] = { | ||
356 | { MAX8998_LDO2, &aquila_ldo2_data }, | ||
357 | { MAX8998_LDO3, &aquila_ldo3_data }, | ||
358 | { MAX8998_LDO4, &aquila_ldo4_data }, | ||
359 | { MAX8998_LDO5, &aquila_ldo5_data }, | ||
360 | { MAX8998_LDO6, &aquila_ldo6_data }, | ||
361 | { MAX8998_LDO7, &aquila_ldo7_data }, | ||
362 | { MAX8998_LDO8, &aquila_ldo8_data }, | ||
363 | { MAX8998_LDO9, &aquila_ldo9_data }, | ||
364 | { MAX8998_LDO10, &aquila_ldo10_data }, | ||
365 | { MAX8998_LDO11, &aquila_ldo11_data }, | ||
366 | { MAX8998_LDO12, &aquila_ldo12_data }, | ||
367 | { MAX8998_LDO13, &aquila_ldo13_data }, | ||
368 | { MAX8998_LDO14, &aquila_ldo14_data }, | ||
369 | { MAX8998_LDO15, &aquila_ldo15_data }, | ||
370 | { MAX8998_LDO16, &aquila_ldo16_data }, | ||
371 | { MAX8998_LDO17, &aquila_ldo17_data }, | ||
372 | { MAX8998_BUCK1, &aquila_buck1_data }, | ||
373 | { MAX8998_BUCK2, &aquila_buck2_data }, | ||
374 | { MAX8998_BUCK3, &aquila_buck3_data }, | ||
375 | { MAX8998_BUCK4, &aquila_buck4_data }, | ||
376 | }; | ||
377 | |||
378 | static struct max8998_platform_data aquila_max8998_pdata = { | ||
379 | .num_regulators = ARRAY_SIZE(aquila_regulators), | ||
380 | .regulators = aquila_regulators, | ||
381 | }; | ||
382 | #endif | ||
383 | |||
384 | /* GPIO I2C PMIC */ | ||
385 | #define AP_I2C_GPIO_PMIC_BUS_4 4 | ||
386 | static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = { | ||
387 | .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */ | ||
388 | .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */ | ||
389 | }; | ||
390 | |||
391 | static struct platform_device aquila_i2c_gpio_pmic = { | ||
392 | .name = "i2c-gpio", | ||
393 | .id = AP_I2C_GPIO_PMIC_BUS_4, | ||
394 | .dev = { | ||
395 | .platform_data = &aquila_i2c_gpio_pmic_data, | ||
396 | }, | ||
397 | }; | ||
398 | |||
399 | static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = { | ||
400 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) | ||
401 | { | ||
402 | /* 0xCC when SRAD = 0 */ | ||
403 | I2C_BOARD_INFO("max8998", 0xCC >> 1), | ||
404 | .platform_data = &aquila_max8998_pdata, | ||
405 | }, | ||
406 | #endif | ||
407 | }; | ||
408 | |||
409 | /* PMIC Power button */ | ||
410 | static struct gpio_keys_button aquila_gpio_keys_table[] = { | ||
411 | { | ||
412 | .code = KEY_POWER, | ||
413 | .gpio = S5PV210_GPH2(6), | ||
414 | .desc = "gpio-keys: KEY_POWER", | ||
415 | .type = EV_KEY, | ||
416 | .active_low = 1, | ||
417 | .wakeup = 1, | ||
418 | .debounce_interval = 1, | ||
419 | }, | ||
420 | }; | ||
421 | |||
422 | static struct gpio_keys_platform_data aquila_gpio_keys_data = { | ||
423 | .buttons = aquila_gpio_keys_table, | ||
424 | .nbuttons = ARRAY_SIZE(aquila_gpio_keys_table), | ||
425 | }; | ||
426 | |||
427 | static struct platform_device aquila_device_gpiokeys = { | ||
428 | .name = "gpio-keys", | ||
429 | .dev = { | ||
430 | .platform_data = &aquila_gpio_keys_data, | ||
431 | }, | ||
432 | }; | ||
433 | |||
434 | static void __init aquila_pmic_init(void) | ||
435 | { | ||
436 | /* AP_PMIC_IRQ: EINT7 */ | ||
437 | s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf)); | ||
438 | s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP); | ||
439 | |||
440 | /* nPower: EINT22 */ | ||
441 | s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf)); | ||
442 | s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP); | ||
443 | } | ||
444 | |||
445 | /* MoviNAND */ | ||
446 | static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = { | ||
447 | .max_width = 4, | ||
448 | .cd_type = S3C_SDHCI_CD_PERMANENT, | ||
449 | }; | ||
450 | |||
451 | /* Wireless LAN */ | ||
452 | static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = { | ||
453 | .max_width = 4, | ||
454 | .cd_type = S3C_SDHCI_CD_EXTERNAL, | ||
455 | /* ext_cd_{init,cleanup} callbacks will be added later */ | ||
456 | }; | ||
457 | |||
458 | /* External Flash */ | ||
459 | #define AQUILA_EXT_FLASH_EN S5PV210_MP05(4) | ||
460 | #define AQUILA_EXT_FLASH_CD S5PV210_GPH3(4) | ||
461 | static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = { | ||
462 | .max_width = 4, | ||
463 | .cd_type = S3C_SDHCI_CD_GPIO, | ||
464 | .ext_cd_gpio = AQUILA_EXT_FLASH_CD, | ||
465 | .ext_cd_gpio_invert = 1, | ||
466 | }; | ||
467 | |||
468 | static void aquila_setup_sdhci(void) | ||
469 | { | ||
470 | gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN"); | ||
471 | gpio_direction_output(AQUILA_EXT_FLASH_EN, 1); | ||
472 | |||
473 | s3c_sdhci0_set_platdata(&aquila_hsmmc0_data); | ||
474 | s3c_sdhci1_set_platdata(&aquila_hsmmc1_data); | ||
475 | s3c_sdhci2_set_platdata(&aquila_hsmmc2_data); | ||
476 | }; | ||
477 | |||
119 | static struct platform_device *aquila_devices[] __initdata = { | 478 | static struct platform_device *aquila_devices[] __initdata = { |
479 | &aquila_i2c_gpio_pmic, | ||
480 | &aquila_device_gpiokeys, | ||
120 | &s3c_device_fb, | 481 | &s3c_device_fb, |
482 | &s5pc110_device_onenand, | ||
483 | &s3c_device_hsmmc0, | ||
484 | &s3c_device_hsmmc1, | ||
485 | &s3c_device_hsmmc2, | ||
486 | &s5p_device_fimc0, | ||
487 | &s5p_device_fimc1, | ||
488 | &s5p_device_fimc2, | ||
121 | }; | 489 | }; |
122 | 490 | ||
123 | static void __init aquila_map_io(void) | 491 | static void __init aquila_map_io(void) |
124 | { | 492 | { |
125 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 493 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); |
126 | s3c24xx_init_clocks(24000000); | 494 | s3c24xx_init_clocks(24000000); |
127 | s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); | 495 | s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs)); |
128 | } | 496 | } |
129 | 497 | ||
130 | static void __init aquila_machine_init(void) | 498 | static void __init aquila_machine_init(void) |
131 | { | 499 | { |
500 | /* PMIC */ | ||
501 | aquila_pmic_init(); | ||
502 | i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs, | ||
503 | ARRAY_SIZE(i2c_gpio_pmic_devs)); | ||
504 | /* SDHCI */ | ||
505 | aquila_setup_sdhci(); | ||
506 | |||
507 | s3c_fimc_setname(0, "s5p-fimc"); | ||
508 | s3c_fimc_setname(1, "s5p-fimc"); | ||
509 | s3c_fimc_setname(2, "s5p-fimc"); | ||
510 | |||
132 | /* FB */ | 511 | /* FB */ |
133 | s3c_fb_set_platdata(&aquila_lcd_pdata); | 512 | s3c_fb_set_platdata(&aquila_lcd_pdata); |
134 | 513 | ||
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index 4863b13824e4..53754d7d364e 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c | |||
@@ -12,6 +12,13 @@ | |||
12 | #include <linux/types.h> | 12 | #include <linux/types.h> |
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/serial_core.h> | 14 | #include <linux/serial_core.h> |
15 | #include <linux/fb.h> | ||
16 | #include <linux/i2c.h> | ||
17 | #include <linux/i2c-gpio.h> | ||
18 | #include <linux/mfd/max8998.h> | ||
19 | #include <linux/gpio_keys.h> | ||
20 | #include <linux/input.h> | ||
21 | #include <linux/gpio.h> | ||
15 | 22 | ||
16 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
17 | #include <asm/mach/map.h> | 24 | #include <asm/mach/map.h> |
@@ -20,58 +27,444 @@ | |||
20 | 27 | ||
21 | #include <mach/map.h> | 28 | #include <mach/map.h> |
22 | #include <mach/regs-clock.h> | 29 | #include <mach/regs-clock.h> |
30 | #include <mach/regs-fb.h> | ||
23 | 31 | ||
32 | #include <plat/gpio-cfg.h> | ||
24 | #include <plat/regs-serial.h> | 33 | #include <plat/regs-serial.h> |
25 | #include <plat/s5pv210.h> | 34 | #include <plat/s5pv210.h> |
26 | #include <plat/devs.h> | 35 | #include <plat/devs.h> |
27 | #include <plat/cpu.h> | 36 | #include <plat/cpu.h> |
37 | #include <plat/fb.h> | ||
38 | #include <plat/sdhci.h> | ||
28 | 39 | ||
29 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 40 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
30 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 41 | #define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
31 | S3C2410_UCON_RXILEVEL | \ | 42 | S3C2410_UCON_RXILEVEL | \ |
32 | S3C2410_UCON_TXIRQMODE | \ | 43 | S3C2410_UCON_TXIRQMODE | \ |
33 | S3C2410_UCON_RXIRQMODE | \ | 44 | S3C2410_UCON_RXIRQMODE | \ |
34 | S3C2410_UCON_RXFIFO_TOI | \ | 45 | S3C2410_UCON_RXFIFO_TOI | \ |
35 | S3C2443_UCON_RXERR_IRQEN) | 46 | S3C2443_UCON_RXERR_IRQEN) |
36 | 47 | ||
37 | #define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 | 48 | #define GONI_ULCON_DEFAULT S3C2410_LCON_CS8 |
38 | 49 | ||
39 | #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | 50 | #define GONI_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE |
40 | S5PV210_UFCON_TXTRIG4 | \ | ||
41 | S5PV210_UFCON_RXTRIG4) | ||
42 | 51 | ||
43 | static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = { | 52 | static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = { |
44 | [0] = { | 53 | [0] = { |
45 | .hwport = 0, | 54 | .hwport = 0, |
46 | .flags = 0, | 55 | .flags = 0, |
47 | .ucon = S5PV210_UCON_DEFAULT, | 56 | .ucon = GONI_UCON_DEFAULT, |
48 | .ulcon = S5PV210_ULCON_DEFAULT, | 57 | .ulcon = GONI_ULCON_DEFAULT, |
49 | .ufcon = S5PV210_UFCON_DEFAULT, | 58 | .ufcon = GONI_UFCON_DEFAULT | |
59 | S5PV210_UFCON_TXTRIG256 | S5PV210_UFCON_RXTRIG256, | ||
50 | }, | 60 | }, |
51 | [1] = { | 61 | [1] = { |
52 | .hwport = 1, | 62 | .hwport = 1, |
53 | .flags = 0, | 63 | .flags = 0, |
54 | .ucon = S5PV210_UCON_DEFAULT, | 64 | .ucon = GONI_UCON_DEFAULT, |
55 | .ulcon = S5PV210_ULCON_DEFAULT, | 65 | .ulcon = GONI_ULCON_DEFAULT, |
56 | .ufcon = S5PV210_UFCON_DEFAULT, | 66 | .ufcon = GONI_UFCON_DEFAULT | |
67 | S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64, | ||
57 | }, | 68 | }, |
58 | [2] = { | 69 | [2] = { |
59 | .hwport = 2, | 70 | .hwport = 2, |
60 | .flags = 0, | 71 | .flags = 0, |
61 | .ucon = S5PV210_UCON_DEFAULT, | 72 | .ucon = GONI_UCON_DEFAULT, |
62 | .ulcon = S5PV210_ULCON_DEFAULT, | 73 | .ulcon = GONI_ULCON_DEFAULT, |
63 | .ufcon = S5PV210_UFCON_DEFAULT, | 74 | .ufcon = GONI_UFCON_DEFAULT | |
75 | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, | ||
64 | }, | 76 | }, |
65 | [3] = { | 77 | [3] = { |
66 | .hwport = 3, | 78 | .hwport = 3, |
67 | .flags = 0, | 79 | .flags = 0, |
68 | .ucon = S5PV210_UCON_DEFAULT, | 80 | .ucon = GONI_UCON_DEFAULT, |
69 | .ulcon = S5PV210_ULCON_DEFAULT, | 81 | .ulcon = GONI_ULCON_DEFAULT, |
70 | .ufcon = S5PV210_UFCON_DEFAULT, | 82 | .ufcon = GONI_UFCON_DEFAULT | |
83 | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, | ||
71 | }, | 84 | }, |
72 | }; | 85 | }; |
73 | 86 | ||
87 | /* Frame Buffer */ | ||
88 | static struct s3c_fb_pd_win goni_fb_win0 = { | ||
89 | .win_mode = { | ||
90 | .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*55), | ||
91 | .left_margin = 16, | ||
92 | .right_margin = 16, | ||
93 | .upper_margin = 3, | ||
94 | .lower_margin = 28, | ||
95 | .hsync_len = 2, | ||
96 | .vsync_len = 2, | ||
97 | .xres = 480, | ||
98 | .yres = 800, | ||
99 | .refresh = 55, | ||
100 | }, | ||
101 | .max_bpp = 32, | ||
102 | .default_bpp = 16, | ||
103 | }; | ||
104 | |||
105 | static struct s3c_fb_platdata goni_lcd_pdata __initdata = { | ||
106 | .win[0] = &goni_fb_win0, | ||
107 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB | | ||
108 | VIDCON0_CLKSEL_LCD, | ||
109 | .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN | ||
110 | | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | ||
111 | .setup_gpio = s5pv210_fb_gpio_setup_24bpp, | ||
112 | }; | ||
113 | |||
114 | /* MAX8998 regulators */ | ||
115 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) | ||
116 | |||
117 | static struct regulator_init_data goni_ldo2_data = { | ||
118 | .constraints = { | ||
119 | .name = "VALIVE_1.1V", | ||
120 | .min_uV = 1100000, | ||
121 | .max_uV = 1100000, | ||
122 | .apply_uV = 1, | ||
123 | .always_on = 1, | ||
124 | .state_mem = { | ||
125 | .enabled = 1, | ||
126 | }, | ||
127 | }, | ||
128 | }; | ||
129 | |||
130 | static struct regulator_init_data goni_ldo3_data = { | ||
131 | .constraints = { | ||
132 | .name = "VUSB/MIPI_1.1V", | ||
133 | .min_uV = 1100000, | ||
134 | .max_uV = 1100000, | ||
135 | .apply_uV = 1, | ||
136 | .always_on = 1, | ||
137 | }, | ||
138 | }; | ||
139 | |||
140 | static struct regulator_init_data goni_ldo4_data = { | ||
141 | .constraints = { | ||
142 | .name = "VDAC_3.3V", | ||
143 | .min_uV = 3300000, | ||
144 | .max_uV = 3300000, | ||
145 | .apply_uV = 1, | ||
146 | }, | ||
147 | }; | ||
148 | |||
149 | static struct regulator_init_data goni_ldo5_data = { | ||
150 | .constraints = { | ||
151 | .name = "VTF_2.8V", | ||
152 | .min_uV = 2800000, | ||
153 | .max_uV = 2800000, | ||
154 | .apply_uV = 1, | ||
155 | }, | ||
156 | }; | ||
157 | |||
158 | static struct regulator_init_data goni_ldo6_data = { | ||
159 | .constraints = { | ||
160 | .name = "VCC_3.3V", | ||
161 | .min_uV = 3300000, | ||
162 | .max_uV = 3300000, | ||
163 | .apply_uV = 1, | ||
164 | }, | ||
165 | }; | ||
166 | |||
167 | static struct regulator_init_data goni_ldo7_data = { | ||
168 | .constraints = { | ||
169 | .name = "VLCD_1.8V", | ||
170 | .min_uV = 1800000, | ||
171 | .max_uV = 1800000, | ||
172 | .apply_uV = 1, | ||
173 | .always_on = 1, | ||
174 | }, | ||
175 | }; | ||
176 | |||
177 | static struct regulator_init_data goni_ldo8_data = { | ||
178 | .constraints = { | ||
179 | .name = "VUSB/VADC_3.3V", | ||
180 | .min_uV = 3300000, | ||
181 | .max_uV = 3300000, | ||
182 | .apply_uV = 1, | ||
183 | .always_on = 1, | ||
184 | }, | ||
185 | }; | ||
186 | |||
187 | static struct regulator_init_data goni_ldo9_data = { | ||
188 | .constraints = { | ||
189 | .name = "VCC/VCAM_2.8V", | ||
190 | .min_uV = 2800000, | ||
191 | .max_uV = 2800000, | ||
192 | .apply_uV = 1, | ||
193 | .always_on = 1, | ||
194 | }, | ||
195 | }; | ||
196 | |||
197 | static struct regulator_init_data goni_ldo10_data = { | ||
198 | .constraints = { | ||
199 | .name = "VPLL_1.1V", | ||
200 | .min_uV = 1100000, | ||
201 | .max_uV = 1100000, | ||
202 | .apply_uV = 1, | ||
203 | .boot_on = 1, | ||
204 | }, | ||
205 | }; | ||
206 | |||
207 | static struct regulator_init_data goni_ldo11_data = { | ||
208 | .constraints = { | ||
209 | .name = "CAM_IO_2.8V", | ||
210 | .min_uV = 2800000, | ||
211 | .max_uV = 2800000, | ||
212 | .apply_uV = 1, | ||
213 | .always_on = 1, | ||
214 | }, | ||
215 | }; | ||
216 | |||
217 | static struct regulator_init_data goni_ldo12_data = { | ||
218 | .constraints = { | ||
219 | .name = "CAM_ISP_1.2V", | ||
220 | .min_uV = 1200000, | ||
221 | .max_uV = 1200000, | ||
222 | .apply_uV = 1, | ||
223 | .always_on = 1, | ||
224 | }, | ||
225 | }; | ||
226 | |||
227 | static struct regulator_init_data goni_ldo13_data = { | ||
228 | .constraints = { | ||
229 | .name = "CAM_A_2.8V", | ||
230 | .min_uV = 2800000, | ||
231 | .max_uV = 2800000, | ||
232 | .apply_uV = 1, | ||
233 | .always_on = 1, | ||
234 | }, | ||
235 | }; | ||
236 | |||
237 | static struct regulator_init_data goni_ldo14_data = { | ||
238 | .constraints = { | ||
239 | .name = "CAM_CIF_1.8V", | ||
240 | .min_uV = 1800000, | ||
241 | .max_uV = 1800000, | ||
242 | .apply_uV = 1, | ||
243 | .always_on = 1, | ||
244 | }, | ||
245 | }; | ||
246 | |||
247 | static struct regulator_init_data goni_ldo15_data = { | ||
248 | .constraints = { | ||
249 | .name = "CAM_AF_3.3V", | ||
250 | .min_uV = 3300000, | ||
251 | .max_uV = 3300000, | ||
252 | .apply_uV = 1, | ||
253 | .always_on = 1, | ||
254 | }, | ||
255 | }; | ||
256 | |||
257 | static struct regulator_init_data goni_ldo16_data = { | ||
258 | .constraints = { | ||
259 | .name = "VMIPI_1.8V", | ||
260 | .min_uV = 1800000, | ||
261 | .max_uV = 1800000, | ||
262 | .apply_uV = 1, | ||
263 | .always_on = 1, | ||
264 | }, | ||
265 | }; | ||
266 | |||
267 | static struct regulator_init_data goni_ldo17_data = { | ||
268 | .constraints = { | ||
269 | .name = "VCC_3.0V_LCD", | ||
270 | .min_uV = 3000000, | ||
271 | .max_uV = 3000000, | ||
272 | .apply_uV = 1, | ||
273 | .always_on = 1, | ||
274 | }, | ||
275 | }; | ||
276 | |||
277 | /* BUCK */ | ||
278 | static struct regulator_consumer_supply buck1_consumer[] = { | ||
279 | { .supply = "vddarm", }, | ||
280 | }; | ||
281 | |||
282 | static struct regulator_consumer_supply buck2_consumer[] = { | ||
283 | { .supply = "vddint", }, | ||
284 | }; | ||
285 | |||
286 | static struct regulator_init_data goni_buck1_data = { | ||
287 | .constraints = { | ||
288 | .name = "VARM_1.2V", | ||
289 | .min_uV = 1200000, | ||
290 | .max_uV = 1200000, | ||
291 | .apply_uV = 1, | ||
292 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
293 | REGULATOR_CHANGE_STATUS, | ||
294 | }, | ||
295 | .num_consumer_supplies = ARRAY_SIZE(buck1_consumer), | ||
296 | .consumer_supplies = buck1_consumer, | ||
297 | }; | ||
298 | |||
299 | static struct regulator_init_data goni_buck2_data = { | ||
300 | .constraints = { | ||
301 | .name = "VINT_1.2V", | ||
302 | .min_uV = 1200000, | ||
303 | .max_uV = 1200000, | ||
304 | .apply_uV = 1, | ||
305 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
306 | REGULATOR_CHANGE_STATUS, | ||
307 | }, | ||
308 | .num_consumer_supplies = ARRAY_SIZE(buck2_consumer), | ||
309 | .consumer_supplies = buck2_consumer, | ||
310 | }; | ||
311 | |||
312 | static struct regulator_init_data goni_buck3_data = { | ||
313 | .constraints = { | ||
314 | .name = "VCC_1.8V", | ||
315 | .min_uV = 1800000, | ||
316 | .max_uV = 1800000, | ||
317 | .apply_uV = 1, | ||
318 | .state_mem = { | ||
319 | .enabled = 1, | ||
320 | }, | ||
321 | }, | ||
322 | }; | ||
323 | |||
324 | static struct regulator_init_data goni_buck4_data = { | ||
325 | .constraints = { | ||
326 | .name = "CAM_CORE_1.2V", | ||
327 | .min_uV = 1200000, | ||
328 | .max_uV = 1200000, | ||
329 | .apply_uV = 1, | ||
330 | .always_on = 1, | ||
331 | }, | ||
332 | }; | ||
333 | |||
334 | static struct max8998_regulator_data goni_regulators[] = { | ||
335 | { MAX8998_LDO2, &goni_ldo2_data }, | ||
336 | { MAX8998_LDO3, &goni_ldo3_data }, | ||
337 | { MAX8998_LDO4, &goni_ldo4_data }, | ||
338 | { MAX8998_LDO5, &goni_ldo5_data }, | ||
339 | { MAX8998_LDO6, &goni_ldo6_data }, | ||
340 | { MAX8998_LDO7, &goni_ldo7_data }, | ||
341 | { MAX8998_LDO8, &goni_ldo8_data }, | ||
342 | { MAX8998_LDO9, &goni_ldo9_data }, | ||
343 | { MAX8998_LDO10, &goni_ldo10_data }, | ||
344 | { MAX8998_LDO11, &goni_ldo11_data }, | ||
345 | { MAX8998_LDO12, &goni_ldo12_data }, | ||
346 | { MAX8998_LDO13, &goni_ldo13_data }, | ||
347 | { MAX8998_LDO14, &goni_ldo14_data }, | ||
348 | { MAX8998_LDO15, &goni_ldo15_data }, | ||
349 | { MAX8998_LDO16, &goni_ldo16_data }, | ||
350 | { MAX8998_LDO17, &goni_ldo17_data }, | ||
351 | { MAX8998_BUCK1, &goni_buck1_data }, | ||
352 | { MAX8998_BUCK2, &goni_buck2_data }, | ||
353 | { MAX8998_BUCK3, &goni_buck3_data }, | ||
354 | { MAX8998_BUCK4, &goni_buck4_data }, | ||
355 | }; | ||
356 | |||
357 | static struct max8998_platform_data goni_max8998_pdata = { | ||
358 | .num_regulators = ARRAY_SIZE(goni_regulators), | ||
359 | .regulators = goni_regulators, | ||
360 | }; | ||
361 | #endif | ||
362 | |||
363 | /* GPIO I2C PMIC */ | ||
364 | #define AP_I2C_GPIO_PMIC_BUS_4 4 | ||
365 | static struct i2c_gpio_platform_data goni_i2c_gpio_pmic_data = { | ||
366 | .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */ | ||
367 | .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */ | ||
368 | }; | ||
369 | |||
370 | static struct platform_device goni_i2c_gpio_pmic = { | ||
371 | .name = "i2c-gpio", | ||
372 | .id = AP_I2C_GPIO_PMIC_BUS_4, | ||
373 | .dev = { | ||
374 | .platform_data = &goni_i2c_gpio_pmic_data, | ||
375 | }, | ||
376 | }; | ||
377 | |||
378 | static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = { | ||
379 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) | ||
380 | { | ||
381 | /* 0xCC when SRAD = 0 */ | ||
382 | I2C_BOARD_INFO("max8998", 0xCC >> 1), | ||
383 | .platform_data = &goni_max8998_pdata, | ||
384 | }, | ||
385 | #endif | ||
386 | }; | ||
387 | |||
388 | /* PMIC Power button */ | ||
389 | static struct gpio_keys_button goni_gpio_keys_table[] = { | ||
390 | { | ||
391 | .code = KEY_POWER, | ||
392 | .gpio = S5PV210_GPH2(6), | ||
393 | .desc = "gpio-keys: KEY_POWER", | ||
394 | .type = EV_KEY, | ||
395 | .active_low = 1, | ||
396 | .wakeup = 1, | ||
397 | .debounce_interval = 1, | ||
398 | }, | ||
399 | }; | ||
400 | |||
401 | static struct gpio_keys_platform_data goni_gpio_keys_data = { | ||
402 | .buttons = goni_gpio_keys_table, | ||
403 | .nbuttons = ARRAY_SIZE(goni_gpio_keys_table), | ||
404 | }; | ||
405 | |||
406 | static struct platform_device goni_device_gpiokeys = { | ||
407 | .name = "gpio-keys", | ||
408 | .dev = { | ||
409 | .platform_data = &goni_gpio_keys_data, | ||
410 | }, | ||
411 | }; | ||
412 | |||
413 | static void __init goni_pmic_init(void) | ||
414 | { | ||
415 | /* AP_PMIC_IRQ: EINT7 */ | ||
416 | s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf)); | ||
417 | s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP); | ||
418 | |||
419 | /* nPower: EINT22 */ | ||
420 | s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf)); | ||
421 | s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP); | ||
422 | } | ||
423 | |||
424 | /* MoviNAND */ | ||
425 | static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = { | ||
426 | .max_width = 4, | ||
427 | .cd_type = S3C_SDHCI_CD_PERMANENT, | ||
428 | }; | ||
429 | |||
430 | /* Wireless LAN */ | ||
431 | static struct s3c_sdhci_platdata goni_hsmmc1_data __initdata = { | ||
432 | .max_width = 4, | ||
433 | .cd_type = S3C_SDHCI_CD_EXTERNAL, | ||
434 | /* ext_cd_{init,cleanup} callbacks will be added later */ | ||
435 | }; | ||
436 | |||
437 | /* External Flash */ | ||
438 | #define GONI_EXT_FLASH_EN S5PV210_MP05(4) | ||
439 | #define GONI_EXT_FLASH_CD S5PV210_GPH3(4) | ||
440 | static struct s3c_sdhci_platdata goni_hsmmc2_data __initdata = { | ||
441 | .max_width = 4, | ||
442 | .cd_type = S3C_SDHCI_CD_GPIO, | ||
443 | .ext_cd_gpio = GONI_EXT_FLASH_CD, | ||
444 | .ext_cd_gpio_invert = 1, | ||
445 | }; | ||
446 | |||
447 | static void goni_setup_sdhci(void) | ||
448 | { | ||
449 | gpio_request(GONI_EXT_FLASH_EN, "FLASH_EN"); | ||
450 | gpio_direction_output(GONI_EXT_FLASH_EN, 1); | ||
451 | |||
452 | s3c_sdhci0_set_platdata(&goni_hsmmc0_data); | ||
453 | s3c_sdhci1_set_platdata(&goni_hsmmc1_data); | ||
454 | s3c_sdhci2_set_platdata(&goni_hsmmc2_data); | ||
455 | }; | ||
456 | |||
74 | static struct platform_device *goni_devices[] __initdata = { | 457 | static struct platform_device *goni_devices[] __initdata = { |
458 | &s3c_device_fb, | ||
459 | &s5pc110_device_onenand, | ||
460 | &goni_i2c_gpio_pmic, | ||
461 | &goni_device_gpiokeys, | ||
462 | &s5p_device_fimc0, | ||
463 | &s5p_device_fimc1, | ||
464 | &s5p_device_fimc2, | ||
465 | &s3c_device_hsmmc0, | ||
466 | &s3c_device_hsmmc1, | ||
467 | &s3c_device_hsmmc2, | ||
75 | }; | 468 | }; |
76 | 469 | ||
77 | static void __init goni_map_io(void) | 470 | static void __init goni_map_io(void) |
@@ -83,6 +476,16 @@ static void __init goni_map_io(void) | |||
83 | 476 | ||
84 | static void __init goni_machine_init(void) | 477 | static void __init goni_machine_init(void) |
85 | { | 478 | { |
479 | /* PMIC */ | ||
480 | goni_pmic_init(); | ||
481 | i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs, | ||
482 | ARRAY_SIZE(i2c_gpio_pmic_devs)); | ||
483 | /* SDHCI */ | ||
484 | goni_setup_sdhci(); | ||
485 | |||
486 | /* FB */ | ||
487 | s3c_fb_set_platdata(&goni_lcd_pdata); | ||
488 | |||
86 | platform_add_devices(goni_devices, ARRAY_SIZE(goni_devices)); | 489 | platform_add_devices(goni_devices, ARRAY_SIZE(goni_devices)); |
87 | } | 490 | } |
88 | 491 | ||
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c index 4c8903c6d104..8211bb87c54b 100644 --- a/arch/arm/mach-s5pv210/mach-smdkc110.c +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/types.h> | 12 | #include <linux/types.h> |
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/serial_core.h> | 14 | #include <linux/serial_core.h> |
15 | #include <linux/i2c.h> | ||
15 | 16 | ||
16 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
17 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
@@ -25,18 +26,20 @@ | |||
25 | #include <plat/s5pv210.h> | 26 | #include <plat/s5pv210.h> |
26 | #include <plat/devs.h> | 27 | #include <plat/devs.h> |
27 | #include <plat/cpu.h> | 28 | #include <plat/cpu.h> |
29 | #include <plat/ata.h> | ||
30 | #include <plat/iic.h> | ||
28 | 31 | ||
29 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 32 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
30 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 33 | #define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
31 | S3C2410_UCON_RXILEVEL | \ | 34 | S3C2410_UCON_RXILEVEL | \ |
32 | S3C2410_UCON_TXIRQMODE | \ | 35 | S3C2410_UCON_TXIRQMODE | \ |
33 | S3C2410_UCON_RXIRQMODE | \ | 36 | S3C2410_UCON_RXIRQMODE | \ |
34 | S3C2410_UCON_RXFIFO_TOI | \ | 37 | S3C2410_UCON_RXFIFO_TOI | \ |
35 | S3C2443_UCON_RXERR_IRQEN) | 38 | S3C2443_UCON_RXERR_IRQEN) |
36 | 39 | ||
37 | #define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 | 40 | #define SMDKC110_ULCON_DEFAULT S3C2410_LCON_CS8 |
38 | 41 | ||
39 | #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | 42 | #define SMDKC110_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ |
40 | S5PV210_UFCON_TXTRIG4 | \ | 43 | S5PV210_UFCON_TXTRIG4 | \ |
41 | S5PV210_UFCON_RXTRIG4) | 44 | S5PV210_UFCON_RXTRIG4) |
42 | 45 | ||
@@ -44,39 +47,60 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { | |||
44 | [0] = { | 47 | [0] = { |
45 | .hwport = 0, | 48 | .hwport = 0, |
46 | .flags = 0, | 49 | .flags = 0, |
47 | .ucon = S5PV210_UCON_DEFAULT, | 50 | .ucon = SMDKC110_UCON_DEFAULT, |
48 | .ulcon = S5PV210_ULCON_DEFAULT, | 51 | .ulcon = SMDKC110_ULCON_DEFAULT, |
49 | .ufcon = S5PV210_UFCON_DEFAULT, | 52 | .ufcon = SMDKC110_UFCON_DEFAULT, |
50 | }, | 53 | }, |
51 | [1] = { | 54 | [1] = { |
52 | .hwport = 1, | 55 | .hwport = 1, |
53 | .flags = 0, | 56 | .flags = 0, |
54 | .ucon = S5PV210_UCON_DEFAULT, | 57 | .ucon = SMDKC110_UCON_DEFAULT, |
55 | .ulcon = S5PV210_ULCON_DEFAULT, | 58 | .ulcon = SMDKC110_ULCON_DEFAULT, |
56 | .ufcon = S5PV210_UFCON_DEFAULT, | 59 | .ufcon = SMDKC110_UFCON_DEFAULT, |
57 | }, | 60 | }, |
58 | [2] = { | 61 | [2] = { |
59 | .hwport = 2, | 62 | .hwport = 2, |
60 | .flags = 0, | 63 | .flags = 0, |
61 | .ucon = S5PV210_UCON_DEFAULT, | 64 | .ucon = SMDKC110_UCON_DEFAULT, |
62 | .ulcon = S5PV210_ULCON_DEFAULT, | 65 | .ulcon = SMDKC110_ULCON_DEFAULT, |
63 | .ufcon = S5PV210_UFCON_DEFAULT, | 66 | .ufcon = SMDKC110_UFCON_DEFAULT, |
64 | }, | 67 | }, |
65 | [3] = { | 68 | [3] = { |
66 | .hwport = 3, | 69 | .hwport = 3, |
67 | .flags = 0, | 70 | .flags = 0, |
68 | .ucon = S5PV210_UCON_DEFAULT, | 71 | .ucon = SMDKC110_UCON_DEFAULT, |
69 | .ulcon = S5PV210_ULCON_DEFAULT, | 72 | .ulcon = SMDKC110_ULCON_DEFAULT, |
70 | .ufcon = S5PV210_UFCON_DEFAULT, | 73 | .ufcon = SMDKC110_UFCON_DEFAULT, |
71 | }, | 74 | }, |
72 | }; | 75 | }; |
73 | 76 | ||
77 | static struct s3c_ide_platdata smdkc110_ide_pdata __initdata = { | ||
78 | .setup_gpio = s5pv210_ide_setup_gpio, | ||
79 | }; | ||
80 | |||
74 | static struct platform_device *smdkc110_devices[] __initdata = { | 81 | static struct platform_device *smdkc110_devices[] __initdata = { |
75 | &s5pv210_device_iis0, | 82 | &s5pv210_device_iis0, |
76 | &s5pv210_device_ac97, | 83 | &s5pv210_device_ac97, |
84 | &s3c_device_cfcon, | ||
85 | &s3c_device_i2c0, | ||
86 | &s3c_device_i2c1, | ||
87 | &s3c_device_i2c2, | ||
88 | &s3c_device_rtc, | ||
77 | &s3c_device_wdt, | 89 | &s3c_device_wdt, |
78 | }; | 90 | }; |
79 | 91 | ||
92 | static struct i2c_board_info smdkc110_i2c_devs0[] __initdata = { | ||
93 | { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */ | ||
94 | }; | ||
95 | |||
96 | static struct i2c_board_info smdkc110_i2c_devs1[] __initdata = { | ||
97 | /* To Be Updated */ | ||
98 | }; | ||
99 | |||
100 | static struct i2c_board_info smdkc110_i2c_devs2[] __initdata = { | ||
101 | /* To Be Updated */ | ||
102 | }; | ||
103 | |||
80 | static void __init smdkc110_map_io(void) | 104 | static void __init smdkc110_map_io(void) |
81 | { | 105 | { |
82 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 106 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); |
@@ -86,6 +110,18 @@ static void __init smdkc110_map_io(void) | |||
86 | 110 | ||
87 | static void __init smdkc110_machine_init(void) | 111 | static void __init smdkc110_machine_init(void) |
88 | { | 112 | { |
113 | s3c_i2c0_set_platdata(NULL); | ||
114 | s3c_i2c1_set_platdata(NULL); | ||
115 | s3c_i2c2_set_platdata(NULL); | ||
116 | i2c_register_board_info(0, smdkc110_i2c_devs0, | ||
117 | ARRAY_SIZE(smdkc110_i2c_devs0)); | ||
118 | i2c_register_board_info(1, smdkc110_i2c_devs1, | ||
119 | ARRAY_SIZE(smdkc110_i2c_devs1)); | ||
120 | i2c_register_board_info(2, smdkc110_i2c_devs2, | ||
121 | ARRAY_SIZE(smdkc110_i2c_devs2)); | ||
122 | |||
123 | s3c_ide_set_platdata(&smdkc110_ide_pdata); | ||
124 | |||
89 | platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices)); | 125 | platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices)); |
90 | } | 126 | } |
91 | 127 | ||
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c index 0d4627948040..fbbc0a3c3738 100644 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c | |||
@@ -10,6 +10,7 @@ | |||
10 | 10 | ||
11 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
12 | #include <linux/types.h> | 12 | #include <linux/types.h> |
13 | #include <linux/i2c.h> | ||
13 | #include <linux/init.h> | 14 | #include <linux/init.h> |
14 | #include <linux/serial_core.h> | 15 | #include <linux/serial_core.h> |
15 | 16 | ||
@@ -27,18 +28,21 @@ | |||
27 | #include <plat/cpu.h> | 28 | #include <plat/cpu.h> |
28 | #include <plat/adc.h> | 29 | #include <plat/adc.h> |
29 | #include <plat/ts.h> | 30 | #include <plat/ts.h> |
31 | #include <plat/ata.h> | ||
32 | #include <plat/iic.h> | ||
33 | #include <plat/keypad.h> | ||
30 | 34 | ||
31 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 35 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
32 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 36 | #define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
33 | S3C2410_UCON_RXILEVEL | \ | 37 | S3C2410_UCON_RXILEVEL | \ |
34 | S3C2410_UCON_TXIRQMODE | \ | 38 | S3C2410_UCON_TXIRQMODE | \ |
35 | S3C2410_UCON_RXIRQMODE | \ | 39 | S3C2410_UCON_RXIRQMODE | \ |
36 | S3C2410_UCON_RXFIFO_TOI | \ | 40 | S3C2410_UCON_RXFIFO_TOI | \ |
37 | S3C2443_UCON_RXERR_IRQEN) | 41 | S3C2443_UCON_RXERR_IRQEN) |
38 | 42 | ||
39 | #define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 | 43 | #define SMDKV210_ULCON_DEFAULT S3C2410_LCON_CS8 |
40 | 44 | ||
41 | #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | 45 | #define SMDKV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ |
42 | S5PV210_UFCON_TXTRIG4 | \ | 46 | S5PV210_UFCON_TXTRIG4 | \ |
43 | S5PV210_UFCON_RXTRIG4) | 47 | S5PV210_UFCON_RXTRIG4) |
44 | 48 | ||
@@ -46,41 +50,86 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { | |||
46 | [0] = { | 50 | [0] = { |
47 | .hwport = 0, | 51 | .hwport = 0, |
48 | .flags = 0, | 52 | .flags = 0, |
49 | .ucon = S5PV210_UCON_DEFAULT, | 53 | .ucon = SMDKV210_UCON_DEFAULT, |
50 | .ulcon = S5PV210_ULCON_DEFAULT, | 54 | .ulcon = SMDKV210_ULCON_DEFAULT, |
51 | .ufcon = S5PV210_UFCON_DEFAULT, | 55 | .ufcon = SMDKV210_UFCON_DEFAULT, |
52 | }, | 56 | }, |
53 | [1] = { | 57 | [1] = { |
54 | .hwport = 1, | 58 | .hwport = 1, |
55 | .flags = 0, | 59 | .flags = 0, |
56 | .ucon = S5PV210_UCON_DEFAULT, | 60 | .ucon = SMDKV210_UCON_DEFAULT, |
57 | .ulcon = S5PV210_ULCON_DEFAULT, | 61 | .ulcon = SMDKV210_ULCON_DEFAULT, |
58 | .ufcon = S5PV210_UFCON_DEFAULT, | 62 | .ufcon = SMDKV210_UFCON_DEFAULT, |
59 | }, | 63 | }, |
60 | [2] = { | 64 | [2] = { |
61 | .hwport = 2, | 65 | .hwport = 2, |
62 | .flags = 0, | 66 | .flags = 0, |
63 | .ucon = S5PV210_UCON_DEFAULT, | 67 | .ucon = SMDKV210_UCON_DEFAULT, |
64 | .ulcon = S5PV210_ULCON_DEFAULT, | 68 | .ulcon = SMDKV210_ULCON_DEFAULT, |
65 | .ufcon = S5PV210_UFCON_DEFAULT, | 69 | .ufcon = SMDKV210_UFCON_DEFAULT, |
66 | }, | 70 | }, |
67 | [3] = { | 71 | [3] = { |
68 | .hwport = 3, | 72 | .hwport = 3, |
69 | .flags = 0, | 73 | .flags = 0, |
70 | .ucon = S5PV210_UCON_DEFAULT, | 74 | .ucon = SMDKV210_UCON_DEFAULT, |
71 | .ulcon = S5PV210_ULCON_DEFAULT, | 75 | .ulcon = SMDKV210_ULCON_DEFAULT, |
72 | .ufcon = S5PV210_UFCON_DEFAULT, | 76 | .ufcon = SMDKV210_UFCON_DEFAULT, |
73 | }, | 77 | }, |
74 | }; | 78 | }; |
75 | 79 | ||
80 | static struct s3c_ide_platdata smdkv210_ide_pdata __initdata = { | ||
81 | .setup_gpio = s5pv210_ide_setup_gpio, | ||
82 | }; | ||
83 | |||
84 | static uint32_t smdkv210_keymap[] __initdata = { | ||
85 | /* KEY(row, col, keycode) */ | ||
86 | KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3), | ||
87 | KEY(0, 6, KEY_4), KEY(0, 7, KEY_5), | ||
88 | KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C), | ||
89 | KEY(1, 6, KEY_D), KEY(1, 7, KEY_E) | ||
90 | }; | ||
91 | |||
92 | static struct matrix_keymap_data smdkv210_keymap_data __initdata = { | ||
93 | .keymap = smdkv210_keymap, | ||
94 | .keymap_size = ARRAY_SIZE(smdkv210_keymap), | ||
95 | }; | ||
96 | |||
97 | static struct samsung_keypad_platdata smdkv210_keypad_data __initdata = { | ||
98 | .keymap_data = &smdkv210_keymap_data, | ||
99 | .rows = 8, | ||
100 | .cols = 8, | ||
101 | }; | ||
102 | |||
76 | static struct platform_device *smdkv210_devices[] __initdata = { | 103 | static struct platform_device *smdkv210_devices[] __initdata = { |
77 | &s5pv210_device_iis0, | 104 | &s5pv210_device_iis0, |
78 | &s5pv210_device_ac97, | 105 | &s5pv210_device_ac97, |
79 | &s3c_device_adc, | 106 | &s3c_device_adc, |
107 | &s3c_device_cfcon, | ||
108 | &s3c_device_hsmmc0, | ||
109 | &s3c_device_hsmmc1, | ||
110 | &s3c_device_hsmmc2, | ||
111 | &s3c_device_hsmmc3, | ||
112 | &s3c_device_i2c0, | ||
113 | &s3c_device_i2c1, | ||
114 | &s3c_device_i2c2, | ||
115 | &samsung_device_keypad, | ||
116 | &s3c_device_rtc, | ||
80 | &s3c_device_ts, | 117 | &s3c_device_ts, |
81 | &s3c_device_wdt, | 118 | &s3c_device_wdt, |
82 | }; | 119 | }; |
83 | 120 | ||
121 | static struct i2c_board_info smdkv210_i2c_devs0[] __initdata = { | ||
122 | { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */ | ||
123 | }; | ||
124 | |||
125 | static struct i2c_board_info smdkv210_i2c_devs1[] __initdata = { | ||
126 | /* To Be Updated */ | ||
127 | }; | ||
128 | |||
129 | static struct i2c_board_info smdkv210_i2c_devs2[] __initdata = { | ||
130 | /* To Be Updated */ | ||
131 | }; | ||
132 | |||
84 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { | 133 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { |
85 | .delay = 10000, | 134 | .delay = 10000, |
86 | .presc = 49, | 135 | .presc = 49, |
@@ -96,7 +145,21 @@ static void __init smdkv210_map_io(void) | |||
96 | 145 | ||
97 | static void __init smdkv210_machine_init(void) | 146 | static void __init smdkv210_machine_init(void) |
98 | { | 147 | { |
148 | samsung_keypad_set_platdata(&smdkv210_keypad_data); | ||
99 | s3c24xx_ts_set_platdata(&s3c_ts_platform); | 149 | s3c24xx_ts_set_platdata(&s3c_ts_platform); |
150 | |||
151 | s3c_i2c0_set_platdata(NULL); | ||
152 | s3c_i2c1_set_platdata(NULL); | ||
153 | s3c_i2c2_set_platdata(NULL); | ||
154 | i2c_register_board_info(0, smdkv210_i2c_devs0, | ||
155 | ARRAY_SIZE(smdkv210_i2c_devs0)); | ||
156 | i2c_register_board_info(1, smdkv210_i2c_devs1, | ||
157 | ARRAY_SIZE(smdkv210_i2c_devs1)); | ||
158 | i2c_register_board_info(2, smdkv210_i2c_devs2, | ||
159 | ARRAY_SIZE(smdkv210_i2c_devs2)); | ||
160 | |||
161 | s3c_ide_set_platdata(&smdkv210_ide_pdata); | ||
162 | |||
100 | platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); | 163 | platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); |
101 | } | 164 | } |
102 | 165 | ||
diff --git a/arch/arm/mach-s5pv210/setup-fb-24bpp.c b/arch/arm/mach-s5pv210/setup-fb-24bpp.c index a50cbac8720d..928cf1f125fa 100644 --- a/arch/arm/mach-s5pv210/setup-fb-24bpp.c +++ b/arch/arm/mach-s5pv210/setup-fb-24bpp.c | |||
@@ -13,9 +13,9 @@ | |||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/types.h> | 14 | #include <linux/types.h> |
15 | #include <linux/fb.h> | 15 | #include <linux/fb.h> |
16 | #include <linux/gpio.h> | ||
16 | 17 | ||
17 | #include <mach/regs-fb.h> | 18 | #include <mach/regs-fb.h> |
18 | #include <mach/gpio.h> | ||
19 | #include <mach/map.h> | 19 | #include <mach/map.h> |
20 | #include <plat/fb.h> | 20 | #include <plat/fb.h> |
21 | #include <mach/regs-clock.h> | 21 | #include <mach/regs-clock.h> |
diff --git a/arch/arm/mach-s5pv210/setup-i2c0.c b/arch/arm/mach-s5pv210/setup-i2c0.c index c718253c70b8..d38f7cb7e662 100644 --- a/arch/arm/mach-s5pv210/setup-i2c0.c +++ b/arch/arm/mach-s5pv210/setup-i2c0.c | |||
@@ -14,10 +14,10 @@ | |||
14 | 14 | ||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/types.h> | 16 | #include <linux/types.h> |
17 | #include <linux/gpio.h> | ||
17 | 18 | ||
18 | struct platform_device; /* don't need the contents */ | 19 | struct platform_device; /* don't need the contents */ |
19 | 20 | ||
20 | #include <mach/gpio.h> | ||
21 | #include <plat/iic.h> | 21 | #include <plat/iic.h> |
22 | #include <plat/gpio-cfg.h> | 22 | #include <plat/gpio-cfg.h> |
23 | 23 | ||
diff --git a/arch/arm/mach-s5pv210/setup-i2c1.c b/arch/arm/mach-s5pv210/setup-i2c1.c index 45e0e6ed2ed0..148bb7857d89 100644 --- a/arch/arm/mach-s5pv210/setup-i2c1.c +++ b/arch/arm/mach-s5pv210/setup-i2c1.c | |||
@@ -14,10 +14,10 @@ | |||
14 | 14 | ||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/types.h> | 16 | #include <linux/types.h> |
17 | #include <linux/gpio.h> | ||
17 | 18 | ||
18 | struct platform_device; /* don't need the contents */ | 19 | struct platform_device; /* don't need the contents */ |
19 | 20 | ||
20 | #include <mach/gpio.h> | ||
21 | #include <plat/iic.h> | 21 | #include <plat/iic.h> |
22 | #include <plat/gpio-cfg.h> | 22 | #include <plat/gpio-cfg.h> |
23 | 23 | ||
diff --git a/arch/arm/mach-s5pv210/setup-i2c2.c b/arch/arm/mach-s5pv210/setup-i2c2.c index b11b4bff69ac..2396cb8c373e 100644 --- a/arch/arm/mach-s5pv210/setup-i2c2.c +++ b/arch/arm/mach-s5pv210/setup-i2c2.c | |||
@@ -14,10 +14,10 @@ | |||
14 | 14 | ||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/types.h> | 16 | #include <linux/types.h> |
17 | #include <linux/gpio.h> | ||
17 | 18 | ||
18 | struct platform_device; /* don't need the contents */ | 19 | struct platform_device; /* don't need the contents */ |
19 | 20 | ||
20 | #include <mach/gpio.h> | ||
21 | #include <plat/iic.h> | 21 | #include <plat/iic.h> |
22 | #include <plat/gpio-cfg.h> | 22 | #include <plat/gpio-cfg.h> |
23 | 23 | ||
diff --git a/arch/arm/mach-s5pv210/setup-ide.c b/arch/arm/mach-s5pv210/setup-ide.c new file mode 100644 index 000000000000..b558b1cc8d60 --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-ide.c | |||
@@ -0,0 +1,50 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/setup-ide.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5PV210 setup information for IDE | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/gpio.h> | ||
15 | |||
16 | #include <plat/gpio-cfg.h> | ||
17 | |||
18 | void s5pv210_ide_setup_gpio(void) | ||
19 | { | ||
20 | unsigned int gpio = 0; | ||
21 | |||
22 | for (gpio = S5PV210_GPJ0(0); gpio <= S5PV210_GPJ0(7); gpio++) { | ||
23 | /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, | ||
24 | CF_DMACK */ | ||
25 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); | ||
26 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
27 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
28 | } | ||
29 | |||
30 | for (gpio = S5PV210_GPJ2(0); gpio <= S5PV210_GPJ2(7); gpio++) { | ||
31 | /*CF_Data[0 - 7] */ | ||
32 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); | ||
33 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
34 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
35 | } | ||
36 | |||
37 | for (gpio = S5PV210_GPJ3(0); gpio <= S5PV210_GPJ3(7); gpio++) { | ||
38 | /* CF_Data[8 - 15] */ | ||
39 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); | ||
40 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
41 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
42 | } | ||
43 | |||
44 | for (gpio = S5PV210_GPJ4(0); gpio <= S5PV210_GPJ4(3); gpio++) { | ||
45 | /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */ | ||
46 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); | ||
47 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
48 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
49 | } | ||
50 | } | ||
diff --git a/arch/arm/mach-s5pv210/setup-keypad.c b/arch/arm/mach-s5pv210/setup-keypad.c new file mode 100644 index 000000000000..37b2790aafc3 --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-keypad.c | |||
@@ -0,0 +1,34 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-s5pv210/setup-keypad.c | ||
3 | * | ||
4 | * Copyright (C) 2010 Samsung Electronics Co.Ltd | ||
5 | * Author: Joonyoung Shim <jy0922.shim@samsung.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/gpio.h> | ||
15 | #include <plat/gpio-cfg.h> | ||
16 | |||
17 | void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) | ||
18 | { | ||
19 | unsigned int gpio, end; | ||
20 | |||
21 | /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ | ||
22 | end = S5PV210_GPH3(rows); | ||
23 | for (gpio = S5PV210_GPH3(0); gpio < end; gpio++) { | ||
24 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
25 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
26 | } | ||
27 | |||
28 | /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ | ||
29 | end = S5PV210_GPH2(cols); | ||
30 | for (gpio = S5PV210_GPH2(0); gpio < end; gpio++) { | ||
31 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
32 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
33 | } | ||
34 | } | ||
diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c index fe7d86dad14c..b18587b1ec58 100644 --- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c | |||
@@ -15,15 +15,17 @@ | |||
15 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | #include <linux/gpio.h> | ||
18 | #include <linux/mmc/host.h> | 19 | #include <linux/mmc/host.h> |
19 | #include <linux/mmc/card.h> | 20 | #include <linux/mmc/card.h> |
20 | 21 | ||
21 | #include <mach/gpio.h> | ||
22 | #include <plat/gpio-cfg.h> | 22 | #include <plat/gpio-cfg.h> |
23 | #include <plat/regs-sdhci.h> | 23 | #include <plat/regs-sdhci.h> |
24 | #include <plat/sdhci.h> | ||
24 | 25 | ||
25 | void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | 26 | void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) |
26 | { | 27 | { |
28 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | ||
27 | unsigned int gpio; | 29 | unsigned int gpio; |
28 | 30 | ||
29 | /* Set all the necessary GPG0/GPG1 pins to special-function 2 */ | 31 | /* Set all the necessary GPG0/GPG1 pins to special-function 2 */ |
@@ -48,12 +50,15 @@ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | |||
48 | break; | 50 | break; |
49 | } | 51 | } |
50 | 52 | ||
51 | s3c_gpio_setpull(S5PV210_GPG0(2), S3C_GPIO_PULL_UP); | 53 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { |
52 | s3c_gpio_cfgpin(S5PV210_GPG0(2), S3C_GPIO_SFN(2)); | 54 | s3c_gpio_setpull(S5PV210_GPG0(2), S3C_GPIO_PULL_UP); |
55 | s3c_gpio_cfgpin(S5PV210_GPG0(2), S3C_GPIO_SFN(2)); | ||
56 | } | ||
53 | } | 57 | } |
54 | 58 | ||
55 | void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | 59 | void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) |
56 | { | 60 | { |
61 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | ||
57 | unsigned int gpio; | 62 | unsigned int gpio; |
58 | 63 | ||
59 | /* Set all the necessary GPG1[0:1] pins to special-function 2 */ | 64 | /* Set all the necessary GPG1[0:1] pins to special-function 2 */ |
@@ -68,12 +73,15 @@ void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | |||
68 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | 73 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); |
69 | } | 74 | } |
70 | 75 | ||
71 | s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP); | 76 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { |
72 | s3c_gpio_cfgpin(S5PV210_GPG1(2), S3C_GPIO_SFN(2)); | 77 | s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP); |
78 | s3c_gpio_cfgpin(S5PV210_GPG1(2), S3C_GPIO_SFN(2)); | ||
79 | } | ||
73 | } | 80 | } |
74 | 81 | ||
75 | void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) | 82 | void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) |
76 | { | 83 | { |
84 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | ||
77 | unsigned int gpio; | 85 | unsigned int gpio; |
78 | 86 | ||
79 | /* Set all the necessary GPG2[0:1] pins to special-function 2 */ | 87 | /* Set all the necessary GPG2[0:1] pins to special-function 2 */ |
@@ -99,6 +107,31 @@ void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) | |||
99 | break; | 107 | break; |
100 | } | 108 | } |
101 | 109 | ||
102 | s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP); | 110 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { |
103 | s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2)); | 111 | s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP); |
112 | s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2)); | ||
113 | } | ||
114 | } | ||
115 | |||
116 | void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width) | ||
117 | { | ||
118 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | ||
119 | unsigned int gpio; | ||
120 | |||
121 | /* Set all the necessary GPG3[0:2] pins to special-function 2 */ | ||
122 | for (gpio = S5PV210_GPG3(0); gpio < S5PV210_GPG3(2); gpio++) { | ||
123 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
124 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
125 | } | ||
126 | |||
127 | /* Data pin GPG3[3:6] to special-function 2 */ | ||
128 | for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) { | ||
129 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
130 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
131 | } | ||
132 | |||
133 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { | ||
134 | s3c_gpio_setpull(S5PV210_GPG3(2), S3C_GPIO_PULL_UP); | ||
135 | s3c_gpio_cfgpin(S5PV210_GPG3(2), S3C_GPIO_SFN(2)); | ||
136 | } | ||
104 | } | 137 | } |
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c index 51815ec60c2a..c32e202731c1 100644 --- a/arch/arm/mach-s5pv210/setup-sdhci.c +++ b/arch/arm/mach-s5pv210/setup-sdhci.c | |||
@@ -26,9 +26,9 @@ | |||
26 | 26 | ||
27 | char *s5pv210_hsmmc_clksrcs[4] = { | 27 | char *s5pv210_hsmmc_clksrcs[4] = { |
28 | [0] = "hsmmc", /* HCLK */ | 28 | [0] = "hsmmc", /* HCLK */ |
29 | [1] = "hsmmc", /* HCLK */ | 29 | /* [1] = "hsmmc", - duplicate HCLK entry */ |
30 | [2] = "sclk_mmc", /* mmc_bus */ | 30 | [2] = "sclk_mmc", /* mmc_bus */ |
31 | /*[4] = reserved */ | 31 | /* [3] = NULL, - reserved */ |
32 | }; | 32 | }; |
33 | 33 | ||
34 | void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | 34 | void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, |
diff --git a/arch/arm/mach-s5pv310/Kconfig b/arch/arm/mach-s5pv310/Kconfig new file mode 100644 index 000000000000..331b5bd97aba --- /dev/null +++ b/arch/arm/mach-s5pv310/Kconfig | |||
@@ -0,0 +1,45 @@ | |||
1 | # arch/arm/mach-s5pv310/Kconfig | ||
2 | # | ||
3 | # Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | # http://www.samsung.com/ | ||
5 | # | ||
6 | # Licensed under GPLv2 | ||
7 | |||
8 | # Configuration options for the S5PV310 | ||
9 | |||
10 | if ARCH_S5PV310 | ||
11 | |||
12 | config CPU_S5PV310 | ||
13 | bool | ||
14 | select PLAT_S5P | ||
15 | help | ||
16 | Enable S5PV310 CPU support | ||
17 | |||
18 | config S5PV310_SETUP_I2C1 | ||
19 | bool | ||
20 | help | ||
21 | Common setup code for i2c bus 1. | ||
22 | |||
23 | config S5PV310_SETUP_I2C2 | ||
24 | bool | ||
25 | help | ||
26 | Common setup code for i2c bus 2. | ||
27 | |||
28 | # machine support | ||
29 | |||
30 | config MACH_SMDKV310 | ||
31 | bool "SMDKV310" | ||
32 | select CPU_S5PV310 | ||
33 | select ARCH_SPARSEMEM_ENABLE | ||
34 | help | ||
35 | Machine support for Samsung SMDKV310 | ||
36 | |||
37 | config MACH_UNIVERSAL_C210 | ||
38 | bool "Mobile UNIVERSAL_C210 Board" | ||
39 | select CPU_S5PV310 | ||
40 | select ARCH_SPARSEMEM_ENABLE | ||
41 | help | ||
42 | Machine support for Samsung Mobile Universal S5PC210 Reference | ||
43 | Board. S5PC210(MCP) is one of package option of S5PV310 | ||
44 | |||
45 | endif | ||
diff --git a/arch/arm/mach-s5pv310/Makefile b/arch/arm/mach-s5pv310/Makefile new file mode 100644 index 000000000000..d5b51c72340f --- /dev/null +++ b/arch/arm/mach-s5pv310/Makefile | |||
@@ -0,0 +1,30 @@ | |||
1 | # arch/arm/mach-s5pv310/Makefile | ||
2 | # | ||
3 | # Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | # http://www.samsung.com/ | ||
5 | # | ||
6 | # Licensed under GPLv2 | ||
7 | |||
8 | obj-y := | ||
9 | obj-m := | ||
10 | obj-n := | ||
11 | obj- := | ||
12 | |||
13 | # Core support for S5PV310 system | ||
14 | |||
15 | obj-$(CONFIG_CPU_S5PV310) += cpu.o init.o clock.o irq-combiner.o | ||
16 | obj-$(CONFIG_CPU_S5PV310) += setup-i2c0.o time.o | ||
17 | |||
18 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o | ||
19 | obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o | ||
20 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o | ||
21 | |||
22 | # machine support | ||
23 | |||
24 | obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o | ||
25 | obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o | ||
26 | |||
27 | # device support | ||
28 | |||
29 | obj-$(CONFIG_S5PV310_SETUP_I2C1) += setup-i2c1.o | ||
30 | obj-$(CONFIG_S5PV310_SETUP_I2C2) += setup-i2c2.o | ||
diff --git a/arch/arm/mach-s5pv310/Makefile.boot b/arch/arm/mach-s5pv310/Makefile.boot new file mode 100644 index 000000000000..d65956ffb43d --- /dev/null +++ b/arch/arm/mach-s5pv310/Makefile.boot | |||
@@ -0,0 +1,2 @@ | |||
1 | zreladdr-y := 0x40008000 | ||
2 | params_phys-y := 0x40000100 | ||
diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c new file mode 100644 index 000000000000..77f2b4d85e6b --- /dev/null +++ b/arch/arm/mach-s5pv310/clock.c | |||
@@ -0,0 +1,544 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/clock.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV310 - Clock support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/err.h> | ||
15 | #include <linux/io.h> | ||
16 | |||
17 | #include <plat/cpu-freq.h> | ||
18 | #include <plat/clock.h> | ||
19 | #include <plat/cpu.h> | ||
20 | #include <plat/pll.h> | ||
21 | #include <plat/s5p-clock.h> | ||
22 | #include <plat/clock-clksrc.h> | ||
23 | |||
24 | #include <mach/map.h> | ||
25 | #include <mach/regs-clock.h> | ||
26 | |||
27 | static struct clk clk_sclk_hdmi27m = { | ||
28 | .name = "sclk_hdmi27m", | ||
29 | .id = -1, | ||
30 | .rate = 27000000, | ||
31 | }; | ||
32 | |||
33 | /* Core list of CMU_CPU side */ | ||
34 | |||
35 | static struct clksrc_clk clk_mout_apll = { | ||
36 | .clk = { | ||
37 | .name = "mout_apll", | ||
38 | .id = -1, | ||
39 | }, | ||
40 | .sources = &clk_src_apll, | ||
41 | .reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 0, .size = 1 }, | ||
42 | .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 24, .size = 3 }, | ||
43 | }; | ||
44 | |||
45 | static struct clksrc_clk clk_mout_epll = { | ||
46 | .clk = { | ||
47 | .name = "mout_epll", | ||
48 | .id = -1, | ||
49 | }, | ||
50 | .sources = &clk_src_epll, | ||
51 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 4, .size = 1 }, | ||
52 | }; | ||
53 | |||
54 | static struct clksrc_clk clk_mout_mpll = { | ||
55 | .clk = { | ||
56 | .name = "mout_mpll", | ||
57 | .id = -1, | ||
58 | }, | ||
59 | .sources = &clk_src_mpll, | ||
60 | .reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 8, .size = 1 }, | ||
61 | }; | ||
62 | |||
63 | static struct clk *clkset_moutcore_list[] = { | ||
64 | [0] = &clk_mout_apll.clk, | ||
65 | [1] = &clk_mout_mpll.clk, | ||
66 | }; | ||
67 | |||
68 | static struct clksrc_sources clkset_moutcore = { | ||
69 | .sources = clkset_moutcore_list, | ||
70 | .nr_sources = ARRAY_SIZE(clkset_moutcore_list), | ||
71 | }; | ||
72 | |||
73 | static struct clksrc_clk clk_moutcore = { | ||
74 | .clk = { | ||
75 | .name = "moutcore", | ||
76 | .id = -1, | ||
77 | }, | ||
78 | .sources = &clkset_moutcore, | ||
79 | .reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 16, .size = 1 }, | ||
80 | }; | ||
81 | |||
82 | static struct clksrc_clk clk_coreclk = { | ||
83 | .clk = { | ||
84 | .name = "core_clk", | ||
85 | .id = -1, | ||
86 | .parent = &clk_moutcore.clk, | ||
87 | }, | ||
88 | .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 0, .size = 3 }, | ||
89 | }; | ||
90 | |||
91 | static struct clksrc_clk clk_armclk = { | ||
92 | .clk = { | ||
93 | .name = "armclk", | ||
94 | .id = -1, | ||
95 | .parent = &clk_coreclk.clk, | ||
96 | }, | ||
97 | }; | ||
98 | |||
99 | static struct clksrc_clk clk_aclk_corem0 = { | ||
100 | .clk = { | ||
101 | .name = "aclk_corem0", | ||
102 | .id = -1, | ||
103 | .parent = &clk_coreclk.clk, | ||
104 | }, | ||
105 | .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 4, .size = 3 }, | ||
106 | }; | ||
107 | |||
108 | static struct clksrc_clk clk_aclk_cores = { | ||
109 | .clk = { | ||
110 | .name = "aclk_cores", | ||
111 | .id = -1, | ||
112 | .parent = &clk_coreclk.clk, | ||
113 | }, | ||
114 | .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 4, .size = 3 }, | ||
115 | }; | ||
116 | |||
117 | static struct clksrc_clk clk_aclk_corem1 = { | ||
118 | .clk = { | ||
119 | .name = "aclk_corem1", | ||
120 | .id = -1, | ||
121 | .parent = &clk_coreclk.clk, | ||
122 | }, | ||
123 | .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 8, .size = 3 }, | ||
124 | }; | ||
125 | |||
126 | static struct clksrc_clk clk_periphclk = { | ||
127 | .clk = { | ||
128 | .name = "periphclk", | ||
129 | .id = -1, | ||
130 | .parent = &clk_coreclk.clk, | ||
131 | }, | ||
132 | .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 12, .size = 3 }, | ||
133 | }; | ||
134 | |||
135 | static struct clksrc_clk clk_atclk = { | ||
136 | .clk = { | ||
137 | .name = "atclk", | ||
138 | .id = -1, | ||
139 | .parent = &clk_moutcore.clk, | ||
140 | }, | ||
141 | .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 16, .size = 3 }, | ||
142 | }; | ||
143 | |||
144 | static struct clksrc_clk clk_pclk_dbg = { | ||
145 | .clk = { | ||
146 | .name = "pclk_dbg", | ||
147 | .id = -1, | ||
148 | .parent = &clk_atclk.clk, | ||
149 | }, | ||
150 | .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 20, .size = 3 }, | ||
151 | }; | ||
152 | |||
153 | /* Core list of CMU_CORE side */ | ||
154 | |||
155 | static struct clk *clkset_corebus_list[] = { | ||
156 | [0] = &clk_mout_mpll.clk, | ||
157 | [1] = &clk_mout_apll.clk, | ||
158 | }; | ||
159 | |||
160 | static struct clksrc_sources clkset_mout_corebus = { | ||
161 | .sources = clkset_corebus_list, | ||
162 | .nr_sources = ARRAY_SIZE(clkset_corebus_list), | ||
163 | }; | ||
164 | |||
165 | static struct clksrc_clk clk_mout_corebus = { | ||
166 | .clk = { | ||
167 | .name = "mout_corebus", | ||
168 | .id = -1, | ||
169 | }, | ||
170 | .sources = &clkset_mout_corebus, | ||
171 | .reg_src = { .reg = S5P_CLKSRC_CORE, .shift = 4, .size = 1 }, | ||
172 | }; | ||
173 | |||
174 | static struct clksrc_clk clk_sclk_dmc = { | ||
175 | .clk = { | ||
176 | .name = "sclk_dmc", | ||
177 | .id = -1, | ||
178 | .parent = &clk_mout_corebus.clk, | ||
179 | }, | ||
180 | .reg_div = { .reg = S5P_CLKDIV_CORE0, .shift = 12, .size = 3 }, | ||
181 | }; | ||
182 | |||
183 | static struct clksrc_clk clk_aclk_cored = { | ||
184 | .clk = { | ||
185 | .name = "aclk_cored", | ||
186 | .id = -1, | ||
187 | .parent = &clk_sclk_dmc.clk, | ||
188 | }, | ||
189 | .reg_div = { .reg = S5P_CLKDIV_CORE0, .shift = 16, .size = 3 }, | ||
190 | }; | ||
191 | |||
192 | static struct clksrc_clk clk_aclk_corep = { | ||
193 | .clk = { | ||
194 | .name = "aclk_corep", | ||
195 | .id = -1, | ||
196 | .parent = &clk_aclk_cored.clk, | ||
197 | }, | ||
198 | .reg_div = { .reg = S5P_CLKDIV_CORE0, .shift = 20, .size = 3 }, | ||
199 | }; | ||
200 | |||
201 | static struct clksrc_clk clk_aclk_acp = { | ||
202 | .clk = { | ||
203 | .name = "aclk_acp", | ||
204 | .id = -1, | ||
205 | .parent = &clk_mout_corebus.clk, | ||
206 | }, | ||
207 | .reg_div = { .reg = S5P_CLKDIV_CORE0, .shift = 0, .size = 3 }, | ||
208 | }; | ||
209 | |||
210 | static struct clksrc_clk clk_pclk_acp = { | ||
211 | .clk = { | ||
212 | .name = "pclk_acp", | ||
213 | .id = -1, | ||
214 | .parent = &clk_aclk_acp.clk, | ||
215 | }, | ||
216 | .reg_div = { .reg = S5P_CLKDIV_CORE0, .shift = 4, .size = 3 }, | ||
217 | }; | ||
218 | |||
219 | /* Core list of CMU_TOP side */ | ||
220 | |||
221 | static struct clk *clkset_aclk_top_list[] = { | ||
222 | [0] = &clk_mout_mpll.clk, | ||
223 | [1] = &clk_mout_apll.clk, | ||
224 | }; | ||
225 | |||
226 | static struct clksrc_sources clkset_aclk_200 = { | ||
227 | .sources = clkset_aclk_top_list, | ||
228 | .nr_sources = ARRAY_SIZE(clkset_aclk_top_list), | ||
229 | }; | ||
230 | |||
231 | static struct clksrc_clk clk_aclk_200 = { | ||
232 | .clk = { | ||
233 | .name = "aclk_200", | ||
234 | .id = -1, | ||
235 | }, | ||
236 | .sources = &clkset_aclk_200, | ||
237 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 12, .size = 1 }, | ||
238 | .reg_div = { .reg = S5P_CLKDIV_TOP, .shift = 0, .size = 3 }, | ||
239 | }; | ||
240 | |||
241 | static struct clksrc_sources clkset_aclk_100 = { | ||
242 | .sources = clkset_aclk_top_list, | ||
243 | .nr_sources = ARRAY_SIZE(clkset_aclk_top_list), | ||
244 | }; | ||
245 | |||
246 | static struct clksrc_clk clk_aclk_100 = { | ||
247 | .clk = { | ||
248 | .name = "aclk_100", | ||
249 | .id = -1, | ||
250 | }, | ||
251 | .sources = &clkset_aclk_100, | ||
252 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 16, .size = 1 }, | ||
253 | .reg_div = { .reg = S5P_CLKDIV_TOP, .shift = 4, .size = 4 }, | ||
254 | }; | ||
255 | |||
256 | static struct clksrc_sources clkset_aclk_160 = { | ||
257 | .sources = clkset_aclk_top_list, | ||
258 | .nr_sources = ARRAY_SIZE(clkset_aclk_top_list), | ||
259 | }; | ||
260 | |||
261 | static struct clksrc_clk clk_aclk_160 = { | ||
262 | .clk = { | ||
263 | .name = "aclk_160", | ||
264 | .id = -1, | ||
265 | }, | ||
266 | .sources = &clkset_aclk_160, | ||
267 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 20, .size = 1 }, | ||
268 | .reg_div = { .reg = S5P_CLKDIV_TOP, .shift = 8, .size = 3 }, | ||
269 | }; | ||
270 | |||
271 | static struct clksrc_sources clkset_aclk_133 = { | ||
272 | .sources = clkset_aclk_top_list, | ||
273 | .nr_sources = ARRAY_SIZE(clkset_aclk_top_list), | ||
274 | }; | ||
275 | |||
276 | static struct clksrc_clk clk_aclk_133 = { | ||
277 | .clk = { | ||
278 | .name = "aclk_133", | ||
279 | .id = -1, | ||
280 | }, | ||
281 | .sources = &clkset_aclk_133, | ||
282 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 24, .size = 1 }, | ||
283 | .reg_div = { .reg = S5P_CLKDIV_TOP, .shift = 12, .size = 3 }, | ||
284 | }; | ||
285 | |||
286 | static struct clk *clkset_vpllsrc_list[] = { | ||
287 | [0] = &clk_fin_vpll, | ||
288 | [1] = &clk_sclk_hdmi27m, | ||
289 | }; | ||
290 | |||
291 | static struct clksrc_sources clkset_vpllsrc = { | ||
292 | .sources = clkset_vpllsrc_list, | ||
293 | .nr_sources = ARRAY_SIZE(clkset_vpllsrc_list), | ||
294 | }; | ||
295 | |||
296 | static struct clksrc_clk clk_vpllsrc = { | ||
297 | .clk = { | ||
298 | .name = "vpll_src", | ||
299 | .id = -1, | ||
300 | }, | ||
301 | .sources = &clkset_vpllsrc, | ||
302 | .reg_src = { .reg = S5P_CLKSRC_TOP1, .shift = 0, .size = 1 }, | ||
303 | }; | ||
304 | |||
305 | static struct clk *clkset_sclk_vpll_list[] = { | ||
306 | [0] = &clk_vpllsrc.clk, | ||
307 | [1] = &clk_fout_vpll, | ||
308 | }; | ||
309 | |||
310 | static struct clksrc_sources clkset_sclk_vpll = { | ||
311 | .sources = clkset_sclk_vpll_list, | ||
312 | .nr_sources = ARRAY_SIZE(clkset_sclk_vpll_list), | ||
313 | }; | ||
314 | |||
315 | static struct clksrc_clk clk_sclk_vpll = { | ||
316 | .clk = { | ||
317 | .name = "sclk_vpll", | ||
318 | .id = -1, | ||
319 | }, | ||
320 | .sources = &clkset_sclk_vpll, | ||
321 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 }, | ||
322 | }; | ||
323 | |||
324 | static int s5pv310_clk_ip_peril_ctrl(struct clk *clk, int enable) | ||
325 | { | ||
326 | return s5p_gatectrl(S5P_CLKGATE_IP_PERIL, clk, enable); | ||
327 | } | ||
328 | |||
329 | static struct clk init_clocks_disable[] = { | ||
330 | { | ||
331 | .name = "timers", | ||
332 | .id = -1, | ||
333 | .parent = &clk_aclk_100.clk, | ||
334 | .enable = s5pv310_clk_ip_peril_ctrl, | ||
335 | .ctrlbit = (1<<24), | ||
336 | } | ||
337 | }; | ||
338 | |||
339 | static struct clk init_clocks[] = { | ||
340 | /* Nothing here yet */ | ||
341 | }; | ||
342 | |||
343 | static struct clk *clkset_group_list[] = { | ||
344 | [0] = &clk_ext_xtal_mux, | ||
345 | [1] = &clk_xusbxti, | ||
346 | [2] = &clk_sclk_hdmi27m, | ||
347 | [6] = &clk_mout_mpll.clk, | ||
348 | [7] = &clk_mout_epll.clk, | ||
349 | [8] = &clk_sclk_vpll.clk, | ||
350 | }; | ||
351 | |||
352 | static struct clksrc_sources clkset_group = { | ||
353 | .sources = clkset_group_list, | ||
354 | .nr_sources = ARRAY_SIZE(clkset_group_list), | ||
355 | }; | ||
356 | |||
357 | static struct clksrc_clk clksrcs[] = { | ||
358 | { | ||
359 | .clk = { | ||
360 | .name = "uclk1", | ||
361 | .id = 0, | ||
362 | .ctrlbit = (1 << 0), | ||
363 | .enable = s5pv310_clk_ip_peril_ctrl, | ||
364 | }, | ||
365 | .sources = &clkset_group, | ||
366 | .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 0, .size = 4 }, | ||
367 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 0, .size = 4 }, | ||
368 | }, { | ||
369 | .clk = { | ||
370 | .name = "uclk1", | ||
371 | .id = 1, | ||
372 | .enable = s5pv310_clk_ip_peril_ctrl, | ||
373 | .ctrlbit = (1 << 1), | ||
374 | }, | ||
375 | .sources = &clkset_group, | ||
376 | .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 4, .size = 4 }, | ||
377 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 4, .size = 4 }, | ||
378 | }, { | ||
379 | .clk = { | ||
380 | .name = "uclk1", | ||
381 | .id = 2, | ||
382 | .enable = s5pv310_clk_ip_peril_ctrl, | ||
383 | .ctrlbit = (1 << 2), | ||
384 | }, | ||
385 | .sources = &clkset_group, | ||
386 | .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 8, .size = 4 }, | ||
387 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 8, .size = 4 }, | ||
388 | }, { | ||
389 | .clk = { | ||
390 | .name = "uclk1", | ||
391 | .id = 3, | ||
392 | .enable = s5pv310_clk_ip_peril_ctrl, | ||
393 | .ctrlbit = (1 << 3), | ||
394 | }, | ||
395 | .sources = &clkset_group, | ||
396 | .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 12, .size = 4 }, | ||
397 | .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 12, .size = 4 }, | ||
398 | }, { | ||
399 | .clk = { | ||
400 | .name = "sclk_pwm", | ||
401 | .id = -1, | ||
402 | .enable = s5pv310_clk_ip_peril_ctrl, | ||
403 | .ctrlbit = (1 << 24), | ||
404 | }, | ||
405 | .sources = &clkset_group, | ||
406 | .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 24, .size = 4 }, | ||
407 | .reg_div = { .reg = S5P_CLKDIV_PERIL3, .shift = 0, .size = 4 }, | ||
408 | }, | ||
409 | }; | ||
410 | |||
411 | /* Clock initialization code */ | ||
412 | static struct clksrc_clk *sysclks[] = { | ||
413 | &clk_mout_apll, | ||
414 | &clk_mout_epll, | ||
415 | &clk_mout_mpll, | ||
416 | &clk_moutcore, | ||
417 | &clk_coreclk, | ||
418 | &clk_armclk, | ||
419 | &clk_aclk_corem0, | ||
420 | &clk_aclk_cores, | ||
421 | &clk_aclk_corem1, | ||
422 | &clk_periphclk, | ||
423 | &clk_atclk, | ||
424 | &clk_pclk_dbg, | ||
425 | &clk_mout_corebus, | ||
426 | &clk_sclk_dmc, | ||
427 | &clk_aclk_cored, | ||
428 | &clk_aclk_corep, | ||
429 | &clk_aclk_acp, | ||
430 | &clk_pclk_acp, | ||
431 | &clk_vpllsrc, | ||
432 | &clk_sclk_vpll, | ||
433 | &clk_aclk_200, | ||
434 | &clk_aclk_100, | ||
435 | &clk_aclk_160, | ||
436 | &clk_aclk_133, | ||
437 | }; | ||
438 | |||
439 | void __init_or_cpufreq s5pv310_setup_clocks(void) | ||
440 | { | ||
441 | struct clk *xtal_clk; | ||
442 | unsigned long apll; | ||
443 | unsigned long mpll; | ||
444 | unsigned long epll; | ||
445 | unsigned long vpll; | ||
446 | unsigned long vpllsrc; | ||
447 | unsigned long xtal; | ||
448 | unsigned long armclk; | ||
449 | unsigned long aclk_corem0; | ||
450 | unsigned long aclk_cores; | ||
451 | unsigned long aclk_corem1; | ||
452 | unsigned long periphclk; | ||
453 | unsigned long sclk_dmc; | ||
454 | unsigned long aclk_cored; | ||
455 | unsigned long aclk_corep; | ||
456 | unsigned long aclk_acp; | ||
457 | unsigned long pclk_acp; | ||
458 | unsigned int ptr; | ||
459 | |||
460 | printk(KERN_DEBUG "%s: registering clocks\n", __func__); | ||
461 | |||
462 | xtal_clk = clk_get(NULL, "xtal"); | ||
463 | BUG_ON(IS_ERR(xtal_clk)); | ||
464 | |||
465 | xtal = clk_get_rate(xtal_clk); | ||
466 | clk_put(xtal_clk); | ||
467 | |||
468 | printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); | ||
469 | |||
470 | apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON0), pll_4508); | ||
471 | mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON0), pll_4508); | ||
472 | epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON0), | ||
473 | __raw_readl(S5P_EPLL_CON1), pll_4500); | ||
474 | |||
475 | vpllsrc = clk_get_rate(&clk_vpllsrc.clk); | ||
476 | vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), | ||
477 | __raw_readl(S5P_VPLL_CON1), pll_4502); | ||
478 | |||
479 | clk_fout_apll.rate = apll; | ||
480 | clk_fout_mpll.rate = mpll; | ||
481 | clk_fout_epll.rate = epll; | ||
482 | clk_fout_vpll.rate = vpll; | ||
483 | |||
484 | printk(KERN_INFO "S5PV310: PLL settings, A=%ld, M=%ld, E=%ld V=%ld", | ||
485 | apll, mpll, epll, vpll); | ||
486 | |||
487 | armclk = clk_get_rate(&clk_armclk.clk); | ||
488 | aclk_corem0 = clk_get_rate(&clk_aclk_corem0.clk); | ||
489 | aclk_cores = clk_get_rate(&clk_aclk_cores.clk); | ||
490 | aclk_corem1 = clk_get_rate(&clk_aclk_corem1.clk); | ||
491 | periphclk = clk_get_rate(&clk_periphclk.clk); | ||
492 | sclk_dmc = clk_get_rate(&clk_sclk_dmc.clk); | ||
493 | aclk_cored = clk_get_rate(&clk_aclk_cored.clk); | ||
494 | aclk_corep = clk_get_rate(&clk_aclk_corep.clk); | ||
495 | aclk_acp = clk_get_rate(&clk_aclk_acp.clk); | ||
496 | pclk_acp = clk_get_rate(&clk_pclk_acp.clk); | ||
497 | |||
498 | printk(KERN_INFO "S5PV310: ARMCLK=%ld, COREM0=%ld, CORES=%ld\n" | ||
499 | "COREM1=%ld, PERI=%ld, DMC=%ld, CORED=%ld\n" | ||
500 | "COREP=%ld, ACLK_ACP=%ld, PCLK_ACP=%ld", | ||
501 | armclk, aclk_corem0, aclk_cores, aclk_corem1, | ||
502 | periphclk, sclk_dmc, aclk_cored, aclk_corep, | ||
503 | aclk_acp, pclk_acp); | ||
504 | |||
505 | clk_f.rate = armclk; | ||
506 | clk_h.rate = sclk_dmc; | ||
507 | clk_p.rate = periphclk; | ||
508 | |||
509 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) | ||
510 | s3c_set_clksrc(&clksrcs[ptr], true); | ||
511 | } | ||
512 | |||
513 | static struct clk *clks[] __initdata = { | ||
514 | /* Nothing here yet */ | ||
515 | }; | ||
516 | |||
517 | void __init s5pv310_register_clocks(void) | ||
518 | { | ||
519 | struct clk *clkp; | ||
520 | int ret; | ||
521 | int ptr; | ||
522 | |||
523 | ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | ||
524 | if (ret > 0) | ||
525 | printk(KERN_ERR "Failed to register %u clocks\n", ret); | ||
526 | |||
527 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | ||
528 | s3c_register_clksrc(sysclks[ptr], 1); | ||
529 | |||
530 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | ||
531 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | ||
532 | |||
533 | clkp = init_clocks_disable; | ||
534 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | ||
535 | ret = s3c24xx_register_clock(clkp); | ||
536 | if (ret < 0) { | ||
537 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
538 | clkp->name, ret); | ||
539 | } | ||
540 | (clkp->enable)(clkp, 0); | ||
541 | } | ||
542 | |||
543 | s3c_pwmclk_init(); | ||
544 | } | ||
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c new file mode 100644 index 000000000000..196c9f12ed85 --- /dev/null +++ b/arch/arm/mach-s5pv310/cpu.c | |||
@@ -0,0 +1,122 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/cpu.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/sched.h> | ||
12 | #include <linux/sysdev.h> | ||
13 | |||
14 | #include <asm/mach/map.h> | ||
15 | #include <asm/mach/irq.h> | ||
16 | |||
17 | #include <asm/proc-fns.h> | ||
18 | |||
19 | #include <plat/cpu.h> | ||
20 | #include <plat/clock.h> | ||
21 | #include <plat/s5pv310.h> | ||
22 | |||
23 | #include <mach/regs-irq.h> | ||
24 | |||
25 | void __iomem *gic_cpu_base_addr; | ||
26 | |||
27 | extern int combiner_init(unsigned int combiner_nr, void __iomem *base, | ||
28 | unsigned int irq_start); | ||
29 | extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); | ||
30 | |||
31 | /* Initial IO mappings */ | ||
32 | static struct map_desc s5pv310_iodesc[] __initdata = { | ||
33 | { | ||
34 | .virtual = (unsigned long)S5P_VA_COREPERI_BASE, | ||
35 | .pfn = __phys_to_pfn(S5PV310_PA_COREPERI), | ||
36 | .length = SZ_8K, | ||
37 | .type = MT_DEVICE, | ||
38 | }, { | ||
39 | .virtual = (unsigned long)S5P_VA_COMBINER_BASE, | ||
40 | .pfn = __phys_to_pfn(S5PV310_PA_COMBINER), | ||
41 | .length = SZ_4K, | ||
42 | .type = MT_DEVICE, | ||
43 | }, { | ||
44 | .virtual = (unsigned long)S5P_VA_L2CC, | ||
45 | .pfn = __phys_to_pfn(S5PV310_PA_L2CC), | ||
46 | .length = SZ_4K, | ||
47 | .type = MT_DEVICE, | ||
48 | }, | ||
49 | }; | ||
50 | |||
51 | static void s5pv310_idle(void) | ||
52 | { | ||
53 | if (!need_resched()) | ||
54 | cpu_do_idle(); | ||
55 | |||
56 | local_irq_enable(); | ||
57 | } | ||
58 | |||
59 | /* s5pv310_map_io | ||
60 | * | ||
61 | * register the standard cpu IO areas | ||
62 | */ | ||
63 | void __init s5pv310_map_io(void) | ||
64 | { | ||
65 | iotable_init(s5pv310_iodesc, ARRAY_SIZE(s5pv310_iodesc)); | ||
66 | } | ||
67 | |||
68 | void __init s5pv310_init_clocks(int xtal) | ||
69 | { | ||
70 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | ||
71 | |||
72 | s3c24xx_register_baseclocks(xtal); | ||
73 | s5p_register_clocks(xtal); | ||
74 | s5pv310_register_clocks(); | ||
75 | s5pv310_setup_clocks(); | ||
76 | } | ||
77 | |||
78 | void __init s5pv310_init_irq(void) | ||
79 | { | ||
80 | int irq; | ||
81 | |||
82 | gic_cpu_base_addr = S5P_VA_GIC_CPU; | ||
83 | gic_dist_init(0, S5P_VA_GIC_DIST, IRQ_LOCALTIMER); | ||
84 | gic_cpu_init(0, S5P_VA_GIC_CPU); | ||
85 | |||
86 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { | ||
87 | combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), | ||
88 | COMBINER_IRQ(irq, 0)); | ||
89 | combiner_cascade_irq(irq, IRQ_SPI(irq)); | ||
90 | } | ||
91 | |||
92 | /* The parameters of s5p_init_irq() are for VIC init. | ||
93 | * Theses parameters should be NULL and 0 because S5PV310 | ||
94 | * uses GIC instead of VIC. | ||
95 | */ | ||
96 | s5p_init_irq(NULL, 0); | ||
97 | } | ||
98 | |||
99 | struct sysdev_class s5pv310_sysclass = { | ||
100 | .name = "s5pv310-core", | ||
101 | }; | ||
102 | |||
103 | static struct sys_device s5pv310_sysdev = { | ||
104 | .cls = &s5pv310_sysclass, | ||
105 | }; | ||
106 | |||
107 | static int __init s5pv310_core_init(void) | ||
108 | { | ||
109 | return sysdev_class_register(&s5pv310_sysclass); | ||
110 | } | ||
111 | |||
112 | core_initcall(s5pv310_core_init); | ||
113 | |||
114 | int __init s5pv310_init(void) | ||
115 | { | ||
116 | printk(KERN_INFO "S5PV310: Initializing architecture\n"); | ||
117 | |||
118 | /* set idle function */ | ||
119 | pm_idle = s5pv310_idle; | ||
120 | |||
121 | return sysdev_register(&s5pv310_sysdev); | ||
122 | } | ||
diff --git a/arch/arm/mach-s5pv310/headsmp.S b/arch/arm/mach-s5pv310/headsmp.S new file mode 100644 index 000000000000..164b7b045713 --- /dev/null +++ b/arch/arm/mach-s5pv310/headsmp.S | |||
@@ -0,0 +1,41 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-s5pv310/headsmp.S | ||
3 | * | ||
4 | * Cloned from linux/arch/arm/mach-realview/headsmp.S | ||
5 | * | ||
6 | * Copyright (c) 2003 ARM Limited | ||
7 | * All Rights Reserved | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | #include <linux/linkage.h> | ||
14 | #include <linux/init.h> | ||
15 | |||
16 | __INIT | ||
17 | |||
18 | /* | ||
19 | * s5pv310 specific entry point for secondary CPUs. This provides | ||
20 | * a "holding pen" into which all secondary cores are held until we're | ||
21 | * ready for them to initialise. | ||
22 | */ | ||
23 | ENTRY(s5pv310_secondary_startup) | ||
24 | mrc p15, 0, r0, c0, c0, 5 | ||
25 | and r0, r0, #15 | ||
26 | adr r4, 1f | ||
27 | ldmia r4, {r5, r6} | ||
28 | sub r4, r4, r5 | ||
29 | add r6, r6, r4 | ||
30 | pen: ldr r7, [r6] | ||
31 | cmp r7, r0 | ||
32 | bne pen | ||
33 | |||
34 | /* | ||
35 | * we've been released from the holding pen: secondary_stack | ||
36 | * should now contain the SVC stack for this core | ||
37 | */ | ||
38 | b secondary_startup | ||
39 | |||
40 | 1: .long . | ||
41 | .long pen_release | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/debug-macro.S b/arch/arm/mach-s5pv310/include/mach/debug-macro.S new file mode 100644 index 000000000000..6fb3893486be --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/debug-macro.S | |||
@@ -0,0 +1,36 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/debug-macro.S | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* pull in the relevant register and map files. */ | ||
14 | |||
15 | #include <mach/map.h> | ||
16 | |||
17 | /* note, for the boot process to work we have to keep the UART | ||
18 | * virtual address aligned to an 1MiB boundary for the L1 | ||
19 | * mapping the head code makes. We keep the UART virtual address | ||
20 | * aligned and add in the offset when we load the value here. | ||
21 | */ | ||
22 | |||
23 | .macro addruart, rx, tmp | ||
24 | mrc p15, 0, \rx, c1, c0 | ||
25 | tst \rx, #1 | ||
26 | ldreq \rx, = S3C_PA_UART | ||
27 | ldrne \rx, = S3C_VA_UART | ||
28 | #if CONFIG_DEBUG_S3C_UART != 0 | ||
29 | add \rx, \rx, #(0x10000 * CONFIG_DEBUG_S3C_UART) | ||
30 | #endif | ||
31 | .endm | ||
32 | |||
33 | #define fifo_full fifo_full_s5pv210 | ||
34 | #define fifo_level fifo_level_s5pv210 | ||
35 | |||
36 | #include <plat/debug-macro.S> | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/entry-macro.S b/arch/arm/mach-s5pv310/include/mach/entry-macro.S new file mode 100644 index 000000000000..e600e1d522df --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/entry-macro.S | |||
@@ -0,0 +1,84 @@ | |||
1 | /* arch/arm/mach-s5pv310/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Cloned from arch/arm/mach-realview/include/mach/entry-macro.S | ||
4 | * | ||
5 | * Low-level IRQ helper macros for S5PV310 platforms | ||
6 | * | ||
7 | * This file is licensed under the terms of the GNU General Public | ||
8 | * License version 2. This program is licensed "as is" without any | ||
9 | * warranty of any kind, whether express or implied. | ||
10 | */ | ||
11 | |||
12 | #include <mach/hardware.h> | ||
13 | #include <asm/hardware/gic.h> | ||
14 | |||
15 | .macro disable_fiq | ||
16 | .endm | ||
17 | |||
18 | .macro get_irqnr_preamble, base, tmp | ||
19 | ldr \base, =gic_cpu_base_addr | ||
20 | ldr \base, [\base] | ||
21 | .endm | ||
22 | |||
23 | .macro arch_ret_to_user, tmp1, tmp2 | ||
24 | .endm | ||
25 | |||
26 | /* | ||
27 | * The interrupt numbering scheme is defined in the | ||
28 | * interrupt controller spec. To wit: | ||
29 | * | ||
30 | * Interrupts 0-15 are IPI | ||
31 | * 16-28 are reserved | ||
32 | * 29-31 are local. We allow 30 to be used for the watchdog. | ||
33 | * 32-1020 are global | ||
34 | * 1021-1022 are reserved | ||
35 | * 1023 is "spurious" (no interrupt) | ||
36 | * | ||
37 | * For now, we ignore all local interrupts so only return an interrupt if it's | ||
38 | * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. | ||
39 | * | ||
40 | * A simple read from the controller will tell us the number of the highest | ||
41 | * priority enabled interrupt. We then just need to check whether it is in the | ||
42 | * valid range for an IRQ (30-1020 inclusive). | ||
43 | */ | ||
44 | |||
45 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
46 | |||
47 | ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */ | ||
48 | |||
49 | ldr \tmp, =1021 | ||
50 | |||
51 | bic \irqnr, \irqstat, #0x1c00 | ||
52 | |||
53 | cmp \irqnr, #29 | ||
54 | cmpcc \irqnr, \irqnr | ||
55 | cmpne \irqnr, \tmp | ||
56 | cmpcs \irqnr, \irqnr | ||
57 | addne \irqnr, \irqnr, #32 | ||
58 | |||
59 | .endm | ||
60 | |||
61 | /* We assume that irqstat (the raw value of the IRQ acknowledge | ||
62 | * register) is preserved from the macro above. | ||
63 | * If there is an IPI, we immediately signal end of interrupt on the | ||
64 | * controller, since this requires the original irqstat value which | ||
65 | * we won't easily be able to recreate later. | ||
66 | */ | ||
67 | |||
68 | .macro test_for_ipi, irqnr, irqstat, base, tmp | ||
69 | bic \irqnr, \irqstat, #0x1c00 | ||
70 | cmp \irqnr, #16 | ||
71 | strcc \irqstat, [\base, #GIC_CPU_EOI] | ||
72 | cmpcs \irqnr, \irqnr | ||
73 | .endm | ||
74 | |||
75 | /* As above, this assumes that irqstat and base are preserved.. */ | ||
76 | |||
77 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
78 | bic \irqnr, \irqstat, #0x1c00 | ||
79 | mov \tmp, #0 | ||
80 | cmp \irqnr, #29 | ||
81 | moveq \tmp, #1 | ||
82 | streq \irqstat, [\base, #GIC_CPU_EOI] | ||
83 | cmp \tmp, #0 | ||
84 | .endm | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/gpio.h b/arch/arm/mach-s5pv310/include/mach/gpio.h new file mode 100644 index 000000000000..20cb80c23466 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/gpio.h | |||
@@ -0,0 +1,135 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/gpio.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV310 - GPIO lib support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_GPIO_H | ||
14 | #define __ASM_ARCH_GPIO_H __FILE__ | ||
15 | |||
16 | #define gpio_get_value __gpio_get_value | ||
17 | #define gpio_set_value __gpio_set_value | ||
18 | #define gpio_cansleep __gpio_cansleep | ||
19 | #define gpio_to_irq __gpio_to_irq | ||
20 | |||
21 | /* Practically, GPIO banks upto GPZ are the configurable gpio banks */ | ||
22 | |||
23 | /* GPIO bank sizes */ | ||
24 | #define S5PV310_GPIO_A0_NR (8) | ||
25 | #define S5PV310_GPIO_A1_NR (6) | ||
26 | #define S5PV310_GPIO_B_NR (8) | ||
27 | #define S5PV310_GPIO_C0_NR (5) | ||
28 | #define S5PV310_GPIO_C1_NR (5) | ||
29 | #define S5PV310_GPIO_D0_NR (4) | ||
30 | #define S5PV310_GPIO_D1_NR (4) | ||
31 | #define S5PV310_GPIO_E0_NR (5) | ||
32 | #define S5PV310_GPIO_E1_NR (8) | ||
33 | #define S5PV310_GPIO_E2_NR (6) | ||
34 | #define S5PV310_GPIO_E3_NR (8) | ||
35 | #define S5PV310_GPIO_E4_NR (8) | ||
36 | #define S5PV310_GPIO_F0_NR (8) | ||
37 | #define S5PV310_GPIO_F1_NR (8) | ||
38 | #define S5PV310_GPIO_F2_NR (8) | ||
39 | #define S5PV310_GPIO_F3_NR (6) | ||
40 | #define S5PV310_GPIO_J0_NR (8) | ||
41 | #define S5PV310_GPIO_J1_NR (5) | ||
42 | #define S5PV310_GPIO_K0_NR (7) | ||
43 | #define S5PV310_GPIO_K1_NR (7) | ||
44 | #define S5PV310_GPIO_K2_NR (7) | ||
45 | #define S5PV310_GPIO_K3_NR (7) | ||
46 | #define S5PV310_GPIO_L0_NR (8) | ||
47 | #define S5PV310_GPIO_L1_NR (3) | ||
48 | #define S5PV310_GPIO_L2_NR (8) | ||
49 | #define S5PV310_GPIO_X0_NR (8) | ||
50 | #define S5PV310_GPIO_X1_NR (8) | ||
51 | #define S5PV310_GPIO_X2_NR (8) | ||
52 | #define S5PV310_GPIO_X3_NR (8) | ||
53 | #define S5PV310_GPIO_Z_NR (7) | ||
54 | |||
55 | /* GPIO bank numbers */ | ||
56 | |||
57 | #define S5PV310_GPIO_NEXT(__gpio) \ | ||
58 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) | ||
59 | |||
60 | enum s5p_gpio_number { | ||
61 | S5PV310_GPIO_A0_START = 0, | ||
62 | S5PV310_GPIO_A1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_A0), | ||
63 | S5PV310_GPIO_B_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_A1), | ||
64 | S5PV310_GPIO_C0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_B), | ||
65 | S5PV310_GPIO_C1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_C0), | ||
66 | S5PV310_GPIO_D0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_C1), | ||
67 | S5PV310_GPIO_D1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_D0), | ||
68 | S5PV310_GPIO_E0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_D1), | ||
69 | S5PV310_GPIO_E1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E0), | ||
70 | S5PV310_GPIO_E2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E1), | ||
71 | S5PV310_GPIO_E3_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E2), | ||
72 | S5PV310_GPIO_E4_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E3), | ||
73 | S5PV310_GPIO_F0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E4), | ||
74 | S5PV310_GPIO_F1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_F0), | ||
75 | S5PV310_GPIO_F2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_F1), | ||
76 | S5PV310_GPIO_F3_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_F2), | ||
77 | S5PV310_GPIO_J0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_F3), | ||
78 | S5PV310_GPIO_J1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_J0), | ||
79 | S5PV310_GPIO_K0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_J1), | ||
80 | S5PV310_GPIO_K1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_K0), | ||
81 | S5PV310_GPIO_K2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_K1), | ||
82 | S5PV310_GPIO_K3_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_K2), | ||
83 | S5PV310_GPIO_L0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_K3), | ||
84 | S5PV310_GPIO_L1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_L0), | ||
85 | S5PV310_GPIO_L2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_L1), | ||
86 | S5PV310_GPIO_X0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_L2), | ||
87 | S5PV310_GPIO_X1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_X0), | ||
88 | S5PV310_GPIO_X2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_X1), | ||
89 | S5PV310_GPIO_X3_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_X2), | ||
90 | S5PV310_GPIO_Z_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_X3), | ||
91 | }; | ||
92 | |||
93 | /* S5PV310 GPIO number definitions */ | ||
94 | #define S5PV310_GPA0(_nr) (S5PV310_GPIO_A0_START + (_nr)) | ||
95 | #define S5PV310_GPA1(_nr) (S5PV310_GPIO_A1_START + (_nr)) | ||
96 | #define S5PV310_GPB(_nr) (S5PV310_GPIO_B_START + (_nr)) | ||
97 | #define S5PV310_GPC0(_nr) (S5PV310_GPIO_C0_START + (_nr)) | ||
98 | #define S5PV310_GPC1(_nr) (S5PV310_GPIO_C1_START + (_nr)) | ||
99 | #define S5PV310_GPD0(_nr) (S5PV310_GPIO_D0_START + (_nr)) | ||
100 | #define S5PV310_GPD1(_nr) (S5PV310_GPIO_D1_START + (_nr)) | ||
101 | #define S5PV310_GPE0(_nr) (S5PV310_GPIO_E0_START + (_nr)) | ||
102 | #define S5PV310_GPE1(_nr) (S5PV310_GPIO_E1_START + (_nr)) | ||
103 | #define S5PV310_GPE2(_nr) (S5PV310_GPIO_E2_START + (_nr)) | ||
104 | #define S5PV310_GPE3(_nr) (S5PV310_GPIO_E3_START + (_nr)) | ||
105 | #define S5PV310_GPE4(_nr) (S5PV310_GPIO_E4_START + (_nr)) | ||
106 | #define S5PV310_GPF0(_nr) (S5PV310_GPIO_F0_START + (_nr)) | ||
107 | #define S5PV310_GPF1(_nr) (S5PV310_GPIO_F1_START + (_nr)) | ||
108 | #define S5PV310_GPF2(_nr) (S5PV310_GPIO_F2_START + (_nr)) | ||
109 | #define S5PV310_GPF3(_nr) (S5PV310_GPIO_F3_START + (_nr)) | ||
110 | #define S5PV310_GPJ0(_nr) (S5PV310_GPIO_J0_START + (_nr)) | ||
111 | #define S5PV310_GPJ1(_nr) (S5PV310_GPIO_J1_START + (_nr)) | ||
112 | #define S5PV310_GPK0(_nr) (S5PV310_GPIO_K0_START + (_nr)) | ||
113 | #define S5PV310_GPK1(_nr) (S5PV310_GPIO_K1_START + (_nr)) | ||
114 | #define S5PV310_GPK2(_nr) (S5PV310_GPIO_K2_START + (_nr)) | ||
115 | #define S5PV310_GPK3(_nr) (S5PV310_GPIO_K3_START + (_nr)) | ||
116 | #define S5PV310_GPL0(_nr) (S5PV310_GPIO_L0_START + (_nr)) | ||
117 | #define S5PV310_GPL1(_nr) (S5PV310_GPIO_L1_START + (_nr)) | ||
118 | #define S5PV310_GPL2(_nr) (S5PV310_GPIO_L2_START + (_nr)) | ||
119 | #define S5PV310_GPX0(_nr) (S5PV310_GPIO_X0_START + (_nr)) | ||
120 | #define S5PV310_GPX1(_nr) (S5PV310_GPIO_X1_START + (_nr)) | ||
121 | #define S5PV310_GPX2(_nr) (S5PV310_GPIO_X2_START + (_nr)) | ||
122 | #define S5PV310_GPX3(_nr) (S5PV310_GPIO_X3_START + (_nr)) | ||
123 | #define S5PV310_GPZ(_nr) (S5PV310_GPIO_Z_START + (_nr)) | ||
124 | |||
125 | /* the end of the S5PV310 specific gpios */ | ||
126 | #define S5PV310_GPIO_END (S5PV310_GPZ(S5PV310_GPIO_Z_NR) + 1) | ||
127 | #define S3C_GPIO_END S5PV310_GPIO_END | ||
128 | |||
129 | /* define the number of gpios we need to the one after the GPZ() range */ | ||
130 | #define ARCH_NR_GPIOS (S5PV310_GPZ(S5PV310_GPIO_Z_NR) + \ | ||
131 | CONFIG_SAMSUNG_GPIO_EXTRA + 1) | ||
132 | |||
133 | #include <asm-generic/gpio.h> | ||
134 | |||
135 | #endif /* __ASM_ARCH_GPIO_H */ | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/hardware.h b/arch/arm/mach-s5pv310/include/mach/hardware.h new file mode 100644 index 000000000000..28ff9881f1a6 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/hardware.h | |||
@@ -0,0 +1,18 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/hardware.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV310 - Hardware support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_HARDWARE_H | ||
14 | #define __ASM_ARCH_HARDWARE_H __FILE__ | ||
15 | |||
16 | /* currently nothing here, placeholder */ | ||
17 | |||
18 | #endif /* __ASM_ARCH_HARDWARE_H */ | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/io.h b/arch/arm/mach-s5pv310/include/mach/io.h new file mode 100644 index 000000000000..8a7f9128391f --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/io.h | |||
@@ -0,0 +1,26 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/io.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org> | ||
7 | * | ||
8 | * Based on arch/arm/mach-s5p6442/include/mach/io.h | ||
9 | * | ||
10 | * Default IO routines for S5PV310 | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License version 2 as | ||
14 | * published by the Free Software Foundation. | ||
15 | */ | ||
16 | |||
17 | #ifndef __ASM_ARM_ARCH_IO_H | ||
18 | #define __ASM_ARM_ARCH_IO_H __FILE__ | ||
19 | |||
20 | /* No current ISA/PCI bus support. */ | ||
21 | #define __io(a) __typesafe_io(a) | ||
22 | #define __mem_pci(a) (a) | ||
23 | |||
24 | #define IO_SPACE_LIMIT (0xFFFFFFFF) | ||
25 | |||
26 | #endif /* __ASM_ARM_ARCH_IO_H */ | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-s5pv310/include/mach/irqs.h new file mode 100644 index 000000000000..56885ca3773c --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/irqs.h | |||
@@ -0,0 +1,74 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/irqs.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV210 - IRQ definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_IRQS_H | ||
14 | #define __ASM_ARCH_IRQS_H __FILE__ | ||
15 | |||
16 | #include <plat/irqs.h> | ||
17 | |||
18 | /* Private Peripheral Interrupt */ | ||
19 | #define IRQ_PPI(x) S5P_IRQ(x+16) | ||
20 | |||
21 | #define IRQ_LOCALTIMER IRQ_PPI(13) | ||
22 | |||
23 | /* Shared Peripheral Interrupt */ | ||
24 | #define IRQ_SPI(x) S5P_IRQ(x+32) | ||
25 | |||
26 | #define IRQ_EINT0 IRQ_SPI(40) | ||
27 | #define IRQ_EINT1 IRQ_SPI(41) | ||
28 | #define IRQ_EINT2 IRQ_SPI(42) | ||
29 | #define IRQ_EINT3 IRQ_SPI(43) | ||
30 | #define IRQ_USB_HSOTG IRQ_SPI(44) | ||
31 | #define IRQ_USB_HOST IRQ_SPI(45) | ||
32 | #define IRQ_MODEM_IF IRQ_SPI(46) | ||
33 | #define IRQ_ROTATOR IRQ_SPI(47) | ||
34 | #define IRQ_JPEG IRQ_SPI(48) | ||
35 | #define IRQ_2D IRQ_SPI(49) | ||
36 | #define IRQ_PCIE IRQ_SPI(50) | ||
37 | #define IRQ_SYSTEM_TIMER IRQ_SPI(51) | ||
38 | #define IRQ_MFC IRQ_SPI(52) | ||
39 | #define IRQ_WTD IRQ_SPI(53) | ||
40 | #define IRQ_AUDIO_SS IRQ_SPI(54) | ||
41 | #define IRQ_AC97 IRQ_SPI(55) | ||
42 | #define IRQ_SPDIF IRQ_SPI(56) | ||
43 | #define IRQ_KEYPAD IRQ_SPI(57) | ||
44 | #define IRQ_INTFEEDCTRL_SSS IRQ_SPI(58) | ||
45 | #define IRQ_SLIMBUS IRQ_SPI(59) | ||
46 | #define IRQ_PMU IRQ_SPI(60) | ||
47 | #define IRQ_TSI IRQ_SPI(61) | ||
48 | #define IRQ_SATA IRQ_SPI(62) | ||
49 | #define IRQ_GPS IRQ_SPI(63) | ||
50 | |||
51 | #define MAX_IRQ_IN_COMBINER 8 | ||
52 | #define COMBINER_GROUP(x) ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(64)) | ||
53 | #define COMBINER_IRQ(x, y) (COMBINER_GROUP(x) + y) | ||
54 | |||
55 | #define IRQ_TIMER0_VIC COMBINER_IRQ(22, 0) | ||
56 | #define IRQ_TIMER1_VIC COMBINER_IRQ(22, 1) | ||
57 | #define IRQ_TIMER2_VIC COMBINER_IRQ(22, 2) | ||
58 | #define IRQ_TIMER3_VIC COMBINER_IRQ(22, 3) | ||
59 | #define IRQ_TIMER4_VIC COMBINER_IRQ(22, 4) | ||
60 | |||
61 | #define IRQ_UART0 COMBINER_IRQ(26, 0) | ||
62 | #define IRQ_UART1 COMBINER_IRQ(26, 1) | ||
63 | #define IRQ_UART2 COMBINER_IRQ(26, 2) | ||
64 | #define IRQ_UART3 COMBINER_IRQ(26, 3) | ||
65 | #define IRQ_UART4 COMBINER_IRQ(26, 4) | ||
66 | |||
67 | #define IRQ_IIC COMBINER_IRQ(27, 0) | ||
68 | |||
69 | /* Set the default NR_IRQS */ | ||
70 | #define NR_IRQS COMBINER_IRQ(MAX_COMBINER_NR, 0) | ||
71 | |||
72 | #define MAX_COMBINER_NR 39 | ||
73 | |||
74 | #endif /* ASM_ARCH_IRQS_H */ | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h new file mode 100644 index 000000000000..87697c9fca5b --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/map.h | |||
@@ -0,0 +1,69 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/map.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV310 - Memory map definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_MAP_H | ||
14 | #define __ASM_ARCH_MAP_H __FILE__ | ||
15 | |||
16 | #include <plat/map-base.h> | ||
17 | |||
18 | /* | ||
19 | * S5PV310 UART offset is 0x10000 but the older S5P SoCs are 0x400. | ||
20 | * So need to define it, and here is to avoid redefinition warning. | ||
21 | */ | ||
22 | #define S3C_UART_OFFSET (0x10000) | ||
23 | |||
24 | #include <plat/map-s5p.h> | ||
25 | |||
26 | #define S5PV310_PA_CHIPID (0x10000000) | ||
27 | #define S5P_PA_CHIPID S5PV310_PA_CHIPID | ||
28 | |||
29 | #define S5PV310_PA_SYSCON (0x10020000) | ||
30 | #define S5P_PA_SYSCON S5PV310_PA_SYSCON | ||
31 | |||
32 | #define S5PV310_PA_WATCHDOG (0x10060000) | ||
33 | |||
34 | #define S5PV310_PA_COMBINER (0x10448000) | ||
35 | |||
36 | #define S5PV310_PA_COREPERI (0x10500000) | ||
37 | #define S5PV310_PA_GIC_CPU (0x10500100) | ||
38 | #define S5PV310_PA_TWD (0x10500600) | ||
39 | #define S5PV310_PA_GIC_DIST (0x10501000) | ||
40 | #define S5PV310_PA_L2CC (0x10502000) | ||
41 | |||
42 | #define S5PV310_PA_GPIO (0x11000000) | ||
43 | #define S5P_PA_GPIO S5PV310_PA_GPIO | ||
44 | |||
45 | #define S5PV310_PA_UART (0x13800000) | ||
46 | |||
47 | #define S5P_PA_UART(x) (S5PV310_PA_UART + ((x) * S3C_UART_OFFSET)) | ||
48 | #define S5P_PA_UART0 S5P_PA_UART(0) | ||
49 | #define S5P_PA_UART1 S5P_PA_UART(1) | ||
50 | #define S5P_PA_UART2 S5P_PA_UART(2) | ||
51 | #define S5P_PA_UART3 S5P_PA_UART(3) | ||
52 | #define S5P_PA_UART4 S5P_PA_UART(4) | ||
53 | |||
54 | #define S5P_SZ_UART SZ_256 | ||
55 | |||
56 | #define S5PV310_PA_IIC0 (0x13860000) | ||
57 | |||
58 | #define S5PV310_PA_TIMER (0x139D0000) | ||
59 | #define S5P_PA_TIMER S5PV310_PA_TIMER | ||
60 | |||
61 | #define S5PV310_PA_SDRAM (0x40000000) | ||
62 | #define S5P_PA_SDRAM S5PV310_PA_SDRAM | ||
63 | |||
64 | /* compatibiltiy defines. */ | ||
65 | #define S3C_PA_UART S5PV310_PA_UART | ||
66 | #define S3C_PA_IIC S5PV310_PA_IIC0 | ||
67 | #define S3C_PA_WDT S5PV310_PA_WATCHDOG | ||
68 | |||
69 | #endif /* __ASM_ARCH_MAP_H */ | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/memory.h b/arch/arm/mach-s5pv310/include/mach/memory.h new file mode 100644 index 000000000000..1dffb4823245 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/memory.h | |||
@@ -0,0 +1,22 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/memory.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV310 - Memory definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_MEMORY_H | ||
14 | #define __ASM_ARCH_MEMORY_H __FILE__ | ||
15 | |||
16 | #define PHYS_OFFSET UL(0x40000000) | ||
17 | |||
18 | /* Maximum of 256MiB in one bank */ | ||
19 | #define MAX_PHYSMEM_BITS 32 | ||
20 | #define SECTION_SIZE_BITS 28 | ||
21 | |||
22 | #endif /* __ASM_ARCH_MEMORY_H */ | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/pwm-clock.h b/arch/arm/mach-s5pv310/include/mach/pwm-clock.h new file mode 100644 index 000000000000..7e6da2701088 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/pwm-clock.h | |||
@@ -0,0 +1,70 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/pwm-clock.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Copyright 2008 Openmoko, Inc. | ||
7 | * Copyright 2008 Simtec Electronics | ||
8 | * Ben Dooks <ben@simtec.co.uk> | ||
9 | * http://armlinux.simtec.co.uk/ | ||
10 | * | ||
11 | * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h | ||
12 | * | ||
13 | * S5PV310 - pwm clock and timer support | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License version 2 as | ||
17 | * published by the Free Software Foundation. | ||
18 | */ | ||
19 | |||
20 | #ifndef __ASM_ARCH_PWMCLK_H | ||
21 | #define __ASM_ARCH_PWMCLK_H __FILE__ | ||
22 | |||
23 | /** | ||
24 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk | ||
25 | * @tcfg: The timer TCFG1 register bits shifted down to 0. | ||
26 | * | ||
27 | * Return true if the given configuration from TCFG1 is a TCLK instead | ||
28 | * any of the TDIV clocks. | ||
29 | */ | ||
30 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | ||
31 | { | ||
32 | return tcfg == S3C64XX_TCFG1_MUX_TCLK; | ||
33 | } | ||
34 | |||
35 | /** | ||
36 | * tcfg_to_divisor() - convert tcfg1 setting to a divisor | ||
37 | * @tcfg1: The tcfg1 setting, shifted down. | ||
38 | * | ||
39 | * Get the divisor value for the given tcfg1 setting. We assume the | ||
40 | * caller has already checked to see if this is not a TCLK source. | ||
41 | */ | ||
42 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | ||
43 | { | ||
44 | return 1 << tcfg1; | ||
45 | } | ||
46 | |||
47 | /** | ||
48 | * pwm_tdiv_has_div1() - does the tdiv setting have a /1 | ||
49 | * | ||
50 | * Return true if we have a /1 in the tdiv setting. | ||
51 | */ | ||
52 | static inline unsigned int pwm_tdiv_has_div1(void) | ||
53 | { | ||
54 | return 1; | ||
55 | } | ||
56 | |||
57 | /** | ||
58 | * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. | ||
59 | * @div: The divisor to calculate the bit information for. | ||
60 | * | ||
61 | * Turn a divisor into the necessary bit field for TCFG1. | ||
62 | */ | ||
63 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) | ||
64 | { | ||
65 | return ilog2(div); | ||
66 | } | ||
67 | |||
68 | #define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK | ||
69 | |||
70 | #endif /* __ASM_ARCH_PWMCLK_H */ | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-clock.h b/arch/arm/mach-s5pv310/include/mach/regs-clock.h new file mode 100644 index 000000000000..59e3a7e94d80 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/regs-clock.h | |||
@@ -0,0 +1,62 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/regs-clock.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV310 - Clock register definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_CLOCK_H | ||
14 | #define __ASM_ARCH_REGS_CLOCK_H __FILE__ | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | |||
18 | #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) | ||
19 | |||
20 | #define S5P_INFORM0 S5P_CLKREG(0x800) | ||
21 | |||
22 | #define S5P_EPLL_CON0 S5P_CLKREG(0x1C110) | ||
23 | #define S5P_EPLL_CON1 S5P_CLKREG(0x1C114) | ||
24 | #define S5P_VPLL_CON0 S5P_CLKREG(0x1C120) | ||
25 | #define S5P_VPLL_CON1 S5P_CLKREG(0x1C124) | ||
26 | |||
27 | #define S5P_CLKSRC_TOP0 S5P_CLKREG(0x1C210) | ||
28 | #define S5P_CLKSRC_TOP1 S5P_CLKREG(0x1C214) | ||
29 | |||
30 | #define S5P_CLKSRC_PERIL0 S5P_CLKREG(0x1C250) | ||
31 | |||
32 | #define S5P_CLKDIV_TOP S5P_CLKREG(0x1C510) | ||
33 | |||
34 | #define S5P_CLKDIV_PERIL0 S5P_CLKREG(0x1C550) | ||
35 | #define S5P_CLKDIV_PERIL1 S5P_CLKREG(0x1C554) | ||
36 | #define S5P_CLKDIV_PERIL2 S5P_CLKREG(0x1C558) | ||
37 | #define S5P_CLKDIV_PERIL3 S5P_CLKREG(0x1C55C) | ||
38 | #define S5P_CLKDIV_PERIL4 S5P_CLKREG(0x1C560) | ||
39 | #define S5P_CLKDIV_PERIL5 S5P_CLKREG(0x1C564) | ||
40 | |||
41 | #define S5P_CLKGATE_IP_PERIL S5P_CLKREG(0x1C950) | ||
42 | |||
43 | #define S5P_CLKSRC_CORE S5P_CLKREG(0x20200) | ||
44 | |||
45 | #define S5P_CLKDIV_CORE0 S5P_CLKREG(0x20500) | ||
46 | |||
47 | #define S5P_APLL_LOCK S5P_CLKREG(0x24000) | ||
48 | #define S5P_MPLL_LOCK S5P_CLKREG(0x24004) | ||
49 | #define S5P_APLL_CON0 S5P_CLKREG(0x24100) | ||
50 | #define S5P_APLL_CON1 S5P_CLKREG(0x24104) | ||
51 | #define S5P_MPLL_CON0 S5P_CLKREG(0x24108) | ||
52 | #define S5P_MPLL_CON1 S5P_CLKREG(0x2410C) | ||
53 | |||
54 | #define S5P_CLKSRC_CPU S5P_CLKREG(0x24200) | ||
55 | #define S5P_CLKMUX_STATCPU S5P_CLKREG(0x24400) | ||
56 | |||
57 | #define S5P_CLKDIV_CPU S5P_CLKREG(0x24500) | ||
58 | #define S5P_CLKDIV_STATCPU S5P_CLKREG(0x24600) | ||
59 | |||
60 | #define S5P_CLKGATE_SCLKCPU S5P_CLKREG(0x24800) | ||
61 | |||
62 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-irq.h b/arch/arm/mach-s5pv310/include/mach/regs-irq.h new file mode 100644 index 000000000000..c6e09c7f9161 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/regs-irq.h | |||
@@ -0,0 +1,19 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/regs-irq.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV310 - IRQ register definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_IRQ_H | ||
14 | #define __ASM_ARCH_REGS_IRQ_H __FILE__ | ||
15 | |||
16 | #include <asm/hardware/gic.h> | ||
17 | #include <mach/map.h> | ||
18 | |||
19 | #endif /* __ASM_ARCH_REGS_IRQ_H */ | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/smp.h b/arch/arm/mach-s5pv310/include/mach/smp.h new file mode 100644 index 000000000000..990f3ba88a1f --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/smp.h | |||
@@ -0,0 +1,29 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/smp.h | ||
2 | * | ||
3 | * Cloned from arch/arm/mach-realview/include/mach/smp.h | ||
4 | */ | ||
5 | |||
6 | #ifndef ASM_ARCH_SMP_H | ||
7 | #define ASM_ARCH_SMP_H __FILE__ | ||
8 | |||
9 | #include <asm/hardware/gic.h> | ||
10 | |||
11 | extern void __iomem *gic_cpu_base_addr; | ||
12 | |||
13 | #define hard_smp_processor_id() \ | ||
14 | ({ \ | ||
15 | unsigned int cpunum; \ | ||
16 | __asm__("mrc p15, 0, %0, c0, c0, 5" \ | ||
17 | : "=r" (cpunum)); \ | ||
18 | cpunum &= 0x03; \ | ||
19 | }) | ||
20 | |||
21 | /* | ||
22 | * We use IRQ1 as the IPI | ||
23 | */ | ||
24 | static inline void smp_cross_call(const struct cpumask *mask) | ||
25 | { | ||
26 | gic_raise_softirq(mask, 1); | ||
27 | } | ||
28 | |||
29 | #endif | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/system.h b/arch/arm/mach-s5pv310/include/mach/system.h new file mode 100644 index 000000000000..d10c009cf0f1 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/system.h | |||
@@ -0,0 +1,22 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV310 - system support header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
15 | |||
16 | #include <plat/system-reset.h> | ||
17 | |||
18 | static void arch_idle(void) | ||
19 | { | ||
20 | /* nothing here yet */ | ||
21 | } | ||
22 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/timex.h b/arch/arm/mach-s5pv310/include/mach/timex.h new file mode 100644 index 000000000000..bd2359b952b4 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/timex.h | |||
@@ -0,0 +1,29 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/timex.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Copyright (c) 2003-2010 Simtec Electronics | ||
7 | * Ben Dooks <ben@simtec.co.uk> | ||
8 | * | ||
9 | * Based on arch/arm/mach-s5p6442/include/mach/timex.h | ||
10 | * | ||
11 | * S5PV310 - time parameters | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License version 2 as | ||
15 | * published by the Free Software Foundation. | ||
16 | */ | ||
17 | |||
18 | #ifndef __ASM_ARCH_TIMEX_H | ||
19 | #define __ASM_ARCH_TIMEX_H __FILE__ | ||
20 | |||
21 | /* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it | ||
22 | * a variable is useless. It seems as long as we make our timers an | ||
23 | * exact multiple of HZ, any value that makes a 1->1 correspondence | ||
24 | * for the time conversion functions to/from jiffies is acceptable. | ||
25 | */ | ||
26 | |||
27 | #define CLOCK_TICK_RATE 12000000 | ||
28 | |||
29 | #endif /* __ASM_ARCH_TIMEX_H */ | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/uncompress.h b/arch/arm/mach-s5pv310/include/mach/uncompress.h new file mode 100644 index 000000000000..59593c1e2416 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/uncompress.h | |||
@@ -0,0 +1,30 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/uncompress.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV310 - uncompress code | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_UNCOMPRESS_H | ||
14 | #define __ASM_ARCH_UNCOMPRESS_H __FILE__ | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | #include <plat/uncompress.h> | ||
18 | |||
19 | static void arch_detect_cpu(void) | ||
20 | { | ||
21 | /* we do not need to do any cpu detection here at the moment. */ | ||
22 | |||
23 | /* | ||
24 | * For preventing FIFO overrun or infinite loop of UART console, | ||
25 | * fifo_max should be the minimum fifo size of all of the UART channels | ||
26 | */ | ||
27 | fifo_mask = S5PV210_UFSTAT_TXMASK; | ||
28 | fifo_max = 15 << S5PV210_UFSTAT_TXSHIFT; | ||
29 | } | ||
30 | #endif /* __ASM_ARCH_UNCOMPRESS_H */ | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/vmalloc.h b/arch/arm/mach-s5pv310/include/mach/vmalloc.h new file mode 100644 index 000000000000..3f565ebb7daa --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/vmalloc.h | |||
@@ -0,0 +1,22 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/vmalloc.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Copyright 2010 Ben Dooks <ben-linux@fluff.org> | ||
7 | * | ||
8 | * Based on arch/arm/mach-s5p6440/include/mach/vmalloc.h | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | * | ||
14 | * S5PV310 vmalloc definition | ||
15 | */ | ||
16 | |||
17 | #ifndef __ASM_ARCH_VMALLOC_H | ||
18 | #define __ASM_ARCH_VMALLOC_H __FILE__ | ||
19 | |||
20 | #define VMALLOC_END (0xF0000000) | ||
21 | |||
22 | #endif /* __ASM_ARCH_VMALLOC_H */ | ||
diff --git a/arch/arm/mach-s5pv310/init.c b/arch/arm/mach-s5pv310/init.c new file mode 100644 index 000000000000..182dcf42cfb4 --- /dev/null +++ b/arch/arm/mach-s5pv310/init.c | |||
@@ -0,0 +1,41 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/init.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/serial_core.h> | ||
12 | |||
13 | #include <plat/cpu.h> | ||
14 | #include <plat/devs.h> | ||
15 | #include <plat/regs-serial.h> | ||
16 | |||
17 | static struct s3c24xx_uart_clksrc s5pv310_serial_clocks[] = { | ||
18 | [0] = { | ||
19 | .name = "uclk1", | ||
20 | .divisor = 1, | ||
21 | .min_baud = 0, | ||
22 | .max_baud = 0, | ||
23 | }, | ||
24 | }; | ||
25 | |||
26 | /* uart registration process */ | ||
27 | void __init s5pv310_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
28 | { | ||
29 | struct s3c2410_uartcfg *tcfg = cfg; | ||
30 | u32 ucnt; | ||
31 | |||
32 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { | ||
33 | if (!tcfg->clocks) { | ||
34 | tcfg->has_fracval = 1; | ||
35 | tcfg->clocks = s5pv310_serial_clocks; | ||
36 | tcfg->clocks_size = ARRAY_SIZE(s5pv310_serial_clocks); | ||
37 | } | ||
38 | } | ||
39 | |||
40 | s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); | ||
41 | } | ||
diff --git a/arch/arm/mach-s5pv310/irq-combiner.c b/arch/arm/mach-s5pv310/irq-combiner.c new file mode 100644 index 000000000000..0f7052164f23 --- /dev/null +++ b/arch/arm/mach-s5pv310/irq-combiner.c | |||
@@ -0,0 +1,125 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/irq-combiner.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Based on arch/arm/common/gic.c | ||
7 | * | ||
8 | * IRQ COMBINER support | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/io.h> | ||
16 | |||
17 | #include <asm/mach/irq.h> | ||
18 | |||
19 | #define COMBINER_ENABLE_SET 0x0 | ||
20 | #define COMBINER_ENABLE_CLEAR 0x4 | ||
21 | #define COMBINER_INT_STATUS 0xC | ||
22 | |||
23 | static DEFINE_SPINLOCK(irq_controller_lock); | ||
24 | |||
25 | struct combiner_chip_data { | ||
26 | unsigned int irq_offset; | ||
27 | void __iomem *base; | ||
28 | }; | ||
29 | |||
30 | static struct combiner_chip_data combiner_data[MAX_COMBINER_NR]; | ||
31 | |||
32 | static inline void __iomem *combiner_base(unsigned int irq) | ||
33 | { | ||
34 | struct combiner_chip_data *combiner_data = get_irq_chip_data(irq); | ||
35 | return combiner_data->base; | ||
36 | } | ||
37 | |||
38 | static void combiner_mask_irq(unsigned int irq) | ||
39 | { | ||
40 | u32 mask = 1 << (irq % 32); | ||
41 | |||
42 | __raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_CLEAR); | ||
43 | } | ||
44 | |||
45 | static void combiner_unmask_irq(unsigned int irq) | ||
46 | { | ||
47 | u32 mask = 1 << (irq % 32); | ||
48 | |||
49 | __raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_SET); | ||
50 | } | ||
51 | |||
52 | static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) | ||
53 | { | ||
54 | struct combiner_chip_data *chip_data = get_irq_data(irq); | ||
55 | struct irq_chip *chip = get_irq_chip(irq); | ||
56 | unsigned int cascade_irq, combiner_irq; | ||
57 | unsigned long status; | ||
58 | |||
59 | /* primary controller ack'ing */ | ||
60 | chip->ack(irq); | ||
61 | |||
62 | spin_lock(&irq_controller_lock); | ||
63 | status = __raw_readl(chip_data->base + COMBINER_INT_STATUS); | ||
64 | spin_unlock(&irq_controller_lock); | ||
65 | |||
66 | if (status == 0) | ||
67 | goto out; | ||
68 | |||
69 | for (combiner_irq = 0; combiner_irq < 32; combiner_irq++) { | ||
70 | if (status & 0x1) | ||
71 | break; | ||
72 | status >>= 1; | ||
73 | } | ||
74 | |||
75 | cascade_irq = combiner_irq + (chip_data->irq_offset & ~31); | ||
76 | if (unlikely(cascade_irq >= NR_IRQS)) | ||
77 | do_bad_IRQ(cascade_irq, desc); | ||
78 | else | ||
79 | generic_handle_irq(cascade_irq); | ||
80 | |||
81 | out: | ||
82 | /* primary controller unmasking */ | ||
83 | chip->unmask(irq); | ||
84 | } | ||
85 | |||
86 | static struct irq_chip combiner_chip = { | ||
87 | .name = "COMBINER", | ||
88 | .mask = combiner_mask_irq, | ||
89 | .unmask = combiner_unmask_irq, | ||
90 | }; | ||
91 | |||
92 | void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq) | ||
93 | { | ||
94 | if (combiner_nr >= MAX_COMBINER_NR) | ||
95 | BUG(); | ||
96 | if (set_irq_data(irq, &combiner_data[combiner_nr]) != 0) | ||
97 | BUG(); | ||
98 | set_irq_chained_handler(irq, combiner_handle_cascade_irq); | ||
99 | } | ||
100 | |||
101 | void __init combiner_init(unsigned int combiner_nr, void __iomem *base, | ||
102 | unsigned int irq_start) | ||
103 | { | ||
104 | unsigned int i; | ||
105 | |||
106 | if (combiner_nr >= MAX_COMBINER_NR) | ||
107 | BUG(); | ||
108 | |||
109 | combiner_data[combiner_nr].base = base; | ||
110 | combiner_data[combiner_nr].irq_offset = irq_start; | ||
111 | |||
112 | /* Disable all interrupts */ | ||
113 | |||
114 | __raw_writel(0xffffffff, base + COMBINER_ENABLE_CLEAR); | ||
115 | |||
116 | /* Setup the Linux IRQ subsystem */ | ||
117 | |||
118 | for (i = irq_start; i < combiner_data[combiner_nr].irq_offset | ||
119 | + MAX_IRQ_IN_COMBINER; i++) { | ||
120 | set_irq_chip(i, &combiner_chip); | ||
121 | set_irq_chip_data(i, &combiner_data[combiner_nr]); | ||
122 | set_irq_handler(i, handle_level_irq); | ||
123 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | ||
124 | } | ||
125 | } | ||
diff --git a/arch/arm/mach-s5pv310/localtimer.c b/arch/arm/mach-s5pv310/localtimer.c new file mode 100644 index 000000000000..2784036cd8b1 --- /dev/null +++ b/arch/arm/mach-s5pv310/localtimer.c | |||
@@ -0,0 +1,25 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/localtimer.c | ||
2 | * | ||
3 | * Cloned from linux/arch/arm/mach-realview/localtimer.c | ||
4 | * | ||
5 | * Copyright (C) 2002 ARM Ltd. | ||
6 | * All Rights Reserved | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/clockchips.h> | ||
14 | |||
15 | #include <asm/irq.h> | ||
16 | #include <asm/localtimer.h> | ||
17 | |||
18 | /* | ||
19 | * Setup the local clock events for a CPU. | ||
20 | */ | ||
21 | void __cpuinit local_timer_setup(struct clock_event_device *evt) | ||
22 | { | ||
23 | evt->irq = IRQ_LOCALTIMER; | ||
24 | twd_timer_setup(evt); | ||
25 | } | ||
diff --git a/arch/arm/mach-s5pv310/mach-smdkv310.c b/arch/arm/mach-s5pv310/mach-smdkv310.c new file mode 100644 index 000000000000..0d6ab77709d2 --- /dev/null +++ b/arch/arm/mach-s5pv310/mach-smdkv310.c | |||
@@ -0,0 +1,92 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/mach-smdkv310.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/serial_core.h> | ||
12 | |||
13 | #include <asm/mach/arch.h> | ||
14 | #include <asm/mach-types.h> | ||
15 | #include <asm/hardware/cache-l2x0.h> | ||
16 | |||
17 | #include <plat/regs-serial.h> | ||
18 | #include <plat/s5pv310.h> | ||
19 | #include <plat/cpu.h> | ||
20 | |||
21 | #include <mach/map.h> | ||
22 | |||
23 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
24 | #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
25 | S3C2410_UCON_RXILEVEL | \ | ||
26 | S3C2410_UCON_TXIRQMODE | \ | ||
27 | S3C2410_UCON_RXIRQMODE | \ | ||
28 | S3C2410_UCON_RXFIFO_TOI | \ | ||
29 | S3C2443_UCON_RXERR_IRQEN) | ||
30 | |||
31 | #define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
32 | |||
33 | #define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
34 | S5PV210_UFCON_TXTRIG4 | \ | ||
35 | S5PV210_UFCON_RXTRIG4) | ||
36 | |||
37 | static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = { | ||
38 | [0] = { | ||
39 | .hwport = 0, | ||
40 | .flags = 0, | ||
41 | .ucon = SMDKV310_UCON_DEFAULT, | ||
42 | .ulcon = SMDKV310_ULCON_DEFAULT, | ||
43 | .ufcon = SMDKV310_UFCON_DEFAULT, | ||
44 | }, | ||
45 | [1] = { | ||
46 | .hwport = 1, | ||
47 | .flags = 0, | ||
48 | .ucon = SMDKV310_UCON_DEFAULT, | ||
49 | .ulcon = SMDKV310_ULCON_DEFAULT, | ||
50 | .ufcon = SMDKV310_UFCON_DEFAULT, | ||
51 | }, | ||
52 | [2] = { | ||
53 | .hwport = 2, | ||
54 | .flags = 0, | ||
55 | .ucon = SMDKV310_UCON_DEFAULT, | ||
56 | .ulcon = SMDKV310_ULCON_DEFAULT, | ||
57 | .ufcon = SMDKV310_UFCON_DEFAULT, | ||
58 | }, | ||
59 | [3] = { | ||
60 | .hwport = 3, | ||
61 | .flags = 0, | ||
62 | .ucon = SMDKV310_UCON_DEFAULT, | ||
63 | .ulcon = SMDKV310_ULCON_DEFAULT, | ||
64 | .ufcon = SMDKV310_UFCON_DEFAULT, | ||
65 | }, | ||
66 | }; | ||
67 | |||
68 | static void __init smdkv310_map_io(void) | ||
69 | { | ||
70 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
71 | s3c24xx_init_clocks(24000000); | ||
72 | s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs)); | ||
73 | } | ||
74 | |||
75 | static void __init smdkv310_machine_init(void) | ||
76 | { | ||
77 | #ifdef CONFIG_CACHE_L2X0 | ||
78 | l2x0_init(S5P_VA_L2CC, 1 << 28, 0xffffffff); | ||
79 | #endif | ||
80 | } | ||
81 | |||
82 | MACHINE_START(SMDKV310, "SMDKV310") | ||
83 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | ||
84 | /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */ | ||
85 | .phys_io = S3C_PA_UART & 0xfff00000, | ||
86 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | ||
87 | .boot_params = S5P_PA_SDRAM + 0x100, | ||
88 | .init_irq = s5pv310_init_irq, | ||
89 | .map_io = smdkv310_map_io, | ||
90 | .init_machine = smdkv310_machine_init, | ||
91 | .timer = &s5pv310_timer, | ||
92 | MACHINE_END | ||
diff --git a/arch/arm/mach-s5pv310/mach-universal_c210.c b/arch/arm/mach-s5pv310/mach-universal_c210.c new file mode 100644 index 000000000000..2388cb947936 --- /dev/null +++ b/arch/arm/mach-s5pv310/mach-universal_c210.c | |||
@@ -0,0 +1,86 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/mach-universal_c210.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | */ | ||
9 | |||
10 | #include <linux/serial_core.h> | ||
11 | |||
12 | #include <asm/mach/arch.h> | ||
13 | #include <asm/mach-types.h> | ||
14 | #include <asm/hardware/cache-l2x0.h> | ||
15 | |||
16 | #include <plat/regs-serial.h> | ||
17 | #include <plat/s5pv310.h> | ||
18 | #include <plat/cpu.h> | ||
19 | |||
20 | #include <mach/map.h> | ||
21 | |||
22 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
23 | #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
24 | S3C2410_UCON_RXILEVEL | \ | ||
25 | S3C2410_UCON_TXIRQMODE | \ | ||
26 | S3C2410_UCON_RXIRQMODE | \ | ||
27 | S3C2410_UCON_RXFIFO_TOI | \ | ||
28 | S3C2443_UCON_RXERR_IRQEN) | ||
29 | |||
30 | #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
31 | |||
32 | #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
33 | S5PV210_UFCON_TXTRIG256 | \ | ||
34 | S5PV210_UFCON_RXTRIG256) | ||
35 | |||
36 | static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = { | ||
37 | [0] = { | ||
38 | .hwport = 0, | ||
39 | .ucon = UNIVERSAL_UCON_DEFAULT, | ||
40 | .ulcon = UNIVERSAL_ULCON_DEFAULT, | ||
41 | .ufcon = UNIVERSAL_UFCON_DEFAULT, | ||
42 | }, | ||
43 | [1] = { | ||
44 | .hwport = 1, | ||
45 | .ucon = UNIVERSAL_UCON_DEFAULT, | ||
46 | .ulcon = UNIVERSAL_ULCON_DEFAULT, | ||
47 | .ufcon = UNIVERSAL_UFCON_DEFAULT, | ||
48 | }, | ||
49 | [2] = { | ||
50 | .hwport = 2, | ||
51 | .ucon = UNIVERSAL_UCON_DEFAULT, | ||
52 | .ulcon = UNIVERSAL_ULCON_DEFAULT, | ||
53 | .ufcon = UNIVERSAL_UFCON_DEFAULT, | ||
54 | }, | ||
55 | [3] = { | ||
56 | .hwport = 3, | ||
57 | .ucon = UNIVERSAL_UCON_DEFAULT, | ||
58 | .ulcon = UNIVERSAL_ULCON_DEFAULT, | ||
59 | .ufcon = UNIVERSAL_UFCON_DEFAULT, | ||
60 | }, | ||
61 | }; | ||
62 | |||
63 | static void __init universal_map_io(void) | ||
64 | { | ||
65 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
66 | s3c24xx_init_clocks(24000000); | ||
67 | s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); | ||
68 | } | ||
69 | |||
70 | static void __init universal_machine_init(void) | ||
71 | { | ||
72 | #ifdef CONFIG_CACHE_L2X0 | ||
73 | l2x0_init(S5P_VA_L2CC, 1 << 28, 0xffffffff); | ||
74 | #endif | ||
75 | } | ||
76 | |||
77 | MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") | ||
78 | /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */ | ||
79 | .phys_io = S3C_PA_UART & 0xfff00000, | ||
80 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | ||
81 | .boot_params = S5P_PA_SDRAM + 0x100, | ||
82 | .init_irq = s5pv310_init_irq, | ||
83 | .map_io = universal_map_io, | ||
84 | .init_machine = universal_machine_init, | ||
85 | .timer = &s5pv310_timer, | ||
86 | MACHINE_END | ||
diff --git a/arch/arm/mach-s5pv310/platsmp.c b/arch/arm/mach-s5pv310/platsmp.c new file mode 100644 index 000000000000..fe9469abd006 --- /dev/null +++ b/arch/arm/mach-s5pv310/platsmp.c | |||
@@ -0,0 +1,192 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/platsmp.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Cloned from linux/arch/arm/mach-vexpress/platsmp.c | ||
7 | * | ||
8 | * Copyright (C) 2002 ARM Ltd. | ||
9 | * All Rights Reserved | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License version 2 as | ||
13 | * published by the Free Software Foundation. | ||
14 | */ | ||
15 | |||
16 | #include <linux/init.h> | ||
17 | #include <linux/errno.h> | ||
18 | #include <linux/delay.h> | ||
19 | #include <linux/device.h> | ||
20 | #include <linux/jiffies.h> | ||
21 | #include <linux/smp.h> | ||
22 | #include <linux/io.h> | ||
23 | |||
24 | #include <asm/cacheflush.h> | ||
25 | #include <asm/localtimer.h> | ||
26 | #include <asm/smp_scu.h> | ||
27 | #include <asm/unified.h> | ||
28 | |||
29 | #include <mach/hardware.h> | ||
30 | #include <mach/regs-clock.h> | ||
31 | |||
32 | extern void s5pv310_secondary_startup(void); | ||
33 | |||
34 | /* | ||
35 | * control for which core is the next to come out of the secondary | ||
36 | * boot "holding pen" | ||
37 | */ | ||
38 | |||
39 | volatile int __cpuinitdata pen_release = -1; | ||
40 | |||
41 | static void __iomem *scu_base_addr(void) | ||
42 | { | ||
43 | return (void __iomem *)(S5P_VA_SCU); | ||
44 | } | ||
45 | |||
46 | static DEFINE_SPINLOCK(boot_lock); | ||
47 | |||
48 | void __cpuinit platform_secondary_init(unsigned int cpu) | ||
49 | { | ||
50 | trace_hardirqs_off(); | ||
51 | |||
52 | /* | ||
53 | * if any interrupts are already enabled for the primary | ||
54 | * core (e.g. timer irq), then they will not have been enabled | ||
55 | * for us: do so | ||
56 | */ | ||
57 | gic_cpu_init(0, gic_cpu_base_addr); | ||
58 | |||
59 | /* | ||
60 | * let the primary processor know we're out of the | ||
61 | * pen, then head off into the C entry point | ||
62 | */ | ||
63 | pen_release = -1; | ||
64 | smp_wmb(); | ||
65 | |||
66 | /* | ||
67 | * Synchronise with the boot thread. | ||
68 | */ | ||
69 | spin_lock(&boot_lock); | ||
70 | spin_unlock(&boot_lock); | ||
71 | } | ||
72 | |||
73 | int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) | ||
74 | { | ||
75 | unsigned long timeout; | ||
76 | |||
77 | /* | ||
78 | * Set synchronisation state between this boot processor | ||
79 | * and the secondary one | ||
80 | */ | ||
81 | spin_lock(&boot_lock); | ||
82 | |||
83 | /* | ||
84 | * The secondary processor is waiting to be released from | ||
85 | * the holding pen - release it, then wait for it to flag | ||
86 | * that it has been released by resetting pen_release. | ||
87 | * | ||
88 | * Note that "pen_release" is the hardware CPU ID, whereas | ||
89 | * "cpu" is Linux's internal ID. | ||
90 | */ | ||
91 | pen_release = cpu; | ||
92 | __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release)); | ||
93 | outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1)); | ||
94 | |||
95 | /* | ||
96 | * Send the secondary CPU a soft interrupt, thereby causing | ||
97 | * the boot monitor to read the system wide flags register, | ||
98 | * and branch to the address found there. | ||
99 | */ | ||
100 | smp_cross_call(cpumask_of(cpu)); | ||
101 | |||
102 | timeout = jiffies + (1 * HZ); | ||
103 | while (time_before(jiffies, timeout)) { | ||
104 | smp_rmb(); | ||
105 | if (pen_release == -1) | ||
106 | break; | ||
107 | |||
108 | udelay(10); | ||
109 | } | ||
110 | |||
111 | /* | ||
112 | * now the secondary core is starting up let it run its | ||
113 | * calibrations, then wait for it to finish | ||
114 | */ | ||
115 | spin_unlock(&boot_lock); | ||
116 | |||
117 | return pen_release != -1 ? -ENOSYS : 0; | ||
118 | } | ||
119 | |||
120 | /* | ||
121 | * Initialise the CPU possible map early - this describes the CPUs | ||
122 | * which may be present or become present in the system. | ||
123 | */ | ||
124 | |||
125 | void __init smp_init_cpus(void) | ||
126 | { | ||
127 | void __iomem *scu_base = scu_base_addr(); | ||
128 | unsigned int i, ncores; | ||
129 | |||
130 | ncores = scu_base ? scu_get_core_count(scu_base) : 1; | ||
131 | |||
132 | /* sanity check */ | ||
133 | if (ncores == 0) { | ||
134 | printk(KERN_ERR | ||
135 | "S5PV310: strange CM count of 0? Default to 1\n"); | ||
136 | |||
137 | ncores = 1; | ||
138 | } | ||
139 | |||
140 | if (ncores > NR_CPUS) { | ||
141 | printk(KERN_WARNING | ||
142 | "S5PV310: no. of cores (%d) greater than configured " | ||
143 | "maximum of %d - clipping\n", | ||
144 | ncores, NR_CPUS); | ||
145 | ncores = NR_CPUS; | ||
146 | } | ||
147 | |||
148 | for (i = 0; i < ncores; i++) | ||
149 | set_cpu_possible(i, true); | ||
150 | } | ||
151 | |||
152 | void __init smp_prepare_cpus(unsigned int max_cpus) | ||
153 | { | ||
154 | unsigned int ncores = num_possible_cpus(); | ||
155 | unsigned int cpu = smp_processor_id(); | ||
156 | int i; | ||
157 | |||
158 | smp_store_cpu_info(cpu); | ||
159 | |||
160 | /* are we trying to boot more cores than exist? */ | ||
161 | if (max_cpus > ncores) | ||
162 | max_cpus = ncores; | ||
163 | |||
164 | /* | ||
165 | * Initialise the present map, which describes the set of CPUs | ||
166 | * actually populated at the present time. | ||
167 | */ | ||
168 | for (i = 0; i < max_cpus; i++) | ||
169 | set_cpu_present(i, true); | ||
170 | |||
171 | /* | ||
172 | * Initialise the SCU if there are more than one CPU and let | ||
173 | * them know where to start. | ||
174 | */ | ||
175 | if (max_cpus > 1) { | ||
176 | /* | ||
177 | * Enable the local timer or broadcast device for the | ||
178 | * boot CPU, but only if we have more than one CPU. | ||
179 | */ | ||
180 | percpu_timer_setup(); | ||
181 | |||
182 | scu_enable(scu_base_addr()); | ||
183 | |||
184 | /* | ||
185 | * Write the address of secondary startup into the | ||
186 | * system-wide flags register. The boot monitor waits | ||
187 | * until it receives a soft interrupt, and then the | ||
188 | * secondary CPU branches to this address. | ||
189 | */ | ||
190 | __raw_writel(BSYM(virt_to_phys(s5pv310_secondary_startup)), S5P_INFORM0); | ||
191 | } | ||
192 | } | ||
diff --git a/arch/arm/mach-s5pv310/setup-i2c0.c b/arch/arm/mach-s5pv310/setup-i2c0.c new file mode 100644 index 000000000000..436712807383 --- /dev/null +++ b/arch/arm/mach-s5pv310/setup-i2c0.c | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-s5pv310/setup-i2c0.c | ||
3 | * | ||
4 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com/ | ||
6 | * | ||
7 | * I2C0 GPIO configuration. | ||
8 | * | ||
9 | * Based on plat-s3c64xx/setup-i2c0.c | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License version 2 as | ||
13 | * published by the Free Software Foundation. | ||
14 | */ | ||
15 | |||
16 | struct platform_device; /* don't need the contents */ | ||
17 | |||
18 | #include <linux/gpio.h> | ||
19 | #include <plat/iic.h> | ||
20 | #include <plat/gpio-cfg.h> | ||
21 | |||
22 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) | ||
23 | { | ||
24 | s3c_gpio_cfgpin(S5PV310_GPD1(0), S3C_GPIO_SFN(2)); | ||
25 | s3c_gpio_setpull(S5PV310_GPD1(0), S3C_GPIO_PULL_UP); | ||
26 | s3c_gpio_cfgpin(S5PV310_GPD1(1), S3C_GPIO_SFN(2)); | ||
27 | s3c_gpio_setpull(S5PV310_GPD1(1), S3C_GPIO_PULL_UP); | ||
28 | } | ||
diff --git a/arch/arm/mach-s5pv310/setup-i2c1.c b/arch/arm/mach-s5pv310/setup-i2c1.c new file mode 100644 index 000000000000..1ecd5bc35b5a --- /dev/null +++ b/arch/arm/mach-s5pv310/setup-i2c1.c | |||
@@ -0,0 +1,25 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-s5pv310/setup-i2c1.c | ||
3 | * | ||
4 | * Copyright (C) 2010 Samsung Electronics Co., Ltd. | ||
5 | * | ||
6 | * I2C1 GPIO configuration. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | struct platform_device; /* don't need the contents */ | ||
14 | |||
15 | #include <linux/gpio.h> | ||
16 | #include <plat/iic.h> | ||
17 | #include <plat/gpio-cfg.h> | ||
18 | |||
19 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) | ||
20 | { | ||
21 | s3c_gpio_cfgpin(S5PV310_GPD1(2), S3C_GPIO_SFN(2)); | ||
22 | s3c_gpio_setpull(S5PV310_GPD1(2), S3C_GPIO_PULL_UP); | ||
23 | s3c_gpio_cfgpin(S5PV310_GPD1(3), S3C_GPIO_SFN(2)); | ||
24 | s3c_gpio_setpull(S5PV310_GPD1(3), S3C_GPIO_PULL_UP); | ||
25 | } | ||
diff --git a/arch/arm/mach-s5pv310/setup-i2c2.c b/arch/arm/mach-s5pv310/setup-i2c2.c new file mode 100644 index 000000000000..4c0d8def660a --- /dev/null +++ b/arch/arm/mach-s5pv310/setup-i2c2.c | |||
@@ -0,0 +1,25 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-s5pv310/setup-i2c2.c | ||
3 | * | ||
4 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
5 | * | ||
6 | * I2C2 GPIO configuration. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | struct platform_device; /* don't need the contents */ | ||
14 | |||
15 | #include <linux/gpio.h> | ||
16 | #include <plat/iic.h> | ||
17 | #include <plat/gpio-cfg.h> | ||
18 | |||
19 | void s3c_i2c2_cfg_gpio(struct platform_device *dev) | ||
20 | { | ||
21 | s3c_gpio_cfgpin(S5PV310_GPA0(6), S3C_GPIO_SFN(3)); | ||
22 | s3c_gpio_setpull(S5PV310_GPA0(6), S3C_GPIO_PULL_UP); | ||
23 | s3c_gpio_cfgpin(S5PV310_GPA0(7), S3C_GPIO_SFN(3)); | ||
24 | s3c_gpio_setpull(S5PV310_GPA0(7), S3C_GPIO_PULL_UP); | ||
25 | } | ||
diff --git a/arch/arm/mach-s5pv310/time.c b/arch/arm/mach-s5pv310/time.c new file mode 100644 index 000000000000..01b012ad1bfd --- /dev/null +++ b/arch/arm/mach-s5pv310/time.c | |||
@@ -0,0 +1,287 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/time.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5PV310 (and compatible) HRT support | ||
7 | * PWM 2/4 is used for this feature | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/sched.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/irq.h> | ||
17 | #include <linux/err.h> | ||
18 | #include <linux/clk.h> | ||
19 | #include <linux/clockchips.h> | ||
20 | #include <linux/platform_device.h> | ||
21 | |||
22 | #include <asm/smp_twd.h> | ||
23 | |||
24 | #include <mach/map.h> | ||
25 | #include <plat/regs-timer.h> | ||
26 | #include <asm/mach/time.h> | ||
27 | |||
28 | static unsigned long clock_count_per_tick; | ||
29 | |||
30 | static struct clk *tin2; | ||
31 | static struct clk *tin4; | ||
32 | static struct clk *tdiv2; | ||
33 | static struct clk *tdiv4; | ||
34 | static struct clk *timerclk; | ||
35 | |||
36 | static void s5pv310_pwm_stop(unsigned int pwm_id) | ||
37 | { | ||
38 | unsigned long tcon; | ||
39 | |||
40 | tcon = __raw_readl(S3C2410_TCON); | ||
41 | |||
42 | switch (pwm_id) { | ||
43 | case 2: | ||
44 | tcon &= ~S3C2410_TCON_T2START; | ||
45 | break; | ||
46 | case 4: | ||
47 | tcon &= ~S3C2410_TCON_T4START; | ||
48 | break; | ||
49 | default: | ||
50 | break; | ||
51 | } | ||
52 | __raw_writel(tcon, S3C2410_TCON); | ||
53 | } | ||
54 | |||
55 | static void s5pv310_pwm_init(unsigned int pwm_id, unsigned long tcnt) | ||
56 | { | ||
57 | unsigned long tcon; | ||
58 | |||
59 | tcon = __raw_readl(S3C2410_TCON); | ||
60 | |||
61 | /* timers reload after counting zero, so reduce the count by 1 */ | ||
62 | tcnt--; | ||
63 | |||
64 | /* ensure timer is stopped... */ | ||
65 | switch (pwm_id) { | ||
66 | case 2: | ||
67 | tcon &= ~(0xf<<12); | ||
68 | tcon |= S3C2410_TCON_T2MANUALUPD; | ||
69 | |||
70 | __raw_writel(tcnt, S3C2410_TCNTB(2)); | ||
71 | __raw_writel(tcnt, S3C2410_TCMPB(2)); | ||
72 | __raw_writel(tcon, S3C2410_TCON); | ||
73 | |||
74 | break; | ||
75 | case 4: | ||
76 | tcon &= ~(7<<20); | ||
77 | tcon |= S3C2410_TCON_T4MANUALUPD; | ||
78 | |||
79 | __raw_writel(tcnt, S3C2410_TCNTB(4)); | ||
80 | __raw_writel(tcnt, S3C2410_TCMPB(4)); | ||
81 | __raw_writel(tcon, S3C2410_TCON); | ||
82 | |||
83 | break; | ||
84 | default: | ||
85 | break; | ||
86 | } | ||
87 | } | ||
88 | |||
89 | static inline void s5pv310_pwm_start(unsigned int pwm_id, bool periodic) | ||
90 | { | ||
91 | unsigned long tcon; | ||
92 | |||
93 | tcon = __raw_readl(S3C2410_TCON); | ||
94 | |||
95 | switch (pwm_id) { | ||
96 | case 2: | ||
97 | tcon |= S3C2410_TCON_T2START; | ||
98 | tcon &= ~S3C2410_TCON_T2MANUALUPD; | ||
99 | |||
100 | if (periodic) | ||
101 | tcon |= S3C2410_TCON_T2RELOAD; | ||
102 | else | ||
103 | tcon &= ~S3C2410_TCON_T2RELOAD; | ||
104 | break; | ||
105 | case 4: | ||
106 | tcon |= S3C2410_TCON_T4START; | ||
107 | tcon &= ~S3C2410_TCON_T4MANUALUPD; | ||
108 | |||
109 | if (periodic) | ||
110 | tcon |= S3C2410_TCON_T4RELOAD; | ||
111 | else | ||
112 | tcon &= ~S3C2410_TCON_T4RELOAD; | ||
113 | break; | ||
114 | default: | ||
115 | break; | ||
116 | } | ||
117 | __raw_writel(tcon, S3C2410_TCON); | ||
118 | } | ||
119 | |||
120 | static int s5pv310_pwm_set_next_event(unsigned long cycles, | ||
121 | struct clock_event_device *evt) | ||
122 | { | ||
123 | s5pv310_pwm_init(2, cycles); | ||
124 | s5pv310_pwm_start(2, 0); | ||
125 | return 0; | ||
126 | } | ||
127 | |||
128 | static void s5pv310_pwm_set_mode(enum clock_event_mode mode, | ||
129 | struct clock_event_device *evt) | ||
130 | { | ||
131 | s5pv310_pwm_stop(2); | ||
132 | |||
133 | switch (mode) { | ||
134 | case CLOCK_EVT_MODE_PERIODIC: | ||
135 | s5pv310_pwm_init(2, clock_count_per_tick); | ||
136 | s5pv310_pwm_start(2, 1); | ||
137 | break; | ||
138 | case CLOCK_EVT_MODE_ONESHOT: | ||
139 | break; | ||
140 | case CLOCK_EVT_MODE_UNUSED: | ||
141 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
142 | case CLOCK_EVT_MODE_RESUME: | ||
143 | break; | ||
144 | } | ||
145 | } | ||
146 | |||
147 | static struct clock_event_device pwm_event_device = { | ||
148 | .name = "pwm_timer2", | ||
149 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | ||
150 | .rating = 200, | ||
151 | .shift = 32, | ||
152 | .set_next_event = s5pv310_pwm_set_next_event, | ||
153 | .set_mode = s5pv310_pwm_set_mode, | ||
154 | }; | ||
155 | |||
156 | irqreturn_t s5pv310_clock_event_isr(int irq, void *dev_id) | ||
157 | { | ||
158 | struct clock_event_device *evt = &pwm_event_device; | ||
159 | |||
160 | evt->event_handler(evt); | ||
161 | |||
162 | return IRQ_HANDLED; | ||
163 | } | ||
164 | |||
165 | static struct irqaction s5pv310_clock_event_irq = { | ||
166 | .name = "pwm_timer2_irq", | ||
167 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | ||
168 | .handler = s5pv310_clock_event_isr, | ||
169 | }; | ||
170 | |||
171 | static void __init s5pv310_clockevent_init(void) | ||
172 | { | ||
173 | unsigned long pclk; | ||
174 | unsigned long clock_rate; | ||
175 | struct clk *tscaler; | ||
176 | |||
177 | pclk = clk_get_rate(timerclk); | ||
178 | |||
179 | /* configure clock tick */ | ||
180 | |||
181 | tscaler = clk_get_parent(tdiv2); | ||
182 | |||
183 | clk_set_rate(tscaler, pclk / 2); | ||
184 | clk_set_rate(tdiv2, pclk / 2); | ||
185 | clk_set_parent(tin2, tdiv2); | ||
186 | |||
187 | clock_rate = clk_get_rate(tin2); | ||
188 | |||
189 | clock_count_per_tick = clock_rate / HZ; | ||
190 | |||
191 | pwm_event_device.mult = | ||
192 | div_sc(clock_rate, NSEC_PER_SEC, pwm_event_device.shift); | ||
193 | pwm_event_device.max_delta_ns = | ||
194 | clockevent_delta2ns(-1, &pwm_event_device); | ||
195 | pwm_event_device.min_delta_ns = | ||
196 | clockevent_delta2ns(1, &pwm_event_device); | ||
197 | |||
198 | pwm_event_device.cpumask = cpumask_of(0); | ||
199 | clockevents_register_device(&pwm_event_device); | ||
200 | |||
201 | setup_irq(IRQ_TIMER2, &s5pv310_clock_event_irq); | ||
202 | } | ||
203 | |||
204 | static cycle_t s5pv310_pwm4_read(struct clocksource *cs) | ||
205 | { | ||
206 | return (cycle_t) ~__raw_readl(S3C_TIMERREG(0x40)); | ||
207 | } | ||
208 | |||
209 | struct clocksource pwm_clocksource = { | ||
210 | .name = "pwm_timer4", | ||
211 | .rating = 250, | ||
212 | .read = s5pv310_pwm4_read, | ||
213 | .mask = CLOCKSOURCE_MASK(32), | ||
214 | .shift = 20, | ||
215 | .flags = CLOCK_SOURCE_IS_CONTINUOUS , | ||
216 | }; | ||
217 | |||
218 | static void __init s5pv310_clocksource_init(void) | ||
219 | { | ||
220 | unsigned long pclk; | ||
221 | unsigned long clock_rate; | ||
222 | |||
223 | pclk = clk_get_rate(timerclk); | ||
224 | |||
225 | clk_set_rate(tdiv4, pclk / 2); | ||
226 | clk_set_parent(tin4, tdiv4); | ||
227 | |||
228 | clock_rate = clk_get_rate(tin4); | ||
229 | |||
230 | s5pv310_pwm_init(4, ~0); | ||
231 | s5pv310_pwm_start(4, 1); | ||
232 | |||
233 | pwm_clocksource.mult = | ||
234 | clocksource_khz2mult(clock_rate/1000, pwm_clocksource.shift); | ||
235 | |||
236 | if (clocksource_register(&pwm_clocksource)) | ||
237 | panic("%s: can't register clocksource\n", pwm_clocksource.name); | ||
238 | } | ||
239 | |||
240 | static void __init s5pv310_timer_resources(void) | ||
241 | { | ||
242 | struct platform_device tmpdev; | ||
243 | |||
244 | tmpdev.dev.bus = &platform_bus_type; | ||
245 | |||
246 | timerclk = clk_get(NULL, "timers"); | ||
247 | if (IS_ERR(timerclk)) | ||
248 | panic("failed to get timers clock for system timer"); | ||
249 | |||
250 | clk_enable(timerclk); | ||
251 | |||
252 | tmpdev.id = 2; | ||
253 | tin2 = clk_get(&tmpdev.dev, "pwm-tin"); | ||
254 | if (IS_ERR(tin2)) | ||
255 | panic("failed to get pwm-tin2 clock for system timer"); | ||
256 | |||
257 | tdiv2 = clk_get(&tmpdev.dev, "pwm-tdiv"); | ||
258 | if (IS_ERR(tdiv2)) | ||
259 | panic("failed to get pwm-tdiv2 clock for system timer"); | ||
260 | clk_enable(tin2); | ||
261 | |||
262 | tmpdev.id = 4; | ||
263 | tin4 = clk_get(&tmpdev.dev, "pwm-tin"); | ||
264 | if (IS_ERR(tin4)) | ||
265 | panic("failed to get pwm-tin4 clock for system timer"); | ||
266 | |||
267 | tdiv4 = clk_get(&tmpdev.dev, "pwm-tdiv"); | ||
268 | if (IS_ERR(tdiv4)) | ||
269 | panic("failed to get pwm-tdiv4 clock for system timer"); | ||
270 | |||
271 | clk_enable(tin4); | ||
272 | } | ||
273 | |||
274 | static void __init s5pv310_timer_init(void) | ||
275 | { | ||
276 | #ifdef CONFIG_LOCAL_TIMERS | ||
277 | twd_base = S5P_VA_TWD; | ||
278 | #endif | ||
279 | |||
280 | s5pv310_timer_resources(); | ||
281 | s5pv310_clockevent_init(); | ||
282 | s5pv310_clocksource_init(); | ||
283 | } | ||
284 | |||
285 | struct sys_timer s5pv310_timer = { | ||
286 | .init = s5pv310_timer_init, | ||
287 | }; | ||
diff --git a/arch/arm/mach-sa1100/include/mach/irqs.h b/arch/arm/mach-sa1100/include/mach/irqs.h index 8c8845b5ae5b..d18f21abef80 100644 --- a/arch/arm/mach-sa1100/include/mach/irqs.h +++ b/arch/arm/mach-sa1100/include/mach/irqs.h | |||
@@ -77,7 +77,7 @@ | |||
77 | */ | 77 | */ |
78 | #ifdef CONFIG_SA1111 | 78 | #ifdef CONFIG_SA1111 |
79 | #define NR_IRQS (IRQ_BOARD_END + 55) | 79 | #define NR_IRQS (IRQ_BOARD_END + 55) |
80 | #elif defined(CONFIG_SHARPSL_LOCOMO) | 80 | #elif defined(CONFIG_SHARP_LOCOMO) |
81 | #define NR_IRQS (IRQ_BOARD_START + 4) | 81 | #define NR_IRQS (IRQ_BOARD_START + 4) |
82 | #else | 82 | #else |
83 | #define NR_IRQS (IRQ_BOARD_START) | 83 | #define NR_IRQS (IRQ_BOARD_START) |
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 4c704b4e8b34..54b479c35ee0 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig | |||
@@ -7,6 +7,7 @@ config ARCH_SH7367 | |||
7 | select CPU_V6 | 7 | select CPU_V6 |
8 | select HAVE_CLK | 8 | select HAVE_CLK |
9 | select COMMON_CLKDEV | 9 | select COMMON_CLKDEV |
10 | select SH_CLK_CPG | ||
10 | select GENERIC_CLOCKEVENTS | 11 | select GENERIC_CLOCKEVENTS |
11 | 12 | ||
12 | config ARCH_SH7377 | 13 | config ARCH_SH7377 |
@@ -14,6 +15,7 @@ config ARCH_SH7377 | |||
14 | select CPU_V7 | 15 | select CPU_V7 |
15 | select HAVE_CLK | 16 | select HAVE_CLK |
16 | select COMMON_CLKDEV | 17 | select COMMON_CLKDEV |
18 | select SH_CLK_CPG | ||
17 | select GENERIC_CLOCKEVENTS | 19 | select GENERIC_CLOCKEVENTS |
18 | 20 | ||
19 | config ARCH_SH7372 | 21 | config ARCH_SH7372 |
@@ -21,6 +23,7 @@ config ARCH_SH7372 | |||
21 | select CPU_V7 | 23 | select CPU_V7 |
22 | select HAVE_CLK | 24 | select HAVE_CLK |
23 | select COMMON_CLKDEV | 25 | select COMMON_CLKDEV |
26 | select SH_CLK_CPG | ||
24 | select GENERIC_CLOCKEVENTS | 27 | select GENERIC_CLOCKEVENTS |
25 | 28 | ||
26 | comment "SH-Mobile Board Type" | 29 | comment "SH-Mobile Board Type" |
@@ -39,6 +42,20 @@ config MACH_AP4EVB | |||
39 | bool "AP4EVB board" | 42 | bool "AP4EVB board" |
40 | depends on ARCH_SH7372 | 43 | depends on ARCH_SH7372 |
41 | select ARCH_REQUIRE_GPIOLIB | 44 | select ARCH_REQUIRE_GPIOLIB |
45 | select SH_LCD_MIPI_DSI | ||
46 | |||
47 | choice | ||
48 | prompt "AP4EVB LCD panel selection" | ||
49 | default AP4EVB_QHD | ||
50 | depends on MACH_AP4EVB | ||
51 | |||
52 | config AP4EVB_QHD | ||
53 | bool "MIPI-DSI QHD (960x540)" | ||
54 | |||
55 | config AP4EVB_WVGA | ||
56 | bool "Parallel WVGA (800x480)" | ||
57 | |||
58 | endchoice | ||
42 | 59 | ||
43 | comment "SH-Mobile System Configuration" | 60 | comment "SH-Mobile System Configuration" |
44 | 61 | ||
@@ -88,6 +105,15 @@ config SH_TIMER_CMT | |||
88 | help | 105 | help |
89 | This enables build of the CMT timer driver. | 106 | This enables build of the CMT timer driver. |
90 | 107 | ||
108 | config SH_TIMER_TMU | ||
109 | bool "TMU timer driver" | ||
110 | default y | ||
111 | help | ||
112 | This enables build of the TMU timer driver. | ||
113 | |||
91 | endmenu | 114 | endmenu |
92 | 115 | ||
116 | config SH_CLK_CPG | ||
117 | bool | ||
118 | |||
93 | endif | 119 | endif |
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 6d385d371c33..5e16b4c69222 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile | |||
@@ -3,12 +3,12 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | # Common objects | 5 | # Common objects |
6 | obj-y := timer.o console.o | 6 | obj-y := timer.o console.o clock.o |
7 | 7 | ||
8 | # CPU objects | 8 | # CPU objects |
9 | obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o | 9 | obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o |
10 | obj-$(CONFIG_ARCH_SH7377) += setup-sh7377.o clock-sh7367.o intc-sh7377.o | 10 | obj-$(CONFIG_ARCH_SH7377) += setup-sh7377.o clock-sh7377.o intc-sh7377.o |
11 | obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7367.o intc-sh7372.o | 11 | obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7372.o intc-sh7372.o |
12 | 12 | ||
13 | # Pinmux setup | 13 | # Pinmux setup |
14 | pfc-$(CONFIG_ARCH_SH7367) := pfc-sh7367.o | 14 | pfc-$(CONFIG_ARCH_SH7367) := pfc-sh7367.o |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 1c2ec96ce261..23d472f9525e 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
@@ -17,25 +17,45 @@ | |||
17 | * along with this program; if not, write to the Free Software | 17 | * along with this program; if not, write to the Free Software |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
19 | */ | 19 | */ |
20 | #include <linux/clk.h> | ||
20 | #include <linux/kernel.h> | 21 | #include <linux/kernel.h> |
21 | #include <linux/init.h> | 22 | #include <linux/init.h> |
22 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
23 | #include <linux/irq.h> | 24 | #include <linux/irq.h> |
24 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
25 | #include <linux/delay.h> | 26 | #include <linux/delay.h> |
27 | #include <linux/mfd/sh_mobile_sdhi.h> | ||
28 | #include <linux/mmc/host.h> | ||
26 | #include <linux/mtd/mtd.h> | 29 | #include <linux/mtd/mtd.h> |
27 | #include <linux/mtd/partitions.h> | 30 | #include <linux/mtd/partitions.h> |
28 | #include <linux/mtd/physmap.h> | 31 | #include <linux/mtd/physmap.h> |
32 | #include <linux/mmc/host.h> | ||
33 | #include <linux/mmc/sh_mmcif.h> | ||
34 | #include <linux/i2c.h> | ||
35 | #include <linux/i2c/tsc2007.h> | ||
29 | #include <linux/io.h> | 36 | #include <linux/io.h> |
30 | #include <linux/smsc911x.h> | 37 | #include <linux/smsc911x.h> |
38 | #include <linux/sh_intc.h> | ||
39 | #include <linux/sh_clk.h> | ||
31 | #include <linux/gpio.h> | 40 | #include <linux/gpio.h> |
32 | #include <linux/input.h> | 41 | #include <linux/input.h> |
33 | #include <linux/input/sh_keysc.h> | 42 | #include <linux/input/sh_keysc.h> |
43 | #include <linux/usb/r8a66597.h> | ||
44 | |||
45 | #include <sound/sh_fsi.h> | ||
46 | |||
47 | #include <video/sh_mobile_hdmi.h> | ||
48 | #include <video/sh_mobile_lcdc.h> | ||
49 | #include <video/sh_mipi_dsi.h> | ||
50 | |||
34 | #include <mach/common.h> | 51 | #include <mach/common.h> |
52 | #include <mach/irqs.h> | ||
35 | #include <mach/sh7372.h> | 53 | #include <mach/sh7372.h> |
54 | |||
36 | #include <asm/mach-types.h> | 55 | #include <asm/mach-types.h> |
37 | #include <asm/mach/arch.h> | 56 | #include <asm/mach/arch.h> |
38 | #include <asm/mach/map.h> | 57 | #include <asm/mach/map.h> |
58 | #include <asm/mach/time.h> | ||
39 | 59 | ||
40 | /* | 60 | /* |
41 | * Address Interface BusWidth note | 61 | * Address Interface BusWidth note |
@@ -80,12 +100,56 @@ | |||
80 | */ | 100 | */ |
81 | 101 | ||
82 | /* | 102 | /* |
83 | * KEYSC | 103 | * LCD / IRQ / KEYSC / IrDA |
104 | * | ||
105 | * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen) | ||
106 | * LCD = 2nd LCDC (WVGA) | ||
84 | * | 107 | * |
85 | * SW43 KEYSC | 108 | * | SW43 | |
86 | * ------------------------- | 109 | * SW3 | ON | OFF | |
87 | * ON enable | 110 | * -------------+-----------------------+---------------+ |
88 | * OFF disable | 111 | * ON | KEY / IrDA | LCD | |
112 | * OFF | KEY / IrDA / IRQ | IRQ | | ||
113 | * | ||
114 | * | ||
115 | * QHD / WVGA display | ||
116 | * | ||
117 | * You can choice display type on menuconfig. | ||
118 | * Then, check above dip-switch. | ||
119 | */ | ||
120 | |||
121 | /* | ||
122 | * USB | ||
123 | * | ||
124 | * J7 : 1-2 MAX3355E VBUS | ||
125 | * 2-3 DC 5.0V | ||
126 | * | ||
127 | * S39: bit2: off | ||
128 | */ | ||
129 | |||
130 | /* | ||
131 | * FSI/FSMI | ||
132 | * | ||
133 | * SW41 : ON : SH-Mobile AP4 Audio Mode | ||
134 | * : OFF : Bluetooth Audio Mode | ||
135 | */ | ||
136 | |||
137 | /* | ||
138 | * MMC0/SDHI1 (CN7) | ||
139 | * | ||
140 | * J22 : select card voltage | ||
141 | * 1-2 pin : 1.8v | ||
142 | * 2-3 pin : 3.3v | ||
143 | * | ||
144 | * SW1 | SW33 | ||
145 | * | bit1 | bit2 | bit3 | bit4 | ||
146 | * ------------+------+------+------+------- | ||
147 | * MMC0 OFF | OFF | ON | ON | X | ||
148 | * SDHI1 OFF | ON | X | OFF | ON | ||
149 | * | ||
150 | * voltage lebel | ||
151 | * CN7 : 1.8v | ||
152 | * CN12: 3.3v | ||
89 | */ | 153 | */ |
90 | 154 | ||
91 | /* MTD */ | 155 | /* MTD */ |
@@ -148,7 +212,7 @@ static struct resource smc911x_resources[] = { | |||
148 | .end = 0x16000000 - 1, | 212 | .end = 0x16000000 - 1, |
149 | .flags = IORESOURCE_MEM, | 213 | .flags = IORESOURCE_MEM, |
150 | }, { | 214 | }, { |
151 | .start = 6, | 215 | .start = evt2irq(0x02c0) /* IRQ6A */, |
152 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | 216 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, |
153 | }, | 217 | }, |
154 | }; | 218 | }; |
@@ -169,6 +233,180 @@ static struct platform_device smc911x_device = { | |||
169 | }, | 233 | }, |
170 | }; | 234 | }; |
171 | 235 | ||
236 | /* SH_MMCIF */ | ||
237 | static struct resource sh_mmcif_resources[] = { | ||
238 | [0] = { | ||
239 | .name = "SH_MMCIF", | ||
240 | .start = 0xE6BD0000, | ||
241 | .end = 0xE6BD00FF, | ||
242 | .flags = IORESOURCE_MEM, | ||
243 | }, | ||
244 | [1] = { | ||
245 | /* MMC ERR */ | ||
246 | .start = evt2irq(0x1ac0), | ||
247 | .flags = IORESOURCE_IRQ, | ||
248 | }, | ||
249 | [2] = { | ||
250 | /* MMC NOR */ | ||
251 | .start = evt2irq(0x1ae0), | ||
252 | .flags = IORESOURCE_IRQ, | ||
253 | }, | ||
254 | }; | ||
255 | |||
256 | static struct sh_mmcif_plat_data sh_mmcif_plat = { | ||
257 | .sup_pclk = 0, | ||
258 | .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, | ||
259 | .caps = MMC_CAP_4_BIT_DATA | | ||
260 | MMC_CAP_8_BIT_DATA | | ||
261 | MMC_CAP_NEEDS_POLL, | ||
262 | }; | ||
263 | |||
264 | static struct platform_device sh_mmcif_device = { | ||
265 | .name = "sh_mmcif", | ||
266 | .id = 0, | ||
267 | .dev = { | ||
268 | .dma_mask = NULL, | ||
269 | .coherent_dma_mask = 0xffffffff, | ||
270 | .platform_data = &sh_mmcif_plat, | ||
271 | }, | ||
272 | .num_resources = ARRAY_SIZE(sh_mmcif_resources), | ||
273 | .resource = sh_mmcif_resources, | ||
274 | }; | ||
275 | |||
276 | /* SDHI0 */ | ||
277 | static struct sh_mobile_sdhi_info sdhi0_info = { | ||
278 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, | ||
279 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, | ||
280 | }; | ||
281 | |||
282 | static struct resource sdhi0_resources[] = { | ||
283 | [0] = { | ||
284 | .name = "SDHI0", | ||
285 | .start = 0xe6850000, | ||
286 | .end = 0xe68501ff, | ||
287 | .flags = IORESOURCE_MEM, | ||
288 | }, | ||
289 | [1] = { | ||
290 | .start = evt2irq(0x0e00) /* SDHI0 */, | ||
291 | .flags = IORESOURCE_IRQ, | ||
292 | }, | ||
293 | }; | ||
294 | |||
295 | static struct platform_device sdhi0_device = { | ||
296 | .name = "sh_mobile_sdhi", | ||
297 | .num_resources = ARRAY_SIZE(sdhi0_resources), | ||
298 | .resource = sdhi0_resources, | ||
299 | .id = 0, | ||
300 | .dev = { | ||
301 | .platform_data = &sdhi0_info, | ||
302 | }, | ||
303 | }; | ||
304 | |||
305 | /* SDHI1 */ | ||
306 | static struct sh_mobile_sdhi_info sdhi1_info = { | ||
307 | .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, | ||
308 | .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, | ||
309 | .tmio_ocr_mask = MMC_VDD_165_195, | ||
310 | }; | ||
311 | |||
312 | static struct resource sdhi1_resources[] = { | ||
313 | [0] = { | ||
314 | .name = "SDHI1", | ||
315 | .start = 0xe6860000, | ||
316 | .end = 0xe68601ff, | ||
317 | .flags = IORESOURCE_MEM, | ||
318 | }, | ||
319 | [1] = { | ||
320 | .start = evt2irq(0x0e80), | ||
321 | .flags = IORESOURCE_IRQ, | ||
322 | }, | ||
323 | }; | ||
324 | |||
325 | static struct platform_device sdhi1_device = { | ||
326 | .name = "sh_mobile_sdhi", | ||
327 | .num_resources = ARRAY_SIZE(sdhi1_resources), | ||
328 | .resource = sdhi1_resources, | ||
329 | .id = 1, | ||
330 | .dev = { | ||
331 | .platform_data = &sdhi1_info, | ||
332 | }, | ||
333 | }; | ||
334 | |||
335 | /* USB1 */ | ||
336 | static void usb1_host_port_power(int port, int power) | ||
337 | { | ||
338 | if (!power) /* only power-on supported for now */ | ||
339 | return; | ||
340 | |||
341 | /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */ | ||
342 | __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008); | ||
343 | } | ||
344 | |||
345 | static struct r8a66597_platdata usb1_host_data = { | ||
346 | .on_chip = 1, | ||
347 | .port_power = usb1_host_port_power, | ||
348 | }; | ||
349 | |||
350 | static struct resource usb1_host_resources[] = { | ||
351 | [0] = { | ||
352 | .name = "USBHS", | ||
353 | .start = 0xE68B0000, | ||
354 | .end = 0xE68B00E6 - 1, | ||
355 | .flags = IORESOURCE_MEM, | ||
356 | }, | ||
357 | [1] = { | ||
358 | .start = evt2irq(0x1ce0) /* USB1_USB1I0 */, | ||
359 | .flags = IORESOURCE_IRQ, | ||
360 | }, | ||
361 | }; | ||
362 | |||
363 | static struct platform_device usb1_host_device = { | ||
364 | .name = "r8a66597_hcd", | ||
365 | .id = 1, | ||
366 | .dev = { | ||
367 | .dma_mask = NULL, /* not use dma */ | ||
368 | .coherent_dma_mask = 0xffffffff, | ||
369 | .platform_data = &usb1_host_data, | ||
370 | }, | ||
371 | .num_resources = ARRAY_SIZE(usb1_host_resources), | ||
372 | .resource = usb1_host_resources, | ||
373 | }; | ||
374 | |||
375 | static struct sh_mobile_lcdc_info lcdc_info = { | ||
376 | .ch[0] = { | ||
377 | .chan = LCDC_CHAN_MAINLCD, | ||
378 | .bpp = 16, | ||
379 | } | ||
380 | }; | ||
381 | |||
382 | static struct resource lcdc_resources[] = { | ||
383 | [0] = { | ||
384 | .name = "LCDC", | ||
385 | .start = 0xfe940000, /* P4-only space */ | ||
386 | .end = 0xfe943fff, | ||
387 | .flags = IORESOURCE_MEM, | ||
388 | }, | ||
389 | [1] = { | ||
390 | .start = intcs_evt2irq(0x580), | ||
391 | .flags = IORESOURCE_IRQ, | ||
392 | }, | ||
393 | }; | ||
394 | |||
395 | static struct platform_device lcdc_device = { | ||
396 | .name = "sh_mobile_lcdc_fb", | ||
397 | .num_resources = ARRAY_SIZE(lcdc_resources), | ||
398 | .resource = lcdc_resources, | ||
399 | .dev = { | ||
400 | .platform_data = &lcdc_info, | ||
401 | .coherent_dma_mask = ~0, | ||
402 | }, | ||
403 | }; | ||
404 | |||
405 | /* | ||
406 | * QHD display | ||
407 | */ | ||
408 | #ifdef CONFIG_AP4EVB_QHD | ||
409 | |||
172 | /* KEYSC (Needs SW43 set to ON) */ | 410 | /* KEYSC (Needs SW43 set to ON) */ |
173 | static struct sh_keysc_info keysc_info = { | 411 | static struct sh_keysc_info keysc_info = { |
174 | .mode = SH_KEYSC_MODE_1, | 412 | .mode = SH_KEYSC_MODE_1, |
@@ -191,7 +429,7 @@ static struct resource keysc_resources[] = { | |||
191 | .flags = IORESOURCE_MEM, | 429 | .flags = IORESOURCE_MEM, |
192 | }, | 430 | }, |
193 | [1] = { | 431 | [1] = { |
194 | .start = 79, | 432 | .start = evt2irq(0x0be0), /* KEYSC_KEY */ |
195 | .flags = IORESOURCE_IRQ, | 433 | .flags = IORESOURCE_IRQ, |
196 | }, | 434 | }, |
197 | }; | 435 | }; |
@@ -206,32 +444,362 @@ static struct platform_device keysc_device = { | |||
206 | }, | 444 | }, |
207 | }; | 445 | }; |
208 | 446 | ||
209 | /* SDHI0 */ | 447 | /* MIPI-DSI */ |
210 | static struct resource sdhi0_resources[] = { | 448 | static struct resource mipidsi0_resources[] = { |
211 | [0] = { | 449 | [0] = { |
212 | .name = "SDHI0", | 450 | .start = 0xffc60000, |
213 | .start = 0xe6850000, | 451 | .end = 0xffc68fff, |
214 | .end = 0xe68501ff, | ||
215 | .flags = IORESOURCE_MEM, | 452 | .flags = IORESOURCE_MEM, |
216 | }, | 453 | }, |
454 | }; | ||
455 | |||
456 | static struct sh_mipi_dsi_info mipidsi0_info = { | ||
457 | .data_format = MIPI_RGB888, | ||
458 | .lcd_chan = &lcdc_info.ch[0], | ||
459 | }; | ||
460 | |||
461 | static struct platform_device mipidsi0_device = { | ||
462 | .name = "sh-mipi-dsi", | ||
463 | .num_resources = ARRAY_SIZE(mipidsi0_resources), | ||
464 | .resource = mipidsi0_resources, | ||
465 | .id = 0, | ||
466 | .dev = { | ||
467 | .platform_data = &mipidsi0_info, | ||
468 | }, | ||
469 | }; | ||
470 | |||
471 | /* This function will disappear when we switch to (runtime) PM */ | ||
472 | static int __init ap4evb_init_display_clk(void) | ||
473 | { | ||
474 | struct clk *lcdc_clk; | ||
475 | struct clk *dsitx_clk; | ||
476 | int ret; | ||
477 | |||
478 | lcdc_clk = clk_get(&lcdc_device.dev, "sh_mobile_lcdc_fb.0"); | ||
479 | if (IS_ERR(lcdc_clk)) | ||
480 | return PTR_ERR(lcdc_clk); | ||
481 | |||
482 | dsitx_clk = clk_get(&mipidsi0_device.dev, "sh-mipi-dsi.0"); | ||
483 | if (IS_ERR(dsitx_clk)) { | ||
484 | ret = PTR_ERR(dsitx_clk); | ||
485 | goto eclkdsitxget; | ||
486 | } | ||
487 | |||
488 | ret = clk_enable(lcdc_clk); | ||
489 | if (ret < 0) | ||
490 | goto eclklcdcon; | ||
491 | |||
492 | ret = clk_enable(dsitx_clk); | ||
493 | if (ret < 0) | ||
494 | goto eclkdsitxon; | ||
495 | |||
496 | return 0; | ||
497 | |||
498 | eclkdsitxon: | ||
499 | clk_disable(lcdc_clk); | ||
500 | eclklcdcon: | ||
501 | clk_put(dsitx_clk); | ||
502 | eclkdsitxget: | ||
503 | clk_put(lcdc_clk); | ||
504 | |||
505 | return ret; | ||
506 | } | ||
507 | device_initcall(ap4evb_init_display_clk); | ||
508 | |||
509 | static struct platform_device *qhd_devices[] __initdata = { | ||
510 | &mipidsi0_device, | ||
511 | &keysc_device, | ||
512 | }; | ||
513 | #endif /* CONFIG_AP4EVB_QHD */ | ||
514 | |||
515 | /* FSI */ | ||
516 | #define IRQ_FSI evt2irq(0x1840) | ||
517 | #define FSIACKCR 0xE6150018 | ||
518 | static void fsiackcr_init(struct clk *clk) | ||
519 | { | ||
520 | u32 status = __raw_readl(clk->enable_reg); | ||
521 | |||
522 | /* use external clock */ | ||
523 | status &= ~0x000000ff; | ||
524 | status |= 0x00000080; | ||
525 | __raw_writel(status, clk->enable_reg); | ||
526 | } | ||
527 | |||
528 | static struct clk_ops fsiackcr_clk_ops = { | ||
529 | .init = fsiackcr_init, | ||
530 | }; | ||
531 | |||
532 | static struct clk fsiackcr_clk = { | ||
533 | .ops = &fsiackcr_clk_ops, | ||
534 | .enable_reg = (void __iomem *)FSIACKCR, | ||
535 | .rate = 0, /* unknown */ | ||
536 | }; | ||
537 | |||
538 | static struct sh_fsi_platform_info fsi_info = { | ||
539 | .porta_flags = SH_FSI_BRS_INV | | ||
540 | SH_FSI_OUT_SLAVE_MODE | | ||
541 | SH_FSI_IN_SLAVE_MODE | | ||
542 | SH_FSI_OFMT(PCM) | | ||
543 | SH_FSI_IFMT(PCM), | ||
544 | }; | ||
545 | |||
546 | static struct resource fsi_resources[] = { | ||
547 | [0] = { | ||
548 | .name = "FSI", | ||
549 | .start = 0xFE3C0000, | ||
550 | .end = 0xFE3C0400 - 1, | ||
551 | .flags = IORESOURCE_MEM, | ||
552 | }, | ||
217 | [1] = { | 553 | [1] = { |
218 | .start = 96, | 554 | .start = IRQ_FSI, |
219 | .flags = IORESOURCE_IRQ, | 555 | .flags = IORESOURCE_IRQ, |
220 | }, | 556 | }, |
221 | }; | 557 | }; |
222 | 558 | ||
223 | static struct platform_device sdhi0_device = { | 559 | static struct platform_device fsi_device = { |
224 | .name = "sh_mobile_sdhi", | 560 | .name = "sh_fsi2", |
225 | .num_resources = ARRAY_SIZE(sdhi0_resources), | 561 | .id = 0, |
226 | .resource = sdhi0_resources, | 562 | .num_resources = ARRAY_SIZE(fsi_resources), |
227 | .id = 0, | 563 | .resource = fsi_resources, |
564 | .dev = { | ||
565 | .platform_data = &fsi_info, | ||
566 | }, | ||
567 | }; | ||
568 | |||
569 | static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = { | ||
570 | .clock_source = LCDC_CLK_EXTERNAL, | ||
571 | .ch[0] = { | ||
572 | .chan = LCDC_CHAN_MAINLCD, | ||
573 | .bpp = 16, | ||
574 | .interface_type = RGB24, | ||
575 | .clock_divider = 1, | ||
576 | .flags = LCDC_FLAGS_DWPOL, | ||
577 | .lcd_cfg = { | ||
578 | .name = "HDMI", | ||
579 | /* So far only 720p is supported */ | ||
580 | .xres = 1280, | ||
581 | .yres = 720, | ||
582 | /* | ||
583 | * If left and right margins are not multiples of 8, | ||
584 | * LDHAJR will be adjusted accordingly by the LCDC | ||
585 | * driver. Until we start using EDID, these values | ||
586 | * might have to be adjusted for different monitors. | ||
587 | */ | ||
588 | .left_margin = 200, | ||
589 | .right_margin = 88, | ||
590 | .hsync_len = 48, | ||
591 | .upper_margin = 20, | ||
592 | .lower_margin = 5, | ||
593 | .vsync_len = 5, | ||
594 | .pixclock = 13468, | ||
595 | .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT, | ||
596 | }, | ||
597 | } | ||
598 | }; | ||
599 | |||
600 | static struct resource lcdc1_resources[] = { | ||
601 | [0] = { | ||
602 | .name = "LCDC1", | ||
603 | .start = 0xfe944000, | ||
604 | .end = 0xfe947fff, | ||
605 | .flags = IORESOURCE_MEM, | ||
606 | }, | ||
607 | [1] = { | ||
608 | .start = intcs_evt2irq(0x17a0), | ||
609 | .flags = IORESOURCE_IRQ, | ||
610 | }, | ||
611 | }; | ||
612 | |||
613 | static struct platform_device lcdc1_device = { | ||
614 | .name = "sh_mobile_lcdc_fb", | ||
615 | .num_resources = ARRAY_SIZE(lcdc1_resources), | ||
616 | .resource = lcdc1_resources, | ||
617 | .id = 1, | ||
618 | .dev = { | ||
619 | .platform_data = &sh_mobile_lcdc1_info, | ||
620 | .coherent_dma_mask = ~0, | ||
621 | }, | ||
622 | }; | ||
623 | |||
624 | static struct sh_mobile_hdmi_info hdmi_info = { | ||
625 | .lcd_chan = &sh_mobile_lcdc1_info.ch[0], | ||
626 | .lcd_dev = &lcdc1_device.dev, | ||
627 | }; | ||
628 | |||
629 | static struct resource hdmi_resources[] = { | ||
630 | [0] = { | ||
631 | .name = "HDMI", | ||
632 | .start = 0xe6be0000, | ||
633 | .end = 0xe6be00ff, | ||
634 | .flags = IORESOURCE_MEM, | ||
635 | }, | ||
636 | [1] = { | ||
637 | /* There's also an HDMI interrupt on INTCS @ 0x18e0 */ | ||
638 | .start = evt2irq(0x17e0), | ||
639 | .flags = IORESOURCE_IRQ, | ||
640 | }, | ||
641 | }; | ||
642 | |||
643 | static struct platform_device hdmi_device = { | ||
644 | .name = "sh-mobile-hdmi", | ||
645 | .num_resources = ARRAY_SIZE(hdmi_resources), | ||
646 | .resource = hdmi_resources, | ||
647 | .id = -1, | ||
648 | .dev = { | ||
649 | .platform_data = &hdmi_info, | ||
650 | }, | ||
228 | }; | 651 | }; |
229 | 652 | ||
230 | static struct platform_device *ap4evb_devices[] __initdata = { | 653 | static struct platform_device *ap4evb_devices[] __initdata = { |
231 | &nor_flash_device, | 654 | &nor_flash_device, |
232 | &smc911x_device, | 655 | &smc911x_device, |
233 | &keysc_device, | ||
234 | &sdhi0_device, | 656 | &sdhi0_device, |
657 | &sdhi1_device, | ||
658 | &usb1_host_device, | ||
659 | &fsi_device, | ||
660 | &sh_mmcif_device, | ||
661 | &lcdc1_device, | ||
662 | &lcdc_device, | ||
663 | &hdmi_device, | ||
664 | }; | ||
665 | |||
666 | static int __init hdmi_init_pm_clock(void) | ||
667 | { | ||
668 | struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick"); | ||
669 | int ret; | ||
670 | long rate; | ||
671 | |||
672 | if (IS_ERR(hdmi_ick)) { | ||
673 | ret = PTR_ERR(hdmi_ick); | ||
674 | pr_err("Cannot get HDMI ICK: %d\n", ret); | ||
675 | goto out; | ||
676 | } | ||
677 | |||
678 | ret = clk_set_parent(&pllc2_clk, &dv_clki_div2_clk); | ||
679 | if (ret < 0) { | ||
680 | pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, pllc2_clk.usecount); | ||
681 | goto out; | ||
682 | } | ||
683 | |||
684 | pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&pllc2_clk)); | ||
685 | |||
686 | rate = clk_round_rate(&pllc2_clk, 594000000); | ||
687 | if (rate < 0) { | ||
688 | pr_err("Cannot get suitable rate: %ld\n", rate); | ||
689 | ret = rate; | ||
690 | goto out; | ||
691 | } | ||
692 | |||
693 | ret = clk_set_rate(&pllc2_clk, rate); | ||
694 | if (ret < 0) { | ||
695 | pr_err("Cannot set rate %ld: %d\n", rate, ret); | ||
696 | goto out; | ||
697 | } | ||
698 | |||
699 | pr_debug("PLLC2 set frequency %lu\n", rate); | ||
700 | |||
701 | ret = clk_set_parent(hdmi_ick, &pllc2_clk); | ||
702 | if (ret < 0) { | ||
703 | pr_err("Cannot set HDMI parent: %d\n", ret); | ||
704 | goto out; | ||
705 | } | ||
706 | |||
707 | out: | ||
708 | if (!IS_ERR(hdmi_ick)) | ||
709 | clk_put(hdmi_ick); | ||
710 | return ret; | ||
711 | } | ||
712 | |||
713 | device_initcall(hdmi_init_pm_clock); | ||
714 | |||
715 | /* | ||
716 | * FIXME !! | ||
717 | * | ||
718 | * gpio_no_direction | ||
719 | * gpio_pull_up | ||
720 | * are quick_hack. | ||
721 | * | ||
722 | * current gpio frame work doesn't have | ||
723 | * the method to control only pull up/down/free. | ||
724 | * this function should be replaced by correct gpio function | ||
725 | */ | ||
726 | static void __init gpio_no_direction(u32 addr) | ||
727 | { | ||
728 | __raw_writeb(0x00, addr); | ||
729 | } | ||
730 | |||
731 | static void __init gpio_pull_up(u32 addr) | ||
732 | { | ||
733 | u8 data = __raw_readb(addr); | ||
734 | |||
735 | data &= 0x0F; | ||
736 | data |= 0xC0; | ||
737 | __raw_writeb(data, addr); | ||
738 | } | ||
739 | |||
740 | /* TouchScreen */ | ||
741 | #define IRQ28 evt2irq(0x3380) /* IRQ28A */ | ||
742 | #define IRQ7 evt2irq(0x02e0) /* IRQ7A */ | ||
743 | static int ts_get_pendown_state(void) | ||
744 | { | ||
745 | int val1, val2; | ||
746 | |||
747 | gpio_free(GPIO_FN_IRQ28_123); | ||
748 | gpio_free(GPIO_FN_IRQ7_40); | ||
749 | |||
750 | gpio_request(GPIO_PORT123, NULL); | ||
751 | gpio_request(GPIO_PORT40, NULL); | ||
752 | |||
753 | gpio_direction_input(GPIO_PORT123); | ||
754 | gpio_direction_input(GPIO_PORT40); | ||
755 | |||
756 | val1 = gpio_get_value(GPIO_PORT123); | ||
757 | val2 = gpio_get_value(GPIO_PORT40); | ||
758 | |||
759 | gpio_request(GPIO_FN_IRQ28_123, NULL); /* for QHD */ | ||
760 | gpio_request(GPIO_FN_IRQ7_40, NULL); /* for WVGA */ | ||
761 | |||
762 | return val1 ^ val2; | ||
763 | } | ||
764 | |||
765 | #define PORT40CR 0xE6051028 | ||
766 | #define PORT123CR 0xE605007B | ||
767 | static int ts_init(void) | ||
768 | { | ||
769 | gpio_request(GPIO_FN_IRQ28_123, NULL); /* for QHD */ | ||
770 | gpio_request(GPIO_FN_IRQ7_40, NULL); /* for WVGA */ | ||
771 | |||
772 | gpio_pull_up(PORT40CR); | ||
773 | gpio_pull_up(PORT123CR); | ||
774 | |||
775 | return 0; | ||
776 | } | ||
777 | |||
778 | static struct tsc2007_platform_data tsc2007_info = { | ||
779 | .model = 2007, | ||
780 | .x_plate_ohms = 180, | ||
781 | .get_pendown_state = ts_get_pendown_state, | ||
782 | .init_platform_hw = ts_init, | ||
783 | }; | ||
784 | |||
785 | static struct i2c_board_info tsc_device = { | ||
786 | I2C_BOARD_INFO("tsc2007", 0x48), | ||
787 | .type = "tsc2007", | ||
788 | .platform_data = &tsc2007_info, | ||
789 | /*.irq is selected on ap4evb_init */ | ||
790 | }; | ||
791 | |||
792 | /* I2C */ | ||
793 | static struct i2c_board_info i2c0_devices[] = { | ||
794 | { | ||
795 | I2C_BOARD_INFO("ak4643", 0x13), | ||
796 | }, | ||
797 | }; | ||
798 | |||
799 | static struct i2c_board_info i2c1_devices[] = { | ||
800 | { | ||
801 | I2C_BOARD_INFO("r2025sd", 0x32), | ||
802 | }, | ||
235 | }; | 803 | }; |
236 | 804 | ||
237 | static struct map_desc ap4evb_io_desc[] __initdata = { | 805 | static struct map_desc ap4evb_io_desc[] __initdata = { |
@@ -250,14 +818,18 @@ static void __init ap4evb_map_io(void) | |||
250 | { | 818 | { |
251 | iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc)); | 819 | iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc)); |
252 | 820 | ||
253 | /* setup early devices, clocks and console here as well */ | 821 | /* setup early devices and console here as well */ |
254 | sh7372_add_early_devices(); | 822 | sh7372_add_early_devices(); |
255 | sh7367_clock_init(); /* use g3 clocks for now */ | ||
256 | shmobile_setup_console(); | 823 | shmobile_setup_console(); |
257 | } | 824 | } |
258 | 825 | ||
826 | #define GPIO_PORT9CR 0xE6051009 | ||
827 | #define GPIO_PORT10CR 0xE605100A | ||
259 | static void __init ap4evb_init(void) | 828 | static void __init ap4evb_init(void) |
260 | { | 829 | { |
830 | u32 srcr4; | ||
831 | struct clk *clk; | ||
832 | |||
261 | sh7372_pinmux_init(); | 833 | sh7372_pinmux_init(); |
262 | 834 | ||
263 | /* enable SCIFA0 */ | 835 | /* enable SCIFA0 */ |
@@ -296,6 +868,93 @@ static void __init ap4evb_init(void) | |||
296 | gpio_export(GPIO_PORT34, 0); | 868 | gpio_export(GPIO_PORT34, 0); |
297 | gpio_export(GPIO_PORT35, 0); | 869 | gpio_export(GPIO_PORT35, 0); |
298 | 870 | ||
871 | /* SDHI0 */ | ||
872 | gpio_request(GPIO_FN_SDHICD0, NULL); | ||
873 | gpio_request(GPIO_FN_SDHIWP0, NULL); | ||
874 | gpio_request(GPIO_FN_SDHICMD0, NULL); | ||
875 | gpio_request(GPIO_FN_SDHICLK0, NULL); | ||
876 | gpio_request(GPIO_FN_SDHID0_3, NULL); | ||
877 | gpio_request(GPIO_FN_SDHID0_2, NULL); | ||
878 | gpio_request(GPIO_FN_SDHID0_1, NULL); | ||
879 | gpio_request(GPIO_FN_SDHID0_0, NULL); | ||
880 | |||
881 | /* SDHI1 */ | ||
882 | gpio_request(GPIO_FN_SDHICMD1, NULL); | ||
883 | gpio_request(GPIO_FN_SDHICLK1, NULL); | ||
884 | gpio_request(GPIO_FN_SDHID1_3, NULL); | ||
885 | gpio_request(GPIO_FN_SDHID1_2, NULL); | ||
886 | gpio_request(GPIO_FN_SDHID1_1, NULL); | ||
887 | gpio_request(GPIO_FN_SDHID1_0, NULL); | ||
888 | |||
889 | /* MMCIF */ | ||
890 | gpio_request(GPIO_FN_MMCD0_0, NULL); | ||
891 | gpio_request(GPIO_FN_MMCD0_1, NULL); | ||
892 | gpio_request(GPIO_FN_MMCD0_2, NULL); | ||
893 | gpio_request(GPIO_FN_MMCD0_3, NULL); | ||
894 | gpio_request(GPIO_FN_MMCD0_4, NULL); | ||
895 | gpio_request(GPIO_FN_MMCD0_5, NULL); | ||
896 | gpio_request(GPIO_FN_MMCD0_6, NULL); | ||
897 | gpio_request(GPIO_FN_MMCD0_7, NULL); | ||
898 | gpio_request(GPIO_FN_MMCCMD0, NULL); | ||
899 | gpio_request(GPIO_FN_MMCCLK0, NULL); | ||
900 | |||
901 | /* USB enable */ | ||
902 | gpio_request(GPIO_FN_VBUS0_1, NULL); | ||
903 | gpio_request(GPIO_FN_IDIN_1_18, NULL); | ||
904 | gpio_request(GPIO_FN_PWEN_1_115, NULL); | ||
905 | gpio_request(GPIO_FN_OVCN_1_114, NULL); | ||
906 | gpio_request(GPIO_FN_EXTLP_1, NULL); | ||
907 | gpio_request(GPIO_FN_OVCN2_1, NULL); | ||
908 | |||
909 | /* setup USB phy */ | ||
910 | __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */ | ||
911 | |||
912 | /* enable FSI2 */ | ||
913 | gpio_request(GPIO_FN_FSIAIBT, NULL); | ||
914 | gpio_request(GPIO_FN_FSIAILR, NULL); | ||
915 | gpio_request(GPIO_FN_FSIAISLD, NULL); | ||
916 | gpio_request(GPIO_FN_FSIAOSLD, NULL); | ||
917 | gpio_request(GPIO_PORT161, NULL); | ||
918 | gpio_direction_output(GPIO_PORT161, 0); /* slave */ | ||
919 | |||
920 | gpio_request(GPIO_PORT9, NULL); | ||
921 | gpio_request(GPIO_PORT10, NULL); | ||
922 | gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */ | ||
923 | gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */ | ||
924 | |||
925 | /* set SPU2 clock to 119.6 MHz */ | ||
926 | clk = clk_get(NULL, "spu_clk"); | ||
927 | if (!IS_ERR(clk)) { | ||
928 | clk_set_rate(clk, clk_round_rate(clk, 119600000)); | ||
929 | clk_put(clk); | ||
930 | } | ||
931 | |||
932 | /* change parent of FSI A */ | ||
933 | clk = clk_get(NULL, "fsia_clk"); | ||
934 | if (!IS_ERR(clk)) { | ||
935 | clk_register(&fsiackcr_clk); | ||
936 | clk_set_parent(clk, &fsiackcr_clk); | ||
937 | clk_put(clk); | ||
938 | } | ||
939 | |||
940 | /* | ||
941 | * set irq priority, to avoid sound chopping | ||
942 | * when NFS rootfs is used | ||
943 | * FSI(3) > SMSC911X(2) | ||
944 | */ | ||
945 | intc_set_priority(IRQ_FSI, 3); | ||
946 | |||
947 | i2c_register_board_info(0, i2c0_devices, | ||
948 | ARRAY_SIZE(i2c0_devices)); | ||
949 | |||
950 | i2c_register_board_info(1, i2c1_devices, | ||
951 | ARRAY_SIZE(i2c1_devices)); | ||
952 | |||
953 | #ifdef CONFIG_AP4EVB_QHD | ||
954 | /* | ||
955 | * QHD | ||
956 | */ | ||
957 | |||
299 | /* enable KEYSC */ | 958 | /* enable KEYSC */ |
300 | gpio_request(GPIO_FN_KEYOUT0, NULL); | 959 | gpio_request(GPIO_FN_KEYOUT0, NULL); |
301 | gpio_request(GPIO_FN_KEYOUT1, NULL); | 960 | gpio_request(GPIO_FN_KEYOUT1, NULL); |
@@ -308,26 +967,122 @@ static void __init ap4evb_init(void) | |||
308 | gpio_request(GPIO_FN_KEYIN3_133, NULL); | 967 | gpio_request(GPIO_FN_KEYIN3_133, NULL); |
309 | gpio_request(GPIO_FN_KEYIN4, NULL); | 968 | gpio_request(GPIO_FN_KEYIN4, NULL); |
310 | 969 | ||
311 | /* SDHI0 */ | 970 | /* enable TouchScreen */ |
312 | gpio_request(GPIO_FN_SDHICD0, NULL); | 971 | set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW); |
313 | gpio_request(GPIO_FN_SDHIWP0, NULL); | 972 | |
314 | gpio_request(GPIO_FN_SDHICMD0, NULL); | 973 | tsc_device.irq = IRQ28; |
315 | gpio_request(GPIO_FN_SDHICLK0, NULL); | 974 | i2c_register_board_info(1, &tsc_device, 1); |
316 | gpio_request(GPIO_FN_SDHID0_3, NULL); | 975 | |
317 | gpio_request(GPIO_FN_SDHID0_2, NULL); | 976 | /* LCDC0 */ |
318 | gpio_request(GPIO_FN_SDHID0_1, NULL); | 977 | lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; |
319 | gpio_request(GPIO_FN_SDHID0_0, NULL); | 978 | lcdc_info.ch[0].interface_type = RGB24; |
979 | lcdc_info.ch[0].clock_divider = 1; | ||
980 | lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL; | ||
981 | lcdc_info.ch[0].lcd_cfg.name = "R63302(QHD)"; | ||
982 | lcdc_info.ch[0].lcd_cfg.xres = 544; | ||
983 | lcdc_info.ch[0].lcd_cfg.yres = 961; | ||
984 | lcdc_info.ch[0].lcd_cfg.left_margin = 72; | ||
985 | lcdc_info.ch[0].lcd_cfg.right_margin = 600; | ||
986 | lcdc_info.ch[0].lcd_cfg.hsync_len = 16; | ||
987 | lcdc_info.ch[0].lcd_cfg.upper_margin = 8; | ||
988 | lcdc_info.ch[0].lcd_cfg.lower_margin = 8; | ||
989 | lcdc_info.ch[0].lcd_cfg.vsync_len = 2; | ||
990 | lcdc_info.ch[0].lcd_cfg.sync = FB_SYNC_VERT_HIGH_ACT | | ||
991 | FB_SYNC_HOR_HIGH_ACT; | ||
992 | lcdc_info.ch[0].lcd_size_cfg.width = 44; | ||
993 | lcdc_info.ch[0].lcd_size_cfg.height = 79; | ||
994 | |||
995 | platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices)); | ||
996 | |||
997 | #else | ||
998 | /* | ||
999 | * WVGA | ||
1000 | */ | ||
1001 | gpio_request(GPIO_FN_LCDD17, NULL); | ||
1002 | gpio_request(GPIO_FN_LCDD16, NULL); | ||
1003 | gpio_request(GPIO_FN_LCDD15, NULL); | ||
1004 | gpio_request(GPIO_FN_LCDD14, NULL); | ||
1005 | gpio_request(GPIO_FN_LCDD13, NULL); | ||
1006 | gpio_request(GPIO_FN_LCDD12, NULL); | ||
1007 | gpio_request(GPIO_FN_LCDD11, NULL); | ||
1008 | gpio_request(GPIO_FN_LCDD10, NULL); | ||
1009 | gpio_request(GPIO_FN_LCDD9, NULL); | ||
1010 | gpio_request(GPIO_FN_LCDD8, NULL); | ||
1011 | gpio_request(GPIO_FN_LCDD7, NULL); | ||
1012 | gpio_request(GPIO_FN_LCDD6, NULL); | ||
1013 | gpio_request(GPIO_FN_LCDD5, NULL); | ||
1014 | gpio_request(GPIO_FN_LCDD4, NULL); | ||
1015 | gpio_request(GPIO_FN_LCDD3, NULL); | ||
1016 | gpio_request(GPIO_FN_LCDD2, NULL); | ||
1017 | gpio_request(GPIO_FN_LCDD1, NULL); | ||
1018 | gpio_request(GPIO_FN_LCDD0, NULL); | ||
1019 | gpio_request(GPIO_FN_LCDDISP, NULL); | ||
1020 | gpio_request(GPIO_FN_LCDDCK, NULL); | ||
1021 | |||
1022 | gpio_request(GPIO_PORT189, NULL); /* backlight */ | ||
1023 | gpio_direction_output(GPIO_PORT189, 1); | ||
1024 | |||
1025 | gpio_request(GPIO_PORT151, NULL); /* LCDDON */ | ||
1026 | gpio_direction_output(GPIO_PORT151, 1); | ||
1027 | |||
1028 | lcdc_info.clock_source = LCDC_CLK_BUS; | ||
1029 | lcdc_info.ch[0].interface_type = RGB18; | ||
1030 | lcdc_info.ch[0].clock_divider = 2; | ||
1031 | lcdc_info.ch[0].flags = 0; | ||
1032 | lcdc_info.ch[0].lcd_cfg.name = "WVGA Panel"; | ||
1033 | lcdc_info.ch[0].lcd_cfg.xres = 800; | ||
1034 | lcdc_info.ch[0].lcd_cfg.yres = 480; | ||
1035 | lcdc_info.ch[0].lcd_cfg.left_margin = 220; | ||
1036 | lcdc_info.ch[0].lcd_cfg.right_margin = 110; | ||
1037 | lcdc_info.ch[0].lcd_cfg.hsync_len = 70; | ||
1038 | lcdc_info.ch[0].lcd_cfg.upper_margin = 20; | ||
1039 | lcdc_info.ch[0].lcd_cfg.lower_margin = 5; | ||
1040 | lcdc_info.ch[0].lcd_cfg.vsync_len = 5; | ||
1041 | lcdc_info.ch[0].lcd_cfg.sync = 0; | ||
1042 | lcdc_info.ch[0].lcd_size_cfg.width = 152; | ||
1043 | lcdc_info.ch[0].lcd_size_cfg.height = 91; | ||
1044 | |||
1045 | /* enable TouchScreen */ | ||
1046 | set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW); | ||
1047 | |||
1048 | tsc_device.irq = IRQ7; | ||
1049 | i2c_register_board_info(0, &tsc_device, 1); | ||
1050 | #endif /* CONFIG_AP4EVB_QHD */ | ||
320 | 1051 | ||
321 | sh7372_add_standard_devices(); | 1052 | sh7372_add_standard_devices(); |
322 | 1053 | ||
1054 | /* HDMI */ | ||
1055 | gpio_request(GPIO_FN_HDMI_HPD, NULL); | ||
1056 | gpio_request(GPIO_FN_HDMI_CEC, NULL); | ||
1057 | |||
1058 | /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */ | ||
1059 | #define SRCR4 0xe61580bc | ||
1060 | srcr4 = __raw_readl(SRCR4); | ||
1061 | __raw_writel(srcr4 | (1 << 13), SRCR4); | ||
1062 | udelay(50); | ||
1063 | __raw_writel(srcr4 & ~(1 << 13), SRCR4); | ||
1064 | |||
323 | platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices)); | 1065 | platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices)); |
324 | } | 1066 | } |
325 | 1067 | ||
1068 | static void __init ap4evb_timer_init(void) | ||
1069 | { | ||
1070 | sh7372_clock_init(); | ||
1071 | shmobile_timer.init(); | ||
1072 | |||
1073 | /* External clock source */ | ||
1074 | clk_set_rate(&dv_clki_clk, 27000000); | ||
1075 | } | ||
1076 | |||
1077 | static struct sys_timer ap4evb_timer = { | ||
1078 | .init = ap4evb_timer_init, | ||
1079 | }; | ||
1080 | |||
326 | MACHINE_START(AP4EVB, "ap4evb") | 1081 | MACHINE_START(AP4EVB, "ap4evb") |
327 | .phys_io = 0xe6000000, | 1082 | .phys_io = 0xe6000000, |
328 | .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc, | 1083 | .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc, |
329 | .map_io = ap4evb_map_io, | 1084 | .map_io = ap4evb_map_io, |
330 | .init_irq = sh7372_init_irq, | 1085 | .init_irq = sh7372_init_irq, |
331 | .init_machine = ap4evb_init, | 1086 | .init_machine = ap4evb_init, |
332 | .timer = &shmobile_timer, | 1087 | .timer = &ap4evb_timer, |
333 | MACHINE_END | 1088 | MACHINE_END |
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c index 9247503296c4..a5525901e91f 100644 --- a/arch/arm/mach-shmobile/board-g3evm.c +++ b/arch/arm/mach-shmobile/board-g3evm.c | |||
@@ -37,6 +37,15 @@ | |||
37 | #include <asm/mach-types.h> | 37 | #include <asm/mach-types.h> |
38 | #include <asm/mach/arch.h> | 38 | #include <asm/mach/arch.h> |
39 | #include <asm/mach/map.h> | 39 | #include <asm/mach/map.h> |
40 | #include <asm/mach/time.h> | ||
41 | |||
42 | /* | ||
43 | * IrDA | ||
44 | * | ||
45 | * S67: 5bit : ON power | ||
46 | * : 6bit : ON remote control | ||
47 | * OFF IrDA | ||
48 | */ | ||
40 | 49 | ||
41 | static struct mtd_partition nor_flash_partitions[] = { | 50 | static struct mtd_partition nor_flash_partitions[] = { |
42 | { | 51 | { |
@@ -91,7 +100,7 @@ static struct platform_device nor_flash_device = { | |||
91 | }; | 100 | }; |
92 | 101 | ||
93 | /* USBHS */ | 102 | /* USBHS */ |
94 | void usb_host_port_power(int port, int power) | 103 | static void usb_host_port_power(int port, int power) |
95 | { | 104 | { |
96 | if (!power) /* only power-on supported for now */ | 105 | if (!power) /* only power-on supported for now */ |
97 | return; | 106 | return; |
@@ -113,7 +122,7 @@ static struct resource usb_host_resources[] = { | |||
113 | .flags = IORESOURCE_MEM, | 122 | .flags = IORESOURCE_MEM, |
114 | }, | 123 | }, |
115 | [1] = { | 124 | [1] = { |
116 | .start = 65, | 125 | .start = evt2irq(0xa20), /* USBHS_USHI0 */ |
117 | .flags = IORESOURCE_IRQ, | 126 | .flags = IORESOURCE_IRQ, |
118 | }, | 127 | }, |
119 | }; | 128 | }; |
@@ -153,7 +162,7 @@ static struct resource keysc_resources[] = { | |||
153 | .flags = IORESOURCE_MEM, | 162 | .flags = IORESOURCE_MEM, |
154 | }, | 163 | }, |
155 | [1] = { | 164 | [1] = { |
156 | .start = 79, | 165 | .start = evt2irq(0xbe0), /* KEYSC_KEY */ |
157 | .flags = IORESOURCE_IRQ, | 166 | .flags = IORESOURCE_IRQ, |
158 | }, | 167 | }, |
159 | }; | 168 | }; |
@@ -209,11 +218,31 @@ static struct platform_device nand_flash_device = { | |||
209 | }, | 218 | }, |
210 | }; | 219 | }; |
211 | 220 | ||
221 | static struct resource irda_resources[] = { | ||
222 | [0] = { | ||
223 | .start = 0xE6D00000, | ||
224 | .end = 0xE6D01FD4 - 1, | ||
225 | .flags = IORESOURCE_MEM, | ||
226 | }, | ||
227 | [1] = { | ||
228 | .start = evt2irq(0x480), /* IRDA */ | ||
229 | .flags = IORESOURCE_IRQ, | ||
230 | }, | ||
231 | }; | ||
232 | |||
233 | static struct platform_device irda_device = { | ||
234 | .name = "sh_irda", | ||
235 | .id = -1, | ||
236 | .resource = irda_resources, | ||
237 | .num_resources = ARRAY_SIZE(irda_resources), | ||
238 | }; | ||
239 | |||
212 | static struct platform_device *g3evm_devices[] __initdata = { | 240 | static struct platform_device *g3evm_devices[] __initdata = { |
213 | &nor_flash_device, | 241 | &nor_flash_device, |
214 | &usb_host_device, | 242 | &usb_host_device, |
215 | &keysc_device, | 243 | &keysc_device, |
216 | &nand_flash_device, | 244 | &nand_flash_device, |
245 | &irda_device, | ||
217 | }; | 246 | }; |
218 | 247 | ||
219 | static struct map_desc g3evm_io_desc[] __initdata = { | 248 | static struct map_desc g3evm_io_desc[] __initdata = { |
@@ -232,9 +261,8 @@ static void __init g3evm_map_io(void) | |||
232 | { | 261 | { |
233 | iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc)); | 262 | iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc)); |
234 | 263 | ||
235 | /* setup early devices, clocks and console here as well */ | 264 | /* setup early devices and console here as well */ |
236 | sh7367_add_early_devices(); | 265 | sh7367_add_early_devices(); |
237 | sh7367_clock_init(); | ||
238 | shmobile_setup_console(); | 266 | shmobile_setup_console(); |
239 | } | 267 | } |
240 | 268 | ||
@@ -271,9 +299,6 @@ static void __init g3evm_init(void) | |||
271 | gpio_request(GPIO_FN_EXTLP, NULL); | 299 | gpio_request(GPIO_FN_EXTLP, NULL); |
272 | gpio_request(GPIO_FN_IDIN, NULL); | 300 | gpio_request(GPIO_FN_IDIN, NULL); |
273 | 301 | ||
274 | /* enable clock in SYMSTPCR2 */ | ||
275 | __raw_writel(__raw_readl(0xe6158048) & ~(1 << 22), 0xe6158048); | ||
276 | |||
277 | /* setup USB phy */ | 302 | /* setup USB phy */ |
278 | __raw_writew(0x0300, 0xe605810a); /* USBCR1 */ | 303 | __raw_writew(0x0300, 0xe605810a); /* USBCR1 */ |
279 | __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */ | 304 | __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */ |
@@ -318,16 +343,32 @@ static void __init g3evm_init(void) | |||
318 | /* FOE, FCDE, FSC on dedicated pins */ | 343 | /* FOE, FCDE, FSC on dedicated pins */ |
319 | __raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048); | 344 | __raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048); |
320 | 345 | ||
346 | /* IrDA */ | ||
347 | gpio_request(GPIO_FN_IRDA_OUT, NULL); | ||
348 | gpio_request(GPIO_FN_IRDA_IN, NULL); | ||
349 | gpio_request(GPIO_FN_IRDA_FIRSEL, NULL); | ||
350 | set_irq_type(evt2irq(0x480), IRQ_TYPE_LEVEL_LOW); | ||
351 | |||
321 | sh7367_add_standard_devices(); | 352 | sh7367_add_standard_devices(); |
322 | 353 | ||
323 | platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices)); | 354 | platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices)); |
324 | } | 355 | } |
325 | 356 | ||
357 | static void __init g3evm_timer_init(void) | ||
358 | { | ||
359 | sh7367_clock_init(); | ||
360 | shmobile_timer.init(); | ||
361 | } | ||
362 | |||
363 | static struct sys_timer g3evm_timer = { | ||
364 | .init = g3evm_timer_init, | ||
365 | }; | ||
366 | |||
326 | MACHINE_START(G3EVM, "g3evm") | 367 | MACHINE_START(G3EVM, "g3evm") |
327 | .phys_io = 0xe6000000, | 368 | .phys_io = 0xe6000000, |
328 | .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc, | 369 | .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc, |
329 | .map_io = g3evm_map_io, | 370 | .map_io = g3evm_map_io, |
330 | .init_irq = sh7367_init_irq, | 371 | .init_irq = sh7367_init_irq, |
331 | .init_machine = g3evm_init, | 372 | .init_machine = g3evm_init, |
332 | .timer = &shmobile_timer, | 373 | .timer = &g3evm_timer, |
333 | MACHINE_END | 374 | MACHINE_END |
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c index 10673a90be52..2c3ff6f7f34c 100644 --- a/arch/arm/mach-shmobile/board-g4evm.c +++ b/arch/arm/mach-shmobile/board-g4evm.c | |||
@@ -30,12 +30,39 @@ | |||
30 | #include <linux/io.h> | 30 | #include <linux/io.h> |
31 | #include <linux/input.h> | 31 | #include <linux/input.h> |
32 | #include <linux/input/sh_keysc.h> | 32 | #include <linux/input/sh_keysc.h> |
33 | #include <linux/mfd/sh_mobile_sdhi.h> | ||
33 | #include <linux/gpio.h> | 34 | #include <linux/gpio.h> |
34 | #include <mach/sh7377.h> | 35 | #include <mach/sh7377.h> |
35 | #include <mach/common.h> | 36 | #include <mach/common.h> |
36 | #include <asm/mach-types.h> | 37 | #include <asm/mach-types.h> |
37 | #include <asm/mach/arch.h> | 38 | #include <asm/mach/arch.h> |
38 | #include <asm/mach/map.h> | 39 | #include <asm/mach/map.h> |
40 | #include <asm/mach/time.h> | ||
41 | |||
42 | /* | ||
43 | * SDHI | ||
44 | * | ||
45 | * SDHI0 : card detection is possible | ||
46 | * SDHI1 : card detection is impossible | ||
47 | * | ||
48 | * [G4-MAIN-BOARD] | ||
49 | * JP74 : short # DBG_2V8A for SDHI0 | ||
50 | * JP75 : NC # DBG_3V3A for SDHI0 | ||
51 | * JP76 : NC # DBG_3V3A_SD for SDHI0 | ||
52 | * JP77 : NC # 3V3A_SDIO for SDHI1 | ||
53 | * JP78 : short # DBG_2V8A for SDHI1 | ||
54 | * JP79 : NC # DBG_3V3A for SDHI1 | ||
55 | * JP80 : NC # DBG_3V3A_SD for SDHI1 | ||
56 | * | ||
57 | * [G4-CORE-BOARD] | ||
58 | * S32 : all off # to dissever from G3-CORE_DBG board | ||
59 | * S33 : all off # to dissever from G3-CORE_DBG board | ||
60 | * | ||
61 | * [G3-CORE_DBG-BOARD] | ||
62 | * S1 : all off # to dissever from G3-CORE_DBG board | ||
63 | * S3 : all off # to dissever from G3-CORE_DBG board | ||
64 | * S4 : all off # to dissever from G3-CORE_DBG board | ||
65 | */ | ||
39 | 66 | ||
40 | static struct mtd_partition nor_flash_partitions[] = { | 67 | static struct mtd_partition nor_flash_partitions[] = { |
41 | { | 68 | { |
@@ -90,7 +117,7 @@ static struct platform_device nor_flash_device = { | |||
90 | }; | 117 | }; |
91 | 118 | ||
92 | /* USBHS */ | 119 | /* USBHS */ |
93 | void usb_host_port_power(int port, int power) | 120 | static void usb_host_port_power(int port, int power) |
94 | { | 121 | { |
95 | if (!power) /* only power-on supported for now */ | 122 | if (!power) /* only power-on supported for now */ |
96 | return; | 123 | return; |
@@ -112,8 +139,7 @@ static struct resource usb_host_resources[] = { | |||
112 | .flags = IORESOURCE_MEM, | 139 | .flags = IORESOURCE_MEM, |
113 | }, | 140 | }, |
114 | [1] = { | 141 | [1] = { |
115 | .start = 65, | 142 | .start = evt2irq(0x0a20), /* USBHS_USHI0 */ |
116 | .end = 65, | ||
117 | .flags = IORESOURCE_IRQ, | 143 | .flags = IORESOURCE_IRQ, |
118 | }, | 144 | }, |
119 | }; | 145 | }; |
@@ -154,7 +180,7 @@ static struct resource keysc_resources[] = { | |||
154 | .flags = IORESOURCE_MEM, | 180 | .flags = IORESOURCE_MEM, |
155 | }, | 181 | }, |
156 | [1] = { | 182 | [1] = { |
157 | .start = 79, | 183 | .start = evt2irq(0x0be0), /* KEYSC_KEY */ |
158 | .flags = IORESOURCE_IRQ, | 184 | .flags = IORESOURCE_IRQ, |
159 | }, | 185 | }, |
160 | }; | 186 | }; |
@@ -169,10 +195,53 @@ static struct platform_device keysc_device = { | |||
169 | }, | 195 | }, |
170 | }; | 196 | }; |
171 | 197 | ||
198 | /* SDHI */ | ||
199 | static struct resource sdhi0_resources[] = { | ||
200 | [0] = { | ||
201 | .name = "SDHI0", | ||
202 | .start = 0xe6d50000, | ||
203 | .end = 0xe6d501ff, | ||
204 | .flags = IORESOURCE_MEM, | ||
205 | }, | ||
206 | [1] = { | ||
207 | .start = evt2irq(0x0e00), /* SDHI0 */ | ||
208 | .flags = IORESOURCE_IRQ, | ||
209 | }, | ||
210 | }; | ||
211 | |||
212 | static struct platform_device sdhi0_device = { | ||
213 | .name = "sh_mobile_sdhi", | ||
214 | .num_resources = ARRAY_SIZE(sdhi0_resources), | ||
215 | .resource = sdhi0_resources, | ||
216 | .id = 0, | ||
217 | }; | ||
218 | |||
219 | static struct resource sdhi1_resources[] = { | ||
220 | [0] = { | ||
221 | .name = "SDHI1", | ||
222 | .start = 0xe6d60000, | ||
223 | .end = 0xe6d601ff, | ||
224 | .flags = IORESOURCE_MEM, | ||
225 | }, | ||
226 | [1] = { | ||
227 | .start = evt2irq(0x0e80), /* SDHI1 */ | ||
228 | .flags = IORESOURCE_IRQ, | ||
229 | }, | ||
230 | }; | ||
231 | |||
232 | static struct platform_device sdhi1_device = { | ||
233 | .name = "sh_mobile_sdhi", | ||
234 | .num_resources = ARRAY_SIZE(sdhi1_resources), | ||
235 | .resource = sdhi1_resources, | ||
236 | .id = 1, | ||
237 | }; | ||
238 | |||
172 | static struct platform_device *g4evm_devices[] __initdata = { | 239 | static struct platform_device *g4evm_devices[] __initdata = { |
173 | &nor_flash_device, | 240 | &nor_flash_device, |
174 | &usb_host_device, | 241 | &usb_host_device, |
175 | &keysc_device, | 242 | &keysc_device, |
243 | &sdhi0_device, | ||
244 | &sdhi1_device, | ||
176 | }; | 245 | }; |
177 | 246 | ||
178 | static struct map_desc g4evm_io_desc[] __initdata = { | 247 | static struct map_desc g4evm_io_desc[] __initdata = { |
@@ -191,12 +260,41 @@ static void __init g4evm_map_io(void) | |||
191 | { | 260 | { |
192 | iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc)); | 261 | iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc)); |
193 | 262 | ||
194 | /* setup early devices, clocks and console here as well */ | 263 | /* setup early devices and console here as well */ |
195 | sh7377_add_early_devices(); | 264 | sh7377_add_early_devices(); |
196 | sh7367_clock_init(); /* use g3 clocks for now */ | ||
197 | shmobile_setup_console(); | 265 | shmobile_setup_console(); |
198 | } | 266 | } |
199 | 267 | ||
268 | #define GPIO_SDHID0_D0 0xe60520fc | ||
269 | #define GPIO_SDHID0_D1 0xe60520fd | ||
270 | #define GPIO_SDHID0_D2 0xe60520fe | ||
271 | #define GPIO_SDHID0_D3 0xe60520ff | ||
272 | #define GPIO_SDHICMD0 0xe6052100 | ||
273 | |||
274 | #define GPIO_SDHID1_D0 0xe6052103 | ||
275 | #define GPIO_SDHID1_D1 0xe6052104 | ||
276 | #define GPIO_SDHID1_D2 0xe6052105 | ||
277 | #define GPIO_SDHID1_D3 0xe6052106 | ||
278 | #define GPIO_SDHICMD1 0xe6052107 | ||
279 | |||
280 | /* | ||
281 | * FIXME !! | ||
282 | * | ||
283 | * gpio_pull_up is quick_hack. | ||
284 | * | ||
285 | * current gpio frame work doesn't have | ||
286 | * the method to control only pull up/down/free. | ||
287 | * this function should be replaced by correct gpio function | ||
288 | */ | ||
289 | static void __init gpio_pull_up(u32 addr) | ||
290 | { | ||
291 | u8 data = __raw_readb(addr); | ||
292 | |||
293 | data &= 0x0F; | ||
294 | data |= 0xC0; | ||
295 | __raw_writeb(data, addr); | ||
296 | } | ||
297 | |||
200 | static void __init g4evm_init(void) | 298 | static void __init g4evm_init(void) |
201 | { | 299 | { |
202 | sh7377_pinmux_init(); | 300 | sh7377_pinmux_init(); |
@@ -229,9 +327,6 @@ static void __init g4evm_init(void) | |||
229 | gpio_request(GPIO_FN_EXTLP, NULL); | 327 | gpio_request(GPIO_FN_EXTLP, NULL); |
230 | gpio_request(GPIO_FN_IDIN, NULL); | 328 | gpio_request(GPIO_FN_IDIN, NULL); |
231 | 329 | ||
232 | /* enable clock in SMSTPCR3 */ | ||
233 | __raw_writel(__raw_readl(0xe615013c) & ~(1 << 22), 0xe615013c); | ||
234 | |||
235 | /* setup USB phy */ | 330 | /* setup USB phy */ |
236 | __raw_writew(0x0200, 0xe605810a); /* USBCR1 */ | 331 | __raw_writew(0x0200, 0xe605810a); /* USBCR1 */ |
237 | __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */ | 332 | __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */ |
@@ -253,16 +348,54 @@ static void __init g4evm_init(void) | |||
253 | gpio_request(GPIO_FN_PORT71_KEYIN5_PU, NULL); | 348 | gpio_request(GPIO_FN_PORT71_KEYIN5_PU, NULL); |
254 | gpio_request(GPIO_FN_PORT72_KEYIN6_PU, NULL); | 349 | gpio_request(GPIO_FN_PORT72_KEYIN6_PU, NULL); |
255 | 350 | ||
351 | /* SDHI0 */ | ||
352 | gpio_request(GPIO_FN_SDHICLK0, NULL); | ||
353 | gpio_request(GPIO_FN_SDHICD0, NULL); | ||
354 | gpio_request(GPIO_FN_SDHID0_0, NULL); | ||
355 | gpio_request(GPIO_FN_SDHID0_1, NULL); | ||
356 | gpio_request(GPIO_FN_SDHID0_2, NULL); | ||
357 | gpio_request(GPIO_FN_SDHID0_3, NULL); | ||
358 | gpio_request(GPIO_FN_SDHICMD0, NULL); | ||
359 | gpio_request(GPIO_FN_SDHIWP0, NULL); | ||
360 | gpio_pull_up(GPIO_SDHID0_D0); | ||
361 | gpio_pull_up(GPIO_SDHID0_D1); | ||
362 | gpio_pull_up(GPIO_SDHID0_D2); | ||
363 | gpio_pull_up(GPIO_SDHID0_D3); | ||
364 | gpio_pull_up(GPIO_SDHICMD0); | ||
365 | |||
366 | /* SDHI1 */ | ||
367 | gpio_request(GPIO_FN_SDHICLK1, NULL); | ||
368 | gpio_request(GPIO_FN_SDHID1_0, NULL); | ||
369 | gpio_request(GPIO_FN_SDHID1_1, NULL); | ||
370 | gpio_request(GPIO_FN_SDHID1_2, NULL); | ||
371 | gpio_request(GPIO_FN_SDHID1_3, NULL); | ||
372 | gpio_request(GPIO_FN_SDHICMD1, NULL); | ||
373 | gpio_pull_up(GPIO_SDHID1_D0); | ||
374 | gpio_pull_up(GPIO_SDHID1_D1); | ||
375 | gpio_pull_up(GPIO_SDHID1_D2); | ||
376 | gpio_pull_up(GPIO_SDHID1_D3); | ||
377 | gpio_pull_up(GPIO_SDHICMD1); | ||
378 | |||
256 | sh7377_add_standard_devices(); | 379 | sh7377_add_standard_devices(); |
257 | 380 | ||
258 | platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices)); | 381 | platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices)); |
259 | } | 382 | } |
260 | 383 | ||
384 | static void __init g4evm_timer_init(void) | ||
385 | { | ||
386 | sh7377_clock_init(); | ||
387 | shmobile_timer.init(); | ||
388 | } | ||
389 | |||
390 | static struct sys_timer g4evm_timer = { | ||
391 | .init = g4evm_timer_init, | ||
392 | }; | ||
393 | |||
261 | MACHINE_START(G4EVM, "g4evm") | 394 | MACHINE_START(G4EVM, "g4evm") |
262 | .phys_io = 0xe6000000, | 395 | .phys_io = 0xe6000000, |
263 | .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc, | 396 | .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc, |
264 | .map_io = g4evm_map_io, | 397 | .map_io = g4evm_map_io, |
265 | .init_irq = sh7377_init_irq, | 398 | .init_irq = sh7377_init_irq, |
266 | .init_machine = g4evm_init, | 399 | .init_machine = g4evm_init, |
267 | .timer = &shmobile_timer, | 400 | .timer = &g4evm_timer, |
268 | MACHINE_END | 401 | MACHINE_END |
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c index bb940c6e4e6c..b6454c9f2abb 100644 --- a/arch/arm/mach-shmobile/clock-sh7367.c +++ b/arch/arm/mach-shmobile/clock-sh7367.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Preliminary clock framework support for sh7367 | 2 | * SH7367 clock framework support |
3 | * | 3 | * |
4 | * Copyright (C) 2010 Magnus Damm | 4 | * Copyright (C) 2010 Magnus Damm |
5 | * | 5 | * |
@@ -17,87 +17,342 @@ | |||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
18 | */ | 18 | */ |
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/module.h> | ||
21 | #include <linux/kernel.h> | 20 | #include <linux/kernel.h> |
22 | #include <linux/list.h> | 21 | #include <linux/io.h> |
23 | #include <linux/clk.h> | 22 | #include <linux/sh_clk.h> |
23 | #include <mach/common.h> | ||
24 | #include <asm/clkdev.h> | ||
25 | |||
26 | /* SH7367 registers */ | ||
27 | #define RTFRQCR 0xe6150000 | ||
28 | #define SYFRQCR 0xe6150004 | ||
29 | #define CMFRQCR 0xe61500E0 | ||
30 | #define VCLKCR1 0xe6150008 | ||
31 | #define VCLKCR2 0xe615000C | ||
32 | #define VCLKCR3 0xe615001C | ||
33 | #define SCLKACR 0xe6150010 | ||
34 | #define SCLKBCR 0xe6150014 | ||
35 | #define SUBUSBCKCR 0xe6158080 | ||
36 | #define SPUCKCR 0xe6150084 | ||
37 | #define MSUCKCR 0xe6150088 | ||
38 | #define MVI3CKCR 0xe6150090 | ||
39 | #define VOUCKCR 0xe6150094 | ||
40 | #define MFCK1CR 0xe6150098 | ||
41 | #define MFCK2CR 0xe615009C | ||
42 | #define PLLC1CR 0xe6150028 | ||
43 | #define PLLC2CR 0xe615002C | ||
44 | #define RTMSTPCR0 0xe6158030 | ||
45 | #define RTMSTPCR2 0xe6158038 | ||
46 | #define SYMSTPCR0 0xe6158040 | ||
47 | #define SYMSTPCR2 0xe6158048 | ||
48 | #define CMMSTPCR0 0xe615804c | ||
24 | 49 | ||
25 | struct clk { | 50 | /* Fixed 32 KHz root clock from EXTALR pin */ |
26 | const char *name; | 51 | static struct clk r_clk = { |
27 | unsigned long rate; | 52 | .rate = 32768, |
28 | }; | 53 | }; |
29 | 54 | ||
30 | #include <asm/clkdev.h> | 55 | /* |
56 | * 26MHz default rate for the EXTALB1 root input clock. | ||
57 | * If needed, reset this with clk_set_rate() from the platform code. | ||
58 | */ | ||
59 | struct clk sh7367_extalb1_clk = { | ||
60 | .rate = 26666666, | ||
61 | }; | ||
31 | 62 | ||
32 | int __clk_get(struct clk *clk) | 63 | /* |
33 | { | 64 | * 48MHz default rate for the EXTAL2 root input clock. |
34 | return 1; | 65 | * If needed, reset this with clk_set_rate() from the platform code. |
35 | } | 66 | */ |
36 | EXPORT_SYMBOL(__clk_get); | 67 | struct clk sh7367_extal2_clk = { |
68 | .rate = 48000000, | ||
69 | }; | ||
37 | 70 | ||
38 | void __clk_put(struct clk *clk) | 71 | /* A fixed divide-by-2 block */ |
72 | static unsigned long div2_recalc(struct clk *clk) | ||
39 | { | 73 | { |
74 | return clk->parent->rate / 2; | ||
40 | } | 75 | } |
41 | EXPORT_SYMBOL(__clk_put); | ||
42 | 76 | ||
77 | static struct clk_ops div2_clk_ops = { | ||
78 | .recalc = div2_recalc, | ||
79 | }; | ||
80 | |||
81 | /* Divide extalb1 by two */ | ||
82 | static struct clk extalb1_div2_clk = { | ||
83 | .ops = &div2_clk_ops, | ||
84 | .parent = &sh7367_extalb1_clk, | ||
85 | }; | ||
86 | |||
87 | /* Divide extal2 by two */ | ||
88 | static struct clk extal2_div2_clk = { | ||
89 | .ops = &div2_clk_ops, | ||
90 | .parent = &sh7367_extal2_clk, | ||
91 | }; | ||
43 | 92 | ||
44 | int clk_enable(struct clk *clk) | 93 | /* PLLC1 */ |
94 | static unsigned long pllc1_recalc(struct clk *clk) | ||
45 | { | 95 | { |
46 | return 0; | 96 | unsigned long mult = 1; |
97 | |||
98 | if (__raw_readl(PLLC1CR) & (1 << 14)) | ||
99 | mult = (((__raw_readl(RTFRQCR) >> 24) & 0x3f) + 1) * 2; | ||
100 | |||
101 | return clk->parent->rate * mult; | ||
47 | } | 102 | } |
48 | EXPORT_SYMBOL(clk_enable); | ||
49 | 103 | ||
50 | void clk_disable(struct clk *clk) | 104 | static struct clk_ops pllc1_clk_ops = { |
105 | .recalc = pllc1_recalc, | ||
106 | }; | ||
107 | |||
108 | static struct clk pllc1_clk = { | ||
109 | .ops = &pllc1_clk_ops, | ||
110 | .flags = CLK_ENABLE_ON_INIT, | ||
111 | .parent = &extalb1_div2_clk, | ||
112 | }; | ||
113 | |||
114 | /* Divide PLLC1 by two */ | ||
115 | static struct clk pllc1_div2_clk = { | ||
116 | .ops = &div2_clk_ops, | ||
117 | .parent = &pllc1_clk, | ||
118 | }; | ||
119 | |||
120 | /* PLLC2 */ | ||
121 | static unsigned long pllc2_recalc(struct clk *clk) | ||
51 | { | 122 | { |
123 | unsigned long mult = 1; | ||
124 | |||
125 | if (__raw_readl(PLLC2CR) & (1 << 31)) | ||
126 | mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2; | ||
127 | |||
128 | return clk->parent->rate * mult; | ||
52 | } | 129 | } |
53 | EXPORT_SYMBOL(clk_disable); | ||
54 | 130 | ||
55 | unsigned long clk_get_rate(struct clk *clk) | 131 | static struct clk_ops pllc2_clk_ops = { |
132 | .recalc = pllc2_recalc, | ||
133 | }; | ||
134 | |||
135 | static struct clk pllc2_clk = { | ||
136 | .ops = &pllc2_clk_ops, | ||
137 | .flags = CLK_ENABLE_ON_INIT, | ||
138 | .parent = &extalb1_div2_clk, | ||
139 | }; | ||
140 | |||
141 | static struct clk *main_clks[] = { | ||
142 | &r_clk, | ||
143 | &sh7367_extalb1_clk, | ||
144 | &sh7367_extal2_clk, | ||
145 | &extalb1_div2_clk, | ||
146 | &extal2_div2_clk, | ||
147 | &pllc1_clk, | ||
148 | &pllc1_div2_clk, | ||
149 | &pllc2_clk, | ||
150 | }; | ||
151 | |||
152 | static void div4_kick(struct clk *clk) | ||
56 | { | 153 | { |
57 | return clk ? clk->rate : 0; | 154 | unsigned long value; |
155 | |||
156 | /* set KICK bit in SYFRQCR to update hardware setting */ | ||
157 | value = __raw_readl(SYFRQCR); | ||
158 | value |= (1 << 31); | ||
159 | __raw_writel(value, SYFRQCR); | ||
58 | } | 160 | } |
59 | EXPORT_SYMBOL(clk_get_rate); | ||
60 | 161 | ||
61 | /* a static peripheral clock for now - enough to get sh-sci working */ | 162 | static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, |
62 | static struct clk peripheral_clk = { | 163 | 24, 32, 36, 48, 0, 72, 0, 0 }; |
63 | .name = "peripheral_clk", | 164 | |
64 | .rate = 48000000, | 165 | static struct clk_div_mult_table div4_div_mult_table = { |
166 | .divisors = divisors, | ||
167 | .nr_divisors = ARRAY_SIZE(divisors), | ||
65 | }; | 168 | }; |
66 | 169 | ||
67 | /* a static rclk for now - enough to get sh_cmt working */ | 170 | static struct clk_div4_table div4_table = { |
68 | static struct clk r_clk = { | 171 | .div_mult_table = &div4_div_mult_table, |
69 | .name = "r_clk", | 172 | .kick = div4_kick, |
70 | .rate = 32768, | 173 | }; |
174 | |||
175 | enum { DIV4_I, DIV4_G, DIV4_S, DIV4_B, | ||
176 | DIV4_ZX, DIV4_ZT, DIV4_Z, DIV4_ZD, DIV4_HP, | ||
177 | DIV4_ZS, DIV4_ZB, DIV4_ZB3, DIV4_CP, DIV4_NR }; | ||
178 | |||
179 | #define DIV4(_reg, _bit, _mask, _flags) \ | ||
180 | SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags) | ||
181 | |||
182 | static struct clk div4_clks[DIV4_NR] = { | ||
183 | [DIV4_I] = DIV4(RTFRQCR, 20, 0x6fff, CLK_ENABLE_ON_INIT), | ||
184 | [DIV4_G] = DIV4(RTFRQCR, 16, 0x6fff, CLK_ENABLE_ON_INIT), | ||
185 | [DIV4_S] = DIV4(RTFRQCR, 12, 0x6fff, CLK_ENABLE_ON_INIT), | ||
186 | [DIV4_B] = DIV4(RTFRQCR, 8, 0x6fff, CLK_ENABLE_ON_INIT), | ||
187 | [DIV4_ZX] = DIV4(SYFRQCR, 20, 0x6fff, 0), | ||
188 | [DIV4_ZT] = DIV4(SYFRQCR, 16, 0x6fff, 0), | ||
189 | [DIV4_Z] = DIV4(SYFRQCR, 12, 0x6fff, 0), | ||
190 | [DIV4_ZD] = DIV4(SYFRQCR, 8, 0x6fff, 0), | ||
191 | [DIV4_HP] = DIV4(SYFRQCR, 4, 0x6fff, 0), | ||
192 | [DIV4_ZS] = DIV4(CMFRQCR, 12, 0x6fff, 0), | ||
193 | [DIV4_ZB] = DIV4(CMFRQCR, 8, 0x6fff, 0), | ||
194 | [DIV4_ZB3] = DIV4(CMFRQCR, 4, 0x6fff, 0), | ||
195 | [DIV4_CP] = DIV4(CMFRQCR, 0, 0x6fff, 0), | ||
71 | }; | 196 | }; |
72 | 197 | ||
73 | /* a static usb0 for now - enough to get r8a66597 working */ | 198 | enum { DIV6_SUB, DIV6_SIUA, DIV6_SIUB, DIV6_MSU, DIV6_SPU, |
74 | static struct clk usb0_clk = { | 199 | DIV6_MVI3, DIV6_MF1, DIV6_MF2, |
75 | .name = "usb0", | 200 | DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_VOU, |
201 | DIV6_NR }; | ||
202 | |||
203 | static struct clk div6_clks[DIV6_NR] = { | ||
204 | [DIV6_SUB] = SH_CLK_DIV6(&sh7367_extal2_clk, SUBUSBCKCR, 0), | ||
205 | [DIV6_SIUA] = SH_CLK_DIV6(&pllc1_div2_clk, SCLKACR, 0), | ||
206 | [DIV6_SIUB] = SH_CLK_DIV6(&pllc1_div2_clk, SCLKBCR, 0), | ||
207 | [DIV6_MSU] = SH_CLK_DIV6(&pllc1_div2_clk, MSUCKCR, 0), | ||
208 | [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0), | ||
209 | [DIV6_MVI3] = SH_CLK_DIV6(&pllc1_div2_clk, MVI3CKCR, 0), | ||
210 | [DIV6_MF1] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK1CR, 0), | ||
211 | [DIV6_MF2] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK2CR, 0), | ||
212 | [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0), | ||
213 | [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0), | ||
214 | [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0), | ||
215 | [DIV6_VOU] = SH_CLK_DIV6(&pllc1_div2_clk, VOUCKCR, 0), | ||
76 | }; | 216 | }; |
77 | 217 | ||
78 | /* a static keysc0 clk for now - enough to get sh_keysc working */ | 218 | enum { RTMSTP001, |
79 | static struct clk keysc0_clk = { | 219 | RTMSTP231, RTMSTP230, RTMSTP229, RTMSTP228, RTMSTP226, |
80 | .name = "keysc0", | 220 | RTMSTP216, RTMSTP206, RTMSTP205, RTMSTP201, |
221 | SYMSTP023, SYMSTP007, SYMSTP006, SYMSTP004, | ||
222 | SYMSTP003, SYMSTP002, SYMSTP001, SYMSTP000, | ||
223 | SYMSTP231, SYMSTP229, SYMSTP225, SYMSTP223, SYMSTP222, | ||
224 | SYMSTP215, SYMSTP214, SYMSTP213, SYMSTP211, | ||
225 | CMMSTP003, | ||
226 | MSTP_NR }; | ||
227 | |||
228 | #define MSTP(_parent, _reg, _bit, _flags) \ | ||
229 | SH_CLK_MSTP32(_parent, _reg, _bit, _flags) | ||
230 | |||
231 | static struct clk mstp_clks[MSTP_NR] = { | ||
232 | [RTMSTP001] = MSTP(&div6_clks[DIV6_SUB], RTMSTPCR0, 1, 0), /* IIC2 */ | ||
233 | [RTMSTP231] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 31, 0), /* VEU3 */ | ||
234 | [RTMSTP230] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 30, 0), /* VEU2 */ | ||
235 | [RTMSTP229] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 29, 0), /* VEU1 */ | ||
236 | [RTMSTP228] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 28, 0), /* VEU0 */ | ||
237 | [RTMSTP226] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 26, 0), /* VEU2H */ | ||
238 | [RTMSTP216] = MSTP(&div6_clks[DIV6_SUB], RTMSTPCR2, 16, 0), /* IIC0 */ | ||
239 | [RTMSTP206] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 6, 0), /* JPU */ | ||
240 | [RTMSTP205] = MSTP(&div6_clks[DIV6_VOU], RTMSTPCR2, 5, 0), /* VOU */ | ||
241 | [RTMSTP201] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 1, 0), /* VPU */ | ||
242 | [SYMSTP023] = MSTP(&div6_clks[DIV6_SPU], SYMSTPCR0, 23, 0), /* SPU1 */ | ||
243 | [SYMSTP007] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 7, 0), /* SCIFA5 */ | ||
244 | [SYMSTP006] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 6, 0), /* SCIFB */ | ||
245 | [SYMSTP004] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 4, 0), /* SCIFA0 */ | ||
246 | [SYMSTP003] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 3, 0), /* SCIFA1 */ | ||
247 | [SYMSTP002] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 2, 0), /* SCIFA2 */ | ||
248 | [SYMSTP001] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 1, 0), /* SCIFA3 */ | ||
249 | [SYMSTP000] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 0, 0), /* SCIFA4 */ | ||
250 | [SYMSTP231] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 31, 0), /* SIU */ | ||
251 | [SYMSTP229] = MSTP(&r_clk, SYMSTPCR2, 29, 0), /* CMT10 */ | ||
252 | [SYMSTP225] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 25, 0), /* IRDA */ | ||
253 | [SYMSTP223] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 23, 0), /* IIC1 */ | ||
254 | [SYMSTP222] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 22, 0), /* USBHS */ | ||
255 | [SYMSTP215] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 15, 0), /* FLCTL */ | ||
256 | [SYMSTP214] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 14, 0), /* SDHI0 */ | ||
257 | [SYMSTP213] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 13, 0), /* SDHI1 */ | ||
258 | [SYMSTP211] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 11, 0), /* SDHI2 */ | ||
259 | [CMMSTP003] = MSTP(&r_clk, CMMSTPCR0, 3, 0), /* KEYSC */ | ||
81 | }; | 260 | }; |
82 | 261 | ||
262 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } | ||
263 | #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk } | ||
264 | |||
83 | static struct clk_lookup lookups[] = { | 265 | static struct clk_lookup lookups[] = { |
84 | { | 266 | /* main clocks */ |
85 | .clk = &peripheral_clk, | 267 | CLKDEV_CON_ID("r_clk", &r_clk), |
86 | }, { | 268 | CLKDEV_CON_ID("extalb1", &sh7367_extalb1_clk), |
87 | .clk = &r_clk, | 269 | CLKDEV_CON_ID("extal2", &sh7367_extal2_clk), |
88 | }, { | 270 | CLKDEV_CON_ID("extalb1_div2_clk", &extalb1_div2_clk), |
89 | .clk = &usb0_clk, | 271 | CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk), |
90 | }, { | 272 | CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), |
91 | .clk = &keysc0_clk, | 273 | CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), |
92 | } | 274 | CLKDEV_CON_ID("pllc2_clk", &pllc2_clk), |
275 | |||
276 | /* DIV4 clocks */ | ||
277 | CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), | ||
278 | CLKDEV_CON_ID("g_clk", &div4_clks[DIV4_G]), | ||
279 | CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]), | ||
280 | CLKDEV_CON_ID("zx_clk", &div4_clks[DIV4_ZX]), | ||
281 | CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]), | ||
282 | CLKDEV_CON_ID("z_clk", &div4_clks[DIV4_Z]), | ||
283 | CLKDEV_CON_ID("zd_clk", &div4_clks[DIV4_ZD]), | ||
284 | CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]), | ||
285 | CLKDEV_CON_ID("zs_clk", &div4_clks[DIV4_ZS]), | ||
286 | CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]), | ||
287 | CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]), | ||
288 | CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]), | ||
289 | |||
290 | /* DIV6 clocks */ | ||
291 | CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), | ||
292 | CLKDEV_CON_ID("siua_clk", &div6_clks[DIV6_SIUA]), | ||
293 | CLKDEV_CON_ID("siub_clk", &div6_clks[DIV6_SIUB]), | ||
294 | CLKDEV_CON_ID("msu_clk", &div6_clks[DIV6_MSU]), | ||
295 | CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), | ||
296 | CLKDEV_CON_ID("mvi3_clk", &div6_clks[DIV6_MVI3]), | ||
297 | CLKDEV_CON_ID("mf1_clk", &div6_clks[DIV6_MF1]), | ||
298 | CLKDEV_CON_ID("mf2_clk", &div6_clks[DIV6_MF2]), | ||
299 | CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), | ||
300 | CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]), | ||
301 | CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), | ||
302 | CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]), | ||
303 | |||
304 | /* MSTP32 clocks */ | ||
305 | CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[RTMSTP001]), /* IIC2 */ | ||
306 | CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[RTMSTP231]), /* VEU3 */ | ||
307 | CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[RTMSTP230]), /* VEU2 */ | ||
308 | CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[RTMSTP229]), /* VEU1 */ | ||
309 | CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[RTMSTP228]), /* VEU0 */ | ||
310 | CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[RTMSTP226]), /* VEU2H */ | ||
311 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[RTMSTP216]), /* IIC0 */ | ||
312 | CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[RTMSTP206]), /* JPU */ | ||
313 | CLKDEV_DEV_ID("sh-vou", &mstp_clks[RTMSTP205]), /* VOU */ | ||
314 | CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[RTMSTP201]), /* VPU */ | ||
315 | CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[SYMSTP023]), /* SPU1 */ | ||
316 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[SYMSTP007]), /* SCIFA5 */ | ||
317 | CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[SYMSTP006]), /* SCIFB */ | ||
318 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[SYMSTP004]), /* SCIFA0 */ | ||
319 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[SYMSTP003]), /* SCIFA1 */ | ||
320 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[SYMSTP002]), /* SCIFA2 */ | ||
321 | CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[SYMSTP001]), /* SCIFA3 */ | ||
322 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[SYMSTP000]), /* SCIFA4 */ | ||
323 | CLKDEV_DEV_ID("sh_siu", &mstp_clks[SYMSTP231]), /* SIU */ | ||
324 | CLKDEV_CON_ID("cmt1", &mstp_clks[SYMSTP229]), /* CMT10 */ | ||
325 | CLKDEV_DEV_ID("sh_irda", &mstp_clks[SYMSTP225]), /* IRDA */ | ||
326 | CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[SYMSTP223]), /* IIC1 */ | ||
327 | CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[SYMSTP222]), /* USBHS */ | ||
328 | CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[SYMSTP222]), /* USBHS */ | ||
329 | CLKDEV_DEV_ID("sh_flctl", &mstp_clks[SYMSTP215]), /* FLCTL */ | ||
330 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[SYMSTP214]), /* SDHI0 */ | ||
331 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[SYMSTP213]), /* SDHI1 */ | ||
332 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[SYMSTP211]), /* SDHI2 */ | ||
333 | CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[CMMSTP003]), /* KEYSC */ | ||
93 | }; | 334 | }; |
94 | 335 | ||
95 | void __init sh7367_clock_init(void) | 336 | void __init sh7367_clock_init(void) |
96 | { | 337 | { |
97 | int i; | 338 | int k, ret = 0; |
339 | |||
340 | for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) | ||
341 | ret = clk_register(main_clks[k]); | ||
342 | |||
343 | if (!ret) | ||
344 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); | ||
345 | |||
346 | if (!ret) | ||
347 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); | ||
348 | |||
349 | if (!ret) | ||
350 | ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); | ||
351 | |||
352 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | ||
98 | 353 | ||
99 | for (i = 0; i < ARRAY_SIZE(lookups); i++) { | 354 | if (!ret) |
100 | lookups[i].con_id = lookups[i].clk->name; | 355 | clk_init(); |
101 | clkdev_add(&lookups[i]); | 356 | else |
102 | } | 357 | panic("failed to setup sh7367 clocks\n"); |
103 | } | 358 | } |
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c new file mode 100644 index 000000000000..fb4e9b1d788e --- /dev/null +++ b/arch/arm/mach-shmobile/clock-sh7372.c | |||
@@ -0,0 +1,560 @@ | |||
1 | /* | ||
2 | * SH7372 clock framework support | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/io.h> | ||
22 | #include <linux/sh_clk.h> | ||
23 | #include <mach/common.h> | ||
24 | #include <asm/clkdev.h> | ||
25 | |||
26 | /* SH7372 registers */ | ||
27 | #define FRQCRA 0xe6150000 | ||
28 | #define FRQCRB 0xe6150004 | ||
29 | #define FRQCRC 0xe61500e0 | ||
30 | #define FRQCRD 0xe61500e4 | ||
31 | #define VCLKCR1 0xe6150008 | ||
32 | #define VCLKCR2 0xe615000c | ||
33 | #define VCLKCR3 0xe615001c | ||
34 | #define FMSICKCR 0xe6150010 | ||
35 | #define FMSOCKCR 0xe6150014 | ||
36 | #define FSIACKCR 0xe6150018 | ||
37 | #define FSIBCKCR 0xe6150090 | ||
38 | #define SUBCKCR 0xe6150080 | ||
39 | #define SPUCKCR 0xe6150084 | ||
40 | #define VOUCKCR 0xe6150088 | ||
41 | #define HDMICKCR 0xe6150094 | ||
42 | #define DSITCKCR 0xe6150060 | ||
43 | #define DSI0PCKCR 0xe6150064 | ||
44 | #define DSI1PCKCR 0xe6150098 | ||
45 | #define PLLC01CR 0xe6150028 | ||
46 | #define PLLC2CR 0xe615002c | ||
47 | #define SMSTPCR0 0xe6150130 | ||
48 | #define SMSTPCR1 0xe6150134 | ||
49 | #define SMSTPCR2 0xe6150138 | ||
50 | #define SMSTPCR3 0xe615013c | ||
51 | #define SMSTPCR4 0xe6150140 | ||
52 | |||
53 | /* Platforms must set frequency on their DV_CLKI pin */ | ||
54 | struct clk dv_clki_clk = { | ||
55 | }; | ||
56 | |||
57 | /* Fixed 32 KHz root clock from EXTALR pin */ | ||
58 | static struct clk r_clk = { | ||
59 | .rate = 32768, | ||
60 | }; | ||
61 | |||
62 | /* | ||
63 | * 26MHz default rate for the EXTAL1 root input clock. | ||
64 | * If needed, reset this with clk_set_rate() from the platform code. | ||
65 | */ | ||
66 | struct clk sh7372_extal1_clk = { | ||
67 | .rate = 26000000, | ||
68 | }; | ||
69 | |||
70 | /* | ||
71 | * 48MHz default rate for the EXTAL2 root input clock. | ||
72 | * If needed, reset this with clk_set_rate() from the platform code. | ||
73 | */ | ||
74 | struct clk sh7372_extal2_clk = { | ||
75 | .rate = 48000000, | ||
76 | }; | ||
77 | |||
78 | /* A fixed divide-by-2 block */ | ||
79 | static unsigned long div2_recalc(struct clk *clk) | ||
80 | { | ||
81 | return clk->parent->rate / 2; | ||
82 | } | ||
83 | |||
84 | static struct clk_ops div2_clk_ops = { | ||
85 | .recalc = div2_recalc, | ||
86 | }; | ||
87 | |||
88 | /* Divide dv_clki by two */ | ||
89 | struct clk dv_clki_div2_clk = { | ||
90 | .ops = &div2_clk_ops, | ||
91 | .parent = &dv_clki_clk, | ||
92 | }; | ||
93 | |||
94 | /* Divide extal1 by two */ | ||
95 | static struct clk extal1_div2_clk = { | ||
96 | .ops = &div2_clk_ops, | ||
97 | .parent = &sh7372_extal1_clk, | ||
98 | }; | ||
99 | |||
100 | /* Divide extal2 by two */ | ||
101 | static struct clk extal2_div2_clk = { | ||
102 | .ops = &div2_clk_ops, | ||
103 | .parent = &sh7372_extal2_clk, | ||
104 | }; | ||
105 | |||
106 | /* Divide extal2 by four */ | ||
107 | static struct clk extal2_div4_clk = { | ||
108 | .ops = &div2_clk_ops, | ||
109 | .parent = &extal2_div2_clk, | ||
110 | }; | ||
111 | |||
112 | /* PLLC0 and PLLC1 */ | ||
113 | static unsigned long pllc01_recalc(struct clk *clk) | ||
114 | { | ||
115 | unsigned long mult = 1; | ||
116 | |||
117 | if (__raw_readl(PLLC01CR) & (1 << 14)) | ||
118 | mult = (((__raw_readl(clk->enable_reg) >> 24) & 0x3f) + 1) * 2; | ||
119 | |||
120 | return clk->parent->rate * mult; | ||
121 | } | ||
122 | |||
123 | static struct clk_ops pllc01_clk_ops = { | ||
124 | .recalc = pllc01_recalc, | ||
125 | }; | ||
126 | |||
127 | static struct clk pllc0_clk = { | ||
128 | .ops = &pllc01_clk_ops, | ||
129 | .flags = CLK_ENABLE_ON_INIT, | ||
130 | .parent = &extal1_div2_clk, | ||
131 | .enable_reg = (void __iomem *)FRQCRC, | ||
132 | }; | ||
133 | |||
134 | static struct clk pllc1_clk = { | ||
135 | .ops = &pllc01_clk_ops, | ||
136 | .flags = CLK_ENABLE_ON_INIT, | ||
137 | .parent = &extal1_div2_clk, | ||
138 | .enable_reg = (void __iomem *)FRQCRA, | ||
139 | }; | ||
140 | |||
141 | /* Divide PLLC1 by two */ | ||
142 | static struct clk pllc1_div2_clk = { | ||
143 | .ops = &div2_clk_ops, | ||
144 | .parent = &pllc1_clk, | ||
145 | }; | ||
146 | |||
147 | /* PLLC2 */ | ||
148 | |||
149 | /* Indices are important - they are the actual src selecting values */ | ||
150 | static struct clk *pllc2_parent[] = { | ||
151 | [0] = &extal1_div2_clk, | ||
152 | [1] = &extal2_div2_clk, | ||
153 | [2] = &dv_clki_div2_clk, | ||
154 | }; | ||
155 | |||
156 | /* Only multipliers 20 * 2 to 46 * 2 are valid, last entry for CPUFREQ_TABLE_END */ | ||
157 | static struct cpufreq_frequency_table pllc2_freq_table[29]; | ||
158 | |||
159 | static void pllc2_table_rebuild(struct clk *clk) | ||
160 | { | ||
161 | int i; | ||
162 | |||
163 | /* Initialise PLLC2 frequency table */ | ||
164 | for (i = 0; i < ARRAY_SIZE(pllc2_freq_table) - 2; i++) { | ||
165 | pllc2_freq_table[i].frequency = clk->parent->rate * (i + 20) * 2; | ||
166 | pllc2_freq_table[i].index = i; | ||
167 | } | ||
168 | |||
169 | /* This is a special entry - switching PLL off makes it a repeater */ | ||
170 | pllc2_freq_table[i].frequency = clk->parent->rate; | ||
171 | pllc2_freq_table[i].index = i; | ||
172 | |||
173 | pllc2_freq_table[++i].frequency = CPUFREQ_TABLE_END; | ||
174 | pllc2_freq_table[i].index = i; | ||
175 | } | ||
176 | |||
177 | static unsigned long pllc2_recalc(struct clk *clk) | ||
178 | { | ||
179 | unsigned long mult = 1; | ||
180 | |||
181 | pllc2_table_rebuild(clk); | ||
182 | |||
183 | /* | ||
184 | * If the PLL is off, mult == 1, clk->rate will be updated in | ||
185 | * pllc2_enable(). | ||
186 | */ | ||
187 | if (__raw_readl(PLLC2CR) & (1 << 31)) | ||
188 | mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2; | ||
189 | |||
190 | return clk->parent->rate * mult; | ||
191 | } | ||
192 | |||
193 | static long pllc2_round_rate(struct clk *clk, unsigned long rate) | ||
194 | { | ||
195 | return clk_rate_table_round(clk, clk->freq_table, rate); | ||
196 | } | ||
197 | |||
198 | static int pllc2_enable(struct clk *clk) | ||
199 | { | ||
200 | int i; | ||
201 | |||
202 | __raw_writel(__raw_readl(PLLC2CR) | 0x80000000, PLLC2CR); | ||
203 | |||
204 | for (i = 0; i < 100; i++) | ||
205 | if (__raw_readl(PLLC2CR) & 0x80000000) { | ||
206 | clk->rate = pllc2_recalc(clk); | ||
207 | return 0; | ||
208 | } | ||
209 | |||
210 | pr_err("%s(): timeout!\n", __func__); | ||
211 | |||
212 | return -ETIMEDOUT; | ||
213 | } | ||
214 | |||
215 | static void pllc2_disable(struct clk *clk) | ||
216 | { | ||
217 | __raw_writel(__raw_readl(PLLC2CR) & ~0x80000000, PLLC2CR); | ||
218 | } | ||
219 | |||
220 | static int pllc2_set_rate(struct clk *clk, | ||
221 | unsigned long rate, int algo_id) | ||
222 | { | ||
223 | unsigned long value; | ||
224 | int idx; | ||
225 | |||
226 | idx = clk_rate_table_find(clk, clk->freq_table, rate); | ||
227 | if (idx < 0) | ||
228 | return idx; | ||
229 | |||
230 | if (rate == clk->parent->rate) { | ||
231 | pllc2_disable(clk); | ||
232 | return 0; | ||
233 | } | ||
234 | |||
235 | value = __raw_readl(PLLC2CR) & ~(0x3f << 24); | ||
236 | |||
237 | if (value & 0x80000000) | ||
238 | pllc2_disable(clk); | ||
239 | |||
240 | __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR); | ||
241 | |||
242 | if (value & 0x80000000) | ||
243 | return pllc2_enable(clk); | ||
244 | |||
245 | return 0; | ||
246 | } | ||
247 | |||
248 | static int pllc2_set_parent(struct clk *clk, struct clk *parent) | ||
249 | { | ||
250 | u32 value; | ||
251 | int ret, i; | ||
252 | |||
253 | if (!clk->parent_table || !clk->parent_num) | ||
254 | return -EINVAL; | ||
255 | |||
256 | /* Search the parent */ | ||
257 | for (i = 0; i < clk->parent_num; i++) | ||
258 | if (clk->parent_table[i] == parent) | ||
259 | break; | ||
260 | |||
261 | if (i == clk->parent_num) | ||
262 | return -ENODEV; | ||
263 | |||
264 | ret = clk_reparent(clk, parent); | ||
265 | if (ret < 0) | ||
266 | return ret; | ||
267 | |||
268 | value = __raw_readl(PLLC2CR) & ~(3 << 6); | ||
269 | |||
270 | __raw_writel(value | (i << 6), PLLC2CR); | ||
271 | |||
272 | /* Rebiuld the frequency table */ | ||
273 | pllc2_table_rebuild(clk); | ||
274 | |||
275 | return 0; | ||
276 | } | ||
277 | |||
278 | static struct clk_ops pllc2_clk_ops = { | ||
279 | .recalc = pllc2_recalc, | ||
280 | .round_rate = pllc2_round_rate, | ||
281 | .set_rate = pllc2_set_rate, | ||
282 | .enable = pllc2_enable, | ||
283 | .disable = pllc2_disable, | ||
284 | .set_parent = pllc2_set_parent, | ||
285 | }; | ||
286 | |||
287 | struct clk pllc2_clk = { | ||
288 | .ops = &pllc2_clk_ops, | ||
289 | .flags = CLK_ENABLE_ON_INIT, | ||
290 | .parent = &extal1_div2_clk, | ||
291 | .freq_table = pllc2_freq_table, | ||
292 | .parent_table = pllc2_parent, | ||
293 | .parent_num = ARRAY_SIZE(pllc2_parent), | ||
294 | }; | ||
295 | |||
296 | static struct clk *main_clks[] = { | ||
297 | &dv_clki_clk, | ||
298 | &r_clk, | ||
299 | &sh7372_extal1_clk, | ||
300 | &sh7372_extal2_clk, | ||
301 | &dv_clki_div2_clk, | ||
302 | &extal1_div2_clk, | ||
303 | &extal2_div2_clk, | ||
304 | &extal2_div4_clk, | ||
305 | &pllc0_clk, | ||
306 | &pllc1_clk, | ||
307 | &pllc1_div2_clk, | ||
308 | &pllc2_clk, | ||
309 | }; | ||
310 | |||
311 | static void div4_kick(struct clk *clk) | ||
312 | { | ||
313 | unsigned long value; | ||
314 | |||
315 | /* set KICK bit in FRQCRB to update hardware setting */ | ||
316 | value = __raw_readl(FRQCRB); | ||
317 | value |= (1 << 31); | ||
318 | __raw_writel(value, FRQCRB); | ||
319 | } | ||
320 | |||
321 | static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, | ||
322 | 24, 32, 36, 48, 0, 72, 96, 0 }; | ||
323 | |||
324 | static struct clk_div_mult_table div4_div_mult_table = { | ||
325 | .divisors = divisors, | ||
326 | .nr_divisors = ARRAY_SIZE(divisors), | ||
327 | }; | ||
328 | |||
329 | static struct clk_div4_table div4_table = { | ||
330 | .div_mult_table = &div4_div_mult_table, | ||
331 | .kick = div4_kick, | ||
332 | }; | ||
333 | |||
334 | enum { DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_CSIR, | ||
335 | DIV4_ZTR, DIV4_ZT, DIV4_ZX, DIV4_HP, | ||
336 | DIV4_ISPB, DIV4_S, DIV4_ZB, DIV4_ZB3, DIV4_CP, | ||
337 | DIV4_DDRP, DIV4_NR }; | ||
338 | |||
339 | #define DIV4(_reg, _bit, _mask, _flags) \ | ||
340 | SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags) | ||
341 | |||
342 | static struct clk div4_clks[DIV4_NR] = { | ||
343 | [DIV4_I] = DIV4(FRQCRA, 20, 0x6fff, CLK_ENABLE_ON_INIT), | ||
344 | [DIV4_ZG] = DIV4(FRQCRA, 16, 0x6fff, CLK_ENABLE_ON_INIT), | ||
345 | [DIV4_B] = DIV4(FRQCRA, 8, 0x6fff, CLK_ENABLE_ON_INIT), | ||
346 | [DIV4_M1] = DIV4(FRQCRA, 4, 0x6fff, CLK_ENABLE_ON_INIT), | ||
347 | [DIV4_CSIR] = DIV4(FRQCRA, 0, 0x6fff, 0), | ||
348 | [DIV4_ZTR] = DIV4(FRQCRB, 20, 0x6fff, 0), | ||
349 | [DIV4_ZT] = DIV4(FRQCRB, 16, 0x6fff, 0), | ||
350 | [DIV4_ZX] = DIV4(FRQCRB, 12, 0x6fff, 0), | ||
351 | [DIV4_HP] = DIV4(FRQCRB, 4, 0x6fff, 0), | ||
352 | [DIV4_ISPB] = DIV4(FRQCRC, 20, 0x6fff, 0), | ||
353 | [DIV4_S] = DIV4(FRQCRC, 12, 0x6fff, 0), | ||
354 | [DIV4_ZB] = DIV4(FRQCRC, 8, 0x6fff, 0), | ||
355 | [DIV4_ZB3] = DIV4(FRQCRC, 4, 0x6fff, 0), | ||
356 | [DIV4_CP] = DIV4(FRQCRC, 0, 0x6fff, 0), | ||
357 | [DIV4_DDRP] = DIV4(FRQCRD, 0, 0x677c, 0), | ||
358 | }; | ||
359 | |||
360 | enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_FMSI, DIV6_FMSO, | ||
361 | DIV6_FSIA, DIV6_FSIB, DIV6_SUB, DIV6_SPU, | ||
362 | DIV6_VOU, DIV6_DSIT, DIV6_DSI0P, DIV6_DSI1P, | ||
363 | DIV6_NR }; | ||
364 | |||
365 | static struct clk div6_clks[DIV6_NR] = { | ||
366 | [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0), | ||
367 | [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0), | ||
368 | [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0), | ||
369 | [DIV6_FMSI] = SH_CLK_DIV6(&pllc1_div2_clk, FMSICKCR, 0), | ||
370 | [DIV6_FMSO] = SH_CLK_DIV6(&pllc1_div2_clk, FMSOCKCR, 0), | ||
371 | [DIV6_FSIA] = SH_CLK_DIV6(&pllc1_div2_clk, FSIACKCR, 0), | ||
372 | [DIV6_FSIB] = SH_CLK_DIV6(&pllc1_div2_clk, FSIBCKCR, 0), | ||
373 | [DIV6_SUB] = SH_CLK_DIV6(&sh7372_extal2_clk, SUBCKCR, 0), | ||
374 | [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0), | ||
375 | [DIV6_VOU] = SH_CLK_DIV6(&pllc1_div2_clk, VOUCKCR, 0), | ||
376 | [DIV6_DSIT] = SH_CLK_DIV6(&pllc1_div2_clk, DSITCKCR, 0), | ||
377 | [DIV6_DSI0P] = SH_CLK_DIV6(&pllc1_div2_clk, DSI0PCKCR, 0), | ||
378 | [DIV6_DSI1P] = SH_CLK_DIV6(&pllc1_div2_clk, DSI1PCKCR, 0), | ||
379 | }; | ||
380 | |||
381 | enum { DIV6_HDMI, DIV6_REPARENT_NR }; | ||
382 | |||
383 | /* Indices are important - they are the actual src selecting values */ | ||
384 | static struct clk *hdmi_parent[] = { | ||
385 | [0] = &pllc1_div2_clk, | ||
386 | [1] = &pllc2_clk, | ||
387 | [2] = &dv_clki_clk, | ||
388 | [3] = NULL, /* pllc2_div4 not implemented yet */ | ||
389 | }; | ||
390 | |||
391 | static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = { | ||
392 | [DIV6_HDMI] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, HDMICKCR, 0, | ||
393 | hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2), | ||
394 | }; | ||
395 | |||
396 | enum { MSTP001, | ||
397 | MSTP131, MSTP130, | ||
398 | MSTP129, MSTP128, | ||
399 | MSTP118, MSTP117, MSTP116, | ||
400 | MSTP106, MSTP101, MSTP100, | ||
401 | MSTP223, | ||
402 | MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, | ||
403 | MSTP329, MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312, | ||
404 | MSTP415, MSTP413, MSTP411, MSTP410, MSTP406, MSTP403, | ||
405 | MSTP_NR }; | ||
406 | |||
407 | #define MSTP(_parent, _reg, _bit, _flags) \ | ||
408 | SH_CLK_MSTP32(_parent, _reg, _bit, _flags) | ||
409 | |||
410 | static struct clk mstp_clks[MSTP_NR] = { | ||
411 | [MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */ | ||
412 | [MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */ | ||
413 | [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */ | ||
414 | [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */ | ||
415 | [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */ | ||
416 | [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX */ | ||
417 | [MSTP117] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */ | ||
418 | [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */ | ||
419 | [MSTP106] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 6, 0), /* JPU */ | ||
420 | [MSTP101] = MSTP(&div4_clks[DIV4_M1], SMSTPCR1, 1, 0), /* VPU */ | ||
421 | [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */ | ||
422 | [MSTP223] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR2, 23, 0), /* SPU2 */ | ||
423 | [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ | ||
424 | [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ | ||
425 | [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ | ||
426 | [MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */ | ||
427 | [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */ | ||
428 | [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */ | ||
429 | [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ | ||
430 | [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ | ||
431 | [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, CLK_ENABLE_ON_INIT), /* FSIA */ | ||
432 | [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */ | ||
433 | [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */ | ||
434 | [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */ | ||
435 | [MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */ | ||
436 | [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMC */ | ||
437 | [MSTP415] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 15, 0), /* SDHI2 */ | ||
438 | [MSTP413] = MSTP(&pllc1_div2_clk, SMSTPCR4, 13, 0), /* HDMI */ | ||
439 | [MSTP411] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 11, 0), /* IIC3 */ | ||
440 | [MSTP410] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 10, 0), /* IIC4 */ | ||
441 | [MSTP406] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 6, 0), /* USB1 */ | ||
442 | [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ | ||
443 | }; | ||
444 | |||
445 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } | ||
446 | #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk } | ||
447 | |||
448 | static struct clk_lookup lookups[] = { | ||
449 | /* main clocks */ | ||
450 | CLKDEV_CON_ID("dv_clki_div2_clk", &dv_clki_div2_clk), | ||
451 | CLKDEV_CON_ID("r_clk", &r_clk), | ||
452 | CLKDEV_CON_ID("extal1", &sh7372_extal1_clk), | ||
453 | CLKDEV_CON_ID("extal2", &sh7372_extal2_clk), | ||
454 | CLKDEV_CON_ID("extal1_div2_clk", &extal1_div2_clk), | ||
455 | CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk), | ||
456 | CLKDEV_CON_ID("extal2_div4_clk", &extal2_div4_clk), | ||
457 | CLKDEV_CON_ID("pllc0_clk", &pllc0_clk), | ||
458 | CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), | ||
459 | CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), | ||
460 | CLKDEV_CON_ID("pllc2_clk", &pllc2_clk), | ||
461 | |||
462 | /* DIV4 clocks */ | ||
463 | CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), | ||
464 | CLKDEV_CON_ID("zg_clk", &div4_clks[DIV4_ZG]), | ||
465 | CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]), | ||
466 | CLKDEV_CON_ID("m1_clk", &div4_clks[DIV4_M1]), | ||
467 | CLKDEV_CON_ID("csir_clk", &div4_clks[DIV4_CSIR]), | ||
468 | CLKDEV_CON_ID("ztr_clk", &div4_clks[DIV4_ZTR]), | ||
469 | CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]), | ||
470 | CLKDEV_CON_ID("zx_clk", &div4_clks[DIV4_ZX]), | ||
471 | CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]), | ||
472 | CLKDEV_CON_ID("ispb_clk", &div4_clks[DIV4_ISPB]), | ||
473 | CLKDEV_CON_ID("s_clk", &div4_clks[DIV4_S]), | ||
474 | CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]), | ||
475 | CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]), | ||
476 | CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]), | ||
477 | CLKDEV_CON_ID("ddrp_clk", &div4_clks[DIV4_DDRP]), | ||
478 | |||
479 | /* DIV6 clocks */ | ||
480 | CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), | ||
481 | CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]), | ||
482 | CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), | ||
483 | CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]), | ||
484 | CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]), | ||
485 | CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FSIA]), | ||
486 | CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FSIB]), | ||
487 | CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), | ||
488 | CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), | ||
489 | CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]), | ||
490 | CLKDEV_CON_ID("hdmi_clk", &div6_reparent_clks[DIV6_HDMI]), | ||
491 | CLKDEV_CON_ID("dsit_clk", &div6_clks[DIV6_DSIT]), | ||
492 | CLKDEV_CON_ID("dsi0p_clk", &div6_clks[DIV6_DSI0P]), | ||
493 | CLKDEV_CON_ID("dsi1p_clk", &div6_clks[DIV6_DSI1P]), | ||
494 | |||
495 | /* MSTP32 clocks */ | ||
496 | CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */ | ||
497 | CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */ | ||
498 | CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */ | ||
499 | CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */ | ||
500 | CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */ | ||
501 | CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ | ||
502 | CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */ | ||
503 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */ | ||
504 | CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */ | ||
505 | CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */ | ||
506 | CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ | ||
507 | CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[MSTP223]), /* SPU2DSP0 */ | ||
508 | CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[MSTP223]), /* SPU2DSP1 */ | ||
509 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ | ||
510 | CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP206]), /* SCIFB */ | ||
511 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */ | ||
512 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */ | ||
513 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */ | ||
514 | CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */ | ||
515 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ | ||
516 | CLKDEV_CON_ID("cmt1", &mstp_clks[MSTP329]), /* CMT10 */ | ||
517 | CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */ | ||
518 | CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ | ||
519 | CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP323]), /* USB0 */ | ||
520 | CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP323]), /* USB0 */ | ||
521 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ | ||
522 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ | ||
523 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */ | ||
524 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), /* SDHI2 */ | ||
525 | CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */ | ||
526 | CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */ | ||
527 | CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* IIC4 */ | ||
528 | CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */ | ||
529 | CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */ | ||
530 | CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ | ||
531 | {.con_id = "ick", .dev_id = "sh-mobile-hdmi", .clk = &div6_reparent_clks[DIV6_HDMI]}, | ||
532 | }; | ||
533 | |||
534 | void __init sh7372_clock_init(void) | ||
535 | { | ||
536 | int k, ret = 0; | ||
537 | |||
538 | for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) | ||
539 | ret = clk_register(main_clks[k]); | ||
540 | |||
541 | if (!ret) | ||
542 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); | ||
543 | |||
544 | if (!ret) | ||
545 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); | ||
546 | |||
547 | if (!ret) | ||
548 | ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_NR); | ||
549 | |||
550 | if (!ret) | ||
551 | ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); | ||
552 | |||
553 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | ||
554 | |||
555 | if (!ret) | ||
556 | clk_init(); | ||
557 | else | ||
558 | panic("failed to setup sh7372 clocks\n"); | ||
559 | |||
560 | } | ||
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c new file mode 100644 index 000000000000..e007c28cf0a8 --- /dev/null +++ b/arch/arm/mach-shmobile/clock-sh7377.c | |||
@@ -0,0 +1,369 @@ | |||
1 | /* | ||
2 | * SH7377 clock framework support | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/io.h> | ||
22 | #include <linux/sh_clk.h> | ||
23 | #include <mach/common.h> | ||
24 | #include <asm/clkdev.h> | ||
25 | |||
26 | /* SH7377 registers */ | ||
27 | #define RTFRQCR 0xe6150000 | ||
28 | #define SYFRQCR 0xe6150004 | ||
29 | #define CMFRQCR 0xe61500E0 | ||
30 | #define VCLKCR1 0xe6150008 | ||
31 | #define VCLKCR2 0xe615000C | ||
32 | #define VCLKCR3 0xe615001C | ||
33 | #define FMSICKCR 0xe6150010 | ||
34 | #define FMSOCKCR 0xe6150014 | ||
35 | #define FSICKCR 0xe6150018 | ||
36 | #define PLLC1CR 0xe6150028 | ||
37 | #define PLLC2CR 0xe615002C | ||
38 | #define SUBUSBCKCR 0xe6150080 | ||
39 | #define SPUCKCR 0xe6150084 | ||
40 | #define MSUCKCR 0xe6150088 | ||
41 | #define MVI3CKCR 0xe6150090 | ||
42 | #define HDMICKCR 0xe6150094 | ||
43 | #define MFCK1CR 0xe6150098 | ||
44 | #define MFCK2CR 0xe615009C | ||
45 | #define DSITCKCR 0xe6150060 | ||
46 | #define DSIPCKCR 0xe6150064 | ||
47 | #define SMSTPCR0 0xe6150130 | ||
48 | #define SMSTPCR1 0xe6150134 | ||
49 | #define SMSTPCR2 0xe6150138 | ||
50 | #define SMSTPCR3 0xe615013C | ||
51 | #define SMSTPCR4 0xe6150140 | ||
52 | |||
53 | /* Fixed 32 KHz root clock from EXTALR pin */ | ||
54 | static struct clk r_clk = { | ||
55 | .rate = 32768, | ||
56 | }; | ||
57 | |||
58 | /* | ||
59 | * 26MHz default rate for the EXTALC1 root input clock. | ||
60 | * If needed, reset this with clk_set_rate() from the platform code. | ||
61 | */ | ||
62 | struct clk sh7377_extalc1_clk = { | ||
63 | .rate = 26666666, | ||
64 | }; | ||
65 | |||
66 | /* | ||
67 | * 48MHz default rate for the EXTAL2 root input clock. | ||
68 | * If needed, reset this with clk_set_rate() from the platform code. | ||
69 | */ | ||
70 | struct clk sh7377_extal2_clk = { | ||
71 | .rate = 48000000, | ||
72 | }; | ||
73 | |||
74 | /* A fixed divide-by-2 block */ | ||
75 | static unsigned long div2_recalc(struct clk *clk) | ||
76 | { | ||
77 | return clk->parent->rate / 2; | ||
78 | } | ||
79 | |||
80 | static struct clk_ops div2_clk_ops = { | ||
81 | .recalc = div2_recalc, | ||
82 | }; | ||
83 | |||
84 | /* Divide extalc1 by two */ | ||
85 | static struct clk extalc1_div2_clk = { | ||
86 | .ops = &div2_clk_ops, | ||
87 | .parent = &sh7377_extalc1_clk, | ||
88 | }; | ||
89 | |||
90 | /* Divide extal2 by two */ | ||
91 | static struct clk extal2_div2_clk = { | ||
92 | .ops = &div2_clk_ops, | ||
93 | .parent = &sh7377_extal2_clk, | ||
94 | }; | ||
95 | |||
96 | /* Divide extal2 by four */ | ||
97 | static struct clk extal2_div4_clk = { | ||
98 | .ops = &div2_clk_ops, | ||
99 | .parent = &extal2_div2_clk, | ||
100 | }; | ||
101 | |||
102 | /* PLLC1 */ | ||
103 | static unsigned long pllc1_recalc(struct clk *clk) | ||
104 | { | ||
105 | unsigned long mult = 1; | ||
106 | |||
107 | if (__raw_readl(PLLC1CR) & (1 << 14)) | ||
108 | mult = (((__raw_readl(RTFRQCR) >> 24) & 0x3f) + 1) * 2; | ||
109 | |||
110 | return clk->parent->rate * mult; | ||
111 | } | ||
112 | |||
113 | static struct clk_ops pllc1_clk_ops = { | ||
114 | .recalc = pllc1_recalc, | ||
115 | }; | ||
116 | |||
117 | static struct clk pllc1_clk = { | ||
118 | .ops = &pllc1_clk_ops, | ||
119 | .flags = CLK_ENABLE_ON_INIT, | ||
120 | .parent = &extalc1_div2_clk, | ||
121 | }; | ||
122 | |||
123 | /* Divide PLLC1 by two */ | ||
124 | static struct clk pllc1_div2_clk = { | ||
125 | .ops = &div2_clk_ops, | ||
126 | .parent = &pllc1_clk, | ||
127 | }; | ||
128 | |||
129 | /* PLLC2 */ | ||
130 | static unsigned long pllc2_recalc(struct clk *clk) | ||
131 | { | ||
132 | unsigned long mult = 1; | ||
133 | |||
134 | if (__raw_readl(PLLC2CR) & (1 << 31)) | ||
135 | mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2; | ||
136 | |||
137 | return clk->parent->rate * mult; | ||
138 | } | ||
139 | |||
140 | static struct clk_ops pllc2_clk_ops = { | ||
141 | .recalc = pllc2_recalc, | ||
142 | }; | ||
143 | |||
144 | static struct clk pllc2_clk = { | ||
145 | .ops = &pllc2_clk_ops, | ||
146 | .flags = CLK_ENABLE_ON_INIT, | ||
147 | .parent = &extalc1_div2_clk, | ||
148 | }; | ||
149 | |||
150 | static struct clk *main_clks[] = { | ||
151 | &r_clk, | ||
152 | &sh7377_extalc1_clk, | ||
153 | &sh7377_extal2_clk, | ||
154 | &extalc1_div2_clk, | ||
155 | &extal2_div2_clk, | ||
156 | &extal2_div4_clk, | ||
157 | &pllc1_clk, | ||
158 | &pllc1_div2_clk, | ||
159 | &pllc2_clk, | ||
160 | }; | ||
161 | |||
162 | static void div4_kick(struct clk *clk) | ||
163 | { | ||
164 | unsigned long value; | ||
165 | |||
166 | /* set KICK bit in SYFRQCR to update hardware setting */ | ||
167 | value = __raw_readl(SYFRQCR); | ||
168 | value |= (1 << 31); | ||
169 | __raw_writel(value, SYFRQCR); | ||
170 | } | ||
171 | |||
172 | static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, | ||
173 | 24, 32, 36, 48, 0, 72, 96, 0 }; | ||
174 | |||
175 | static struct clk_div_mult_table div4_div_mult_table = { | ||
176 | .divisors = divisors, | ||
177 | .nr_divisors = ARRAY_SIZE(divisors), | ||
178 | }; | ||
179 | |||
180 | static struct clk_div4_table div4_table = { | ||
181 | .div_mult_table = &div4_div_mult_table, | ||
182 | .kick = div4_kick, | ||
183 | }; | ||
184 | |||
185 | enum { DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_CSIR, | ||
186 | DIV4_ZTR, DIV4_ZT, DIV4_Z, DIV4_HP, | ||
187 | DIV4_ZS, DIV4_ZB, DIV4_ZB3, DIV4_CP, DIV4_NR }; | ||
188 | |||
189 | #define DIV4(_reg, _bit, _mask, _flags) \ | ||
190 | SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags) | ||
191 | |||
192 | static struct clk div4_clks[DIV4_NR] = { | ||
193 | [DIV4_I] = DIV4(RTFRQCR, 20, 0x6fff, CLK_ENABLE_ON_INIT), | ||
194 | [DIV4_ZG] = DIV4(RTFRQCR, 16, 0x6fff, CLK_ENABLE_ON_INIT), | ||
195 | [DIV4_B] = DIV4(RTFRQCR, 8, 0x6fff, CLK_ENABLE_ON_INIT), | ||
196 | [DIV4_M1] = DIV4(RTFRQCR, 4, 0x6fff, CLK_ENABLE_ON_INIT), | ||
197 | [DIV4_CSIR] = DIV4(RTFRQCR, 0, 0x6fff, 0), | ||
198 | [DIV4_ZTR] = DIV4(SYFRQCR, 20, 0x6fff, 0), | ||
199 | [DIV4_ZT] = DIV4(SYFRQCR, 16, 0x6fff, 0), | ||
200 | [DIV4_Z] = DIV4(SYFRQCR, 12, 0x6fff, 0), | ||
201 | [DIV4_HP] = DIV4(SYFRQCR, 4, 0x6fff, 0), | ||
202 | [DIV4_ZS] = DIV4(CMFRQCR, 12, 0x6fff, 0), | ||
203 | [DIV4_ZB] = DIV4(CMFRQCR, 8, 0x6fff, 0), | ||
204 | [DIV4_ZB3] = DIV4(CMFRQCR, 4, 0x6fff, 0), | ||
205 | [DIV4_CP] = DIV4(CMFRQCR, 0, 0x6fff, 0), | ||
206 | }; | ||
207 | |||
208 | enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_FMSI, DIV6_FMSO, | ||
209 | DIV6_FSI, DIV6_SUB, DIV6_SPU, DIV6_MSU, DIV6_MVI3, DIV6_HDMI, | ||
210 | DIV6_MF1, DIV6_MF2, DIV6_DSIT, DIV6_DSIP, | ||
211 | DIV6_NR }; | ||
212 | |||
213 | static struct clk div6_clks[] = { | ||
214 | [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0), | ||
215 | [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0), | ||
216 | [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0), | ||
217 | [DIV6_FMSI] = SH_CLK_DIV6(&pllc1_div2_clk, FMSICKCR, 0), | ||
218 | [DIV6_FMSO] = SH_CLK_DIV6(&pllc1_div2_clk, FMSOCKCR, 0), | ||
219 | [DIV6_FSI] = SH_CLK_DIV6(&pllc1_div2_clk, FSICKCR, 0), | ||
220 | [DIV6_SUB] = SH_CLK_DIV6(&sh7377_extal2_clk, SUBUSBCKCR, 0), | ||
221 | [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0), | ||
222 | [DIV6_MSU] = SH_CLK_DIV6(&pllc1_div2_clk, MSUCKCR, 0), | ||
223 | [DIV6_MVI3] = SH_CLK_DIV6(&pllc1_div2_clk, MVI3CKCR, 0), | ||
224 | [DIV6_HDMI] = SH_CLK_DIV6(&pllc1_div2_clk, HDMICKCR, 0), | ||
225 | [DIV6_MF1] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK1CR, 0), | ||
226 | [DIV6_MF2] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK2CR, 0), | ||
227 | [DIV6_DSIT] = SH_CLK_DIV6(&pllc1_div2_clk, DSITCKCR, 0), | ||
228 | [DIV6_DSIP] = SH_CLK_DIV6(&pllc1_div2_clk, DSIPCKCR, 0), | ||
229 | }; | ||
230 | |||
231 | enum { MSTP001, | ||
232 | MSTP131, MSTP130, MSTP129, MSTP128, MSTP116, MSTP106, MSTP101, | ||
233 | MSTP223, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, | ||
234 | MSTP331, MSTP329, MSTP325, MSTP323, MSTP322, | ||
235 | MSTP315, MSTP314, MSTP313, | ||
236 | MSTP403, | ||
237 | MSTP_NR }; | ||
238 | |||
239 | #define MSTP(_parent, _reg, _bit, _flags) \ | ||
240 | SH_CLK_MSTP32(_parent, _reg, _bit, _flags) | ||
241 | |||
242 | static struct clk mstp_clks[] = { | ||
243 | [MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */ | ||
244 | [MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */ | ||
245 | [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */ | ||
246 | [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */ | ||
247 | [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */ | ||
248 | [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */ | ||
249 | [MSTP106] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 6, 0), /* JPU */ | ||
250 | [MSTP101] = MSTP(&div4_clks[DIV4_M1], SMSTPCR1, 1, 0), /* VPU */ | ||
251 | [MSTP223] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR2, 23, 0), /* SPU2 */ | ||
252 | [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ | ||
253 | [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ | ||
254 | [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ | ||
255 | [MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */ | ||
256 | [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */ | ||
257 | [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */ | ||
258 | [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ | ||
259 | [MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */ | ||
260 | [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ | ||
261 | [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IRDA */ | ||
262 | [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */ | ||
263 | [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */ | ||
264 | [MSTP315] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 15, 0), /* FLCTL */ | ||
265 | [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */ | ||
266 | [MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */ | ||
267 | [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ | ||
268 | }; | ||
269 | |||
270 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } | ||
271 | #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk } | ||
272 | |||
273 | static struct clk_lookup lookups[] = { | ||
274 | /* main clocks */ | ||
275 | CLKDEV_CON_ID("r_clk", &r_clk), | ||
276 | CLKDEV_CON_ID("extalc1", &sh7377_extalc1_clk), | ||
277 | CLKDEV_CON_ID("extal2", &sh7377_extal2_clk), | ||
278 | CLKDEV_CON_ID("extalc1_div2_clk", &extalc1_div2_clk), | ||
279 | CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk), | ||
280 | CLKDEV_CON_ID("extal2_div4_clk", &extal2_div4_clk), | ||
281 | CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), | ||
282 | CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), | ||
283 | CLKDEV_CON_ID("pllc2_clk", &pllc2_clk), | ||
284 | |||
285 | /* DIV4 clocks */ | ||
286 | CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), | ||
287 | CLKDEV_CON_ID("zg_clk", &div4_clks[DIV4_ZG]), | ||
288 | CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]), | ||
289 | CLKDEV_CON_ID("m1_clk", &div4_clks[DIV4_M1]), | ||
290 | CLKDEV_CON_ID("csir_clk", &div4_clks[DIV4_CSIR]), | ||
291 | CLKDEV_CON_ID("ztr_clk", &div4_clks[DIV4_ZTR]), | ||
292 | CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]), | ||
293 | CLKDEV_CON_ID("z_clk", &div4_clks[DIV4_Z]), | ||
294 | CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]), | ||
295 | CLKDEV_CON_ID("zs_clk", &div4_clks[DIV4_ZS]), | ||
296 | CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]), | ||
297 | CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]), | ||
298 | CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]), | ||
299 | |||
300 | /* DIV6 clocks */ | ||
301 | CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), | ||
302 | CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]), | ||
303 | CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), | ||
304 | CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]), | ||
305 | CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]), | ||
306 | CLKDEV_CON_ID("fsi_clk", &div6_clks[DIV6_FSI]), | ||
307 | CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), | ||
308 | CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), | ||
309 | CLKDEV_CON_ID("msu_clk", &div6_clks[DIV6_MSU]), | ||
310 | CLKDEV_CON_ID("mvi3_clk", &div6_clks[DIV6_MVI3]), | ||
311 | CLKDEV_CON_ID("hdmi_clk", &div6_clks[DIV6_HDMI]), | ||
312 | CLKDEV_CON_ID("mf1_clk", &div6_clks[DIV6_MF1]), | ||
313 | CLKDEV_CON_ID("mf2_clk", &div6_clks[DIV6_MF2]), | ||
314 | CLKDEV_CON_ID("dsit_clk", &div6_clks[DIV6_DSIT]), | ||
315 | CLKDEV_CON_ID("dsip_clk", &div6_clks[DIV6_DSIP]), | ||
316 | |||
317 | /* MSTP32 clocks */ | ||
318 | CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */ | ||
319 | CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */ | ||
320 | CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */ | ||
321 | CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */ | ||
322 | CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */ | ||
323 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */ | ||
324 | CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */ | ||
325 | CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */ | ||
326 | CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[MSTP223]), /* SPU2DSP0 */ | ||
327 | CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[MSTP223]), /* SPU2DSP1 */ | ||
328 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ | ||
329 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP206]), /* SCIFB */ | ||
330 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */ | ||
331 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */ | ||
332 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */ | ||
333 | CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */ | ||
334 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ | ||
335 | CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */ | ||
336 | CLKDEV_CON_ID("cmt1", &mstp_clks[MSTP329]), /* CMT10 */ | ||
337 | CLKDEV_DEV_ID("sh_irda", &mstp_clks[MSTP325]), /* IRDA */ | ||
338 | CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ | ||
339 | CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USBHS */ | ||
340 | CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USBHS */ | ||
341 | CLKDEV_DEV_ID("sh_flctl", &mstp_clks[MSTP315]), /* FLCTL */ | ||
342 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ | ||
343 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ | ||
344 | CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ | ||
345 | }; | ||
346 | |||
347 | void __init sh7377_clock_init(void) | ||
348 | { | ||
349 | int k, ret = 0; | ||
350 | |||
351 | for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) | ||
352 | ret = clk_register(main_clks[k]); | ||
353 | |||
354 | if (!ret) | ||
355 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); | ||
356 | |||
357 | if (!ret) | ||
358 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); | ||
359 | |||
360 | if (!ret) | ||
361 | ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); | ||
362 | |||
363 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | ||
364 | |||
365 | if (!ret) | ||
366 | clk_init(); | ||
367 | else | ||
368 | panic("failed to setup sh7377 clocks\n"); | ||
369 | } | ||
diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c new file mode 100644 index 000000000000..b7c705a213a2 --- /dev/null +++ b/arch/arm/mach-shmobile/clock.c | |||
@@ -0,0 +1,44 @@ | |||
1 | /* | ||
2 | * SH-Mobile Timer | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; version 2 of the License. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
18 | * | ||
19 | */ | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/sh_clk.h> | ||
23 | |||
24 | int __init clk_init(void) | ||
25 | { | ||
26 | /* Kick the child clocks.. */ | ||
27 | recalculate_root_clocks(); | ||
28 | |||
29 | /* Enable the necessary init clocks */ | ||
30 | clk_enable_init_clocks(); | ||
31 | |||
32 | return 0; | ||
33 | } | ||
34 | |||
35 | int __clk_get(struct clk *clk) | ||
36 | { | ||
37 | return 1; | ||
38 | } | ||
39 | EXPORT_SYMBOL(__clk_get); | ||
40 | |||
41 | void __clk_put(struct clk *clk) | ||
42 | { | ||
43 | } | ||
44 | EXPORT_SYMBOL(__clk_put); | ||
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 57903605cc51..efeef778a875 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h | |||
@@ -3,21 +3,31 @@ | |||
3 | 3 | ||
4 | extern struct sys_timer shmobile_timer; | 4 | extern struct sys_timer shmobile_timer; |
5 | extern void shmobile_setup_console(void); | 5 | extern void shmobile_setup_console(void); |
6 | struct clk; | ||
7 | extern int clk_init(void); | ||
6 | 8 | ||
7 | extern void sh7367_init_irq(void); | 9 | extern void sh7367_init_irq(void); |
8 | extern void sh7367_add_early_devices(void); | 10 | extern void sh7367_add_early_devices(void); |
9 | extern void sh7367_add_standard_devices(void); | 11 | extern void sh7367_add_standard_devices(void); |
10 | extern void sh7367_clock_init(void); | 12 | extern void sh7367_clock_init(void); |
11 | extern void sh7367_pinmux_init(void); | 13 | extern void sh7367_pinmux_init(void); |
14 | extern struct clk sh7367_extalb1_clk; | ||
15 | extern struct clk sh7367_extal2_clk; | ||
12 | 16 | ||
13 | extern void sh7377_init_irq(void); | 17 | extern void sh7377_init_irq(void); |
14 | extern void sh7377_add_early_devices(void); | 18 | extern void sh7377_add_early_devices(void); |
15 | extern void sh7377_add_standard_devices(void); | 19 | extern void sh7377_add_standard_devices(void); |
20 | extern void sh7377_clock_init(void); | ||
16 | extern void sh7377_pinmux_init(void); | 21 | extern void sh7377_pinmux_init(void); |
22 | extern struct clk sh7377_extalc1_clk; | ||
23 | extern struct clk sh7377_extal2_clk; | ||
17 | 24 | ||
18 | extern void sh7372_init_irq(void); | 25 | extern void sh7372_init_irq(void); |
19 | extern void sh7372_add_early_devices(void); | 26 | extern void sh7372_add_early_devices(void); |
20 | extern void sh7372_add_standard_devices(void); | 27 | extern void sh7372_add_standard_devices(void); |
28 | extern void sh7372_clock_init(void); | ||
21 | extern void sh7372_pinmux_init(void); | 29 | extern void sh7372_pinmux_init(void); |
30 | extern struct clk sh7372_extal1_clk; | ||
31 | extern struct clk sh7372_extal2_clk; | ||
22 | 32 | ||
23 | #endif /* __ARCH_MACH_COMMON_H */ | 33 | #endif /* __ARCH_MACH_COMMON_H */ |
diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h index 132256bb8c81..fa15b5f8a001 100644 --- a/arch/arm/mach-shmobile/include/mach/irqs.h +++ b/arch/arm/mach-shmobile/include/mach/irqs.h | |||
@@ -3,7 +3,13 @@ | |||
3 | 3 | ||
4 | #define NR_IRQS 512 | 4 | #define NR_IRQS 512 |
5 | 5 | ||
6 | /* INTCA */ | ||
6 | #define evt2irq(evt) (((evt) >> 5) - 16) | 7 | #define evt2irq(evt) (((evt) >> 5) - 16) |
7 | #define irq2evt(irq) (((irq) + 16) << 5) | 8 | #define irq2evt(irq) (((irq) + 16) << 5) |
8 | 9 | ||
10 | /* INTCS */ | ||
11 | #define INTCS_VECT_BASE 0x2200 | ||
12 | #define INTCS_VECT(n, vect) INTC_VECT((n), INTCS_VECT_BASE + (vect)) | ||
13 | #define intcs_evt2irq(evt) evt2irq(INTCS_VECT_BASE + (evt)) | ||
14 | |||
9 | #endif /* __ASM_MACH_IRQS_H */ | 15 | #endif /* __ASM_MACH_IRQS_H */ |
diff --git a/arch/arm/mach-shmobile/include/mach/memory.h b/arch/arm/mach-shmobile/include/mach/memory.h index e188183f4dce..377584e57e03 100644 --- a/arch/arm/mach-shmobile/include/mach/memory.h +++ b/arch/arm/mach-shmobile/include/mach/memory.h | |||
@@ -4,4 +4,7 @@ | |||
4 | #define PHYS_OFFSET UL(CONFIG_MEMORY_START) | 4 | #define PHYS_OFFSET UL(CONFIG_MEMORY_START) |
5 | #define MEM_SIZE UL(CONFIG_MEMORY_SIZE) | 5 | #define MEM_SIZE UL(CONFIG_MEMORY_SIZE) |
6 | 6 | ||
7 | /* DMA memory at 0xf6000000 - 0xffdfffff */ | ||
8 | #define CONSISTENT_DMA_SIZE (158 << 20) | ||
9 | |||
7 | #endif /* __ASM_MACH_MEMORY_H */ | 10 | #endif /* __ASM_MACH_MEMORY_H */ |
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h index dc34f00c56b8..33e9700ded7e 100644 --- a/arch/arm/mach-shmobile/include/mach/sh7372.h +++ b/arch/arm/mach-shmobile/include/mach/sh7372.h | |||
@@ -11,6 +11,8 @@ | |||
11 | #ifndef __ASM_SH7372_H__ | 11 | #ifndef __ASM_SH7372_H__ |
12 | #define __ASM_SH7372_H__ | 12 | #define __ASM_SH7372_H__ |
13 | 13 | ||
14 | #include <linux/sh_clk.h> | ||
15 | |||
14 | /* | 16 | /* |
15 | * Pin Function Controller: | 17 | * Pin Function Controller: |
16 | * GPIO_FN_xx - GPIO used to select pin function | 18 | * GPIO_FN_xx - GPIO used to select pin function |
@@ -431,4 +433,32 @@ enum { | |||
431 | GPIO_FN_SDENC_DV_CLKI, | 433 | GPIO_FN_SDENC_DV_CLKI, |
432 | }; | 434 | }; |
433 | 435 | ||
436 | /* DMA slave IDs */ | ||
437 | enum { | ||
438 | SHDMA_SLAVE_SCIF0_TX, | ||
439 | SHDMA_SLAVE_SCIF0_RX, | ||
440 | SHDMA_SLAVE_SCIF1_TX, | ||
441 | SHDMA_SLAVE_SCIF1_RX, | ||
442 | SHDMA_SLAVE_SCIF2_TX, | ||
443 | SHDMA_SLAVE_SCIF2_RX, | ||
444 | SHDMA_SLAVE_SCIF3_TX, | ||
445 | SHDMA_SLAVE_SCIF3_RX, | ||
446 | SHDMA_SLAVE_SCIF4_TX, | ||
447 | SHDMA_SLAVE_SCIF4_RX, | ||
448 | SHDMA_SLAVE_SCIF5_TX, | ||
449 | SHDMA_SLAVE_SCIF5_RX, | ||
450 | SHDMA_SLAVE_SCIF6_TX, | ||
451 | SHDMA_SLAVE_SCIF6_RX, | ||
452 | SHDMA_SLAVE_SDHI0_RX, | ||
453 | SHDMA_SLAVE_SDHI0_TX, | ||
454 | SHDMA_SLAVE_SDHI1_RX, | ||
455 | SHDMA_SLAVE_SDHI1_TX, | ||
456 | SHDMA_SLAVE_SDHI2_RX, | ||
457 | SHDMA_SLAVE_SDHI2_TX, | ||
458 | }; | ||
459 | |||
460 | extern struct clk dv_clki_clk; | ||
461 | extern struct clk dv_clki_div2_clk; | ||
462 | extern struct clk pllc2_clk; | ||
463 | |||
434 | #endif /* __ASM_SH7372_H__ */ | 464 | #endif /* __ASM_SH7372_H__ */ |
diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h index fb3c4f1ab252..4aecf6e3a859 100644 --- a/arch/arm/mach-shmobile/include/mach/vmalloc.h +++ b/arch/arm/mach-shmobile/include/mach/vmalloc.h | |||
@@ -1,6 +1,7 @@ | |||
1 | #ifndef __ASM_MACH_VMALLOC_H | 1 | #ifndef __ASM_MACH_VMALLOC_H |
2 | #define __ASM_MACH_VMALLOC_H | 2 | #define __ASM_MACH_VMALLOC_H |
3 | 3 | ||
4 | #define VMALLOC_END (PAGE_OFFSET + 0x24000000) | 4 | /* Vmalloc at ... - 0xe5ffffff */ |
5 | #define VMALLOC_END 0xe6000000 | ||
5 | 6 | ||
6 | #endif /* __ASM_MACH_VMALLOC_H */ | 7 | #endif /* __ASM_MACH_VMALLOC_H */ |
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c index 5ff70cadfc32..1a20c489b20d 100644 --- a/arch/arm/mach-shmobile/intc-sh7367.c +++ b/arch/arm/mach-shmobile/intc-sh7367.c | |||
@@ -75,7 +75,7 @@ enum { | |||
75 | ETM11, ARM11, USBHS, FLCTL, IIC1 | 75 | ETM11, ARM11, USBHS, FLCTL, IIC1 |
76 | }; | 76 | }; |
77 | 77 | ||
78 | static struct intc_vect intca_vectors[] = { | 78 | static struct intc_vect intca_vectors[] __initdata = { |
79 | INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220), | 79 | INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220), |
80 | INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260), | 80 | INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260), |
81 | INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0), | 81 | INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0), |
@@ -162,7 +162,7 @@ static struct intc_group intca_groups[] __initdata = { | |||
162 | INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1), | 162 | INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1), |
163 | }; | 163 | }; |
164 | 164 | ||
165 | static struct intc_mask_reg intca_mask_registers[] = { | 165 | static struct intc_mask_reg intca_mask_registers[] __initdata = { |
166 | { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */ | 166 | { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */ |
167 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | 167 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, |
168 | { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */ | 168 | { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */ |
@@ -211,7 +211,7 @@ static struct intc_mask_reg intca_mask_registers[] = { | |||
211 | MISTY, CMT3, RWDT1, RWDT0 } }, | 211 | MISTY, CMT3, RWDT1, RWDT0 } }, |
212 | }; | 212 | }; |
213 | 213 | ||
214 | static struct intc_prio_reg intca_prio_registers[] = { | 214 | static struct intc_prio_reg intca_prio_registers[] __initdata = { |
215 | { 0xe6900010, 0, 32, 4, /* INTPRI00A */ | 215 | { 0xe6900010, 0, 32, 4, /* INTPRI00A */ |
216 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | 216 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, |
217 | { 0xe6900014, 0, 32, 4, /* INTPRI10A */ | 217 | { 0xe6900014, 0, 32, 4, /* INTPRI10A */ |
@@ -263,8 +263,178 @@ static struct intc_desc intca_desc __initdata = { | |||
263 | intca_sense_registers, intca_ack_registers), | 263 | intca_sense_registers, intca_ack_registers), |
264 | }; | 264 | }; |
265 | 265 | ||
266 | enum { | ||
267 | UNUSED_INTCS = 0, | ||
268 | |||
269 | INTCS, | ||
270 | |||
271 | /* interrupt sources INTCS */ | ||
272 | VIO2_VEU0, VIO2_VEU1, VIO2_VEU2, VIO2_VEU3, | ||
273 | VIO3_VOU, | ||
274 | RTDMAC_1_DEI0, RTDMAC_1_DEI1, RTDMAC_1_DEI2, RTDMAC_1_DEI3, | ||
275 | VIO1_CEU, VIO1_BEU0, VIO1_BEU1, VIO1_BEU2, | ||
276 | VPU, | ||
277 | SGX530, | ||
278 | _2DDMAC_2DDM0, _2DDMAC_2DDM1, _2DDMAC_2DDM2, _2DDMAC_2DDM3, | ||
279 | IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2, | ||
280 | IPMMU_IPMMUB, IPMMU_IPMMUS, | ||
281 | RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR, | ||
282 | MSIOF, | ||
283 | IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0, | ||
284 | TMU_TUNI0, TMU_TUNI1, TMU_TUNI2, | ||
285 | CMT, | ||
286 | TSIF, | ||
287 | IPMMUI, | ||
288 | MVI3, | ||
289 | ICB, | ||
290 | PEP, | ||
291 | ASA, | ||
292 | BEM, | ||
293 | VE2HO, | ||
294 | HQE, | ||
295 | JPEG, | ||
296 | LCDC, | ||
297 | |||
298 | /* interrupt groups INTCS */ | ||
299 | _2DDMAC, RTDMAC_1, RTDMAC_2, VEU, BEU, IIC0, IPMMU, IIC2, | ||
300 | }; | ||
301 | |||
302 | static struct intc_vect intcs_vectors[] = { | ||
303 | INTCS_VECT(VIO2_VEU0, 0x700), INTCS_VECT(VIO2_VEU1, 0x720), | ||
304 | INTCS_VECT(VIO2_VEU2, 0x740), INTCS_VECT(VIO2_VEU3, 0x760), | ||
305 | INTCS_VECT(VIO3_VOU, 0x780), | ||
306 | INTCS_VECT(RTDMAC_1_DEI0, 0x800), INTCS_VECT(RTDMAC_1_DEI1, 0x820), | ||
307 | INTCS_VECT(RTDMAC_1_DEI2, 0x840), INTCS_VECT(RTDMAC_1_DEI3, 0x860), | ||
308 | INTCS_VECT(VIO1_CEU, 0x880), INTCS_VECT(VIO1_BEU0, 0x8a0), | ||
309 | INTCS_VECT(VIO1_BEU1, 0x8c0), INTCS_VECT(VIO1_BEU2, 0x8e0), | ||
310 | INTCS_VECT(VPU, 0x980), | ||
311 | INTCS_VECT(SGX530, 0x9e0), | ||
312 | INTCS_VECT(_2DDMAC_2DDM0, 0xa00), INTCS_VECT(_2DDMAC_2DDM1, 0xa20), | ||
313 | INTCS_VECT(_2DDMAC_2DDM2, 0xa40), INTCS_VECT(_2DDMAC_2DDM3, 0xa60), | ||
314 | INTCS_VECT(IIC2_ALI2, 0xa80), INTCS_VECT(IIC2_TACKI2, 0xaa0), | ||
315 | INTCS_VECT(IIC2_WAITI2, 0xac0), INTCS_VECT(IIC2_DTEI2, 0xae0), | ||
316 | INTCS_VECT(IPMMU_IPMMUB, 0xb20), INTCS_VECT(IPMMU_IPMMUS, 0xb60), | ||
317 | INTCS_VECT(RTDMAC_2_DEI4, 0xb80), INTCS_VECT(RTDMAC_2_DEI5, 0xba0), | ||
318 | INTCS_VECT(RTDMAC_2_DADERR, 0xbc0), | ||
319 | INTCS_VECT(MSIOF, 0xd20), | ||
320 | INTCS_VECT(IIC0_ALI0, 0xe00), INTCS_VECT(IIC0_TACKI0, 0xe20), | ||
321 | INTCS_VECT(IIC0_WAITI0, 0xe40), INTCS_VECT(IIC0_DTEI0, 0xe60), | ||
322 | INTCS_VECT(TMU_TUNI0, 0xe80), INTCS_VECT(TMU_TUNI1, 0xea0), | ||
323 | INTCS_VECT(TMU_TUNI2, 0xec0), | ||
324 | INTCS_VECT(CMT, 0xf00), | ||
325 | INTCS_VECT(TSIF, 0xf20), | ||
326 | INTCS_VECT(IPMMUI, 0xf60), | ||
327 | INTCS_VECT(MVI3, 0x420), | ||
328 | INTCS_VECT(ICB, 0x480), | ||
329 | INTCS_VECT(PEP, 0x4a0), | ||
330 | INTCS_VECT(ASA, 0x4c0), | ||
331 | INTCS_VECT(BEM, 0x4e0), | ||
332 | INTCS_VECT(VE2HO, 0x520), | ||
333 | INTCS_VECT(HQE, 0x540), | ||
334 | INTCS_VECT(JPEG, 0x560), | ||
335 | INTCS_VECT(LCDC, 0x580), | ||
336 | |||
337 | INTC_VECT(INTCS, 0xf80), | ||
338 | }; | ||
339 | |||
340 | static struct intc_group intcs_groups[] __initdata = { | ||
341 | INTC_GROUP(_2DDMAC, _2DDMAC_2DDM0, _2DDMAC_2DDM1, | ||
342 | _2DDMAC_2DDM2, _2DDMAC_2DDM3), | ||
343 | INTC_GROUP(RTDMAC_1, RTDMAC_1_DEI0, RTDMAC_1_DEI1, | ||
344 | RTDMAC_1_DEI2, RTDMAC_1_DEI3), | ||
345 | INTC_GROUP(RTDMAC_2, RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR), | ||
346 | INTC_GROUP(VEU, VIO2_VEU0, VIO2_VEU1, VIO2_VEU2, VIO2_VEU3), | ||
347 | INTC_GROUP(BEU, VIO1_BEU0, VIO1_BEU1, VIO1_BEU2), | ||
348 | INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0), | ||
349 | INTC_GROUP(IPMMU, IPMMU_IPMMUS, IPMMU_IPMMUB), | ||
350 | INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2), | ||
351 | }; | ||
352 | |||
353 | static struct intc_mask_reg intcs_mask_registers[] = { | ||
354 | { 0xffd20184, 0xffd201c4, 8, /* IMR1SA / IMCR1SA */ | ||
355 | { VIO1_BEU2, VIO1_BEU1, VIO1_BEU0, VIO1_CEU, | ||
356 | VIO2_VEU3, VIO2_VEU2, VIO2_VEU1, VIO2_VEU0 } }, | ||
357 | { 0xffd20188, 0xffd201c8, 8, /* IMR2SA / IMCR2SA */ | ||
358 | { VIO3_VOU, 0, VE2HO, VPU, | ||
359 | 0, 0, 0, 0 } }, | ||
360 | { 0xffd2018c, 0xffd201cc, 8, /* IMR3SA / IMCR3SA */ | ||
361 | { _2DDMAC_2DDM3, _2DDMAC_2DDM2, _2DDMAC_2DDM1, _2DDMAC_2DDM0, | ||
362 | BEM, ASA, PEP, ICB } }, | ||
363 | { 0xffd20190, 0xffd201d0, 8, /* IMR4SA / IMCR4SA */ | ||
364 | { 0, 0, MVI3, 0, | ||
365 | JPEG, HQE, 0, LCDC } }, | ||
366 | { 0xffd20194, 0xffd201d4, 8, /* IMR5SA / IMCR5SA */ | ||
367 | { 0, RTDMAC_2_DADERR, RTDMAC_2_DEI5, RTDMAC_2_DEI4, | ||
368 | RTDMAC_1_DEI3, RTDMAC_1_DEI2, RTDMAC_1_DEI1, RTDMAC_1_DEI0 } }, | ||
369 | { 0xffd20198, 0xffd201d8, 8, /* IMR6SA / IMCR6SA */ | ||
370 | { 0, 0, MSIOF, 0, | ||
371 | SGX530, 0, 0, 0 } }, | ||
372 | { 0xffd2019c, 0xffd201dc, 8, /* IMR7SA / IMCR7SA */ | ||
373 | { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0, | ||
374 | 0, 0, 0, 0 } }, | ||
375 | { 0xffd201a4, 0xffd201e4, 8, /* IMR9SA / IMCR9SA */ | ||
376 | { 0, 0, 0, CMT, | ||
377 | IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } }, | ||
378 | { 0xffd201a8, 0xffd201e8, 8, /* IMR10SA / IMCR10SA */ | ||
379 | { IPMMU_IPMMUS, 0, IPMMU_IPMMUB, 0, | ||
380 | 0, 0, 0, 0 } }, | ||
381 | { 0xffd201ac, 0xffd201ec, 8, /* IMR11SA / IMCR11SA */ | ||
382 | { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0, | ||
383 | 0, 0, IPMMUI, TSIF } }, | ||
384 | { 0xffd20104, 0, 16, /* INTAMASK */ | ||
385 | { 0, 0, 0, 0, 0, 0, 0, 0, | ||
386 | 0, 0, 0, 0, 0, 0, 0, INTCS } }, | ||
387 | }; | ||
388 | |||
389 | /* Priority is needed for INTCA to receive the INTCS interrupt */ | ||
390 | static struct intc_prio_reg intcs_prio_registers[] = { | ||
391 | { 0xffd20000, 0, 16, 4, /* IPRAS */ { 0, MVI3, _2DDMAC, ICB } }, | ||
392 | { 0xffd20004, 0, 16, 4, /* IPRBS */ { JPEG, LCDC, 0, 0 } }, | ||
393 | { 0xffd20008, 0, 16, 4, /* IPRCS */ { BBIF2, 0, 0, 0 } }, | ||
394 | { 0xffd20010, 0, 16, 4, /* IPRES */ { RTDMAC_1, VIO1_CEU, 0, VPU } }, | ||
395 | { 0xffd20014, 0, 16, 4, /* IPRFS */ { 0, RTDMAC_2, 0, CMT } }, | ||
396 | { 0xffd20018, 0, 16, 4, /* IPRGS */ { TMU_TUNI0, TMU_TUNI1, | ||
397 | TMU_TUNI2, 0 } }, | ||
398 | { 0xffd2001c, 0, 16, 4, /* IPRHS */ { 0, VIO3_VOU, VEU, BEU } }, | ||
399 | { 0xffd20020, 0, 16, 4, /* IPRIS */ { 0, MSIOF, TSIF, IIC0 } }, | ||
400 | { 0xffd20024, 0, 16, 4, /* IPRJS */ { 0, SGX530, 0, 0 } }, | ||
401 | { 0xffd20028, 0, 16, 4, /* IPRKS */ { BEM, ASA, IPMMUI, PEP } }, | ||
402 | { 0xffd2002c, 0, 16, 4, /* IPRLS */ { IPMMU, 0, VE2HO, HQE } }, | ||
403 | { 0xffd20030, 0, 16, 4, /* IPRMS */ { IIC2, 0, 0, 0 } }, | ||
404 | }; | ||
405 | |||
406 | static struct resource intcs_resources[] __initdata = { | ||
407 | [0] = { | ||
408 | .start = 0xffd20000, | ||
409 | .end = 0xffd2ffff, | ||
410 | .flags = IORESOURCE_MEM, | ||
411 | } | ||
412 | }; | ||
413 | |||
414 | static struct intc_desc intcs_desc __initdata = { | ||
415 | .name = "sh7367-intcs", | ||
416 | .resource = intcs_resources, | ||
417 | .num_resources = ARRAY_SIZE(intcs_resources), | ||
418 | .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers, | ||
419 | intcs_prio_registers, NULL, NULL), | ||
420 | }; | ||
421 | |||
422 | static void intcs_demux(unsigned int irq, struct irq_desc *desc) | ||
423 | { | ||
424 | void __iomem *reg = (void *)get_irq_data(irq); | ||
425 | unsigned int evtcodeas = ioread32(reg); | ||
426 | |||
427 | generic_handle_irq(intcs_evt2irq(evtcodeas)); | ||
428 | } | ||
429 | |||
266 | void __init sh7367_init_irq(void) | 430 | void __init sh7367_init_irq(void) |
267 | { | 431 | { |
268 | /* INTCA */ | 432 | void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); |
433 | |||
269 | register_intc_controller(&intca_desc); | 434 | register_intc_controller(&intca_desc); |
435 | register_intc_controller(&intcs_desc); | ||
436 | |||
437 | /* demux using INTEVTSA */ | ||
438 | set_irq_data(evt2irq(0xf80), (void *)intevtsa); | ||
439 | set_irq_chained_handler(evt2irq(0xf80), intcs_demux); | ||
270 | } | 440 | } |
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c index 3ce9d9bd5899..e3551b56cd03 100644 --- a/arch/arm/mach-shmobile/intc-sh7372.c +++ b/arch/arm/mach-shmobile/intc-sh7372.c | |||
@@ -319,17 +319,17 @@ static struct intc_prio_reg intca_prio_registers[] __initdata = { | |||
319 | { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } }, | 319 | { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } }, |
320 | { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S, | 320 | { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S, |
321 | CMT14, CMT15 } }, | 321 | CMT14, CMT15 } }, |
322 | { 0xe694003c, 0, 16, 4, /* IPRPA3 */ { 0, 0, | 322 | { 0xe695003c, 0, 16, 4, /* IPRPA3 */ { 0, 0, |
323 | MMC_MMC_ERR, MMC_MMC_NOR } }, | 323 | MMC_MMC_ERR, MMC_MMC_NOR } }, |
324 | { 0xe6940040, 0, 16, 4, /* IPRQA3 */ { IIC4_ALI4, IIC4_TACKI4, | 324 | { 0xe6950040, 0, 16, 4, /* IPRQA3 */ { IIC4_ALI4, IIC4_TACKI4, |
325 | IIC4_WAITI4, IIC4_DTEI4 } }, | 325 | IIC4_WAITI4, IIC4_DTEI4 } }, |
326 | { 0xe6940044, 0, 16, 4, /* IPRRA3 */ { IIC3_ALI3, IIC3_TACKI3, | 326 | { 0xe6950044, 0, 16, 4, /* IPRRA3 */ { IIC3_ALI3, IIC3_TACKI3, |
327 | IIC3_WAITI3, IIC3_DTEI3 } }, | 327 | IIC3_WAITI3, IIC3_DTEI3 } }, |
328 | { 0xe6940048, 0, 16, 4, /* IPRSA3 */ { 0/*ERI*/, 0/*RXI*/, | 328 | { 0xe6950048, 0, 16, 4, /* IPRSA3 */ { 0/*ERI*/, 0/*RXI*/, |
329 | 0/*TXI*/, 0/*TEI*/} }, | 329 | 0/*TXI*/, 0/*TEI*/} }, |
330 | { 0xe694004c, 0, 16, 4, /* IPRTA3 */ { USB0_USB0I1, USB0_USB0I0, | 330 | { 0xe695004c, 0, 16, 4, /* IPRTA3 */ { USB0_USB0I1, USB0_USB0I0, |
331 | USB1_USB1I1, USB1_USB1I0 } }, | 331 | USB1_USB1I1, USB1_USB1I0 } }, |
332 | { 0xe6940050, 0, 16, 4, /* IPRUA3 */ { USBHSDMAC1_USHDMI, 0, 0, 0 } }, | 332 | { 0xe6950050, 0, 16, 4, /* IPRUA3 */ { USBHSDMAC1_USHDMI, 0, 0, 0 } }, |
333 | }; | 333 | }; |
334 | 334 | ||
335 | static struct intc_sense_reg intca_sense_registers[] __initdata = { | 335 | static struct intc_sense_reg intca_sense_registers[] __initdata = { |
@@ -363,7 +363,227 @@ static struct intc_desc intca_desc __initdata = { | |||
363 | intca_sense_registers, intca_ack_registers), | 363 | intca_sense_registers, intca_ack_registers), |
364 | }; | 364 | }; |
365 | 365 | ||
366 | enum { | ||
367 | UNUSED_INTCS = 0, | ||
368 | |||
369 | INTCS, | ||
370 | |||
371 | /* interrupt sources INTCS */ | ||
372 | VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3, | ||
373 | RTDMAC_1_DEI0, RTDMAC_1_DEI1, RTDMAC_1_DEI2, RTDMAC_1_DEI3, | ||
374 | CEU, BEU_BEU0, BEU_BEU1, BEU_BEU2, | ||
375 | VPU, | ||
376 | TSIF1, | ||
377 | _3DG_SGX530, | ||
378 | _2DDMAC, | ||
379 | IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2, | ||
380 | IPMMU_IPMMUR, IPMMU_IPMMUR2, | ||
381 | RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR, | ||
382 | MSIOF, | ||
383 | IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0, | ||
384 | TMU_TUNI0, TMU_TUNI1, TMU_TUNI2, | ||
385 | CMT0, | ||
386 | TSIF0, | ||
387 | LMB, | ||
388 | CTI, | ||
389 | ICB, | ||
390 | JPU_JPEG, | ||
391 | LCDC, | ||
392 | LCRC, | ||
393 | RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3, | ||
394 | RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR, | ||
395 | ISP, | ||
396 | LCDC1, | ||
397 | CSIRX, | ||
398 | DSITX_DSITX0, | ||
399 | DSITX_DSITX1, | ||
400 | TMU1_TUNI0, TMU1_TUNI1, TMU1_TUNI2, | ||
401 | CMT4, | ||
402 | DSITX1_DSITX1_0, | ||
403 | DSITX1_DSITX1_1, | ||
404 | CPORTS2R, | ||
405 | JPU6E, | ||
406 | |||
407 | /* interrupt groups INTCS */ | ||
408 | RTDMAC_1, RTDMAC_2, VEU, BEU, IIC0, IPMMU, IIC2, | ||
409 | RTDMAC2_1, RTDMAC2_2, TMU1, DSITX, | ||
410 | }; | ||
411 | |||
412 | static struct intc_vect intcs_vectors[] = { | ||
413 | INTCS_VECT(VEU_VEU0, 0x700), INTCS_VECT(VEU_VEU1, 0x720), | ||
414 | INTCS_VECT(VEU_VEU2, 0x740), INTCS_VECT(VEU_VEU3, 0x760), | ||
415 | INTCS_VECT(RTDMAC_1_DEI0, 0x800), INTCS_VECT(RTDMAC_1_DEI1, 0x820), | ||
416 | INTCS_VECT(RTDMAC_1_DEI2, 0x840), INTCS_VECT(RTDMAC_1_DEI3, 0x860), | ||
417 | INTCS_VECT(CEU, 0x880), INTCS_VECT(BEU_BEU0, 0x8a0), | ||
418 | INTCS_VECT(BEU_BEU1, 0x8c0), INTCS_VECT(BEU_BEU2, 0x8e0), | ||
419 | INTCS_VECT(VPU, 0x980), | ||
420 | INTCS_VECT(TSIF1, 0x9a0), | ||
421 | INTCS_VECT(_3DG_SGX530, 0x9e0), | ||
422 | INTCS_VECT(_2DDMAC, 0xa00), | ||
423 | INTCS_VECT(IIC2_ALI2, 0xa80), INTCS_VECT(IIC2_TACKI2, 0xaa0), | ||
424 | INTCS_VECT(IIC2_WAITI2, 0xac0), INTCS_VECT(IIC2_DTEI2, 0xae0), | ||
425 | INTCS_VECT(IPMMU_IPMMUR, 0xb00), INTCS_VECT(IPMMU_IPMMUR2, 0xb20), | ||
426 | INTCS_VECT(RTDMAC_2_DEI4, 0xb80), INTCS_VECT(RTDMAC_2_DEI5, 0xba0), | ||
427 | INTCS_VECT(RTDMAC_2_DADERR, 0xbc0), | ||
428 | INTCS_VECT(IIC0_ALI0, 0xe00), INTCS_VECT(IIC0_TACKI0, 0xe20), | ||
429 | INTCS_VECT(IIC0_WAITI0, 0xe40), INTCS_VECT(IIC0_DTEI0, 0xe60), | ||
430 | INTCS_VECT(TMU_TUNI0, 0xe80), INTCS_VECT(TMU_TUNI1, 0xea0), | ||
431 | INTCS_VECT(TMU_TUNI2, 0xec0), | ||
432 | INTCS_VECT(CMT0, 0xf00), | ||
433 | INTCS_VECT(TSIF0, 0xf20), | ||
434 | INTCS_VECT(LMB, 0xf60), | ||
435 | INTCS_VECT(CTI, 0x400), | ||
436 | INTCS_VECT(ICB, 0x480), | ||
437 | INTCS_VECT(JPU_JPEG, 0x560), | ||
438 | INTCS_VECT(LCDC, 0x580), | ||
439 | INTCS_VECT(LCRC, 0x5a0), | ||
440 | INTCS_VECT(RTDMAC2_1_DEI0, 0x1300), INTCS_VECT(RTDMAC2_1_DEI1, 0x1320), | ||
441 | INTCS_VECT(RTDMAC2_1_DEI2, 0x1340), INTCS_VECT(RTDMAC2_1_DEI3, 0x1360), | ||
442 | INTCS_VECT(RTDMAC2_2_DEI4, 0x1380), INTCS_VECT(RTDMAC2_2_DEI5, 0x13a0), | ||
443 | INTCS_VECT(RTDMAC2_2_DADERR, 0x13c0), | ||
444 | INTCS_VECT(ISP, 0x1720), | ||
445 | INTCS_VECT(LCDC1, 0x1780), | ||
446 | INTCS_VECT(CSIRX, 0x17a0), | ||
447 | INTCS_VECT(DSITX_DSITX0, 0x17c0), | ||
448 | INTCS_VECT(DSITX_DSITX1, 0x17e0), | ||
449 | INTCS_VECT(TMU1_TUNI0, 0x1900), INTCS_VECT(TMU1_TUNI1, 0x1920), | ||
450 | INTCS_VECT(TMU1_TUNI2, 0x1940), | ||
451 | INTCS_VECT(CMT4, 0x1980), | ||
452 | INTCS_VECT(DSITX1_DSITX1_0, 0x19a0), | ||
453 | INTCS_VECT(DSITX1_DSITX1_1, 0x19c0), | ||
454 | INTCS_VECT(CPORTS2R, 0x1a20), | ||
455 | INTCS_VECT(JPU6E, 0x1a80), | ||
456 | |||
457 | INTC_VECT(INTCS, 0xf80), | ||
458 | }; | ||
459 | |||
460 | static struct intc_group intcs_groups[] __initdata = { | ||
461 | INTC_GROUP(RTDMAC_1, RTDMAC_1_DEI0, RTDMAC_1_DEI1, | ||
462 | RTDMAC_1_DEI2, RTDMAC_1_DEI3), | ||
463 | INTC_GROUP(RTDMAC_2, RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR), | ||
464 | INTC_GROUP(VEU, VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3), | ||
465 | INTC_GROUP(BEU, BEU_BEU0, BEU_BEU1, BEU_BEU2), | ||
466 | INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0), | ||
467 | INTC_GROUP(IPMMU, IPMMU_IPMMUR, IPMMU_IPMMUR2), | ||
468 | INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2), | ||
469 | INTC_GROUP(RTDMAC2_1, RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, | ||
470 | RTDMAC2_1_DEI2, RTDMAC2_1_DEI3), | ||
471 | INTC_GROUP(RTDMAC2_2, RTDMAC2_2_DEI4, | ||
472 | RTDMAC2_2_DEI5, RTDMAC2_2_DADERR), | ||
473 | INTC_GROUP(TMU1, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0), | ||
474 | INTC_GROUP(DSITX, DSITX_DSITX0, DSITX_DSITX1), | ||
475 | }; | ||
476 | |||
477 | static struct intc_mask_reg intcs_mask_registers[] = { | ||
478 | { 0xffd20184, 0xffd201c4, 8, /* IMR1SA / IMCR1SA */ | ||
479 | { BEU_BEU2, BEU_BEU1, BEU_BEU0, CEU, | ||
480 | VEU_VEU3, VEU_VEU2, VEU_VEU1, VEU_VEU0 } }, | ||
481 | { 0xffd20188, 0xffd201c8, 8, /* IMR2SA / IMCR2SA */ | ||
482 | { 0, 0, 0, VPU, | ||
483 | 0, 0, 0, 0 } }, | ||
484 | { 0xffd2018c, 0xffd201cc, 8, /* IMR3SA / IMCR3SA */ | ||
485 | { 0, 0, 0, _2DDMAC, | ||
486 | 0, 0, 0, ICB } }, | ||
487 | { 0xffd20190, 0xffd201d0, 8, /* IMR4SA / IMCR4SA */ | ||
488 | { 0, 0, 0, CTI, | ||
489 | JPU_JPEG, 0, LCRC, LCDC } }, | ||
490 | { 0xffd20194, 0xffd201d4, 8, /* IMR5SA / IMCR5SA */ | ||
491 | { 0, RTDMAC_2_DADERR, RTDMAC_2_DEI5, RTDMAC_2_DEI4, | ||
492 | RTDMAC_1_DEI3, RTDMAC_1_DEI2, RTDMAC_1_DEI1, RTDMAC_1_DEI0 } }, | ||
493 | { 0xffd20198, 0xffd201d8, 8, /* IMR6SA / IMCR6SA */ | ||
494 | { 0, 0, MSIOF, 0, | ||
495 | _3DG_SGX530, 0, 0, 0 } }, | ||
496 | { 0xffd2019c, 0xffd201dc, 8, /* IMR7SA / IMCR7SA */ | ||
497 | { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0, | ||
498 | 0, 0, 0, 0 } }, | ||
499 | { 0xffd201a4, 0xffd201e4, 8, /* IMR9SA / IMCR9SA */ | ||
500 | { 0, 0, 0, CMT0, | ||
501 | IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } }, | ||
502 | { 0xffd201a8, 0xffd201e8, 8, /* IMR10SA / IMCR10SA */ | ||
503 | { 0, 0, IPMMU_IPMMUR2, IPMMU_IPMMUR, | ||
504 | 0, 0, 0, 0 } }, | ||
505 | { 0xffd201ac, 0xffd201ec, 8, /* IMR11SA / IMCR11SA */ | ||
506 | { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0, | ||
507 | 0, TSIF1, LMB, TSIF0 } }, | ||
508 | { 0xffd50180, 0xffd501c0, 8, /* IMR0SA3 / IMCR0SA3 */ | ||
509 | { 0, RTDMAC2_2_DADERR, RTDMAC2_2_DEI5, RTDMAC2_2_DEI4, | ||
510 | RTDMAC2_1_DEI3, RTDMAC2_1_DEI2, RTDMAC2_1_DEI1, RTDMAC2_1_DEI0 } }, | ||
511 | { 0xffd50190, 0xffd501d0, 8, /* IMR4SA3 / IMCR4SA3 */ | ||
512 | { 0, ISP, 0, 0, | ||
513 | LCDC1, CSIRX, DSITX_DSITX0, DSITX_DSITX1 } }, | ||
514 | { 0xffd50198, 0xffd501d8, 8, /* IMR6SA3 / IMCR6SA3 */ | ||
515 | { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, | ||
516 | CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, 0 } }, | ||
517 | { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */ | ||
518 | { 0, CPORTS2R, 0, 0, | ||
519 | JPU6E, 0, 0, 0 } }, | ||
520 | { 0xffd20104, 0, 16, /* INTAMASK */ | ||
521 | { 0, 0, 0, 0, 0, 0, 0, 0, | ||
522 | 0, 0, 0, 0, 0, 0, 0, INTCS } }, | ||
523 | }; | ||
524 | |||
525 | /* Priority is needed for INTCA to receive the INTCS interrupt */ | ||
526 | static struct intc_prio_reg intcs_prio_registers[] = { | ||
527 | { 0xffd20000, 0, 16, 4, /* IPRAS */ { CTI, 0, _2DDMAC, ICB } }, | ||
528 | { 0xffd20004, 0, 16, 4, /* IPRBS */ { JPU_JPEG, LCDC, 0, LCRC } }, | ||
529 | { 0xffd20010, 0, 16, 4, /* IPRES */ { RTDMAC_1, CEU, 0, VPU } }, | ||
530 | { 0xffd20014, 0, 16, 4, /* IPRFS */ { 0, RTDMAC_2, 0, CMT0 } }, | ||
531 | { 0xffd20018, 0, 16, 4, /* IPRGS */ { TMU_TUNI0, TMU_TUNI1, | ||
532 | TMU_TUNI2, TSIF1 } }, | ||
533 | { 0xffd2001c, 0, 16, 4, /* IPRHS */ { 0, 0, VEU, BEU } }, | ||
534 | { 0xffd20020, 0, 16, 4, /* IPRIS */ { 0, MSIOF, TSIF0, IIC0 } }, | ||
535 | { 0xffd20024, 0, 16, 4, /* IPRJS */ { 0, _3DG_SGX530, 0, 0 } }, | ||
536 | { 0xffd20028, 0, 16, 4, /* IPRKS */ { 0, 0, LMB, 0 } }, | ||
537 | { 0xffd2002c, 0, 16, 4, /* IPRLS */ { IPMMU, 0, 0, 0 } }, | ||
538 | { 0xffd20030, 0, 16, 4, /* IPRMS */ { IIC2, 0, 0, 0 } }, | ||
539 | { 0xffd50000, 0, 16, 4, /* IPRAS3 */ { RTDMAC2_1, 0, 0, 0 } }, | ||
540 | { 0xffd50004, 0, 16, 4, /* IPRBS3 */ { RTDMAC2_2, 0, 0, 0 } }, | ||
541 | { 0xffd50020, 0, 16, 4, /* IPRIS3 */ { 0, ISP, 0, 0 } }, | ||
542 | { 0xffd50024, 0, 16, 4, /* IPRJS3 */ { LCDC1, CSIRX, DSITX, 0 } }, | ||
543 | { 0xffd50030, 0, 16, 4, /* IPRMS3 */ { TMU1, 0, 0, 0 } }, | ||
544 | { 0xffd50034, 0, 16, 4, /* IPRNS3 */ { CMT4, DSITX1_DSITX1_0, | ||
545 | DSITX1_DSITX1_1, 0 } }, | ||
546 | { 0xffd50038, 0, 16, 4, /* IPROS3 */ { 0, CPORTS2R, 0, 0 } }, | ||
547 | { 0xffd5003c, 0, 16, 4, /* IPRPS3 */ { JPU6E, 0, 0, 0 } }, | ||
548 | }; | ||
549 | |||
550 | static struct resource intcs_resources[] __initdata = { | ||
551 | [0] = { | ||
552 | .start = 0xffd20000, | ||
553 | .end = 0xffd201ff, | ||
554 | .flags = IORESOURCE_MEM, | ||
555 | }, | ||
556 | [1] = { | ||
557 | .start = 0xffd50000, | ||
558 | .end = 0xffd501ff, | ||
559 | .flags = IORESOURCE_MEM, | ||
560 | } | ||
561 | }; | ||
562 | |||
563 | static struct intc_desc intcs_desc __initdata = { | ||
564 | .name = "sh7372-intcs", | ||
565 | .resource = intcs_resources, | ||
566 | .num_resources = ARRAY_SIZE(intcs_resources), | ||
567 | .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers, | ||
568 | intcs_prio_registers, NULL, NULL), | ||
569 | }; | ||
570 | |||
571 | static void intcs_demux(unsigned int irq, struct irq_desc *desc) | ||
572 | { | ||
573 | void __iomem *reg = (void *)get_irq_data(irq); | ||
574 | unsigned int evtcodeas = ioread32(reg); | ||
575 | |||
576 | generic_handle_irq(intcs_evt2irq(evtcodeas)); | ||
577 | } | ||
578 | |||
366 | void __init sh7372_init_irq(void) | 579 | void __init sh7372_init_irq(void) |
367 | { | 580 | { |
581 | void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); | ||
582 | |||
368 | register_intc_controller(&intca_desc); | 583 | register_intc_controller(&intca_desc); |
584 | register_intc_controller(&intcs_desc); | ||
585 | |||
586 | /* demux using INTEVTSA */ | ||
587 | set_irq_data(evt2irq(0xf80), (void *)intevtsa); | ||
588 | set_irq_chained_handler(evt2irq(0xf80), intcs_demux); | ||
369 | } | 589 | } |
diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c index 5c781e2d1897..2cdeb8ccd821 100644 --- a/arch/arm/mach-shmobile/intc-sh7377.c +++ b/arch/arm/mach-shmobile/intc-sh7377.c | |||
@@ -90,7 +90,7 @@ enum { | |||
90 | ICUSB, ICUDMC | 90 | ICUSB, ICUDMC |
91 | }; | 91 | }; |
92 | 92 | ||
93 | static struct intc_vect intca_vectors[] = { | 93 | static struct intc_vect intca_vectors[] __initdata = { |
94 | INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220), | 94 | INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220), |
95 | INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260), | 95 | INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260), |
96 | INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0), | 96 | INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0), |
@@ -202,7 +202,7 @@ static struct intc_group intca_groups[] __initdata = { | |||
202 | INTC_GROUP(ICUDMC, ICUDMC_ICUDMC1, ICUDMC_ICUDMC2), | 202 | INTC_GROUP(ICUDMC, ICUDMC_ICUDMC1, ICUDMC_ICUDMC2), |
203 | }; | 203 | }; |
204 | 204 | ||
205 | static struct intc_mask_reg intca_mask_registers[] = { | 205 | static struct intc_mask_reg intca_mask_registers[] __initdata = { |
206 | { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */ | 206 | { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */ |
207 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | 207 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, |
208 | { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */ | 208 | { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */ |
@@ -272,7 +272,7 @@ static struct intc_mask_reg intca_mask_registers[] = { | |||
272 | SCIFA6, 0, 0, 0 } }, | 272 | SCIFA6, 0, 0, 0 } }, |
273 | }; | 273 | }; |
274 | 274 | ||
275 | static struct intc_prio_reg intca_prio_registers[] = { | 275 | static struct intc_prio_reg intca_prio_registers[] __initdata = { |
276 | { 0xe6900010, 0, 32, 4, /* INTPRI00A */ | 276 | { 0xe6900010, 0, 32, 4, /* INTPRI00A */ |
277 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | 277 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, |
278 | { 0xe6900014, 0, 32, 4, /* INTPRI10A */ | 278 | { 0xe6900014, 0, 32, 4, /* INTPRI10A */ |
@@ -346,7 +346,301 @@ static struct intc_desc intca_desc __initdata = { | |||
346 | intca_sense_registers, intca_ack_registers), | 346 | intca_sense_registers, intca_ack_registers), |
347 | }; | 347 | }; |
348 | 348 | ||
349 | /* this macro ignore entry which is also in INTCA */ | ||
350 | #define __IGNORE(a...) | ||
351 | #define __IGNORE0(a...) 0 | ||
352 | |||
353 | enum { | ||
354 | UNUSED_INTCS = 0, | ||
355 | |||
356 | INTCS, | ||
357 | |||
358 | /* interrupt sources INTCS */ | ||
359 | VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3, | ||
360 | RTDMAC1_1_DEI0, RTDMAC1_1_DEI1, RTDMAC1_1_DEI2, RTDMAC1_1_DEI3, | ||
361 | CEU, | ||
362 | BEU_BEU0, BEU_BEU1, BEU_BEU2, | ||
363 | __IGNORE(MFI) | ||
364 | __IGNORE(BBIF2) | ||
365 | VPU, | ||
366 | TSIF1, | ||
367 | __IGNORE(SGX540) | ||
368 | _2DDMAC, | ||
369 | IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2, | ||
370 | IPMMU_IPMMUR, IPMMU_IPMMUR2, | ||
371 | RTDMAC1_2_DEI4, RTDMAC1_2_DEI5, RTDMAC1_2_DADERR, | ||
372 | __IGNORE(KEYSC) | ||
373 | __IGNORE(TTI20) | ||
374 | __IGNORE(MSIOF) | ||
375 | IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0, | ||
376 | TMU_TUNI0, TMU_TUNI1, TMU_TUNI2, | ||
377 | CMT0, | ||
378 | TSIF0, | ||
379 | __IGNORE(CMT2) | ||
380 | LMB, | ||
381 | __IGNORE(MSUG) | ||
382 | __IGNORE(MSU_MSU, MSU_MSU2) | ||
383 | __IGNORE(CTI) | ||
384 | MVI3, | ||
385 | __IGNORE(RWDT0) | ||
386 | __IGNORE(RWDT1) | ||
387 | ICB, | ||
388 | PEP, | ||
389 | ASA, | ||
390 | __IGNORE(_2DG) | ||
391 | HQE, | ||
392 | JPU, | ||
393 | LCDC0, | ||
394 | __IGNORE(LCRC) | ||
395 | RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3, | ||
396 | RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR, | ||
397 | FRC, | ||
398 | LCDC1, | ||
399 | CSIRX, | ||
400 | DSITX_DSITX0, DSITX_DSITX1, | ||
401 | __IGNORE(SPU2_SPU0, SPU2_SPU1) | ||
402 | __IGNORE(FSI) | ||
403 | __IGNORE(FMSI) | ||
404 | __IGNORE(SCUV) | ||
405 | TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12, | ||
406 | TSIF2, | ||
407 | CMT4, | ||
408 | __IGNORE(MFIS2) | ||
409 | CPORTS2R, | ||
410 | |||
411 | /* interrupt groups INTCS */ | ||
412 | RTDMAC1_1, RTDMAC1_2, VEU, BEU, IIC0, __IGNORE(MSU) IPMMU, | ||
413 | IIC2, RTDMAC2_1, RTDMAC2_2, DSITX, __IGNORE(SPU2) TMU1, | ||
414 | }; | ||
415 | |||
416 | #define INTCS_INTVECT 0x0F80 | ||
417 | static struct intc_vect intcs_vectors[] __initdata = { | ||
418 | INTCS_VECT(VEU_VEU0, 0x0700), INTCS_VECT(VEU_VEU1, 0x0720), | ||
419 | INTCS_VECT(VEU_VEU2, 0x0740), INTCS_VECT(VEU_VEU3, 0x0760), | ||
420 | INTCS_VECT(RTDMAC1_1_DEI0, 0x0800), INTCS_VECT(RTDMAC1_1_DEI1, 0x0820), | ||
421 | INTCS_VECT(RTDMAC1_1_DEI2, 0x0840), INTCS_VECT(RTDMAC1_1_DEI3, 0x0860), | ||
422 | INTCS_VECT(CEU, 0x0880), | ||
423 | INTCS_VECT(BEU_BEU0, 0x08A0), | ||
424 | INTCS_VECT(BEU_BEU1, 0x08C0), | ||
425 | INTCS_VECT(BEU_BEU2, 0x08E0), | ||
426 | __IGNORE(INTCS_VECT(MFI, 0x0900)) | ||
427 | __IGNORE(INTCS_VECT(BBIF2, 0x0960)) | ||
428 | INTCS_VECT(VPU, 0x0980), | ||
429 | INTCS_VECT(TSIF1, 0x09A0), | ||
430 | __IGNORE(INTCS_VECT(SGX540, 0x09E0)) | ||
431 | INTCS_VECT(_2DDMAC, 0x0A00), | ||
432 | INTCS_VECT(IIC2_ALI2, 0x0A80), INTCS_VECT(IIC2_TACKI2, 0x0AA0), | ||
433 | INTCS_VECT(IIC2_WAITI2, 0x0AC0), INTCS_VECT(IIC2_DTEI2, 0x0AE0), | ||
434 | INTCS_VECT(IPMMU_IPMMUR, 0x0B00), INTCS_VECT(IPMMU_IPMMUR2, 0x0B20), | ||
435 | INTCS_VECT(RTDMAC1_2_DEI4, 0x0B80), | ||
436 | INTCS_VECT(RTDMAC1_2_DEI5, 0x0BA0), | ||
437 | INTCS_VECT(RTDMAC1_2_DADERR, 0x0BC0), | ||
438 | __IGNORE(INTCS_VECT(KEYSC 0x0BE0)) | ||
439 | __IGNORE(INTCS_VECT(TTI20, 0x0C80)) | ||
440 | __IGNORE(INTCS_VECT(MSIOF, 0x0D20)) | ||
441 | INTCS_VECT(IIC0_ALI0, 0x0E00), INTCS_VECT(IIC0_TACKI0, 0x0E20), | ||
442 | INTCS_VECT(IIC0_WAITI0, 0x0E40), INTCS_VECT(IIC0_DTEI0, 0x0E60), | ||
443 | INTCS_VECT(TMU_TUNI0, 0x0E80), | ||
444 | INTCS_VECT(TMU_TUNI1, 0x0EA0), | ||
445 | INTCS_VECT(TMU_TUNI2, 0x0EC0), | ||
446 | INTCS_VECT(CMT0, 0x0F00), | ||
447 | INTCS_VECT(TSIF0, 0x0F20), | ||
448 | __IGNORE(INTCS_VECT(CMT2, 0x0F40)) | ||
449 | INTCS_VECT(LMB, 0x0F60), | ||
450 | __IGNORE(INTCS_VECT(MSUG, 0x0F80)) | ||
451 | __IGNORE(INTCS_VECT(MSU_MSU, 0x0FA0)) | ||
452 | __IGNORE(INTCS_VECT(MSU_MSU2, 0x0FC0)) | ||
453 | __IGNORE(INTCS_VECT(CTI, 0x0400)) | ||
454 | INTCS_VECT(MVI3, 0x0420), | ||
455 | __IGNORE(INTCS_VECT(RWDT0, 0x0440)) | ||
456 | __IGNORE(INTCS_VECT(RWDT1, 0x0460)) | ||
457 | INTCS_VECT(ICB, 0x0480), | ||
458 | INTCS_VECT(PEP, 0x04A0), | ||
459 | INTCS_VECT(ASA, 0x04C0), | ||
460 | __IGNORE(INTCS_VECT(_2DG, 0x04E0)) | ||
461 | INTCS_VECT(HQE, 0x0540), | ||
462 | INTCS_VECT(JPU, 0x0560), | ||
463 | INTCS_VECT(LCDC0, 0x0580), | ||
464 | __IGNORE(INTCS_VECT(LCRC, 0x05A0)) | ||
465 | INTCS_VECT(RTDMAC2_1_DEI0, 0x1300), INTCS_VECT(RTDMAC2_1_DEI1, 0x1320), | ||
466 | INTCS_VECT(RTDMAC2_1_DEI2, 0x1340), INTCS_VECT(RTDMAC2_1_DEI3, 0x1360), | ||
467 | INTCS_VECT(RTDMAC2_2_DEI4, 0x1380), INTCS_VECT(RTDMAC2_2_DEI5, 0x13A0), | ||
468 | INTCS_VECT(RTDMAC2_2_DADERR, 0x13C0), | ||
469 | INTCS_VECT(FRC, 0x1700), | ||
470 | INTCS_VECT(LCDC1, 0x1780), | ||
471 | INTCS_VECT(CSIRX, 0x17A0), | ||
472 | INTCS_VECT(DSITX_DSITX0, 0x17C0), INTCS_VECT(DSITX_DSITX1, 0x17E0), | ||
473 | __IGNORE(INTCS_VECT(SPU2_SPU0, 0x1800)) | ||
474 | __IGNORE(INTCS_VECT(SPU2_SPU1, 0x1820)) | ||
475 | __IGNORE(INTCS_VECT(FSI, 0x1840)) | ||
476 | __IGNORE(INTCS_VECT(FMSI, 0x1860)) | ||
477 | __IGNORE(INTCS_VECT(SCUV, 0x1880)) | ||
478 | INTCS_VECT(TMU1_TUNI10, 0x1900), INTCS_VECT(TMU1_TUNI11, 0x1920), | ||
479 | INTCS_VECT(TMU1_TUNI12, 0x1940), | ||
480 | INTCS_VECT(TSIF2, 0x1960), | ||
481 | INTCS_VECT(CMT4, 0x1980), | ||
482 | __IGNORE(INTCS_VECT(MFIS2, 0x1A00)) | ||
483 | INTCS_VECT(CPORTS2R, 0x1A20), | ||
484 | |||
485 | INTC_VECT(INTCS, INTCS_INTVECT), | ||
486 | }; | ||
487 | |||
488 | static struct intc_group intcs_groups[] __initdata = { | ||
489 | INTC_GROUP(RTDMAC1_1, | ||
490 | RTDMAC1_1_DEI0, RTDMAC1_1_DEI1, | ||
491 | RTDMAC1_1_DEI2, RTDMAC1_1_DEI3), | ||
492 | INTC_GROUP(RTDMAC1_2, | ||
493 | RTDMAC1_2_DEI4, RTDMAC1_2_DEI5, RTDMAC1_2_DADERR), | ||
494 | INTC_GROUP(VEU, VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3), | ||
495 | INTC_GROUP(BEU, BEU_BEU0, BEU_BEU1, BEU_BEU2), | ||
496 | INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0), | ||
497 | __IGNORE(INTC_GROUP(MSU, MSU_MSU, MSU_MSU2)) | ||
498 | INTC_GROUP(IPMMU, IPMMU_IPMMUR, IPMMU_IPMMUR2), | ||
499 | INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2), | ||
500 | INTC_GROUP(RTDMAC2_1, | ||
501 | RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, | ||
502 | RTDMAC2_1_DEI2, RTDMAC2_1_DEI3), | ||
503 | INTC_GROUP(RTDMAC2_2, RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR), | ||
504 | INTC_GROUP(DSITX, DSITX_DSITX0, DSITX_DSITX1), | ||
505 | __IGNORE(INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1)) | ||
506 | INTC_GROUP(TMU1, TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12), | ||
507 | }; | ||
508 | |||
509 | static struct intc_mask_reg intcs_mask_registers[] __initdata = { | ||
510 | { 0xE6940184, 0xE69401C4, 8, /* IMR1AS / IMCR1AS */ | ||
511 | { BEU_BEU2, BEU_BEU1, BEU_BEU0, CEU, | ||
512 | VEU_VEU3, VEU_VEU2, VEU_VEU1, VEU_VEU0 } }, | ||
513 | { 0xE6940188, 0xE69401C8, 8, /* IMR2AS / IMCR2AS */ | ||
514 | { 0, 0, 0, VPU, | ||
515 | __IGNORE0(BBIF2), 0, 0, __IGNORE0(MFI) } }, | ||
516 | { 0xE694018C, 0xE69401CC, 8, /* IMR3AS / IMCR3AS */ | ||
517 | { 0, 0, 0, _2DDMAC, | ||
518 | __IGNORE0(_2DG), ASA, PEP, ICB } }, | ||
519 | { 0xE6940190, 0xE69401D0, 8, /* IMR4AS / IMCR4AS */ | ||
520 | { 0, 0, MVI3, __IGNORE0(CTI), | ||
521 | JPU, HQE, __IGNORE0(LCRC), LCDC0 } }, | ||
522 | { 0xE6940194, 0xE69401D4, 8, /* IMR5AS / IMCR5AS */ | ||
523 | { __IGNORE0(KEYSC), RTDMAC1_2_DADERR, RTDMAC1_2_DEI5, RTDMAC1_2_DEI4, | ||
524 | RTDMAC1_1_DEI3, RTDMAC1_1_DEI2, RTDMAC1_1_DEI1, RTDMAC1_1_DEI0 } }, | ||
525 | __IGNORE({ 0xE6940198, 0xE69401D8, 8, /* IMR6AS / IMCR6AS */ | ||
526 | { 0, 0, MSIOF, 0, | ||
527 | SGX540, 0, TTI20, 0 } }) | ||
528 | { 0xE694019C, 0xE69401DC, 8, /* IMR7AS / IMCR7AS */ | ||
529 | { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0, | ||
530 | 0, 0, 0, 0 } }, | ||
531 | __IGNORE({ 0xE69401A0, 0xE69401E0, 8, /* IMR8AS / IMCR8AS */ | ||
532 | { 0, 0, 0, 0, | ||
533 | 0, MSU_MSU, MSU_MSU2, MSUG } }) | ||
534 | { 0xE69401A4, 0xE69401E4, 8, /* IMR9AS / IMCR9AS */ | ||
535 | { __IGNORE0(RWDT1), __IGNORE0(RWDT0), __IGNORE0(CMT2), CMT0, | ||
536 | IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } }, | ||
537 | { 0xE69401A8, 0xE69401E8, 8, /* IMR10AS / IMCR10AS */ | ||
538 | { 0, 0, IPMMU_IPMMUR, IPMMU_IPMMUR2, | ||
539 | 0, 0, 0, 0 } }, | ||
540 | { 0xE69401AC, 0xE69401EC, 8, /* IMR11AS / IMCR11AS */ | ||
541 | { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0, | ||
542 | 0, TSIF1, LMB, TSIF0 } }, | ||
543 | { 0xE6950180, 0xE69501C0, 8, /* IMR0AS3 / IMCR0AS3 */ | ||
544 | { RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3, | ||
545 | RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR, 0 } }, | ||
546 | { 0xE6950190, 0xE69501D0, 8, /* IMR4AS3 / IMCR4AS3 */ | ||
547 | { FRC, 0, 0, 0, | ||
548 | LCDC1, CSIRX, DSITX_DSITX0, DSITX_DSITX1 } }, | ||
549 | __IGNORE({ 0xE6950194, 0xE69501D4, 8, /* IMR5AS3 / IMCR5AS3 */ | ||
550 | {SPU2_SPU0, SPU2_SPU1, FSI, FMSI, | ||
551 | SCUV, 0, 0, 0 } }) | ||
552 | { 0xE6950198, 0xE69501D8, 8, /* IMR6AS3 / IMCR6AS3 */ | ||
553 | { TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12, TSIF2, | ||
554 | CMT4, 0, 0, 0 } }, | ||
555 | { 0xE695019C, 0xE69501DC, 8, /* IMR7AS3 / IMCR7AS3 */ | ||
556 | { __IGNORE0(MFIS2), CPORTS2R, 0, 0, | ||
557 | 0, 0, 0, 0 } }, | ||
558 | { 0xFFD20104, 0, 16, /* INTAMASK */ | ||
559 | { 0, 0, 0, 0, 0, 0, 0, 0, | ||
560 | 0, 0, 0, 0, 0, 0, 0, INTCS } } | ||
561 | }; | ||
562 | |||
563 | static struct intc_prio_reg intcs_prio_registers[] __initdata = { | ||
564 | /* IPRAS */ | ||
565 | { 0xFFD20000, 0, 16, 4, { __IGNORE0(CTI), MVI3, _2DDMAC, ICB } }, | ||
566 | /* IPRBS */ | ||
567 | { 0xFFD20004, 0, 16, 4, { JPU, LCDC0, 0, __IGNORE0(LCRC) } }, | ||
568 | /* IPRCS */ | ||
569 | __IGNORE({ 0xFFD20008, 0, 16, 4, { BBIF2, 0, 0, 0 } }) | ||
570 | /* IPRES */ | ||
571 | { 0xFFD20010, 0, 16, 4, { RTDMAC1_1, CEU, __IGNORE0(MFI), VPU } }, | ||
572 | /* IPRFS */ | ||
573 | { 0xFFD20014, 0, 16, 4, | ||
574 | { __IGNORE0(KEYSC), RTDMAC1_2, __IGNORE0(CMT2), CMT0 } }, | ||
575 | /* IPRGS */ | ||
576 | { 0xFFD20018, 0, 16, 4, { TMU_TUNI0, TMU_TUNI1, TMU_TUNI2, TSIF1 } }, | ||
577 | /* IPRHS */ | ||
578 | { 0xFFD2001C, 0, 16, 4, { __IGNORE0(TTI20), 0, VEU, BEU } }, | ||
579 | /* IPRIS */ | ||
580 | { 0xFFD20020, 0, 16, 4, { 0, __IGNORE0(MSIOF), TSIF0, IIC0 } }, | ||
581 | /* IPRJS */ | ||
582 | __IGNORE({ 0xFFD20024, 0, 16, 4, { 0, SGX540, MSUG, MSU } }) | ||
583 | /* IPRKS */ | ||
584 | { 0xFFD20028, 0, 16, 4, { __IGNORE0(_2DG), ASA, LMB, PEP } }, | ||
585 | /* IPRLS */ | ||
586 | { 0xFFD2002C, 0, 16, 4, { IPMMU, 0, 0, HQE } }, | ||
587 | /* IPRMS */ | ||
588 | { 0xFFD20030, 0, 16, 4, | ||
589 | { IIC2, 0, __IGNORE0(RWDT1), __IGNORE0(RWDT0) } }, | ||
590 | /* IPRAS3 */ | ||
591 | { 0xFFD50000, 0, 16, 4, { RTDMAC2_1, 0, 0, 0 } }, | ||
592 | /* IPRBS3 */ | ||
593 | { 0xFFD50004, 0, 16, 4, { RTDMAC2_2, 0, 0, 0 } }, | ||
594 | /* IPRIS3 */ | ||
595 | { 0xFFD50020, 0, 16, 4, { FRC, 0, 0, 0 } }, | ||
596 | /* IPRJS3 */ | ||
597 | { 0xFFD50024, 0, 16, 4, { LCDC1, CSIRX, DSITX, 0 } }, | ||
598 | /* IPRKS3 */ | ||
599 | __IGNORE({ 0xFFD50028, 0, 16, 4, { SPU2, 0, FSI, FMSI } }) | ||
600 | /* IPRLS3 */ | ||
601 | __IGNORE({ 0xFFD5002C, 0, 16, 4, { SCUV, 0, 0, 0 } }) | ||
602 | /* IPRMS3 */ | ||
603 | { 0xFFD50030, 0, 16, 4, { TMU1, 0, 0, TSIF2 } }, | ||
604 | /* IPRNS3 */ | ||
605 | { 0xFFD50034, 0, 16, 4, { CMT4, 0, 0, 0 } }, | ||
606 | /* IPROS3 */ | ||
607 | { 0xFFD50038, 0, 16, 4, { __IGNORE0(MFIS2), CPORTS2R, 0, 0 } }, | ||
608 | }; | ||
609 | |||
610 | static struct resource intcs_resources[] __initdata = { | ||
611 | [0] = { | ||
612 | .start = 0xffd20000, | ||
613 | .end = 0xffd500ff, | ||
614 | .flags = IORESOURCE_MEM, | ||
615 | } | ||
616 | }; | ||
617 | |||
618 | static struct intc_desc intcs_desc __initdata = { | ||
619 | .name = "sh7377-intcs", | ||
620 | .resource = intcs_resources, | ||
621 | .num_resources = ARRAY_SIZE(intcs_resources), | ||
622 | .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, | ||
623 | intcs_mask_registers, intcs_prio_registers, | ||
624 | NULL, NULL), | ||
625 | }; | ||
626 | |||
627 | static void intcs_demux(unsigned int irq, struct irq_desc *desc) | ||
628 | { | ||
629 | void __iomem *reg = (void *)get_irq_data(irq); | ||
630 | unsigned int evtcodeas = ioread32(reg); | ||
631 | |||
632 | generic_handle_irq(intcs_evt2irq(evtcodeas)); | ||
633 | } | ||
634 | |||
635 | #define INTEVTSA 0xFFD20100 | ||
349 | void __init sh7377_init_irq(void) | 636 | void __init sh7377_init_irq(void) |
350 | { | 637 | { |
638 | void __iomem *intevtsa = ioremap_nocache(INTEVTSA, PAGE_SIZE); | ||
639 | |||
351 | register_intc_controller(&intca_desc); | 640 | register_intc_controller(&intca_desc); |
641 | register_intc_controller(&intcs_desc); | ||
642 | |||
643 | /* demux using INTEVTSA */ | ||
644 | set_irq_data(evt2irq(INTCS_INTVECT), (void *)intevtsa); | ||
645 | set_irq_chained_handler(evt2irq(INTCS_INTVECT), intcs_demux); | ||
352 | } | 646 | } |
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c index 9557d0964d73..ec420353f8e3 100644 --- a/arch/arm/mach-shmobile/pfc-sh7372.c +++ b/arch/arm/mach-shmobile/pfc-sh7372.c | |||
@@ -1160,6 +1160,9 @@ static struct pinmux_gpio pinmux_gpios[] = { | |||
1160 | GPIO_FN(LCDD18), GPIO_FN(LCDD19), GPIO_FN(LCDD20), | 1160 | GPIO_FN(LCDD18), GPIO_FN(LCDD19), GPIO_FN(LCDD20), |
1161 | GPIO_FN(LCDD21), GPIO_FN(LCDD22), GPIO_FN(LCDD23), | 1161 | GPIO_FN(LCDD21), GPIO_FN(LCDD22), GPIO_FN(LCDD23), |
1162 | 1162 | ||
1163 | GPIO_FN(LCDC0_SELECT), | ||
1164 | GPIO_FN(LCDC1_SELECT), | ||
1165 | |||
1163 | /* IRDA */ | 1166 | /* IRDA */ |
1164 | GPIO_FN(IRDA_OUT), GPIO_FN(IRDA_IN), GPIO_FN(IRDA_FIRSEL), | 1167 | GPIO_FN(IRDA_OUT), GPIO_FN(IRDA_IN), GPIO_FN(IRDA_FIRSEL), |
1165 | GPIO_FN(IROUT_139), GPIO_FN(IROUT_140), | 1168 | GPIO_FN(IROUT_139), GPIO_FN(IROUT_140), |
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c index eca90716140e..3148c11a550e 100644 --- a/arch/arm/mach-shmobile/setup-sh7367.c +++ b/arch/arm/mach-shmobile/setup-sh7367.c | |||
@@ -31,11 +31,13 @@ | |||
31 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
32 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
33 | 33 | ||
34 | /* SCIFA0 */ | ||
34 | static struct plat_sci_port scif0_platform_data = { | 35 | static struct plat_sci_port scif0_platform_data = { |
35 | .mapbase = 0xe6c40000, | 36 | .mapbase = 0xe6c40000, |
36 | .flags = UPF_BOOT_AUTOCONF, | 37 | .flags = UPF_BOOT_AUTOCONF, |
37 | .type = PORT_SCIF, | 38 | .type = PORT_SCIF, |
38 | .irqs = { 80, 80, 80, 80 }, | 39 | .irqs = { evt2irq(0xc00), evt2irq(0xc00), |
40 | evt2irq(0xc00), evt2irq(0xc00) }, | ||
39 | }; | 41 | }; |
40 | 42 | ||
41 | static struct platform_device scif0_device = { | 43 | static struct platform_device scif0_device = { |
@@ -46,11 +48,13 @@ static struct platform_device scif0_device = { | |||
46 | }, | 48 | }, |
47 | }; | 49 | }; |
48 | 50 | ||
51 | /* SCIFA1 */ | ||
49 | static struct plat_sci_port scif1_platform_data = { | 52 | static struct plat_sci_port scif1_platform_data = { |
50 | .mapbase = 0xe6c50000, | 53 | .mapbase = 0xe6c50000, |
51 | .flags = UPF_BOOT_AUTOCONF, | 54 | .flags = UPF_BOOT_AUTOCONF, |
52 | .type = PORT_SCIF, | 55 | .type = PORT_SCIF, |
53 | .irqs = { 81, 81, 81, 81 }, | 56 | .irqs = { evt2irq(0xc20), evt2irq(0xc20), |
57 | evt2irq(0xc20), evt2irq(0xc20) }, | ||
54 | }; | 58 | }; |
55 | 59 | ||
56 | static struct platform_device scif1_device = { | 60 | static struct platform_device scif1_device = { |
@@ -61,11 +65,13 @@ static struct platform_device scif1_device = { | |||
61 | }, | 65 | }, |
62 | }; | 66 | }; |
63 | 67 | ||
68 | /* SCIFA2 */ | ||
64 | static struct plat_sci_port scif2_platform_data = { | 69 | static struct plat_sci_port scif2_platform_data = { |
65 | .mapbase = 0xe6c60000, | 70 | .mapbase = 0xe6c60000, |
66 | .flags = UPF_BOOT_AUTOCONF, | 71 | .flags = UPF_BOOT_AUTOCONF, |
67 | .type = PORT_SCIF, | 72 | .type = PORT_SCIF, |
68 | .irqs = { 82, 82, 82, 82 }, | 73 | .irqs = { evt2irq(0xc40), evt2irq(0xc40), |
74 | evt2irq(0xc40), evt2irq(0xc40) }, | ||
69 | }; | 75 | }; |
70 | 76 | ||
71 | static struct platform_device scif2_device = { | 77 | static struct platform_device scif2_device = { |
@@ -76,11 +82,13 @@ static struct platform_device scif2_device = { | |||
76 | }, | 82 | }, |
77 | }; | 83 | }; |
78 | 84 | ||
85 | /* SCIFA3 */ | ||
79 | static struct plat_sci_port scif3_platform_data = { | 86 | static struct plat_sci_port scif3_platform_data = { |
80 | .mapbase = 0xe6c70000, | 87 | .mapbase = 0xe6c70000, |
81 | .flags = UPF_BOOT_AUTOCONF, | 88 | .flags = UPF_BOOT_AUTOCONF, |
82 | .type = PORT_SCIF, | 89 | .type = PORT_SCIF, |
83 | .irqs = { 83, 83, 83, 83 }, | 90 | .irqs = { evt2irq(0xc60), evt2irq(0xc60), |
91 | evt2irq(0xc60), evt2irq(0xc60) }, | ||
84 | }; | 92 | }; |
85 | 93 | ||
86 | static struct platform_device scif3_device = { | 94 | static struct platform_device scif3_device = { |
@@ -91,11 +99,13 @@ static struct platform_device scif3_device = { | |||
91 | }, | 99 | }, |
92 | }; | 100 | }; |
93 | 101 | ||
102 | /* SCIFA4 */ | ||
94 | static struct plat_sci_port scif4_platform_data = { | 103 | static struct plat_sci_port scif4_platform_data = { |
95 | .mapbase = 0xe6c80000, | 104 | .mapbase = 0xe6c80000, |
96 | .flags = UPF_BOOT_AUTOCONF, | 105 | .flags = UPF_BOOT_AUTOCONF, |
97 | .type = PORT_SCIF, | 106 | .type = PORT_SCIF, |
98 | .irqs = { 89, 89, 89, 89 }, | 107 | .irqs = { evt2irq(0xd20), evt2irq(0xd20), |
108 | evt2irq(0xd20), evt2irq(0xd20) }, | ||
99 | }; | 109 | }; |
100 | 110 | ||
101 | static struct platform_device scif4_device = { | 111 | static struct platform_device scif4_device = { |
@@ -106,11 +116,13 @@ static struct platform_device scif4_device = { | |||
106 | }, | 116 | }, |
107 | }; | 117 | }; |
108 | 118 | ||
119 | /* SCIFA5 */ | ||
109 | static struct plat_sci_port scif5_platform_data = { | 120 | static struct plat_sci_port scif5_platform_data = { |
110 | .mapbase = 0xe6cb0000, | 121 | .mapbase = 0xe6cb0000, |
111 | .flags = UPF_BOOT_AUTOCONF, | 122 | .flags = UPF_BOOT_AUTOCONF, |
112 | .type = PORT_SCIF, | 123 | .type = PORT_SCIF, |
113 | .irqs = { 90, 90, 90, 90 }, | 124 | .irqs = { evt2irq(0xd40), evt2irq(0xd40), |
125 | evt2irq(0xd40), evt2irq(0xd40) }, | ||
114 | }; | 126 | }; |
115 | 127 | ||
116 | static struct platform_device scif5_device = { | 128 | static struct platform_device scif5_device = { |
@@ -121,11 +133,13 @@ static struct platform_device scif5_device = { | |||
121 | }, | 133 | }, |
122 | }; | 134 | }; |
123 | 135 | ||
136 | /* SCIFB */ | ||
124 | static struct plat_sci_port scif6_platform_data = { | 137 | static struct plat_sci_port scif6_platform_data = { |
125 | .mapbase = 0xe6c30000, | 138 | .mapbase = 0xe6c30000, |
126 | .flags = UPF_BOOT_AUTOCONF, | 139 | .flags = UPF_BOOT_AUTOCONF, |
127 | .type = PORT_SCIF, | 140 | .type = PORT_SCIF, |
128 | .irqs = { 91, 91, 91, 91 }, | 141 | .irqs = { evt2irq(0xd60), evt2irq(0xd60), |
142 | evt2irq(0xd60), evt2irq(0xd60) }, | ||
129 | }; | 143 | }; |
130 | 144 | ||
131 | static struct platform_device scif6_device = { | 145 | static struct platform_device scif6_device = { |
@@ -153,7 +167,7 @@ static struct resource cmt10_resources[] = { | |||
153 | .flags = IORESOURCE_MEM, | 167 | .flags = IORESOURCE_MEM, |
154 | }, | 168 | }, |
155 | [1] = { | 169 | [1] = { |
156 | .start = 72, | 170 | .start = evt2irq(0xb00), /* CMT1_CMT10 */ |
157 | .flags = IORESOURCE_IRQ, | 171 | .flags = IORESOURCE_IRQ, |
158 | }, | 172 | }, |
159 | }; | 173 | }; |
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index 1d1153290f59..e26686c9d0b6 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c | |||
@@ -26,17 +26,21 @@ | |||
26 | #include <linux/input.h> | 26 | #include <linux/input.h> |
27 | #include <linux/io.h> | 27 | #include <linux/io.h> |
28 | #include <linux/serial_sci.h> | 28 | #include <linux/serial_sci.h> |
29 | #include <linux/sh_dma.h> | ||
29 | #include <linux/sh_intc.h> | 30 | #include <linux/sh_intc.h> |
30 | #include <linux/sh_timer.h> | 31 | #include <linux/sh_timer.h> |
31 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
33 | #include <mach/sh7372.h> | ||
32 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
33 | #include <asm/mach/arch.h> | 35 | #include <asm/mach/arch.h> |
34 | 36 | ||
37 | /* SCIFA0 */ | ||
35 | static struct plat_sci_port scif0_platform_data = { | 38 | static struct plat_sci_port scif0_platform_data = { |
36 | .mapbase = 0xe6c40000, | 39 | .mapbase = 0xe6c40000, |
37 | .flags = UPF_BOOT_AUTOCONF, | 40 | .flags = UPF_BOOT_AUTOCONF, |
38 | .type = PORT_SCIF, | 41 | .type = PORT_SCIFA, |
39 | .irqs = { 80, 80, 80, 80 }, | 42 | .irqs = { evt2irq(0x0c00), evt2irq(0x0c00), |
43 | evt2irq(0x0c00), evt2irq(0x0c00) }, | ||
40 | }; | 44 | }; |
41 | 45 | ||
42 | static struct platform_device scif0_device = { | 46 | static struct platform_device scif0_device = { |
@@ -47,11 +51,13 @@ static struct platform_device scif0_device = { | |||
47 | }, | 51 | }, |
48 | }; | 52 | }; |
49 | 53 | ||
54 | /* SCIFA1 */ | ||
50 | static struct plat_sci_port scif1_platform_data = { | 55 | static struct plat_sci_port scif1_platform_data = { |
51 | .mapbase = 0xe6c50000, | 56 | .mapbase = 0xe6c50000, |
52 | .flags = UPF_BOOT_AUTOCONF, | 57 | .flags = UPF_BOOT_AUTOCONF, |
53 | .type = PORT_SCIF, | 58 | .type = PORT_SCIFA, |
54 | .irqs = { 81, 81, 81, 81 }, | 59 | .irqs = { evt2irq(0x0c20), evt2irq(0x0c20), |
60 | evt2irq(0x0c20), evt2irq(0x0c20) }, | ||
55 | }; | 61 | }; |
56 | 62 | ||
57 | static struct platform_device scif1_device = { | 63 | static struct platform_device scif1_device = { |
@@ -62,11 +68,13 @@ static struct platform_device scif1_device = { | |||
62 | }, | 68 | }, |
63 | }; | 69 | }; |
64 | 70 | ||
71 | /* SCIFA2 */ | ||
65 | static struct plat_sci_port scif2_platform_data = { | 72 | static struct plat_sci_port scif2_platform_data = { |
66 | .mapbase = 0xe6c60000, | 73 | .mapbase = 0xe6c60000, |
67 | .flags = UPF_BOOT_AUTOCONF, | 74 | .flags = UPF_BOOT_AUTOCONF, |
68 | .type = PORT_SCIF, | 75 | .type = PORT_SCIFA, |
69 | .irqs = { 82, 82, 82, 82 }, | 76 | .irqs = { evt2irq(0x0c40), evt2irq(0x0c40), |
77 | evt2irq(0x0c40), evt2irq(0x0c40) }, | ||
70 | }; | 78 | }; |
71 | 79 | ||
72 | static struct platform_device scif2_device = { | 80 | static struct platform_device scif2_device = { |
@@ -77,11 +85,13 @@ static struct platform_device scif2_device = { | |||
77 | }, | 85 | }, |
78 | }; | 86 | }; |
79 | 87 | ||
88 | /* SCIFA3 */ | ||
80 | static struct plat_sci_port scif3_platform_data = { | 89 | static struct plat_sci_port scif3_platform_data = { |
81 | .mapbase = 0xe6c70000, | 90 | .mapbase = 0xe6c70000, |
82 | .flags = UPF_BOOT_AUTOCONF, | 91 | .flags = UPF_BOOT_AUTOCONF, |
83 | .type = PORT_SCIF, | 92 | .type = PORT_SCIFA, |
84 | .irqs = { 83, 83, 83, 83 }, | 93 | .irqs = { evt2irq(0x0c60), evt2irq(0x0c60), |
94 | evt2irq(0x0c60), evt2irq(0x0c60) }, | ||
85 | }; | 95 | }; |
86 | 96 | ||
87 | static struct platform_device scif3_device = { | 97 | static struct platform_device scif3_device = { |
@@ -92,11 +102,13 @@ static struct platform_device scif3_device = { | |||
92 | }, | 102 | }, |
93 | }; | 103 | }; |
94 | 104 | ||
105 | /* SCIFA4 */ | ||
95 | static struct plat_sci_port scif4_platform_data = { | 106 | static struct plat_sci_port scif4_platform_data = { |
96 | .mapbase = 0xe6c80000, | 107 | .mapbase = 0xe6c80000, |
97 | .flags = UPF_BOOT_AUTOCONF, | 108 | .flags = UPF_BOOT_AUTOCONF, |
98 | .type = PORT_SCIF, | 109 | .type = PORT_SCIFA, |
99 | .irqs = { 89, 89, 89, 89 }, | 110 | .irqs = { evt2irq(0x0d20), evt2irq(0x0d20), |
111 | evt2irq(0x0d20), evt2irq(0x0d20) }, | ||
100 | }; | 112 | }; |
101 | 113 | ||
102 | static struct platform_device scif4_device = { | 114 | static struct platform_device scif4_device = { |
@@ -107,11 +119,13 @@ static struct platform_device scif4_device = { | |||
107 | }, | 119 | }, |
108 | }; | 120 | }; |
109 | 121 | ||
122 | /* SCIFA5 */ | ||
110 | static struct plat_sci_port scif5_platform_data = { | 123 | static struct plat_sci_port scif5_platform_data = { |
111 | .mapbase = 0xe6cb0000, | 124 | .mapbase = 0xe6cb0000, |
112 | .flags = UPF_BOOT_AUTOCONF, | 125 | .flags = UPF_BOOT_AUTOCONF, |
113 | .type = PORT_SCIF, | 126 | .type = PORT_SCIFA, |
114 | .irqs = { 90, 90, 90, 90 }, | 127 | .irqs = { evt2irq(0x0d40), evt2irq(0x0d40), |
128 | evt2irq(0x0d40), evt2irq(0x0d40) }, | ||
115 | }; | 129 | }; |
116 | 130 | ||
117 | static struct platform_device scif5_device = { | 131 | static struct platform_device scif5_device = { |
@@ -122,11 +136,13 @@ static struct platform_device scif5_device = { | |||
122 | }, | 136 | }, |
123 | }; | 137 | }; |
124 | 138 | ||
139 | /* SCIFB */ | ||
125 | static struct plat_sci_port scif6_platform_data = { | 140 | static struct plat_sci_port scif6_platform_data = { |
126 | .mapbase = 0xe6c30000, | 141 | .mapbase = 0xe6c30000, |
127 | .flags = UPF_BOOT_AUTOCONF, | 142 | .flags = UPF_BOOT_AUTOCONF, |
128 | .type = PORT_SCIF, | 143 | .type = PORT_SCIFB, |
129 | .irqs = { 91, 91, 91, 91 }, | 144 | .irqs = { evt2irq(0x0d60), evt2irq(0x0d60), |
145 | evt2irq(0x0d60), evt2irq(0x0d60) }, | ||
130 | }; | 146 | }; |
131 | 147 | ||
132 | static struct platform_device scif6_device = { | 148 | static struct platform_device scif6_device = { |
@@ -137,11 +153,12 @@ static struct platform_device scif6_device = { | |||
137 | }, | 153 | }, |
138 | }; | 154 | }; |
139 | 155 | ||
156 | /* CMT */ | ||
140 | static struct sh_timer_config cmt10_platform_data = { | 157 | static struct sh_timer_config cmt10_platform_data = { |
141 | .name = "CMT10", | 158 | .name = "CMT10", |
142 | .channel_offset = 0x10, | 159 | .channel_offset = 0x10, |
143 | .timer_bit = 0, | 160 | .timer_bit = 0, |
144 | .clk = "r_clk", | 161 | .clk = "cmt1", |
145 | .clockevent_rating = 125, | 162 | .clockevent_rating = 125, |
146 | .clocksource_rating = 125, | 163 | .clocksource_rating = 125, |
147 | }; | 164 | }; |
@@ -154,7 +171,7 @@ static struct resource cmt10_resources[] = { | |||
154 | .flags = IORESOURCE_MEM, | 171 | .flags = IORESOURCE_MEM, |
155 | }, | 172 | }, |
156 | [1] = { | 173 | [1] = { |
157 | .start = 72, | 174 | .start = evt2irq(0x0b00), /* CMT1_CMT10 */ |
158 | .flags = IORESOURCE_IRQ, | 175 | .flags = IORESOURCE_IRQ, |
159 | }, | 176 | }, |
160 | }; | 177 | }; |
@@ -169,6 +186,337 @@ static struct platform_device cmt10_device = { | |||
169 | .num_resources = ARRAY_SIZE(cmt10_resources), | 186 | .num_resources = ARRAY_SIZE(cmt10_resources), |
170 | }; | 187 | }; |
171 | 188 | ||
189 | /* I2C */ | ||
190 | static struct resource iic0_resources[] = { | ||
191 | [0] = { | ||
192 | .name = "IIC0", | ||
193 | .start = 0xFFF20000, | ||
194 | .end = 0xFFF20425 - 1, | ||
195 | .flags = IORESOURCE_MEM, | ||
196 | }, | ||
197 | [1] = { | ||
198 | .start = intcs_evt2irq(0xe00), /* IIC0_ALI0 */ | ||
199 | .end = intcs_evt2irq(0xe60), /* IIC0_DTEI0 */ | ||
200 | .flags = IORESOURCE_IRQ, | ||
201 | }, | ||
202 | }; | ||
203 | |||
204 | static struct platform_device iic0_device = { | ||
205 | .name = "i2c-sh_mobile", | ||
206 | .id = 0, /* "i2c0" clock */ | ||
207 | .num_resources = ARRAY_SIZE(iic0_resources), | ||
208 | .resource = iic0_resources, | ||
209 | }; | ||
210 | |||
211 | static struct resource iic1_resources[] = { | ||
212 | [0] = { | ||
213 | .name = "IIC1", | ||
214 | .start = 0xE6C20000, | ||
215 | .end = 0xE6C20425 - 1, | ||
216 | .flags = IORESOURCE_MEM, | ||
217 | }, | ||
218 | [1] = { | ||
219 | .start = evt2irq(0x780), /* IIC1_ALI1 */ | ||
220 | .end = evt2irq(0x7e0), /* IIC1_DTEI1 */ | ||
221 | .flags = IORESOURCE_IRQ, | ||
222 | }, | ||
223 | }; | ||
224 | |||
225 | static struct platform_device iic1_device = { | ||
226 | .name = "i2c-sh_mobile", | ||
227 | .id = 1, /* "i2c1" clock */ | ||
228 | .num_resources = ARRAY_SIZE(iic1_resources), | ||
229 | .resource = iic1_resources, | ||
230 | }; | ||
231 | |||
232 | /* DMA */ | ||
233 | /* Transmit sizes and respective CHCR register values */ | ||
234 | enum { | ||
235 | XMIT_SZ_8BIT = 0, | ||
236 | XMIT_SZ_16BIT = 1, | ||
237 | XMIT_SZ_32BIT = 2, | ||
238 | XMIT_SZ_64BIT = 7, | ||
239 | XMIT_SZ_128BIT = 3, | ||
240 | XMIT_SZ_256BIT = 4, | ||
241 | XMIT_SZ_512BIT = 5, | ||
242 | }; | ||
243 | |||
244 | /* log2(size / 8) - used to calculate number of transfers */ | ||
245 | #define TS_SHIFT { \ | ||
246 | [XMIT_SZ_8BIT] = 0, \ | ||
247 | [XMIT_SZ_16BIT] = 1, \ | ||
248 | [XMIT_SZ_32BIT] = 2, \ | ||
249 | [XMIT_SZ_64BIT] = 3, \ | ||
250 | [XMIT_SZ_128BIT] = 4, \ | ||
251 | [XMIT_SZ_256BIT] = 5, \ | ||
252 | [XMIT_SZ_512BIT] = 6, \ | ||
253 | } | ||
254 | |||
255 | #define TS_INDEX2VAL(i) ((((i) & 3) << 3) | \ | ||
256 | (((i) & 0xc) << (20 - 2))) | ||
257 | |||
258 | static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = { | ||
259 | { | ||
260 | .slave_id = SHDMA_SLAVE_SCIF0_TX, | ||
261 | .addr = 0xe6c40020, | ||
262 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
263 | .mid_rid = 0x21, | ||
264 | }, { | ||
265 | .slave_id = SHDMA_SLAVE_SCIF0_RX, | ||
266 | .addr = 0xe6c40024, | ||
267 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
268 | .mid_rid = 0x22, | ||
269 | }, { | ||
270 | .slave_id = SHDMA_SLAVE_SCIF1_TX, | ||
271 | .addr = 0xe6c50020, | ||
272 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
273 | .mid_rid = 0x25, | ||
274 | }, { | ||
275 | .slave_id = SHDMA_SLAVE_SCIF1_RX, | ||
276 | .addr = 0xe6c50024, | ||
277 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
278 | .mid_rid = 0x26, | ||
279 | }, { | ||
280 | .slave_id = SHDMA_SLAVE_SCIF2_TX, | ||
281 | .addr = 0xe6c60020, | ||
282 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
283 | .mid_rid = 0x29, | ||
284 | }, { | ||
285 | .slave_id = SHDMA_SLAVE_SCIF2_RX, | ||
286 | .addr = 0xe6c60024, | ||
287 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
288 | .mid_rid = 0x2a, | ||
289 | }, { | ||
290 | .slave_id = SHDMA_SLAVE_SCIF3_TX, | ||
291 | .addr = 0xe6c70020, | ||
292 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
293 | .mid_rid = 0x2d, | ||
294 | }, { | ||
295 | .slave_id = SHDMA_SLAVE_SCIF3_RX, | ||
296 | .addr = 0xe6c70024, | ||
297 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
298 | .mid_rid = 0x2e, | ||
299 | }, { | ||
300 | .slave_id = SHDMA_SLAVE_SCIF4_TX, | ||
301 | .addr = 0xe6c80020, | ||
302 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
303 | .mid_rid = 0x39, | ||
304 | }, { | ||
305 | .slave_id = SHDMA_SLAVE_SCIF4_RX, | ||
306 | .addr = 0xe6c80024, | ||
307 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
308 | .mid_rid = 0x3a, | ||
309 | }, { | ||
310 | .slave_id = SHDMA_SLAVE_SCIF5_TX, | ||
311 | .addr = 0xe6cb0020, | ||
312 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
313 | .mid_rid = 0x35, | ||
314 | }, { | ||
315 | .slave_id = SHDMA_SLAVE_SCIF5_RX, | ||
316 | .addr = 0xe6cb0024, | ||
317 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
318 | .mid_rid = 0x36, | ||
319 | }, { | ||
320 | .slave_id = SHDMA_SLAVE_SCIF6_TX, | ||
321 | .addr = 0xe6c30040, | ||
322 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
323 | .mid_rid = 0x3d, | ||
324 | }, { | ||
325 | .slave_id = SHDMA_SLAVE_SCIF6_RX, | ||
326 | .addr = 0xe6c30060, | ||
327 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | ||
328 | .mid_rid = 0x3e, | ||
329 | }, { | ||
330 | .slave_id = SHDMA_SLAVE_SDHI0_TX, | ||
331 | .addr = 0xe6850030, | ||
332 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | ||
333 | .mid_rid = 0xc1, | ||
334 | }, { | ||
335 | .slave_id = SHDMA_SLAVE_SDHI0_RX, | ||
336 | .addr = 0xe6850030, | ||
337 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | ||
338 | .mid_rid = 0xc2, | ||
339 | }, { | ||
340 | .slave_id = SHDMA_SLAVE_SDHI1_TX, | ||
341 | .addr = 0xe6860030, | ||
342 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | ||
343 | .mid_rid = 0xc9, | ||
344 | }, { | ||
345 | .slave_id = SHDMA_SLAVE_SDHI1_RX, | ||
346 | .addr = 0xe6860030, | ||
347 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | ||
348 | .mid_rid = 0xca, | ||
349 | }, { | ||
350 | .slave_id = SHDMA_SLAVE_SDHI2_TX, | ||
351 | .addr = 0xe6870030, | ||
352 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | ||
353 | .mid_rid = 0xcd, | ||
354 | }, { | ||
355 | .slave_id = SHDMA_SLAVE_SDHI2_RX, | ||
356 | .addr = 0xe6870030, | ||
357 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | ||
358 | .mid_rid = 0xce, | ||
359 | }, | ||
360 | }; | ||
361 | |||
362 | static const struct sh_dmae_channel sh7372_dmae_channels[] = { | ||
363 | { | ||
364 | .offset = 0, | ||
365 | .dmars = 0, | ||
366 | .dmars_bit = 0, | ||
367 | }, { | ||
368 | .offset = 0x10, | ||
369 | .dmars = 0, | ||
370 | .dmars_bit = 8, | ||
371 | }, { | ||
372 | .offset = 0x20, | ||
373 | .dmars = 4, | ||
374 | .dmars_bit = 0, | ||
375 | }, { | ||
376 | .offset = 0x30, | ||
377 | .dmars = 4, | ||
378 | .dmars_bit = 8, | ||
379 | }, { | ||
380 | .offset = 0x50, | ||
381 | .dmars = 8, | ||
382 | .dmars_bit = 0, | ||
383 | }, { | ||
384 | .offset = 0x60, | ||
385 | .dmars = 8, | ||
386 | .dmars_bit = 8, | ||
387 | } | ||
388 | }; | ||
389 | |||
390 | static const unsigned int ts_shift[] = TS_SHIFT; | ||
391 | |||
392 | static struct sh_dmae_pdata dma_platform_data = { | ||
393 | .slave = sh7372_dmae_slaves, | ||
394 | .slave_num = ARRAY_SIZE(sh7372_dmae_slaves), | ||
395 | .channel = sh7372_dmae_channels, | ||
396 | .channel_num = ARRAY_SIZE(sh7372_dmae_channels), | ||
397 | .ts_low_shift = 3, | ||
398 | .ts_low_mask = 0x18, | ||
399 | .ts_high_shift = (20 - 2), /* 2 bits for shifted low TS */ | ||
400 | .ts_high_mask = 0x00300000, | ||
401 | .ts_shift = ts_shift, | ||
402 | .ts_shift_num = ARRAY_SIZE(ts_shift), | ||
403 | .dmaor_init = DMAOR_DME, | ||
404 | }; | ||
405 | |||
406 | /* Resource order important! */ | ||
407 | static struct resource sh7372_dmae0_resources[] = { | ||
408 | { | ||
409 | /* Channel registers and DMAOR */ | ||
410 | .start = 0xfe008020, | ||
411 | .end = 0xfe00808f, | ||
412 | .flags = IORESOURCE_MEM, | ||
413 | }, | ||
414 | { | ||
415 | /* DMARSx */ | ||
416 | .start = 0xfe009000, | ||
417 | .end = 0xfe00900b, | ||
418 | .flags = IORESOURCE_MEM, | ||
419 | }, | ||
420 | { | ||
421 | /* DMA error IRQ */ | ||
422 | .start = 246, | ||
423 | .end = 246, | ||
424 | .flags = IORESOURCE_IRQ, | ||
425 | }, | ||
426 | { | ||
427 | /* IRQ for channels 0-5 */ | ||
428 | .start = 240, | ||
429 | .end = 245, | ||
430 | .flags = IORESOURCE_IRQ, | ||
431 | }, | ||
432 | }; | ||
433 | |||
434 | /* Resource order important! */ | ||
435 | static struct resource sh7372_dmae1_resources[] = { | ||
436 | { | ||
437 | /* Channel registers and DMAOR */ | ||
438 | .start = 0xfe018020, | ||
439 | .end = 0xfe01808f, | ||
440 | .flags = IORESOURCE_MEM, | ||
441 | }, | ||
442 | { | ||
443 | /* DMARSx */ | ||
444 | .start = 0xfe019000, | ||
445 | .end = 0xfe01900b, | ||
446 | .flags = IORESOURCE_MEM, | ||
447 | }, | ||
448 | { | ||
449 | /* DMA error IRQ */ | ||
450 | .start = 254, | ||
451 | .end = 254, | ||
452 | .flags = IORESOURCE_IRQ, | ||
453 | }, | ||
454 | { | ||
455 | /* IRQ for channels 0-5 */ | ||
456 | .start = 248, | ||
457 | .end = 253, | ||
458 | .flags = IORESOURCE_IRQ, | ||
459 | }, | ||
460 | }; | ||
461 | |||
462 | /* Resource order important! */ | ||
463 | static struct resource sh7372_dmae2_resources[] = { | ||
464 | { | ||
465 | /* Channel registers and DMAOR */ | ||
466 | .start = 0xfe028020, | ||
467 | .end = 0xfe02808f, | ||
468 | .flags = IORESOURCE_MEM, | ||
469 | }, | ||
470 | { | ||
471 | /* DMARSx */ | ||
472 | .start = 0xfe029000, | ||
473 | .end = 0xfe02900b, | ||
474 | .flags = IORESOURCE_MEM, | ||
475 | }, | ||
476 | { | ||
477 | /* DMA error IRQ */ | ||
478 | .start = 262, | ||
479 | .end = 262, | ||
480 | .flags = IORESOURCE_IRQ, | ||
481 | }, | ||
482 | { | ||
483 | /* IRQ for channels 0-5 */ | ||
484 | .start = 256, | ||
485 | .end = 261, | ||
486 | .flags = IORESOURCE_IRQ, | ||
487 | }, | ||
488 | }; | ||
489 | |||
490 | static struct platform_device dma0_device = { | ||
491 | .name = "sh-dma-engine", | ||
492 | .id = 0, | ||
493 | .resource = sh7372_dmae0_resources, | ||
494 | .num_resources = ARRAY_SIZE(sh7372_dmae0_resources), | ||
495 | .dev = { | ||
496 | .platform_data = &dma_platform_data, | ||
497 | }, | ||
498 | }; | ||
499 | |||
500 | static struct platform_device dma1_device = { | ||
501 | .name = "sh-dma-engine", | ||
502 | .id = 1, | ||
503 | .resource = sh7372_dmae1_resources, | ||
504 | .num_resources = ARRAY_SIZE(sh7372_dmae1_resources), | ||
505 | .dev = { | ||
506 | .platform_data = &dma_platform_data, | ||
507 | }, | ||
508 | }; | ||
509 | |||
510 | static struct platform_device dma2_device = { | ||
511 | .name = "sh-dma-engine", | ||
512 | .id = 2, | ||
513 | .resource = sh7372_dmae2_resources, | ||
514 | .num_resources = ARRAY_SIZE(sh7372_dmae2_resources), | ||
515 | .dev = { | ||
516 | .platform_data = &dma_platform_data, | ||
517 | }, | ||
518 | }; | ||
519 | |||
172 | static struct platform_device *sh7372_early_devices[] __initdata = { | 520 | static struct platform_device *sh7372_early_devices[] __initdata = { |
173 | &scif0_device, | 521 | &scif0_device, |
174 | &scif1_device, | 522 | &scif1_device, |
@@ -178,6 +526,11 @@ static struct platform_device *sh7372_early_devices[] __initdata = { | |||
178 | &scif5_device, | 526 | &scif5_device, |
179 | &scif6_device, | 527 | &scif6_device, |
180 | &cmt10_device, | 528 | &cmt10_device, |
529 | &iic0_device, | ||
530 | &iic1_device, | ||
531 | &dma0_device, | ||
532 | &dma1_device, | ||
533 | &dma2_device, | ||
181 | }; | 534 | }; |
182 | 535 | ||
183 | void __init sh7372_add_standard_devices(void) | 536 | void __init sh7372_add_standard_devices(void) |
@@ -186,14 +539,8 @@ void __init sh7372_add_standard_devices(void) | |||
186 | ARRAY_SIZE(sh7372_early_devices)); | 539 | ARRAY_SIZE(sh7372_early_devices)); |
187 | } | 540 | } |
188 | 541 | ||
189 | #define SMSTPCR3 0xe615013c | ||
190 | #define SMSTPCR3_CMT1 (1 << 29) | ||
191 | |||
192 | void __init sh7372_add_early_devices(void) | 542 | void __init sh7372_add_early_devices(void) |
193 | { | 543 | { |
194 | /* enable clock to CMT1 */ | ||
195 | __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3); | ||
196 | |||
197 | early_platform_add_devices(sh7372_early_devices, | 544 | early_platform_add_devices(sh7372_early_devices, |
198 | ARRAY_SIZE(sh7372_early_devices)); | 545 | ARRAY_SIZE(sh7372_early_devices)); |
199 | } | 546 | } |
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c index 60e37774c35c..bb4adf17dbf4 100644 --- a/arch/arm/mach-shmobile/setup-sh7377.c +++ b/arch/arm/mach-shmobile/setup-sh7377.c | |||
@@ -32,11 +32,13 @@ | |||
32 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
33 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
34 | 34 | ||
35 | /* SCIFA0 */ | ||
35 | static struct plat_sci_port scif0_platform_data = { | 36 | static struct plat_sci_port scif0_platform_data = { |
36 | .mapbase = 0xe6c40000, | 37 | .mapbase = 0xe6c40000, |
37 | .flags = UPF_BOOT_AUTOCONF, | 38 | .flags = UPF_BOOT_AUTOCONF, |
38 | .type = PORT_SCIF, | 39 | .type = PORT_SCIF, |
39 | .irqs = { 80, 80, 80, 80 }, | 40 | .irqs = { evt2irq(0xc00), evt2irq(0xc00), |
41 | evt2irq(0xc00), evt2irq(0xc00) }, | ||
40 | }; | 42 | }; |
41 | 43 | ||
42 | static struct platform_device scif0_device = { | 44 | static struct platform_device scif0_device = { |
@@ -47,11 +49,13 @@ static struct platform_device scif0_device = { | |||
47 | }, | 49 | }, |
48 | }; | 50 | }; |
49 | 51 | ||
52 | /* SCIFA1 */ | ||
50 | static struct plat_sci_port scif1_platform_data = { | 53 | static struct plat_sci_port scif1_platform_data = { |
51 | .mapbase = 0xe6c50000, | 54 | .mapbase = 0xe6c50000, |
52 | .flags = UPF_BOOT_AUTOCONF, | 55 | .flags = UPF_BOOT_AUTOCONF, |
53 | .type = PORT_SCIF, | 56 | .type = PORT_SCIF, |
54 | .irqs = { 81, 81, 81, 81 }, | 57 | .irqs = { evt2irq(0xc20), evt2irq(0xc20), |
58 | evt2irq(0xc20), evt2irq(0xc20) }, | ||
55 | }; | 59 | }; |
56 | 60 | ||
57 | static struct platform_device scif1_device = { | 61 | static struct platform_device scif1_device = { |
@@ -62,11 +66,13 @@ static struct platform_device scif1_device = { | |||
62 | }, | 66 | }, |
63 | }; | 67 | }; |
64 | 68 | ||
69 | /* SCIFA2 */ | ||
65 | static struct plat_sci_port scif2_platform_data = { | 70 | static struct plat_sci_port scif2_platform_data = { |
66 | .mapbase = 0xe6c60000, | 71 | .mapbase = 0xe6c60000, |
67 | .flags = UPF_BOOT_AUTOCONF, | 72 | .flags = UPF_BOOT_AUTOCONF, |
68 | .type = PORT_SCIF, | 73 | .type = PORT_SCIF, |
69 | .irqs = { 82, 82, 82, 82 }, | 74 | .irqs = { evt2irq(0xc40), evt2irq(0xc40), |
75 | evt2irq(0xc40), evt2irq(0xc40) }, | ||
70 | }; | 76 | }; |
71 | 77 | ||
72 | static struct platform_device scif2_device = { | 78 | static struct platform_device scif2_device = { |
@@ -77,11 +83,13 @@ static struct platform_device scif2_device = { | |||
77 | }, | 83 | }, |
78 | }; | 84 | }; |
79 | 85 | ||
86 | /* SCIFA3 */ | ||
80 | static struct plat_sci_port scif3_platform_data = { | 87 | static struct plat_sci_port scif3_platform_data = { |
81 | .mapbase = 0xe6c70000, | 88 | .mapbase = 0xe6c70000, |
82 | .flags = UPF_BOOT_AUTOCONF, | 89 | .flags = UPF_BOOT_AUTOCONF, |
83 | .type = PORT_SCIF, | 90 | .type = PORT_SCIF, |
84 | .irqs = { 83, 83, 83, 83 }, | 91 | .irqs = { evt2irq(0xc60), evt2irq(0xc60), |
92 | evt2irq(0xc60), evt2irq(0xc60) }, | ||
85 | }; | 93 | }; |
86 | 94 | ||
87 | static struct platform_device scif3_device = { | 95 | static struct platform_device scif3_device = { |
@@ -92,11 +100,13 @@ static struct platform_device scif3_device = { | |||
92 | }, | 100 | }, |
93 | }; | 101 | }; |
94 | 102 | ||
103 | /* SCIFA4 */ | ||
95 | static struct plat_sci_port scif4_platform_data = { | 104 | static struct plat_sci_port scif4_platform_data = { |
96 | .mapbase = 0xe6c80000, | 105 | .mapbase = 0xe6c80000, |
97 | .flags = UPF_BOOT_AUTOCONF, | 106 | .flags = UPF_BOOT_AUTOCONF, |
98 | .type = PORT_SCIF, | 107 | .type = PORT_SCIF, |
99 | .irqs = { 89, 89, 89, 89 }, | 108 | .irqs = { evt2irq(0xd20), evt2irq(0xd20), |
109 | evt2irq(0xd20), evt2irq(0xd20) }, | ||
100 | }; | 110 | }; |
101 | 111 | ||
102 | static struct platform_device scif4_device = { | 112 | static struct platform_device scif4_device = { |
@@ -107,11 +117,13 @@ static struct platform_device scif4_device = { | |||
107 | }, | 117 | }, |
108 | }; | 118 | }; |
109 | 119 | ||
120 | /* SCIFA5 */ | ||
110 | static struct plat_sci_port scif5_platform_data = { | 121 | static struct plat_sci_port scif5_platform_data = { |
111 | .mapbase = 0xe6cb0000, | 122 | .mapbase = 0xe6cb0000, |
112 | .flags = UPF_BOOT_AUTOCONF, | 123 | .flags = UPF_BOOT_AUTOCONF, |
113 | .type = PORT_SCIF, | 124 | .type = PORT_SCIF, |
114 | .irqs = { 90, 90, 90, 90 }, | 125 | .irqs = { evt2irq(0xd40), evt2irq(0xd40), |
126 | evt2irq(0xd40), evt2irq(0xd40) }, | ||
115 | }; | 127 | }; |
116 | 128 | ||
117 | static struct platform_device scif5_device = { | 129 | static struct platform_device scif5_device = { |
@@ -122,11 +134,13 @@ static struct platform_device scif5_device = { | |||
122 | }, | 134 | }, |
123 | }; | 135 | }; |
124 | 136 | ||
137 | /* SCIFA6 */ | ||
125 | static struct plat_sci_port scif6_platform_data = { | 138 | static struct plat_sci_port scif6_platform_data = { |
126 | .mapbase = 0xe6cc0000, | 139 | .mapbase = 0xe6cc0000, |
127 | .flags = UPF_BOOT_AUTOCONF, | 140 | .flags = UPF_BOOT_AUTOCONF, |
128 | .type = PORT_SCIF, | 141 | .type = PORT_SCIF, |
129 | .irqs = { 196, 196, 196, 196 }, | 142 | .irqs = { intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80), |
143 | intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80) }, | ||
130 | }; | 144 | }; |
131 | 145 | ||
132 | static struct platform_device scif6_device = { | 146 | static struct platform_device scif6_device = { |
@@ -137,11 +151,13 @@ static struct platform_device scif6_device = { | |||
137 | }, | 151 | }, |
138 | }; | 152 | }; |
139 | 153 | ||
154 | /* SCIFB */ | ||
140 | static struct plat_sci_port scif7_platform_data = { | 155 | static struct plat_sci_port scif7_platform_data = { |
141 | .mapbase = 0xe6c30000, | 156 | .mapbase = 0xe6c30000, |
142 | .flags = UPF_BOOT_AUTOCONF, | 157 | .flags = UPF_BOOT_AUTOCONF, |
143 | .type = PORT_SCIF, | 158 | .type = PORT_SCIF, |
144 | .irqs = { 91, 91, 91, 91 }, | 159 | .irqs = { evt2irq(0xd60), evt2irq(0xd60), |
160 | evt2irq(0xd60), evt2irq(0xd60) }, | ||
145 | }; | 161 | }; |
146 | 162 | ||
147 | static struct platform_device scif7_device = { | 163 | static struct platform_device scif7_device = { |
@@ -169,7 +185,7 @@ static struct resource cmt10_resources[] = { | |||
169 | .flags = IORESOURCE_MEM, | 185 | .flags = IORESOURCE_MEM, |
170 | }, | 186 | }, |
171 | [1] = { | 187 | [1] = { |
172 | .start = 72, | 188 | .start = evt2irq(0xb00), /* CMT1_CMT10 */ |
173 | .flags = IORESOURCE_IRQ, | 189 | .flags = IORESOURCE_IRQ, |
174 | }, | 190 | }, |
175 | }; | 191 | }; |
diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h index 4f8f99aac938..b5e75bb44965 100644 --- a/arch/arm/mach-versatile/include/mach/hardware.h +++ b/arch/arm/mach-versatile/include/mach/hardware.h | |||
@@ -30,15 +30,6 @@ | |||
30 | #define VERSATILE_PCI_VIRT_BASE (void __iomem *)0xe8000000ul | 30 | #define VERSATILE_PCI_VIRT_BASE (void __iomem *)0xe8000000ul |
31 | #define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xe9000000ul | 31 | #define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xe9000000ul |
32 | 32 | ||
33 | #if 0 | ||
34 | #define VERSATILE_PCI_VIRT_MEM_BASE0 0xf4000000 | ||
35 | #define VERSATILE_PCI_VIRT_MEM_BASE1 0xf5000000 | ||
36 | #define VERSATILE_PCI_VIRT_MEM_BASE2 0xf6000000 | ||
37 | |||
38 | #define PCIO_BASE VERSATILE_PCI_VIRT_MEM_BASE0 | ||
39 | #define PCIMEM_BASE VERSATILE_PCI_VIRT_MEM_BASE1 | ||
40 | #endif | ||
41 | |||
42 | /* CIK guesswork */ | 33 | /* CIK guesswork */ |
43 | #define PCIBIOS_MIN_IO 0x44000000 | 34 | #define PCIBIOS_MIN_IO 0x44000000 |
44 | #define PCIBIOS_MIN_MEM 0x50000000 | 35 | #define PCIBIOS_MIN_MEM 0x50000000 |
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index e1fd98fff8fa..33c3f570aaa0 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -771,8 +771,8 @@ config CACHE_L2X0 | |||
771 | bool "Enable the L2x0 outer cache controller" | 771 | bool "Enable the L2x0 outer cache controller" |
772 | depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ | 772 | depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ |
773 | REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \ | 773 | REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \ |
774 | ARCH_NOMADIK || ARCH_OMAP4 || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ | 774 | ARCH_NOMADIK || ARCH_OMAP4 || ARCH_S5PV310 || ARCH_TEGRA || \ |
775 | ARCH_TEGRA | 775 | ARCH_U8500 || ARCH_VEXPRESS_CA9X4 |
776 | default y | 776 | default y |
777 | select OUTER_CACHE | 777 | select OUTER_CACHE |
778 | select OUTER_CACHE_SYNC | 778 | select OUTER_CACHE_SYNC |
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile index a17cc0c6a6b0..4aacdd12c9cc 100644 --- a/arch/arm/plat-pxa/Makefile +++ b/arch/arm/plat-pxa/Makefile | |||
@@ -4,7 +4,6 @@ | |||
4 | 4 | ||
5 | obj-y := dma.o | 5 | obj-y := dma.o |
6 | 6 | ||
7 | obj-$(CONFIG_ARCH_PXA) += pmu.o | ||
8 | obj-$(CONFIG_GENERIC_GPIO) += gpio.o | 7 | obj-$(CONFIG_GENERIC_GPIO) += gpio.o |
9 | obj-$(CONFIG_PXA3xx) += mfp.o | 8 | obj-$(CONFIG_PXA3xx) += mfp.o |
10 | obj-$(CONFIG_ARCH_MMP) += mfp.o | 9 | obj-$(CONFIG_ARCH_MMP) += mfp.o |
diff --git a/arch/arm/plat-pxa/pmu.c b/arch/arm/plat-pxa/pmu.c deleted file mode 100644 index 267ceb6feb2f..000000000000 --- a/arch/arm/plat-pxa/pmu.c +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * PMU IRQ registration for the PXA xscale PMU families. | ||
3 | * Copyright (C) 2010 Will Deacon, ARM Ltd. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <asm/pmu.h> | ||
13 | #include <mach/irqs.h> | ||
14 | |||
15 | static struct resource pmu_resource = { | ||
16 | .start = IRQ_PMU, | ||
17 | .end = IRQ_PMU, | ||
18 | .flags = IORESOURCE_IRQ, | ||
19 | }; | ||
20 | |||
21 | static struct platform_device pmu_device = { | ||
22 | .name = "arm-pmu", | ||
23 | .id = ARM_PMU_DEVICE_CPU, | ||
24 | .resource = &pmu_resource, | ||
25 | .num_resources = 1, | ||
26 | }; | ||
27 | |||
28 | static int __init pxa_pmu_init(void) | ||
29 | { | ||
30 | platform_device_register(&pmu_device); | ||
31 | return 0; | ||
32 | } | ||
33 | arch_initcall(pxa_pmu_init); | ||
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig index 11d6a1bbd90d..c6a855db2fb6 100644 --- a/arch/arm/plat-s5p/Kconfig +++ b/arch/arm/plat-s5p/Kconfig | |||
@@ -7,9 +7,10 @@ | |||
7 | 7 | ||
8 | config PLAT_S5P | 8 | config PLAT_S5P |
9 | bool | 9 | bool |
10 | depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210) | 10 | depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310) |
11 | default y | 11 | default y |
12 | select ARM_VIC | 12 | select ARM_VIC if !ARCH_S5PV310 |
13 | select ARM_GIC if ARCH_S5PV310 | ||
13 | select NO_IOPORT | 14 | select NO_IOPORT |
14 | select ARCH_REQUIRE_GPIOLIB | 15 | select ARCH_REQUIRE_GPIOLIB |
15 | select S3C_GPIO_TRACK | 16 | select S3C_GPIO_TRACK |
@@ -30,3 +31,18 @@ config S5P_EXT_INT | |||
30 | help | 31 | help |
31 | Use the external interrupts (other than GPIO interrupts.) | 32 | Use the external interrupts (other than GPIO interrupts.) |
32 | Note: Do not choose this for S5P6440. | 33 | Note: Do not choose this for S5P6440. |
34 | |||
35 | config S5P_DEV_FIMC0 | ||
36 | bool | ||
37 | help | ||
38 | Compile in platform device definitions for FIMC controller 0 | ||
39 | |||
40 | config S5P_DEV_FIMC1 | ||
41 | bool | ||
42 | help | ||
43 | Compile in platform device definitions for FIMC controller 1 | ||
44 | |||
45 | config S5P_DEV_FIMC2 | ||
46 | bool | ||
47 | help | ||
48 | Compile in platform device definitions for FIMC controller 2 | ||
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile index 39c242bb9d58..b2e029673950 100644 --- a/arch/arm/plat-s5p/Makefile +++ b/arch/arm/plat-s5p/Makefile | |||
@@ -12,9 +12,15 @@ obj- := | |||
12 | 12 | ||
13 | # Core files | 13 | # Core files |
14 | 14 | ||
15 | obj-y += dev-pmu.o | ||
15 | obj-y += dev-uart.o | 16 | obj-y += dev-uart.o |
16 | obj-y += cpu.o | 17 | obj-y += cpu.o |
17 | obj-y += clock.o | 18 | obj-y += clock.o |
18 | obj-y += irq.o | 19 | obj-y += irq.o |
19 | obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o | 20 | obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o |
20 | 21 | ||
22 | # devices | ||
23 | |||
24 | obj-$(CONFIG_S5P_DEV_FIMC0) += dev-fimc0.o | ||
25 | obj-$(CONFIG_S5P_DEV_FIMC1) += dev-fimc1.o | ||
26 | obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o | ||
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c index 75cb8c37ca2c..b07a078fd284 100644 --- a/arch/arm/plat-s5p/cpu.c +++ b/arch/arm/plat-s5p/cpu.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <plat/s5p6442.h> | 21 | #include <plat/s5p6442.h> |
22 | #include <plat/s5pc100.h> | 22 | #include <plat/s5pc100.h> |
23 | #include <plat/s5pv210.h> | 23 | #include <plat/s5pv210.h> |
24 | #include <plat/s5pv310.h> | ||
24 | 25 | ||
25 | /* table of supported CPUs */ | 26 | /* table of supported CPUs */ |
26 | 27 | ||
@@ -28,6 +29,7 @@ static const char name_s5p6440[] = "S5P6440"; | |||
28 | static const char name_s5p6442[] = "S5P6442"; | 29 | static const char name_s5p6442[] = "S5P6442"; |
29 | static const char name_s5pc100[] = "S5PC100"; | 30 | static const char name_s5pc100[] = "S5PC100"; |
30 | static const char name_s5pv210[] = "S5PV210/S5PC110"; | 31 | static const char name_s5pv210[] = "S5PV210/S5PC110"; |
32 | static const char name_s5pv310[] = "S5PV310"; | ||
31 | 33 | ||
32 | static struct cpu_table cpu_ids[] __initdata = { | 34 | static struct cpu_table cpu_ids[] __initdata = { |
33 | { | 35 | { |
@@ -62,6 +64,14 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
62 | .init_uarts = s5pv210_init_uarts, | 64 | .init_uarts = s5pv210_init_uarts, |
63 | .init = s5pv210_init, | 65 | .init = s5pv210_init, |
64 | .name = name_s5pv210, | 66 | .name = name_s5pv210, |
67 | }, { | ||
68 | .idcode = 0x43200000, | ||
69 | .idmask = 0xfffff000, | ||
70 | .map_io = s5pv310_map_io, | ||
71 | .init_clocks = s5pv310_init_clocks, | ||
72 | .init_uarts = s5pv310_init_uarts, | ||
73 | .init = s5pv310_init, | ||
74 | .name = name_s5pv310, | ||
65 | }, | 75 | }, |
66 | }; | 76 | }; |
67 | 77 | ||
@@ -81,8 +91,9 @@ static struct map_desc s5p_iodesc[] __initdata = { | |||
81 | }, { | 91 | }, { |
82 | .virtual = (unsigned long)S3C_VA_UART, | 92 | .virtual = (unsigned long)S3C_VA_UART, |
83 | .pfn = __phys_to_pfn(S3C_PA_UART), | 93 | .pfn = __phys_to_pfn(S3C_PA_UART), |
84 | .length = SZ_4K, | 94 | .length = SZ_512K, |
85 | .type = MT_DEVICE, | 95 | .type = MT_DEVICE, |
96 | #ifdef CONFIG_ARM_VIC | ||
86 | }, { | 97 | }, { |
87 | .virtual = (unsigned long)VA_VIC0, | 98 | .virtual = (unsigned long)VA_VIC0, |
88 | .pfn = __phys_to_pfn(S5P_PA_VIC0), | 99 | .pfn = __phys_to_pfn(S5P_PA_VIC0), |
@@ -93,6 +104,7 @@ static struct map_desc s5p_iodesc[] __initdata = { | |||
93 | .pfn = __phys_to_pfn(S5P_PA_VIC1), | 104 | .pfn = __phys_to_pfn(S5P_PA_VIC1), |
94 | .length = SZ_16K, | 105 | .length = SZ_16K, |
95 | .type = MT_DEVICE, | 106 | .type = MT_DEVICE, |
107 | #endif | ||
96 | }, { | 108 | }, { |
97 | .virtual = (unsigned long)S3C_VA_TIMER, | 109 | .virtual = (unsigned long)S3C_VA_TIMER, |
98 | .pfn = __phys_to_pfn(S5P_PA_TIMER), | 110 | .pfn = __phys_to_pfn(S5P_PA_TIMER), |
@@ -103,6 +115,11 @@ static struct map_desc s5p_iodesc[] __initdata = { | |||
103 | .pfn = __phys_to_pfn(S5P_PA_GPIO), | 115 | .pfn = __phys_to_pfn(S5P_PA_GPIO), |
104 | .length = SZ_4K, | 116 | .length = SZ_4K, |
105 | .type = MT_DEVICE, | 117 | .type = MT_DEVICE, |
118 | }, { | ||
119 | .virtual = (unsigned long)S3C_VA_WATCHDOG, | ||
120 | .pfn = __phys_to_pfn(S3C_PA_WDT), | ||
121 | .length = SZ_4K, | ||
122 | .type = MT_DEVICE, | ||
106 | }, | 123 | }, |
107 | }; | 124 | }; |
108 | 125 | ||
diff --git a/arch/arm/plat-s5p/dev-fimc0.c b/arch/arm/plat-s5p/dev-fimc0.c new file mode 100644 index 000000000000..d3f1a9b5d2b5 --- /dev/null +++ b/arch/arm/plat-s5p/dev-fimc0.c | |||
@@ -0,0 +1,36 @@ | |||
1 | /* linux/arch/arm/plat-s5p/dev-fimc0.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics | ||
4 | * | ||
5 | * Base S5P FIMC0 resource and device definitions | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/ioport.h> | ||
16 | #include <mach/map.h> | ||
17 | |||
18 | static struct resource s5p_fimc0_resource[] = { | ||
19 | [0] = { | ||
20 | .start = S5P_PA_FIMC0, | ||
21 | .end = S5P_PA_FIMC0 + SZ_1M - 1, | ||
22 | .flags = IORESOURCE_MEM, | ||
23 | }, | ||
24 | [1] = { | ||
25 | .start = IRQ_FIMC0, | ||
26 | .end = IRQ_FIMC0, | ||
27 | .flags = IORESOURCE_IRQ, | ||
28 | }, | ||
29 | }; | ||
30 | |||
31 | struct platform_device s5p_device_fimc0 = { | ||
32 | .name = "s5p-fimc", | ||
33 | .id = 0, | ||
34 | .num_resources = ARRAY_SIZE(s5p_fimc0_resource), | ||
35 | .resource = s5p_fimc0_resource, | ||
36 | }; | ||
diff --git a/arch/arm/plat-s5p/dev-fimc1.c b/arch/arm/plat-s5p/dev-fimc1.c new file mode 100644 index 000000000000..41bd6986d0ad --- /dev/null +++ b/arch/arm/plat-s5p/dev-fimc1.c | |||
@@ -0,0 +1,36 @@ | |||
1 | /* linux/arch/arm/plat-s5p/dev-fimc1.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics | ||
4 | * | ||
5 | * Base S5P FIMC1 resource and device definitions | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/ioport.h> | ||
16 | #include <mach/map.h> | ||
17 | |||
18 | static struct resource s5p_fimc1_resource[] = { | ||
19 | [0] = { | ||
20 | .start = S5P_PA_FIMC1, | ||
21 | .end = S5P_PA_FIMC1 + SZ_1M - 1, | ||
22 | .flags = IORESOURCE_MEM, | ||
23 | }, | ||
24 | [1] = { | ||
25 | .start = IRQ_FIMC1, | ||
26 | .end = IRQ_FIMC1, | ||
27 | .flags = IORESOURCE_IRQ, | ||
28 | }, | ||
29 | }; | ||
30 | |||
31 | struct platform_device s5p_device_fimc1 = { | ||
32 | .name = "s5p-fimc", | ||
33 | .id = 1, | ||
34 | .num_resources = ARRAY_SIZE(s5p_fimc1_resource), | ||
35 | .resource = s5p_fimc1_resource, | ||
36 | }; | ||
diff --git a/arch/arm/plat-s5p/dev-fimc2.c b/arch/arm/plat-s5p/dev-fimc2.c new file mode 100644 index 000000000000..dfddeda6d4a3 --- /dev/null +++ b/arch/arm/plat-s5p/dev-fimc2.c | |||
@@ -0,0 +1,36 @@ | |||
1 | /* linux/arch/arm/plat-s5p/dev-fimc2.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics | ||
4 | * | ||
5 | * Base S5P FIMC2 resource and device definitions | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/ioport.h> | ||
16 | #include <mach/map.h> | ||
17 | |||
18 | static struct resource s5p_fimc2_resource[] = { | ||
19 | [0] = { | ||
20 | .start = S5P_PA_FIMC2, | ||
21 | .end = S5P_PA_FIMC2 + SZ_1M - 1, | ||
22 | .flags = IORESOURCE_MEM, | ||
23 | }, | ||
24 | [1] = { | ||
25 | .start = IRQ_FIMC2, | ||
26 | .end = IRQ_FIMC2, | ||
27 | .flags = IORESOURCE_IRQ, | ||
28 | }, | ||
29 | }; | ||
30 | |||
31 | struct platform_device s5p_device_fimc2 = { | ||
32 | .name = "s5p-fimc", | ||
33 | .id = 2, | ||
34 | .num_resources = ARRAY_SIZE(s5p_fimc2_resource), | ||
35 | .resource = s5p_fimc2_resource, | ||
36 | }; | ||
diff --git a/arch/arm/plat-s5p/dev-pmu.c b/arch/arm/plat-s5p/dev-pmu.c new file mode 100644 index 000000000000..a08576da72b0 --- /dev/null +++ b/arch/arm/plat-s5p/dev-pmu.c | |||
@@ -0,0 +1,36 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/plat-s5p/dev-pmu.c | ||
3 | * | ||
4 | * Copyright (C) 2010 Samsung Electronics Co.Ltd | ||
5 | * Author: Joonyoung Shim <jy0922.shim@samsung.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/platform_device.h> | ||
15 | #include <asm/pmu.h> | ||
16 | #include <mach/irqs.h> | ||
17 | |||
18 | static struct resource s5p_pmu_resource = { | ||
19 | .start = IRQ_PMU, | ||
20 | .end = IRQ_PMU, | ||
21 | .flags = IORESOURCE_IRQ, | ||
22 | }; | ||
23 | |||
24 | struct platform_device s5p_device_pmu = { | ||
25 | .name = "arm-pmu", | ||
26 | .id = ARM_PMU_DEVICE_CPU, | ||
27 | .num_resources = 1, | ||
28 | .resource = &s5p_pmu_resource, | ||
29 | }; | ||
30 | |||
31 | static int __init s5p_pmu_init(void) | ||
32 | { | ||
33 | platform_device_register(&s5p_device_pmu); | ||
34 | return 0; | ||
35 | } | ||
36 | arch_initcall(s5p_pmu_init); | ||
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h index 14828521f70c..54e9fb9d315e 100644 --- a/arch/arm/plat-s5p/include/plat/map-s5p.h +++ b/arch/arm/plat-s5p/include/plat/map-s5p.h | |||
@@ -18,12 +18,27 @@ | |||
18 | #define S5P_VA_SYSTIMER S3C_ADDR(0x01200000) | 18 | #define S5P_VA_SYSTIMER S3C_ADDR(0x01200000) |
19 | #define S5P_VA_SROMC S3C_ADDR(0x01100000) | 19 | #define S5P_VA_SROMC S3C_ADDR(0x01100000) |
20 | 20 | ||
21 | #define S5P_VA_UART0 (S3C_VA_UART + 0x0) | 21 | #define S5P_VA_COMBINER_BASE S3C_ADDR(0x00600000) |
22 | #define S5P_VA_UART1 (S3C_VA_UART + 0x400) | 22 | #define S5P_VA_COMBINER(x) (S5P_VA_COMBINER_BASE + ((x) >> 2) * 0x10) |
23 | #define S5P_VA_UART2 (S3C_VA_UART + 0x800) | ||
24 | #define S5P_VA_UART3 (S3C_VA_UART + 0xC00) | ||
25 | 23 | ||
24 | #define S5P_VA_COREPERI_BASE S3C_ADDR(0x00800000) | ||
25 | #define S5P_VA_COREPERI(x) (S5P_VA_COREPERI_BASE + (x)) | ||
26 | #define S5P_VA_SCU S5P_VA_COREPERI(0x0) | ||
27 | #define S5P_VA_GIC_CPU S5P_VA_COREPERI(0x100) | ||
28 | #define S5P_VA_TWD S5P_VA_COREPERI(0x600) | ||
29 | #define S5P_VA_GIC_DIST S5P_VA_COREPERI(0x1000) | ||
30 | |||
31 | #define S5P_VA_L2CC S3C_ADDR(0x00900000) | ||
32 | |||
33 | #define S5P_VA_UART(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) | ||
34 | #define S5P_VA_UART0 S5P_VA_UART(0) | ||
35 | #define S5P_VA_UART1 S5P_VA_UART(1) | ||
36 | #define S5P_VA_UART2 S5P_VA_UART(2) | ||
37 | #define S5P_VA_UART3 S5P_VA_UART(3) | ||
38 | |||
39 | #ifndef S3C_UART_OFFSET | ||
26 | #define S3C_UART_OFFSET (0x400) | 40 | #define S3C_UART_OFFSET (0x400) |
41 | #endif | ||
27 | 42 | ||
28 | #define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000)) | 43 | #define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000)) |
29 | #define VA_VIC0 VA_VIC(0) | 44 | #define VA_VIC0 VA_VIC(0) |
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h index 7db322726bc2..4e8fe08cb70d 100644 --- a/arch/arm/plat-s5p/include/plat/pll.h +++ b/arch/arm/plat-s5p/include/plat/pll.h | |||
@@ -46,6 +46,47 @@ static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con, | |||
46 | return (unsigned long)fvco; | 46 | return (unsigned long)fvco; |
47 | } | 47 | } |
48 | 48 | ||
49 | #define PLL46XX_KDIV_MASK (0xFFFF) | ||
50 | #define PLL46XX_MDIV_MASK (0x1FF) | ||
51 | #define PLL46XX_PDIV_MASK (0x3F) | ||
52 | #define PLL46XX_SDIV_MASK (0x7) | ||
53 | #define PLL46XX_MDIV_SHIFT (16) | ||
54 | #define PLL46XX_PDIV_SHIFT (8) | ||
55 | #define PLL46XX_SDIV_SHIFT (0) | ||
56 | |||
57 | enum pll46xx_type_t { | ||
58 | pll_4600, | ||
59 | pll_4650, | ||
60 | }; | ||
61 | |||
62 | static inline unsigned long s5p_get_pll46xx(unsigned long baseclk, | ||
63 | u32 pll_con0, u32 pll_con1, | ||
64 | enum pll46xx_type_t pll_type) | ||
65 | { | ||
66 | unsigned long result; | ||
67 | u32 mdiv, pdiv, sdiv, kdiv; | ||
68 | u64 tmp; | ||
69 | |||
70 | mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK; | ||
71 | pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK; | ||
72 | sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK; | ||
73 | kdiv = pll_con1 & PLL46XX_KDIV_MASK; | ||
74 | |||
75 | tmp = baseclk; | ||
76 | |||
77 | if (pll_type == pll_4600) { | ||
78 | tmp *= (mdiv << 16) + kdiv; | ||
79 | do_div(tmp, (pdiv << sdiv)); | ||
80 | result = tmp >> 16; | ||
81 | } else { | ||
82 | tmp *= (mdiv << 10) + kdiv; | ||
83 | do_div(tmp, (pdiv << sdiv)); | ||
84 | result = tmp >> 10; | ||
85 | } | ||
86 | |||
87 | return result; | ||
88 | } | ||
89 | |||
49 | #define PLL90XX_MDIV_MASK (0xFF) | 90 | #define PLL90XX_MDIV_MASK (0xFF) |
50 | #define PLL90XX_PDIV_MASK (0x3F) | 91 | #define PLL90XX_PDIV_MASK (0x3F) |
51 | #define PLL90XX_SDIV_MASK (0x7) | 92 | #define PLL90XX_SDIV_MASK (0x7) |
diff --git a/arch/arm/plat-s5p/include/plat/reset.h b/arch/arm/plat-s5p/include/plat/reset.h new file mode 100644 index 000000000000..335e97812eed --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/reset.h | |||
@@ -0,0 +1,16 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/reset.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_PLAT_S5P_RESET_H | ||
12 | #define __ASM_PLAT_S5P_RESET_H __FILE__ | ||
13 | |||
14 | extern void (*s5p_reset_hook)(void); | ||
15 | |||
16 | #endif /* __ASM_PLAT_S5P_RESET_H */ | ||
diff --git a/arch/arm/plat-s5p/include/plat/s5pv310.h b/arch/arm/plat-s5p/include/plat/s5pv310.h new file mode 100644 index 000000000000..769c991ceb37 --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/s5pv310.h | |||
@@ -0,0 +1,34 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/s5pv310.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Header file for s5pv310 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for S5PV310 related SoCs */ | ||
14 | |||
15 | extern void s5pv310_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
16 | extern void s5pv310_register_clocks(void); | ||
17 | extern void s5pv310_setup_clocks(void); | ||
18 | |||
19 | #ifdef CONFIG_CPU_S5PV310 | ||
20 | |||
21 | extern int s5pv310_init(void); | ||
22 | extern void s5pv310_init_irq(void); | ||
23 | extern void s5pv310_map_io(void); | ||
24 | extern void s5pv310_init_clocks(int xtal); | ||
25 | extern struct sys_timer s5pv310_timer; | ||
26 | |||
27 | #define s5pv310_init_uarts s5pv310_common_init_uarts | ||
28 | |||
29 | #else | ||
30 | #define s5pv310_init_clocks NULL | ||
31 | #define s5pv310_init_uarts NULL | ||
32 | #define s5pv310_map_io NULL | ||
33 | #define s5pv310_init NULL | ||
34 | #endif | ||
diff --git a/arch/arm/plat-s5p/include/plat/system-reset.h b/arch/arm/plat-s5p/include/plat/system-reset.h new file mode 100644 index 000000000000..f307f34e6422 --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/system-reset.h | |||
@@ -0,0 +1,31 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/system-reset.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Based on arch/arm/mach-s3c2410/include/mach/system-reset.h | ||
7 | * | ||
8 | * S5P - System define for arch_reset() | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <plat/watchdog-reset.h> | ||
16 | |||
17 | void (*s5p_reset_hook)(void); | ||
18 | |||
19 | static void arch_reset(char mode, const char *cmd) | ||
20 | { | ||
21 | /* SWRESET support in s5p_reset_hook() */ | ||
22 | |||
23 | if (s5p_reset_hook) | ||
24 | s5p_reset_hook(); | ||
25 | |||
26 | /* Perform reset using Watchdog reset | ||
27 | * if there is no s5p_reset_hook() | ||
28 | */ | ||
29 | |||
30 | arch_wdt_reset(); | ||
31 | } | ||
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c index 25e1eb6de59e..5560b12035d1 100644 --- a/arch/arm/plat-s5p/irq.c +++ b/arch/arm/plat-s5p/irq.c | |||
@@ -56,11 +56,13 @@ static struct s3c_uart_irq uart_irqs[] = { | |||
56 | 56 | ||
57 | void __init s5p_init_irq(u32 *vic, u32 num_vic) | 57 | void __init s5p_init_irq(u32 *vic, u32 num_vic) |
58 | { | 58 | { |
59 | #ifdef CONFIG_ARM_VIC | ||
59 | int irq; | 60 | int irq; |
60 | 61 | ||
61 | /* initialize the VICs */ | 62 | /* initialize the VICs */ |
62 | for (irq = 0; irq < num_vic; irq++) | 63 | for (irq = 0; irq < num_vic; irq++) |
63 | vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0); | 64 | vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0); |
65 | #endif | ||
64 | 66 | ||
65 | s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0); | 67 | s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0); |
66 | s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1); | 68 | s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1); |
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 2753fb3e4f73..4529dd6232bc 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig | |||
@@ -160,6 +160,11 @@ config S3C_DEV_HSMMC2 | |||
160 | help | 160 | help |
161 | Compile in platform device definitions for HSMMC channel 2 | 161 | Compile in platform device definitions for HSMMC channel 2 |
162 | 162 | ||
163 | config S3C_DEV_HSMMC3 | ||
164 | bool | ||
165 | help | ||
166 | Compile in platform device definitions for HSMMC channel 3 | ||
167 | |||
163 | config S3C_DEV_HWMON | 168 | config S3C_DEV_HWMON |
164 | bool | 169 | bool |
165 | help | 170 | help |
@@ -216,6 +221,11 @@ config SAMSUNG_DEV_ADC | |||
216 | help | 221 | help |
217 | Compile in platform device definition for ADC controller | 222 | Compile in platform device definition for ADC controller |
218 | 223 | ||
224 | config SAMSUNG_DEV_IDE | ||
225 | bool | ||
226 | help | ||
227 | Compile in platform device definitions for IDE | ||
228 | |||
219 | config S3C64XX_DEV_SPI | 229 | config S3C64XX_DEV_SPI |
220 | bool | 230 | bool |
221 | help | 231 | help |
@@ -227,6 +237,11 @@ config SAMSUNG_DEV_TS | |||
227 | help | 237 | help |
228 | Common in platform device definitions for touchscreen device | 238 | Common in platform device definitions for touchscreen device |
229 | 239 | ||
240 | config SAMSUNG_DEV_KEYPAD | ||
241 | bool | ||
242 | help | ||
243 | Compile in platform device definitions for keypad | ||
244 | |||
230 | # DMA | 245 | # DMA |
231 | 246 | ||
232 | config S3C_DMA | 247 | config S3C_DMA |
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index b1d82cc5e716..4d8ff923207a 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile | |||
@@ -12,7 +12,7 @@ obj- := | |||
12 | # Objects we always build independent of SoC choice | 12 | # Objects we always build independent of SoC choice |
13 | 13 | ||
14 | obj-y += init.o | 14 | obj-y += init.o |
15 | obj-y += time.o | 15 | obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET) += time.o |
16 | obj-y += clock.o | 16 | obj-y += clock.o |
17 | obj-y += pwm-clock.o | 17 | obj-y += pwm-clock.o |
18 | obj-y += gpio.o | 18 | obj-y += gpio.o |
@@ -30,9 +30,12 @@ obj-$(CONFIG_S3C_ADC) += adc.o | |||
30 | 30 | ||
31 | # devices | 31 | # devices |
32 | 32 | ||
33 | obj-y += platformdata.o | ||
34 | |||
33 | obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o | 35 | obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o |
34 | obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o | 36 | obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o |
35 | obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o | 37 | obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o |
38 | obj-$(CONFIG_S3C_DEV_HSMMC3) += dev-hsmmc3.o | ||
36 | obj-$(CONFIG_S3C_DEV_HWMON) += dev-hwmon.o | 39 | obj-$(CONFIG_S3C_DEV_HWMON) += dev-hwmon.o |
37 | obj-y += dev-i2c0.o | 40 | obj-y += dev-i2c0.o |
38 | obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o | 41 | obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o |
@@ -47,7 +50,9 @@ obj-$(CONFIG_S3C_DEV_ONENAND) += dev-onenand.o | |||
47 | obj-$(CONFIG_S3C_DEV_RTC) += dev-rtc.o | 50 | obj-$(CONFIG_S3C_DEV_RTC) += dev-rtc.o |
48 | 51 | ||
49 | obj-$(CONFIG_SAMSUNG_DEV_ADC) += dev-adc.o | 52 | obj-$(CONFIG_SAMSUNG_DEV_ADC) += dev-adc.o |
53 | obj-$(CONFIG_SAMSUNG_DEV_IDE) += dev-ide.o | ||
50 | obj-$(CONFIG_SAMSUNG_DEV_TS) += dev-ts.o | 54 | obj-$(CONFIG_SAMSUNG_DEV_TS) += dev-ts.o |
55 | obj-$(CONFIG_SAMSUNG_DEV_KEYPAD) += dev-keypad.o | ||
51 | 56 | ||
52 | # DMA support | 57 | # DMA support |
53 | 58 | ||
diff --git a/arch/arm/plat-samsung/dev-hsmmc.c b/arch/arm/plat-samsung/dev-hsmmc.c index 4c05b39810e2..b0f93f11e281 100644 --- a/arch/arm/plat-samsung/dev-hsmmc.c +++ b/arch/arm/plat-samsung/dev-hsmmc.c | |||
@@ -60,6 +60,11 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd) | |||
60 | struct s3c_sdhci_platdata *set = &s3c_hsmmc0_def_platdata; | 60 | struct s3c_sdhci_platdata *set = &s3c_hsmmc0_def_platdata; |
61 | 61 | ||
62 | set->max_width = pd->max_width; | 62 | set->max_width = pd->max_width; |
63 | set->cd_type = pd->cd_type; | ||
64 | set->ext_cd_init = pd->ext_cd_init; | ||
65 | set->ext_cd_cleanup = pd->ext_cd_cleanup; | ||
66 | set->ext_cd_gpio = pd->ext_cd_gpio; | ||
67 | set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert; | ||
63 | 68 | ||
64 | if (pd->cfg_gpio) | 69 | if (pd->cfg_gpio) |
65 | set->cfg_gpio = pd->cfg_gpio; | 70 | set->cfg_gpio = pd->cfg_gpio; |
diff --git a/arch/arm/plat-samsung/dev-hsmmc1.c b/arch/arm/plat-samsung/dev-hsmmc1.c index e49bc4cd0ee6..1504fd802865 100644 --- a/arch/arm/plat-samsung/dev-hsmmc1.c +++ b/arch/arm/plat-samsung/dev-hsmmc1.c | |||
@@ -60,6 +60,11 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd) | |||
60 | struct s3c_sdhci_platdata *set = &s3c_hsmmc1_def_platdata; | 60 | struct s3c_sdhci_platdata *set = &s3c_hsmmc1_def_platdata; |
61 | 61 | ||
62 | set->max_width = pd->max_width; | 62 | set->max_width = pd->max_width; |
63 | set->cd_type = pd->cd_type; | ||
64 | set->ext_cd_init = pd->ext_cd_init; | ||
65 | set->ext_cd_cleanup = pd->ext_cd_cleanup; | ||
66 | set->ext_cd_gpio = pd->ext_cd_gpio; | ||
67 | set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert; | ||
63 | 68 | ||
64 | if (pd->cfg_gpio) | 69 | if (pd->cfg_gpio) |
65 | set->cfg_gpio = pd->cfg_gpio; | 70 | set->cfg_gpio = pd->cfg_gpio; |
diff --git a/arch/arm/plat-samsung/dev-hsmmc2.c b/arch/arm/plat-samsung/dev-hsmmc2.c index 824580bc0e06..b28ef173444d 100644 --- a/arch/arm/plat-samsung/dev-hsmmc2.c +++ b/arch/arm/plat-samsung/dev-hsmmc2.c | |||
@@ -61,6 +61,11 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) | |||
61 | struct s3c_sdhci_platdata *set = &s3c_hsmmc2_def_platdata; | 61 | struct s3c_sdhci_platdata *set = &s3c_hsmmc2_def_platdata; |
62 | 62 | ||
63 | set->max_width = pd->max_width; | 63 | set->max_width = pd->max_width; |
64 | set->cd_type = pd->cd_type; | ||
65 | set->ext_cd_init = pd->ext_cd_init; | ||
66 | set->ext_cd_cleanup = pd->ext_cd_cleanup; | ||
67 | set->ext_cd_gpio = pd->ext_cd_gpio; | ||
68 | set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert; | ||
64 | 69 | ||
65 | if (pd->cfg_gpio) | 70 | if (pd->cfg_gpio) |
66 | set->cfg_gpio = pd->cfg_gpio; | 71 | set->cfg_gpio = pd->cfg_gpio; |
diff --git a/arch/arm/plat-samsung/dev-hsmmc3.c b/arch/arm/plat-samsung/dev-hsmmc3.c new file mode 100644 index 000000000000..85aaf0f2842f --- /dev/null +++ b/arch/arm/plat-samsung/dev-hsmmc3.c | |||
@@ -0,0 +1,77 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-hsmmc3.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright (c) 2008 Simtec Electronics | ||
7 | * Ben Dooks <ben@simtec.co.uk> | ||
8 | * http://armlinux.simtec.co.uk/ | ||
9 | * | ||
10 | * Based on arch/arm/plat-samsung/dev-hsmmc1.c | ||
11 | * | ||
12 | * Samsung device definition for hsmmc device 3 | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License version 2 as | ||
16 | * published by the Free Software Foundation. | ||
17 | */ | ||
18 | |||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/platform_device.h> | ||
21 | #include <linux/mmc/host.h> | ||
22 | |||
23 | #include <mach/map.h> | ||
24 | #include <plat/sdhci.h> | ||
25 | #include <plat/devs.h> | ||
26 | |||
27 | #define S3C_SZ_HSMMC (0x1000) | ||
28 | |||
29 | static struct resource s3c_hsmmc3_resource[] = { | ||
30 | [0] = { | ||
31 | .start = S3C_PA_HSMMC3, | ||
32 | .end = S3C_PA_HSMMC3 + S3C_SZ_HSMMC - 1, | ||
33 | .flags = IORESOURCE_MEM, | ||
34 | }, | ||
35 | [1] = { | ||
36 | .start = IRQ_MMC3, | ||
37 | .end = IRQ_MMC3, | ||
38 | .flags = IORESOURCE_IRQ, | ||
39 | } | ||
40 | }; | ||
41 | |||
42 | static u64 s3c_device_hsmmc3_dmamask = 0xffffffffUL; | ||
43 | |||
44 | struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = { | ||
45 | .max_width = 4, | ||
46 | .host_caps = (MMC_CAP_4_BIT_DATA | | ||
47 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | ||
48 | }; | ||
49 | |||
50 | struct platform_device s3c_device_hsmmc3 = { | ||
51 | .name = "s3c-sdhci", | ||
52 | .id = 3, | ||
53 | .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource), | ||
54 | .resource = s3c_hsmmc3_resource, | ||
55 | .dev = { | ||
56 | .dma_mask = &s3c_device_hsmmc3_dmamask, | ||
57 | .coherent_dma_mask = 0xffffffffUL, | ||
58 | .platform_data = &s3c_hsmmc3_def_platdata, | ||
59 | }, | ||
60 | }; | ||
61 | |||
62 | void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd) | ||
63 | { | ||
64 | struct s3c_sdhci_platdata *set = &s3c_hsmmc3_def_platdata; | ||
65 | |||
66 | set->max_width = pd->max_width; | ||
67 | set->cd_type = pd->cd_type; | ||
68 | set->ext_cd_init = pd->ext_cd_init; | ||
69 | set->ext_cd_cleanup = pd->ext_cd_cleanup; | ||
70 | set->ext_cd_gpio = pd->ext_cd_gpio; | ||
71 | set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert; | ||
72 | |||
73 | if (pd->cfg_gpio) | ||
74 | set->cfg_gpio = pd->cfg_gpio; | ||
75 | if (pd->cfg_card) | ||
76 | set->cfg_card = pd->cfg_card; | ||
77 | } | ||
diff --git a/arch/arm/plat-samsung/dev-ide.c b/arch/arm/plat-samsung/dev-ide.c new file mode 100644 index 000000000000..b497982795a7 --- /dev/null +++ b/arch/arm/plat-samsung/dev-ide.c | |||
@@ -0,0 +1,44 @@ | |||
1 | /* linux/arch/arm/plat-samsung/dev-ide.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Samsung CF-ATA device definition. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | |||
17 | #include <mach/map.h> | ||
18 | #include <plat/ata.h> | ||
19 | #include <plat/devs.h> | ||
20 | |||
21 | static struct resource s3c_cfcon_resource[] = { | ||
22 | [0] = { | ||
23 | .start = SAMSUNG_PA_CFCON, | ||
24 | .end = SAMSUNG_PA_CFCON + SZ_16K - 1, | ||
25 | .flags = IORESOURCE_MEM, | ||
26 | }, | ||
27 | [1] = { | ||
28 | .start = IRQ_CFCON, | ||
29 | .end = IRQ_CFCON, | ||
30 | .flags = IORESOURCE_IRQ, | ||
31 | }, | ||
32 | }; | ||
33 | |||
34 | struct platform_device s3c_device_cfcon = { | ||
35 | .id = 0, | ||
36 | .num_resources = ARRAY_SIZE(s3c_cfcon_resource), | ||
37 | .resource = s3c_cfcon_resource, | ||
38 | }; | ||
39 | |||
40 | void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata) | ||
41 | { | ||
42 | s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata), | ||
43 | &s3c_device_cfcon); | ||
44 | } | ||
diff --git a/arch/arm/plat-samsung/dev-keypad.c b/arch/arm/plat-samsung/dev-keypad.c new file mode 100644 index 000000000000..677c2d731b65 --- /dev/null +++ b/arch/arm/plat-samsung/dev-keypad.c | |||
@@ -0,0 +1,50 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/plat-samsung/dev-keypad.c | ||
3 | * | ||
4 | * Copyright (C) 2010 Samsung Electronics Co.Ltd | ||
5 | * Author: Joonyoung Shim <jy0922.shim@samsung.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/platform_device.h> | ||
15 | #include <mach/irqs.h> | ||
16 | #include <mach/map.h> | ||
17 | #include <plat/cpu.h> | ||
18 | #include <plat/devs.h> | ||
19 | #include <plat/keypad.h> | ||
20 | |||
21 | static struct resource samsung_keypad_resources[] = { | ||
22 | [0] = { | ||
23 | .start = SAMSUNG_PA_KEYPAD, | ||
24 | .end = SAMSUNG_PA_KEYPAD + 0x20 - 1, | ||
25 | .flags = IORESOURCE_MEM, | ||
26 | }, | ||
27 | [1] = { | ||
28 | .start = IRQ_KEYPAD, | ||
29 | .end = IRQ_KEYPAD, | ||
30 | .flags = IORESOURCE_IRQ, | ||
31 | }, | ||
32 | }; | ||
33 | |||
34 | struct platform_device samsung_device_keypad = { | ||
35 | .name = "samsung-keypad", | ||
36 | .id = -1, | ||
37 | .num_resources = ARRAY_SIZE(samsung_keypad_resources), | ||
38 | .resource = samsung_keypad_resources, | ||
39 | }; | ||
40 | |||
41 | void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd) | ||
42 | { | ||
43 | struct samsung_keypad_platdata *npd; | ||
44 | |||
45 | npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata), | ||
46 | &samsung_device_keypad); | ||
47 | |||
48 | if (!npd->cfg_gpio) | ||
49 | npd->cfg_gpio = samsung_keypad_cfg_gpio; | ||
50 | } | ||
diff --git a/arch/arm/plat-samsung/dev-wdt.c b/arch/arm/plat-samsung/dev-wdt.c index 5efca87cddbd..019b5b8cf14c 100644 --- a/arch/arm/plat-samsung/dev-wdt.c +++ b/arch/arm/plat-samsung/dev-wdt.c | |||
@@ -21,7 +21,7 @@ | |||
21 | static struct resource s3c_wdt_resource[] = { | 21 | static struct resource s3c_wdt_resource[] = { |
22 | [0] = { | 22 | [0] = { |
23 | .start = S3C_PA_WDT, | 23 | .start = S3C_PA_WDT, |
24 | .end = S3C_PA_WDT + SZ_1M - 1, | 24 | .end = S3C_PA_WDT + SZ_1K, |
25 | .flags = IORESOURCE_MEM, | 25 | .flags = IORESOURCE_MEM, |
26 | }, | 26 | }, |
27 | [1] = { | 27 | [1] = { |
diff --git a/arch/arm/plat-samsung/gpiolib.c b/arch/arm/plat-samsung/gpiolib.c index 8a8ba8bc1d96..c354089254fc 100644 --- a/arch/arm/plat-samsung/gpiolib.c +++ b/arch/arm/plat-samsung/gpiolib.c | |||
@@ -18,7 +18,7 @@ | |||
18 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
19 | #include <linux/irq.h> | 19 | #include <linux/irq.h> |
20 | #include <linux/io.h> | 20 | #include <linux/io.h> |
21 | #include <mach/gpio.h> | 21 | #include <linux/gpio.h> |
22 | #include <plat/gpio-core.h> | 22 | #include <plat/gpio-core.h> |
23 | #include <plat/gpio-cfg.h> | 23 | #include <plat/gpio-cfg.h> |
24 | #include <plat/gpio-cfg-helpers.h> | 24 | #include <plat/gpio-cfg-helpers.h> |
diff --git a/arch/arm/plat-samsung/include/plat/adc-core.h b/arch/arm/plat-samsung/include/plat/adc-core.h new file mode 100644 index 000000000000..a281568d5856 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/adc-core.h | |||
@@ -0,0 +1,28 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/adc-core.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Samsung ADC Controller core functions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_PLAT_ADC_CORE_H | ||
14 | #define __ASM_PLAT_ADC_CORE_H __FILE__ | ||
15 | |||
16 | /* These functions are only for use with the core support code, such as | ||
17 | * the cpu specific initialisation code | ||
18 | */ | ||
19 | |||
20 | /* re-define device name depending on support. */ | ||
21 | static inline void s3c_adc_setname(char *name) | ||
22 | { | ||
23 | #ifdef CONFIG_SAMSUNG_DEV_ADC | ||
24 | s3c_device_adc.name = name; | ||
25 | #endif | ||
26 | } | ||
27 | |||
28 | #endif /* __ASM_PLAT_ADC_CORE_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/ata-core.h b/arch/arm/plat-samsung/include/plat/ata-core.h new file mode 100644 index 000000000000..f5a4ec7141b1 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/ata-core.h | |||
@@ -0,0 +1,28 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/ata-core.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Samsung CF-ATA Controller core functions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_PLAT_ATA_CORE_H | ||
14 | #define __ASM_PLAT_ATA_CORE_H __FILE__ | ||
15 | |||
16 | /* These functions are only for use with the core support code, such as | ||
17 | * the cpu specific initialisation code | ||
18 | */ | ||
19 | |||
20 | /* re-define device name depending on support. */ | ||
21 | static inline void s3c_cfcon_setname(char *name) | ||
22 | { | ||
23 | #ifdef CONFIG_SAMSUNG_DEV_IDE | ||
24 | s3c_device_cfcon.name = name; | ||
25 | #endif | ||
26 | } | ||
27 | |||
28 | #endif /* __ASM_PLAT_ATA_CORE_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/ata.h b/arch/arm/plat-samsung/include/plat/ata.h new file mode 100644 index 000000000000..2a3855a8372a --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/ata.h | |||
@@ -0,0 +1,36 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/ata.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Samsung CF-ATA platform_device info | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_PLAT_ATA_H | ||
14 | #define __ASM_PLAT_ATA_H __FILE__ | ||
15 | |||
16 | /** | ||
17 | * struct s3c_ide_platdata - S3C IDE driver platform data. | ||
18 | * @setup_gpio: Setup the external GPIO pins to the right state for data | ||
19 | * transfer in true-ide mode. | ||
20 | */ | ||
21 | struct s3c_ide_platdata { | ||
22 | void (*setup_gpio)(void); | ||
23 | }; | ||
24 | |||
25 | /* | ||
26 | * s3c_ide_set_platdata() - Setup the platform specifc data for IDE driver. | ||
27 | * @pdata: Platform data for IDE driver. | ||
28 | */ | ||
29 | extern void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata); | ||
30 | |||
31 | /* architecture-specific IDE configuration */ | ||
32 | extern void s3c64xx_ide_setup_gpio(void); | ||
33 | extern void s5pc100_ide_setup_gpio(void); | ||
34 | extern void s5pv210_ide_setup_gpio(void); | ||
35 | |||
36 | #endif /*__ASM_PLAT_ATA_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index e6144e4b9118..85f6f23a510f 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
@@ -54,6 +54,8 @@ extern struct platform_device s3c_device_hwmon; | |||
54 | extern struct platform_device s3c_device_hsmmc0; | 54 | extern struct platform_device s3c_device_hsmmc0; |
55 | extern struct platform_device s3c_device_hsmmc1; | 55 | extern struct platform_device s3c_device_hsmmc1; |
56 | extern struct platform_device s3c_device_hsmmc2; | 56 | extern struct platform_device s3c_device_hsmmc2; |
57 | extern struct platform_device s3c_device_hsmmc3; | ||
58 | extern struct platform_device s3c_device_cfcon; | ||
57 | 59 | ||
58 | extern struct platform_device s3c_device_spi0; | 60 | extern struct platform_device s3c_device_spi0; |
59 | extern struct platform_device s3c_device_spi1; | 61 | extern struct platform_device s3c_device_spi1; |
@@ -100,6 +102,12 @@ extern struct platform_device s5pc100_device_iis0; | |||
100 | extern struct platform_device s5pc100_device_iis1; | 102 | extern struct platform_device s5pc100_device_iis1; |
101 | extern struct platform_device s5pc100_device_iis2; | 103 | extern struct platform_device s5pc100_device_iis2; |
102 | 104 | ||
105 | extern struct platform_device samsung_device_keypad; | ||
106 | |||
107 | extern struct platform_device s5p_device_fimc0; | ||
108 | extern struct platform_device s5p_device_fimc1; | ||
109 | extern struct platform_device s5p_device_fimc2; | ||
110 | |||
103 | /* s3c2440 specific devices */ | 111 | /* s3c2440 specific devices */ |
104 | 112 | ||
105 | #ifdef CONFIG_CPU_S3C2440 | 113 | #ifdef CONFIG_CPU_S3C2440 |
@@ -108,3 +116,15 @@ extern struct platform_device s3c_device_camif; | |||
108 | extern struct platform_device s3c_device_ac97; | 116 | extern struct platform_device s3c_device_ac97; |
109 | 117 | ||
110 | #endif | 118 | #endif |
119 | |||
120 | /** | ||
121 | * s3c_set_platdata() - helper for setting platform data | ||
122 | * @pd: The default platform data for this device. | ||
123 | * @pdsize: The size of the platform data. | ||
124 | * @pdev: Pointer to the device to fill in. | ||
125 | * | ||
126 | * This helper replaces a number of calls that copy and then set the | ||
127 | * platform data of the device. | ||
128 | */ | ||
129 | extern void *s3c_set_platdata(void *pd, size_t pdsize, | ||
130 | struct platform_device *pdev); | ||
diff --git a/arch/arm/plat-samsung/include/plat/fimc-core.h b/arch/arm/plat-samsung/include/plat/fimc-core.h new file mode 100644 index 000000000000..81a3bfeeccad --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/fimc-core.h | |||
@@ -0,0 +1,44 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-samsung/include/plat/fimc-core.h | ||
3 | * | ||
4 | * Copyright 2010 Samsung Electronics Co., Ltd. | ||
5 | * Sylwester Nawrocki <s.nawrocki@samsung.com> | ||
6 | * | ||
7 | * Samsung camera interface driver core functions | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_PLAT_FIMC_CORE_H | ||
15 | #define __ASM_PLAT_FIMC_CORE_H __FILE__ | ||
16 | |||
17 | /* | ||
18 | * These functions are only for use with the core support code, such as | ||
19 | * the CPU-specific initialization code. | ||
20 | */ | ||
21 | |||
22 | /* Re-define device name to differentiate the subsystem in various SoCs. */ | ||
23 | static inline void s3c_fimc_setname(int id, char *name) | ||
24 | { | ||
25 | switch (id) { | ||
26 | #ifdef CONFIG_S5P_DEV_FIMC0 | ||
27 | case 0: | ||
28 | s5p_device_fimc0.name = name; | ||
29 | break; | ||
30 | #endif | ||
31 | #ifdef CONFIG_S5P_DEV_FIMC1 | ||
32 | case 1: | ||
33 | s5p_device_fimc1.name = name; | ||
34 | break; | ||
35 | #endif | ||
36 | #ifdef CONFIG_S5P_DEV_FIMC2 | ||
37 | case 2: | ||
38 | s5p_device_fimc2.name = name; | ||
39 | break; | ||
40 | #endif | ||
41 | } | ||
42 | } | ||
43 | |||
44 | #endif /* __ASM_PLAT_FIMC_CORE_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/keypad-core.h b/arch/arm/plat-samsung/include/plat/keypad-core.h new file mode 100644 index 000000000000..d513e1b3a31e --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/keypad-core.h | |||
@@ -0,0 +1,31 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/plat-samsung/include/plat/keypad-core.h | ||
3 | * | ||
4 | * Copyright (C) 2010 Samsung Electronics Co.Ltd | ||
5 | * Author: Joonyoung Shim <jy0922.shim@samsung.com> | ||
6 | * | ||
7 | * Samsung keypad controller core function | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License as published by the | ||
11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
12 | * option) any later version. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASM_ARCH_KEYPAD_CORE_H | ||
17 | #define __ASM_ARCH_KEYPAD_CORE_H | ||
18 | |||
19 | /* These function are only for use with the core support code, such as | ||
20 | * the cpu specific initialisation code | ||
21 | */ | ||
22 | |||
23 | /* re-define device name depending on support. */ | ||
24 | static inline void samsung_keypad_setname(char *name) | ||
25 | { | ||
26 | #ifdef CONFIG_SAMSUNG_DEV_KEYPAD | ||
27 | samsung_device_keypad.name = name; | ||
28 | #endif | ||
29 | } | ||
30 | |||
31 | #endif /* __ASM_ARCH_KEYPAD_CORE_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/keypad.h b/arch/arm/plat-samsung/include/plat/keypad.h index 3a70c125fe51..b59a6483cd8a 100644 --- a/arch/arm/plat-samsung/include/plat/keypad.h +++ b/arch/arm/plat-samsung/include/plat/keypad.h | |||
@@ -40,4 +40,17 @@ struct samsung_keypad_platdata { | |||
40 | void (*cfg_gpio)(unsigned int rows, unsigned int cols); | 40 | void (*cfg_gpio)(unsigned int rows, unsigned int cols); |
41 | }; | 41 | }; |
42 | 42 | ||
43 | /** | ||
44 | * samsung_keypad_set_platdata - Set platform data for Samsung Keypad device. | ||
45 | * @pd: Platform data to register to device. | ||
46 | * | ||
47 | * Register the given platform data for use with Samsung Keypad device. | ||
48 | * The call will copy the platform data, so the board definitions can | ||
49 | * make the structure itself __initdata. | ||
50 | */ | ||
51 | extern void samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd); | ||
52 | |||
53 | /* defined by architecture to configure gpio. */ | ||
54 | extern void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols); | ||
55 | |||
43 | #endif /* __PLAT_SAMSUNG_KEYPAD_H */ | 56 | #endif /* __PLAT_SAMSUNG_KEYPAD_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/regs-ata.h b/arch/arm/plat-samsung/include/plat/regs-ata.h new file mode 100644 index 000000000000..f5df92fdae26 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/regs-ata.h | |||
@@ -0,0 +1,56 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/regs-ata.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Samsung CF-ATA register definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_PLAT_REGS_ATA_H | ||
14 | #define __ASM_PLAT_REGS_ATA_H __FILE__ | ||
15 | |||
16 | #define S3C_CFATA_REG(x) (x) | ||
17 | |||
18 | #define S3C_CFATA_MUX S3C_CFATA_REG(0x0) | ||
19 | |||
20 | #define S3C_ATA_CTRL S3C_CFATA_REG(0x0) | ||
21 | #define S3C_ATA_STATUS S3C_CFATA_REG(0x4) | ||
22 | #define S3C_ATA_CMD S3C_CFATA_REG(0x8) | ||
23 | #define S3C_ATA_SWRST S3C_CFATA_REG(0xc) | ||
24 | #define S3C_ATA_IRQ S3C_CFATA_REG(0x10) | ||
25 | #define S3C_ATA_IRQ_MSK S3C_CFATA_REG(0x14) | ||
26 | #define S3C_ATA_CFG S3C_CFATA_REG(0x18) | ||
27 | |||
28 | #define S3C_ATA_MDMA_TIME S3C_CFATA_REG(0x28) | ||
29 | #define S3C_ATA_PIO_TIME S3C_CFATA_REG(0x2c) | ||
30 | #define S3C_ATA_UDMA_TIME S3C_CFATA_REG(0x30) | ||
31 | #define S3C_ATA_XFR_NUM S3C_CFATA_REG(0x34) | ||
32 | #define S3C_ATA_XFR_CNT S3C_CFATA_REG(0x38) | ||
33 | #define S3C_ATA_TBUF_START S3C_CFATA_REG(0x3c) | ||
34 | #define S3C_ATA_TBUF_SIZE S3C_CFATA_REG(0x40) | ||
35 | #define S3C_ATA_SBUF_START S3C_CFATA_REG(0x44) | ||
36 | #define S3C_ATA_SBUF_SIZE S3C_CFATA_REG(0x48) | ||
37 | #define S3C_ATA_CADR_TBUF S3C_CFATA_REG(0x4c) | ||
38 | #define S3C_ATA_CADR_SBUF S3C_CFATA_REG(0x50) | ||
39 | #define S3C_ATA_PIO_DTR S3C_CFATA_REG(0x54) | ||
40 | #define S3C_ATA_PIO_FED S3C_CFATA_REG(0x58) | ||
41 | #define S3C_ATA_PIO_SCR S3C_CFATA_REG(0x5c) | ||
42 | #define S3C_ATA_PIO_LLR S3C_CFATA_REG(0x60) | ||
43 | #define S3C_ATA_PIO_LMR S3C_CFATA_REG(0x64) | ||
44 | #define S3C_ATA_PIO_LHR S3C_CFATA_REG(0x68) | ||
45 | #define S3C_ATA_PIO_DVR S3C_CFATA_REG(0x6c) | ||
46 | #define S3C_ATA_PIO_CSD S3C_CFATA_REG(0x70) | ||
47 | #define S3C_ATA_PIO_DAD S3C_CFATA_REG(0x74) | ||
48 | #define S3C_ATA_PIO_READY S3C_CFATA_REG(0x78) | ||
49 | #define S3C_ATA_PIO_RDATA S3C_CFATA_REG(0x7c) | ||
50 | |||
51 | #define S3C_CFATA_MUX_TRUEIDE 0x01 | ||
52 | |||
53 | #define S3C_ATA_CFG_SWAP 0x40 | ||
54 | #define S3C_ATA_CFG_IORDYEN 0x02 | ||
55 | |||
56 | #endif /* __ASM_PLAT_REGS_ATA_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h index 65c190d142dd..30b7cc14cef5 100644 --- a/arch/arm/plat-samsung/include/plat/regs-rtc.h +++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h | |||
@@ -14,6 +14,9 @@ | |||
14 | #define __ASM_ARCH_REGS_RTC_H __FILE__ | 14 | #define __ASM_ARCH_REGS_RTC_H __FILE__ |
15 | 15 | ||
16 | #define S3C2410_RTCREG(x) (x) | 16 | #define S3C2410_RTCREG(x) (x) |
17 | #define S3C2410_INTP S3C2410_RTCREG(0x30) | ||
18 | #define S3C2410_INTP_ALM (1 << 1) | ||
19 | #define S3C2410_INTP_TIC (1 << 0) | ||
17 | 20 | ||
18 | #define S3C2410_RTCCON S3C2410_RTCREG(0x40) | 21 | #define S3C2410_RTCCON S3C2410_RTCREG(0x40) |
19 | #define S3C2410_RTCCON_RTCEN (1<<0) | 22 | #define S3C2410_RTCCON_RTCEN (1<<0) |
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h index a6eba8496b24..788837e99cb3 100644 --- a/arch/arm/plat-samsung/include/plat/regs-serial.h +++ b/arch/arm/plat-samsung/include/plat/regs-serial.h | |||
@@ -259,6 +259,8 @@ struct s3c2410_uartcfg { | |||
259 | unsigned short flags; | 259 | unsigned short flags; |
260 | upf_t uart_flags; /* default uart flags */ | 260 | upf_t uart_flags; /* default uart flags */ |
261 | 261 | ||
262 | unsigned int has_fracval; | ||
263 | |||
262 | unsigned long ucon; /* value of ucon for port */ | 264 | unsigned long ucon; /* value of ucon for port */ |
263 | unsigned long ulcon; /* value of ulcon for port */ | 265 | unsigned long ulcon; /* value of ulcon for port */ |
264 | unsigned long ufcon; /* value of ufcon for port */ | 266 | unsigned long ufcon; /* value of ufcon for port */ |
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index 016674fa20dd..30844c263d03 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h | |||
@@ -20,10 +20,31 @@ struct mmc_host; | |||
20 | struct mmc_card; | 20 | struct mmc_card; |
21 | struct mmc_ios; | 21 | struct mmc_ios; |
22 | 22 | ||
23 | enum cd_types { | ||
24 | S3C_SDHCI_CD_INTERNAL, /* use mmc internal CD line */ | ||
25 | S3C_SDHCI_CD_EXTERNAL, /* use external callback */ | ||
26 | S3C_SDHCI_CD_GPIO, /* use external gpio pin for CD line */ | ||
27 | S3C_SDHCI_CD_NONE, /* no CD line, use polling to detect card */ | ||
28 | S3C_SDHCI_CD_PERMANENT, /* no CD line, card permanently wired to host */ | ||
29 | }; | ||
30 | |||
23 | /** | 31 | /** |
24 | * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI | 32 | * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI |
25 | * @max_width: The maximum number of data bits supported. | 33 | * @max_width: The maximum number of data bits supported. |
26 | * @host_caps: Standard MMC host capabilities bit field. | 34 | * @host_caps: Standard MMC host capabilities bit field. |
35 | * @cd_type: Type of Card Detection method (see cd_types enum above) | ||
36 | * @ext_cd_init: Initialize external card detect subsystem. Called on | ||
37 | * sdhci-s3c driver probe when cd_type == S3C_SDHCI_CD_EXTERNAL. | ||
38 | * notify_func argument is a callback to the sdhci-s3c driver | ||
39 | * that triggers the card detection event. Callback arguments: | ||
40 | * dev is pointer to platform device of the host controller, | ||
41 | * state is new state of the card (0 - removed, 1 - inserted). | ||
42 | * @ext_cd_cleanup: Cleanup external card detect subsystem. Called on | ||
43 | * sdhci-s3c driver remove when cd_type == S3C_SDHCI_CD_EXTERNAL. | ||
44 | * notify_func argument is the same callback as for ext_cd_init. | ||
45 | * @ext_cd_gpio: gpio pin used for external CD line, valid only if | ||
46 | * cd_type == S3C_SDHCI_CD_GPIO | ||
47 | * @ext_cd_gpio_invert: invert values for external CD gpio line | ||
27 | * @cfg_gpio: Configure the GPIO for a specific card bit-width | 48 | * @cfg_gpio: Configure the GPIO for a specific card bit-width |
28 | * @cfg_card: Configure the interface for a specific card and speed. This | 49 | * @cfg_card: Configure the interface for a specific card and speed. This |
29 | * is necessary the controllers and/or GPIO blocks require the | 50 | * is necessary the controllers and/or GPIO blocks require the |
@@ -37,9 +58,17 @@ struct mmc_ios; | |||
37 | struct s3c_sdhci_platdata { | 58 | struct s3c_sdhci_platdata { |
38 | unsigned int max_width; | 59 | unsigned int max_width; |
39 | unsigned int host_caps; | 60 | unsigned int host_caps; |
61 | enum cd_types cd_type; | ||
40 | 62 | ||
41 | char **clocks; /* set of clock sources */ | 63 | char **clocks; /* set of clock sources */ |
42 | 64 | ||
65 | int ext_cd_gpio; | ||
66 | bool ext_cd_gpio_invert; | ||
67 | int (*ext_cd_init)(void (*notify_func)(struct platform_device *, | ||
68 | int state)); | ||
69 | int (*ext_cd_cleanup)(void (*notify_func)(struct platform_device *, | ||
70 | int state)); | ||
71 | |||
43 | void (*cfg_gpio)(struct platform_device *dev, int width); | 72 | void (*cfg_gpio)(struct platform_device *dev, int width); |
44 | void (*cfg_card)(struct platform_device *dev, | 73 | void (*cfg_card)(struct platform_device *dev, |
45 | void __iomem *regbase, | 74 | void __iomem *regbase, |
@@ -58,6 +87,7 @@ struct s3c_sdhci_platdata { | |||
58 | extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd); | 87 | extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd); |
59 | extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd); | 88 | extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd); |
60 | extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd); | 89 | extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd); |
90 | extern void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd); | ||
61 | 91 | ||
62 | /* Default platform data, exported so that per-cpu initialisation can | 92 | /* Default platform data, exported so that per-cpu initialisation can |
63 | * set the correct one when there are more than one cpu type selected. | 93 | * set the correct one when there are more than one cpu type selected. |
@@ -66,6 +96,7 @@ extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd); | |||
66 | extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata; | 96 | extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata; |
67 | extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; | 97 | extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; |
68 | extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata; | 98 | extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata; |
99 | extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata; | ||
69 | 100 | ||
70 | /* Helper function availablity */ | 101 | /* Helper function availablity */ |
71 | 102 | ||
@@ -78,13 +109,13 @@ extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | |||
78 | extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | 109 | extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w); |
79 | extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | 110 | extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w); |
80 | extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | 111 | extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w); |
112 | extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w); | ||
81 | 113 | ||
82 | /* S3C6400 SDHCI setup */ | 114 | /* S3C64XX SDHCI setup */ |
83 | 115 | ||
84 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI | 116 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI |
85 | extern char *s3c64xx_hsmmc_clksrcs[4]; | 117 | extern char *s3c64xx_hsmmc_clksrcs[4]; |
86 | 118 | ||
87 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
88 | extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, | 119 | extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, |
89 | void __iomem *r, | 120 | void __iomem *r, |
90 | struct mmc_ios *ios, | 121 | struct mmc_ios *ios, |
@@ -92,76 +123,62 @@ extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, | |||
92 | 123 | ||
93 | static inline void s3c6400_default_sdhci0(void) | 124 | static inline void s3c6400_default_sdhci0(void) |
94 | { | 125 | { |
126 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
95 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 127 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
96 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 128 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
97 | s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | 129 | s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; |
130 | #endif | ||
98 | } | 131 | } |
99 | 132 | ||
100 | #else | ||
101 | static inline void s3c6400_default_sdhci0(void) { } | ||
102 | #endif /* CONFIG_S3C_DEV_HSMMC */ | ||
103 | |||
104 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
105 | static inline void s3c6400_default_sdhci1(void) | 133 | static inline void s3c6400_default_sdhci1(void) |
106 | { | 134 | { |
135 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
107 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 136 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
108 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 137 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
109 | s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | 138 | s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; |
139 | #endif | ||
110 | } | 140 | } |
111 | #else | ||
112 | static inline void s3c6400_default_sdhci1(void) { } | ||
113 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
114 | 141 | ||
115 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
116 | static inline void s3c6400_default_sdhci2(void) | 142 | static inline void s3c6400_default_sdhci2(void) |
117 | { | 143 | { |
144 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
118 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 145 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
119 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 146 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
120 | s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | 147 | s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; |
148 | #endif | ||
121 | } | 149 | } |
122 | #else | ||
123 | static inline void s3c6400_default_sdhci2(void) { } | ||
124 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | ||
125 | |||
126 | /* S3C6410 SDHCI setup */ | ||
127 | 150 | ||
128 | extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev, | 151 | extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev, |
129 | void __iomem *r, | 152 | void __iomem *r, |
130 | struct mmc_ios *ios, | 153 | struct mmc_ios *ios, |
131 | struct mmc_card *card); | 154 | struct mmc_card *card); |
132 | 155 | ||
133 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
134 | static inline void s3c6410_default_sdhci0(void) | 156 | static inline void s3c6410_default_sdhci0(void) |
135 | { | 157 | { |
158 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
136 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 159 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
137 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 160 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
138 | s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; | 161 | s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; |
162 | #endif | ||
139 | } | 163 | } |
140 | #else | ||
141 | static inline void s3c6410_default_sdhci0(void) { } | ||
142 | #endif /* CONFIG_S3C_DEV_HSMMC */ | ||
143 | 164 | ||
144 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
145 | static inline void s3c6410_default_sdhci1(void) | 165 | static inline void s3c6410_default_sdhci1(void) |
146 | { | 166 | { |
167 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
147 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 168 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
148 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 169 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
149 | s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; | 170 | s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; |
171 | #endif | ||
150 | } | 172 | } |
151 | #else | ||
152 | static inline void s3c6410_default_sdhci1(void) { } | ||
153 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
154 | 173 | ||
155 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
156 | static inline void s3c6410_default_sdhci2(void) | 174 | static inline void s3c6410_default_sdhci2(void) |
157 | { | 175 | { |
176 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
158 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 177 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
159 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 178 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
160 | s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; | 179 | s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; |
180 | #endif | ||
161 | } | 181 | } |
162 | #else | ||
163 | static inline void s3c6410_default_sdhci2(void) { } | ||
164 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | ||
165 | 182 | ||
166 | #else | 183 | #else |
167 | static inline void s3c6410_default_sdhci0(void) { } | 184 | static inline void s3c6410_default_sdhci0(void) { } |
@@ -183,48 +200,42 @@ extern void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev, | |||
183 | struct mmc_ios *ios, | 200 | struct mmc_ios *ios, |
184 | struct mmc_card *card); | 201 | struct mmc_card *card); |
185 | 202 | ||
186 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
187 | static inline void s5pc100_default_sdhci0(void) | 203 | static inline void s5pc100_default_sdhci0(void) |
188 | { | 204 | { |
205 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
189 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | 206 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; |
190 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; | 207 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; |
191 | s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | 208 | s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; |
209 | #endif | ||
192 | } | 210 | } |
193 | #else | ||
194 | static inline void s5pc100_default_sdhci0(void) { } | ||
195 | #endif /* CONFIG_S3C_DEV_HSMMC */ | ||
196 | 211 | ||
197 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
198 | static inline void s5pc100_default_sdhci1(void) | 212 | static inline void s5pc100_default_sdhci1(void) |
199 | { | 213 | { |
214 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
200 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | 215 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; |
201 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; | 216 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; |
202 | s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | 217 | s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; |
218 | #endif | ||
203 | } | 219 | } |
204 | #else | ||
205 | static inline void s5pc100_default_sdhci1(void) { } | ||
206 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
207 | 220 | ||
208 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
209 | static inline void s5pc100_default_sdhci2(void) | 221 | static inline void s5pc100_default_sdhci2(void) |
210 | { | 222 | { |
223 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
211 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | 224 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; |
212 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; | 225 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; |
213 | s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | 226 | s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; |
227 | #endif | ||
214 | } | 228 | } |
215 | #else | ||
216 | static inline void s5pc100_default_sdhci2(void) { } | ||
217 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
218 | |||
219 | 229 | ||
220 | #else | 230 | #else |
221 | static inline void s5pc100_default_sdhci0(void) { } | 231 | static inline void s5pc100_default_sdhci0(void) { } |
222 | static inline void s5pc100_default_sdhci1(void) { } | 232 | static inline void s5pc100_default_sdhci1(void) { } |
223 | static inline void s5pc100_default_sdhci2(void) { } | 233 | static inline void s5pc100_default_sdhci2(void) { } |
234 | |||
224 | #endif /* CONFIG_S5PC100_SETUP_SDHCI */ | 235 | #endif /* CONFIG_S5PC100_SETUP_SDHCI */ |
225 | 236 | ||
237 | /* S5PV210 SDHCI setup */ | ||
226 | 238 | ||
227 | /* S5PC110 SDHCI setup */ | ||
228 | #ifdef CONFIG_S5PV210_SETUP_SDHCI | 239 | #ifdef CONFIG_S5PV210_SETUP_SDHCI |
229 | extern char *s5pv210_hsmmc_clksrcs[4]; | 240 | extern char *s5pv210_hsmmc_clksrcs[4]; |
230 | 241 | ||
@@ -233,46 +244,48 @@ extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | |||
233 | struct mmc_ios *ios, | 244 | struct mmc_ios *ios, |
234 | struct mmc_card *card); | 245 | struct mmc_card *card); |
235 | 246 | ||
236 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
237 | static inline void s5pv210_default_sdhci0(void) | 247 | static inline void s5pv210_default_sdhci0(void) |
238 | { | 248 | { |
249 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
239 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | 250 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; |
240 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; | 251 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; |
241 | s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | 252 | s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; |
253 | #endif | ||
242 | } | 254 | } |
243 | #else | ||
244 | static inline void s5pv210_default_sdhci0(void) { } | ||
245 | #endif /* CONFIG_S3C_DEV_HSMMC */ | ||
246 | 255 | ||
247 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
248 | static inline void s5pv210_default_sdhci1(void) | 256 | static inline void s5pv210_default_sdhci1(void) |
249 | { | 257 | { |
258 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
250 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | 259 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; |
251 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; | 260 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; |
252 | s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | 261 | s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; |
262 | #endif | ||
253 | } | 263 | } |
254 | #else | ||
255 | static inline void s5pv210_default_sdhci1(void) { } | ||
256 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
257 | 264 | ||
258 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
259 | static inline void s5pv210_default_sdhci2(void) | 265 | static inline void s5pv210_default_sdhci2(void) |
260 | { | 266 | { |
267 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
261 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | 268 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; |
262 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; | 269 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; |
263 | s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | 270 | s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; |
271 | #endif | ||
272 | } | ||
273 | |||
274 | static inline void s5pv210_default_sdhci3(void) | ||
275 | { | ||
276 | #ifdef CONFIG_S3C_DEV_HSMMC3 | ||
277 | s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
278 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; | ||
279 | s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
280 | #endif | ||
264 | } | 281 | } |
265 | #else | ||
266 | static inline void s5pv210_default_sdhci2(void) { } | ||
267 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | ||
268 | 282 | ||
269 | #else | 283 | #else |
270 | static inline void s5pv210_default_sdhci0(void) { } | 284 | static inline void s5pv210_default_sdhci0(void) { } |
271 | static inline void s5pv210_default_sdhci1(void) { } | 285 | static inline void s5pv210_default_sdhci1(void) { } |
272 | static inline void s5pv210_default_sdhci2(void) { } | 286 | static inline void s5pv210_default_sdhci2(void) { } |
273 | #endif /* CONFIG_S5PC100_SETUP_SDHCI */ | 287 | static inline void s5pv210_default_sdhci3(void) { } |
274 | |||
275 | |||
276 | 288 | ||
289 | #endif /* CONFIG_S5PV210_SETUP_SDHCI */ | ||
277 | 290 | ||
278 | #endif /* __PLAT_S3C_SDHCI_H */ | 291 | #endif /* __PLAT_S3C_SDHCI_H */ |
diff --git a/arch/arm/plat-samsung/platformdata.c b/arch/arm/plat-samsung/platformdata.c new file mode 100644 index 000000000000..7cf2e1e3b20f --- /dev/null +++ b/arch/arm/plat-samsung/platformdata.c | |||
@@ -0,0 +1,37 @@ | |||
1 | /* linux/arch/arm/plat-samsung/platformdata.c | ||
2 | * | ||
3 | * Copyright 2010 Ben Dooks <ben-linux <at> fluff.org> | ||
4 | * | ||
5 | * Helper for platform data setting | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/string.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | |||
16 | #include <plat/devs.h> | ||
17 | |||
18 | void __init *s3c_set_platdata(void *pd, size_t pdsize, | ||
19 | struct platform_device *pdev) | ||
20 | { | ||
21 | void *npd; | ||
22 | |||
23 | if (!pd) { | ||
24 | /* too early to use dev_name(), may not be registered */ | ||
25 | printk(KERN_ERR "%s: no platform data supplied\n", pdev->name); | ||
26 | return NULL; | ||
27 | } | ||
28 | |||
29 | npd = kmemdup(pd, pdsize, GFP_KERNEL); | ||
30 | if (!npd) { | ||
31 | printk(KERN_ERR "%s: cannot clone platform data\n", pdev->name); | ||
32 | return NULL; | ||
33 | } | ||
34 | |||
35 | pdev->dev.platform_data = npd; | ||
36 | return npd; | ||
37 | } | ||
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c index de375b64e410..3da116f47f01 100644 --- a/arch/sh/boards/mach-ap325rxa/setup.c +++ b/arch/sh/boards/mach-ap325rxa/setup.c | |||
@@ -154,7 +154,7 @@ static struct platform_device nand_flash_device = { | |||
154 | #define PORT_DRVCRA 0xA405018A | 154 | #define PORT_DRVCRA 0xA405018A |
155 | #define PORT_DRVCRB 0xA405018C | 155 | #define PORT_DRVCRB 0xA405018C |
156 | 156 | ||
157 | static void ap320_wvga_power_on(void *board_data) | 157 | static void ap320_wvga_power_on(void *board_data, struct fb_info *info) |
158 | { | 158 | { |
159 | msleep(100); | 159 | msleep(100); |
160 | 160 | ||
diff --git a/arch/sh/boards/mach-kfr2r09/Makefile b/arch/sh/boards/mach-kfr2r09/Makefile index 4e577a3bf658..60dd63f4a427 100644 --- a/arch/sh/boards/mach-kfr2r09/Makefile +++ b/arch/sh/boards/mach-kfr2r09/Makefile | |||
@@ -1,2 +1,4 @@ | |||
1 | obj-y := setup.o sdram.o | 1 | obj-y := setup.o sdram.o |
2 | obj-$(CONFIG_FB_SH_MOBILE_LCDC) += lcd_wqvga.o | 2 | ifneq ($(CONFIG_FB_SH_MOBILE_LCDC),) |
3 | obj-y += lcd_wqvga.o | ||
4 | endif | ||
diff --git a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c index e9b970846c41..25e145fb7087 100644 --- a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c +++ b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c | |||
@@ -327,7 +327,7 @@ static int kfr2r09_lcd_backlight(int on) | |||
327 | return 0; | 327 | return 0; |
328 | } | 328 | } |
329 | 329 | ||
330 | void kfr2r09_lcd_on(void *board_data) | 330 | void kfr2r09_lcd_on(void *board_data, struct fb_info *info) |
331 | { | 331 | { |
332 | kfr2r09_lcd_backlight(1); | 332 | kfr2r09_lcd_backlight(1); |
333 | } | 333 | } |
diff --git a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h index 484ef42c2fb5..07e635b0e04c 100644 --- a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h +++ b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h | |||
@@ -3,23 +3,23 @@ | |||
3 | 3 | ||
4 | #include <video/sh_mobile_lcdc.h> | 4 | #include <video/sh_mobile_lcdc.h> |
5 | 5 | ||
6 | #ifdef CONFIG_FB_SH_MOBILE_LCDC | 6 | #if defined(CONFIG_FB_SH_MOBILE_LCDC) || defined(CONFIG_FB_SH_MOBILE_LCDC_MODULE) |
7 | void kfr2r09_lcd_on(void *board_data); | 7 | void kfr2r09_lcd_on(void *board_data, struct fb_info *info); |
8 | void kfr2r09_lcd_off(void *board_data); | 8 | void kfr2r09_lcd_off(void *board_data); |
9 | int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle, | 9 | int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle, |
10 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops); | 10 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops); |
11 | void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle, | 11 | void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle, |
12 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops); | 12 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops); |
13 | #else | 13 | #else |
14 | static inline void kfr2r09_lcd_on(void *board_data) {} | 14 | static void kfr2r09_lcd_on(void *board_data) {} |
15 | static inline void kfr2r09_lcd_off(void *board_data) {} | 15 | static void kfr2r09_lcd_off(void *board_data) {} |
16 | static inline int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle, | 16 | static int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle, |
17 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops) | 17 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops) |
18 | { | 18 | { |
19 | return -ENODEV; | 19 | return -ENODEV; |
20 | } | 20 | } |
21 | static inline void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle, | 21 | static void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle, |
22 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops) | 22 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops) |
23 | { | 23 | { |
24 | } | 24 | } |
25 | #endif | 25 | #endif |