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-rw-r--r--arch/powerpc/sysdev/fsl_pci.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index f88a9aecdf16..13aaefc1af5b 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -89,11 +89,22 @@ void __init setup_pci_atmu(struct pci_controller *hose, struct resource *rsrc)
89void __init setup_pci_cmd(struct pci_controller *hose) 89void __init setup_pci_cmd(struct pci_controller *hose)
90{ 90{
91 u16 cmd; 91 u16 cmd;
92 int cap_x;
93
92 early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd); 94 early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd);
93 cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY 95 cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY
94 | PCI_COMMAND_IO; 96 | PCI_COMMAND_IO;
95 early_write_config_word(hose, 0, 0, PCI_COMMAND, cmd); 97 early_write_config_word(hose, 0, 0, PCI_COMMAND, cmd);
96 early_write_config_byte(hose, 0, 0, PCI_LATENCY_TIMER, 0x80); 98
99 cap_x = early_find_capability(hose, 0, 0, PCI_CAP_ID_PCIX);
100 if (cap_x) {
101 int pci_x_cmd = cap_x + PCI_X_CMD;
102 cmd = PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ
103 | PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E;
104 early_write_config_word(hose, 0, 0, pci_x_cmd, cmd);
105 } else {
106 early_write_config_byte(hose, 0, 0, PCI_LATENCY_TIMER, 0x80);
107 }
97} 108}
98 109
99static void __devinit quirk_fsl_pcie_transparent(struct pci_dev *dev) 110static void __devinit quirk_fsl_pcie_transparent(struct pci_dev *dev)