aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/include/asm/cache.h1
-rw-r--r--arch/alpha/kernel/err_marvel.c6
-rw-r--r--arch/alpha/kernel/osf_sys.c2
-rw-r--r--arch/alpha/kernel/perf_event.c18
-rw-r--r--arch/alpha/kernel/proto.h3
-rw-r--r--arch/alpha/kernel/sys_cabriolet.c19
-rw-r--r--arch/alpha/kernel/sys_takara.c11
-rw-r--r--arch/arm/Kconfig89
-rw-r--r--arch/arm/boot/Makefile8
-rw-r--r--arch/arm/boot/compressed/Makefile4
-rw-r--r--arch/arm/boot/compressed/head.S2
-rw-r--r--arch/arm/common/it8152.c8
-rw-r--r--arch/arm/configs/omap_4430sdp_defconfig3
-rw-r--r--arch/arm/include/asm/dma-mapping.h8
-rw-r--r--arch/arm/include/asm/perf_event.h2
-rw-r--r--arch/arm/include/asm/unistd.h3
-rw-r--r--arch/arm/kernel/calls.S3
-rw-r--r--arch/arm/kernel/etm.c2
-rw-r--r--arch/arm/kernel/perf_event.c12
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c15
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c6
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c31
-rw-r--r--arch/arm/mach-at91/clock.c3
-rw-r--r--arch/arm/mach-ep93xx/clock.c2
-rw-r--r--arch/arm/mach-imx/mach-cpuimx27.c4
-rw-r--r--arch/arm/mach-imx/mach-pca100.c4
-rw-r--r--arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c2
-rw-r--r--arch/arm/mach-mx25/mach-cpuimx25.c6
-rw-r--r--arch/arm/mach-mx3/clock-imx35.c77
-rw-r--r--arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c2
-rw-r--r--arch/arm/mach-mx3/mach-cpuimx35.c6
-rw-r--r--arch/arm/mach-mx5/clock-mx51.c2
-rw-r--r--arch/arm/mach-omap2/Makefile1
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c14
-rw-r--r--arch/arm/mach-omap2/id.c2
-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-omap2/omap-smp.c3
-rw-r--r--arch/arm/mach-omap2/pm34xx.c4
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa2xx.c2
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa3xx.c2
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa300.h4
-rw-r--r--arch/arm/mach-s3c2410/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-s5p6440/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-s5p6442/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-s5pv210/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-s5pv310/clock.c82
-rw-r--r--arch/arm/mach-s5pv310/cpu.c10
-rw-r--r--arch/arm/mach-s5pv310/include/mach/irqs.h11
-rw-r--r--arch/arm/mach-s5pv310/include/mach/map.h16
-rw-r--r--arch/arm/mach-s5pv310/include/mach/regs-clock.h59
-rw-r--r--arch/arm/mach-s5pv310/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-s5pv310/platsmp.c2
-rw-r--r--arch/arm/mach-shmobile/Makefile2
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c56
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c9
-rw-r--r--arch/arm/mach-shmobile/clock.c4
-rw-r--r--arch/arm/mach-shmobile/pm_runtime.c169
-rw-r--r--arch/arm/mach-tegra/board-harmony.c2
-rw-r--r--arch/arm/mach-tegra/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mm/Kconfig2
-rw-r--r--arch/arm/mm/dma-mapping.c2
-rw-r--r--arch/arm/plat-mxc/Kconfig1
-rw-r--r--arch/arm/plat-mxc/include/mach/eukrea-baseboards.h4
-rw-r--r--arch/arm/plat-mxc/tzic.c5
-rw-r--r--arch/arm/plat-omap/include/plat/smp.h7
-rw-r--r--arch/arm/plat-pxa/pwm.c2
-rw-r--r--arch/arm/plat-s5p/include/plat/map-s5p.h2
-rw-r--r--arch/arm/tools/mach-types98
-rw-r--r--arch/blackfin/include/asm/bfin_sport.h6
-rw-r--r--arch/blackfin/include/asm/bitops.h17
-rw-r--r--arch/blackfin/include/asm/unistd.h5
-rw-r--r--arch/blackfin/mach-bf518/include/mach/defBF51x_base.h82
-rw-r--r--arch/blackfin/mach-bf527/boards/cm_bf527.c1
-rw-r--r--arch/blackfin/mach-bf527/boards/ezbrd.c1
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c1
-rw-r--r--arch/blackfin/mach-bf527/include/mach/defBF52x_base.h82
-rw-r--r--arch/blackfin/mach-bf533/include/mach/defBF532.h92
-rw-r--r--arch/blackfin/mach-bf537/include/mach/defBF534.h80
-rw-r--r--arch/blackfin/mach-bf538/include/mach/defBF539.h107
-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c1
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c1
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF54x_base.h67
-rw-r--r--arch/blackfin/mach-bf561/include/mach/defBF561.h60
-rw-r--r--arch/blackfin/mach-common/entry.S3
-rw-r--r--arch/h8300/include/asm/atomic.h15
-rw-r--r--arch/h8300/include/asm/system.h4
-rw-r--r--arch/h8300/kernel/sys_h8300.c4
-rw-r--r--arch/h8300/kernel/traps.c2
-rw-r--r--arch/ia64/hp/sim/simserial.c2
-rw-r--r--arch/m68knommu/kernel/vmlinux.lds.S2
-rw-r--r--arch/mn10300/mm/dma-alloc.c3
-rw-r--r--arch/powerpc/Makefile2
-rw-r--r--arch/powerpc/boot/dts/canyonlands.dts8
-rw-r--r--arch/powerpc/include/asm/fsldma.h1
-rw-r--r--arch/powerpc/include/asm/mmu-hash64.h2
-rw-r--r--arch/powerpc/include/asm/reg.h9
-rw-r--r--arch/powerpc/include/asm/rwsem.h64
-rw-r--r--arch/powerpc/include/asm/systbl.h3
-rw-r--r--arch/powerpc/include/asm/unistd.h5
-rw-r--r--arch/powerpc/kernel/cputable.c1
-rw-r--r--arch/powerpc/kernel/crash.c24
-rw-r--r--arch/powerpc/kernel/head_44x.S4
-rw-r--r--arch/powerpc/kernel/head_64.S18
-rw-r--r--arch/powerpc/kernel/idle.c2
-rw-r--r--arch/powerpc/kernel/irq.c16
-rw-r--r--arch/powerpc/kernel/misc_32.S3
-rw-r--r--arch/powerpc/kernel/pci_of_scan.c2
-rw-r--r--arch/powerpc/kernel/process.c20
-rw-r--r--arch/powerpc/kernel/setup_32.c9
-rw-r--r--arch/powerpc/kernel/setup_64.c63
-rw-r--r--arch/powerpc/kernel/smp.c4
-rw-r--r--arch/powerpc/kernel/sys_ppc32.c8
-rw-r--r--arch/powerpc/kernel/time.c23
-rw-r--r--arch/powerpc/kernel/vio.c3
-rw-r--r--arch/powerpc/mm/init_64.c2
-rw-r--r--arch/powerpc/mm/tlb_nohash_low.S1
-rw-r--r--arch/powerpc/platforms/83xx/mpc837x_mds.c9
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_mds.c1
-rw-r--r--arch/powerpc/platforms/85xx/p1022_ds.c4
-rw-r--r--arch/powerpc/platforms/Kconfig3
-rw-r--r--arch/powerpc/platforms/cell/iommu.c2
-rw-r--r--arch/powerpc/platforms/iseries/iommu.c2
-rw-r--r--arch/powerpc/platforms/powermac/feature.c3
-rw-r--r--arch/powerpc/platforms/powermac/pci.c2
-rw-r--r--arch/powerpc/platforms/pseries/dlpar.c42
-rw-r--r--arch/powerpc/platforms/pseries/iommu.c8
-rw-r--r--arch/powerpc/platforms/pseries/smp.c11
-rw-r--r--arch/powerpc/platforms/pseries/xics.c6
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c2
-rw-r--r--arch/powerpc/sysdev/fsl_rio.c6
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c1
-rw-r--r--arch/powerpc/xmon/xmon.c5
-rw-r--r--arch/s390/include/asm/hugetlb.h4
-rw-r--r--arch/s390/include/asm/mmu.h2
-rw-r--r--arch/s390/include/asm/mmu_context.h9
-rw-r--r--arch/s390/include/asm/pgtable.h6
-rw-r--r--arch/s390/include/asm/tlb.h3
-rw-r--r--arch/s390/include/asm/tlbflush.h6
-rw-r--r--arch/s390/kernel/entry.h4
-rw-r--r--arch/s390/kernel/smp.c2
-rw-r--r--arch/s390/mm/init.c2
-rw-r--r--arch/sparc/include/asm/atomic_64.h8
-rw-r--r--arch/sparc/include/asm/backoff.h11
-rw-r--r--arch/sparc/include/asm/oplib_64.h27
-rw-r--r--arch/sparc/include/asm/rwsem-const.h12
-rw-r--r--arch/sparc/include/asm/rwsem.h120
-rw-r--r--arch/sparc/include/asm/system_64.h1
-rw-r--r--arch/sparc/kernel/process_64.c2
-rw-r--r--arch/sparc/lib/Makefile2
-rw-r--r--arch/sparc/lib/atomic_64.S36
-rw-r--r--arch/sparc/lib/bitops.S12
-rw-r--r--arch/sparc/lib/rwsem_64.S163
-rw-r--r--arch/sparc/prom/cif.S16
-rw-r--r--arch/sparc/prom/console_64.c48
-rw-r--r--arch/sparc/prom/devops_64.c36
-rw-r--r--arch/sparc/prom/misc_64.c314
-rw-r--r--arch/sparc/prom/p1275.c102
-rw-r--r--arch/sparc/prom/tree_64.c210
-rw-r--r--arch/um/drivers/mconsole_kern.c2
-rw-r--r--arch/x86/include/asm/iomap.h4
-rw-r--r--arch/x86/include/asm/pci.h6
-rw-r--r--arch/x86/include/asm/tsc.h2
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_amd.c4
-rw-r--r--arch/x86/kernel/cpu/mcheck/therm_throt.c9
-rw-r--r--arch/x86/kernel/cpu/perf_event.c59
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c15
-rw-r--r--arch/x86/kernel/cpu/perf_event_p4.c4
-rw-r--r--arch/x86/kernel/trampoline.c3
-rw-r--r--arch/x86/kernel/tsc.c38
-rw-r--r--arch/x86/mm/iomap_32.c6
-rw-r--r--arch/x86/oprofile/nmi_int.c22
-rw-r--r--arch/x86/power/cpu.c2
-rw-r--r--arch/x86/xen/platform-pci-unplug.c18
174 files changed, 1719 insertions, 1636 deletions
diff --git a/arch/alpha/include/asm/cache.h b/arch/alpha/include/asm/cache.h
index f199e69a5d0b..ad368a93a46a 100644
--- a/arch/alpha/include/asm/cache.h
+++ b/arch/alpha/include/asm/cache.h
@@ -17,7 +17,6 @@
17# define L1_CACHE_SHIFT 5 17# define L1_CACHE_SHIFT 5
18#endif 18#endif
19 19
20#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
21#define SMP_CACHE_BYTES L1_CACHE_BYTES 20#define SMP_CACHE_BYTES L1_CACHE_BYTES
22 21
23#endif 22#endif
diff --git a/arch/alpha/kernel/err_marvel.c b/arch/alpha/kernel/err_marvel.c
index 52a79dfc13c6..5c905aaaeccd 100644
--- a/arch/alpha/kernel/err_marvel.c
+++ b/arch/alpha/kernel/err_marvel.c
@@ -109,7 +109,7 @@ marvel_print_err_cyc(u64 err_cyc)
109#define IO7__ERR_CYC__CYCLE__M (0x7) 109#define IO7__ERR_CYC__CYCLE__M (0x7)
110 110
111 printk("%s Packet In Error: %s\n" 111 printk("%s Packet In Error: %s\n"
112 "%s Error in %s, cycle %ld%s%s\n", 112 "%s Error in %s, cycle %lld%s%s\n",
113 err_print_prefix, 113 err_print_prefix,
114 packet_desc[EXTRACT(err_cyc, IO7__ERR_CYC__PACKET)], 114 packet_desc[EXTRACT(err_cyc, IO7__ERR_CYC__PACKET)],
115 err_print_prefix, 115 err_print_prefix,
@@ -313,7 +313,7 @@ marvel_print_po7_ugbge_sym(u64 ugbge_sym)
313 } 313 }
314 314
315 printk("%s Up Hose Garbage Symptom:\n" 315 printk("%s Up Hose Garbage Symptom:\n"
316 "%s Source Port: %ld - Dest PID: %ld - OpCode: %s\n", 316 "%s Source Port: %lld - Dest PID: %lld - OpCode: %s\n",
317 err_print_prefix, 317 err_print_prefix,
318 err_print_prefix, 318 err_print_prefix,
319 EXTRACT(ugbge_sym, IO7__PO7_UGBGE_SYM__UPH_SRC_PORT), 319 EXTRACT(ugbge_sym, IO7__PO7_UGBGE_SYM__UPH_SRC_PORT),
@@ -552,7 +552,7 @@ marvel_print_pox_spl_cmplt(u64 spl_cmplt)
552#define IO7__POX_SPLCMPLT__REM_BYTE_COUNT__M (0xfff) 552#define IO7__POX_SPLCMPLT__REM_BYTE_COUNT__M (0xfff)
553 553
554 printk("%s Split Completion Error:\n" 554 printk("%s Split Completion Error:\n"
555 "%s Source (Bus:Dev:Func): %ld:%ld:%ld\n", 555 "%s Source (Bus:Dev:Func): %lld:%lld:%lld\n",
556 err_print_prefix, 556 err_print_prefix,
557 err_print_prefix, 557 err_print_prefix,
558 EXTRACT(spl_cmplt, IO7__POX_SPLCMPLT__SOURCE_BUS), 558 EXTRACT(spl_cmplt, IO7__POX_SPLCMPLT__SOURCE_BUS),
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index fb58150a7e8f..5d1e6d6ce684 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -252,7 +252,7 @@ SYSCALL_DEFINE3(osf_statfs, const char __user *, pathname,
252 252
253 retval = user_path(pathname, &path); 253 retval = user_path(pathname, &path);
254 if (!retval) { 254 if (!retval) {
255 retval = do_osf_statfs(&path buffer, bufsiz); 255 retval = do_osf_statfs(&path, buffer, bufsiz);
256 path_put(&path); 256 path_put(&path);
257 } 257 }
258 return retval; 258 return retval;
diff --git a/arch/alpha/kernel/perf_event.c b/arch/alpha/kernel/perf_event.c
index 51c39fa41693..85d8e4f58c83 100644
--- a/arch/alpha/kernel/perf_event.c
+++ b/arch/alpha/kernel/perf_event.c
@@ -241,20 +241,20 @@ static inline unsigned long alpha_read_pmc(int idx)
241static int alpha_perf_event_set_period(struct perf_event *event, 241static int alpha_perf_event_set_period(struct perf_event *event,
242 struct hw_perf_event *hwc, int idx) 242 struct hw_perf_event *hwc, int idx)
243{ 243{
244 long left = atomic64_read(&hwc->period_left); 244 long left = local64_read(&hwc->period_left);
245 long period = hwc->sample_period; 245 long period = hwc->sample_period;
246 int ret = 0; 246 int ret = 0;
247 247
248 if (unlikely(left <= -period)) { 248 if (unlikely(left <= -period)) {
249 left = period; 249 left = period;
250 atomic64_set(&hwc->period_left, left); 250 local64_set(&hwc->period_left, left);
251 hwc->last_period = period; 251 hwc->last_period = period;
252 ret = 1; 252 ret = 1;
253 } 253 }
254 254
255 if (unlikely(left <= 0)) { 255 if (unlikely(left <= 0)) {
256 left += period; 256 left += period;
257 atomic64_set(&hwc->period_left, left); 257 local64_set(&hwc->period_left, left);
258 hwc->last_period = period; 258 hwc->last_period = period;
259 ret = 1; 259 ret = 1;
260 } 260 }
@@ -269,7 +269,7 @@ static int alpha_perf_event_set_period(struct perf_event *event,
269 if (left > (long)alpha_pmu->pmc_max_period[idx]) 269 if (left > (long)alpha_pmu->pmc_max_period[idx])
270 left = alpha_pmu->pmc_max_period[idx]; 270 left = alpha_pmu->pmc_max_period[idx];
271 271
272 atomic64_set(&hwc->prev_count, (unsigned long)(-left)); 272 local64_set(&hwc->prev_count, (unsigned long)(-left));
273 273
274 alpha_write_pmc(idx, (unsigned long)(-left)); 274 alpha_write_pmc(idx, (unsigned long)(-left));
275 275
@@ -300,10 +300,10 @@ static unsigned long alpha_perf_event_update(struct perf_event *event,
300 long delta; 300 long delta;
301 301
302again: 302again:
303 prev_raw_count = atomic64_read(&hwc->prev_count); 303 prev_raw_count = local64_read(&hwc->prev_count);
304 new_raw_count = alpha_read_pmc(idx); 304 new_raw_count = alpha_read_pmc(idx);
305 305
306 if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count, 306 if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
307 new_raw_count) != prev_raw_count) 307 new_raw_count) != prev_raw_count)
308 goto again; 308 goto again;
309 309
@@ -316,8 +316,8 @@ again:
316 delta += alpha_pmu->pmc_max_period[idx] + 1; 316 delta += alpha_pmu->pmc_max_period[idx] + 1;
317 } 317 }
318 318
319 atomic64_add(delta, &event->count); 319 local64_add(delta, &event->count);
320 atomic64_sub(delta, &hwc->period_left); 320 local64_sub(delta, &hwc->period_left);
321 321
322 return new_raw_count; 322 return new_raw_count;
323} 323}
@@ -636,7 +636,7 @@ static int __hw_perf_event_init(struct perf_event *event)
636 if (!hwc->sample_period) { 636 if (!hwc->sample_period) {
637 hwc->sample_period = alpha_pmu->pmc_max_period[0]; 637 hwc->sample_period = alpha_pmu->pmc_max_period[0];
638 hwc->last_period = hwc->sample_period; 638 hwc->last_period = hwc->sample_period;
639 atomic64_set(&hwc->period_left, hwc->sample_period); 639 local64_set(&hwc->period_left, hwc->sample_period);
640 } 640 }
641 641
642 return 0; 642 return 0;
diff --git a/arch/alpha/kernel/proto.h b/arch/alpha/kernel/proto.h
index 3d2627ec9860..d3e52d3fd592 100644
--- a/arch/alpha/kernel/proto.h
+++ b/arch/alpha/kernel/proto.h
@@ -156,9 +156,6 @@ extern void SMC669_Init(int);
156/* es1888.c */ 156/* es1888.c */
157extern void es1888_init(void); 157extern void es1888_init(void);
158 158
159/* ns87312.c */
160extern void ns87312_enable_ide(long ide_base);
161
162/* ../lib/fpreg.c */ 159/* ../lib/fpreg.c */
163extern void alpha_write_fp_reg (unsigned long reg, unsigned long val); 160extern void alpha_write_fp_reg (unsigned long reg, unsigned long val);
164extern unsigned long alpha_read_fp_reg (unsigned long reg); 161extern unsigned long alpha_read_fp_reg (unsigned long reg);
diff --git a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c
index affd0f3f25df..14c8898d19ec 100644
--- a/arch/alpha/kernel/sys_cabriolet.c
+++ b/arch/alpha/kernel/sys_cabriolet.c
@@ -33,7 +33,7 @@
33#include "irq_impl.h" 33#include "irq_impl.h"
34#include "pci_impl.h" 34#include "pci_impl.h"
35#include "machvec_impl.h" 35#include "machvec_impl.h"
36 36#include "pc873xx.h"
37 37
38/* Note mask bit is true for DISABLED irqs. */ 38/* Note mask bit is true for DISABLED irqs. */
39static unsigned long cached_irq_mask = ~0UL; 39static unsigned long cached_irq_mask = ~0UL;
@@ -236,17 +236,30 @@ cabriolet_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
236} 236}
237 237
238static inline void __init 238static inline void __init
239cabriolet_enable_ide(void)
240{
241 if (pc873xx_probe() == -1) {
242 printk(KERN_ERR "Probing for PC873xx Super IO chip failed.\n");
243 } else {
244 printk(KERN_INFO "Found %s Super IO chip at 0x%x\n",
245 pc873xx_get_model(), pc873xx_get_base());
246
247 pc873xx_enable_ide();
248 }
249}
250
251static inline void __init
239cabriolet_init_pci(void) 252cabriolet_init_pci(void)
240{ 253{
241 common_init_pci(); 254 common_init_pci();
242 ns87312_enable_ide(0x398); 255 cabriolet_enable_ide();
243} 256}
244 257
245static inline void __init 258static inline void __init
246cia_cab_init_pci(void) 259cia_cab_init_pci(void)
247{ 260{
248 cia_init_pci(); 261 cia_init_pci();
249 ns87312_enable_ide(0x398); 262 cabriolet_enable_ide();
250} 263}
251 264
252/* 265/*
diff --git a/arch/alpha/kernel/sys_takara.c b/arch/alpha/kernel/sys_takara.c
index 230464885b5c..4da596b6adbb 100644
--- a/arch/alpha/kernel/sys_takara.c
+++ b/arch/alpha/kernel/sys_takara.c
@@ -29,7 +29,7 @@
29#include "irq_impl.h" 29#include "irq_impl.h"
30#include "pci_impl.h" 30#include "pci_impl.h"
31#include "machvec_impl.h" 31#include "machvec_impl.h"
32 32#include "pc873xx.h"
33 33
34/* Note mask bit is true for DISABLED irqs. */ 34/* Note mask bit is true for DISABLED irqs. */
35static unsigned long cached_irq_mask[2] = { -1, -1 }; 35static unsigned long cached_irq_mask[2] = { -1, -1 };
@@ -264,7 +264,14 @@ takara_init_pci(void)
264 alpha_mv.pci_map_irq = takara_map_irq_srm; 264 alpha_mv.pci_map_irq = takara_map_irq_srm;
265 265
266 cia_init_pci(); 266 cia_init_pci();
267 ns87312_enable_ide(0x26e); 267
268 if (pc873xx_probe() == -1) {
269 printk(KERN_ERR "Probing for PC873xx Super IO chip failed.\n");
270 } else {
271 printk(KERN_INFO "Found %s Super IO chip at 0x%x\n",
272 pc873xx_get_model(), pc873xx_get_base());
273 pc873xx_enable_ide();
274 }
268} 275}
269 276
270 277
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 92951103255a..553b7cf17bfb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1576,95 +1576,6 @@ config AUTO_ZRELADDR
1576 0xf8000000. This assumes the zImage being placed in the first 128MB 1576 0xf8000000. This assumes the zImage being placed in the first 128MB
1577 from start of memory. 1577 from start of memory.
1578 1578
1579config ZRELADDR
1580 hex "Physical address of the decompressed kernel image"
1581 depends on !AUTO_ZRELADDR
1582 default 0x00008000 if ARCH_BCMRING ||\
1583 ARCH_CNS3XXX ||\
1584 ARCH_DOVE ||\
1585 ARCH_EBSA110 ||\
1586 ARCH_FOOTBRIDGE ||\
1587 ARCH_INTEGRATOR ||\
1588 ARCH_IOP13XX ||\
1589 ARCH_IOP33X ||\
1590 ARCH_IXP2000 ||\
1591 ARCH_IXP23XX ||\
1592 ARCH_IXP4XX ||\
1593 ARCH_KIRKWOOD ||\
1594 ARCH_KS8695 ||\
1595 ARCH_LOKI ||\
1596 ARCH_MMP ||\
1597 ARCH_MV78XX0 ||\
1598 ARCH_NOMADIK ||\
1599 ARCH_NUC93X ||\
1600 ARCH_NS9XXX ||\
1601 ARCH_ORION5X ||\
1602 ARCH_SPEAR3XX ||\
1603 ARCH_SPEAR6XX ||\
1604 ARCH_U8500 ||\
1605 ARCH_VERSATILE ||\
1606 ARCH_W90X900
1607 default 0x08008000 if ARCH_MX1 ||\
1608 ARCH_SHARK
1609 default 0x10008000 if ARCH_MSM ||\
1610 ARCH_OMAP1 ||\
1611 ARCH_RPC
1612 default 0x20008000 if ARCH_S5P6440 ||\
1613 ARCH_S5P6442 ||\
1614 ARCH_S5PC100 ||\
1615 ARCH_S5PV210
1616 default 0x30008000 if ARCH_S3C2410 ||\
1617 ARCH_S3C2400 ||\
1618 ARCH_S3C2412 ||\
1619 ARCH_S3C2416 ||\
1620 ARCH_S3C2440 ||\
1621 ARCH_S3C2443
1622 default 0x40008000 if ARCH_STMP378X ||\
1623 ARCH_STMP37XX ||\
1624 ARCH_SH7372 ||\
1625 ARCH_SH7377
1626 default 0x50008000 if ARCH_S3C64XX ||\
1627 ARCH_SH7367
1628 default 0x60008000 if ARCH_VEXPRESS
1629 default 0x80008000 if ARCH_MX25 ||\
1630 ARCH_MX3 ||\
1631 ARCH_NETX ||\
1632 ARCH_OMAP2PLUS ||\
1633 ARCH_PNX4008
1634 default 0x90008000 if ARCH_MX5 ||\
1635 ARCH_MX91231
1636 default 0xa0008000 if ARCH_IOP32X ||\
1637 ARCH_PXA ||\
1638 MACH_MX27
1639 default 0xc0008000 if ARCH_LH7A40X ||\
1640 MACH_MX21
1641 default 0xf0008000 if ARCH_AAEC2000 ||\
1642 ARCH_L7200
1643 default 0xc0028000 if ARCH_CLPS711X
1644 default 0x70008000 if ARCH_AT91 && (ARCH_AT91CAP9 || ARCH_AT91SAM9G45)
1645 default 0x20008000 if ARCH_AT91 && !(ARCH_AT91CAP9 || ARCH_AT91SAM9G45)
1646 default 0xc0008000 if ARCH_DAVINCI && ARCH_DAVINCI_DA8XX
1647 default 0x80008000 if ARCH_DAVINCI && !ARCH_DAVINCI_DA8XX
1648 default 0x00008000 if ARCH_EP93XX && EP93XX_SDCE3_SYNC_PHYS_OFFSET
1649 default 0xc0008000 if ARCH_EP93XX && EP93XX_SDCE0_PHYS_OFFSET
1650 default 0xd0008000 if ARCH_EP93XX && EP93XX_SDCE1_PHYS_OFFSET
1651 default 0xe0008000 if ARCH_EP93XX && EP93XX_SDCE2_PHYS_OFFSET
1652 default 0xf0008000 if ARCH_EP93XX && EP93XX_SDCE3_ASYNC_PHYS_OFFSET
1653 default 0x00008000 if ARCH_GEMINI && GEMINI_MEM_SWAP
1654 default 0x10008000 if ARCH_GEMINI && !GEMINI_MEM_SWAP
1655 default 0x70008000 if ARCH_REALVIEW && REALVIEW_HIGH_PHYS_OFFSET
1656 default 0x00008000 if ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET
1657 default 0xc0208000 if ARCH_SA1100 && SA1111
1658 default 0xc0008000 if ARCH_SA1100 && !SA1111
1659 default 0x30108000 if ARCH_S3C2410 && PM_H1940
1660 default 0x28E08000 if ARCH_U300 && MACH_U300_SINGLE_RAM
1661 default 0x48008000 if ARCH_U300 && !MACH_U300_SINGLE_RAM
1662 help
1663 ZRELADDR is the physical address where the decompressed kernel
1664 image will be placed. ZRELADDR has to be specified when the
1665 assumption of AUTO_ZRELADDR is not valid, or when ZBOOT_ROM is
1666 selected.
1667
1668endmenu 1579endmenu
1669 1580
1670menu "CPU Power Management" 1581menu "CPU Power Management"
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index f705213caa88..4a590f4113e2 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -14,16 +14,18 @@
14MKIMAGE := $(srctree)/scripts/mkuboot.sh 14MKIMAGE := $(srctree)/scripts/mkuboot.sh
15 15
16ifneq ($(MACHINE),) 16ifneq ($(MACHINE),)
17-include $(srctree)/$(MACHINE)/Makefile.boot 17include $(srctree)/$(MACHINE)/Makefile.boot
18endif 18endif
19 19
20# Note: the following conditions must always be true: 20# Note: the following conditions must always be true:
21# ZRELADDR == virt_to_phys(PAGE_OFFSET + TEXT_OFFSET)
21# PARAMS_PHYS must be within 4MB of ZRELADDR 22# PARAMS_PHYS must be within 4MB of ZRELADDR
22# INITRD_PHYS must be in RAM 23# INITRD_PHYS must be in RAM
24ZRELADDR := $(zreladdr-y)
23PARAMS_PHYS := $(params_phys-y) 25PARAMS_PHYS := $(params_phys-y)
24INITRD_PHYS := $(initrd_phys-y) 26INITRD_PHYS := $(initrd_phys-y)
25 27
26export INITRD_PHYS PARAMS_PHYS 28export ZRELADDR INITRD_PHYS PARAMS_PHYS
27 29
28targets := Image zImage xipImage bootpImage uImage 30targets := Image zImage xipImage bootpImage uImage
29 31
@@ -65,7 +67,7 @@ quiet_cmd_uimage = UIMAGE $@
65ifeq ($(CONFIG_ZBOOT_ROM),y) 67ifeq ($(CONFIG_ZBOOT_ROM),y)
66$(obj)/uImage: LOADADDR=$(CONFIG_ZBOOT_ROM_TEXT) 68$(obj)/uImage: LOADADDR=$(CONFIG_ZBOOT_ROM_TEXT)
67else 69else
68$(obj)/uImage: LOADADDR=$(CONFIG_ZRELADDR) 70$(obj)/uImage: LOADADDR=$(ZRELADDR)
69endif 71endif
70 72
71ifeq ($(CONFIG_THUMB2_KERNEL),y) 73ifeq ($(CONFIG_THUMB2_KERNEL),y)
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 68775e33476c..b23f6bc46cfa 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -79,6 +79,10 @@ endif
79EXTRA_CFLAGS := -fpic -fno-builtin 79EXTRA_CFLAGS := -fpic -fno-builtin
80EXTRA_AFLAGS := -Wa,-march=all 80EXTRA_AFLAGS := -Wa,-march=all
81 81
82# Supply ZRELADDR to the decompressor via a linker symbol.
83ifneq ($(CONFIG_AUTO_ZRELADDR),y)
84LDFLAGS_vmlinux := --defsym zreladdr=$(ZRELADDR)
85endif
82ifeq ($(CONFIG_CPU_ENDIAN_BE8),y) 86ifeq ($(CONFIG_CPU_ENDIAN_BE8),y)
83LDFLAGS_vmlinux += --be8 87LDFLAGS_vmlinux += --be8
84endif 88endif
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 6af9907c3b5c..6825c34646d4 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -177,7 +177,7 @@ not_angel:
177 and r4, pc, #0xf8000000 177 and r4, pc, #0xf8000000
178 add r4, r4, #TEXT_OFFSET 178 add r4, r4, #TEXT_OFFSET
179#else 179#else
180 ldr r4, =CONFIG_ZRELADDR 180 ldr r4, =zreladdr
181#endif 181#endif
182 subs r0, r0, r1 @ calculate the delta offset 182 subs r0, r0, r1 @ calculate the delta offset
183 183
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 6c0913562455..7974baacafce 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -263,6 +263,14 @@ static int it8152_pci_platform_notify_remove(struct device *dev)
263 return 0; 263 return 0;
264} 264}
265 265
266int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
267{
268 dev_dbg(dev, "%s: dma_addr %08x, size %08x\n",
269 __func__, dma_addr, size);
270 return (dev->bus == &pci_bus_type) &&
271 ((dma_addr + size - PHYS_OFFSET) >= SZ_64M);
272}
273
266int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) 274int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
267{ 275{
268 it8152_io.start = IT8152_IO_BASE + 0x12000; 276 it8152_io.start = IT8152_IO_BASE + 0x12000;
diff --git a/arch/arm/configs/omap_4430sdp_defconfig b/arch/arm/configs/omap_4430sdp_defconfig
index 63e0c2d50f32..14c1e18c648f 100644
--- a/arch/arm/configs/omap_4430sdp_defconfig
+++ b/arch/arm/configs/omap_4430sdp_defconfig
@@ -13,6 +13,9 @@ CONFIG_MODULE_SRCVERSION_ALL=y
13# CONFIG_BLK_DEV_BSG is not set 13# CONFIG_BLK_DEV_BSG is not set
14CONFIG_ARCH_OMAP=y 14CONFIG_ARCH_OMAP=y
15CONFIG_ARCH_OMAP4=y 15CONFIG_ARCH_OMAP4=y
16# CONFIG_ARCH_OMAP2PLUS_TYPICAL is not set
17# CONFIG_ARCH_OMAP2 is not set
18# CONFIG_ARCH_OMAP3 is not set
16# CONFIG_OMAP_MUX is not set 19# CONFIG_OMAP_MUX is not set
17CONFIG_OMAP_32K_TIMER=y 20CONFIG_OMAP_32K_TIMER=y
18CONFIG_OMAP_DM_TIMER=y 21CONFIG_OMAP_DM_TIMER=y
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index c226fe10553e..c568da7dcae4 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -288,15 +288,7 @@ extern void dmabounce_unregister_dev(struct device *);
288 * DMA access and 1 if the buffer needs to be bounced. 288 * DMA access and 1 if the buffer needs to be bounced.
289 * 289 *
290 */ 290 */
291#ifdef CONFIG_SA1111
292extern int dma_needs_bounce(struct device*, dma_addr_t, size_t); 291extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
293#else
294static inline int dma_needs_bounce(struct device *dev, dma_addr_t addr,
295 size_t size)
296{
297 return 0;
298}
299#endif
300 292
301/* 293/*
302 * The DMA API, implemented by dmabounce.c. See below for descriptions. 294 * The DMA API, implemented by dmabounce.c. See below for descriptions.
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index 48837e6d8887..b5799a3b7117 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -17,7 +17,7 @@
17 * counter interrupts are regular interrupts and not an NMI. This 17 * counter interrupts are regular interrupts and not an NMI. This
18 * means that when we receive the interrupt we can call 18 * means that when we receive the interrupt we can call
19 * perf_event_do_pending() that handles all of the work with 19 * perf_event_do_pending() that handles all of the work with
20 * interrupts enabled. 20 * interrupts disabled.
21 */ 21 */
22static inline void 22static inline void
23set_perf_event_pending(void) 23set_perf_event_pending(void)
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index d02cfb683487..c891eb76c0e3 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -393,6 +393,9 @@
393#define __NR_perf_event_open (__NR_SYSCALL_BASE+364) 393#define __NR_perf_event_open (__NR_SYSCALL_BASE+364)
394#define __NR_recvmmsg (__NR_SYSCALL_BASE+365) 394#define __NR_recvmmsg (__NR_SYSCALL_BASE+365)
395#define __NR_accept4 (__NR_SYSCALL_BASE+366) 395#define __NR_accept4 (__NR_SYSCALL_BASE+366)
396#define __NR_fanotify_init (__NR_SYSCALL_BASE+367)
397#define __NR_fanotify_mark (__NR_SYSCALL_BASE+368)
398#define __NR_prlimit64 (__NR_SYSCALL_BASE+369)
396 399
397/* 400/*
398 * The following SWIs are ARM private. 401 * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index afeb71fa72cb..5c26eccef998 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -376,6 +376,9 @@
376 CALL(sys_perf_event_open) 376 CALL(sys_perf_event_open)
377/* 365 */ CALL(sys_recvmmsg) 377/* 365 */ CALL(sys_recvmmsg)
378 CALL(sys_accept4) 378 CALL(sys_accept4)
379 CALL(sys_fanotify_init)
380 CALL(sys_fanotify_mark)
381 CALL(sys_prlimit64)
379#ifndef syscalls_counted 382#ifndef syscalls_counted
380.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 383.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
381#define syscalls_counted 384#define syscalls_counted
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c
index 56418f98cd01..33c7077174db 100644
--- a/arch/arm/kernel/etm.c
+++ b/arch/arm/kernel/etm.c
@@ -230,7 +230,7 @@ static void etm_dump(void)
230 etb_lock(t); 230 etb_lock(t);
231} 231}
232 232
233static void sysrq_etm_dump(int key, struct tty_struct *tty) 233static void sysrq_etm_dump(int key)
234{ 234{
235 dev_dbg(tracer.dev, "Dumping ETB buffer\n"); 235 dev_dbg(tracer.dev, "Dumping ETB buffer\n");
236 etm_dump(); 236 etm_dump();
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 417c392ddf1c..ecbb0288e5dd 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -319,8 +319,8 @@ validate_event(struct cpu_hw_events *cpuc,
319{ 319{
320 struct hw_perf_event fake_event = event->hw; 320 struct hw_perf_event fake_event = event->hw;
321 321
322 if (event->pmu && event->pmu != &pmu) 322 if (event->pmu != &pmu || event->state <= PERF_EVENT_STATE_OFF)
323 return 0; 323 return 1;
324 324
325 return armpmu->get_event_idx(cpuc, &fake_event) >= 0; 325 return armpmu->get_event_idx(cpuc, &fake_event) >= 0;
326} 326}
@@ -1041,8 +1041,8 @@ armv6pmu_handle_irq(int irq_num,
1041 /* 1041 /*
1042 * Handle the pending perf events. 1042 * Handle the pending perf events.
1043 * 1043 *
1044 * Note: this call *must* be run with interrupts enabled. For 1044 * Note: this call *must* be run with interrupts disabled. For
1045 * platforms that can have the PMU interrupts raised as a PMI, this 1045 * platforms that can have the PMU interrupts raised as an NMI, this
1046 * will not work. 1046 * will not work.
1047 */ 1047 */
1048 perf_event_do_pending(); 1048 perf_event_do_pending();
@@ -2017,8 +2017,8 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
2017 /* 2017 /*
2018 * Handle the pending perf events. 2018 * Handle the pending perf events.
2019 * 2019 *
2020 * Note: this call *must* be run with interrupts enabled. For 2020 * Note: this call *must* be run with interrupts disabled. For
2021 * platforms that can have the PMU interrupts raised as a PMI, this 2021 * platforms that can have the PMU interrupts raised as an NMI, this
2022 * will not work. 2022 * will not work.
2023 */ 2023 */
2024 perf_event_do_pending(); 2024 perf_event_do_pending();
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 753c0d31a3d3..c67b47f1c0fd 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -121,8 +121,8 @@ static struct clk ssc1_clk = {
121 .pmc_mask = 1 << AT91SAM9G45_ID_SSC1, 121 .pmc_mask = 1 << AT91SAM9G45_ID_SSC1,
122 .type = CLK_TYPE_PERIPHERAL, 122 .type = CLK_TYPE_PERIPHERAL,
123}; 123};
124static struct clk tcb_clk = { 124static struct clk tcb0_clk = {
125 .name = "tcb_clk", 125 .name = "tcb0_clk",
126 .pmc_mask = 1 << AT91SAM9G45_ID_TCB, 126 .pmc_mask = 1 << AT91SAM9G45_ID_TCB,
127 .type = CLK_TYPE_PERIPHERAL, 127 .type = CLK_TYPE_PERIPHERAL,
128}; 128};
@@ -192,6 +192,14 @@ static struct clk ohci_clk = {
192 .parent = &uhphs_clk, 192 .parent = &uhphs_clk,
193}; 193};
194 194
195/* One additional fake clock for second TC block */
196static struct clk tcb1_clk = {
197 .name = "tcb1_clk",
198 .pmc_mask = 0,
199 .type = CLK_TYPE_PERIPHERAL,
200 .parent = &tcb0_clk,
201};
202
195static struct clk *periph_clocks[] __initdata = { 203static struct clk *periph_clocks[] __initdata = {
196 &pioA_clk, 204 &pioA_clk,
197 &pioB_clk, 205 &pioB_clk,
@@ -208,7 +216,7 @@ static struct clk *periph_clocks[] __initdata = {
208 &spi1_clk, 216 &spi1_clk,
209 &ssc0_clk, 217 &ssc0_clk,
210 &ssc1_clk, 218 &ssc1_clk,
211 &tcb_clk, 219 &tcb0_clk,
212 &pwm_clk, 220 &pwm_clk,
213 &tsc_clk, 221 &tsc_clk,
214 &dma_clk, 222 &dma_clk,
@@ -221,6 +229,7 @@ static struct clk *periph_clocks[] __initdata = {
221 &mmc1_clk, 229 &mmc1_clk,
222 // irq0 230 // irq0
223 &ohci_clk, 231 &ohci_clk,
232 &tcb1_clk,
224}; 233};
225 234
226/* 235/*
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 809114d5a5a6..5e71ccd5e7d3 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -46,7 +46,7 @@ static struct resource hdmac_resources[] = {
46 .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, 46 .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
47 .flags = IORESOURCE_MEM, 47 .flags = IORESOURCE_MEM,
48 }, 48 },
49 [2] = { 49 [1] = {
50 .start = AT91SAM9G45_ID_DMA, 50 .start = AT91SAM9G45_ID_DMA,
51 .end = AT91SAM9G45_ID_DMA, 51 .end = AT91SAM9G45_ID_DMA,
52 .flags = IORESOURCE_IRQ, 52 .flags = IORESOURCE_IRQ,
@@ -835,9 +835,9 @@ static struct platform_device at91sam9g45_tcb1_device = {
835static void __init at91_add_device_tc(void) 835static void __init at91_add_device_tc(void)
836{ 836{
837 /* this chip has one clock and irq for all six TC channels */ 837 /* this chip has one clock and irq for all six TC channels */
838 at91_clock_associate("tcb_clk", &at91sam9g45_tcb0_device.dev, "t0_clk"); 838 at91_clock_associate("tcb0_clk", &at91sam9g45_tcb0_device.dev, "t0_clk");
839 platform_device_register(&at91sam9g45_tcb0_device); 839 platform_device_register(&at91sam9g45_tcb0_device);
840 at91_clock_associate("tcb_clk", &at91sam9g45_tcb1_device.dev, "t0_clk"); 840 at91_clock_associate("tcb1_clk", &at91sam9g45_tcb1_device.dev, "t0_clk");
841 platform_device_register(&at91sam9g45_tcb1_device); 841 platform_device_register(&at91sam9g45_tcb1_device);
842} 842}
843#else 843#else
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index c4c8865d52d7..65eb0943194f 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -93,11 +93,12 @@ static struct resource dm9000_resource[] = {
93 .start = AT91_PIN_PC11, 93 .start = AT91_PIN_PC11,
94 .end = AT91_PIN_PC11, 94 .end = AT91_PIN_PC11,
95 .flags = IORESOURCE_IRQ 95 .flags = IORESOURCE_IRQ
96 | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE,
96 } 97 }
97}; 98};
98 99
99static struct dm9000_plat_data dm9000_platdata = { 100static struct dm9000_plat_data dm9000_platdata = {
100 .flags = DM9000_PLATF_16BITONLY, 101 .flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM,
101}; 102};
102 103
103static struct platform_device dm9000_device = { 104static struct platform_device dm9000_device = {
@@ -168,17 +169,6 @@ static struct at91_udc_data __initdata ek_udc_data = {
168 169
169 170
170/* 171/*
171 * MCI (SD/MMC)
172 */
173static struct at91_mmc_data __initdata ek_mmc_data = {
174 .wire4 = 1,
175// .det_pin = ... not connected
176// .wp_pin = ... not connected
177// .vcc_pin = ... not connected
178};
179
180
181/*
182 * NAND flash 172 * NAND flash
183 */ 173 */
184static struct mtd_partition __initdata ek_nand_partition[] = { 174static struct mtd_partition __initdata ek_nand_partition[] = {
@@ -246,6 +236,10 @@ static void __init ek_add_device_nand(void)
246 at91_add_device_nand(&ek_nand_data); 236 at91_add_device_nand(&ek_nand_data);
247} 237}
248 238
239/*
240 * SPI related devices
241 */
242#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
249 243
250/* 244/*
251 * ADS7846 Touchscreen 245 * ADS7846 Touchscreen
@@ -356,6 +350,19 @@ static struct spi_board_info ek_spi_devices[] = {
356#endif 350#endif
357}; 351};
358 352
353#else /* CONFIG_SPI_ATMEL_* */
354/* spi0 and mmc/sd share the same PIO pins: cannot be used at the same time */
355
356/*
357 * MCI (SD/MMC)
358 * det_pin, wp_pin and vcc_pin are not connected
359 */
360static struct at91_mmc_data __initdata ek_mmc_data = {
361 .wire4 = 1,
362};
363
364#endif /* CONFIG_SPI_ATMEL_* */
365
359 366
360/* 367/*
361 * LCD Controller 368 * LCD Controller
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 7f7da439341f..7525cee3983f 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -501,7 +501,8 @@ postcore_initcall(at91_clk_debugfs_init);
501int __init clk_register(struct clk *clk) 501int __init clk_register(struct clk *clk)
502{ 502{
503 if (clk_is_peripheral(clk)) { 503 if (clk_is_peripheral(clk)) {
504 clk->parent = &mck; 504 if (!clk->parent)
505 clk->parent = &mck;
505 clk->mode = pmc_periph_mode; 506 clk->mode = pmc_periph_mode;
506 list_add_tail(&clk->node, &clocks); 507 list_add_tail(&clk->node, &clocks);
507 } 508 }
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 8bf3cec98cfa..4566bd1c8660 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -560,4 +560,4 @@ static int __init ep93xx_clock_init(void)
560 clkdev_add_table(clocks, ARRAY_SIZE(clocks)); 560 clkdev_add_table(clocks, ARRAY_SIZE(clocks));
561 return 0; 561 return 0;
562} 562}
563arch_initcall(ep93xx_clock_init); 563postcore_initcall(ep93xx_clock_init);
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index 575ff1ae85a7..339150ab0ea5 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -279,13 +279,13 @@ static void __init eukrea_cpuimx27_init(void)
279#if defined(CONFIG_USB_ULPI) 279#if defined(CONFIG_USB_ULPI)
280 if (otg_mode_host) { 280 if (otg_mode_host) {
281 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 281 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
282 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); 282 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
283 283
284 mxc_register_device(&mxc_otg_host, &otg_pdata); 284 mxc_register_device(&mxc_otg_host, &otg_pdata);
285 } 285 }
286 286
287 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 287 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
288 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); 288 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
289 289
290 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 290 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
291#endif 291#endif
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index a389d1148f18..23c9e1f37b9c 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -419,13 +419,13 @@ static void __init pca100_init(void)
419#if defined(CONFIG_USB_ULPI) 419#if defined(CONFIG_USB_ULPI)
420 if (otg_mode_host) { 420 if (otg_mode_host) {
421 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 421 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
422 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); 422 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
423 423
424 mxc_register_device(&mxc_otg_host, &otg_pdata); 424 mxc_register_device(&mxc_otg_host, &otg_pdata);
425 } 425 }
426 426
427 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 427 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
428 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); 428 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
429 429
430 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 430 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
431#endif 431#endif
diff --git a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
index 91931dcb0689..4aaadc753d3e 100644
--- a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
@@ -215,7 +215,7 @@ struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata = {
215 * Add platform devices present on this baseboard and init 215 * Add platform devices present on this baseboard and init
216 * them from CPU side as far as required to use them later on 216 * them from CPU side as far as required to use them later on
217 */ 217 */
218void __init eukrea_mbimxsd_baseboard_init(void) 218void __init eukrea_mbimxsd25_baseboard_init(void)
219{ 219{
220 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads, 220 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
221 ARRAY_SIZE(eukrea_mbimxsd_pads))) 221 ARRAY_SIZE(eukrea_mbimxsd_pads)))
diff --git a/arch/arm/mach-mx25/mach-cpuimx25.c b/arch/arm/mach-mx25/mach-cpuimx25.c
index 56b2e26d23b4..e064bb3d6919 100644
--- a/arch/arm/mach-mx25/mach-cpuimx25.c
+++ b/arch/arm/mach-mx25/mach-cpuimx25.c
@@ -138,7 +138,7 @@ static void __init eukrea_cpuimx25_init(void)
138#if defined(CONFIG_USB_ULPI) 138#if defined(CONFIG_USB_ULPI)
139 if (otg_mode_host) { 139 if (otg_mode_host) {
140 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 140 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
141 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); 141 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
142 142
143 mxc_register_device(&mxc_otg, &otg_pdata); 143 mxc_register_device(&mxc_otg, &otg_pdata);
144 } 144 }
@@ -147,8 +147,8 @@ static void __init eukrea_cpuimx25_init(void)
147 if (!otg_mode_host) 147 if (!otg_mode_host)
148 mxc_register_device(&otg_udc_device, &otg_device_pdata); 148 mxc_register_device(&otg_udc_device, &otg_device_pdata);
149 149
150#ifdef CONFIG_MACH_EUKREA_MBIMXSD_BASEBOARD 150#ifdef CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD
151 eukrea_mbimxsd_baseboard_init(); 151 eukrea_mbimxsd25_baseboard_init();
152#endif 152#endif
153} 153}
154 154
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index d3af0fdf8475..7a62e744a8b0 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -155,7 +155,7 @@ static unsigned long get_rate_arm(void)
155 155
156 aad = &clk_consumer[(pdr0 >> 16) & 0xf]; 156 aad = &clk_consumer[(pdr0 >> 16) & 0xf];
157 if (aad->sel) 157 if (aad->sel)
158 fref = fref * 2 / 3; 158 fref = fref * 3 / 4;
159 159
160 return fref / aad->arm; 160 return fref / aad->arm;
161} 161}
@@ -164,7 +164,7 @@ static unsigned long get_rate_ahb(struct clk *clk)
164{ 164{
165 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); 165 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
166 struct arm_ahb_div *aad; 166 struct arm_ahb_div *aad;
167 unsigned long fref = get_rate_mpll(); 167 unsigned long fref = get_rate_arm();
168 168
169 aad = &clk_consumer[(pdr0 >> 16) & 0xf]; 169 aad = &clk_consumer[(pdr0 >> 16) & 0xf];
170 170
@@ -176,16 +176,11 @@ static unsigned long get_rate_ipg(struct clk *clk)
176 return get_rate_ahb(NULL) >> 1; 176 return get_rate_ahb(NULL) >> 1;
177} 177}
178 178
179static unsigned long get_3_3_div(unsigned long in)
180{
181 return (((in >> 3) & 0x7) + 1) * ((in & 0x7) + 1);
182}
183
184static unsigned long get_rate_uart(struct clk *clk) 179static unsigned long get_rate_uart(struct clk *clk)
185{ 180{
186 unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); 181 unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3);
187 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); 182 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4);
188 unsigned long div = get_3_3_div(pdr4 >> 10); 183 unsigned long div = ((pdr4 >> 10) & 0x3f) + 1;
189 184
190 if (pdr3 & (1 << 14)) 185 if (pdr3 & (1 << 14))
191 return get_rate_arm() / div; 186 return get_rate_arm() / div;
@@ -216,7 +211,7 @@ static unsigned long get_rate_sdhc(struct clk *clk)
216 break; 211 break;
217 } 212 }
218 213
219 return rate / get_3_3_div(div); 214 return rate / (div + 1);
220} 215}
221 216
222static unsigned long get_rate_mshc(struct clk *clk) 217static unsigned long get_rate_mshc(struct clk *clk)
@@ -270,7 +265,7 @@ static unsigned long get_rate_csi(struct clk *clk)
270 else 265 else
271 rate = get_rate_ppll(); 266 rate = get_rate_ppll();
272 267
273 return rate / get_3_3_div((pdr2 >> 16) & 0x3f); 268 return rate / (((pdr2 >> 16) & 0x3f) + 1);
274} 269}
275 270
276static unsigned long get_rate_otg(struct clk *clk) 271static unsigned long get_rate_otg(struct clk *clk)
@@ -283,25 +278,51 @@ static unsigned long get_rate_otg(struct clk *clk)
283 else 278 else
284 rate = get_rate_ppll(); 279 rate = get_rate_ppll();
285 280
286 return rate / get_3_3_div((pdr4 >> 22) & 0x3f); 281 return rate / (((pdr4 >> 22) & 0x3f) + 1);
287} 282}
288 283
289static unsigned long get_rate_ipg_per(struct clk *clk) 284static unsigned long get_rate_ipg_per(struct clk *clk)
290{ 285{
291 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); 286 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
292 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); 287 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4);
293 unsigned long div1, div2; 288 unsigned long div;
294 289
295 if (pdr0 & (1 << 26)) { 290 if (pdr0 & (1 << 26)) {
296 div1 = (pdr4 >> 19) & 0x7; 291 div = (pdr4 >> 16) & 0x3f;
297 div2 = (pdr4 >> 16) & 0x7; 292 return get_rate_arm() / (div + 1);
298 return get_rate_arm() / ((div1 + 1) * (div2 + 1));
299 } else { 293 } else {
300 div1 = (pdr0 >> 12) & 0x7; 294 div = (pdr0 >> 12) & 0x7;
301 return get_rate_ahb(NULL) / div1; 295 return get_rate_ahb(NULL) / (div + 1);
302 } 296 }
303} 297}
304 298
299static unsigned long get_rate_hsp(struct clk *clk)
300{
301 unsigned long hsp_podf = (__raw_readl(CCM_BASE + CCM_PDR0) >> 20) & 0x03;
302 unsigned long fref = get_rate_mpll();
303
304 if (fref > 400 * 1000 * 1000) {
305 switch (hsp_podf) {
306 case 0:
307 return fref >> 2;
308 case 1:
309 return fref >> 3;
310 case 2:
311 return fref / 3;
312 }
313 } else {
314 switch (hsp_podf) {
315 case 0:
316 case 2:
317 return fref / 3;
318 case 1:
319 return fref / 6;
320 }
321 }
322
323 return 0;
324}
325
305static int clk_cgr_enable(struct clk *clk) 326static int clk_cgr_enable(struct clk *clk)
306{ 327{
307 u32 reg; 328 u32 reg;
@@ -359,7 +380,7 @@ DEFINE_CLOCK(i2c1_clk, 0, CCM_CGR1, 10, get_rate_ipg_per, NULL);
359DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL); 380DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL);
360DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL); 381DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL);
361DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL); 382DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL);
362DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_ahb, NULL); 383DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_hsp, NULL);
363DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL); 384DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL);
364DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL); 385DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL);
365DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL); 386DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL);
@@ -485,10 +506,10 @@ static struct clk_lookup lookups[] = {
485 506
486int __init mx35_clocks_init() 507int __init mx35_clocks_init()
487{ 508{
488 unsigned int ll = 0; 509 unsigned int cgr2 = 3 << 26, cgr3 = 0;
489 510
490#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) 511#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
491 ll = (3 << 16); 512 cgr2 |= 3 << 16;
492#endif 513#endif
493 514
494 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 515 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
@@ -499,8 +520,20 @@ int __init mx35_clocks_init()
499 __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); 520 __raw_writel((3 << 18), CCM_BASE + CCM_CGR0);
500 __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), 521 __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
501 CCM_BASE + CCM_CGR1); 522 CCM_BASE + CCM_CGR1);
502 __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2); 523
503 __raw_writel(0, CCM_BASE + CCM_CGR3); 524 /*
525 * Check if we came up in internal boot mode. If yes, we need some
526 * extra clocks turned on, otherwise the MX35 boot ROM code will
527 * hang after a watchdog reset.
528 */
529 if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) {
530 /* Additionally turn on UART1, SCC, and IIM clocks */
531 cgr2 |= 3 << 16 | 3 << 4;
532 cgr3 |= 3 << 2;
533 }
534
535 __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
536 __raw_writel(cgr3, CCM_BASE + CCM_CGR3);
504 537
505 mxc_timer_init(&gpt_clk, 538 mxc_timer_init(&gpt_clk,
506 MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT); 539 MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
diff --git a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
index 1dc5004df866..f8f15e3ac7a0 100644
--- a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
@@ -216,7 +216,7 @@ struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata = {
216 * Add platform devices present on this baseboard and init 216 * Add platform devices present on this baseboard and init
217 * them from CPU side as far as required to use them later on 217 * them from CPU side as far as required to use them later on
218 */ 218 */
219void __init eukrea_mbimxsd_baseboard_init(void) 219void __init eukrea_mbimxsd35_baseboard_init(void)
220{ 220{
221 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads, 221 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
222 ARRAY_SIZE(eukrea_mbimxsd_pads))) 222 ARRAY_SIZE(eukrea_mbimxsd_pads)))
diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c
index 63f970f340a2..2a4f8b781ba4 100644
--- a/arch/arm/mach-mx3/mach-cpuimx35.c
+++ b/arch/arm/mach-mx3/mach-cpuimx35.c
@@ -192,7 +192,7 @@ static void __init mxc_board_init(void)
192#if defined(CONFIG_USB_ULPI) 192#if defined(CONFIG_USB_ULPI)
193 if (otg_mode_host) { 193 if (otg_mode_host) {
194 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 194 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
195 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); 195 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
196 196
197 mxc_register_device(&mxc_otg_host, &otg_pdata); 197 mxc_register_device(&mxc_otg_host, &otg_pdata);
198 } 198 }
@@ -201,8 +201,8 @@ static void __init mxc_board_init(void)
201 if (!otg_mode_host) 201 if (!otg_mode_host)
202 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); 202 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
203 203
204#ifdef CONFIG_MACH_EUKREA_MBIMXSD_BASEBOARD 204#ifdef CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD
205 eukrea_mbimxsd_baseboard_init(); 205 eukrea_mbimxsd35_baseboard_init();
206#endif 206#endif
207} 207}
208 208
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c
index 6af69def357f..57c10a9926cc 100644
--- a/arch/arm/mach-mx5/clock-mx51.c
+++ b/arch/arm/mach-mx5/clock-mx51.c
@@ -56,7 +56,7 @@ static void _clk_ccgr_disable(struct clk *clk)
56{ 56{
57 u32 reg; 57 u32 reg;
58 reg = __raw_readl(clk->enable_reg); 58 reg = __raw_readl(clk->enable_reg);
59 reg &= ~(MXC_CCM_CCGRx_MOD_OFF << clk->enable_shift); 59 reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift);
60 __raw_writel(reg, clk->enable_reg); 60 __raw_writel(reg, clk->enable_reg);
61 61
62} 62}
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 63b2d8859c3c..88d3a1e920f5 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_LOCAL_TIMERS) += timer-mpu.o
25obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o 25obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
26obj-$(CONFIG_ARCH_OMAP4) += omap44xx-smc.o omap4-common.o 26obj-$(CONFIG_ARCH_OMAP4) += omap44xx-smc.o omap4-common.o
27 27
28AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a
28AFLAGS_omap44xx-smc.o :=-Wa,-march=armv7-a 29AFLAGS_omap44xx-smc.o :=-Wa,-march=armv7-a
29 30
30# Functions loaded to SRAM 31# Functions loaded to SRAM
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 138646deac89..dfdce2d82779 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3417,7 +3417,13 @@ int __init omap3xxx_clk_init(void)
3417 struct omap_clk *c; 3417 struct omap_clk *c;
3418 u32 cpu_clkflg = CK_3XXX; 3418 u32 cpu_clkflg = CK_3XXX;
3419 3419
3420 if (cpu_is_omap34xx()) { 3420 if (cpu_is_omap3517()) {
3421 cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
3422 cpu_clkflg |= CK_3517;
3423 } else if (cpu_is_omap3505()) {
3424 cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
3425 cpu_clkflg |= CK_3505;
3426 } else if (cpu_is_omap34xx()) {
3421 cpu_mask = RATE_IN_3XXX; 3427 cpu_mask = RATE_IN_3XXX;
3422 cpu_clkflg |= CK_343X; 3428 cpu_clkflg |= CK_343X;
3423 3429
@@ -3432,12 +3438,6 @@ int __init omap3xxx_clk_init(void)
3432 cpu_mask |= RATE_IN_3430ES2PLUS; 3438 cpu_mask |= RATE_IN_3430ES2PLUS;
3433 cpu_clkflg |= CK_3430ES2; 3439 cpu_clkflg |= CK_3430ES2;
3434 } 3440 }
3435 } else if (cpu_is_omap3517()) {
3436 cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
3437 cpu_clkflg |= CK_3517;
3438 } else if (cpu_is_omap3505()) {
3439 cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
3440 cpu_clkflg |= CK_3505;
3441 } 3441 }
3442 3442
3443 if (omap3_has_192mhz_clk()) 3443 if (omap3_has_192mhz_clk())
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index e8256a2ed8e7..9a879f959509 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -284,8 +284,8 @@ static void __init omap3_check_revision(void)
284 default: 284 default:
285 omap_revision = OMAP3630_REV_ES1_2; 285 omap_revision = OMAP3630_REV_ES1_2;
286 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; 286 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
287 break;
288 } 287 }
288 break;
289 default: 289 default:
290 /* Unknown default to latest silicon rev as default*/ 290 /* Unknown default to latest silicon rev as default*/
291 omap_revision = OMAP3630_REV_ES1_2; 291 omap_revision = OMAP3630_REV_ES1_2;
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index 50fd74916643..06e64e1fc28a 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -177,7 +177,10 @@ omap_irq_base: .word 0
177 cmpne \irqnr, \tmp 177 cmpne \irqnr, \tmp
178 cmpcs \irqnr, \irqnr 178 cmpcs \irqnr, \irqnr
179 .endm 179 .endm
180#endif
181#endif /* MULTI_OMAP2 */
180 182
183#ifdef CONFIG_SMP
181 /* We assume that irqstat (the raw value of the IRQ acknowledge 184 /* We assume that irqstat (the raw value of the IRQ acknowledge
182 * register) is preserved from the macro above. 185 * register) is preserved from the macro above.
183 * If there is an IPI, we immediately signal end of interrupt 186 * If there is an IPI, we immediately signal end of interrupt
@@ -205,8 +208,7 @@ omap_irq_base: .word 0
205 streq \irqstat, [\base, #GIC_CPU_EOI] 208 streq \irqstat, [\base, #GIC_CPU_EOI]
206 cmp \tmp, #0 209 cmp \tmp, #0
207 .endm 210 .endm
208#endif 211#endif /* CONFIG_SMP */
209#endif /* MULTI_OMAP2 */
210 212
211 .macro irq_prio_table 213 .macro irq_prio_table
212 .endm 214 .endm
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index af3c20c8d3f9..9e9f70e18e3c 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -102,8 +102,7 @@ static void __init wakeup_secondary(void)
102 * Send a 'sev' to wake the secondary core from WFE. 102 * Send a 'sev' to wake the secondary core from WFE.
103 * Drain the outstanding writes to memory 103 * Drain the outstanding writes to memory
104 */ 104 */
105 dsb(); 105 dsb_sev();
106 set_event();
107 mb(); 106 mb();
108} 107}
109 108
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index fb4994ad622e..7b03426c72a3 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -480,7 +480,9 @@ void omap_sram_idle(void)
480 } 480 }
481 481
482 /* Disable IO-PAD and IO-CHAIN wakeup */ 482 /* Disable IO-PAD and IO-CHAIN wakeup */
483 if (omap3_has_io_wakeup() && core_next_state < PWRDM_POWER_ON) { 483 if (omap3_has_io_wakeup() &&
484 (per_next_state < PWRDM_POWER_ON ||
485 core_next_state < PWRDM_POWER_ON)) {
484 prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN); 486 prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
485 omap3_disable_io_chain(); 487 omap3_disable_io_chain();
486 } 488 }
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 268a9bc6be8a..50d5939a78f1 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -398,7 +398,7 @@ static int pxa_set_target(struct cpufreq_policy *policy,
398 return 0; 398 return 0;
399} 399}
400 400
401static __init int pxa_cpufreq_init(struct cpufreq_policy *policy) 401static int pxa_cpufreq_init(struct cpufreq_policy *policy)
402{ 402{
403 int i; 403 int i;
404 unsigned int freq; 404 unsigned int freq;
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
index 27fa329d9a8b..0a0d0fe99220 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa3xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
@@ -204,7 +204,7 @@ static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy,
204 return 0; 204 return 0;
205} 205}
206 206
207static __init int pxa3xx_cpufreq_init(struct cpufreq_policy *policy) 207static int pxa3xx_cpufreq_init(struct cpufreq_policy *policy)
208{ 208{
209 int ret = -EINVAL; 209 int ret = -EINVAL;
210 210
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa300.h b/arch/arm/mach-pxa/include/mach/mfp-pxa300.h
index 7139e0dc26d1..4e1287070d21 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa300.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa300.h
@@ -71,10 +71,10 @@
71#define GPIO46_CI_DD_7 MFP_CFG_DRV(GPIO46, AF0, DS04X) 71#define GPIO46_CI_DD_7 MFP_CFG_DRV(GPIO46, AF0, DS04X)
72#define GPIO47_CI_DD_8 MFP_CFG_DRV(GPIO47, AF1, DS04X) 72#define GPIO47_CI_DD_8 MFP_CFG_DRV(GPIO47, AF1, DS04X)
73#define GPIO48_CI_DD_9 MFP_CFG_DRV(GPIO48, AF1, DS04X) 73#define GPIO48_CI_DD_9 MFP_CFG_DRV(GPIO48, AF1, DS04X)
74#define GPIO52_CI_HSYNC MFP_CFG_DRV(GPIO52, AF0, DS04X)
75#define GPIO51_CI_VSYNC MFP_CFG_DRV(GPIO51, AF0, DS04X)
76#define GPIO49_CI_MCLK MFP_CFG_DRV(GPIO49, AF0, DS04X) 74#define GPIO49_CI_MCLK MFP_CFG_DRV(GPIO49, AF0, DS04X)
77#define GPIO50_CI_PCLK MFP_CFG_DRV(GPIO50, AF0, DS04X) 75#define GPIO50_CI_PCLK MFP_CFG_DRV(GPIO50, AF0, DS04X)
76#define GPIO51_CI_HSYNC MFP_CFG_DRV(GPIO51, AF0, DS04X)
77#define GPIO52_CI_VSYNC MFP_CFG_DRV(GPIO52, AF0, DS04X)
78 78
79/* KEYPAD */ 79/* KEYPAD */
80#define GPIO3_KP_DKIN_6 MFP_CFG_LPM(GPIO3, AF2, FLOAT) 80#define GPIO3_KP_DKIN_6 MFP_CFG_LPM(GPIO3, AF2, FLOAT)
diff --git a/arch/arm/mach-s3c2410/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
index 315b0078a34d..54297eb0bf5e 100644
--- a/arch/arm/mach-s3c2410/include/mach/vmalloc.h
+++ b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
@@ -15,6 +15,6 @@
15#ifndef __ASM_ARCH_VMALLOC_H 15#ifndef __ASM_ARCH_VMALLOC_H
16#define __ASM_ARCH_VMALLOC_H 16#define __ASM_ARCH_VMALLOC_H
17 17
18#define VMALLOC_END (0xE0000000) 18#define VMALLOC_END 0xE0000000UL
19 19
20#endif /* __ASM_ARCH_VMALLOC_H */ 20#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
index 7411ef3711a6..bc0e91389864 100644
--- a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
+++ b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
@@ -15,6 +15,6 @@
15#ifndef __ASM_ARCH_VMALLOC_H 15#ifndef __ASM_ARCH_VMALLOC_H
16#define __ASM_ARCH_VMALLOC_H 16#define __ASM_ARCH_VMALLOC_H
17 17
18#define VMALLOC_END (0xE0000000) 18#define VMALLOC_END 0xE0000000UL
19 19
20#endif /* __ASM_ARCH_VMALLOC_H */ 20#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/vmalloc.h b/arch/arm/mach-s5p6440/include/mach/vmalloc.h
index 16df257b1dce..e3f0eebf5205 100644
--- a/arch/arm/mach-s5p6440/include/mach/vmalloc.h
+++ b/arch/arm/mach-s5p6440/include/mach/vmalloc.h
@@ -12,6 +12,6 @@
12#ifndef __ASM_ARCH_VMALLOC_H 12#ifndef __ASM_ARCH_VMALLOC_H
13#define __ASM_ARCH_VMALLOC_H 13#define __ASM_ARCH_VMALLOC_H
14 14
15#define VMALLOC_END (0xE0000000) 15#define VMALLOC_END 0xE0000000UL
16 16
17#endif /* __ASM_ARCH_VMALLOC_H */ 17#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/vmalloc.h b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
index be3333688c20..f5c83f02c18e 100644
--- a/arch/arm/mach-s5p6442/include/mach/vmalloc.h
+++ b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
@@ -12,6 +12,6 @@
12#ifndef __ASM_ARCH_VMALLOC_H 12#ifndef __ASM_ARCH_VMALLOC_H
13#define __ASM_ARCH_VMALLOC_H 13#define __ASM_ARCH_VMALLOC_H
14 14
15#define VMALLOC_END (0xE0000000) 15#define VMALLOC_END 0xE0000000UL
16 16
17#endif /* __ASM_ARCH_VMALLOC_H */ 17#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/vmalloc.h b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
index 58f515e0747e..df9a28808323 100644
--- a/arch/arm/mach-s5pv210/include/mach/vmalloc.h
+++ b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
@@ -17,6 +17,6 @@
17#ifndef __ASM_ARCH_VMALLOC_H 17#ifndef __ASM_ARCH_VMALLOC_H
18#define __ASM_ARCH_VMALLOC_H __FILE__ 18#define __ASM_ARCH_VMALLOC_H __FILE__
19 19
20#define VMALLOC_END (0xE0000000) 20#define VMALLOC_END (0xE0000000UL)
21 21
22#endif /* __ASM_ARCH_VMALLOC_H */ 22#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c
index 77f2b4d85e6b..26a0f03df8ea 100644
--- a/arch/arm/mach-s5pv310/clock.c
+++ b/arch/arm/mach-s5pv310/clock.c
@@ -30,6 +30,16 @@ static struct clk clk_sclk_hdmi27m = {
30 .rate = 27000000, 30 .rate = 27000000,
31}; 31};
32 32
33static int s5pv310_clksrc_mask_peril0_ctrl(struct clk *clk, int enable)
34{
35 return s5p_gatectrl(S5P_CLKSRC_MASK_PERIL0, clk, enable);
36}
37
38static int s5pv310_clk_ip_peril_ctrl(struct clk *clk, int enable)
39{
40 return s5p_gatectrl(S5P_CLKGATE_IP_PERIL, clk, enable);
41}
42
33/* Core list of CMU_CPU side */ 43/* Core list of CMU_CPU side */
34 44
35static struct clksrc_clk clk_mout_apll = { 45static struct clksrc_clk clk_mout_apll = {
@@ -39,6 +49,14 @@ static struct clksrc_clk clk_mout_apll = {
39 }, 49 },
40 .sources = &clk_src_apll, 50 .sources = &clk_src_apll,
41 .reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 0, .size = 1 }, 51 .reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 0, .size = 1 },
52};
53
54static struct clksrc_clk clk_sclk_apll = {
55 .clk = {
56 .name = "sclk_apll",
57 .id = -1,
58 .parent = &clk_mout_apll.clk,
59 },
42 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 24, .size = 3 }, 60 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 24, .size = 3 },
43}; 61};
44 62
@@ -61,7 +79,7 @@ static struct clksrc_clk clk_mout_mpll = {
61}; 79};
62 80
63static struct clk *clkset_moutcore_list[] = { 81static struct clk *clkset_moutcore_list[] = {
64 [0] = &clk_mout_apll.clk, 82 [0] = &clk_sclk_apll.clk,
65 [1] = &clk_mout_mpll.clk, 83 [1] = &clk_mout_mpll.clk,
66}; 84};
67 85
@@ -154,7 +172,7 @@ static struct clksrc_clk clk_pclk_dbg = {
154 172
155static struct clk *clkset_corebus_list[] = { 173static struct clk *clkset_corebus_list[] = {
156 [0] = &clk_mout_mpll.clk, 174 [0] = &clk_mout_mpll.clk,
157 [1] = &clk_mout_apll.clk, 175 [1] = &clk_sclk_apll.clk,
158}; 176};
159 177
160static struct clksrc_sources clkset_mout_corebus = { 178static struct clksrc_sources clkset_mout_corebus = {
@@ -220,7 +238,7 @@ static struct clksrc_clk clk_pclk_acp = {
220 238
221static struct clk *clkset_aclk_top_list[] = { 239static struct clk *clkset_aclk_top_list[] = {
222 [0] = &clk_mout_mpll.clk, 240 [0] = &clk_mout_mpll.clk,
223 [1] = &clk_mout_apll.clk, 241 [1] = &clk_sclk_apll.clk,
224}; 242};
225 243
226static struct clksrc_sources clkset_aclk_200 = { 244static struct clksrc_sources clkset_aclk_200 = {
@@ -321,11 +339,6 @@ static struct clksrc_clk clk_sclk_vpll = {
321 .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 }, 339 .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 },
322}; 340};
323 341
324static int s5pv310_clk_ip_peril_ctrl(struct clk *clk, int enable)
325{
326 return s5p_gatectrl(S5P_CLKGATE_IP_PERIL, clk, enable);
327}
328
329static struct clk init_clocks_disable[] = { 342static struct clk init_clocks_disable[] = {
330 { 343 {
331 .name = "timers", 344 .name = "timers",
@@ -337,7 +350,37 @@ static struct clk init_clocks_disable[] = {
337}; 350};
338 351
339static struct clk init_clocks[] = { 352static struct clk init_clocks[] = {
340 /* Nothing here yet */ 353 {
354 .name = "uart",
355 .id = 0,
356 .enable = s5pv310_clk_ip_peril_ctrl,
357 .ctrlbit = (1 << 0),
358 }, {
359 .name = "uart",
360 .id = 1,
361 .enable = s5pv310_clk_ip_peril_ctrl,
362 .ctrlbit = (1 << 1),
363 }, {
364 .name = "uart",
365 .id = 2,
366 .enable = s5pv310_clk_ip_peril_ctrl,
367 .ctrlbit = (1 << 2),
368 }, {
369 .name = "uart",
370 .id = 3,
371 .enable = s5pv310_clk_ip_peril_ctrl,
372 .ctrlbit = (1 << 3),
373 }, {
374 .name = "uart",
375 .id = 4,
376 .enable = s5pv310_clk_ip_peril_ctrl,
377 .ctrlbit = (1 << 4),
378 }, {
379 .name = "uart",
380 .id = 5,
381 .enable = s5pv310_clk_ip_peril_ctrl,
382 .ctrlbit = (1 << 5),
383 }
341}; 384};
342 385
343static struct clk *clkset_group_list[] = { 386static struct clk *clkset_group_list[] = {
@@ -359,8 +402,8 @@ static struct clksrc_clk clksrcs[] = {
359 .clk = { 402 .clk = {
360 .name = "uclk1", 403 .name = "uclk1",
361 .id = 0, 404 .id = 0,
405 .enable = s5pv310_clksrc_mask_peril0_ctrl,
362 .ctrlbit = (1 << 0), 406 .ctrlbit = (1 << 0),
363 .enable = s5pv310_clk_ip_peril_ctrl,
364 }, 407 },
365 .sources = &clkset_group, 408 .sources = &clkset_group,
366 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 0, .size = 4 }, 409 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 0, .size = 4 },
@@ -369,8 +412,8 @@ static struct clksrc_clk clksrcs[] = {
369 .clk = { 412 .clk = {
370 .name = "uclk1", 413 .name = "uclk1",
371 .id = 1, 414 .id = 1,
372 .enable = s5pv310_clk_ip_peril_ctrl, 415 .enable = s5pv310_clksrc_mask_peril0_ctrl,
373 .ctrlbit = (1 << 1), 416 .ctrlbit = (1 << 4),
374 }, 417 },
375 .sources = &clkset_group, 418 .sources = &clkset_group,
376 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 4, .size = 4 }, 419 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 4, .size = 4 },
@@ -379,8 +422,8 @@ static struct clksrc_clk clksrcs[] = {
379 .clk = { 422 .clk = {
380 .name = "uclk1", 423 .name = "uclk1",
381 .id = 2, 424 .id = 2,
382 .enable = s5pv310_clk_ip_peril_ctrl, 425 .enable = s5pv310_clksrc_mask_peril0_ctrl,
383 .ctrlbit = (1 << 2), 426 .ctrlbit = (1 << 8),
384 }, 427 },
385 .sources = &clkset_group, 428 .sources = &clkset_group,
386 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 8, .size = 4 }, 429 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 8, .size = 4 },
@@ -389,8 +432,8 @@ static struct clksrc_clk clksrcs[] = {
389 .clk = { 432 .clk = {
390 .name = "uclk1", 433 .name = "uclk1",
391 .id = 3, 434 .id = 3,
392 .enable = s5pv310_clk_ip_peril_ctrl, 435 .enable = s5pv310_clksrc_mask_peril0_ctrl,
393 .ctrlbit = (1 << 3), 436 .ctrlbit = (1 << 12),
394 }, 437 },
395 .sources = &clkset_group, 438 .sources = &clkset_group,
396 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 12, .size = 4 }, 439 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 12, .size = 4 },
@@ -399,7 +442,7 @@ static struct clksrc_clk clksrcs[] = {
399 .clk = { 442 .clk = {
400 .name = "sclk_pwm", 443 .name = "sclk_pwm",
401 .id = -1, 444 .id = -1,
402 .enable = s5pv310_clk_ip_peril_ctrl, 445 .enable = s5pv310_clksrc_mask_peril0_ctrl,
403 .ctrlbit = (1 << 24), 446 .ctrlbit = (1 << 24),
404 }, 447 },
405 .sources = &clkset_group, 448 .sources = &clkset_group,
@@ -411,6 +454,7 @@ static struct clksrc_clk clksrcs[] = {
411/* Clock initialization code */ 454/* Clock initialization code */
412static struct clksrc_clk *sysclks[] = { 455static struct clksrc_clk *sysclks[] = {
413 &clk_mout_apll, 456 &clk_mout_apll,
457 &clk_sclk_apll,
414 &clk_mout_epll, 458 &clk_mout_epll,
415 &clk_mout_mpll, 459 &clk_mout_mpll,
416 &clk_moutcore, 460 &clk_moutcore,
@@ -470,11 +514,11 @@ void __init_or_cpufreq s5pv310_setup_clocks(void)
470 apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON0), pll_4508); 514 apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON0), pll_4508);
471 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON0), pll_4508); 515 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON0), pll_4508);
472 epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON0), 516 epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON0),
473 __raw_readl(S5P_EPLL_CON1), pll_4500); 517 __raw_readl(S5P_EPLL_CON1), pll_4600);
474 518
475 vpllsrc = clk_get_rate(&clk_vpllsrc.clk); 519 vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
476 vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), 520 vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
477 __raw_readl(S5P_VPLL_CON1), pll_4502); 521 __raw_readl(S5P_VPLL_CON1), pll_4650);
478 522
479 clk_fout_apll.rate = apll; 523 clk_fout_apll.rate = apll;
480 clk_fout_mpll.rate = mpll; 524 clk_fout_mpll.rate = mpll;
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c
index 196c9f12ed85..e5b261a99ab2 100644
--- a/arch/arm/mach-s5pv310/cpu.c
+++ b/arch/arm/mach-s5pv310/cpu.c
@@ -45,6 +45,16 @@ static struct map_desc s5pv310_iodesc[] __initdata = {
45 .pfn = __phys_to_pfn(S5PV310_PA_L2CC), 45 .pfn = __phys_to_pfn(S5PV310_PA_L2CC),
46 .length = SZ_4K, 46 .length = SZ_4K,
47 .type = MT_DEVICE, 47 .type = MT_DEVICE,
48 }, {
49 .virtual = (unsigned long)S5P_VA_SYSRAM,
50 .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM),
51 .length = SZ_4K,
52 .type = MT_DEVICE,
53 }, {
54 .virtual = (unsigned long)S5P_VA_CMU,
55 .pfn = __phys_to_pfn(S5PV310_PA_CMU),
56 .length = SZ_128K,
57 .type = MT_DEVICE,
48 }, 58 },
49}; 59};
50 60
diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-s5pv310/include/mach/irqs.h
index 56885ca3773c..4cdedda6e652 100644
--- a/arch/arm/mach-s5pv310/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv310/include/mach/irqs.h
@@ -15,12 +15,14 @@
15 15
16#include <plat/irqs.h> 16#include <plat/irqs.h>
17 17
18/* Private Peripheral Interrupt */ 18/* PPI: Private Peripheral Interrupt */
19
19#define IRQ_PPI(x) S5P_IRQ(x+16) 20#define IRQ_PPI(x) S5P_IRQ(x+16)
20 21
21#define IRQ_LOCALTIMER IRQ_PPI(13) 22#define IRQ_LOCALTIMER IRQ_PPI(13)
22 23
23/* Shared Peripheral Interrupt */ 24/* SPI: Shared Peripheral Interrupt */
25
24#define IRQ_SPI(x) S5P_IRQ(x+32) 26#define IRQ_SPI(x) S5P_IRQ(x+32)
25 27
26#define IRQ_EINT0 IRQ_SPI(40) 28#define IRQ_EINT0 IRQ_SPI(40)
@@ -36,7 +38,7 @@
36#define IRQ_PCIE IRQ_SPI(50) 38#define IRQ_PCIE IRQ_SPI(50)
37#define IRQ_SYSTEM_TIMER IRQ_SPI(51) 39#define IRQ_SYSTEM_TIMER IRQ_SPI(51)
38#define IRQ_MFC IRQ_SPI(52) 40#define IRQ_MFC IRQ_SPI(52)
39#define IRQ_WTD IRQ_SPI(53) 41#define IRQ_WDT IRQ_SPI(53)
40#define IRQ_AUDIO_SS IRQ_SPI(54) 42#define IRQ_AUDIO_SS IRQ_SPI(54)
41#define IRQ_AC97 IRQ_SPI(55) 43#define IRQ_AC97 IRQ_SPI(55)
42#define IRQ_SPDIF IRQ_SPI(56) 44#define IRQ_SPDIF IRQ_SPI(56)
@@ -67,8 +69,9 @@
67#define IRQ_IIC COMBINER_IRQ(27, 0) 69#define IRQ_IIC COMBINER_IRQ(27, 0)
68 70
69/* Set the default NR_IRQS */ 71/* Set the default NR_IRQS */
72
70#define NR_IRQS COMBINER_IRQ(MAX_COMBINER_NR, 0) 73#define NR_IRQS COMBINER_IRQ(MAX_COMBINER_NR, 0)
71 74
72#define MAX_COMBINER_NR 39 75#define MAX_COMBINER_NR 39
73 76
74#endif /* ASM_ARCH_IRQS_H */ 77#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h
index 87697c9fca5b..213e1101a3b3 100644
--- a/arch/arm/mach-s5pv310/include/mach/map.h
+++ b/arch/arm/mach-s5pv310/include/mach/map.h
@@ -23,12 +23,16 @@
23 23
24#include <plat/map-s5p.h> 24#include <plat/map-s5p.h>
25 25
26#define S5PV310_PA_SYSRAM (0x02025000)
27
26#define S5PV310_PA_CHIPID (0x10000000) 28#define S5PV310_PA_CHIPID (0x10000000)
27#define S5P_PA_CHIPID S5PV310_PA_CHIPID 29#define S5P_PA_CHIPID S5PV310_PA_CHIPID
28 30
29#define S5PV310_PA_SYSCON (0x10020000) 31#define S5PV310_PA_SYSCON (0x10020000)
30#define S5P_PA_SYSCON S5PV310_PA_SYSCON 32#define S5P_PA_SYSCON S5PV310_PA_SYSCON
31 33
34#define S5PV310_PA_CMU (0x10030000)
35
32#define S5PV310_PA_WATCHDOG (0x10060000) 36#define S5PV310_PA_WATCHDOG (0x10060000)
33 37
34#define S5PV310_PA_COMBINER (0x10448000) 38#define S5PV310_PA_COMBINER (0x10448000)
@@ -39,8 +43,12 @@
39#define S5PV310_PA_GIC_DIST (0x10501000) 43#define S5PV310_PA_GIC_DIST (0x10501000)
40#define S5PV310_PA_L2CC (0x10502000) 44#define S5PV310_PA_L2CC (0x10502000)
41 45
42#define S5PV310_PA_GPIO (0x11000000) 46#define S5PV310_PA_GPIO1 (0x11400000)
43#define S5P_PA_GPIO S5PV310_PA_GPIO 47#define S5PV310_PA_GPIO2 (0x11000000)
48#define S5PV310_PA_GPIO3 (0x03860000)
49#define S5P_PA_GPIO S5PV310_PA_GPIO1
50
51#define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
44 52
45#define S5PV310_PA_UART (0x13800000) 53#define S5PV310_PA_UART (0x13800000)
46 54
@@ -63,6 +71,10 @@
63 71
64/* compatibiltiy defines. */ 72/* compatibiltiy defines. */
65#define S3C_PA_UART S5PV310_PA_UART 73#define S3C_PA_UART S5PV310_PA_UART
74#define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0)
75#define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1)
76#define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2)
77#define S3C_PA_HSMMC3 S5PV310_PA_HSMMC(3)
66#define S3C_PA_IIC S5PV310_PA_IIC0 78#define S3C_PA_IIC S5PV310_PA_IIC0
67#define S3C_PA_WDT S5PV310_PA_WATCHDOG 79#define S3C_PA_WDT S5PV310_PA_WATCHDOG
68 80
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-clock.h b/arch/arm/mach-s5pv310/include/mach/regs-clock.h
index 59e3a7e94d80..4013553cd9be 100644
--- a/arch/arm/mach-s5pv310/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pv310/include/mach/regs-clock.h
@@ -15,48 +15,49 @@
15 15
16#include <mach/map.h> 16#include <mach/map.h>
17 17
18#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) 18#define S5P_CLKREG(x) (S5P_VA_CMU + (x))
19 19
20#define S5P_INFORM0 S5P_CLKREG(0x800) 20#define S5P_INFORM0 S5P_CLKREG(0x800)
21 21
22#define S5P_EPLL_CON0 S5P_CLKREG(0x1C110) 22#define S5P_EPLL_CON0 S5P_CLKREG(0x0C110)
23#define S5P_EPLL_CON1 S5P_CLKREG(0x1C114) 23#define S5P_EPLL_CON1 S5P_CLKREG(0x0C114)
24#define S5P_VPLL_CON0 S5P_CLKREG(0x1C120) 24#define S5P_VPLL_CON0 S5P_CLKREG(0x0C120)
25#define S5P_VPLL_CON1 S5P_CLKREG(0x1C124) 25#define S5P_VPLL_CON1 S5P_CLKREG(0x0C124)
26 26
27#define S5P_CLKSRC_TOP0 S5P_CLKREG(0x1C210) 27#define S5P_CLKSRC_TOP0 S5P_CLKREG(0x0C210)
28#define S5P_CLKSRC_TOP1 S5P_CLKREG(0x1C214) 28#define S5P_CLKSRC_TOP1 S5P_CLKREG(0x0C214)
29 29
30#define S5P_CLKSRC_PERIL0 S5P_CLKREG(0x1C250) 30#define S5P_CLKSRC_PERIL0 S5P_CLKREG(0x0C250)
31 31
32#define S5P_CLKDIV_TOP S5P_CLKREG(0x1C510) 32#define S5P_CLKDIV_TOP S5P_CLKREG(0x0C510)
33 33
34#define S5P_CLKDIV_PERIL0 S5P_CLKREG(0x1C550) 34#define S5P_CLKDIV_PERIL0 S5P_CLKREG(0x0C550)
35#define S5P_CLKDIV_PERIL1 S5P_CLKREG(0x1C554) 35#define S5P_CLKDIV_PERIL1 S5P_CLKREG(0x0C554)
36#define S5P_CLKDIV_PERIL2 S5P_CLKREG(0x1C558) 36#define S5P_CLKDIV_PERIL2 S5P_CLKREG(0x0C558)
37#define S5P_CLKDIV_PERIL3 S5P_CLKREG(0x1C55C) 37#define S5P_CLKDIV_PERIL3 S5P_CLKREG(0x0C55C)
38#define S5P_CLKDIV_PERIL4 S5P_CLKREG(0x1C560) 38#define S5P_CLKDIV_PERIL4 S5P_CLKREG(0x0C560)
39#define S5P_CLKDIV_PERIL5 S5P_CLKREG(0x1C564) 39#define S5P_CLKDIV_PERIL5 S5P_CLKREG(0x0C564)
40 40
41#define S5P_CLKGATE_IP_PERIL S5P_CLKREG(0x1C950) 41#define S5P_CLKSRC_MASK_PERIL0 S5P_CLKREG(0x0C350)
42 42
43#define S5P_CLKSRC_CORE S5P_CLKREG(0x20200) 43#define S5P_CLKGATE_IP_PERIL S5P_CLKREG(0x0C950)
44 44
45#define S5P_CLKDIV_CORE0 S5P_CLKREG(0x20500) 45#define S5P_CLKSRC_CORE S5P_CLKREG(0x10200)
46#define S5P_CLKDIV_CORE0 S5P_CLKREG(0x10500)
46 47
47#define S5P_APLL_LOCK S5P_CLKREG(0x24000) 48#define S5P_APLL_LOCK S5P_CLKREG(0x14000)
48#define S5P_MPLL_LOCK S5P_CLKREG(0x24004) 49#define S5P_MPLL_LOCK S5P_CLKREG(0x14004)
49#define S5P_APLL_CON0 S5P_CLKREG(0x24100) 50#define S5P_APLL_CON0 S5P_CLKREG(0x14100)
50#define S5P_APLL_CON1 S5P_CLKREG(0x24104) 51#define S5P_APLL_CON1 S5P_CLKREG(0x14104)
51#define S5P_MPLL_CON0 S5P_CLKREG(0x24108) 52#define S5P_MPLL_CON0 S5P_CLKREG(0x14108)
52#define S5P_MPLL_CON1 S5P_CLKREG(0x2410C) 53#define S5P_MPLL_CON1 S5P_CLKREG(0x1410C)
53 54
54#define S5P_CLKSRC_CPU S5P_CLKREG(0x24200) 55#define S5P_CLKSRC_CPU S5P_CLKREG(0x14200)
55#define S5P_CLKMUX_STATCPU S5P_CLKREG(0x24400) 56#define S5P_CLKMUX_STATCPU S5P_CLKREG(0x14400)
56 57
57#define S5P_CLKDIV_CPU S5P_CLKREG(0x24500) 58#define S5P_CLKDIV_CPU S5P_CLKREG(0x14500)
58#define S5P_CLKDIV_STATCPU S5P_CLKREG(0x24600) 59#define S5P_CLKDIV_STATCPU S5P_CLKREG(0x14600)
59 60
60#define S5P_CLKGATE_SCLKCPU S5P_CLKREG(0x24800) 61#define S5P_CLKGATE_SCLKCPU S5P_CLKREG(0x14800)
61 62
62#endif /* __ASM_ARCH_REGS_CLOCK_H */ 63#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/vmalloc.h b/arch/arm/mach-s5pv310/include/mach/vmalloc.h
index 3f565ebb7daa..256f221edf3a 100644
--- a/arch/arm/mach-s5pv310/include/mach/vmalloc.h
+++ b/arch/arm/mach-s5pv310/include/mach/vmalloc.h
@@ -17,6 +17,6 @@
17#ifndef __ASM_ARCH_VMALLOC_H 17#ifndef __ASM_ARCH_VMALLOC_H
18#define __ASM_ARCH_VMALLOC_H __FILE__ 18#define __ASM_ARCH_VMALLOC_H __FILE__
19 19
20#define VMALLOC_END (0xF0000000) 20#define VMALLOC_END (0xF0000000UL)
21 21
22#endif /* __ASM_ARCH_VMALLOC_H */ 22#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pv310/platsmp.c b/arch/arm/mach-s5pv310/platsmp.c
index fe9469abd006..d357c198edee 100644
--- a/arch/arm/mach-s5pv310/platsmp.c
+++ b/arch/arm/mach-s5pv310/platsmp.c
@@ -187,6 +187,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
187 * until it receives a soft interrupt, and then the 187 * until it receives a soft interrupt, and then the
188 * secondary CPU branches to this address. 188 * secondary CPU branches to this address.
189 */ 189 */
190 __raw_writel(BSYM(virt_to_phys(s5pv310_secondary_startup)), S5P_INFORM0); 190 __raw_writel(BSYM(virt_to_phys(s5pv310_secondary_startup)), S5P_VA_SYSRAM);
191 } 191 }
192} 192}
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 5e16b4c69222..ae416fe7daf2 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common objects 5# Common objects
6obj-y := timer.o console.o clock.o 6obj-y := timer.o console.o clock.o pm_runtime.o
7 7
8# CPU objects 8# CPU objects
9obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o 9obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 23d472f9525e..95935c83c306 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -25,6 +25,7 @@
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/mfd/sh_mobile_sdhi.h> 27#include <linux/mfd/sh_mobile_sdhi.h>
28#include <linux/mfd/tmio.h>
28#include <linux/mmc/host.h> 29#include <linux/mmc/host.h>
29#include <linux/mtd/mtd.h> 30#include <linux/mtd/mtd.h>
30#include <linux/mtd/partitions.h> 31#include <linux/mtd/partitions.h>
@@ -39,6 +40,7 @@
39#include <linux/sh_clk.h> 40#include <linux/sh_clk.h>
40#include <linux/gpio.h> 41#include <linux/gpio.h>
41#include <linux/input.h> 42#include <linux/input.h>
43#include <linux/leds.h>
42#include <linux/input/sh_keysc.h> 44#include <linux/input/sh_keysc.h>
43#include <linux/usb/r8a66597.h> 45#include <linux/usb/r8a66597.h>
44 46
@@ -307,6 +309,7 @@ static struct sh_mobile_sdhi_info sdhi1_info = {
307 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, 309 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
308 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, 310 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
309 .tmio_ocr_mask = MMC_VDD_165_195, 311 .tmio_ocr_mask = MMC_VDD_165_195,
312 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
310}; 313};
311 314
312static struct resource sdhi1_resources[] = { 315static struct resource sdhi1_resources[] = {
@@ -558,7 +561,7 @@ static struct resource fsi_resources[] = {
558 561
559static struct platform_device fsi_device = { 562static struct platform_device fsi_device = {
560 .name = "sh_fsi2", 563 .name = "sh_fsi2",
561 .id = 0, 564 .id = -1,
562 .num_resources = ARRAY_SIZE(fsi_resources), 565 .num_resources = ARRAY_SIZE(fsi_resources),
563 .resource = fsi_resources, 566 .resource = fsi_resources,
564 .dev = { 567 .dev = {
@@ -650,7 +653,44 @@ static struct platform_device hdmi_device = {
650 }, 653 },
651}; 654};
652 655
656static struct gpio_led ap4evb_leds[] = {
657 {
658 .name = "led4",
659 .gpio = GPIO_PORT185,
660 .default_state = LEDS_GPIO_DEFSTATE_ON,
661 },
662 {
663 .name = "led2",
664 .gpio = GPIO_PORT186,
665 .default_state = LEDS_GPIO_DEFSTATE_ON,
666 },
667 {
668 .name = "led3",
669 .gpio = GPIO_PORT187,
670 .default_state = LEDS_GPIO_DEFSTATE_ON,
671 },
672 {
673 .name = "led1",
674 .gpio = GPIO_PORT188,
675 .default_state = LEDS_GPIO_DEFSTATE_ON,
676 }
677};
678
679static struct gpio_led_platform_data ap4evb_leds_pdata = {
680 .num_leds = ARRAY_SIZE(ap4evb_leds),
681 .leds = ap4evb_leds,
682};
683
684static struct platform_device leds_device = {
685 .name = "leds-gpio",
686 .id = 0,
687 .dev = {
688 .platform_data = &ap4evb_leds_pdata,
689 },
690};
691
653static struct platform_device *ap4evb_devices[] __initdata = { 692static struct platform_device *ap4evb_devices[] __initdata = {
693 &leds_device,
654 &nor_flash_device, 694 &nor_flash_device,
655 &smc911x_device, 695 &smc911x_device,
656 &sdhi0_device, 696 &sdhi0_device,
@@ -840,20 +880,6 @@ static void __init ap4evb_init(void)
840 gpio_request(GPIO_FN_CS5A, NULL); 880 gpio_request(GPIO_FN_CS5A, NULL);
841 gpio_request(GPIO_FN_IRQ6_39, NULL); 881 gpio_request(GPIO_FN_IRQ6_39, NULL);
842 882
843 /* enable LED 1 - 4 */
844 gpio_request(GPIO_PORT185, NULL);
845 gpio_request(GPIO_PORT186, NULL);
846 gpio_request(GPIO_PORT187, NULL);
847 gpio_request(GPIO_PORT188, NULL);
848 gpio_direction_output(GPIO_PORT185, 1);
849 gpio_direction_output(GPIO_PORT186, 1);
850 gpio_direction_output(GPIO_PORT187, 1);
851 gpio_direction_output(GPIO_PORT188, 1);
852 gpio_export(GPIO_PORT185, 0);
853 gpio_export(GPIO_PORT186, 0);
854 gpio_export(GPIO_PORT187, 0);
855 gpio_export(GPIO_PORT188, 0);
856
857 /* enable Debug switch (S6) */ 883 /* enable Debug switch (S6) */
858 gpio_request(GPIO_PORT32, NULL); 884 gpio_request(GPIO_PORT32, NULL);
859 gpio_request(GPIO_PORT33, NULL); 885 gpio_request(GPIO_PORT33, NULL);
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index fb4e9b1d788e..759468992ad2 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -286,7 +286,6 @@ static struct clk_ops pllc2_clk_ops = {
286 286
287struct clk pllc2_clk = { 287struct clk pllc2_clk = {
288 .ops = &pllc2_clk_ops, 288 .ops = &pllc2_clk_ops,
289 .flags = CLK_ENABLE_ON_INIT,
290 .parent = &extal1_div2_clk, 289 .parent = &extal1_div2_clk,
291 .freq_table = pllc2_freq_table, 290 .freq_table = pllc2_freq_table,
292 .parent_table = pllc2_parent, 291 .parent_table = pllc2_parent,
@@ -395,7 +394,7 @@ static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
395 394
396enum { MSTP001, 395enum { MSTP001,
397 MSTP131, MSTP130, 396 MSTP131, MSTP130,
398 MSTP129, MSTP128, 397 MSTP129, MSTP128, MSTP127, MSTP126,
399 MSTP118, MSTP117, MSTP116, 398 MSTP118, MSTP117, MSTP116,
400 MSTP106, MSTP101, MSTP100, 399 MSTP106, MSTP101, MSTP100,
401 MSTP223, 400 MSTP223,
@@ -413,6 +412,8 @@ static struct clk mstp_clks[MSTP_NR] = {
413 [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */ 412 [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */
414 [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */ 413 [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */
415 [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */ 414 [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */
415 [MSTP127] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 27, 0), /* CEU */
416 [MSTP126] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 26, 0), /* CSI2 */
416 [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX */ 417 [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX */
417 [MSTP117] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */ 418 [MSTP117] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */
418 [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */ 419 [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */
@@ -428,7 +429,7 @@ static struct clk mstp_clks[MSTP_NR] = {
428 [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */ 429 [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */
429 [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ 430 [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
430 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ 431 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
431 [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, CLK_ENABLE_ON_INIT), /* FSIA */ 432 [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSIA */
432 [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */ 433 [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
433 [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */ 434 [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */
434 [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */ 435 [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
@@ -498,6 +499,8 @@ static struct clk_lookup lookups[] = {
498 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */ 499 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
499 CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */ 500 CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
500 CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */ 501 CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
502 CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU */
503 CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */
501 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ 504 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
502 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */ 505 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
503 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */ 506 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c
index b7c705a213a2..6b7c7c42bc8f 100644
--- a/arch/arm/mach-shmobile/clock.c
+++ b/arch/arm/mach-shmobile/clock.c
@@ -1,8 +1,10 @@
1/* 1/*
2 * SH-Mobile Timer 2 * SH-Mobile Clock Framework
3 * 3 *
4 * Copyright (C) 2010 Magnus Damm 4 * Copyright (C) 2010 Magnus Damm
5 * 5 *
6 * Used together with arch/arm/common/clkdev.c and drivers/sh/clk.c.
7 *
6 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License. 10 * the Free Software Foundation; version 2 of the License.
diff --git a/arch/arm/mach-shmobile/pm_runtime.c b/arch/arm/mach-shmobile/pm_runtime.c
new file mode 100644
index 000000000000..94912d3944d3
--- /dev/null
+++ b/arch/arm/mach-shmobile/pm_runtime.c
@@ -0,0 +1,169 @@
1/*
2 * arch/arm/mach-shmobile/pm_runtime.c
3 *
4 * Runtime PM support code for SuperH Mobile ARM
5 *
6 * Copyright (C) 2009-2010 Magnus Damm
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/io.h>
16#include <linux/pm_runtime.h>
17#include <linux/platform_device.h>
18#include <linux/clk.h>
19#include <linux/sh_clk.h>
20#include <linux/bitmap.h>
21
22#ifdef CONFIG_PM_RUNTIME
23#define BIT_ONCE 0
24#define BIT_ACTIVE 1
25#define BIT_CLK_ENABLED 2
26
27struct pm_runtime_data {
28 unsigned long flags;
29 struct clk *clk;
30};
31
32static void __devres_release(struct device *dev, void *res)
33{
34 struct pm_runtime_data *prd = res;
35
36 dev_dbg(dev, "__devres_release()\n");
37
38 if (test_bit(BIT_CLK_ENABLED, &prd->flags))
39 clk_disable(prd->clk);
40
41 if (test_bit(BIT_ACTIVE, &prd->flags))
42 clk_put(prd->clk);
43}
44
45static struct pm_runtime_data *__to_prd(struct device *dev)
46{
47 return devres_find(dev, __devres_release, NULL, NULL);
48}
49
50static void platform_pm_runtime_init(struct device *dev,
51 struct pm_runtime_data *prd)
52{
53 if (prd && !test_and_set_bit(BIT_ONCE, &prd->flags)) {
54 prd->clk = clk_get(dev, NULL);
55 if (!IS_ERR(prd->clk)) {
56 set_bit(BIT_ACTIVE, &prd->flags);
57 dev_info(dev, "clocks managed by runtime pm\n");
58 }
59 }
60}
61
62static void platform_pm_runtime_bug(struct device *dev,
63 struct pm_runtime_data *prd)
64{
65 if (prd && !test_and_set_bit(BIT_ONCE, &prd->flags))
66 dev_err(dev, "runtime pm suspend before resume\n");
67}
68
69int platform_pm_runtime_suspend(struct device *dev)
70{
71 struct pm_runtime_data *prd = __to_prd(dev);
72
73 dev_dbg(dev, "platform_pm_runtime_suspend()\n");
74
75 platform_pm_runtime_bug(dev, prd);
76
77 if (prd && test_bit(BIT_ACTIVE, &prd->flags)) {
78 clk_disable(prd->clk);
79 clear_bit(BIT_CLK_ENABLED, &prd->flags);
80 }
81
82 return 0;
83}
84
85int platform_pm_runtime_resume(struct device *dev)
86{
87 struct pm_runtime_data *prd = __to_prd(dev);
88
89 dev_dbg(dev, "platform_pm_runtime_resume()\n");
90
91 platform_pm_runtime_init(dev, prd);
92
93 if (prd && test_bit(BIT_ACTIVE, &prd->flags)) {
94 clk_enable(prd->clk);
95 set_bit(BIT_CLK_ENABLED, &prd->flags);
96 }
97
98 return 0;
99}
100
101int platform_pm_runtime_idle(struct device *dev)
102{
103 /* suspend synchronously to disable clocks immediately */
104 return pm_runtime_suspend(dev);
105}
106
107static int platform_bus_notify(struct notifier_block *nb,
108 unsigned long action, void *data)
109{
110 struct device *dev = data;
111 struct pm_runtime_data *prd;
112
113 dev_dbg(dev, "platform_bus_notify() %ld !\n", action);
114
115 if (action == BUS_NOTIFY_BIND_DRIVER) {
116 prd = devres_alloc(__devres_release, sizeof(*prd), GFP_KERNEL);
117 if (prd)
118 devres_add(dev, prd);
119 else
120 dev_err(dev, "unable to alloc memory for runtime pm\n");
121 }
122
123 return 0;
124}
125
126#else /* CONFIG_PM_RUNTIME */
127
128static int platform_bus_notify(struct notifier_block *nb,
129 unsigned long action, void *data)
130{
131 struct device *dev = data;
132 struct clk *clk;
133
134 dev_dbg(dev, "platform_bus_notify() %ld !\n", action);
135
136 switch (action) {
137 case BUS_NOTIFY_BIND_DRIVER:
138 clk = clk_get(dev, NULL);
139 if (!IS_ERR(clk)) {
140 clk_enable(clk);
141 clk_put(clk);
142 dev_info(dev, "runtime pm disabled, clock forced on\n");
143 }
144 break;
145 case BUS_NOTIFY_UNBOUND_DRIVER:
146 clk = clk_get(dev, NULL);
147 if (!IS_ERR(clk)) {
148 clk_disable(clk);
149 clk_put(clk);
150 dev_info(dev, "runtime pm disabled, clock forced off\n");
151 }
152 break;
153 }
154
155 return 0;
156}
157
158#endif /* CONFIG_PM_RUNTIME */
159
160static struct notifier_block platform_bus_notifier = {
161 .notifier_call = platform_bus_notify
162};
163
164static int __init sh_pm_runtime_init(void)
165{
166 bus_register_notifier(&platform_bus_type, &platform_bus_notifier);
167 return 0;
168}
169core_initcall(sh_pm_runtime_init);
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index 05e78dd9b50c..9e305de56be9 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -91,10 +91,8 @@ static void __init tegra_harmony_fixup(struct machine_desc *desc,
91{ 91{
92 mi->nr_banks = 2; 92 mi->nr_banks = 2;
93 mi->bank[0].start = PHYS_OFFSET; 93 mi->bank[0].start = PHYS_OFFSET;
94 mi->bank[0].node = PHYS_TO_NID(PHYS_OFFSET);
95 mi->bank[0].size = 448 * SZ_1M; 94 mi->bank[0].size = 448 * SZ_1M;
96 mi->bank[1].start = SZ_512M; 95 mi->bank[1].start = SZ_512M;
97 mi->bank[1].node = PHYS_TO_NID(SZ_512M);
98 mi->bank[1].size = SZ_512M; 96 mi->bank[1].size = SZ_512M;
99} 97}
100 98
diff --git a/arch/arm/mach-tegra/include/mach/vmalloc.h b/arch/arm/mach-tegra/include/mach/vmalloc.h
index 267a141730d9..fd6aa65b2dc6 100644
--- a/arch/arm/mach-tegra/include/mach/vmalloc.h
+++ b/arch/arm/mach-tegra/include/mach/vmalloc.h
@@ -23,6 +23,6 @@
23 23
24#include <asm/sizes.h> 24#include <asm/sizes.h>
25 25
26#define VMALLOC_END 0xFE000000 26#define VMALLOC_END 0xFE000000UL
27 27
28#endif 28#endif
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 33c3f570aaa0..a0a2928ae4dd 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -398,7 +398,7 @@ config CPU_V6
398# ARMv6k 398# ARMv6k
399config CPU_32v6K 399config CPU_32v6K
400 bool "Support ARM V6K processor extensions" if !SMP 400 bool "Support ARM V6K processor extensions" if !SMP
401 depends on CPU_V6 401 depends on CPU_V6 || CPU_V7
402 default y if SMP && !(ARCH_MX3 || ARCH_OMAP2) 402 default y if SMP && !(ARCH_MX3 || ARCH_OMAP2)
403 help 403 help
404 Say Y here if your ARMv6 processor supports the 'K' extension. 404 Say Y here if your ARMv6 processor supports the 'K' extension.
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index c704eed63c5d..4bc43e535d3b 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -229,6 +229,8 @@ __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
229 } 229 }
230 } while (size -= PAGE_SIZE); 230 } while (size -= PAGE_SIZE);
231 231
232 dsb();
233
232 return (void *)c->vm_start; 234 return (void *)c->vm_start;
233 } 235 }
234 return NULL; 236 return NULL;
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index 0527e65318f4..6785db4179b8 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -43,6 +43,7 @@ config ARCH_MXC91231
43config ARCH_MX5 43config ARCH_MX5
44 bool "MX5-based" 44 bool "MX5-based"
45 select CPU_V7 45 select CPU_V7
46 select ARM_L1_CACHE_SHIFT_6
46 help 47 help
47 This enables support for systems based on the Freescale i.MX51 family 48 This enables support for systems based on the Freescale i.MX51 family
48 49
diff --git a/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h b/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h
index 634e3f4c454d..656acb45d434 100644
--- a/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h
+++ b/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h
@@ -37,9 +37,9 @@
37 * mach-mx5/eukrea_mbimx51-baseboard.c for cpuimx51 37 * mach-mx5/eukrea_mbimx51-baseboard.c for cpuimx51
38 */ 38 */
39 39
40extern void eukrea_mbimx25_baseboard_init(void); 40extern void eukrea_mbimxsd25_baseboard_init(void);
41extern void eukrea_mbimx27_baseboard_init(void); 41extern void eukrea_mbimx27_baseboard_init(void);
42extern void eukrea_mbimx35_baseboard_init(void); 42extern void eukrea_mbimxsd35_baseboard_init(void);
43extern void eukrea_mbimx51_baseboard_init(void); 43extern void eukrea_mbimx51_baseboard_init(void);
44 44
45#endif 45#endif
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index b3da9aad4295..3703ab28257f 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -164,8 +164,9 @@ int tzic_enable_wake(int is_idle)
164 return -EAGAIN; 164 return -EAGAIN;
165 165
166 for (i = 0; i < 4; i++) { 166 for (i = 0; i < 4; i++) {
167 v = is_idle ? __raw_readl(TZIC_ENSET0(i)) : wakeup_intr[i]; 167 v = is_idle ? __raw_readl(tzic_base + TZIC_ENSET0(i)) :
168 __raw_writel(v, TZIC_WAKEUP0(i)); 168 wakeup_intr[i];
169 __raw_writel(v, tzic_base + TZIC_WAKEUP0(i));
169 } 170 }
170 171
171 return 0; 172 return 0;
diff --git a/arch/arm/plat-omap/include/plat/smp.h b/arch/arm/plat-omap/include/plat/smp.h
index 6a3ff65c0303..5177a9c5a25a 100644
--- a/arch/arm/plat-omap/include/plat/smp.h
+++ b/arch/arm/plat-omap/include/plat/smp.h
@@ -19,13 +19,6 @@
19 19
20#include <asm/hardware/gic.h> 20#include <asm/hardware/gic.h>
21 21
22/*
23 * set_event() is used to wake up secondary core from wfe using sev. ROM
24 * code puts the second core into wfe(standby).
25 *
26 */
27#define set_event() __asm__ __volatile__ ("sev" : : : "memory")
28
29/* Needed for secondary core boot */ 22/* Needed for secondary core boot */
30extern void omap_secondary_startup(void); 23extern void omap_secondary_startup(void);
31extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); 24extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
diff --git a/arch/arm/plat-pxa/pwm.c b/arch/arm/plat-pxa/pwm.c
index 0732c6c8d511..ef32686feef9 100644
--- a/arch/arm/plat-pxa/pwm.c
+++ b/arch/arm/plat-pxa/pwm.c
@@ -176,7 +176,7 @@ static inline void __add_pwm(struct pwm_device *pwm)
176 176
177static int __devinit pwm_probe(struct platform_device *pdev) 177static int __devinit pwm_probe(struct platform_device *pdev)
178{ 178{
179 struct platform_device_id *id = platform_get_device_id(pdev); 179 const struct platform_device_id *id = platform_get_device_id(pdev);
180 struct pwm_device *pwm, *secondary = NULL; 180 struct pwm_device *pwm, *secondary = NULL;
181 struct resource *r; 181 struct resource *r;
182 int ret = 0; 182 int ret = 0;
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h
index 54e9fb9d315e..c4ff88bf6477 100644
--- a/arch/arm/plat-s5p/include/plat/map-s5p.h
+++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
@@ -17,6 +17,7 @@
17#define S5P_VA_GPIO S3C_ADDR(0x00500000) 17#define S5P_VA_GPIO S3C_ADDR(0x00500000)
18#define S5P_VA_SYSTIMER S3C_ADDR(0x01200000) 18#define S5P_VA_SYSTIMER S3C_ADDR(0x01200000)
19#define S5P_VA_SROMC S3C_ADDR(0x01100000) 19#define S5P_VA_SROMC S3C_ADDR(0x01100000)
20#define S5P_VA_SYSRAM S3C_ADDR(0x01180000)
20 21
21#define S5P_VA_COMBINER_BASE S3C_ADDR(0x00600000) 22#define S5P_VA_COMBINER_BASE S3C_ADDR(0x00600000)
22#define S5P_VA_COMBINER(x) (S5P_VA_COMBINER_BASE + ((x) >> 2) * 0x10) 23#define S5P_VA_COMBINER(x) (S5P_VA_COMBINER_BASE + ((x) >> 2) * 0x10)
@@ -29,6 +30,7 @@
29#define S5P_VA_GIC_DIST S5P_VA_COREPERI(0x1000) 30#define S5P_VA_GIC_DIST S5P_VA_COREPERI(0x1000)
30 31
31#define S5P_VA_L2CC S3C_ADDR(0x00900000) 32#define S5P_VA_L2CC S3C_ADDR(0x00900000)
33#define S5P_VA_CMU S3C_ADDR(0x00920000)
32 34
33#define S5P_VA_UART(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) 35#define S5P_VA_UART(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
34#define S5P_VA_UART0 S5P_VA_UART(0) 36#define S5P_VA_UART0 S5P_VA_UART(0)
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 48cbdcb6bbd4..55590a4d87c9 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Mon Jul 12 21:10:14 2010 15# Last update: Thu Sep 9 22:43:01 2010
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -2622,7 +2622,7 @@ kraken MACH_KRAKEN KRAKEN 2634
2622gw2388 MACH_GW2388 GW2388 2635 2622gw2388 MACH_GW2388 GW2388 2635
2623jadecpu MACH_JADECPU JADECPU 2636 2623jadecpu MACH_JADECPU JADECPU 2636
2624carlisle MACH_CARLISLE CARLISLE 2637 2624carlisle MACH_CARLISLE CARLISLE 2637
2625lux_sf9 MACH_LUX_SFT9 LUX_SFT9 2638 2625lux_sf9 MACH_LUX_SF9 LUX_SF9 2638
2626nemid_tb MACH_NEMID_TB NEMID_TB 2639 2626nemid_tb MACH_NEMID_TB NEMID_TB 2639
2627terrier MACH_TERRIER TERRIER 2640 2627terrier MACH_TERRIER TERRIER 2640
2628turbot MACH_TURBOT TURBOT 2641 2628turbot MACH_TURBOT TURBOT 2641
@@ -2950,3 +2950,97 @@ davinci_dm365_dvr MACH_DAVINCI_DM365_DVR DAVINCI_DM365_DVR 2963
2950netviz MACH_NETVIZ NETVIZ 2964 2950netviz MACH_NETVIZ NETVIZ 2964
2951flexibity MACH_FLEXIBITY FLEXIBITY 2965 2951flexibity MACH_FLEXIBITY FLEXIBITY 2965
2952wlan_computer MACH_WLAN_COMPUTER WLAN_COMPUTER 2966 2952wlan_computer MACH_WLAN_COMPUTER WLAN_COMPUTER 2966
2953lpc24xx MACH_LPC24XX LPC24XX 2967
2954spica MACH_SPICA SPICA 2968
2955gpsdisplay MACH_GPSDISPLAY GPSDISPLAY 2969
2956bipnet MACH_BIPNET BIPNET 2970
2957overo_ctu_inertial MACH_OVERO_CTU_INERTIAL OVERO_CTU_INERTIAL 2971
2958davinci_dm355_mmm MACH_DAVINCI_DM355_MMM DAVINCI_DM355_MMM 2972
2959pc9260_v2 MACH_PC9260_V2 PC9260_V2 2973
2960ptx7545 MACH_PTX7545 PTX7545 2974
2961tm_efdc MACH_TM_EFDC TM_EFDC 2975
2962omap3_waldo1 MACH_OMAP3_WALDO1 OMAP3_WALDO1 2977
2963flyer MACH_FLYER FLYER 2978
2964tornado3240 MACH_TORNADO3240 TORNADO3240 2979
2965soli_01 MACH_SOLI_01 SOLI_01 2980
2966omapl138_europalc MACH_OMAPL138_EUROPALC OMAPL138_EUROPALC 2981
2967helios_v1 MACH_HELIOS_V1 HELIOS_V1 2982
2968netspace_lite_v2 MACH_NETSPACE_LITE_V2 NETSPACE_LITE_V2 2983
2969ssc MACH_SSC SSC 2984
2970premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985
2971wasabi MACH_WASABI WASABI 2986
2972vivow MACH_VIVOW VIVOW 2987
2973mx50_rdp MACH_MX50_RDP MX50_RDP 2988
2974universal MACH_UNIVERSAL UNIVERSAL 2989
2975real6410 MACH_REAL6410 REAL6410 2990
2976spx_sakura MACH_SPX_SAKURA SPX_SAKURA 2991
2977ij3k_2440 MACH_IJ3K_2440 IJ3K_2440 2992
2978omap3_bc10 MACH_OMAP3_BC10 OMAP3_BC10 2993
2979thebe MACH_THEBE THEBE 2994
2980rv082 MACH_RV082 RV082 2995
2981armlguest MACH_ARMLGUEST ARMLGUEST 2996
2982tjinc1000 MACH_TJINC1000 TJINC1000 2997
2983dockstar MACH_DOCKSTAR DOCKSTAR 2998
2984ax8008 MACH_AX8008 AX8008 2999
2985gnet_sgce MACH_GNET_SGCE GNET_SGCE 3000
2986pxwnas_500_1000 MACH_PXWNAS_500_1000 PXWNAS_500_1000 3001
2987ea20 MACH_EA20 EA20 3002
2988awm2 MACH_AWM2 AWM2 3003
2989ti8148evm MACH_TI8148EVM TI8148EVM 3004
2990tegra_seaboard MACH_TEGRA_SEABOARD TEGRA_SEABOARD 3005
2991linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006
2992tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007
2993rubys MACH_RUBYS RUBYS 3008
2994aquarius MACH_AQUARIUS AQUARIUS 3009
2995mx53_ard MACH_MX53_ARD MX53_ARD 3010
2996mx53_smd MACH_MX53_SMD MX53_SMD 3011
2997lswxl MACH_LSWXL LSWXL 3012
2998dove_avng_v3 MACH_DOVE_AVNG_V3 DOVE_AVNG_V3 3013
2999sdi_ess_9263 MACH_SDI_ESS_9263 SDI_ESS_9263 3014
3000jocpu550 MACH_JOCPU550 JOCPU550 3015
3001msm8x60_rumi3 MACH_MSM8X60_RUMI3 MSM8X60_RUMI3 3016
3002msm8x60_ffa MACH_MSM8X60_FFA MSM8X60_FFA 3017
3003yanomami MACH_YANOMAMI YANOMAMI 3018
3004gta04 MACH_GTA04 GTA04 3019
3005cm_a510 MACH_CM_A510 CM_A510 3020
3006omap3_rfs200 MACH_OMAP3_RFS200 OMAP3_RFS200 3021
3007kx33xx MACH_KX33XX KX33XX 3022
3008ptx7510 MACH_PTX7510 PTX7510 3023
3009top9000 MACH_TOP9000 TOP9000 3024
3010teenote MACH_TEENOTE TEENOTE 3025
3011ts3 MACH_TS3 TS3 3026
3012a0 MACH_A0 A0 3027
3013fsm9xxx_surf MACH_FSM9XXX_SURF FSM9XXX_SURF 3028
3014fsm9xxx_ffa MACH_FSM9XXX_FFA FSM9XXX_FFA 3029
3015frrhwcdma60w MACH_FRRHWCDMA60W FRRHWCDMA60W 3030
3016remus MACH_REMUS REMUS 3031
3017at91cap7xdk MACH_AT91CAP7XDK AT91CAP7XDK 3032
3018at91cap7stk MACH_AT91CAP7STK AT91CAP7STK 3033
3019kt_sbc_sam9_1 MACH_KT_SBC_SAM9_1 KT_SBC_SAM9_1 3034
3020oratisrouter MACH_ORATISROUTER ORATISROUTER 3035
3021armada_xp_db MACH_ARMADA_XP_DB ARMADA_XP_DB 3036
3022spdm MACH_SPDM SPDM 3037
3023gtib MACH_GTIB GTIB 3038
3024dgm3240 MACH_DGM3240 DGM3240 3039
3025atlas_i_lpe MACH_ATLAS_I_LPE ATLAS_I_LPE 3040
3026htcmega MACH_HTCMEGA HTCMEGA 3041
3027tricorder MACH_TRICORDER TRICORDER 3042
3028tx28 MACH_TX28 TX28 3043
3029bstbrd MACH_BSTBRD BSTBRD 3044
3030pwb3090 MACH_PWB3090 PWB3090 3045
3031idea6410 MACH_IDEA6410 IDEA6410 3046
3032qbc9263 MACH_QBC9263 QBC9263 3047
3033borabora MACH_BORABORA BORABORA 3048
3034valdez MACH_VALDEZ VALDEZ 3049
3035ls9g20 MACH_LS9G20 LS9G20 3050
3036mios_v1 MACH_MIOS_V1 MIOS_V1 3051
3037s5pc110_crespo MACH_S5PC110_CRESPO S5PC110_CRESPO 3052
3038controltek9g20 MACH_CONTROLTEK9G20 CONTROLTEK9G20 3053
3039tin307 MACH_TIN307 TIN307 3054
3040tin510 MACH_TIN510 TIN510 3055
3041bluecheese MACH_BLUECHEESE BLUECHEESE 3057
3042tem3x30 MACH_TEM3X30 TEM3X30 3058
3043harvest_desoto MACH_HARVEST_DESOTO HARVEST_DESOTO 3059
3044msm8x60_qrdc MACH_MSM8X60_QRDC MSM8X60_QRDC 3060
3045spear900 MACH_SPEAR900 SPEAR900 3061
3046pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062
diff --git a/arch/blackfin/include/asm/bfin_sport.h b/arch/blackfin/include/asm/bfin_sport.h
index 9626cf7e4251..d27600c262c2 100644
--- a/arch/blackfin/include/asm/bfin_sport.h
+++ b/arch/blackfin/include/asm/bfin_sport.h
@@ -115,12 +115,6 @@ struct sport_register {
115 115
116#endif 116#endif
117 117
118/* Workaround defBF*.h SPORT MMRs till they get cleansed */
119#undef DTYPE_NORM
120#undef SLEN
121#undef SP_WOFF
122#undef SP_WSIZE
123
124/* SPORT_TCR1 Masks */ 118/* SPORT_TCR1 Masks */
125#define TSPEN 0x0001 /* TX enable */ 119#define TSPEN 0x0001 /* TX enable */
126#define ITCLK 0x0002 /* Internal TX Clock Select */ 120#define ITCLK 0x0002 /* Internal TX Clock Select */
diff --git a/arch/blackfin/include/asm/bitops.h b/arch/blackfin/include/asm/bitops.h
index d5872cd967ab..3f7ef4d97791 100644
--- a/arch/blackfin/include/asm/bitops.h
+++ b/arch/blackfin/include/asm/bitops.h
@@ -22,7 +22,9 @@
22 22
23#include <asm-generic/bitops/sched.h> 23#include <asm-generic/bitops/sched.h>
24#include <asm-generic/bitops/ffs.h> 24#include <asm-generic/bitops/ffs.h>
25#include <asm-generic/bitops/const_hweight.h>
25#include <asm-generic/bitops/lock.h> 26#include <asm-generic/bitops/lock.h>
27
26#include <asm-generic/bitops/ext2-non-atomic.h> 28#include <asm-generic/bitops/ext2-non-atomic.h>
27#include <asm-generic/bitops/ext2-atomic.h> 29#include <asm-generic/bitops/ext2-atomic.h>
28#include <asm-generic/bitops/minix.h> 30#include <asm-generic/bitops/minix.h>
@@ -115,7 +117,7 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
115 * of bits set) of a N-bit word 117 * of bits set) of a N-bit word
116 */ 118 */
117 119
118static inline unsigned int hweight32(unsigned int w) 120static inline unsigned int __arch_hweight32(unsigned int w)
119{ 121{
120 unsigned int res; 122 unsigned int res;
121 123
@@ -125,19 +127,20 @@ static inline unsigned int hweight32(unsigned int w)
125 return res; 127 return res;
126} 128}
127 129
128static inline unsigned int hweight64(__u64 w) 130static inline unsigned int __arch_hweight64(__u64 w)
129{ 131{
130 return hweight32((unsigned int)(w >> 32)) + hweight32((unsigned int)w); 132 return __arch_hweight32((unsigned int)(w >> 32)) +
133 __arch_hweight32((unsigned int)w);
131} 134}
132 135
133static inline unsigned int hweight16(unsigned int w) 136static inline unsigned int __arch_hweight16(unsigned int w)
134{ 137{
135 return hweight32(w & 0xffff); 138 return __arch_hweight32(w & 0xffff);
136} 139}
137 140
138static inline unsigned int hweight8(unsigned int w) 141static inline unsigned int __arch_hweight8(unsigned int w)
139{ 142{
140 return hweight32(w & 0xff); 143 return __arch_hweight32(w & 0xff);
141} 144}
142 145
143#endif /* _BLACKFIN_BITOPS_H */ 146#endif /* _BLACKFIN_BITOPS_H */
diff --git a/arch/blackfin/include/asm/unistd.h b/arch/blackfin/include/asm/unistd.h
index 22886cbdae7a..14fcd254b185 100644
--- a/arch/blackfin/include/asm/unistd.h
+++ b/arch/blackfin/include/asm/unistd.h
@@ -389,8 +389,11 @@
389#define __NR_rt_tgsigqueueinfo 368 389#define __NR_rt_tgsigqueueinfo 368
390#define __NR_perf_event_open 369 390#define __NR_perf_event_open 369
391#define __NR_recvmmsg 370 391#define __NR_recvmmsg 370
392#define __NR_fanotify_init 371
393#define __NR_fanotify_mark 372
394#define __NR_prlimit64 373
392 395
393#define __NR_syscall 371 396#define __NR_syscall 374
394#define NR_syscalls __NR_syscall 397#define NR_syscalls __NR_syscall
395 398
396/* Old optional stuff no one actually uses */ 399/* Old optional stuff no one actually uses */
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
index 2bc8f4f98011..037a51fd8e93 100644
--- a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
+++ b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
@@ -913,88 +913,6 @@
913#define PH6 0x0040 913#define PH6 0x0040
914#define PH7 0x0080 914#define PH7 0x0080
915 915
916
917/* ******************* SERIAL PORT MASKS **************************************/
918/* SPORTx_TCR1 Masks */
919#define TSPEN 0x0001 /* Transmit Enable */
920#define ITCLK 0x0002 /* Internal Transmit Clock Select */
921#define DTYPE_NORM 0x0004 /* Data Format Normal */
922#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
923#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
924#define TLSBIT 0x0010 /* Transmit Bit Order */
925#define ITFS 0x0200 /* Internal Transmit Frame Sync Select */
926#define TFSR 0x0400 /* Transmit Frame Sync Required Select */
927#define DITFS 0x0800 /* Data-Independent Transmit Frame Sync Select */
928#define LTFS 0x1000 /* Low Transmit Frame Sync Select */
929#define LATFS 0x2000 /* Late Transmit Frame Sync Select */
930#define TCKFE 0x4000 /* Clock Falling Edge Select */
931
932/* SPORTx_TCR2 Masks and Macro */
933#define SLEN(x) ((x)&0x1F) /* SPORT TX Word Length (2 - 31) */
934#define TXSE 0x0100 /* TX Secondary Enable */
935#define TSFSE 0x0200 /* Transmit Stereo Frame Sync Enable */
936#define TRFST 0x0400 /* Left/Right Order (1 = Right Channel 1st) */
937
938/* SPORTx_RCR1 Masks */
939#define RSPEN 0x0001 /* Receive Enable */
940#define IRCLK 0x0002 /* Internal Receive Clock Select */
941#define DTYPE_NORM 0x0004 /* Data Format Normal */
942#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
943#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
944#define RLSBIT 0x0010 /* Receive Bit Order */
945#define IRFS 0x0200 /* Internal Receive Frame Sync Select */
946#define RFSR 0x0400 /* Receive Frame Sync Required Select */
947#define LRFS 0x1000 /* Low Receive Frame Sync Select */
948#define LARFS 0x2000 /* Late Receive Frame Sync Select */
949#define RCKFE 0x4000 /* Clock Falling Edge Select */
950
951/* SPORTx_RCR2 Masks */
952#define SLEN(x) ((x)&0x1F) /* SPORT RX Word Length (2 - 31) */
953#define RXSE 0x0100 /* RX Secondary Enable */
954#define RSFSE 0x0200 /* RX Stereo Frame Sync Enable */
955#define RRFST 0x0400 /* Right-First Data Order */
956
957/* SPORTx_STAT Masks */
958#define RXNE 0x0001 /* Receive FIFO Not Empty Status */
959#define RUVF 0x0002 /* Sticky Receive Underflow Status */
960#define ROVF 0x0004 /* Sticky Receive Overflow Status */
961#define TXF 0x0008 /* Transmit FIFO Full Status */
962#define TUVF 0x0010 /* Sticky Transmit Underflow Status */
963#define TOVF 0x0020 /* Sticky Transmit Overflow Status */
964#define TXHRE 0x0040 /* Transmit Hold Register Empty */
965
966/* SPORTx_MCMC1 Macros */
967#define SP_WOFF(x) ((x) & 0x3FF) /* Multichannel Window Offset Field */
968
969/* Only use WSIZE Macro With Logic OR While Setting Lower Order Bits */
970#define SP_WSIZE(x) (((((x)>>0x3)-1)&0xF) << 0xC) /* Multichannel Window Size = (x/8)-1 */
971
972/* SPORTx_MCMC2 Masks */
973#define REC_BYPASS 0x0000 /* Bypass Mode (No Clock Recovery) */
974#define REC_2FROM4 0x0002 /* Recover 2 MHz Clock from 4 MHz Clock */
975#define REC_8FROM16 0x0003 /* Recover 8 MHz Clock from 16 MHz Clock */
976#define MCDTXPE 0x0004 /* Multichannel DMA Transmit Packing */
977#define MCDRXPE 0x0008 /* Multichannel DMA Receive Packing */
978#define MCMEN 0x0010 /* Multichannel Frame Mode Enable */
979#define FSDR 0x0080 /* Multichannel Frame Sync to Data Relationship */
980#define MFD_0 0x0000 /* Multichannel Frame Delay = 0 */
981#define MFD_1 0x1000 /* Multichannel Frame Delay = 1 */
982#define MFD_2 0x2000 /* Multichannel Frame Delay = 2 */
983#define MFD_3 0x3000 /* Multichannel Frame Delay = 3 */
984#define MFD_4 0x4000 /* Multichannel Frame Delay = 4 */
985#define MFD_5 0x5000 /* Multichannel Frame Delay = 5 */
986#define MFD_6 0x6000 /* Multichannel Frame Delay = 6 */
987#define MFD_7 0x7000 /* Multichannel Frame Delay = 7 */
988#define MFD_8 0x8000 /* Multichannel Frame Delay = 8 */
989#define MFD_9 0x9000 /* Multichannel Frame Delay = 9 */
990#define MFD_10 0xA000 /* Multichannel Frame Delay = 10 */
991#define MFD_11 0xB000 /* Multichannel Frame Delay = 11 */
992#define MFD_12 0xC000 /* Multichannel Frame Delay = 12 */
993#define MFD_13 0xD000 /* Multichannel Frame Delay = 13 */
994#define MFD_14 0xE000 /* Multichannel Frame Delay = 14 */
995#define MFD_15 0xF000 /* Multichannel Frame Delay = 15 */
996
997
998/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS *************************/ 916/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS *************************/
999/* EBIU_AMGCTL Masks */ 917/* EBIU_AMGCTL Masks */
1000#define AMCKEN 0x0001 /* Enable CLKOUT */ 918#define AMCKEN 0x0001 /* Enable CLKOUT */
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index f392af641657..645ba5c8077b 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -145,7 +145,6 @@ static struct mtd_partition partition_info[] = {
145}; 145};
146 146
147static struct bf5xx_nand_platform bf5xx_nand_platform = { 147static struct bf5xx_nand_platform bf5xx_nand_platform = {
148 .page_size = NFC_PG_SIZE_256,
149 .data_width = NFC_NWIDTH_8, 148 .data_width = NFC_NWIDTH_8,
150 .partitions = partition_info, 149 .partitions = partition_info,
151 .nr_partitions = ARRAY_SIZE(partition_info), 150 .nr_partitions = ARRAY_SIZE(partition_info),
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c
index 606eb36b9d6e..c975fe88eba3 100644
--- a/arch/blackfin/mach-bf527/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf527/boards/ezbrd.c
@@ -149,7 +149,6 @@ static struct mtd_partition partition_info[] = {
149}; 149};
150 150
151static struct bf5xx_nand_platform bf5xx_nand_platform = { 151static struct bf5xx_nand_platform bf5xx_nand_platform = {
152 .page_size = NFC_PG_SIZE_256,
153 .data_width = NFC_NWIDTH_8, 152 .data_width = NFC_NWIDTH_8,
154 .partitions = partition_info, 153 .partitions = partition_info,
155 .nr_partitions = ARRAY_SIZE(partition_info), 154 .nr_partitions = ARRAY_SIZE(partition_info),
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index a05c967a24cf..87b41e994ba3 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -234,7 +234,6 @@ static struct mtd_partition partition_info[] = {
234}; 234};
235 235
236static struct bf5xx_nand_platform bf5xx_nand_platform = { 236static struct bf5xx_nand_platform bf5xx_nand_platform = {
237 .page_size = NFC_PG_SIZE_256,
238 .data_width = NFC_NWIDTH_8, 237 .data_width = NFC_NWIDTH_8,
239 .partitions = partition_info, 238 .partitions = partition_info,
240 .nr_partitions = ARRAY_SIZE(partition_info), 239 .nr_partitions = ARRAY_SIZE(partition_info),
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
index 5f97f01fcda6..3e000756aacd 100644
--- a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
@@ -922,88 +922,6 @@
922#define PH14 0x4000 922#define PH14 0x4000
923#define PH15 0x8000 923#define PH15 0x8000
924 924
925
926/* ******************* SERIAL PORT MASKS **************************************/
927/* SPORTx_TCR1 Masks */
928#define TSPEN 0x0001 /* Transmit Enable */
929#define ITCLK 0x0002 /* Internal Transmit Clock Select */
930#define DTYPE_NORM 0x0004 /* Data Format Normal */
931#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
932#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
933#define TLSBIT 0x0010 /* Transmit Bit Order */
934#define ITFS 0x0200 /* Internal Transmit Frame Sync Select */
935#define TFSR 0x0400 /* Transmit Frame Sync Required Select */
936#define DITFS 0x0800 /* Data-Independent Transmit Frame Sync Select */
937#define LTFS 0x1000 /* Low Transmit Frame Sync Select */
938#define LATFS 0x2000 /* Late Transmit Frame Sync Select */
939#define TCKFE 0x4000 /* Clock Falling Edge Select */
940
941/* SPORTx_TCR2 Masks and Macro */
942#define SLEN(x) ((x)&0x1F) /* SPORT TX Word Length (2 - 31) */
943#define TXSE 0x0100 /* TX Secondary Enable */
944#define TSFSE 0x0200 /* Transmit Stereo Frame Sync Enable */
945#define TRFST 0x0400 /* Left/Right Order (1 = Right Channel 1st) */
946
947/* SPORTx_RCR1 Masks */
948#define RSPEN 0x0001 /* Receive Enable */
949#define IRCLK 0x0002 /* Internal Receive Clock Select */
950#define DTYPE_NORM 0x0004 /* Data Format Normal */
951#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
952#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
953#define RLSBIT 0x0010 /* Receive Bit Order */
954#define IRFS 0x0200 /* Internal Receive Frame Sync Select */
955#define RFSR 0x0400 /* Receive Frame Sync Required Select */
956#define LRFS 0x1000 /* Low Receive Frame Sync Select */
957#define LARFS 0x2000 /* Late Receive Frame Sync Select */
958#define RCKFE 0x4000 /* Clock Falling Edge Select */
959
960/* SPORTx_RCR2 Masks */
961#define SLEN(x) ((x)&0x1F) /* SPORT RX Word Length (2 - 31) */
962#define RXSE 0x0100 /* RX Secondary Enable */
963#define RSFSE 0x0200 /* RX Stereo Frame Sync Enable */
964#define RRFST 0x0400 /* Right-First Data Order */
965
966/* SPORTx_STAT Masks */
967#define RXNE 0x0001 /* Receive FIFO Not Empty Status */
968#define RUVF 0x0002 /* Sticky Receive Underflow Status */
969#define ROVF 0x0004 /* Sticky Receive Overflow Status */
970#define TXF 0x0008 /* Transmit FIFO Full Status */
971#define TUVF 0x0010 /* Sticky Transmit Underflow Status */
972#define TOVF 0x0020 /* Sticky Transmit Overflow Status */
973#define TXHRE 0x0040 /* Transmit Hold Register Empty */
974
975/* SPORTx_MCMC1 Macros */
976#define SP_WOFF(x) ((x) & 0x3FF) /* Multichannel Window Offset Field */
977
978/* Only use WSIZE Macro With Logic OR While Setting Lower Order Bits */
979#define SP_WSIZE(x) (((((x)>>0x3)-1)&0xF) << 0xC) /* Multichannel Window Size = (x/8)-1 */
980
981/* SPORTx_MCMC2 Masks */
982#define REC_BYPASS 0x0000 /* Bypass Mode (No Clock Recovery) */
983#define REC_2FROM4 0x0002 /* Recover 2 MHz Clock from 4 MHz Clock */
984#define REC_8FROM16 0x0003 /* Recover 8 MHz Clock from 16 MHz Clock */
985#define MCDTXPE 0x0004 /* Multichannel DMA Transmit Packing */
986#define MCDRXPE 0x0008 /* Multichannel DMA Receive Packing */
987#define MCMEN 0x0010 /* Multichannel Frame Mode Enable */
988#define FSDR 0x0080 /* Multichannel Frame Sync to Data Relationship */
989#define MFD_0 0x0000 /* Multichannel Frame Delay = 0 */
990#define MFD_1 0x1000 /* Multichannel Frame Delay = 1 */
991#define MFD_2 0x2000 /* Multichannel Frame Delay = 2 */
992#define MFD_3 0x3000 /* Multichannel Frame Delay = 3 */
993#define MFD_4 0x4000 /* Multichannel Frame Delay = 4 */
994#define MFD_5 0x5000 /* Multichannel Frame Delay = 5 */
995#define MFD_6 0x6000 /* Multichannel Frame Delay = 6 */
996#define MFD_7 0x7000 /* Multichannel Frame Delay = 7 */
997#define MFD_8 0x8000 /* Multichannel Frame Delay = 8 */
998#define MFD_9 0x9000 /* Multichannel Frame Delay = 9 */
999#define MFD_10 0xA000 /* Multichannel Frame Delay = 10 */
1000#define MFD_11 0xB000 /* Multichannel Frame Delay = 11 */
1001#define MFD_12 0xC000 /* Multichannel Frame Delay = 12 */
1002#define MFD_13 0xD000 /* Multichannel Frame Delay = 13 */
1003#define MFD_14 0xE000 /* Multichannel Frame Delay = 14 */
1004#define MFD_15 0xF000 /* Multichannel Frame Delay = 15 */
1005
1006
1007/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS *************************/ 925/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS *************************/
1008/* EBIU_AMGCTL Masks */ 926/* EBIU_AMGCTL Masks */
1009#define AMCKEN 0x0001 /* Enable CLKOUT */ 927#define AMCKEN 0x0001 /* Enable CLKOUT */
diff --git a/arch/blackfin/mach-bf533/include/mach/defBF532.h b/arch/blackfin/mach-bf533/include/mach/defBF532.h
index e9ff491c0953..04acf1ed10f9 100644
--- a/arch/blackfin/mach-bf533/include/mach/defBF532.h
+++ b/arch/blackfin/mach-bf533/include/mach/defBF532.h
@@ -509,98 +509,6 @@
509#define IREN_P 0x01 509#define IREN_P 0x01
510#define UCEN_P 0x00 510#define UCEN_P 0x00
511 511
512/* ********** SERIAL PORT MASKS ********************** */
513
514/* SPORTx_TCR1 Masks */
515#define TSPEN 0x0001 /* TX enable */
516#define ITCLK 0x0002 /* Internal TX Clock Select */
517#define TDTYPE 0x000C /* TX Data Formatting Select */
518#define DTYPE_NORM 0x0000 /* Data Format Normal */
519#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
520#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
521#define TLSBIT 0x0010 /* TX Bit Order */
522#define ITFS 0x0200 /* Internal TX Frame Sync Select */
523#define TFSR 0x0400 /* TX Frame Sync Required Select */
524#define DITFS 0x0800 /* Data Independent TX Frame Sync Select */
525#define LTFS 0x1000 /* Low TX Frame Sync Select */
526#define LATFS 0x2000 /* Late TX Frame Sync Select */
527#define TCKFE 0x4000 /* TX Clock Falling Edge Select */
528
529/* SPORTx_TCR2 Masks */
530#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || \
531 defined(__ADSPBF533__)
532# define SLEN 0x001F /*TX Word Length */
533#else
534# define SLEN(x) ((x)&0x1F) /* SPORT TX Word Length (2 - 31) */
535#endif
536#define TXSE 0x0100 /*TX Secondary Enable */
537#define TSFSE 0x0200 /*TX Stereo Frame Sync Enable */
538#define TRFST 0x0400 /*TX Right-First Data Order */
539
540/* SPORTx_RCR1 Masks */
541#define RSPEN 0x0001 /* RX enable */
542#define IRCLK 0x0002 /* Internal RX Clock Select */
543#define RDTYPE 0x000C /* RX Data Formatting Select */
544#define DTYPE_NORM 0x0000 /* no companding */
545#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
546#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
547#define RLSBIT 0x0010 /* RX Bit Order */
548#define IRFS 0x0200 /* Internal RX Frame Sync Select */
549#define RFSR 0x0400 /* RX Frame Sync Required Select */
550#define LRFS 0x1000 /* Low RX Frame Sync Select */
551#define LARFS 0x2000 /* Late RX Frame Sync Select */
552#define RCKFE 0x4000 /* RX Clock Falling Edge Select */
553
554/* SPORTx_RCR2 Masks */
555/* SLEN defined above */
556#define RXSE 0x0100 /*RX Secondary Enable */
557#define RSFSE 0x0200 /*RX Stereo Frame Sync Enable */
558#define RRFST 0x0400 /*Right-First Data Order */
559
560/*SPORTx_STAT Masks */
561#define RXNE 0x0001 /*RX FIFO Not Empty Status */
562#define RUVF 0x0002 /*RX Underflow Status */
563#define ROVF 0x0004 /*RX Overflow Status */
564#define TXF 0x0008 /*TX FIFO Full Status */
565#define TUVF 0x0010 /*TX Underflow Status */
566#define TOVF 0x0020 /*TX Overflow Status */
567#define TXHRE 0x0040 /*TX Hold Register Empty */
568
569/*SPORTx_MCMC1 Masks */
570#define SP_WSIZE 0x0000F000 /*Multichannel Window Size Field */
571#define SP_WOFF 0x000003FF /*Multichannel Window Offset Field */
572/* SPORTx_MCMC1 Macros */
573#define SET_SP_WOFF(x) ((x) & 0x3FF) /* Multichannel Window Offset Field */
574/* Only use SET_WSIZE Macro With Logic OR While Setting Lower Order Bits */
575#define SET_SP_WSIZE(x) (((((x)>>0x3)-1)&0xF) << 0xC) /* Multichannel Window Size = (x/8)-1 */
576
577/*SPORTx_MCMC2 Masks */
578#define MCCRM 0x00000003 /*Multichannel Clock Recovery Mode */
579#define REC_BYPASS 0x0000 /* Bypass Mode (No Clock Recovery) */
580#define REC_2FROM4 0x0002 /* Recover 2 MHz Clock from 4 MHz Clock */
581#define REC_8FROM16 0x0003 /* Recover 8 MHz Clock from 16 MHz Clock */
582#define MCDTXPE 0x00000004 /*Multichannel DMA Transmit Packing */
583#define MCDRXPE 0x00000008 /*Multichannel DMA Receive Packing */
584#define MCMEN 0x00000010 /*Multichannel Frame Mode Enable */
585#define FSDR 0x00000080 /*Multichannel Frame Sync to Data Relationship */
586#define MFD 0x0000F000 /*Multichannel Frame Delay */
587#define MFD_0 0x0000 /* Multichannel Frame Delay = 0 */
588#define MFD_1 0x1000 /* Multichannel Frame Delay = 1 */
589#define MFD_2 0x2000 /* Multichannel Frame Delay = 2 */
590#define MFD_3 0x3000 /* Multichannel Frame Delay = 3 */
591#define MFD_4 0x4000 /* Multichannel Frame Delay = 4 */
592#define MFD_5 0x5000 /* Multichannel Frame Delay = 5 */
593#define MFD_6 0x6000 /* Multichannel Frame Delay = 6 */
594#define MFD_7 0x7000 /* Multichannel Frame Delay = 7 */
595#define MFD_8 0x8000 /* Multichannel Frame Delay = 8 */
596#define MFD_9 0x9000 /* Multichannel Frame Delay = 9 */
597#define MFD_10 0xA000 /* Multichannel Frame Delay = 10 */
598#define MFD_11 0xB000 /* Multichannel Frame Delay = 11 */
599#define MFD_12 0xC000 /* Multichannel Frame Delay = 12 */
600#define MFD_13 0xD000 /* Multichannel Frame Delay = 13 */
601#define MFD_14 0xE000 /* Multichannel Frame Delay = 14 */
602#define MFD_15 0xF000 /* Multichannel Frame Delay = 15 */
603
604/* ********* PARALLEL PERIPHERAL INTERFACE (PPI) MASKS **************** */ 512/* ********* PARALLEL PERIPHERAL INTERFACE (PPI) MASKS **************** */
605 513
606/* PPI_CONTROL Masks */ 514/* PPI_CONTROL Masks */
diff --git a/arch/blackfin/mach-bf537/include/mach/defBF534.h b/arch/blackfin/mach-bf537/include/mach/defBF534.h
index aad61b887373..6f56907a18c0 100644
--- a/arch/blackfin/mach-bf537/include/mach/defBF534.h
+++ b/arch/blackfin/mach-bf537/include/mach/defBF534.h
@@ -1241,86 +1241,6 @@
1241#define PH14 0x4000 1241#define PH14 0x4000
1242#define PH15 0x8000 1242#define PH15 0x8000
1243 1243
1244/* ******************* SERIAL PORT MASKS **************************************/
1245/* SPORTx_TCR1 Masks */
1246#define TSPEN 0x0001 /* Transmit Enable */
1247#define ITCLK 0x0002 /* Internal Transmit Clock Select */
1248#define DTYPE_NORM 0x0004 /* Data Format Normal */
1249#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
1250#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
1251#define TLSBIT 0x0010 /* Transmit Bit Order */
1252#define ITFS 0x0200 /* Internal Transmit Frame Sync Select */
1253#define TFSR 0x0400 /* Transmit Frame Sync Required Select */
1254#define DITFS 0x0800 /* Data-Independent Transmit Frame Sync Select */
1255#define LTFS 0x1000 /* Low Transmit Frame Sync Select */
1256#define LATFS 0x2000 /* Late Transmit Frame Sync Select */
1257#define TCKFE 0x4000 /* Clock Falling Edge Select */
1258
1259/* SPORTx_TCR2 Masks and Macro */
1260#define SLEN(x) ((x)&0x1F) /* SPORT TX Word Length (2 - 31) */
1261#define TXSE 0x0100 /* TX Secondary Enable */
1262#define TSFSE 0x0200 /* Transmit Stereo Frame Sync Enable */
1263#define TRFST 0x0400 /* Left/Right Order (1 = Right Channel 1st) */
1264
1265/* SPORTx_RCR1 Masks */
1266#define RSPEN 0x0001 /* Receive Enable */
1267#define IRCLK 0x0002 /* Internal Receive Clock Select */
1268#define DTYPE_NORM 0x0004 /* Data Format Normal */
1269#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
1270#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
1271#define RLSBIT 0x0010 /* Receive Bit Order */
1272#define IRFS 0x0200 /* Internal Receive Frame Sync Select */
1273#define RFSR 0x0400 /* Receive Frame Sync Required Select */
1274#define LRFS 0x1000 /* Low Receive Frame Sync Select */
1275#define LARFS 0x2000 /* Late Receive Frame Sync Select */
1276#define RCKFE 0x4000 /* Clock Falling Edge Select */
1277
1278/* SPORTx_RCR2 Masks */
1279#define SLEN(x) ((x)&0x1F) /* SPORT RX Word Length (2 - 31) */
1280#define RXSE 0x0100 /* RX Secondary Enable */
1281#define RSFSE 0x0200 /* RX Stereo Frame Sync Enable */
1282#define RRFST 0x0400 /* Right-First Data Order */
1283
1284/* SPORTx_STAT Masks */
1285#define RXNE 0x0001 /* Receive FIFO Not Empty Status */
1286#define RUVF 0x0002 /* Sticky Receive Underflow Status */
1287#define ROVF 0x0004 /* Sticky Receive Overflow Status */
1288#define TXF 0x0008 /* Transmit FIFO Full Status */
1289#define TUVF 0x0010 /* Sticky Transmit Underflow Status */
1290#define TOVF 0x0020 /* Sticky Transmit Overflow Status */
1291#define TXHRE 0x0040 /* Transmit Hold Register Empty */
1292
1293/* SPORTx_MCMC1 Macros */
1294#define SP_WOFF(x) ((x) & 0x3FF) /* Multichannel Window Offset Field */
1295
1296/* Only use WSIZE Macro With Logic OR While Setting Lower Order Bits */
1297#define SP_WSIZE(x) (((((x)>>0x3)-1)&0xF) << 0xC) /* Multichannel Window Size = (x/8)-1 */
1298
1299/* SPORTx_MCMC2 Masks */
1300#define REC_BYPASS 0x0000 /* Bypass Mode (No Clock Recovery) */
1301#define REC_2FROM4 0x0002 /* Recover 2 MHz Clock from 4 MHz Clock */
1302#define REC_8FROM16 0x0003 /* Recover 8 MHz Clock from 16 MHz Clock */
1303#define MCDTXPE 0x0004 /* Multichannel DMA Transmit Packing */
1304#define MCDRXPE 0x0008 /* Multichannel DMA Receive Packing */
1305#define MCMEN 0x0010 /* Multichannel Frame Mode Enable */
1306#define FSDR 0x0080 /* Multichannel Frame Sync to Data Relationship */
1307#define MFD_0 0x0000 /* Multichannel Frame Delay = 0 */
1308#define MFD_1 0x1000 /* Multichannel Frame Delay = 1 */
1309#define MFD_2 0x2000 /* Multichannel Frame Delay = 2 */
1310#define MFD_3 0x3000 /* Multichannel Frame Delay = 3 */
1311#define MFD_4 0x4000 /* Multichannel Frame Delay = 4 */
1312#define MFD_5 0x5000 /* Multichannel Frame Delay = 5 */
1313#define MFD_6 0x6000 /* Multichannel Frame Delay = 6 */
1314#define MFD_7 0x7000 /* Multichannel Frame Delay = 7 */
1315#define MFD_8 0x8000 /* Multichannel Frame Delay = 8 */
1316#define MFD_9 0x9000 /* Multichannel Frame Delay = 9 */
1317#define MFD_10 0xA000 /* Multichannel Frame Delay = 10 */
1318#define MFD_11 0xB000 /* Multichannel Frame Delay = 11 */
1319#define MFD_12 0xC000 /* Multichannel Frame Delay = 12 */
1320#define MFD_13 0xD000 /* Multichannel Frame Delay = 13 */
1321#define MFD_14 0xE000 /* Multichannel Frame Delay = 14 */
1322#define MFD_15 0xF000 /* Multichannel Frame Delay = 15 */
1323
1324/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS *************************/ 1244/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS *************************/
1325/* EBIU_AMGCTL Masks */ 1245/* EBIU_AMGCTL Masks */
1326#define AMCKEN 0x0001 /* Enable CLKOUT */ 1246#define AMCKEN 0x0001 /* Enable CLKOUT */
diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h
index b674a1c4aef1..fe43062b4975 100644
--- a/arch/blackfin/mach-bf538/include/mach/defBF539.h
+++ b/arch/blackfin/mach-bf538/include/mach/defBF539.h
@@ -1610,113 +1610,6 @@
1610#define UCEN_P 0x00 1610#define UCEN_P 0x00
1611 1611
1612 1612
1613/* ********** SERIAL PORT MASKS ********************** */
1614/* SPORTx_TCR1 Masks */
1615#define TSPEN 0x0001 /* TX enable */
1616#define ITCLK 0x0002 /* Internal TX Clock Select */
1617#define TDTYPE 0x000C /* TX Data Formatting Select */
1618#define DTYPE_NORM 0x0000 /* Data Format Normal */
1619#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
1620#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
1621#define TLSBIT 0x0010 /* TX Bit Order */
1622#define ITFS 0x0200 /* Internal TX Frame Sync Select */
1623#define TFSR 0x0400 /* TX Frame Sync Required Select */
1624#define DITFS 0x0800 /* Data Independent TX Frame Sync Select */
1625#define LTFS 0x1000 /* Low TX Frame Sync Select */
1626#define LATFS 0x2000 /* Late TX Frame Sync Select */
1627#define TCKFE 0x4000 /* TX Clock Falling Edge Select */
1628/* SPORTx_RCR1 Deprecated Masks */
1629#define TULAW DTYPE_ULAW /* Compand Using u-Law */
1630#define TALAW DTYPE_ALAW /* Compand Using A-Law */
1631
1632/* SPORTx_TCR2 Masks */
1633#ifdef _MISRA_RULES
1634#define SLEN(x) ((x)&0x1Fu) /* SPORT TX Word Length (2 - 31) */
1635#else
1636#define SLEN(x) ((x)&0x1F) /* SPORT TX Word Length (2 - 31) */
1637#endif /* _MISRA_RULES */
1638#define TXSE 0x0100 /*TX Secondary Enable */
1639#define TSFSE 0x0200 /*TX Stereo Frame Sync Enable */
1640#define TRFST 0x0400 /*TX Right-First Data Order */
1641
1642/* SPORTx_RCR1 Masks */
1643#define RSPEN 0x0001 /* RX enable */
1644#define IRCLK 0x0002 /* Internal RX Clock Select */
1645#define RDTYPE 0x000C /* RX Data Formatting Select */
1646#define DTYPE_NORM 0x0000 /* no companding */
1647#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
1648#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
1649#define RLSBIT 0x0010 /* RX Bit Order */
1650#define IRFS 0x0200 /* Internal RX Frame Sync Select */
1651#define RFSR 0x0400 /* RX Frame Sync Required Select */
1652#define LRFS 0x1000 /* Low RX Frame Sync Select */
1653#define LARFS 0x2000 /* Late RX Frame Sync Select */
1654#define RCKFE 0x4000 /* RX Clock Falling Edge Select */
1655/* SPORTx_RCR1 Deprecated Masks */
1656#define RULAW DTYPE_ULAW /* Compand Using u-Law */
1657#define RALAW DTYPE_ALAW /* Compand Using A-Law */
1658
1659/* SPORTx_RCR2 Masks */
1660#ifdef _MISRA_RULES
1661#define SLEN(x) ((x)&0x1Fu) /* SPORT RX Word Length (2 - 31) */
1662#else
1663#define SLEN(x) ((x)&0x1F) /* SPORT RX Word Length (2 - 31) */
1664#endif /* _MISRA_RULES */
1665#define RXSE 0x0100 /*RX Secondary Enable */
1666#define RSFSE 0x0200 /*RX Stereo Frame Sync Enable */
1667#define RRFST 0x0400 /*Right-First Data Order */
1668
1669/*SPORTx_STAT Masks */
1670#define RXNE 0x0001 /*RX FIFO Not Empty Status */
1671#define RUVF 0x0002 /*RX Underflow Status */
1672#define ROVF 0x0004 /*RX Overflow Status */
1673#define TXF 0x0008 /*TX FIFO Full Status */
1674#define TUVF 0x0010 /*TX Underflow Status */
1675#define TOVF 0x0020 /*TX Overflow Status */
1676#define TXHRE 0x0040 /*TX Hold Register Empty */
1677
1678/*SPORTx_MCMC1 Masks */
1679#define WOFF 0x000003FF /*Multichannel Window Offset Field */
1680/* SPORTx_MCMC1 Macros */
1681#ifdef _MISRA_RULES
1682#define SET_WOFF(x) ((x) & 0x3FFu) /* Multichannel Window Offset Field */
1683/* Only use SET_WSIZE Macro With Logic OR While Setting Lower Order Bits */
1684#define SET_WSIZE(x) (((((x)>>0x3)-1u)&0xFu) << 0xC) /* Multichannel Window Size = (x/8)-1 */
1685#else
1686#define SET_WOFF(x) ((x) & 0x3FF) /* Multichannel Window Offset Field */
1687/* Only use SET_WSIZE Macro With Logic OR While Setting Lower Order Bits */
1688#define SET_WSIZE(x) (((((x)>>0x3)-1)&0xF) << 0xC) /* Multichannel Window Size = (x/8)-1 */
1689#endif /* _MISRA_RULES */
1690
1691
1692/*SPORTx_MCMC2 Masks */
1693#define MCCRM 0x0003 /*Multichannel Clock Recovery Mode */
1694#define REC_BYPASS 0x0000 /* Bypass Mode (No Clock Recovery) */
1695#define REC_2FROM4 0x0002 /* Recover 2 MHz Clock from 4 MHz Clock */
1696#define REC_8FROM16 0x0003 /* Recover 8 MHz Clock from 16 MHz Clock */
1697#define MCDTXPE 0x0004 /*Multichannel DMA Transmit Packing */
1698#define MCDRXPE 0x0008 /*Multichannel DMA Receive Packing */
1699#define MCMEN 0x0010 /*Multichannel Frame Mode Enable */
1700#define FSDR 0x0080 /*Multichannel Frame Sync to Data Relationship */
1701#define MFD 0xF000 /*Multichannel Frame Delay */
1702#define MFD_0 0x0000 /* Multichannel Frame Delay = 0 */
1703#define MFD_1 0x1000 /* Multichannel Frame Delay = 1 */
1704#define MFD_2 0x2000 /* Multichannel Frame Delay = 2 */
1705#define MFD_3 0x3000 /* Multichannel Frame Delay = 3 */
1706#define MFD_4 0x4000 /* Multichannel Frame Delay = 4 */
1707#define MFD_5 0x5000 /* Multichannel Frame Delay = 5 */
1708#define MFD_6 0x6000 /* Multichannel Frame Delay = 6 */
1709#define MFD_7 0x7000 /* Multichannel Frame Delay = 7 */
1710#define MFD_8 0x8000 /* Multichannel Frame Delay = 8 */
1711#define MFD_9 0x9000 /* Multichannel Frame Delay = 9 */
1712#define MFD_10 0xA000 /* Multichannel Frame Delay = 10 */
1713#define MFD_11 0xB000 /* Multichannel Frame Delay = 11 */
1714#define MFD_12 0xC000 /* Multichannel Frame Delay = 12 */
1715#define MFD_13 0xD000 /* Multichannel Frame Delay = 13 */
1716#define MFD_14 0xE000 /* Multichannel Frame Delay = 14 */
1717#define MFD_15 0xF000 /* Multichannel Frame Delay = 15 */
1718
1719
1720/* ********* PARALLEL PERIPHERAL INTERFACE (PPI) MASKS **************** */ 1613/* ********* PARALLEL PERIPHERAL INTERFACE (PPI) MASKS **************** */
1721/* PPI_CONTROL Masks */ 1614/* PPI_CONTROL Masks */
1722#define PORT_EN 0x0001 /* PPI Port Enable */ 1615#define PORT_EN 0x0001 /* PPI Port Enable */
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index dbb6b1d83f6d..0c38eec9ade1 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -706,7 +706,6 @@ static struct mtd_partition partition_info[] = {
706}; 706};
707 707
708static struct bf5xx_nand_platform bf5xx_nand_platform = { 708static struct bf5xx_nand_platform bf5xx_nand_platform = {
709 .page_size = NFC_PG_SIZE_256,
710 .data_width = NFC_NWIDTH_8, 709 .data_width = NFC_NWIDTH_8,
711 .partitions = partition_info, 710 .partitions = partition_info,
712 .nr_partitions = ARRAY_SIZE(partition_info), 711 .nr_partitions = ARRAY_SIZE(partition_info),
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 6fcfb9187c35..56682a36e42d 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -849,7 +849,6 @@ static struct mtd_partition partition_info[] = {
849}; 849};
850 850
851static struct bf5xx_nand_platform bf5xx_nand_platform = { 851static struct bf5xx_nand_platform bf5xx_nand_platform = {
852 .page_size = NFC_PG_SIZE_256,
853 .data_width = NFC_NWIDTH_8, 852 .data_width = NFC_NWIDTH_8,
854 .partitions = partition_info, 853 .partitions = partition_info,
855 .nr_partitions = ARRAY_SIZE(partition_info), 854 .nr_partitions = ARRAY_SIZE(partition_info),
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
index 95ff44601fd1..7866197f5485 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
@@ -2221,73 +2221,6 @@
2221 2221
2222#define RCVDATA16 0xffff /* Receive FIFO 16-Bit Data */ 2222#define RCVDATA16 0xffff /* Receive FIFO 16-Bit Data */
2223 2223
2224/* Bit masks for SPORTx_TCR1 */
2225
2226#define TCKFE 0x4000 /* Clock Falling Edge Select */
2227#define LATFS 0x2000 /* Late Transmit Frame Sync */
2228#define LTFS 0x1000 /* Low Transmit Frame Sync Select */
2229#define DITFS 0x800 /* Data-Independent Transmit Frame Sync Select */
2230#define TFSR 0x400 /* Transmit Frame Sync Required Select */
2231#define ITFS 0x200 /* Internal Transmit Frame Sync Select */
2232#define TLSBIT 0x10 /* Transmit Bit Order */
2233#define TDTYPE 0xc /* Data Formatting Type Select */
2234#define ITCLK 0x2 /* Internal Transmit Clock Select */
2235#define TSPEN 0x1 /* Transmit Enable */
2236
2237/* Bit masks for SPORTx_TCR2 */
2238
2239#define TRFST 0x400 /* Left/Right Order */
2240#define TSFSE 0x200 /* Transmit Stereo Frame Sync Enable */
2241#define TXSE 0x100 /* TxSEC Enable */
2242#define SLEN_T 0x1f /* SPORT Word Length */
2243
2244/* Bit masks for SPORTx_RCR1 */
2245
2246#define RCKFE 0x4000 /* Clock Falling Edge Select */
2247#define LARFS 0x2000 /* Late Receive Frame Sync */
2248#define LRFS 0x1000 /* Low Receive Frame Sync Select */
2249#define RFSR 0x400 /* Receive Frame Sync Required Select */
2250#define IRFS 0x200 /* Internal Receive Frame Sync Select */
2251#define RLSBIT 0x10 /* Receive Bit Order */
2252#define RDTYPE 0xc /* Data Formatting Type Select */
2253#define IRCLK 0x2 /* Internal Receive Clock Select */
2254#define RSPEN 0x1 /* Receive Enable */
2255
2256/* Bit masks for SPORTx_RCR2 */
2257
2258#define RRFST 0x400 /* Left/Right Order */
2259#define RSFSE 0x200 /* Receive Stereo Frame Sync Enable */
2260#define RXSE 0x100 /* RxSEC Enable */
2261#define SLEN_R 0x1f /* SPORT Word Length */
2262
2263/* Bit masks for SPORTx_STAT */
2264
2265#define TXHRE 0x40 /* Transmit Hold Register Empty */
2266#define TOVF 0x20 /* Sticky Transmit Overflow Status */
2267#define TUVF 0x10 /* Sticky Transmit Underflow Status */
2268#define TXF 0x8 /* Transmit FIFO Full Status */
2269#define ROVF 0x4 /* Sticky Receive Overflow Status */
2270#define RUVF 0x2 /* Sticky Receive Underflow Status */
2271#define RXNE 0x1 /* Receive FIFO Not Empty Status */
2272
2273/* Bit masks for SPORTx_MCMC1 */
2274
2275#define SP_WSIZE 0xf000 /* Window Size */
2276#define SP_WOFF 0x3ff /* Windows Offset */
2277
2278/* Bit masks for SPORTx_MCMC2 */
2279
2280#define MFD 0xf000 /* Multi channel Frame Delay */
2281#define FSDR 0x80 /* Frame Sync to Data Relationship */
2282#define MCMEN 0x10 /* Multi channel Frame Mode Enable */
2283#define MCDRXPE 0x8 /* Multi channel DMA Receive Packing */
2284#define MCDTXPE 0x4 /* Multi channel DMA Transmit Packing */
2285#define MCCRM 0x3 /* 2X Clock Recovery Mode */
2286
2287/* Bit masks for SPORTx_CHNL */
2288
2289#define CUR_CHNL 0x3ff /* Current Channel Indicator */
2290
2291/* Bit masks for UARTx_LCR */ 2224/* Bit masks for UARTx_LCR */
2292 2225
2293#if 0 2226#if 0
diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h
index 4c8e36b7fb33..2674f0097576 100644
--- a/arch/blackfin/mach-bf561/include/mach/defBF561.h
+++ b/arch/blackfin/mach-bf561/include/mach/defBF561.h
@@ -1007,66 +1007,6 @@
1007#define IREN_P 0x01 1007#define IREN_P 0x01
1008#define UCEN_P 0x00 1008#define UCEN_P 0x00
1009 1009
1010/* ********** SERIAL PORT MASKS ********************** */
1011
1012/* SPORTx_TCR1 Masks */
1013#define TSPEN 0x0001 /* TX enable */
1014#define ITCLK 0x0002 /* Internal TX Clock Select */
1015#define TDTYPE 0x000C /* TX Data Formatting Select */
1016#define TLSBIT 0x0010 /* TX Bit Order */
1017#define ITFS 0x0200 /* Internal TX Frame Sync Select */
1018#define TFSR 0x0400 /* TX Frame Sync Required Select */
1019#define DITFS 0x0800 /* Data Independent TX Frame Sync Select */
1020#define LTFS 0x1000 /* Low TX Frame Sync Select */
1021#define LATFS 0x2000 /* Late TX Frame Sync Select */
1022#define TCKFE 0x4000 /* TX Clock Falling Edge Select */
1023
1024/* SPORTx_TCR2 Masks */
1025#define SLEN 0x001F /*TX Word Length */
1026#define TXSE 0x0100 /*TX Secondary Enable */
1027#define TSFSE 0x0200 /*TX Stereo Frame Sync Enable */
1028#define TRFST 0x0400 /*TX Right-First Data Order */
1029
1030/* SPORTx_RCR1 Masks */
1031#define RSPEN 0x0001 /* RX enable */
1032#define IRCLK 0x0002 /* Internal RX Clock Select */
1033#define RDTYPE 0x000C /* RX Data Formatting Select */
1034#define RULAW 0x0008 /* u-Law enable */
1035#define RALAW 0x000C /* A-Law enable */
1036#define RLSBIT 0x0010 /* RX Bit Order */
1037#define IRFS 0x0200 /* Internal RX Frame Sync Select */
1038#define RFSR 0x0400 /* RX Frame Sync Required Select */
1039#define LRFS 0x1000 /* Low RX Frame Sync Select */
1040#define LARFS 0x2000 /* Late RX Frame Sync Select */
1041#define RCKFE 0x4000 /* RX Clock Falling Edge Select */
1042
1043/* SPORTx_RCR2 Masks */
1044#define SLEN 0x001F /*RX Word Length */
1045#define RXSE 0x0100 /*RX Secondary Enable */
1046#define RSFSE 0x0200 /*RX Stereo Frame Sync Enable */
1047#define RRFST 0x0400 /*Right-First Data Order */
1048
1049/*SPORTx_STAT Masks */
1050#define RXNE 0x0001 /*RX FIFO Not Empty Status */
1051#define RUVF 0x0002 /*RX Underflow Status */
1052#define ROVF 0x0004 /*RX Overflow Status */
1053#define TXF 0x0008 /*TX FIFO Full Status */
1054#define TUVF 0x0010 /*TX Underflow Status */
1055#define TOVF 0x0020 /*TX Overflow Status */
1056#define TXHRE 0x0040 /*TX Hold Register Empty */
1057
1058/*SPORTx_MCMC1 Masks */
1059#define SP_WSIZE 0x0000F000 /*Multichannel Window Size Field */
1060#define SP_WOFF 0x000003FF /*Multichannel Window Offset Field */
1061
1062/*SPORTx_MCMC2 Masks */
1063#define MCCRM 0x00000003 /*Multichannel Clock Recovery Mode */
1064#define MCDTXPE 0x00000004 /*Multichannel DMA Transmit Packing */
1065#define MCDRXPE 0x00000008 /*Multichannel DMA Receive Packing */
1066#define MCMEN 0x00000010 /*Multichannel Frame Mode Enable */
1067#define FSDR 0x00000080 /*Multichannel Frame Sync to Data Relationship */
1068#define MFD 0x0000F000 /*Multichannel Frame Delay */
1069
1070/* ********* PARALLEL PERIPHERAL INTERFACE (PPI) MASKS **************** */ 1010/* ********* PARALLEL PERIPHERAL INTERFACE (PPI) MASKS **************** */
1071 1011
1072/* PPI_CONTROL Masks */ 1012/* PPI_CONTROL Masks */
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index a5847f5d67c7..af1bffa21dc1 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -1628,6 +1628,9 @@ ENTRY(_sys_call_table)
1628 .long _sys_rt_tgsigqueueinfo 1628 .long _sys_rt_tgsigqueueinfo
1629 .long _sys_perf_event_open 1629 .long _sys_perf_event_open
1630 .long _sys_recvmmsg /* 370 */ 1630 .long _sys_recvmmsg /* 370 */
1631 .long _sys_fanotify_init
1632 .long _sys_fanotify_mark
1633 .long _sys_prlimit64
1631 1634
1632 .rept NR_syscalls-(.-_sys_call_table)/4 1635 .rept NR_syscalls-(.-_sys_call_table)/4
1633 .long _sys_ni_syscall 1636 .long _sys_ni_syscall
diff --git a/arch/h8300/include/asm/atomic.h b/arch/h8300/include/asm/atomic.h
index e936804b7508..984221abb66d 100644
--- a/arch/h8300/include/asm/atomic.h
+++ b/arch/h8300/include/asm/atomic.h
@@ -18,7 +18,8 @@
18 18
19static __inline__ int atomic_add_return(int i, atomic_t *v) 19static __inline__ int atomic_add_return(int i, atomic_t *v)
20{ 20{
21 int ret,flags; 21 unsigned long flags;
22 int ret;
22 local_irq_save(flags); 23 local_irq_save(flags);
23 ret = v->counter += i; 24 ret = v->counter += i;
24 local_irq_restore(flags); 25 local_irq_restore(flags);
@@ -30,7 +31,8 @@ static __inline__ int atomic_add_return(int i, atomic_t *v)
30 31
31static __inline__ int atomic_sub_return(int i, atomic_t *v) 32static __inline__ int atomic_sub_return(int i, atomic_t *v)
32{ 33{
33 int ret,flags; 34 unsigned long flags;
35 int ret;
34 local_irq_save(flags); 36 local_irq_save(flags);
35 ret = v->counter -= i; 37 ret = v->counter -= i;
36 local_irq_restore(flags); 38 local_irq_restore(flags);
@@ -42,7 +44,8 @@ static __inline__ int atomic_sub_return(int i, atomic_t *v)
42 44
43static __inline__ int atomic_inc_return(atomic_t *v) 45static __inline__ int atomic_inc_return(atomic_t *v)
44{ 46{
45 int ret,flags; 47 unsigned long flags;
48 int ret;
46 local_irq_save(flags); 49 local_irq_save(flags);
47 v->counter++; 50 v->counter++;
48 ret = v->counter; 51 ret = v->counter;
@@ -64,7 +67,8 @@ static __inline__ int atomic_inc_return(atomic_t *v)
64 67
65static __inline__ int atomic_dec_return(atomic_t *v) 68static __inline__ int atomic_dec_return(atomic_t *v)
66{ 69{
67 int ret,flags; 70 unsigned long flags;
71 int ret;
68 local_irq_save(flags); 72 local_irq_save(flags);
69 --v->counter; 73 --v->counter;
70 ret = v->counter; 74 ret = v->counter;
@@ -76,7 +80,8 @@ static __inline__ int atomic_dec_return(atomic_t *v)
76 80
77static __inline__ int atomic_dec_and_test(atomic_t *v) 81static __inline__ int atomic_dec_and_test(atomic_t *v)
78{ 82{
79 int ret,flags; 83 unsigned long flags;
84 int ret;
80 local_irq_save(flags); 85 local_irq_save(flags);
81 --v->counter; 86 --v->counter;
82 ret = v->counter; 87 ret = v->counter;
diff --git a/arch/h8300/include/asm/system.h b/arch/h8300/include/asm/system.h
index d98d97685f06..16bf1560ff68 100644
--- a/arch/h8300/include/asm/system.h
+++ b/arch/h8300/include/asm/system.h
@@ -3,6 +3,8 @@
3 3
4#include <linux/linkage.h> 4#include <linux/linkage.h>
5 5
6struct pt_regs;
7
6/* 8/*
7 * switch_to(n) should switch tasks to task ptr, first checking that 9 * switch_to(n) should switch tasks to task ptr, first checking that
8 * ptr isn't the current task, in which case it does nothing. This 10 * ptr isn't the current task, in which case it does nothing. This
@@ -155,6 +157,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
155 157
156#define arch_align_stack(x) (x) 158#define arch_align_stack(x) (x)
157 159
158void die(char *str, struct pt_regs *fp, unsigned long err); 160extern void die(const char *str, struct pt_regs *fp, unsigned long err);
159 161
160#endif /* _H8300_SYSTEM_H */ 162#endif /* _H8300_SYSTEM_H */
diff --git a/arch/h8300/kernel/sys_h8300.c b/arch/h8300/kernel/sys_h8300.c
index dc1ac0243b78..aaf5e5a48f93 100644
--- a/arch/h8300/kernel/sys_h8300.c
+++ b/arch/h8300/kernel/sys_h8300.c
@@ -56,8 +56,8 @@ int kernel_execve(const char *filename,
56 const char *const envp[]) 56 const char *const envp[])
57{ 57{
58 register long res __asm__("er0"); 58 register long res __asm__("er0");
59 register char *const *_c __asm__("er3") = envp; 59 register const char *const *_c __asm__("er3") = envp;
60 register char *const *_b __asm__("er2") = argv; 60 register const char *const *_b __asm__("er2") = argv;
61 register const char * _a __asm__("er1") = filename; 61 register const char * _a __asm__("er1") = filename;
62 __asm__ __volatile__ ("mov.l %1,er0\n\t" 62 __asm__ __volatile__ ("mov.l %1,er0\n\t"
63 "trapa #0\n\t" 63 "trapa #0\n\t"
diff --git a/arch/h8300/kernel/traps.c b/arch/h8300/kernel/traps.c
index 3c0b66bc669e..dfa05bd908b6 100644
--- a/arch/h8300/kernel/traps.c
+++ b/arch/h8300/kernel/traps.c
@@ -96,7 +96,7 @@ static void dump(struct pt_regs *fp)
96 printk("\n\n"); 96 printk("\n\n");
97} 97}
98 98
99void die(char *str, struct pt_regs *fp, unsigned long err) 99void die(const char *str, struct pt_regs *fp, unsigned long err)
100{ 100{
101 static int diecount; 101 static int diecount;
102 102
diff --git a/arch/ia64/hp/sim/simserial.c b/arch/ia64/hp/sim/simserial.c
index 2bef5261d96d..1e8d71ad93ef 100644
--- a/arch/ia64/hp/sim/simserial.c
+++ b/arch/ia64/hp/sim/simserial.c
@@ -149,7 +149,7 @@ static void receive_chars(struct tty_struct *tty)
149 ch = ia64_ssc(0, 0, 0, 0, 149 ch = ia64_ssc(0, 0, 0, 0,
150 SSC_GETCHAR); 150 SSC_GETCHAR);
151 while (!ch); 151 while (!ch);
152 handle_sysrq(ch, NULL); 152 handle_sysrq(ch);
153 } 153 }
154#endif 154#endif
155 seen_esc = 0; 155 seen_esc = 0;
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S
index a91b2713451d..ef332136f96d 100644
--- a/arch/m68knommu/kernel/vmlinux.lds.S
+++ b/arch/m68knommu/kernel/vmlinux.lds.S
@@ -150,6 +150,8 @@ SECTIONS {
150 _sdata = . ; 150 _sdata = . ;
151 DATA_DATA 151 DATA_DATA
152 CACHELINE_ALIGNED_DATA(32) 152 CACHELINE_ALIGNED_DATA(32)
153 PAGE_ALIGNED_DATA(PAGE_SIZE)
154 *(.data..shared_aligned)
153 INIT_TASK_DATA(THREAD_SIZE) 155 INIT_TASK_DATA(THREAD_SIZE)
154 _edata = . ; 156 _edata = . ;
155 } > DATA 157 } > DATA
diff --git a/arch/mn10300/mm/dma-alloc.c b/arch/mn10300/mm/dma-alloc.c
index 4e34880bea03..159acb02cfd4 100644
--- a/arch/mn10300/mm/dma-alloc.c
+++ b/arch/mn10300/mm/dma-alloc.c
@@ -25,7 +25,8 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
25 unsigned long addr; 25 unsigned long addr;
26 void *ret; 26 void *ret;
27 27
28 printk("dma_alloc_coherent(%s,%zu,,%x)\n", dev_name(dev), size, gfp); 28 pr_debug("dma_alloc_coherent(%s,%zu,%x)\n",
29 dev ? dev_name(dev) : "?", size, gfp);
29 30
30 if (0xbe000000 - pci_sram_allocated >= size) { 31 if (0xbe000000 - pci_sram_allocated >= size) {
31 size = (size + 255) & ~255; 32 size = (size + 255) & ~255;
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index e3ea151c9597..b7212b619c52 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -164,7 +164,7 @@ drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/
164all: zImage 164all: zImage
165 165
166# With make 3.82 we cannot mix normal and wildcard targets 166# With make 3.82 we cannot mix normal and wildcard targets
167BOOT_TARGETS1 := zImage zImage.initrd uImaged 167BOOT_TARGETS1 := zImage zImage.initrd uImage
168BOOT_TARGETS2 := zImage% dtbImage% treeImage.% cuImage.% simpleImage.% 168BOOT_TARGETS2 := zImage% dtbImage% treeImage.% cuImage.% simpleImage.%
169 169
170PHONY += $(BOOT_TARGETS1) $(BOOT_TARGETS2) 170PHONY += $(BOOT_TARGETS1) $(BOOT_TARGETS2)
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index 5806ef0b860b..a30370396250 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -163,6 +163,14 @@
163 interrupts = <0x1e 4>; 163 interrupts = <0x1e 4>;
164 }; 164 };
165 165
166 SATA0: sata@bffd1000 {
167 compatible = "amcc,sata-460ex";
168 reg = <4 0xbffd1000 0x800 4 0xbffd0800 0x400>;
169 interrupt-parent = <&UIC3>;
170 interrupts = <0x0 0x4 /* SATA */
171 0x5 0x4>; /* AHBDMA */
172 };
173
166 POB0: opb { 174 POB0: opb {
167 compatible = "ibm,opb-460ex", "ibm,opb"; 175 compatible = "ibm,opb-460ex", "ibm,opb";
168 #address-cells = <1>; 176 #address-cells = <1>;
diff --git a/arch/powerpc/include/asm/fsldma.h b/arch/powerpc/include/asm/fsldma.h
index a67aeed17d40..debc5ed96d6e 100644
--- a/arch/powerpc/include/asm/fsldma.h
+++ b/arch/powerpc/include/asm/fsldma.h
@@ -11,6 +11,7 @@
11#ifndef __ARCH_POWERPC_ASM_FSLDMA_H__ 11#ifndef __ARCH_POWERPC_ASM_FSLDMA_H__
12#define __ARCH_POWERPC_ASM_FSLDMA_H__ 12#define __ARCH_POWERPC_ASM_FSLDMA_H__
13 13
14#include <linux/slab.h>
14#include <linux/dmaengine.h> 15#include <linux/dmaengine.h>
15 16
16/* 17/*
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index 0e398cfee2c8..acac35d5b382 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -433,7 +433,7 @@ typedef struct {
433 * with. However gcc is not clever enough to compute the 433 * with. However gcc is not clever enough to compute the
434 * modulus (2^n-1) without a second multiply. 434 * modulus (2^n-1) without a second multiply.
435 */ 435 */
436#define vsid_scrample(protovsid, size) \ 436#define vsid_scramble(protovsid, size) \
437 ((((protovsid) * VSID_MULTIPLIER_##size) % VSID_MODULUS_##size)) 437 ((((protovsid) * VSID_MULTIPLIER_##size) % VSID_MODULUS_##size))
438 438
439#else /* 1 */ 439#else /* 1 */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index d8be016d2ede..ff0005eec7dd 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -951,7 +951,14 @@
951#ifdef CONFIG_PPC64 951#ifdef CONFIG_PPC64
952 952
953extern void ppc64_runlatch_on(void); 953extern void ppc64_runlatch_on(void);
954extern void ppc64_runlatch_off(void); 954extern void __ppc64_runlatch_off(void);
955
956#define ppc64_runlatch_off() \
957 do { \
958 if (cpu_has_feature(CPU_FTR_CTRL) && \
959 test_thread_flag(TIF_RUNLATCH)) \
960 __ppc64_runlatch_off(); \
961 } while (0)
955 962
956extern unsigned long scom970_read(unsigned int address); 963extern unsigned long scom970_read(unsigned int address);
957extern void scom970_write(unsigned int address, unsigned long value); 964extern void scom970_write(unsigned int address, unsigned long value);
diff --git a/arch/powerpc/include/asm/rwsem.h b/arch/powerpc/include/asm/rwsem.h
index 24cd9281ec37..8447d89fbe72 100644
--- a/arch/powerpc/include/asm/rwsem.h
+++ b/arch/powerpc/include/asm/rwsem.h
@@ -21,15 +21,20 @@
21/* 21/*
22 * the semaphore definition 22 * the semaphore definition
23 */ 23 */
24struct rw_semaphore { 24#ifdef CONFIG_PPC64
25 /* XXX this should be able to be an atomic_t -- paulus */ 25# define RWSEM_ACTIVE_MASK 0xffffffffL
26 signed int count; 26#else
27#define RWSEM_UNLOCKED_VALUE 0x00000000 27# define RWSEM_ACTIVE_MASK 0x0000ffffL
28#define RWSEM_ACTIVE_BIAS 0x00000001 28#endif
29#define RWSEM_ACTIVE_MASK 0x0000ffff 29
30#define RWSEM_WAITING_BIAS (-0x00010000) 30#define RWSEM_UNLOCKED_VALUE 0x00000000L
31#define RWSEM_ACTIVE_BIAS 0x00000001L
32#define RWSEM_WAITING_BIAS (-RWSEM_ACTIVE_MASK-1)
31#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS 33#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
32#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) 34#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
35
36struct rw_semaphore {
37 long count;
33 spinlock_t wait_lock; 38 spinlock_t wait_lock;
34 struct list_head wait_list; 39 struct list_head wait_list;
35#ifdef CONFIG_DEBUG_LOCK_ALLOC 40#ifdef CONFIG_DEBUG_LOCK_ALLOC
@@ -43,9 +48,13 @@ struct rw_semaphore {
43# define __RWSEM_DEP_MAP_INIT(lockname) 48# define __RWSEM_DEP_MAP_INIT(lockname)
44#endif 49#endif
45 50
46#define __RWSEM_INITIALIZER(name) \ 51#define __RWSEM_INITIALIZER(name) \
47 { RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \ 52{ \
48 LIST_HEAD_INIT((name).wait_list) __RWSEM_DEP_MAP_INIT(name) } 53 RWSEM_UNLOCKED_VALUE, \
54 __SPIN_LOCK_UNLOCKED((name).wait_lock), \
55 LIST_HEAD_INIT((name).wait_list) \
56 __RWSEM_DEP_MAP_INIT(name) \
57}
49 58
50#define DECLARE_RWSEM(name) \ 59#define DECLARE_RWSEM(name) \
51 struct rw_semaphore name = __RWSEM_INITIALIZER(name) 60 struct rw_semaphore name = __RWSEM_INITIALIZER(name)
@@ -70,13 +79,13 @@ extern void __init_rwsem(struct rw_semaphore *sem, const char *name,
70 */ 79 */
71static inline void __down_read(struct rw_semaphore *sem) 80static inline void __down_read(struct rw_semaphore *sem)
72{ 81{
73 if (unlikely(atomic_inc_return((atomic_t *)(&sem->count)) <= 0)) 82 if (unlikely(atomic_long_inc_return((atomic_long_t *)&sem->count) <= 0))
74 rwsem_down_read_failed(sem); 83 rwsem_down_read_failed(sem);
75} 84}
76 85
77static inline int __down_read_trylock(struct rw_semaphore *sem) 86static inline int __down_read_trylock(struct rw_semaphore *sem)
78{ 87{
79 int tmp; 88 long tmp;
80 89
81 while ((tmp = sem->count) >= 0) { 90 while ((tmp = sem->count) >= 0) {
82 if (tmp == cmpxchg(&sem->count, tmp, 91 if (tmp == cmpxchg(&sem->count, tmp,
@@ -92,10 +101,10 @@ static inline int __down_read_trylock(struct rw_semaphore *sem)
92 */ 101 */
93static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) 102static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
94{ 103{
95 int tmp; 104 long tmp;
96 105
97 tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS, 106 tmp = atomic_long_add_return(RWSEM_ACTIVE_WRITE_BIAS,
98 (atomic_t *)(&sem->count)); 107 (atomic_long_t *)&sem->count);
99 if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS)) 108 if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS))
100 rwsem_down_write_failed(sem); 109 rwsem_down_write_failed(sem);
101} 110}
@@ -107,7 +116,7 @@ static inline void __down_write(struct rw_semaphore *sem)
107 116
108static inline int __down_write_trylock(struct rw_semaphore *sem) 117static inline int __down_write_trylock(struct rw_semaphore *sem)
109{ 118{
110 int tmp; 119 long tmp;
111 120
112 tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE, 121 tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
113 RWSEM_ACTIVE_WRITE_BIAS); 122 RWSEM_ACTIVE_WRITE_BIAS);
@@ -119,9 +128,9 @@ static inline int __down_write_trylock(struct rw_semaphore *sem)
119 */ 128 */
120static inline void __up_read(struct rw_semaphore *sem) 129static inline void __up_read(struct rw_semaphore *sem)
121{ 130{
122 int tmp; 131 long tmp;
123 132
124 tmp = atomic_dec_return((atomic_t *)(&sem->count)); 133 tmp = atomic_long_dec_return((atomic_long_t *)&sem->count);
125 if (unlikely(tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0)) 134 if (unlikely(tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0))
126 rwsem_wake(sem); 135 rwsem_wake(sem);
127} 136}
@@ -131,17 +140,17 @@ static inline void __up_read(struct rw_semaphore *sem)
131 */ 140 */
132static inline void __up_write(struct rw_semaphore *sem) 141static inline void __up_write(struct rw_semaphore *sem)
133{ 142{
134 if (unlikely(atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS, 143 if (unlikely(atomic_long_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
135 (atomic_t *)(&sem->count)) < 0)) 144 (atomic_long_t *)&sem->count) < 0))
136 rwsem_wake(sem); 145 rwsem_wake(sem);
137} 146}
138 147
139/* 148/*
140 * implement atomic add functionality 149 * implement atomic add functionality
141 */ 150 */
142static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) 151static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
143{ 152{
144 atomic_add(delta, (atomic_t *)(&sem->count)); 153 atomic_long_add(delta, (atomic_long_t *)&sem->count);
145} 154}
146 155
147/* 156/*
@@ -149,9 +158,10 @@ static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
149 */ 158 */
150static inline void __downgrade_write(struct rw_semaphore *sem) 159static inline void __downgrade_write(struct rw_semaphore *sem)
151{ 160{
152 int tmp; 161 long tmp;
153 162
154 tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count)); 163 tmp = atomic_long_add_return(-RWSEM_WAITING_BIAS,
164 (atomic_long_t *)&sem->count);
155 if (tmp < 0) 165 if (tmp < 0)
156 rwsem_downgrade_wake(sem); 166 rwsem_downgrade_wake(sem);
157} 167}
@@ -159,14 +169,14 @@ static inline void __downgrade_write(struct rw_semaphore *sem)
159/* 169/*
160 * implement exchange and add functionality 170 * implement exchange and add functionality
161 */ 171 */
162static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) 172static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
163{ 173{
164 return atomic_add_return(delta, (atomic_t *)(&sem->count)); 174 return atomic_long_add_return(delta, (atomic_long_t *)&sem->count);
165} 175}
166 176
167static inline int rwsem_is_locked(struct rw_semaphore *sem) 177static inline int rwsem_is_locked(struct rw_semaphore *sem)
168{ 178{
169 return (sem->count != 0); 179 return sem->count != 0;
170} 180}
171 181
172#endif /* __KERNEL__ */ 182#endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index a5ee345b6a5c..3d212669a130 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -326,3 +326,6 @@ SYSCALL_SPU(perf_event_open)
326COMPAT_SYS_SPU(preadv) 326COMPAT_SYS_SPU(preadv)
327COMPAT_SYS_SPU(pwritev) 327COMPAT_SYS_SPU(pwritev)
328COMPAT_SYS(rt_tgsigqueueinfo) 328COMPAT_SYS(rt_tgsigqueueinfo)
329SYSCALL(fanotify_init)
330COMPAT_SYS(fanotify_mark)
331SYSCALL_SPU(prlimit64)
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index f0a10266e7f7..597e6f9d094a 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -345,10 +345,13 @@
345#define __NR_preadv 320 345#define __NR_preadv 320
346#define __NR_pwritev 321 346#define __NR_pwritev 321
347#define __NR_rt_tgsigqueueinfo 322 347#define __NR_rt_tgsigqueueinfo 322
348#define __NR_fanotify_init 323
349#define __NR_fanotify_mark 324
350#define __NR_prlimit64 325
348 351
349#ifdef __KERNEL__ 352#ifdef __KERNEL__
350 353
351#define __NR_syscalls 323 354#define __NR_syscalls 326
352 355
353#define __NR__exit __NR_exit 356#define __NR__exit __NR_exit
354#define NR_syscalls __NR_syscalls 357#define NR_syscalls __NR_syscalls
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 65e2b4e10f97..1f9123f412ec 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1826,7 +1826,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
1826 .cpu_features = CPU_FTRS_47X, 1826 .cpu_features = CPU_FTRS_47X,
1827 .cpu_user_features = COMMON_USER_BOOKE | 1827 .cpu_user_features = COMMON_USER_BOOKE |
1828 PPC_FEATURE_HAS_FPU, 1828 PPC_FEATURE_HAS_FPU,
1829 .cpu_user_features = COMMON_USER_BOOKE,
1830 .mmu_features = MMU_FTR_TYPE_47x | 1829 .mmu_features = MMU_FTR_TYPE_47x |
1831 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1830 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1832 .icache_bsize = 32, 1831 .icache_bsize = 32,
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index 417f7b05a9ce..4457382f8667 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -402,6 +402,18 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
402 */ 402 */
403 hard_irq_disable(); 403 hard_irq_disable();
404 404
405 /*
406 * Make a note of crashing cpu. Will be used in machine_kexec
407 * such that another IPI will not be sent.
408 */
409 crashing_cpu = smp_processor_id();
410 crash_save_cpu(regs, crashing_cpu);
411 crash_kexec_prepare_cpus(crashing_cpu);
412 cpu_set(crashing_cpu, cpus_in_crash);
413#if defined(CONFIG_PPC_STD_MMU_64) && defined(CONFIG_SMP)
414 crash_kexec_wait_realmode(crashing_cpu);
415#endif
416
405 for_each_irq(i) { 417 for_each_irq(i) {
406 struct irq_desc *desc = irq_to_desc(i); 418 struct irq_desc *desc = irq_to_desc(i);
407 419
@@ -438,18 +450,8 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
438 crash_shutdown_cpu = -1; 450 crash_shutdown_cpu = -1;
439 __debugger_fault_handler = old_handler; 451 __debugger_fault_handler = old_handler;
440 452
441 /*
442 * Make a note of crashing cpu. Will be used in machine_kexec
443 * such that another IPI will not be sent.
444 */
445 crashing_cpu = smp_processor_id();
446 crash_save_cpu(regs, crashing_cpu);
447 crash_kexec_prepare_cpus(crashing_cpu);
448 cpu_set(crashing_cpu, cpus_in_crash);
449 crash_kexec_stop_spus(); 453 crash_kexec_stop_spus();
450#if defined(CONFIG_PPC_STD_MMU_64) && defined(CONFIG_SMP) 454
451 crash_kexec_wait_realmode(crashing_cpu);
452#endif
453 if (ppc_md.kexec_cpu_down) 455 if (ppc_md.kexec_cpu_down)
454 ppc_md.kexec_cpu_down(1, 0); 456 ppc_md.kexec_cpu_down(1, 0);
455} 457}
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index 5ab484ef06a7..562305b40a8e 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -113,6 +113,10 @@ _ENTRY(_start);
113 stw r5, 0(r4) /* Save abatron_pteptrs at a fixed location */ 113 stw r5, 0(r4) /* Save abatron_pteptrs at a fixed location */
114 stw r6, 0(r5) 114 stw r6, 0(r5)
115 115
116 /* Clear the Machine Check Syndrome Register */
117 li r0,0
118 mtspr SPRN_MCSR,r0
119
116 /* Let's move on */ 120 /* Let's move on */
117 lis r4,start_kernel@h 121 lis r4,start_kernel@h
118 ori r4,r4,start_kernel@l 122 ori r4,r4,start_kernel@l
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 844a44b64472..c571cd3c1453 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -572,15 +572,21 @@ __secondary_start:
572 /* Set thread priority to MEDIUM */ 572 /* Set thread priority to MEDIUM */
573 HMT_MEDIUM 573 HMT_MEDIUM
574 574
575 /* Do early setup for that CPU (stab, slb, hash table pointer) */
576 bl .early_setup_secondary
577
578 /* Initialize the kernel stack. Just a repeat for iSeries. */ 575 /* Initialize the kernel stack. Just a repeat for iSeries. */
579 LOAD_REG_ADDR(r3, current_set) 576 LOAD_REG_ADDR(r3, current_set)
580 sldi r28,r24,3 /* get current_set[cpu#] */ 577 sldi r28,r24,3 /* get current_set[cpu#] */
581 ldx r1,r3,r28 578 ldx r14,r3,r28
582 addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD 579 addi r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
583 std r1,PACAKSAVE(r13) 580 std r14,PACAKSAVE(r13)
581
582 /* Do early setup for that CPU (stab, slb, hash table pointer) */
583 bl .early_setup_secondary
584
585 /*
586 * setup the new stack pointer, but *don't* use this until
587 * translation is on.
588 */
589 mr r1, r14
584 590
585 /* Clear backchain so we get nice backtraces */ 591 /* Clear backchain so we get nice backtraces */
586 li r7,0 592 li r7,0
diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
index 049dda60e475..39a2baa6ad58 100644
--- a/arch/powerpc/kernel/idle.c
+++ b/arch/powerpc/kernel/idle.c
@@ -94,9 +94,9 @@ void cpu_idle(void)
94 HMT_medium(); 94 HMT_medium();
95 ppc64_runlatch_on(); 95 ppc64_runlatch_on();
96 tick_nohz_restart_sched_tick(); 96 tick_nohz_restart_sched_tick();
97 preempt_enable_no_resched();
97 if (cpu_should_die()) 98 if (cpu_should_die())
98 cpu_die(); 99 cpu_die();
99 preempt_enable_no_resched();
100 schedule(); 100 schedule();
101 preempt_disable(); 101 preempt_disable();
102 } 102 }
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index d3ce67cf03be..4a65386995d7 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -67,6 +67,7 @@
67#include <asm/machdep.h> 67#include <asm/machdep.h>
68#include <asm/udbg.h> 68#include <asm/udbg.h>
69#include <asm/dbell.h> 69#include <asm/dbell.h>
70#include <asm/smp.h>
70 71
71#ifdef CONFIG_PPC64 72#ifdef CONFIG_PPC64
72#include <asm/paca.h> 73#include <asm/paca.h>
@@ -446,22 +447,23 @@ struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly;
446void exc_lvl_ctx_init(void) 447void exc_lvl_ctx_init(void)
447{ 448{
448 struct thread_info *tp; 449 struct thread_info *tp;
449 int i; 450 int i, hw_cpu;
450 451
451 for_each_possible_cpu(i) { 452 for_each_possible_cpu(i) {
452 memset((void *)critirq_ctx[i], 0, THREAD_SIZE); 453 hw_cpu = get_hard_smp_processor_id(i);
453 tp = critirq_ctx[i]; 454 memset((void *)critirq_ctx[hw_cpu], 0, THREAD_SIZE);
455 tp = critirq_ctx[hw_cpu];
454 tp->cpu = i; 456 tp->cpu = i;
455 tp->preempt_count = 0; 457 tp->preempt_count = 0;
456 458
457#ifdef CONFIG_BOOKE 459#ifdef CONFIG_BOOKE
458 memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); 460 memset((void *)dbgirq_ctx[hw_cpu], 0, THREAD_SIZE);
459 tp = dbgirq_ctx[i]; 461 tp = dbgirq_ctx[hw_cpu];
460 tp->cpu = i; 462 tp->cpu = i;
461 tp->preempt_count = 0; 463 tp->preempt_count = 0;
462 464
463 memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); 465 memset((void *)mcheckirq_ctx[hw_cpu], 0, THREAD_SIZE);
464 tp = mcheckirq_ctx[i]; 466 tp = mcheckirq_ctx[hw_cpu];
465 tp->cpu = i; 467 tp->cpu = i;
466 tp->preempt_count = HARDIRQ_OFFSET; 468 tp->preempt_count = HARDIRQ_OFFSET;
467#endif 469#endif
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 6bbd7a604d24..a7a570dcdd57 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -810,6 +810,9 @@ relocate_new_kernel:
810 isync 810 isync
811 sync 811 sync
812 812
813 mfspr r3, SPRN_PIR /* current core we are running on */
814 mr r4, r5 /* load physical address of chunk called */
815
813 /* jump to the entry point, usually the setup routine */ 816 /* jump to the entry point, usually the setup routine */
814 mtlr r5 817 mtlr r5
815 blrl 818 blrl
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index 6ddb795f83e8..e751506323b4 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -336,7 +336,7 @@ static void __devinit __of_scan_bus(struct device_node *node,
336 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || 336 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
337 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) { 337 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
338 struct device_node *child = pci_device_to_OF_node(dev); 338 struct device_node *child = pci_device_to_OF_node(dev);
339 if (dev) 339 if (child)
340 of_scan_pci_bridge(child, dev); 340 of_scan_pci_bridge(child, dev);
341 } 341 }
342 } 342 }
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 91356ffda2ca..b1c648a36b03 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -728,7 +728,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
728 p->thread.regs = childregs; 728 p->thread.regs = childregs;
729 if (clone_flags & CLONE_SETTLS) { 729 if (clone_flags & CLONE_SETTLS) {
730#ifdef CONFIG_PPC64 730#ifdef CONFIG_PPC64
731 if (!test_thread_flag(TIF_32BIT)) 731 if (!is_32bit_task())
732 childregs->gpr[13] = childregs->gpr[6]; 732 childregs->gpr[13] = childregs->gpr[6];
733 else 733 else
734#endif 734#endif
@@ -823,7 +823,7 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
823 regs->nip = start; 823 regs->nip = start;
824 regs->msr = MSR_USER; 824 regs->msr = MSR_USER;
825#else 825#else
826 if (!test_thread_flag(TIF_32BIT)) { 826 if (!is_32bit_task()) {
827 unsigned long entry, toc; 827 unsigned long entry, toc;
828 828
829 /* start is a relocated pointer to the function descriptor for 829 /* start is a relocated pointer to the function descriptor for
@@ -995,7 +995,7 @@ int sys_clone(unsigned long clone_flags, unsigned long usp,
995 if (usp == 0) 995 if (usp == 0)
996 usp = regs->gpr[1]; /* stack pointer for child */ 996 usp = regs->gpr[1]; /* stack pointer for child */
997#ifdef CONFIG_PPC64 997#ifdef CONFIG_PPC64
998 if (test_thread_flag(TIF_32BIT)) { 998 if (is_32bit_task()) {
999 parent_tidp = TRUNC_PTR(parent_tidp); 999 parent_tidp = TRUNC_PTR(parent_tidp);
1000 child_tidp = TRUNC_PTR(child_tidp); 1000 child_tidp = TRUNC_PTR(child_tidp);
1001 } 1001 }
@@ -1199,19 +1199,17 @@ void ppc64_runlatch_on(void)
1199 } 1199 }
1200} 1200}
1201 1201
1202void ppc64_runlatch_off(void) 1202void __ppc64_runlatch_off(void)
1203{ 1203{
1204 unsigned long ctrl; 1204 unsigned long ctrl;
1205 1205
1206 if (cpu_has_feature(CPU_FTR_CTRL) && test_thread_flag(TIF_RUNLATCH)) { 1206 HMT_medium();
1207 HMT_medium();
1208 1207
1209 clear_thread_flag(TIF_RUNLATCH); 1208 clear_thread_flag(TIF_RUNLATCH);
1210 1209
1211 ctrl = mfspr(SPRN_CTRLF); 1210 ctrl = mfspr(SPRN_CTRLF);
1212 ctrl &= ~CTRL_RUNLATCH; 1211 ctrl &= ~CTRL_RUNLATCH;
1213 mtspr(SPRN_CTRLT, ctrl); 1212 mtspr(SPRN_CTRLT, ctrl);
1214 }
1215} 1213}
1216#endif 1214#endif
1217 1215
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index a10ffc85ada7..93666f9cabf1 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -258,17 +258,18 @@ static void __init irqstack_early_init(void)
258#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) 258#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
259static void __init exc_lvl_early_init(void) 259static void __init exc_lvl_early_init(void)
260{ 260{
261 unsigned int i; 261 unsigned int i, hw_cpu;
262 262
263 /* interrupt stacks must be in lowmem, we get that for free on ppc32 263 /* interrupt stacks must be in lowmem, we get that for free on ppc32
264 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */ 264 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
265 for_each_possible_cpu(i) { 265 for_each_possible_cpu(i) {
266 critirq_ctx[i] = (struct thread_info *) 266 hw_cpu = get_hard_smp_processor_id(i);
267 critirq_ctx[hw_cpu] = (struct thread_info *)
267 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 268 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
268#ifdef CONFIG_BOOKE 269#ifdef CONFIG_BOOKE
269 dbgirq_ctx[i] = (struct thread_info *) 270 dbgirq_ctx[hw_cpu] = (struct thread_info *)
270 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 271 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
271 mcheckirq_ctx[i] = (struct thread_info *) 272 mcheckirq_ctx[hw_cpu] = (struct thread_info *)
272 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 273 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
273#endif 274#endif
274 } 275 }
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 1bee4b68fa45..e72690ec9b87 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -95,7 +95,7 @@ int ucache_bsize;
95 95
96#ifdef CONFIG_SMP 96#ifdef CONFIG_SMP
97 97
98static int smt_enabled_cmdline; 98static char *smt_enabled_cmdline;
99 99
100/* Look for ibm,smt-enabled OF option */ 100/* Look for ibm,smt-enabled OF option */
101static void check_smt_enabled(void) 101static void check_smt_enabled(void)
@@ -103,37 +103,46 @@ static void check_smt_enabled(void)
103 struct device_node *dn; 103 struct device_node *dn;
104 const char *smt_option; 104 const char *smt_option;
105 105
106 /* Allow the command line to overrule the OF option */ 106 /* Default to enabling all threads */
107 if (smt_enabled_cmdline) 107 smt_enabled_at_boot = threads_per_core;
108 return;
109
110 dn = of_find_node_by_path("/options");
111
112 if (dn) {
113 smt_option = of_get_property(dn, "ibm,smt-enabled", NULL);
114 108
115 if (smt_option) { 109 /* Allow the command line to overrule the OF option */
116 if (!strcmp(smt_option, "on")) 110 if (smt_enabled_cmdline) {
117 smt_enabled_at_boot = 1; 111 if (!strcmp(smt_enabled_cmdline, "on"))
118 else if (!strcmp(smt_option, "off")) 112 smt_enabled_at_boot = threads_per_core;
119 smt_enabled_at_boot = 0; 113 else if (!strcmp(smt_enabled_cmdline, "off"))
120 } 114 smt_enabled_at_boot = 0;
121 } 115 else {
116 long smt;
117 int rc;
118
119 rc = strict_strtol(smt_enabled_cmdline, 10, &smt);
120 if (!rc)
121 smt_enabled_at_boot =
122 min(threads_per_core, (int)smt);
123 }
124 } else {
125 dn = of_find_node_by_path("/options");
126 if (dn) {
127 smt_option = of_get_property(dn, "ibm,smt-enabled",
128 NULL);
129
130 if (smt_option) {
131 if (!strcmp(smt_option, "on"))
132 smt_enabled_at_boot = threads_per_core;
133 else if (!strcmp(smt_option, "off"))
134 smt_enabled_at_boot = 0;
135 }
136
137 of_node_put(dn);
138 }
139 }
122} 140}
123 141
124/* Look for smt-enabled= cmdline option */ 142/* Look for smt-enabled= cmdline option */
125static int __init early_smt_enabled(char *p) 143static int __init early_smt_enabled(char *p)
126{ 144{
127 smt_enabled_cmdline = 1; 145 smt_enabled_cmdline = p;
128
129 if (!p)
130 return 0;
131
132 if (!strcmp(p, "on") || !strcmp(p, "1"))
133 smt_enabled_at_boot = 1;
134 else if (!strcmp(p, "off") || !strcmp(p, "0"))
135 smt_enabled_at_boot = 0;
136
137 return 0; 146 return 0;
138} 147}
139early_param("smt-enabled", early_smt_enabled); 148early_param("smt-enabled", early_smt_enabled);
@@ -380,8 +389,8 @@ void __init setup_system(void)
380 */ 389 */
381 xmon_setup(); 390 xmon_setup();
382 391
383 check_smt_enabled();
384 smp_setup_cpu_maps(); 392 smp_setup_cpu_maps();
393 check_smt_enabled();
385 394
386#ifdef CONFIG_SMP 395#ifdef CONFIG_SMP
387 /* Release secondary cpus out of their spinloops at 0x60 now that 396 /* Release secondary cpus out of their spinloops at 0x60 now that
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index a61b3ddd7bb3..0008bc58e826 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -427,11 +427,11 @@ int __cpuinit __cpu_up(unsigned int cpu)
427#endif 427#endif
428 428
429 if (!cpu_callin_map[cpu]) { 429 if (!cpu_callin_map[cpu]) {
430 printk("Processor %u is stuck.\n", cpu); 430 printk(KERN_ERR "Processor %u is stuck.\n", cpu);
431 return -ENOENT; 431 return -ENOENT;
432 } 432 }
433 433
434 printk("Processor %u found.\n", cpu); 434 DBG("Processor %u found.\n", cpu);
435 435
436 if (smp_ops->give_timebase) 436 if (smp_ops->give_timebase)
437 smp_ops->give_timebase(); 437 smp_ops->give_timebase();
diff --git a/arch/powerpc/kernel/sys_ppc32.c b/arch/powerpc/kernel/sys_ppc32.c
index 20fd701a686a..b1b6043a56c4 100644
--- a/arch/powerpc/kernel/sys_ppc32.c
+++ b/arch/powerpc/kernel/sys_ppc32.c
@@ -616,3 +616,11 @@ asmlinkage long compat_sys_sync_file_range2(int fd, unsigned int flags,
616 616
617 return sys_sync_file_range(fd, offset, nbytes, flags); 617 return sys_sync_file_range(fd, offset, nbytes, flags);
618} 618}
619
620asmlinkage long compat_sys_fanotify_mark(int fanotify_fd, unsigned int flags,
621 unsigned mask_hi, unsigned mask_lo,
622 int dfd, const char __user *pathname)
623{
624 u64 mask = ((u64)mask_hi << 32) | mask_lo;
625 return sys_fanotify_mark(fanotify_fd, flags, mask, dfd, pathname);
626}
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index ce53dfa7130d..8533b3b83f5d 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -577,20 +577,11 @@ void timer_interrupt(struct pt_regs * regs)
577 * some CPUs will continuue to take decrementer exceptions */ 577 * some CPUs will continuue to take decrementer exceptions */
578 set_dec(DECREMENTER_MAX); 578 set_dec(DECREMENTER_MAX);
579 579
580#ifdef CONFIG_PPC32 580#if defined(CONFIG_PPC32) && defined(CONFIG_PMAC)
581 if (atomic_read(&ppc_n_lost_interrupts) != 0) 581 if (atomic_read(&ppc_n_lost_interrupts) != 0)
582 do_IRQ(regs); 582 do_IRQ(regs);
583#endif 583#endif
584 584
585 now = get_tb_or_rtc();
586 if (now < decrementer->next_tb) {
587 /* not time for this event yet */
588 now = decrementer->next_tb - now;
589 if (now <= DECREMENTER_MAX)
590 set_dec((int)now);
591 trace_timer_interrupt_exit(regs);
592 return;
593 }
594 old_regs = set_irq_regs(regs); 585 old_regs = set_irq_regs(regs);
595 irq_enter(); 586 irq_enter();
596 587
@@ -606,8 +597,16 @@ void timer_interrupt(struct pt_regs * regs)
606 get_lppaca()->int_dword.fields.decr_int = 0; 597 get_lppaca()->int_dword.fields.decr_int = 0;
607#endif 598#endif
608 599
609 if (evt->event_handler) 600 now = get_tb_or_rtc();
610 evt->event_handler(evt); 601 if (now >= decrementer->next_tb) {
602 decrementer->next_tb = ~(u64)0;
603 if (evt->event_handler)
604 evt->event_handler(evt);
605 } else {
606 now = decrementer->next_tb - now;
607 if (now <= DECREMENTER_MAX)
608 set_dec((int)now);
609 }
611 610
612#ifdef CONFIG_PPC_ISERIES 611#ifdef CONFIG_PPC_ISERIES
613 if (firmware_has_feature(FW_FEATURE_ISERIES) && hvlpevent_is_pending()) 612 if (firmware_has_feature(FW_FEATURE_ISERIES) && hvlpevent_is_pending())
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index 00b9436f7652..fa3469ddaef8 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -1059,7 +1059,7 @@ static struct iommu_table *vio_build_iommu_table(struct vio_dev *dev)
1059 if (!dma_window) 1059 if (!dma_window)
1060 return NULL; 1060 return NULL;
1061 1061
1062 tbl = kmalloc(sizeof(*tbl), GFP_KERNEL); 1062 tbl = kzalloc(sizeof(*tbl), GFP_KERNEL);
1063 if (tbl == NULL) 1063 if (tbl == NULL)
1064 return NULL; 1064 return NULL;
1065 1065
@@ -1072,6 +1072,7 @@ static struct iommu_table *vio_build_iommu_table(struct vio_dev *dev)
1072 tbl->it_offset = offset >> IOMMU_PAGE_SHIFT; 1072 tbl->it_offset = offset >> IOMMU_PAGE_SHIFT;
1073 tbl->it_busno = 0; 1073 tbl->it_busno = 0;
1074 tbl->it_type = TCE_VB; 1074 tbl->it_type = TCE_VB;
1075 tbl->it_blocksize = 16;
1075 1076
1076 return iommu_init_table(tbl, -1); 1077 return iommu_init_table(tbl, -1);
1077} 1078}
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 71f1415e2472..ace85fa74b29 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -79,7 +79,9 @@
79#endif /* CONFIG_PPC_STD_MMU_64 */ 79#endif /* CONFIG_PPC_STD_MMU_64 */
80 80
81phys_addr_t memstart_addr = ~0; 81phys_addr_t memstart_addr = ~0;
82EXPORT_SYMBOL_GPL(memstart_addr);
82phys_addr_t kernstart_addr; 83phys_addr_t kernstart_addr;
84EXPORT_SYMBOL_GPL(kernstart_addr);
83 85
84void free_initmem(void) 86void free_initmem(void)
85{ 87{
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index cfa768203d08..b9d9fed8f36e 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -200,6 +200,7 @@ _GLOBAL(_tlbivax_bcast)
200 rlwimi r5,r4,0,16,31 200 rlwimi r5,r4,0,16,31
201 wrteei 0 201 wrteei 0
202 mtspr SPRN_MMUCR,r5 202 mtspr SPRN_MMUCR,r5
203 isync
203/* tlbivax 0,r3 - use .long to avoid binutils deps */ 204/* tlbivax 0,r3 - use .long to avoid binutils deps */
204 .long 0x7c000624 | (r3 << 11) 205 .long 0x7c000624 | (r3 << 11)
205 isync 206 isync
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
index f9751c8905be..83068322abd1 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -48,8 +48,10 @@ static int mpc837xmds_usb_cfg(void)
48 return -1; 48 return -1;
49 49
50 np = of_find_node_by_name(NULL, "usb"); 50 np = of_find_node_by_name(NULL, "usb");
51 if (!np) 51 if (!np) {
52 return -ENODEV; 52 ret = -ENODEV;
53 goto out;
54 }
53 phy_type = of_get_property(np, "phy_type", NULL); 55 phy_type = of_get_property(np, "phy_type", NULL);
54 if (phy_type && !strcmp(phy_type, "ulpi")) { 56 if (phy_type && !strcmp(phy_type, "ulpi")) {
55 clrbits8(bcsr_regs + 12, BCSR12_USB_SER_PIN); 57 clrbits8(bcsr_regs + 12, BCSR12_USB_SER_PIN);
@@ -65,8 +67,9 @@ static int mpc837xmds_usb_cfg(void)
65 } 67 }
66 68
67 of_node_put(np); 69 of_node_put(np);
70out:
68 iounmap(bcsr_regs); 71 iounmap(bcsr_regs);
69 return 0; 72 return ret;
70} 73}
71 74
72/* ************************************************************************ 75/* ************************************************************************
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index da64be19d099..aa34cac4eb5c 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -357,6 +357,7 @@ static void __init mpc85xx_mds_setup_arch(void)
357{ 357{
358#ifdef CONFIG_PCI 358#ifdef CONFIG_PCI
359 struct pci_controller *hose; 359 struct pci_controller *hose;
360 struct device_node *np;
360#endif 361#endif
361 dma_addr_t max = 0xffffffff; 362 dma_addr_t max = 0xffffffff;
362 363
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index e1467c937450..34e00902ce86 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -19,7 +19,7 @@
19 19
20#include <linux/pci.h> 20#include <linux/pci.h>
21#include <linux/of_platform.h> 21#include <linux/of_platform.h>
22#include <linux/lmb.h> 22#include <linux/memblock.h>
23 23
24#include <asm/mpic.h> 24#include <asm/mpic.h>
25#include <asm/swiotlb.h> 25#include <asm/swiotlb.h>
@@ -97,7 +97,7 @@ static void __init p1022_ds_setup_arch(void)
97#endif 97#endif
98 98
99#ifdef CONFIG_SWIOTLB 99#ifdef CONFIG_SWIOTLB
100 if (lmb_end_of_DRAM() > max) { 100 if (memblock_end_of_DRAM() > max) {
101 ppc_swiotlb_enable = 1; 101 ppc_swiotlb_enable = 1;
102 set_pci_dma_ops(&swiotlb_dma_ops); 102 set_pci_dma_ops(&swiotlb_dma_ops);
103 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; 103 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index d1663db7810f..81c9208025fa 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -106,8 +106,7 @@ config MMIO_NVRAM
106 106
107config MPIC_U3_HT_IRQS 107config MPIC_U3_HT_IRQS
108 bool 108 bool
109 depends on PPC_MAPLE 109 default n
110 default y
111 110
112config MPIC_BROKEN_REGREAD 111config MPIC_BROKEN_REGREAD
113 bool 112 bool
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index 58b13ce3847e..26a067122a54 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -477,7 +477,7 @@ cell_iommu_setup_window(struct cbe_iommu *iommu, struct device_node *np,
477 477
478 ioid = cell_iommu_get_ioid(np); 478 ioid = cell_iommu_get_ioid(np);
479 479
480 window = kmalloc_node(sizeof(*window), GFP_KERNEL, iommu->nid); 480 window = kzalloc_node(sizeof(*window), GFP_KERNEL, iommu->nid);
481 BUG_ON(window == NULL); 481 BUG_ON(window == NULL);
482 482
483 window->offset = offset; 483 window->offset = offset;
diff --git a/arch/powerpc/platforms/iseries/iommu.c b/arch/powerpc/platforms/iseries/iommu.c
index ce61cea0afb5..d8b76335bd13 100644
--- a/arch/powerpc/platforms/iseries/iommu.c
+++ b/arch/powerpc/platforms/iseries/iommu.c
@@ -184,7 +184,7 @@ static void pci_dma_dev_setup_iseries(struct pci_dev *pdev)
184 184
185 BUG_ON(lsn == NULL); 185 BUG_ON(lsn == NULL);
186 186
187 tbl = kmalloc(sizeof(struct iommu_table), GFP_KERNEL); 187 tbl = kzalloc(sizeof(struct iommu_table), GFP_KERNEL);
188 188
189 iommu_table_getparms_iSeries(pdn->busno, *lsn, 0, tbl); 189 iommu_table_getparms_iSeries(pdn->busno, *lsn, 0, tbl);
190 190
diff --git a/arch/powerpc/platforms/powermac/feature.c b/arch/powerpc/platforms/powermac/feature.c
index 39df6ab1735a..df423993f175 100644
--- a/arch/powerpc/platforms/powermac/feature.c
+++ b/arch/powerpc/platforms/powermac/feature.c
@@ -2873,12 +2873,11 @@ set_initial_features(void)
2873 2873
2874 /* Switch airport off */ 2874 /* Switch airport off */
2875 for_each_node_by_name(np, "radio") { 2875 for_each_node_by_name(np, "radio") {
2876 if (np && np->parent == macio_chips[0].of_node) { 2876 if (np->parent == macio_chips[0].of_node) {
2877 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON; 2877 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON;
2878 core99_airport_enable(np, 0, 0); 2878 core99_airport_enable(np, 0, 0);
2879 } 2879 }
2880 } 2880 }
2881 of_node_put(np);
2882 } 2881 }
2883 2882
2884 /* On all machines that support sound PM, switch sound off */ 2883 /* On all machines that support sound PM, switch sound off */
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index ab2027cdf893..3bc075c788ef 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -1155,13 +1155,11 @@ void __init pmac_pcibios_after_init(void)
1155 pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, nd, 0, 0); 1155 pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, nd, 0, 0);
1156 } 1156 }
1157 } 1157 }
1158 of_node_put(nd);
1159 for_each_node_by_name(nd, "ethernet") { 1158 for_each_node_by_name(nd, "ethernet") {
1160 if (nd->parent && of_device_is_compatible(nd, "gmac") 1159 if (nd->parent && of_device_is_compatible(nd, "gmac")
1161 && of_device_is_compatible(nd->parent, "uni-north")) 1160 && of_device_is_compatible(nd->parent, "uni-north"))
1162 pmac_call_feature(PMAC_FTR_GMAC_ENABLE, nd, 0, 0); 1161 pmac_call_feature(PMAC_FTR_GMAC_ENABLE, nd, 0, 0);
1163 } 1162 }
1164 of_node_put(nd);
1165} 1163}
1166 1164
1167void pmac_pci_fixup_cardbus(struct pci_dev* dev) 1165void pmac_pci_fixup_cardbus(struct pci_dev* dev)
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c
index 227c1c3d585e..72d8054fa739 100644
--- a/arch/powerpc/platforms/pseries/dlpar.c
+++ b/arch/powerpc/platforms/pseries/dlpar.c
@@ -129,20 +129,35 @@ struct device_node *dlpar_configure_connector(u32 drc_index)
129 struct property *property; 129 struct property *property;
130 struct property *last_property = NULL; 130 struct property *last_property = NULL;
131 struct cc_workarea *ccwa; 131 struct cc_workarea *ccwa;
132 char *data_buf;
132 int cc_token; 133 int cc_token;
133 int rc; 134 int rc = -1;
134 135
135 cc_token = rtas_token("ibm,configure-connector"); 136 cc_token = rtas_token("ibm,configure-connector");
136 if (cc_token == RTAS_UNKNOWN_SERVICE) 137 if (cc_token == RTAS_UNKNOWN_SERVICE)
137 return NULL; 138 return NULL;
138 139
139 spin_lock(&rtas_data_buf_lock); 140 data_buf = kzalloc(RTAS_DATA_BUF_SIZE, GFP_KERNEL);
140 ccwa = (struct cc_workarea *)&rtas_data_buf[0]; 141 if (!data_buf)
142 return NULL;
143
144 ccwa = (struct cc_workarea *)&data_buf[0];
141 ccwa->drc_index = drc_index; 145 ccwa->drc_index = drc_index;
142 ccwa->zero = 0; 146 ccwa->zero = 0;
143 147
144 rc = rtas_call(cc_token, 2, 1, NULL, rtas_data_buf, NULL); 148 do {
145 while (rc) { 149 /* Since we release the rtas_data_buf lock between configure
150 * connector calls we want to re-populate the rtas_data_buffer
151 * with the contents of the previous call.
152 */
153 spin_lock(&rtas_data_buf_lock);
154
155 memcpy(rtas_data_buf, data_buf, RTAS_DATA_BUF_SIZE);
156 rc = rtas_call(cc_token, 2, 1, NULL, rtas_data_buf, NULL);
157 memcpy(data_buf, rtas_data_buf, RTAS_DATA_BUF_SIZE);
158
159 spin_unlock(&rtas_data_buf_lock);
160
146 switch (rc) { 161 switch (rc) {
147 case NEXT_SIBLING: 162 case NEXT_SIBLING:
148 dn = dlpar_parse_cc_node(ccwa); 163 dn = dlpar_parse_cc_node(ccwa);
@@ -197,18 +212,19 @@ struct device_node *dlpar_configure_connector(u32 drc_index)
197 "returned from configure-connector\n", rc); 212 "returned from configure-connector\n", rc);
198 goto cc_error; 213 goto cc_error;
199 } 214 }
215 } while (rc);
200 216
201 rc = rtas_call(cc_token, 2, 1, NULL, rtas_data_buf, NULL); 217cc_error:
218 kfree(data_buf);
219
220 if (rc) {
221 if (first_dn)
222 dlpar_free_cc_nodes(first_dn);
223
224 return NULL;
202 } 225 }
203 226
204 spin_unlock(&rtas_data_buf_lock);
205 return first_dn; 227 return first_dn;
206
207cc_error:
208 if (first_dn)
209 dlpar_free_cc_nodes(first_dn);
210 spin_unlock(&rtas_data_buf_lock);
211 return NULL;
212} 228}
213 229
214static struct device_node *derive_parent(const char *path) 230static struct device_node *derive_parent(const char *path)
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 395848e30c52..a77bcaed80af 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -403,7 +403,7 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)
403 pci->phb->dma_window_size = 0x8000000ul; 403 pci->phb->dma_window_size = 0x8000000ul;
404 pci->phb->dma_window_base_cur = 0x8000000ul; 404 pci->phb->dma_window_base_cur = 0x8000000ul;
405 405
406 tbl = kmalloc_node(sizeof(struct iommu_table), GFP_KERNEL, 406 tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
407 pci->phb->node); 407 pci->phb->node);
408 408
409 iommu_table_setparms(pci->phb, dn, tbl); 409 iommu_table_setparms(pci->phb, dn, tbl);
@@ -448,7 +448,7 @@ static void pci_dma_bus_setup_pSeriesLP(struct pci_bus *bus)
448 pdn->full_name, ppci->iommu_table); 448 pdn->full_name, ppci->iommu_table);
449 449
450 if (!ppci->iommu_table) { 450 if (!ppci->iommu_table) {
451 tbl = kmalloc_node(sizeof(struct iommu_table), GFP_KERNEL, 451 tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
452 ppci->phb->node); 452 ppci->phb->node);
453 iommu_table_setparms_lpar(ppci->phb, pdn, tbl, dma_window, 453 iommu_table_setparms_lpar(ppci->phb, pdn, tbl, dma_window,
454 bus->number); 454 bus->number);
@@ -478,7 +478,7 @@ static void pci_dma_dev_setup_pSeries(struct pci_dev *dev)
478 struct pci_controller *phb = PCI_DN(dn)->phb; 478 struct pci_controller *phb = PCI_DN(dn)->phb;
479 479
480 pr_debug(" --> first child, no bridge. Allocating iommu table.\n"); 480 pr_debug(" --> first child, no bridge. Allocating iommu table.\n");
481 tbl = kmalloc_node(sizeof(struct iommu_table), GFP_KERNEL, 481 tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
482 phb->node); 482 phb->node);
483 iommu_table_setparms(phb, dn, tbl); 483 iommu_table_setparms(phb, dn, tbl);
484 PCI_DN(dn)->iommu_table = iommu_init_table(tbl, phb->node); 484 PCI_DN(dn)->iommu_table = iommu_init_table(tbl, phb->node);
@@ -544,7 +544,7 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
544 544
545 pci = PCI_DN(pdn); 545 pci = PCI_DN(pdn);
546 if (!pci->iommu_table) { 546 if (!pci->iommu_table) {
547 tbl = kmalloc_node(sizeof(struct iommu_table), GFP_KERNEL, 547 tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
548 pci->phb->node); 548 pci->phb->node);
549 iommu_table_setparms_lpar(pci->phb, pdn, tbl, dma_window, 549 iommu_table_setparms_lpar(pci->phb, pdn, tbl, dma_window,
550 pci->phb->bus->number); 550 pci->phb->bus->number);
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index 3b1bf61c45be..0317cce877c6 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -182,10 +182,13 @@ static int smp_pSeries_cpu_bootable(unsigned int nr)
182 /* Special case - we inhibit secondary thread startup 182 /* Special case - we inhibit secondary thread startup
183 * during boot if the user requests it. 183 * during boot if the user requests it.
184 */ 184 */
185 if (system_state < SYSTEM_RUNNING && 185 if (system_state < SYSTEM_RUNNING && cpu_has_feature(CPU_FTR_SMT)) {
186 cpu_has_feature(CPU_FTR_SMT) && 186 if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
187 !smt_enabled_at_boot && cpu_thread_in_core(nr) != 0) 187 return 0;
188 return 0; 188 if (smt_enabled_at_boot
189 && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
190 return 0;
191 }
189 192
190 return 1; 193 return 1;
191} 194}
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 5b22b07c8f67..93834b0d8272 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -928,8 +928,10 @@ void xics_migrate_irqs_away(void)
928 if (xics_status[0] != hw_cpu) 928 if (xics_status[0] != hw_cpu)
929 goto unlock; 929 goto unlock;
930 930
931 printk(KERN_WARNING "IRQ %u affinity broken off cpu %u\n", 931 /* This is expected during cpu offline. */
932 virq, cpu); 932 if (cpu_online(cpu))
933 printk(KERN_WARNING "IRQ %u affinity broken off cpu %u\n",
934 virq, cpu);
933 935
934 /* Reset affinity to all cpus */ 936 /* Reset affinity to all cpus */
935 cpumask_setall(irq_to_desc(virq)->affinity); 937 cpumask_setall(irq_to_desc(virq)->affinity);
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 209384b6e039..4ae933225251 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -399,6 +399,8 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1013E, quirk_fsl_pcie_header);
399DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1013, quirk_fsl_pcie_header); 399DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1013, quirk_fsl_pcie_header);
400DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1020E, quirk_fsl_pcie_header); 400DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1020E, quirk_fsl_pcie_header);
401DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1020, quirk_fsl_pcie_header); 401DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1020, quirk_fsl_pcie_header);
402DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1021E, quirk_fsl_pcie_header);
403DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1021, quirk_fsl_pcie_header);
402DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1022E, quirk_fsl_pcie_header); 404DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1022E, quirk_fsl_pcie_header);
403DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1022, quirk_fsl_pcie_header); 405DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1022, quirk_fsl_pcie_header);
404DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2010E, quirk_fsl_pcie_header); 406DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2010E, quirk_fsl_pcie_header);
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 6425abe5b7db..3017532319c8 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -240,12 +240,13 @@ struct rio_priv {
240 240
241static void __iomem *rio_regs_win; 241static void __iomem *rio_regs_win;
242 242
243#ifdef CONFIG_E500
243static int (*saved_mcheck_exception)(struct pt_regs *regs); 244static int (*saved_mcheck_exception)(struct pt_regs *regs);
244 245
245static int fsl_rio_mcheck_exception(struct pt_regs *regs) 246static int fsl_rio_mcheck_exception(struct pt_regs *regs)
246{ 247{
247 const struct exception_table_entry *entry = NULL; 248 const struct exception_table_entry *entry = NULL;
248 unsigned long reason = (mfspr(SPRN_MCSR) & MCSR_MASK); 249 unsigned long reason = mfspr(SPRN_MCSR);
249 250
250 if (reason & MCSR_BUS_RBERR) { 251 if (reason & MCSR_BUS_RBERR) {
251 reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR)); 252 reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR));
@@ -269,6 +270,7 @@ static int fsl_rio_mcheck_exception(struct pt_regs *regs)
269 else 270 else
270 return cur_cpu_spec->machine_check(regs); 271 return cur_cpu_spec->machine_check(regs);
271} 272}
273#endif
272 274
273/** 275/**
274 * fsl_rio_doorbell_send - Send a MPC85xx doorbell message 276 * fsl_rio_doorbell_send - Send a MPC85xx doorbell message
@@ -1517,8 +1519,10 @@ int fsl_rio_setup(struct platform_device *dev)
1517 fsl_rio_doorbell_init(port); 1519 fsl_rio_doorbell_init(port);
1518 fsl_rio_port_write_init(port); 1520 fsl_rio_port_write_init(port);
1519 1521
1522#ifdef CONFIG_E500
1520 saved_mcheck_exception = ppc_md.machine_check_exception; 1523 saved_mcheck_exception = ppc_md.machine_check_exception;
1521 ppc_md.machine_check_exception = fsl_rio_mcheck_exception; 1524 ppc_md.machine_check_exception = fsl_rio_mcheck_exception;
1525#endif
1522 /* Ensure that RFXE is set */ 1526 /* Ensure that RFXE is set */
1523 mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000)); 1527 mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000));
1524 1528
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 3da8014931c9..90020de4dcf2 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -640,6 +640,7 @@ unsigned int qe_get_num_of_snums(void)
640 if ((num_of_snums < 28) || (num_of_snums > QE_NUM_OF_SNUM)) { 640 if ((num_of_snums < 28) || (num_of_snums > QE_NUM_OF_SNUM)) {
641 /* No QE ever has fewer than 28 SNUMs */ 641 /* No QE ever has fewer than 28 SNUMs */
642 pr_err("QE: number of snum is invalid\n"); 642 pr_err("QE: number of snum is invalid\n");
643 of_node_put(qe);
643 return -EINVAL; 644 return -EINVAL;
644 } 645 }
645 } 646 }
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 0554445200bf..d17d04cfb2cd 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -2880,15 +2880,14 @@ static void xmon_init(int enable)
2880} 2880}
2881 2881
2882#ifdef CONFIG_MAGIC_SYSRQ 2882#ifdef CONFIG_MAGIC_SYSRQ
2883static void sysrq_handle_xmon(int key, struct tty_struct *tty) 2883static void sysrq_handle_xmon(int key)
2884{ 2884{
2885 /* ensure xmon is enabled */ 2885 /* ensure xmon is enabled */
2886 xmon_init(1); 2886 xmon_init(1);
2887 debugger(get_irq_regs()); 2887 debugger(get_irq_regs());
2888} 2888}
2889 2889
2890static struct sysrq_key_op sysrq_xmon_op = 2890static struct sysrq_key_op sysrq_xmon_op = {
2891{
2892 .handler = sysrq_handle_xmon, 2891 .handler = sysrq_handle_xmon,
2893 .help_msg = "Xmon", 2892 .help_msg = "Xmon",
2894 .action_msg = "Entering xmon", 2893 .action_msg = "Entering xmon",
diff --git a/arch/s390/include/asm/hugetlb.h b/arch/s390/include/asm/hugetlb.h
index 670a1d1745d2..bb8343d157bc 100644
--- a/arch/s390/include/asm/hugetlb.h
+++ b/arch/s390/include/asm/hugetlb.h
@@ -97,6 +97,7 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
97{ 97{
98 pte_t pte = huge_ptep_get(ptep); 98 pte_t pte = huge_ptep_get(ptep);
99 99
100 mm->context.flush_mm = 1;
100 pmd_clear((pmd_t *) ptep); 101 pmd_clear((pmd_t *) ptep);
101 return pte; 102 return pte;
102} 103}
@@ -167,7 +168,8 @@ static inline void huge_ptep_invalidate(struct mm_struct *mm,
167({ \ 168({ \
168 pte_t __pte = huge_ptep_get(__ptep); \ 169 pte_t __pte = huge_ptep_get(__ptep); \
169 if (pte_write(__pte)) { \ 170 if (pte_write(__pte)) { \
170 if (atomic_read(&(__mm)->mm_users) > 1 || \ 171 (__mm)->context.flush_mm = 1; \
172 if (atomic_read(&(__mm)->context.attach_count) > 1 || \
171 (__mm) != current->active_mm) \ 173 (__mm) != current->active_mm) \
172 huge_ptep_invalidate(__mm, __addr, __ptep); \ 174 huge_ptep_invalidate(__mm, __addr, __ptep); \
173 set_huge_pte_at(__mm, __addr, __ptep, \ 175 set_huge_pte_at(__mm, __addr, __ptep, \
diff --git a/arch/s390/include/asm/mmu.h b/arch/s390/include/asm/mmu.h
index 99e3409102b9..78522cdefdd4 100644
--- a/arch/s390/include/asm/mmu.h
+++ b/arch/s390/include/asm/mmu.h
@@ -2,6 +2,8 @@
2#define __MMU_H 2#define __MMU_H
3 3
4typedef struct { 4typedef struct {
5 atomic_t attach_count;
6 unsigned int flush_mm;
5 spinlock_t list_lock; 7 spinlock_t list_lock;
6 struct list_head crst_list; 8 struct list_head crst_list;
7 struct list_head pgtable_list; 9 struct list_head pgtable_list;
diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h
index 976e273988c2..a6f0e7cc9cde 100644
--- a/arch/s390/include/asm/mmu_context.h
+++ b/arch/s390/include/asm/mmu_context.h
@@ -11,11 +11,14 @@
11 11
12#include <asm/pgalloc.h> 12#include <asm/pgalloc.h>
13#include <asm/uaccess.h> 13#include <asm/uaccess.h>
14#include <asm/tlbflush.h>
14#include <asm-generic/mm_hooks.h> 15#include <asm-generic/mm_hooks.h>
15 16
16static inline int init_new_context(struct task_struct *tsk, 17static inline int init_new_context(struct task_struct *tsk,
17 struct mm_struct *mm) 18 struct mm_struct *mm)
18{ 19{
20 atomic_set(&mm->context.attach_count, 0);
21 mm->context.flush_mm = 0;
19 mm->context.asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS; 22 mm->context.asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS;
20#ifdef CONFIG_64BIT 23#ifdef CONFIG_64BIT
21 mm->context.asce_bits |= _ASCE_TYPE_REGION3; 24 mm->context.asce_bits |= _ASCE_TYPE_REGION3;
@@ -76,6 +79,12 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
76{ 79{
77 cpumask_set_cpu(smp_processor_id(), mm_cpumask(next)); 80 cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
78 update_mm(next, tsk); 81 update_mm(next, tsk);
82 atomic_dec(&prev->context.attach_count);
83 WARN_ON(atomic_read(&prev->context.attach_count) < 0);
84 atomic_inc(&next->context.attach_count);
85 /* Check for TLBs not flushed yet */
86 if (next->context.flush_mm)
87 __tlb_flush_mm(next);
79} 88}
80 89
81#define enter_lazy_tlb(mm,tsk) do { } while (0) 90#define enter_lazy_tlb(mm,tsk) do { } while (0)
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index 89a504c3f12e..3157441ee1da 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -880,7 +880,8 @@ static inline void ptep_invalidate(struct mm_struct *mm,
880#define ptep_get_and_clear(__mm, __address, __ptep) \ 880#define ptep_get_and_clear(__mm, __address, __ptep) \
881({ \ 881({ \
882 pte_t __pte = *(__ptep); \ 882 pte_t __pte = *(__ptep); \
883 if (atomic_read(&(__mm)->mm_users) > 1 || \ 883 (__mm)->context.flush_mm = 1; \
884 if (atomic_read(&(__mm)->context.attach_count) > 1 || \
884 (__mm) != current->active_mm) \ 885 (__mm) != current->active_mm) \
885 ptep_invalidate(__mm, __address, __ptep); \ 886 ptep_invalidate(__mm, __address, __ptep); \
886 else \ 887 else \
@@ -923,7 +924,8 @@ static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
923({ \ 924({ \
924 pte_t __pte = *(__ptep); \ 925 pte_t __pte = *(__ptep); \
925 if (pte_write(__pte)) { \ 926 if (pte_write(__pte)) { \
926 if (atomic_read(&(__mm)->mm_users) > 1 || \ 927 (__mm)->context.flush_mm = 1; \
928 if (atomic_read(&(__mm)->context.attach_count) > 1 || \
927 (__mm) != current->active_mm) \ 929 (__mm) != current->active_mm) \
928 ptep_invalidate(__mm, __addr, __ptep); \ 930 ptep_invalidate(__mm, __addr, __ptep); \
929 set_pte_at(__mm, __addr, __ptep, pte_wrprotect(__pte)); \ 931 set_pte_at(__mm, __addr, __ptep, pte_wrprotect(__pte)); \
diff --git a/arch/s390/include/asm/tlb.h b/arch/s390/include/asm/tlb.h
index 81150b053689..fd1c00d08bf5 100644
--- a/arch/s390/include/asm/tlb.h
+++ b/arch/s390/include/asm/tlb.h
@@ -50,8 +50,7 @@ static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm,
50 struct mmu_gather *tlb = &get_cpu_var(mmu_gathers); 50 struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
51 51
52 tlb->mm = mm; 52 tlb->mm = mm;
53 tlb->fullmm = full_mm_flush || (num_online_cpus() == 1) || 53 tlb->fullmm = full_mm_flush;
54 (atomic_read(&mm->mm_users) <= 1 && mm == current->active_mm);
55 tlb->nr_ptes = 0; 54 tlb->nr_ptes = 0;
56 tlb->nr_pxds = TLB_NR_PTRS; 55 tlb->nr_pxds = TLB_NR_PTRS;
57 if (tlb->fullmm) 56 if (tlb->fullmm)
diff --git a/arch/s390/include/asm/tlbflush.h b/arch/s390/include/asm/tlbflush.h
index 304cffa623e1..29d5d6d4becc 100644
--- a/arch/s390/include/asm/tlbflush.h
+++ b/arch/s390/include/asm/tlbflush.h
@@ -94,8 +94,12 @@ static inline void __tlb_flush_mm(struct mm_struct * mm)
94 94
95static inline void __tlb_flush_mm_cond(struct mm_struct * mm) 95static inline void __tlb_flush_mm_cond(struct mm_struct * mm)
96{ 96{
97 if (atomic_read(&mm->mm_users) <= 1 && mm == current->active_mm) 97 spin_lock(&mm->page_table_lock);
98 if (mm->context.flush_mm) {
98 __tlb_flush_mm(mm); 99 __tlb_flush_mm(mm);
100 mm->context.flush_mm = 0;
101 }
102 spin_unlock(&mm->page_table_lock);
99} 103}
100 104
101/* 105/*
diff --git a/arch/s390/kernel/entry.h b/arch/s390/kernel/entry.h
index 403fb430a896..ff579b6bde06 100644
--- a/arch/s390/kernel/entry.h
+++ b/arch/s390/kernel/entry.h
@@ -42,8 +42,8 @@ long sys_clone(unsigned long newsp, unsigned long clone_flags,
42 int __user *parent_tidptr, int __user *child_tidptr); 42 int __user *parent_tidptr, int __user *child_tidptr);
43long sys_vfork(void); 43long sys_vfork(void);
44void execve_tail(void); 44void execve_tail(void);
45long sys_execve(const char __user *name, char __user * __user *argv, 45long sys_execve(const char __user *name, const char __user *const __user *argv,
46 char __user * __user *envp); 46 const char __user *const __user *envp);
47long sys_sigsuspend(int history0, int history1, old_sigset_t mask); 47long sys_sigsuspend(int history0, int history1, old_sigset_t mask);
48long sys_sigaction(int sig, const struct old_sigaction __user *act, 48long sys_sigaction(int sig, const struct old_sigaction __user *act,
49 struct old_sigaction __user *oact); 49 struct old_sigaction __user *oact);
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 541053ed234e..8127ebd59c4d 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -583,6 +583,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
583 sf->gprs[9] = (unsigned long) sf; 583 sf->gprs[9] = (unsigned long) sf;
584 cpu_lowcore->save_area[15] = (unsigned long) sf; 584 cpu_lowcore->save_area[15] = (unsigned long) sf;
585 __ctl_store(cpu_lowcore->cregs_save_area, 0, 15); 585 __ctl_store(cpu_lowcore->cregs_save_area, 0, 15);
586 atomic_inc(&init_mm.context.attach_count);
586 asm volatile( 587 asm volatile(
587 " stam 0,15,0(%0)" 588 " stam 0,15,0(%0)"
588 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory"); 589 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
@@ -659,6 +660,7 @@ void __cpu_die(unsigned int cpu)
659 while (sigp_p(0, cpu, sigp_set_prefix) == sigp_busy) 660 while (sigp_p(0, cpu, sigp_set_prefix) == sigp_busy)
660 udelay(10); 661 udelay(10);
661 smp_free_lowcore(cpu); 662 smp_free_lowcore(cpu);
663 atomic_dec(&init_mm.context.attach_count);
662 pr_info("Processor %d stopped\n", cpu); 664 pr_info("Processor %d stopped\n", cpu);
663} 665}
664 666
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index acc91c75bc94..30eb6d02ddb8 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -74,6 +74,8 @@ void __init paging_init(void)
74 __ctl_load(S390_lowcore.kernel_asce, 13, 13); 74 __ctl_load(S390_lowcore.kernel_asce, 13, 13);
75 __raw_local_irq_ssm(ssm_mask); 75 __raw_local_irq_ssm(ssm_mask);
76 76
77 atomic_set(&init_mm.context.attach_count, 1);
78
77 sparse_memory_present_with_active_regions(MAX_NUMNODES); 79 sparse_memory_present_with_active_regions(MAX_NUMNODES);
78 sparse_init(); 80 sparse_init();
79 memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); 81 memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h
index f0c74227c737..bdb2ff880bdd 100644
--- a/arch/sparc/include/asm/atomic_64.h
+++ b/arch/sparc/include/asm/atomic_64.h
@@ -20,14 +20,14 @@
20#define atomic64_set(v, i) (((v)->counter) = i) 20#define atomic64_set(v, i) (((v)->counter) = i)
21 21
22extern void atomic_add(int, atomic_t *); 22extern void atomic_add(int, atomic_t *);
23extern void atomic64_add(int, atomic64_t *); 23extern void atomic64_add(long, atomic64_t *);
24extern void atomic_sub(int, atomic_t *); 24extern void atomic_sub(int, atomic_t *);
25extern void atomic64_sub(int, atomic64_t *); 25extern void atomic64_sub(long, atomic64_t *);
26 26
27extern int atomic_add_ret(int, atomic_t *); 27extern int atomic_add_ret(int, atomic_t *);
28extern long atomic64_add_ret(int, atomic64_t *); 28extern long atomic64_add_ret(long, atomic64_t *);
29extern int atomic_sub_ret(int, atomic_t *); 29extern int atomic_sub_ret(int, atomic_t *);
30extern long atomic64_sub_ret(int, atomic64_t *); 30extern long atomic64_sub_ret(long, atomic64_t *);
31 31
32#define atomic_dec_return(v) atomic_sub_ret(1, v) 32#define atomic_dec_return(v) atomic_sub_ret(1, v)
33#define atomic64_dec_return(v) atomic64_sub_ret(1, v) 33#define atomic64_dec_return(v) atomic64_sub_ret(1, v)
diff --git a/arch/sparc/include/asm/backoff.h b/arch/sparc/include/asm/backoff.h
index fa1fdf67e350..db3af0d30fb1 100644
--- a/arch/sparc/include/asm/backoff.h
+++ b/arch/sparc/include/asm/backoff.h
@@ -8,6 +8,9 @@
8#define BACKOFF_SETUP(reg) \ 8#define BACKOFF_SETUP(reg) \
9 mov 1, reg 9 mov 1, reg
10 10
11#define BACKOFF_LABEL(spin_label, continue_label) \
12 spin_label
13
11#define BACKOFF_SPIN(reg, tmp, label) \ 14#define BACKOFF_SPIN(reg, tmp, label) \
12 mov reg, tmp; \ 15 mov reg, tmp; \
1388: brnz,pt tmp, 88b; \ 1688: brnz,pt tmp, 88b; \
@@ -22,9 +25,11 @@
22#else 25#else
23 26
24#define BACKOFF_SETUP(reg) 27#define BACKOFF_SETUP(reg)
25#define BACKOFF_SPIN(reg, tmp, label) \ 28
26 ba,pt %xcc, label; \ 29#define BACKOFF_LABEL(spin_label, continue_label) \
27 nop; 30 continue_label
31
32#define BACKOFF_SPIN(reg, tmp, label)
28 33
29#endif 34#endif
30 35
diff --git a/arch/sparc/include/asm/oplib_64.h b/arch/sparc/include/asm/oplib_64.h
index a5db0317b5fb..3e0b2d62303d 100644
--- a/arch/sparc/include/asm/oplib_64.h
+++ b/arch/sparc/include/asm/oplib_64.h
@@ -185,9 +185,8 @@ extern int prom_getunumber(int syndrome_code,
185 char *buf, int buflen); 185 char *buf, int buflen);
186 186
187/* Retain physical memory to the caller across soft resets. */ 187/* Retain physical memory to the caller across soft resets. */
188extern unsigned long prom_retain(const char *name, 188extern int prom_retain(const char *name, unsigned long size,
189 unsigned long pa_low, unsigned long pa_high, 189 unsigned long align, unsigned long *paddr);
190 long size, long align);
191 190
192/* Load explicit I/D TLB entries into the calling processor. */ 191/* Load explicit I/D TLB entries into the calling processor. */
193extern long prom_itlb_load(unsigned long index, 192extern long prom_itlb_load(unsigned long index,
@@ -287,26 +286,6 @@ extern void prom_sun4v_guest_soft_state(void);
287extern int prom_ihandle2path(int handle, char *buffer, int bufsize); 286extern int prom_ihandle2path(int handle, char *buffer, int bufsize);
288 287
289/* Client interface level routines. */ 288/* Client interface level routines. */
290extern long p1275_cmd(const char *, long, ...); 289extern void p1275_cmd_direct(unsigned long *);
291
292#if 0
293#define P1275_SIZE(x) ((((long)((x) / 32)) << 32) | (x))
294#else
295#define P1275_SIZE(x) x
296#endif
297
298/* We support at most 16 input and 1 output argument */
299#define P1275_ARG_NUMBER 0
300#define P1275_ARG_IN_STRING 1
301#define P1275_ARG_OUT_BUF 2
302#define P1275_ARG_OUT_32B 3
303#define P1275_ARG_IN_FUNCTION 4
304#define P1275_ARG_IN_BUF 5
305#define P1275_ARG_IN_64B 6
306
307#define P1275_IN(x) ((x) & 0xf)
308#define P1275_OUT(x) (((x) << 4) & 0xf0)
309#define P1275_INOUT(i,o) (P1275_IN(i)|P1275_OUT(o))
310#define P1275_ARG(n,x) ((x) << ((n)*3 + 8))
311 290
312#endif /* !(__SPARC64_OPLIB_H) */ 291#endif /* !(__SPARC64_OPLIB_H) */
diff --git a/arch/sparc/include/asm/rwsem-const.h b/arch/sparc/include/asm/rwsem-const.h
deleted file mode 100644
index e4c61a18bb28..000000000000
--- a/arch/sparc/include/asm/rwsem-const.h
+++ /dev/null
@@ -1,12 +0,0 @@
1/* rwsem-const.h: RW semaphore counter constants. */
2#ifndef _SPARC64_RWSEM_CONST_H
3#define _SPARC64_RWSEM_CONST_H
4
5#define RWSEM_UNLOCKED_VALUE 0x00000000
6#define RWSEM_ACTIVE_BIAS 0x00000001
7#define RWSEM_ACTIVE_MASK 0x0000ffff
8#define RWSEM_WAITING_BIAS (-0x00010000)
9#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
10#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
11
12#endif /* _SPARC64_RWSEM_CONST_H */
diff --git a/arch/sparc/include/asm/rwsem.h b/arch/sparc/include/asm/rwsem.h
index 6e5621006f85..a2b4302869bc 100644
--- a/arch/sparc/include/asm/rwsem.h
+++ b/arch/sparc/include/asm/rwsem.h
@@ -15,16 +15,21 @@
15 15
16#include <linux/list.h> 16#include <linux/list.h>
17#include <linux/spinlock.h> 17#include <linux/spinlock.h>
18#include <asm/rwsem-const.h>
19 18
20struct rwsem_waiter; 19struct rwsem_waiter;
21 20
22struct rw_semaphore { 21struct rw_semaphore {
23 signed int count; 22 signed long count;
24 spinlock_t wait_lock; 23#define RWSEM_UNLOCKED_VALUE 0x00000000L
25 struct list_head wait_list; 24#define RWSEM_ACTIVE_BIAS 0x00000001L
25#define RWSEM_ACTIVE_MASK 0xffffffffL
26#define RWSEM_WAITING_BIAS (-RWSEM_ACTIVE_MASK-1)
27#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
28#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
29 spinlock_t wait_lock;
30 struct list_head wait_list;
26#ifdef CONFIG_DEBUG_LOCK_ALLOC 31#ifdef CONFIG_DEBUG_LOCK_ALLOC
27 struct lockdep_map dep_map; 32 struct lockdep_map dep_map;
28#endif 33#endif
29}; 34};
30 35
@@ -41,6 +46,11 @@ struct rw_semaphore {
41#define DECLARE_RWSEM(name) \ 46#define DECLARE_RWSEM(name) \
42 struct rw_semaphore name = __RWSEM_INITIALIZER(name) 47 struct rw_semaphore name = __RWSEM_INITIALIZER(name)
43 48
49extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
50extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
51extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);
52extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
53
44extern void __init_rwsem(struct rw_semaphore *sem, const char *name, 54extern void __init_rwsem(struct rw_semaphore *sem, const char *name,
45 struct lock_class_key *key); 55 struct lock_class_key *key);
46 56
@@ -51,27 +61,103 @@ do { \
51 __init_rwsem((sem), #sem, &__key); \ 61 __init_rwsem((sem), #sem, &__key); \
52} while (0) 62} while (0)
53 63
54extern void __down_read(struct rw_semaphore *sem); 64/*
55extern int __down_read_trylock(struct rw_semaphore *sem); 65 * lock for reading
56extern void __down_write(struct rw_semaphore *sem); 66 */
57extern int __down_write_trylock(struct rw_semaphore *sem); 67static inline void __down_read(struct rw_semaphore *sem)
58extern void __up_read(struct rw_semaphore *sem); 68{
59extern void __up_write(struct rw_semaphore *sem); 69 if (unlikely(atomic64_inc_return((atomic64_t *)(&sem->count)) <= 0L))
60extern void __downgrade_write(struct rw_semaphore *sem); 70 rwsem_down_read_failed(sem);
71}
72
73static inline int __down_read_trylock(struct rw_semaphore *sem)
74{
75 long tmp;
76
77 while ((tmp = sem->count) >= 0L) {
78 if (tmp == cmpxchg(&sem->count, tmp,
79 tmp + RWSEM_ACTIVE_READ_BIAS)) {
80 return 1;
81 }
82 }
83 return 0;
84}
61 85
86/*
87 * lock for writing
88 */
62static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) 89static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
63{ 90{
64 __down_write(sem); 91 long tmp;
92
93 tmp = atomic64_add_return(RWSEM_ACTIVE_WRITE_BIAS,
94 (atomic64_t *)(&sem->count));
95 if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS))
96 rwsem_down_write_failed(sem);
65} 97}
66 98
67static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) 99static inline void __down_write(struct rw_semaphore *sem)
68{ 100{
69 return atomic_add_return(delta, (atomic_t *)(&sem->count)); 101 __down_write_nested(sem, 0);
102}
103
104static inline int __down_write_trylock(struct rw_semaphore *sem)
105{
106 long tmp;
107
108 tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
109 RWSEM_ACTIVE_WRITE_BIAS);
110 return tmp == RWSEM_UNLOCKED_VALUE;
70} 111}
71 112
72static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) 113/*
114 * unlock after reading
115 */
116static inline void __up_read(struct rw_semaphore *sem)
117{
118 long tmp;
119
120 tmp = atomic64_dec_return((atomic64_t *)(&sem->count));
121 if (unlikely(tmp < -1L && (tmp & RWSEM_ACTIVE_MASK) == 0L))
122 rwsem_wake(sem);
123}
124
125/*
126 * unlock after writing
127 */
128static inline void __up_write(struct rw_semaphore *sem)
129{
130 if (unlikely(atomic64_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
131 (atomic64_t *)(&sem->count)) < 0L))
132 rwsem_wake(sem);
133}
134
135/*
136 * implement atomic add functionality
137 */
138static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
139{
140 atomic64_add(delta, (atomic64_t *)(&sem->count));
141}
142
143/*
144 * downgrade write lock to read lock
145 */
146static inline void __downgrade_write(struct rw_semaphore *sem)
147{
148 long tmp;
149
150 tmp = atomic64_add_return(-RWSEM_WAITING_BIAS, (atomic64_t *)(&sem->count));
151 if (tmp < 0L)
152 rwsem_downgrade_wake(sem);
153}
154
155/*
156 * implement exchange and add functionality
157 */
158static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
73{ 159{
74 atomic_add(delta, (atomic_t *)(&sem->count)); 160 return atomic64_add_return(delta, (atomic64_t *)(&sem->count));
75} 161}
76 162
77static inline int rwsem_is_locked(struct rw_semaphore *sem) 163static inline int rwsem_is_locked(struct rw_semaphore *sem)
diff --git a/arch/sparc/include/asm/system_64.h b/arch/sparc/include/asm/system_64.h
index d24cfe16afc1..e3b65d8cf41b 100644
--- a/arch/sparc/include/asm/system_64.h
+++ b/arch/sparc/include/asm/system_64.h
@@ -106,6 +106,7 @@ do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
106 */ 106 */
107#define write_pic(__p) \ 107#define write_pic(__p) \
108 __asm__ __volatile__("ba,pt %%xcc, 99f\n\t" \ 108 __asm__ __volatile__("ba,pt %%xcc, 99f\n\t" \
109 " nop\n\t" \
109 ".align 64\n" \ 110 ".align 64\n" \
110 "99:wr %0, 0x0, %%pic\n\t" \ 111 "99:wr %0, 0x0, %%pic\n\t" \
111 "rd %%pic, %%g0" : : "r" (__p)) 112 "rd %%pic, %%g0" : : "r" (__p))
diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c
index 485f54748384..c158a95ec664 100644
--- a/arch/sparc/kernel/process_64.c
+++ b/arch/sparc/kernel/process_64.c
@@ -303,7 +303,7 @@ void arch_trigger_all_cpu_backtrace(void)
303 303
304#ifdef CONFIG_MAGIC_SYSRQ 304#ifdef CONFIG_MAGIC_SYSRQ
305 305
306static void sysrq_handle_globreg(int key, struct tty_struct *tty) 306static void sysrq_handle_globreg(int key)
307{ 307{
308 arch_trigger_all_cpu_backtrace(); 308 arch_trigger_all_cpu_backtrace();
309} 309}
diff --git a/arch/sparc/lib/Makefile b/arch/sparc/lib/Makefile
index c4b5e03af115..846d1c4374ea 100644
--- a/arch/sparc/lib/Makefile
+++ b/arch/sparc/lib/Makefile
@@ -15,7 +15,7 @@ lib-$(CONFIG_SPARC32) += divdi3.o udivdi3.o
15lib-$(CONFIG_SPARC32) += copy_user.o locks.o 15lib-$(CONFIG_SPARC32) += copy_user.o locks.o
16lib-y += atomic_$(BITS).o 16lib-y += atomic_$(BITS).o
17lib-$(CONFIG_SPARC32) += lshrdi3.o ashldi3.o 17lib-$(CONFIG_SPARC32) += lshrdi3.o ashldi3.o
18lib-y += rwsem_$(BITS).o 18lib-$(CONFIG_SPARC32) += rwsem_32.o
19lib-$(CONFIG_SPARC32) += muldi3.o bitext.o cmpdi2.o 19lib-$(CONFIG_SPARC32) += muldi3.o bitext.o cmpdi2.o
20 20
21lib-$(CONFIG_SPARC64) += copy_page.o clear_page.o bzero.o 21lib-$(CONFIG_SPARC64) += copy_page.o clear_page.o bzero.o
diff --git a/arch/sparc/lib/atomic_64.S b/arch/sparc/lib/atomic_64.S
index 0268210ca168..59186e0fcf39 100644
--- a/arch/sparc/lib/atomic_64.S
+++ b/arch/sparc/lib/atomic_64.S
@@ -21,7 +21,7 @@ atomic_add: /* %o0 = increment, %o1 = atomic_ptr */
21 add %g1, %o0, %g7 21 add %g1, %o0, %g7
22 cas [%o1], %g1, %g7 22 cas [%o1], %g1, %g7
23 cmp %g1, %g7 23 cmp %g1, %g7
24 bne,pn %icc, 2f 24 bne,pn %icc, BACKOFF_LABEL(2f, 1b)
25 nop 25 nop
26 retl 26 retl
27 nop 27 nop
@@ -36,7 +36,7 @@ atomic_sub: /* %o0 = decrement, %o1 = atomic_ptr */
36 sub %g1, %o0, %g7 36 sub %g1, %o0, %g7
37 cas [%o1], %g1, %g7 37 cas [%o1], %g1, %g7
38 cmp %g1, %g7 38 cmp %g1, %g7
39 bne,pn %icc, 2f 39 bne,pn %icc, BACKOFF_LABEL(2f, 1b)
40 nop 40 nop
41 retl 41 retl
42 nop 42 nop
@@ -51,11 +51,10 @@ atomic_add_ret: /* %o0 = increment, %o1 = atomic_ptr */
51 add %g1, %o0, %g7 51 add %g1, %o0, %g7
52 cas [%o1], %g1, %g7 52 cas [%o1], %g1, %g7
53 cmp %g1, %g7 53 cmp %g1, %g7
54 bne,pn %icc, 2f 54 bne,pn %icc, BACKOFF_LABEL(2f, 1b)
55 add %g7, %o0, %g7 55 add %g1, %o0, %g1
56 sra %g7, 0, %o0
57 retl 56 retl
58 nop 57 sra %g1, 0, %o0
592: BACKOFF_SPIN(%o2, %o3, 1b) 582: BACKOFF_SPIN(%o2, %o3, 1b)
60 .size atomic_add_ret, .-atomic_add_ret 59 .size atomic_add_ret, .-atomic_add_ret
61 60
@@ -67,11 +66,10 @@ atomic_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */
67 sub %g1, %o0, %g7 66 sub %g1, %o0, %g7
68 cas [%o1], %g1, %g7 67 cas [%o1], %g1, %g7
69 cmp %g1, %g7 68 cmp %g1, %g7
70 bne,pn %icc, 2f 69 bne,pn %icc, BACKOFF_LABEL(2f, 1b)
71 sub %g7, %o0, %g7 70 sub %g1, %o0, %g1
72 sra %g7, 0, %o0
73 retl 71 retl
74 nop 72 sra %g1, 0, %o0
752: BACKOFF_SPIN(%o2, %o3, 1b) 732: BACKOFF_SPIN(%o2, %o3, 1b)
76 .size atomic_sub_ret, .-atomic_sub_ret 74 .size atomic_sub_ret, .-atomic_sub_ret
77 75
@@ -83,7 +81,7 @@ atomic64_add: /* %o0 = increment, %o1 = atomic_ptr */
83 add %g1, %o0, %g7 81 add %g1, %o0, %g7
84 casx [%o1], %g1, %g7 82 casx [%o1], %g1, %g7
85 cmp %g1, %g7 83 cmp %g1, %g7
86 bne,pn %xcc, 2f 84 bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
87 nop 85 nop
88 retl 86 retl
89 nop 87 nop
@@ -98,7 +96,7 @@ atomic64_sub: /* %o0 = decrement, %o1 = atomic_ptr */
98 sub %g1, %o0, %g7 96 sub %g1, %o0, %g7
99 casx [%o1], %g1, %g7 97 casx [%o1], %g1, %g7
100 cmp %g1, %g7 98 cmp %g1, %g7
101 bne,pn %xcc, 2f 99 bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
102 nop 100 nop
103 retl 101 retl
104 nop 102 nop
@@ -113,11 +111,10 @@ atomic64_add_ret: /* %o0 = increment, %o1 = atomic_ptr */
113 add %g1, %o0, %g7 111 add %g1, %o0, %g7
114 casx [%o1], %g1, %g7 112 casx [%o1], %g1, %g7
115 cmp %g1, %g7 113 cmp %g1, %g7
116 bne,pn %xcc, 2f 114 bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
117 add %g7, %o0, %g7
118 mov %g7, %o0
119 retl
120 nop 115 nop
116 retl
117 add %g1, %o0, %o0
1212: BACKOFF_SPIN(%o2, %o3, 1b) 1182: BACKOFF_SPIN(%o2, %o3, 1b)
122 .size atomic64_add_ret, .-atomic64_add_ret 119 .size atomic64_add_ret, .-atomic64_add_ret
123 120
@@ -129,10 +126,9 @@ atomic64_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */
129 sub %g1, %o0, %g7 126 sub %g1, %o0, %g7
130 casx [%o1], %g1, %g7 127 casx [%o1], %g1, %g7
131 cmp %g1, %g7 128 cmp %g1, %g7
132 bne,pn %xcc, 2f 129 bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
133 sub %g7, %o0, %g7
134 mov %g7, %o0
135 retl
136 nop 130 nop
131 retl
132 sub %g1, %o0, %o0
1372: BACKOFF_SPIN(%o2, %o3, 1b) 1332: BACKOFF_SPIN(%o2, %o3, 1b)
138 .size atomic64_sub_ret, .-atomic64_sub_ret 134 .size atomic64_sub_ret, .-atomic64_sub_ret
diff --git a/arch/sparc/lib/bitops.S b/arch/sparc/lib/bitops.S
index 2b7228cb8c22..3dc61d5537c0 100644
--- a/arch/sparc/lib/bitops.S
+++ b/arch/sparc/lib/bitops.S
@@ -22,7 +22,7 @@ test_and_set_bit: /* %o0=nr, %o1=addr */
22 or %g7, %o2, %g1 22 or %g7, %o2, %g1
23 casx [%o1], %g7, %g1 23 casx [%o1], %g7, %g1
24 cmp %g7, %g1 24 cmp %g7, %g1
25 bne,pn %xcc, 2f 25 bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
26 and %g7, %o2, %g2 26 and %g7, %o2, %g2
27 clr %o0 27 clr %o0
28 movrne %g2, 1, %o0 28 movrne %g2, 1, %o0
@@ -45,7 +45,7 @@ test_and_clear_bit: /* %o0=nr, %o1=addr */
45 andn %g7, %o2, %g1 45 andn %g7, %o2, %g1
46 casx [%o1], %g7, %g1 46 casx [%o1], %g7, %g1
47 cmp %g7, %g1 47 cmp %g7, %g1
48 bne,pn %xcc, 2f 48 bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
49 and %g7, %o2, %g2 49 and %g7, %o2, %g2
50 clr %o0 50 clr %o0
51 movrne %g2, 1, %o0 51 movrne %g2, 1, %o0
@@ -68,7 +68,7 @@ test_and_change_bit: /* %o0=nr, %o1=addr */
68 xor %g7, %o2, %g1 68 xor %g7, %o2, %g1
69 casx [%o1], %g7, %g1 69 casx [%o1], %g7, %g1
70 cmp %g7, %g1 70 cmp %g7, %g1
71 bne,pn %xcc, 2f 71 bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
72 and %g7, %o2, %g2 72 and %g7, %o2, %g2
73 clr %o0 73 clr %o0
74 movrne %g2, 1, %o0 74 movrne %g2, 1, %o0
@@ -91,7 +91,7 @@ set_bit: /* %o0=nr, %o1=addr */
91 or %g7, %o2, %g1 91 or %g7, %o2, %g1
92 casx [%o1], %g7, %g1 92 casx [%o1], %g7, %g1
93 cmp %g7, %g1 93 cmp %g7, %g1
94 bne,pn %xcc, 2f 94 bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
95 nop 95 nop
96 retl 96 retl
97 nop 97 nop
@@ -112,7 +112,7 @@ clear_bit: /* %o0=nr, %o1=addr */
112 andn %g7, %o2, %g1 112 andn %g7, %o2, %g1
113 casx [%o1], %g7, %g1 113 casx [%o1], %g7, %g1
114 cmp %g7, %g1 114 cmp %g7, %g1
115 bne,pn %xcc, 2f 115 bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
116 nop 116 nop
117 retl 117 retl
118 nop 118 nop
@@ -133,7 +133,7 @@ change_bit: /* %o0=nr, %o1=addr */
133 xor %g7, %o2, %g1 133 xor %g7, %o2, %g1
134 casx [%o1], %g7, %g1 134 casx [%o1], %g7, %g1
135 cmp %g7, %g1 135 cmp %g7, %g1
136 bne,pn %xcc, 2f 136 bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
137 nop 137 nop
138 retl 138 retl
139 nop 139 nop
diff --git a/arch/sparc/lib/rwsem_64.S b/arch/sparc/lib/rwsem_64.S
deleted file mode 100644
index 91a7d29a79d5..000000000000
--- a/arch/sparc/lib/rwsem_64.S
+++ /dev/null
@@ -1,163 +0,0 @@
1/* rwsem.S: RW semaphore assembler.
2 *
3 * Written by David S. Miller (davem@redhat.com), 2001.
4 * Derived from asm-i386/rwsem.h
5 */
6
7#include <asm/rwsem-const.h>
8
9 .section .sched.text, "ax"
10
11 .globl __down_read
12__down_read:
131: lduw [%o0], %g1
14 add %g1, 1, %g7
15 cas [%o0], %g1, %g7
16 cmp %g1, %g7
17 bne,pn %icc, 1b
18 add %g7, 1, %g7
19 cmp %g7, 0
20 bl,pn %icc, 3f
21 nop
222:
23 retl
24 nop
253:
26 save %sp, -192, %sp
27 call rwsem_down_read_failed
28 mov %i0, %o0
29 ret
30 restore
31 .size __down_read, .-__down_read
32
33 .globl __down_read_trylock
34__down_read_trylock:
351: lduw [%o0], %g1
36 add %g1, 1, %g7
37 cmp %g7, 0
38 bl,pn %icc, 2f
39 mov 0, %o1
40 cas [%o0], %g1, %g7
41 cmp %g1, %g7
42 bne,pn %icc, 1b
43 mov 1, %o1
442: retl
45 mov %o1, %o0
46 .size __down_read_trylock, .-__down_read_trylock
47
48 .globl __down_write
49__down_write:
50 sethi %hi(RWSEM_ACTIVE_WRITE_BIAS), %g1
51 or %g1, %lo(RWSEM_ACTIVE_WRITE_BIAS), %g1
521:
53 lduw [%o0], %g3
54 add %g3, %g1, %g7
55 cas [%o0], %g3, %g7
56 cmp %g3, %g7
57 bne,pn %icc, 1b
58 cmp %g7, 0
59 bne,pn %icc, 3f
60 nop
612: retl
62 nop
633:
64 save %sp, -192, %sp
65 call rwsem_down_write_failed
66 mov %i0, %o0
67 ret
68 restore
69 .size __down_write, .-__down_write
70
71 .globl __down_write_trylock
72__down_write_trylock:
73 sethi %hi(RWSEM_ACTIVE_WRITE_BIAS), %g1
74 or %g1, %lo(RWSEM_ACTIVE_WRITE_BIAS), %g1
751:
76 lduw [%o0], %g3
77 cmp %g3, 0
78 bne,pn %icc, 2f
79 mov 0, %o1
80 add %g3, %g1, %g7
81 cas [%o0], %g3, %g7
82 cmp %g3, %g7
83 bne,pn %icc, 1b
84 mov 1, %o1
852: retl
86 mov %o1, %o0
87 .size __down_write_trylock, .-__down_write_trylock
88
89 .globl __up_read
90__up_read:
911:
92 lduw [%o0], %g1
93 sub %g1, 1, %g7
94 cas [%o0], %g1, %g7
95 cmp %g1, %g7
96 bne,pn %icc, 1b
97 cmp %g7, 0
98 bl,pn %icc, 3f
99 nop
1002: retl
101 nop
1023: sethi %hi(RWSEM_ACTIVE_MASK), %g1
103 sub %g7, 1, %g7
104 or %g1, %lo(RWSEM_ACTIVE_MASK), %g1
105 andcc %g7, %g1, %g0
106 bne,pn %icc, 2b
107 nop
108 save %sp, -192, %sp
109 call rwsem_wake
110 mov %i0, %o0
111 ret
112 restore
113 .size __up_read, .-__up_read
114
115 .globl __up_write
116__up_write:
117 sethi %hi(RWSEM_ACTIVE_WRITE_BIAS), %g1
118 or %g1, %lo(RWSEM_ACTIVE_WRITE_BIAS), %g1
1191:
120 lduw [%o0], %g3
121 sub %g3, %g1, %g7
122 cas [%o0], %g3, %g7
123 cmp %g3, %g7
124 bne,pn %icc, 1b
125 sub %g7, %g1, %g7
126 cmp %g7, 0
127 bl,pn %icc, 3f
128 nop
1292:
130 retl
131 nop
1323:
133 save %sp, -192, %sp
134 call rwsem_wake
135 mov %i0, %o0
136 ret
137 restore
138 .size __up_write, .-__up_write
139
140 .globl __downgrade_write
141__downgrade_write:
142 sethi %hi(RWSEM_WAITING_BIAS), %g1
143 or %g1, %lo(RWSEM_WAITING_BIAS), %g1
1441:
145 lduw [%o0], %g3
146 sub %g3, %g1, %g7
147 cas [%o0], %g3, %g7
148 cmp %g3, %g7
149 bne,pn %icc, 1b
150 sub %g7, %g1, %g7
151 cmp %g7, 0
152 bl,pn %icc, 3f
153 nop
1542:
155 retl
156 nop
1573:
158 save %sp, -192, %sp
159 call rwsem_downgrade_wake
160 mov %i0, %o0
161 ret
162 restore
163 .size __downgrade_write, .-__downgrade_write
diff --git a/arch/sparc/prom/cif.S b/arch/sparc/prom/cif.S
index 5f27ad779c0c..9c86b4b7d429 100644
--- a/arch/sparc/prom/cif.S
+++ b/arch/sparc/prom/cif.S
@@ -9,18 +9,18 @@
9#include <asm/thread_info.h> 9#include <asm/thread_info.h>
10 10
11 .text 11 .text
12 .globl prom_cif_interface 12 .globl prom_cif_direct
13prom_cif_interface: 13prom_cif_direct:
14 sethi %hi(p1275buf), %o0 14 sethi %hi(p1275buf), %o1
15 or %o0, %lo(p1275buf), %o0 15 or %o1, %lo(p1275buf), %o1
16 ldx [%o0 + 0x010], %o1 ! prom_cif_stack 16 ldx [%o1 + 0x0010], %o2 ! prom_cif_stack
17 save %o1, -192, %sp 17 save %o2, -192, %sp
18 ldx [%i0 + 0x008], %l2 ! prom_cif_handler 18 ldx [%i1 + 0x0008], %l2 ! prom_cif_handler
19 mov %g4, %l0 19 mov %g4, %l0
20 mov %g5, %l1 20 mov %g5, %l1
21 mov %g6, %l3 21 mov %g6, %l3
22 call %l2 22 call %l2
23 add %i0, 0x018, %o0 ! prom_args 23 mov %i0, %o0 ! prom_args
24 mov %l0, %g4 24 mov %l0, %g4
25 mov %l1, %g5 25 mov %l1, %g5
26 mov %l3, %g6 26 mov %l3, %g6
diff --git a/arch/sparc/prom/console_64.c b/arch/sparc/prom/console_64.c
index f55d58a8a156..10322dc2f557 100644
--- a/arch/sparc/prom/console_64.c
+++ b/arch/sparc/prom/console_64.c
@@ -21,14 +21,22 @@ extern int prom_stdin, prom_stdout;
21inline int 21inline int
22prom_nbgetchar(void) 22prom_nbgetchar(void)
23{ 23{
24 unsigned long args[7];
24 char inc; 25 char inc;
25 26
26 if (p1275_cmd("read", P1275_ARG(1,P1275_ARG_OUT_BUF)| 27 args[0] = (unsigned long) "read";
27 P1275_INOUT(3,1), 28 args[1] = 3;
28 prom_stdin, &inc, P1275_SIZE(1)) == 1) 29 args[2] = 1;
30 args[3] = (unsigned int) prom_stdin;
31 args[4] = (unsigned long) &inc;
32 args[5] = 1;
33 args[6] = (unsigned long) -1;
34
35 p1275_cmd_direct(args);
36
37 if (args[6] == 1)
29 return inc; 38 return inc;
30 else 39 return -1;
31 return -1;
32} 40}
33 41
34/* Non blocking put character to console device, returns -1 if 42/* Non blocking put character to console device, returns -1 if
@@ -37,12 +45,22 @@ prom_nbgetchar(void)
37inline int 45inline int
38prom_nbputchar(char c) 46prom_nbputchar(char c)
39{ 47{
48 unsigned long args[7];
40 char outc; 49 char outc;
41 50
42 outc = c; 51 outc = c;
43 if (p1275_cmd("write", P1275_ARG(1,P1275_ARG_IN_BUF)| 52
44 P1275_INOUT(3,1), 53 args[0] = (unsigned long) "write";
45 prom_stdout, &outc, P1275_SIZE(1)) == 1) 54 args[1] = 3;
55 args[2] = 1;
56 args[3] = (unsigned int) prom_stdout;
57 args[4] = (unsigned long) &outc;
58 args[5] = 1;
59 args[6] = (unsigned long) -1;
60
61 p1275_cmd_direct(args);
62
63 if (args[6] == 1)
46 return 0; 64 return 0;
47 else 65 else
48 return -1; 66 return -1;
@@ -67,7 +85,15 @@ prom_putchar(char c)
67void 85void
68prom_puts(const char *s, int len) 86prom_puts(const char *s, int len)
69{ 87{
70 p1275_cmd("write", P1275_ARG(1,P1275_ARG_IN_BUF)| 88 unsigned long args[7];
71 P1275_INOUT(3,1), 89
72 prom_stdout, s, P1275_SIZE(len)); 90 args[0] = (unsigned long) "write";
91 args[1] = 3;
92 args[2] = 1;
93 args[3] = (unsigned int) prom_stdout;
94 args[4] = (unsigned long) s;
95 args[5] = len;
96 args[6] = (unsigned long) -1;
97
98 p1275_cmd_direct(args);
73} 99}
diff --git a/arch/sparc/prom/devops_64.c b/arch/sparc/prom/devops_64.c
index 9dbd803e46e1..a017119e7ef1 100644
--- a/arch/sparc/prom/devops_64.c
+++ b/arch/sparc/prom/devops_64.c
@@ -18,16 +18,32 @@
18int 18int
19prom_devopen(const char *dstr) 19prom_devopen(const char *dstr)
20{ 20{
21 return p1275_cmd ("open", P1275_ARG(0,P1275_ARG_IN_STRING)| 21 unsigned long args[5];
22 P1275_INOUT(1,1), 22
23 dstr); 23 args[0] = (unsigned long) "open";
24 args[1] = 1;
25 args[2] = 1;
26 args[3] = (unsigned long) dstr;
27 args[4] = (unsigned long) -1;
28
29 p1275_cmd_direct(args);
30
31 return (int) args[4];
24} 32}
25 33
26/* Close the device described by device handle 'dhandle'. */ 34/* Close the device described by device handle 'dhandle'. */
27int 35int
28prom_devclose(int dhandle) 36prom_devclose(int dhandle)
29{ 37{
30 p1275_cmd ("close", P1275_INOUT(1,0), dhandle); 38 unsigned long args[4];
39
40 args[0] = (unsigned long) "close";
41 args[1] = 1;
42 args[2] = 0;
43 args[3] = (unsigned int) dhandle;
44
45 p1275_cmd_direct(args);
46
31 return 0; 47 return 0;
32} 48}
33 49
@@ -37,5 +53,15 @@ prom_devclose(int dhandle)
37void 53void
38prom_seek(int dhandle, unsigned int seekhi, unsigned int seeklo) 54prom_seek(int dhandle, unsigned int seekhi, unsigned int seeklo)
39{ 55{
40 p1275_cmd ("seek", P1275_INOUT(3,1), dhandle, seekhi, seeklo); 56 unsigned long args[7];
57
58 args[0] = (unsigned long) "seek";
59 args[1] = 3;
60 args[2] = 1;
61 args[3] = (unsigned int) dhandle;
62 args[4] = seekhi;
63 args[5] = seeklo;
64 args[6] = (unsigned long) -1;
65
66 p1275_cmd_direct(args);
41} 67}
diff --git a/arch/sparc/prom/misc_64.c b/arch/sparc/prom/misc_64.c
index 39fc6af21b7c..6cb1581d6aef 100644
--- a/arch/sparc/prom/misc_64.c
+++ b/arch/sparc/prom/misc_64.c
@@ -20,10 +20,17 @@
20 20
21int prom_service_exists(const char *service_name) 21int prom_service_exists(const char *service_name)
22{ 22{
23 int err = p1275_cmd("test", P1275_ARG(0, P1275_ARG_IN_STRING) | 23 unsigned long args[5];
24 P1275_INOUT(1, 1), service_name);
25 24
26 if (err) 25 args[0] = (unsigned long) "test";
26 args[1] = 1;
27 args[2] = 1;
28 args[3] = (unsigned long) service_name;
29 args[4] = (unsigned long) -1;
30
31 p1275_cmd_direct(args);
32
33 if (args[4])
27 return 0; 34 return 0;
28 return 1; 35 return 1;
29} 36}
@@ -31,30 +38,47 @@ int prom_service_exists(const char *service_name)
31void prom_sun4v_guest_soft_state(void) 38void prom_sun4v_guest_soft_state(void)
32{ 39{
33 const char *svc = "SUNW,soft-state-supported"; 40 const char *svc = "SUNW,soft-state-supported";
41 unsigned long args[3];
34 42
35 if (!prom_service_exists(svc)) 43 if (!prom_service_exists(svc))
36 return; 44 return;
37 p1275_cmd(svc, P1275_INOUT(0, 0)); 45 args[0] = (unsigned long) svc;
46 args[1] = 0;
47 args[2] = 0;
48 p1275_cmd_direct(args);
38} 49}
39 50
40/* Reset and reboot the machine with the command 'bcommand'. */ 51/* Reset and reboot the machine with the command 'bcommand'. */
41void prom_reboot(const char *bcommand) 52void prom_reboot(const char *bcommand)
42{ 53{
54 unsigned long args[4];
55
43#ifdef CONFIG_SUN_LDOMS 56#ifdef CONFIG_SUN_LDOMS
44 if (ldom_domaining_enabled) 57 if (ldom_domaining_enabled)
45 ldom_reboot(bcommand); 58 ldom_reboot(bcommand);
46#endif 59#endif
47 p1275_cmd("boot", P1275_ARG(0, P1275_ARG_IN_STRING) | 60 args[0] = (unsigned long) "boot";
48 P1275_INOUT(1, 0), bcommand); 61 args[1] = 1;
62 args[2] = 0;
63 args[3] = (unsigned long) bcommand;
64
65 p1275_cmd_direct(args);
49} 66}
50 67
51/* Forth evaluate the expression contained in 'fstring'. */ 68/* Forth evaluate the expression contained in 'fstring'. */
52void prom_feval(const char *fstring) 69void prom_feval(const char *fstring)
53{ 70{
71 unsigned long args[5];
72
54 if (!fstring || fstring[0] == 0) 73 if (!fstring || fstring[0] == 0)
55 return; 74 return;
56 p1275_cmd("interpret", P1275_ARG(0, P1275_ARG_IN_STRING) | 75 args[0] = (unsigned long) "interpret";
57 P1275_INOUT(1, 1), fstring); 76 args[1] = 1;
77 args[2] = 1;
78 args[3] = (unsigned long) fstring;
79 args[4] = (unsigned long) -1;
80
81 p1275_cmd_direct(args);
58} 82}
59EXPORT_SYMBOL(prom_feval); 83EXPORT_SYMBOL(prom_feval);
60 84
@@ -68,6 +92,7 @@ extern void smp_release(void);
68 */ 92 */
69void prom_cmdline(void) 93void prom_cmdline(void)
70{ 94{
95 unsigned long args[3];
71 unsigned long flags; 96 unsigned long flags;
72 97
73 local_irq_save(flags); 98 local_irq_save(flags);
@@ -76,7 +101,11 @@ void prom_cmdline(void)
76 smp_capture(); 101 smp_capture();
77#endif 102#endif
78 103
79 p1275_cmd("enter", P1275_INOUT(0, 0)); 104 args[0] = (unsigned long) "enter";
105 args[1] = 0;
106 args[2] = 0;
107
108 p1275_cmd_direct(args);
80 109
81#ifdef CONFIG_SMP 110#ifdef CONFIG_SMP
82 smp_release(); 111 smp_release();
@@ -90,22 +119,32 @@ void prom_cmdline(void)
90 */ 119 */
91void notrace prom_halt(void) 120void notrace prom_halt(void)
92{ 121{
122 unsigned long args[3];
123
93#ifdef CONFIG_SUN_LDOMS 124#ifdef CONFIG_SUN_LDOMS
94 if (ldom_domaining_enabled) 125 if (ldom_domaining_enabled)
95 ldom_power_off(); 126 ldom_power_off();
96#endif 127#endif
97again: 128again:
98 p1275_cmd("exit", P1275_INOUT(0, 0)); 129 args[0] = (unsigned long) "exit";
130 args[1] = 0;
131 args[2] = 0;
132 p1275_cmd_direct(args);
99 goto again; /* PROM is out to get me -DaveM */ 133 goto again; /* PROM is out to get me -DaveM */
100} 134}
101 135
102void prom_halt_power_off(void) 136void prom_halt_power_off(void)
103{ 137{
138 unsigned long args[3];
139
104#ifdef CONFIG_SUN_LDOMS 140#ifdef CONFIG_SUN_LDOMS
105 if (ldom_domaining_enabled) 141 if (ldom_domaining_enabled)
106 ldom_power_off(); 142 ldom_power_off();
107#endif 143#endif
108 p1275_cmd("SUNW,power-off", P1275_INOUT(0, 0)); 144 args[0] = (unsigned long) "SUNW,power-off";
145 args[1] = 0;
146 args[2] = 0;
147 p1275_cmd_direct(args);
109 148
110 /* if nothing else helps, we just halt */ 149 /* if nothing else helps, we just halt */
111 prom_halt(); 150 prom_halt();
@@ -114,10 +153,15 @@ void prom_halt_power_off(void)
114/* Set prom sync handler to call function 'funcp'. */ 153/* Set prom sync handler to call function 'funcp'. */
115void prom_setcallback(callback_func_t funcp) 154void prom_setcallback(callback_func_t funcp)
116{ 155{
156 unsigned long args[5];
117 if (!funcp) 157 if (!funcp)
118 return; 158 return;
119 p1275_cmd("set-callback", P1275_ARG(0, P1275_ARG_IN_FUNCTION) | 159 args[0] = (unsigned long) "set-callback";
120 P1275_INOUT(1, 1), funcp); 160 args[1] = 1;
161 args[2] = 1;
162 args[3] = (unsigned long) funcp;
163 args[4] = (unsigned long) -1;
164 p1275_cmd_direct(args);
121} 165}
122 166
123/* Get the idprom and stuff it into buffer 'idbuf'. Returns the 167/* Get the idprom and stuff it into buffer 'idbuf'. Returns the
@@ -173,57 +217,61 @@ static int prom_get_memory_ihandle(void)
173} 217}
174 218
175/* Load explicit I/D TLB entries. */ 219/* Load explicit I/D TLB entries. */
220static long tlb_load(const char *type, unsigned long index,
221 unsigned long tte_data, unsigned long vaddr)
222{
223 unsigned long args[9];
224
225 args[0] = (unsigned long) prom_callmethod_name;
226 args[1] = 5;
227 args[2] = 1;
228 args[3] = (unsigned long) type;
229 args[4] = (unsigned int) prom_get_mmu_ihandle();
230 args[5] = vaddr;
231 args[6] = tte_data;
232 args[7] = index;
233 args[8] = (unsigned long) -1;
234
235 p1275_cmd_direct(args);
236
237 return (long) args[8];
238}
239
176long prom_itlb_load(unsigned long index, 240long prom_itlb_load(unsigned long index,
177 unsigned long tte_data, 241 unsigned long tte_data,
178 unsigned long vaddr) 242 unsigned long vaddr)
179{ 243{
180 return p1275_cmd(prom_callmethod_name, 244 return tlb_load("SUNW,itlb-load", index, tte_data, vaddr);
181 (P1275_ARG(0, P1275_ARG_IN_STRING) |
182 P1275_ARG(2, P1275_ARG_IN_64B) |
183 P1275_ARG(3, P1275_ARG_IN_64B) |
184 P1275_INOUT(5, 1)),
185 "SUNW,itlb-load",
186 prom_get_mmu_ihandle(),
187 /* And then our actual args are pushed backwards. */
188 vaddr,
189 tte_data,
190 index);
191} 245}
192 246
193long prom_dtlb_load(unsigned long index, 247long prom_dtlb_load(unsigned long index,
194 unsigned long tte_data, 248 unsigned long tte_data,
195 unsigned long vaddr) 249 unsigned long vaddr)
196{ 250{
197 return p1275_cmd(prom_callmethod_name, 251 return tlb_load("SUNW,dtlb-load", index, tte_data, vaddr);
198 (P1275_ARG(0, P1275_ARG_IN_STRING) |
199 P1275_ARG(2, P1275_ARG_IN_64B) |
200 P1275_ARG(3, P1275_ARG_IN_64B) |
201 P1275_INOUT(5, 1)),
202 "SUNW,dtlb-load",
203 prom_get_mmu_ihandle(),
204 /* And then our actual args are pushed backwards. */
205 vaddr,
206 tte_data,
207 index);
208} 252}
209 253
210int prom_map(int mode, unsigned long size, 254int prom_map(int mode, unsigned long size,
211 unsigned long vaddr, unsigned long paddr) 255 unsigned long vaddr, unsigned long paddr)
212{ 256{
213 int ret = p1275_cmd(prom_callmethod_name, 257 unsigned long args[11];
214 (P1275_ARG(0, P1275_ARG_IN_STRING) | 258 int ret;
215 P1275_ARG(3, P1275_ARG_IN_64B) | 259
216 P1275_ARG(4, P1275_ARG_IN_64B) | 260 args[0] = (unsigned long) prom_callmethod_name;
217 P1275_ARG(6, P1275_ARG_IN_64B) | 261 args[1] = 7;
218 P1275_INOUT(7, 1)), 262 args[2] = 1;
219 prom_map_name, 263 args[3] = (unsigned long) prom_map_name;
220 prom_get_mmu_ihandle(), 264 args[4] = (unsigned int) prom_get_mmu_ihandle();
221 mode, 265 args[5] = (unsigned int) mode;
222 size, 266 args[6] = size;
223 vaddr, 267 args[7] = vaddr;
224 0, 268 args[8] = 0;
225 paddr); 269 args[9] = paddr;
226 270 args[10] = (unsigned long) -1;
271
272 p1275_cmd_direct(args);
273
274 ret = (int) args[10];
227 if (ret == 0) 275 if (ret == 0)
228 ret = -1; 276 ret = -1;
229 return ret; 277 return ret;
@@ -231,40 +279,51 @@ int prom_map(int mode, unsigned long size,
231 279
232void prom_unmap(unsigned long size, unsigned long vaddr) 280void prom_unmap(unsigned long size, unsigned long vaddr)
233{ 281{
234 p1275_cmd(prom_callmethod_name, 282 unsigned long args[7];
235 (P1275_ARG(0, P1275_ARG_IN_STRING) | 283
236 P1275_ARG(2, P1275_ARG_IN_64B) | 284 args[0] = (unsigned long) prom_callmethod_name;
237 P1275_ARG(3, P1275_ARG_IN_64B) | 285 args[1] = 4;
238 P1275_INOUT(4, 0)), 286 args[2] = 0;
239 prom_unmap_name, 287 args[3] = (unsigned long) prom_unmap_name;
240 prom_get_mmu_ihandle(), 288 args[4] = (unsigned int) prom_get_mmu_ihandle();
241 size, 289 args[5] = size;
242 vaddr); 290 args[6] = vaddr;
291
292 p1275_cmd_direct(args);
243} 293}
244 294
245/* Set aside physical memory which is not touched or modified 295/* Set aside physical memory which is not touched or modified
246 * across soft resets. 296 * across soft resets.
247 */ 297 */
248unsigned long prom_retain(const char *name, 298int prom_retain(const char *name, unsigned long size,
249 unsigned long pa_low, unsigned long pa_high, 299 unsigned long align, unsigned long *paddr)
250 long size, long align)
251{ 300{
252 /* XXX I don't think we return multiple values correctly. 301 unsigned long args[11];
253 * XXX OBP supposedly returns pa_low/pa_high here, how does 302
254 * XXX it work? 303 args[0] = (unsigned long) prom_callmethod_name;
304 args[1] = 5;
305 args[2] = 3;
306 args[3] = (unsigned long) "SUNW,retain";
307 args[4] = (unsigned int) prom_get_memory_ihandle();
308 args[5] = align;
309 args[6] = size;
310 args[7] = (unsigned long) name;
311 args[8] = (unsigned long) -1;
312 args[9] = (unsigned long) -1;
313 args[10] = (unsigned long) -1;
314
315 p1275_cmd_direct(args);
316
317 if (args[8])
318 return (int) args[8];
319
320 /* Next we get "phys_high" then "phys_low". On 64-bit
321 * the phys_high cell is don't care since the phys_low
322 * cell has the full value.
255 */ 323 */
324 *paddr = args[10];
256 325
257 /* If align is zero, the pa_low/pa_high args are passed, 326 return 0;
258 * else they are not.
259 */
260 if (align == 0)
261 return p1275_cmd("SUNW,retain",
262 (P1275_ARG(0, P1275_ARG_IN_BUF) | P1275_INOUT(5, 2)),
263 name, pa_low, pa_high, size, align);
264 else
265 return p1275_cmd("SUNW,retain",
266 (P1275_ARG(0, P1275_ARG_IN_BUF) | P1275_INOUT(3, 2)),
267 name, size, align);
268} 327}
269 328
270/* Get "Unumber" string for the SIMM at the given 329/* Get "Unumber" string for the SIMM at the given
@@ -277,62 +336,129 @@ int prom_getunumber(int syndrome_code,
277 unsigned long phys_addr, 336 unsigned long phys_addr,
278 char *buf, int buflen) 337 char *buf, int buflen)
279{ 338{
280 return p1275_cmd(prom_callmethod_name, 339 unsigned long args[12];
281 (P1275_ARG(0, P1275_ARG_IN_STRING) | 340
282 P1275_ARG(3, P1275_ARG_OUT_BUF) | 341 args[0] = (unsigned long) prom_callmethod_name;
283 P1275_ARG(6, P1275_ARG_IN_64B) | 342 args[1] = 7;
284 P1275_INOUT(8, 2)), 343 args[2] = 2;
285 "SUNW,get-unumber", prom_get_memory_ihandle(), 344 args[3] = (unsigned long) "SUNW,get-unumber";
286 buflen, buf, P1275_SIZE(buflen), 345 args[4] = (unsigned int) prom_get_memory_ihandle();
287 0, phys_addr, syndrome_code); 346 args[5] = buflen;
347 args[6] = (unsigned long) buf;
348 args[7] = 0;
349 args[8] = phys_addr;
350 args[9] = (unsigned int) syndrome_code;
351 args[10] = (unsigned long) -1;
352 args[11] = (unsigned long) -1;
353
354 p1275_cmd_direct(args);
355
356 return (int) args[10];
288} 357}
289 358
290/* Power management extensions. */ 359/* Power management extensions. */
291void prom_sleepself(void) 360void prom_sleepself(void)
292{ 361{
293 p1275_cmd("SUNW,sleep-self", P1275_INOUT(0, 0)); 362 unsigned long args[3];
363
364 args[0] = (unsigned long) "SUNW,sleep-self";
365 args[1] = 0;
366 args[2] = 0;
367 p1275_cmd_direct(args);
294} 368}
295 369
296int prom_sleepsystem(void) 370int prom_sleepsystem(void)
297{ 371{
298 return p1275_cmd("SUNW,sleep-system", P1275_INOUT(0, 1)); 372 unsigned long args[4];
373
374 args[0] = (unsigned long) "SUNW,sleep-system";
375 args[1] = 0;
376 args[2] = 1;
377 args[3] = (unsigned long) -1;
378 p1275_cmd_direct(args);
379
380 return (int) args[3];
299} 381}
300 382
301int prom_wakeupsystem(void) 383int prom_wakeupsystem(void)
302{ 384{
303 return p1275_cmd("SUNW,wakeup-system", P1275_INOUT(0, 1)); 385 unsigned long args[4];
386
387 args[0] = (unsigned long) "SUNW,wakeup-system";
388 args[1] = 0;
389 args[2] = 1;
390 args[3] = (unsigned long) -1;
391 p1275_cmd_direct(args);
392
393 return (int) args[3];
304} 394}
305 395
306#ifdef CONFIG_SMP 396#ifdef CONFIG_SMP
307void prom_startcpu(int cpunode, unsigned long pc, unsigned long arg) 397void prom_startcpu(int cpunode, unsigned long pc, unsigned long arg)
308{ 398{
309 p1275_cmd("SUNW,start-cpu", P1275_INOUT(3, 0), cpunode, pc, arg); 399 unsigned long args[6];
400
401 args[0] = (unsigned long) "SUNW,start-cpu";
402 args[1] = 3;
403 args[2] = 0;
404 args[3] = (unsigned int) cpunode;
405 args[4] = pc;
406 args[5] = arg;
407 p1275_cmd_direct(args);
310} 408}
311 409
312void prom_startcpu_cpuid(int cpuid, unsigned long pc, unsigned long arg) 410void prom_startcpu_cpuid(int cpuid, unsigned long pc, unsigned long arg)
313{ 411{
314 p1275_cmd("SUNW,start-cpu-by-cpuid", P1275_INOUT(3, 0), 412 unsigned long args[6];
315 cpuid, pc, arg); 413
414 args[0] = (unsigned long) "SUNW,start-cpu-by-cpuid";
415 args[1] = 3;
416 args[2] = 0;
417 args[3] = (unsigned int) cpuid;
418 args[4] = pc;
419 args[5] = arg;
420 p1275_cmd_direct(args);
316} 421}
317 422
318void prom_stopcpu_cpuid(int cpuid) 423void prom_stopcpu_cpuid(int cpuid)
319{ 424{
320 p1275_cmd("SUNW,stop-cpu-by-cpuid", P1275_INOUT(1, 0), 425 unsigned long args[4];
321 cpuid); 426
427 args[0] = (unsigned long) "SUNW,stop-cpu-by-cpuid";
428 args[1] = 1;
429 args[2] = 0;
430 args[3] = (unsigned int) cpuid;
431 p1275_cmd_direct(args);
322} 432}
323 433
324void prom_stopself(void) 434void prom_stopself(void)
325{ 435{
326 p1275_cmd("SUNW,stop-self", P1275_INOUT(0, 0)); 436 unsigned long args[3];
437
438 args[0] = (unsigned long) "SUNW,stop-self";
439 args[1] = 0;
440 args[2] = 0;
441 p1275_cmd_direct(args);
327} 442}
328 443
329void prom_idleself(void) 444void prom_idleself(void)
330{ 445{
331 p1275_cmd("SUNW,idle-self", P1275_INOUT(0, 0)); 446 unsigned long args[3];
447
448 args[0] = (unsigned long) "SUNW,idle-self";
449 args[1] = 0;
450 args[2] = 0;
451 p1275_cmd_direct(args);
332} 452}
333 453
334void prom_resumecpu(int cpunode) 454void prom_resumecpu(int cpunode)
335{ 455{
336 p1275_cmd("SUNW,resume-cpu", P1275_INOUT(1, 0), cpunode); 456 unsigned long args[4];
457
458 args[0] = (unsigned long) "SUNW,resume-cpu";
459 args[1] = 1;
460 args[2] = 0;
461 args[3] = (unsigned int) cpunode;
462 p1275_cmd_direct(args);
337} 463}
338#endif 464#endif
diff --git a/arch/sparc/prom/p1275.c b/arch/sparc/prom/p1275.c
index 2d8b70d397f1..fa6e4e219b9c 100644
--- a/arch/sparc/prom/p1275.c
+++ b/arch/sparc/prom/p1275.c
@@ -22,13 +22,11 @@ struct {
22 long prom_callback; /* 0x00 */ 22 long prom_callback; /* 0x00 */
23 void (*prom_cif_handler)(long *); /* 0x08 */ 23 void (*prom_cif_handler)(long *); /* 0x08 */
24 unsigned long prom_cif_stack; /* 0x10 */ 24 unsigned long prom_cif_stack; /* 0x10 */
25 unsigned long prom_args [23]; /* 0x18 */
26 char prom_buffer [3000];
27} p1275buf; 25} p1275buf;
28 26
29extern void prom_world(int); 27extern void prom_world(int);
30 28
31extern void prom_cif_interface(void); 29extern void prom_cif_direct(unsigned long *args);
32extern void prom_cif_callback(void); 30extern void prom_cif_callback(void);
33 31
34/* 32/*
@@ -36,114 +34,20 @@ extern void prom_cif_callback(void);
36 */ 34 */
37DEFINE_RAW_SPINLOCK(prom_entry_lock); 35DEFINE_RAW_SPINLOCK(prom_entry_lock);
38 36
39long p1275_cmd(const char *service, long fmt, ...) 37void p1275_cmd_direct(unsigned long *args)
40{ 38{
41 char *p, *q;
42 unsigned long flags; 39 unsigned long flags;
43 int nargs, nrets, i;
44 va_list list;
45 long attrs, x;
46
47 p = p1275buf.prom_buffer;
48 40
49 raw_local_save_flags(flags); 41 raw_local_save_flags(flags);
50 raw_local_irq_restore(PIL_NMI); 42 raw_local_irq_restore(PIL_NMI);
51 raw_spin_lock(&prom_entry_lock); 43 raw_spin_lock(&prom_entry_lock);
52 44
53 p1275buf.prom_args[0] = (unsigned long)p; /* service */
54 strcpy (p, service);
55 p = (char *)(((long)(strchr (p, 0) + 8)) & ~7);
56 p1275buf.prom_args[1] = nargs = (fmt & 0x0f); /* nargs */
57 p1275buf.prom_args[2] = nrets = ((fmt & 0xf0) >> 4); /* nrets */
58 attrs = fmt >> 8;
59 va_start(list, fmt);
60 for (i = 0; i < nargs; i++, attrs >>= 3) {
61 switch (attrs & 0x7) {
62 case P1275_ARG_NUMBER:
63 p1275buf.prom_args[i + 3] =
64 (unsigned)va_arg(list, long);
65 break;
66 case P1275_ARG_IN_64B:
67 p1275buf.prom_args[i + 3] =
68 va_arg(list, unsigned long);
69 break;
70 case P1275_ARG_IN_STRING:
71 strcpy (p, va_arg(list, char *));
72 p1275buf.prom_args[i + 3] = (unsigned long)p;
73 p = (char *)(((long)(strchr (p, 0) + 8)) & ~7);
74 break;
75 case P1275_ARG_OUT_BUF:
76 (void) va_arg(list, char *);
77 p1275buf.prom_args[i + 3] = (unsigned long)p;
78 x = va_arg(list, long);
79 i++; attrs >>= 3;
80 p = (char *)(((long)(p + (int)x + 7)) & ~7);
81 p1275buf.prom_args[i + 3] = x;
82 break;
83 case P1275_ARG_IN_BUF:
84 q = va_arg(list, char *);
85 p1275buf.prom_args[i + 3] = (unsigned long)p;
86 x = va_arg(list, long);
87 i++; attrs >>= 3;
88 memcpy (p, q, (int)x);
89 p = (char *)(((long)(p + (int)x + 7)) & ~7);
90 p1275buf.prom_args[i + 3] = x;
91 break;
92 case P1275_ARG_OUT_32B:
93 (void) va_arg(list, char *);
94 p1275buf.prom_args[i + 3] = (unsigned long)p;
95 p += 32;
96 break;
97 case P1275_ARG_IN_FUNCTION:
98 p1275buf.prom_args[i + 3] =
99 (unsigned long)prom_cif_callback;
100 p1275buf.prom_callback = va_arg(list, long);
101 break;
102 }
103 }
104 va_end(list);
105
106 prom_world(1); 45 prom_world(1);
107 prom_cif_interface(); 46 prom_cif_direct(args);
108 prom_world(0); 47 prom_world(0);
109 48
110 attrs = fmt >> 8;
111 va_start(list, fmt);
112 for (i = 0; i < nargs; i++, attrs >>= 3) {
113 switch (attrs & 0x7) {
114 case P1275_ARG_NUMBER:
115 (void) va_arg(list, long);
116 break;
117 case P1275_ARG_IN_STRING:
118 (void) va_arg(list, char *);
119 break;
120 case P1275_ARG_IN_FUNCTION:
121 (void) va_arg(list, long);
122 break;
123 case P1275_ARG_IN_BUF:
124 (void) va_arg(list, char *);
125 (void) va_arg(list, long);
126 i++; attrs >>= 3;
127 break;
128 case P1275_ARG_OUT_BUF:
129 p = va_arg(list, char *);
130 x = va_arg(list, long);
131 memcpy (p, (char *)(p1275buf.prom_args[i + 3]), (int)x);
132 i++; attrs >>= 3;
133 break;
134 case P1275_ARG_OUT_32B:
135 p = va_arg(list, char *);
136 memcpy (p, (char *)(p1275buf.prom_args[i + 3]), 32);
137 break;
138 }
139 }
140 va_end(list);
141 x = p1275buf.prom_args [nargs + 3];
142
143 raw_spin_unlock(&prom_entry_lock); 49 raw_spin_unlock(&prom_entry_lock);
144 raw_local_irq_restore(flags); 50 raw_local_irq_restore(flags);
145
146 return x;
147} 51}
148 52
149void prom_cif_init(void *cif_handler, void *cif_stack) 53void prom_cif_init(void *cif_handler, void *cif_stack)
diff --git a/arch/sparc/prom/tree_64.c b/arch/sparc/prom/tree_64.c
index 3c0d2dd9f693..9d3f9137a43a 100644
--- a/arch/sparc/prom/tree_64.c
+++ b/arch/sparc/prom/tree_64.c
@@ -16,22 +16,39 @@
16#include <asm/oplib.h> 16#include <asm/oplib.h>
17#include <asm/ldc.h> 17#include <asm/ldc.h>
18 18
19static int prom_node_to_node(const char *type, int node)
20{
21 unsigned long args[5];
22
23 args[0] = (unsigned long) type;
24 args[1] = 1;
25 args[2] = 1;
26 args[3] = (unsigned int) node;
27 args[4] = (unsigned long) -1;
28
29 p1275_cmd_direct(args);
30
31 return (int) args[4];
32}
33
19/* Return the child of node 'node' or zero if no this node has no 34/* Return the child of node 'node' or zero if no this node has no
20 * direct descendent. 35 * direct descendent.
21 */ 36 */
22inline int __prom_getchild(int node) 37inline int __prom_getchild(int node)
23{ 38{
24 return p1275_cmd ("child", P1275_INOUT(1, 1), node); 39 return prom_node_to_node("child", node);
25} 40}
26 41
27inline int prom_getchild(int node) 42inline int prom_getchild(int node)
28{ 43{
29 int cnode; 44 int cnode;
30 45
31 if(node == -1) return 0; 46 if (node == -1)
47 return 0;
32 cnode = __prom_getchild(node); 48 cnode = __prom_getchild(node);
33 if(cnode == -1) return 0; 49 if (cnode == -1)
34 return (int)cnode; 50 return 0;
51 return cnode;
35} 52}
36EXPORT_SYMBOL(prom_getchild); 53EXPORT_SYMBOL(prom_getchild);
37 54
@@ -39,10 +56,12 @@ inline int prom_getparent(int node)
39{ 56{
40 int cnode; 57 int cnode;
41 58
42 if(node == -1) return 0; 59 if (node == -1)
43 cnode = p1275_cmd ("parent", P1275_INOUT(1, 1), node); 60 return 0;
44 if(cnode == -1) return 0; 61 cnode = prom_node_to_node("parent", node);
45 return (int)cnode; 62 if (cnode == -1)
63 return 0;
64 return cnode;
46} 65}
47 66
48/* Return the next sibling of node 'node' or zero if no more siblings 67/* Return the next sibling of node 'node' or zero if no more siblings
@@ -50,7 +69,7 @@ inline int prom_getparent(int node)
50 */ 69 */
51inline int __prom_getsibling(int node) 70inline int __prom_getsibling(int node)
52{ 71{
53 return p1275_cmd(prom_peer_name, P1275_INOUT(1, 1), node); 72 return prom_node_to_node(prom_peer_name, node);
54} 73}
55 74
56inline int prom_getsibling(int node) 75inline int prom_getsibling(int node)
@@ -72,11 +91,21 @@ EXPORT_SYMBOL(prom_getsibling);
72 */ 91 */
73inline int prom_getproplen(int node, const char *prop) 92inline int prom_getproplen(int node, const char *prop)
74{ 93{
75 if((!node) || (!prop)) return -1; 94 unsigned long args[6];
76 return p1275_cmd ("getproplen", 95
77 P1275_ARG(1,P1275_ARG_IN_STRING)| 96 if (!node || !prop)
78 P1275_INOUT(2, 1), 97 return -1;
79 node, prop); 98
99 args[0] = (unsigned long) "getproplen";
100 args[1] = 2;
101 args[2] = 1;
102 args[3] = (unsigned int) node;
103 args[4] = (unsigned long) prop;
104 args[5] = (unsigned long) -1;
105
106 p1275_cmd_direct(args);
107
108 return (int) args[5];
80} 109}
81EXPORT_SYMBOL(prom_getproplen); 110EXPORT_SYMBOL(prom_getproplen);
82 111
@@ -87,19 +116,25 @@ EXPORT_SYMBOL(prom_getproplen);
87inline int prom_getproperty(int node, const char *prop, 116inline int prom_getproperty(int node, const char *prop,
88 char *buffer, int bufsize) 117 char *buffer, int bufsize)
89{ 118{
119 unsigned long args[8];
90 int plen; 120 int plen;
91 121
92 plen = prom_getproplen(node, prop); 122 plen = prom_getproplen(node, prop);
93 if ((plen > bufsize) || (plen == 0) || (plen == -1)) { 123 if ((plen > bufsize) || (plen == 0) || (plen == -1))
94 return -1; 124 return -1;
95 } else { 125
96 /* Ok, things seem all right. */ 126 args[0] = (unsigned long) prom_getprop_name;
97 return p1275_cmd(prom_getprop_name, 127 args[1] = 4;
98 P1275_ARG(1,P1275_ARG_IN_STRING)| 128 args[2] = 1;
99 P1275_ARG(2,P1275_ARG_OUT_BUF)| 129 args[3] = (unsigned int) node;
100 P1275_INOUT(4, 1), 130 args[4] = (unsigned long) prop;
101 node, prop, buffer, P1275_SIZE(plen)); 131 args[5] = (unsigned long) buffer;
102 } 132 args[6] = bufsize;
133 args[7] = (unsigned long) -1;
134
135 p1275_cmd_direct(args);
136
137 return (int) args[7];
103} 138}
104EXPORT_SYMBOL(prom_getproperty); 139EXPORT_SYMBOL(prom_getproperty);
105 140
@@ -110,7 +145,7 @@ inline int prom_getint(int node, const char *prop)
110{ 145{
111 int intprop; 146 int intprop;
112 147
113 if(prom_getproperty(node, prop, (char *) &intprop, sizeof(int)) != -1) 148 if (prom_getproperty(node, prop, (char *) &intprop, sizeof(int)) != -1)
114 return intprop; 149 return intprop;
115 150
116 return -1; 151 return -1;
@@ -126,7 +161,8 @@ int prom_getintdefault(int node, const char *property, int deflt)
126 int retval; 161 int retval;
127 162
128 retval = prom_getint(node, property); 163 retval = prom_getint(node, property);
129 if(retval == -1) return deflt; 164 if (retval == -1)
165 return deflt;
130 166
131 return retval; 167 return retval;
132} 168}
@@ -138,7 +174,8 @@ int prom_getbool(int node, const char *prop)
138 int retval; 174 int retval;
139 175
140 retval = prom_getproplen(node, prop); 176 retval = prom_getproplen(node, prop);
141 if(retval == -1) return 0; 177 if (retval == -1)
178 return 0;
142 return 1; 179 return 1;
143} 180}
144EXPORT_SYMBOL(prom_getbool); 181EXPORT_SYMBOL(prom_getbool);
@@ -152,7 +189,8 @@ void prom_getstring(int node, const char *prop, char *user_buf, int ubuf_size)
152 int len; 189 int len;
153 190
154 len = prom_getproperty(node, prop, user_buf, ubuf_size); 191 len = prom_getproperty(node, prop, user_buf, ubuf_size);
155 if(len != -1) return; 192 if (len != -1)
193 return;
156 user_buf[0] = 0; 194 user_buf[0] = 0;
157} 195}
158EXPORT_SYMBOL(prom_getstring); 196EXPORT_SYMBOL(prom_getstring);
@@ -164,7 +202,8 @@ int prom_nodematch(int node, const char *name)
164{ 202{
165 char namebuf[128]; 203 char namebuf[128];
166 prom_getproperty(node, "name", namebuf, sizeof(namebuf)); 204 prom_getproperty(node, "name", namebuf, sizeof(namebuf));
167 if(strcmp(namebuf, name) == 0) return 1; 205 if (strcmp(namebuf, name) == 0)
206 return 1;
168 return 0; 207 return 0;
169} 208}
170 209
@@ -190,16 +229,29 @@ int prom_searchsiblings(int node_start, const char *nodename)
190} 229}
191EXPORT_SYMBOL(prom_searchsiblings); 230EXPORT_SYMBOL(prom_searchsiblings);
192 231
232static const char *prom_nextprop_name = "nextprop";
233
193/* Return the first property type for node 'node'. 234/* Return the first property type for node 'node'.
194 * buffer should be at least 32B in length 235 * buffer should be at least 32B in length
195 */ 236 */
196inline char *prom_firstprop(int node, char *buffer) 237inline char *prom_firstprop(int node, char *buffer)
197{ 238{
239 unsigned long args[7];
240
198 *buffer = 0; 241 *buffer = 0;
199 if(node == -1) return buffer; 242 if (node == -1)
200 p1275_cmd ("nextprop", P1275_ARG(2,P1275_ARG_OUT_32B)| 243 return buffer;
201 P1275_INOUT(3, 0), 244
202 node, (char *) 0x0, buffer); 245 args[0] = (unsigned long) prom_nextprop_name;
246 args[1] = 3;
247 args[2] = 1;
248 args[3] = (unsigned int) node;
249 args[4] = 0;
250 args[5] = (unsigned long) buffer;
251 args[6] = (unsigned long) -1;
252
253 p1275_cmd_direct(args);
254
203 return buffer; 255 return buffer;
204} 256}
205EXPORT_SYMBOL(prom_firstprop); 257EXPORT_SYMBOL(prom_firstprop);
@@ -210,9 +262,10 @@ EXPORT_SYMBOL(prom_firstprop);
210 */ 262 */
211inline char *prom_nextprop(int node, const char *oprop, char *buffer) 263inline char *prom_nextprop(int node, const char *oprop, char *buffer)
212{ 264{
265 unsigned long args[7];
213 char buf[32]; 266 char buf[32];
214 267
215 if(node == -1) { 268 if (node == -1) {
216 *buffer = 0; 269 *buffer = 0;
217 return buffer; 270 return buffer;
218 } 271 }
@@ -220,10 +273,17 @@ inline char *prom_nextprop(int node, const char *oprop, char *buffer)
220 strcpy (buf, oprop); 273 strcpy (buf, oprop);
221 oprop = buf; 274 oprop = buf;
222 } 275 }
223 p1275_cmd ("nextprop", P1275_ARG(1,P1275_ARG_IN_STRING)| 276
224 P1275_ARG(2,P1275_ARG_OUT_32B)| 277 args[0] = (unsigned long) prom_nextprop_name;
225 P1275_INOUT(3, 0), 278 args[1] = 3;
226 node, oprop, buffer); 279 args[2] = 1;
280 args[3] = (unsigned int) node;
281 args[4] = (unsigned long) oprop;
282 args[5] = (unsigned long) buffer;
283 args[6] = (unsigned long) -1;
284
285 p1275_cmd_direct(args);
286
227 return buffer; 287 return buffer;
228} 288}
229EXPORT_SYMBOL(prom_nextprop); 289EXPORT_SYMBOL(prom_nextprop);
@@ -231,12 +291,19 @@ EXPORT_SYMBOL(prom_nextprop);
231int 291int
232prom_finddevice(const char *name) 292prom_finddevice(const char *name)
233{ 293{
294 unsigned long args[5];
295
234 if (!name) 296 if (!name)
235 return 0; 297 return 0;
236 return p1275_cmd(prom_finddev_name, 298 args[0] = (unsigned long) "finddevice";
237 P1275_ARG(0,P1275_ARG_IN_STRING)| 299 args[1] = 1;
238 P1275_INOUT(1, 1), 300 args[2] = 1;
239 name); 301 args[3] = (unsigned long) name;
302 args[4] = (unsigned long) -1;
303
304 p1275_cmd_direct(args);
305
306 return (int) args[4];
240} 307}
241EXPORT_SYMBOL(prom_finddevice); 308EXPORT_SYMBOL(prom_finddevice);
242 309
@@ -247,7 +314,7 @@ int prom_node_has_property(int node, const char *prop)
247 *buf = 0; 314 *buf = 0;
248 do { 315 do {
249 prom_nextprop(node, buf, buf); 316 prom_nextprop(node, buf, buf);
250 if(!strcmp(buf, prop)) 317 if (!strcmp(buf, prop))
251 return 1; 318 return 1;
252 } while (*buf); 319 } while (*buf);
253 return 0; 320 return 0;
@@ -260,6 +327,8 @@ EXPORT_SYMBOL(prom_node_has_property);
260int 327int
261prom_setprop(int node, const char *pname, char *value, int size) 328prom_setprop(int node, const char *pname, char *value, int size)
262{ 329{
330 unsigned long args[8];
331
263 if (size == 0) 332 if (size == 0)
264 return 0; 333 return 0;
265 if ((pname == 0) || (value == 0)) 334 if ((pname == 0) || (value == 0))
@@ -271,19 +340,37 @@ prom_setprop(int node, const char *pname, char *value, int size)
271 return 0; 340 return 0;
272 } 341 }
273#endif 342#endif
274 return p1275_cmd ("setprop", P1275_ARG(1,P1275_ARG_IN_STRING)| 343 args[0] = (unsigned long) "setprop";
275 P1275_ARG(2,P1275_ARG_IN_BUF)| 344 args[1] = 4;
276 P1275_INOUT(4, 1), 345 args[2] = 1;
277 node, pname, value, P1275_SIZE(size)); 346 args[3] = (unsigned int) node;
347 args[4] = (unsigned long) pname;
348 args[5] = (unsigned long) value;
349 args[6] = size;
350 args[7] = (unsigned long) -1;
351
352 p1275_cmd_direct(args);
353
354 return (int) args[7];
278} 355}
279EXPORT_SYMBOL(prom_setprop); 356EXPORT_SYMBOL(prom_setprop);
280 357
281inline int prom_inst2pkg(int inst) 358inline int prom_inst2pkg(int inst)
282{ 359{
360 unsigned long args[5];
283 int node; 361 int node;
284 362
285 node = p1275_cmd ("instance-to-package", P1275_INOUT(1, 1), inst); 363 args[0] = (unsigned long) "instance-to-package";
286 if (node == -1) return 0; 364 args[1] = 1;
365 args[2] = 1;
366 args[3] = (unsigned int) inst;
367 args[4] = (unsigned long) -1;
368
369 p1275_cmd_direct(args);
370
371 node = (int) args[4];
372 if (node == -1)
373 return 0;
287 return node; 374 return node;
288} 375}
289 376
@@ -296,17 +383,28 @@ prom_pathtoinode(const char *path)
296 int node, inst; 383 int node, inst;
297 384
298 inst = prom_devopen (path); 385 inst = prom_devopen (path);
299 if (inst == 0) return 0; 386 if (inst == 0)
300 node = prom_inst2pkg (inst); 387 return 0;
301 prom_devclose (inst); 388 node = prom_inst2pkg(inst);
302 if (node == -1) return 0; 389 prom_devclose(inst);
390 if (node == -1)
391 return 0;
303 return node; 392 return node;
304} 393}
305 394
306int prom_ihandle2path(int handle, char *buffer, int bufsize) 395int prom_ihandle2path(int handle, char *buffer, int bufsize)
307{ 396{
308 return p1275_cmd("instance-to-path", 397 unsigned long args[7];
309 P1275_ARG(1,P1275_ARG_OUT_BUF)| 398
310 P1275_INOUT(3, 1), 399 args[0] = (unsigned long) "instance-to-path";
311 handle, buffer, P1275_SIZE(bufsize)); 400 args[1] = 3;
401 args[2] = 1;
402 args[3] = (unsigned int) handle;
403 args[4] = (unsigned long) buffer;
404 args[5] = bufsize;
405 args[6] = (unsigned long) -1;
406
407 p1275_cmd_direct(args);
408
409 return (int) args[6];
312} 410}
diff --git a/arch/um/drivers/mconsole_kern.c b/arch/um/drivers/mconsole_kern.c
index de317d0c3294..ebc680717e59 100644
--- a/arch/um/drivers/mconsole_kern.c
+++ b/arch/um/drivers/mconsole_kern.c
@@ -690,7 +690,7 @@ static void with_console(struct mc_request *req, void (*proc)(void *),
690static void sysrq_proc(void *arg) 690static void sysrq_proc(void *arg)
691{ 691{
692 char *op = arg; 692 char *op = arg;
693 handle_sysrq(*op, NULL); 693 handle_sysrq(*op);
694} 694}
695 695
696void mconsole_sysrq(struct mc_request *req) 696void mconsole_sysrq(struct mc_request *req)
diff --git a/arch/x86/include/asm/iomap.h b/arch/x86/include/asm/iomap.h
index f35eb45d6576..c4191b3b7056 100644
--- a/arch/x86/include/asm/iomap.h
+++ b/arch/x86/include/asm/iomap.h
@@ -26,11 +26,11 @@
26#include <asm/pgtable.h> 26#include <asm/pgtable.h>
27#include <asm/tlbflush.h> 27#include <asm/tlbflush.h>
28 28
29void * 29void __iomem *
30iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot); 30iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot);
31 31
32void 32void
33iounmap_atomic(void *kvaddr, enum km_type type); 33iounmap_atomic(void __iomem *kvaddr, enum km_type type);
34 34
35int 35int
36iomap_create_wc(resource_size_t base, unsigned long size, pgprot_t *prot); 36iomap_create_wc(resource_size_t base, unsigned long size, pgprot_t *prot);
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 404a880ea325..d395540ff894 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -27,6 +27,9 @@ extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops,
27 int node); 27 int node);
28extern struct pci_bus *pci_scan_bus_with_sysdata(int busno); 28extern struct pci_bus *pci_scan_bus_with_sysdata(int busno);
29 29
30#ifdef CONFIG_PCI
31
32#ifdef CONFIG_PCI_DOMAINS
30static inline int pci_domain_nr(struct pci_bus *bus) 33static inline int pci_domain_nr(struct pci_bus *bus)
31{ 34{
32 struct pci_sysdata *sd = bus->sysdata; 35 struct pci_sysdata *sd = bus->sysdata;
@@ -37,13 +40,12 @@ static inline int pci_proc_domain(struct pci_bus *bus)
37{ 40{
38 return pci_domain_nr(bus); 41 return pci_domain_nr(bus);
39} 42}
40 43#endif
41 44
42/* Can be used to override the logic in pci_scan_bus for skipping 45/* Can be used to override the logic in pci_scan_bus for skipping
43 already-configured bus numbers - to be used for buggy BIOSes 46 already-configured bus numbers - to be used for buggy BIOSes
44 or architectures with incomplete PCI setup by the loader */ 47 or architectures with incomplete PCI setup by the loader */
45 48
46#ifdef CONFIG_PCI
47extern unsigned int pcibios_assign_all_busses(void); 49extern unsigned int pcibios_assign_all_busses(void);
48extern int pci_legacy_init(void); 50extern int pci_legacy_init(void);
49# ifdef CONFIG_ACPI 51# ifdef CONFIG_ACPI
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index c0427295e8f5..1ca132fc0d03 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -59,5 +59,7 @@ extern void check_tsc_sync_source(int cpu);
59extern void check_tsc_sync_target(void); 59extern void check_tsc_sync_target(void);
60 60
61extern int notsc_setup(char *); 61extern int notsc_setup(char *);
62extern void save_sched_clock_state(void);
63extern void restore_sched_clock_state(void);
62 64
63#endif /* _ASM_X86_TSC_H */ 65#endif /* _ASM_X86_TSC_H */
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 224392d8fe8c..5e975298fa81 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -530,7 +530,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
530 err = -ENOMEM; 530 err = -ENOMEM;
531 goto out; 531 goto out;
532 } 532 }
533 if (!alloc_cpumask_var(&b->cpus, GFP_KERNEL)) { 533 if (!zalloc_cpumask_var(&b->cpus, GFP_KERNEL)) {
534 kfree(b); 534 kfree(b);
535 err = -ENOMEM; 535 err = -ENOMEM;
536 goto out; 536 goto out;
@@ -543,7 +543,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
543#ifndef CONFIG_SMP 543#ifndef CONFIG_SMP
544 cpumask_setall(b->cpus); 544 cpumask_setall(b->cpus);
545#else 545#else
546 cpumask_copy(b->cpus, c->llc_shared_map); 546 cpumask_set_cpu(cpu, b->cpus);
547#endif 547#endif
548 548
549 per_cpu(threshold_banks, cpu)[bank] = b; 549 per_cpu(threshold_banks, cpu)[bank] = b;
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index c2a8b26d4fea..d9368eeda309 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -202,10 +202,11 @@ static int therm_throt_process(bool new_event, int event, int level)
202 202
203#ifdef CONFIG_SYSFS 203#ifdef CONFIG_SYSFS
204/* Add/Remove thermal_throttle interface for CPU device: */ 204/* Add/Remove thermal_throttle interface for CPU device: */
205static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev) 205static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev,
206 unsigned int cpu)
206{ 207{
207 int err; 208 int err;
208 struct cpuinfo_x86 *c = &cpu_data(smp_processor_id()); 209 struct cpuinfo_x86 *c = &cpu_data(cpu);
209 210
210 err = sysfs_create_group(&sys_dev->kobj, &thermal_attr_group); 211 err = sysfs_create_group(&sys_dev->kobj, &thermal_attr_group);
211 if (err) 212 if (err)
@@ -251,7 +252,7 @@ thermal_throttle_cpu_callback(struct notifier_block *nfb,
251 case CPU_UP_PREPARE: 252 case CPU_UP_PREPARE:
252 case CPU_UP_PREPARE_FROZEN: 253 case CPU_UP_PREPARE_FROZEN:
253 mutex_lock(&therm_cpu_lock); 254 mutex_lock(&therm_cpu_lock);
254 err = thermal_throttle_add_dev(sys_dev); 255 err = thermal_throttle_add_dev(sys_dev, cpu);
255 mutex_unlock(&therm_cpu_lock); 256 mutex_unlock(&therm_cpu_lock);
256 WARN_ON(err); 257 WARN_ON(err);
257 break; 258 break;
@@ -287,7 +288,7 @@ static __init int thermal_throttle_init_device(void)
287#endif 288#endif
288 /* connect live CPUs to sysfs */ 289 /* connect live CPUs to sysfs */
289 for_each_online_cpu(cpu) { 290 for_each_online_cpu(cpu) {
290 err = thermal_throttle_add_dev(get_cpu_sysdev(cpu)); 291 err = thermal_throttle_add_dev(get_cpu_sysdev(cpu), cpu);
291 WARN_ON(err); 292 WARN_ON(err);
292 } 293 }
293#ifdef CONFIG_HOTPLUG_CPU 294#ifdef CONFIG_HOTPLUG_CPU
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index f2da20fda02d..3efdf2870a35 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1154,7 +1154,7 @@ static int x86_pmu_handle_irq(struct pt_regs *regs)
1154 /* 1154 /*
1155 * event overflow 1155 * event overflow
1156 */ 1156 */
1157 handled = 1; 1157 handled++;
1158 data.period = event->hw.last_period; 1158 data.period = event->hw.last_period;
1159 1159
1160 if (!x86_perf_event_set_period(event)) 1160 if (!x86_perf_event_set_period(event))
@@ -1200,12 +1200,20 @@ void perf_events_lapic_init(void)
1200 apic_write(APIC_LVTPC, APIC_DM_NMI); 1200 apic_write(APIC_LVTPC, APIC_DM_NMI);
1201} 1201}
1202 1202
1203struct pmu_nmi_state {
1204 unsigned int marked;
1205 int handled;
1206};
1207
1208static DEFINE_PER_CPU(struct pmu_nmi_state, pmu_nmi);
1209
1203static int __kprobes 1210static int __kprobes
1204perf_event_nmi_handler(struct notifier_block *self, 1211perf_event_nmi_handler(struct notifier_block *self,
1205 unsigned long cmd, void *__args) 1212 unsigned long cmd, void *__args)
1206{ 1213{
1207 struct die_args *args = __args; 1214 struct die_args *args = __args;
1208 struct pt_regs *regs; 1215 unsigned int this_nmi;
1216 int handled;
1209 1217
1210 if (!atomic_read(&active_events)) 1218 if (!atomic_read(&active_events))
1211 return NOTIFY_DONE; 1219 return NOTIFY_DONE;
@@ -1214,22 +1222,47 @@ perf_event_nmi_handler(struct notifier_block *self,
1214 case DIE_NMI: 1222 case DIE_NMI:
1215 case DIE_NMI_IPI: 1223 case DIE_NMI_IPI:
1216 break; 1224 break;
1217 1225 case DIE_NMIUNKNOWN:
1226 this_nmi = percpu_read(irq_stat.__nmi_count);
1227 if (this_nmi != __get_cpu_var(pmu_nmi).marked)
1228 /* let the kernel handle the unknown nmi */
1229 return NOTIFY_DONE;
1230 /*
1231 * This one is a PMU back-to-back nmi. Two events
1232 * trigger 'simultaneously' raising two back-to-back
1233 * NMIs. If the first NMI handles both, the latter
1234 * will be empty and daze the CPU. So, we drop it to
1235 * avoid false-positive 'unknown nmi' messages.
1236 */
1237 return NOTIFY_STOP;
1218 default: 1238 default:
1219 return NOTIFY_DONE; 1239 return NOTIFY_DONE;
1220 } 1240 }
1221 1241
1222 regs = args->regs;
1223
1224 apic_write(APIC_LVTPC, APIC_DM_NMI); 1242 apic_write(APIC_LVTPC, APIC_DM_NMI);
1225 /* 1243
1226 * Can't rely on the handled return value to say it was our NMI, two 1244 handled = x86_pmu.handle_irq(args->regs);
1227 * events could trigger 'simultaneously' raising two back-to-back NMIs. 1245 if (!handled)
1228 * 1246 return NOTIFY_DONE;
1229 * If the first NMI handles both, the latter will be empty and daze 1247
1230 * the CPU. 1248 this_nmi = percpu_read(irq_stat.__nmi_count);
1231 */ 1249 if ((handled > 1) ||
1232 x86_pmu.handle_irq(regs); 1250 /* the next nmi could be a back-to-back nmi */
1251 ((__get_cpu_var(pmu_nmi).marked == this_nmi) &&
1252 (__get_cpu_var(pmu_nmi).handled > 1))) {
1253 /*
1254 * We could have two subsequent back-to-back nmis: The
1255 * first handles more than one counter, the 2nd
1256 * handles only one counter and the 3rd handles no
1257 * counter.
1258 *
1259 * This is the 2nd nmi because the previous was
1260 * handling more than one counter. We will mark the
1261 * next (3rd) and then drop it if unhandled.
1262 */
1263 __get_cpu_var(pmu_nmi).marked = this_nmi + 1;
1264 __get_cpu_var(pmu_nmi).handled = handled;
1265 }
1233 1266
1234 return NOTIFY_STOP; 1267 return NOTIFY_STOP;
1235} 1268}
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index d8d86d014008..ee05c90012d2 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -712,7 +712,8 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
712 struct perf_sample_data data; 712 struct perf_sample_data data;
713 struct cpu_hw_events *cpuc; 713 struct cpu_hw_events *cpuc;
714 int bit, loops; 714 int bit, loops;
715 u64 ack, status; 715 u64 status;
716 int handled = 0;
716 717
717 perf_sample_data_init(&data, 0); 718 perf_sample_data_init(&data, 0);
718 719
@@ -728,6 +729,7 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
728 729
729 loops = 0; 730 loops = 0;
730again: 731again:
732 intel_pmu_ack_status(status);
731 if (++loops > 100) { 733 if (++loops > 100) {
732 WARN_ONCE(1, "perfevents: irq loop stuck!\n"); 734 WARN_ONCE(1, "perfevents: irq loop stuck!\n");
733 perf_event_print_debug(); 735 perf_event_print_debug();
@@ -736,19 +738,22 @@ again:
736 } 738 }
737 739
738 inc_irq_stat(apic_perf_irqs); 740 inc_irq_stat(apic_perf_irqs);
739 ack = status;
740 741
741 intel_pmu_lbr_read(); 742 intel_pmu_lbr_read();
742 743
743 /* 744 /*
744 * PEBS overflow sets bit 62 in the global status register 745 * PEBS overflow sets bit 62 in the global status register
745 */ 746 */
746 if (__test_and_clear_bit(62, (unsigned long *)&status)) 747 if (__test_and_clear_bit(62, (unsigned long *)&status)) {
748 handled++;
747 x86_pmu.drain_pebs(regs); 749 x86_pmu.drain_pebs(regs);
750 }
748 751
749 for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) { 752 for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
750 struct perf_event *event = cpuc->events[bit]; 753 struct perf_event *event = cpuc->events[bit];
751 754
755 handled++;
756
752 if (!test_bit(bit, cpuc->active_mask)) 757 if (!test_bit(bit, cpuc->active_mask))
753 continue; 758 continue;
754 759
@@ -761,8 +766,6 @@ again:
761 x86_pmu_stop(event); 766 x86_pmu_stop(event);
762 } 767 }
763 768
764 intel_pmu_ack_status(ack);
765
766 /* 769 /*
767 * Repeat if there is more work to be done: 770 * Repeat if there is more work to be done:
768 */ 771 */
@@ -772,7 +775,7 @@ again:
772 775
773done: 776done:
774 intel_pmu_enable_all(0); 777 intel_pmu_enable_all(0);
775 return 1; 778 return handled;
776} 779}
777 780
778static struct event_constraint * 781static struct event_constraint *
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index febb12cea795..b560db3305be 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -497,6 +497,8 @@ static int p4_hw_config(struct perf_event *event)
497 event->hw.config |= event->attr.config & 497 event->hw.config |= event->attr.config &
498 (p4_config_pack_escr(P4_ESCR_MASK_HT) | 498 (p4_config_pack_escr(P4_ESCR_MASK_HT) |
499 p4_config_pack_cccr(P4_CCCR_MASK_HT | P4_CCCR_RESERVED)); 499 p4_config_pack_cccr(P4_CCCR_MASK_HT | P4_CCCR_RESERVED));
500
501 event->hw.config &= ~P4_CCCR_FORCE_OVF;
500 } 502 }
501 503
502 rc = x86_setup_perfctr(event); 504 rc = x86_setup_perfctr(event);
@@ -690,7 +692,7 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
690 inc_irq_stat(apic_perf_irqs); 692 inc_irq_stat(apic_perf_irqs);
691 } 693 }
692 694
693 return handled > 0; 695 return handled;
694} 696}
695 697
696/* 698/*
diff --git a/arch/x86/kernel/trampoline.c b/arch/x86/kernel/trampoline.c
index a874495b3673..e2a595257390 100644
--- a/arch/x86/kernel/trampoline.c
+++ b/arch/x86/kernel/trampoline.c
@@ -45,8 +45,7 @@ void __init setup_trampoline_page_table(void)
45 /* Copy kernel address range */ 45 /* Copy kernel address range */
46 clone_pgd_range(trampoline_pg_dir + KERNEL_PGD_BOUNDARY, 46 clone_pgd_range(trampoline_pg_dir + KERNEL_PGD_BOUNDARY,
47 swapper_pg_dir + KERNEL_PGD_BOUNDARY, 47 swapper_pg_dir + KERNEL_PGD_BOUNDARY,
48 min_t(unsigned long, KERNEL_PGD_PTRS, 48 KERNEL_PGD_PTRS);
49 KERNEL_PGD_BOUNDARY));
50 49
51 /* Initialize low mappings */ 50 /* Initialize low mappings */
52 clone_pgd_range(trampoline_pg_dir, 51 clone_pgd_range(trampoline_pg_dir,
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index ce8e50239332..d632934cb638 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -626,6 +626,44 @@ static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
626 local_irq_restore(flags); 626 local_irq_restore(flags);
627} 627}
628 628
629static unsigned long long cyc2ns_suspend;
630
631void save_sched_clock_state(void)
632{
633 if (!sched_clock_stable)
634 return;
635
636 cyc2ns_suspend = sched_clock();
637}
638
639/*
640 * Even on processors with invariant TSC, TSC gets reset in some the
641 * ACPI system sleep states. And in some systems BIOS seem to reinit TSC to
642 * arbitrary value (still sync'd across cpu's) during resume from such sleep
643 * states. To cope up with this, recompute the cyc2ns_offset for each cpu so
644 * that sched_clock() continues from the point where it was left off during
645 * suspend.
646 */
647void restore_sched_clock_state(void)
648{
649 unsigned long long offset;
650 unsigned long flags;
651 int cpu;
652
653 if (!sched_clock_stable)
654 return;
655
656 local_irq_save(flags);
657
658 get_cpu_var(cyc2ns_offset) = 0;
659 offset = cyc2ns_suspend - sched_clock();
660
661 for_each_possible_cpu(cpu)
662 per_cpu(cyc2ns_offset, cpu) = offset;
663
664 local_irq_restore(flags);
665}
666
629#ifdef CONFIG_CPU_FREQ 667#ifdef CONFIG_CPU_FREQ
630 668
631/* Frequency scaling support. Adjust the TSC based timer when the cpu frequency 669/* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
diff --git a/arch/x86/mm/iomap_32.c b/arch/x86/mm/iomap_32.c
index 84e236ce76ba..72fc70cf6184 100644
--- a/arch/x86/mm/iomap_32.c
+++ b/arch/x86/mm/iomap_32.c
@@ -74,7 +74,7 @@ void *kmap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot)
74/* 74/*
75 * Map 'pfn' using fixed map 'type' and protections 'prot' 75 * Map 'pfn' using fixed map 'type' and protections 'prot'
76 */ 76 */
77void * 77void __iomem *
78iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot) 78iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot)
79{ 79{
80 /* 80 /*
@@ -86,12 +86,12 @@ iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot)
86 if (!pat_enabled && pgprot_val(prot) == pgprot_val(PAGE_KERNEL_WC)) 86 if (!pat_enabled && pgprot_val(prot) == pgprot_val(PAGE_KERNEL_WC))
87 prot = PAGE_KERNEL_UC_MINUS; 87 prot = PAGE_KERNEL_UC_MINUS;
88 88
89 return kmap_atomic_prot_pfn(pfn, type, prot); 89 return (void __force __iomem *) kmap_atomic_prot_pfn(pfn, type, prot);
90} 90}
91EXPORT_SYMBOL_GPL(iomap_atomic_prot_pfn); 91EXPORT_SYMBOL_GPL(iomap_atomic_prot_pfn);
92 92
93void 93void
94iounmap_atomic(void *kvaddr, enum km_type type) 94iounmap_atomic(void __iomem *kvaddr, enum km_type type)
95{ 95{
96 unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK; 96 unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
97 enum fixed_addresses idx = type + KM_TYPE_NR*smp_processor_id(); 97 enum fixed_addresses idx = type + KM_TYPE_NR*smp_processor_id();
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index f6b48f6c5951..cfe4faabb0f6 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -568,8 +568,13 @@ static int __init init_sysfs(void)
568 int error; 568 int error;
569 569
570 error = sysdev_class_register(&oprofile_sysclass); 570 error = sysdev_class_register(&oprofile_sysclass);
571 if (!error) 571 if (error)
572 error = sysdev_register(&device_oprofile); 572 return error;
573
574 error = sysdev_register(&device_oprofile);
575 if (error)
576 sysdev_class_unregister(&oprofile_sysclass);
577
573 return error; 578 return error;
574} 579}
575 580
@@ -580,8 +585,10 @@ static void exit_sysfs(void)
580} 585}
581 586
582#else 587#else
583#define init_sysfs() do { } while (0) 588
584#define exit_sysfs() do { } while (0) 589static inline int init_sysfs(void) { return 0; }
590static inline void exit_sysfs(void) { }
591
585#endif /* CONFIG_PM */ 592#endif /* CONFIG_PM */
586 593
587static int __init p4_init(char **cpu_type) 594static int __init p4_init(char **cpu_type)
@@ -695,6 +702,8 @@ int __init op_nmi_init(struct oprofile_operations *ops)
695 char *cpu_type = NULL; 702 char *cpu_type = NULL;
696 int ret = 0; 703 int ret = 0;
697 704
705 using_nmi = 0;
706
698 if (!cpu_has_apic) 707 if (!cpu_has_apic)
699 return -ENODEV; 708 return -ENODEV;
700 709
@@ -774,7 +783,10 @@ int __init op_nmi_init(struct oprofile_operations *ops)
774 783
775 mux_init(ops); 784 mux_init(ops);
776 785
777 init_sysfs(); 786 ret = init_sysfs();
787 if (ret)
788 return ret;
789
778 using_nmi = 1; 790 using_nmi = 1;
779 printk(KERN_INFO "oprofile: using NMI interrupt.\n"); 791 printk(KERN_INFO "oprofile: using NMI interrupt.\n");
780 return 0; 792 return 0;
diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c
index e7e8c5f54956..87bb35e34ef1 100644
--- a/arch/x86/power/cpu.c
+++ b/arch/x86/power/cpu.c
@@ -113,6 +113,7 @@ static void __save_processor_state(struct saved_context *ctxt)
113void save_processor_state(void) 113void save_processor_state(void)
114{ 114{
115 __save_processor_state(&saved_context); 115 __save_processor_state(&saved_context);
116 save_sched_clock_state();
116} 117}
117#ifdef CONFIG_X86_32 118#ifdef CONFIG_X86_32
118EXPORT_SYMBOL(save_processor_state); 119EXPORT_SYMBOL(save_processor_state);
@@ -229,6 +230,7 @@ static void __restore_processor_state(struct saved_context *ctxt)
229void restore_processor_state(void) 230void restore_processor_state(void)
230{ 231{
231 __restore_processor_state(&saved_context); 232 __restore_processor_state(&saved_context);
233 restore_sched_clock_state();
232} 234}
233#ifdef CONFIG_X86_32 235#ifdef CONFIG_X86_32
234EXPORT_SYMBOL(restore_processor_state); 236EXPORT_SYMBOL(restore_processor_state);
diff --git a/arch/x86/xen/platform-pci-unplug.c b/arch/x86/xen/platform-pci-unplug.c
index 554c002a1e1a..0f456386cce5 100644
--- a/arch/x86/xen/platform-pci-unplug.c
+++ b/arch/x86/xen/platform-pci-unplug.c
@@ -72,13 +72,17 @@ void __init xen_unplug_emulated_devices(void)
72{ 72{
73 int r; 73 int r;
74 74
75 /* user explicitly requested no unplug */
76 if (xen_emul_unplug & XEN_UNPLUG_NEVER)
77 return;
75 /* check the version of the xen platform PCI device */ 78 /* check the version of the xen platform PCI device */
76 r = check_platform_magic(); 79 r = check_platform_magic();
77 /* If the version matches enable the Xen platform PCI driver. 80 /* If the version matches enable the Xen platform PCI driver.
78 * Also enable the Xen platform PCI driver if the version is really old 81 * Also enable the Xen platform PCI driver if the host does
79 * and the user told us to ignore it. */ 82 * not support the unplug protocol (XEN_PLATFORM_ERR_MAGIC)
83 * but the user told us that unplugging is unnecessary. */
80 if (r && !(r == XEN_PLATFORM_ERR_MAGIC && 84 if (r && !(r == XEN_PLATFORM_ERR_MAGIC &&
81 (xen_emul_unplug & XEN_UNPLUG_IGNORE))) 85 (xen_emul_unplug & XEN_UNPLUG_UNNECESSARY)))
82 return; 86 return;
83 /* Set the default value of xen_emul_unplug depending on whether or 87 /* Set the default value of xen_emul_unplug depending on whether or
84 * not the Xen PV frontends and the Xen platform PCI driver have 88 * not the Xen PV frontends and the Xen platform PCI driver have
@@ -99,7 +103,7 @@ void __init xen_unplug_emulated_devices(void)
99 } 103 }
100 } 104 }
101 /* Now unplug the emulated devices */ 105 /* Now unplug the emulated devices */
102 if (!(xen_emul_unplug & XEN_UNPLUG_IGNORE)) 106 if (!(xen_emul_unplug & XEN_UNPLUG_UNNECESSARY))
103 outw(xen_emul_unplug, XEN_IOPORT_UNPLUG); 107 outw(xen_emul_unplug, XEN_IOPORT_UNPLUG);
104 xen_platform_pci_unplug = xen_emul_unplug; 108 xen_platform_pci_unplug = xen_emul_unplug;
105} 109}
@@ -125,8 +129,10 @@ static int __init parse_xen_emul_unplug(char *arg)
125 xen_emul_unplug |= XEN_UNPLUG_AUX_IDE_DISKS; 129 xen_emul_unplug |= XEN_UNPLUG_AUX_IDE_DISKS;
126 else if (!strncmp(p, "nics", l)) 130 else if (!strncmp(p, "nics", l))
127 xen_emul_unplug |= XEN_UNPLUG_ALL_NICS; 131 xen_emul_unplug |= XEN_UNPLUG_ALL_NICS;
128 else if (!strncmp(p, "ignore", l)) 132 else if (!strncmp(p, "unnecessary", l))
129 xen_emul_unplug |= XEN_UNPLUG_IGNORE; 133 xen_emul_unplug |= XEN_UNPLUG_UNNECESSARY;
134 else if (!strncmp(p, "never", l))
135 xen_emul_unplug |= XEN_UNPLUG_NEVER;
130 else 136 else
131 printk(KERN_WARNING "unrecognised option '%s' " 137 printk(KERN_WARNING "unrecognised option '%s' "
132 "in parameter 'xen_emul_unplug'\n", p); 138 "in parameter 'xen_emul_unplug'\n", p);