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-rw-r--r--arch/sh/include/asm/bugs.h24
-rw-r--r--arch/sh/include/asm/processor.h13
-rw-r--r--arch/sh/kernel/cpu/sh2/probe.c1
-rw-r--r--arch/sh/kernel/cpu/sh2a/probe.c2
-rw-r--r--arch/sh/kernel/cpu/sh3/probe.c2
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c9
-rw-r--r--arch/sh/kernel/cpu/sh5/probe.c2
-rw-r--r--arch/sh/kernel/setup.c1
8 files changed, 39 insertions, 15 deletions
diff --git a/arch/sh/include/asm/bugs.h b/arch/sh/include/asm/bugs.h
index 4924ff6f5439..46260fcbdf4b 100644
--- a/arch/sh/include/asm/bugs.h
+++ b/arch/sh/include/asm/bugs.h
@@ -21,25 +21,25 @@ static void __init check_bugs(void)
21 21
22 current_cpu_data.loops_per_jiffy = loops_per_jiffy; 22 current_cpu_data.loops_per_jiffy = loops_per_jiffy;
23 23
24 switch (current_cpu_data.type) { 24 switch (current_cpu_data.family) {
25 case CPU_SH7619: 25 case CPU_FAMILY_SH2:
26 *p++ = '2'; 26 *p++ = '2';
27 break; 27 break;
28 case CPU_SH7201 ... CPU_MXG: 28 case CPU_FAMILY_SH2A:
29 *p++ = '2'; 29 *p++ = '2';
30 *p++ = 'a'; 30 *p++ = 'a';
31 break; 31 break;
32 case CPU_SH7705 ... CPU_SH7729: 32 case CPU_FAMILY_SH3:
33 *p++ = '3'; 33 *p++ = '3';
34 break; 34 break;
35 case CPU_SH7750 ... CPU_SH4_501: 35 case CPU_FAMILY_SH4:
36 *p++ = '4'; 36 *p++ = '4';
37 break; 37 break;
38 case CPU_SH7763 ... CPU_SHX3: 38 case CPU_FAMILY_SH4A:
39 *p++ = '4'; 39 *p++ = '4';
40 *p++ = 'a'; 40 *p++ = 'a';
41 break; 41 break;
42 case CPU_SH7343 ... CPU_SH7366: 42 case CPU_FAMILY_SH4AL_DSP:
43 *p++ = '4'; 43 *p++ = '4';
44 *p++ = 'a'; 44 *p++ = 'a';
45 *p++ = 'l'; 45 *p++ = 'l';
@@ -48,15 +48,15 @@ static void __init check_bugs(void)
48 *p++ = 's'; 48 *p++ = 's';
49 *p++ = 'p'; 49 *p++ = 'p';
50 break; 50 break;
51 case CPU_SH5_101 ... CPU_SH5_103: 51 case CPU_FAMILY_SH5:
52 *p++ = '6'; 52 *p++ = '6';
53 *p++ = '4'; 53 *p++ = '4';
54 break; 54 break;
55 case CPU_SH_NONE: 55 case CPU_FAMILY_UNKNOWN:
56 /* 56 /*
57 * Specifically use CPU_SH_NONE rather than default:, 57 * Specifically use CPU_FAMILY_UNKNOWN rather than
58 * so we're able to have the compiler whine about 58 * default:, so we're able to have the compiler whine
59 * unhandled enumerations. 59 * about unhandled enumerations.
60 */ 60 */
61 break; 61 break;
62 } 62 }
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index ff7daaf9a620..db1a4f3a755f 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -44,6 +44,17 @@ enum cpu_type {
44 CPU_SH_NONE 44 CPU_SH_NONE
45}; 45};
46 46
47enum cpu_family {
48 CPU_FAMILY_SH2,
49 CPU_FAMILY_SH2A,
50 CPU_FAMILY_SH3,
51 CPU_FAMILY_SH4,
52 CPU_FAMILY_SH4A,
53 CPU_FAMILY_SH4AL_DSP,
54 CPU_FAMILY_SH5,
55 CPU_FAMILY_UNKNOWN,
56};
57
47/* 58/*
48 * TLB information structure 59 * TLB information structure
49 * 60 *
@@ -61,7 +72,7 @@ struct tlb_info {
61}; 72};
62 73
63struct sh_cpuinfo { 74struct sh_cpuinfo {
64 unsigned int type; 75 unsigned int type, family;
65 int cut_major, cut_minor; 76 int cut_major, cut_minor;
66 unsigned long loops_per_jiffy; 77 unsigned long loops_per_jiffy;
67 unsigned long asid_cache; 78 unsigned long asid_cache;
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index 5916d9096b99..1db6d8883888 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -29,6 +29,7 @@ int __init detect_cpu_and_cache_system(void)
29 */ 29 */
30 boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED; 30 boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
31 boot_cpu_data.icache = boot_cpu_data.dcache; 31 boot_cpu_data.icache = boot_cpu_data.dcache;
32 boot_cpu_data.family = CPU_FAMILY_SH2;
32 33
33 return 0; 34 return 0;
34} 35}
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index e098e2f6aa08..6825d6507164 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -15,6 +15,8 @@
15 15
16int __init detect_cpu_and_cache_system(void) 16int __init detect_cpu_and_cache_system(void)
17{ 17{
18 boot_cpu_data.family = CPU_FAMILY_SH2A;
19
18 /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */ 20 /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */
19 boot_cpu_data.flags |= CPU_HAS_OP32; 21 boot_cpu_data.flags |= CPU_HAS_OP32;
20 22
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index 10f2a760c5ee..f9c7df64eb01 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -107,5 +107,7 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void)
107 boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED; 107 boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
108 boot_cpu_data.icache = boot_cpu_data.dcache; 108 boot_cpu_data.icache = boot_cpu_data.dcache;
109 109
110 boot_cpu_data.family = CPU_FAMILY_SH3;
111
110 return 0; 112 return 0;
111} 113}
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 6c78d0a9c857..1148607c36bf 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -57,8 +57,12 @@ int __init detect_cpu_and_cache_system(void)
57 * Setup some generic flags we can probe on SH-4A parts 57 * Setup some generic flags we can probe on SH-4A parts
58 */ 58 */
59 if (((pvr >> 16) & 0xff) == 0x10) { 59 if (((pvr >> 16) & 0xff) == 0x10) {
60 if ((cvr & 0x10000000) == 0) 60 boot_cpu_data.family = CPU_FAMILY_SH4A;
61
62 if ((cvr & 0x10000000) == 0) {
61 boot_cpu_data.flags |= CPU_HAS_DSP; 63 boot_cpu_data.flags |= CPU_HAS_DSP;
64 boot_cpu_data.family = CPU_FAMILY_SH4AL_DSP;
65 }
62 66
63 boot_cpu_data.flags |= CPU_HAS_LLSC | CPU_HAS_PERF_COUNTER; 67 boot_cpu_data.flags |= CPU_HAS_LLSC | CPU_HAS_PERF_COUNTER;
64 boot_cpu_data.cut_major = pvr & 0x7f; 68 boot_cpu_data.cut_major = pvr & 0x7f;
@@ -68,6 +72,7 @@ int __init detect_cpu_and_cache_system(void)
68 } else { 72 } else {
69 /* And some SH-4 defaults.. */ 73 /* And some SH-4 defaults.. */
70 boot_cpu_data.flags |= CPU_HAS_PTEA; 74 boot_cpu_data.flags |= CPU_HAS_PTEA;
75 boot_cpu_data.family = CPU_FAMILY_SH4;
71 } 76 }
72 77
73 /* FPU detection works for everyone */ 78 /* FPU detection works for everyone */
@@ -174,7 +179,7 @@ int __init detect_cpu_and_cache_system(void)
174 179
175 break; 180 break;
176 default: 181 default:
177 boot_cpu_data.type = CPU_SH_NONE; 182 boot_cpu_data.type = boot_cpu_data.family = CPU_SH_NONE;
178 break; 183 break;
179 } 184 }
180 185
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
index 92ad844b5c12..521d05b3f7ba 100644
--- a/arch/sh/kernel/cpu/sh5/probe.c
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -34,6 +34,8 @@ int __init detect_cpu_and_cache_system(void)
34 /* CPU.VCR aliased at CIR address on SH5-101 */ 34 /* CPU.VCR aliased at CIR address on SH5-101 */
35 boot_cpu_data.type = CPU_SH5_101; 35 boot_cpu_data.type = CPU_SH5_101;
36 36
37 boot_cpu_data.family = CPU_FAMILY_SH5;
38
37 /* 39 /*
38 * First, setup some sane values for the I-cache. 40 * First, setup some sane values for the I-cache.
39 */ 41 */
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index ceb409bf7741..dc403e42bcab 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -49,6 +49,7 @@
49struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = { 49struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = {
50 [0] = { 50 [0] = {
51 .type = CPU_SH_NONE, 51 .type = CPU_SH_NONE,
52 .family = CPU_FAMILY_UNKNOWN,
52 .loops_per_jiffy = 10000000, 53 .loops_per_jiffy = 10000000,
53 }, 54 },
54}; 55};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-06 12:27:00 -0500