3 files changed, 0 insertions, 8 deletions

diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index 70c660121ec4..96b5f0f1c11e 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -324,14 +324,12 @@ spu_irq_class_0(int irq, void *data)
         stat = spu_int_stat_get(spu, 0) & mask;
 
         spu->class_0_pending |= stat;
-        spu->class_0_dsisr = spu_mfc_dsisr_get(spu);
         spu->class_0_dar = spu_mfc_dar_get(spu);
         spin_unlock(&spu->register_lock);
 
         spu->stop_callback(spu, 0);
 
         spu->class_0_pending = 0;
-        spu->class_0_dsisr = 0;
         spu->class_0_dar = 0;
 
         spu_int_stat_clear(spu, 0, stat);
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c
index 0046bcfe495a..f7edba6cb795 100644
--- a/arch/powerpc/platforms/cell/spufs/run.c
+++ b/arch/powerpc/platforms/cell/spufs/run.c
@@ -27,7 +27,6 @@ void spufs_stop_callback(struct spu *spu, int irq)
                 switch(irq) {
                 case 0 :
                         ctx->csa.class_0_pending = spu->class_0_pending;
-                        ctx->csa.class_0_dsisr = spu->class_0_dsisr;
                         ctx->csa.class_0_dar = spu->class_0_dar;
                         break;
                 case 1 :
@@ -69,10 +68,6 @@ top:
         if (test_bit(SPU_SCHED_NOTIFY_ACTIVE, &ctx->sched_flags))
                 return 1;
 
-        dsisr = ctx->csa.class_0_dsisr;
-        if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
-                return 1;
-
         dsisr = ctx->csa.class_1_dsisr;
         if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
                 return 1;
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 1702de9395ee..bfcf70ee8959 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -2844,7 +2844,6 @@ static void dump_spu_fields(struct spu *spu)
         DUMP_FIELD(spu, "0x%lx", flags);
         DUMP_FIELD(spu, "%d", class_0_pending);
         DUMP_FIELD(spu, "0x%lx", class_0_dar);
-        DUMP_FIELD(spu, "0x%lx", class_0_dsisr);
         DUMP_FIELD(spu, "0x%lx", class_1_dar);
         DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
         DUMP_FIELD(spu, "0x%lx", irqs[0]);