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-rw-r--r--arch/arm/mach-omap1/Kconfig2
-rw-r--r--arch/arm/mach-omap1/Makefile3
-rw-r--r--arch/arm/mach-omap1/time.c101
-rw-r--r--arch/arm/mach-omap1/timer32k.c13
-rw-r--r--arch/arm/mach-omap2/board-cm-t3517.c29
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c3
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c1
-rw-r--r--arch/arm/mach-omap2/clockdomain.c30
-rw-r--r--arch/arm/mach-omap2/clockdomains44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/powerdomain2xxx_3xxx.c1
-rw-r--r--arch/arm/mach-omap2/timer-gp.c10
-rw-r--r--arch/arm/plat-omap/Kconfig8
-rw-r--r--arch/arm/plat-omap/counter_32k.c22
-rw-r--r--arch/arm/plat-omap/dma.c7
-rw-r--r--arch/arm/plat-omap/include/plat/common.h3
-rw-r--r--arch/powerpc/kernel/perf_event_fsl_emb.c1
-rw-r--r--arch/x86/include/asm/cacheflush.h42
-rw-r--r--arch/x86/include/asm/cpu.h1
-rw-r--r--arch/x86/include/asm/jump_label.h2
-rw-r--r--arch/x86/kernel/cpu/intel_cacheinfo.c3
-rw-r--r--arch/x86/kernel/cpu/mcheck/therm_throt.c1
-rw-r--r--arch/x86/kernel/process.c3
-rw-r--r--arch/x86/kernel/smpboot.c3
23 files changed, 196 insertions, 95 deletions
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 8d2f2daba0c0..e0a028161dde 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -9,6 +9,7 @@ config ARCH_OMAP730
9 depends on ARCH_OMAP1 9 depends on ARCH_OMAP1
10 bool "OMAP730 Based System" 10 bool "OMAP730 Based System"
11 select CPU_ARM926T 11 select CPU_ARM926T
12 select OMAP_MPU_TIMER
12 select ARCH_OMAP_OTG 13 select ARCH_OMAP_OTG
13 14
14config ARCH_OMAP850 15config ARCH_OMAP850
@@ -22,6 +23,7 @@ config ARCH_OMAP15XX
22 default y 23 default y
23 bool "OMAP15xx Based System" 24 bool "OMAP15xx Based System"
24 select CPU_ARM925T 25 select CPU_ARM925T
26 select OMAP_MPU_TIMER
25 27
26config ARCH_OMAP16XX 28config ARCH_OMAP16XX
27 depends on ARCH_OMAP1 29 depends on ARCH_OMAP1
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index 6ee19504845f..ba6009f27677 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,12 +3,11 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o dma.o 6obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
7obj-y += clock.o clock_data.o opp_data.o 7obj-y += clock.o clock_data.o opp_data.o
8 8
9obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o 9obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
10 10
11obj-$(CONFIG_OMAP_MPU_TIMER) += time.o
12obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o 11obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o
13 12
14# Power Management 13# Power Management
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index ed7a61ff916a..f83fc335c613 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -44,16 +44,21 @@
44#include <linux/clocksource.h> 44#include <linux/clocksource.h>
45#include <linux/clockchips.h> 45#include <linux/clockchips.h>
46#include <linux/io.h> 46#include <linux/io.h>
47#include <linux/sched.h>
47 48
48#include <asm/system.h> 49#include <asm/system.h>
49#include <mach/hardware.h> 50#include <mach/hardware.h>
50#include <asm/leds.h> 51#include <asm/leds.h>
51#include <asm/irq.h> 52#include <asm/irq.h>
53#include <asm/sched_clock.h>
54
52#include <asm/mach/irq.h> 55#include <asm/mach/irq.h>
53#include <asm/mach/time.h> 56#include <asm/mach/time.h>
54 57
55#include <plat/common.h> 58#include <plat/common.h>
56 59
60#ifdef CONFIG_OMAP_MPU_TIMER
61
57#define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE 62#define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE
58#define OMAP_MPU_TIMER_OFFSET 0x100 63#define OMAP_MPU_TIMER_OFFSET 0x100
59 64
@@ -67,7 +72,7 @@ typedef struct {
67((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ 72((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
68 (n)*OMAP_MPU_TIMER_OFFSET)) 73 (n)*OMAP_MPU_TIMER_OFFSET))
69 74
70static inline unsigned long omap_mpu_timer_read(int nr) 75static inline unsigned long notrace omap_mpu_timer_read(int nr)
71{ 76{
72 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr); 77 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
73 return timer->read_tim; 78 return timer->read_tim;
@@ -212,6 +217,32 @@ static struct clocksource clocksource_mpu = {
212 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 217 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
213}; 218};
214 219
220static DEFINE_CLOCK_DATA(cd);
221
222static inline unsigned long long notrace _omap_mpu_sched_clock(void)
223{
224 u32 cyc = mpu_read(&clocksource_mpu);
225 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
226}
227
228#ifndef CONFIG_OMAP_32K_TIMER
229unsigned long long notrace sched_clock(void)
230{
231 return _omap_mpu_sched_clock();
232}
233#else
234static unsigned long long notrace omap_mpu_sched_clock(void)
235{
236 return _omap_mpu_sched_clock();
237}
238#endif
239
240static void notrace mpu_update_sched_clock(void)
241{
242 u32 cyc = mpu_read(&clocksource_mpu);
243 update_sched_clock(&cd, cyc, (u32)~0);
244}
245
215static void __init omap_init_clocksource(unsigned long rate) 246static void __init omap_init_clocksource(unsigned long rate)
216{ 247{
217 static char err[] __initdata = KERN_ERR 248 static char err[] __initdata = KERN_ERR
@@ -219,17 +250,13 @@ static void __init omap_init_clocksource(unsigned long rate)
219 250
220 setup_irq(INT_TIMER2, &omap_mpu_timer2_irq); 251 setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
221 omap_mpu_timer_start(1, ~0, 1); 252 omap_mpu_timer_start(1, ~0, 1);
253 init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
222 254
223 if (clocksource_register_hz(&clocksource_mpu, rate)) 255 if (clocksource_register_hz(&clocksource_mpu, rate))
224 printk(err, clocksource_mpu.name); 256 printk(err, clocksource_mpu.name);
225} 257}
226 258
227/* 259static void __init omap_mpu_timer_init(void)
228 * ---------------------------------------------------------------------------
229 * Timer initialization
230 * ---------------------------------------------------------------------------
231 */
232static void __init omap_timer_init(void)
233{ 260{
234 struct clk *ck_ref = clk_get(NULL, "ck_ref"); 261 struct clk *ck_ref = clk_get(NULL, "ck_ref");
235 unsigned long rate; 262 unsigned long rate;
@@ -246,6 +273,66 @@ static void __init omap_timer_init(void)
246 omap_init_clocksource(rate); 273 omap_init_clocksource(rate);
247} 274}
248 275
276#else
277static inline void omap_mpu_timer_init(void)
278{
279 pr_err("Bogus timer, should not happen\n");
280}
281#endif /* CONFIG_OMAP_MPU_TIMER */
282
283#if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER)
284static unsigned long long (*preferred_sched_clock)(void);
285
286unsigned long long notrace sched_clock(void)
287{
288 if (!preferred_sched_clock)
289 return 0;
290
291 return preferred_sched_clock();
292}
293
294static inline void preferred_sched_clock_init(bool use_32k_sched_clock)
295{
296 if (use_32k_sched_clock)
297 preferred_sched_clock = omap_32k_sched_clock;
298 else
299 preferred_sched_clock = omap_mpu_sched_clock;
300}
301#else
302static inline void preferred_sched_clock_init(bool use_32k_sched_clcok)
303{
304}
305#endif
306
307static inline int omap_32k_timer_usable(void)
308{
309 int res = false;
310
311 if (cpu_is_omap730() || cpu_is_omap15xx())
312 return res;
313
314#ifdef CONFIG_OMAP_32K_TIMER
315 res = omap_32k_timer_init();
316#endif
317
318 return res;
319}
320
321/*
322 * ---------------------------------------------------------------------------
323 * Timer initialization
324 * ---------------------------------------------------------------------------
325 */
326static void __init omap_timer_init(void)
327{
328 if (omap_32k_timer_usable()) {
329 preferred_sched_clock_init(1);
330 } else {
331 omap_mpu_timer_init();
332 preferred_sched_clock_init(0);
333 }
334}
335
249struct sys_timer omap_timer = { 336struct sys_timer omap_timer = {
250 .init = omap_timer_init, 337 .init = omap_timer_init,
251}; 338};
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 20cfbcc6c60c..13d7b8f145bd 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -52,10 +52,9 @@
52#include <asm/irq.h> 52#include <asm/irq.h>
53#include <asm/mach/irq.h> 53#include <asm/mach/irq.h>
54#include <asm/mach/time.h> 54#include <asm/mach/time.h>
55#include <plat/common.h>
55#include <plat/dmtimer.h> 56#include <plat/dmtimer.h>
56 57
57struct sys_timer omap_timer;
58
59/* 58/*
60 * --------------------------------------------------------------------------- 59 * ---------------------------------------------------------------------------
61 * 32KHz OS timer 60 * 32KHz OS timer
@@ -181,14 +180,14 @@ static __init void omap_init_32k_timer(void)
181 * Timer initialization 180 * Timer initialization
182 * --------------------------------------------------------------------------- 181 * ---------------------------------------------------------------------------
183 */ 182 */
184static void __init omap_timer_init(void) 183bool __init omap_32k_timer_init(void)
185{ 184{
185 omap_init_clocksource_32k();
186
186#ifdef CONFIG_OMAP_DM_TIMER 187#ifdef CONFIG_OMAP_DM_TIMER
187 omap_dm_timer_init(); 188 omap_dm_timer_init();
188#endif 189#endif
189 omap_init_32k_timer(); 190 omap_init_32k_timer();
190}
191 191
192struct sys_timer omap_timer = { 192 return true;
193 .init = omap_timer_init, 193}
194};
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 5b0c77732dfc..8f9a64d650ee 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -124,8 +124,9 @@ static inline void cm_t3517_init_hecc(void) {}
124#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) 124#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
125#define RTC_IO_GPIO (153) 125#define RTC_IO_GPIO (153)
126#define RTC_WR_GPIO (154) 126#define RTC_WR_GPIO (154)
127#define RTC_RD_GPIO (160) 127#define RTC_RD_GPIO (53)
128#define RTC_CS_GPIO (163) 128#define RTC_CS_GPIO (163)
129#define RTC_CS_EN_GPIO (160)
129 130
130struct v3020_platform_data cm_t3517_v3020_pdata = { 131struct v3020_platform_data cm_t3517_v3020_pdata = {
131 .use_gpio = 1, 132 .use_gpio = 1,
@@ -145,6 +146,16 @@ static struct platform_device cm_t3517_rtc_device = {
145 146
146static void __init cm_t3517_init_rtc(void) 147static void __init cm_t3517_init_rtc(void)
147{ 148{
149 int err;
150
151 err = gpio_request(RTC_CS_EN_GPIO, "rtc cs en");
152 if (err) {
153 pr_err("CM-T3517: rtc cs en gpio request failed: %d\n", err);
154 return;
155 }
156
157 gpio_direction_output(RTC_CS_EN_GPIO, 1);
158
148 platform_device_register(&cm_t3517_rtc_device); 159 platform_device_register(&cm_t3517_rtc_device);
149} 160}
150#else 161#else
@@ -214,12 +225,12 @@ static struct mtd_partition cm_t3517_nand_partitions[] = {
214 }, 225 },
215 { 226 {
216 .name = "linux", 227 .name = "linux",
217 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ 228 .offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */
218 .size = 32 * NAND_BLOCK_SIZE, 229 .size = 32 * NAND_BLOCK_SIZE,
219 }, 230 },
220 { 231 {
221 .name = "rootfs", 232 .name = "rootfs",
222 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ 233 .offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */
223 .size = MTDPART_SIZ_FULL, 234 .size = MTDPART_SIZ_FULL,
224 }, 235 },
225}; 236};
@@ -256,11 +267,19 @@ static void __init cm_t3517_init_irq(void)
256static struct omap_board_mux board_mux[] __initdata = { 267static struct omap_board_mux board_mux[] __initdata = {
257 /* GPIO186 - Green LED */ 268 /* GPIO186 - Green LED */
258 OMAP3_MUX(SYS_CLKOUT2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), 269 OMAP3_MUX(SYS_CLKOUT2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
259 /* RTC GPIOs: IO, WR#, RD#, CS# */ 270
271 /* RTC GPIOs: */
272 /* IO - GPIO153 */
260 OMAP3_MUX(MCBSP4_DR, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), 273 OMAP3_MUX(MCBSP4_DR, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
274 /* WR# - GPIO154 */
261 OMAP3_MUX(MCBSP4_DX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), 275 OMAP3_MUX(MCBSP4_DX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
262 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), 276 /* RD# - GPIO53 */
277 OMAP3_MUX(GPMC_NCS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
278 /* CS# - GPIO163 */
263 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), 279 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
280 /* CS EN - GPIO160 */
281 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
282
264 /* HSUSB1 RESET */ 283 /* HSUSB1 RESET */
265 OMAP3_MUX(UART2_TX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), 284 OMAP3_MUX(UART2_TX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
266 /* HSUSB2 RESET */ 285 /* HSUSB2 RESET */
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 00bb1fc5e017..e906e05bb41b 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -275,8 +275,7 @@ static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
275 .irq_base = TWL4030_GPIO_IRQ_BASE, 275 .irq_base = TWL4030_GPIO_IRQ_BASE,
276 .irq_end = TWL4030_GPIO_IRQ_END, 276 .irq_end = TWL4030_GPIO_IRQ_END,
277 .use_leds = true, 277 .use_leds = true,
278 .pullups = BIT(1), 278 .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
279 .pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)
280 | BIT(15) | BIT(16) | BIT(17), 279 | BIT(15) | BIT(16) | BIT(17),
281 .setup = devkit8000_twl_gpio_setup, 280 .setup = devkit8000_twl_gpio_setup,
282}; 281};
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index e8cb32fd7f13..de9ec8ddd2ae 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -34,7 +34,6 @@
34#include "cm2_44xx.h" 34#include "cm2_44xx.h"
35#include "cm-regbits-44xx.h" 35#include "cm-regbits-44xx.h"
36#include "prm44xx.h" 36#include "prm44xx.h"
37#include "prm44xx.h"
38#include "prm-regbits-44xx.h" 37#include "prm-regbits-44xx.h"
39#include "control.h" 38#include "control.h"
40#include "scrm44xx.h" 39#include "scrm44xx.h"
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index e20b98636ab4..58e42f76603f 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -423,6 +423,12 @@ int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
423{ 423{
424 struct clkdm_dep *cd; 424 struct clkdm_dep *cd;
425 425
426 if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
427 pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
428 clkdm1->name, clkdm2->name, __func__);
429 return -EINVAL;
430 }
431
426 if (!clkdm1 || !clkdm2) 432 if (!clkdm1 || !clkdm2)
427 return -EINVAL; 433 return -EINVAL;
428 434
@@ -458,6 +464,12 @@ int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
458{ 464{
459 struct clkdm_dep *cd; 465 struct clkdm_dep *cd;
460 466
467 if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
468 pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
469 clkdm1->name, clkdm2->name, __func__);
470 return -EINVAL;
471 }
472
461 if (!clkdm1 || !clkdm2) 473 if (!clkdm1 || !clkdm2)
462 return -EINVAL; 474 return -EINVAL;
463 475
@@ -500,6 +512,12 @@ int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
500 if (!clkdm1 || !clkdm2) 512 if (!clkdm1 || !clkdm2)
501 return -EINVAL; 513 return -EINVAL;
502 514
515 if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
516 pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
517 clkdm1->name, clkdm2->name, __func__);
518 return -EINVAL;
519 }
520
503 cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs); 521 cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs);
504 if (IS_ERR(cd)) { 522 if (IS_ERR(cd)) {
505 pr_debug("clockdomain: hardware cannot set/clear wake up of " 523 pr_debug("clockdomain: hardware cannot set/clear wake up of "
@@ -527,6 +545,12 @@ int clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
527 struct clkdm_dep *cd; 545 struct clkdm_dep *cd;
528 u32 mask = 0; 546 u32 mask = 0;
529 547
548 if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
549 pr_err("clockdomain: %s: %s: not yet implemented\n",
550 clkdm->name, __func__);
551 return -EINVAL;
552 }
553
530 if (!clkdm) 554 if (!clkdm)
531 return -EINVAL; 555 return -EINVAL;
532 556
@@ -830,8 +854,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
830 * dependency code and data for OMAP4. 854 * dependency code and data for OMAP4.
831 */ 855 */
832 if (cpu_is_omap44xx()) { 856 if (cpu_is_omap44xx()) {
833 WARN_ONCE(1, "clockdomain: OMAP4 wakeup/sleep dependency " 857 pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name);
834 "support is not yet implemented\n");
835 } else { 858 } else {
836 if (atomic_read(&clkdm->usecount) > 0) 859 if (atomic_read(&clkdm->usecount) > 0)
837 _clkdm_add_autodeps(clkdm); 860 _clkdm_add_autodeps(clkdm);
@@ -872,8 +895,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
872 * dependency code and data for OMAP4. 895 * dependency code and data for OMAP4.
873 */ 896 */
874 if (cpu_is_omap44xx()) { 897 if (cpu_is_omap44xx()) {
875 WARN_ONCE(1, "clockdomain: OMAP4 wakeup/sleep dependency " 898 pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name);
876 "support is not yet implemented\n");
877 } else { 899 } else {
878 if (atomic_read(&clkdm->usecount) > 0) 900 if (atomic_read(&clkdm->usecount) > 0)
879 _clkdm_del_autodeps(clkdm); 901 _clkdm_del_autodeps(clkdm);
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 51920fc7fc52..10622c914abc 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -30,8 +30,6 @@
30#include "cm1_44xx.h" 30#include "cm1_44xx.h"
31#include "cm2_44xx.h" 31#include "cm2_44xx.h"
32 32
33#include "cm1_44xx.h"
34#include "cm2_44xx.h"
35#include "cm-regbits-44xx.h" 33#include "cm-regbits-44xx.h"
36#include "prm44xx.h" 34#include "prm44xx.h"
37#include "prcm44xx.h" 35#include "prcm44xx.h"
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
index d5233890370c..cf600e22bf8e 100644
--- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
@@ -19,7 +19,6 @@
19#include <plat/prcm.h> 19#include <plat/prcm.h>
20 20
21#include "powerdomain.h" 21#include "powerdomain.h"
22#include "prm-regbits-34xx.h"
23#include "prm.h" 22#include "prm.h"
24#include "prm-regbits-24xx.h" 23#include "prm-regbits-24xx.h"
25#include "prm-regbits-34xx.h" 24#include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 4e48e786bec7..7b7c2683ae7b 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -42,6 +42,8 @@
42 42
43#include "timer-gp.h" 43#include "timer-gp.h"
44 44
45#include <plat/common.h>
46
45/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ 47/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
46#define MAX_GPTIMER_ID 12 48#define MAX_GPTIMER_ID 12
47 49
@@ -176,10 +178,14 @@ static void __init omap2_gp_clockevent_init(void)
176/* 178/*
177 * When 32k-timer is enabled, don't use GPTimer for clocksource 179 * When 32k-timer is enabled, don't use GPTimer for clocksource
178 * instead, just leave default clocksource which uses the 32k 180 * instead, just leave default clocksource which uses the 32k
179 * sync counter. See clocksource setup in see plat-omap/common.c. 181 * sync counter. See clocksource setup in plat-omap/counter_32k.c
180 */ 182 */
181 183
182static inline void __init omap2_gp_clocksource_init(void) {} 184static void __init omap2_gp_clocksource_init(void)
185{
186 omap_init_clocksource_32k();
187}
188
183#else 189#else
184/* 190/*
185 * clocksource 191 * clocksource
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 18fe3cb195dc..b6333ae3f92a 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -144,12 +144,9 @@ config OMAP_IOMMU_DEBUG
144config OMAP_IOMMU_IVA2 144config OMAP_IOMMU_IVA2
145 bool 145 bool
146 146
147choice
148 prompt "System timer"
149 default OMAP_32K_TIMER if !ARCH_OMAP15XX
150
151config OMAP_MPU_TIMER 147config OMAP_MPU_TIMER
152 bool "Use mpu timer" 148 bool "Use mpu timer"
149 depends on ARCH_OMAP1
153 help 150 help
154 Select this option if you want to use the OMAP mpu timer. This 151 Select this option if you want to use the OMAP mpu timer. This
155 timer provides more intra-tick resolution than the 32KHz timer, 152 timer provides more intra-tick resolution than the 32KHz timer,
@@ -158,6 +155,7 @@ config OMAP_MPU_TIMER
158config OMAP_32K_TIMER 155config OMAP_32K_TIMER
159 bool "Use 32KHz timer" 156 bool "Use 32KHz timer"
160 depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS 157 depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
158 default y if (ARCH_OMAP16XX || ARCH_OMAP2PLUS)
161 help 159 help
162 Select this option if you want to enable the OMAP 32KHz timer. 160 Select this option if you want to enable the OMAP 32KHz timer.
163 This timer saves power compared to the OMAP_MPU_TIMER, and has 161 This timer saves power compared to the OMAP_MPU_TIMER, and has
@@ -165,8 +163,6 @@ config OMAP_32K_TIMER
165 intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is 163 intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
166 currently only available for OMAP16XX, 24XX, 34XX and OMAP4. 164 currently only available for OMAP16XX, 24XX, 34XX and OMAP4.
167 165
168endchoice
169
170config OMAP3_L2_AUX_SECURE_SAVE_RESTORE 166config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
171 bool "OMAP3 HS/EMU save and restore for L2 AUX control register" 167 bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
172 depends on ARCH_OMAP3 && PM 168 depends on ARCH_OMAP3 && PM
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index ea4644021fb9..862dda95d61d 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -36,8 +36,6 @@
36 36
37#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410 37#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
38 38
39#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
40
41#include <linux/clocksource.h> 39#include <linux/clocksource.h>
42 40
43/* 41/*
@@ -122,12 +120,24 @@ static DEFINE_CLOCK_DATA(cd);
122#define SC_MULT 4000000000u 120#define SC_MULT 4000000000u
123#define SC_SHIFT 17 121#define SC_SHIFT 17
124 122
125unsigned long long notrace sched_clock(void) 123static inline unsigned long long notrace _omap_32k_sched_clock(void)
126{ 124{
127 u32 cyc = clocksource_32k.read(&clocksource_32k); 125 u32 cyc = clocksource_32k.read(&clocksource_32k);
128 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); 126 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
129} 127}
130 128
129#ifndef CONFIG_OMAP_MPU_TIMER
130unsigned long long notrace sched_clock(void)
131{
132 return _omap_32k_sched_clock();
133}
134#else
135unsigned long long notrace omap_32k_sched_clock(void)
136{
137 return _omap_32k_sched_clock();
138}
139#endif
140
131static void notrace omap_update_sched_clock(void) 141static void notrace omap_update_sched_clock(void)
132{ 142{
133 u32 cyc = clocksource_32k.read(&clocksource_32k); 143 u32 cyc = clocksource_32k.read(&clocksource_32k);
@@ -160,7 +170,7 @@ void read_persistent_clock(struct timespec *ts)
160 *ts = *tsp; 170 *ts = *tsp;
161} 171}
162 172
163static int __init omap_init_clocksource_32k(void) 173int __init omap_init_clocksource_32k(void)
164{ 174{
165 static char err[] __initdata = KERN_ERR 175 static char err[] __initdata = KERN_ERR
166 "%s: can't register clocksource!\n"; 176 "%s: can't register clocksource!\n";
@@ -195,7 +205,3 @@ static int __init omap_init_clocksource_32k(void)
195 } 205 }
196 return 0; 206 return 0;
197} 207}
198arch_initcall(omap_init_clocksource_32k);
199
200#endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
201
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index c4b2b478b1a5..85363084cc1a 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -53,7 +53,7 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
53#endif 53#endif
54 54
55#define OMAP_DMA_ACTIVE 0x01 55#define OMAP_DMA_ACTIVE 0x01
56#define OMAP2_DMA_CSR_CLEAR_MASK 0xffe 56#define OMAP2_DMA_CSR_CLEAR_MASK 0xffffffff
57 57
58#define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec) 58#define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec)
59 59
@@ -1873,7 +1873,7 @@ static int omap2_dma_handle_ch(int ch)
1873 printk(KERN_INFO "DMA misaligned error with device %d\n", 1873 printk(KERN_INFO "DMA misaligned error with device %d\n",
1874 dma_chan[ch].dev_id); 1874 dma_chan[ch].dev_id);
1875 1875
1876 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, ch); 1876 p->dma_write(status, CSR, ch);
1877 p->dma_write(1 << ch, IRQSTATUS_L0, ch); 1877 p->dma_write(1 << ch, IRQSTATUS_L0, ch);
1878 /* read back the register to flush the write */ 1878 /* read back the register to flush the write */
1879 p->dma_read(IRQSTATUS_L0, ch); 1879 p->dma_read(IRQSTATUS_L0, ch);
@@ -1893,10 +1893,9 @@ static int omap2_dma_handle_ch(int ch)
1893 OMAP_DMA_CHAIN_INCQHEAD(chain_id); 1893 OMAP_DMA_CHAIN_INCQHEAD(chain_id);
1894 1894
1895 status = p->dma_read(CSR, ch); 1895 status = p->dma_read(CSR, ch);
1896 p->dma_write(status, CSR, ch);
1896 } 1897 }
1897 1898
1898 p->dma_write(status, CSR, ch);
1899
1900 if (likely(dma_chan[ch].callback != NULL)) 1899 if (likely(dma_chan[ch].callback != NULL))
1901 dma_chan[ch].callback(ch, status, dma_chan[ch].data); 1900 dma_chan[ch].callback(ch, status, dma_chan[ch].data);
1902 1901
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 6b8088ec74af..29b2afb4288f 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -35,6 +35,9 @@ struct sys_timer;
35 35
36extern void omap_map_common_io(void); 36extern void omap_map_common_io(void);
37extern struct sys_timer omap_timer; 37extern struct sys_timer omap_timer;
38extern bool omap_32k_timer_init(void);
39extern int __init omap_init_clocksource_32k(void);
40extern unsigned long long notrace omap_32k_sched_clock(void);
38 41
39extern void omap_reserve(void); 42extern void omap_reserve(void);
40 43
diff --git a/arch/powerpc/kernel/perf_event_fsl_emb.c b/arch/powerpc/kernel/perf_event_fsl_emb.c
index 4dcf5f831e9d..b0dc8f7069cd 100644
--- a/arch/powerpc/kernel/perf_event_fsl_emb.c
+++ b/arch/powerpc/kernel/perf_event_fsl_emb.c
@@ -596,6 +596,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
596 if (left <= 0) 596 if (left <= 0)
597 left = period; 597 left = period;
598 record = 1; 598 record = 1;
599 event->hw.last_period = event->hw.sample_period;
599 } 600 }
600 if (left < 0x80000000LL) 601 if (left < 0x80000000LL)
601 val = 0x80000000LL - left; 602 val = 0x80000000LL - left;
diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h
index 63e35ec9075c..62f084478f7e 100644
--- a/arch/x86/include/asm/cacheflush.h
+++ b/arch/x86/include/asm/cacheflush.h
@@ -1,48 +1,8 @@
1#ifndef _ASM_X86_CACHEFLUSH_H 1#ifndef _ASM_X86_CACHEFLUSH_H
2#define _ASM_X86_CACHEFLUSH_H 2#define _ASM_X86_CACHEFLUSH_H
3 3
4/* Keep includes the same across arches. */
5#include <linux/mm.h>
6
7/* Caches aren't brain-dead on the intel. */ 4/* Caches aren't brain-dead on the intel. */
8static inline void flush_cache_all(void) { } 5#include <asm-generic/cacheflush.h>
9static inline void flush_cache_mm(struct mm_struct *mm) { }
10static inline void flush_cache_dup_mm(struct mm_struct *mm) { }
11static inline void flush_cache_range(struct vm_area_struct *vma,
12 unsigned long start, unsigned long end) { }
13static inline void flush_cache_page(struct vm_area_struct *vma,
14 unsigned long vmaddr, unsigned long pfn) { }
15#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
16static inline void flush_dcache_page(struct page *page) { }
17static inline void flush_dcache_mmap_lock(struct address_space *mapping) { }
18static inline void flush_dcache_mmap_unlock(struct address_space *mapping) { }
19static inline void flush_icache_range(unsigned long start,
20 unsigned long end) { }
21static inline void flush_icache_page(struct vm_area_struct *vma,
22 struct page *page) { }
23static inline void flush_icache_user_range(struct vm_area_struct *vma,
24 struct page *page,
25 unsigned long addr,
26 unsigned long len) { }
27static inline void flush_cache_vmap(unsigned long start, unsigned long end) { }
28static inline void flush_cache_vunmap(unsigned long start,
29 unsigned long end) { }
30
31static inline void copy_to_user_page(struct vm_area_struct *vma,
32 struct page *page, unsigned long vaddr,
33 void *dst, const void *src,
34 unsigned long len)
35{
36 memcpy(dst, src, len);
37}
38
39static inline void copy_from_user_page(struct vm_area_struct *vma,
40 struct page *page, unsigned long vaddr,
41 void *dst, const void *src,
42 unsigned long len)
43{
44 memcpy(dst, src, len);
45}
46 6
47#ifdef CONFIG_X86_PAT 7#ifdef CONFIG_X86_PAT
48/* 8/*
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index 4fab24de26b1..6e6e7558e702 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -32,5 +32,6 @@ extern void arch_unregister_cpu(int);
32 32
33DECLARE_PER_CPU(int, cpu_state); 33DECLARE_PER_CPU(int, cpu_state);
34 34
35int __cpuinit mwait_usable(const struct cpuinfo_x86 *);
35 36
36#endif /* _ASM_X86_CPU_H */ 37#endif /* _ASM_X86_CPU_H */
diff --git a/arch/x86/include/asm/jump_label.h b/arch/x86/include/asm/jump_label.h
index f52d42e80585..574dbc22893a 100644
--- a/arch/x86/include/asm/jump_label.h
+++ b/arch/x86/include/asm/jump_label.h
@@ -14,7 +14,7 @@
14 do { \ 14 do { \
15 asm goto("1:" \ 15 asm goto("1:" \
16 JUMP_LABEL_INITIAL_NOP \ 16 JUMP_LABEL_INITIAL_NOP \
17 ".pushsection __jump_table, \"a\" \n\t"\ 17 ".pushsection __jump_table, \"aw\" \n\t"\
18 _ASM_PTR "1b, %l[" #label "], %c0 \n\t" \ 18 _ASM_PTR "1b, %l[" #label "], %c0 \n\t" \
19 ".popsection \n\t" \ 19 ".popsection \n\t" \
20 : : "i" (key) : : label); \ 20 : : "i" (key) : : label); \
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 7283e98deaae..ec2c19a7b8ef 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -45,6 +45,7 @@ static const struct _cache_table __cpuinitconst cache_table[] =
45 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */ 45 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */
46 { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */ 46 { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */
47 { 0x0d, LVL_1_DATA, 16 }, /* 4-way set assoc, 64 byte line size */ 47 { 0x0d, LVL_1_DATA, 16 }, /* 4-way set assoc, 64 byte line size */
48 { 0x0e, LVL_1_DATA, 24 }, /* 6-way set assoc, 64 byte line size */
48 { 0x21, LVL_2, 256 }, /* 8-way set assoc, 64 byte line size */ 49 { 0x21, LVL_2, 256 }, /* 8-way set assoc, 64 byte line size */
49 { 0x22, LVL_3, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */ 50 { 0x22, LVL_3, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */
50 { 0x23, LVL_3, MB(1) }, /* 8-way set assoc, sectored cache, 64 byte line size */ 51 { 0x23, LVL_3, MB(1) }, /* 8-way set assoc, sectored cache, 64 byte line size */
@@ -66,6 +67,7 @@ static const struct _cache_table __cpuinitconst cache_table[] =
66 { 0x45, LVL_2, MB(2) }, /* 4-way set assoc, 32 byte line size */ 67 { 0x45, LVL_2, MB(2) }, /* 4-way set assoc, 32 byte line size */
67 { 0x46, LVL_3, MB(4) }, /* 4-way set assoc, 64 byte line size */ 68 { 0x46, LVL_3, MB(4) }, /* 4-way set assoc, 64 byte line size */
68 { 0x47, LVL_3, MB(8) }, /* 8-way set assoc, 64 byte line size */ 69 { 0x47, LVL_3, MB(8) }, /* 8-way set assoc, 64 byte line size */
70 { 0x48, LVL_2, MB(3) }, /* 12-way set assoc, 64 byte line size */
69 { 0x49, LVL_3, MB(4) }, /* 16-way set assoc, 64 byte line size */ 71 { 0x49, LVL_3, MB(4) }, /* 16-way set assoc, 64 byte line size */
70 { 0x4a, LVL_3, MB(6) }, /* 12-way set assoc, 64 byte line size */ 72 { 0x4a, LVL_3, MB(6) }, /* 12-way set assoc, 64 byte line size */
71 { 0x4b, LVL_3, MB(8) }, /* 16-way set assoc, 64 byte line size */ 73 { 0x4b, LVL_3, MB(8) }, /* 16-way set assoc, 64 byte line size */
@@ -87,6 +89,7 @@ static const struct _cache_table __cpuinitconst cache_table[] =
87 { 0x7c, LVL_2, MB(1) }, /* 8-way set assoc, sectored cache, 64 byte line size */ 89 { 0x7c, LVL_2, MB(1) }, /* 8-way set assoc, sectored cache, 64 byte line size */
88 { 0x7d, LVL_2, MB(2) }, /* 8-way set assoc, 64 byte line size */ 90 { 0x7d, LVL_2, MB(2) }, /* 8-way set assoc, 64 byte line size */
89 { 0x7f, LVL_2, 512 }, /* 2-way set assoc, 64 byte line size */ 91 { 0x7f, LVL_2, 512 }, /* 2-way set assoc, 64 byte line size */
92 { 0x80, LVL_2, 512 }, /* 8-way set assoc, 64 byte line size */
90 { 0x82, LVL_2, 256 }, /* 8-way set assoc, 32 byte line size */ 93 { 0x82, LVL_2, 256 }, /* 8-way set assoc, 32 byte line size */
91 { 0x83, LVL_2, 512 }, /* 8-way set assoc, 32 byte line size */ 94 { 0x83, LVL_2, 512 }, /* 8-way set assoc, 32 byte line size */
92 { 0x84, LVL_2, MB(1) }, /* 8-way set assoc, 32 byte line size */ 95 { 0x84, LVL_2, MB(1) }, /* 8-way set assoc, 32 byte line size */
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index e12246ff5aa6..6f8c5e9da97f 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -59,6 +59,7 @@ struct thermal_state {
59 59
60/* Callback to handle core threshold interrupts */ 60/* Callback to handle core threshold interrupts */
61int (*platform_thermal_notify)(__u64 msr_val); 61int (*platform_thermal_notify)(__u64 msr_val);
62EXPORT_SYMBOL(platform_thermal_notify);
62 63
63static DEFINE_PER_CPU(struct thermal_state, thermal_state); 64static DEFINE_PER_CPU(struct thermal_state, thermal_state);
64 65
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index d8286ed54ffa..e764fc05d700 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -14,6 +14,7 @@
14#include <linux/utsname.h> 14#include <linux/utsname.h>
15#include <trace/events/power.h> 15#include <trace/events/power.h>
16#include <linux/hw_breakpoint.h> 16#include <linux/hw_breakpoint.h>
17#include <asm/cpu.h>
17#include <asm/system.h> 18#include <asm/system.h>
18#include <asm/apic.h> 19#include <asm/apic.h>
19#include <asm/syscalls.h> 20#include <asm/syscalls.h>
@@ -505,7 +506,7 @@ static void poll_idle(void)
505#define MWAIT_ECX_EXTENDED_INFO 0x01 506#define MWAIT_ECX_EXTENDED_INFO 0x01
506#define MWAIT_EDX_C1 0xf0 507#define MWAIT_EDX_C1 0xf0
507 508
508static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c) 509int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
509{ 510{
510 u32 eax, ebx, ecx, edx; 511 u32 eax, ebx, ecx, edx;
511 512
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 763df77343dd..0cbe8c0b35ed 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -1402,8 +1402,9 @@ static inline void mwait_play_dead(void)
1402 unsigned int highest_subcstate = 0; 1402 unsigned int highest_subcstate = 0;
1403 int i; 1403 int i;
1404 void *mwait_ptr; 1404 void *mwait_ptr;
1405 struct cpuinfo_x86 *c = __this_cpu_ptr(&cpu_info);
1405 1406
1406 if (!cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_MWAIT)) 1407 if (!(cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)))
1407 return; 1408 return;
1408 if (!cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLSH)) 1409 if (!cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLSH))
1409 return; 1410 return;