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-rw-r--r--arch/powerpc/kernel/idle_power7.S49
1 files changed, 37 insertions, 12 deletions
diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
index 06305f653ab1..be05841396cf 100644
--- a/arch/powerpc/kernel/idle_power7.S
+++ b/arch/powerpc/kernel/idle_power7.S
@@ -135,6 +135,39 @@ _GLOBAL(power7_sleep)
135 b power7_powersave_common 135 b power7_powersave_common
136 /* No return */ 136 /* No return */
137 137
138/*
139 * Make opal call in realmode. This is a generic function to be called
140 * from realmode from reset vector. It handles endianess.
141 *
142 * r13 - paca pointer
143 * r1 - stack pointer
144 * r3 - opal token
145 */
146opal_call_realmode:
147 mflr r12
148 std r12,_LINK(r1)
149 ld r2,PACATOC(r13)
150 /* Set opal return address */
151 LOAD_REG_ADDR(r0,return_from_opal_call)
152 mtlr r0
153 /* Handle endian-ness */
154 li r0,MSR_LE
155 mfmsr r12
156 andc r12,r12,r0
157 mtspr SPRN_HSRR1,r12
158 mr r0,r3 /* Move opal token to r0 */
159 LOAD_REG_ADDR(r11,opal)
160 ld r12,8(r11)
161 ld r2,0(r11)
162 mtspr SPRN_HSRR0,r12
163 hrfid
164
165return_from_opal_call:
166 FIXUP_ENDIAN
167 ld r0,_LINK(r1)
168 mtlr r0
169 blr
170
138#define CHECK_HMI_INTERRUPT \ 171#define CHECK_HMI_INTERRUPT \
139 mfspr r0,SPRN_SRR1; \ 172 mfspr r0,SPRN_SRR1; \
140BEGIN_FTR_SECTION_NESTED(66); \ 173BEGIN_FTR_SECTION_NESTED(66); \
@@ -148,12 +181,8 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66); \
148 ld r2,PACATOC(r13); \ 181 ld r2,PACATOC(r13); \
149 ld r1,PACAR1(r13); \ 182 ld r1,PACAR1(r13); \
150 std r3,ORIG_GPR3(r1); /* Save original r3 */ \ 183 std r3,ORIG_GPR3(r1); /* Save original r3 */ \
151 li r0,OPAL_HANDLE_HMI; \ 184 li r3,OPAL_HANDLE_HMI; /* Pass opal token argument*/ \
152 LOAD_REG_ADDR(r11,opal); \ 185 bl opal_call_realmode; \
153 ld r12,8(r11); \
154 ld r2,0(r11); \
155 mtctr r12; \
156 bctrl; \
157 ld r3,ORIG_GPR3(r1); /* Restore original r3 */ \ 186 ld r3,ORIG_GPR3(r1); /* Restore original r3 */ \
15820: nop; 18720: nop;
159 188
@@ -166,12 +195,8 @@ BEGIN_FTR_SECTION
166 CHECK_HMI_INTERRUPT 195 CHECK_HMI_INTERRUPT
167END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) 196END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
168 /* Time base re-sync */ 197 /* Time base re-sync */
169 li r0,OPAL_RESYNC_TIMEBASE 198 li r3,OPAL_RESYNC_TIMEBASE
170 LOAD_REG_ADDR(r11,opal); 199 bl opal_call_realmode;
171 ld r12,8(r11);
172 ld r2,0(r11);
173 mtctr r12
174 bctrl
175 200
176 /* TODO: Check r3 for failure */ 201 /* TODO: Check r3 for failure */
177 202