diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/plat-omap/include/plat/omap-serial.h | 129 |
1 files changed, 129 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h new file mode 100644 index 000000000000..0d6f076cf748 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/omap-serial.h | |||
| @@ -0,0 +1,129 @@ | |||
| 1 | /* | ||
| 2 | * Driver for OMAP-UART controller. | ||
| 3 | * Based on drivers/serial/8250.c | ||
| 4 | * | ||
| 5 | * Copyright (C) 2010 Texas Instruments. | ||
| 6 | * | ||
| 7 | * Authors: | ||
| 8 | * Govindraj R <govindraj.raja@ti.com> | ||
| 9 | * Thara Gopinath <thara@ti.com> | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License as published by | ||
| 13 | * the Free Software Foundation; either version 2 of the License, or | ||
| 14 | * (at your option) any later version. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef __OMAP_SERIAL_H__ | ||
| 18 | #define __OMAP_SERIAL_H__ | ||
| 19 | |||
| 20 | #include <linux/serial_core.h> | ||
| 21 | #include <linux/platform_device.h> | ||
| 22 | |||
| 23 | #include <plat/control.h> | ||
| 24 | #include <plat/mux.h> | ||
| 25 | |||
| 26 | #define DRIVER_NAME "omap-hsuart" | ||
| 27 | |||
| 28 | /* | ||
| 29 | * Use tty device name as ttyO, [O -> OMAP] | ||
| 30 | * in bootargs we specify as console=ttyO0 if uart1 | ||
| 31 | * is used as console uart. | ||
| 32 | */ | ||
| 33 | #define OMAP_SERIAL_NAME "ttyO" | ||
| 34 | |||
| 35 | #define OMAP_MDR1_DISABLE 0x07 | ||
| 36 | #define OMAP_MDR1_MODE13X 0x03 | ||
| 37 | #define OMAP_MDR1_MODE16X 0x00 | ||
| 38 | #define OMAP_MODE13X_SPEED 230400 | ||
| 39 | |||
| 40 | /* | ||
| 41 | * LCR = 0XBF: Switch to Configuration Mode B. | ||
| 42 | * In configuration mode b allow access | ||
| 43 | * to EFR,DLL,DLH. | ||
| 44 | * Reference OMAP TRM Chapter 17 | ||
| 45 | * Section: 1.4.3 Mode Selection | ||
| 46 | */ | ||
| 47 | #define OMAP_UART_LCR_CONF_MDB 0XBF | ||
| 48 | |||
| 49 | /* WER = 0x7F | ||
| 50 | * Enable module level wakeup in WER reg | ||
| 51 | */ | ||
| 52 | #define OMAP_UART_WER_MOD_WKUP 0X7F | ||
| 53 | |||
| 54 | /* Enable XON/XOFF flow control on output */ | ||
| 55 | #define OMAP_UART_SW_TX 0x04 | ||
| 56 | |||
| 57 | /* Enable XON/XOFF flow control on input */ | ||
| 58 | #define OMAP_UART_SW_RX 0x04 | ||
| 59 | |||
| 60 | #define OMAP_UART_SYSC_RESET 0X07 | ||
| 61 | #define OMAP_UART_TCR_TRIG 0X0F | ||
| 62 | #define OMAP_UART_SW_CLR 0XF0 | ||
| 63 | #define OMAP_UART_FIFO_CLR 0X06 | ||
| 64 | |||
| 65 | #define OMAP_UART_DMA_CH_FREE -1 | ||
| 66 | |||
| 67 | #define RX_TIMEOUT (3 * HZ) | ||
| 68 | #define OMAP_MAX_HSUART_PORTS 4 | ||
| 69 | |||
| 70 | #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA | ||
| 71 | |||
| 72 | struct omap_uart_port_info { | ||
| 73 | bool dma_enabled; /* To specify DMA Mode */ | ||
| 74 | unsigned int uartclk; /* UART clock rate */ | ||
| 75 | void __iomem *membase; /* ioremap cookie or NULL */ | ||
| 76 | resource_size_t mapbase; /* resource base */ | ||
| 77 | unsigned long irqflags; /* request_irq flags */ | ||
| 78 | upf_t flags; /* UPF_* flags */ | ||
| 79 | }; | ||
| 80 | |||
| 81 | struct uart_omap_dma { | ||
| 82 | u8 uart_dma_tx; | ||
| 83 | u8 uart_dma_rx; | ||
| 84 | int rx_dma_channel; | ||
| 85 | int tx_dma_channel; | ||
| 86 | dma_addr_t rx_buf_dma_phys; | ||
| 87 | dma_addr_t tx_buf_dma_phys; | ||
| 88 | unsigned int uart_base; | ||
| 89 | /* | ||
| 90 | * Buffer for rx dma.It is not required for tx because the buffer | ||
| 91 | * comes from port structure. | ||
| 92 | */ | ||
| 93 | unsigned char *rx_buf; | ||
| 94 | unsigned int prev_rx_dma_pos; | ||
| 95 | int tx_buf_size; | ||
| 96 | int tx_dma_used; | ||
| 97 | int rx_dma_used; | ||
| 98 | spinlock_t tx_lock; | ||
| 99 | spinlock_t rx_lock; | ||
| 100 | /* timer to poll activity on rx dma */ | ||
| 101 | struct timer_list rx_timer; | ||
| 102 | int rx_buf_size; | ||
| 103 | int rx_timeout; | ||
| 104 | }; | ||
| 105 | |||
| 106 | struct uart_omap_port { | ||
| 107 | struct uart_port port; | ||
| 108 | struct uart_omap_dma uart_dma; | ||
| 109 | struct platform_device *pdev; | ||
| 110 | |||
| 111 | unsigned char ier; | ||
| 112 | unsigned char lcr; | ||
| 113 | unsigned char mcr; | ||
| 114 | unsigned char fcr; | ||
| 115 | unsigned char efr; | ||
| 116 | |||
| 117 | int use_dma; | ||
| 118 | /* | ||
| 119 | * Some bits in registers are cleared on a read, so they must | ||
| 120 | * be saved whenever the register is read but the bits will not | ||
| 121 | * be immediately processed. | ||
| 122 | */ | ||
| 123 | unsigned int lsr_break_flag; | ||
| 124 | unsigned char msr_saved_flags; | ||
| 125 | char name[20]; | ||
| 126 | unsigned long port_activity; | ||
| 127 | }; | ||
| 128 | |||
| 129 | #endif /* __OMAP_SERIAL_H__ */ | ||