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-rw-r--r--arch/alpha/Kconfig2
-rw-r--r--arch/alpha/include/asm/atomic.h68
-rw-r--r--arch/alpha/include/asm/cmpxchg.h71
-rw-r--r--arch/alpha/include/asm/dma-mapping.h18
-rw-r--r--arch/alpha/include/asm/rtc.h8
-rw-r--r--arch/alpha/include/asm/xchg.h4
-rw-r--r--arch/alpha/kernel/core_tsunami.c1
-rw-r--r--arch/alpha/kernel/pci-noop.c10
-rw-r--r--arch/alpha/kernel/pci_iommu.c10
-rw-r--r--arch/alpha/kernel/signal.c31
-rw-r--r--arch/alpha/kernel/smp.c2
-rw-r--r--arch/alpha/kernel/sys_marvel.c2
-rw-r--r--arch/arm/Kconfig10
-rw-r--r--arch/arm/boot/compressed/atags_to_fdt.c2
-rw-r--r--arch/arm/boot/compressed/head.S2
-rw-r--r--arch/arm/boot/dts/at91sam9g20.dtsi3
-rw-r--r--arch/arm/boot/dts/at91sam9g25ek.dts4
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi3
-rw-r--r--arch/arm/boot/dts/at91sam9m10g45ek.dts6
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi7
-rw-r--r--arch/arm/boot/dts/at91sam9x5cm.dtsi2
-rw-r--r--arch/arm/boot/dts/db8500.dtsi1
-rw-r--r--arch/arm/boot/dts/highbank.dts1
-rw-r--r--arch/arm/boot/dts/msm8660-surf.dts4
-rw-r--r--arch/arm/boot/dts/usb_a9g20.dts2
-rw-r--r--arch/arm/boot/dts/versatile-ab.dts2
-rw-r--r--arch/arm/boot/dts/versatile-pb.dts2
-rw-r--r--arch/arm/common/vic.c9
-rw-r--r--arch/arm/configs/imx_v4_v5_defconfig1
-rw-r--r--arch/arm/configs/mini2440_defconfig2
-rw-r--r--arch/arm/configs/u8500_defconfig9
-rw-r--r--arch/arm/include/asm/barrier.h2
-rw-r--r--arch/arm/include/asm/io.h2
-rw-r--r--arch/arm/include/asm/jump_label.h2
-rw-r--r--arch/arm/include/asm/thread_info.h7
-rw-r--r--arch/arm/include/asm/tls.h4
-rw-r--r--arch/arm/kernel/bios32.c1
-rw-r--r--arch/arm/kernel/insn.c1
-rw-r--r--arch/arm/kernel/irq.c6
-rw-r--r--arch/arm/kernel/kprobes.c2
-rw-r--r--arch/arm/kernel/ptrace.c4
-rw-r--r--arch/arm/kernel/setup.c16
-rw-r--r--arch/arm/kernel/signal.c55
-rw-r--r--arch/arm/kernel/smp.c29
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c1
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c2
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c3
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c3
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c6
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c11
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c3
-rw-r--r--arch/arm/mach-at91/at91sam9x5.c2
-rw-r--r--arch/arm/mach-at91/board-rm9200ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c5
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c1
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c1
-rw-r--r--arch/arm/mach-at91/clock.c1
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pmc.h2
-rw-r--r--arch/arm/mach-at91/include/mach/board.h13
-rw-r--r--arch/arm/mach-at91/include/mach/io.h27
-rw-r--r--arch/arm/mach-at91/setup.c2
-rw-r--r--arch/arm/mach-bcmring/core.c4
-rw-r--r--arch/arm/mach-exynos/Kconfig7
-rw-r--r--arch/arm/mach-exynos/Makefile3
-rw-r--r--arch/arm/mach-exynos/Makefile.boot3
-rw-r--r--arch/arm/mach-exynos/clock-exynos4.c24
-rw-r--r--arch/arm/mach-exynos/clock-exynos5.c24
-rw-r--r--arch/arm/mach-exynos/common.c17
-rw-r--r--arch/arm/mach-exynos/dev-drm.c29
-rw-r--r--arch/arm/mach-exynos/dev-dwmci.c13
-rw-r--r--arch/arm/mach-exynos/dma.c2
-rw-r--r--arch/arm/mach-exynos/include/mach/debug-macro.S7
-rw-r--r--arch/arm/mach-exynos/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h4
-rw-r--r--arch/arm/mach-exynos/include/mach/regs-clock.h6
-rw-r--r--arch/arm/mach-exynos/include/mach/uncompress.h17
-rw-r--r--arch/arm/mach-exynos/mach-exynos5-dt.c2
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c47
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c3
-rw-r--r--arch/arm/mach-imx/clock-imx27.c1
-rw-r--r--arch/arm/mach-imx/clock-imx35.c2
-rw-r--r--arch/arm/mach-imx/imx27-dt.c6
-rw-r--r--arch/arm/mach-imx/mach-armadillo5x0.c9
-rw-r--r--arch/arm/mach-imx/mach-kzm_arm11_01.c9
-rw-r--r--arch/arm/mach-imx/mach-mx31lilly.c9
-rw-r--r--arch/arm/mach-imx/mach-mx31lite.c9
-rw-r--r--arch/arm/mach-imx/mach-mx35_3ds.c2
-rw-r--r--arch/arm/mach-imx/mach-mx53_ard.c8
-rw-r--r--arch/arm/mach-imx/mm-imx5.c2
-rw-r--r--arch/arm/mach-msm/board-halibut.c3
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c25
-rw-r--r--arch/arm/mach-msm/board-trout-panel.c1
-rw-r--r--arch/arm/mach-msm/board-trout.c1
-rw-r--r--arch/arm/mach-msm/include/mach/uncompress.h1
-rw-r--r--arch/arm/mach-msm/proc_comm.c2
-rw-r--r--arch/arm/mach-msm/smd_debug.c8
-rw-r--r--arch/arm/mach-omap1/include/mach/io.h45
-rw-r--r--arch/arm/mach-omap1/mux.c1
-rw-r--r--arch/arm/mach-omap1/timer.c4
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c12
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c16
-rw-r--r--arch/arm/mach-omap2/board-generic.c2
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c6
-rw-r--r--arch/arm/mach-omap2/board-ldp.c7
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c15
-rw-r--r--arch/arm/mach-omap2/board-omap3logic.c7
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c16
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c13
-rw-r--r--arch/arm/mach-omap2/board-overo.c8
-rw-r--r--arch/arm/mach-omap2/board-zoom-debugboard.c9
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c80
-rw-r--r--arch/arm/mach-omap2/clock.c5
-rw-r--r--arch/arm/mach-omap2/clock.h8
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c18
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c5
-rw-r--r--arch/arm/mach-omap2/clockdomains44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/gpmc-smsc911x.c65
-rw-r--r--arch/arm/mach-omap2/hsmmc.c7
-rw-r--r--arch/arm/mach-omap2/include/mach/barriers.h2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c85
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c37
-rw-r--r--arch/arm/mach-omap2/opp.c4
-rw-r--r--arch/arm/mach-omap2/pm34xx.c38
-rw-r--r--arch/arm/mach-omap2/pm44xx.c10
-rw-r--r--arch/arm/mach-omap2/powerdomain.c8
-rw-r--r--arch/arm/mach-omap2/prm44xx.c21
-rw-r--r--arch/arm/mach-omap2/prm_common.c2
-rw-r--r--arch/arm/mach-omap2/serial.c124
-rw-r--r--arch/arm/mach-omap2/twl-common.c37
-rw-r--r--arch/arm/mach-omap2/twl-common.h10
-rw-r--r--arch/arm/mach-omap2/usb-host.c10
-rw-r--r--arch/arm/mach-pxa/Kconfig1
-rw-r--r--arch/arm/mach-pxa/include/mach/io.h17
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h7
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c21
-rw-r--r--arch/arm/mach-pxa/pxa27x.c6
-rw-r--r--arch/arm/mach-s3c24xx/Kconfig8
-rw-r--r--arch/arm/mach-s3c24xx/common.h18
-rw-r--r--arch/arm/mach-s5pv210/dma.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c4
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c6
-rw-r--r--arch/arm/mach-sa1100/collie.c4
-rw-r--r--arch/arm/mach-sa1100/generic.c2
-rw-r--r--arch/arm/mach-sa1100/include/mach/collie.h3
-rw-r--r--arch/arm/mach-u300/core.c6
-rw-r--r--arch/arm/mach-u300/i2c.c9
-rw-r--r--arch/arm/mach-u300/include/mach/irqs.h150
-rw-r--r--arch/arm/mach-ux500/Kconfig1
-rw-r--r--arch/arm/mach-ux500/mbox-db5500.c2
-rw-r--r--arch/arm/mach-ux500/platsmp.c2
-rw-r--r--arch/arm/mach-versatile/pci.c10
-rw-r--r--arch/arm/mm/Kconfig2
-rw-r--r--arch/arm/mm/abort-ev6.S17
-rw-r--r--arch/arm/mm/cache-l2x0.c25
-rw-r--r--arch/arm/mm/fault.c2
-rw-r--r--arch/arm/mm/init.c4
-rw-r--r--arch/arm/mm/mmu.c4
-rw-r--r--arch/arm/mm/nommu.c2
-rw-r--r--arch/arm/mm/proc-v7.S12
-rw-r--r--arch/arm/plat-mxc/3ds_debugboard.c2
-rw-r--r--arch/arm/plat-omap/Kconfig1
-rw-r--r--arch/arm/plat-omap/clock.c31
-rw-r--r--arch/arm/plat-omap/dma.c14
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h10
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h16
-rw-r--r--arch/arm/plat-omap/sram.c12
-rw-r--r--arch/arm/plat-samsung/Kconfig1
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h28
-rw-r--r--arch/arm/vfp/vfpmodule.c99
-rw-r--r--arch/avr32/include/asm/barrier.h2
-rw-r--r--arch/avr32/include/asm/special_insns.h13
-rw-r--r--arch/avr32/mach-at32ap/include/mach/board.h2
-rw-r--r--arch/blackfin/Kconfig2
-rw-r--r--arch/blackfin/configs/BF527-EZKIT_defconfig1
-rw-r--r--arch/blackfin/include/asm/cmpxchg.h3
-rw-r--r--arch/blackfin/include/asm/gpio.h14
-rw-r--r--arch/blackfin/mach-bf538/boards/ezkit.c53
-rw-r--r--arch/c6x/include/asm/irq.h4
-rw-r--r--arch/c6x/kernel/irq.c13
-rw-r--r--arch/c6x/kernel/signal.c16
-rw-r--r--arch/frv/mb93090-mb00/pci-dma.c1
-rw-r--r--arch/hexagon/include/asm/dma-mapping.h18
-rw-r--r--arch/hexagon/kernel/dma.c10
-rw-r--r--arch/hexagon/kernel/process.c6
-rw-r--r--arch/hexagon/kernel/ptrace.c1
-rw-r--r--arch/hexagon/kernel/smp.c16
-rw-r--r--arch/hexagon/kernel/time.c1
-rw-r--r--arch/hexagon/kernel/vdso.c1
-rw-r--r--arch/ia64/hp/common/sba_iommu.c11
-rw-r--r--arch/ia64/include/asm/cmpxchg.h148
-rw-r--r--arch/ia64/include/asm/dma-mapping.h18
-rw-r--r--arch/ia64/include/asm/futex.h9
-rw-r--r--arch/ia64/include/asm/intrinsics.h114
-rw-r--r--arch/ia64/kernel/acpi.c2
-rw-r--r--arch/ia64/kernel/pci-swiotlb.c14
-rw-r--r--arch/ia64/kernel/perfmon.c18
-rw-r--r--arch/ia64/sn/pci/pci_dma.c9
-rw-r--r--arch/m68k/configs/m5275evb_defconfig1
-rw-r--r--arch/m68k/include/asm/atomic.h1
-rw-r--r--arch/m68k/mac/config.c3
-rw-r--r--arch/m68k/platform/527x/config.c2
-rw-r--r--arch/m68k/platform/68EZ328/Makefile6
-rw-r--r--arch/m68k/platform/68VZ328/Makefile9
-rw-r--r--arch/m68k/platform/68VZ328/bootlogo.h (renamed from arch/m68k/platform/68EZ328/bootlogo.h)2
-rw-r--r--arch/m68k/platform/coldfire/device.c2
-rw-r--r--arch/m68k/q40/config.c3
-rw-r--r--arch/microblaze/include/asm/cmpxchg.h2
-rw-r--r--arch/microblaze/include/asm/dma-mapping.h18
-rw-r--r--arch/microblaze/include/asm/futex.h2
-rw-r--r--arch/microblaze/include/asm/processor.h4
-rw-r--r--arch/microblaze/kernel/dma.c10
-rw-r--r--arch/microblaze/kernel/early_printk.c2
-rw-r--r--arch/microblaze/kernel/setup.c2
-rw-r--r--arch/microblaze/kernel/unwind.c1
-rw-r--r--arch/microblaze/lib/uaccess_old.S98
-rw-r--r--arch/mips/ath79/dev-wmac.c2
-rw-r--r--arch/mips/cavium-octeon/dma-octeon.c12
-rw-r--r--arch/mips/cavium-octeon/smp.c4
-rw-r--r--arch/mips/include/asm/dma-mapping.h18
-rw-r--r--arch/mips/include/asm/mach-jz4740/irq.h2
-rw-r--r--arch/mips/include/asm/mmu_context.h6
-rw-r--r--arch/mips/kernel/mips-mt-fpaff.c2
-rw-r--r--arch/mips/kernel/proc.c2
-rw-r--r--arch/mips/kernel/signal.c27
-rw-r--r--arch/mips/kernel/signal32.c20
-rw-r--r--arch/mips/kernel/signal_n32.c10
-rw-r--r--arch/mips/kernel/smp-bmips.c2
-rw-r--r--arch/mips/kernel/smp.c27
-rw-r--r--arch/mips/kernel/smtc.c2
-rw-r--r--arch/mips/mm/c-octeon.c6
-rw-r--r--arch/mips/mm/dma-default.c8
-rw-r--r--arch/mips/netlogic/common/smp.c6
-rw-r--r--arch/mips/pmc-sierra/yosemite/smp.c8
-rw-r--r--arch/mips/sgi-ip27/ip27-smp.c2
-rw-r--r--arch/mips/sibyte/bcm1480/smp.c7
-rw-r--r--arch/mips/sibyte/sb1250/smp.c7
-rw-r--r--arch/parisc/include/asm/atomic.h107
-rw-r--r--arch/parisc/include/asm/cmpxchg.h116
-rw-r--r--arch/parisc/kernel/pdc_cons.c2
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi43
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi10
-rw-r--r--arch/powerpc/boot/dts/p1020mbg-pc.dtsi151
-rw-r--r--arch/powerpc/boot/dts/p1020mbg-pc_32b.dts89
-rw-r--r--arch/powerpc/boot/dts/p1020mbg-pc_36b.dts89
-rw-r--r--arch/powerpc/boot/dts/p1020utm-pc.dtsi140
-rw-r--r--arch/powerpc/boot/dts/p1020utm-pc_32b.dts89
-rw-r--r--arch/powerpc/boot/dts/p1020utm-pc_36b.dts89
-rw-r--r--arch/powerpc/boot/dts/p2041rdb.dts3
-rw-r--r--arch/powerpc/boot/dts/p3041ds.dts4
-rw-r--r--arch/powerpc/boot/dts/p3060qds.dts2
-rw-r--r--arch/powerpc/boot/dts/p4080ds.dts3
-rw-r--r--arch/powerpc/boot/dts/p5020ds.dts4
-rw-r--r--arch/powerpc/configs/corenet32_smp_defconfig1
-rw-r--r--arch/powerpc/configs/corenet64_smp_defconfig2
-rw-r--r--arch/powerpc/configs/mpc85xx_defconfig1
-rw-r--r--arch/powerpc/configs/mpc85xx_smp_defconfig1
-rw-r--r--arch/powerpc/include/asm/dma-mapping.h24
-rw-r--r--arch/powerpc/include/asm/epapr_hcalls.h7
-rw-r--r--arch/powerpc/include/asm/fsl_guts.h26
-rw-r--r--arch/powerpc/include/asm/irq.h6
-rw-r--r--arch/powerpc/include/asm/mpic.h18
-rw-r--r--arch/powerpc/include/asm/mpic_msgr.h1
-rw-r--r--arch/powerpc/include/asm/reg_booke.h5
-rw-r--r--arch/powerpc/kernel/dma-iommu.c10
-rw-r--r--arch/powerpc/kernel/dma-swiotlb.c4
-rw-r--r--arch/powerpc/kernel/dma.c10
-rw-r--r--arch/powerpc/kernel/entry_32.S39
-rw-r--r--arch/powerpc/kernel/fadump.c2
-rw-r--r--arch/powerpc/kernel/ibmebus.c10
-rw-r--r--arch/powerpc/kernel/irq.c12
-rw-r--r--arch/powerpc/kernel/kgdb.c1
-rw-r--r--arch/powerpc/kernel/machine_kexec.c7
-rw-r--r--arch/powerpc/kernel/process.c4
-rw-r--r--arch/powerpc/kernel/setup_32.c3
-rw-r--r--arch/powerpc/kernel/vio.c14
-rw-r--r--arch/powerpc/kvm/book3s_emulate.c1
-rw-r--r--arch/powerpc/kvm/book3s_hv_builtin.c9
-rw-r--r--arch/powerpc/kvm/book3s_hv_interrupts.S8
-rw-r--r--arch/powerpc/kvm/book3s_interrupts.S7
-rw-r--r--arch/powerpc/kvm/book3s_paired_singles.c1
-rw-r--r--arch/powerpc/kvm/book3s_pr.c10
-rw-r--r--arch/powerpc/kvm/booke_interrupts.S7
-rw-r--r--arch/powerpc/net/bpf_jit.h8
-rw-r--r--arch/powerpc/net/bpf_jit_64.S108
-rw-r--r--arch/powerpc/net/bpf_jit_comp.c26
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pci.c2
-rw-r--r--arch/powerpc/platforms/85xx/common.c6
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_mds.c13
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_rdb.c2
-rw-r--r--arch/powerpc/platforms/85xx/p1022_ds.c17
-rw-r--r--arch/powerpc/platforms/86xx/mpc8610_hpcd.c2
-rw-r--r--arch/powerpc/platforms/cell/axon_msi.c8
-rw-r--r--arch/powerpc/platforms/cell/beat_interrupt.c4
-rw-r--r--arch/powerpc/platforms/cell/iommu.c16
-rw-r--r--arch/powerpc/platforms/cell/qpace_setup.c2
-rw-r--r--arch/powerpc/platforms/cell/setup.c2
-rw-r--r--arch/powerpc/platforms/powermac/low_i2c.c9
-rw-r--r--arch/powerpc/platforms/powermac/pic.c6
-rw-r--r--arch/powerpc/platforms/powermac/smp.c2
-rw-r--r--arch/powerpc/platforms/ps3/interrupt.c3
-rw-r--r--arch/powerpc/platforms/ps3/system-bus.c13
-rw-r--r--arch/powerpc/platforms/pseries/Kconfig4
-rw-r--r--arch/powerpc/platforms/pseries/eeh.c2
-rw-r--r--arch/powerpc/platforms/pseries/eeh_event.c4
-rw-r--r--arch/powerpc/sysdev/cpm2_pic.c3
-rw-r--r--arch/powerpc/sysdev/mpc8xx_pic.c61
-rw-r--r--arch/powerpc/sysdev/mpic.c54
-rw-r--r--arch/powerpc/sysdev/mpic_msgr.c12
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c22
-rw-r--r--arch/powerpc/sysdev/scom.c1
-rw-r--r--arch/powerpc/sysdev/xics/xics-common.c7
-rw-r--r--arch/s390/Kconfig1
-rw-r--r--arch/s390/defconfig37
-rw-r--r--arch/s390/include/asm/facility.h3
-rw-r--r--arch/s390/include/asm/pgalloc.h3
-rw-r--r--arch/s390/include/asm/swab.h2
-rw-r--r--arch/s390/include/asm/tlb.h22
-rw-r--r--arch/s390/kernel/head.S2
-rw-r--r--arch/s390/kernel/irq.c9
-rw-r--r--arch/s390/kernel/perf_cpum_cf.c4
-rw-r--r--arch/s390/mm/maccess.c27
-rw-r--r--arch/s390/mm/pgtable.c63
-rw-r--r--arch/sh/Kconfig.debug1
-rw-r--r--arch/sh/boards/board-sh7785lcr.c1
-rw-r--r--arch/sh/boards/mach-hp6xx/pm.c1
-rw-r--r--arch/sh/drivers/dma/dma-sysfs.c2
-rw-r--r--arch/sh/include/asm/atomic.h2
-rw-r--r--arch/sh/include/asm/dma-mapping.h28
-rw-r--r--arch/sh/kernel/cpu/fpu.c1
-rw-r--r--arch/sh/kernel/cpu/sh2a/fpu.c1
-rw-r--r--arch/sh/kernel/cpu/sh4/fpu.c1
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7757.c2
-rw-r--r--arch/sh/kernel/cpu/shmobile/pm.c1
-rw-r--r--arch/sh/kernel/dma-nommu.c4
-rw-r--r--arch/sh/kernel/idle.c2
-rw-r--r--arch/sh/kernel/kgdb.c1
-rw-r--r--arch/sh/kernel/process_32.c1
-rw-r--r--arch/sh/kernel/smp.c1
-rw-r--r--arch/sh/kernel/vsyscall/vsyscall-sigreturn.S35
-rw-r--r--arch/sh/kernel/vsyscall/vsyscall-trapa.S23
-rw-r--r--arch/sh/mm/cache-sh4.c1
-rw-r--r--arch/sh/mm/consistent.c6
-rw-r--r--arch/sh/mm/fault_32.c2
-rw-r--r--arch/sh/mm/flush-sh4.c1
-rw-r--r--arch/sh/mm/sram.c1
-rw-r--r--arch/sparc/include/asm/dma-mapping.h18
-rw-r--r--arch/sparc/include/asm/pgtable_64.h4
-rw-r--r--arch/sparc/kernel/ds.c2
-rw-r--r--arch/sparc/kernel/iommu.c10
-rw-r--r--arch/sparc/kernel/ioport.c18
-rw-r--r--arch/sparc/kernel/leon_kernel.c6
-rw-r--r--arch/sparc/kernel/leon_pci.c13
-rw-r--r--arch/sparc/kernel/leon_smp.c3
-rw-r--r--arch/sparc/kernel/pci_sun4v.c9
-rw-r--r--arch/sparc/kernel/rtrap_64.S7
-rw-r--r--arch/sparc/kernel/sys_sparc_64.c7
-rw-r--r--arch/sparc/mm/fault_32.c37
-rw-r--r--arch/sparc/mm/fault_64.c37
-rw-r--r--arch/tile/Kconfig8
-rw-r--r--arch/tile/Makefile5
-rw-r--r--arch/tile/include/arch/spr_def.h4
-rw-r--r--arch/tile/include/asm/atomic.h50
-rw-r--r--arch/tile/include/asm/atomic_32.h2
-rw-r--r--arch/tile/include/asm/bitops_64.h8
-rw-r--r--arch/tile/include/asm/cmpxchg.h73
-rw-r--r--arch/tile/include/asm/irq.h2
-rw-r--r--arch/tile/include/asm/pci.h4
-rw-r--r--arch/tile/include/asm/spinlock_64.h2
-rw-r--r--arch/tile/include/asm/stack.h1
-rw-r--r--arch/tile/include/asm/traps.h6
-rw-r--r--arch/tile/kernel/entry.S2
-rw-r--r--arch/tile/kernel/intvec_32.S24
-rw-r--r--arch/tile/kernel/intvec_64.S52
-rw-r--r--arch/tile/kernel/module.c2
-rw-r--r--arch/tile/kernel/pci.c4
-rw-r--r--arch/tile/kernel/proc.c4
-rw-r--r--arch/tile/kernel/process.c3
-rw-r--r--arch/tile/kernel/setup.c36
-rw-r--r--arch/tile/kernel/single_step.c35
-rw-r--r--arch/tile/kernel/smp.c8
-rw-r--r--arch/tile/kernel/smpboot.c2
-rw-r--r--arch/tile/kernel/stack.c232
-rw-r--r--arch/tile/kernel/traps.c15
-rw-r--r--arch/tile/lib/Makefile1
-rw-r--r--arch/tile/lib/cacheflush.c30
-rw-r--r--arch/tile/lib/memcpy_user_64.c8
-rw-r--r--arch/tile/lib/spinlock_common.h2
-rw-r--r--arch/tile/mm/fault.c22
-rw-r--r--arch/tile/mm/homecache.c1
-rw-r--r--arch/tile/mm/init.c26
-rw-r--r--arch/tile/mm/pgtable.c38
-rw-r--r--arch/um/drivers/cow.h35
-rw-r--r--arch/um/drivers/cow_user.c43
-rw-r--r--arch/um/drivers/mconsole_kern.c1
-rw-r--r--arch/um/include/asm/Kbuild3
-rw-r--r--arch/um/kernel/Makefile7
-rw-r--r--arch/um/kernel/process.c6
-rw-r--r--arch/um/kernel/skas/mmu.c1
-rw-r--r--arch/um/kernel/skas/process.c2
-rw-r--r--arch/um/kernel/smp.c9
-rw-r--r--arch/unicore32/include/asm/dma-mapping.h18
-rw-r--r--arch/unicore32/mm/dma-swiotlb.c18
-rw-r--r--arch/x86/Kconfig2
-rw-r--r--arch/x86/Makefile1
-rw-r--r--arch/x86/Makefile.um3
-rw-r--r--arch/x86/boot/compressed/head_32.S14
-rw-r--r--arch/x86/boot/compressed/head_64.S22
-rw-r--r--arch/x86/boot/compressed/relocs.c2
-rw-r--r--arch/x86/boot/tools/build.c15
-rw-r--r--arch/x86/ia32/ia32_aout.c35
-rw-r--r--arch/x86/include/asm/cmpxchg.h4
-rw-r--r--arch/x86/include/asm/dma-mapping.h26
-rw-r--r--arch/x86/include/asm/posix_types.h6
-rw-r--r--arch/x86/include/asm/processor.h10
-rw-r--r--arch/x86/include/asm/sigcontext.h2
-rw-r--r--arch/x86/include/asm/siginfo.h8
-rw-r--r--arch/x86/include/asm/uaccess.h2
-rw-r--r--arch/x86/include/asm/uaccess_32.h5
-rw-r--r--arch/x86/include/asm/uaccess_64.h4
-rw-r--r--arch/x86/include/asm/unistd.h6
-rw-r--r--arch/x86/include/asm/word-at-a-time.h79
-rw-r--r--arch/x86/include/asm/x86_init.h1
-rw-r--r--arch/x86/kernel/acpi/sleep.c4
-rw-r--r--arch/x86/kernel/acpi/sleep.h4
-rw-r--r--arch/x86/kernel/acpi/wakeup_32.S4
-rw-r--r--arch/x86/kernel/acpi/wakeup_64.S4
-rw-r--r--arch/x86/kernel/amd_gart_64.c11
-rw-r--r--arch/x86/kernel/apic/apic.c34
-rw-r--r--arch/x86/kernel/apic/apic_numachip.c7
-rw-r--r--arch/x86/kernel/apic/x2apic_phys.c6
-rw-r--r--arch/x86/kernel/cpu/amd.c29
-rw-r--r--arch/x86/kernel/cpu/common.c9
-rw-r--r--arch/x86/kernel/cpu/intel_cacheinfo.c8
-rw-r--r--arch/x86/kernel/cpu/perf_event_p4.c13
-rw-r--r--arch/x86/kernel/i387.c1
-rw-r--r--arch/x86/kernel/irq.c7
-rw-r--r--arch/x86/kernel/kdebugfs.c9
-rw-r--r--arch/x86/kernel/kgdb.c60
-rw-r--r--arch/x86/kernel/kvm.c4
-rw-r--r--arch/x86/kernel/microcode_amd.c12
-rw-r--r--arch/x86/kernel/microcode_core.c10
-rw-r--r--arch/x86/kernel/pci-calgary_64.c9
-rw-r--r--arch/x86/kernel/pci-dma.c3
-rw-r--r--arch/x86/kernel/pci-nommu.c6
-rw-r--r--arch/x86/kernel/pci-swiotlb.c17
-rw-r--r--arch/x86/kernel/process.c24
-rw-r--r--arch/x86/kernel/vsyscall_64.c6
-rw-r--r--arch/x86/kernel/x86_init.c1
-rw-r--r--arch/x86/kvm/pmu.c20
-rw-r--r--arch/x86/kvm/vmx.c7
-rw-r--r--arch/x86/kvm/x86.c8
-rw-r--r--arch/x86/lib/insn.c53
-rw-r--r--arch/x86/lib/usercopy.c103
-rw-r--r--arch/x86/lib/usercopy_32.c87
-rw-r--r--arch/x86/lib/usercopy_64.c49
-rw-r--r--arch/x86/net/bpf_jit.S122
-rw-r--r--arch/x86/net/bpf_jit_comp.c43
-rw-r--r--arch/x86/platform/geode/net5501.c2
-rw-r--r--arch/x86/platform/mrst/mrst.c4
-rw-r--r--arch/x86/power/cpu.c2
-rw-r--r--arch/x86/um/asm/barrier.h75
-rw-r--r--arch/x86/um/asm/system.h135
-rw-r--r--arch/x86/xen/enlighten.c6
-rw-r--r--arch/x86/xen/mmu.c4
-rw-r--r--arch/x86/xen/pci-swiotlb-xen.c4
-rw-r--r--arch/x86/xen/smp.c17
-rw-r--r--arch/x86/xen/xen-asm.S2
-rw-r--r--arch/xtensa/include/asm/hardirq.h3
-rw-r--r--arch/xtensa/include/asm/io.h1
-rw-r--r--arch/xtensa/kernel/signal.c1
474 files changed, 4376 insertions, 2850 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 56a4df952fb0..22e58a99f38b 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -477,7 +477,7 @@ config ALPHA_BROKEN_IRQ_MASK
477 477
478config VGA_HOSE 478config VGA_HOSE
479 bool 479 bool
480 depends on ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL || ALPHA_TSUNAMI 480 depends on VGA_CONSOLE && (ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL || ALPHA_TSUNAMI)
481 default y 481 default y
482 help 482 help
483 Support VGA on an arbitrary hose; needed for several platforms 483 Support VGA on an arbitrary hose; needed for several platforms
diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h
index f62251e82ffa..3bb7ffeae3bc 100644
--- a/arch/alpha/include/asm/atomic.h
+++ b/arch/alpha/include/asm/atomic.h
@@ -3,6 +3,7 @@
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <asm/barrier.h> 5#include <asm/barrier.h>
6#include <asm/cmpxchg.h>
6 7
7/* 8/*
8 * Atomic operations that C can't guarantee us. Useful for 9 * Atomic operations that C can't guarantee us. Useful for
@@ -168,73 +169,6 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
168 return result; 169 return result;
169} 170}
170 171
171/*
172 * Atomic exchange routines.
173 */
174
175#define __ASM__MB
176#define ____xchg(type, args...) __xchg ## type ## _local(args)
177#define ____cmpxchg(type, args...) __cmpxchg ## type ## _local(args)
178#include <asm/xchg.h>
179
180#define xchg_local(ptr,x) \
181 ({ \
182 __typeof__(*(ptr)) _x_ = (x); \
183 (__typeof__(*(ptr))) __xchg_local((ptr), (unsigned long)_x_, \
184 sizeof(*(ptr))); \
185 })
186
187#define cmpxchg_local(ptr, o, n) \
188 ({ \
189 __typeof__(*(ptr)) _o_ = (o); \
190 __typeof__(*(ptr)) _n_ = (n); \
191 (__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
192 (unsigned long)_n_, \
193 sizeof(*(ptr))); \
194 })
195
196#define cmpxchg64_local(ptr, o, n) \
197 ({ \
198 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
199 cmpxchg_local((ptr), (o), (n)); \
200 })
201
202#ifdef CONFIG_SMP
203#undef __ASM__MB
204#define __ASM__MB "\tmb\n"
205#endif
206#undef ____xchg
207#undef ____cmpxchg
208#define ____xchg(type, args...) __xchg ##type(args)
209#define ____cmpxchg(type, args...) __cmpxchg ##type(args)
210#include <asm/xchg.h>
211
212#define xchg(ptr,x) \
213 ({ \
214 __typeof__(*(ptr)) _x_ = (x); \
215 (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, \
216 sizeof(*(ptr))); \
217 })
218
219#define cmpxchg(ptr, o, n) \
220 ({ \
221 __typeof__(*(ptr)) _o_ = (o); \
222 __typeof__(*(ptr)) _n_ = (n); \
223 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
224 (unsigned long)_n_, sizeof(*(ptr)));\
225 })
226
227#define cmpxchg64(ptr, o, n) \
228 ({ \
229 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
230 cmpxchg((ptr), (o), (n)); \
231 })
232
233#undef __ASM__MB
234#undef ____cmpxchg
235
236#define __HAVE_ARCH_CMPXCHG 1
237
238#define atomic64_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new)) 172#define atomic64_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
239#define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) 173#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
240 174
diff --git a/arch/alpha/include/asm/cmpxchg.h b/arch/alpha/include/asm/cmpxchg.h
new file mode 100644
index 000000000000..429e8cd0d78e
--- /dev/null
+++ b/arch/alpha/include/asm/cmpxchg.h
@@ -0,0 +1,71 @@
1#ifndef _ALPHA_CMPXCHG_H
2#define _ALPHA_CMPXCHG_H
3
4/*
5 * Atomic exchange routines.
6 */
7
8#define __ASM__MB
9#define ____xchg(type, args...) __xchg ## type ## _local(args)
10#define ____cmpxchg(type, args...) __cmpxchg ## type ## _local(args)
11#include <asm/xchg.h>
12
13#define xchg_local(ptr, x) \
14({ \
15 __typeof__(*(ptr)) _x_ = (x); \
16 (__typeof__(*(ptr))) __xchg_local((ptr), (unsigned long)_x_, \
17 sizeof(*(ptr))); \
18})
19
20#define cmpxchg_local(ptr, o, n) \
21({ \
22 __typeof__(*(ptr)) _o_ = (o); \
23 __typeof__(*(ptr)) _n_ = (n); \
24 (__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
25 (unsigned long)_n_, \
26 sizeof(*(ptr))); \
27})
28
29#define cmpxchg64_local(ptr, o, n) \
30({ \
31 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
32 cmpxchg_local((ptr), (o), (n)); \
33})
34
35#ifdef CONFIG_SMP
36#undef __ASM__MB
37#define __ASM__MB "\tmb\n"
38#endif
39#undef ____xchg
40#undef ____cmpxchg
41#define ____xchg(type, args...) __xchg ##type(args)
42#define ____cmpxchg(type, args...) __cmpxchg ##type(args)
43#include <asm/xchg.h>
44
45#define xchg(ptr, x) \
46({ \
47 __typeof__(*(ptr)) _x_ = (x); \
48 (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, \
49 sizeof(*(ptr))); \
50})
51
52#define cmpxchg(ptr, o, n) \
53({ \
54 __typeof__(*(ptr)) _o_ = (o); \
55 __typeof__(*(ptr)) _n_ = (n); \
56 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
57 (unsigned long)_n_, sizeof(*(ptr)));\
58})
59
60#define cmpxchg64(ptr, o, n) \
61({ \
62 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
63 cmpxchg((ptr), (o), (n)); \
64})
65
66#undef __ASM__MB
67#undef ____cmpxchg
68
69#define __HAVE_ARCH_CMPXCHG 1
70
71#endif /* _ALPHA_CMPXCHG_H */
diff --git a/arch/alpha/include/asm/dma-mapping.h b/arch/alpha/include/asm/dma-mapping.h
index 4567aca6fdd6..dfa32f061320 100644
--- a/arch/alpha/include/asm/dma-mapping.h
+++ b/arch/alpha/include/asm/dma-mapping.h
@@ -12,16 +12,22 @@ static inline struct dma_map_ops *get_dma_ops(struct device *dev)
12 12
13#include <asm-generic/dma-mapping-common.h> 13#include <asm-generic/dma-mapping-common.h>
14 14
15static inline void *dma_alloc_coherent(struct device *dev, size_t size, 15#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
16 dma_addr_t *dma_handle, gfp_t gfp) 16
17static inline void *dma_alloc_attrs(struct device *dev, size_t size,
18 dma_addr_t *dma_handle, gfp_t gfp,
19 struct dma_attrs *attrs)
17{ 20{
18 return get_dma_ops(dev)->alloc_coherent(dev, size, dma_handle, gfp); 21 return get_dma_ops(dev)->alloc(dev, size, dma_handle, gfp, attrs);
19} 22}
20 23
21static inline void dma_free_coherent(struct device *dev, size_t size, 24#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
22 void *vaddr, dma_addr_t dma_handle) 25
26static inline void dma_free_attrs(struct device *dev, size_t size,
27 void *vaddr, dma_addr_t dma_handle,
28 struct dma_attrs *attrs)
23{ 29{
24 get_dma_ops(dev)->free_coherent(dev, size, vaddr, dma_handle); 30 get_dma_ops(dev)->free(dev, size, vaddr, dma_handle, attrs);
25} 31}
26 32
27static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 33static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
diff --git a/arch/alpha/include/asm/rtc.h b/arch/alpha/include/asm/rtc.h
index 1f7fba671ae6..d70408d36677 100644
--- a/arch/alpha/include/asm/rtc.h
+++ b/arch/alpha/include/asm/rtc.h
@@ -1,14 +1,10 @@
1#ifndef _ALPHA_RTC_H 1#ifndef _ALPHA_RTC_H
2#define _ALPHA_RTC_H 2#define _ALPHA_RTC_H
3 3
4#if defined(CONFIG_ALPHA_GENERIC) 4#if defined(CONFIG_ALPHA_MARVEL) && defined(CONFIG_SMP) \
5 || defined(CONFIG_ALPHA_GENERIC)
5# define get_rtc_time alpha_mv.rtc_get_time 6# define get_rtc_time alpha_mv.rtc_get_time
6# define set_rtc_time alpha_mv.rtc_set_time 7# define set_rtc_time alpha_mv.rtc_set_time
7#else
8# if defined(CONFIG_ALPHA_MARVEL) && defined(CONFIG_SMP)
9# define get_rtc_time marvel_get_rtc_time
10# define set_rtc_time marvel_set_rtc_time
11# endif
12#endif 8#endif
13 9
14#include <asm-generic/rtc.h> 10#include <asm-generic/rtc.h>
diff --git a/arch/alpha/include/asm/xchg.h b/arch/alpha/include/asm/xchg.h
index 1d1b436fbff2..0ca9724597c1 100644
--- a/arch/alpha/include/asm/xchg.h
+++ b/arch/alpha/include/asm/xchg.h
@@ -1,10 +1,10 @@
1#ifndef _ALPHA_ATOMIC_H 1#ifndef _ALPHA_CMPXCHG_H
2#error Do not include xchg.h directly! 2#error Do not include xchg.h directly!
3#else 3#else
4/* 4/*
5 * xchg/xchg_local and cmpxchg/cmpxchg_local share the same code 5 * xchg/xchg_local and cmpxchg/cmpxchg_local share the same code
6 * except that local version do not have the expensive memory barrier. 6 * except that local version do not have the expensive memory barrier.
7 * So this file is included twice from asm/system.h. 7 * So this file is included twice from asm/cmpxchg.h.
8 */ 8 */
9 9
10/* 10/*
diff --git a/arch/alpha/kernel/core_tsunami.c b/arch/alpha/kernel/core_tsunami.c
index 5e7c28f92f19..61893d7bdda5 100644
--- a/arch/alpha/kernel/core_tsunami.c
+++ b/arch/alpha/kernel/core_tsunami.c
@@ -11,6 +11,7 @@
11#include <asm/core_tsunami.h> 11#include <asm/core_tsunami.h>
12#undef __EXTERN_INLINE 12#undef __EXTERN_INLINE
13 13
14#include <linux/module.h>
14#include <linux/types.h> 15#include <linux/types.h>
15#include <linux/pci.h> 16#include <linux/pci.h>
16#include <linux/sched.h> 17#include <linux/sched.h>
diff --git a/arch/alpha/kernel/pci-noop.c b/arch/alpha/kernel/pci-noop.c
index 04eea4894ef3..df24b76f9246 100644
--- a/arch/alpha/kernel/pci-noop.c
+++ b/arch/alpha/kernel/pci-noop.c
@@ -108,7 +108,8 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn,
108} 108}
109 109
110static void *alpha_noop_alloc_coherent(struct device *dev, size_t size, 110static void *alpha_noop_alloc_coherent(struct device *dev, size_t size,
111 dma_addr_t *dma_handle, gfp_t gfp) 111 dma_addr_t *dma_handle, gfp_t gfp,
112 struct dma_attrs *attrs)
112{ 113{
113 void *ret; 114 void *ret;
114 115
@@ -123,7 +124,8 @@ static void *alpha_noop_alloc_coherent(struct device *dev, size_t size,
123} 124}
124 125
125static void alpha_noop_free_coherent(struct device *dev, size_t size, 126static void alpha_noop_free_coherent(struct device *dev, size_t size,
126 void *cpu_addr, dma_addr_t dma_addr) 127 void *cpu_addr, dma_addr_t dma_addr,
128 struct dma_attrs *attrs)
127{ 129{
128 free_pages((unsigned long)cpu_addr, get_order(size)); 130 free_pages((unsigned long)cpu_addr, get_order(size));
129} 131}
@@ -174,8 +176,8 @@ static int alpha_noop_set_mask(struct device *dev, u64 mask)
174} 176}
175 177
176struct dma_map_ops alpha_noop_ops = { 178struct dma_map_ops alpha_noop_ops = {
177 .alloc_coherent = alpha_noop_alloc_coherent, 179 .alloc = alpha_noop_alloc_coherent,
178 .free_coherent = alpha_noop_free_coherent, 180 .free = alpha_noop_free_coherent,
179 .map_page = alpha_noop_map_page, 181 .map_page = alpha_noop_map_page,
180 .map_sg = alpha_noop_map_sg, 182 .map_sg = alpha_noop_map_sg,
181 .mapping_error = alpha_noop_mapping_error, 183 .mapping_error = alpha_noop_mapping_error,
diff --git a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c
index 43610804987d..cd634795aa9c 100644
--- a/arch/alpha/kernel/pci_iommu.c
+++ b/arch/alpha/kernel/pci_iommu.c
@@ -434,7 +434,8 @@ static void alpha_pci_unmap_page(struct device *dev, dma_addr_t dma_addr,
434 else DMA_ADDRP is undefined. */ 434 else DMA_ADDRP is undefined. */
435 435
436static void *alpha_pci_alloc_coherent(struct device *dev, size_t size, 436static void *alpha_pci_alloc_coherent(struct device *dev, size_t size,
437 dma_addr_t *dma_addrp, gfp_t gfp) 437 dma_addr_t *dma_addrp, gfp_t gfp,
438 struct dma_attrs *attrs)
438{ 439{
439 struct pci_dev *pdev = alpha_gendev_to_pci(dev); 440 struct pci_dev *pdev = alpha_gendev_to_pci(dev);
440 void *cpu_addr; 441 void *cpu_addr;
@@ -478,7 +479,8 @@ try_again:
478 DMA_ADDR past this call are illegal. */ 479 DMA_ADDR past this call are illegal. */
479 480
480static void alpha_pci_free_coherent(struct device *dev, size_t size, 481static void alpha_pci_free_coherent(struct device *dev, size_t size,
481 void *cpu_addr, dma_addr_t dma_addr) 482 void *cpu_addr, dma_addr_t dma_addr,
483 struct dma_attrs *attrs)
482{ 484{
483 struct pci_dev *pdev = alpha_gendev_to_pci(dev); 485 struct pci_dev *pdev = alpha_gendev_to_pci(dev);
484 pci_unmap_single(pdev, dma_addr, size, PCI_DMA_BIDIRECTIONAL); 486 pci_unmap_single(pdev, dma_addr, size, PCI_DMA_BIDIRECTIONAL);
@@ -952,8 +954,8 @@ static int alpha_pci_set_mask(struct device *dev, u64 mask)
952} 954}
953 955
954struct dma_map_ops alpha_pci_ops = { 956struct dma_map_ops alpha_pci_ops = {
955 .alloc_coherent = alpha_pci_alloc_coherent, 957 .alloc = alpha_pci_alloc_coherent,
956 .free_coherent = alpha_pci_free_coherent, 958 .free = alpha_pci_free_coherent,
957 .map_page = alpha_pci_map_page, 959 .map_page = alpha_pci_map_page,
958 .unmap_page = alpha_pci_unmap_page, 960 .unmap_page = alpha_pci_unmap_page,
959 .map_sg = alpha_pci_map_sg, 961 .map_sg = alpha_pci_map_sg,
diff --git a/arch/alpha/kernel/signal.c b/arch/alpha/kernel/signal.c
index 6f7feb5db271..35f2ef44de12 100644
--- a/arch/alpha/kernel/signal.c
+++ b/arch/alpha/kernel/signal.c
@@ -120,12 +120,13 @@ SYSCALL_DEFINE5(rt_sigaction, int, sig, const struct sigaction __user *, act,
120 */ 120 */
121SYSCALL_DEFINE1(sigsuspend, old_sigset_t, mask) 121SYSCALL_DEFINE1(sigsuspend, old_sigset_t, mask)
122{ 122{
123 mask &= _BLOCKABLE; 123 sigset_t blocked;
124 spin_lock_irq(&current->sighand->siglock); 124
125 current->saved_sigmask = current->blocked; 125 current->saved_sigmask = current->blocked;
126 siginitset(&current->blocked, mask); 126
127 recalc_sigpending(); 127 mask &= _BLOCKABLE;
128 spin_unlock_irq(&current->sighand->siglock); 128 siginitset(&blocked, mask);
129 set_current_blocked(&blocked);
129 130
130 current->state = TASK_INTERRUPTIBLE; 131 current->state = TASK_INTERRUPTIBLE;
131 schedule(); 132 schedule();
@@ -238,10 +239,7 @@ do_sigreturn(struct sigcontext __user *sc, struct pt_regs *regs,
238 goto give_sigsegv; 239 goto give_sigsegv;
239 240
240 sigdelsetmask(&set, ~_BLOCKABLE); 241 sigdelsetmask(&set, ~_BLOCKABLE);
241 spin_lock_irq(&current->sighand->siglock); 242 set_current_blocked(&set);
242 current->blocked = set;
243 recalc_sigpending();
244 spin_unlock_irq(&current->sighand->siglock);
245 243
246 if (restore_sigcontext(sc, regs, sw)) 244 if (restore_sigcontext(sc, regs, sw))
247 goto give_sigsegv; 245 goto give_sigsegv;
@@ -276,10 +274,7 @@ do_rt_sigreturn(struct rt_sigframe __user *frame, struct pt_regs *regs,
276 goto give_sigsegv; 274 goto give_sigsegv;
277 275
278 sigdelsetmask(&set, ~_BLOCKABLE); 276 sigdelsetmask(&set, ~_BLOCKABLE);
279 spin_lock_irq(&current->sighand->siglock); 277 set_current_blocked(&set);
280 current->blocked = set;
281 recalc_sigpending();
282 spin_unlock_irq(&current->sighand->siglock);
283 278
284 if (restore_sigcontext(&frame->uc.uc_mcontext, regs, sw)) 279 if (restore_sigcontext(&frame->uc.uc_mcontext, regs, sw))
285 goto give_sigsegv; 280 goto give_sigsegv;
@@ -501,14 +496,8 @@ handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
501 else 496 else
502 ret = setup_frame(sig, ka, oldset, regs, sw); 497 ret = setup_frame(sig, ka, oldset, regs, sw);
503 498
504 if (ret == 0) { 499 if (ret == 0)
505 spin_lock_irq(&current->sighand->siglock); 500 block_sigmask(ka, sig);
506 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
507 if (!(ka->sa.sa_flags & SA_NODEFER))
508 sigaddset(&current->blocked,sig);
509 recalc_sigpending();
510 spin_unlock_irq(&current->sighand->siglock);
511 }
512 501
513 return ret; 502 return ret;
514} 503}
diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c
index 4087a569b43b..50d438db1f6b 100644
--- a/arch/alpha/kernel/smp.c
+++ b/arch/alpha/kernel/smp.c
@@ -450,7 +450,7 @@ setup_smp(void)
450 smp_num_probed = 1; 450 smp_num_probed = 1;
451 } 451 }
452 452
453 printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_map = %lx\n", 453 printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_mask = %lx\n",
454 smp_num_probed, cpumask_bits(cpu_present_mask)[0]); 454 smp_num_probed, cpumask_bits(cpu_present_mask)[0]);
455} 455}
456 456
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c
index 14a4b6a7cf59..407accc80877 100644
--- a/arch/alpha/kernel/sys_marvel.c
+++ b/arch/alpha/kernel/sys_marvel.c
@@ -317,7 +317,7 @@ marvel_init_irq(void)
317} 317}
318 318
319static int 319static int
320marvel_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 320marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
321{ 321{
322 struct pci_controller *hose = dev->sysdata; 322 struct pci_controller *hose = dev->sysdata;
323 struct io7_port *io7_port = hose->sysdata; 323 struct io7_port *io7_port = hose->sysdata;
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 93180845ae16..36586dba6fa6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -338,6 +338,7 @@ config ARCH_AT91
338 select HAVE_CLK 338 select HAVE_CLK
339 select CLKDEV_LOOKUP 339 select CLKDEV_LOOKUP
340 select IRQ_DOMAIN 340 select IRQ_DOMAIN
341 select NEED_MACH_IO_H if PCCARD
341 help 342 help
342 This enables support for systems based on the Atmel AT91RM9200, 343 This enables support for systems based on the Atmel AT91RM9200,
343 AT91SAM9 processors. 344 AT91SAM9 processors.
@@ -1185,6 +1186,15 @@ if !MMU
1185source "arch/arm/Kconfig-nommu" 1186source "arch/arm/Kconfig-nommu"
1186endif 1187endif
1187 1188
1189config ARM_ERRATA_326103
1190 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1191 depends on CPU_V6
1192 help
1193 Executing a SWP instruction to read-only memory does not set bit 11
1194 of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1195 treat the access as a read, preventing a COW from occurring and
1196 causing the faulting task to livelock.
1197
1188config ARM_ERRATA_411920 1198config ARM_ERRATA_411920
1189 bool "ARM errata: Invalidation of the Instruction Cache operation can fail" 1199 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1190 depends on CPU_V6 || CPU_V6K 1200 depends on CPU_V6 || CPU_V6K
diff --git a/arch/arm/boot/compressed/atags_to_fdt.c b/arch/arm/boot/compressed/atags_to_fdt.c
index 6ce11c481178..797f04bedb47 100644
--- a/arch/arm/boot/compressed/atags_to_fdt.c
+++ b/arch/arm/boot/compressed/atags_to_fdt.c
@@ -77,6 +77,8 @@ int atags_to_fdt(void *atag_list, void *fdt, int total_space)
77 } else if (atag->hdr.tag == ATAG_MEM) { 77 } else if (atag->hdr.tag == ATAG_MEM) {
78 if (memcount >= sizeof(mem_reg_property)/4) 78 if (memcount >= sizeof(mem_reg_property)/4)
79 continue; 79 continue;
80 if (!atag->u.mem.size)
81 continue;
80 mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.start); 82 mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.start);
81 mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.size); 83 mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.size);
82 } else if (atag->hdr.tag == ATAG_INITRD2) { 84 } else if (atag->hdr.tag == ATAG_INITRD2) {
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 5f6045f1766c..dc7e8ce8e6be 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -273,7 +273,7 @@ restart: adr r0, LC0
273 add r0, r0, #0x100 273 add r0, r0, #0x100
274 mov r1, r6 274 mov r1, r6
275 sub r2, sp, r6 275 sub r2, sp, r6
276 blne atags_to_fdt 276 bleq atags_to_fdt
277 277
278 ldmfd sp!, {r0-r3, ip, lr} 278 ldmfd sp!, {r0-r3, ip, lr}
279 sub sp, sp, #0x10000 279 sub sp, sp, #0x10000
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index 92f36627e7f8..773ef484037a 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -35,7 +35,7 @@
35 }; 35 };
36 }; 36 };
37 37
38 memory@20000000 { 38 memory {
39 reg = <0x20000000 0x08000000>; 39 reg = <0x20000000 0x08000000>;
40 }; 40 };
41 41
@@ -55,7 +55,6 @@
55 #interrupt-cells = <2>; 55 #interrupt-cells = <2>;
56 compatible = "atmel,at91rm9200-aic"; 56 compatible = "atmel,at91rm9200-aic";
57 interrupt-controller; 57 interrupt-controller;
58 interrupt-parent;
59 reg = <0xfffff000 0x200>; 58 reg = <0xfffff000 0x200>;
60 }; 59 };
61 60
diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts
index ac0dc0031dda..7829a4d0cb22 100644
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -37,8 +37,8 @@
37 usb0: ohci@00600000 { 37 usb0: ohci@00600000 {
38 status = "okay"; 38 status = "okay";
39 num-ports = <2>; 39 num-ports = <2>;
40 atmel,vbus-gpio = <&pioD 19 0 40 atmel,vbus-gpio = <&pioD 19 1
41 &pioD 20 0 41 &pioD 20 1
42 >; 42 >;
43 }; 43 };
44 44
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 3d0c32fb218f..c8042147eaa2 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -36,7 +36,7 @@
36 }; 36 };
37 }; 37 };
38 38
39 memory@70000000 { 39 memory {
40 reg = <0x70000000 0x10000000>; 40 reg = <0x70000000 0x10000000>;
41 }; 41 };
42 42
@@ -56,7 +56,6 @@
56 #interrupt-cells = <2>; 56 #interrupt-cells = <2>;
57 compatible = "atmel,at91rm9200-aic"; 57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller; 58 interrupt-controller;
59 interrupt-parent;
60 reg = <0xfffff000 0x200>; 59 reg = <0xfffff000 0x200>;
61 }; 60 };
62 61
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index c4c8ae4123d5..a3633bd13111 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -17,7 +17,7 @@
17 bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2"; 17 bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
18 }; 18 };
19 19
20 memory@70000000 { 20 memory {
21 reg = <0x70000000 0x4000000>; 21 reg = <0x70000000 0x4000000>;
22 }; 22 };
23 23
@@ -73,8 +73,8 @@
73 usb0: ohci@00700000 { 73 usb0: ohci@00700000 {
74 status = "okay"; 74 status = "okay";
75 num-ports = <2>; 75 num-ports = <2>;
76 atmel,vbus-gpio = <&pioD 1 0 76 atmel,vbus-gpio = <&pioD 1 1
77 &pioD 3 0>; 77 &pioD 3 1>;
78 }; 78 };
79 79
80 usb1: ehci@00800000 { 80 usb1: ehci@00800000 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index c111001f254e..dd4ed748469a 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -34,7 +34,7 @@
34 }; 34 };
35 }; 35 };
36 36
37 memory@20000000 { 37 memory {
38 reg = <0x20000000 0x10000000>; 38 reg = <0x20000000 0x10000000>;
39 }; 39 };
40 40
@@ -54,7 +54,6 @@
54 #interrupt-cells = <2>; 54 #interrupt-cells = <2>;
55 compatible = "atmel,at91rm9200-aic"; 55 compatible = "atmel,at91rm9200-aic";
56 interrupt-controller; 56 interrupt-controller;
57 interrupt-parent;
58 reg = <0xfffff000 0x200>; 57 reg = <0xfffff000 0x200>;
59 }; 58 };
60 59
@@ -201,8 +200,8 @@
201 >; 200 >;
202 atmel,nand-addr-offset = <21>; 201 atmel,nand-addr-offset = <21>;
203 atmel,nand-cmd-offset = <22>; 202 atmel,nand-cmd-offset = <22>;
204 gpios = <&pioC 8 0 203 gpios = <&pioD 5 0
205 &pioC 14 0 204 &pioD 4 0
206 0 205 0
207 >; 206 >;
208 status = "disabled"; 207 status = "disabled";
diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi b/arch/arm/boot/dts/at91sam9x5cm.dtsi
index 67936f83c694..31e7be23703d 100644
--- a/arch/arm/boot/dts/at91sam9x5cm.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5cm.dtsi
@@ -8,7 +8,7 @@
8 */ 8 */
9 9
10/ { 10/ {
11 memory@20000000 { 11 memory {
12 reg = <0x20000000 0x8000000>; 12 reg = <0x20000000 0x8000000>;
13 }; 13 };
14 14
diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi
index d73dce645667..14bc30705099 100644
--- a/arch/arm/boot/dts/db8500.dtsi
+++ b/arch/arm/boot/dts/db8500.dtsi
@@ -24,7 +24,6 @@
24 #interrupt-cells = <3>; 24 #interrupt-cells = <3>;
25 #address-cells = <1>; 25 #address-cells = <1>;
26 interrupt-controller; 26 interrupt-controller;
27 interrupt-parent;
28 reg = <0xa0411000 0x1000>, 27 reg = <0xa0411000 0x1000>,
29 <0xa0410100 0x100>; 28 <0xa0410100 0x100>;
30 }; 29 };
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index 37c0ff9c8b90..83e72294aefb 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -89,7 +89,6 @@
89 #size-cells = <0>; 89 #size-cells = <0>;
90 #address-cells = <1>; 90 #address-cells = <1>;
91 interrupt-controller; 91 interrupt-controller;
92 interrupt-parent;
93 reg = <0xfff11000 0x1000>, 92 reg = <0xfff11000 0x1000>,
94 <0xfff10100 0x100>; 93 <0xfff10100 0x100>;
95 }; 94 };
diff --git a/arch/arm/boot/dts/msm8660-surf.dts b/arch/arm/boot/dts/msm8660-surf.dts
index 15ded0deaa79..45bc4bb04e57 100644
--- a/arch/arm/boot/dts/msm8660-surf.dts
+++ b/arch/arm/boot/dts/msm8660-surf.dts
@@ -10,7 +10,7 @@
10 intc: interrupt-controller@02080000 { 10 intc: interrupt-controller@02080000 {
11 compatible = "qcom,msm-8660-qgic"; 11 compatible = "qcom,msm-8660-qgic";
12 interrupt-controller; 12 interrupt-controller;
13 #interrupt-cells = <1>; 13 #interrupt-cells = <3>;
14 reg = < 0x02080000 0x1000 >, 14 reg = < 0x02080000 0x1000 >,
15 < 0x02081000 0x1000 >; 15 < 0x02081000 0x1000 >;
16 }; 16 };
@@ -19,6 +19,6 @@
19 compatible = "qcom,msm-hsuart", "qcom,msm-uart"; 19 compatible = "qcom,msm-hsuart", "qcom,msm-uart";
20 reg = <0x19c40000 0x1000>, 20 reg = <0x19c40000 0x1000>,
21 <0x19c00000 0x1000>; 21 <0x19c00000 0x1000>;
22 interrupts = <195>; 22 interrupts = <0 195 0x0>;
23 }; 23 };
24}; 24};
diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts
index 3b3c4e0fa79f..7c2399c532e5 100644
--- a/arch/arm/boot/dts/usb_a9g20.dts
+++ b/arch/arm/boot/dts/usb_a9g20.dts
@@ -16,7 +16,7 @@
16 bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs"; 16 bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
17 }; 17 };
18 18
19 memory@20000000 { 19 memory {
20 reg = <0x20000000 0x4000000>; 20 reg = <0x20000000 0x4000000>;
21 }; 21 };
22 22
diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts
index 0b32925f2147..e2fe3195c0d1 100644
--- a/arch/arm/boot/dts/versatile-ab.dts
+++ b/arch/arm/boot/dts/versatile-ab.dts
@@ -173,7 +173,7 @@
173 mmc@5000 { 173 mmc@5000 {
174 compatible = "arm,primecell"; 174 compatible = "arm,primecell";
175 reg = < 0x5000 0x1000>; 175 reg = < 0x5000 0x1000>;
176 interrupts = <22>; 176 interrupts = <22 34>;
177 }; 177 };
178 kmi@6000 { 178 kmi@6000 {
179 compatible = "arm,pl050", "arm,primecell"; 179 compatible = "arm,pl050", "arm,primecell";
diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts
index 166461073b78..7e8175269064 100644
--- a/arch/arm/boot/dts/versatile-pb.dts
+++ b/arch/arm/boot/dts/versatile-pb.dts
@@ -41,7 +41,7 @@
41 mmc@b000 { 41 mmc@b000 {
42 compatible = "arm,primecell"; 42 compatible = "arm,primecell";
43 reg = <0xb000 0x1000>; 43 reg = <0xb000 0x1000>;
44 interrupts = <23>; 44 interrupts = <23 34>;
45 }; 45 };
46 }; 46 };
47 }; 47 };
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 7a66311f3066..7e288f96cedf 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -427,19 +427,18 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
427 427
428/* 428/*
429 * Handle each interrupt in a single VIC. Returns non-zero if we've 429 * Handle each interrupt in a single VIC. Returns non-zero if we've
430 * handled at least one interrupt. This does a single read of the 430 * handled at least one interrupt. This reads the status register
431 * status register and handles all interrupts in order from LSB first. 431 * before handling each interrupt, which is necessary given that
432 * handle_IRQ may briefly re-enable interrupts for soft IRQ handling.
432 */ 433 */
433static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs) 434static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
434{ 435{
435 u32 stat, irq; 436 u32 stat, irq;
436 int handled = 0; 437 int handled = 0;
437 438
438 stat = readl_relaxed(vic->base + VIC_IRQ_STATUS); 439 while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
439 while (stat) {
440 irq = ffs(stat) - 1; 440 irq = ffs(stat) - 1;
441 handle_IRQ(irq_find_mapping(vic->domain, irq), regs); 441 handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
442 stat &= ~(1 << irq);
443 handled = 1; 442 handled = 1;
444 } 443 }
445 444
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index b5ac644e12af..6b31cb60daab 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -112,6 +112,7 @@ CONFIG_WATCHDOG=y
112CONFIG_IMX2_WDT=y 112CONFIG_IMX2_WDT=y
113CONFIG_MFD_MC13XXX=y 113CONFIG_MFD_MC13XXX=y
114CONFIG_REGULATOR=y 114CONFIG_REGULATOR=y
115CONFIG_REGULATOR_FIXED_VOLTAGE=y
115CONFIG_REGULATOR_MC13783=y 116CONFIG_REGULATOR_MC13783=y
116CONFIG_REGULATOR_MC13892=y 117CONFIG_REGULATOR_MC13892=y
117CONFIG_FB=y 118CONFIG_FB=y
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
index 42da9183acc8..082175c54e7c 100644
--- a/arch/arm/configs/mini2440_defconfig
+++ b/arch/arm/configs/mini2440_defconfig
@@ -14,6 +14,8 @@ CONFIG_MODULE_FORCE_UNLOAD=y
14# CONFIG_BLK_DEV_BSG is not set 14# CONFIG_BLK_DEV_BSG is not set
15CONFIG_BLK_DEV_INTEGRITY=y 15CONFIG_BLK_DEV_INTEGRITY=y
16CONFIG_ARCH_S3C24XX=y 16CONFIG_ARCH_S3C24XX=y
17# CONFIG_CPU_S3C2410 is not set
18CONFIG_CPU_S3C2440=y
17CONFIG_S3C_ADC=y 19CONFIG_S3C_ADC=y
18CONFIG_S3C24XX_PWM=y 20CONFIG_S3C24XX_PWM=y
19CONFIG_MACH_MINI2440=y 21CONFIG_MACH_MINI2440=y
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 889d73ac1ae1..7e84f453e8a6 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -8,8 +8,6 @@ CONFIG_MODULE_UNLOAD=y
8# CONFIG_LBDAF is not set 8# CONFIG_LBDAF is not set
9# CONFIG_BLK_DEV_BSG is not set 9# CONFIG_BLK_DEV_BSG is not set
10CONFIG_ARCH_U8500=y 10CONFIG_ARCH_U8500=y
11CONFIG_UX500_SOC_DB5500=y
12CONFIG_UX500_SOC_DB8500=y
13CONFIG_MACH_HREFV60=y 11CONFIG_MACH_HREFV60=y
14CONFIG_MACH_SNOWBALL=y 12CONFIG_MACH_SNOWBALL=y
15CONFIG_MACH_U5500=y 13CONFIG_MACH_U5500=y
@@ -39,7 +37,6 @@ CONFIG_CAIF=y
39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 37CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
40CONFIG_BLK_DEV_RAM=y 38CONFIG_BLK_DEV_RAM=y
41CONFIG_BLK_DEV_RAM_SIZE=65536 39CONFIG_BLK_DEV_RAM_SIZE=65536
42CONFIG_MISC_DEVICES=y
43CONFIG_AB8500_PWM=y 40CONFIG_AB8500_PWM=y
44CONFIG_SENSORS_BH1780=y 41CONFIG_SENSORS_BH1780=y
45CONFIG_NETDEVICES=y 42CONFIG_NETDEVICES=y
@@ -65,16 +62,18 @@ CONFIG_SERIAL_AMBA_PL011=y
65CONFIG_SERIAL_AMBA_PL011_CONSOLE=y 62CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
66CONFIG_HW_RANDOM=y 63CONFIG_HW_RANDOM=y
67CONFIG_HW_RANDOM_NOMADIK=y 64CONFIG_HW_RANDOM_NOMADIK=y
68CONFIG_I2C=y
69CONFIG_I2C_NOMADIK=y
70CONFIG_SPI=y 65CONFIG_SPI=y
71CONFIG_SPI_PL022=y 66CONFIG_SPI_PL022=y
72CONFIG_GPIO_STMPE=y 67CONFIG_GPIO_STMPE=y
73CONFIG_GPIO_TC3589X=y 68CONFIG_GPIO_TC3589X=y
69CONFIG_POWER_SUPPLY=y
70CONFIG_AB8500_BM=y
71CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL=y
74CONFIG_MFD_STMPE=y 72CONFIG_MFD_STMPE=y
75CONFIG_MFD_TC3589X=y 73CONFIG_MFD_TC3589X=y
76CONFIG_AB5500_CORE=y 74CONFIG_AB5500_CORE=y
77CONFIG_AB8500_CORE=y 75CONFIG_AB8500_CORE=y
76CONFIG_REGULATOR=y
78CONFIG_REGULATOR_AB8500=y 77CONFIG_REGULATOR_AB8500=y
79# CONFIG_HID_SUPPORT is not set 78# CONFIG_HID_SUPPORT is not set
80CONFIG_USB_GADGET=y 79CONFIG_USB_GADGET=y
diff --git a/arch/arm/include/asm/barrier.h b/arch/arm/include/asm/barrier.h
index 44f4a09ff37b..05112380dc53 100644
--- a/arch/arm/include/asm/barrier.h
+++ b/arch/arm/include/asm/barrier.h
@@ -2,6 +2,7 @@
2#define __ASM_BARRIER_H 2#define __ASM_BARRIER_H
3 3
4#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
5#include <asm/outercache.h>
5 6
6#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); 7#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
7 8
@@ -39,7 +40,6 @@
39#ifdef CONFIG_ARCH_HAS_BARRIERS 40#ifdef CONFIG_ARCH_HAS_BARRIERS
40#include <mach/barriers.h> 41#include <mach/barriers.h>
41#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP) 42#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
42#include <asm/outercache.h>
43#define mb() do { dsb(); outer_sync(); } while (0) 43#define mb() do { dsb(); outer_sync(); } while (0)
44#define rmb() dsb() 44#define rmb() dsb()
45#define wmb() mb() 45#define wmb() mb()
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index df0ac0bb39aa..9af5563dd3eb 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -119,7 +119,7 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
119#ifdef CONFIG_NEED_MACH_IO_H 119#ifdef CONFIG_NEED_MACH_IO_H
120#include <mach/io.h> 120#include <mach/io.h>
121#else 121#else
122#define __io(a) ({ (void)(a); __typesafe_io(0); }) 122#define __io(a) __typesafe_io((a) & IO_SPACE_LIMIT)
123#endif 123#endif
124 124
125/* 125/*
diff --git a/arch/arm/include/asm/jump_label.h b/arch/arm/include/asm/jump_label.h
index 5c5ca2ea62b0..bfc198c75913 100644
--- a/arch/arm/include/asm/jump_label.h
+++ b/arch/arm/include/asm/jump_label.h
@@ -14,7 +14,7 @@
14#define JUMP_LABEL_NOP "nop" 14#define JUMP_LABEL_NOP "nop"
15#endif 15#endif
16 16
17static __always_inline bool arch_static_branch(struct jump_label_key *key) 17static __always_inline bool arch_static_branch(struct static_key *key)
18{ 18{
19 asm goto("1:\n\t" 19 asm goto("1:\n\t"
20 JUMP_LABEL_NOP "\n\t" 20 JUMP_LABEL_NOP "\n\t"
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index d4c24d412a8d..0f04d84582e1 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -118,6 +118,13 @@ extern void iwmmxt_task_switch(struct thread_info *);
118extern void vfp_sync_hwstate(struct thread_info *); 118extern void vfp_sync_hwstate(struct thread_info *);
119extern void vfp_flush_hwstate(struct thread_info *); 119extern void vfp_flush_hwstate(struct thread_info *);
120 120
121struct user_vfp;
122struct user_vfp_exc;
123
124extern int vfp_preserve_user_clear_hwstate(struct user_vfp __user *,
125 struct user_vfp_exc __user *);
126extern int vfp_restore_user_hwstate(struct user_vfp __user *,
127 struct user_vfp_exc __user *);
121#endif 128#endif
122 129
123/* 130/*
diff --git a/arch/arm/include/asm/tls.h b/arch/arm/include/asm/tls.h
index 60843eb0f61c..73409e6c0251 100644
--- a/arch/arm/include/asm/tls.h
+++ b/arch/arm/include/asm/tls.h
@@ -7,6 +7,8 @@
7 7
8 .macro set_tls_v6k, tp, tmp1, tmp2 8 .macro set_tls_v6k, tp, tmp1, tmp2
9 mcr p15, 0, \tp, c13, c0, 3 @ set TLS register 9 mcr p15, 0, \tp, c13, c0, 3 @ set TLS register
10 mov \tmp1, #0
11 mcr p15, 0, \tmp1, c13, c0, 2 @ clear user r/w TLS register
10 .endm 12 .endm
11 13
12 .macro set_tls_v6, tp, tmp1, tmp2 14 .macro set_tls_v6, tp, tmp1, tmp2
@@ -15,6 +17,8 @@
15 mov \tmp2, #0xffff0fff 17 mov \tmp2, #0xffff0fff
16 tst \tmp1, #HWCAP_TLS @ hardware TLS available? 18 tst \tmp1, #HWCAP_TLS @ hardware TLS available?
17 mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register 19 mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register
20 movne \tmp1, #0
21 mcrne p15, 0, \tmp1, c13, c0, 2 @ clear user r/w TLS register
18 streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0 22 streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0
19 .endm 23 .endm
20 24
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 632df9a66f8c..ede5f7741c42 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -299,7 +299,6 @@ static inline int pdev_bad_for_parity(struct pci_dev *dev)
299 */ 299 */
300void pcibios_fixup_bus(struct pci_bus *bus) 300void pcibios_fixup_bus(struct pci_bus *bus)
301{ 301{
302 struct pci_sys_data *root = bus->sysdata;
303 struct pci_dev *dev; 302 struct pci_dev *dev;
304 u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK; 303 u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK;
305 304
diff --git a/arch/arm/kernel/insn.c b/arch/arm/kernel/insn.c
index ab312e516546..b760340b7014 100644
--- a/arch/arm/kernel/insn.c
+++ b/arch/arm/kernel/insn.c
@@ -1,3 +1,4 @@
1#include <linux/bug.h>
1#include <linux/kernel.h> 2#include <linux/kernel.h>
2#include <asm/opcodes.h> 3#include <asm/opcodes.h>
3 4
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 71ccdbfed662..8349d4e97e2b 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -155,10 +155,10 @@ static bool migrate_one_irq(struct irq_desc *desc)
155 } 155 }
156 156
157 c = irq_data_get_irq_chip(d); 157 c = irq_data_get_irq_chip(d);
158 if (c->irq_set_affinity) 158 if (!c->irq_set_affinity)
159 c->irq_set_affinity(d, affinity, true);
160 else
161 pr_debug("IRQ%u: unable to set affinity\n", d->irq); 159 pr_debug("IRQ%u: unable to set affinity\n", d->irq);
160 else if (c->irq_set_affinity(d, affinity, true) == IRQ_SET_MASK_OK && ret)
161 cpumask_copy(d->affinity, affinity);
162 162
163 return ret; 163 return ret;
164} 164}
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c
index ab1869dac97a..4dd41fc9e235 100644
--- a/arch/arm/kernel/kprobes.c
+++ b/arch/arm/kernel/kprobes.c
@@ -152,7 +152,7 @@ int __kprobes __arch_disarm_kprobe(void *p)
152 152
153void __kprobes arch_disarm_kprobe(struct kprobe *p) 153void __kprobes arch_disarm_kprobe(struct kprobe *p)
154{ 154{
155 stop_machine(__arch_disarm_kprobe, p, &cpu_online_map); 155 stop_machine(__arch_disarm_kprobe, p, cpu_online_mask);
156} 156}
157 157
158void __kprobes arch_remove_kprobe(struct kprobe *p) 158void __kprobes arch_remove_kprobe(struct kprobe *p)
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 45956c9d0ef0..80abafb9bf33 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -256,7 +256,7 @@ static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
256{ 256{
257 unsigned long tmp; 257 unsigned long tmp;
258 258
259 if (off & 3 || off >= sizeof(struct user)) 259 if (off & 3)
260 return -EIO; 260 return -EIO;
261 261
262 tmp = 0; 262 tmp = 0;
@@ -268,6 +268,8 @@ static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
268 tmp = tsk->mm->end_code; 268 tmp = tsk->mm->end_code;
269 else if (off < sizeof(struct pt_regs)) 269 else if (off < sizeof(struct pt_regs))
270 tmp = get_user_reg(tsk, off >> 2); 270 tmp = get_user_reg(tsk, off >> 2);
271 else if (off >= sizeof(struct user))
272 return -EIO;
271 273
272 return put_user(tmp, ret); 274 return put_user(tmp, ret);
273} 275}
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index b91411371ae1..ebfac782593f 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -523,7 +523,21 @@ int __init arm_add_memory(phys_addr_t start, unsigned long size)
523 */ 523 */
524 size -= start & ~PAGE_MASK; 524 size -= start & ~PAGE_MASK;
525 bank->start = PAGE_ALIGN(start); 525 bank->start = PAGE_ALIGN(start);
526 bank->size = size & PAGE_MASK; 526
527#ifndef CONFIG_LPAE
528 if (bank->start + size < bank->start) {
529 printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in "
530 "32-bit physical address space\n", (long long)start);
531 /*
532 * To ensure bank->start + bank->size is representable in
533 * 32 bits, we use ULONG_MAX as the upper limit rather than 4GB.
534 * This means we lose a page after masking.
535 */
536 size = ULONG_MAX - bank->start;
537 }
538#endif
539
540 bank->size = size & PAGE_MASK;
527 541
528 /* 542 /*
529 * Check whether this memory region has non-zero size or 543 * Check whether this memory region has non-zero size or
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 7cb532fc8aa4..d68d1b694680 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -180,44 +180,23 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame)
180 180
181static int preserve_vfp_context(struct vfp_sigframe __user *frame) 181static int preserve_vfp_context(struct vfp_sigframe __user *frame)
182{ 182{
183 struct thread_info *thread = current_thread_info();
184 struct vfp_hard_struct *h = &thread->vfpstate.hard;
185 const unsigned long magic = VFP_MAGIC; 183 const unsigned long magic = VFP_MAGIC;
186 const unsigned long size = VFP_STORAGE_SIZE; 184 const unsigned long size = VFP_STORAGE_SIZE;
187 int err = 0; 185 int err = 0;
188 186
189 vfp_sync_hwstate(thread);
190 __put_user_error(magic, &frame->magic, err); 187 __put_user_error(magic, &frame->magic, err);
191 __put_user_error(size, &frame->size, err); 188 __put_user_error(size, &frame->size, err);
192 189
193 /* 190 if (err)
194 * Copy the floating point registers. There can be unused 191 return -EFAULT;
195 * registers see asm/hwcap.h for details.
196 */
197 err |= __copy_to_user(&frame->ufp.fpregs, &h->fpregs,
198 sizeof(h->fpregs));
199 /*
200 * Copy the status and control register.
201 */
202 __put_user_error(h->fpscr, &frame->ufp.fpscr, err);
203
204 /*
205 * Copy the exception registers.
206 */
207 __put_user_error(h->fpexc, &frame->ufp_exc.fpexc, err);
208 __put_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
209 __put_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
210 192
211 return err ? -EFAULT : 0; 193 return vfp_preserve_user_clear_hwstate(&frame->ufp, &frame->ufp_exc);
212} 194}
213 195
214static int restore_vfp_context(struct vfp_sigframe __user *frame) 196static int restore_vfp_context(struct vfp_sigframe __user *frame)
215{ 197{
216 struct thread_info *thread = current_thread_info();
217 struct vfp_hard_struct *h = &thread->vfpstate.hard;
218 unsigned long magic; 198 unsigned long magic;
219 unsigned long size; 199 unsigned long size;
220 unsigned long fpexc;
221 int err = 0; 200 int err = 0;
222 201
223 __get_user_error(magic, &frame->magic, err); 202 __get_user_error(magic, &frame->magic, err);
@@ -228,33 +207,7 @@ static int restore_vfp_context(struct vfp_sigframe __user *frame)
228 if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE) 207 if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
229 return -EINVAL; 208 return -EINVAL;
230 209
231 vfp_flush_hwstate(thread); 210 return vfp_restore_user_hwstate(&frame->ufp, &frame->ufp_exc);
232
233 /*
234 * Copy the floating point registers. There can be unused
235 * registers see asm/hwcap.h for details.
236 */
237 err |= __copy_from_user(&h->fpregs, &frame->ufp.fpregs,
238 sizeof(h->fpregs));
239 /*
240 * Copy the status and control register.
241 */
242 __get_user_error(h->fpscr, &frame->ufp.fpscr, err);
243
244 /*
245 * Sanitise and restore the exception registers.
246 */
247 __get_user_error(fpexc, &frame->ufp_exc.fpexc, err);
248 /* Ensure the VFP is enabled. */
249 fpexc |= FPEXC_EN;
250 /* Ensure FPINST2 is invalid and the exception flag is cleared. */
251 fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
252 h->fpexc = fpexc;
253
254 __get_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
255 __get_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
256
257 return err ? -EFAULT : 0;
258} 211}
259 212
260#endif 213#endif
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 2cee7d1eb958..f6a4d32b0421 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -349,7 +349,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
349 * re-initialize the map in platform_smp_prepare_cpus() if 349 * re-initialize the map in platform_smp_prepare_cpus() if
350 * present != possible (e.g. physical hotplug). 350 * present != possible (e.g. physical hotplug).
351 */ 351 */
352 init_cpu_present(&cpu_possible_map); 352 init_cpu_present(cpu_possible_mask);
353 353
354 /* 354 /*
355 * Initialise the SCU if there are more than one CPU 355 * Initialise the SCU if there are more than one CPU
@@ -510,10 +510,6 @@ static void ipi_cpu_stop(unsigned int cpu)
510 local_fiq_disable(); 510 local_fiq_disable();
511 local_irq_disable(); 511 local_irq_disable();
512 512
513#ifdef CONFIG_HOTPLUG_CPU
514 platform_cpu_kill(cpu);
515#endif
516
517 while (1) 513 while (1)
518 cpu_relax(); 514 cpu_relax();
519} 515}
@@ -576,16 +572,25 @@ void smp_send_reschedule(int cpu)
576 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); 572 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
577} 573}
578 574
575#ifdef CONFIG_HOTPLUG_CPU
576static void smp_kill_cpus(cpumask_t *mask)
577{
578 unsigned int cpu;
579 for_each_cpu(cpu, mask)
580 platform_cpu_kill(cpu);
581}
582#else
583static void smp_kill_cpus(cpumask_t *mask) { }
584#endif
585
579void smp_send_stop(void) 586void smp_send_stop(void)
580{ 587{
581 unsigned long timeout; 588 unsigned long timeout;
589 struct cpumask mask;
582 590
583 if (num_online_cpus() > 1) { 591 cpumask_copy(&mask, cpu_online_mask);
584 cpumask_t mask = cpu_online_map; 592 cpumask_clear_cpu(smp_processor_id(), &mask);
585 cpu_clear(smp_processor_id(), mask); 593 smp_cross_call(&mask, IPI_CPU_STOP);
586
587 smp_cross_call(&mask, IPI_CPU_STOP);
588 }
589 594
590 /* Wait up to one second for other CPUs to stop */ 595 /* Wait up to one second for other CPUs to stop */
591 timeout = USEC_PER_SEC; 596 timeout = USEC_PER_SEC;
@@ -594,6 +599,8 @@ void smp_send_stop(void)
594 599
595 if (num_online_cpus() > 1) 600 if (num_online_cpus() > 1)
596 pr_warning("SMP: failed to stop secondary CPUs\n"); 601 pr_warning("SMP: failed to stop secondary CPUs\n");
602
603 smp_kill_cpus(&mask);
597} 604}
598 605
599/* 606/*
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 99ce5c955e39..05774e5b1cba 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -1173,7 +1173,6 @@ void __init at91_add_device_serial(void)
1173 printk(KERN_INFO "AT91: No default serial console defined.\n"); 1173 printk(KERN_INFO "AT91: No default serial console defined.\n");
1174} 1174}
1175#else 1175#else
1176void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1177void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} 1176void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1178void __init at91_set_serial_console(unsigned portnr) {} 1177void __init at91_set_serial_console(unsigned portnr) {}
1179void __init at91_add_device_serial(void) {} 1178void __init at91_add_device_serial(void) {}
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index dd7f782b0b91..104ca40d8d18 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -23,6 +23,7 @@
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/clockchips.h> 25#include <linux/clockchips.h>
26#include <linux/export.h>
26 27
27#include <asm/mach/time.h> 28#include <asm/mach/time.h>
28 29
@@ -176,6 +177,7 @@ static struct clock_event_device clkevt = {
176}; 177};
177 178
178void __iomem *at91_st_base; 179void __iomem *at91_st_base;
180EXPORT_SYMBOL_GPL(at91_st_base);
179 181
180void __init at91rm9200_ioremap_st(u32 addr) 182void __init at91rm9200_ioremap_st(u32 addr)
181{ 183{
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 7e5651ee9f85..5652dde4bbe2 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -598,6 +598,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
598 else 598 else
599 cs_pin = spi1_standard_cs[devices[i].chip_select]; 599 cs_pin = spi1_standard_cs[devices[i].chip_select];
600 600
601 if (!gpio_is_valid(cs_pin))
602 continue;
603
601 if (devices[i].bus_num == 0) 604 if (devices[i].bus_num == 0)
602 enable_spi0 = 1; 605 enable_spi0 = 1;
603 else 606 else
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 096da87dc00d..4db961a93085 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -415,6 +415,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
415 else 415 else
416 cs_pin = spi1_standard_cs[devices[i].chip_select]; 416 cs_pin = spi1_standard_cs[devices[i].chip_select];
417 417
418 if (!gpio_is_valid(cs_pin))
419 continue;
420
418 if (devices[i].bus_num == 0) 421 if (devices[i].bus_num == 0)
419 enable_spi0 = 1; 422 enable_spi0 = 1;
420 else 423 else
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 53688c46f956..fe99206de880 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -72,7 +72,8 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
72 /* Enable VBus control for UHP ports */ 72 /* Enable VBus control for UHP ports */
73 for (i = 0; i < data->ports; i++) { 73 for (i = 0; i < data->ports; i++) {
74 if (gpio_is_valid(data->vbus_pin[i])) 74 if (gpio_is_valid(data->vbus_pin[i]))
75 at91_set_gpio_output(data->vbus_pin[i], 0); 75 at91_set_gpio_output(data->vbus_pin[i],
76 data->vbus_pin_active_low[i]);
76 } 77 }
77 78
78 /* Enable overcurrent notification */ 79 /* Enable overcurrent notification */
@@ -671,6 +672,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
671 else 672 else
672 cs_pin = spi1_standard_cs[devices[i].chip_select]; 673 cs_pin = spi1_standard_cs[devices[i].chip_select];
673 674
675 if (!gpio_is_valid(cs_pin))
676 continue;
677
674 if (devices[i].bus_num == 0) 678 if (devices[i].bus_num == 0)
675 enable_spi0 = 1; 679 enable_spi0 = 1;
676 else 680 else
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 698479f1e197..6b008aee1dff 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -127,12 +127,13 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
127 /* Enable VBus control for UHP ports */ 127 /* Enable VBus control for UHP ports */
128 for (i = 0; i < data->ports; i++) { 128 for (i = 0; i < data->ports; i++) {
129 if (gpio_is_valid(data->vbus_pin[i])) 129 if (gpio_is_valid(data->vbus_pin[i]))
130 at91_set_gpio_output(data->vbus_pin[i], 0); 130 at91_set_gpio_output(data->vbus_pin[i],
131 data->vbus_pin_active_low[i]);
131 } 132 }
132 133
133 /* Enable overcurrent notification */ 134 /* Enable overcurrent notification */
134 for (i = 0; i < data->ports; i++) { 135 for (i = 0; i < data->ports; i++) {
135 if (data->overcurrent_pin[i]) 136 if (gpio_is_valid(data->overcurrent_pin[i]))
136 at91_set_gpio_input(data->overcurrent_pin[i], 1); 137 at91_set_gpio_input(data->overcurrent_pin[i], 1);
137 } 138 }
138 139
@@ -188,7 +189,8 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
188 /* Enable VBus control for UHP ports */ 189 /* Enable VBus control for UHP ports */
189 for (i = 0; i < data->ports; i++) { 190 for (i = 0; i < data->ports; i++) {
190 if (gpio_is_valid(data->vbus_pin[i])) 191 if (gpio_is_valid(data->vbus_pin[i]))
191 at91_set_gpio_output(data->vbus_pin[i], 0); 192 at91_set_gpio_output(data->vbus_pin[i],
193 data->vbus_pin_active_low[i]);
192 } 194 }
193 195
194 usbh_ehci_data = *data; 196 usbh_ehci_data = *data;
@@ -785,6 +787,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
785 else 787 else
786 cs_pin = spi1_standard_cs[devices[i].chip_select]; 788 cs_pin = spi1_standard_cs[devices[i].chip_select];
787 789
790 if (!gpio_is_valid(cs_pin))
791 continue;
792
788 if (devices[i].bus_num == 0) 793 if (devices[i].bus_num == 0)
789 enable_spi0 = 1; 794 enable_spi0 = 1;
790 else 795 else
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index eda72e83037d..fe4ae22e8561 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -419,6 +419,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
419 else 419 else
420 cs_pin = spi_standard_cs[devices[i].chip_select]; 420 cs_pin = spi_standard_cs[devices[i].chip_select];
421 421
422 if (!gpio_is_valid(cs_pin))
423 continue;
424
422 /* enable chip-select pin */ 425 /* enable chip-select pin */
423 at91_set_gpio_output(cs_pin, 1); 426 at91_set_gpio_output(cs_pin, 1);
424 427
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index b6831eeb7b76..13c8cae60462 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -223,6 +223,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
223 CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk), 223 CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
224 CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk), 224 CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk),
225 CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk), 225 CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
226 CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma0_clk),
227 CLKDEV_CON_DEV_ID("dma_clk", "ffffee00.dma-controller", &dma1_clk),
226 CLKDEV_CON_ID("pioA", &pioAB_clk), 228 CLKDEV_CON_ID("pioA", &pioAB_clk),
227 CLKDEV_CON_ID("pioB", &pioAB_clk), 229 CLKDEV_CON_ID("pioB", &pioAB_clk),
228 CLKDEV_CON_ID("pioC", &pioCD_clk), 230 CLKDEV_CON_ID("pioC", &pioCD_clk),
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 11cbaa8946fe..b2e4fe21f346 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -117,7 +117,7 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = {
117}; 117};
118 118
119#define EK_FLASH_BASE AT91_CHIPSELECT_0 119#define EK_FLASH_BASE AT91_CHIPSELECT_0
120#define EK_FLASH_SIZE SZ_2M 120#define EK_FLASH_SIZE SZ_8M
121 121
122static struct physmap_flash_data ek_flash_data = { 122static struct physmap_flash_data ek_flash_data = {
123 .width = 2, 123 .width = 2,
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index c3f994462864..065fed342424 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -85,8 +85,6 @@ static struct resource dm9000_resource[] = {
85 .flags = IORESOURCE_MEM 85 .flags = IORESOURCE_MEM
86 }, 86 },
87 [2] = { 87 [2] = {
88 .start = AT91_PIN_PC11,
89 .end = AT91_PIN_PC11,
90 .flags = IORESOURCE_IRQ 88 .flags = IORESOURCE_IRQ
91 | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE, 89 | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE,
92 } 90 }
@@ -130,6 +128,8 @@ static struct sam9_smc_config __initdata dm9000_smc_config = {
130 128
131static void __init ek_add_device_dm9000(void) 129static void __init ek_add_device_dm9000(void)
132{ 130{
131 struct resource *r = &dm9000_resource[2];
132
133 /* Configure chip-select 2 (DM9000) */ 133 /* Configure chip-select 2 (DM9000) */
134 sam9_smc_configure(0, 2, &dm9000_smc_config); 134 sam9_smc_configure(0, 2, &dm9000_smc_config);
135 135
@@ -139,6 +139,7 @@ static void __init ek_add_device_dm9000(void)
139 /* Configure Interrupt pin as input, no pull-up */ 139 /* Configure Interrupt pin as input, no pull-up */
140 at91_set_gpio_input(AT91_PIN_PC11, 0); 140 at91_set_gpio_input(AT91_PIN_PC11, 0);
141 141
142 r->start = r->end = gpio_to_irq(AT91_PIN_PC11);
142 platform_device_register(&dm9000_device); 143 platform_device_register(&dm9000_device);
143} 144}
144#else 145#else
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 66f0ddf4b2ae..2ffe50f3a9e9 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -74,6 +74,7 @@ static void __init ek_init_early(void)
74static struct at91_usbh_data __initdata ek_usbh_data = { 74static struct at91_usbh_data __initdata ek_usbh_data = {
75 .ports = 2, 75 .ports = 2,
76 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, 76 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
77 .vbus_pin_active_low = {1, 1},
77 .overcurrent_pin= {-EINVAL, -EINVAL}, 78 .overcurrent_pin= {-EINVAL, -EINVAL},
78}; 79};
79 80
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index e1bea73e6b30..c88e908ddd82 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -71,6 +71,7 @@ static void __init ek_init_early(void)
71static struct at91_usbh_data __initdata ek_usbh_hs_data = { 71static struct at91_usbh_data __initdata ek_usbh_hs_data = {
72 .ports = 2, 72 .ports = 2,
73 .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3}, 73 .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3},
74 .vbus_pin_active_low = {1, 1},
74 .overcurrent_pin= {-EINVAL, -EINVAL}, 75 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 76};
76 77
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index a0f4d7424cdc..6b692824c988 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -35,6 +35,7 @@
35#include "generic.h" 35#include "generic.h"
36 36
37void __iomem *at91_pmc_base; 37void __iomem *at91_pmc_base;
38EXPORT_SYMBOL_GPL(at91_pmc_base);
38 39
39/* 40/*
40 * There's a lot more which can be done with clocks, including cpufreq 41 * There's a lot more which can be done with clocks, including cpufreq
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 36604782a78f..ea2c57a86ca6 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -25,7 +25,7 @@ extern void __iomem *at91_pmc_base;
25#define at91_pmc_write(field, value) \ 25#define at91_pmc_write(field, value) \
26 __raw_writel(value, at91_pmc_base + field) 26 __raw_writel(value, at91_pmc_base + field)
27#else 27#else
28.extern at91_aic_base 28.extern at91_pmc_base
29#endif 29#endif
30 30
31#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */ 31#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 544a5d5ce416..49a821192c65 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -86,14 +86,15 @@ extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *d
86extern void __init at91_add_device_eth(struct macb_platform_data *data); 86extern void __init at91_add_device_eth(struct macb_platform_data *data);
87 87
88 /* USB Host */ 88 /* USB Host */
89#define AT91_MAX_USBH_PORTS 3
89struct at91_usbh_data { 90struct at91_usbh_data {
90 u8 ports; /* number of ports on root hub */ 91 int vbus_pin[AT91_MAX_USBH_PORTS]; /* port power-control pin */
91 int vbus_pin[2]; /* port power-control pin */ 92 int overcurrent_pin[AT91_MAX_USBH_PORTS];
92 u8 vbus_pin_active_low[2]; 93 u8 ports; /* number of ports on root hub */
93 u8 overcurrent_supported; 94 u8 overcurrent_supported;
94 int overcurrent_pin[2]; 95 u8 vbus_pin_active_low[AT91_MAX_USBH_PORTS];
95 u8 overcurrent_status[2]; 96 u8 overcurrent_status[AT91_MAX_USBH_PORTS];
96 u8 overcurrent_changed[2]; 97 u8 overcurrent_changed[AT91_MAX_USBH_PORTS];
97}; 98};
98extern void __init at91_add_device_usbh(struct at91_usbh_data *data); 99extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
99extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data); 100extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data);
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
new file mode 100644
index 000000000000..2d9ca0455745
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -0,0 +1,27 @@
1/*
2 * arch/arm/mach-at91/include/mach/io.h
3 *
4 * Copyright (C) 2003 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __ASM_ARCH_IO_H
22#define __ASM_ARCH_IO_H
23
24#define IO_SPACE_LIMIT 0xFFFFFFFF
25#define __io(a) __typesafe_io(a)
26
27#endif
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 97cc04dc8073..f44a2e7272e3 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -54,6 +54,7 @@ void __init at91_init_interrupts(unsigned int *priority)
54} 54}
55 55
56void __iomem *at91_ramc_base[2]; 56void __iomem *at91_ramc_base[2];
57EXPORT_SYMBOL_GPL(at91_ramc_base);
57 58
58void __init at91_ioremap_ramc(int id, u32 addr, u32 size) 59void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
59{ 60{
@@ -292,6 +293,7 @@ void __init at91_ioremap_rstc(u32 base_addr)
292} 293}
293 294
294void __iomem *at91_matrix_base; 295void __iomem *at91_matrix_base;
296EXPORT_SYMBOL_GPL(at91_matrix_base);
295 297
296void __init at91_ioremap_matrix(u32 base_addr) 298void __init at91_ioremap_matrix(u32 base_addr)
297{ 299{
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c
index 22e4e0a28ad1..adbfb1994582 100644
--- a/arch/arm/mach-bcmring/core.c
+++ b/arch/arm/mach-bcmring/core.c
@@ -52,8 +52,8 @@
52#include <mach/csp/chipcHw_inline.h> 52#include <mach/csp/chipcHw_inline.h>
53#include <mach/csp/tmrHw_reg.h> 53#include <mach/csp/tmrHw_reg.h>
54 54
55static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL); 55static AMBA_APB_DEVICE(uartA, "uartA", 0, MM_ADDR_IO_UARTA, {IRQ_UARTA}, NULL);
56static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL); 56static AMBA_APB_DEVICE(uartB, "uartB", 0, MM_ADDR_IO_UARTB, {IRQ_UARTB}, NULL);
57 57
58static struct clk pll1_clk = { 58static struct clk pll1_clk = {
59 .name = "PLL1", 59 .name = "PLL1",
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 801c738d8f0e..88898ef5261a 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -80,6 +80,11 @@ config EXYNOS4_DEV_AHCI
80 help 80 help
81 Compile in platform device definitions for AHCI 81 Compile in platform device definitions for AHCI
82 82
83config EXYNOS_DEV_DRM
84 bool
85 help
86 Compile in platform device definitions for core DRM device
87
83config EXYNOS4_SETUP_FIMD0 88config EXYNOS4_SETUP_FIMD0
84 bool 89 bool
85 help 90 help
@@ -370,6 +375,7 @@ comment "Flattened Device Tree based board for EXYNOS SoCs"
370 375
371config MACH_EXYNOS4_DT 376config MACH_EXYNOS4_DT
372 bool "Samsung Exynos4 Machine using device tree" 377 bool "Samsung Exynos4 Machine using device tree"
378 depends on ARCH_EXYNOS4
373 select CPU_EXYNOS4210 379 select CPU_EXYNOS4210
374 select USE_OF 380 select USE_OF
375 select ARM_AMBA 381 select ARM_AMBA
@@ -382,6 +388,7 @@ config MACH_EXYNOS4_DT
382 388
383config MACH_EXYNOS5_DT 389config MACH_EXYNOS5_DT
384 bool "SAMSUNG EXYNOS5 Machine using device tree" 390 bool "SAMSUNG EXYNOS5 Machine using device tree"
391 depends on ARCH_EXYNOS5
385 select SOC_EXYNOS5250 392 select SOC_EXYNOS5250
386 select USE_OF 393 select USE_OF
387 select ARM_AMBA 394 select ARM_AMBA
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 272625231c73..bd7e7654a250 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -50,10 +50,11 @@ obj-$(CONFIG_MACH_EXYNOS5_DT) += mach-exynos5-dt.o
50obj-y += dev-uart.o 50obj-y += dev-uart.o
51obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o 51obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
52obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o 52obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
53obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o
54obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o 53obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
55obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o 54obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o
56obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o 55obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
56obj-$(CONFIG_EXYNOS_DEV_DRM) += dev-drm.o
57obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o
57 58
58obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o 59obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o
59obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o 60obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
diff --git a/arch/arm/mach-exynos/Makefile.boot b/arch/arm/mach-exynos/Makefile.boot
index b9862e22bf10..31bd181b0514 100644
--- a/arch/arm/mach-exynos/Makefile.boot
+++ b/arch/arm/mach-exynos/Makefile.boot
@@ -1,2 +1,5 @@
1 zreladdr-y += 0x40008000 1 zreladdr-y += 0x40008000
2params_phys-y := 0x40000100 2params_phys-y := 0x40000100
3
4dtb-$(CONFIG_MACH_EXYNOS4_DT) += exynos4210-origen.dtb exynos4210-smdkv310.dtb
5dtb-$(CONFIG_MACH_EXYNOS5_DT) += exynos5250-smdk5250.dtb
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index 428731197471..bcb7db453145 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -502,25 +502,25 @@ static struct clk exynos4_init_clocks_off[] = {
502 .ctrlbit = (1 << 3), 502 .ctrlbit = (1 << 3),
503 }, { 503 }, {
504 .name = "hsmmc", 504 .name = "hsmmc",
505 .devname = "s3c-sdhci.0", 505 .devname = "exynos4-sdhci.0",
506 .parent = &exynos4_clk_aclk_133.clk, 506 .parent = &exynos4_clk_aclk_133.clk,
507 .enable = exynos4_clk_ip_fsys_ctrl, 507 .enable = exynos4_clk_ip_fsys_ctrl,
508 .ctrlbit = (1 << 5), 508 .ctrlbit = (1 << 5),
509 }, { 509 }, {
510 .name = "hsmmc", 510 .name = "hsmmc",
511 .devname = "s3c-sdhci.1", 511 .devname = "exynos4-sdhci.1",
512 .parent = &exynos4_clk_aclk_133.clk, 512 .parent = &exynos4_clk_aclk_133.clk,
513 .enable = exynos4_clk_ip_fsys_ctrl, 513 .enable = exynos4_clk_ip_fsys_ctrl,
514 .ctrlbit = (1 << 6), 514 .ctrlbit = (1 << 6),
515 }, { 515 }, {
516 .name = "hsmmc", 516 .name = "hsmmc",
517 .devname = "s3c-sdhci.2", 517 .devname = "exynos4-sdhci.2",
518 .parent = &exynos4_clk_aclk_133.clk, 518 .parent = &exynos4_clk_aclk_133.clk,
519 .enable = exynos4_clk_ip_fsys_ctrl, 519 .enable = exynos4_clk_ip_fsys_ctrl,
520 .ctrlbit = (1 << 7), 520 .ctrlbit = (1 << 7),
521 }, { 521 }, {
522 .name = "hsmmc", 522 .name = "hsmmc",
523 .devname = "s3c-sdhci.3", 523 .devname = "exynos4-sdhci.3",
524 .parent = &exynos4_clk_aclk_133.clk, 524 .parent = &exynos4_clk_aclk_133.clk,
525 .enable = exynos4_clk_ip_fsys_ctrl, 525 .enable = exynos4_clk_ip_fsys_ctrl,
526 .ctrlbit = (1 << 8), 526 .ctrlbit = (1 << 8),
@@ -1201,7 +1201,7 @@ static struct clksrc_clk exynos4_clk_sclk_uart3 = {
1201static struct clksrc_clk exynos4_clk_sclk_mmc0 = { 1201static struct clksrc_clk exynos4_clk_sclk_mmc0 = {
1202 .clk = { 1202 .clk = {
1203 .name = "sclk_mmc", 1203 .name = "sclk_mmc",
1204 .devname = "s3c-sdhci.0", 1204 .devname = "exynos4-sdhci.0",
1205 .parent = &exynos4_clk_dout_mmc0.clk, 1205 .parent = &exynos4_clk_dout_mmc0.clk,
1206 .enable = exynos4_clksrc_mask_fsys_ctrl, 1206 .enable = exynos4_clksrc_mask_fsys_ctrl,
1207 .ctrlbit = (1 << 0), 1207 .ctrlbit = (1 << 0),
@@ -1212,7 +1212,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc0 = {
1212static struct clksrc_clk exynos4_clk_sclk_mmc1 = { 1212static struct clksrc_clk exynos4_clk_sclk_mmc1 = {
1213 .clk = { 1213 .clk = {
1214 .name = "sclk_mmc", 1214 .name = "sclk_mmc",
1215 .devname = "s3c-sdhci.1", 1215 .devname = "exynos4-sdhci.1",
1216 .parent = &exynos4_clk_dout_mmc1.clk, 1216 .parent = &exynos4_clk_dout_mmc1.clk,
1217 .enable = exynos4_clksrc_mask_fsys_ctrl, 1217 .enable = exynos4_clksrc_mask_fsys_ctrl,
1218 .ctrlbit = (1 << 4), 1218 .ctrlbit = (1 << 4),
@@ -1223,7 +1223,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc1 = {
1223static struct clksrc_clk exynos4_clk_sclk_mmc2 = { 1223static struct clksrc_clk exynos4_clk_sclk_mmc2 = {
1224 .clk = { 1224 .clk = {
1225 .name = "sclk_mmc", 1225 .name = "sclk_mmc",
1226 .devname = "s3c-sdhci.2", 1226 .devname = "exynos4-sdhci.2",
1227 .parent = &exynos4_clk_dout_mmc2.clk, 1227 .parent = &exynos4_clk_dout_mmc2.clk,
1228 .enable = exynos4_clksrc_mask_fsys_ctrl, 1228 .enable = exynos4_clksrc_mask_fsys_ctrl,
1229 .ctrlbit = (1 << 8), 1229 .ctrlbit = (1 << 8),
@@ -1234,7 +1234,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc2 = {
1234static struct clksrc_clk exynos4_clk_sclk_mmc3 = { 1234static struct clksrc_clk exynos4_clk_sclk_mmc3 = {
1235 .clk = { 1235 .clk = {
1236 .name = "sclk_mmc", 1236 .name = "sclk_mmc",
1237 .devname = "s3c-sdhci.3", 1237 .devname = "exynos4-sdhci.3",
1238 .parent = &exynos4_clk_dout_mmc3.clk, 1238 .parent = &exynos4_clk_dout_mmc3.clk,
1239 .enable = exynos4_clksrc_mask_fsys_ctrl, 1239 .enable = exynos4_clksrc_mask_fsys_ctrl,
1240 .ctrlbit = (1 << 12), 1240 .ctrlbit = (1 << 12),
@@ -1339,10 +1339,10 @@ static struct clk_lookup exynos4_clk_lookup[] = {
1339 CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos4_clk_sclk_uart1.clk), 1339 CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos4_clk_sclk_uart1.clk),
1340 CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos4_clk_sclk_uart2.clk), 1340 CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos4_clk_sclk_uart2.clk),
1341 CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos4_clk_sclk_uart3.clk), 1341 CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos4_clk_sclk_uart3.clk),
1342 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &exynos4_clk_sclk_mmc0.clk), 1342 CLKDEV_INIT("exynos4-sdhci.0", "mmc_busclk.2", &exynos4_clk_sclk_mmc0.clk),
1343 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &exynos4_clk_sclk_mmc1.clk), 1343 CLKDEV_INIT("exynos4-sdhci.1", "mmc_busclk.2", &exynos4_clk_sclk_mmc1.clk),
1344 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &exynos4_clk_sclk_mmc2.clk), 1344 CLKDEV_INIT("exynos4-sdhci.2", "mmc_busclk.2", &exynos4_clk_sclk_mmc2.clk),
1345 CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &exynos4_clk_sclk_mmc3.clk), 1345 CLKDEV_INIT("exynos4-sdhci.3", "mmc_busclk.2", &exynos4_clk_sclk_mmc3.clk),
1346 CLKDEV_INIT("exynos4-fb.0", "lcd", &exynos4_clk_fimd0), 1346 CLKDEV_INIT("exynos4-fb.0", "lcd", &exynos4_clk_fimd0),
1347 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos4_clk_pdma0), 1347 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos4_clk_pdma0),
1348 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos4_clk_pdma1), 1348 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos4_clk_pdma1),
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index 3320ad140ebe..ad3bec4f1fa6 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -475,25 +475,25 @@ static struct clk exynos5_init_clocks_off[] = {
475 .ctrlbit = (1 << 20), 475 .ctrlbit = (1 << 20),
476 }, { 476 }, {
477 .name = "hsmmc", 477 .name = "hsmmc",
478 .devname = "s3c-sdhci.0", 478 .devname = "exynos4-sdhci.0",
479 .parent = &exynos5_clk_aclk_200.clk, 479 .parent = &exynos5_clk_aclk_200.clk,
480 .enable = exynos5_clk_ip_fsys_ctrl, 480 .enable = exynos5_clk_ip_fsys_ctrl,
481 .ctrlbit = (1 << 12), 481 .ctrlbit = (1 << 12),
482 }, { 482 }, {
483 .name = "hsmmc", 483 .name = "hsmmc",
484 .devname = "s3c-sdhci.1", 484 .devname = "exynos4-sdhci.1",
485 .parent = &exynos5_clk_aclk_200.clk, 485 .parent = &exynos5_clk_aclk_200.clk,
486 .enable = exynos5_clk_ip_fsys_ctrl, 486 .enable = exynos5_clk_ip_fsys_ctrl,
487 .ctrlbit = (1 << 13), 487 .ctrlbit = (1 << 13),
488 }, { 488 }, {
489 .name = "hsmmc", 489 .name = "hsmmc",
490 .devname = "s3c-sdhci.2", 490 .devname = "exynos4-sdhci.2",
491 .parent = &exynos5_clk_aclk_200.clk, 491 .parent = &exynos5_clk_aclk_200.clk,
492 .enable = exynos5_clk_ip_fsys_ctrl, 492 .enable = exynos5_clk_ip_fsys_ctrl,
493 .ctrlbit = (1 << 14), 493 .ctrlbit = (1 << 14),
494 }, { 494 }, {
495 .name = "hsmmc", 495 .name = "hsmmc",
496 .devname = "s3c-sdhci.3", 496 .devname = "exynos4-sdhci.3",
497 .parent = &exynos5_clk_aclk_200.clk, 497 .parent = &exynos5_clk_aclk_200.clk,
498 .enable = exynos5_clk_ip_fsys_ctrl, 498 .enable = exynos5_clk_ip_fsys_ctrl,
499 .ctrlbit = (1 << 15), 499 .ctrlbit = (1 << 15),
@@ -903,7 +903,7 @@ static struct clksrc_clk exynos5_clk_sclk_uart3 = {
903static struct clksrc_clk exynos5_clk_sclk_mmc0 = { 903static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
904 .clk = { 904 .clk = {
905 .name = "sclk_mmc", 905 .name = "sclk_mmc",
906 .devname = "s3c-sdhci.0", 906 .devname = "exynos4-sdhci.0",
907 .parent = &exynos5_clk_dout_mmc0.clk, 907 .parent = &exynos5_clk_dout_mmc0.clk,
908 .enable = exynos5_clksrc_mask_fsys_ctrl, 908 .enable = exynos5_clksrc_mask_fsys_ctrl,
909 .ctrlbit = (1 << 0), 909 .ctrlbit = (1 << 0),
@@ -914,7 +914,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
914static struct clksrc_clk exynos5_clk_sclk_mmc1 = { 914static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
915 .clk = { 915 .clk = {
916 .name = "sclk_mmc", 916 .name = "sclk_mmc",
917 .devname = "s3c-sdhci.1", 917 .devname = "exynos4-sdhci.1",
918 .parent = &exynos5_clk_dout_mmc1.clk, 918 .parent = &exynos5_clk_dout_mmc1.clk,
919 .enable = exynos5_clksrc_mask_fsys_ctrl, 919 .enable = exynos5_clksrc_mask_fsys_ctrl,
920 .ctrlbit = (1 << 4), 920 .ctrlbit = (1 << 4),
@@ -925,7 +925,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
925static struct clksrc_clk exynos5_clk_sclk_mmc2 = { 925static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
926 .clk = { 926 .clk = {
927 .name = "sclk_mmc", 927 .name = "sclk_mmc",
928 .devname = "s3c-sdhci.2", 928 .devname = "exynos4-sdhci.2",
929 .parent = &exynos5_clk_dout_mmc2.clk, 929 .parent = &exynos5_clk_dout_mmc2.clk,
930 .enable = exynos5_clksrc_mask_fsys_ctrl, 930 .enable = exynos5_clksrc_mask_fsys_ctrl,
931 .ctrlbit = (1 << 8), 931 .ctrlbit = (1 << 8),
@@ -936,7 +936,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
936static struct clksrc_clk exynos5_clk_sclk_mmc3 = { 936static struct clksrc_clk exynos5_clk_sclk_mmc3 = {
937 .clk = { 937 .clk = {
938 .name = "sclk_mmc", 938 .name = "sclk_mmc",
939 .devname = "s3c-sdhci.3", 939 .devname = "exynos4-sdhci.3",
940 .parent = &exynos5_clk_dout_mmc3.clk, 940 .parent = &exynos5_clk_dout_mmc3.clk,
941 .enable = exynos5_clksrc_mask_fsys_ctrl, 941 .enable = exynos5_clksrc_mask_fsys_ctrl,
942 .ctrlbit = (1 << 12), 942 .ctrlbit = (1 << 12),
@@ -1080,10 +1080,10 @@ static struct clk_lookup exynos5_clk_lookup[] = {
1080 CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos5_clk_sclk_uart1.clk), 1080 CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos5_clk_sclk_uart1.clk),
1081 CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos5_clk_sclk_uart2.clk), 1081 CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos5_clk_sclk_uart2.clk),
1082 CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos5_clk_sclk_uart3.clk), 1082 CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos5_clk_sclk_uart3.clk),
1083 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &exynos5_clk_sclk_mmc0.clk), 1083 CLKDEV_INIT("exynos4-sdhci.0", "mmc_busclk.2", &exynos5_clk_sclk_mmc0.clk),
1084 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &exynos5_clk_sclk_mmc1.clk), 1084 CLKDEV_INIT("exynos4-sdhci.1", "mmc_busclk.2", &exynos5_clk_sclk_mmc1.clk),
1085 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &exynos5_clk_sclk_mmc2.clk), 1085 CLKDEV_INIT("exynos4-sdhci.2", "mmc_busclk.2", &exynos5_clk_sclk_mmc2.clk),
1086 CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &exynos5_clk_sclk_mmc3.clk), 1086 CLKDEV_INIT("exynos4-sdhci.3", "mmc_busclk.2", &exynos5_clk_sclk_mmc3.clk),
1087 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos5_clk_pdma0), 1087 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos5_clk_pdma0),
1088 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos5_clk_pdma1), 1088 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos5_clk_pdma1),
1089 CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos5_clk_mdma1), 1089 CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos5_clk_mdma1),
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index e6cc50e94a58..5ccd6e80a607 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -326,6 +326,11 @@ static void __init exynos4_map_io(void)
326 s3c_fimc_setname(2, "exynos4-fimc"); 326 s3c_fimc_setname(2, "exynos4-fimc");
327 s3c_fimc_setname(3, "exynos4-fimc"); 327 s3c_fimc_setname(3, "exynos4-fimc");
328 328
329 s3c_sdhci_setname(0, "exynos4-sdhci");
330 s3c_sdhci_setname(1, "exynos4-sdhci");
331 s3c_sdhci_setname(2, "exynos4-sdhci");
332 s3c_sdhci_setname(3, "exynos4-sdhci");
333
329 /* The I2C bus controllers are directly compatible with s3c2440 */ 334 /* The I2C bus controllers are directly compatible with s3c2440 */
330 s3c_i2c0_setname("s3c2440-i2c"); 335 s3c_i2c0_setname("s3c2440-i2c");
331 s3c_i2c1_setname("s3c2440-i2c"); 336 s3c_i2c1_setname("s3c2440-i2c");
@@ -344,6 +349,11 @@ static void __init exynos5_map_io(void)
344 s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC; 349 s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
345 s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC; 350 s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC;
346 351
352 s3c_sdhci_setname(0, "exynos4-sdhci");
353 s3c_sdhci_setname(1, "exynos4-sdhci");
354 s3c_sdhci_setname(2, "exynos4-sdhci");
355 s3c_sdhci_setname(3, "exynos4-sdhci");
356
347 /* The I2C bus controllers are directly compatible with s3c2440 */ 357 /* The I2C bus controllers are directly compatible with s3c2440 */
348 s3c_i2c0_setname("s3c2440-i2c"); 358 s3c_i2c0_setname("s3c2440-i2c");
349 s3c_i2c1_setname("s3c2440-i2c"); 359 s3c_i2c1_setname("s3c2440-i2c");
@@ -537,7 +547,9 @@ void __init exynos5_init_irq(void)
537{ 547{
538 int irq; 548 int irq;
539 549
540 gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); 550#ifdef CONFIG_OF
551 of_irq_init(exynos4_dt_irq_match);
552#endif
541 553
542 for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) { 554 for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) {
543 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), 555 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
@@ -583,10 +595,11 @@ core_initcall(exynos_core_init);
583#ifdef CONFIG_CACHE_L2X0 595#ifdef CONFIG_CACHE_L2X0
584static int __init exynos4_l2x0_cache_init(void) 596static int __init exynos4_l2x0_cache_init(void)
585{ 597{
598 int ret;
599
586 if (soc_is_exynos5250()) 600 if (soc_is_exynos5250())
587 return 0; 601 return 0;
588 602
589 int ret;
590 ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK); 603 ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
591 if (!ret) { 604 if (!ret) {
592 l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); 605 l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
diff --git a/arch/arm/mach-exynos/dev-drm.c b/arch/arm/mach-exynos/dev-drm.c
new file mode 100644
index 000000000000..17c9c6ecc2e0
--- /dev/null
+++ b/arch/arm/mach-exynos/dev-drm.c
@@ -0,0 +1,29 @@
1/*
2 * linux/arch/arm/mach-exynos/dev-drm.c
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * EXYNOS - core DRM device
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#include <linux/kernel.h>
16#include <linux/dma-mapping.h>
17#include <linux/platform_device.h>
18
19#include <plat/devs.h>
20
21static u64 exynos_drm_dma_mask = DMA_BIT_MASK(32);
22
23struct platform_device exynos_device_drm = {
24 .name = "exynos-drm",
25 .dev = {
26 .dma_mask = &exynos_drm_dma_mask,
27 .coherent_dma_mask = DMA_BIT_MASK(32),
28 }
29};
diff --git a/arch/arm/mach-exynos/dev-dwmci.c b/arch/arm/mach-exynos/dev-dwmci.c
index b025db4bf602..79035018fb74 100644
--- a/arch/arm/mach-exynos/dev-dwmci.c
+++ b/arch/arm/mach-exynos/dev-dwmci.c
@@ -16,6 +16,7 @@
16#include <linux/dma-mapping.h> 16#include <linux/dma-mapping.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/ioport.h>
19#include <linux/mmc/dw_mmc.h> 20#include <linux/mmc/dw_mmc.h>
20 21
21#include <plat/devs.h> 22#include <plat/devs.h>
@@ -33,16 +34,8 @@ static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void *data)
33} 34}
34 35
35static struct resource exynos4_dwmci_resource[] = { 36static struct resource exynos4_dwmci_resource[] = {
36 [0] = { 37 [0] = DEFINE_RES_MEM(EXYNOS4_PA_DWMCI, SZ_4K),
37 .start = EXYNOS4_PA_DWMCI, 38 [1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_DWMCI),
38 .end = EXYNOS4_PA_DWMCI + SZ_4K - 1,
39 .flags = IORESOURCE_MEM,
40 },
41 [1] = {
42 .start = IRQ_DWMCI,
43 .end = IRQ_DWMCI,
44 .flags = IORESOURCE_IRQ,
45 }
46}; 39};
47 40
48static struct dw_mci_board exynos4_dwci_pdata = { 41static struct dw_mci_board exynos4_dwci_pdata = {
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 3983abee4264..69aaa4503205 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -35,8 +35,6 @@
35#include <mach/irqs.h> 35#include <mach/irqs.h>
36#include <mach/dma.h> 36#include <mach/dma.h>
37 37
38static u64 dma_dmamask = DMA_BIT_MASK(32);
39
40static u8 exynos4210_pdma0_peri[] = { 38static u8 exynos4210_pdma0_peri[] = {
41 DMACH_PCM0_RX, 39 DMACH_PCM0_RX,
42 DMACH_PCM0_TX, 40 DMACH_PCM0_TX,
diff --git a/arch/arm/mach-exynos/include/mach/debug-macro.S b/arch/arm/mach-exynos/include/mach/debug-macro.S
index 6c857ff0b5d8..e0c86ea475e7 100644
--- a/arch/arm/mach-exynos/include/mach/debug-macro.S
+++ b/arch/arm/mach-exynos/include/mach/debug-macro.S
@@ -21,10 +21,9 @@
21 */ 21 */
22 22
23 .macro addruart, rp, rv, tmp 23 .macro addruart, rp, rv, tmp
24 mov \rp, #0x10000000 24 mrc p15, 0, \tmp, c0, c0, 0
25 ldr \rp, [\rp, #0x0] 25 and \tmp, \tmp, #0xf0
26 and \rp, \rp, #0xf00000 26 teq \tmp, #0xf0 @@ A15
27 teq \rp, #0x500000 @@ EXYNOS5
28 ldreq \rp, =EXYNOS5_PA_UART 27 ldreq \rp, =EXYNOS5_PA_UART
29 movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4 28 movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4
30 ldr \rv, =S3C_VA_UART 29 ldr \rv, =S3C_VA_UART
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index f140e1a2d335..116167524051 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -219,6 +219,8 @@
219#define IRQ_MFC EXYNOS4_IRQ_MFC 219#define IRQ_MFC EXYNOS4_IRQ_MFC
220#define IRQ_SDO EXYNOS4_IRQ_SDO 220#define IRQ_SDO EXYNOS4_IRQ_SDO
221 221
222#define IRQ_I2S0 EXYNOS4_IRQ_I2S0
223
222#define IRQ_ADC EXYNOS4_IRQ_ADC0 224#define IRQ_ADC EXYNOS4_IRQ_ADC0
223#define IRQ_TC EXYNOS4_IRQ_PEN0 225#define IRQ_TC EXYNOS4_IRQ_PEN0
224 226
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 69f2ea6fb0d2..0e2292d04550 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -89,6 +89,10 @@
89#define EXYNOS4_PA_MDMA1 0x12840000 89#define EXYNOS4_PA_MDMA1 0x12840000
90#define EXYNOS4_PA_PDMA0 0x12680000 90#define EXYNOS4_PA_PDMA0 0x12680000
91#define EXYNOS4_PA_PDMA1 0x12690000 91#define EXYNOS4_PA_PDMA1 0x12690000
92#define EXYNOS5_PA_MDMA0 0x10800000
93#define EXYNOS5_PA_MDMA1 0x11C10000
94#define EXYNOS5_PA_PDMA0 0x121A0000
95#define EXYNOS5_PA_PDMA1 0x121B0000
92 96
93#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000 97#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000
94#define EXYNOS4_PA_SYSMMU_2D_ACP 0x10A40000 98#define EXYNOS4_PA_SYSMMU_2D_ACP 0x10A40000
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h
index 7395236ffc0e..dba83e91f0fd 100644
--- a/arch/arm/mach-exynos/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos/include/mach/regs-clock.h
@@ -258,9 +258,15 @@
258 258
259/* For EXYNOS5250 */ 259/* For EXYNOS5250 */
260 260
261#define EXYNOS5_APLL_LOCK EXYNOS_CLKREG(0x00000)
261#define EXYNOS5_APLL_CON0 EXYNOS_CLKREG(0x00100) 262#define EXYNOS5_APLL_CON0 EXYNOS_CLKREG(0x00100)
262#define EXYNOS5_CLKSRC_CPU EXYNOS_CLKREG(0x00200) 263#define EXYNOS5_CLKSRC_CPU EXYNOS_CLKREG(0x00200)
264#define EXYNOS5_CLKMUX_STATCPU EXYNOS_CLKREG(0x00400)
263#define EXYNOS5_CLKDIV_CPU0 EXYNOS_CLKREG(0x00500) 265#define EXYNOS5_CLKDIV_CPU0 EXYNOS_CLKREG(0x00500)
266#define EXYNOS5_CLKDIV_CPU1 EXYNOS_CLKREG(0x00504)
267#define EXYNOS5_CLKDIV_STATCPU0 EXYNOS_CLKREG(0x00600)
268#define EXYNOS5_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x00604)
269
264#define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100) 270#define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100)
265#define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204) 271#define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204)
266 272
diff --git a/arch/arm/mach-exynos/include/mach/uncompress.h b/arch/arm/mach-exynos/include/mach/uncompress.h
index 493f4f365ddf..2979995d5a6a 100644
--- a/arch/arm/mach-exynos/include/mach/uncompress.h
+++ b/arch/arm/mach-exynos/include/mach/uncompress.h
@@ -20,9 +20,24 @@ volatile u8 *uart_base;
20 20
21#include <plat/uncompress.h> 21#include <plat/uncompress.h>
22 22
23static unsigned int __raw_readl(unsigned int ptr)
24{
25 return *((volatile unsigned int *)ptr);
26}
27
23static void arch_detect_cpu(void) 28static void arch_detect_cpu(void)
24{ 29{
25 if (machine_is_smdk5250()) 30 u32 chip_id = __raw_readl(EXYNOS_PA_CHIPID);
31
32 /*
33 * product_id is bits 31:12
34 * bits 23:20 describe the exynosX family
35 *
36 */
37 chip_id >>= 20;
38 chip_id &= 0xf;
39
40 if (chip_id == 0x5)
26 uart_base = (volatile u8 *)EXYNOS5_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT); 41 uart_base = (volatile u8 *)EXYNOS5_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
27 else 42 else
28 uart_base = (volatile u8 *)EXYNOS4_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT); 43 uart_base = (volatile u8 *)EXYNOS4_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 0d26f50081ad..4711c8920e37 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -45,7 +45,7 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
45 "exynos4210-uart.3", NULL), 45 "exynos4210-uart.3", NULL),
46 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL), 46 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
47 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL), 47 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
48 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.2", NULL), 48 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
49 {}, 49 {},
50}; 50};
51 51
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index b3982c867c9c..ed90aef404c3 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -112,6 +112,7 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
112 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | 112 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
113 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 113 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
114 MMC_CAP_ERASE), 114 MMC_CAP_ERASE),
115 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
115 .cd_type = S3C_SDHCI_CD_PERMANENT, 116 .cd_type = S3C_SDHCI_CD_PERMANENT,
116 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, 117 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
117}; 118};
@@ -307,49 +308,7 @@ static struct i2c_board_info i2c1_devs[] __initdata = {
307}; 308};
308 309
309/* TSP */ 310/* TSP */
310static u8 mxt_init_vals[] = {
311 /* MXT_GEN_COMMAND(6) */
312 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
313 /* MXT_GEN_POWER(7) */
314 0x20, 0xff, 0x32,
315 /* MXT_GEN_ACQUIRE(8) */
316 0x0a, 0x00, 0x05, 0x00, 0x00, 0x00, 0x09, 0x23,
317 /* MXT_TOUCH_MULTI(9) */
318 0x00, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x02, 0x00,
319 0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00,
320 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
321 0x00,
322 /* MXT_TOUCH_KEYARRAY(15) */
323 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
324 0x00,
325 /* MXT_SPT_GPIOPWM(19) */
326 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
327 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
328 /* MXT_PROCI_GRIPFACE(20) */
329 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x28, 0x04,
330 0x0f, 0x0a,
331 /* MXT_PROCG_NOISE(22) */
332 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x23, 0x00,
333 0x00, 0x05, 0x0f, 0x19, 0x23, 0x2d, 0x03,
334 /* MXT_TOUCH_PROXIMITY(23) */
335 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
336 0x00, 0x00, 0x00, 0x00, 0x00,
337 /* MXT_PROCI_ONETOUCH(24) */
338 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
339 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
340 /* MXT_SPT_SELFTEST(25) */
341 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
342 0x00, 0x00, 0x00, 0x00,
343 /* MXT_PROCI_TWOTOUCH(27) */
344 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
345 /* MXT_SPT_CTECONFIG(28) */
346 0x00, 0x00, 0x02, 0x08, 0x10, 0x00,
347};
348
349static struct mxt_platform_data mxt_platform_data = { 311static struct mxt_platform_data mxt_platform_data = {
350 .config = mxt_init_vals,
351 .config_length = ARRAY_SIZE(mxt_init_vals),
352
353 .x_line = 18, 312 .x_line = 18,
354 .y_line = 11, 313 .y_line = 11,
355 .x_size = 1024, 314 .x_size = 1024,
@@ -571,7 +530,7 @@ static struct regulator_init_data __initdata max8997_ldo7_data = {
571 530
572static struct regulator_init_data __initdata max8997_ldo8_data = { 531static struct regulator_init_data __initdata max8997_ldo8_data = {
573 .constraints = { 532 .constraints = {
574 .name = "VUSB/VDAC_3.3V_C210", 533 .name = "VUSB+VDAC_3.3V_C210",
575 .min_uV = 3300000, 534 .min_uV = 3300000,
576 .max_uV = 3300000, 535 .max_uV = 3300000,
577 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 536 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
@@ -1347,6 +1306,7 @@ static struct platform_device *nuri_devices[] __initdata = {
1347 1306
1348static void __init nuri_map_io(void) 1307static void __init nuri_map_io(void)
1349{ 1308{
1309 clk_xusbxti.rate = 24000000;
1350 exynos_init_io(NULL, 0); 1310 exynos_init_io(NULL, 0);
1351 s3c24xx_init_clocks(24000000); 1311 s3c24xx_init_clocks(24000000);
1352 s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs)); 1312 s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
@@ -1379,7 +1339,6 @@ static void __init nuri_machine_init(void)
1379 nuri_camera_init(); 1339 nuri_camera_init();
1380 1340
1381 nuri_ehci_init(); 1341 nuri_ehci_init();
1382 clk_xusbxti.rate = 24000000;
1383 1342
1384 /* Last */ 1343 /* Last */
1385 platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); 1344 platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 6bb9dbdd73fd..cb2b027f09a6 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -29,6 +29,7 @@
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30 30
31#include <plat/regs-serial.h> 31#include <plat/regs-serial.h>
32#include <plat/clock.h>
32#include <plat/cpu.h> 33#include <plat/cpu.h>
33#include <plat/devs.h> 34#include <plat/devs.h>
34#include <plat/iic.h> 35#include <plat/iic.h>
@@ -746,6 +747,7 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
746 .max_width = 8, 747 .max_width = 8,
747 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | 748 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
748 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), 749 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
750 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
749 .cd_type = S3C_SDHCI_CD_PERMANENT, 751 .cd_type = S3C_SDHCI_CD_PERMANENT,
750 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, 752 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
751}; 753};
@@ -1057,6 +1059,7 @@ static struct platform_device *universal_devices[] __initdata = {
1057 1059
1058static void __init universal_map_io(void) 1060static void __init universal_map_io(void)
1059{ 1061{
1062 clk_xusbxti.rate = 24000000;
1060 exynos_init_io(NULL, 0); 1063 exynos_init_io(NULL, 0);
1061 s3c24xx_init_clocks(24000000); 1064 s3c24xx_init_clocks(24000000);
1062 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); 1065 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c
index b9a95ed75553..98e04f5a87dd 100644
--- a/arch/arm/mach-imx/clock-imx27.c
+++ b/arch/arm/mach-imx/clock-imx27.c
@@ -662,6 +662,7 @@ static struct clk_lookup lookups[] = {
662 _REGISTER_CLOCK(NULL, "dma", dma_clk) 662 _REGISTER_CLOCK(NULL, "dma", dma_clk)
663 _REGISTER_CLOCK(NULL, "rtic", rtic_clk) 663 _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
664 _REGISTER_CLOCK(NULL, "brom", brom_clk) 664 _REGISTER_CLOCK(NULL, "brom", brom_clk)
665 _REGISTER_CLOCK(NULL, "emma", emma_clk)
665 _REGISTER_CLOCK("m2m-emmaprp.0", NULL, emma_clk) 666 _REGISTER_CLOCK("m2m-emmaprp.0", NULL, emma_clk)
666 _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk) 667 _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk)
667 _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk) 668 _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index 1e279af656ad..e56c1a83eee3 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -483,7 +483,7 @@ static struct clk_lookup lookups[] = {
483 _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk) 483 _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
484 _REGISTER_CLOCK(NULL, "max", max_clk) 484 _REGISTER_CLOCK(NULL, "max", max_clk)
485 _REGISTER_CLOCK(NULL, "audmux", audmux_clk) 485 _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
486 _REGISTER_CLOCK(NULL, "csi", csi_clk) 486 _REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk)
487 _REGISTER_CLOCK(NULL, "iim", iim_clk) 487 _REGISTER_CLOCK(NULL, "iim", iim_clk)
488 _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk) 488 _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk)
489 _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) 489 _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c
index 861ceb8232d6..ed38d03c61f2 100644
--- a/arch/arm/mach-imx/imx27-dt.c
+++ b/arch/arm/mach-imx/imx27-dt.c
@@ -35,7 +35,7 @@ static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {
35static int __init imx27_avic_add_irq_domain(struct device_node *np, 35static int __init imx27_avic_add_irq_domain(struct device_node *np,
36 struct device_node *interrupt_parent) 36 struct device_node *interrupt_parent)
37{ 37{
38 irq_domain_add_simple(np, 0); 38 irq_domain_add_legacy(np, 64, 0, 0, &irq_domain_simple_ops, NULL);
39 return 0; 39 return 0;
40} 40}
41 41
@@ -44,7 +44,9 @@ static int __init imx27_gpio_add_irq_domain(struct device_node *np,
44{ 44{
45 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; 45 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
46 46
47 irq_domain_add_simple(np, gpio_irq_base); 47 gpio_irq_base -= 32;
48 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
49 NULL);
48 50
49 return 0; 51 return 0;
50} 52}
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 27bc27e6ea41..c650145d1646 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -38,6 +38,8 @@
38#include <linux/usb/otg.h> 38#include <linux/usb/otg.h>
39#include <linux/usb/ulpi.h> 39#include <linux/usb/ulpi.h>
40#include <linux/delay.h> 40#include <linux/delay.h>
41#include <linux/regulator/machine.h>
42#include <linux/regulator/fixed.h>
41 43
42#include <mach/hardware.h> 44#include <mach/hardware.h>
43#include <asm/mach-types.h> 45#include <asm/mach-types.h>
@@ -479,6 +481,11 @@ static struct platform_device *devices[] __initdata = {
479 &armadillo5x0_smc911x_device, 481 &armadillo5x0_smc911x_device,
480}; 482};
481 483
484static struct regulator_consumer_supply dummy_supplies[] = {
485 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
486 REGULATOR_SUPPLY("vddvario", "smsc911x"),
487};
488
482/* 489/*
483 * Perform board specific initializations 490 * Perform board specific initializations
484 */ 491 */
@@ -489,6 +496,8 @@ static void __init armadillo5x0_init(void)
489 mxc_iomux_setup_multiple_pins(armadillo5x0_pins, 496 mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
490 ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0"); 497 ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
491 498
499 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
500
492 platform_add_devices(devices, ARRAY_SIZE(devices)); 501 platform_add_devices(devices, ARRAY_SIZE(devices));
493 imx_add_gpio_keys(&armadillo5x0_button_data); 502 imx_add_gpio_keys(&armadillo5x0_button_data);
494 imx31_add_imx_i2c1(NULL); 503 imx31_add_imx_i2c1(NULL);
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index fc78e8071cd1..15a26e908260 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -24,6 +24,8 @@
24#include <linux/serial_8250.h> 24#include <linux/serial_8250.h>
25#include <linux/smsc911x.h> 25#include <linux/smsc911x.h>
26#include <linux/types.h> 26#include <linux/types.h>
27#include <linux/regulator/machine.h>
28#include <linux/regulator/fixed.h>
27 29
28#include <asm/irq.h> 30#include <asm/irq.h>
29#include <asm/mach-types.h> 31#include <asm/mach-types.h>
@@ -166,6 +168,11 @@ static struct platform_device kzm_smsc9118_device = {
166 }, 168 },
167}; 169};
168 170
171static struct regulator_consumer_supply dummy_supplies[] = {
172 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
173 REGULATOR_SUPPLY("vddvario", "smsc911x"),
174};
175
169static int __init kzm_init_smsc9118(void) 176static int __init kzm_init_smsc9118(void)
170{ 177{
171 /* 178 /*
@@ -175,6 +182,8 @@ static int __init kzm_init_smsc9118(void)
175 gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int"); 182 gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
176 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2)); 183 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
177 184
185 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
186
178 return platform_device_register(&kzm_smsc9118_device); 187 return platform_device_register(&kzm_smsc9118_device);
179} 188}
180#else 189#else
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 02401bbd6d53..83714b0cc290 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -34,6 +34,8 @@
34#include <linux/mfd/mc13783.h> 34#include <linux/mfd/mc13783.h>
35#include <linux/usb/otg.h> 35#include <linux/usb/otg.h>
36#include <linux/usb/ulpi.h> 36#include <linux/usb/ulpi.h>
37#include <linux/regulator/machine.h>
38#include <linux/regulator/fixed.h>
37 39
38#include <asm/mach-types.h> 40#include <asm/mach-types.h>
39#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
@@ -242,6 +244,11 @@ static struct platform_device *devices[] __initdata = {
242static int mx31lilly_baseboard; 244static int mx31lilly_baseboard;
243core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444); 245core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
244 246
247static struct regulator_consumer_supply dummy_supplies[] = {
248 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
249 REGULATOR_SUPPLY("vddvario", "smsc911x"),
250};
251
245static void __init mx31lilly_board_init(void) 252static void __init mx31lilly_board_init(void)
246{ 253{
247 imx31_soc_init(); 254 imx31_soc_init();
@@ -280,6 +287,8 @@ static void __init mx31lilly_board_init(void)
280 imx31_add_spi_imx1(&spi1_pdata); 287 imx31_add_spi_imx1(&spi1_pdata);
281 spi_register_board_info(&mc13783_dev, 1); 288 spi_register_board_info(&mc13783_dev, 1);
282 289
290 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
291
283 platform_add_devices(devices, ARRAY_SIZE(devices)); 292 platform_add_devices(devices, ARRAY_SIZE(devices));
284 293
285 /* USB */ 294 /* USB */
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index ef80751712e7..0abef5f13df5 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -29,6 +29,8 @@
29#include <linux/usb/ulpi.h> 29#include <linux/usb/ulpi.h>
30#include <linux/mtd/physmap.h> 30#include <linux/mtd/physmap.h>
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <linux/regulator/machine.h>
33#include <linux/regulator/fixed.h>
32 34
33#include <asm/mach-types.h> 35#include <asm/mach-types.h>
34#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
@@ -226,6 +228,11 @@ void __init mx31lite_map_io(void)
226static int mx31lite_baseboard; 228static int mx31lite_baseboard;
227core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444); 229core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
228 230
231static struct regulator_consumer_supply dummy_supplies[] = {
232 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
233 REGULATOR_SUPPLY("vddvario", "smsc911x"),
234};
235
229static void __init mx31lite_init(void) 236static void __init mx31lite_init(void)
230{ 237{
231 int ret; 238 int ret;
@@ -259,6 +266,8 @@ static void __init mx31lite_init(void)
259 if (usbh2_pdata.otg) 266 if (usbh2_pdata.otg)
260 imx31_add_mxc_ehci_hs(2, &usbh2_pdata); 267 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
261 268
269 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
270
262 /* SMSC9117 IRQ pin */ 271 /* SMSC9117 IRQ pin */
263 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); 272 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
264 if (ret) 273 if (ret)
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index e14291d89e4f..6ae51c6b95b7 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -97,7 +97,7 @@ static struct i2c_board_info __initdata i2c_devices_3ds[] = {
97static int lcd_power_gpio = -ENXIO; 97static int lcd_power_gpio = -ENXIO;
98 98
99static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip, 99static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip,
100 void *data) 100 const void *data)
101{ 101{
102 return !strcmp(chip->label, data); 102 return !strcmp(chip->label, data);
103} 103}
diff --git a/arch/arm/mach-imx/mach-mx53_ard.c b/arch/arm/mach-imx/mach-mx53_ard.c
index 753f4fc9ec04..05641980dc5e 100644
--- a/arch/arm/mach-imx/mach-mx53_ard.c
+++ b/arch/arm/mach-imx/mach-mx53_ard.c
@@ -23,6 +23,8 @@
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/smsc911x.h> 25#include <linux/smsc911x.h>
26#include <linux/regulator/machine.h>
27#include <linux/regulator/fixed.h>
26 28
27#include <mach/common.h> 29#include <mach/common.h>
28#include <mach/hardware.h> 30#include <mach/hardware.h>
@@ -214,6 +216,11 @@ static int weim_cs_config(void)
214 return 0; 216 return 0;
215} 217}
216 218
219static struct regulator_consumer_supply dummy_supplies[] = {
220 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
221 REGULATOR_SUPPLY("vddvario", "smsc911x"),
222};
223
217void __init imx53_ard_common_init(void) 224void __init imx53_ard_common_init(void)
218{ 225{
219 mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads, 226 mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
@@ -232,6 +239,7 @@ static void __init mx53_ard_board_init(void)
232 239
233 imx53_ard_common_init(); 240 imx53_ard_common_init();
234 mx53_ard_io_init(); 241 mx53_ard_io_init();
242 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
235 platform_add_devices(devices, ARRAY_SIZE(devices)); 243 platform_add_devices(devices, ARRAY_SIZE(devices));
236 244
237 imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); 245 imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data);
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index 05250aed61fb..e10f3914fcfe 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -35,7 +35,7 @@ static void imx5_idle(void)
35 } 35 }
36 clk_enable(gpc_dvfs_clk); 36 clk_enable(gpc_dvfs_clk);
37 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); 37 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
38 if (tzic_enable_wake() != 0) 38 if (!tzic_enable_wake())
39 cpu_do_idle(); 39 cpu_do_idle();
40 clk_disable(gpc_dvfs_clk); 40 clk_disable(gpc_dvfs_clk);
41} 41}
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 3698a370d636..26aac363a064 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -86,9 +86,6 @@ static void __init halibut_init(void)
86static void __init halibut_fixup(struct tag *tags, char **cmdline, 86static void __init halibut_fixup(struct tag *tags, char **cmdline,
87 struct meminfo *mi) 87 struct meminfo *mi)
88{ 88{
89 mi->nr_banks=1;
90 mi->bank[0].start = PHYS_OFFSET;
91 mi->bank[0].size = (101*1024*1024);
92} 89}
93 90
94static void __init halibut_map_io(void) 91static void __init halibut_map_io(void)
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 962e71169750..fb3496a52ef4 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -17,6 +17,7 @@
17#include <linux/irqdomain.h> 17#include <linux/irqdomain.h>
18#include <linux/of.h> 18#include <linux/of.h>
19#include <linux/of_address.h> 19#include <linux/of_address.h>
20#include <linux/of_irq.h>
20#include <linux/of_platform.h> 21#include <linux/of_platform.h>
21#include <linux/memblock.h> 22#include <linux/memblock.h>
22 23
@@ -49,10 +50,22 @@ static void __init msm8x60_map_io(void)
49 msm_map_msm8x60_io(); 50 msm_map_msm8x60_io();
50} 51}
51 52
53#ifdef CONFIG_OF
54static struct of_device_id msm_dt_gic_match[] __initdata = {
55 { .compatible = "qcom,msm-8660-qgic", .data = gic_of_init },
56 {}
57};
58#endif
59
52static void __init msm8x60_init_irq(void) 60static void __init msm8x60_init_irq(void)
53{ 61{
54 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, 62 if (!of_have_populated_dt())
55 (void *)MSM_QGIC_CPU_BASE); 63 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
64 (void *)MSM_QGIC_CPU_BASE);
65#ifdef CONFIG_OF
66 else
67 of_irq_init(msm_dt_gic_match);
68#endif
56 69
57 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ 70 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
58 writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); 71 writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
@@ -73,16 +86,8 @@ static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = {
73 {} 86 {}
74}; 87};
75 88
76static struct of_device_id msm_dt_gic_match[] __initdata = {
77 { .compatible = "qcom,msm-8660-qgic", },
78 {}
79};
80
81static void __init msm8x60_dt_init(void) 89static void __init msm8x60_dt_init(void)
82{ 90{
83 irq_domain_generate_simple(msm_dt_gic_match, MSM8X60_QGIC_DIST_PHYS,
84 GIC_SPI_START);
85
86 if (of_machine_is_compatible("qcom,msm8660-surf")) { 91 if (of_machine_is_compatible("qcom,msm8660-surf")) {
87 printk(KERN_INFO "Init surf UART registers\n"); 92 printk(KERN_INFO "Init surf UART registers\n");
88 msm8x60_init_uart12dm(); 93 msm8x60_init_uart12dm();
diff --git a/arch/arm/mach-msm/board-trout-panel.c b/arch/arm/mach-msm/board-trout-panel.c
index 25105c1027fe..89bf6b426699 100644
--- a/arch/arm/mach-msm/board-trout-panel.c
+++ b/arch/arm/mach-msm/board-trout-panel.c
@@ -12,6 +12,7 @@
12 12
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/mach-types.h> 14#include <asm/mach-types.h>
15#include <asm/system_info.h>
15 16
16#include <mach/msm_fb.h> 17#include <mach/msm_fb.h>
17#include <mach/vreg.h> 18#include <mach/vreg.h>
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index 5414f76ec0a9..d4060a37e23d 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -19,6 +19,7 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/clkdev.h> 20#include <linux/clkdev.h>
21 21
22#include <asm/system_info.h>
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h
index 169a84007456..c14011fe832d 100644
--- a/arch/arm/mach-msm/include/mach/uncompress.h
+++ b/arch/arm/mach-msm/include/mach/uncompress.h
@@ -16,6 +16,7 @@
16#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H 16#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
17#define __ASM_ARCH_MSM_UNCOMPRESS_H 17#define __ASM_ARCH_MSM_UNCOMPRESS_H
18 18
19#include <asm/barrier.h>
19#include <asm/processor.h> 20#include <asm/processor.h>
20#include <mach/msm_iomap.h> 21#include <mach/msm_iomap.h>
21 22
diff --git a/arch/arm/mach-msm/proc_comm.c b/arch/arm/mach-msm/proc_comm.c
index 67e701c7f183..9980dc736e7b 100644
--- a/arch/arm/mach-msm/proc_comm.c
+++ b/arch/arm/mach-msm/proc_comm.c
@@ -121,7 +121,7 @@ int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2)
121 * and unknown state. This function should be called early to 121 * and unknown state. This function should be called early to
122 * wait on the ARM9. 122 * wait on the ARM9.
123 */ 123 */
124void __init proc_comm_boot_wait(void) 124void __devinit proc_comm_boot_wait(void)
125{ 125{
126 void __iomem *base = MSM_SHARED_RAM_BASE; 126 void __iomem *base = MSM_SHARED_RAM_BASE;
127 127
diff --git a/arch/arm/mach-msm/smd_debug.c b/arch/arm/mach-msm/smd_debug.c
index 0c56a5aaf588..c56df9e932ae 100644
--- a/arch/arm/mach-msm/smd_debug.c
+++ b/arch/arm/mach-msm/smd_debug.c
@@ -203,15 +203,9 @@ static ssize_t debug_read(struct file *file, char __user *buf,
203 return simple_read_from_buffer(buf, count, ppos, debug_buffer, bsize); 203 return simple_read_from_buffer(buf, count, ppos, debug_buffer, bsize);
204} 204}
205 205
206static int debug_open(struct inode *inode, struct file *file)
207{
208 file->private_data = inode->i_private;
209 return 0;
210}
211
212static const struct file_operations debug_ops = { 206static const struct file_operations debug_ops = {
213 .read = debug_read, 207 .read = debug_read,
214 .open = debug_open, 208 .open = simple_open,
215 .llseek = default_llseek, 209 .llseek = default_llseek,
216}; 210};
217 211
diff --git a/arch/arm/mach-omap1/include/mach/io.h b/arch/arm/mach-omap1/include/mach/io.h
new file mode 100644
index 000000000000..ce4f8005b26f
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/io.h
@@ -0,0 +1,45 @@
1/*
2 * arch/arm/mach-omap1/include/mach/io.h
3 *
4 * IO definitions for TI OMAP processors and boards
5 *
6 * Copied from arch/arm/mach-sa1100/include/mach/io.h
7 * Copyright (C) 1997-1999 Russell King
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 *
29 * Modifications:
30 * 06-12-1997 RMK Created.
31 * 07-04-1999 RMK Major cleanup
32 */
33
34#ifndef __ASM_ARM_ARCH_IO_H
35#define __ASM_ARM_ARCH_IO_H
36
37#define IO_SPACE_LIMIT 0xffffffff
38
39/*
40 * We don't actually have real ISA nor PCI buses, but there is so many
41 * drivers out there that might just work if we fake them...
42 */
43#define __io(a) __typesafe_io(a)
44
45#endif
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 087dba0df47e..e9cc52d4cb28 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -27,6 +27,7 @@
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/spinlock.h> 28#include <linux/spinlock.h>
29 29
30#include <mach/hardware.h>
30 31
31#include <plat/mux.h> 32#include <plat/mux.h>
32 33
diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c
index 6e90665a7c47..fb202af01d0d 100644
--- a/arch/arm/mach-omap1/timer.c
+++ b/arch/arm/mach-omap1/timer.c
@@ -47,9 +47,9 @@ static int omap1_dm_timer_set_src(struct platform_device *pdev,
47 int n = (pdev->id - 1) << 1; 47 int n = (pdev->id - 1) << 1;
48 u32 l; 48 u32 l;
49 49
50 l = __raw_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); 50 l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
51 l |= source << n; 51 l |= source << n;
52 __raw_writel(l, MOD_CONF_CTRL_1); 52 omap_writel(l, MOD_CONF_CTRL_1);
53 53
54 return 0; 54 return 0;
55} 55}
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index a39fc4bbd2b8..130ab00c09a2 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -20,6 +20,7 @@
20#include <linux/usb/otg.h> 20#include <linux/usb/otg.h>
21#include <linux/spi/spi.h> 21#include <linux/spi/spi.h>
22#include <linux/i2c/twl.h> 22#include <linux/i2c/twl.h>
23#include <linux/mfd/twl6040.h>
23#include <linux/gpio_keys.h> 24#include <linux/gpio_keys.h>
24#include <linux/regulator/machine.h> 25#include <linux/regulator/machine.h>
25#include <linux/regulator/fixed.h> 26#include <linux/regulator/fixed.h>
@@ -560,7 +561,7 @@ static struct regulator_init_data sdp4430_vusim = {
560 }, 561 },
561}; 562};
562 563
563static struct twl4030_codec_data twl6040_codec = { 564static struct twl6040_codec_data twl6040_codec = {
564 /* single-step ramp for headset and handsfree */ 565 /* single-step ramp for headset and handsfree */
565 .hs_left_step = 0x0f, 566 .hs_left_step = 0x0f,
566 .hs_right_step = 0x0f, 567 .hs_right_step = 0x0f,
@@ -568,7 +569,7 @@ static struct twl4030_codec_data twl6040_codec = {
568 .hf_right_step = 0x1d, 569 .hf_right_step = 0x1d,
569}; 570};
570 571
571static struct twl4030_vibra_data twl6040_vibra = { 572static struct twl6040_vibra_data twl6040_vibra = {
572 .vibldrv_res = 8, 573 .vibldrv_res = 8,
573 .vibrdrv_res = 3, 574 .vibrdrv_res = 3,
574 .viblmotor_res = 10, 575 .viblmotor_res = 10,
@@ -577,16 +578,14 @@ static struct twl4030_vibra_data twl6040_vibra = {
577 .vddvibr_uV = 0, /* fixed volt supply - VBAT */ 578 .vddvibr_uV = 0, /* fixed volt supply - VBAT */
578}; 579};
579 580
580static struct twl4030_audio_data twl6040_audio = { 581static struct twl6040_platform_data twl6040_data = {
581 .codec = &twl6040_codec, 582 .codec = &twl6040_codec,
582 .vibra = &twl6040_vibra, 583 .vibra = &twl6040_vibra,
583 .audpwron_gpio = 127, 584 .audpwron_gpio = 127,
584 .naudint_irq = OMAP44XX_IRQ_SYS_2N,
585 .irq_base = TWL6040_CODEC_IRQ_BASE, 585 .irq_base = TWL6040_CODEC_IRQ_BASE,
586}; 586};
587 587
588static struct twl4030_platform_data sdp4430_twldata = { 588static struct twl4030_platform_data sdp4430_twldata = {
589 .audio = &twl6040_audio,
590 /* Regulators */ 589 /* Regulators */
591 .vusim = &sdp4430_vusim, 590 .vusim = &sdp4430_vusim,
592 .vaux1 = &sdp4430_vaux1, 591 .vaux1 = &sdp4430_vaux1,
@@ -617,7 +616,8 @@ static int __init omap4_i2c_init(void)
617 TWL_COMMON_REGULATOR_VCXIO | 616 TWL_COMMON_REGULATOR_VCXIO |
618 TWL_COMMON_REGULATOR_VUSB | 617 TWL_COMMON_REGULATOR_VUSB |
619 TWL_COMMON_REGULATOR_CLK32KG); 618 TWL_COMMON_REGULATOR_CLK32KG);
620 omap4_pmic_init("twl6030", &sdp4430_twldata); 619 omap4_pmic_init("twl6030", &sdp4430_twldata,
620 &twl6040_data, OMAP44XX_IRQ_SYS_2N);
621 omap_register_i2c_bus(2, 400, NULL, 0); 621 omap_register_i2c_bus(2, 400, NULL, 0);
622 omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, 622 omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
623 ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); 623 ARRAY_SIZE(sdp4430_i2c_3_boardinfo));
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 41b0a2fe0b04..909a8b91b564 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -26,6 +26,7 @@
26 26
27#include <linux/i2c/at24.h> 27#include <linux/i2c/at24.h>
28#include <linux/i2c/twl.h> 28#include <linux/i2c/twl.h>
29#include <linux/regulator/fixed.h>
29#include <linux/regulator/machine.h> 30#include <linux/regulator/machine.h>
30#include <linux/mmc/host.h> 31#include <linux/mmc/host.h>
31 32
@@ -81,8 +82,23 @@ static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
81 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, 82 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
82}; 83};
83 84
85static struct regulator_consumer_supply cm_t35_smsc911x_supplies[] = {
86 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
87 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
88};
89
90static struct regulator_consumer_supply sb_t35_smsc911x_supplies[] = {
91 REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
92 REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
93};
94
84static void __init cm_t35_init_ethernet(void) 95static void __init cm_t35_init_ethernet(void)
85{ 96{
97 regulator_register_fixed(0, cm_t35_smsc911x_supplies,
98 ARRAY_SIZE(cm_t35_smsc911x_supplies));
99 regulator_register_fixed(1, sb_t35_smsc911x_supplies,
100 ARRAY_SIZE(sb_t35_smsc911x_supplies));
101
86 gpmc_smsc911x_init(&cm_t35_smsc911x_cfg); 102 gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
87 gpmc_smsc911x_init(&sb_t35_smsc911x_cfg); 103 gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
88} 104}
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 74e1687b5170..098d183a0086 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -137,7 +137,7 @@ static struct twl4030_platform_data sdp4430_twldata = {
137 137
138static void __init omap4_i2c_init(void) 138static void __init omap4_i2c_init(void)
139{ 139{
140 omap4_pmic_init("twl6030", &sdp4430_twldata); 140 omap4_pmic_init("twl6030", &sdp4430_twldata, NULL, 0);
141} 141}
142 142
143static void __init omap4_init(void) 143static void __init omap4_init(void)
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index e558800adfdf..930c0d380435 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -634,8 +634,14 @@ static void __init igep_wlan_bt_init(void)
634static inline void __init igep_wlan_bt_init(void) { } 634static inline void __init igep_wlan_bt_init(void) { }
635#endif 635#endif
636 636
637static struct regulator_consumer_supply dummy_supplies[] = {
638 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
639 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
640};
641
637static void __init igep_init(void) 642static void __init igep_init(void)
638{ 643{
644 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
639 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 645 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
640 646
641 /* Get IGEP2 hardware revision */ 647 /* Get IGEP2 hardware revision */
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index d50a562adfa0..1b6049567ab4 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -22,6 +22,7 @@
22#include <linux/err.h> 22#include <linux/err.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/spi/spi.h> 24#include <linux/spi/spi.h>
25#include <linux/regulator/fixed.h>
25#include <linux/regulator/machine.h> 26#include <linux/regulator/machine.h>
26#include <linux/i2c/twl.h> 27#include <linux/i2c/twl.h>
27#include <linux/io.h> 28#include <linux/io.h>
@@ -410,8 +411,14 @@ static struct mtd_partition ldp_nand_partitions[] = {
410 411
411}; 412};
412 413
414static struct regulator_consumer_supply dummy_supplies[] = {
415 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
416 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
417};
418
413static void __init omap_ldp_init(void) 419static void __init omap_ldp_init(void)
414{ 420{
421 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
415 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 422 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
416 ldp_init_smsc911x(); 423 ldp_init_smsc911x();
417 omap_i2c_init(); 424 omap_i2c_init();
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 4c90f078abe1..49df12735b41 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -114,15 +114,6 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
114 114
115static inline void __init omap3evm_init_smsc911x(void) 115static inline void __init omap3evm_init_smsc911x(void)
116{ 116{
117 struct clk *l3ck;
118 unsigned int rate;
119
120 l3ck = clk_get(NULL, "l3_ck");
121 if (IS_ERR(l3ck))
122 rate = 100000000;
123 else
124 rate = clk_get_rate(l3ck);
125
126 /* Configure ethernet controller reset gpio */ 117 /* Configure ethernet controller reset gpio */
127 if (cpu_is_omap3430()) { 118 if (cpu_is_omap3430()) {
128 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) 119 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
@@ -632,9 +623,15 @@ static void __init omap3_evm_wl12xx_init(void)
632#endif 623#endif
633} 624}
634 625
626static struct regulator_consumer_supply dummy_supplies[] = {
627 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
628 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
629};
630
635static void __init omap3_evm_init(void) 631static void __init omap3_evm_init(void)
636{ 632{
637 omap3_evm_get_revision(); 633 omap3_evm_get_revision();
634 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
638 635
639 if (cpu_is_omap3630()) 636 if (cpu_is_omap3630())
640 omap3_mux_init(omap36x_board_mux, OMAP_PACKAGE_CBB); 637 omap3_mux_init(omap36x_board_mux, OMAP_PACKAGE_CBB);
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 4a7d8c8a75da..9b3c141ff51b 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -23,6 +23,7 @@
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25 25
26#include <linux/regulator/fixed.h>
26#include <linux/regulator/machine.h> 27#include <linux/regulator/machine.h>
27 28
28#include <linux/i2c/twl.h> 29#include <linux/i2c/twl.h>
@@ -188,8 +189,14 @@ static struct omap_board_mux board_mux[] __initdata = {
188}; 189};
189#endif 190#endif
190 191
192static struct regulator_consumer_supply dummy_supplies[] = {
193 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
194 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
195};
196
191static void __init omap3logic_init(void) 197static void __init omap3logic_init(void)
192{ 198{
199 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
193 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 200 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
194 omap3torpedo_fix_pbias_voltage(); 201 omap3torpedo_fix_pbias_voltage();
195 omap3logic_i2c_init(); 202 omap3logic_i2c_init();
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 641004380795..4dffc95bddd2 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -24,6 +24,7 @@
24#include <linux/input.h> 24#include <linux/input.h>
25#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
26 26
27#include <linux/regulator/fixed.h>
27#include <linux/regulator/machine.h> 28#include <linux/regulator/machine.h>
28#include <linux/i2c/twl.h> 29#include <linux/i2c/twl.h>
29#include <linux/mmc/host.h> 30#include <linux/mmc/host.h>
@@ -72,15 +73,6 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
72 73
73static inline void __init omap3stalker_init_eth(void) 74static inline void __init omap3stalker_init_eth(void)
74{ 75{
75 struct clk *l3ck;
76 unsigned int rate;
77
78 l3ck = clk_get(NULL, "l3_ck");
79 if (IS_ERR(l3ck))
80 rate = 100000000;
81 else
82 rate = clk_get_rate(l3ck);
83
84 omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP); 76 omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP);
85 gpmc_smsc911x_init(&smsc911x_cfg); 77 gpmc_smsc911x_init(&smsc911x_cfg);
86} 78}
@@ -419,8 +411,14 @@ static struct omap_board_mux board_mux[] __initdata = {
419}; 411};
420#endif 412#endif
421 413
414static struct regulator_consumer_supply dummy_supplies[] = {
415 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
416 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
417};
418
422static void __init omap3_stalker_init(void) 419static void __init omap3_stalker_init(void)
423{ 420{
421 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
424 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); 422 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
425 omap_board_config = omap3_stalker_config; 423 omap_board_config = omap3_stalker_config;
426 omap_board_config_size = ARRAY_SIZE(omap3_stalker_config); 424 omap_board_config_size = ARRAY_SIZE(omap3_stalker_config);
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index d8c0e89f0126..1b782ba53433 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -25,6 +25,7 @@
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/usb/otg.h> 26#include <linux/usb/otg.h>
27#include <linux/i2c/twl.h> 27#include <linux/i2c/twl.h>
28#include <linux/mfd/twl6040.h>
28#include <linux/regulator/machine.h> 29#include <linux/regulator/machine.h>
29#include <linux/regulator/fixed.h> 30#include <linux/regulator/fixed.h>
30#include <linux/wl12xx.h> 31#include <linux/wl12xx.h>
@@ -284,7 +285,7 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
284 return 0; 285 return 0;
285} 286}
286 287
287static struct twl4030_codec_data twl6040_codec = { 288static struct twl6040_codec_data twl6040_codec = {
288 /* single-step ramp for headset and handsfree */ 289 /* single-step ramp for headset and handsfree */
289 .hs_left_step = 0x0f, 290 .hs_left_step = 0x0f,
290 .hs_right_step = 0x0f, 291 .hs_right_step = 0x0f,
@@ -292,17 +293,14 @@ static struct twl4030_codec_data twl6040_codec = {
292 .hf_right_step = 0x1d, 293 .hf_right_step = 0x1d,
293}; 294};
294 295
295static struct twl4030_audio_data twl6040_audio = { 296static struct twl6040_platform_data twl6040_data = {
296 .codec = &twl6040_codec, 297 .codec = &twl6040_codec,
297 .audpwron_gpio = 127, 298 .audpwron_gpio = 127,
298 .naudint_irq = OMAP44XX_IRQ_SYS_2N,
299 .irq_base = TWL6040_CODEC_IRQ_BASE, 299 .irq_base = TWL6040_CODEC_IRQ_BASE,
300}; 300};
301 301
302/* Panda board uses the common PMIC configuration */ 302/* Panda board uses the common PMIC configuration */
303static struct twl4030_platform_data omap4_panda_twldata = { 303static struct twl4030_platform_data omap4_panda_twldata;
304 .audio = &twl6040_audio,
305};
306 304
307/* 305/*
308 * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM 306 * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
@@ -326,7 +324,8 @@ static int __init omap4_panda_i2c_init(void)
326 TWL_COMMON_REGULATOR_VCXIO | 324 TWL_COMMON_REGULATOR_VCXIO |
327 TWL_COMMON_REGULATOR_VUSB | 325 TWL_COMMON_REGULATOR_VUSB |
328 TWL_COMMON_REGULATOR_CLK32KG); 326 TWL_COMMON_REGULATOR_CLK32KG);
329 omap4_pmic_init("twl6030", &omap4_panda_twldata); 327 omap4_pmic_init("twl6030", &omap4_panda_twldata,
328 &twl6040_data, OMAP44XX_IRQ_SYS_2N);
330 omap_register_i2c_bus(2, 400, NULL, 0); 329 omap_register_i2c_bus(2, 400, NULL, 0);
331 /* 330 /*
332 * Bus 3 is attached to the DVI port where devices like the pico DLP 331 * Bus 3 is attached to the DVI port where devices like the pico DLP
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 668533e2a379..33aa3910b09e 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -498,10 +498,18 @@ static struct gpio overo_bt_gpios[] __initdata = {
498 { OVERO_GPIO_BT_NRESET, GPIOF_OUT_INIT_HIGH, "lcd bl enable" }, 498 { OVERO_GPIO_BT_NRESET, GPIOF_OUT_INIT_HIGH, "lcd bl enable" },
499}; 499};
500 500
501static struct regulator_consumer_supply dummy_supplies[] = {
502 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
503 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
504 REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
505 REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
506};
507
501static void __init overo_init(void) 508static void __init overo_init(void)
502{ 509{
503 int ret; 510 int ret;
504 511
512 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
505 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 513 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
506 omap_hsmmc_init(mmc); 514 omap_hsmmc_init(mmc);
507 overo_i2c_init(); 515 overo_i2c_init();
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c
index 1e8540eabde9..f64f44173061 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -14,6 +14,9 @@
14#include <linux/smsc911x.h> 14#include <linux/smsc911x.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16 16
17#include <linux/regulator/fixed.h>
18#include <linux/regulator/machine.h>
19
17#include <plat/gpmc.h> 20#include <plat/gpmc.h>
18#include <plat/gpmc-smsc911x.h> 21#include <plat/gpmc-smsc911x.h>
19 22
@@ -117,11 +120,17 @@ static struct platform_device *zoom_devices[] __initdata = {
117 &zoom_debugboard_serial_device, 120 &zoom_debugboard_serial_device,
118}; 121};
119 122
123static struct regulator_consumer_supply dummy_supplies[] = {
124 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
125 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
126};
127
120int __init zoom_debugboard_init(void) 128int __init zoom_debugboard_init(void)
121{ 129{
122 if (!omap_zoom_debugboard_detect()) 130 if (!omap_zoom_debugboard_detect())
123 return 0; 131 return 0;
124 132
133 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
125 zoom_init_smsc911x(); 134 zoom_init_smsc911x();
126 zoom_init_quaduart(); 135 zoom_init_quaduart();
127 return platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices)); 136 return platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices));
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 7072e0d651b1..3d9d746b221a 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -165,83 +165,3 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
165 165
166 return 0; 166 return 0;
167} 167}
168
169#ifdef CONFIG_CPU_FREQ
170/*
171 * Walk PRCM rate table and fillout cpufreq freq_table
172 * XXX This should be replaced by an OPP layer in the near future
173 */
174static struct cpufreq_frequency_table *freq_table;
175
176void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
177{
178 const struct prcm_config *prcm;
179 int i = 0;
180 int tbl_sz = 0;
181
182 if (!cpu_is_omap24xx())
183 return;
184
185 for (prcm = rate_table; prcm->mpu_speed; prcm++) {
186 if (!(prcm->flags & cpu_mask))
187 continue;
188 if (prcm->xtal_speed != sclk->rate)
189 continue;
190
191 /* don't put bypass rates in table */
192 if (prcm->dpll_speed == prcm->xtal_speed)
193 continue;
194
195 tbl_sz++;
196 }
197
198 /*
199 * XXX Ensure that we're doing what CPUFreq expects for this error
200 * case and the following one
201 */
202 if (tbl_sz == 0) {
203 pr_warning("%s: no matching entries in rate_table\n",
204 __func__);
205 return;
206 }
207
208 /* Include the CPUFREQ_TABLE_END terminator entry */
209 tbl_sz++;
210
211 freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz,
212 GFP_ATOMIC);
213 if (!freq_table) {
214 pr_err("%s: could not kzalloc frequency table\n", __func__);
215 return;
216 }
217
218 for (prcm = rate_table; prcm->mpu_speed; prcm++) {
219 if (!(prcm->flags & cpu_mask))
220 continue;
221 if (prcm->xtal_speed != sclk->rate)
222 continue;
223
224 /* don't put bypass rates in table */
225 if (prcm->dpll_speed == prcm->xtal_speed)
226 continue;
227
228 freq_table[i].index = i;
229 freq_table[i].frequency = prcm->mpu_speed / 1000;
230 i++;
231 }
232
233 freq_table[i].index = i;
234 freq_table[i].frequency = CPUFREQ_TABLE_END;
235
236 *table = &freq_table[0];
237}
238
239void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
240{
241 if (!cpu_is_omap24xx())
242 return;
243
244 kfree(freq_table);
245}
246
247#endif
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index f57ed5baeccf..d9f4931513f9 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -536,10 +536,5 @@ struct clk_functions omap2_clk_functions = {
536 .clk_set_rate = omap2_clk_set_rate, 536 .clk_set_rate = omap2_clk_set_rate,
537 .clk_set_parent = omap2_clk_set_parent, 537 .clk_set_parent = omap2_clk_set_parent,
538 .clk_disable_unused = omap2_clk_disable_unused, 538 .clk_disable_unused = omap2_clk_disable_unused,
539#ifdef CONFIG_CPU_FREQ
540 /* These will be removed when the OPP code is integrated */
541 .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
542 .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table,
543#endif
544}; 539};
545 540
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index b8c2a686481c..a1bb23a23351 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -146,14 +146,6 @@ extern const struct clksel_rate gpt_sys_rates[];
146extern const struct clksel_rate gfx_l3_rates[]; 146extern const struct clksel_rate gfx_l3_rates[];
147extern const struct clksel_rate dsp_ick_rates[]; 147extern const struct clksel_rate dsp_ick_rates[];
148 148
149#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ)
150extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
151extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
152#else
153#define omap2_clk_init_cpufreq_table 0
154#define omap2_clk_exit_cpufreq_table 0
155#endif
156
157extern const struct clkops clkops_omap2_iclk_dflt_wait; 149extern const struct clkops clkops_omap2_iclk_dflt_wait;
158extern const struct clkops clkops_omap2_iclk_dflt; 150extern const struct clkops clkops_omap2_iclk_dflt;
159extern const struct clkops clkops_omap2_iclk_idle_only; 151extern const struct clkops clkops_omap2_iclk_idle_only;
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 480fb8f09aed..f4a626f7c79e 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -747,7 +747,7 @@ static struct clk dpll4_m3_ck = {
747 .parent = &dpll4_ck, 747 .parent = &dpll4_ck,
748 .init = &omap2_init_clksel_parent, 748 .init = &omap2_init_clksel_parent,
749 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), 749 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
750 .clksel_mask = OMAP3430_CLKSEL_TV_MASK, 750 .clksel_mask = OMAP3630_CLKSEL_TV_MASK,
751 .clksel = dpll4_clksel, 751 .clksel = dpll4_clksel,
752 .clkdm_name = "dpll4_clkdm", 752 .clkdm_name = "dpll4_clkdm",
753 .recalc = &omap2_clksel_recalc, 753 .recalc = &omap2_clksel_recalc,
@@ -832,7 +832,7 @@ static struct clk dpll4_m4_ck = {
832 .parent = &dpll4_ck, 832 .parent = &dpll4_ck,
833 .init = &omap2_init_clksel_parent, 833 .init = &omap2_init_clksel_parent,
834 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), 834 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
835 .clksel_mask = OMAP3430_CLKSEL_DSS1_MASK, 835 .clksel_mask = OMAP3630_CLKSEL_DSS1_MASK,
836 .clksel = dpll4_clksel, 836 .clksel = dpll4_clksel,
837 .clkdm_name = "dpll4_clkdm", 837 .clkdm_name = "dpll4_clkdm",
838 .recalc = &omap2_clksel_recalc, 838 .recalc = &omap2_clksel_recalc,
@@ -859,7 +859,7 @@ static struct clk dpll4_m5_ck = {
859 .parent = &dpll4_ck, 859 .parent = &dpll4_ck,
860 .init = &omap2_init_clksel_parent, 860 .init = &omap2_init_clksel_parent,
861 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL), 861 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL),
862 .clksel_mask = OMAP3430_CLKSEL_CAM_MASK, 862 .clksel_mask = OMAP3630_CLKSEL_CAM_MASK,
863 .clksel = dpll4_clksel, 863 .clksel = dpll4_clksel,
864 .clkdm_name = "dpll4_clkdm", 864 .clkdm_name = "dpll4_clkdm",
865 .set_rate = &omap2_clksel_set_rate, 865 .set_rate = &omap2_clksel_set_rate,
@@ -886,7 +886,7 @@ static struct clk dpll4_m6_ck = {
886 .parent = &dpll4_ck, 886 .parent = &dpll4_ck,
887 .init = &omap2_init_clksel_parent, 887 .init = &omap2_init_clksel_parent,
888 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1), 888 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
889 .clksel_mask = OMAP3430_DIV_DPLL4_MASK, 889 .clksel_mask = OMAP3630_DIV_DPLL4_MASK,
890 .clksel = dpll4_clksel, 890 .clksel = dpll4_clksel,
891 .clkdm_name = "dpll4_clkdm", 891 .clkdm_name = "dpll4_clkdm",
892 .recalc = &omap2_clksel_recalc, 892 .recalc = &omap2_clksel_recalc,
@@ -1394,6 +1394,7 @@ static struct clk cpefuse_fck = {
1394 .name = "cpefuse_fck", 1394 .name = "cpefuse_fck",
1395 .ops = &clkops_omap2_dflt, 1395 .ops = &clkops_omap2_dflt,
1396 .parent = &sys_ck, 1396 .parent = &sys_ck,
1397 .clkdm_name = "core_l4_clkdm",
1397 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), 1398 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
1398 .enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT, 1399 .enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT,
1399 .recalc = &followparent_recalc, 1400 .recalc = &followparent_recalc,
@@ -1403,6 +1404,7 @@ static struct clk ts_fck = {
1403 .name = "ts_fck", 1404 .name = "ts_fck",
1404 .ops = &clkops_omap2_dflt, 1405 .ops = &clkops_omap2_dflt,
1405 .parent = &omap_32k_fck, 1406 .parent = &omap_32k_fck,
1407 .clkdm_name = "core_l4_clkdm",
1406 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), 1408 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
1407 .enable_bit = OMAP3430ES2_EN_TS_SHIFT, 1409 .enable_bit = OMAP3430ES2_EN_TS_SHIFT,
1408 .recalc = &followparent_recalc, 1410 .recalc = &followparent_recalc,
@@ -1412,6 +1414,7 @@ static struct clk usbtll_fck = {
1412 .name = "usbtll_fck", 1414 .name = "usbtll_fck",
1413 .ops = &clkops_omap2_dflt_wait, 1415 .ops = &clkops_omap2_dflt_wait,
1414 .parent = &dpll5_m2_ck, 1416 .parent = &dpll5_m2_ck,
1417 .clkdm_name = "core_l4_clkdm",
1415 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), 1418 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
1416 .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, 1419 .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
1417 .recalc = &followparent_recalc, 1420 .recalc = &followparent_recalc,
@@ -1617,6 +1620,7 @@ static struct clk fshostusb_fck = {
1617 .name = "fshostusb_fck", 1620 .name = "fshostusb_fck",
1618 .ops = &clkops_omap2_dflt_wait, 1621 .ops = &clkops_omap2_dflt_wait,
1619 .parent = &core_48m_fck, 1622 .parent = &core_48m_fck,
1623 .clkdm_name = "core_l4_clkdm",
1620 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1624 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1621 .enable_bit = OMAP3430ES1_EN_FSHOSTUSB_SHIFT, 1625 .enable_bit = OMAP3430ES1_EN_FSHOSTUSB_SHIFT,
1622 .recalc = &followparent_recalc, 1626 .recalc = &followparent_recalc,
@@ -2043,6 +2047,7 @@ static struct clk omapctrl_ick = {
2043 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2047 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2044 .enable_bit = OMAP3430_EN_OMAPCTRL_SHIFT, 2048 .enable_bit = OMAP3430_EN_OMAPCTRL_SHIFT,
2045 .flags = ENABLE_ON_INIT, 2049 .flags = ENABLE_ON_INIT,
2050 .clkdm_name = "core_l4_clkdm",
2046 .recalc = &followparent_recalc, 2051 .recalc = &followparent_recalc,
2047}; 2052};
2048 2053
@@ -2094,6 +2099,7 @@ static struct clk usb_l4_ick = {
2094 .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL), 2099 .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
2095 .clksel_mask = OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK, 2100 .clksel_mask = OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK,
2096 .clksel = usb_l4_clksel, 2101 .clksel = usb_l4_clksel,
2102 .clkdm_name = "core_l4_clkdm",
2097 .recalc = &omap2_clksel_recalc, 2103 .recalc = &omap2_clksel_recalc,
2098}; 2104};
2099 2105
@@ -3467,8 +3473,8 @@ static struct omap_clk omap3xxx_clks[] = {
3467 CLK(NULL, "ipss_ick", &ipss_ick, CK_AM35XX), 3473 CLK(NULL, "ipss_ick", &ipss_ick, CK_AM35XX),
3468 CLK(NULL, "rmii_ck", &rmii_ck, CK_AM35XX), 3474 CLK(NULL, "rmii_ck", &rmii_ck, CK_AM35XX),
3469 CLK(NULL, "pclk_ck", &pclk_ck, CK_AM35XX), 3475 CLK(NULL, "pclk_ck", &pclk_ck, CK_AM35XX),
3470 CLK("davinci_emac", "emac_clk", &emac_ick, CK_AM35XX), 3476 CLK("davinci_emac", NULL, &emac_ick, CK_AM35XX),
3471 CLK("davinci_emac", "phy_clk", &emac_fck, CK_AM35XX), 3477 CLK("davinci_mdio.0", NULL, &emac_fck, CK_AM35XX),
3472 CLK("vpfe-capture", "master", &vpfe_ick, CK_AM35XX), 3478 CLK("vpfe-capture", "master", &vpfe_ick, CK_AM35XX),
3473 CLK("vpfe-capture", "slave", &vpfe_fck, CK_AM35XX), 3479 CLK("vpfe-capture", "slave", &vpfe_fck, CK_AM35XX),
3474 CLK("musb-am35x", "ick", &hsotgusb_ick_am35xx, CK_AM35XX), 3480 CLK("musb-am35x", "ick", &hsotgusb_ick_am35xx, CK_AM35XX),
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index c03c1108468e..fa6ea65ad44b 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -957,8 +957,8 @@ static struct dpll_data dpll_usb_dd = {
957 .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), 957 .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED),
958 .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_USB, 958 .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_USB,
959 .idlest_reg = OMAP4430_CM_IDLEST_DPLL_USB, 959 .idlest_reg = OMAP4430_CM_IDLEST_DPLL_USB,
960 .mult_mask = OMAP4430_DPLL_MULT_MASK, 960 .mult_mask = OMAP4430_DPLL_MULT_USB_MASK,
961 .div1_mask = OMAP4430_DPLL_DIV_MASK, 961 .div1_mask = OMAP4430_DPLL_DIV_0_7_MASK,
962 .enable_mask = OMAP4430_DPLL_EN_MASK, 962 .enable_mask = OMAP4430_DPLL_EN_MASK,
963 .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, 963 .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
964 .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, 964 .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
@@ -978,6 +978,7 @@ static struct clk dpll_usb_ck = {
978 .recalc = &omap3_dpll_recalc, 978 .recalc = &omap3_dpll_recalc,
979 .round_rate = &omap2_dpll_round_rate, 979 .round_rate = &omap2_dpll_round_rate,
980 .set_rate = &omap3_noncore_dpll_set_rate, 980 .set_rate = &omap3_noncore_dpll_set_rate,
981 .clkdm_name = "l3_init_clkdm",
981}; 982};
982 983
983static struct clk dpll_usb_clkdcoldo_ck = { 984static struct clk dpll_usb_clkdcoldo_ck = {
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 9299ac291d28..bd7ed13515cc 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -390,7 +390,7 @@ static struct clockdomain emu_sys_44xx_clkdm = {
390 .prcm_partition = OMAP4430_PRM_PARTITION, 390 .prcm_partition = OMAP4430_PRM_PARTITION,
391 .cm_inst = OMAP4430_PRM_EMU_CM_INST, 391 .cm_inst = OMAP4430_PRM_EMU_CM_INST,
392 .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS, 392 .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,
393 .flags = CLKDM_CAN_HWSUP, 393 .flags = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_FORCE_WAKEUP,
394}; 394};
395 395
396static struct clockdomain l3_dma_44xx_clkdm = { 396static struct clockdomain l3_dma_44xx_clkdm = {
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
index 5e5880d6d099..b6c77be3e8f7 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -19,15 +19,11 @@
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/smsc911x.h> 21#include <linux/smsc911x.h>
22#include <linux/regulator/fixed.h>
23#include <linux/regulator/machine.h>
24 22
25#include <plat/board.h> 23#include <plat/board.h>
26#include <plat/gpmc.h> 24#include <plat/gpmc.h>
27#include <plat/gpmc-smsc911x.h> 25#include <plat/gpmc-smsc911x.h>
28 26
29static struct omap_smsc911x_platform_data *gpmc_cfg;
30
31static struct resource gpmc_smsc911x_resources[] = { 27static struct resource gpmc_smsc911x_resources[] = {
32 [0] = { 28 [0] = {
33 .flags = IORESOURCE_MEM, 29 .flags = IORESOURCE_MEM,
@@ -41,51 +37,6 @@ static struct smsc911x_platform_config gpmc_smsc911x_config = {
41 .phy_interface = PHY_INTERFACE_MODE_MII, 37 .phy_interface = PHY_INTERFACE_MODE_MII,
42 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 38 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
43 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, 39 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
44 .flags = SMSC911X_USE_16BIT,
45};
46
47static struct regulator_consumer_supply gpmc_smsc911x_supply[] = {
48 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
49 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
50};
51
52/* Generic regulator definition to satisfy smsc911x */
53static struct regulator_init_data gpmc_smsc911x_reg_init_data = {
54 .constraints = {
55 .min_uV = 3300000,
56 .max_uV = 3300000,
57 .valid_modes_mask = REGULATOR_MODE_NORMAL
58 | REGULATOR_MODE_STANDBY,
59 .valid_ops_mask = REGULATOR_CHANGE_MODE
60 | REGULATOR_CHANGE_STATUS,
61 },
62 .num_consumer_supplies = ARRAY_SIZE(gpmc_smsc911x_supply),
63 .consumer_supplies = gpmc_smsc911x_supply,
64};
65
66static struct fixed_voltage_config gpmc_smsc911x_fixed_reg_data = {
67 .supply_name = "gpmc_smsc911x",
68 .microvolts = 3300000,
69 .gpio = -EINVAL,
70 .startup_delay = 0,
71 .enable_high = 0,
72 .enabled_at_boot = 1,
73 .init_data = &gpmc_smsc911x_reg_init_data,
74};
75
76/*
77 * Platform device id of 42 is a temporary fix to avoid conflicts
78 * with other reg-fixed-voltage devices. The real fix should
79 * involve the driver core providing a way of dynamically
80 * assigning a unique id on registration for platform devices
81 * in the same name space.
82 */
83static struct platform_device gpmc_smsc911x_regulator = {
84 .name = "reg-fixed-voltage",
85 .id = 42,
86 .dev = {
87 .platform_data = &gpmc_smsc911x_fixed_reg_data,
88 },
89}; 40};
90 41
91/* 42/*
@@ -93,23 +44,12 @@ static struct platform_device gpmc_smsc911x_regulator = {
93 * assume that pin multiplexing is done in the board-*.c file, 44 * assume that pin multiplexing is done in the board-*.c file,
94 * or in the bootloader. 45 * or in the bootloader.
95 */ 46 */
96void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data) 47void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *gpmc_cfg)
97{ 48{
98 struct platform_device *pdev; 49 struct platform_device *pdev;
99 unsigned long cs_mem_base; 50 unsigned long cs_mem_base;
100 int ret; 51 int ret;
101 52
102 gpmc_cfg = board_data;
103
104 if (!gpmc_cfg->id) {
105 ret = platform_device_register(&gpmc_smsc911x_regulator);
106 if (ret < 0) {
107 pr_err("Unable to register smsc911x regulators: %d\n",
108 ret);
109 return;
110 }
111 }
112
113 if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) { 53 if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
114 pr_err("Failed to request GPMC mem region\n"); 54 pr_err("Failed to request GPMC mem region\n");
115 return; 55 return;
@@ -139,8 +79,7 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
139 gpio_set_value(gpmc_cfg->gpio_reset, 1); 79 gpio_set_value(gpmc_cfg->gpio_reset, 1);
140 } 80 }
141 81
142 if (gpmc_cfg->flags) 82 gpmc_smsc911x_config.flags = gpmc_cfg->flags ? : SMSC911X_USE_16BIT;
143 gpmc_smsc911x_config.flags = gpmc_cfg->flags;
144 83
145 pdev = platform_device_register_resndata(NULL, "smsc911x", gpmc_cfg->id, 84 pdev = platform_device_register_resndata(NULL, "smsc911x", gpmc_cfg->id,
146 gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources), 85 gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources),
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 100db6217f39..b0268eaffe13 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -506,6 +506,13 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
506 if (oh->dev_attr != NULL) { 506 if (oh->dev_attr != NULL) {
507 mmc_dev_attr = oh->dev_attr; 507 mmc_dev_attr = oh->dev_attr;
508 mmc_data->controller_flags = mmc_dev_attr->flags; 508 mmc_data->controller_flags = mmc_dev_attr->flags;
509 /*
510 * erratum 2.1.1.128 doesn't apply if board has
511 * a transceiver is attached
512 */
513 if (hsmmcinfo->transceiver)
514 mmc_data->controller_flags &=
515 ~OMAP_HSMMC_BROKEN_MULTIBLOCK_READ;
509 } 516 }
510 517
511 pdev = platform_device_alloc(name, ctrl_nr - 1); 518 pdev = platform_device_alloc(name, ctrl_nr - 1);
diff --git a/arch/arm/mach-omap2/include/mach/barriers.h b/arch/arm/mach-omap2/include/mach/barriers.h
index 4fa72c7cc7cd..1c582a8592b9 100644
--- a/arch/arm/mach-omap2/include/mach/barriers.h
+++ b/arch/arm/mach-omap2/include/mach/barriers.h
@@ -22,6 +22,8 @@
22#ifndef __MACH_BARRIERS_H 22#ifndef __MACH_BARRIERS_H
23#define __MACH_BARRIERS_H 23#define __MACH_BARRIERS_H
24 24
25#include <asm/outercache.h>
26
25extern void omap_bus_sync(void); 27extern void omap_bus_sync(void);
26 28
27#define rmb() dsb() 29#define rmb() dsb()
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index eba6cd3816f5..7144ae651d3d 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1395,7 +1395,7 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1395 */ 1395 */
1396static int _ocp_softreset(struct omap_hwmod *oh) 1396static int _ocp_softreset(struct omap_hwmod *oh)
1397{ 1397{
1398 u32 v; 1398 u32 v, softrst_mask;
1399 int c = 0; 1399 int c = 0;
1400 int ret = 0; 1400 int ret = 0;
1401 1401
@@ -1422,16 +1422,21 @@ static int _ocp_softreset(struct omap_hwmod *oh)
1422 goto dis_opt_clks; 1422 goto dis_opt_clks;
1423 _write_sysconfig(v, oh); 1423 _write_sysconfig(v, oh);
1424 1424
1425 if (oh->class->sysc->srst_udelay)
1426 udelay(oh->class->sysc->srst_udelay);
1427
1425 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) 1428 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1426 omap_test_timeout((omap_hwmod_read(oh, 1429 omap_test_timeout((omap_hwmod_read(oh,
1427 oh->class->sysc->syss_offs) 1430 oh->class->sysc->syss_offs)
1428 & SYSS_RESETDONE_MASK), 1431 & SYSS_RESETDONE_MASK),
1429 MAX_MODULE_SOFTRESET_WAIT, c); 1432 MAX_MODULE_SOFTRESET_WAIT, c);
1430 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) 1433 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1434 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
1431 omap_test_timeout(!(omap_hwmod_read(oh, 1435 omap_test_timeout(!(omap_hwmod_read(oh,
1432 oh->class->sysc->sysc_offs) 1436 oh->class->sysc->sysc_offs)
1433 & SYSC_TYPE2_SOFTRESET_MASK), 1437 & softrst_mask),
1434 MAX_MODULE_SOFTRESET_WAIT, c); 1438 MAX_MODULE_SOFTRESET_WAIT, c);
1439 }
1435 1440
1436 if (c == MAX_MODULE_SOFTRESET_WAIT) 1441 if (c == MAX_MODULE_SOFTRESET_WAIT)
1437 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n", 1442 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
@@ -1477,6 +1482,11 @@ static int _reset(struct omap_hwmod *oh)
1477 1482
1478 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh); 1483 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1479 1484
1485 if (oh->class->sysc) {
1486 _update_sysc_cache(oh);
1487 _enable_sysc(oh);
1488 }
1489
1480 return ret; 1490 return ret;
1481} 1491}
1482 1492
@@ -1786,20 +1796,9 @@ static int _setup(struct omap_hwmod *oh, void *data)
1786 return 0; 1796 return 0;
1787 } 1797 }
1788 1798
1789 if (!(oh->flags & HWMOD_INIT_NO_RESET)) { 1799 if (!(oh->flags & HWMOD_INIT_NO_RESET))
1790 _reset(oh); 1800 _reset(oh);
1791 1801
1792 /*
1793 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
1794 * The _enable() function should be split to
1795 * avoid the rewrite of the OCP_SYSCONFIG register.
1796 */
1797 if (oh->class->sysc) {
1798 _update_sysc_cache(oh);
1799 _enable_sysc(oh);
1800 }
1801 }
1802
1803 postsetup_state = oh->_postsetup_state; 1802 postsetup_state = oh->_postsetup_state;
1804 if (postsetup_state == _HWMOD_STATE_UNKNOWN) 1803 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1805 postsetup_state = _HWMOD_STATE_ENABLED; 1804 postsetup_state = _HWMOD_STATE_ENABLED;
@@ -2463,26 +2462,28 @@ int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2463 * @oh: struct omap_hwmod * 2462 * @oh: struct omap_hwmod *
2464 * 2463 *
2465 * Sets the module OCP socket ENAWAKEUP bit to allow the module to 2464 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2466 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup 2465 * send wakeups to the PRCM, and enable I/O ring wakeup events for
2467 * registers to cause the PRCM to receive wakeup events from the 2466 * this IP block if it has dynamic mux entries. Eventually this
2468 * module. Does not set any wakeup routing registers beyond this 2467 * should set PRCM wakeup registers to cause the PRCM to receive
2469 * point - if the module is to wake up any other module or subsystem, 2468 * wakeup events from the module. Does not set any wakeup routing
2470 * that must be set separately. Called by omap_device code. Returns 2469 * registers beyond this point - if the module is to wake up any other
2471 * -EINVAL on error or 0 upon success. 2470 * module or subsystem, that must be set separately. Called by
2471 * omap_device code. Returns -EINVAL on error or 0 upon success.
2472 */ 2472 */
2473int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) 2473int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2474{ 2474{
2475 unsigned long flags; 2475 unsigned long flags;
2476 u32 v; 2476 u32 v;
2477 2477
2478 if (!oh->class->sysc ||
2479 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2480 return -EINVAL;
2481
2482 spin_lock_irqsave(&oh->_lock, flags); 2478 spin_lock_irqsave(&oh->_lock, flags);
2483 v = oh->_sysc_cache; 2479
2484 _enable_wakeup(oh, &v); 2480 if (oh->class->sysc &&
2485 _write_sysconfig(v, oh); 2481 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2482 v = oh->_sysc_cache;
2483 _enable_wakeup(oh, &v);
2484 _write_sysconfig(v, oh);
2485 }
2486
2486 _set_idle_ioring_wakeup(oh, true); 2487 _set_idle_ioring_wakeup(oh, true);
2487 spin_unlock_irqrestore(&oh->_lock, flags); 2488 spin_unlock_irqrestore(&oh->_lock, flags);
2488 2489
@@ -2494,26 +2495,28 @@ int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2494 * @oh: struct omap_hwmod * 2495 * @oh: struct omap_hwmod *
2495 * 2496 *
2496 * Clears the module OCP socket ENAWAKEUP bit to prevent the module 2497 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2497 * from sending wakeups to the PRCM. Eventually this should clear 2498 * from sending wakeups to the PRCM, and disable I/O ring wakeup
2498 * PRCM wakeup registers to cause the PRCM to ignore wakeup events 2499 * events for this IP block if it has dynamic mux entries. Eventually
2499 * from the module. Does not set any wakeup routing registers beyond 2500 * this should clear PRCM wakeup registers to cause the PRCM to ignore
2500 * this point - if the module is to wake up any other module or 2501 * wakeup events from the module. Does not set any wakeup routing
2501 * subsystem, that must be set separately. Called by omap_device 2502 * registers beyond this point - if the module is to wake up any other
2502 * code. Returns -EINVAL on error or 0 upon success. 2503 * module or subsystem, that must be set separately. Called by
2504 * omap_device code. Returns -EINVAL on error or 0 upon success.
2503 */ 2505 */
2504int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) 2506int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2505{ 2507{
2506 unsigned long flags; 2508 unsigned long flags;
2507 u32 v; 2509 u32 v;
2508 2510
2509 if (!oh->class->sysc ||
2510 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2511 return -EINVAL;
2512
2513 spin_lock_irqsave(&oh->_lock, flags); 2511 spin_lock_irqsave(&oh->_lock, flags);
2514 v = oh->_sysc_cache; 2512
2515 _disable_wakeup(oh, &v); 2513 if (oh->class->sysc &&
2516 _write_sysconfig(v, oh); 2514 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2515 v = oh->_sysc_cache;
2516 _disable_wakeup(oh, &v);
2517 _write_sysconfig(v, oh);
2518 }
2519
2517 _set_idle_ioring_wakeup(oh, false); 2520 _set_idle_ioring_wakeup(oh, false);
2518 spin_unlock_irqrestore(&oh->_lock, flags); 2521 spin_unlock_irqrestore(&oh->_lock, flags);
2519 2522
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a5409ce3f323..a6bde34e443a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -1000,7 +1000,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
1000 .flags = OMAP_FIREWALL_L4, 1000 .flags = OMAP_FIREWALL_L4,
1001 } 1001 }
1002 }, 1002 },
1003 .flags = OCPIF_SWSUP_IDLE,
1004 .user = OCP_USER_MPU | OCP_USER_SDMA, 1003 .user = OCP_USER_MPU | OCP_USER_SDMA,
1005}; 1004};
1006 1005
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index c4f56cb60d7d..04a3885f4475 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -1049,7 +1049,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1049 .slave = &omap2430_dss_venc_hwmod, 1049 .slave = &omap2430_dss_venc_hwmod,
1050 .clk = "dss_ick", 1050 .clk = "dss_ick",
1051 .addr = omap2_dss_venc_addrs, 1051 .addr = omap2_dss_venc_addrs,
1052 .flags = OCPIF_SWSUP_IDLE,
1053 .user = OCP_USER_MPU | OCP_USER_SDMA, 1052 .user = OCP_USER_MPU | OCP_USER_SDMA,
1054}; 1053};
1055 1054
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 34b9766d1d23..db86ce90c69f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1676,7 +1676,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
1676 .flags = OMAP_FIREWALL_L4, 1676 .flags = OMAP_FIREWALL_L4,
1677 } 1677 }
1678 }, 1678 },
1679 .flags = OCPIF_SWSUP_IDLE,
1680 .user = OCP_USER_MPU | OCP_USER_SDMA, 1679 .user = OCP_USER_MPU | OCP_USER_SDMA,
1681}; 1680};
1682 1681
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 08daa5e0eb5f..6abc75753e42 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2594,6 +2594,15 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
2594static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { 2594static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = {
2595 .rev_offs = 0x0000, 2595 .rev_offs = 0x0000,
2596 .sysc_offs = 0x0010, 2596 .sysc_offs = 0x0010,
2597 /*
2598 * ISS needs 100 OCP clk cycles delay after a softreset before
2599 * accessing sysconfig again.
2600 * The lowest frequency at the moment for L3 bus is 100 MHz, so
2601 * 1usec delay is needed. Add an x2 margin to be safe (2 usecs).
2602 *
2603 * TODO: Indicate errata when available.
2604 */
2605 .srst_udelay = 2,
2597 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS | 2606 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
2598 SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), 2607 SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
2599 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 2608 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
@@ -2996,6 +3005,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = {
2996 &omap44xx_l4_abe__mcbsp1_dma, 3005 &omap44xx_l4_abe__mcbsp1_dma,
2997}; 3006};
2998 3007
3008static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {
3009 { .role = "pad_fck", .clk = "pad_clks_ck" },
3010 { .role = "prcm_clk", .clk = "mcbsp1_sync_mux_ck" },
3011};
3012
2999static struct omap_hwmod omap44xx_mcbsp1_hwmod = { 3013static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
3000 .name = "mcbsp1", 3014 .name = "mcbsp1",
3001 .class = &omap44xx_mcbsp_hwmod_class, 3015 .class = &omap44xx_mcbsp_hwmod_class,
@@ -3012,6 +3026,8 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
3012 }, 3026 },
3013 .slaves = omap44xx_mcbsp1_slaves, 3027 .slaves = omap44xx_mcbsp1_slaves,
3014 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves), 3028 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves),
3029 .opt_clks = mcbsp1_opt_clks,
3030 .opt_clks_cnt = ARRAY_SIZE(mcbsp1_opt_clks),
3015}; 3031};
3016 3032
3017/* mcbsp2 */ 3033/* mcbsp2 */
@@ -3071,6 +3087,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = {
3071 &omap44xx_l4_abe__mcbsp2_dma, 3087 &omap44xx_l4_abe__mcbsp2_dma,
3072}; 3088};
3073 3089
3090static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {
3091 { .role = "pad_fck", .clk = "pad_clks_ck" },
3092 { .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" },
3093};
3094
3074static struct omap_hwmod omap44xx_mcbsp2_hwmod = { 3095static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
3075 .name = "mcbsp2", 3096 .name = "mcbsp2",
3076 .class = &omap44xx_mcbsp_hwmod_class, 3097 .class = &omap44xx_mcbsp_hwmod_class,
@@ -3087,6 +3108,8 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
3087 }, 3108 },
3088 .slaves = omap44xx_mcbsp2_slaves, 3109 .slaves = omap44xx_mcbsp2_slaves,
3089 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves), 3110 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves),
3111 .opt_clks = mcbsp2_opt_clks,
3112 .opt_clks_cnt = ARRAY_SIZE(mcbsp2_opt_clks),
3090}; 3113};
3091 3114
3092/* mcbsp3 */ 3115/* mcbsp3 */
@@ -3146,6 +3169,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = {
3146 &omap44xx_l4_abe__mcbsp3_dma, 3169 &omap44xx_l4_abe__mcbsp3_dma,
3147}; 3170};
3148 3171
3172static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {
3173 { .role = "pad_fck", .clk = "pad_clks_ck" },
3174 { .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" },
3175};
3176
3149static struct omap_hwmod omap44xx_mcbsp3_hwmod = { 3177static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
3150 .name = "mcbsp3", 3178 .name = "mcbsp3",
3151 .class = &omap44xx_mcbsp_hwmod_class, 3179 .class = &omap44xx_mcbsp_hwmod_class,
@@ -3162,6 +3190,8 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
3162 }, 3190 },
3163 .slaves = omap44xx_mcbsp3_slaves, 3191 .slaves = omap44xx_mcbsp3_slaves,
3164 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves), 3192 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves),
3193 .opt_clks = mcbsp3_opt_clks,
3194 .opt_clks_cnt = ARRAY_SIZE(mcbsp3_opt_clks),
3165}; 3195};
3166 3196
3167/* mcbsp4 */ 3197/* mcbsp4 */
@@ -3200,6 +3230,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = {
3200 &omap44xx_l4_per__mcbsp4, 3230 &omap44xx_l4_per__mcbsp4,
3201}; 3231};
3202 3232
3233static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {
3234 { .role = "pad_fck", .clk = "pad_clks_ck" },
3235 { .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" },
3236};
3237
3203static struct omap_hwmod omap44xx_mcbsp4_hwmod = { 3238static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
3204 .name = "mcbsp4", 3239 .name = "mcbsp4",
3205 .class = &omap44xx_mcbsp_hwmod_class, 3240 .class = &omap44xx_mcbsp_hwmod_class,
@@ -3216,6 +3251,8 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
3216 }, 3251 },
3217 .slaves = omap44xx_mcbsp4_slaves, 3252 .slaves = omap44xx_mcbsp4_slaves,
3218 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves), 3253 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves),
3254 .opt_clks = mcbsp4_opt_clks,
3255 .opt_clks_cnt = ARRAY_SIZE(mcbsp4_opt_clks),
3219}; 3256};
3220 3257
3221/* 3258/*
diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c
index 9262a6b47702..de6d46451746 100644
--- a/arch/arm/mach-omap2/opp.c
+++ b/arch/arm/mach-omap2/opp.c
@@ -64,10 +64,10 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def,
64 } 64 }
65 oh = omap_hwmod_lookup(opp_def->hwmod_name); 65 oh = omap_hwmod_lookup(opp_def->hwmod_name);
66 if (!oh || !oh->od) { 66 if (!oh || !oh->od) {
67 pr_warn("%s: no hwmod or odev for %s, [%d] " 67 pr_debug("%s: no hwmod or odev for %s, [%d] "
68 "cannot add OPPs.\n", __func__, 68 "cannot add OPPs.\n", __func__,
69 opp_def->hwmod_name, i); 69 opp_def->hwmod_name, i);
70 return -EINVAL; 70 continue;
71 } 71 }
72 dev = &oh->od->pdev->dev; 72 dev = &oh->od->pdev->dev;
73 73
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 238defc6f6df..703bd1099259 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -153,8 +153,7 @@ static void omap3_save_secure_ram_context(void)
153 pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state); 153 pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
154 /* Following is for error tracking, it should not happen */ 154 /* Following is for error tracking, it should not happen */
155 if (ret) { 155 if (ret) {
156 printk(KERN_ERR "save_secure_sram() returns %08x\n", 156 pr_err("save_secure_sram() returns %08x\n", ret);
157 ret);
158 while (1) 157 while (1)
159 ; 158 ;
160 } 159 }
@@ -289,7 +288,7 @@ void omap_sram_idle(void)
289 break; 288 break;
290 default: 289 default:
291 /* Invalid state */ 290 /* Invalid state */
292 printk(KERN_ERR "Invalid mpu state in sram_idle\n"); 291 pr_err("Invalid mpu state in sram_idle\n");
293 return; 292 return;
294 } 293 }
295 294
@@ -439,18 +438,17 @@ restore:
439 list_for_each_entry(pwrst, &pwrst_list, node) { 438 list_for_each_entry(pwrst, &pwrst_list, node) {
440 state = pwrdm_read_prev_pwrst(pwrst->pwrdm); 439 state = pwrdm_read_prev_pwrst(pwrst->pwrdm);
441 if (state > pwrst->next_state) { 440 if (state > pwrst->next_state) {
442 printk(KERN_INFO "Powerdomain (%s) didn't enter " 441 pr_info("Powerdomain (%s) didn't enter "
443 "target state %d\n", 442 "target state %d\n",
444 pwrst->pwrdm->name, pwrst->next_state); 443 pwrst->pwrdm->name, pwrst->next_state);
445 ret = -1; 444 ret = -1;
446 } 445 }
447 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); 446 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state);
448 } 447 }
449 if (ret) 448 if (ret)
450 printk(KERN_ERR "Could not enter target state in pm_suspend\n"); 449 pr_err("Could not enter target state in pm_suspend\n");
451 else 450 else
452 printk(KERN_INFO "Successfully put all powerdomains " 451 pr_info("Successfully put all powerdomains to target state\n");
453 "to target state\n");
454 452
455 return ret; 453 return ret;
456} 454}
@@ -734,21 +732,22 @@ static int __init omap3_pm_init(void)
734 732
735 if (ret) { 733 if (ret) {
736 pr_err("pm: Failed to request pm_io irq\n"); 734 pr_err("pm: Failed to request pm_io irq\n");
737 goto err1; 735 goto err2;
738 } 736 }
739 737
740 ret = pwrdm_for_each(pwrdms_setup, NULL); 738 ret = pwrdm_for_each(pwrdms_setup, NULL);
741 if (ret) { 739 if (ret) {
742 printk(KERN_ERR "Failed to setup powerdomains\n"); 740 pr_err("Failed to setup powerdomains\n");
743 goto err2; 741 goto err3;
744 } 742 }
745 743
746 (void) clkdm_for_each(omap_pm_clkdms_setup, NULL); 744 (void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
747 745
748 mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); 746 mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
749 if (mpu_pwrdm == NULL) { 747 if (mpu_pwrdm == NULL) {
750 printk(KERN_ERR "Failed to get mpu_pwrdm\n"); 748 pr_err("Failed to get mpu_pwrdm\n");
751 goto err2; 749 ret = -EINVAL;
750 goto err3;
752 } 751 }
753 752
754 neon_pwrdm = pwrdm_lookup("neon_pwrdm"); 753 neon_pwrdm = pwrdm_lookup("neon_pwrdm");
@@ -781,8 +780,8 @@ static int __init omap3_pm_init(void)
781 omap3_secure_ram_storage = 780 omap3_secure_ram_storage =
782 kmalloc(0x803F, GFP_KERNEL); 781 kmalloc(0x803F, GFP_KERNEL);
783 if (!omap3_secure_ram_storage) 782 if (!omap3_secure_ram_storage)
784 printk(KERN_ERR "Memory allocation failed when" 783 pr_err("Memory allocation failed when "
785 "allocating for secure sram context\n"); 784 "allocating for secure sram context\n");
786 785
787 local_irq_disable(); 786 local_irq_disable();
788 local_fiq_disable(); 787 local_fiq_disable();
@@ -796,14 +795,17 @@ static int __init omap3_pm_init(void)
796 } 795 }
797 796
798 omap3_save_scratchpad_contents(); 797 omap3_save_scratchpad_contents();
799err1:
800 return ret; 798 return ret;
801err2: 799
802 free_irq(INT_34XX_PRCM_MPU_IRQ, NULL); 800err3:
803 list_for_each_entry_safe(pwrst, tmp, &pwrst_list, node) { 801 list_for_each_entry_safe(pwrst, tmp, &pwrst_list, node) {
804 list_del(&pwrst->node); 802 list_del(&pwrst->node);
805 kfree(pwrst); 803 kfree(pwrst);
806 } 804 }
805 free_irq(omap_prcm_event_to_irq("io"), omap3_pm_init);
806err2:
807 free_irq(omap_prcm_event_to_irq("wkup"), NULL);
808err1:
807 return ret; 809 return ret;
808} 810}
809 811
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 9ccaadc2cf07..885625352429 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -144,7 +144,7 @@ static void omap_default_idle(void)
144static int __init omap4_pm_init(void) 144static int __init omap4_pm_init(void)
145{ 145{
146 int ret; 146 int ret;
147 struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm; 147 struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm, *l4wkup;
148 struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm; 148 struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm;
149 149
150 if (!cpu_is_omap44xx()) 150 if (!cpu_is_omap44xx())
@@ -168,14 +168,19 @@ static int __init omap4_pm_init(void)
168 * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as 168 * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as
169 * expected. The hardware recommendation is to enable static 169 * expected. The hardware recommendation is to enable static
170 * dependencies for these to avoid system lock ups or random crashes. 170 * dependencies for these to avoid system lock ups or random crashes.
171 * The L4 wakeup depedency is added to workaround the OCP sync hardware
172 * BUG with 32K synctimer which lead to incorrect timer value read
173 * from the 32K counter. The BUG applies for GPTIMER1 and WDT2 which
174 * are part of L4 wakeup clockdomain.
171 */ 175 */
172 mpuss_clkdm = clkdm_lookup("mpuss_clkdm"); 176 mpuss_clkdm = clkdm_lookup("mpuss_clkdm");
173 emif_clkdm = clkdm_lookup("l3_emif_clkdm"); 177 emif_clkdm = clkdm_lookup("l3_emif_clkdm");
174 l3_1_clkdm = clkdm_lookup("l3_1_clkdm"); 178 l3_1_clkdm = clkdm_lookup("l3_1_clkdm");
175 l3_2_clkdm = clkdm_lookup("l3_2_clkdm"); 179 l3_2_clkdm = clkdm_lookup("l3_2_clkdm");
176 l4_per_clkdm = clkdm_lookup("l4_per_clkdm"); 180 l4_per_clkdm = clkdm_lookup("l4_per_clkdm");
181 l4wkup = clkdm_lookup("l4_wkup_clkdm");
177 ducati_clkdm = clkdm_lookup("ducati_clkdm"); 182 ducati_clkdm = clkdm_lookup("ducati_clkdm");
178 if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) || 183 if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) || (!l4wkup) ||
179 (!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm)) 184 (!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm))
180 goto err2; 185 goto err2;
181 186
@@ -183,6 +188,7 @@ static int __init omap4_pm_init(void)
183 ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm); 188 ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm);
184 ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm); 189 ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm);
185 ret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm); 190 ret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm);
191 ret |= clkdm_add_wkdep(mpuss_clkdm, l4wkup);
186 ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm); 192 ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm);
187 ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm); 193 ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm);
188 if (ret) { 194 if (ret) {
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 8a18d1bd61c8..96ad3dbeac34 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -972,7 +972,13 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm)
972 972
973int pwrdm_state_switch(struct powerdomain *pwrdm) 973int pwrdm_state_switch(struct powerdomain *pwrdm)
974{ 974{
975 return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW); 975 int ret;
976
977 ret = pwrdm_wait_transition(pwrdm);
978 if (!ret)
979 ret = _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
980
981 return ret;
976} 982}
977 983
978int pwrdm_clkdm_state_switch(struct clockdomain *clkdm) 984int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index eac623c7c3d8..f106d21ff581 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -147,8 +147,9 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
147 u32 mask, st; 147 u32 mask, st;
148 148
149 /* XXX read mask from RAM? */ 149 /* XXX read mask from RAM? */
150 mask = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqen_offs); 150 mask = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
151 st = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqst_offs); 151 irqen_offs);
152 st = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, irqst_offs);
152 153
153 return mask & st; 154 return mask & st;
154} 155}
@@ -180,7 +181,7 @@ void omap44xx_prm_read_pending_irqs(unsigned long *events)
180 */ 181 */
181void omap44xx_prm_ocp_barrier(void) 182void omap44xx_prm_ocp_barrier(void)
182{ 183{
183 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, 184 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
184 OMAP4_REVISION_PRM_OFFSET); 185 OMAP4_REVISION_PRM_OFFSET);
185} 186}
186 187
@@ -198,19 +199,19 @@ void omap44xx_prm_ocp_barrier(void)
198void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask) 199void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
199{ 200{
200 saved_mask[0] = 201 saved_mask[0] =
201 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, 202 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
202 OMAP4_PRM_IRQSTATUS_MPU_OFFSET); 203 OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
203 saved_mask[1] = 204 saved_mask[1] =
204 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, 205 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
205 OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET); 206 OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);
206 207
207 omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST, 208 omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
208 OMAP4_PRM_IRQENABLE_MPU_OFFSET); 209 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
209 omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST, 210 omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
210 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); 211 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
211 212
212 /* OCP barrier */ 213 /* OCP barrier */
213 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, 214 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
214 OMAP4_REVISION_PRM_OFFSET); 215 OMAP4_REVISION_PRM_OFFSET);
215} 216}
216 217
@@ -226,9 +227,9 @@ void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
226 */ 227 */
227void omap44xx_prm_restore_irqen(u32 *saved_mask) 228void omap44xx_prm_restore_irqen(u32 *saved_mask)
228{ 229{
229 omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_DEVICE_INST, 230 omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST,
230 OMAP4_PRM_IRQENABLE_MPU_OFFSET); 231 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
231 omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_DEVICE_INST, 232 omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_OCP_SOCKET_INST,
232 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); 233 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
233} 234}
234 235
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 873b51d494ea..d28f848897d6 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -290,7 +290,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
290 goto err; 290 goto err;
291 } 291 }
292 292
293 for (i = 0; i <= irq_setup->nr_regs; i++) { 293 for (i = 0; i < irq_setup->nr_regs; i++) {
294 gc = irq_alloc_generic_chip("PRCM", 1, 294 gc = irq_alloc_generic_chip("PRCM", 1,
295 irq_setup->base_irq + i * 32, prm_base, 295 irq_setup->base_irq + i * 32, prm_base,
296 handle_level_irq); 296 handle_level_irq);
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 0cdd359a128e..9fc2f44188cb 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -108,8 +108,14 @@ static void omap_uart_set_noidle(struct platform_device *pdev)
108static void omap_uart_set_smartidle(struct platform_device *pdev) 108static void omap_uart_set_smartidle(struct platform_device *pdev)
109{ 109{
110 struct omap_device *od = to_omap_device(pdev); 110 struct omap_device *od = to_omap_device(pdev);
111 u8 idlemode;
111 112
112 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART); 113 if (od->hwmods[0]->class->sysc->idlemodes & SIDLE_SMART_WKUP)
114 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
115 else
116 idlemode = HWMOD_IDLEMODE_SMART;
117
118 omap_hwmod_set_slave_idlemode(od->hwmods[0], idlemode);
113} 119}
114 120
115#else 121#else
@@ -120,124 +126,8 @@ static void omap_uart_set_smartidle(struct platform_device *pdev) {}
120#endif /* CONFIG_PM */ 126#endif /* CONFIG_PM */
121 127
122#ifdef CONFIG_OMAP_MUX 128#ifdef CONFIG_OMAP_MUX
123static struct omap_device_pad default_uart1_pads[] __initdata = {
124 {
125 .name = "uart1_cts.uart1_cts",
126 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
127 },
128 {
129 .name = "uart1_rts.uart1_rts",
130 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
131 },
132 {
133 .name = "uart1_tx.uart1_tx",
134 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
135 },
136 {
137 .name = "uart1_rx.uart1_rx",
138 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
139 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
140 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
141 },
142};
143
144static struct omap_device_pad default_uart2_pads[] __initdata = {
145 {
146 .name = "uart2_cts.uart2_cts",
147 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
148 },
149 {
150 .name = "uart2_rts.uart2_rts",
151 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
152 },
153 {
154 .name = "uart2_tx.uart2_tx",
155 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
156 },
157 {
158 .name = "uart2_rx.uart2_rx",
159 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
160 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
161 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
162 },
163};
164
165static struct omap_device_pad default_uart3_pads[] __initdata = {
166 {
167 .name = "uart3_cts_rctx.uart3_cts_rctx",
168 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
169 },
170 {
171 .name = "uart3_rts_sd.uart3_rts_sd",
172 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
173 },
174 {
175 .name = "uart3_tx_irtx.uart3_tx_irtx",
176 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
177 },
178 {
179 .name = "uart3_rx_irrx.uart3_rx_irrx",
180 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
181 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
182 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
183 },
184};
185
186static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = {
187 {
188 .name = "gpmc_wait2.uart4_tx",
189 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
190 },
191 {
192 .name = "gpmc_wait3.uart4_rx",
193 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
194 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
195 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
196 },
197};
198
199static struct omap_device_pad default_omap4_uart4_pads[] __initdata = {
200 {
201 .name = "uart4_tx.uart4_tx",
202 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
203 },
204 {
205 .name = "uart4_rx.uart4_rx",
206 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
207 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
208 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
209 },
210};
211
212static void omap_serial_fill_default_pads(struct omap_board_data *bdata) 129static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
213{ 130{
214 switch (bdata->id) {
215 case 0:
216 bdata->pads = default_uart1_pads;
217 bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads);
218 break;
219 case 1:
220 bdata->pads = default_uart2_pads;
221 bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads);
222 break;
223 case 2:
224 bdata->pads = default_uart3_pads;
225 bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads);
226 break;
227 case 3:
228 if (cpu_is_omap44xx()) {
229 bdata->pads = default_omap4_uart4_pads;
230 bdata->pads_cnt =
231 ARRAY_SIZE(default_omap4_uart4_pads);
232 } else if (cpu_is_omap3630()) {
233 bdata->pads = default_omap36xx_uart4_pads;
234 bdata->pads_cnt =
235 ARRAY_SIZE(default_omap36xx_uart4_pads);
236 }
237 break;
238 default:
239 break;
240 }
241} 131}
242#else 132#else
243static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {} 133static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 4b57757bf9d1..7a7b89304c48 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -37,6 +37,16 @@ static struct i2c_board_info __initdata pmic_i2c_board_info = {
37 .flags = I2C_CLIENT_WAKE, 37 .flags = I2C_CLIENT_WAKE,
38}; 38};
39 39
40static struct i2c_board_info __initdata omap4_i2c1_board_info[] = {
41 {
42 .addr = 0x48,
43 .flags = I2C_CLIENT_WAKE,
44 },
45 {
46 I2C_BOARD_INFO("twl6040", 0x4b),
47 },
48};
49
40void __init omap_pmic_init(int bus, u32 clkrate, 50void __init omap_pmic_init(int bus, u32 clkrate,
41 const char *pmic_type, int pmic_irq, 51 const char *pmic_type, int pmic_irq,
42 struct twl4030_platform_data *pmic_data) 52 struct twl4030_platform_data *pmic_data)
@@ -49,14 +59,31 @@ void __init omap_pmic_init(int bus, u32 clkrate,
49 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); 59 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
50} 60}
51 61
62void __init omap4_pmic_init(const char *pmic_type,
63 struct twl4030_platform_data *pmic_data,
64 struct twl6040_platform_data *twl6040_data, int twl6040_irq)
65{
66 /* PMIC part*/
67 strncpy(omap4_i2c1_board_info[0].type, pmic_type,
68 sizeof(omap4_i2c1_board_info[0].type));
69 omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N;
70 omap4_i2c1_board_info[0].platform_data = pmic_data;
71
72 /* TWL6040 audio IC part */
73 omap4_i2c1_board_info[1].irq = twl6040_irq;
74 omap4_i2c1_board_info[1].platform_data = twl6040_data;
75
76 omap_register_i2c_bus(1, 400, omap4_i2c1_board_info, 2);
77
78}
79
52void __init omap_pmic_late_init(void) 80void __init omap_pmic_late_init(void)
53{ 81{
54 /* Init the OMAP TWL parameters (if PMIC has been registerd) */ 82 /* Init the OMAP TWL parameters (if PMIC has been registerd) */
55 if (!pmic_i2c_board_info.irq) 83 if (pmic_i2c_board_info.irq)
56 return; 84 omap3_twl_init();
57 85 if (omap4_i2c1_board_info[0].irq)
58 omap3_twl_init(); 86 omap4_twl_init();
59 omap4_twl_init();
60} 87}
61 88
62#if defined(CONFIG_ARCH_OMAP3) 89#if defined(CONFIG_ARCH_OMAP3)
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index 275dde8cb27a..09627483a57f 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -29,6 +29,7 @@
29 29
30 30
31struct twl4030_platform_data; 31struct twl4030_platform_data;
32struct twl6040_platform_data;
32 33
33void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, 34void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
34 struct twl4030_platform_data *pmic_data); 35 struct twl4030_platform_data *pmic_data);
@@ -46,12 +47,9 @@ static inline void omap3_pmic_init(const char *pmic_type,
46 omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); 47 omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data);
47} 48}
48 49
49static inline void omap4_pmic_init(const char *pmic_type, 50void omap4_pmic_init(const char *pmic_type,
50 struct twl4030_platform_data *pmic_data) 51 struct twl4030_platform_data *pmic_data,
51{ 52 struct twl6040_platform_data *audio_data, int twl6040_irq);
52 /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */
53 omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
54}
55 53
56void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, 54void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
57 u32 pdata_flags, u32 regulators_flags); 55 u32 pdata_flags, u32 regulators_flags);
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index f51348dafafd..dde8a11f47d5 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -54,7 +54,7 @@ static struct omap_device_pm_latency omap_uhhtll_latency[] = {
54/* 54/*
55 * setup_ehci_io_mux - initialize IO pad mux for USBHOST 55 * setup_ehci_io_mux - initialize IO pad mux for USBHOST
56 */ 56 */
57static void setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode) 57static void __init setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
58{ 58{
59 switch (port_mode[0]) { 59 switch (port_mode[0]) {
60 case OMAP_EHCI_PORT_MODE_PHY: 60 case OMAP_EHCI_PORT_MODE_PHY:
@@ -197,7 +197,8 @@ static void setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
197 return; 197 return;
198} 198}
199 199
200static void setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode) 200static
201void __init setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
201{ 202{
202 switch (port_mode[0]) { 203 switch (port_mode[0]) {
203 case OMAP_EHCI_PORT_MODE_PHY: 204 case OMAP_EHCI_PORT_MODE_PHY:
@@ -315,7 +316,7 @@ static void setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
315 } 316 }
316} 317}
317 318
318static void setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) 319static void __init setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
319{ 320{
320 switch (port_mode[0]) { 321 switch (port_mode[0]) {
321 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: 322 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
@@ -412,7 +413,8 @@ static void setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
412 } 413 }
413} 414}
414 415
415static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) 416static
417void __init setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
416{ 418{
417 switch (port_mode[0]) { 419 switch (port_mode[0]) {
418 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: 420 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 109ccd2a8885..fe2d1f80ef50 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -113,6 +113,7 @@ config MACH_ARMCORE
113 select IWMMXT 113 select IWMMXT
114 select PXA25x 114 select PXA25x
115 select MIGHT_HAVE_PCI 115 select MIGHT_HAVE_PCI
116 select NEED_MACH_IO_H if PCI
116 117
117config MACH_EM_X270 118config MACH_EM_X270
118 bool "CompuLab EM-x270 platform" 119 bool "CompuLab EM-x270 platform"
diff --git a/arch/arm/mach-pxa/include/mach/io.h b/arch/arm/mach-pxa/include/mach/io.h
new file mode 100644
index 000000000000..cd78b7fe3567
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/io.h
@@ -0,0 +1,17 @@
1/*
2 * arch/arm/mach-pxa/include/mach/io.h
3 *
4 * Copied from asm/arch/sa1100/io.h
5 */
6#ifndef __ASM_ARM_ARCH_IO_H
7#define __ASM_ARM_ARCH_IO_H
8
9#define IO_SPACE_LIMIT 0xffffffff
10
11/*
12 * We don't actually have real ISA nor PCI buses, but there is so many
13 * drivers out there that might just work if we fake them...
14 */
15#define __io(a) __typesafe_io(a)
16
17#endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
index c54cef25895c..cbf51ae81855 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
@@ -17,6 +17,7 @@
17 * 17 *
18 * bit 23 - Input/Output (PXA2xx specific) 18 * bit 23 - Input/Output (PXA2xx specific)
19 * bit 24 - Wakeup Enable(PXA2xx specific) 19 * bit 24 - Wakeup Enable(PXA2xx specific)
20 * bit 25 - Keep Output (PXA2xx specific)
20 */ 21 */
21 22
22#define MFP_DIR_IN (0x0 << 23) 23#define MFP_DIR_IN (0x0 << 23)
@@ -25,6 +26,12 @@
25#define MFP_DIR(x) (((x) >> 23) & 0x1) 26#define MFP_DIR(x) (((x) >> 23) & 0x1)
26 27
27#define MFP_LPM_CAN_WAKEUP (0x1 << 24) 28#define MFP_LPM_CAN_WAKEUP (0x1 << 24)
29
30/*
31 * MFP_LPM_KEEP_OUTPUT must be specified for pins that need to
32 * retain their last output level (low or high).
33 * Note: MFP_LPM_KEEP_OUTPUT has no effect on pins configured for input.
34 */
28#define MFP_LPM_KEEP_OUTPUT (0x1 << 25) 35#define MFP_LPM_KEEP_OUTPUT (0x1 << 25)
29 36
30#define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE) 37#define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE)
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index b0a842887780..ef0426a159d4 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -33,6 +33,8 @@
33#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 33#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
34#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5)) 34#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
35#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c) 35#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
36#define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18)
37#define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24)
36 38
37#define PWER_WE35 (1 << 24) 39#define PWER_WE35 (1 << 24)
38 40
@@ -348,6 +350,7 @@ static inline void pxa27x_mfp_init(void) {}
348#ifdef CONFIG_PM 350#ifdef CONFIG_PM
349static unsigned long saved_gafr[2][4]; 351static unsigned long saved_gafr[2][4];
350static unsigned long saved_gpdr[4]; 352static unsigned long saved_gpdr[4];
353static unsigned long saved_gplr[4];
351static unsigned long saved_pgsr[4]; 354static unsigned long saved_pgsr[4];
352 355
353static int pxa2xx_mfp_suspend(void) 356static int pxa2xx_mfp_suspend(void)
@@ -366,14 +369,26 @@ static int pxa2xx_mfp_suspend(void)
366 } 369 }
367 370
368 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { 371 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
369
370 saved_gafr[0][i] = GAFR_L(i); 372 saved_gafr[0][i] = GAFR_L(i);
371 saved_gafr[1][i] = GAFR_U(i); 373 saved_gafr[1][i] = GAFR_U(i);
372 saved_gpdr[i] = GPDR(i * 32); 374 saved_gpdr[i] = GPDR(i * 32);
375 saved_gplr[i] = GPLR(i * 32);
373 saved_pgsr[i] = PGSR(i); 376 saved_pgsr[i] = PGSR(i);
374 377
375 GPDR(i * 32) = gpdr_lpm[i]; 378 GPSR(i * 32) = PGSR(i);
379 GPCR(i * 32) = ~PGSR(i);
380 }
381
382 /* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */
383 for (i = 0; i < pxa_last_gpio; i++) {
384 if ((gpdr_lpm[gpio_to_bank(i)] & GPIO_bit(i)) ||
385 ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
386 (saved_gpdr[gpio_to_bank(i)] & GPIO_bit(i))))
387 GPDR(i) |= GPIO_bit(i);
388 else
389 GPDR(i) &= ~GPIO_bit(i);
376 } 390 }
391
377 return 0; 392 return 0;
378} 393}
379 394
@@ -384,6 +399,8 @@ static void pxa2xx_mfp_resume(void)
384 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { 399 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
385 GAFR_L(i) = saved_gafr[0][i]; 400 GAFR_L(i) = saved_gafr[0][i];
386 GAFR_U(i) = saved_gafr[1][i]; 401 GAFR_U(i) = saved_gafr[1][i];
402 GPSR(i * 32) = saved_gplr[i];
403 GPCR(i * 32) = ~saved_gplr[i];
387 GPDR(i * 32) = saved_gpdr[i]; 404 GPDR(i * 32) = saved_gpdr[i];
388 PGSR(i) = saved_pgsr[i]; 405 PGSR(i) = saved_pgsr[i];
389 } 406 }
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 6bce78edce7a..4726c246dcdc 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -421,8 +421,11 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
421 pxa_register_device(&pxa27x_device_i2c_power, info); 421 pxa_register_device(&pxa27x_device_i2c_power, info);
422} 422}
423 423
424static struct pxa_gpio_platform_data pxa27x_gpio_info __initdata = {
425 .gpio_set_wake = gpio_set_wake,
426};
427
424static struct platform_device *devices[] __initdata = { 428static struct platform_device *devices[] __initdata = {
425 &pxa_device_gpio,
426 &pxa27x_device_udc, 429 &pxa27x_device_udc,
427 &pxa_device_pmu, 430 &pxa_device_pmu,
428 &pxa_device_i2s, 431 &pxa_device_i2s,
@@ -458,6 +461,7 @@ static int __init pxa27x_init(void)
458 register_syscore_ops(&pxa2xx_mfp_syscore_ops); 461 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
459 register_syscore_ops(&pxa2xx_clock_syscore_ops); 462 register_syscore_ops(&pxa2xx_clock_syscore_ops);
460 463
464 pxa_register_device(&pxa_device_gpio, &pxa27x_gpio_info);
461 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 465 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
462 } 466 }
463 467
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 0f3a327ebcaa..b34287ab5afd 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -111,10 +111,6 @@ config S3C24XX_SETUP_TS
111 help 111 help
112 Compile in platform device definition for Samsung TouchScreen. 112 Compile in platform device definition for Samsung TouchScreen.
113 113
114# cpu-specific sections
115
116if CPU_S3C2410
117
118config S3C2410_DMA 114config S3C2410_DMA
119 bool 115 bool
120 depends on S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442) 116 depends on S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442)
@@ -127,6 +123,10 @@ config S3C2410_PM
127 help 123 help
128 Power Management code common to S3C2410 and better 124 Power Management code common to S3C2410 and better
129 125
126# cpu-specific sections
127
128if CPU_S3C2410
129
130config S3C24XX_SIMTEC_NOR 130config S3C24XX_SIMTEC_NOR
131 bool 131 bool
132 help 132 help
diff --git a/arch/arm/mach-s3c24xx/common.h b/arch/arm/mach-s3c24xx/common.h
new file mode 100644
index 000000000000..c2f596e7bc2d
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/common.h
@@ -0,0 +1,18 @@
1/*
2 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for S3C24XX SoCs
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H
13#define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__
14
15void s3c2410_restart(char mode, const char *cmd);
16void s3c244x_restart(char mode, const char *cmd);
17
18#endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c
index 86ce62f66190..b8337e248b09 100644
--- a/arch/arm/mach-s5pv210/dma.c
+++ b/arch/arm/mach-s5pv210/dma.c
@@ -33,8 +33,6 @@
33#include <mach/irqs.h> 33#include <mach/irqs.h>
34#include <mach/dma.h> 34#include <mach/dma.h>
35 35
36static u64 dma_dmamask = DMA_BIT_MASK(32);
37
38static u8 pdma0_peri[] = { 36static u8 pdma0_peri[] = {
39 DMACH_UART0_RX, 37 DMACH_UART0_RX,
40 DMACH_UART0_TX, 38 DMACH_UART0_TX,
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index a9ea64e0da0d..48d018f2332b 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -484,8 +484,8 @@ static struct wm8994_pdata wm8994_platform_data = {
484 .gpio_defaults[8] = 0x0100, 484 .gpio_defaults[8] = 0x0100,
485 .gpio_defaults[9] = 0x0100, 485 .gpio_defaults[9] = 0x0100,
486 .gpio_defaults[10] = 0x0100, 486 .gpio_defaults[10] = 0x0100,
487 .ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */ 487 .ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
488 .ldo[1] = { 0, NULL, &wm8994_ldo2_data }, 488 .ldo[1] = { 0, &wm8994_ldo2_data },
489}; 489};
490 490
491/* GPIO I2C PMIC */ 491/* GPIO I2C PMIC */
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 2cf5ed75f390..32395664e879 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -25,6 +25,7 @@
25#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
26#include <linux/input.h> 26#include <linux/input.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/mmc/host.h>
28#include <linux/interrupt.h> 29#include <linux/interrupt.h>
29 30
30#include <asm/hardware/vic.h> 31#include <asm/hardware/vic.h>
@@ -674,8 +675,8 @@ static struct wm8994_pdata wm8994_platform_data = {
674 .gpio_defaults[8] = 0x0100, 675 .gpio_defaults[8] = 0x0100,
675 .gpio_defaults[9] = 0x0100, 676 .gpio_defaults[9] = 0x0100,
676 .gpio_defaults[10] = 0x0100, 677 .gpio_defaults[10] = 0x0100,
677 .ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */ 678 .ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
678 .ldo[1] = { 0, NULL, &wm8994_ldo2_data }, 679 .ldo[1] = { 0, &wm8994_ldo2_data },
679}; 680};
680 681
681/* GPIO I2C PMIC */ 682/* GPIO I2C PMIC */
@@ -765,6 +766,7 @@ static void __init goni_pmic_init(void)
765/* MoviNAND */ 766/* MoviNAND */
766static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = { 767static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
767 .max_width = 4, 768 .max_width = 4,
769 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
768 .cd_type = S3C_SDHCI_CD_PERMANENT, 770 .cd_type = S3C_SDHCI_CD_PERMANENT,
769}; 771};
770 772
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 48885b7efd6b..c7f418b0cde9 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -313,6 +313,10 @@ static struct sa1100fb_mach_info collie_lcd_info = {
313 313
314 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, 314 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
315 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2), 315 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
316
317#ifdef CONFIG_BACKLIGHT_LOCOMO
318 .lcd_power = locomolcd_power
319#endif
316}; 320};
317 321
318static void __init collie_init(void) 322static void __init collie_init(void)
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 7c524b4e415d..16be4c56abe3 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -306,7 +306,7 @@ void sa11x0_register_irda(struct irda_platform_data *irda)
306} 306}
307 307
308static struct resource sa1100_rtc_resources[] = { 308static struct resource sa1100_rtc_resources[] = {
309 DEFINE_RES_MEM(0x90010000, 0x9001003f), 309 DEFINE_RES_MEM(0x90010000, 0x40),
310 DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"), 310 DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
311 DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"), 311 DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
312}; 312};
diff --git a/arch/arm/mach-sa1100/include/mach/collie.h b/arch/arm/mach-sa1100/include/mach/collie.h
index 52acda7061b7..f33679d2d3ee 100644
--- a/arch/arm/mach-sa1100/include/mach/collie.h
+++ b/arch/arm/mach-sa1100/include/mach/collie.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-sa1100/include/mach/collie.h 2 * arch/arm/mach-sa1100/include/mach/collie.h
3 * 3 *
4 * This file contains the hardware specific definitions for Assabet 4 * This file contains the hardware specific definitions for Collie
5 * Only include this file from SA1100-specific files. 5 * Only include this file from SA1100-specific files.
6 * 6 *
7 * ChangeLog: 7 * ChangeLog:
@@ -13,6 +13,7 @@
13#ifndef __ASM_ARCH_COLLIE_H 13#ifndef __ASM_ARCH_COLLIE_H
14#define __ASM_ARCH_COLLIE_H 14#define __ASM_ARCH_COLLIE_H
15 15
16extern void locomolcd_power(int on);
16 17
17#define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1) 18#define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1)
18#define COLLIE_GPIO_CHARGE_ON (COLLIE_SCOOP_GPIO_BASE + 0) 19#define COLLIE_GPIO_CHARGE_ON (COLLIE_SCOOP_GPIO_BASE + 0)
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 1621ad07d284..33339745d432 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1667,8 +1667,10 @@ void __init u300_init_irq(void)
1667 1667
1668 for (i = 0; i < U300_VIC_IRQS_END; i++) 1668 for (i = 0; i < U300_VIC_IRQS_END; i++)
1669 set_bit(i, (unsigned long *) &mask[0]); 1669 set_bit(i, (unsigned long *) &mask[0]);
1670 vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]); 1670 vic_init((void __iomem *) U300_INTCON0_VBASE, IRQ_U300_INTCON0_START,
1671 vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]); 1671 mask[0], mask[0]);
1672 vic_init((void __iomem *) U300_INTCON1_VBASE, IRQ_U300_INTCON1_START,
1673 mask[1], mask[1]);
1672} 1674}
1673 1675
1674 1676
diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c
index a38f80238ea9..cb04bd6ab3e7 100644
--- a/arch/arm/mach-u300/i2c.c
+++ b/arch/arm/mach-u300/i2c.c
@@ -146,9 +146,6 @@ static struct ab3100_platform_data ab3100_plf_data = {
146 .min_uV = 1800000, 146 .min_uV = 1800000,
147 .max_uV = 1800000, 147 .max_uV = 1800000,
148 .valid_modes_mask = REGULATOR_MODE_NORMAL, 148 .valid_modes_mask = REGULATOR_MODE_NORMAL,
149 .valid_ops_mask =
150 REGULATOR_CHANGE_VOLTAGE |
151 REGULATOR_CHANGE_STATUS,
152 .always_on = 1, 149 .always_on = 1,
153 .boot_on = 1, 150 .boot_on = 1,
154 }, 151 },
@@ -160,9 +157,6 @@ static struct ab3100_platform_data ab3100_plf_data = {
160 .min_uV = 2500000, 157 .min_uV = 2500000,
161 .max_uV = 2500000, 158 .max_uV = 2500000,
162 .valid_modes_mask = REGULATOR_MODE_NORMAL, 159 .valid_modes_mask = REGULATOR_MODE_NORMAL,
163 .valid_ops_mask =
164 REGULATOR_CHANGE_VOLTAGE |
165 REGULATOR_CHANGE_STATUS,
166 .always_on = 1, 160 .always_on = 1,
167 .boot_on = 1, 161 .boot_on = 1,
168 }, 162 },
@@ -230,8 +224,7 @@ static struct ab3100_platform_data ab3100_plf_data = {
230 .max_uV = 1800000, 224 .max_uV = 1800000,
231 .valid_modes_mask = REGULATOR_MODE_NORMAL, 225 .valid_modes_mask = REGULATOR_MODE_NORMAL,
232 .valid_ops_mask = 226 .valid_ops_mask =
233 REGULATOR_CHANGE_VOLTAGE | 227 REGULATOR_CHANGE_VOLTAGE,
234 REGULATOR_CHANGE_STATUS,
235 .always_on = 1, 228 .always_on = 1,
236 .boot_on = 1, 229 .boot_on = 1,
237 }, 230 },
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h
index ee78a26707eb..ec09c1e07b1a 100644
--- a/arch/arm/mach-u300/include/mach/irqs.h
+++ b/arch/arm/mach-u300/include/mach/irqs.h
@@ -12,101 +12,101 @@
12#ifndef __MACH_IRQS_H 12#ifndef __MACH_IRQS_H
13#define __MACH_IRQS_H 13#define __MACH_IRQS_H
14 14
15#define IRQ_U300_INTCON0_START 0 15#define IRQ_U300_INTCON0_START 1
16#define IRQ_U300_INTCON1_START 32 16#define IRQ_U300_INTCON1_START 33
17/* These are on INTCON0 - 30 lines */ 17/* These are on INTCON0 - 30 lines */
18#define IRQ_U300_IRQ0_EXT 0 18#define IRQ_U300_IRQ0_EXT 1
19#define IRQ_U300_IRQ1_EXT 1 19#define IRQ_U300_IRQ1_EXT 2
20#define IRQ_U300_DMA 2 20#define IRQ_U300_DMA 3
21#define IRQ_U300_VIDEO_ENC_0 3 21#define IRQ_U300_VIDEO_ENC_0 4
22#define IRQ_U300_VIDEO_ENC_1 4 22#define IRQ_U300_VIDEO_ENC_1 5
23#define IRQ_U300_AAIF_RX 5 23#define IRQ_U300_AAIF_RX 6
24#define IRQ_U300_AAIF_TX 6 24#define IRQ_U300_AAIF_TX 7
25#define IRQ_U300_AAIF_VGPIO 7 25#define IRQ_U300_AAIF_VGPIO 8
26#define IRQ_U300_AAIF_WAKEUP 8 26#define IRQ_U300_AAIF_WAKEUP 9
27#define IRQ_U300_PCM_I2S0_FRAME 9 27#define IRQ_U300_PCM_I2S0_FRAME 10
28#define IRQ_U300_PCM_I2S0_FIFO 10 28#define IRQ_U300_PCM_I2S0_FIFO 11
29#define IRQ_U300_PCM_I2S1_FRAME 11 29#define IRQ_U300_PCM_I2S1_FRAME 12
30#define IRQ_U300_PCM_I2S1_FIFO 12 30#define IRQ_U300_PCM_I2S1_FIFO 13
31#define IRQ_U300_XGAM_GAMCON 13 31#define IRQ_U300_XGAM_GAMCON 14
32#define IRQ_U300_XGAM_CDI 14 32#define IRQ_U300_XGAM_CDI 15
33#define IRQ_U300_XGAM_CDICON 15 33#define IRQ_U300_XGAM_CDICON 16
34#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) 34#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
35/* MMIACC not used on the DB3210 or DB3350 chips */ 35/* MMIACC not used on the DB3210 or DB3350 chips */
36#define IRQ_U300_XGAM_MMIACC 16 36#define IRQ_U300_XGAM_MMIACC 17
37#endif 37#endif
38#define IRQ_U300_XGAM_PDI 17 38#define IRQ_U300_XGAM_PDI 18
39#define IRQ_U300_XGAM_PDICON 18 39#define IRQ_U300_XGAM_PDICON 19
40#define IRQ_U300_XGAM_GAMEACC 19 40#define IRQ_U300_XGAM_GAMEACC 20
41#define IRQ_U300_XGAM_MCIDCT 20 41#define IRQ_U300_XGAM_MCIDCT 21
42#define IRQ_U300_APEX 21 42#define IRQ_U300_APEX 22
43#define IRQ_U300_UART0 22 43#define IRQ_U300_UART0 23
44#define IRQ_U300_SPI 23 44#define IRQ_U300_SPI 24
45#define IRQ_U300_TIMER_APP_OS 24 45#define IRQ_U300_TIMER_APP_OS 25
46#define IRQ_U300_TIMER_APP_DD 25 46#define IRQ_U300_TIMER_APP_DD 26
47#define IRQ_U300_TIMER_APP_GP1 26 47#define IRQ_U300_TIMER_APP_GP1 27
48#define IRQ_U300_TIMER_APP_GP2 27 48#define IRQ_U300_TIMER_APP_GP2 28
49#define IRQ_U300_TIMER_OS 28 49#define IRQ_U300_TIMER_OS 29
50#define IRQ_U300_TIMER_MS 29 50#define IRQ_U300_TIMER_MS 30
51#define IRQ_U300_KEYPAD_KEYBF 30 51#define IRQ_U300_KEYPAD_KEYBF 31
52#define IRQ_U300_KEYPAD_KEYBR 31 52#define IRQ_U300_KEYPAD_KEYBR 32
53/* These are on INTCON1 - 32 lines */ 53/* These are on INTCON1 - 32 lines */
54#define IRQ_U300_GPIO_PORT0 32 54#define IRQ_U300_GPIO_PORT0 33
55#define IRQ_U300_GPIO_PORT1 33 55#define IRQ_U300_GPIO_PORT1 34
56#define IRQ_U300_GPIO_PORT2 34 56#define IRQ_U300_GPIO_PORT2 35
57 57
58#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) || \ 58#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) || \
59 defined(CONFIG_MACH_U300_BS335) 59 defined(CONFIG_MACH_U300_BS335)
60/* These are for DB3150, DB3200 and DB3350 */ 60/* These are for DB3150, DB3200 and DB3350 */
61#define IRQ_U300_WDOG 35 61#define IRQ_U300_WDOG 36
62#define IRQ_U300_EVHIST 36 62#define IRQ_U300_EVHIST 37
63#define IRQ_U300_MSPRO 37 63#define IRQ_U300_MSPRO 38
64#define IRQ_U300_MMCSD_MCIINTR0 38 64#define IRQ_U300_MMCSD_MCIINTR0 39
65#define IRQ_U300_MMCSD_MCIINTR1 39 65#define IRQ_U300_MMCSD_MCIINTR1 40
66#define IRQ_U300_I2C0 40 66#define IRQ_U300_I2C0 41
67#define IRQ_U300_I2C1 41 67#define IRQ_U300_I2C1 42
68#define IRQ_U300_RTC 42 68#define IRQ_U300_RTC 43
69#define IRQ_U300_NFIF 43 69#define IRQ_U300_NFIF 44
70#define IRQ_U300_NFIF2 44 70#define IRQ_U300_NFIF2 45
71#endif 71#endif
72 72
73/* DB3150 and DB3200 have only 45 IRQs */ 73/* DB3150 and DB3200 have only 45 IRQs */
74#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) 74#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
75#define U300_VIC_IRQS_END 45 75#define U300_VIC_IRQS_END 46
76#endif 76#endif
77 77
78/* The DB3350-specific interrupt lines */ 78/* The DB3350-specific interrupt lines */
79#ifdef CONFIG_MACH_U300_BS335 79#ifdef CONFIG_MACH_U300_BS335
80#define IRQ_U300_ISP_F0 45 80#define IRQ_U300_ISP_F0 46
81#define IRQ_U300_ISP_F1 46 81#define IRQ_U300_ISP_F1 47
82#define IRQ_U300_ISP_F2 47 82#define IRQ_U300_ISP_F2 48
83#define IRQ_U300_ISP_F3 48 83#define IRQ_U300_ISP_F3 49
84#define IRQ_U300_ISP_F4 49 84#define IRQ_U300_ISP_F4 50
85#define IRQ_U300_GPIO_PORT3 50 85#define IRQ_U300_GPIO_PORT3 51
86#define IRQ_U300_SYSCON_PLL_LOCK 51 86#define IRQ_U300_SYSCON_PLL_LOCK 52
87#define IRQ_U300_UART1 52 87#define IRQ_U300_UART1 53
88#define IRQ_U300_GPIO_PORT4 53 88#define IRQ_U300_GPIO_PORT4 54
89#define IRQ_U300_GPIO_PORT5 54 89#define IRQ_U300_GPIO_PORT5 55
90#define IRQ_U300_GPIO_PORT6 55 90#define IRQ_U300_GPIO_PORT6 56
91#define U300_VIC_IRQS_END 56 91#define U300_VIC_IRQS_END 57
92#endif 92#endif
93 93
94/* The DB3210-specific interrupt lines */ 94/* The DB3210-specific interrupt lines */
95#ifdef CONFIG_MACH_U300_BS365 95#ifdef CONFIG_MACH_U300_BS365
96#define IRQ_U300_GPIO_PORT3 35 96#define IRQ_U300_GPIO_PORT3 36
97#define IRQ_U300_GPIO_PORT4 36 97#define IRQ_U300_GPIO_PORT4 37
98#define IRQ_U300_WDOG 37 98#define IRQ_U300_WDOG 38
99#define IRQ_U300_EVHIST 38 99#define IRQ_U300_EVHIST 39
100#define IRQ_U300_MSPRO 39 100#define IRQ_U300_MSPRO 40
101#define IRQ_U300_MMCSD_MCIINTR0 40 101#define IRQ_U300_MMCSD_MCIINTR0 41
102#define IRQ_U300_MMCSD_MCIINTR1 41 102#define IRQ_U300_MMCSD_MCIINTR1 42
103#define IRQ_U300_I2C0 42 103#define IRQ_U300_I2C0 43
104#define IRQ_U300_I2C1 43 104#define IRQ_U300_I2C1 44
105#define IRQ_U300_RTC 44 105#define IRQ_U300_RTC 45
106#define IRQ_U300_NFIF 45 106#define IRQ_U300_NFIF 46
107#define IRQ_U300_NFIF2 46 107#define IRQ_U300_NFIF2 47
108#define IRQ_U300_SYSCON_PLL_LOCK 47 108#define IRQ_U300_SYSCON_PLL_LOCK 48
109#define U300_VIC_IRQS_END 48 109#define U300_VIC_IRQS_END 49
110#endif 110#endif
111 111
112/* Maximum 8*7 GPIO lines */ 112/* Maximum 8*7 GPIO lines */
@@ -117,6 +117,6 @@
117#define IRQ_U300_GPIO_END (U300_VIC_IRQS_END) 117#define IRQ_U300_GPIO_END (U300_VIC_IRQS_END)
118#endif 118#endif
119 119
120#define NR_IRQS (IRQ_U300_GPIO_END) 120#define NR_IRQS (IRQ_U300_GPIO_END - IRQ_U300_INTCON0_START)
121 121
122#endif 122#endif
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 880d02ec89d4..ef7099eea0f2 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -17,6 +17,7 @@ config UX500_SOC_DB5500
17config UX500_SOC_DB8500 17config UX500_SOC_DB8500
18 bool 18 bool
19 select MFD_DB8500_PRCMU 19 select MFD_DB8500_PRCMU
20 select REGULATOR
20 select REGULATOR_DB8500_PRCMU 21 select REGULATOR_DB8500_PRCMU
21 select CPU_FREQ_TABLE if CPU_FREQ 22 select CPU_FREQ_TABLE if CPU_FREQ
22 23
diff --git a/arch/arm/mach-ux500/mbox-db5500.c b/arch/arm/mach-ux500/mbox-db5500.c
index 2b2d51caf9d8..0127490218cd 100644
--- a/arch/arm/mach-ux500/mbox-db5500.c
+++ b/arch/arm/mach-ux500/mbox-db5500.c
@@ -168,7 +168,7 @@ static ssize_t mbox_read_fifo(struct device *dev,
168 return sprintf(buf, "0x%X\n", mbox_value); 168 return sprintf(buf, "0x%X\n", mbox_value);
169} 169}
170 170
171static DEVICE_ATTR(fifo, S_IWUGO | S_IRUGO, mbox_read_fifo, mbox_write_fifo); 171static DEVICE_ATTR(fifo, S_IWUSR | S_IRUGO, mbox_read_fifo, mbox_write_fifo);
172 172
173static int mbox_show(struct seq_file *s, void *data) 173static int mbox_show(struct seq_file *s, void *data)
174{ 174{
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index d2058ef8345f..eff5842f6232 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -99,7 +99,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
99 */ 99 */
100 write_pen_release(cpu_logical_map(cpu)); 100 write_pen_release(cpu_logical_map(cpu));
101 101
102 gic_raise_softirq(cpumask_of(cpu), 1); 102 smp_send_reschedule(cpu);
103 103
104 timeout = jiffies + (1 * HZ); 104 timeout = jiffies + (1 * HZ);
105 while (time_before(jiffies, timeout)) { 105 while (time_before(jiffies, timeout)) {
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index a6e23f464528..d2268be8c34c 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -190,7 +190,7 @@ static struct resource pre_mem = {
190 .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH, 190 .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH,
191}; 191};
192 192
193static int __init pci_versatile_setup_resources(struct list_head *resources) 193static int __init pci_versatile_setup_resources(struct pci_sys_data *sys)
194{ 194{
195 int ret = 0; 195 int ret = 0;
196 196
@@ -218,9 +218,9 @@ static int __init pci_versatile_setup_resources(struct list_head *resources)
218 * the mem resource for this bus 218 * the mem resource for this bus
219 * the prefetch mem resource for this bus 219 * the prefetch mem resource for this bus
220 */ 220 */
221 pci_add_resource_offset(resources, &io_mem, sys->io_offset); 221 pci_add_resource_offset(&sys->resources, &io_mem, sys->io_offset);
222 pci_add_resource_offset(resources, &non_mem, sys->mem_offset); 222 pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset);
223 pci_add_resource_offset(resources, &pre_mem, sys->mem_offset); 223 pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset);
224 224
225 goto out; 225 goto out;
226 226
@@ -249,7 +249,7 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
249 249
250 if (nr == 0) { 250 if (nr == 0) {
251 sys->mem_offset = 0; 251 sys->mem_offset = 0;
252 ret = pci_versatile_setup_resources(&sys->resources); 252 ret = pci_versatile_setup_resources(sys);
253 if (ret < 0) { 253 if (ret < 0) {
254 printk("pci_versatile_setup: resources... oops?\n"); 254 printk("pci_versatile_setup: resources... oops?\n");
255 goto out; 255 goto out;
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 7edef9121632..7c8a7d8467bf 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -723,7 +723,7 @@ config CPU_HIGH_VECTOR
723 bool "Select the High exception vector" 723 bool "Select the High exception vector"
724 help 724 help
725 Say Y here to select high exception vector(0xFFFF0000~). 725 Say Y here to select high exception vector(0xFFFF0000~).
726 The exception vector can be vary depending on the platform 726 The exception vector can vary depending on the platform
727 design in nommu mode. If your platform needs to select 727 design in nommu mode. If your platform needs to select
728 high exception vector, say Y. 728 high exception vector, say Y.
729 Otherwise or if you are unsure, say N, and the low exception 729 Otherwise or if you are unsure, say N, and the low exception
diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S
index ff1f7cc11f87..80741992a9fc 100644
--- a/arch/arm/mm/abort-ev6.S
+++ b/arch/arm/mm/abort-ev6.S
@@ -26,18 +26,23 @@ ENTRY(v6_early_abort)
26 mrc p15, 0, r1, c5, c0, 0 @ get FSR 26 mrc p15, 0, r1, c5, c0, 0 @ get FSR
27 mrc p15, 0, r0, c6, c0, 0 @ get FAR 27 mrc p15, 0, r0, c6, c0, 0 @ get FAR
28/* 28/*
29 * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR (erratum 326103). 29 * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR.
30 * The test below covers all the write situations, including Java bytecodes
31 */ 30 */
32 bic r1, r1, #1 << 11 @ clear bit 11 of FSR 31#ifdef CONFIG_ARM_ERRATA_326103
32 ldr ip, =0x4107b36
33 mrc p15, 0, r3, c0, c0, 0 @ get processor id
34 teq ip, r3, lsr #4 @ r0 ARM1136?
35 bne do_DataAbort
33 tst r5, #PSR_J_BIT @ Java? 36 tst r5, #PSR_J_BIT @ Java?
37 tsteq r5, #PSR_T_BIT @ Thumb?
34 bne do_DataAbort 38 bne do_DataAbort
35 do_thumb_abort fsr=r1, pc=r4, psr=r5, tmp=r3 39 bic r1, r1, #1 << 11 @ clear bit 11 of FSR
36 ldreq r3, [r4] @ read aborted ARM instruction 40 ldr r3, [r4] @ read aborted ARM instruction
37#ifdef CONFIG_CPU_ENDIAN_BE8 41#ifdef CONFIG_CPU_ENDIAN_BE8
38 reveq r3, r3 42 rev r3, r3
39#endif 43#endif
40 do_ldrd_abort tmp=ip, insn=r3 44 do_ldrd_abort tmp=ip, insn=r3
41 tst r3, #1 << 20 @ L = 0 -> write 45 tst r3, #1 << 20 @ L = 0 -> write
42 orreq r1, r1, #1 << 11 @ yes. 46 orreq r1, r1, #1 << 11 @ yes.
47#endif
43 b do_DataAbort 48 b do_DataAbort
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index a53fd2aaa2f4..2a8e380501e8 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -32,6 +32,7 @@ static void __iomem *l2x0_base;
32static DEFINE_RAW_SPINLOCK(l2x0_lock); 32static DEFINE_RAW_SPINLOCK(l2x0_lock);
33static u32 l2x0_way_mask; /* Bitmask of active ways */ 33static u32 l2x0_way_mask; /* Bitmask of active ways */
34static u32 l2x0_size; 34static u32 l2x0_size;
35static unsigned long sync_reg_offset = L2X0_CACHE_SYNC;
35 36
36struct l2x0_regs l2x0_saved_regs; 37struct l2x0_regs l2x0_saved_regs;
37 38
@@ -61,12 +62,7 @@ static inline void cache_sync(void)
61{ 62{
62 void __iomem *base = l2x0_base; 63 void __iomem *base = l2x0_base;
63 64
64#ifdef CONFIG_PL310_ERRATA_753970 65 writel_relaxed(0, base + sync_reg_offset);
65 /* write to an unmmapped register */
66 writel_relaxed(0, base + L2X0_DUMMY_REG);
67#else
68 writel_relaxed(0, base + L2X0_CACHE_SYNC);
69#endif
70 cache_wait(base + L2X0_CACHE_SYNC, 1); 66 cache_wait(base + L2X0_CACHE_SYNC, 1);
71} 67}
72 68
@@ -85,10 +81,13 @@ static inline void l2x0_inv_line(unsigned long addr)
85} 81}
86 82
87#if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915) 83#if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915)
84static inline void debug_writel(unsigned long val)
85{
86 if (outer_cache.set_debug)
87 outer_cache.set_debug(val);
88}
88 89
89#define debug_writel(val) outer_cache.set_debug(val) 90static void pl310_set_debug(unsigned long val)
90
91static void l2x0_set_debug(unsigned long val)
92{ 91{
93 writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL); 92 writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL);
94} 93}
@@ -98,7 +97,7 @@ static inline void debug_writel(unsigned long val)
98{ 97{
99} 98}
100 99
101#define l2x0_set_debug NULL 100#define pl310_set_debug NULL
102#endif 101#endif
103 102
104#ifdef CONFIG_PL310_ERRATA_588369 103#ifdef CONFIG_PL310_ERRATA_588369
@@ -331,6 +330,11 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
331 else 330 else
332 ways = 8; 331 ways = 8;
333 type = "L310"; 332 type = "L310";
333#ifdef CONFIG_PL310_ERRATA_753970
334 /* Unmapped register. */
335 sync_reg_offset = L2X0_DUMMY_REG;
336#endif
337 outer_cache.set_debug = pl310_set_debug;
334 break; 338 break;
335 case L2X0_CACHE_ID_PART_L210: 339 case L2X0_CACHE_ID_PART_L210:
336 ways = (aux >> 13) & 0xf; 340 ways = (aux >> 13) & 0xf;
@@ -379,7 +383,6 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
379 outer_cache.flush_all = l2x0_flush_all; 383 outer_cache.flush_all = l2x0_flush_all;
380 outer_cache.inv_all = l2x0_inv_all; 384 outer_cache.inv_all = l2x0_inv_all;
381 outer_cache.disable = l2x0_disable; 385 outer_cache.disable = l2x0_disable;
382 outer_cache.set_debug = l2x0_set_debug;
383 386
384 printk(KERN_INFO "%s cache controller enabled\n", type); 387 printk(KERN_INFO "%s cache controller enabled\n", type);
385 printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n", 388 printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n",
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 9055b5a84ec5..f07467533365 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -320,7 +320,7 @@ retry:
320 */ 320 */
321 321
322 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); 322 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
323 if (flags & FAULT_FLAG_ALLOW_RETRY) { 323 if (!(fault & VM_FAULT_ERROR) && flags & FAULT_FLAG_ALLOW_RETRY) {
324 if (fault & VM_FAULT_MAJOR) { 324 if (fault & VM_FAULT_MAJOR) {
325 tsk->maj_flt++; 325 tsk->maj_flt++;
326 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 326 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 595079fa9d1d..8f5813bbffb5 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -293,11 +293,11 @@ EXPORT_SYMBOL(pfn_valid);
293#endif 293#endif
294 294
295#ifndef CONFIG_SPARSEMEM 295#ifndef CONFIG_SPARSEMEM
296static void arm_memory_present(void) 296static void __init arm_memory_present(void)
297{ 297{
298} 298}
299#else 299#else
300static void arm_memory_present(void) 300static void __init arm_memory_present(void)
301{ 301{
302 struct memblock_region *reg; 302 struct memblock_region *reg;
303 303
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index b86f8933ff91..2c7cf2f9c837 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -618,8 +618,8 @@ static void __init alloc_init_section(pud_t *pud, unsigned long addr,
618 } 618 }
619} 619}
620 620
621static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, 621static void __init alloc_init_pud(pgd_t *pgd, unsigned long addr,
622 unsigned long phys, const struct mem_type *type) 622 unsigned long end, unsigned long phys, const struct mem_type *type)
623{ 623{
624 pud_t *pud = pud_offset(pgd, addr); 624 pud_t *pud = pud_offset(pgd, addr);
625 unsigned long next; 625 unsigned long next;
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 6486d2f253cd..d51225f90ae2 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -13,6 +13,7 @@
13#include <asm/sections.h> 13#include <asm/sections.h>
14#include <asm/page.h> 14#include <asm/page.h>
15#include <asm/setup.h> 15#include <asm/setup.h>
16#include <asm/traps.h>
16#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
17 18
18#include "mm.h" 19#include "mm.h"
@@ -39,6 +40,7 @@ void __init sanity_check_meminfo(void)
39 */ 40 */
40void __init paging_init(struct machine_desc *mdesc) 41void __init paging_init(struct machine_desc *mdesc)
41{ 42{
43 early_trap_init((void *)CONFIG_VECTORS_BASE);
42 bootmem_init(); 44 bootmem_init();
43} 45}
44 46
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index f1c8486f7501..c2e2b66f72b5 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -255,6 +255,18 @@ __v7_setup:
255 mcr p15, 0, r5, c10, c2, 0 @ write PRRR 255 mcr p15, 0, r5, c10, c2, 0 @ write PRRR
256 mcr p15, 0, r6, c10, c2, 1 @ write NMRR 256 mcr p15, 0, r6, c10, c2, 1 @ write NMRR
257#endif 257#endif
258#ifndef CONFIG_ARM_THUMBEE
259 mrc p15, 0, r0, c0, c1, 0 @ read ID_PFR0 for ThumbEE
260 and r0, r0, #(0xf << 12) @ ThumbEE enabled field
261 teq r0, #(1 << 12) @ check if ThumbEE is present
262 bne 1f
263 mov r5, #0
264 mcr p14, 6, r5, c1, c0, 0 @ Initialize TEEHBR to 0
265 mrc p14, 6, r0, c0, c0, 0 @ load TEECR
266 orr r0, r0, #1 @ set the 1st bit in order to
267 mcr p14, 6, r0, c0, c0, 0 @ stop userspace TEEHBR access
2681:
269#endif
258 adr r5, v7_crval 270 adr r5, v7_crval
259 ldmia r5, {r5, r6} 271 ldmia r5, {r5, r6}
260#ifdef CONFIG_CPU_ENDIAN_BE8 272#ifdef CONFIG_CPU_ENDIAN_BE8
diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c
index d1e31fa1b0c3..5cac2c540f4f 100644
--- a/arch/arm/plat-mxc/3ds_debugboard.c
+++ b/arch/arm/plat-mxc/3ds_debugboard.c
@@ -80,7 +80,7 @@ static struct smsc911x_platform_config smsc911x_config = {
80 80
81static struct platform_device smsc_lan9217_device = { 81static struct platform_device smsc_lan9217_device = {
82 .name = "smsc911x", 82 .name = "smsc911x",
83 .id = 0, 83 .id = -1,
84 .dev = { 84 .dev = {
85 .platform_data = &smsc911x_config, 85 .platform_data = &smsc911x_config,
86 }, 86 },
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index ce1e9b96ba1a..ad95c7a5d009 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -17,6 +17,7 @@ config ARCH_OMAP1
17 select IRQ_DOMAIN 17 select IRQ_DOMAIN
18 select HAVE_IDE 18 select HAVE_IDE
19 select NEED_MACH_MEMORY_H 19 select NEED_MACH_MEMORY_H
20 select NEED_MACH_IO_H if PCCARD
20 help 21 help
21 "Systems based on omap7xx, omap15xx or omap16xx" 22 "Systems based on omap7xx, omap15xx or omap16xx"
22 23
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 56b6f8b7053e..62ec5c452792 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -398,32 +398,6 @@ struct clk dummy_ck = {
398 .ops = &clkops_null, 398 .ops = &clkops_null,
399}; 399};
400 400
401#ifdef CONFIG_CPU_FREQ
402void clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
403{
404 unsigned long flags;
405
406 if (!arch_clock || !arch_clock->clk_init_cpufreq_table)
407 return;
408
409 spin_lock_irqsave(&clockfw_lock, flags);
410 arch_clock->clk_init_cpufreq_table(table);
411 spin_unlock_irqrestore(&clockfw_lock, flags);
412}
413
414void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
415{
416 unsigned long flags;
417
418 if (!arch_clock || !arch_clock->clk_exit_cpufreq_table)
419 return;
420
421 spin_lock_irqsave(&clockfw_lock, flags);
422 arch_clock->clk_exit_cpufreq_table(table);
423 spin_unlock_irqrestore(&clockfw_lock, flags);
424}
425#endif
426
427/* 401/*
428 * 402 *
429 */ 403 */
@@ -441,6 +415,8 @@ static int __init clk_disable_unused(void)
441 return 0; 415 return 0;
442 416
443 pr_info("clock: disabling unused clocks to save power\n"); 417 pr_info("clock: disabling unused clocks to save power\n");
418
419 spin_lock_irqsave(&clockfw_lock, flags);
444 list_for_each_entry(ck, &clocks, node) { 420 list_for_each_entry(ck, &clocks, node) {
445 if (ck->ops == &clkops_null) 421 if (ck->ops == &clkops_null)
446 continue; 422 continue;
@@ -448,10 +424,9 @@ static int __init clk_disable_unused(void)
448 if (ck->usecount > 0 || !ck->enable_reg) 424 if (ck->usecount > 0 || !ck->enable_reg)
449 continue; 425 continue;
450 426
451 spin_lock_irqsave(&clockfw_lock, flags);
452 arch_clock->clk_disable_unused(ck); 427 arch_clock->clk_disable_unused(ck);
453 spin_unlock_irqrestore(&clockfw_lock, flags);
454 } 428 }
429 spin_unlock_irqrestore(&clockfw_lock, flags);
455 430
456 return 0; 431 return 0;
457} 432}
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index ecdb3da0dea9..c58d896cd5c3 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -916,6 +916,13 @@ void omap_start_dma(int lch)
916 l |= OMAP_DMA_CCR_BUFFERING_DISABLE; 916 l |= OMAP_DMA_CCR_BUFFERING_DISABLE;
917 l |= OMAP_DMA_CCR_EN; 917 l |= OMAP_DMA_CCR_EN;
918 918
919 /*
920 * As dma_write() uses IO accessors which are weakly ordered, there
921 * is no guarantee that data in coherent DMA memory will be visible
922 * to the DMA device. Add a memory barrier here to ensure that any
923 * such data is visible prior to enabling DMA.
924 */
925 mb();
919 p->dma_write(l, CCR, lch); 926 p->dma_write(l, CCR, lch);
920 927
921 dma_chan[lch].flags |= OMAP_DMA_ACTIVE; 928 dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
@@ -965,6 +972,13 @@ void omap_stop_dma(int lch)
965 p->dma_write(l, CCR, lch); 972 p->dma_write(l, CCR, lch);
966 } 973 }
967 974
975 /*
976 * Ensure that data transferred by DMA is visible to any access
977 * after DMA has been disabled. This is important for coherent
978 * DMA regions.
979 */
980 mb();
981
968 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { 982 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
969 int next_lch, cur_lch = lch; 983 int next_lch, cur_lch = lch;
970 char dma_chan_link_map[dma_lch_count]; 984 char dma_chan_link_map[dma_lch_count];
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 240a7b9fd946..d0ef57c1d71b 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -272,8 +272,6 @@ struct clk {
272#endif 272#endif
273}; 273};
274 274
275struct cpufreq_frequency_table;
276
277struct clk_functions { 275struct clk_functions {
278 int (*clk_enable)(struct clk *clk); 276 int (*clk_enable)(struct clk *clk);
279 void (*clk_disable)(struct clk *clk); 277 void (*clk_disable)(struct clk *clk);
@@ -283,10 +281,6 @@ struct clk_functions {
283 void (*clk_allow_idle)(struct clk *clk); 281 void (*clk_allow_idle)(struct clk *clk);
284 void (*clk_deny_idle)(struct clk *clk); 282 void (*clk_deny_idle)(struct clk *clk);
285 void (*clk_disable_unused)(struct clk *clk); 283 void (*clk_disable_unused)(struct clk *clk);
286#ifdef CONFIG_CPU_FREQ
287 void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
288 void (*clk_exit_cpufreq_table)(struct cpufreq_frequency_table **);
289#endif
290}; 284};
291 285
292extern int mpurate; 286extern int mpurate;
@@ -301,10 +295,6 @@ extern void recalculate_root_clocks(void);
301extern unsigned long followparent_recalc(struct clk *clk); 295extern unsigned long followparent_recalc(struct clk *clk);
302extern void clk_enable_init_clocks(void); 296extern void clk_enable_init_clocks(void);
303unsigned long omap_fixed_divisor_recalc(struct clk *clk); 297unsigned long omap_fixed_divisor_recalc(struct clk *clk);
304#ifdef CONFIG_CPU_FREQ
305extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
306extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
307#endif
308extern struct clk *omap_clk_get_by_name(const char *name); 298extern struct clk *omap_clk_get_by_name(const char *name);
309extern int omap_clk_enable_autoidle_all(void); 299extern int omap_clk_enable_autoidle_all(void);
310extern int omap_clk_disable_autoidle_all(void); 300extern int omap_clk_disable_autoidle_all(void);
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 9e8e63d52aab..3f26db4ee8e6 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -47,17 +47,17 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
47 * with the original PRCM protocol defined for OMAP2420 47 * with the original PRCM protocol defined for OMAP2420
48 */ 48 */
49#define SYSC_TYPE1_MIDLEMODE_SHIFT 12 49#define SYSC_TYPE1_MIDLEMODE_SHIFT 12
50#define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT) 50#define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_TYPE1_MIDLEMODE_SHIFT)
51#define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8 51#define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
52#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT) 52#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_TYPE1_CLOCKACTIVITY_SHIFT)
53#define SYSC_TYPE1_SIDLEMODE_SHIFT 3 53#define SYSC_TYPE1_SIDLEMODE_SHIFT 3
54#define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT) 54#define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_TYPE1_SIDLEMODE_SHIFT)
55#define SYSC_TYPE1_ENAWAKEUP_SHIFT 2 55#define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
56#define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT) 56#define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_TYPE1_ENAWAKEUP_SHIFT)
57#define SYSC_TYPE1_SOFTRESET_SHIFT 1 57#define SYSC_TYPE1_SOFTRESET_SHIFT 1
58#define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT) 58#define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_TYPE1_SOFTRESET_SHIFT)
59#define SYSC_TYPE1_AUTOIDLE_SHIFT 0 59#define SYSC_TYPE1_AUTOIDLE_SHIFT 0
60#define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT) 60#define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_TYPE1_AUTOIDLE_SHIFT)
61 61
62/* 62/*
63 * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant 63 * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
@@ -305,6 +305,7 @@ struct omap_hwmod_sysc_fields {
305 * @rev_offs: IP block revision register offset (from module base addr) 305 * @rev_offs: IP block revision register offset (from module base addr)
306 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr) 306 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
307 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr) 307 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
308 * @srst_udelay: Delay needed after doing a softreset in usecs
308 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART} 309 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
309 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported 310 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
310 * @clockact: the default value of the module CLOCKACTIVITY bits 311 * @clockact: the default value of the module CLOCKACTIVITY bits
@@ -330,9 +331,10 @@ struct omap_hwmod_class_sysconfig {
330 u16 sysc_offs; 331 u16 sysc_offs;
331 u16 syss_offs; 332 u16 syss_offs;
332 u16 sysc_flags; 333 u16 sysc_flags;
334 struct omap_hwmod_sysc_fields *sysc_fields;
335 u8 srst_udelay;
333 u8 idlemodes; 336 u8 idlemodes;
334 u8 clockact; 337 u8 clockact;
335 struct omap_hwmod_sysc_fields *sysc_fields;
336}; 338};
337 339
338/** 340/**
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index eec98afa0f83..f9a8c5341ee9 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -348,7 +348,6 @@ u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
348 sdrc_actim_ctrl_b_1, sdrc_mr_1); 348 sdrc_actim_ctrl_b_1, sdrc_mr_1);
349} 349}
350 350
351#ifdef CONFIG_PM
352void omap3_sram_restore_context(void) 351void omap3_sram_restore_context(void)
353{ 352{
354 omap_sram_ceil = omap_sram_base + omap_sram_size; 353 omap_sram_ceil = omap_sram_base + omap_sram_size;
@@ -358,17 +357,18 @@ void omap3_sram_restore_context(void)
358 omap3_sram_configure_core_dpll_sz); 357 omap3_sram_configure_core_dpll_sz);
359 omap_push_sram_idle(); 358 omap_push_sram_idle();
360} 359}
361#endif /* CONFIG_PM */
362
363#endif /* CONFIG_ARCH_OMAP3 */
364 360
365static inline int omap34xx_sram_init(void) 361static inline int omap34xx_sram_init(void)
366{ 362{
367#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
368 omap3_sram_restore_context(); 363 omap3_sram_restore_context();
369#endif
370 return 0; 364 return 0;
371} 365}
366#else
367static inline int omap34xx_sram_init(void)
368{
369 return 0;
370}
371#endif /* CONFIG_ARCH_OMAP3 */
372 372
373static inline int am33xx_sram_init(void) 373static inline int am33xx_sram_init(void)
374{ 374{
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 71553f410016..a0ffc77da809 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -302,6 +302,7 @@ comment "Power management"
302config SAMSUNG_PM_DEBUG 302config SAMSUNG_PM_DEBUG
303 bool "S3C2410 PM Suspend debug" 303 bool "S3C2410 PM Suspend debug"
304 depends on PM 304 depends on PM
305 select DEBUG_LL
305 help 306 help
306 Say Y here if you want verbose debugging from the PM Suspend and 307 Say Y here if you want verbose debugging from the PM Suspend and
307 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> 308 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 4067d1dd7f1c..61ca2f356c52 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -134,6 +134,8 @@ extern struct platform_device exynos4_device_pcm2;
134extern struct platform_device exynos4_device_pd[]; 134extern struct platform_device exynos4_device_pd[];
135extern struct platform_device exynos4_device_spdif; 135extern struct platform_device exynos4_device_spdif;
136 136
137extern struct platform_device exynos_device_drm;
138
137extern struct platform_device samsung_asoc_dma; 139extern struct platform_device samsung_asoc_dma;
138extern struct platform_device samsung_asoc_idma; 140extern struct platform_device samsung_asoc_idma;
139extern struct platform_device samsung_device_keypad; 141extern struct platform_device samsung_device_keypad;
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 317e246ffc56..e834c5ef437c 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -18,6 +18,8 @@
18#ifndef __PLAT_S3C_SDHCI_H 18#ifndef __PLAT_S3C_SDHCI_H
19#define __PLAT_S3C_SDHCI_H __FILE__ 19#define __PLAT_S3C_SDHCI_H __FILE__
20 20
21#include <plat/devs.h>
22
21struct platform_device; 23struct platform_device;
22struct mmc_host; 24struct mmc_host;
23struct mmc_card; 25struct mmc_card;
@@ -356,4 +358,30 @@ static inline void exynos4_default_sdhci3(void) { }
356 358
357#endif /* CONFIG_EXYNOS4_SETUP_SDHCI */ 359#endif /* CONFIG_EXYNOS4_SETUP_SDHCI */
358 360
361static inline void s3c_sdhci_setname(int id, char *name)
362{
363 switch (id) {
364#ifdef CONFIG_S3C_DEV_HSMMC
365 case 0:
366 s3c_device_hsmmc0.name = name;
367 break;
368#endif
369#ifdef CONFIG_S3C_DEV_HSMMC1
370 case 1:
371 s3c_device_hsmmc1.name = name;
372 break;
373#endif
374#ifdef CONFIG_S3C_DEV_HSMMC2
375 case 2:
376 s3c_device_hsmmc2.name = name;
377 break;
378#endif
379#ifdef CONFIG_S3C_DEV_HSMMC3
380 case 3:
381 s3c_device_hsmmc3.name = name;
382 break;
383#endif
384 }
385}
386
359#endif /* __PLAT_S3C_SDHCI_H */ 387#endif /* __PLAT_S3C_SDHCI_H */
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 858748eaa144..bc683b8219b5 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -17,6 +17,8 @@
17#include <linux/sched.h> 17#include <linux/sched.h>
18#include <linux/smp.h> 18#include <linux/smp.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/uaccess.h>
21#include <linux/user.h>
20 22
21#include <asm/cp15.h> 23#include <asm/cp15.h>
22#include <asm/cputype.h> 24#include <asm/cputype.h>
@@ -529,6 +531,103 @@ void vfp_flush_hwstate(struct thread_info *thread)
529} 531}
530 532
531/* 533/*
534 * Save the current VFP state into the provided structures and prepare
535 * for entry into a new function (signal handler).
536 */
537int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp,
538 struct user_vfp_exc __user *ufp_exc)
539{
540 struct thread_info *thread = current_thread_info();
541 struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
542 int err = 0;
543
544 /* Ensure that the saved hwstate is up-to-date. */
545 vfp_sync_hwstate(thread);
546
547 /*
548 * Copy the floating point registers. There can be unused
549 * registers see asm/hwcap.h for details.
550 */
551 err |= __copy_to_user(&ufp->fpregs, &hwstate->fpregs,
552 sizeof(hwstate->fpregs));
553 /*
554 * Copy the status and control register.
555 */
556 __put_user_error(hwstate->fpscr, &ufp->fpscr, err);
557
558 /*
559 * Copy the exception registers.
560 */
561 __put_user_error(hwstate->fpexc, &ufp_exc->fpexc, err);
562 __put_user_error(hwstate->fpinst, &ufp_exc->fpinst, err);
563 __put_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err);
564
565 if (err)
566 return -EFAULT;
567
568 /* Ensure that VFP is disabled. */
569 vfp_flush_hwstate(thread);
570
571 /*
572 * As per the PCS, clear the length and stride bits for function
573 * entry.
574 */
575 hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK);
576
577 /*
578 * Disable VFP in the hwstate so that we can detect if it gets
579 * used.
580 */
581 hwstate->fpexc &= ~FPEXC_EN;
582 return 0;
583}
584
585/* Sanitise and restore the current VFP state from the provided structures. */
586int vfp_restore_user_hwstate(struct user_vfp __user *ufp,
587 struct user_vfp_exc __user *ufp_exc)
588{
589 struct thread_info *thread = current_thread_info();
590 struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
591 unsigned long fpexc;
592 int err = 0;
593
594 /*
595 * If VFP has been used, then disable it to avoid corrupting
596 * the new thread state.
597 */
598 if (hwstate->fpexc & FPEXC_EN)
599 vfp_flush_hwstate(thread);
600
601 /*
602 * Copy the floating point registers. There can be unused
603 * registers see asm/hwcap.h for details.
604 */
605 err |= __copy_from_user(&hwstate->fpregs, &ufp->fpregs,
606 sizeof(hwstate->fpregs));
607 /*
608 * Copy the status and control register.
609 */
610 __get_user_error(hwstate->fpscr, &ufp->fpscr, err);
611
612 /*
613 * Sanitise and restore the exception registers.
614 */
615 __get_user_error(fpexc, &ufp_exc->fpexc, err);
616
617 /* Ensure the VFP is enabled. */
618 fpexc |= FPEXC_EN;
619
620 /* Ensure FPINST2 is invalid and the exception flag is cleared. */
621 fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
622 hwstate->fpexc = fpexc;
623
624 __get_user_error(hwstate->fpinst, &ufp_exc->fpinst, err);
625 __get_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err);
626
627 return err ? -EFAULT : 0;
628}
629
630/*
532 * VFP hardware can lose all context when a CPU goes offline. 631 * VFP hardware can lose all context when a CPU goes offline.
533 * As we will be running in SMP mode with CPU hotplug, we will save the 632 * As we will be running in SMP mode with CPU hotplug, we will save the
534 * hardware state at every thread switch. We clear our held state when 633 * hardware state at every thread switch. We clear our held state when
diff --git a/arch/avr32/include/asm/barrier.h b/arch/avr32/include/asm/barrier.h
index 808001c9cf8c..0961275373db 100644
--- a/arch/avr32/include/asm/barrier.h
+++ b/arch/avr32/include/asm/barrier.h
@@ -8,6 +8,8 @@
8#ifndef __ASM_AVR32_BARRIER_H 8#ifndef __ASM_AVR32_BARRIER_H
9#define __ASM_AVR32_BARRIER_H 9#define __ASM_AVR32_BARRIER_H
10 10
11#define nop() asm volatile("nop")
12
11#define mb() asm volatile("" : : : "memory") 13#define mb() asm volatile("" : : : "memory")
12#define rmb() mb() 14#define rmb() mb()
13#define wmb() asm volatile("sync 0" : : : "memory") 15#define wmb() asm volatile("sync 0" : : : "memory")
diff --git a/arch/avr32/include/asm/special_insns.h b/arch/avr32/include/asm/special_insns.h
deleted file mode 100644
index f922218dfaa5..000000000000
--- a/arch/avr32/include/asm/special_insns.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_SPECIAL_INSNS_H
9#define __ASM_AVR32_SPECIAL_INSNS_H
10
11#define nop() asm volatile("nop")
12
13#endif /* __ASM_AVR32_SPECIAL_INSNS_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h
index 71733866cb4f..70742ec997f8 100644
--- a/arch/avr32/mach-at32ap/include/mach/board.h
+++ b/arch/avr32/mach-at32ap/include/mach/board.h
@@ -7,7 +7,7 @@
7#include <linux/types.h> 7#include <linux/types.h>
8#include <linux/serial.h> 8#include <linux/serial.h>
9#include <linux/platform_data/macb.h> 9#include <linux/platform_data/macb.h>
10#include <linux/platform_data/atmel_nand.h> 10#include <linux/platform_data/atmel.h>
11 11
12#define GPIO_PIN_NONE (-1) 12#define GPIO_PIN_NONE (-1)
13 13
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index c1269a1085e1..373a6902d8fa 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -823,7 +823,7 @@ config CACHELINE_ALIGNED_L1
823 bool "Locate cacheline_aligned data to L1 Data Memory" 823 bool "Locate cacheline_aligned data to L1 Data Memory"
824 default y if !BF54x 824 default y if !BF54x
825 default n if BF54x 825 default n if BF54x
826 depends on !SMP && !BF531 826 depends on !SMP && !BF531 && !CRC32
827 help 827 help
828 If enabled, cacheline_aligned data is linked 828 If enabled, cacheline_aligned data is linked
829 into L1 data memory. (less latency) 829 into L1 data memory. (less latency)
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index 9ccc18a6b4df..90b175323644 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -147,6 +147,7 @@ CONFIG_USB_OTG_BLACKLIST_HUB=y
147CONFIG_USB_MON=y 147CONFIG_USB_MON=y
148CONFIG_USB_MUSB_HDRC=y 148CONFIG_USB_MUSB_HDRC=y
149CONFIG_USB_MUSB_BLACKFIN=y 149CONFIG_USB_MUSB_BLACKFIN=y
150CONFIG_MUSB_PIO_ONLY=y
150CONFIG_USB_STORAGE=y 151CONFIG_USB_STORAGE=y
151CONFIG_USB_GADGET=y 152CONFIG_USB_GADGET=y
152CONFIG_RTC_CLASS=y 153CONFIG_RTC_CLASS=y
diff --git a/arch/blackfin/include/asm/cmpxchg.h b/arch/blackfin/include/asm/cmpxchg.h
index ba2484f4cb2a..c05868cc61c1 100644
--- a/arch/blackfin/include/asm/cmpxchg.h
+++ b/arch/blackfin/include/asm/cmpxchg.h
@@ -122,7 +122,8 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
122 (unsigned long)(n), sizeof(*(ptr)))) 122 (unsigned long)(n), sizeof(*(ptr))))
123#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) 123#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
124 124
125#include <asm-generic/cmpxchg.h> 125#define cmpxchg(ptr, o, n) cmpxchg_local((ptr), (o), (n))
126#define cmpxchg64(ptr, o, n) cmpxchg64_local((ptr), (o), (n))
126 127
127#endif /* !CONFIG_SMP */ 128#endif /* !CONFIG_SMP */
128 129
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 5a25856381ff..12d3571b5232 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -244,16 +244,26 @@ static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
244 return -EINVAL; 244 return -EINVAL;
245} 245}
246 246
247static inline int gpio_get_value(unsigned gpio) 247static inline int __gpio_get_value(unsigned gpio)
248{ 248{
249 return bfin_gpio_get_value(gpio); 249 return bfin_gpio_get_value(gpio);
250} 250}
251 251
252static inline void gpio_set_value(unsigned gpio, int value) 252static inline void __gpio_set_value(unsigned gpio, int value)
253{ 253{
254 return bfin_gpio_set_value(gpio, value); 254 return bfin_gpio_set_value(gpio, value);
255} 255}
256 256
257static inline int gpio_get_value(unsigned gpio)
258{
259 return __gpio_get_value(gpio);
260}
261
262static inline void gpio_set_value(unsigned gpio, int value)
263{
264 return __gpio_set_value(gpio, value);
265}
266
257static inline int gpio_to_irq(unsigned gpio) 267static inline int gpio_to_irq(unsigned gpio)
258{ 268{
259 if (likely(gpio < MAX_BLACKFIN_GPIOS)) 269 if (likely(gpio < MAX_BLACKFIN_GPIOS))
diff --git a/arch/blackfin/mach-bf538/boards/ezkit.c b/arch/blackfin/mach-bf538/boards/ezkit.c
index 1633a6f306c0..85038f54354d 100644
--- a/arch/blackfin/mach-bf538/boards/ezkit.c
+++ b/arch/blackfin/mach-bf538/boards/ezkit.c
@@ -38,7 +38,7 @@ static struct platform_device rtc_device = {
38 .name = "rtc-bfin", 38 .name = "rtc-bfin",
39 .id = -1, 39 .id = -1,
40}; 40};
41#endif 41#endif /* CONFIG_RTC_DRV_BFIN */
42 42
43#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 43#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
44#ifdef CONFIG_SERIAL_BFIN_UART0 44#ifdef CONFIG_SERIAL_BFIN_UART0
@@ -100,7 +100,7 @@ static struct platform_device bfin_uart0_device = {
100 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ 100 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
101 }, 101 },
102}; 102};
103#endif 103#endif /* CONFIG_SERIAL_BFIN_UART0 */
104#ifdef CONFIG_SERIAL_BFIN_UART1 104#ifdef CONFIG_SERIAL_BFIN_UART1
105static struct resource bfin_uart1_resources[] = { 105static struct resource bfin_uart1_resources[] = {
106 { 106 {
@@ -148,7 +148,7 @@ static struct platform_device bfin_uart1_device = {
148 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */ 148 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
149 }, 149 },
150}; 150};
151#endif 151#endif /* CONFIG_SERIAL_BFIN_UART1 */
152#ifdef CONFIG_SERIAL_BFIN_UART2 152#ifdef CONFIG_SERIAL_BFIN_UART2
153static struct resource bfin_uart2_resources[] = { 153static struct resource bfin_uart2_resources[] = {
154 { 154 {
@@ -196,8 +196,8 @@ static struct platform_device bfin_uart2_device = {
196 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */ 196 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
197 }, 197 },
198}; 198};
199#endif 199#endif /* CONFIG_SERIAL_BFIN_UART2 */
200#endif 200#endif /* CONFIG_SERIAL_BFIN */
201 201
202#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 202#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
203#ifdef CONFIG_BFIN_SIR0 203#ifdef CONFIG_BFIN_SIR0
@@ -224,7 +224,7 @@ static struct platform_device bfin_sir0_device = {
224 .num_resources = ARRAY_SIZE(bfin_sir0_resources), 224 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
225 .resource = bfin_sir0_resources, 225 .resource = bfin_sir0_resources,
226}; 226};
227#endif 227#endif /* CONFIG_BFIN_SIR0 */
228#ifdef CONFIG_BFIN_SIR1 228#ifdef CONFIG_BFIN_SIR1
229static struct resource bfin_sir1_resources[] = { 229static struct resource bfin_sir1_resources[] = {
230 { 230 {
@@ -249,7 +249,7 @@ static struct platform_device bfin_sir1_device = {
249 .num_resources = ARRAY_SIZE(bfin_sir1_resources), 249 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
250 .resource = bfin_sir1_resources, 250 .resource = bfin_sir1_resources,
251}; 251};
252#endif 252#endif /* CONFIG_BFIN_SIR1 */
253#ifdef CONFIG_BFIN_SIR2 253#ifdef CONFIG_BFIN_SIR2
254static struct resource bfin_sir2_resources[] = { 254static struct resource bfin_sir2_resources[] = {
255 { 255 {
@@ -274,8 +274,8 @@ static struct platform_device bfin_sir2_device = {
274 .num_resources = ARRAY_SIZE(bfin_sir2_resources), 274 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
275 .resource = bfin_sir2_resources, 275 .resource = bfin_sir2_resources,
276}; 276};
277#endif 277#endif /* CONFIG_BFIN_SIR2 */
278#endif 278#endif /* CONFIG_BFIN_SIR */
279 279
280#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 280#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
281#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 281#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
@@ -311,7 +311,7 @@ static struct platform_device bfin_sport0_uart_device = {
311 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */ 311 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
312 }, 312 },
313}; 313};
314#endif 314#endif /* CONFIG_SERIAL_BFIN_SPORT0_UART */
315#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 315#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
316static struct resource bfin_sport1_uart_resources[] = { 316static struct resource bfin_sport1_uart_resources[] = {
317 { 317 {
@@ -345,7 +345,7 @@ static struct platform_device bfin_sport1_uart_device = {
345 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */ 345 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
346 }, 346 },
347}; 347};
348#endif 348#endif /* CONFIG_SERIAL_BFIN_SPORT1_UART */
349#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART 349#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
350static struct resource bfin_sport2_uart_resources[] = { 350static struct resource bfin_sport2_uart_resources[] = {
351 { 351 {
@@ -379,7 +379,7 @@ static struct platform_device bfin_sport2_uart_device = {
379 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */ 379 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
380 }, 380 },
381}; 381};
382#endif 382#endif /* CONFIG_SERIAL_BFIN_SPORT2_UART */
383#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART 383#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
384static struct resource bfin_sport3_uart_resources[] = { 384static struct resource bfin_sport3_uart_resources[] = {
385 { 385 {
@@ -413,8 +413,8 @@ static struct platform_device bfin_sport3_uart_device = {
413 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */ 413 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
414 }, 414 },
415}; 415};
416#endif 416#endif /* CONFIG_SERIAL_BFIN_SPORT3_UART */
417#endif 417#endif /* CONFIG_SERIAL_BFIN_SPORT */
418 418
419#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) 419#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
420static unsigned short bfin_can_peripherals[] = { 420static unsigned short bfin_can_peripherals[] = {
@@ -452,7 +452,7 @@ static struct platform_device bfin_can_device = {
452 .platform_data = &bfin_can_peripherals, /* Passed to driver */ 452 .platform_data = &bfin_can_peripherals, /* Passed to driver */
453 }, 453 },
454}; 454};
455#endif 455#endif /* CONFIG_CAN_BFIN */
456 456
457/* 457/*
458 * USB-LAN EzExtender board 458 * USB-LAN EzExtender board
@@ -488,7 +488,7 @@ static struct platform_device smc91x_device = {
488 .platform_data = &smc91x_info, 488 .platform_data = &smc91x_info,
489 }, 489 },
490}; 490};
491#endif 491#endif /* CONFIG_SMC91X */
492 492
493#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE) 493#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
494/* all SPI peripherals info goes here */ 494/* all SPI peripherals info goes here */
@@ -518,7 +518,8 @@ static struct flash_platform_data bfin_spi_flash_data = {
518static struct bfin5xx_spi_chip spi_flash_chip_info = { 518static struct bfin5xx_spi_chip spi_flash_chip_info = {
519 .enable_dma = 0, /* use dma transfer with this chip*/ 519 .enable_dma = 0, /* use dma transfer with this chip*/
520}; 520};
521#endif 521#endif /* CONFIG_MTD_M25P80 */
522#endif /* CONFIG_SPI_BFIN5XX */
522 523
523#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE) 524#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
524#include <linux/spi/ad7879.h> 525#include <linux/spi/ad7879.h>
@@ -535,7 +536,7 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
535 .gpio_export = 1, /* Export GPIO to gpiolib */ 536 .gpio_export = 1, /* Export GPIO to gpiolib */
536 .gpio_base = -1, /* Dynamic allocation */ 537 .gpio_base = -1, /* Dynamic allocation */
537}; 538};
538#endif 539#endif /* CONFIG_TOUCHSCREEN_AD7879 */
539 540
540#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 541#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
541#include <asm/bfin-lq035q1.h> 542#include <asm/bfin-lq035q1.h>
@@ -564,7 +565,7 @@ static struct platform_device bfin_lq035q1_device = {
564 .platform_data = &bfin_lq035q1_data, 565 .platform_data = &bfin_lq035q1_data,
565 }, 566 },
566}; 567};
567#endif 568#endif /* CONFIG_FB_BFIN_LQ035Q1 */
568 569
569static struct spi_board_info bf538_spi_board_info[] __initdata = { 570static struct spi_board_info bf538_spi_board_info[] __initdata = {
570#if defined(CONFIG_MTD_M25P80) \ 571#if defined(CONFIG_MTD_M25P80) \
@@ -579,7 +580,7 @@ static struct spi_board_info bf538_spi_board_info[] __initdata = {
579 .controller_data = &spi_flash_chip_info, 580 .controller_data = &spi_flash_chip_info,
580 .mode = SPI_MODE_3, 581 .mode = SPI_MODE_3,
581 }, 582 },
582#endif 583#endif /* CONFIG_MTD_M25P80 */
583#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) 584#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
584 { 585 {
585 .modalias = "ad7879", 586 .modalias = "ad7879",
@@ -590,7 +591,7 @@ static struct spi_board_info bf538_spi_board_info[] __initdata = {
590 .chip_select = 1, 591 .chip_select = 1,
591 .mode = SPI_CPHA | SPI_CPOL, 592 .mode = SPI_CPHA | SPI_CPOL,
592 }, 593 },
593#endif 594#endif /* CONFIG_TOUCHSCREEN_AD7879_SPI */
594#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 595#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
595 { 596 {
596 .modalias = "bfin-lq035q1-spi", 597 .modalias = "bfin-lq035q1-spi",
@@ -599,7 +600,7 @@ static struct spi_board_info bf538_spi_board_info[] __initdata = {
599 .chip_select = 2, 600 .chip_select = 2,
600 .mode = SPI_CPHA | SPI_CPOL, 601 .mode = SPI_CPHA | SPI_CPOL,
601 }, 602 },
602#endif 603#endif /* CONFIG_FB_BFIN_LQ035Q1 */
603#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 604#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
604 { 605 {
605 .modalias = "spidev", 606 .modalias = "spidev",
@@ -607,7 +608,7 @@ static struct spi_board_info bf538_spi_board_info[] __initdata = {
607 .bus_num = 0, 608 .bus_num = 0,
608 .chip_select = 1, 609 .chip_select = 1,
609 }, 610 },
610#endif 611#endif /* CONFIG_SPI_SPIDEV */
611}; 612};
612 613
613/* SPI (0) */ 614/* SPI (0) */
@@ -716,8 +717,6 @@ static struct platform_device bf538_spi_master2 = {
716 }, 717 },
717}; 718};
718 719
719#endif /* spi master and devices */
720
721#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 720#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
722static struct resource bfin_twi0_resource[] = { 721static struct resource bfin_twi0_resource[] = {
723 [0] = { 722 [0] = {
@@ -759,8 +758,8 @@ static struct platform_device i2c_bfin_twi1_device = {
759 .num_resources = ARRAY_SIZE(bfin_twi1_resource), 758 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
760 .resource = bfin_twi1_resource, 759 .resource = bfin_twi1_resource,
761}; 760};
762#endif 761#endif /* CONFIG_BF542 */
763#endif 762#endif /* CONFIG_I2C_BLACKFIN_TWI */
764 763
765#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 764#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
766#include <linux/gpio_keys.h> 765#include <linux/gpio_keys.h>
diff --git a/arch/c6x/include/asm/irq.h b/arch/c6x/include/asm/irq.h
index f13b78d5e1ca..ab4577f93d96 100644
--- a/arch/c6x/include/asm/irq.h
+++ b/arch/c6x/include/asm/irq.h
@@ -42,10 +42,6 @@
42/* This number is used when no interrupt has been assigned */ 42/* This number is used when no interrupt has been assigned */
43#define NO_IRQ 0 43#define NO_IRQ 0
44 44
45struct irq_data;
46extern irq_hw_number_t irqd_to_hwirq(struct irq_data *d);
47extern irq_hw_number_t virq_to_hw(unsigned int virq);
48
49extern void __init init_pic_c64xplus(void); 45extern void __init init_pic_c64xplus(void);
50 46
51extern void init_IRQ(void); 47extern void init_IRQ(void);
diff --git a/arch/c6x/kernel/irq.c b/arch/c6x/kernel/irq.c
index 65b8ddf54b44..c90fb5e82ad7 100644
--- a/arch/c6x/kernel/irq.c
+++ b/arch/c6x/kernel/irq.c
@@ -130,16 +130,3 @@ int arch_show_interrupts(struct seq_file *p, int prec)
130 seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); 130 seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
131 return 0; 131 return 0;
132} 132}
133
134irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
135{
136 return d->hwirq;
137}
138EXPORT_SYMBOL_GPL(irqd_to_hwirq);
139
140irq_hw_number_t virq_to_hw(unsigned int virq)
141{
142 struct irq_data *irq_data = irq_get_irq_data(virq);
143 return WARN_ON(!irq_data) ? 0 : irq_data->hwirq;
144}
145EXPORT_SYMBOL_GPL(virq_to_hw);
diff --git a/arch/c6x/kernel/signal.c b/arch/c6x/kernel/signal.c
index 304f675826e9..3b5a05099989 100644
--- a/arch/c6x/kernel/signal.c
+++ b/arch/c6x/kernel/signal.c
@@ -85,10 +85,7 @@ asmlinkage int do_rt_sigreturn(struct pt_regs *regs)
85 goto badframe; 85 goto badframe;
86 86
87 sigdelsetmask(&set, ~_BLOCKABLE); 87 sigdelsetmask(&set, ~_BLOCKABLE);
88 spin_lock_irq(&current->sighand->siglock); 88 set_current_blocked(&set);
89 current->blocked = set;
90 recalc_sigpending();
91 spin_unlock_irq(&current->sighand->siglock);
92 89
93 if (restore_sigcontext(regs, &frame->uc.uc_mcontext)) 90 if (restore_sigcontext(regs, &frame->uc.uc_mcontext))
94 goto badframe; 91 goto badframe;
@@ -279,15 +276,8 @@ static int handle_signal(int sig,
279 276
280 /* Set up the stack frame */ 277 /* Set up the stack frame */
281 ret = setup_rt_frame(sig, ka, info, oldset, regs); 278 ret = setup_rt_frame(sig, ka, info, oldset, regs);
282 if (ret == 0) { 279 if (ret == 0)
283 spin_lock_irq(&current->sighand->siglock); 280 block_sigmask(ka, sig);
284 sigorsets(&current->blocked, &current->blocked,
285 &ka->sa.sa_mask);
286 if (!(ka->sa.sa_flags & SA_NODEFER))
287 sigaddset(&current->blocked, sig);
288 recalc_sigpending();
289 spin_unlock_irq(&current->sighand->siglock);
290 }
291 281
292 return ret; 282 return ret;
293} 283}
diff --git a/arch/frv/mb93090-mb00/pci-dma.c b/arch/frv/mb93090-mb00/pci-dma.c
index 41098a3803a2..4f8d8bcdc7de 100644
--- a/arch/frv/mb93090-mb00/pci-dma.c
+++ b/arch/frv/mb93090-mb00/pci-dma.c
@@ -13,6 +13,7 @@
13#include <linux/dma-mapping.h> 13#include <linux/dma-mapping.h>
14#include <linux/list.h> 14#include <linux/list.h>
15#include <linux/pci.h> 15#include <linux/pci.h>
16#include <linux/export.h>
16#include <linux/highmem.h> 17#include <linux/highmem.h>
17#include <linux/scatterlist.h> 18#include <linux/scatterlist.h>
18#include <asm/io.h> 19#include <asm/io.h>
diff --git a/arch/hexagon/include/asm/dma-mapping.h b/arch/hexagon/include/asm/dma-mapping.h
index 448b224ba4ef..233ed3d2d25e 100644
--- a/arch/hexagon/include/asm/dma-mapping.h
+++ b/arch/hexagon/include/asm/dma-mapping.h
@@ -71,29 +71,35 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
71 return (dma_addr == bad_dma_address); 71 return (dma_addr == bad_dma_address);
72} 72}
73 73
74static inline void *dma_alloc_coherent(struct device *dev, size_t size, 74#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
75 dma_addr_t *dma_handle, gfp_t flag) 75
76static inline void *dma_alloc_attrs(struct device *dev, size_t size,
77 dma_addr_t *dma_handle, gfp_t flag,
78 struct dma_attrs *attrs)
76{ 79{
77 void *ret; 80 void *ret;
78 struct dma_map_ops *ops = get_dma_ops(dev); 81 struct dma_map_ops *ops = get_dma_ops(dev);
79 82
80 BUG_ON(!dma_ops); 83 BUG_ON(!dma_ops);
81 84
82 ret = ops->alloc_coherent(dev, size, dma_handle, flag); 85 ret = ops->alloc(dev, size, dma_handle, flag, attrs);
83 86
84 debug_dma_alloc_coherent(dev, size, *dma_handle, ret); 87 debug_dma_alloc_coherent(dev, size, *dma_handle, ret);
85 88
86 return ret; 89 return ret;
87} 90}
88 91
89static inline void dma_free_coherent(struct device *dev, size_t size, 92#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
90 void *cpu_addr, dma_addr_t dma_handle) 93
94static inline void dma_free_attrs(struct device *dev, size_t size,
95 void *cpu_addr, dma_addr_t dma_handle,
96 struct dma_attrs *attrs)
91{ 97{
92 struct dma_map_ops *dma_ops = get_dma_ops(dev); 98 struct dma_map_ops *dma_ops = get_dma_ops(dev);
93 99
94 BUG_ON(!dma_ops); 100 BUG_ON(!dma_ops);
95 101
96 dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); 102 dma_ops->free(dev, size, cpu_addr, dma_handle, attrs);
97 103
98 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); 104 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
99} 105}
diff --git a/arch/hexagon/kernel/dma.c b/arch/hexagon/kernel/dma.c
index e711ace62fdf..0f2367cc5493 100644
--- a/arch/hexagon/kernel/dma.c
+++ b/arch/hexagon/kernel/dma.c
@@ -22,6 +22,7 @@
22#include <linux/bootmem.h> 22#include <linux/bootmem.h>
23#include <linux/genalloc.h> 23#include <linux/genalloc.h>
24#include <asm/dma-mapping.h> 24#include <asm/dma-mapping.h>
25#include <linux/module.h>
25 26
26struct dma_map_ops *dma_ops; 27struct dma_map_ops *dma_ops;
27EXPORT_SYMBOL(dma_ops); 28EXPORT_SYMBOL(dma_ops);
@@ -54,7 +55,8 @@ static struct gen_pool *coherent_pool;
54/* Allocates from a pool of uncached memory that was reserved at boot time */ 55/* Allocates from a pool of uncached memory that was reserved at boot time */
55 56
56void *hexagon_dma_alloc_coherent(struct device *dev, size_t size, 57void *hexagon_dma_alloc_coherent(struct device *dev, size_t size,
57 dma_addr_t *dma_addr, gfp_t flag) 58 dma_addr_t *dma_addr, gfp_t flag,
59 struct dma_attrs *attrs)
58{ 60{
59 void *ret; 61 void *ret;
60 62
@@ -81,7 +83,7 @@ void *hexagon_dma_alloc_coherent(struct device *dev, size_t size,
81} 83}
82 84
83static void hexagon_free_coherent(struct device *dev, size_t size, void *vaddr, 85static void hexagon_free_coherent(struct device *dev, size_t size, void *vaddr,
84 dma_addr_t dma_addr) 86 dma_addr_t dma_addr, struct dma_attrs *attrs)
85{ 87{
86 gen_pool_free(coherent_pool, (unsigned long) vaddr, size); 88 gen_pool_free(coherent_pool, (unsigned long) vaddr, size);
87} 89}
@@ -202,8 +204,8 @@ static void hexagon_sync_single_for_device(struct device *dev,
202} 204}
203 205
204struct dma_map_ops hexagon_dma_ops = { 206struct dma_map_ops hexagon_dma_ops = {
205 .alloc_coherent = hexagon_dma_alloc_coherent, 207 .alloc = hexagon_dma_alloc_coherent,
206 .free_coherent = hexagon_free_coherent, 208 .free = hexagon_free_coherent,
207 .map_sg = hexagon_map_sg, 209 .map_sg = hexagon_map_sg,
208 .map_page = hexagon_map_page, 210 .map_page = hexagon_map_page,
209 .sync_single_for_cpu = hexagon_sync_single_for_cpu, 211 .sync_single_for_cpu = hexagon_sync_single_for_cpu,
diff --git a/arch/hexagon/kernel/process.c b/arch/hexagon/kernel/process.c
index 18c4f0b0f4ba..ff02821bfb7e 100644
--- a/arch/hexagon/kernel/process.c
+++ b/arch/hexagon/kernel/process.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Process creation support for Hexagon 2 * Process creation support for Hexagon
3 * 3 *
4 * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. 4 * Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and 7 * it under the terms of the GNU General Public License version 2 and
@@ -88,7 +88,7 @@ void (*idle_sleep)(void) = default_idle;
88void cpu_idle(void) 88void cpu_idle(void)
89{ 89{
90 while (1) { 90 while (1) {
91 tick_nohz_stop_sched_tick(1); 91 tick_nohz_idle_enter();
92 local_irq_disable(); 92 local_irq_disable();
93 while (!need_resched()) { 93 while (!need_resched()) {
94 idle_sleep(); 94 idle_sleep();
@@ -97,7 +97,7 @@ void cpu_idle(void)
97 local_irq_disable(); 97 local_irq_disable();
98 } 98 }
99 local_irq_enable(); 99 local_irq_enable();
100 tick_nohz_restart_sched_tick(); 100 tick_nohz_idle_exit();
101 schedule(); 101 schedule();
102 } 102 }
103} 103}
diff --git a/arch/hexagon/kernel/ptrace.c b/arch/hexagon/kernel/ptrace.c
index 32342de1a79c..96c3b2c4dbad 100644
--- a/arch/hexagon/kernel/ptrace.c
+++ b/arch/hexagon/kernel/ptrace.c
@@ -28,6 +28,7 @@
28#include <linux/ptrace.h> 28#include <linux/ptrace.h>
29#include <linux/regset.h> 29#include <linux/regset.h>
30#include <linux/user.h> 30#include <linux/user.h>
31#include <linux/elf.h>
31 32
32#include <asm/user.h> 33#include <asm/user.h>
33 34
diff --git a/arch/hexagon/kernel/smp.c b/arch/hexagon/kernel/smp.c
index 15d1fd22bbc5..1298141874a3 100644
--- a/arch/hexagon/kernel/smp.c
+++ b/arch/hexagon/kernel/smp.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SMP support for Hexagon 2 * SMP support for Hexagon
3 * 3 *
4 * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. 4 * Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and 7 * it under the terms of the GNU General Public License version 2 and
@@ -28,6 +28,7 @@
28#include <linux/sched.h> 28#include <linux/sched.h>
29#include <linux/smp.h> 29#include <linux/smp.h>
30#include <linux/spinlock.h> 30#include <linux/spinlock.h>
31#include <linux/cpu.h>
31 32
32#include <asm/time.h> /* timer_interrupt */ 33#include <asm/time.h> /* timer_interrupt */
33#include <asm/hexagon_vm.h> 34#include <asm/hexagon_vm.h>
@@ -35,7 +36,7 @@
35#define BASE_IPI_IRQ 26 36#define BASE_IPI_IRQ 26
36 37
37/* 38/*
38 * cpu_possible_map needs to be filled out prior to setup_per_cpu_areas 39 * cpu_possible_mask needs to be filled out prior to setup_per_cpu_areas
39 * (which is prior to any of our smp_prepare_cpu crap), in order to set 40 * (which is prior to any of our smp_prepare_cpu crap), in order to set
40 * up the... per_cpu areas. 41 * up the... per_cpu areas.
41 */ 42 */
@@ -177,7 +178,12 @@ void __cpuinit start_secondary(void)
177 178
178 printk(KERN_INFO "%s cpu %d\n", __func__, current_thread_info()->cpu); 179 printk(KERN_INFO "%s cpu %d\n", __func__, current_thread_info()->cpu);
179 180
181 notify_cpu_starting(cpu);
182
183 ipi_call_lock();
180 set_cpu_online(cpu, true); 184 set_cpu_online(cpu, true);
185 ipi_call_unlock();
186
181 local_irq_enable(); 187 local_irq_enable();
182 188
183 cpu_idle(); 189 cpu_idle();
@@ -208,7 +214,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
208 stack_start = ((void *) thread) + THREAD_SIZE; 214 stack_start = ((void *) thread) + THREAD_SIZE;
209 __vmstart(start_secondary, stack_start); 215 __vmstart(start_secondary, stack_start);
210 216
211 while (!cpu_isset(cpu, cpu_online_map)) 217 while (!cpu_online(cpu))
212 barrier(); 218 barrier();
213 219
214 return 0; 220 return 0;
@@ -229,7 +235,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
229 235
230 /* Right now, let's just fake it. */ 236 /* Right now, let's just fake it. */
231 for (i = 0; i < max_cpus; i++) 237 for (i = 0; i < max_cpus; i++)
232 cpu_set(i, cpu_present_map); 238 set_cpu_present(i, true);
233 239
234 /* Also need to register the interrupts for IPI */ 240 /* Also need to register the interrupts for IPI */
235 if (max_cpus > 1) 241 if (max_cpus > 1)
@@ -269,5 +275,5 @@ void smp_start_cpus(void)
269 int i; 275 int i;
270 276
271 for (i = 0; i < NR_CPUS; i++) 277 for (i = 0; i < NR_CPUS; i++)
272 cpu_set(i, cpu_possible_map); 278 set_cpu_possible(i, true);
273} 279}
diff --git a/arch/hexagon/kernel/time.c b/arch/hexagon/kernel/time.c
index 6bee15c9c113..5d9b33b67935 100644
--- a/arch/hexagon/kernel/time.c
+++ b/arch/hexagon/kernel/time.c
@@ -28,6 +28,7 @@
28#include <linux/of.h> 28#include <linux/of.h>
29#include <linux/of_address.h> 29#include <linux/of_address.h>
30#include <linux/of_irq.h> 30#include <linux/of_irq.h>
31#include <linux/module.h>
31 32
32#include <asm/timer-regs.h> 33#include <asm/timer-regs.h>
33#include <asm/hexagon_vm.h> 34#include <asm/hexagon_vm.h>
diff --git a/arch/hexagon/kernel/vdso.c b/arch/hexagon/kernel/vdso.c
index f212a453b527..5d39f42f7085 100644
--- a/arch/hexagon/kernel/vdso.c
+++ b/arch/hexagon/kernel/vdso.c
@@ -21,6 +21,7 @@
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/mm.h> 22#include <linux/mm.h>
23#include <linux/vmalloc.h> 23#include <linux/vmalloc.h>
24#include <linux/binfmts.h>
24 25
25#include <asm/vdso.h> 26#include <asm/vdso.h>
26 27
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
index f6ea3a3b4a84..bcda5b2d121a 100644
--- a/arch/ia64/hp/common/sba_iommu.c
+++ b/arch/ia64/hp/common/sba_iommu.c
@@ -1129,7 +1129,8 @@ void sba_unmap_single_attrs(struct device *dev, dma_addr_t iova, size_t size,
1129 * See Documentation/DMA-API-HOWTO.txt 1129 * See Documentation/DMA-API-HOWTO.txt
1130 */ 1130 */
1131static void * 1131static void *
1132sba_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flags) 1132sba_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
1133 gfp_t flags, struct dma_attrs *attrs)
1133{ 1134{
1134 struct ioc *ioc; 1135 struct ioc *ioc;
1135 void *addr; 1136 void *addr;
@@ -1191,8 +1192,8 @@ sba_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp
1191 * 1192 *
1192 * See Documentation/DMA-API-HOWTO.txt 1193 * See Documentation/DMA-API-HOWTO.txt
1193 */ 1194 */
1194static void sba_free_coherent (struct device *dev, size_t size, void *vaddr, 1195static void sba_free_coherent(struct device *dev, size_t size, void *vaddr,
1195 dma_addr_t dma_handle) 1196 dma_addr_t dma_handle, struct dma_attrs *attrs)
1196{ 1197{
1197 sba_unmap_single_attrs(dev, dma_handle, size, 0, NULL); 1198 sba_unmap_single_attrs(dev, dma_handle, size, 0, NULL);
1198 free_pages((unsigned long) vaddr, get_order(size)); 1199 free_pages((unsigned long) vaddr, get_order(size));
@@ -2212,8 +2213,8 @@ sba_page_override(char *str)
2212__setup("sbapagesize=",sba_page_override); 2213__setup("sbapagesize=",sba_page_override);
2213 2214
2214struct dma_map_ops sba_dma_ops = { 2215struct dma_map_ops sba_dma_ops = {
2215 .alloc_coherent = sba_alloc_coherent, 2216 .alloc = sba_alloc_coherent,
2216 .free_coherent = sba_free_coherent, 2217 .free = sba_free_coherent,
2217 .map_page = sba_map_page, 2218 .map_page = sba_map_page,
2218 .unmap_page = sba_unmap_page, 2219 .unmap_page = sba_unmap_page,
2219 .map_sg = sba_map_sg_attrs, 2220 .map_sg = sba_map_sg_attrs,
diff --git a/arch/ia64/include/asm/cmpxchg.h b/arch/ia64/include/asm/cmpxchg.h
index 4c96187e2049..4f37dbbb8640 100644
--- a/arch/ia64/include/asm/cmpxchg.h
+++ b/arch/ia64/include/asm/cmpxchg.h
@@ -1 +1,147 @@
1#include <asm/intrinsics.h> 1#ifndef _ASM_IA64_CMPXCHG_H
2#define _ASM_IA64_CMPXCHG_H
3
4/*
5 * Compare/Exchange, forked from asm/intrinsics.h
6 * which was:
7 *
8 * Copyright (C) 2002-2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 */
11
12#ifndef __ASSEMBLY__
13
14#include <linux/types.h>
15/* include compiler specific intrinsics */
16#include <asm/ia64regs.h>
17#ifdef __INTEL_COMPILER
18# include <asm/intel_intrin.h>
19#else
20# include <asm/gcc_intrin.h>
21#endif
22
23/*
24 * This function doesn't exist, so you'll get a linker error if
25 * something tries to do an invalid xchg().
26 */
27extern void ia64_xchg_called_with_bad_pointer(void);
28
29#define __xchg(x, ptr, size) \
30({ \
31 unsigned long __xchg_result; \
32 \
33 switch (size) { \
34 case 1: \
35 __xchg_result = ia64_xchg1((__u8 *)ptr, x); \
36 break; \
37 \
38 case 2: \
39 __xchg_result = ia64_xchg2((__u16 *)ptr, x); \
40 break; \
41 \
42 case 4: \
43 __xchg_result = ia64_xchg4((__u32 *)ptr, x); \
44 break; \
45 \
46 case 8: \
47 __xchg_result = ia64_xchg8((__u64 *)ptr, x); \
48 break; \
49 default: \
50 ia64_xchg_called_with_bad_pointer(); \
51 } \
52 __xchg_result; \
53})
54
55#define xchg(ptr, x) \
56((__typeof__(*(ptr))) __xchg((unsigned long) (x), (ptr), sizeof(*(ptr))))
57
58/*
59 * Atomic compare and exchange. Compare OLD with MEM, if identical,
60 * store NEW in MEM. Return the initial value in MEM. Success is
61 * indicated by comparing RETURN with OLD.
62 */
63
64#define __HAVE_ARCH_CMPXCHG 1
65
66/*
67 * This function doesn't exist, so you'll get a linker error
68 * if something tries to do an invalid cmpxchg().
69 */
70extern long ia64_cmpxchg_called_with_bad_pointer(void);
71
72#define ia64_cmpxchg(sem, ptr, old, new, size) \
73({ \
74 __u64 _o_, _r_; \
75 \
76 switch (size) { \
77 case 1: \
78 _o_ = (__u8) (long) (old); \
79 break; \
80 case 2: \
81 _o_ = (__u16) (long) (old); \
82 break; \
83 case 4: \
84 _o_ = (__u32) (long) (old); \
85 break; \
86 case 8: \
87 _o_ = (__u64) (long) (old); \
88 break; \
89 default: \
90 break; \
91 } \
92 switch (size) { \
93 case 1: \
94 _r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \
95 break; \
96 \
97 case 2: \
98 _r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \
99 break; \
100 \
101 case 4: \
102 _r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \
103 break; \
104 \
105 case 8: \
106 _r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \
107 break; \
108 \
109 default: \
110 _r_ = ia64_cmpxchg_called_with_bad_pointer(); \
111 break; \
112 } \
113 (__typeof__(old)) _r_; \
114})
115
116#define cmpxchg_acq(ptr, o, n) \
117 ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr)))
118#define cmpxchg_rel(ptr, o, n) \
119 ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr)))
120
121/* for compatibility with other platforms: */
122#define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
123#define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
124
125#define cmpxchg_local cmpxchg
126#define cmpxchg64_local cmpxchg64
127
128#ifdef CONFIG_IA64_DEBUG_CMPXCHG
129# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;
130# define CMPXCHG_BUGCHECK(v) \
131do { \
132 if (_cmpxchg_bugcheck_count-- <= 0) { \
133 void *ip; \
134 extern int printk(const char *fmt, ...); \
135 ip = (void *) ia64_getreg(_IA64_REG_IP); \
136 printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v));\
137 break; \
138 } \
139} while (0)
140#else /* !CONFIG_IA64_DEBUG_CMPXCHG */
141# define CMPXCHG_BUGCHECK_DECL
142# define CMPXCHG_BUGCHECK(v)
143#endif /* !CONFIG_IA64_DEBUG_CMPXCHG */
144
145#endif /* !__ASSEMBLY__ */
146
147#endif /* _ASM_IA64_CMPXCHG_H */
diff --git a/arch/ia64/include/asm/dma-mapping.h b/arch/ia64/include/asm/dma-mapping.h
index 4336d080b241..4f5e8148440d 100644
--- a/arch/ia64/include/asm/dma-mapping.h
+++ b/arch/ia64/include/asm/dma-mapping.h
@@ -23,23 +23,29 @@ extern void machvec_dma_sync_single(struct device *, dma_addr_t, size_t,
23extern void machvec_dma_sync_sg(struct device *, struct scatterlist *, int, 23extern void machvec_dma_sync_sg(struct device *, struct scatterlist *, int,
24 enum dma_data_direction); 24 enum dma_data_direction);
25 25
26static inline void *dma_alloc_coherent(struct device *dev, size_t size, 26#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
27 dma_addr_t *daddr, gfp_t gfp) 27
28static inline void *dma_alloc_attrs(struct device *dev, size_t size,
29 dma_addr_t *daddr, gfp_t gfp,
30 struct dma_attrs *attrs)
28{ 31{
29 struct dma_map_ops *ops = platform_dma_get_ops(dev); 32 struct dma_map_ops *ops = platform_dma_get_ops(dev);
30 void *caddr; 33 void *caddr;
31 34
32 caddr = ops->alloc_coherent(dev, size, daddr, gfp); 35 caddr = ops->alloc(dev, size, daddr, gfp, attrs);
33 debug_dma_alloc_coherent(dev, size, *daddr, caddr); 36 debug_dma_alloc_coherent(dev, size, *daddr, caddr);
34 return caddr; 37 return caddr;
35} 38}
36 39
37static inline void dma_free_coherent(struct device *dev, size_t size, 40#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
38 void *caddr, dma_addr_t daddr) 41
42static inline void dma_free_attrs(struct device *dev, size_t size,
43 void *caddr, dma_addr_t daddr,
44 struct dma_attrs *attrs)
39{ 45{
40 struct dma_map_ops *ops = platform_dma_get_ops(dev); 46 struct dma_map_ops *ops = platform_dma_get_ops(dev);
41 debug_dma_free_coherent(dev, size, caddr, daddr); 47 debug_dma_free_coherent(dev, size, caddr, daddr);
42 ops->free_coherent(dev, size, caddr, daddr); 48 ops->free(dev, size, caddr, daddr, attrs);
43} 49}
44 50
45#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 51#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
diff --git a/arch/ia64/include/asm/futex.h b/arch/ia64/include/asm/futex.h
index 0ab82cc2dc8f..d2bf1fd5e44f 100644
--- a/arch/ia64/include/asm/futex.h
+++ b/arch/ia64/include/asm/futex.h
@@ -106,15 +106,16 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
106 return -EFAULT; 106 return -EFAULT;
107 107
108 { 108 {
109 register unsigned long r8 __asm ("r8") = 0; 109 register unsigned long r8 __asm ("r8");
110 unsigned long prev; 110 unsigned long prev;
111 __asm__ __volatile__( 111 __asm__ __volatile__(
112 " mf;; \n" 112 " mf;; \n"
113 " mov ar.ccv=%3;; \n" 113 " mov %0=r0 \n"
114 "[1:] cmpxchg4.acq %0=[%1],%2,ar.ccv \n" 114 " mov ar.ccv=%4;; \n"
115 "[1:] cmpxchg4.acq %1=[%2],%3,ar.ccv \n"
115 " .xdata4 \"__ex_table\", 1b-., 2f-. \n" 116 " .xdata4 \"__ex_table\", 1b-., 2f-. \n"
116 "[2:]" 117 "[2:]"
117 : "=r" (prev) 118 : "=r" (r8), "=r" (prev)
118 : "r" (uaddr), "r" (newval), 119 : "r" (uaddr), "r" (newval),
119 "rO" ((long) (unsigned) oldval) 120 "rO" ((long) (unsigned) oldval)
120 : "memory"); 121 : "memory");
diff --git a/arch/ia64/include/asm/intrinsics.h b/arch/ia64/include/asm/intrinsics.h
index e4076b511829..d129e367e764 100644
--- a/arch/ia64/include/asm/intrinsics.h
+++ b/arch/ia64/include/asm/intrinsics.h
@@ -18,6 +18,7 @@
18#else 18#else
19# include <asm/gcc_intrin.h> 19# include <asm/gcc_intrin.h>
20#endif 20#endif
21#include <asm/cmpxchg.h>
21 22
22#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I) 23#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
23 24
@@ -81,119 +82,6 @@ extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
81 82
82#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */ 83#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
83 84
84/*
85 * This function doesn't exist, so you'll get a linker error if
86 * something tries to do an invalid xchg().
87 */
88extern void ia64_xchg_called_with_bad_pointer (void);
89
90#define __xchg(x,ptr,size) \
91({ \
92 unsigned long __xchg_result; \
93 \
94 switch (size) { \
95 case 1: \
96 __xchg_result = ia64_xchg1((__u8 *)ptr, x); \
97 break; \
98 \
99 case 2: \
100 __xchg_result = ia64_xchg2((__u16 *)ptr, x); \
101 break; \
102 \
103 case 4: \
104 __xchg_result = ia64_xchg4((__u32 *)ptr, x); \
105 break; \
106 \
107 case 8: \
108 __xchg_result = ia64_xchg8((__u64 *)ptr, x); \
109 break; \
110 default: \
111 ia64_xchg_called_with_bad_pointer(); \
112 } \
113 __xchg_result; \
114})
115
116#define xchg(ptr,x) \
117 ((__typeof__(*(ptr))) __xchg ((unsigned long) (x), (ptr), sizeof(*(ptr))))
118
119/*
120 * Atomic compare and exchange. Compare OLD with MEM, if identical,
121 * store NEW in MEM. Return the initial value in MEM. Success is
122 * indicated by comparing RETURN with OLD.
123 */
124
125#define __HAVE_ARCH_CMPXCHG 1
126
127/*
128 * This function doesn't exist, so you'll get a linker error
129 * if something tries to do an invalid cmpxchg().
130 */
131extern long ia64_cmpxchg_called_with_bad_pointer (void);
132
133#define ia64_cmpxchg(sem,ptr,old,new,size) \
134({ \
135 __u64 _o_, _r_; \
136 \
137 switch (size) { \
138 case 1: _o_ = (__u8 ) (long) (old); break; \
139 case 2: _o_ = (__u16) (long) (old); break; \
140 case 4: _o_ = (__u32) (long) (old); break; \
141 case 8: _o_ = (__u64) (long) (old); break; \
142 default: break; \
143 } \
144 switch (size) { \
145 case 1: \
146 _r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \
147 break; \
148 \
149 case 2: \
150 _r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \
151 break; \
152 \
153 case 4: \
154 _r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \
155 break; \
156 \
157 case 8: \
158 _r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \
159 break; \
160 \
161 default: \
162 _r_ = ia64_cmpxchg_called_with_bad_pointer(); \
163 break; \
164 } \
165 (__typeof__(old)) _r_; \
166})
167
168#define cmpxchg_acq(ptr, o, n) \
169 ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr)))
170#define cmpxchg_rel(ptr, o, n) \
171 ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr)))
172
173/* for compatibility with other platforms: */
174#define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
175#define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
176
177#define cmpxchg_local cmpxchg
178#define cmpxchg64_local cmpxchg64
179
180#ifdef CONFIG_IA64_DEBUG_CMPXCHG
181# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;
182# define CMPXCHG_BUGCHECK(v) \
183 do { \
184 if (_cmpxchg_bugcheck_count-- <= 0) { \
185 void *ip; \
186 extern int printk(const char *fmt, ...); \
187 ip = (void *) ia64_getreg(_IA64_REG_IP); \
188 printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v)); \
189 break; \
190 } \
191 } while (0)
192#else /* !CONFIG_IA64_DEBUG_CMPXCHG */
193# define CMPXCHG_BUGCHECK_DECL
194# define CMPXCHG_BUGCHECK(v)
195#endif /* !CONFIG_IA64_DEBUG_CMPXCHG */
196
197#endif 85#endif
198 86
199#ifdef __KERNEL__ 87#ifdef __KERNEL__
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index ac795d311f44..6f38b6120d96 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -839,7 +839,7 @@ static __init int setup_additional_cpus(char *s)
839early_param("additional_cpus", setup_additional_cpus); 839early_param("additional_cpus", setup_additional_cpus);
840 840
841/* 841/*
842 * cpu_possible_map should be static, it cannot change as CPUs 842 * cpu_possible_mask should be static, it cannot change as CPUs
843 * are onlined, or offlined. The reason is per-cpu data-structures 843 * are onlined, or offlined. The reason is per-cpu data-structures
844 * are allocated by some modules at init time, and dont expect to 844 * are allocated by some modules at init time, and dont expect to
845 * do this dynamically on cpu arrival/departure. 845 * do this dynamically on cpu arrival/departure.
diff --git a/arch/ia64/kernel/pci-swiotlb.c b/arch/ia64/kernel/pci-swiotlb.c
index d9485d952ed0..939260aeac98 100644
--- a/arch/ia64/kernel/pci-swiotlb.c
+++ b/arch/ia64/kernel/pci-swiotlb.c
@@ -15,16 +15,24 @@ int swiotlb __read_mostly;
15EXPORT_SYMBOL(swiotlb); 15EXPORT_SYMBOL(swiotlb);
16 16
17static void *ia64_swiotlb_alloc_coherent(struct device *dev, size_t size, 17static void *ia64_swiotlb_alloc_coherent(struct device *dev, size_t size,
18 dma_addr_t *dma_handle, gfp_t gfp) 18 dma_addr_t *dma_handle, gfp_t gfp,
19 struct dma_attrs *attrs)
19{ 20{
20 if (dev->coherent_dma_mask != DMA_BIT_MASK(64)) 21 if (dev->coherent_dma_mask != DMA_BIT_MASK(64))
21 gfp |= GFP_DMA; 22 gfp |= GFP_DMA;
22 return swiotlb_alloc_coherent(dev, size, dma_handle, gfp); 23 return swiotlb_alloc_coherent(dev, size, dma_handle, gfp);
23} 24}
24 25
26static void ia64_swiotlb_free_coherent(struct device *dev, size_t size,
27 void *vaddr, dma_addr_t dma_addr,
28 struct dma_attrs *attrs)
29{
30 swiotlb_free_coherent(dev, size, vaddr, dma_addr);
31}
32
25struct dma_map_ops swiotlb_dma_ops = { 33struct dma_map_ops swiotlb_dma_ops = {
26 .alloc_coherent = ia64_swiotlb_alloc_coherent, 34 .alloc = ia64_swiotlb_alloc_coherent,
27 .free_coherent = swiotlb_free_coherent, 35 .free = ia64_swiotlb_free_coherent,
28 .map_page = swiotlb_map_page, 36 .map_page = swiotlb_map_page,
29 .unmap_page = swiotlb_unmap_page, 37 .unmap_page = swiotlb_unmap_page,
30 .map_sg = swiotlb_map_sg_attrs, 38 .map_sg = swiotlb_map_sg_attrs,
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 9d0fd7d5bb82..f00ba025375d 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -604,12 +604,6 @@ pfm_unprotect_ctx_ctxsw(pfm_context_t *x, unsigned long f)
604 spin_unlock(&(x)->ctx_lock); 604 spin_unlock(&(x)->ctx_lock);
605} 605}
606 606
607static inline unsigned int
608pfm_do_munmap(struct mm_struct *mm, unsigned long addr, size_t len, int acct)
609{
610 return do_munmap(mm, addr, len);
611}
612
613static inline unsigned long 607static inline unsigned long
614pfm_get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags, unsigned long exec) 608pfm_get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags, unsigned long exec)
615{ 609{
@@ -1458,8 +1452,9 @@ pfm_unreserve_session(pfm_context_t *ctx, int is_syswide, unsigned int cpu)
1458 * a PROTECT_CTX() section. 1452 * a PROTECT_CTX() section.
1459 */ 1453 */
1460static int 1454static int
1461pfm_remove_smpl_mapping(struct task_struct *task, void *vaddr, unsigned long size) 1455pfm_remove_smpl_mapping(void *vaddr, unsigned long size)
1462{ 1456{
1457 struct task_struct *task = current;
1463 int r; 1458 int r;
1464 1459
1465 /* sanity checks */ 1460 /* sanity checks */
@@ -1473,13 +1468,8 @@ pfm_remove_smpl_mapping(struct task_struct *task, void *vaddr, unsigned long siz
1473 /* 1468 /*
1474 * does the actual unmapping 1469 * does the actual unmapping
1475 */ 1470 */
1476 down_write(&task->mm->mmap_sem); 1471 r = vm_munmap((unsigned long)vaddr, size);
1477 1472
1478 DPRINT(("down_write done smpl_vaddr=%p size=%lu\n", vaddr, size));
1479
1480 r = pfm_do_munmap(task->mm, (unsigned long)vaddr, size, 0);
1481
1482 up_write(&task->mm->mmap_sem);
1483 if (r !=0) { 1473 if (r !=0) {
1484 printk(KERN_ERR "perfmon: [%d] unable to unmap sampling buffer @%p size=%lu\n", task_pid_nr(task), vaddr, size); 1474 printk(KERN_ERR "perfmon: [%d] unable to unmap sampling buffer @%p size=%lu\n", task_pid_nr(task), vaddr, size);
1485 } 1475 }
@@ -1945,7 +1935,7 @@ pfm_flush(struct file *filp, fl_owner_t id)
1945 * because some VM function reenables interrupts. 1935 * because some VM function reenables interrupts.
1946 * 1936 *
1947 */ 1937 */
1948 if (smpl_buf_vaddr) pfm_remove_smpl_mapping(current, smpl_buf_vaddr, smpl_buf_size); 1938 if (smpl_buf_vaddr) pfm_remove_smpl_mapping(smpl_buf_vaddr, smpl_buf_size);
1949 1939
1950 return 0; 1940 return 0;
1951} 1941}
diff --git a/arch/ia64/sn/pci/pci_dma.c b/arch/ia64/sn/pci/pci_dma.c
index a9d310de57da..3290d6e00c31 100644
--- a/arch/ia64/sn/pci/pci_dma.c
+++ b/arch/ia64/sn/pci/pci_dma.c
@@ -76,7 +76,8 @@ EXPORT_SYMBOL(sn_dma_set_mask);
76 * more information. 76 * more information.
77 */ 77 */
78static void *sn_dma_alloc_coherent(struct device *dev, size_t size, 78static void *sn_dma_alloc_coherent(struct device *dev, size_t size,
79 dma_addr_t * dma_handle, gfp_t flags) 79 dma_addr_t * dma_handle, gfp_t flags,
80 struct dma_attrs *attrs)
80{ 81{
81 void *cpuaddr; 82 void *cpuaddr;
82 unsigned long phys_addr; 83 unsigned long phys_addr;
@@ -137,7 +138,7 @@ static void *sn_dma_alloc_coherent(struct device *dev, size_t size,
137 * any associated IOMMU mappings. 138 * any associated IOMMU mappings.
138 */ 139 */
139static void sn_dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, 140static void sn_dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
140 dma_addr_t dma_handle) 141 dma_addr_t dma_handle, struct dma_attrs *attrs)
141{ 142{
142 struct pci_dev *pdev = to_pci_dev(dev); 143 struct pci_dev *pdev = to_pci_dev(dev);
143 struct sn_pcibus_provider *provider = SN_PCIDEV_BUSPROVIDER(pdev); 144 struct sn_pcibus_provider *provider = SN_PCIDEV_BUSPROVIDER(pdev);
@@ -466,8 +467,8 @@ int sn_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size)
466} 467}
467 468
468static struct dma_map_ops sn_dma_ops = { 469static struct dma_map_ops sn_dma_ops = {
469 .alloc_coherent = sn_dma_alloc_coherent, 470 .alloc = sn_dma_alloc_coherent,
470 .free_coherent = sn_dma_free_coherent, 471 .free = sn_dma_free_coherent,
471 .map_page = sn_dma_map_page, 472 .map_page = sn_dma_map_page,
472 .unmap_page = sn_dma_unmap_page, 473 .unmap_page = sn_dma_unmap_page,
473 .map_sg = sn_dma_map_sg, 474 .map_sg = sn_dma_map_sg,
diff --git a/arch/m68k/configs/m5275evb_defconfig b/arch/m68k/configs/m5275evb_defconfig
index 33c32aeca12b..a1230e82bb1e 100644
--- a/arch/m68k/configs/m5275evb_defconfig
+++ b/arch/m68k/configs/m5275evb_defconfig
@@ -49,7 +49,6 @@ CONFIG_BLK_DEV_RAM=y
49CONFIG_NETDEVICES=y 49CONFIG_NETDEVICES=y
50CONFIG_NET_ETHERNET=y 50CONFIG_NET_ETHERNET=y
51CONFIG_FEC=y 51CONFIG_FEC=y
52CONFIG_FEC2=y
53# CONFIG_NETDEV_1000 is not set 52# CONFIG_NETDEV_1000 is not set
54# CONFIG_NETDEV_10000 is not set 53# CONFIG_NETDEV_10000 is not set
55CONFIG_PPP=y 54CONFIG_PPP=y
diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h
index 336e6173794f..f4e32de263a7 100644
--- a/arch/m68k/include/asm/atomic.h
+++ b/arch/m68k/include/asm/atomic.h
@@ -3,6 +3,7 @@
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <linux/irqflags.h> 5#include <linux/irqflags.h>
6#include <asm/cmpxchg.h>
6 7
7/* 8/*
8 * Atomic operations that C can't guarantee us. Useful for 9 * Atomic operations that C can't guarantee us. Useful for
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index 96fa6ed7e799..d9f62e0f46c0 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -980,6 +980,9 @@ int __init mac_platform_init(void)
980{ 980{
981 u8 *swim_base; 981 u8 *swim_base;
982 982
983 if (!MACH_IS_MAC)
984 return -ENODEV;
985
983 /* 986 /*
984 * Serial devices 987 * Serial devices
985 */ 988 */
diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c
index 7ed848c3b848..f91a53294c35 100644
--- a/arch/m68k/platform/527x/config.c
+++ b/arch/m68k/platform/527x/config.c
@@ -74,9 +74,7 @@ static void __init m527x_fec_init(void)
74 writew(par | 0xf00, MCF_IPSBAR + 0x100082); 74 writew(par | 0xf00, MCF_IPSBAR + 0x100082);
75 v = readb(MCF_IPSBAR + 0x100078); 75 v = readb(MCF_IPSBAR + 0x100078);
76 writeb(v | 0xc0, MCF_IPSBAR + 0x100078); 76 writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
77#endif
78 77
79#ifdef CONFIG_FEC2
80 /* Set multi-function pins to ethernet mode for fec1 */ 78 /* Set multi-function pins to ethernet mode for fec1 */
81 par = readw(MCF_IPSBAR + 0x100082); 79 par = readw(MCF_IPSBAR + 0x100082);
82 writew(par | 0xa0, MCF_IPSBAR + 0x100082); 80 writew(par | 0xa0, MCF_IPSBAR + 0x100082);
diff --git a/arch/m68k/platform/68EZ328/Makefile b/arch/m68k/platform/68EZ328/Makefile
index ee97735a242c..b44d799b1115 100644
--- a/arch/m68k/platform/68EZ328/Makefile
+++ b/arch/m68k/platform/68EZ328/Makefile
@@ -3,9 +3,3 @@
3# 3#
4 4
5obj-y := config.o 5obj-y := config.o
6
7extra-y := bootlogo.rh
8
9$(obj)/bootlogo.rh: $(src)/bootlogo.h
10 perl $(src)/../68328/bootlogo.pl < $(src)/bootlogo.h \
11 > $(obj)/bootlogo.rh
diff --git a/arch/m68k/platform/68VZ328/Makefile b/arch/m68k/platform/68VZ328/Makefile
index 447ffa0fd7c7..a49d75e65489 100644
--- a/arch/m68k/platform/68VZ328/Makefile
+++ b/arch/m68k/platform/68VZ328/Makefile
@@ -3,14 +3,9 @@
3# 3#
4 4
5obj-y := config.o 5obj-y := config.o
6logo-$(UCDIMM) := bootlogo.rh 6extra-$(DRAGEN2):= screen.h
7logo-$(DRAGEN2) := screen.h
8extra-y := $(logo-y)
9
10$(obj)/bootlogo.rh: $(src)/../68EZ328/bootlogo.h
11 perl $(src)/bootlogo.pl < $(src)/../68328/bootlogo.h > $(obj)/bootlogo.rh
12 7
13$(obj)/screen.h: $(src)/screen.xbm $(src)/xbm2lcd.pl 8$(obj)/screen.h: $(src)/screen.xbm $(src)/xbm2lcd.pl
14 perl $(src)/xbm2lcd.pl < $(src)/screen.xbm > $(obj)/screen.h 9 perl $(src)/xbm2lcd.pl < $(src)/screen.xbm > $(obj)/screen.h
15 10
16clean-files := $(obj)/screen.h $(obj)/bootlogo.rh 11clean-files := $(obj)/screen.h
diff --git a/arch/m68k/platform/68EZ328/bootlogo.h b/arch/m68k/platform/68VZ328/bootlogo.h
index e842bdae5839..b38e2b255142 100644
--- a/arch/m68k/platform/68EZ328/bootlogo.h
+++ b/arch/m68k/platform/68VZ328/bootlogo.h
@@ -1,6 +1,6 @@
1#define splash_width 640 1#define splash_width 640
2#define splash_height 480 2#define splash_height 480
3static unsigned char splash_bits[] = { 3unsigned char __attribute__ ((aligned(16))) bootlogo_bits[] = {
4 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 4 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 5 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
6 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 6 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
diff --git a/arch/m68k/platform/coldfire/device.c b/arch/m68k/platform/coldfire/device.c
index fa50c48292ff..7af97362b95c 100644
--- a/arch/m68k/platform/coldfire/device.c
+++ b/arch/m68k/platform/coldfire/device.c
@@ -114,7 +114,7 @@ static struct resource mcf_fec1_resources[] = {
114 114
115static struct platform_device mcf_fec1 = { 115static struct platform_device mcf_fec1 = {
116 .name = "fec", 116 .name = "fec",
117 .id = 0, 117 .id = 1,
118 .num_resources = ARRAY_SIZE(mcf_fec1_resources), 118 .num_resources = ARRAY_SIZE(mcf_fec1_resources),
119 .resource = mcf_fec1_resources, 119 .resource = mcf_fec1_resources,
120}; 120};
diff --git a/arch/m68k/q40/config.c b/arch/m68k/q40/config.c
index 512adb64f7dd..8a1ce327c963 100644
--- a/arch/m68k/q40/config.c
+++ b/arch/m68k/q40/config.c
@@ -334,6 +334,9 @@ static __init int q40_add_kbd_device(void)
334{ 334{
335 struct platform_device *pdev; 335 struct platform_device *pdev;
336 336
337 if (!MACH_IS_Q40)
338 return -ENODEV;
339
337 pdev = platform_device_register_simple("q40kbd", -1, NULL, 0); 340 pdev = platform_device_register_simple("q40kbd", -1, NULL, 0);
338 if (IS_ERR(pdev)) 341 if (IS_ERR(pdev))
339 return PTR_ERR(pdev); 342 return PTR_ERR(pdev);
diff --git a/arch/microblaze/include/asm/cmpxchg.h b/arch/microblaze/include/asm/cmpxchg.h
index 0094859abd9b..538afc0ab9f3 100644
--- a/arch/microblaze/include/asm/cmpxchg.h
+++ b/arch/microblaze/include/asm/cmpxchg.h
@@ -1,6 +1,8 @@
1#ifndef _ASM_MICROBLAZE_CMPXCHG_H 1#ifndef _ASM_MICROBLAZE_CMPXCHG_H
2#define _ASM_MICROBLAZE_CMPXCHG_H 2#define _ASM_MICROBLAZE_CMPXCHG_H
3 3
4#include <linux/irqflags.h>
5
4void __bad_xchg(volatile void *ptr, int size); 6void __bad_xchg(volatile void *ptr, int size);
5 7
6static inline unsigned long __xchg(unsigned long x, volatile void *ptr, 8static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
diff --git a/arch/microblaze/include/asm/dma-mapping.h b/arch/microblaze/include/asm/dma-mapping.h
index 3a3e5b886854..01d228286cb0 100644
--- a/arch/microblaze/include/asm/dma-mapping.h
+++ b/arch/microblaze/include/asm/dma-mapping.h
@@ -123,28 +123,34 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
123#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 123#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
124#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 124#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
125 125
126static inline void *dma_alloc_coherent(struct device *dev, size_t size, 126#define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)
127 dma_addr_t *dma_handle, gfp_t flag) 127
128static inline void *dma_alloc_attrs(struct device *dev, size_t size,
129 dma_addr_t *dma_handle, gfp_t flag,
130 struct dma_attrs *attrs)
128{ 131{
129 struct dma_map_ops *ops = get_dma_ops(dev); 132 struct dma_map_ops *ops = get_dma_ops(dev);
130 void *memory; 133 void *memory;
131 134
132 BUG_ON(!ops); 135 BUG_ON(!ops);
133 136
134 memory = ops->alloc_coherent(dev, size, dma_handle, flag); 137 memory = ops->alloc(dev, size, dma_handle, flag, attrs);
135 138
136 debug_dma_alloc_coherent(dev, size, *dma_handle, memory); 139 debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
137 return memory; 140 return memory;
138} 141}
139 142
140static inline void dma_free_coherent(struct device *dev, size_t size, 143#define dma_free_coherent(d,s,c,h) dma_free_attrs(d, s, c, h, NULL)
141 void *cpu_addr, dma_addr_t dma_handle) 144
145static inline void dma_free_attrs(struct device *dev, size_t size,
146 void *cpu_addr, dma_addr_t dma_handle,
147 struct dma_attrs *attrs)
142{ 148{
143 struct dma_map_ops *ops = get_dma_ops(dev); 149 struct dma_map_ops *ops = get_dma_ops(dev);
144 150
145 BUG_ON(!ops); 151 BUG_ON(!ops);
146 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); 152 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
147 ops->free_coherent(dev, size, cpu_addr, dma_handle); 153 ops->free(dev, size, cpu_addr, dma_handle, attrs);
148} 154}
149 155
150static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 156static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
diff --git a/arch/microblaze/include/asm/futex.h b/arch/microblaze/include/asm/futex.h
index b0526d2716fa..ff8cde159d9a 100644
--- a/arch/microblaze/include/asm/futex.h
+++ b/arch/microblaze/include/asm/futex.h
@@ -24,7 +24,7 @@
24 .word 1b,4b,2b,4b; \ 24 .word 1b,4b,2b,4b; \
25 .previous;" \ 25 .previous;" \
26 : "=&r" (oldval), "=&r" (ret) \ 26 : "=&r" (oldval), "=&r" (ret) \
27 : "b" (uaddr), "i" (-EFAULT), "r" (oparg) \ 27 : "r" (uaddr), "i" (-EFAULT), "r" (oparg) \
28 ); \ 28 ); \
29}) 29})
30 30
diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h
index 510a8e1c16ba..bffb54527299 100644
--- a/arch/microblaze/include/asm/processor.h
+++ b/arch/microblaze/include/asm/processor.h
@@ -31,6 +31,8 @@ extern const struct seq_operations cpuinfo_op;
31/* Do necessary setup to start up a newly executed thread. */ 31/* Do necessary setup to start up a newly executed thread. */
32void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp); 32void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp);
33 33
34extern void ret_from_fork(void);
35
34# endif /* __ASSEMBLY__ */ 36# endif /* __ASSEMBLY__ */
35 37
36# ifndef CONFIG_MMU 38# ifndef CONFIG_MMU
@@ -143,8 +145,6 @@ static inline void exit_thread(void)
143 145
144unsigned long get_wchan(struct task_struct *p); 146unsigned long get_wchan(struct task_struct *p);
145 147
146extern void ret_from_fork(void);
147
148/* The size allocated for kernel stacks. This _must_ be a power of two! */ 148/* The size allocated for kernel stacks. This _must_ be a power of two! */
149# define KERNEL_STACK_SIZE 0x2000 149# define KERNEL_STACK_SIZE 0x2000
150 150
diff --git a/arch/microblaze/kernel/dma.c b/arch/microblaze/kernel/dma.c
index 65a4af4cbbbe..a2bfa2ca5730 100644
--- a/arch/microblaze/kernel/dma.c
+++ b/arch/microblaze/kernel/dma.c
@@ -33,7 +33,8 @@ static unsigned long get_dma_direct_offset(struct device *dev)
33#define NOT_COHERENT_CACHE 33#define NOT_COHERENT_CACHE
34 34
35static void *dma_direct_alloc_coherent(struct device *dev, size_t size, 35static void *dma_direct_alloc_coherent(struct device *dev, size_t size,
36 dma_addr_t *dma_handle, gfp_t flag) 36 dma_addr_t *dma_handle, gfp_t flag,
37 struct dma_attrs *attrs)
37{ 38{
38#ifdef NOT_COHERENT_CACHE 39#ifdef NOT_COHERENT_CACHE
39 return consistent_alloc(flag, size, dma_handle); 40 return consistent_alloc(flag, size, dma_handle);
@@ -57,7 +58,8 @@ static void *dma_direct_alloc_coherent(struct device *dev, size_t size,
57} 58}
58 59
59static void dma_direct_free_coherent(struct device *dev, size_t size, 60static void dma_direct_free_coherent(struct device *dev, size_t size,
60 void *vaddr, dma_addr_t dma_handle) 61 void *vaddr, dma_addr_t dma_handle,
62 struct dma_attrs *attrs)
61{ 63{
62#ifdef NOT_COHERENT_CACHE 64#ifdef NOT_COHERENT_CACHE
63 consistent_free(size, vaddr); 65 consistent_free(size, vaddr);
@@ -176,8 +178,8 @@ dma_direct_sync_sg_for_device(struct device *dev,
176} 178}
177 179
178struct dma_map_ops dma_direct_ops = { 180struct dma_map_ops dma_direct_ops = {
179 .alloc_coherent = dma_direct_alloc_coherent, 181 .alloc = dma_direct_alloc_coherent,
180 .free_coherent = dma_direct_free_coherent, 182 .free = dma_direct_free_coherent,
181 .map_sg = dma_direct_map_sg, 183 .map_sg = dma_direct_map_sg,
182 .unmap_sg = dma_direct_unmap_sg, 184 .unmap_sg = dma_direct_unmap_sg,
183 .dma_supported = dma_direct_dma_supported, 185 .dma_supported = dma_direct_dma_supported,
diff --git a/arch/microblaze/kernel/early_printk.c b/arch/microblaze/kernel/early_printk.c
index ec485876d0d0..aba1f9a97d5d 100644
--- a/arch/microblaze/kernel/early_printk.c
+++ b/arch/microblaze/kernel/early_printk.c
@@ -176,6 +176,7 @@ void __init remap_early_printk(void)
176 base_addr = (u32) ioremap(base_addr, PAGE_SIZE); 176 base_addr = (u32) ioremap(base_addr, PAGE_SIZE);
177 printk(KERN_CONT "0x%x\n", base_addr); 177 printk(KERN_CONT "0x%x\n", base_addr);
178 178
179#ifdef CONFIG_MMU
179 /* 180 /*
180 * Early console is on the top of skipped TLB entries 181 * Early console is on the top of skipped TLB entries
181 * decrease tlb_skip size ensure that hardcoded TLB entry will be 182 * decrease tlb_skip size ensure that hardcoded TLB entry will be
@@ -189,6 +190,7 @@ void __init remap_early_printk(void)
189 * cmp rX, orig_base_addr 190 * cmp rX, orig_base_addr
190 */ 191 */
191 tlb_skip -= 1; 192 tlb_skip -= 1;
193#endif
192} 194}
193 195
194void __init disable_early_printk(void) 196void __init disable_early_printk(void)
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index 71af974aa24a..16d8dfd9094b 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -206,6 +206,7 @@ static int microblaze_debugfs_init(void)
206} 206}
207arch_initcall(microblaze_debugfs_init); 207arch_initcall(microblaze_debugfs_init);
208 208
209# ifdef CONFIG_MMU
209static int __init debugfs_tlb(void) 210static int __init debugfs_tlb(void)
210{ 211{
211 struct dentry *d; 212 struct dentry *d;
@@ -218,6 +219,7 @@ static int __init debugfs_tlb(void)
218 return -ENOMEM; 219 return -ENOMEM;
219} 220}
220device_initcall(debugfs_tlb); 221device_initcall(debugfs_tlb);
222# endif
221#endif 223#endif
222 224
223static int dflt_bus_notify(struct notifier_block *nb, 225static int dflt_bus_notify(struct notifier_block *nb,
diff --git a/arch/microblaze/kernel/unwind.c b/arch/microblaze/kernel/unwind.c
index 9781a528cfc9..6be4ae3c3351 100644
--- a/arch/microblaze/kernel/unwind.c
+++ b/arch/microblaze/kernel/unwind.c
@@ -24,6 +24,7 @@
24#include <asm/sections.h> 24#include <asm/sections.h>
25#include <asm/exceptions.h> 25#include <asm/exceptions.h>
26#include <asm/unwind.h> 26#include <asm/unwind.h>
27#include <asm/switch_to.h>
27 28
28struct stack_trace; 29struct stack_trace;
29 30
diff --git a/arch/microblaze/lib/uaccess_old.S b/arch/microblaze/lib/uaccess_old.S
index f037266cdaf3..f085995ee848 100644
--- a/arch/microblaze/lib/uaccess_old.S
+++ b/arch/microblaze/lib/uaccess_old.S
@@ -122,22 +122,22 @@ __strnlen_user:
12215: swi r24, r5, 0x0018 + offset; \ 12215: swi r24, r5, 0x0018 + offset; \
12316: swi r25, r5, 0x001C + offset; \ 12316: swi r25, r5, 0x001C + offset; \
124 .section __ex_table,"a"; \ 124 .section __ex_table,"a"; \
125 .word 1b, 0f; \ 125 .word 1b, 33f; \
126 .word 2b, 0f; \ 126 .word 2b, 33f; \
127 .word 3b, 0f; \ 127 .word 3b, 33f; \
128 .word 4b, 0f; \ 128 .word 4b, 33f; \
129 .word 5b, 0f; \ 129 .word 5b, 33f; \
130 .word 6b, 0f; \ 130 .word 6b, 33f; \
131 .word 7b, 0f; \ 131 .word 7b, 33f; \
132 .word 8b, 0f; \ 132 .word 8b, 33f; \
133 .word 9b, 0f; \ 133 .word 9b, 33f; \
134 .word 10b, 0f; \ 134 .word 10b, 33f; \
135 .word 11b, 0f; \ 135 .word 11b, 33f; \
136 .word 12b, 0f; \ 136 .word 12b, 33f; \
137 .word 13b, 0f; \ 137 .word 13b, 33f; \
138 .word 14b, 0f; \ 138 .word 14b, 33f; \
139 .word 15b, 0f; \ 139 .word 15b, 33f; \
140 .word 16b, 0f; \ 140 .word 16b, 33f; \
141 .text 141 .text
142 142
143#define COPY_80(offset) \ 143#define COPY_80(offset) \
@@ -190,14 +190,17 @@ w2: sw r4, r5, r3
190 190
191.align 4 /* Alignment is important to keep icache happy */ 191.align 4 /* Alignment is important to keep icache happy */
192page: /* Create room on stack and save registers for storign values */ 192page: /* Create room on stack and save registers for storign values */
193 addik r1, r1, -32 193 addik r1, r1, -40
194 swi r19, r1, 4 194 swi r5, r1, 0
195 swi r20, r1, 8 195 swi r6, r1, 4
196 swi r21, r1, 12 196 swi r7, r1, 8
197 swi r22, r1, 16 197 swi r19, r1, 12
198 swi r23, r1, 20 198 swi r20, r1, 16
199 swi r24, r1, 24 199 swi r21, r1, 20
200 swi r25, r1, 28 200 swi r22, r1, 24
201 swi r23, r1, 28
202 swi r24, r1, 32
203 swi r25, r1, 36
201loop: /* r4, r19, r20, r21, r22, r23, r24, r25 are used for storing values */ 204loop: /* r4, r19, r20, r21, r22, r23, r24, r25 are used for storing values */
202 /* Loop unrolling to get performance boost */ 205 /* Loop unrolling to get performance boost */
203 COPY_80(0x000); 206 COPY_80(0x000);
@@ -205,21 +208,44 @@ loop: /* r4, r19, r20, r21, r22, r23, r24, r25 are used for storing values */
205 COPY_80(0x100); 208 COPY_80(0x100);
206 COPY_80(0x180); 209 COPY_80(0x180);
207 /* copy loop */ 210 /* copy loop */
208 addik r6, r6, 0x200 211 addik r6, r6, 0x200
209 addik r7, r7, -0x200 212 addik r7, r7, -0x200
210 bneid r7, loop 213 bneid r7, loop
211 addik r5, r5, 0x200 214 addik r5, r5, 0x200
215
212 /* Restore register content */ 216 /* Restore register content */
213 lwi r19, r1, 4 217 lwi r5, r1, 0
214 lwi r20, r1, 8 218 lwi r6, r1, 4
215 lwi r21, r1, 12 219 lwi r7, r1, 8
216 lwi r22, r1, 16 220 lwi r19, r1, 12
217 lwi r23, r1, 20 221 lwi r20, r1, 16
218 lwi r24, r1, 24 222 lwi r21, r1, 20
219 lwi r25, r1, 28 223 lwi r22, r1, 24
220 addik r1, r1, 32 224 lwi r23, r1, 28
225 lwi r24, r1, 32
226 lwi r25, r1, 36
227 addik r1, r1, 40
221 /* return back */ 228 /* return back */
229 addik r3, r0, 0
230 rtsd r15, 8
231 nop
232
233/* Fault case - return temp count */
23433:
222 addik r3, r7, 0 235 addik r3, r7, 0
236 /* Restore register content */
237 lwi r5, r1, 0
238 lwi r6, r1, 4
239 lwi r7, r1, 8
240 lwi r19, r1, 12
241 lwi r20, r1, 16
242 lwi r21, r1, 20
243 lwi r22, r1, 24
244 lwi r23, r1, 28
245 lwi r24, r1, 32
246 lwi r25, r1, 36
247 addik r1, r1, 40
248 /* return back */
223 rtsd r15, 8 249 rtsd r15, 8
224 nop 250 nop
225 251
diff --git a/arch/mips/ath79/dev-wmac.c b/arch/mips/ath79/dev-wmac.c
index e21507052066..9c717bf98ffe 100644
--- a/arch/mips/ath79/dev-wmac.c
+++ b/arch/mips/ath79/dev-wmac.c
@@ -58,8 +58,8 @@ static void __init ar913x_wmac_setup(void)
58 58
59static int ar933x_wmac_reset(void) 59static int ar933x_wmac_reset(void)
60{ 60{
61 ath79_device_reset_clear(AR933X_RESET_WMAC);
62 ath79_device_reset_set(AR933X_RESET_WMAC); 61 ath79_device_reset_set(AR933X_RESET_WMAC);
62 ath79_device_reset_clear(AR933X_RESET_WMAC);
63 63
64 return 0; 64 return 0;
65} 65}
diff --git a/arch/mips/cavium-octeon/dma-octeon.c b/arch/mips/cavium-octeon/dma-octeon.c
index b6bb92c16a47..41dd00884975 100644
--- a/arch/mips/cavium-octeon/dma-octeon.c
+++ b/arch/mips/cavium-octeon/dma-octeon.c
@@ -157,7 +157,7 @@ static void octeon_dma_sync_sg_for_device(struct device *dev,
157} 157}
158 158
159static void *octeon_dma_alloc_coherent(struct device *dev, size_t size, 159static void *octeon_dma_alloc_coherent(struct device *dev, size_t size,
160 dma_addr_t *dma_handle, gfp_t gfp) 160 dma_addr_t *dma_handle, gfp_t gfp, struct dma_attrs *attrs)
161{ 161{
162 void *ret; 162 void *ret;
163 163
@@ -192,7 +192,7 @@ static void *octeon_dma_alloc_coherent(struct device *dev, size_t size,
192} 192}
193 193
194static void octeon_dma_free_coherent(struct device *dev, size_t size, 194static void octeon_dma_free_coherent(struct device *dev, size_t size,
195 void *vaddr, dma_addr_t dma_handle) 195 void *vaddr, dma_addr_t dma_handle, struct dma_attrs *attrs)
196{ 196{
197 int order = get_order(size); 197 int order = get_order(size);
198 198
@@ -240,8 +240,8 @@ EXPORT_SYMBOL(dma_to_phys);
240 240
241static struct octeon_dma_map_ops octeon_linear_dma_map_ops = { 241static struct octeon_dma_map_ops octeon_linear_dma_map_ops = {
242 .dma_map_ops = { 242 .dma_map_ops = {
243 .alloc_coherent = octeon_dma_alloc_coherent, 243 .alloc = octeon_dma_alloc_coherent,
244 .free_coherent = octeon_dma_free_coherent, 244 .free = octeon_dma_free_coherent,
245 .map_page = octeon_dma_map_page, 245 .map_page = octeon_dma_map_page,
246 .unmap_page = swiotlb_unmap_page, 246 .unmap_page = swiotlb_unmap_page,
247 .map_sg = octeon_dma_map_sg, 247 .map_sg = octeon_dma_map_sg,
@@ -325,8 +325,8 @@ void __init plat_swiotlb_setup(void)
325#ifdef CONFIG_PCI 325#ifdef CONFIG_PCI
326static struct octeon_dma_map_ops _octeon_pci_dma_map_ops = { 326static struct octeon_dma_map_ops _octeon_pci_dma_map_ops = {
327 .dma_map_ops = { 327 .dma_map_ops = {
328 .alloc_coherent = octeon_dma_alloc_coherent, 328 .alloc = octeon_dma_alloc_coherent,
329 .free_coherent = octeon_dma_free_coherent, 329 .free = octeon_dma_free_coherent,
330 .map_page = octeon_dma_map_page, 330 .map_page = octeon_dma_map_page,
331 .unmap_page = swiotlb_unmap_page, 331 .unmap_page = swiotlb_unmap_page,
332 .map_sg = octeon_dma_map_sg, 332 .map_sg = octeon_dma_map_sg,
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index c3e2b85c3b02..97e7ce9b50ed 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -78,7 +78,7 @@ static inline void octeon_send_ipi_mask(const struct cpumask *mask,
78} 78}
79 79
80/** 80/**
81 * Detect available CPUs, populate cpu_possible_map 81 * Detect available CPUs, populate cpu_possible_mask
82 */ 82 */
83static void octeon_smp_hotplug_setup(void) 83static void octeon_smp_hotplug_setup(void)
84{ 84{
@@ -268,7 +268,7 @@ static int octeon_cpu_disable(void)
268 268
269 spin_lock(&smp_reserve_lock); 269 spin_lock(&smp_reserve_lock);
270 270
271 cpu_clear(cpu, cpu_online_map); 271 set_cpu_online(cpu, false);
272 cpu_clear(cpu, cpu_callin_map); 272 cpu_clear(cpu, cpu_callin_map);
273 local_irq_disable(); 273 local_irq_disable();
274 fixup_irqs(); 274 fixup_irqs();
diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h
index 7aa37ddfca4b..be39a12901c6 100644
--- a/arch/mips/include/asm/dma-mapping.h
+++ b/arch/mips/include/asm/dma-mapping.h
@@ -57,25 +57,31 @@ dma_set_mask(struct device *dev, u64 mask)
57extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 57extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
58 enum dma_data_direction direction); 58 enum dma_data_direction direction);
59 59
60static inline void *dma_alloc_coherent(struct device *dev, size_t size, 60#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
61 dma_addr_t *dma_handle, gfp_t gfp) 61
62static inline void *dma_alloc_attrs(struct device *dev, size_t size,
63 dma_addr_t *dma_handle, gfp_t gfp,
64 struct dma_attrs *attrs)
62{ 65{
63 void *ret; 66 void *ret;
64 struct dma_map_ops *ops = get_dma_ops(dev); 67 struct dma_map_ops *ops = get_dma_ops(dev);
65 68
66 ret = ops->alloc_coherent(dev, size, dma_handle, gfp); 69 ret = ops->alloc(dev, size, dma_handle, gfp, attrs);
67 70
68 debug_dma_alloc_coherent(dev, size, *dma_handle, ret); 71 debug_dma_alloc_coherent(dev, size, *dma_handle, ret);
69 72
70 return ret; 73 return ret;
71} 74}
72 75
73static inline void dma_free_coherent(struct device *dev, size_t size, 76#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
74 void *vaddr, dma_addr_t dma_handle) 77
78static inline void dma_free_attrs(struct device *dev, size_t size,
79 void *vaddr, dma_addr_t dma_handle,
80 struct dma_attrs *attrs)
75{ 81{
76 struct dma_map_ops *ops = get_dma_ops(dev); 82 struct dma_map_ops *ops = get_dma_ops(dev);
77 83
78 ops->free_coherent(dev, size, vaddr, dma_handle); 84 ops->free(dev, size, vaddr, dma_handle, attrs);
79 85
80 debug_dma_free_coherent(dev, size, vaddr, dma_handle); 86 debug_dma_free_coherent(dev, size, vaddr, dma_handle);
81} 87}
diff --git a/arch/mips/include/asm/mach-jz4740/irq.h b/arch/mips/include/asm/mach-jz4740/irq.h
index a865c983c70a..5ad1a9c113c6 100644
--- a/arch/mips/include/asm/mach-jz4740/irq.h
+++ b/arch/mips/include/asm/mach-jz4740/irq.h
@@ -45,7 +45,7 @@
45#define JZ4740_IRQ_LCD JZ4740_IRQ(30) 45#define JZ4740_IRQ_LCD JZ4740_IRQ(30)
46 46
47/* 2nd-level interrupts */ 47/* 2nd-level interrupts */
48#define JZ4740_IRQ_DMA(x) (JZ4740_IRQ(32) + (X)) 48#define JZ4740_IRQ_DMA(x) (JZ4740_IRQ(32) + (x))
49 49
50#define JZ4740_IRQ_INTC_GPIO(x) (JZ4740_IRQ_GPIO0 - (x)) 50#define JZ4740_IRQ_INTC_GPIO(x) (JZ4740_IRQ_GPIO0 - (x))
51#define JZ4740_IRQ_GPIO(x) (JZ4740_IRQ(48) + (x)) 51#define JZ4740_IRQ_GPIO(x) (JZ4740_IRQ(48) + (x))
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index 73c0d45798de..9b02cfba7449 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -37,12 +37,6 @@ extern void tlbmiss_handler_setup_pgd(unsigned long pgd);
37 write_c0_xcontext((unsigned long) smp_processor_id() << 51); \ 37 write_c0_xcontext((unsigned long) smp_processor_id() << 51); \
38 } while (0) 38 } while (0)
39 39
40
41static inline unsigned long get_current_pgd(void)
42{
43 return PHYS_TO_XKSEG_CACHED((read_c0_context() >> 11) & ~0xfffUL);
44}
45
46#else /* CONFIG_MIPS_PGD_C0_CONTEXT: using pgd_current*/ 40#else /* CONFIG_MIPS_PGD_C0_CONTEXT: using pgd_current*/
47 41
48/* 42/*
diff --git a/arch/mips/kernel/mips-mt-fpaff.c b/arch/mips/kernel/mips-mt-fpaff.c
index 802e6160f37e..33f63bab478a 100644
--- a/arch/mips/kernel/mips-mt-fpaff.c
+++ b/arch/mips/kernel/mips-mt-fpaff.c
@@ -173,7 +173,7 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len,
173 if (retval) 173 if (retval)
174 goto out_unlock; 174 goto out_unlock;
175 175
176 cpus_and(mask, p->thread.user_cpus_allowed, cpu_possible_map); 176 cpumask_and(&mask, &p->thread.user_cpus_allowed, cpu_possible_mask);
177 177
178out_unlock: 178out_unlock:
179 read_unlock(&tasklist_lock); 179 read_unlock(&tasklist_lock);
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index e309665b6c81..f8b2c592514d 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -25,7 +25,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
25 int i; 25 int i;
26 26
27#ifdef CONFIG_SMP 27#ifdef CONFIG_SMP
28 if (!cpu_isset(n, cpu_online_map)) 28 if (!cpu_online(n))
29 return 0; 29 return 0;
30#endif 30#endif
31 31
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index 185ca00c4c84..d5a338a1739c 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -257,11 +257,8 @@ asmlinkage int sys_sigsuspend(nabi_no_regargs struct pt_regs regs)
257 return -EFAULT; 257 return -EFAULT;
258 sigdelsetmask(&newset, ~_BLOCKABLE); 258 sigdelsetmask(&newset, ~_BLOCKABLE);
259 259
260 spin_lock_irq(&current->sighand->siglock);
261 current->saved_sigmask = current->blocked; 260 current->saved_sigmask = current->blocked;
262 current->blocked = newset; 261 set_current_blocked(&newset);
263 recalc_sigpending();
264 spin_unlock_irq(&current->sighand->siglock);
265 262
266 current->state = TASK_INTERRUPTIBLE; 263 current->state = TASK_INTERRUPTIBLE;
267 schedule(); 264 schedule();
@@ -286,11 +283,8 @@ asmlinkage int sys_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
286 return -EFAULT; 283 return -EFAULT;
287 sigdelsetmask(&newset, ~_BLOCKABLE); 284 sigdelsetmask(&newset, ~_BLOCKABLE);
288 285
289 spin_lock_irq(&current->sighand->siglock);
290 current->saved_sigmask = current->blocked; 286 current->saved_sigmask = current->blocked;
291 current->blocked = newset; 287 set_current_blocked(&newset);
292 recalc_sigpending();
293 spin_unlock_irq(&current->sighand->siglock);
294 288
295 current->state = TASK_INTERRUPTIBLE; 289 current->state = TASK_INTERRUPTIBLE;
296 schedule(); 290 schedule();
@@ -362,10 +356,7 @@ asmlinkage void sys_sigreturn(nabi_no_regargs struct pt_regs regs)
362 goto badframe; 356 goto badframe;
363 357
364 sigdelsetmask(&blocked, ~_BLOCKABLE); 358 sigdelsetmask(&blocked, ~_BLOCKABLE);
365 spin_lock_irq(&current->sighand->siglock); 359 set_current_blocked(&blocked);
366 current->blocked = blocked;
367 recalc_sigpending();
368 spin_unlock_irq(&current->sighand->siglock);
369 360
370 sig = restore_sigcontext(&regs, &frame->sf_sc); 361 sig = restore_sigcontext(&regs, &frame->sf_sc);
371 if (sig < 0) 362 if (sig < 0)
@@ -401,10 +392,7 @@ asmlinkage void sys_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
401 goto badframe; 392 goto badframe;
402 393
403 sigdelsetmask(&set, ~_BLOCKABLE); 394 sigdelsetmask(&set, ~_BLOCKABLE);
404 spin_lock_irq(&current->sighand->siglock); 395 set_current_blocked(&set);
405 current->blocked = set;
406 recalc_sigpending();
407 spin_unlock_irq(&current->sighand->siglock);
408 396
409 sig = restore_sigcontext(&regs, &frame->rs_uc.uc_mcontext); 397 sig = restore_sigcontext(&regs, &frame->rs_uc.uc_mcontext);
410 if (sig < 0) 398 if (sig < 0)
@@ -580,12 +568,7 @@ static int handle_signal(unsigned long sig, siginfo_t *info,
580 if (ret) 568 if (ret)
581 return ret; 569 return ret;
582 570
583 spin_lock_irq(&current->sighand->siglock); 571 block_sigmask(ka, sig);
584 sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
585 if (!(ka->sa.sa_flags & SA_NODEFER))
586 sigaddset(&current->blocked, sig);
587 recalc_sigpending();
588 spin_unlock_irq(&current->sighand->siglock);
589 572
590 return ret; 573 return ret;
591} 574}
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index 06b5da392e24..ac3b8d89aae5 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -290,11 +290,8 @@ asmlinkage int sys32_sigsuspend(nabi_no_regargs struct pt_regs regs)
290 return -EFAULT; 290 return -EFAULT;
291 sigdelsetmask(&newset, ~_BLOCKABLE); 291 sigdelsetmask(&newset, ~_BLOCKABLE);
292 292
293 spin_lock_irq(&current->sighand->siglock);
294 current->saved_sigmask = current->blocked; 293 current->saved_sigmask = current->blocked;
295 current->blocked = newset; 294 set_current_blocked(&newset);
296 recalc_sigpending();
297 spin_unlock_irq(&current->sighand->siglock);
298 295
299 current->state = TASK_INTERRUPTIBLE; 296 current->state = TASK_INTERRUPTIBLE;
300 schedule(); 297 schedule();
@@ -318,11 +315,8 @@ asmlinkage int sys32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
318 return -EFAULT; 315 return -EFAULT;
319 sigdelsetmask(&newset, ~_BLOCKABLE); 316 sigdelsetmask(&newset, ~_BLOCKABLE);
320 317
321 spin_lock_irq(&current->sighand->siglock);
322 current->saved_sigmask = current->blocked; 318 current->saved_sigmask = current->blocked;
323 current->blocked = newset; 319 set_current_blocked(&newset);
324 recalc_sigpending();
325 spin_unlock_irq(&current->sighand->siglock);
326 320
327 current->state = TASK_INTERRUPTIBLE; 321 current->state = TASK_INTERRUPTIBLE;
328 schedule(); 322 schedule();
@@ -488,10 +482,7 @@ asmlinkage void sys32_sigreturn(nabi_no_regargs struct pt_regs regs)
488 goto badframe; 482 goto badframe;
489 483
490 sigdelsetmask(&blocked, ~_BLOCKABLE); 484 sigdelsetmask(&blocked, ~_BLOCKABLE);
491 spin_lock_irq(&current->sighand->siglock); 485 set_current_blocked(&blocked);
492 current->blocked = blocked;
493 recalc_sigpending();
494 spin_unlock_irq(&current->sighand->siglock);
495 486
496 sig = restore_sigcontext32(&regs, &frame->sf_sc); 487 sig = restore_sigcontext32(&regs, &frame->sf_sc);
497 if (sig < 0) 488 if (sig < 0)
@@ -529,10 +520,7 @@ asmlinkage void sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
529 goto badframe; 520 goto badframe;
530 521
531 sigdelsetmask(&set, ~_BLOCKABLE); 522 sigdelsetmask(&set, ~_BLOCKABLE);
532 spin_lock_irq(&current->sighand->siglock); 523 set_current_blocked(&set);
533 current->blocked = set;
534 recalc_sigpending();
535 spin_unlock_irq(&current->sighand->siglock);
536 524
537 sig = restore_sigcontext32(&regs, &frame->rs_uc.uc_mcontext); 525 sig = restore_sigcontext32(&regs, &frame->rs_uc.uc_mcontext);
538 if (sig < 0) 526 if (sig < 0)
diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c
index ae29e894ab8d..86eb4b04631c 100644
--- a/arch/mips/kernel/signal_n32.c
+++ b/arch/mips/kernel/signal_n32.c
@@ -93,11 +93,8 @@ asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
93 sigset_from_compat(&newset, &uset); 93 sigset_from_compat(&newset, &uset);
94 sigdelsetmask(&newset, ~_BLOCKABLE); 94 sigdelsetmask(&newset, ~_BLOCKABLE);
95 95
96 spin_lock_irq(&current->sighand->siglock);
97 current->saved_sigmask = current->blocked; 96 current->saved_sigmask = current->blocked;
98 current->blocked = newset; 97 set_current_blocked(&newset);
99 recalc_sigpending();
100 spin_unlock_irq(&current->sighand->siglock);
101 98
102 current->state = TASK_INTERRUPTIBLE; 99 current->state = TASK_INTERRUPTIBLE;
103 schedule(); 100 schedule();
@@ -121,10 +118,7 @@ asmlinkage void sysn32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
121 goto badframe; 118 goto badframe;
122 119
123 sigdelsetmask(&set, ~_BLOCKABLE); 120 sigdelsetmask(&set, ~_BLOCKABLE);
124 spin_lock_irq(&current->sighand->siglock); 121 set_current_blocked(&set);
125 current->blocked = set;
126 recalc_sigpending();
127 spin_unlock_irq(&current->sighand->siglock);
128 122
129 sig = restore_sigcontext(&regs, &frame->rs_uc.uc_mcontext); 123 sig = restore_sigcontext(&regs, &frame->rs_uc.uc_mcontext);
130 if (sig < 0) 124 if (sig < 0)
diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
index ca673569fd24..3046e2986006 100644
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -317,7 +317,7 @@ static int bmips_cpu_disable(void)
317 317
318 pr_info("SMP: CPU%d is offline\n", cpu); 318 pr_info("SMP: CPU%d is offline\n", cpu);
319 319
320 cpu_clear(cpu, cpu_online_map); 320 set_cpu_online(cpu, false);
321 cpu_clear(cpu, cpu_callin_map); 321 cpu_clear(cpu, cpu_callin_map);
322 322
323 local_flush_tlb_all(); 323 local_flush_tlb_all();
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 9c1cce9de35f..ba9376bf52a1 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -148,7 +148,7 @@ static void stop_this_cpu(void *dummy)
148 /* 148 /*
149 * Remove this CPU: 149 * Remove this CPU:
150 */ 150 */
151 cpu_clear(smp_processor_id(), cpu_online_map); 151 set_cpu_online(smp_processor_id(), false);
152 for (;;) { 152 for (;;) {
153 if (cpu_wait) 153 if (cpu_wait)
154 (*cpu_wait)(); /* Wait if available. */ 154 (*cpu_wait)(); /* Wait if available. */
@@ -174,7 +174,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
174 mp_ops->prepare_cpus(max_cpus); 174 mp_ops->prepare_cpus(max_cpus);
175 set_cpu_sibling_map(0); 175 set_cpu_sibling_map(0);
176#ifndef CONFIG_HOTPLUG_CPU 176#ifndef CONFIG_HOTPLUG_CPU
177 init_cpu_present(&cpu_possible_map); 177 init_cpu_present(cpu_possible_mask);
178#endif 178#endif
179} 179}
180 180
@@ -248,7 +248,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
248 while (!cpu_isset(cpu, cpu_callin_map)) 248 while (!cpu_isset(cpu, cpu_callin_map))
249 udelay(100); 249 udelay(100);
250 250
251 cpu_set(cpu, cpu_online_map); 251 set_cpu_online(cpu, true);
252 252
253 return 0; 253 return 0;
254} 254}
@@ -320,13 +320,12 @@ void flush_tlb_mm(struct mm_struct *mm)
320 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) { 320 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
321 smp_on_other_tlbs(flush_tlb_mm_ipi, mm); 321 smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
322 } else { 322 } else {
323 cpumask_t mask = cpu_online_map;
324 unsigned int cpu; 323 unsigned int cpu;
325 324
326 cpu_clear(smp_processor_id(), mask); 325 for_each_online_cpu(cpu) {
327 for_each_cpu_mask(cpu, mask) 326 if (cpu != smp_processor_id() && cpu_context(cpu, mm))
328 if (cpu_context(cpu, mm))
329 cpu_context(cpu, mm) = 0; 327 cpu_context(cpu, mm) = 0;
328 }
330 } 329 }
331 local_flush_tlb_mm(mm); 330 local_flush_tlb_mm(mm);
332 331
@@ -360,13 +359,12 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned l
360 359
361 smp_on_other_tlbs(flush_tlb_range_ipi, &fd); 360 smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
362 } else { 361 } else {
363 cpumask_t mask = cpu_online_map;
364 unsigned int cpu; 362 unsigned int cpu;
365 363
366 cpu_clear(smp_processor_id(), mask); 364 for_each_online_cpu(cpu) {
367 for_each_cpu_mask(cpu, mask) 365 if (cpu != smp_processor_id() && cpu_context(cpu, mm))
368 if (cpu_context(cpu, mm))
369 cpu_context(cpu, mm) = 0; 366 cpu_context(cpu, mm) = 0;
367 }
370 } 368 }
371 local_flush_tlb_range(vma, start, end); 369 local_flush_tlb_range(vma, start, end);
372 preempt_enable(); 370 preempt_enable();
@@ -407,13 +405,12 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
407 405
408 smp_on_other_tlbs(flush_tlb_page_ipi, &fd); 406 smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
409 } else { 407 } else {
410 cpumask_t mask = cpu_online_map;
411 unsigned int cpu; 408 unsigned int cpu;
412 409
413 cpu_clear(smp_processor_id(), mask); 410 for_each_online_cpu(cpu) {
414 for_each_cpu_mask(cpu, mask) 411 if (cpu != smp_processor_id() && cpu_context(cpu, vma->vm_mm))
415 if (cpu_context(cpu, vma->vm_mm))
416 cpu_context(cpu, vma->vm_mm) = 0; 412 cpu_context(cpu, vma->vm_mm) = 0;
413 }
417 } 414 }
418 local_flush_tlb_page(vma, page); 415 local_flush_tlb_page(vma, page);
419 preempt_enable(); 416 preempt_enable();
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index c4f75bbc0bd6..f5dd38f1d015 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -291,7 +291,7 @@ static void smtc_configure_tlb(void)
291 * possibly leave some TCs/VPEs as "slave" processors. 291 * possibly leave some TCs/VPEs as "slave" processors.
292 * 292 *
293 * Use c0_MVPConf0 to find out how many TCs are available, setting up 293 * Use c0_MVPConf0 to find out how many TCs are available, setting up
294 * cpu_possible_map and the logical/physical mappings. 294 * cpu_possible_mask and the logical/physical mappings.
295 */ 295 */
296 296
297int __init smtc_build_cpu_map(int start_cpu_slot) 297int __init smtc_build_cpu_map(int start_cpu_slot)
diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c
index 1f9ca07f53c8..47037ec5589b 100644
--- a/arch/mips/mm/c-octeon.c
+++ b/arch/mips/mm/c-octeon.c
@@ -80,9 +80,9 @@ static void octeon_flush_icache_all_cores(struct vm_area_struct *vma)
80 if (vma) 80 if (vma)
81 mask = *mm_cpumask(vma->vm_mm); 81 mask = *mm_cpumask(vma->vm_mm);
82 else 82 else
83 mask = cpu_online_map; 83 mask = *cpu_online_mask;
84 cpu_clear(cpu, mask); 84 cpumask_clear_cpu(cpu, &mask);
85 for_each_cpu_mask(cpu, mask) 85 for_each_cpu(cpu, &mask)
86 octeon_send_ipi_single(cpu, SMP_ICACHE_FLUSH); 86 octeon_send_ipi_single(cpu, SMP_ICACHE_FLUSH);
87 87
88 preempt_enable(); 88 preempt_enable();
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 46084912e588..3fab2046c8a4 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -98,7 +98,7 @@ void *dma_alloc_noncoherent(struct device *dev, size_t size,
98EXPORT_SYMBOL(dma_alloc_noncoherent); 98EXPORT_SYMBOL(dma_alloc_noncoherent);
99 99
100static void *mips_dma_alloc_coherent(struct device *dev, size_t size, 100static void *mips_dma_alloc_coherent(struct device *dev, size_t size,
101 dma_addr_t * dma_handle, gfp_t gfp) 101 dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs)
102{ 102{
103 void *ret; 103 void *ret;
104 104
@@ -132,7 +132,7 @@ void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
132EXPORT_SYMBOL(dma_free_noncoherent); 132EXPORT_SYMBOL(dma_free_noncoherent);
133 133
134static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr, 134static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
135 dma_addr_t dma_handle) 135 dma_addr_t dma_handle, struct dma_attrs *attrs)
136{ 136{
137 unsigned long addr = (unsigned long) vaddr; 137 unsigned long addr = (unsigned long) vaddr;
138 int order = get_order(size); 138 int order = get_order(size);
@@ -323,8 +323,8 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
323EXPORT_SYMBOL(dma_cache_sync); 323EXPORT_SYMBOL(dma_cache_sync);
324 324
325static struct dma_map_ops mips_default_dma_map_ops = { 325static struct dma_map_ops mips_default_dma_map_ops = {
326 .alloc_coherent = mips_dma_alloc_coherent, 326 .alloc = mips_dma_alloc_coherent,
327 .free_coherent = mips_dma_free_coherent, 327 .free = mips_dma_free_coherent,
328 .map_page = mips_dma_map_page, 328 .map_page = mips_dma_map_page,
329 .unmap_page = mips_dma_unmap_page, 329 .unmap_page = mips_dma_unmap_page,
330 .map_sg = mips_dma_map_sg, 330 .map_sg = mips_dma_map_sg,
diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c
index db17f49886c2..fab316de57e9 100644
--- a/arch/mips/netlogic/common/smp.c
+++ b/arch/mips/netlogic/common/smp.c
@@ -165,7 +165,7 @@ void __init nlm_smp_setup(void)
165 cpu_set(boot_cpu, phys_cpu_present_map); 165 cpu_set(boot_cpu, phys_cpu_present_map);
166 __cpu_number_map[boot_cpu] = 0; 166 __cpu_number_map[boot_cpu] = 0;
167 __cpu_logical_map[0] = boot_cpu; 167 __cpu_logical_map[0] = boot_cpu;
168 cpu_set(0, cpu_possible_map); 168 set_cpu_possible(0, true);
169 169
170 num_cpus = 1; 170 num_cpus = 1;
171 for (i = 0; i < NR_CPUS; i++) { 171 for (i = 0; i < NR_CPUS; i++) {
@@ -177,14 +177,14 @@ void __init nlm_smp_setup(void)
177 cpu_set(i, phys_cpu_present_map); 177 cpu_set(i, phys_cpu_present_map);
178 __cpu_number_map[i] = num_cpus; 178 __cpu_number_map[i] = num_cpus;
179 __cpu_logical_map[num_cpus] = i; 179 __cpu_logical_map[num_cpus] = i;
180 cpu_set(num_cpus, cpu_possible_map); 180 set_cpu_possible(num_cpus, true);
181 ++num_cpus; 181 ++num_cpus;
182 } 182 }
183 } 183 }
184 184
185 pr_info("Phys CPU present map: %lx, possible map %lx\n", 185 pr_info("Phys CPU present map: %lx, possible map %lx\n",
186 (unsigned long)phys_cpu_present_map.bits[0], 186 (unsigned long)phys_cpu_present_map.bits[0],
187 (unsigned long)cpu_possible_map.bits[0]); 187 (unsigned long)cpumask_bits(cpu_possible_mask)[0]);
188 188
189 pr_info("Detected %i Slave CPU(s)\n", num_cpus); 189 pr_info("Detected %i Slave CPU(s)\n", num_cpus);
190 nlm_set_nmi_handler(nlm_boot_secondary_cpus); 190 nlm_set_nmi_handler(nlm_boot_secondary_cpus);
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c
index 2608752898c0..b71fae231049 100644
--- a/arch/mips/pmc-sierra/yosemite/smp.c
+++ b/arch/mips/pmc-sierra/yosemite/smp.c
@@ -146,7 +146,7 @@ static void __cpuinit yos_boot_secondary(int cpu, struct task_struct *idle)
146} 146}
147 147
148/* 148/*
149 * Detect available CPUs, populate cpu_possible_map before smp_init 149 * Detect available CPUs, populate cpu_possible_mask before smp_init
150 * 150 *
151 * We don't want to start the secondary CPU yet nor do we have a nice probing 151 * We don't want to start the secondary CPU yet nor do we have a nice probing
152 * feature in PMON so we just assume presence of the secondary core. 152 * feature in PMON so we just assume presence of the secondary core.
@@ -155,10 +155,10 @@ static void __init yos_smp_setup(void)
155{ 155{
156 int i; 156 int i;
157 157
158 cpus_clear(cpu_possible_map); 158 init_cpu_possible(cpu_none_mask);
159 159
160 for (i = 0; i < 2; i++) { 160 for (i = 0; i < 2; i++) {
161 cpu_set(i, cpu_possible_map); 161 set_cpu_possible(i, true);
162 __cpu_number_map[i] = i; 162 __cpu_number_map[i] = i;
163 __cpu_logical_map[i] = i; 163 __cpu_logical_map[i] = i;
164 } 164 }
@@ -169,7 +169,7 @@ static void __init yos_prepare_cpus(unsigned int max_cpus)
169 /* 169 /*
170 * Be paranoid. Enable the IPI only if we're really about to go SMP. 170 * Be paranoid. Enable the IPI only if we're really about to go SMP.
171 */ 171 */
172 if (cpus_weight(cpu_possible_map)) 172 if (num_possible_cpus())
173 set_c0_status(STATUSF_IP5); 173 set_c0_status(STATUSF_IP5);
174} 174}
175 175
diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c
index c6851df9ab74..735b43bf8f82 100644
--- a/arch/mips/sgi-ip27/ip27-smp.c
+++ b/arch/mips/sgi-ip27/ip27-smp.c
@@ -76,7 +76,7 @@ static int do_cpumask(cnodeid_t cnode, nasid_t nasid, int highest)
76 /* Only let it join in if it's marked enabled */ 76 /* Only let it join in if it's marked enabled */
77 if ((acpu->cpu_info.flags & KLINFO_ENABLE) && 77 if ((acpu->cpu_info.flags & KLINFO_ENABLE) &&
78 (tot_cpus_found != NR_CPUS)) { 78 (tot_cpus_found != NR_CPUS)) {
79 cpu_set(cpuid, cpu_possible_map); 79 set_cpu_possible(cpuid, true);
80 alloc_cpupda(cpuid, tot_cpus_found); 80 alloc_cpupda(cpuid, tot_cpus_found);
81 cpus_found++; 81 cpus_found++;
82 tot_cpus_found++; 82 tot_cpus_found++;
diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c
index d667875be564..de88e22694a0 100644
--- a/arch/mips/sibyte/bcm1480/smp.c
+++ b/arch/mips/sibyte/bcm1480/smp.c
@@ -138,7 +138,7 @@ static void __cpuinit bcm1480_boot_secondary(int cpu, struct task_struct *idle)
138 138
139/* 139/*
140 * Use CFE to find out how many CPUs are available, setting up 140 * Use CFE to find out how many CPUs are available, setting up
141 * cpu_possible_map and the logical/physical mappings. 141 * cpu_possible_mask and the logical/physical mappings.
142 * XXXKW will the boot CPU ever not be physical 0? 142 * XXXKW will the boot CPU ever not be physical 0?
143 * 143 *
144 * Common setup before any secondaries are started 144 * Common setup before any secondaries are started
@@ -147,14 +147,13 @@ static void __init bcm1480_smp_setup(void)
147{ 147{
148 int i, num; 148 int i, num;
149 149
150 cpus_clear(cpu_possible_map); 150 init_cpu_possible(cpumask_of(0));
151 cpu_set(0, cpu_possible_map);
152 __cpu_number_map[0] = 0; 151 __cpu_number_map[0] = 0;
153 __cpu_logical_map[0] = 0; 152 __cpu_logical_map[0] = 0;
154 153
155 for (i = 1, num = 0; i < NR_CPUS; i++) { 154 for (i = 1, num = 0; i < NR_CPUS; i++) {
156 if (cfe_cpu_stop(i) == 0) { 155 if (cfe_cpu_stop(i) == 0) {
157 cpu_set(i, cpu_possible_map); 156 set_cpu_possible(i, true);
158 __cpu_number_map[i] = ++num; 157 __cpu_number_map[i] = ++num;
159 __cpu_logical_map[num] = i; 158 __cpu_logical_map[num] = i;
160 } 159 }
diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c
index 38e7f6bd7922..285cfef4ebc0 100644
--- a/arch/mips/sibyte/sb1250/smp.c
+++ b/arch/mips/sibyte/sb1250/smp.c
@@ -126,7 +126,7 @@ static void __cpuinit sb1250_boot_secondary(int cpu, struct task_struct *idle)
126 126
127/* 127/*
128 * Use CFE to find out how many CPUs are available, setting up 128 * Use CFE to find out how many CPUs are available, setting up
129 * cpu_possible_map and the logical/physical mappings. 129 * cpu_possible_mask and the logical/physical mappings.
130 * XXXKW will the boot CPU ever not be physical 0? 130 * XXXKW will the boot CPU ever not be physical 0?
131 * 131 *
132 * Common setup before any secondaries are started 132 * Common setup before any secondaries are started
@@ -135,14 +135,13 @@ static void __init sb1250_smp_setup(void)
135{ 135{
136 int i, num; 136 int i, num;
137 137
138 cpus_clear(cpu_possible_map); 138 init_cpu_possible(cpumask_of(0));
139 cpu_set(0, cpu_possible_map);
140 __cpu_number_map[0] = 0; 139 __cpu_number_map[0] = 0;
141 __cpu_logical_map[0] = 0; 140 __cpu_logical_map[0] = 0;
142 141
143 for (i = 1, num = 0; i < NR_CPUS; i++) { 142 for (i = 1, num = 0; i < NR_CPUS; i++) {
144 if (cfe_cpu_stop(i) == 0) { 143 if (cfe_cpu_stop(i) == 0) {
145 cpu_set(i, cpu_possible_map); 144 set_cpu_possible(i, true);
146 __cpu_number_map[i] = ++num; 145 __cpu_number_map[i] = ++num;
147 __cpu_logical_map[num] = i; 146 __cpu_logical_map[num] = i;
148 } 147 }
diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h
index 3ae56073cc3d..6c6defc24619 100644
--- a/arch/parisc/include/asm/atomic.h
+++ b/arch/parisc/include/asm/atomic.h
@@ -6,6 +6,7 @@
6#define _ASM_PARISC_ATOMIC_H_ 6#define _ASM_PARISC_ATOMIC_H_
7 7
8#include <linux/types.h> 8#include <linux/types.h>
9#include <asm/cmpxchg.h>
9 10
10/* 11/*
11 * Atomic operations that C can't guarantee us. Useful for 12 * Atomic operations that C can't guarantee us. Useful for
@@ -48,112 +49,6 @@ extern arch_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned;
48# define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0) 49# define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0)
49#endif 50#endif
50 51
51/* This should get optimized out since it's never called.
52** Or get a link error if xchg is used "wrong".
53*/
54extern void __xchg_called_with_bad_pointer(void);
55
56
57/* __xchg32/64 defined in arch/parisc/lib/bitops.c */
58extern unsigned long __xchg8(char, char *);
59extern unsigned long __xchg32(int, int *);
60#ifdef CONFIG_64BIT
61extern unsigned long __xchg64(unsigned long, unsigned long *);
62#endif
63
64/* optimizer better get rid of switch since size is a constant */
65static __inline__ unsigned long
66__xchg(unsigned long x, __volatile__ void * ptr, int size)
67{
68 switch(size) {
69#ifdef CONFIG_64BIT
70 case 8: return __xchg64(x,(unsigned long *) ptr);
71#endif
72 case 4: return __xchg32((int) x, (int *) ptr);
73 case 1: return __xchg8((char) x, (char *) ptr);
74 }
75 __xchg_called_with_bad_pointer();
76 return x;
77}
78
79
80/*
81** REVISIT - Abandoned use of LDCW in xchg() for now:
82** o need to test sizeof(*ptr) to avoid clearing adjacent bytes
83** o and while we are at it, could CONFIG_64BIT code use LDCD too?
84**
85** if (__builtin_constant_p(x) && (x == NULL))
86** if (((unsigned long)p & 0xf) == 0)
87** return __ldcw(p);
88*/
89#define xchg(ptr,x) \
90 ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
91
92
93#define __HAVE_ARCH_CMPXCHG 1
94
95/* bug catcher for when unsupported size is used - won't link */
96extern void __cmpxchg_called_with_bad_pointer(void);
97
98/* __cmpxchg_u32/u64 defined in arch/parisc/lib/bitops.c */
99extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old, unsigned int new_);
100extern unsigned long __cmpxchg_u64(volatile unsigned long *ptr, unsigned long old, unsigned long new_);
101
102/* don't worry...optimizer will get rid of most of this */
103static __inline__ unsigned long
104__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
105{
106 switch(size) {
107#ifdef CONFIG_64BIT
108 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
109#endif
110 case 4: return __cmpxchg_u32((unsigned int *)ptr, (unsigned int) old, (unsigned int) new_);
111 }
112 __cmpxchg_called_with_bad_pointer();
113 return old;
114}
115
116#define cmpxchg(ptr,o,n) \
117 ({ \
118 __typeof__(*(ptr)) _o_ = (o); \
119 __typeof__(*(ptr)) _n_ = (n); \
120 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
121 (unsigned long)_n_, sizeof(*(ptr))); \
122 })
123
124#include <asm-generic/cmpxchg-local.h>
125
126static inline unsigned long __cmpxchg_local(volatile void *ptr,
127 unsigned long old,
128 unsigned long new_, int size)
129{
130 switch (size) {
131#ifdef CONFIG_64BIT
132 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
133#endif
134 case 4: return __cmpxchg_u32(ptr, old, new_);
135 default:
136 return __cmpxchg_local_generic(ptr, old, new_, size);
137 }
138}
139
140/*
141 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
142 * them available.
143 */
144#define cmpxchg_local(ptr, o, n) \
145 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
146 (unsigned long)(n), sizeof(*(ptr))))
147#ifdef CONFIG_64BIT
148#define cmpxchg64_local(ptr, o, n) \
149 ({ \
150 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
151 cmpxchg_local((ptr), (o), (n)); \
152 })
153#else
154#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
155#endif
156
157/* 52/*
158 * Note that we need not lock read accesses - aligned word writes/reads 53 * Note that we need not lock read accesses - aligned word writes/reads
159 * are atomic, so a reader never sees inconsistent values. 54 * are atomic, so a reader never sees inconsistent values.
diff --git a/arch/parisc/include/asm/cmpxchg.h b/arch/parisc/include/asm/cmpxchg.h
new file mode 100644
index 000000000000..dbd13354ec41
--- /dev/null
+++ b/arch/parisc/include/asm/cmpxchg.h
@@ -0,0 +1,116 @@
1/*
2 * forked from parisc asm/atomic.h which was:
3 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
4 * Copyright (C) 2006 Kyle McMartin <kyle@parisc-linux.org>
5 */
6
7#ifndef _ASM_PARISC_CMPXCHG_H_
8#define _ASM_PARISC_CMPXCHG_H_
9
10/* This should get optimized out since it's never called.
11** Or get a link error if xchg is used "wrong".
12*/
13extern void __xchg_called_with_bad_pointer(void);
14
15/* __xchg32/64 defined in arch/parisc/lib/bitops.c */
16extern unsigned long __xchg8(char, char *);
17extern unsigned long __xchg32(int, int *);
18#ifdef CONFIG_64BIT
19extern unsigned long __xchg64(unsigned long, unsigned long *);
20#endif
21
22/* optimizer better get rid of switch since size is a constant */
23static inline unsigned long
24__xchg(unsigned long x, __volatile__ void *ptr, int size)
25{
26 switch (size) {
27#ifdef CONFIG_64BIT
28 case 8: return __xchg64(x, (unsigned long *) ptr);
29#endif
30 case 4: return __xchg32((int) x, (int *) ptr);
31 case 1: return __xchg8((char) x, (char *) ptr);
32 }
33 __xchg_called_with_bad_pointer();
34 return x;
35}
36
37/*
38** REVISIT - Abandoned use of LDCW in xchg() for now:
39** o need to test sizeof(*ptr) to avoid clearing adjacent bytes
40** o and while we are at it, could CONFIG_64BIT code use LDCD too?
41**
42** if (__builtin_constant_p(x) && (x == NULL))
43** if (((unsigned long)p & 0xf) == 0)
44** return __ldcw(p);
45*/
46#define xchg(ptr, x) \
47 ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
48
49#define __HAVE_ARCH_CMPXCHG 1
50
51/* bug catcher for when unsupported size is used - won't link */
52extern void __cmpxchg_called_with_bad_pointer(void);
53
54/* __cmpxchg_u32/u64 defined in arch/parisc/lib/bitops.c */
55extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old,
56 unsigned int new_);
57extern unsigned long __cmpxchg_u64(volatile unsigned long *ptr,
58 unsigned long old, unsigned long new_);
59
60/* don't worry...optimizer will get rid of most of this */
61static inline unsigned long
62__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
63{
64 switch (size) {
65#ifdef CONFIG_64BIT
66 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
67#endif
68 case 4: return __cmpxchg_u32((unsigned int *)ptr,
69 (unsigned int)old, (unsigned int)new_);
70 }
71 __cmpxchg_called_with_bad_pointer();
72 return old;
73}
74
75#define cmpxchg(ptr, o, n) \
76({ \
77 __typeof__(*(ptr)) _o_ = (o); \
78 __typeof__(*(ptr)) _n_ = (n); \
79 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
80 (unsigned long)_n_, sizeof(*(ptr))); \
81})
82
83#include <asm-generic/cmpxchg-local.h>
84
85static inline unsigned long __cmpxchg_local(volatile void *ptr,
86 unsigned long old,
87 unsigned long new_, int size)
88{
89 switch (size) {
90#ifdef CONFIG_64BIT
91 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
92#endif
93 case 4: return __cmpxchg_u32(ptr, old, new_);
94 default:
95 return __cmpxchg_local_generic(ptr, old, new_, size);
96 }
97}
98
99/*
100 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
101 * them available.
102 */
103#define cmpxchg_local(ptr, o, n) \
104 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
105 (unsigned long)(n), sizeof(*(ptr))))
106#ifdef CONFIG_64BIT
107#define cmpxchg64_local(ptr, o, n) \
108({ \
109 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
110 cmpxchg_local((ptr), (o), (n)); \
111})
112#else
113#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
114#endif
115
116#endif /* _ASM_PARISC_CMPXCHG_H_ */
diff --git a/arch/parisc/kernel/pdc_cons.c b/arch/parisc/kernel/pdc_cons.c
index 4f004596a6e7..0b3393381a81 100644
--- a/arch/parisc/kernel/pdc_cons.c
+++ b/arch/parisc/kernel/pdc_cons.c
@@ -104,7 +104,7 @@ static int pdc_console_tty_open(struct tty_struct *tty, struct file *filp)
104 104
105static void pdc_console_tty_close(struct tty_struct *tty, struct file *filp) 105static void pdc_console_tty_close(struct tty_struct *tty, struct file *filp)
106{ 106{
107 if (!tty->count) { 107 if (tty->count == 1) {
108 del_timer_sync(&pdc_console_timer); 108 del_timer_sync(&pdc_console_timer);
109 tty_port_tty_set(&tty_port, NULL); 109 tty_port_tty_set(&tty_port, NULL);
110 } 110 }
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi
new file mode 100644
index 000000000000..1cf0b77b1efe
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi
@@ -0,0 +1,43 @@
1/*
2 * PQ3 MPIC Message (Group B) device tree stub [ controller @ offset 0x42400 ]
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35message@42400 {
36 compatible = "fsl,mpic-v3.1-msgr";
37 reg = <0x42400 0x200>;
38 interrupts = <
39 0xb4 2 0 0
40 0xb5 2 0 0
41 0xb6 2 0 0
42 0xb7 2 0 0>;
43};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
index fdedf7b1fe0f..71c30eb10056 100644
--- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
@@ -53,6 +53,16 @@ timer@41100 {
53 3 0 3 0>; 53 3 0 3 0>;
54}; 54};
55 55
56message@41400 {
57 compatible = "fsl,mpic-v3.1-msgr";
58 reg = <0x41400 0x200>;
59 interrupts = <
60 0xb0 2 0 0
61 0xb1 2 0 0
62 0xb2 2 0 0
63 0xb3 2 0 0>;
64};
65
56msi@41600 { 66msi@41600 {
57 compatible = "fsl,mpic-msi"; 67 compatible = "fsl,mpic-msi";
58 reg = <0x41600 0x80>; 68 reg = <0x41600 0x80>;
diff --git a/arch/powerpc/boot/dts/p1020mbg-pc.dtsi b/arch/powerpc/boot/dts/p1020mbg-pc.dtsi
new file mode 100644
index 000000000000..a24699cfea9c
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020mbg-pc.dtsi
@@ -0,0 +1,151 @@
1/*
2 * P1020 MBG-PC Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x4000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 /* 128KB for DTB Image */
46 reg = <0x0 0x00020000>;
47 label = "NOR DTB Image";
48 };
49
50 partition@20000 {
51 /* 3.875 MB for Linux Kernel Image */
52 reg = <0x00020000 0x003e0000>;
53 label = "NOR Linux Kernel Image";
54 };
55
56 partition@400000 {
57 /* 58MB for Root file System */
58 reg = <0x00400000 0x03a00000>;
59 label = "NOR Root File System";
60 };
61
62 partition@3e00000 {
63 /* This location must not be altered */
64 /* 1M for Vitesse 7385 Switch firmware */
65 reg = <0x3e00000 0x00100000>;
66 label = "NOR Vitesse-7385 Firmware";
67 read-only;
68 };
69
70 partition@3f00000 {
71 /* This location must not be altered */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
74 reg = <0x03f00000 0x00100000>;
75 label = "NOR U-Boot Image";
76 read-only;
77 };
78 };
79
80 L2switch@2,0 {
81 #address-cells = <1>;
82 #size-cells = <1>;
83 compatible = "vitesse-7385";
84 reg = <0x2 0x0 0x20000>;
85 };
86};
87
88&soc {
89 i2c@3000 {
90 rtc@68 {
91 compatible = "dallas,ds1339";
92 reg = <0x68>;
93 };
94 };
95
96 mdio@24000 {
97 phy0: ethernet-phy@0 {
98 interrupts = <3 1 0 0>;
99 reg = <0x0>;
100 };
101 phy1: ethernet-phy@1 {
102 interrupts = <2 1 0 0>;
103 reg = <0x1>;
104 };
105 };
106
107 mdio@25000 {
108 tbi1: tbi-phy@11 {
109 reg = <0x11>;
110 device_type = "tbi-phy";
111 };
112 };
113
114 mdio@26000 {
115 tbi2: tbi-phy@11 {
116 reg = <0x11>;
117 device_type = "tbi-phy";
118 };
119 };
120
121 enet0: ethernet@b0000 {
122 fixed-link = <1 1 1000 0 0>;
123 phy-connection-type = "rgmii-id";
124 };
125
126 enet1: ethernet@b1000 {
127 phy-handle = <&phy0>;
128 tbi-handle = <&tbi1>;
129 phy-connection-type = "sgmii";
130 };
131
132 enet2: ethernet@b2000 {
133 phy-handle = <&phy1>;
134 phy-connection-type = "rgmii-id";
135 };
136
137 usb@22000 {
138 phy_type = "ulpi";
139 };
140
141 /* USB2 is shared with localbus, so it must be disabled
142 by default. We can't put 'status = "disabled";' here
143 since U-Boot doesn't clear the status property when
144 it enables USB2. OTOH, U-Boot does create a new node
145 when there isn't any. So, just comment it out.
146 */
147 usb@23000 {
148 status = "disabled";
149 phy_type = "ulpi";
150 };
151};
diff --git a/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts b/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts
new file mode 100644
index 000000000000..ab8f076eae90
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts
@@ -0,0 +1,89 @@
1/*
2 * P1020 MBG-PC Device Tree Source (32-bit address map)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1020MBG-PC";
38 compatible = "fsl,P1020MBG-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@ffe05000 {
45 reg = <0x0 0xffe05000 0x0 0x1000>;
46
47 /* NOR and L2 switch */
48 ranges = <0x0 0x0 0x0 0xec000000 0x04000000
49 0x1 0x0 0x0 0xffa00000 0x00040000
50 0x2 0x0 0x0 0xffb00000 0x00020000>;
51 };
52
53 soc: soc@ffe00000 {
54 ranges = <0x0 0x0 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@ffe09000 {
58 reg = <0x0 0xffe09000 0x0 0x1000>;
59 ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xe0000000
63 0x2000000 0x0 0xe0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@ffe0a000 {
73 reg = <0x0 0xffe0a000 0x0 0x1000>;
74 ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0xe0000000
78 0x2000000 0x0 0xe0000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86};
87
88/include/ "p1020mbg-pc.dtsi"
89/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts b/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts
new file mode 100644
index 000000000000..9e9f401419b1
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts
@@ -0,0 +1,89 @@
1/*
2 * P1020 MBG-PC Device Tree Source (36-bit address map)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1020MBG-PC";
38 compatible = "fsl,P1020MBG-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@fffe05000 {
45 reg = <0xf 0xffe05000 0x0 0x1000>;
46
47 /* NOR and L2 switch */
48 ranges = <0x0 0x0 0xf 0xec000000 0x04000000
49 0x1 0x0 0xf 0xffa00000 0x00040000
50 0x2 0x0 0xf 0xffb00000 0x00020000>;
51 };
52
53 soc: soc@fffe00000 {
54 ranges = <0x0 0xf 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@fffe09000 {
58 reg = <0xf 0xffe09000 0x0 0x1000>;
59 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xe0000000
63 0x2000000 0x0 0xe0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@fffe0a000 {
73 reg = <0xf 0xffe0a000 0 0x1000>;
74 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0xe0000000
78 0x2000000 0x0 0xe0000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86};
87
88/include/ "p1020mbg-pc.dtsi"
89/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020utm-pc.dtsi b/arch/powerpc/boot/dts/p1020utm-pc.dtsi
new file mode 100644
index 000000000000..7ea85eabcc5c
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020utm-pc.dtsi
@@ -0,0 +1,140 @@
1/*
2 * P1020 UTM-PC Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x2000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 /* 256KB for DTB Image */
46 reg = <0x0 0x00040000>;
47 label = "NOR DTB Image";
48 };
49
50 partition@40000 {
51 /* 3.75 MB for Linux Kernel Image */
52 reg = <0x00040000 0x003c0000>;
53 label = "NOR Linux Kernel Image";
54 };
55
56 partition@400000 {
57 /* 27MB for Root file System */
58 reg = <0x00400000 0x01b00000>;
59 label = "NOR Root File System";
60 };
61
62 partition@1f00000 {
63 /* This location must not be altered */
64 /* 512KB for u-boot Bootloader Image */
65 /* 512KB for u-boot Environment Variables */
66 reg = <0x01f00000 0x00100000>;
67 label = "NOR U-Boot Image";
68 read-only;
69 };
70 };
71};
72
73&soc {
74 i2c@3000 {
75 rtc@68 {
76 compatible = "dallas,ds1339";
77 reg = <0x68>;
78 };
79 };
80
81 mdio@24000 {
82 phy0: ethernet-phy@0 {
83 interrupts = <3 1 0 0>;
84 reg = <0x0>;
85 };
86 phy1: ethernet-phy@1 {
87 interrupts = <2 1 0 0>;
88 reg = <0x1>;
89 };
90 phy2: ethernet-phy@2 {
91 interrupts = <1 1 0 0>;
92 reg = <0x2>;
93 };
94 };
95
96 mdio@25000 {
97 tbi1: tbi-phy@11 {
98 reg = <0x11>;
99 device_type = "tbi-phy";
100 };
101 };
102
103 mdio@26000 {
104 tbi2: tbi-phy@11 {
105 reg = <0x11>;
106 device_type = "tbi-phy";
107 };
108 };
109
110 enet0: ethernet@b0000 {
111 phy-handle = <&phy2>;
112 phy-connection-type = "rgmii-id";
113 };
114
115 enet1: ethernet@b1000 {
116 phy-handle = <&phy0>;
117 tbi-handle = <&tbi1>;
118 phy-connection-type = "sgmii";
119 };
120
121 enet2: ethernet@b2000 {
122 phy-handle = <&phy1>;
123 phy-connection-type = "rgmii-id";
124 };
125
126 usb@22000 {
127 phy_type = "ulpi";
128 };
129
130 /* USB2 is shared with localbus, so it must be disabled
131 by default. We can't put 'status = "disabled";' here
132 since U-Boot doesn't clear the status property when
133 it enables USB2. OTOH, U-Boot does create a new node
134 when there isn't any. So, just comment it out.
135 */
136 usb@23000 {
137 status = "disabled";
138 phy_type = "ulpi";
139 };
140};
diff --git a/arch/powerpc/boot/dts/p1020utm-pc_32b.dts b/arch/powerpc/boot/dts/p1020utm-pc_32b.dts
new file mode 100644
index 000000000000..4bfdd8971cdb
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020utm-pc_32b.dts
@@ -0,0 +1,89 @@
1/*
2 * P1020 UTM-PC Device Tree Source (32-bit address map)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1020UTM-PC";
38 compatible = "fsl,P1020UTM-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@ffe05000 {
45 reg = <0x0 0xffe05000 0x0 0x1000>;
46
47 /* NOR */
48 ranges = <0x0 0x0 0x0 0xec000000 0x02000000
49 0x1 0x0 0x0 0xffa00000 0x00040000
50 0x2 0x0 0x0 0xffb00000 0x00020000>;
51 };
52
53 soc: soc@ffe00000 {
54 ranges = <0x0 0x0 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@ffe09000 {
58 reg = <0x0 0xffe09000 0x0 0x1000>;
59 ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xe0000000
63 0x2000000 0x0 0xe0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@ffe0a000 {
73 reg = <0x0 0xffe0a000 0x0 0x1000>;
74 ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0xe0000000
78 0x2000000 0x0 0xe0000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86};
87
88/include/ "p1020utm-pc.dtsi"
89/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020utm-pc_36b.dts b/arch/powerpc/boot/dts/p1020utm-pc_36b.dts
new file mode 100644
index 000000000000..abec53557501
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020utm-pc_36b.dts
@@ -0,0 +1,89 @@
1/*
2 * P1020 UTM-PC Device Tree Source (36-bit address map)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1020UTM-PC";
38 compatible = "fsl,P1020UTM-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@fffe05000 {
45 reg = <0xf 0xffe05000 0x0 0x1000>;
46
47 /* NOR */
48 ranges = <0x0 0x0 0xf 0xec000000 0x02000000
49 0x1 0x0 0xf 0xffa00000 0x00040000
50 0x2 0x0 0xf 0xffb00000 0x00020000>;
51 };
52
53 soc: soc@fffe00000 {
54 ranges = <0x0 0xf 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@fffe09000 {
58 reg = <0xf 0xffe09000 0x0 0x1000>;
59 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xe0000000
63 0x2000000 0x0 0xe0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@fffe0a000 {
73 reg = <0xf 0xffe0a000 0 0x1000>;
74 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0xe0000000
78 0x2000000 0x0 0xe0000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86};
87
88/include/ "p1020utm-pc.dtsi"
89/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2041rdb.dts b/arch/powerpc/boot/dts/p2041rdb.dts
index 4f957db01230..285213976a7f 100644
--- a/arch/powerpc/boot/dts/p2041rdb.dts
+++ b/arch/powerpc/boot/dts/p2041rdb.dts
@@ -135,7 +135,6 @@
135 reg = <0xf 0xfe200000 0 0x1000>; 135 reg = <0xf 0xfe200000 0 0x1000>;
136 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 136 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
137 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; 137 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
138 fsl,msi = <&msi0>;
139 pcie@0 { 138 pcie@0 {
140 ranges = <0x02000000 0 0xe0000000 139 ranges = <0x02000000 0 0xe0000000
141 0x02000000 0 0xe0000000 140 0x02000000 0 0xe0000000
@@ -151,7 +150,6 @@
151 reg = <0xf 0xfe201000 0 0x1000>; 150 reg = <0xf 0xfe201000 0 0x1000>;
152 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 151 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
153 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; 152 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
154 fsl,msi = <&msi1>;
155 pcie@0 { 153 pcie@0 {
156 ranges = <0x02000000 0 0xe0000000 154 ranges = <0x02000000 0 0xe0000000
157 0x02000000 0 0xe0000000 155 0x02000000 0 0xe0000000
@@ -167,7 +165,6 @@
167 reg = <0xf 0xfe202000 0 0x1000>; 165 reg = <0xf 0xfe202000 0 0x1000>;
168 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 166 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
169 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; 167 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
170 fsl,msi = <&msi2>;
171 pcie@0 { 168 pcie@0 {
172 ranges = <0x02000000 0 0xe0000000 169 ranges = <0x02000000 0 0xe0000000
173 0x02000000 0 0xe0000000 170 0x02000000 0 0xe0000000
diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts
index f469145abaeb..22a215e94162 100644
--- a/arch/powerpc/boot/dts/p3041ds.dts
+++ b/arch/powerpc/boot/dts/p3041ds.dts
@@ -173,7 +173,6 @@
173 reg = <0xf 0xfe200000 0 0x1000>; 173 reg = <0xf 0xfe200000 0 0x1000>;
174 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 174 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
175 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; 175 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
176 fsl,msi = <&msi0>;
177 pcie@0 { 176 pcie@0 {
178 ranges = <0x02000000 0 0xe0000000 177 ranges = <0x02000000 0 0xe0000000
179 0x02000000 0 0xe0000000 178 0x02000000 0 0xe0000000
@@ -189,7 +188,6 @@
189 reg = <0xf 0xfe201000 0 0x1000>; 188 reg = <0xf 0xfe201000 0 0x1000>;
190 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 189 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
191 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; 190 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
192 fsl,msi = <&msi1>;
193 pcie@0 { 191 pcie@0 {
194 ranges = <0x02000000 0 0xe0000000 192 ranges = <0x02000000 0 0xe0000000
195 0x02000000 0 0xe0000000 193 0x02000000 0 0xe0000000
@@ -205,7 +203,6 @@
205 reg = <0xf 0xfe202000 0 0x1000>; 203 reg = <0xf 0xfe202000 0 0x1000>;
206 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 204 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
207 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; 205 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
208 fsl,msi = <&msi2>;
209 pcie@0 { 206 pcie@0 {
210 ranges = <0x02000000 0 0xe0000000 207 ranges = <0x02000000 0 0xe0000000
211 0x02000000 0 0xe0000000 208 0x02000000 0 0xe0000000
@@ -221,7 +218,6 @@
221 reg = <0xf 0xfe203000 0 0x1000>; 218 reg = <0xf 0xfe203000 0 0x1000>;
222 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000 219 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
223 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; 220 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
224 fsl,msi = <&msi2>;
225 pcie@0 { 221 pcie@0 {
226 ranges = <0x02000000 0 0xe0000000 222 ranges = <0x02000000 0 0xe0000000
227 0x02000000 0 0xe0000000 223 0x02000000 0 0xe0000000
diff --git a/arch/powerpc/boot/dts/p3060qds.dts b/arch/powerpc/boot/dts/p3060qds.dts
index 529042e4b9a2..9ae875c8a211 100644
--- a/arch/powerpc/boot/dts/p3060qds.dts
+++ b/arch/powerpc/boot/dts/p3060qds.dts
@@ -212,7 +212,6 @@
212 reg = <0xf 0xfe200000 0 0x1000>; 212 reg = <0xf 0xfe200000 0 0x1000>;
213 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 213 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
214 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; 214 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
215 fsl,msi = <&msi0>;
216 pcie@0 { 215 pcie@0 {
217 ranges = <0x02000000 0 0xe0000000 216 ranges = <0x02000000 0 0xe0000000
218 0x02000000 0 0xe0000000 217 0x02000000 0 0xe0000000
@@ -228,7 +227,6 @@
228 reg = <0xf 0xfe201000 0 0x1000>; 227 reg = <0xf 0xfe201000 0 0x1000>;
229 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 228 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
230 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; 229 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
231 fsl,msi = <&msi1>;
232 pcie@0 { 230 pcie@0 {
233 ranges = <0x02000000 0 0xe0000000 231 ranges = <0x02000000 0 0xe0000000
234 0x02000000 0 0xe0000000 232 0x02000000 0 0xe0000000
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index 6d60e54e50a0..3e204609d02e 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -141,7 +141,6 @@
141 reg = <0xf 0xfe200000 0 0x1000>; 141 reg = <0xf 0xfe200000 0 0x1000>;
142 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 142 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
143 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; 143 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
144 fsl,msi = <&msi0>;
145 pcie@0 { 144 pcie@0 {
146 ranges = <0x02000000 0 0xe0000000 145 ranges = <0x02000000 0 0xe0000000
147 0x02000000 0 0xe0000000 146 0x02000000 0 0xe0000000
@@ -157,7 +156,6 @@
157 reg = <0xf 0xfe201000 0 0x1000>; 156 reg = <0xf 0xfe201000 0 0x1000>;
158 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 157 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
159 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; 158 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
160 fsl,msi = <&msi1>;
161 pcie@0 { 159 pcie@0 {
162 ranges = <0x02000000 0 0xe0000000 160 ranges = <0x02000000 0 0xe0000000
163 0x02000000 0 0xe0000000 161 0x02000000 0 0xe0000000
@@ -173,7 +171,6 @@
173 reg = <0xf 0xfe202000 0 0x1000>; 171 reg = <0xf 0xfe202000 0 0x1000>;
174 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 172 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
175 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; 173 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
176 fsl,msi = <&msi2>;
177 pcie@0 { 174 pcie@0 {
178 ranges = <0x02000000 0 0xe0000000 175 ranges = <0x02000000 0 0xe0000000
179 0x02000000 0 0xe0000000 176 0x02000000 0 0xe0000000
diff --git a/arch/powerpc/boot/dts/p5020ds.dts b/arch/powerpc/boot/dts/p5020ds.dts
index 1c250684c902..27c07ed6adc1 100644
--- a/arch/powerpc/boot/dts/p5020ds.dts
+++ b/arch/powerpc/boot/dts/p5020ds.dts
@@ -173,7 +173,6 @@
173 reg = <0xf 0xfe200000 0 0x1000>; 173 reg = <0xf 0xfe200000 0 0x1000>;
174 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 174 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
175 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; 175 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
176 fsl,msi = <&msi0>;
177 pcie@0 { 176 pcie@0 {
178 ranges = <0x02000000 0 0xe0000000 177 ranges = <0x02000000 0 0xe0000000
179 0x02000000 0 0xe0000000 178 0x02000000 0 0xe0000000
@@ -189,7 +188,6 @@
189 reg = <0xf 0xfe201000 0 0x1000>; 188 reg = <0xf 0xfe201000 0 0x1000>;
190 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 189 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
191 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; 190 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
192 fsl,msi = <&msi1>;
193 pcie@0 { 191 pcie@0 {
194 ranges = <0x02000000 0 0xe0000000 192 ranges = <0x02000000 0 0xe0000000
195 0x02000000 0 0xe0000000 193 0x02000000 0 0xe0000000
@@ -205,7 +203,6 @@
205 reg = <0xf 0xfe202000 0 0x1000>; 203 reg = <0xf 0xfe202000 0 0x1000>;
206 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 204 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
207 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; 205 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
208 fsl,msi = <&msi2>;
209 pcie@0 { 206 pcie@0 {
210 ranges = <0x02000000 0 0xe0000000 207 ranges = <0x02000000 0 0xe0000000
211 0x02000000 0 0xe0000000 208 0x02000000 0 0xe0000000
@@ -221,7 +218,6 @@
221 reg = <0xf 0xfe203000 0 0x1000>; 218 reg = <0xf 0xfe203000 0 0x1000>;
222 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000 219 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
223 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; 220 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
224 fsl,msi = <&msi2>;
225 pcie@0 { 221 pcie@0 {
226 ranges = <0x02000000 0 0xe0000000 222 ranges = <0x02000000 0 0xe0000000
227 0x02000000 0 0xe0000000 223 0x02000000 0 0xe0000000
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index f8aef205d222..91db656294e8 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -116,6 +116,7 @@ CONFIG_SERIAL_8250_RSA=y
116CONFIG_HW_RANDOM=y 116CONFIG_HW_RANDOM=y
117CONFIG_NVRAM=y 117CONFIG_NVRAM=y
118CONFIG_I2C=y 118CONFIG_I2C=y
119CONFIG_I2C_CHARDEV=y
119CONFIG_I2C_MPC=y 120CONFIG_I2C_MPC=y
120CONFIG_SPI=y 121CONFIG_SPI=y
121CONFIG_SPI_GPIO=y 122CONFIG_SPI_GPIO=y
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig
index 82b13bfcf3c0..6798343580f0 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -71,6 +71,8 @@ CONFIG_SERIAL_8250_MANY_PORTS=y
71CONFIG_SERIAL_8250_DETECT_IRQ=y 71CONFIG_SERIAL_8250_DETECT_IRQ=y
72CONFIG_SERIAL_8250_RSA=y 72CONFIG_SERIAL_8250_RSA=y
73CONFIG_I2C=y 73CONFIG_I2C=y
74CONFIG_I2C_CHARDEV=y
75CONFIG_I2C_MPC=y
74# CONFIG_HWMON is not set 76# CONFIG_HWMON is not set
75CONFIG_VIDEO_OUTPUT_CONTROL=y 77CONFIG_VIDEO_OUTPUT_CONTROL=y
76# CONFIG_HID_SUPPORT is not set 78# CONFIG_HID_SUPPORT is not set
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index cc87a8441566..d6b6df5e8743 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -117,6 +117,7 @@ CONFIG_SERIAL_8250_RSA=y
117CONFIG_SERIAL_QE=m 117CONFIG_SERIAL_QE=m
118CONFIG_NVRAM=y 118CONFIG_NVRAM=y
119CONFIG_I2C=y 119CONFIG_I2C=y
120CONFIG_I2C_CHARDEV=y
120CONFIG_I2C_CPM=m 121CONFIG_I2C_CPM=m
121CONFIG_I2C_MPC=y 122CONFIG_I2C_MPC=y
122CONFIG_SPI=y 123CONFIG_SPI=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index 48d6682f2434..5b0e2926becd 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -119,6 +119,7 @@ CONFIG_SERIAL_8250_RSA=y
119CONFIG_SERIAL_QE=m 119CONFIG_SERIAL_QE=m
120CONFIG_NVRAM=y 120CONFIG_NVRAM=y
121CONFIG_I2C=y 121CONFIG_I2C=y
122CONFIG_I2C_CHARDEV=y
122CONFIG_I2C_CPM=m 123CONFIG_I2C_CPM=m
123CONFIG_I2C_MPC=y 124CONFIG_I2C_MPC=y
124CONFIG_SPI=y 125CONFIG_SPI=y
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index dd70fac57ec8..62678e365ca0 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -22,9 +22,11 @@
22 22
23/* Some dma direct funcs must be visible for use in other dma_ops */ 23/* Some dma direct funcs must be visible for use in other dma_ops */
24extern void *dma_direct_alloc_coherent(struct device *dev, size_t size, 24extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
25 dma_addr_t *dma_handle, gfp_t flag); 25 dma_addr_t *dma_handle, gfp_t flag,
26 struct dma_attrs *attrs);
26extern void dma_direct_free_coherent(struct device *dev, size_t size, 27extern void dma_direct_free_coherent(struct device *dev, size_t size,
27 void *vaddr, dma_addr_t dma_handle); 28 void *vaddr, dma_addr_t dma_handle,
29 struct dma_attrs *attrs);
28 30
29 31
30#ifdef CONFIG_NOT_COHERENT_CACHE 32#ifdef CONFIG_NOT_COHERENT_CACHE
@@ -130,23 +132,29 @@ static inline int dma_supported(struct device *dev, u64 mask)
130 132
131extern int dma_set_mask(struct device *dev, u64 dma_mask); 133extern int dma_set_mask(struct device *dev, u64 dma_mask);
132 134
133static inline void *dma_alloc_coherent(struct device *dev, size_t size, 135#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
134 dma_addr_t *dma_handle, gfp_t flag) 136
137static inline void *dma_alloc_attrs(struct device *dev, size_t size,
138 dma_addr_t *dma_handle, gfp_t flag,
139 struct dma_attrs *attrs)
135{ 140{
136 struct dma_map_ops *dma_ops = get_dma_ops(dev); 141 struct dma_map_ops *dma_ops = get_dma_ops(dev);
137 void *cpu_addr; 142 void *cpu_addr;
138 143
139 BUG_ON(!dma_ops); 144 BUG_ON(!dma_ops);
140 145
141 cpu_addr = dma_ops->alloc_coherent(dev, size, dma_handle, flag); 146 cpu_addr = dma_ops->alloc(dev, size, dma_handle, flag, attrs);
142 147
143 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); 148 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
144 149
145 return cpu_addr; 150 return cpu_addr;
146} 151}
147 152
148static inline void dma_free_coherent(struct device *dev, size_t size, 153#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
149 void *cpu_addr, dma_addr_t dma_handle) 154
155static inline void dma_free_attrs(struct device *dev, size_t size,
156 void *cpu_addr, dma_addr_t dma_handle,
157 struct dma_attrs *attrs)
150{ 158{
151 struct dma_map_ops *dma_ops = get_dma_ops(dev); 159 struct dma_map_ops *dma_ops = get_dma_ops(dev);
152 160
@@ -154,7 +162,7 @@ static inline void dma_free_coherent(struct device *dev, size_t size,
154 162
155 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); 163 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
156 164
157 dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); 165 dma_ops->free(dev, size, cpu_addr, dma_handle, attrs);
158} 166}
159 167
160static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 168static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
diff --git a/arch/powerpc/include/asm/epapr_hcalls.h b/arch/powerpc/include/asm/epapr_hcalls.h
index f3b0c2cc9fea..976835d8f22e 100644
--- a/arch/powerpc/include/asm/epapr_hcalls.h
+++ b/arch/powerpc/include/asm/epapr_hcalls.h
@@ -134,10 +134,15 @@
134 * whether they will be clobbered. 134 * whether they will be clobbered.
135 * 135 *
136 * Note that r11 can be used as an output parameter. 136 * Note that r11 can be used as an output parameter.
137 *
138 * The "memory" clobber is only necessary for hcalls where the Hypervisor
139 * will read or write guest memory. However, we add it to all hcalls because
140 * the impact is minimal, and we want to ensure that it's present for the
141 * hcalls that need it.
137*/ 142*/
138 143
139/* List of common clobbered registers. Do not use this macro. */ 144/* List of common clobbered registers. Do not use this macro. */
140#define EV_HCALL_CLOBBERS "r0", "r12", "xer", "ctr", "lr", "cc" 145#define EV_HCALL_CLOBBERS "r0", "r12", "xer", "ctr", "lr", "cc", "memory"
141 146
142#define EV_HCALL_CLOBBERS8 EV_HCALL_CLOBBERS 147#define EV_HCALL_CLOBBERS8 EV_HCALL_CLOBBERS
143#define EV_HCALL_CLOBBERS7 EV_HCALL_CLOBBERS8, "r10" 148#define EV_HCALL_CLOBBERS7 EV_HCALL_CLOBBERS8, "r10"
diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h
index ce04530d2000..aa4c488589ce 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -16,15 +16,6 @@
16#define __ASM_POWERPC_FSL_GUTS_H__ 16#define __ASM_POWERPC_FSL_GUTS_H__
17#ifdef __KERNEL__ 17#ifdef __KERNEL__
18 18
19/*
20 * These #ifdefs are safe because it's not possible to build a kernel that
21 * runs on e500 and e600 cores.
22 */
23
24#if !defined(CONFIG_PPC_85xx) && !defined(CONFIG_PPC_86xx)
25#error Only 85xx and 86xx SOCs are supported
26#endif
27
28/** 19/**
29 * Global Utility Registers. 20 * Global Utility Registers.
30 * 21 *
@@ -36,11 +27,7 @@
36 * different names. In these cases, one name is chosen to avoid extraneous 27 * different names. In these cases, one name is chosen to avoid extraneous
37 * #ifdefs. 28 * #ifdefs.
38 */ 29 */
39#ifdef CONFIG_PPC_85xx 30struct ccsr_guts {
40struct ccsr_guts_85xx {
41#else
42struct ccsr_guts_86xx {
43#endif
44 __be32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */ 31 __be32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */
45 __be32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */ 32 __be32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */
46 __be32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and Control Register */ 33 __be32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and Control Register */
@@ -77,11 +64,8 @@ struct ccsr_guts_86xx {
77 u8 res0a8[0xb0 - 0xa8]; 64 u8 res0a8[0xb0 - 0xa8];
78 __be32 rstcr; /* 0x.00b0 - Reset Control Register */ 65 __be32 rstcr; /* 0x.00b0 - Reset Control Register */
79 u8 res0b4[0xc0 - 0xb4]; 66 u8 res0b4[0xc0 - 0xb4];
80#ifdef CONFIG_PPC_85xx 67 __be32 iovselsr; /* 0x.00c0 - I/O voltage select status register
81 __be32 iovselsr; /* 0x.00c0 - I/O voltage select status register */ 68 Called 'elbcvselcr' on 86xx SOCs */
82#else
83 __be32 elbcvselcr; /* 0x.00c0 - eLBC Voltage Select Ctrl Reg */
84#endif
85 u8 res0c4[0x224 - 0xc4]; 69 u8 res0c4[0x224 - 0xc4];
86 __be32 iodelay1; /* 0x.0224 - IO delay control register 1 */ 70 __be32 iodelay1; /* 0x.0224 - IO delay control register 1 */
87 __be32 iodelay2; /* 0x.0228 - IO delay control register 2 */ 71 __be32 iodelay2; /* 0x.0228 - IO delay control register 2 */
@@ -136,7 +120,7 @@ struct ccsr_guts_86xx {
136 * ch: The channel on the DMA controller (0, 1, 2, or 3) 120 * ch: The channel on the DMA controller (0, 1, 2, or 3)
137 * device: The device to set as the source (CCSR_GUTS_DMACR_DEV_xx) 121 * device: The device to set as the source (CCSR_GUTS_DMACR_DEV_xx)
138 */ 122 */
139static inline void guts_set_dmacr(struct ccsr_guts_86xx __iomem *guts, 123static inline void guts_set_dmacr(struct ccsr_guts __iomem *guts,
140 unsigned int co, unsigned int ch, unsigned int device) 124 unsigned int co, unsigned int ch, unsigned int device)
141{ 125{
142 unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch)); 126 unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch));
@@ -172,7 +156,7 @@ static inline void guts_set_dmacr(struct ccsr_guts_86xx __iomem *guts,
172 * ch: The channel on the DMA controller (0, 1, 2, or 3) 156 * ch: The channel on the DMA controller (0, 1, 2, or 3)
173 * value: the new value for the bit (0 or 1) 157 * value: the new value for the bit (0 or 1)
174 */ 158 */
175static inline void guts_set_pmuxcr_dma(struct ccsr_guts_86xx __iomem *guts, 159static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts,
176 unsigned int co, unsigned int ch, unsigned int value) 160 unsigned int co, unsigned int ch, unsigned int value)
177{ 161{
178 if ((ch == 0) || (ch == 3)) { 162 if ((ch == 0) || (ch == 3)) {
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h
index cf417e510736..0e40843a1c6e 100644
--- a/arch/powerpc/include/asm/irq.h
+++ b/arch/powerpc/include/asm/irq.h
@@ -18,10 +18,6 @@
18#include <linux/atomic.h> 18#include <linux/atomic.h>
19 19
20 20
21/* Define a way to iterate across irqs. */
22#define for_each_irq(i) \
23 for ((i) = 0; (i) < NR_IRQS; ++(i))
24
25extern atomic_t ppc_n_lost_interrupts; 21extern atomic_t ppc_n_lost_interrupts;
26 22
27/* This number is used when no interrupt has been assigned */ 23/* This number is used when no interrupt has been assigned */
@@ -33,8 +29,6 @@ extern atomic_t ppc_n_lost_interrupts;
33/* Same thing, used by the generic IRQ code */ 29/* Same thing, used by the generic IRQ code */
34#define NR_IRQS_LEGACY NUM_ISA_INTERRUPTS 30#define NR_IRQS_LEGACY NUM_ISA_INTERRUPTS
35 31
36struct irq_data;
37extern irq_hw_number_t irqd_to_hwirq(struct irq_data *d);
38extern irq_hw_number_t virq_to_hw(unsigned int virq); 32extern irq_hw_number_t virq_to_hw(unsigned int virq);
39 33
40/** 34/**
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index c65b9294376e..c9f698a994be 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -275,9 +275,6 @@ struct mpic
275 unsigned int isu_mask; 275 unsigned int isu_mask;
276 /* Number of sources */ 276 /* Number of sources */
277 unsigned int num_sources; 277 unsigned int num_sources;
278 /* default senses array */
279 unsigned char *senses;
280 unsigned int senses_count;
281 278
282 /* vector numbers used for internal sources (ipi/timers) */ 279 /* vector numbers used for internal sources (ipi/timers) */
283 unsigned int ipi_vecs[4]; 280 unsigned int ipi_vecs[4];
@@ -415,21 +412,6 @@ extern struct mpic *mpic_alloc(struct device_node *node,
415extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, 412extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
416 phys_addr_t phys_addr); 413 phys_addr_t phys_addr);
417 414
418/* Set default sense codes
419 *
420 * @mpic: controller
421 * @senses: array of sense codes
422 * @count: size of above array
423 *
424 * Optionally provide an array (indexed on hardware interrupt numbers
425 * for this MPIC) of default sense codes for the chip. Those are linux
426 * sense codes IRQ_TYPE_*
427 *
428 * The driver gets ownership of the pointer, don't dispose of it or
429 * anything like that. __init only.
430 */
431extern void mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count);
432
433 415
434/* Initialize the controller. After this has been called, none of the above 416/* Initialize the controller. After this has been called, none of the above
435 * should be called again for this mpic 417 * should be called again for this mpic
diff --git a/arch/powerpc/include/asm/mpic_msgr.h b/arch/powerpc/include/asm/mpic_msgr.h
index 3ec37dc9003e..326d33ca55cd 100644
--- a/arch/powerpc/include/asm/mpic_msgr.h
+++ b/arch/powerpc/include/asm/mpic_msgr.h
@@ -13,6 +13,7 @@
13 13
14#include <linux/types.h> 14#include <linux/types.h>
15#include <linux/spinlock.h> 15#include <linux/spinlock.h>
16#include <asm/smp.h>
16 17
17struct mpic_msgr { 18struct mpic_msgr {
18 u32 __iomem *base; 19 u32 __iomem *base;
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index b86faa9107da..8a97aa7289d3 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -15,11 +15,6 @@
15#ifndef __ASM_POWERPC_REG_BOOKE_H__ 15#ifndef __ASM_POWERPC_REG_BOOKE_H__
16#define __ASM_POWERPC_REG_BOOKE_H__ 16#define __ASM_POWERPC_REG_BOOKE_H__
17 17
18#ifdef CONFIG_BOOKE_WDT
19extern u32 booke_wdt_enabled;
20extern u32 booke_wdt_period;
21#endif /* CONFIG_BOOKE_WDT */
22
23/* Machine State Register (MSR) Fields */ 18/* Machine State Register (MSR) Fields */
24#define MSR_GS (1<<28) /* Guest state */ 19#define MSR_GS (1<<28) /* Guest state */
25#define MSR_UCLE (1<<26) /* User-mode cache lock enable */ 20#define MSR_UCLE (1<<26) /* User-mode cache lock enable */
diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c
index 3f6464b4d970..bcfdcd22c766 100644
--- a/arch/powerpc/kernel/dma-iommu.c
+++ b/arch/powerpc/kernel/dma-iommu.c
@@ -17,7 +17,8 @@
17 * to the dma address (mapping) of the first page. 17 * to the dma address (mapping) of the first page.
18 */ 18 */
19static void *dma_iommu_alloc_coherent(struct device *dev, size_t size, 19static void *dma_iommu_alloc_coherent(struct device *dev, size_t size,
20 dma_addr_t *dma_handle, gfp_t flag) 20 dma_addr_t *dma_handle, gfp_t flag,
21 struct dma_attrs *attrs)
21{ 22{
22 return iommu_alloc_coherent(dev, get_iommu_table_base(dev), size, 23 return iommu_alloc_coherent(dev, get_iommu_table_base(dev), size,
23 dma_handle, dev->coherent_dma_mask, flag, 24 dma_handle, dev->coherent_dma_mask, flag,
@@ -25,7 +26,8 @@ static void *dma_iommu_alloc_coherent(struct device *dev, size_t size,
25} 26}
26 27
27static void dma_iommu_free_coherent(struct device *dev, size_t size, 28static void dma_iommu_free_coherent(struct device *dev, size_t size,
28 void *vaddr, dma_addr_t dma_handle) 29 void *vaddr, dma_addr_t dma_handle,
30 struct dma_attrs *attrs)
29{ 31{
30 iommu_free_coherent(get_iommu_table_base(dev), size, vaddr, dma_handle); 32 iommu_free_coherent(get_iommu_table_base(dev), size, vaddr, dma_handle);
31} 33}
@@ -105,8 +107,8 @@ static u64 dma_iommu_get_required_mask(struct device *dev)
105} 107}
106 108
107struct dma_map_ops dma_iommu_ops = { 109struct dma_map_ops dma_iommu_ops = {
108 .alloc_coherent = dma_iommu_alloc_coherent, 110 .alloc = dma_iommu_alloc_coherent,
109 .free_coherent = dma_iommu_free_coherent, 111 .free = dma_iommu_free_coherent,
110 .map_sg = dma_iommu_map_sg, 112 .map_sg = dma_iommu_map_sg,
111 .unmap_sg = dma_iommu_unmap_sg, 113 .unmap_sg = dma_iommu_unmap_sg,
112 .dma_supported = dma_iommu_dma_supported, 114 .dma_supported = dma_iommu_dma_supported,
diff --git a/arch/powerpc/kernel/dma-swiotlb.c b/arch/powerpc/kernel/dma-swiotlb.c
index 1ebc9189aada..4ab88dafb235 100644
--- a/arch/powerpc/kernel/dma-swiotlb.c
+++ b/arch/powerpc/kernel/dma-swiotlb.c
@@ -47,8 +47,8 @@ static u64 swiotlb_powerpc_get_required(struct device *dev)
47 * for everything else. 47 * for everything else.
48 */ 48 */
49struct dma_map_ops swiotlb_dma_ops = { 49struct dma_map_ops swiotlb_dma_ops = {
50 .alloc_coherent = dma_direct_alloc_coherent, 50 .alloc = dma_direct_alloc_coherent,
51 .free_coherent = dma_direct_free_coherent, 51 .free = dma_direct_free_coherent,
52 .map_sg = swiotlb_map_sg_attrs, 52 .map_sg = swiotlb_map_sg_attrs,
53 .unmap_sg = swiotlb_unmap_sg_attrs, 53 .unmap_sg = swiotlb_unmap_sg_attrs,
54 .dma_supported = swiotlb_dma_supported, 54 .dma_supported = swiotlb_dma_supported,
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index 7d0233c12ee3..b1ec983dcec8 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -26,7 +26,8 @@
26 26
27 27
28void *dma_direct_alloc_coherent(struct device *dev, size_t size, 28void *dma_direct_alloc_coherent(struct device *dev, size_t size,
29 dma_addr_t *dma_handle, gfp_t flag) 29 dma_addr_t *dma_handle, gfp_t flag,
30 struct dma_attrs *attrs)
30{ 31{
31 void *ret; 32 void *ret;
32#ifdef CONFIG_NOT_COHERENT_CACHE 33#ifdef CONFIG_NOT_COHERENT_CACHE
@@ -54,7 +55,8 @@ void *dma_direct_alloc_coherent(struct device *dev, size_t size,
54} 55}
55 56
56void dma_direct_free_coherent(struct device *dev, size_t size, 57void dma_direct_free_coherent(struct device *dev, size_t size,
57 void *vaddr, dma_addr_t dma_handle) 58 void *vaddr, dma_addr_t dma_handle,
59 struct dma_attrs *attrs)
58{ 60{
59#ifdef CONFIG_NOT_COHERENT_CACHE 61#ifdef CONFIG_NOT_COHERENT_CACHE
60 __dma_free_coherent(size, vaddr); 62 __dma_free_coherent(size, vaddr);
@@ -150,8 +152,8 @@ static inline void dma_direct_sync_single(struct device *dev,
150#endif 152#endif
151 153
152struct dma_map_ops dma_direct_ops = { 154struct dma_map_ops dma_direct_ops = {
153 .alloc_coherent = dma_direct_alloc_coherent, 155 .alloc = dma_direct_alloc_coherent,
154 .free_coherent = dma_direct_free_coherent, 156 .free = dma_direct_free_coherent,
155 .map_sg = dma_direct_map_sg, 157 .map_sg = dma_direct_map_sg,
156 .unmap_sg = dma_direct_unmap_sg, 158 .unmap_sg = dma_direct_unmap_sg,
157 .dma_supported = dma_direct_dma_supported, 159 .dma_supported = dma_direct_dma_supported,
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 3e57a00b8cba..ba3aeb4bc06a 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -206,40 +206,43 @@ reenable_mmu: /* re-enable mmu so we can */
206 andi. r10,r10,MSR_EE /* Did EE change? */ 206 andi. r10,r10,MSR_EE /* Did EE change? */
207 beq 1f 207 beq 1f
208 208
209 /* Save handler and return address into the 2 unused words
210 * of the STACK_FRAME_OVERHEAD (sneak sneak sneak). Everything
211 * else can be recovered from the pt_regs except r3 which for
212 * normal interrupts has been set to pt_regs and for syscalls
213 * is an argument, so we temporarily use ORIG_GPR3 to save it
214 */
215 stw r9,8(r1)
216 stw r11,12(r1)
217 stw r3,ORIG_GPR3(r1)
218 /* 209 /*
219 * The trace_hardirqs_off will use CALLER_ADDR0 and CALLER_ADDR1. 210 * The trace_hardirqs_off will use CALLER_ADDR0 and CALLER_ADDR1.
220 * If from user mode there is only one stack frame on the stack, and 211 * If from user mode there is only one stack frame on the stack, and
221 * accessing CALLER_ADDR1 will cause oops. So we need create a dummy 212 * accessing CALLER_ADDR1 will cause oops. So we need create a dummy
222 * stack frame to make trace_hardirqs_off happy. 213 * stack frame to make trace_hardirqs_off happy.
214 *
215 * This is handy because we also need to save a bunch of GPRs,
216 * r3 can be different from GPR3(r1) at this point, r9 and r11
217 * contains the old MSR and handler address respectively,
218 * r4 & r5 can contain page fault arguments that need to be passed
219 * along as well. r12, CCR, CTR, XER etc... are left clobbered as
220 * they aren't useful past this point (aren't syscall arguments),
221 * the rest is restored from the exception frame.
223 */ 222 */
223 stwu r1,-32(r1)
224 stw r9,8(r1)
225 stw r11,12(r1)
226 stw r3,16(r1)
227 stw r4,20(r1)
228 stw r5,24(r1)
224 andi. r12,r12,MSR_PR 229 andi. r12,r12,MSR_PR
225 beq 11f 230 b 11f
226 stwu r1,-16(r1)
227 bl trace_hardirqs_off 231 bl trace_hardirqs_off
228 addi r1,r1,16
229 b 12f 232 b 12f
230
23111: 23311:
232 bl trace_hardirqs_off 234 bl trace_hardirqs_off
23312: 23512:
236 lwz r5,24(r1)
237 lwz r4,20(r1)
238 lwz r3,16(r1)
239 lwz r11,12(r1)
240 lwz r9,8(r1)
241 addi r1,r1,32
234 lwz r0,GPR0(r1) 242 lwz r0,GPR0(r1)
235 lwz r3,ORIG_GPR3(r1)
236 lwz r4,GPR4(r1)
237 lwz r5,GPR5(r1)
238 lwz r6,GPR6(r1) 243 lwz r6,GPR6(r1)
239 lwz r7,GPR7(r1) 244 lwz r7,GPR7(r1)
240 lwz r8,GPR8(r1) 245 lwz r8,GPR8(r1)
241 lwz r9,8(r1)
242 lwz r11,12(r1)
2431: mtctr r11 2461: mtctr r11
244 mtlr r9 247 mtlr r9
245 bctr /* jump to handler */ 248 bctr /* jump to handler */
diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c
index cfe7a38708c3..18bdf74fa164 100644
--- a/arch/powerpc/kernel/fadump.c
+++ b/arch/powerpc/kernel/fadump.c
@@ -40,6 +40,8 @@
40#include <asm/prom.h> 40#include <asm/prom.h>
41#include <asm/rtas.h> 41#include <asm/rtas.h>
42#include <asm/fadump.h> 42#include <asm/fadump.h>
43#include <asm/debug.h>
44#include <asm/setup.h>
43 45
44static struct fw_dump fw_dump; 46static struct fw_dump fw_dump;
45static struct fadump_mem_struct fdm; 47static struct fadump_mem_struct fdm;
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c
index 79bb282e6501..b01d14eeca8d 100644
--- a/arch/powerpc/kernel/ibmebus.c
+++ b/arch/powerpc/kernel/ibmebus.c
@@ -65,7 +65,8 @@ static struct of_device_id __initdata ibmebus_matches[] = {
65static void *ibmebus_alloc_coherent(struct device *dev, 65static void *ibmebus_alloc_coherent(struct device *dev,
66 size_t size, 66 size_t size,
67 dma_addr_t *dma_handle, 67 dma_addr_t *dma_handle,
68 gfp_t flag) 68 gfp_t flag,
69 struct dma_attrs *attrs)
69{ 70{
70 void *mem; 71 void *mem;
71 72
@@ -77,7 +78,8 @@ static void *ibmebus_alloc_coherent(struct device *dev,
77 78
78static void ibmebus_free_coherent(struct device *dev, 79static void ibmebus_free_coherent(struct device *dev,
79 size_t size, void *vaddr, 80 size_t size, void *vaddr,
80 dma_addr_t dma_handle) 81 dma_addr_t dma_handle,
82 struct dma_attrs *attrs)
81{ 83{
82 kfree(vaddr); 84 kfree(vaddr);
83} 85}
@@ -136,8 +138,8 @@ static u64 ibmebus_dma_get_required_mask(struct device *dev)
136} 138}
137 139
138static struct dma_map_ops ibmebus_dma_ops = { 140static struct dma_map_ops ibmebus_dma_ops = {
139 .alloc_coherent = ibmebus_alloc_coherent, 141 .alloc = ibmebus_alloc_coherent,
140 .free_coherent = ibmebus_free_coherent, 142 .free = ibmebus_free_coherent,
141 .map_sg = ibmebus_map_sg, 143 .map_sg = ibmebus_map_sg,
142 .unmap_sg = ibmebus_unmap_sg, 144 .unmap_sg = ibmebus_unmap_sg,
143 .dma_supported = ibmebus_dma_supported, 145 .dma_supported = ibmebus_dma_supported,
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 243dbabfe74d..43eb74fcedde 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -330,14 +330,10 @@ void migrate_irqs(void)
330 330
331 alloc_cpumask_var(&mask, GFP_KERNEL); 331 alloc_cpumask_var(&mask, GFP_KERNEL);
332 332
333 for_each_irq(irq) { 333 for_each_irq_desc(irq, desc) {
334 struct irq_data *data; 334 struct irq_data *data;
335 struct irq_chip *chip; 335 struct irq_chip *chip;
336 336
337 desc = irq_to_desc(irq);
338 if (!desc)
339 continue;
340
341 data = irq_desc_get_irq_data(desc); 337 data = irq_desc_get_irq_data(desc);
342 if (irqd_is_per_cpu(data)) 338 if (irqd_is_per_cpu(data))
343 continue; 339 continue;
@@ -560,12 +556,6 @@ void do_softirq(void)
560 local_irq_restore(flags); 556 local_irq_restore(flags);
561} 557}
562 558
563irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
564{
565 return d->hwirq;
566}
567EXPORT_SYMBOL_GPL(irqd_to_hwirq);
568
569irq_hw_number_t virq_to_hw(unsigned int virq) 559irq_hw_number_t virq_to_hw(unsigned int virq)
570{ 560{
571 struct irq_data *irq_data = irq_get_irq_data(virq); 561 struct irq_data *irq_data = irq_get_irq_data(virq);
diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c
index 76a6e40a6f7c..782bd0a3c2f0 100644
--- a/arch/powerpc/kernel/kgdb.c
+++ b/arch/powerpc/kernel/kgdb.c
@@ -24,6 +24,7 @@
24#include <asm/current.h> 24#include <asm/current.h>
25#include <asm/processor.h> 25#include <asm/processor.h>
26#include <asm/machdep.h> 26#include <asm/machdep.h>
27#include <asm/debug.h>
27 28
28/* 29/*
29 * This table contains the mapping between PowerPC hardware trap types, and 30 * This table contains the mapping between PowerPC hardware trap types, and
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c
index c957b1202bdc..5df777794403 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -23,14 +23,11 @@
23 23
24void machine_kexec_mask_interrupts(void) { 24void machine_kexec_mask_interrupts(void) {
25 unsigned int i; 25 unsigned int i;
26 struct irq_desc *desc;
26 27
27 for_each_irq(i) { 28 for_each_irq_desc(i, desc) {
28 struct irq_desc *desc = irq_to_desc(i);
29 struct irq_chip *chip; 29 struct irq_chip *chip;
30 30
31 if (!desc)
32 continue;
33
34 chip = irq_desc_get_chip(desc); 31 chip = irq_desc_get_chip(desc);
35 if (!chip) 32 if (!chip)
36 continue; 33 continue;
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index f88698c0f332..4937c9690090 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1235,7 +1235,7 @@ void __ppc64_runlatch_on(void)
1235 ctrl |= CTRL_RUNLATCH; 1235 ctrl |= CTRL_RUNLATCH;
1236 mtspr(SPRN_CTRLT, ctrl); 1236 mtspr(SPRN_CTRLT, ctrl);
1237 1237
1238 ti->local_flags |= TLF_RUNLATCH; 1238 ti->local_flags |= _TLF_RUNLATCH;
1239} 1239}
1240 1240
1241/* Called with hard IRQs off */ 1241/* Called with hard IRQs off */
@@ -1244,7 +1244,7 @@ void __ppc64_runlatch_off(void)
1244 struct thread_info *ti = current_thread_info(); 1244 struct thread_info *ti = current_thread_info();
1245 unsigned long ctrl; 1245 unsigned long ctrl;
1246 1246
1247 ti->local_flags &= ~TLF_RUNLATCH; 1247 ti->local_flags &= ~_TLF_RUNLATCH;
1248 1248
1249 ctrl = mfspr(SPRN_CTRLF); 1249 ctrl = mfspr(SPRN_CTRLF);
1250 ctrl &= ~CTRL_RUNLATCH; 1250 ctrl &= ~CTRL_RUNLATCH;
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 9825f29d1faf..ec8a53fa9e8f 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -150,6 +150,9 @@ notrace void __init machine_init(u64 dt_ptr)
150} 150}
151 151
152#ifdef CONFIG_BOOKE_WDT 152#ifdef CONFIG_BOOKE_WDT
153extern u32 booke_wdt_enabled;
154extern u32 booke_wdt_period;
155
153/* Checks wdt=x and wdt_period=xx command-line option */ 156/* Checks wdt=x and wdt_period=xx command-line option */
154notrace int __init early_parse_wdt(char *p) 157notrace int __init early_parse_wdt(char *p)
155{ 158{
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index b2f7c8480bf6..a3a99901c8ec 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -482,7 +482,8 @@ static void vio_cmo_balance(struct work_struct *work)
482} 482}
483 483
484static void *vio_dma_iommu_alloc_coherent(struct device *dev, size_t size, 484static void *vio_dma_iommu_alloc_coherent(struct device *dev, size_t size,
485 dma_addr_t *dma_handle, gfp_t flag) 485 dma_addr_t *dma_handle, gfp_t flag,
486 struct dma_attrs *attrs)
486{ 487{
487 struct vio_dev *viodev = to_vio_dev(dev); 488 struct vio_dev *viodev = to_vio_dev(dev);
488 void *ret; 489 void *ret;
@@ -492,7 +493,7 @@ static void *vio_dma_iommu_alloc_coherent(struct device *dev, size_t size,
492 return NULL; 493 return NULL;
493 } 494 }
494 495
495 ret = dma_iommu_ops.alloc_coherent(dev, size, dma_handle, flag); 496 ret = dma_iommu_ops.alloc(dev, size, dma_handle, flag, attrs);
496 if (unlikely(ret == NULL)) { 497 if (unlikely(ret == NULL)) {
497 vio_cmo_dealloc(viodev, roundup(size, PAGE_SIZE)); 498 vio_cmo_dealloc(viodev, roundup(size, PAGE_SIZE));
498 atomic_inc(&viodev->cmo.allocs_failed); 499 atomic_inc(&viodev->cmo.allocs_failed);
@@ -502,11 +503,12 @@ static void *vio_dma_iommu_alloc_coherent(struct device *dev, size_t size,
502} 503}
503 504
504static void vio_dma_iommu_free_coherent(struct device *dev, size_t size, 505static void vio_dma_iommu_free_coherent(struct device *dev, size_t size,
505 void *vaddr, dma_addr_t dma_handle) 506 void *vaddr, dma_addr_t dma_handle,
507 struct dma_attrs *attrs)
506{ 508{
507 struct vio_dev *viodev = to_vio_dev(dev); 509 struct vio_dev *viodev = to_vio_dev(dev);
508 510
509 dma_iommu_ops.free_coherent(dev, size, vaddr, dma_handle); 511 dma_iommu_ops.free(dev, size, vaddr, dma_handle, attrs);
510 512
511 vio_cmo_dealloc(viodev, roundup(size, PAGE_SIZE)); 513 vio_cmo_dealloc(viodev, roundup(size, PAGE_SIZE));
512} 514}
@@ -607,8 +609,8 @@ static u64 vio_dma_get_required_mask(struct device *dev)
607} 609}
608 610
609struct dma_map_ops vio_dma_mapping_ops = { 611struct dma_map_ops vio_dma_mapping_ops = {
610 .alloc_coherent = vio_dma_iommu_alloc_coherent, 612 .alloc = vio_dma_iommu_alloc_coherent,
611 .free_coherent = vio_dma_iommu_free_coherent, 613 .free = vio_dma_iommu_free_coherent,
612 .map_sg = vio_dma_iommu_map_sg, 614 .map_sg = vio_dma_iommu_map_sg,
613 .unmap_sg = vio_dma_iommu_unmap_sg, 615 .unmap_sg = vio_dma_iommu_unmap_sg,
614 .map_page = vio_dma_iommu_map_page, 616 .map_page = vio_dma_iommu_map_page,
diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
index f1950d131827..135663a3e4fc 100644
--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -21,6 +21,7 @@
21#include <asm/disassemble.h> 21#include <asm/disassemble.h>
22#include <asm/kvm_book3s.h> 22#include <asm/kvm_book3s.h>
23#include <asm/reg.h> 23#include <asm/reg.h>
24#include <asm/switch_to.h>
24 25
25#define OP_19_XOP_RFID 18 26#define OP_19_XOP_RFID 18
26#define OP_19_XOP_RFI 50 27#define OP_19_XOP_RFI 50
diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c
index bed1279aa6a8..e1b60f56f2a1 100644
--- a/arch/powerpc/kvm/book3s_hv_builtin.c
+++ b/arch/powerpc/kvm/book3s_hv_builtin.c
@@ -173,9 +173,9 @@ static void __init kvm_linear_init_one(ulong size, int count, int type)
173 173
174static struct kvmppc_linear_info *kvm_alloc_linear(int type) 174static struct kvmppc_linear_info *kvm_alloc_linear(int type)
175{ 175{
176 struct kvmppc_linear_info *ri; 176 struct kvmppc_linear_info *ri, *ret;
177 177
178 ri = NULL; 178 ret = NULL;
179 spin_lock(&linear_lock); 179 spin_lock(&linear_lock);
180 list_for_each_entry(ri, &free_linears, list) { 180 list_for_each_entry(ri, &free_linears, list) {
181 if (ri->type != type) 181 if (ri->type != type)
@@ -183,11 +183,12 @@ static struct kvmppc_linear_info *kvm_alloc_linear(int type)
183 183
184 list_del(&ri->list); 184 list_del(&ri->list);
185 atomic_inc(&ri->use_count); 185 atomic_inc(&ri->use_count);
186 memset(ri->base_virt, 0, ri->npages << PAGE_SHIFT);
187 ret = ri;
186 break; 188 break;
187 } 189 }
188 spin_unlock(&linear_lock); 190 spin_unlock(&linear_lock);
189 memset(ri->base_virt, 0, ri->npages << PAGE_SHIFT); 191 return ret;
190 return ri;
191} 192}
192 193
193static void kvm_release_linear(struct kvmppc_linear_info *ri) 194static void kvm_release_linear(struct kvmppc_linear_info *ri)
diff --git a/arch/powerpc/kvm/book3s_hv_interrupts.S b/arch/powerpc/kvm/book3s_hv_interrupts.S
index 3f7b674dd4bf..d3fb4df02c41 100644
--- a/arch/powerpc/kvm/book3s_hv_interrupts.S
+++ b/arch/powerpc/kvm/book3s_hv_interrupts.S
@@ -46,8 +46,10 @@ _GLOBAL(__kvmppc_vcore_entry)
46 /* Save host state to the stack */ 46 /* Save host state to the stack */
47 stdu r1, -SWITCH_FRAME_SIZE(r1) 47 stdu r1, -SWITCH_FRAME_SIZE(r1)
48 48
49 /* Save non-volatile registers (r14 - r31) */ 49 /* Save non-volatile registers (r14 - r31) and CR */
50 SAVE_NVGPRS(r1) 50 SAVE_NVGPRS(r1)
51 mfcr r3
52 std r3, _CCR(r1)
51 53
52 /* Save host DSCR */ 54 /* Save host DSCR */
53BEGIN_FTR_SECTION 55BEGIN_FTR_SECTION
@@ -157,8 +159,10 @@ kvmppc_handler_highmem:
157 * R13 = PACA 159 * R13 = PACA
158 */ 160 */
159 161
160 /* Restore non-volatile host registers (r14 - r31) */ 162 /* Restore non-volatile host registers (r14 - r31) and CR */
161 REST_NVGPRS(r1) 163 REST_NVGPRS(r1)
164 ld r4, _CCR(r1)
165 mtcr r4
162 166
163 addi r1, r1, SWITCH_FRAME_SIZE 167 addi r1, r1, SWITCH_FRAME_SIZE
164 ld r0, PPC_LR_STKOFF(r1) 168 ld r0, PPC_LR_STKOFF(r1)
diff --git a/arch/powerpc/kvm/book3s_interrupts.S b/arch/powerpc/kvm/book3s_interrupts.S
index 0a8515a5c042..3e35383bdb21 100644
--- a/arch/powerpc/kvm/book3s_interrupts.S
+++ b/arch/powerpc/kvm/book3s_interrupts.S
@@ -84,6 +84,10 @@ kvm_start_entry:
84 /* Save non-volatile registers (r14 - r31) */ 84 /* Save non-volatile registers (r14 - r31) */
85 SAVE_NVGPRS(r1) 85 SAVE_NVGPRS(r1)
86 86
87 /* Save CR */
88 mfcr r14
89 stw r14, _CCR(r1)
90
87 /* Save LR */ 91 /* Save LR */
88 PPC_STL r0, _LINK(r1) 92 PPC_STL r0, _LINK(r1)
89 93
@@ -165,6 +169,9 @@ kvm_exit_loop:
165 PPC_LL r4, _LINK(r1) 169 PPC_LL r4, _LINK(r1)
166 mtlr r4 170 mtlr r4
167 171
172 lwz r14, _CCR(r1)
173 mtcr r14
174
168 /* Restore non-volatile host registers (r14 - r31) */ 175 /* Restore non-volatile host registers (r14 - r31) */
169 REST_NVGPRS(r1) 176 REST_NVGPRS(r1)
170 177
diff --git a/arch/powerpc/kvm/book3s_paired_singles.c b/arch/powerpc/kvm/book3s_paired_singles.c
index e70ef2d86431..a59a25a13218 100644
--- a/arch/powerpc/kvm/book3s_paired_singles.c
+++ b/arch/powerpc/kvm/book3s_paired_singles.c
@@ -24,6 +24,7 @@
24#include <asm/kvm_fpu.h> 24#include <asm/kvm_fpu.h>
25#include <asm/reg.h> 25#include <asm/reg.h>
26#include <asm/cacheflush.h> 26#include <asm/cacheflush.h>
27#include <asm/switch_to.h>
27#include <linux/vmalloc.h> 28#include <linux/vmalloc.h>
28 29
29/* #define DEBUG */ 30/* #define DEBUG */
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index 7340e1090b77..7759053d391b 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -33,6 +33,7 @@
33#include <asm/kvm_ppc.h> 33#include <asm/kvm_ppc.h>
34#include <asm/kvm_book3s.h> 34#include <asm/kvm_book3s.h>
35#include <asm/mmu_context.h> 35#include <asm/mmu_context.h>
36#include <asm/switch_to.h>
36#include <linux/gfp.h> 37#include <linux/gfp.h>
37#include <linux/sched.h> 38#include <linux/sched.h>
38#include <linux/vmalloc.h> 39#include <linux/vmalloc.h>
@@ -776,6 +777,7 @@ program_interrupt:
776 } 777 }
777 } 778 }
778 779
780 preempt_disable();
779 if (!(r & RESUME_HOST)) { 781 if (!(r & RESUME_HOST)) {
780 /* To avoid clobbering exit_reason, only check for signals if 782 /* To avoid clobbering exit_reason, only check for signals if
781 * we aren't already exiting to userspace for some other 783 * we aren't already exiting to userspace for some other
@@ -797,8 +799,6 @@ program_interrupt:
797 run->exit_reason = KVM_EXIT_INTR; 799 run->exit_reason = KVM_EXIT_INTR;
798 r = -EINTR; 800 r = -EINTR;
799 } else { 801 } else {
800 preempt_disable();
801
802 /* In case an interrupt came in that was triggered 802 /* In case an interrupt came in that was triggered
803 * from userspace (like DEC), we need to check what 803 * from userspace (like DEC), we need to check what
804 * to inject now! */ 804 * to inject now! */
@@ -880,7 +880,8 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
880 880
881 switch (reg->id) { 881 switch (reg->id) {
882 case KVM_REG_PPC_HIOR: 882 case KVM_REG_PPC_HIOR:
883 r = put_user(to_book3s(vcpu)->hior, (u64 __user *)reg->addr); 883 r = copy_to_user((u64 __user *)(long)reg->addr,
884 &to_book3s(vcpu)->hior, sizeof(u64));
884 break; 885 break;
885 default: 886 default:
886 break; 887 break;
@@ -895,7 +896,8 @@ int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
895 896
896 switch (reg->id) { 897 switch (reg->id) {
897 case KVM_REG_PPC_HIOR: 898 case KVM_REG_PPC_HIOR:
898 r = get_user(to_book3s(vcpu)->hior, (u64 __user *)reg->addr); 899 r = copy_from_user(&to_book3s(vcpu)->hior,
900 (u64 __user *)(long)reg->addr, sizeof(u64));
899 if (!r) 901 if (!r)
900 to_book3s(vcpu)->hior_explicit = true; 902 to_book3s(vcpu)->hior_explicit = true;
901 break; 903 break;
diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S
index 10d8ef602e5c..c8c4b878795a 100644
--- a/arch/powerpc/kvm/booke_interrupts.S
+++ b/arch/powerpc/kvm/booke_interrupts.S
@@ -34,7 +34,8 @@
34/* r2 is special: it holds 'current', and it made nonvolatile in the 34/* r2 is special: it holds 'current', and it made nonvolatile in the
35 * kernel with the -ffixed-r2 gcc option. */ 35 * kernel with the -ffixed-r2 gcc option. */
36#define HOST_R2 12 36#define HOST_R2 12
37#define HOST_NV_GPRS 16 37#define HOST_CR 16
38#define HOST_NV_GPRS 20
38#define HOST_NV_GPR(n) (HOST_NV_GPRS + ((n - 14) * 4)) 39#define HOST_NV_GPR(n) (HOST_NV_GPRS + ((n - 14) * 4))
39#define HOST_MIN_STACK_SIZE (HOST_NV_GPR(31) + 4) 40#define HOST_MIN_STACK_SIZE (HOST_NV_GPR(31) + 4)
40#define HOST_STACK_SIZE (((HOST_MIN_STACK_SIZE + 15) / 16) * 16) /* Align. */ 41#define HOST_STACK_SIZE (((HOST_MIN_STACK_SIZE + 15) / 16) * 16) /* Align. */
@@ -296,8 +297,10 @@ heavyweight_exit:
296 297
297 /* Return to kvm_vcpu_run(). */ 298 /* Return to kvm_vcpu_run(). */
298 lwz r4, HOST_STACK_LR(r1) 299 lwz r4, HOST_STACK_LR(r1)
300 lwz r5, HOST_CR(r1)
299 addi r1, r1, HOST_STACK_SIZE 301 addi r1, r1, HOST_STACK_SIZE
300 mtlr r4 302 mtlr r4
303 mtcr r5
301 /* r3 still contains the return code from kvmppc_handle_exit(). */ 304 /* r3 still contains the return code from kvmppc_handle_exit(). */
302 blr 305 blr
303 306
@@ -314,6 +317,8 @@ _GLOBAL(__kvmppc_vcpu_run)
314 stw r3, HOST_RUN(r1) 317 stw r3, HOST_RUN(r1)
315 mflr r3 318 mflr r3
316 stw r3, HOST_STACK_LR(r1) 319 stw r3, HOST_STACK_LR(r1)
320 mfcr r5
321 stw r5, HOST_CR(r1)
317 322
318 /* Save host non-volatile register state to stack. */ 323 /* Save host non-volatile register state to stack. */
319 stw r14, HOST_NV_GPR(r14)(r1) 324 stw r14, HOST_NV_GPR(r14)(r1)
diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
index af1ab5e9a691..5c3cf2d04e41 100644
--- a/arch/powerpc/net/bpf_jit.h
+++ b/arch/powerpc/net/bpf_jit.h
@@ -48,7 +48,13 @@
48/* 48/*
49 * Assembly helpers from arch/powerpc/net/bpf_jit.S: 49 * Assembly helpers from arch/powerpc/net/bpf_jit.S:
50 */ 50 */
51extern u8 sk_load_word[], sk_load_half[], sk_load_byte[], sk_load_byte_msh[]; 51#define DECLARE_LOAD_FUNC(func) \
52 extern u8 func[], func##_negative_offset[], func##_positive_offset[]
53
54DECLARE_LOAD_FUNC(sk_load_word);
55DECLARE_LOAD_FUNC(sk_load_half);
56DECLARE_LOAD_FUNC(sk_load_byte);
57DECLARE_LOAD_FUNC(sk_load_byte_msh);
52 58
53#define FUNCTION_DESCR_SIZE 24 59#define FUNCTION_DESCR_SIZE 24
54 60
diff --git a/arch/powerpc/net/bpf_jit_64.S b/arch/powerpc/net/bpf_jit_64.S
index ff4506e85cce..55ba3855a97f 100644
--- a/arch/powerpc/net/bpf_jit_64.S
+++ b/arch/powerpc/net/bpf_jit_64.S
@@ -31,14 +31,13 @@
31 * then branch directly to slow_path_XXX if required. (In fact, could 31 * then branch directly to slow_path_XXX if required. (In fact, could
32 * load a spare GPR with the address of slow_path_generic and pass size 32 * load a spare GPR with the address of slow_path_generic and pass size
33 * as an argument, making the call site a mtlr, li and bllr.) 33 * as an argument, making the call site a mtlr, li and bllr.)
34 *
35 * Technically, the "is addr < 0" check is unnecessary & slowing down
36 * the ABS path, as it's statically checked on generation.
37 */ 34 */
38 .globl sk_load_word 35 .globl sk_load_word
39sk_load_word: 36sk_load_word:
40 cmpdi r_addr, 0 37 cmpdi r_addr, 0
41 blt bpf_error 38 blt bpf_slow_path_word_neg
39 .globl sk_load_word_positive_offset
40sk_load_word_positive_offset:
42 /* Are we accessing past headlen? */ 41 /* Are we accessing past headlen? */
43 subi r_scratch1, r_HL, 4 42 subi r_scratch1, r_HL, 4
44 cmpd r_scratch1, r_addr 43 cmpd r_scratch1, r_addr
@@ -51,7 +50,9 @@ sk_load_word:
51 .globl sk_load_half 50 .globl sk_load_half
52sk_load_half: 51sk_load_half:
53 cmpdi r_addr, 0 52 cmpdi r_addr, 0
54 blt bpf_error 53 blt bpf_slow_path_half_neg
54 .globl sk_load_half_positive_offset
55sk_load_half_positive_offset:
55 subi r_scratch1, r_HL, 2 56 subi r_scratch1, r_HL, 2
56 cmpd r_scratch1, r_addr 57 cmpd r_scratch1, r_addr
57 blt bpf_slow_path_half 58 blt bpf_slow_path_half
@@ -61,7 +62,9 @@ sk_load_half:
61 .globl sk_load_byte 62 .globl sk_load_byte
62sk_load_byte: 63sk_load_byte:
63 cmpdi r_addr, 0 64 cmpdi r_addr, 0
64 blt bpf_error 65 blt bpf_slow_path_byte_neg
66 .globl sk_load_byte_positive_offset
67sk_load_byte_positive_offset:
65 cmpd r_HL, r_addr 68 cmpd r_HL, r_addr
66 ble bpf_slow_path_byte 69 ble bpf_slow_path_byte
67 lbzx r_A, r_D, r_addr 70 lbzx r_A, r_D, r_addr
@@ -69,22 +72,20 @@ sk_load_byte:
69 72
70/* 73/*
71 * BPF_S_LDX_B_MSH: ldxb 4*([offset]&0xf) 74 * BPF_S_LDX_B_MSH: ldxb 4*([offset]&0xf)
72 * r_addr is the offset value, already known positive 75 * r_addr is the offset value
73 */ 76 */
74 .globl sk_load_byte_msh 77 .globl sk_load_byte_msh
75sk_load_byte_msh: 78sk_load_byte_msh:
79 cmpdi r_addr, 0
80 blt bpf_slow_path_byte_msh_neg
81 .globl sk_load_byte_msh_positive_offset
82sk_load_byte_msh_positive_offset:
76 cmpd r_HL, r_addr 83 cmpd r_HL, r_addr
77 ble bpf_slow_path_byte_msh 84 ble bpf_slow_path_byte_msh
78 lbzx r_X, r_D, r_addr 85 lbzx r_X, r_D, r_addr
79 rlwinm r_X, r_X, 2, 32-4-2, 31-2 86 rlwinm r_X, r_X, 2, 32-4-2, 31-2
80 blr 87 blr
81 88
82bpf_error:
83 /* Entered with cr0 = lt */
84 li r3, 0
85 /* Generated code will 'blt epilogue', returning 0. */
86 blr
87
88/* Call out to skb_copy_bits: 89/* Call out to skb_copy_bits:
89 * We'll need to back up our volatile regs first; we have 90 * We'll need to back up our volatile regs first; we have
90 * local variable space at r1+(BPF_PPC_STACK_BASIC). 91 * local variable space at r1+(BPF_PPC_STACK_BASIC).
@@ -136,3 +137,84 @@ bpf_slow_path_byte_msh:
136 lbz r_X, BPF_PPC_STACK_BASIC+(2*8)(r1) 137 lbz r_X, BPF_PPC_STACK_BASIC+(2*8)(r1)
137 rlwinm r_X, r_X, 2, 32-4-2, 31-2 138 rlwinm r_X, r_X, 2, 32-4-2, 31-2
138 blr 139 blr
140
141/* Call out to bpf_internal_load_pointer_neg_helper:
142 * We'll need to back up our volatile regs first; we have
143 * local variable space at r1+(BPF_PPC_STACK_BASIC).
144 * Allocate a new stack frame here to remain ABI-compliant in
145 * stashing LR.
146 */
147#define sk_negative_common(SIZE) \
148 mflr r0; \
149 std r0, 16(r1); \
150 /* R3 goes in parameter space of caller's frame */ \
151 std r_skb, (BPF_PPC_STACKFRAME+48)(r1); \
152 std r_A, (BPF_PPC_STACK_BASIC+(0*8))(r1); \
153 std r_X, (BPF_PPC_STACK_BASIC+(1*8))(r1); \
154 stdu r1, -BPF_PPC_SLOWPATH_FRAME(r1); \
155 /* R3 = r_skb, as passed */ \
156 mr r4, r_addr; \
157 li r5, SIZE; \
158 bl bpf_internal_load_pointer_neg_helper; \
159 /* R3 != 0 on success */ \
160 addi r1, r1, BPF_PPC_SLOWPATH_FRAME; \
161 ld r0, 16(r1); \
162 ld r_A, (BPF_PPC_STACK_BASIC+(0*8))(r1); \
163 ld r_X, (BPF_PPC_STACK_BASIC+(1*8))(r1); \
164 mtlr r0; \
165 cmpldi r3, 0; \
166 beq bpf_error_slow; /* cr0 = EQ */ \
167 mr r_addr, r3; \
168 ld r_skb, (BPF_PPC_STACKFRAME+48)(r1); \
169 /* Great success! */
170
171bpf_slow_path_word_neg:
172 lis r_scratch1,-32 /* SKF_LL_OFF */
173 cmpd r_addr, r_scratch1 /* addr < SKF_* */
174 blt bpf_error /* cr0 = LT */
175 .globl sk_load_word_negative_offset
176sk_load_word_negative_offset:
177 sk_negative_common(4)
178 lwz r_A, 0(r_addr)
179 blr
180
181bpf_slow_path_half_neg:
182 lis r_scratch1,-32 /* SKF_LL_OFF */
183 cmpd r_addr, r_scratch1 /* addr < SKF_* */
184 blt bpf_error /* cr0 = LT */
185 .globl sk_load_half_negative_offset
186sk_load_half_negative_offset:
187 sk_negative_common(2)
188 lhz r_A, 0(r_addr)
189 blr
190
191bpf_slow_path_byte_neg:
192 lis r_scratch1,-32 /* SKF_LL_OFF */
193 cmpd r_addr, r_scratch1 /* addr < SKF_* */
194 blt bpf_error /* cr0 = LT */
195 .globl sk_load_byte_negative_offset
196sk_load_byte_negative_offset:
197 sk_negative_common(1)
198 lbz r_A, 0(r_addr)
199 blr
200
201bpf_slow_path_byte_msh_neg:
202 lis r_scratch1,-32 /* SKF_LL_OFF */
203 cmpd r_addr, r_scratch1 /* addr < SKF_* */
204 blt bpf_error /* cr0 = LT */
205 .globl sk_load_byte_msh_negative_offset
206sk_load_byte_msh_negative_offset:
207 sk_negative_common(1)
208 lbz r_X, 0(r_addr)
209 rlwinm r_X, r_X, 2, 32-4-2, 31-2
210 blr
211
212bpf_error_slow:
213 /* fabricate a cr0 = lt */
214 li r_scratch1, -1
215 cmpdi r_scratch1, 0
216bpf_error:
217 /* Entered with cr0 = lt */
218 li r3, 0
219 /* Generated code will 'blt epilogue', returning 0. */
220 blr
diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
index 73619d3aeb6c..2dc8b1484845 100644
--- a/arch/powerpc/net/bpf_jit_comp.c
+++ b/arch/powerpc/net/bpf_jit_comp.c
@@ -127,6 +127,9 @@ static void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)
127 PPC_BLR(); 127 PPC_BLR();
128} 128}
129 129
130#define CHOOSE_LOAD_FUNC(K, func) \
131 ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
132
130/* Assemble the body code between the prologue & epilogue. */ 133/* Assemble the body code between the prologue & epilogue. */
131static int bpf_jit_build_body(struct sk_filter *fp, u32 *image, 134static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
132 struct codegen_context *ctx, 135 struct codegen_context *ctx,
@@ -391,21 +394,16 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
391 394
392 /*** Absolute loads from packet header/data ***/ 395 /*** Absolute loads from packet header/data ***/
393 case BPF_S_LD_W_ABS: 396 case BPF_S_LD_W_ABS:
394 func = sk_load_word; 397 func = CHOOSE_LOAD_FUNC(K, sk_load_word);
395 goto common_load; 398 goto common_load;
396 case BPF_S_LD_H_ABS: 399 case BPF_S_LD_H_ABS:
397 func = sk_load_half; 400 func = CHOOSE_LOAD_FUNC(K, sk_load_half);
398 goto common_load; 401 goto common_load;
399 case BPF_S_LD_B_ABS: 402 case BPF_S_LD_B_ABS:
400 func = sk_load_byte; 403 func = CHOOSE_LOAD_FUNC(K, sk_load_byte);
401 common_load: 404 common_load:
402 /* 405 /* Load from [K]. */
403 * Load from [K]. Reference with the (negative)
404 * SKF_NET_OFF/SKF_LL_OFF offsets is unsupported.
405 */
406 ctx->seen |= SEEN_DATAREF; 406 ctx->seen |= SEEN_DATAREF;
407 if ((int)K < 0)
408 return -ENOTSUPP;
409 PPC_LI64(r_scratch1, func); 407 PPC_LI64(r_scratch1, func);
410 PPC_MTLR(r_scratch1); 408 PPC_MTLR(r_scratch1);
411 PPC_LI32(r_addr, K); 409 PPC_LI32(r_addr, K);
@@ -429,7 +427,7 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
429 common_load_ind: 427 common_load_ind:
430 /* 428 /*
431 * Load from [X + K]. Negative offsets are tested for 429 * Load from [X + K]. Negative offsets are tested for
432 * in the helper functions, and result in a 'ret 0'. 430 * in the helper functions.
433 */ 431 */
434 ctx->seen |= SEEN_DATAREF | SEEN_XREG; 432 ctx->seen |= SEEN_DATAREF | SEEN_XREG;
435 PPC_LI64(r_scratch1, func); 433 PPC_LI64(r_scratch1, func);
@@ -443,13 +441,7 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
443 break; 441 break;
444 442
445 case BPF_S_LDX_B_MSH: 443 case BPF_S_LDX_B_MSH:
446 /* 444 func = CHOOSE_LOAD_FUNC(K, sk_load_byte_msh);
447 * x86 version drops packet (RET 0) when K<0, whereas
448 * interpreter does allow K<0 (__load_pointer, special
449 * ancillary data). common_load returns ENOTSUPP if K<0,
450 * so we fall back to interpreter & filter works.
451 */
452 func = sk_load_byte_msh;
453 goto common_load; 445 goto common_load;
454 break; 446 break;
455 447
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index bfb11e01133e..e2d401ad8fbb 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -93,7 +93,7 @@ struct mpc52xx_pci {
93}; 93};
94 94
95/* MPC5200 device tree match tables */ 95/* MPC5200 device tree match tables */
96const struct of_device_id mpc52xx_pci_ids[] __initdata = { 96const struct of_device_id mpc52xx_pci_ids[] __initconst = {
97 { .type = "pci", .compatible = "fsl,mpc5200-pci", }, 97 { .type = "pci", .compatible = "fsl,mpc5200-pci", },
98 { .type = "pci", .compatible = "mpc5200-pci", }, 98 { .type = "pci", .compatible = "mpc5200-pci", },
99 {} 99 {}
diff --git a/arch/powerpc/platforms/85xx/common.c b/arch/powerpc/platforms/85xx/common.c
index 9fef5302adc1..67dac22b4363 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -21,6 +21,12 @@ static struct of_device_id __initdata mpc85xx_common_ids[] = {
21 { .compatible = "fsl,qe", }, 21 { .compatible = "fsl,qe", },
22 { .compatible = "fsl,cpm2", }, 22 { .compatible = "fsl,cpm2", },
23 { .compatible = "fsl,srio", }, 23 { .compatible = "fsl,srio", },
24 /* So that the DMA channel nodes can be probed individually: */
25 { .compatible = "fsl,eloplus-dma", },
26 /* For the PMC driver */
27 { .compatible = "fsl,mpc8548-guts", },
28 /* Probably unnecessary? */
29 { .compatible = "gpio-leds", },
24 {}, 30 {},
25}; 31};
26 32
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 3754ddc00af7..d208ebccb91c 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -270,7 +270,7 @@ static void __init mpc85xx_mds_qe_init(void)
270 270
271 if (machine_is(p1021_mds)) { 271 if (machine_is(p1021_mds)) {
272 272
273 struct ccsr_guts_85xx __iomem *guts; 273 struct ccsr_guts __iomem *guts;
274 274
275 np = of_find_node_by_name(NULL, "global-utilities"); 275 np = of_find_node_by_name(NULL, "global-utilities");
276 if (np) { 276 if (np) {
@@ -399,12 +399,6 @@ static int __init board_fixups(void)
399machine_arch_initcall(mpc8568_mds, board_fixups); 399machine_arch_initcall(mpc8568_mds, board_fixups);
400machine_arch_initcall(mpc8569_mds, board_fixups); 400machine_arch_initcall(mpc8569_mds, board_fixups);
401 401
402static struct of_device_id mpc85xx_ids[] = {
403 { .compatible = "fsl,mpc8548-guts", },
404 { .compatible = "gpio-leds", },
405 {},
406};
407
408static int __init mpc85xx_publish_devices(void) 402static int __init mpc85xx_publish_devices(void)
409{ 403{
410 if (machine_is(mpc8568_mds)) 404 if (machine_is(mpc8568_mds))
@@ -412,10 +406,7 @@ static int __init mpc85xx_publish_devices(void)
412 if (machine_is(mpc8569_mds)) 406 if (machine_is(mpc8569_mds))
413 simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio"); 407 simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio");
414 408
415 mpc85xx_common_publish_devices(); 409 return mpc85xx_common_publish_devices();
416 of_platform_bus_probe(NULL, mpc85xx_ids, NULL);
417
418 return 0;
419} 410}
420 411
421machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices); 412machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 9848f9e39853..313fce4f5574 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -127,7 +127,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
127#if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE) 127#if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
128 if (machine_is(p1025_rdb)) { 128 if (machine_is(p1025_rdb)) {
129 129
130 struct ccsr_guts_85xx __iomem *guts; 130 struct ccsr_guts __iomem *guts;
131 131
132 np = of_find_node_by_name(NULL, "global-utilities"); 132 np = of_find_node_by_name(NULL, "global-utilities");
133 if (np) { 133 if (np) {
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index 0fe88e39945e..f700c81a1321 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -150,7 +150,7 @@ static void p1022ds_set_monitor_port(enum fsl_diu_monitor_port port)
150{ 150{
151 struct device_node *guts_node; 151 struct device_node *guts_node;
152 struct device_node *indirect_node = NULL; 152 struct device_node *indirect_node = NULL;
153 struct ccsr_guts_85xx __iomem *guts; 153 struct ccsr_guts __iomem *guts;
154 u8 __iomem *lbc_lcs0_ba = NULL; 154 u8 __iomem *lbc_lcs0_ba = NULL;
155 u8 __iomem *lbc_lcs1_ba = NULL; 155 u8 __iomem *lbc_lcs1_ba = NULL;
156 u8 b; 156 u8 b;
@@ -269,7 +269,7 @@ exit:
269void p1022ds_set_pixel_clock(unsigned int pixclock) 269void p1022ds_set_pixel_clock(unsigned int pixclock)
270{ 270{
271 struct device_node *guts_np = NULL; 271 struct device_node *guts_np = NULL;
272 struct ccsr_guts_85xx __iomem *guts; 272 struct ccsr_guts __iomem *guts;
273 unsigned long freq; 273 unsigned long freq;
274 u64 temp; 274 u64 temp;
275 u32 pxclk; 275 u32 pxclk;
@@ -460,18 +460,7 @@ static void __init p1022_ds_setup_arch(void)
460 pr_info("Freescale P1022 DS reference board\n"); 460 pr_info("Freescale P1022 DS reference board\n");
461} 461}
462 462
463static struct of_device_id __initdata p1022_ds_ids[] = { 463machine_device_initcall(p1022_ds, mpc85xx_common_publish_devices);
464 /* So that the DMA channel nodes can be probed individually: */
465 { .compatible = "fsl,eloplus-dma", },
466 {},
467};
468
469static int __init p1022_ds_publish_devices(void)
470{
471 mpc85xx_common_publish_devices();
472 return of_platform_bus_probe(NULL, p1022_ds_ids, NULL);
473}
474machine_device_initcall(p1022_ds, p1022_ds_publish_devices);
475 464
476machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier); 465machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier);
477 466
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index bbc615206c67..62cd3c555bfb 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -225,7 +225,7 @@ void mpc8610hpcd_set_monitor_port(enum fsl_diu_monitor_port port)
225void mpc8610hpcd_set_pixel_clock(unsigned int pixclock) 225void mpc8610hpcd_set_pixel_clock(unsigned int pixclock)
226{ 226{
227 struct device_node *guts_np = NULL; 227 struct device_node *guts_np = NULL;
228 struct ccsr_guts_86xx __iomem *guts; 228 struct ccsr_guts __iomem *guts;
229 unsigned long freq; 229 unsigned long freq;
230 u64 temp; 230 u64 temp;
231 u32 pxclk; 231 u32 pxclk;
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index db360fc4cf0e..85825b5401e5 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -114,7 +114,7 @@ static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
114 pr_devel("axon_msi: woff %x roff %x msi %x\n", 114 pr_devel("axon_msi: woff %x roff %x msi %x\n",
115 write_offset, msic->read_offset, msi); 115 write_offset, msic->read_offset, msi);
116 116
117 if (msi < NR_IRQS && irq_get_chip_data(msi) == msic) { 117 if (msi < nr_irqs && irq_get_chip_data(msi) == msic) {
118 generic_handle_irq(msi); 118 generic_handle_irq(msi);
119 msic->fifo_virt[idx] = cpu_to_le32(0xffffffff); 119 msic->fifo_virt[idx] = cpu_to_le32(0xffffffff);
120 } else { 120 } else {
@@ -276,9 +276,6 @@ static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
276 if (rc) 276 if (rc)
277 return rc; 277 return rc;
278 278
279 /* We rely on being able to stash a virq in a u16 */
280 BUILD_BUG_ON(NR_IRQS > 65536);
281
282 list_for_each_entry(entry, &dev->msi_list, list) { 279 list_for_each_entry(entry, &dev->msi_list, list) {
283 virq = irq_create_direct_mapping(msic->irq_domain); 280 virq = irq_create_direct_mapping(msic->irq_domain);
284 if (virq == NO_IRQ) { 281 if (virq == NO_IRQ) {
@@ -392,7 +389,8 @@ static int axon_msi_probe(struct platform_device *device)
392 } 389 }
393 memset(msic->fifo_virt, 0xff, MSIC_FIFO_SIZE_BYTES); 390 memset(msic->fifo_virt, 0xff, MSIC_FIFO_SIZE_BYTES);
394 391
395 msic->irq_domain = irq_domain_add_nomap(dn, &msic_host_ops, msic); 392 /* We rely on being able to stash a virq in a u16, so limit irqs to < 65536 */
393 msic->irq_domain = irq_domain_add_nomap(dn, 65536, &msic_host_ops, msic);
396 if (!msic->irq_domain) { 394 if (!msic->irq_domain) {
397 printk(KERN_ERR "axon_msi: couldn't allocate irq_domain for %s\n", 395 printk(KERN_ERR "axon_msi: couldn't allocate irq_domain for %s\n",
398 dn->full_name); 396 dn->full_name);
diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c
index e5c3a2c6090d..8c6dc42ecf65 100644
--- a/arch/powerpc/platforms/cell/beat_interrupt.c
+++ b/arch/powerpc/platforms/cell/beat_interrupt.c
@@ -239,7 +239,7 @@ void __init beatic_init_IRQ(void)
239 ppc_md.get_irq = beatic_get_irq; 239 ppc_md.get_irq = beatic_get_irq;
240 240
241 /* Allocate an irq host */ 241 /* Allocate an irq host */
242 beatic_host = irq_domain_add_nomap(NULL, &beatic_pic_host_ops, NULL); 242 beatic_host = irq_domain_add_nomap(NULL, 0, &beatic_pic_host_ops, NULL);
243 BUG_ON(beatic_host == NULL); 243 BUG_ON(beatic_host == NULL);
244 irq_set_default_host(beatic_host); 244 irq_set_default_host(beatic_host);
245} 245}
@@ -248,6 +248,6 @@ void beatic_deinit_IRQ(void)
248{ 248{
249 int i; 249 int i;
250 250
251 for (i = 1; i < NR_IRQS; i++) 251 for (i = 1; i < nr_irqs; i++)
252 beat_destruct_irq_plug(i); 252 beat_destruct_irq_plug(i);
253} 253}
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index ae9fc7bc17d6..b9f509a34c01 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -564,7 +564,8 @@ static struct iommu_table *cell_get_iommu_table(struct device *dev)
564/* A coherent allocation implies strong ordering */ 564/* A coherent allocation implies strong ordering */
565 565
566static void *dma_fixed_alloc_coherent(struct device *dev, size_t size, 566static void *dma_fixed_alloc_coherent(struct device *dev, size_t size,
567 dma_addr_t *dma_handle, gfp_t flag) 567 dma_addr_t *dma_handle, gfp_t flag,
568 struct dma_attrs *attrs)
568{ 569{
569 if (iommu_fixed_is_weak) 570 if (iommu_fixed_is_weak)
570 return iommu_alloc_coherent(dev, cell_get_iommu_table(dev), 571 return iommu_alloc_coherent(dev, cell_get_iommu_table(dev),
@@ -572,18 +573,19 @@ static void *dma_fixed_alloc_coherent(struct device *dev, size_t size,
572 device_to_mask(dev), flag, 573 device_to_mask(dev), flag,
573 dev_to_node(dev)); 574 dev_to_node(dev));
574 else 575 else
575 return dma_direct_ops.alloc_coherent(dev, size, dma_handle, 576 return dma_direct_ops.alloc(dev, size, dma_handle, flag,
576 flag); 577 attrs);
577} 578}
578 579
579static void dma_fixed_free_coherent(struct device *dev, size_t size, 580static void dma_fixed_free_coherent(struct device *dev, size_t size,
580 void *vaddr, dma_addr_t dma_handle) 581 void *vaddr, dma_addr_t dma_handle,
582 struct dma_attrs *attrs)
581{ 583{
582 if (iommu_fixed_is_weak) 584 if (iommu_fixed_is_weak)
583 iommu_free_coherent(cell_get_iommu_table(dev), size, vaddr, 585 iommu_free_coherent(cell_get_iommu_table(dev), size, vaddr,
584 dma_handle); 586 dma_handle);
585 else 587 else
586 dma_direct_ops.free_coherent(dev, size, vaddr, dma_handle); 588 dma_direct_ops.free(dev, size, vaddr, dma_handle, attrs);
587} 589}
588 590
589static dma_addr_t dma_fixed_map_page(struct device *dev, struct page *page, 591static dma_addr_t dma_fixed_map_page(struct device *dev, struct page *page,
@@ -642,8 +644,8 @@ static int dma_fixed_dma_supported(struct device *dev, u64 mask)
642static int dma_set_mask_and_switch(struct device *dev, u64 dma_mask); 644static int dma_set_mask_and_switch(struct device *dev, u64 dma_mask);
643 645
644struct dma_map_ops dma_iommu_fixed_ops = { 646struct dma_map_ops dma_iommu_fixed_ops = {
645 .alloc_coherent = dma_fixed_alloc_coherent, 647 .alloc = dma_fixed_alloc_coherent,
646 .free_coherent = dma_fixed_free_coherent, 648 .free = dma_fixed_free_coherent,
647 .map_sg = dma_fixed_map_sg, 649 .map_sg = dma_fixed_map_sg,
648 .unmap_sg = dma_fixed_unmap_sg, 650 .unmap_sg = dma_fixed_unmap_sg,
649 .dma_supported = dma_fixed_dma_supported, 651 .dma_supported = dma_fixed_dma_supported,
diff --git a/arch/powerpc/platforms/cell/qpace_setup.c b/arch/powerpc/platforms/cell/qpace_setup.c
index 7f9b6742f8b6..6e3409d590ac 100644
--- a/arch/powerpc/platforms/cell/qpace_setup.c
+++ b/arch/powerpc/platforms/cell/qpace_setup.c
@@ -61,7 +61,7 @@ static void qpace_progress(char *s, unsigned short hex)
61 printk("*** %04x : %s\n", hex, s ? s : ""); 61 printk("*** %04x : %s\n", hex, s ? s : "");
62} 62}
63 63
64static const struct of_device_id qpace_bus_ids[] __initdata = { 64static const struct of_device_id qpace_bus_ids[] __initconst = {
65 { .type = "soc", }, 65 { .type = "soc", },
66 { .compatible = "soc", }, 66 { .compatible = "soc", },
67 { .type = "spider", }, 67 { .type = "spider", },
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index fa3e294fd343..4ab087671185 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -140,7 +140,7 @@ static int __devinit cell_setup_phb(struct pci_controller *phb)
140 return 0; 140 return 0;
141} 141}
142 142
143static const struct of_device_id cell_bus_ids[] __initdata = { 143static const struct of_device_id cell_bus_ids[] __initconst = {
144 { .type = "soc", }, 144 { .type = "soc", },
145 { .compatible = "soc", }, 145 { .compatible = "soc", },
146 { .type = "spider", }, 146 { .type = "spider", },
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c
index 996c5ff7824b..03685a329d7d 100644
--- a/arch/powerpc/platforms/powermac/low_i2c.c
+++ b/arch/powerpc/platforms/powermac/low_i2c.c
@@ -366,11 +366,20 @@ static void kw_i2c_timeout(unsigned long data)
366 unsigned long flags; 366 unsigned long flags;
367 367
368 spin_lock_irqsave(&host->lock, flags); 368 spin_lock_irqsave(&host->lock, flags);
369
370 /*
371 * If the timer is pending, that means we raced with the
372 * irq, in which case we just return
373 */
374 if (timer_pending(&host->timeout_timer))
375 goto skip;
376
369 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); 377 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
370 if (host->state != state_idle) { 378 if (host->state != state_idle) {
371 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 379 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
372 add_timer(&host->timeout_timer); 380 add_timer(&host->timeout_timer);
373 } 381 }
382 skip:
374 spin_unlock_irqrestore(&host->lock, flags); 383 spin_unlock_irqrestore(&host->lock, flags);
375} 384}
376 385
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 66ad93de1d55..c4e630576ff2 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -57,9 +57,9 @@ static int max_real_irqs;
57 57
58static DEFINE_RAW_SPINLOCK(pmac_pic_lock); 58static DEFINE_RAW_SPINLOCK(pmac_pic_lock);
59 59
60#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 60/* The max irq number this driver deals with is 128; see max_irqs */
61static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; 61static DECLARE_BITMAP(ppc_lost_interrupts, 128);
62static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; 62static DECLARE_BITMAP(ppc_cached_irq_mask, 128);
63static int pmac_irq_cascade = -1; 63static int pmac_irq_cascade = -1;
64static struct irq_domain *pmac_pic_host; 64static struct irq_domain *pmac_pic_host;
65 65
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index a81e5a88fbdf..b4ddaa3fbb29 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -192,7 +192,7 @@ static int psurge_secondary_ipi_init(void)
192{ 192{
193 int rc = -ENOMEM; 193 int rc = -ENOMEM;
194 194
195 psurge_host = irq_domain_add_nomap(NULL, &psurge_host_ops, NULL); 195 psurge_host = irq_domain_add_nomap(NULL, 0, &psurge_host_ops, NULL);
196 196
197 if (psurge_host) 197 if (psurge_host)
198 psurge_secondary_virq = irq_create_direct_mapping(psurge_host); 198 psurge_secondary_virq = irq_create_direct_mapping(psurge_host);
diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c
index 2a4ff86cc21f..5f3b23220b8e 100644
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -753,9 +753,8 @@ void __init ps3_init_IRQ(void)
753 unsigned cpu; 753 unsigned cpu;
754 struct irq_domain *host; 754 struct irq_domain *host;
755 755
756 host = irq_domain_add_nomap(NULL, &ps3_host_ops, NULL); 756 host = irq_domain_add_nomap(NULL, PS3_PLUG_MAX + 1, &ps3_host_ops, NULL);
757 irq_set_default_host(host); 757 irq_set_default_host(host);
758 irq_set_virq_count(PS3_PLUG_MAX + 1);
759 758
760 for_each_possible_cpu(cpu) { 759 for_each_possible_cpu(cpu) {
761 struct ps3_private *pd = &per_cpu(ps3_private, cpu); 760 struct ps3_private *pd = &per_cpu(ps3_private, cpu);
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index 880eb9ce22c5..5606fe36faf2 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -515,7 +515,8 @@ core_initcall(ps3_system_bus_init);
515 * to the dma address (mapping) of the first page. 515 * to the dma address (mapping) of the first page.
516 */ 516 */
517static void * ps3_alloc_coherent(struct device *_dev, size_t size, 517static void * ps3_alloc_coherent(struct device *_dev, size_t size,
518 dma_addr_t *dma_handle, gfp_t flag) 518 dma_addr_t *dma_handle, gfp_t flag,
519 struct dma_attrs *attrs)
519{ 520{
520 int result; 521 int result;
521 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); 522 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
@@ -552,7 +553,7 @@ clean_none:
552} 553}
553 554
554static void ps3_free_coherent(struct device *_dev, size_t size, void *vaddr, 555static void ps3_free_coherent(struct device *_dev, size_t size, void *vaddr,
555 dma_addr_t dma_handle) 556 dma_addr_t dma_handle, struct dma_attrs *attrs)
556{ 557{
557 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); 558 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
558 559
@@ -701,8 +702,8 @@ static u64 ps3_dma_get_required_mask(struct device *_dev)
701} 702}
702 703
703static struct dma_map_ops ps3_sb_dma_ops = { 704static struct dma_map_ops ps3_sb_dma_ops = {
704 .alloc_coherent = ps3_alloc_coherent, 705 .alloc = ps3_alloc_coherent,
705 .free_coherent = ps3_free_coherent, 706 .free = ps3_free_coherent,
706 .map_sg = ps3_sb_map_sg, 707 .map_sg = ps3_sb_map_sg,
707 .unmap_sg = ps3_sb_unmap_sg, 708 .unmap_sg = ps3_sb_unmap_sg,
708 .dma_supported = ps3_dma_supported, 709 .dma_supported = ps3_dma_supported,
@@ -712,8 +713,8 @@ static struct dma_map_ops ps3_sb_dma_ops = {
712}; 713};
713 714
714static struct dma_map_ops ps3_ioc0_dma_ops = { 715static struct dma_map_ops ps3_ioc0_dma_ops = {
715 .alloc_coherent = ps3_alloc_coherent, 716 .alloc = ps3_alloc_coherent,
716 .free_coherent = ps3_free_coherent, 717 .free = ps3_free_coherent,
717 .map_sg = ps3_ioc0_map_sg, 718 .map_sg = ps3_ioc0_map_sg,
718 .unmap_sg = ps3_ioc0_unmap_sg, 719 .unmap_sg = ps3_ioc0_unmap_sg,
719 .dma_supported = ps3_dma_supported, 720 .dma_supported = ps3_dma_supported,
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index aadbe4f6d537..178a5f300bc9 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -30,9 +30,9 @@ config PPC_SPLPAR
30 two or more partitions. 30 two or more partitions.
31 31
32config EEH 32config EEH
33 bool "PCI Extended Error Handling (EEH)" if EXPERT 33 bool
34 depends on PPC_PSERIES && PCI 34 depends on PPC_PSERIES && PCI
35 default y if !EXPERT 35 default y
36 36
37config PSERIES_MSI 37config PSERIES_MSI
38 bool 38 bool
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 309d38ef7322..a75e37dc41aa 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -1076,7 +1076,7 @@ static void eeh_add_device_late(struct pci_dev *dev)
1076 pr_debug("EEH: Adding device %s\n", pci_name(dev)); 1076 pr_debug("EEH: Adding device %s\n", pci_name(dev));
1077 1077
1078 dn = pci_device_to_OF_node(dev); 1078 dn = pci_device_to_OF_node(dev);
1079 edev = pci_dev_to_eeh_dev(dev); 1079 edev = of_node_to_eeh_dev(dn);
1080 if (edev->pdev == dev) { 1080 if (edev->pdev == dev) {
1081 pr_debug("EEH: Already referenced !\n"); 1081 pr_debug("EEH: Already referenced !\n");
1082 return; 1082 return;
diff --git a/arch/powerpc/platforms/pseries/eeh_event.c b/arch/powerpc/platforms/pseries/eeh_event.c
index 4a4752565856..4cb375c0f8d1 100644
--- a/arch/powerpc/platforms/pseries/eeh_event.c
+++ b/arch/powerpc/platforms/pseries/eeh_event.c
@@ -59,8 +59,7 @@ static int eeh_event_handler(void * dummy)
59 struct eeh_event *event; 59 struct eeh_event *event;
60 struct eeh_dev *edev; 60 struct eeh_dev *edev;
61 61
62 daemonize("eehd"); 62 set_task_comm(current, "eehd");
63 set_current_state(TASK_INTERRUPTIBLE);
64 63
65 spin_lock_irqsave(&eeh_eventlist_lock, flags); 64 spin_lock_irqsave(&eeh_eventlist_lock, flags);
66 event = NULL; 65 event = NULL;
@@ -83,6 +82,7 @@ static int eeh_event_handler(void * dummy)
83 printk(KERN_INFO "EEH: Detected PCI bus error on device %s\n", 82 printk(KERN_INFO "EEH: Detected PCI bus error on device %s\n",
84 eeh_pci_name(edev->pdev)); 83 eeh_pci_name(edev->pdev));
85 84
85 set_current_state(TASK_INTERRUPTIBLE); /* Don't add to load average */
86 edev = handle_eeh_events(event); 86 edev = handle_eeh_events(event);
87 87
88 eeh_clear_slot(eeh_dev_to_of_node(edev), EEH_MODE_RECOVERING); 88 eeh_clear_slot(eeh_dev_to_of_node(edev), EEH_MODE_RECOVERING);
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index d3be961e2ae7..10386b676d87 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -51,8 +51,7 @@
51static intctl_cpm2_t __iomem *cpm2_intctl; 51static intctl_cpm2_t __iomem *cpm2_intctl;
52 52
53static struct irq_domain *cpm2_pic_host; 53static struct irq_domain *cpm2_pic_host;
54#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 54static unsigned long ppc_cached_irq_mask[2]; /* 2 32-bit registers */
55static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
56 55
57static const u_char irq_to_siureg[] = { 56static const u_char irq_to_siureg[] = {
58 1, 1, 1, 1, 1, 1, 1, 1, 57 1, 1, 1, 1, 1, 1, 1, 1,
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index d5f5416be310..b724622c3a0b 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -18,69 +18,45 @@
18extern int cpm_get_irq(struct pt_regs *regs); 18extern int cpm_get_irq(struct pt_regs *regs);
19 19
20static struct irq_domain *mpc8xx_pic_host; 20static struct irq_domain *mpc8xx_pic_host;
21#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 21static unsigned long mpc8xx_cached_irq_mask;
22static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
23static sysconf8xx_t __iomem *siu_reg; 22static sysconf8xx_t __iomem *siu_reg;
24 23
25int cpm_get_irq(struct pt_regs *regs); 24static inline unsigned long mpc8xx_irqd_to_bit(struct irq_data *d)
25{
26 return 0x80000000 >> irqd_to_hwirq(d);
27}
26 28
27static void mpc8xx_unmask_irq(struct irq_data *d) 29static void mpc8xx_unmask_irq(struct irq_data *d)
28{ 30{
29 int bit, word; 31 mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);
30 unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); 32 out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
31
32 bit = irq_nr & 0x1f;
33 word = irq_nr >> 5;
34
35 ppc_cached_irq_mask[word] |= (1 << (31-bit));
36 out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
37} 33}
38 34
39static void mpc8xx_mask_irq(struct irq_data *d) 35static void mpc8xx_mask_irq(struct irq_data *d)
40{ 36{
41 int bit, word; 37 mpc8xx_cached_irq_mask &= ~mpc8xx_irqd_to_bit(d);
42 unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); 38 out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
43
44 bit = irq_nr & 0x1f;
45 word = irq_nr >> 5;
46
47 ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
48 out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
49} 39}
50 40
51static void mpc8xx_ack(struct irq_data *d) 41static void mpc8xx_ack(struct irq_data *d)
52{ 42{
53 int bit; 43 out_be32(&siu_reg->sc_sipend, mpc8xx_irqd_to_bit(d));
54 unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);
55
56 bit = irq_nr & 0x1f;
57 out_be32(&siu_reg->sc_sipend, 1 << (31-bit));
58} 44}
59 45
60static void mpc8xx_end_irq(struct irq_data *d) 46static void mpc8xx_end_irq(struct irq_data *d)
61{ 47{
62 int bit, word; 48 mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);
63 unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); 49 out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
64
65 bit = irq_nr & 0x1f;
66 word = irq_nr >> 5;
67
68 ppc_cached_irq_mask[word] |= (1 << (31-bit));
69 out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
70} 50}
71 51
72static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type) 52static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type)
73{ 53{
74 if (flow_type & IRQ_TYPE_EDGE_FALLING) { 54 /* only external IRQ senses are programmable */
75 irq_hw_number_t hw = (unsigned int)irqd_to_hwirq(d); 55 if ((flow_type & IRQ_TYPE_EDGE_FALLING) && !(irqd_to_hwirq(d) & 1)) {
76 unsigned int siel = in_be32(&siu_reg->sc_siel); 56 unsigned int siel = in_be32(&siu_reg->sc_siel);
77 57 siel |= mpc8xx_irqd_to_bit(d);
78 /* only external IRQ senses are programmable */ 58 out_be32(&siu_reg->sc_siel, siel);
79 if ((hw & 1) == 0) { 59 __irq_set_handler_locked(d->irq, handle_edge_irq);
80 siel |= (0x80000000 >> hw);
81 out_be32(&siu_reg->sc_siel, siel);
82 __irq_set_handler_locked(d->irq, handle_edge_irq);
83 }
84 } 60 }
85 return 0; 61 return 0;
86} 62}
@@ -132,6 +108,9 @@ static int mpc8xx_pic_host_xlate(struct irq_domain *h, struct device_node *ct,
132 IRQ_TYPE_EDGE_FALLING, 108 IRQ_TYPE_EDGE_FALLING,
133 }; 109 };
134 110
111 if (intspec[0] > 0x1f)
112 return 0;
113
135 *out_hwirq = intspec[0]; 114 *out_hwirq = intspec[0];
136 if (intsize > 1 && intspec[1] < 4) 115 if (intsize > 1 && intspec[1] < 4)
137 *out_flags = map_pic_senses[intspec[1]]; 116 *out_flags = map_pic_senses[intspec[1]];
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 9ac71ebd2c40..395af1347749 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -604,18 +604,14 @@ static struct mpic *mpic_find(unsigned int irq)
604} 604}
605 605
606/* Determine if the linux irq is an IPI */ 606/* Determine if the linux irq is an IPI */
607static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int irq) 607static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int src)
608{ 608{
609 unsigned int src = virq_to_hw(irq);
610
611 return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]); 609 return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]);
612} 610}
613 611
614/* Determine if the linux irq is a timer */ 612/* Determine if the linux irq is a timer */
615static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int irq) 613static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int src)
616{ 614{
617 unsigned int src = virq_to_hw(irq);
618
619 return (src >= mpic->timer_vecs[0] && src <= mpic->timer_vecs[7]); 615 return (src >= mpic->timer_vecs[0] && src <= mpic->timer_vecs[7]);
620} 616}
621 617
@@ -876,21 +872,45 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type)
876 if (src >= mpic->num_sources) 872 if (src >= mpic->num_sources)
877 return -EINVAL; 873 return -EINVAL;
878 874
875 vold = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI));
876
877 /* We don't support "none" type */
879 if (flow_type == IRQ_TYPE_NONE) 878 if (flow_type == IRQ_TYPE_NONE)
880 if (mpic->senses && src < mpic->senses_count) 879 flow_type = IRQ_TYPE_DEFAULT;
881 flow_type = mpic->senses[src]; 880
882 if (flow_type == IRQ_TYPE_NONE) 881 /* Default: read HW settings */
883 flow_type = IRQ_TYPE_LEVEL_LOW; 882 if (flow_type == IRQ_TYPE_DEFAULT) {
883 switch(vold & (MPIC_INFO(VECPRI_POLARITY_MASK) |
884 MPIC_INFO(VECPRI_SENSE_MASK))) {
885 case MPIC_INFO(VECPRI_SENSE_EDGE) |
886 MPIC_INFO(VECPRI_POLARITY_POSITIVE):
887 flow_type = IRQ_TYPE_EDGE_RISING;
888 break;
889 case MPIC_INFO(VECPRI_SENSE_EDGE) |
890 MPIC_INFO(VECPRI_POLARITY_NEGATIVE):
891 flow_type = IRQ_TYPE_EDGE_FALLING;
892 break;
893 case MPIC_INFO(VECPRI_SENSE_LEVEL) |
894 MPIC_INFO(VECPRI_POLARITY_POSITIVE):
895 flow_type = IRQ_TYPE_LEVEL_HIGH;
896 break;
897 case MPIC_INFO(VECPRI_SENSE_LEVEL) |
898 MPIC_INFO(VECPRI_POLARITY_NEGATIVE):
899 flow_type = IRQ_TYPE_LEVEL_LOW;
900 break;
901 }
902 }
884 903
904 /* Apply to irq desc */
885 irqd_set_trigger_type(d, flow_type); 905 irqd_set_trigger_type(d, flow_type);
886 906
907 /* Apply to HW */
887 if (mpic_is_ht_interrupt(mpic, src)) 908 if (mpic_is_ht_interrupt(mpic, src))
888 vecpri = MPIC_VECPRI_POLARITY_POSITIVE | 909 vecpri = MPIC_VECPRI_POLARITY_POSITIVE |
889 MPIC_VECPRI_SENSE_EDGE; 910 MPIC_VECPRI_SENSE_EDGE;
890 else 911 else
891 vecpri = mpic_type_to_vecpri(mpic, flow_type); 912 vecpri = mpic_type_to_vecpri(mpic, flow_type);
892 913
893 vold = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI));
894 vnew = vold & ~(MPIC_INFO(VECPRI_POLARITY_MASK) | 914 vnew = vold & ~(MPIC_INFO(VECPRI_POLARITY_MASK) |
895 MPIC_INFO(VECPRI_SENSE_MASK)); 915 MPIC_INFO(VECPRI_SENSE_MASK));
896 vnew |= vecpri; 916 vnew |= vecpri;
@@ -1026,7 +1046,7 @@ static int mpic_host_map(struct irq_domain *h, unsigned int virq,
1026 irq_set_chip_and_handler(virq, chip, handle_fasteoi_irq); 1046 irq_set_chip_and_handler(virq, chip, handle_fasteoi_irq);
1027 1047
1028 /* Set default irq type */ 1048 /* Set default irq type */
1029 irq_set_irq_type(virq, IRQ_TYPE_NONE); 1049 irq_set_irq_type(virq, IRQ_TYPE_DEFAULT);
1030 1050
1031 /* If the MPIC was reset, then all vectors have already been 1051 /* If the MPIC was reset, then all vectors have already been
1032 * initialized. Otherwise, a per source lazy initialization 1052 * initialized. Otherwise, a per source lazy initialization
@@ -1417,12 +1437,6 @@ void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
1417 mpic->num_sources = isu_first + mpic->isu_size; 1437 mpic->num_sources = isu_first + mpic->isu_size;
1418} 1438}
1419 1439
1420void __init mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count)
1421{
1422 mpic->senses = senses;
1423 mpic->senses_count = count;
1424}
1425
1426void __init mpic_init(struct mpic *mpic) 1440void __init mpic_init(struct mpic *mpic)
1427{ 1441{
1428 int i, cpu; 1442 int i, cpu;
@@ -1555,12 +1569,12 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
1555 return; 1569 return;
1556 1570
1557 raw_spin_lock_irqsave(&mpic_lock, flags); 1571 raw_spin_lock_irqsave(&mpic_lock, flags);
1558 if (mpic_is_ipi(mpic, irq)) { 1572 if (mpic_is_ipi(mpic, src)) {
1559 reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & 1573 reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) &
1560 ~MPIC_VECPRI_PRIORITY_MASK; 1574 ~MPIC_VECPRI_PRIORITY_MASK;
1561 mpic_ipi_write(src - mpic->ipi_vecs[0], 1575 mpic_ipi_write(src - mpic->ipi_vecs[0],
1562 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); 1576 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
1563 } else if (mpic_is_tm(mpic, irq)) { 1577 } else if (mpic_is_tm(mpic, src)) {
1564 reg = mpic_tm_read(src - mpic->timer_vecs[0]) & 1578 reg = mpic_tm_read(src - mpic->timer_vecs[0]) &
1565 ~MPIC_VECPRI_PRIORITY_MASK; 1579 ~MPIC_VECPRI_PRIORITY_MASK;
1566 mpic_tm_write(src - mpic->timer_vecs[0], 1580 mpic_tm_write(src - mpic->timer_vecs[0],
diff --git a/arch/powerpc/sysdev/mpic_msgr.c b/arch/powerpc/sysdev/mpic_msgr.c
index 6e7fa386e76a..483d8fa72e8b 100644
--- a/arch/powerpc/sysdev/mpic_msgr.c
+++ b/arch/powerpc/sysdev/mpic_msgr.c
@@ -27,6 +27,7 @@
27 27
28static struct mpic_msgr **mpic_msgrs; 28static struct mpic_msgr **mpic_msgrs;
29static unsigned int mpic_msgr_count; 29static unsigned int mpic_msgr_count;
30static DEFINE_RAW_SPINLOCK(msgrs_lock);
30 31
31static inline void _mpic_msgr_mer_write(struct mpic_msgr *msgr, u32 value) 32static inline void _mpic_msgr_mer_write(struct mpic_msgr *msgr, u32 value)
32{ 33{
@@ -56,12 +57,11 @@ struct mpic_msgr *mpic_msgr_get(unsigned int reg_num)
56 if (reg_num >= mpic_msgr_count) 57 if (reg_num >= mpic_msgr_count)
57 return ERR_PTR(-ENODEV); 58 return ERR_PTR(-ENODEV);
58 59
59 raw_spin_lock_irqsave(&msgr->lock, flags); 60 raw_spin_lock_irqsave(&msgrs_lock, flags);
60 if (mpic_msgrs[reg_num]->in_use == MSGR_FREE) { 61 msgr = mpic_msgrs[reg_num];
61 msgr = mpic_msgrs[reg_num]; 62 if (msgr->in_use == MSGR_FREE)
62 msgr->in_use = MSGR_INUSE; 63 msgr->in_use = MSGR_INUSE;
63 } 64 raw_spin_unlock_irqrestore(&msgrs_lock, flags);
64 raw_spin_unlock_irqrestore(&msgr->lock, flags);
65 65
66 return msgr; 66 return msgr;
67} 67}
@@ -228,7 +228,7 @@ static __devinit int mpic_msgr_probe(struct platform_device *dev)
228 228
229 reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i; 229 reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i;
230 msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE; 230 msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE;
231 msgr->mer = msgr->base + MPIC_MSGR_MER_OFFSET; 231 msgr->mer = (u32 *)((u8 *)msgr->base + MPIC_MSGR_MER_OFFSET);
232 msgr->in_use = MSGR_FREE; 232 msgr->in_use = MSGR_FREE;
233 msgr->num = i; 233 msgr->num = i;
234 raw_spin_lock_init(&msgr->lock); 234 raw_spin_lock_init(&msgr->lock);
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index ceb09cbd2329..818e763f8265 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. 2 * Copyright (C) 2006-2010 Freescale Semicondutor, Inc. All rights reserved.
3 * 3 *
4 * Authors: Shlomi Gridish <gridish@freescale.com> 4 * Authors: Shlomi Gridish <gridish@freescale.com>
5 * Li Yang <leoli@freescale.com> 5 * Li Yang <leoli@freescale.com>
@@ -266,7 +266,19 @@ EXPORT_SYMBOL(qe_clock_source);
266static void qe_snums_init(void) 266static void qe_snums_init(void)
267{ 267{
268 int i; 268 int i;
269 static const u8 snum_init[] = { 269 static const u8 snum_init_76[] = {
270 0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D,
271 0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89,
272 0x98, 0x99, 0xA8, 0xA9, 0xB8, 0xB9, 0xC8, 0xC9,
273 0xD8, 0xD9, 0xE8, 0xE9, 0x44, 0x45, 0x4C, 0x4D,
274 0x54, 0x55, 0x5C, 0x5D, 0x64, 0x65, 0x6C, 0x6D,
275 0x74, 0x75, 0x7C, 0x7D, 0x84, 0x85, 0x8C, 0x8D,
276 0x94, 0x95, 0x9C, 0x9D, 0xA4, 0xA5, 0xAC, 0xAD,
277 0xB4, 0xB5, 0xBC, 0xBD, 0xC4, 0xC5, 0xCC, 0xCD,
278 0xD4, 0xD5, 0xDC, 0xDD, 0xE4, 0xE5, 0xEC, 0xED,
279 0xF4, 0xF5, 0xFC, 0xFD,
280 };
281 static const u8 snum_init_46[] = {
270 0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D, 282 0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D,
271 0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89, 283 0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89,
272 0x98, 0x99, 0xA8, 0xA9, 0xB8, 0xB9, 0xC8, 0xC9, 284 0x98, 0x99, 0xA8, 0xA9, 0xB8, 0xB9, 0xC8, 0xC9,
@@ -274,9 +286,15 @@ static void qe_snums_init(void)
274 0x28, 0x29, 0x38, 0x39, 0x48, 0x49, 0x58, 0x59, 286 0x28, 0x29, 0x38, 0x39, 0x48, 0x49, 0x58, 0x59,
275 0x68, 0x69, 0x78, 0x79, 0x80, 0x81, 287 0x68, 0x69, 0x78, 0x79, 0x80, 0x81,
276 }; 288 };
289 static const u8 *snum_init;
277 290
278 qe_num_of_snum = qe_get_num_of_snums(); 291 qe_num_of_snum = qe_get_num_of_snums();
279 292
293 if (qe_num_of_snum == 76)
294 snum_init = snum_init_76;
295 else
296 snum_init = snum_init_46;
297
280 for (i = 0; i < qe_num_of_snum; i++) { 298 for (i = 0; i < qe_num_of_snum; i++) {
281 snums[i].num = snum_init[i]; 299 snums[i].num = snum_init[i];
282 snums[i].state = QE_SNUM_STATE_FREE; 300 snums[i].state = QE_SNUM_STATE_FREE;
diff --git a/arch/powerpc/sysdev/scom.c b/arch/powerpc/sysdev/scom.c
index 49a3ece1c6b3..702256a1ca11 100644
--- a/arch/powerpc/sysdev/scom.c
+++ b/arch/powerpc/sysdev/scom.c
@@ -22,6 +22,7 @@
22#include <linux/debugfs.h> 22#include <linux/debugfs.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/export.h> 24#include <linux/export.h>
25#include <asm/debug.h>
25#include <asm/prom.h> 26#include <asm/prom.h>
26#include <asm/scom.h> 27#include <asm/scom.h>
27 28
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
index ea5e204e3450..cd1d18db92c6 100644
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -188,6 +188,7 @@ void xics_migrate_irqs_away(void)
188{ 188{
189 int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id(); 189 int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
190 unsigned int irq, virq; 190 unsigned int irq, virq;
191 struct irq_desc *desc;
191 192
192 /* If we used to be the default server, move to the new "boot_cpuid" */ 193 /* If we used to be the default server, move to the new "boot_cpuid" */
193 if (hw_cpu == xics_default_server) 194 if (hw_cpu == xics_default_server)
@@ -202,8 +203,7 @@ void xics_migrate_irqs_away(void)
202 /* Allow IPIs again... */ 203 /* Allow IPIs again... */
203 icp_ops->set_priority(DEFAULT_PRIORITY); 204 icp_ops->set_priority(DEFAULT_PRIORITY);
204 205
205 for_each_irq(virq) { 206 for_each_irq_desc(virq, desc) {
206 struct irq_desc *desc;
207 struct irq_chip *chip; 207 struct irq_chip *chip;
208 long server; 208 long server;
209 unsigned long flags; 209 unsigned long flags;
@@ -212,9 +212,8 @@ void xics_migrate_irqs_away(void)
212 /* We can't set affinity on ISA interrupts */ 212 /* We can't set affinity on ISA interrupts */
213 if (virq < NUM_ISA_INTERRUPTS) 213 if (virq < NUM_ISA_INTERRUPTS)
214 continue; 214 continue;
215 desc = irq_to_desc(virq);
216 /* We only need to migrate enabled IRQS */ 215 /* We only need to migrate enabled IRQS */
217 if (!desc || !desc->action) 216 if (!desc->action)
218 continue; 217 continue;
219 if (desc->irq_data.domain != xics_host) 218 if (desc->irq_data.domain != xics_host)
220 continue; 219 continue;
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 2b7c0fbe578e..9015060919a0 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -90,7 +90,6 @@ config S390
90 select HAVE_KERNEL_XZ 90 select HAVE_KERNEL_XZ
91 select HAVE_ARCH_MUTEX_CPU_RELAX 91 select HAVE_ARCH_MUTEX_CPU_RELAX
92 select HAVE_ARCH_JUMP_LABEL if !MARCH_G5 92 select HAVE_ARCH_JUMP_LABEL if !MARCH_G5
93 select HAVE_RCU_TABLE_FREE if SMP
94 select ARCH_SAVE_PAGE_KEYS if HIBERNATION 93 select ARCH_SAVE_PAGE_KEYS if HIBERNATION
95 select HAVE_MEMBLOCK 94 select HAVE_MEMBLOCK
96 select HAVE_MEMBLOCK_NODE_MAP 95 select HAVE_MEMBLOCK_NODE_MAP
diff --git a/arch/s390/defconfig b/arch/s390/defconfig
index 6cf8e26b3137..1957a9dd256d 100644
--- a/arch/s390/defconfig
+++ b/arch/s390/defconfig
@@ -1,8 +1,12 @@
1CONFIG_EXPERIMENTAL=y 1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y 2CONFIG_SYSVIPC=y
3CONFIG_POSIX_MQUEUE=y 3CONFIG_POSIX_MQUEUE=y
4CONFIG_FHANDLE=y
5CONFIG_TASKSTATS=y
6CONFIG_TASK_DELAY_ACCT=y
7CONFIG_TASK_XACCT=y
8CONFIG_TASK_IO_ACCOUNTING=y
4CONFIG_AUDIT=y 9CONFIG_AUDIT=y
5CONFIG_RCU_TRACE=y
6CONFIG_IKCONFIG=y 10CONFIG_IKCONFIG=y
7CONFIG_IKCONFIG_PROC=y 11CONFIG_IKCONFIG_PROC=y
8CONFIG_CGROUPS=y 12CONFIG_CGROUPS=y
@@ -14,16 +18,22 @@ CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y
14CONFIG_CGROUP_SCHED=y 18CONFIG_CGROUP_SCHED=y
15CONFIG_RT_GROUP_SCHED=y 19CONFIG_RT_GROUP_SCHED=y
16CONFIG_BLK_CGROUP=y 20CONFIG_BLK_CGROUP=y
21CONFIG_NAMESPACES=y
17CONFIG_BLK_DEV_INITRD=y 22CONFIG_BLK_DEV_INITRD=y
18# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 23CONFIG_RD_BZIP2=y
24CONFIG_RD_LZMA=y
25CONFIG_RD_XZ=y
26CONFIG_RD_LZO=y
27CONFIG_EXPERT=y
19# CONFIG_COMPAT_BRK is not set 28# CONFIG_COMPAT_BRK is not set
20CONFIG_SLAB=y
21CONFIG_PROFILING=y 29CONFIG_PROFILING=y
22CONFIG_OPROFILE=y 30CONFIG_OPROFILE=y
23CONFIG_KPROBES=y 31CONFIG_KPROBES=y
24CONFIG_MODULES=y 32CONFIG_MODULES=y
25CONFIG_MODULE_UNLOAD=y 33CONFIG_MODULE_UNLOAD=y
26CONFIG_MODVERSIONS=y 34CONFIG_MODVERSIONS=y
35CONFIG_PARTITION_ADVANCED=y
36CONFIG_IBM_PARTITION=y
27CONFIG_DEFAULT_DEADLINE=y 37CONFIG_DEFAULT_DEADLINE=y
28CONFIG_NO_HZ=y 38CONFIG_NO_HZ=y
29CONFIG_HIGH_RES_TIMERS=y 39CONFIG_HIGH_RES_TIMERS=y
@@ -34,18 +44,15 @@ CONFIG_KSM=y
34CONFIG_BINFMT_MISC=m 44CONFIG_BINFMT_MISC=m
35CONFIG_CMM=m 45CONFIG_CMM=m
36CONFIG_HZ_100=y 46CONFIG_HZ_100=y
37CONFIG_KEXEC=y 47CONFIG_CRASH_DUMP=y
38CONFIG_PM=y
39CONFIG_HIBERNATION=y 48CONFIG_HIBERNATION=y
40CONFIG_PACKET=y 49CONFIG_PACKET=y
41CONFIG_UNIX=y 50CONFIG_UNIX=y
42CONFIG_NET_KEY=y 51CONFIG_NET_KEY=y
43CONFIG_AFIUCV=m
44CONFIG_INET=y 52CONFIG_INET=y
45CONFIG_IP_MULTICAST=y 53CONFIG_IP_MULTICAST=y
46# CONFIG_INET_LRO is not set 54# CONFIG_INET_LRO is not set
47CONFIG_IPV6=y 55CONFIG_IPV6=y
48CONFIG_NET_SCTPPROBE=m
49CONFIG_L2TP=m 56CONFIG_L2TP=m
50CONFIG_L2TP_DEBUGFS=m 57CONFIG_L2TP_DEBUGFS=m
51CONFIG_VLAN_8021Q=y 58CONFIG_VLAN_8021Q=y
@@ -84,15 +91,14 @@ CONFIG_SCSI_CONSTANTS=y
84CONFIG_SCSI_LOGGING=y 91CONFIG_SCSI_LOGGING=y
85CONFIG_SCSI_SCAN_ASYNC=y 92CONFIG_SCSI_SCAN_ASYNC=y
86CONFIG_ZFCP=y 93CONFIG_ZFCP=y
87CONFIG_ZFCP_DIF=y
88CONFIG_NETDEVICES=y 94CONFIG_NETDEVICES=y
89CONFIG_DUMMY=m
90CONFIG_BONDING=m 95CONFIG_BONDING=m
96CONFIG_DUMMY=m
91CONFIG_EQUALIZER=m 97CONFIG_EQUALIZER=m
92CONFIG_TUN=m 98CONFIG_TUN=m
93CONFIG_NET_ETHERNET=y
94CONFIG_VIRTIO_NET=y 99CONFIG_VIRTIO_NET=y
95CONFIG_RAW_DRIVER=m 100CONFIG_RAW_DRIVER=m
101CONFIG_VIRTIO_BALLOON=y
96CONFIG_EXT2_FS=y 102CONFIG_EXT2_FS=y
97CONFIG_EXT3_FS=y 103CONFIG_EXT3_FS=y
98# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 104# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
@@ -103,27 +109,21 @@ CONFIG_PROC_KCORE=y
103CONFIG_TMPFS=y 109CONFIG_TMPFS=y
104CONFIG_TMPFS_POSIX_ACL=y 110CONFIG_TMPFS_POSIX_ACL=y
105# CONFIG_NETWORK_FILESYSTEMS is not set 111# CONFIG_NETWORK_FILESYSTEMS is not set
106CONFIG_PARTITION_ADVANCED=y
107CONFIG_IBM_PARTITION=y
108CONFIG_DLM=m
109CONFIG_MAGIC_SYSRQ=y 112CONFIG_MAGIC_SYSRQ=y
110CONFIG_DEBUG_KERNEL=y
111CONFIG_TIMER_STATS=y 113CONFIG_TIMER_STATS=y
112CONFIG_PROVE_LOCKING=y 114CONFIG_PROVE_LOCKING=y
113CONFIG_PROVE_RCU=y 115CONFIG_PROVE_RCU=y
114CONFIG_LOCK_STAT=y 116CONFIG_LOCK_STAT=y
115CONFIG_DEBUG_LOCKDEP=y 117CONFIG_DEBUG_LOCKDEP=y
116CONFIG_DEBUG_SPINLOCK_SLEEP=y
117CONFIG_DEBUG_LIST=y 118CONFIG_DEBUG_LIST=y
118CONFIG_DEBUG_NOTIFIERS=y 119CONFIG_DEBUG_NOTIFIERS=y
119# CONFIG_RCU_CPU_STALL_DETECTOR is not set 120CONFIG_RCU_TRACE=y
120CONFIG_KPROBES_SANITY_TEST=y 121CONFIG_KPROBES_SANITY_TEST=y
121CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y 122CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y
122CONFIG_CPU_NOTIFIER_ERROR_INJECT=m 123CONFIG_CPU_NOTIFIER_ERROR_INJECT=m
123CONFIG_LATENCYTOP=y 124CONFIG_LATENCYTOP=y
124CONFIG_SYSCTL_SYSCALL_CHECK=y
125CONFIG_DEBUG_PAGEALLOC=y 125CONFIG_DEBUG_PAGEALLOC=y
126# CONFIG_FTRACE is not set 126CONFIG_BLK_DEV_IO_TRACE=y
127# CONFIG_STRICT_DEVMEM is not set 127# CONFIG_STRICT_DEVMEM is not set
128CONFIG_CRYPTO_NULL=m 128CONFIG_CRYPTO_NULL=m
129CONFIG_CRYPTO_CRYPTD=m 129CONFIG_CRYPTO_CRYPTD=m
@@ -173,4 +173,3 @@ CONFIG_CRYPTO_SHA512_S390=m
173CONFIG_CRYPTO_DES_S390=m 173CONFIG_CRYPTO_DES_S390=m
174CONFIG_CRYPTO_AES_S390=m 174CONFIG_CRYPTO_AES_S390=m
175CONFIG_CRC7=m 175CONFIG_CRC7=m
176CONFIG_VIRTIO_BALLOON=y
diff --git a/arch/s390/include/asm/facility.h b/arch/s390/include/asm/facility.h
index 1e5b27edc0c9..2ee66a65f2d4 100644
--- a/arch/s390/include/asm/facility.h
+++ b/arch/s390/include/asm/facility.h
@@ -38,12 +38,11 @@ static inline void stfle(u64 *stfle_fac_list, int size)
38 unsigned long nr; 38 unsigned long nr;
39 39
40 preempt_disable(); 40 preempt_disable();
41 S390_lowcore.stfl_fac_list = 0;
42 asm volatile( 41 asm volatile(
43 " .insn s,0xb2b10000,0(0)\n" /* stfl */ 42 " .insn s,0xb2b10000,0(0)\n" /* stfl */
44 "0:\n" 43 "0:\n"
45 EX_TABLE(0b, 0b) 44 EX_TABLE(0b, 0b)
46 : "=m" (S390_lowcore.stfl_fac_list)); 45 : "+m" (S390_lowcore.stfl_fac_list));
47 nr = 4; /* bytes stored by stfl */ 46 nr = 4; /* bytes stored by stfl */
48 memcpy(stfle_fac_list, &S390_lowcore.stfl_fac_list, 4); 47 memcpy(stfle_fac_list, &S390_lowcore.stfl_fac_list, 4);
49 if (S390_lowcore.stfl_fac_list & 0x01000000) { 48 if (S390_lowcore.stfl_fac_list & 0x01000000) {
diff --git a/arch/s390/include/asm/pgalloc.h b/arch/s390/include/asm/pgalloc.h
index 8eef9b5b3cf4..78e3041919de 100644
--- a/arch/s390/include/asm/pgalloc.h
+++ b/arch/s390/include/asm/pgalloc.h
@@ -22,10 +22,7 @@ void crst_table_free(struct mm_struct *, unsigned long *);
22 22
23unsigned long *page_table_alloc(struct mm_struct *, unsigned long); 23unsigned long *page_table_alloc(struct mm_struct *, unsigned long);
24void page_table_free(struct mm_struct *, unsigned long *); 24void page_table_free(struct mm_struct *, unsigned long *);
25#ifdef CONFIG_HAVE_RCU_TABLE_FREE
26void page_table_free_rcu(struct mmu_gather *, unsigned long *); 25void page_table_free_rcu(struct mmu_gather *, unsigned long *);
27void __tlb_remove_table(void *_table);
28#endif
29 26
30static inline void clear_table(unsigned long *s, unsigned long val, size_t n) 27static inline void clear_table(unsigned long *s, unsigned long val, size_t n)
31{ 28{
diff --git a/arch/s390/include/asm/swab.h b/arch/s390/include/asm/swab.h
index 6bdee21c077e..a3e4ebb32090 100644
--- a/arch/s390/include/asm/swab.h
+++ b/arch/s390/include/asm/swab.h
@@ -77,7 +77,7 @@ static inline __u16 __arch_swab16p(const __u16 *x)
77 77
78 asm volatile( 78 asm volatile(
79#ifndef __s390x__ 79#ifndef __s390x__
80 " icm %0,2,%O+1(%R1)\n" 80 " icm %0,2,%O1+1(%R1)\n"
81 " ic %0,%1\n" 81 " ic %0,%1\n"
82 : "=&d" (result) : "Q" (*x) : "cc"); 82 : "=&d" (result) : "Q" (*x) : "cc");
83#else /* __s390x__ */ 83#else /* __s390x__ */
diff --git a/arch/s390/include/asm/tlb.h b/arch/s390/include/asm/tlb.h
index c687a2c83462..775a5eea8f9e 100644
--- a/arch/s390/include/asm/tlb.h
+++ b/arch/s390/include/asm/tlb.h
@@ -30,14 +30,10 @@
30 30
31struct mmu_gather { 31struct mmu_gather {
32 struct mm_struct *mm; 32 struct mm_struct *mm;
33#ifdef CONFIG_HAVE_RCU_TABLE_FREE
34 struct mmu_table_batch *batch; 33 struct mmu_table_batch *batch;
35#endif
36 unsigned int fullmm; 34 unsigned int fullmm;
37 unsigned int need_flush;
38}; 35};
39 36
40#ifdef CONFIG_HAVE_RCU_TABLE_FREE
41struct mmu_table_batch { 37struct mmu_table_batch {
42 struct rcu_head rcu; 38 struct rcu_head rcu;
43 unsigned int nr; 39 unsigned int nr;
@@ -49,7 +45,6 @@ struct mmu_table_batch {
49 45
50extern void tlb_table_flush(struct mmu_gather *tlb); 46extern void tlb_table_flush(struct mmu_gather *tlb);
51extern void tlb_remove_table(struct mmu_gather *tlb, void *table); 47extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
52#endif
53 48
54static inline void tlb_gather_mmu(struct mmu_gather *tlb, 49static inline void tlb_gather_mmu(struct mmu_gather *tlb,
55 struct mm_struct *mm, 50 struct mm_struct *mm,
@@ -57,29 +52,20 @@ static inline void tlb_gather_mmu(struct mmu_gather *tlb,
57{ 52{
58 tlb->mm = mm; 53 tlb->mm = mm;
59 tlb->fullmm = full_mm_flush; 54 tlb->fullmm = full_mm_flush;
60 tlb->need_flush = 0;
61#ifdef CONFIG_HAVE_RCU_TABLE_FREE
62 tlb->batch = NULL; 55 tlb->batch = NULL;
63#endif
64 if (tlb->fullmm) 56 if (tlb->fullmm)
65 __tlb_flush_mm(mm); 57 __tlb_flush_mm(mm);
66} 58}
67 59
68static inline void tlb_flush_mmu(struct mmu_gather *tlb) 60static inline void tlb_flush_mmu(struct mmu_gather *tlb)
69{ 61{
70 if (!tlb->need_flush)
71 return;
72 tlb->need_flush = 0;
73 __tlb_flush_mm(tlb->mm);
74#ifdef CONFIG_HAVE_RCU_TABLE_FREE
75 tlb_table_flush(tlb); 62 tlb_table_flush(tlb);
76#endif
77} 63}
78 64
79static inline void tlb_finish_mmu(struct mmu_gather *tlb, 65static inline void tlb_finish_mmu(struct mmu_gather *tlb,
80 unsigned long start, unsigned long end) 66 unsigned long start, unsigned long end)
81{ 67{
82 tlb_flush_mmu(tlb); 68 tlb_table_flush(tlb);
83} 69}
84 70
85/* 71/*
@@ -105,10 +91,8 @@ static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
105static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, 91static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
106 unsigned long address) 92 unsigned long address)
107{ 93{
108#ifdef CONFIG_HAVE_RCU_TABLE_FREE
109 if (!tlb->fullmm) 94 if (!tlb->fullmm)
110 return page_table_free_rcu(tlb, (unsigned long *) pte); 95 return page_table_free_rcu(tlb, (unsigned long *) pte);
111#endif
112 page_table_free(tlb->mm, (unsigned long *) pte); 96 page_table_free(tlb->mm, (unsigned long *) pte);
113} 97}
114 98
@@ -125,10 +109,8 @@ static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
125#ifdef __s390x__ 109#ifdef __s390x__
126 if (tlb->mm->context.asce_limit <= (1UL << 31)) 110 if (tlb->mm->context.asce_limit <= (1UL << 31))
127 return; 111 return;
128#ifdef CONFIG_HAVE_RCU_TABLE_FREE
129 if (!tlb->fullmm) 112 if (!tlb->fullmm)
130 return tlb_remove_table(tlb, pmd); 113 return tlb_remove_table(tlb, pmd);
131#endif
132 crst_table_free(tlb->mm, (unsigned long *) pmd); 114 crst_table_free(tlb->mm, (unsigned long *) pmd);
133#endif 115#endif
134} 116}
@@ -146,10 +128,8 @@ static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,
146#ifdef __s390x__ 128#ifdef __s390x__
147 if (tlb->mm->context.asce_limit <= (1UL << 42)) 129 if (tlb->mm->context.asce_limit <= (1UL << 42))
148 return; 130 return;
149#ifdef CONFIG_HAVE_RCU_TABLE_FREE
150 if (!tlb->fullmm) 131 if (!tlb->fullmm)
151 return tlb_remove_table(tlb, pud); 132 return tlb_remove_table(tlb, pud);
152#endif
153 crst_table_free(tlb->mm, (unsigned long *) pud); 133 crst_table_free(tlb->mm, (unsigned long *) pud);
154#endif 134#endif
155} 135}
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index c27a0727f930..adccd908ebc7 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -474,9 +474,9 @@ ENTRY(startup_kdump)
474 stck __LC_LAST_UPDATE_CLOCK 474 stck __LC_LAST_UPDATE_CLOCK
475 spt 5f-.LPG0(%r13) 475 spt 5f-.LPG0(%r13)
476 mvc __LC_LAST_UPDATE_TIMER(8),5f-.LPG0(%r13) 476 mvc __LC_LAST_UPDATE_TIMER(8),5f-.LPG0(%r13)
477 xc __LC_STFL_FAC_LIST(8),__LC_STFL_FAC_LIST
477#ifndef CONFIG_MARCH_G5 478#ifndef CONFIG_MARCH_G5
478 # check capabilities against MARCH_{G5,Z900,Z990,Z9_109,Z10} 479 # check capabilities against MARCH_{G5,Z900,Z990,Z9_109,Z10}
479 xc __LC_STFL_FAC_LIST(8),__LC_STFL_FAC_LIST
480 .insn s,0xb2b10000,__LC_STFL_FAC_LIST # store facility list 480 .insn s,0xb2b10000,__LC_STFL_FAC_LIST # store facility list
481 tm __LC_STFL_FAC_LIST,0x01 # stfle available ? 481 tm __LC_STFL_FAC_LIST,0x01 # stfle available ?
482 jz 0f 482 jz 0f
diff --git a/arch/s390/kernel/irq.c b/arch/s390/kernel/irq.c
index 1c2cdd59ccd0..8a22c27219dd 100644
--- a/arch/s390/kernel/irq.c
+++ b/arch/s390/kernel/irq.c
@@ -118,9 +118,10 @@ asmlinkage void do_softirq(void)
118 "a" (__do_softirq) 118 "a" (__do_softirq)
119 : "0", "1", "2", "3", "4", "5", "14", 119 : "0", "1", "2", "3", "4", "5", "14",
120 "cc", "memory" ); 120 "cc", "memory" );
121 } else 121 } else {
122 /* We are already on the async stack. */ 122 /* We are already on the async stack. */
123 __do_softirq(); 123 __do_softirq();
124 }
124 } 125 }
125 126
126 local_irq_restore(flags); 127 local_irq_restore(flags);
@@ -192,11 +193,12 @@ int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
192 int index = ext_hash(code); 193 int index = ext_hash(code);
193 194
194 spin_lock_irqsave(&ext_int_hash_lock, flags); 195 spin_lock_irqsave(&ext_int_hash_lock, flags);
195 list_for_each_entry_rcu(p, &ext_int_hash[index], entry) 196 list_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
196 if (p->code == code && p->handler == handler) { 197 if (p->code == code && p->handler == handler) {
197 list_del_rcu(&p->entry); 198 list_del_rcu(&p->entry);
198 kfree_rcu(p, rcu); 199 kfree_rcu(p, rcu);
199 } 200 }
201 }
200 spin_unlock_irqrestore(&ext_int_hash_lock, flags); 202 spin_unlock_irqrestore(&ext_int_hash_lock, flags);
201 return 0; 203 return 0;
202} 204}
@@ -211,9 +213,10 @@ void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code,
211 213
212 old_regs = set_irq_regs(regs); 214 old_regs = set_irq_regs(regs);
213 irq_enter(); 215 irq_enter();
214 if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) 216 if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) {
215 /* Serve timer interrupts first. */ 217 /* Serve timer interrupts first. */
216 clock_comparator_work(); 218 clock_comparator_work();
219 }
217 kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++; 220 kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++;
218 if (ext_code.code != 0x1004) 221 if (ext_code.code != 0x1004)
219 __get_cpu_var(s390_idle).nohz_delay = 1; 222 __get_cpu_var(s390_idle).nohz_delay = 1;
diff --git a/arch/s390/kernel/perf_cpum_cf.c b/arch/s390/kernel/perf_cpum_cf.c
index 46405086479c..cb019f429e88 100644
--- a/arch/s390/kernel/perf_cpum_cf.c
+++ b/arch/s390/kernel/perf_cpum_cf.c
@@ -178,7 +178,7 @@ static void cpumf_pmu_enable(struct pmu *pmu)
178 err = lcctl(cpuhw->state); 178 err = lcctl(cpuhw->state);
179 if (err) { 179 if (err) {
180 pr_err("Enabling the performance measuring unit " 180 pr_err("Enabling the performance measuring unit "
181 "failed with rc=%lx\n", err); 181 "failed with rc=%x\n", err);
182 return; 182 return;
183 } 183 }
184 184
@@ -203,7 +203,7 @@ static void cpumf_pmu_disable(struct pmu *pmu)
203 err = lcctl(inactive); 203 err = lcctl(inactive);
204 if (err) { 204 if (err) {
205 pr_err("Disabling the performance measuring unit " 205 pr_err("Disabling the performance measuring unit "
206 "failed with rc=%lx\n", err); 206 "failed with rc=%x\n", err);
207 return; 207 return;
208 } 208 }
209 209
diff --git a/arch/s390/mm/maccess.c b/arch/s390/mm/maccess.c
index 7bb15fcca75e..e1335dc2b1b7 100644
--- a/arch/s390/mm/maccess.c
+++ b/arch/s390/mm/maccess.c
@@ -61,21 +61,14 @@ long probe_kernel_write(void *dst, const void *src, size_t size)
61 return copied < 0 ? -EFAULT : 0; 61 return copied < 0 ? -EFAULT : 0;
62} 62}
63 63
64/* 64static int __memcpy_real(void *dest, void *src, size_t count)
65 * Copy memory in real mode (kernel to kernel)
66 */
67int memcpy_real(void *dest, void *src, size_t count)
68{ 65{
69 register unsigned long _dest asm("2") = (unsigned long) dest; 66 register unsigned long _dest asm("2") = (unsigned long) dest;
70 register unsigned long _len1 asm("3") = (unsigned long) count; 67 register unsigned long _len1 asm("3") = (unsigned long) count;
71 register unsigned long _src asm("4") = (unsigned long) src; 68 register unsigned long _src asm("4") = (unsigned long) src;
72 register unsigned long _len2 asm("5") = (unsigned long) count; 69 register unsigned long _len2 asm("5") = (unsigned long) count;
73 unsigned long flags;
74 int rc = -EFAULT; 70 int rc = -EFAULT;
75 71
76 if (!count)
77 return 0;
78 flags = __arch_local_irq_stnsm(0xf8UL);
79 asm volatile ( 72 asm volatile (
80 "0: mvcle %1,%2,0x0\n" 73 "0: mvcle %1,%2,0x0\n"
81 "1: jo 0b\n" 74 "1: jo 0b\n"
@@ -86,7 +79,23 @@ int memcpy_real(void *dest, void *src, size_t count)
86 "+d" (_len2), "=m" (*((long *) dest)) 79 "+d" (_len2), "=m" (*((long *) dest))
87 : "m" (*((long *) src)) 80 : "m" (*((long *) src))
88 : "cc", "memory"); 81 : "cc", "memory");
89 arch_local_irq_restore(flags); 82 return rc;
83}
84
85/*
86 * Copy memory in real mode (kernel to kernel)
87 */
88int memcpy_real(void *dest, void *src, size_t count)
89{
90 unsigned long flags;
91 int rc;
92
93 if (!count)
94 return 0;
95 local_irq_save(flags);
96 __arch_local_irq_stnsm(0xfbUL);
97 rc = __memcpy_real(dest, src, count);
98 local_irq_restore(flags);
90 return rc; 99 return rc;
91} 100}
92 101
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 373adf69b01c..6e765bf00670 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -678,8 +678,6 @@ void page_table_free(struct mm_struct *mm, unsigned long *table)
678 } 678 }
679} 679}
680 680
681#ifdef CONFIG_HAVE_RCU_TABLE_FREE
682
683static void __page_table_free_rcu(void *table, unsigned bit) 681static void __page_table_free_rcu(void *table, unsigned bit)
684{ 682{
685 struct page *page; 683 struct page *page;
@@ -733,7 +731,66 @@ void __tlb_remove_table(void *_table)
733 free_pages((unsigned long) table, ALLOC_ORDER); 731 free_pages((unsigned long) table, ALLOC_ORDER);
734} 732}
735 733
736#endif 734static void tlb_remove_table_smp_sync(void *arg)
735{
736 /* Simply deliver the interrupt */
737}
738
739static void tlb_remove_table_one(void *table)
740{
741 /*
742 * This isn't an RCU grace period and hence the page-tables cannot be
743 * assumed to be actually RCU-freed.
744 *
745 * It is however sufficient for software page-table walkers that rely
746 * on IRQ disabling. See the comment near struct mmu_table_batch.
747 */
748 smp_call_function(tlb_remove_table_smp_sync, NULL, 1);
749 __tlb_remove_table(table);
750}
751
752static void tlb_remove_table_rcu(struct rcu_head *head)
753{
754 struct mmu_table_batch *batch;
755 int i;
756
757 batch = container_of(head, struct mmu_table_batch, rcu);
758
759 for (i = 0; i < batch->nr; i++)
760 __tlb_remove_table(batch->tables[i]);
761
762 free_page((unsigned long)batch);
763}
764
765void tlb_table_flush(struct mmu_gather *tlb)
766{
767 struct mmu_table_batch **batch = &tlb->batch;
768
769 if (*batch) {
770 __tlb_flush_mm(tlb->mm);
771 call_rcu_sched(&(*batch)->rcu, tlb_remove_table_rcu);
772 *batch = NULL;
773 }
774}
775
776void tlb_remove_table(struct mmu_gather *tlb, void *table)
777{
778 struct mmu_table_batch **batch = &tlb->batch;
779
780 if (*batch == NULL) {
781 *batch = (struct mmu_table_batch *)
782 __get_free_page(GFP_NOWAIT | __GFP_NOWARN);
783 if (*batch == NULL) {
784 __tlb_flush_mm(tlb->mm);
785 tlb_remove_table_one(table);
786 return;
787 }
788 (*batch)->nr = 0;
789 }
790 (*batch)->tables[(*batch)->nr++] = table;
791 if ((*batch)->nr == MAX_TABLE_BATCH)
792 tlb_table_flush(tlb);
793}
737 794
738/* 795/*
739 * switch on pgstes for its userspace process (for kvm) 796 * switch on pgstes for its userspace process (for kvm)
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index c1d5a820b1aa..5f2bb4242c0f 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -61,6 +61,7 @@ config DUMP_CODE
61config DWARF_UNWINDER 61config DWARF_UNWINDER
62 bool "Enable the DWARF unwinder for stacktraces" 62 bool "Enable the DWARF unwinder for stacktraces"
63 select FRAME_POINTER 63 select FRAME_POINTER
64 depends on SUPERH32
64 default n 65 default n
65 help 66 help
66 Enabling this option will make stacktraces more accurate, at 67 Enabling this option will make stacktraces more accurate, at
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index d879848f3cdd..d0d6221d7c2e 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -28,6 +28,7 @@
28#include <cpu/sh7785.h> 28#include <cpu/sh7785.h>
29#include <asm/heartbeat.h> 29#include <asm/heartbeat.h>
30#include <asm/clock.h> 30#include <asm/clock.h>
31#include <asm/bl_bit.h>
31 32
32/* 33/*
33 * NOTE: This board has 2 physical memory maps. 34 * NOTE: This board has 2 physical memory maps.
diff --git a/arch/sh/boards/mach-hp6xx/pm.c b/arch/sh/boards/mach-hp6xx/pm.c
index adc9b4bba828..8b50cf763c06 100644
--- a/arch/sh/boards/mach-hp6xx/pm.c
+++ b/arch/sh/boards/mach-hp6xx/pm.c
@@ -14,6 +14,7 @@
14#include <linux/gfp.h> 14#include <linux/gfp.h>
15#include <asm/io.h> 15#include <asm/io.h>
16#include <asm/hd64461.h> 16#include <asm/hd64461.h>
17#include <asm/bl_bit.h>
17#include <mach/hp6xx.h> 18#include <mach/hp6xx.h>
18#include <cpu/dac.h> 19#include <cpu/dac.h>
19#include <asm/freq.h> 20#include <asm/freq.h>
diff --git a/arch/sh/drivers/dma/dma-sysfs.c b/arch/sh/drivers/dma/dma-sysfs.c
index b1cb2715ad6e..67ee95603813 100644
--- a/arch/sh/drivers/dma/dma-sysfs.c
+++ b/arch/sh/drivers/dma/dma-sysfs.c
@@ -54,7 +54,7 @@ static int __init dma_subsys_init(void)
54 if (unlikely(ret)) 54 if (unlikely(ret))
55 return ret; 55 return ret;
56 56
57 return device_create_file(dma_subsys.dev_root, &dev_attr_devices.attr); 57 return device_create_file(dma_subsys.dev_root, &dev_attr_devices);
58} 58}
59postcore_initcall(dma_subsys_init); 59postcore_initcall(dma_subsys_init);
60 60
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
index 37f2f4a55231..f4c1c20bcdf6 100644
--- a/arch/sh/include/asm/atomic.h
+++ b/arch/sh/include/asm/atomic.h
@@ -11,7 +11,7 @@
11#include <linux/types.h> 11#include <linux/types.h>
12#include <asm/cmpxchg.h> 12#include <asm/cmpxchg.h>
13 13
14#define ATOMIC_INIT(i) ( (atomic_t) { (i) } ) 14#define ATOMIC_INIT(i) { (i) }
15 15
16#define atomic_read(v) (*(volatile int *)&(v)->counter) 16#define atomic_read(v) (*(volatile int *)&(v)->counter)
17#define atomic_set(v,i) ((v)->counter = (i)) 17#define atomic_set(v,i) ((v)->counter = (i))
diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h
index 1a73c3e759a7..8bd965e00a15 100644
--- a/arch/sh/include/asm/dma-mapping.h
+++ b/arch/sh/include/asm/dma-mapping.h
@@ -52,25 +52,31 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
52 return dma_addr == 0; 52 return dma_addr == 0;
53} 53}
54 54
55static inline void *dma_alloc_coherent(struct device *dev, size_t size, 55#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
56 dma_addr_t *dma_handle, gfp_t gfp) 56
57static inline void *dma_alloc_attrs(struct device *dev, size_t size,
58 dma_addr_t *dma_handle, gfp_t gfp,
59 struct dma_attrs *attrs)
57{ 60{
58 struct dma_map_ops *ops = get_dma_ops(dev); 61 struct dma_map_ops *ops = get_dma_ops(dev);
59 void *memory; 62 void *memory;
60 63
61 if (dma_alloc_from_coherent(dev, size, dma_handle, &memory)) 64 if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
62 return memory; 65 return memory;
63 if (!ops->alloc_coherent) 66 if (!ops->alloc)
64 return NULL; 67 return NULL;
65 68
66 memory = ops->alloc_coherent(dev, size, dma_handle, gfp); 69 memory = ops->alloc(dev, size, dma_handle, gfp, attrs);
67 debug_dma_alloc_coherent(dev, size, *dma_handle, memory); 70 debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
68 71
69 return memory; 72 return memory;
70} 73}
71 74
72static inline void dma_free_coherent(struct device *dev, size_t size, 75#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
73 void *vaddr, dma_addr_t dma_handle) 76
77static inline void dma_free_attrs(struct device *dev, size_t size,
78 void *vaddr, dma_addr_t dma_handle,
79 struct dma_attrs *attrs)
74{ 80{
75 struct dma_map_ops *ops = get_dma_ops(dev); 81 struct dma_map_ops *ops = get_dma_ops(dev);
76 82
@@ -78,14 +84,16 @@ static inline void dma_free_coherent(struct device *dev, size_t size,
78 return; 84 return;
79 85
80 debug_dma_free_coherent(dev, size, vaddr, dma_handle); 86 debug_dma_free_coherent(dev, size, vaddr, dma_handle);
81 if (ops->free_coherent) 87 if (ops->free)
82 ops->free_coherent(dev, size, vaddr, dma_handle); 88 ops->free(dev, size, vaddr, dma_handle, attrs);
83} 89}
84 90
85/* arch/sh/mm/consistent.c */ 91/* arch/sh/mm/consistent.c */
86extern void *dma_generic_alloc_coherent(struct device *dev, size_t size, 92extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
87 dma_addr_t *dma_addr, gfp_t flag); 93 dma_addr_t *dma_addr, gfp_t flag,
94 struct dma_attrs *attrs);
88extern void dma_generic_free_coherent(struct device *dev, size_t size, 95extern void dma_generic_free_coherent(struct device *dev, size_t size,
89 void *vaddr, dma_addr_t dma_handle); 96 void *vaddr, dma_addr_t dma_handle,
97 struct dma_attrs *attrs);
90 98
91#endif /* __ASM_SH_DMA_MAPPING_H */ 99#endif /* __ASM_SH_DMA_MAPPING_H */
diff --git a/arch/sh/kernel/cpu/fpu.c b/arch/sh/kernel/cpu/fpu.c
index 7f1b70cace35..f8f7af51c128 100644
--- a/arch/sh/kernel/cpu/fpu.c
+++ b/arch/sh/kernel/cpu/fpu.c
@@ -2,6 +2,7 @@
2#include <linux/slab.h> 2#include <linux/slab.h>
3#include <asm/processor.h> 3#include <asm/processor.h>
4#include <asm/fpu.h> 4#include <asm/fpu.h>
5#include <asm/traps.h>
5 6
6int init_fpu(struct task_struct *tsk) 7int init_fpu(struct task_struct *tsk)
7{ 8{
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index 488d24e0cdf0..98bbaa447c93 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -14,6 +14,7 @@
14#include <asm/processor.h> 14#include <asm/processor.h>
15#include <asm/io.h> 15#include <asm/io.h>
16#include <asm/fpu.h> 16#include <asm/fpu.h>
17#include <asm/traps.h>
17 18
18/* The PR (precision) bit in the FP Status Register must be clear when 19/* The PR (precision) bit in the FP Status Register must be clear when
19 * an frchg instruction is executed, otherwise the instruction is undefined. 20 * an frchg instruction is executed, otherwise the instruction is undefined.
diff --git a/arch/sh/kernel/cpu/sh4/fpu.c b/arch/sh/kernel/cpu/sh4/fpu.c
index e74cd6c0f10d..69ab4d3c8d41 100644
--- a/arch/sh/kernel/cpu/sh4/fpu.c
+++ b/arch/sh/kernel/cpu/sh4/fpu.c
@@ -16,6 +16,7 @@
16#include <cpu/fpu.h> 16#include <cpu/fpu.h>
17#include <asm/processor.h> 17#include <asm/processor.h>
18#include <asm/fpu.h> 18#include <asm/fpu.h>
19#include <asm/traps.h>
19 20
20/* The PR (precision) bit in the FP Status Register must be clear when 21/* The PR (precision) bit in the FP Status Register must be clear when
21 * an frchg instruction is executed, otherwise the instruction is undefined. 22 * an frchg instruction is executed, otherwise the instruction is undefined.
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index 5853989586ed..04ab5aeaf920 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -113,7 +113,7 @@ static struct clk_lookup lookups[] = {
113 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), 113 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
114 114
115 /* MSTP32 clocks */ 115 /* MSTP32 clocks */
116 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP004]), 116 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP004]),
117 CLKDEV_CON_ID("riic0", &mstp_clks[MSTP000]), 117 CLKDEV_CON_ID("riic0", &mstp_clks[MSTP000]),
118 CLKDEV_CON_ID("riic1", &mstp_clks[MSTP000]), 118 CLKDEV_CON_ID("riic1", &mstp_clks[MSTP000]),
119 CLKDEV_CON_ID("riic2", &mstp_clks[MSTP000]), 119 CLKDEV_CON_ID("riic2", &mstp_clks[MSTP000]),
diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c
index a6f95ae4aae7..08d27fac8d08 100644
--- a/arch/sh/kernel/cpu/shmobile/pm.c
+++ b/arch/sh/kernel/cpu/shmobile/pm.c
@@ -16,6 +16,7 @@
16#include <asm/suspend.h> 16#include <asm/suspend.h>
17#include <asm/uaccess.h> 17#include <asm/uaccess.h>
18#include <asm/cacheflush.h> 18#include <asm/cacheflush.h>
19#include <asm/bl_bit.h>
19 20
20/* 21/*
21 * Notifier lists for pre/post sleep notification 22 * Notifier lists for pre/post sleep notification
diff --git a/arch/sh/kernel/dma-nommu.c b/arch/sh/kernel/dma-nommu.c
index 3c55b87f8b63..5b0bfcda6d0b 100644
--- a/arch/sh/kernel/dma-nommu.c
+++ b/arch/sh/kernel/dma-nommu.c
@@ -63,8 +63,8 @@ static void nommu_sync_sg(struct device *dev, struct scatterlist *sg,
63#endif 63#endif
64 64
65struct dma_map_ops nommu_dma_ops = { 65struct dma_map_ops nommu_dma_ops = {
66 .alloc_coherent = dma_generic_alloc_coherent, 66 .alloc = dma_generic_alloc_coherent,
67 .free_coherent = dma_generic_free_coherent, 67 .free = dma_generic_free_coherent,
68 .map_page = nommu_map_page, 68 .map_page = nommu_map_page,
69 .map_sg = nommu_map_sg, 69 .map_sg = nommu_map_sg,
70#ifdef CONFIG_DMA_NONCOHERENT 70#ifdef CONFIG_DMA_NONCOHERENT
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index 64852ecc6881..ee226e20c20c 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -17,8 +17,8 @@
17#include <linux/irqflags.h> 17#include <linux/irqflags.h>
18#include <linux/smp.h> 18#include <linux/smp.h>
19#include <linux/cpuidle.h> 19#include <linux/cpuidle.h>
20#include <asm/pgalloc.h>
21#include <linux/atomic.h> 20#include <linux/atomic.h>
21#include <asm/pgalloc.h>
22#include <asm/smp.h> 22#include <asm/smp.h>
23#include <asm/bl_bit.h> 23#include <asm/bl_bit.h>
24 24
diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c
index efb6d398dec3..b117781bfea2 100644
--- a/arch/sh/kernel/kgdb.c
+++ b/arch/sh/kernel/kgdb.c
@@ -14,6 +14,7 @@
14#include <linux/irq.h> 14#include <linux/irq.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <asm/cacheflush.h> 16#include <asm/cacheflush.h>
17#include <asm/traps.h>
17 18
18/* Macros for single step instruction identification */ 19/* Macros for single step instruction identification */
19#define OPCODE_BT(op) (((op) & 0xff00) == 0x8900) 20#define OPCODE_BT(op) (((op) & 0xff00) == 0x8900)
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index f72e3a951588..94273aaf78c1 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -26,6 +26,7 @@
26#include <asm/mmu_context.h> 26#include <asm/mmu_context.h>
27#include <asm/fpu.h> 27#include <asm/fpu.h>
28#include <asm/syscalls.h> 28#include <asm/syscalls.h>
29#include <asm/switch_to.h>
29 30
30void show_regs(struct pt_regs * regs) 31void show_regs(struct pt_regs * regs)
31{ 32{
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index a17a14d32340..eaebdf6a5c77 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -27,6 +27,7 @@
27#include <asm/smp.h> 27#include <asm/smp.h>
28#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
29#include <asm/sections.h> 29#include <asm/sections.h>
30#include <asm/setup.h>
30 31
31int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ 32int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
32int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ 33int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
diff --git a/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S b/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S
index 555a64f124ca..23af17584054 100644
--- a/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S
+++ b/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S
@@ -34,6 +34,41 @@ __kernel_rt_sigreturn:
341: .short __NR_rt_sigreturn 341: .short __NR_rt_sigreturn
35.LEND_rt_sigreturn: 35.LEND_rt_sigreturn:
36 .size __kernel_rt_sigreturn,.-.LSTART_rt_sigreturn 36 .size __kernel_rt_sigreturn,.-.LSTART_rt_sigreturn
37 .previous
37 38
38 .section .eh_frame,"a",@progbits 39 .section .eh_frame,"a",@progbits
40.LCIE1:
41 .ualong .LCIE1_end - .LCIE1_start
42.LCIE1_start:
43 .ualong 0 /* CIE ID */
44 .byte 0x1 /* Version number */
45 .string "zRS" /* NUL-terminated augmentation string */
46 .uleb128 0x1 /* Code alignment factor */
47 .sleb128 -4 /* Data alignment factor */
48 .byte 0x11 /* Return address register column */
49 .uleb128 0x1 /* Augmentation length and data */
50 .byte 0x1b /* DW_EH_PE_pcrel | DW_EH_PE_sdata4. */
51 .byte 0xc, 0xf, 0x0 /* DW_CFA_def_cfa: r15 ofs 0 */
52
53 .align 2
54.LCIE1_end:
55
56 .ualong .LFDE0_end-.LFDE0_start /* Length FDE0 */
57.LFDE0_start:
58 .ualong .LFDE0_start-.LCIE1 /* CIE pointer */
59 .ualong .LSTART_sigreturn-. /* PC-relative start address */
60 .ualong .LEND_sigreturn-.LSTART_sigreturn
61 .uleb128 0 /* Augmentation */
62 .align 2
63.LFDE0_end:
64
65 .ualong .LFDE1_end-.LFDE1_start /* Length FDE1 */
66.LFDE1_start:
67 .ualong .LFDE1_start-.LCIE1 /* CIE pointer */
68 .ualong .LSTART_rt_sigreturn-. /* PC-relative start address */
69 .ualong .LEND_rt_sigreturn-.LSTART_rt_sigreturn
70 .uleb128 0 /* Augmentation */
71 .align 2
72.LFDE1_end:
73
39 .previous 74 .previous
diff --git a/arch/sh/kernel/vsyscall/vsyscall-trapa.S b/arch/sh/kernel/vsyscall/vsyscall-trapa.S
index 3e70f851cdc6..0eb74d00690a 100644
--- a/arch/sh/kernel/vsyscall/vsyscall-trapa.S
+++ b/arch/sh/kernel/vsyscall/vsyscall-trapa.S
@@ -3,37 +3,34 @@
3 .type __kernel_vsyscall,@function 3 .type __kernel_vsyscall,@function
4__kernel_vsyscall: 4__kernel_vsyscall:
5.LSTART_vsyscall: 5.LSTART_vsyscall:
6 /* XXX: We'll have to do something here once we opt to use the vDSO 6 trapa #0x10
7 * page for something other than the signal trampoline.. as well as 7 nop
8 * fill out .eh_frame -- PFM. */
9.LEND_vsyscall: 8.LEND_vsyscall:
10 .size __kernel_vsyscall,.-.LSTART_vsyscall 9 .size __kernel_vsyscall,.-.LSTART_vsyscall
10 .previous
11 11
12 .section .eh_frame,"a",@progbits 12 .section .eh_frame,"a",@progbits
13 .previous
14.LCIE: 13.LCIE:
15 .ualong .LCIE_end - .LCIE_start 14 .ualong .LCIE_end - .LCIE_start
16.LCIE_start: 15.LCIE_start:
17 .ualong 0 /* CIE ID */ 16 .ualong 0 /* CIE ID */
18 .byte 0x1 /* Version number */ 17 .byte 0x1 /* Version number */
19 .string "zRS" /* NUL-terminated augmentation string */ 18 .string "zR" /* NUL-terminated augmentation string */
20 .uleb128 0x1 /* Code alignment factor */ 19 .uleb128 0x1 /* Code alignment factor */
21 .sleb128 -4 /* Data alignment factor */ 20 .sleb128 -4 /* Data alignment factor */
22 .byte 0x11 /* Return address register column */ 21 .byte 0x11 /* Return address register column */
23 /* Augmentation length and data (none) */ 22 .uleb128 0x1 /* Augmentation length and data */
24 .byte 0xc /* DW_CFA_def_cfa */ 23 .byte 0x1b /* DW_EH_PE_pcrel | DW_EH_PE_sdata4. */
25 .uleb128 0xf /* r15 */ 24 .byte 0xc,0xf,0x0 /* DW_CFA_def_cfa: r15 ofs 0 */
26 .uleb128 0x0 /* offset 0 */
27
28 .align 2 25 .align 2
29.LCIE_end: 26.LCIE_end:
30 27
31 .ualong .LFDE_end-.LFDE_start /* Length FDE */ 28 .ualong .LFDE_end-.LFDE_start /* Length FDE */
32.LFDE_start: 29.LFDE_start:
33 .ualong .LCIE /* CIE pointer */ 30 .ualong .LFDE_start-.LCIE /* CIE pointer */
34 .ualong .LSTART_vsyscall-. /* start address */ 31 .ualong .LSTART_vsyscall-. /* PC-relative start address */
35 .ualong .LEND_vsyscall-.LSTART_vsyscall 32 .ualong .LEND_vsyscall-.LSTART_vsyscall
36 .uleb128 0 33 .uleb128 0 /* Augmentation */
37 .align 2 34 .align 2
38.LFDE_end: 35.LFDE_end:
39 .previous 36 .previous
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 112fea12522a..0e529285b28d 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -18,6 +18,7 @@
18#include <linux/highmem.h> 18#include <linux/highmem.h>
19#include <asm/pgtable.h> 19#include <asm/pgtable.h>
20#include <asm/mmu_context.h> 20#include <asm/mmu_context.h>
21#include <asm/cache_insns.h>
21#include <asm/cacheflush.h> 22#include <asm/cacheflush.h>
22 23
23/* 24/*
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index f251b5f27652..b81d9dbf9fef 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -33,7 +33,8 @@ static int __init dma_init(void)
33fs_initcall(dma_init); 33fs_initcall(dma_init);
34 34
35void *dma_generic_alloc_coherent(struct device *dev, size_t size, 35void *dma_generic_alloc_coherent(struct device *dev, size_t size,
36 dma_addr_t *dma_handle, gfp_t gfp) 36 dma_addr_t *dma_handle, gfp_t gfp,
37 struct dma_attrs *attrs)
37{ 38{
38 void *ret, *ret_nocache; 39 void *ret, *ret_nocache;
39 int order = get_order(size); 40 int order = get_order(size);
@@ -64,7 +65,8 @@ void *dma_generic_alloc_coherent(struct device *dev, size_t size,
64} 65}
65 66
66void dma_generic_free_coherent(struct device *dev, size_t size, 67void dma_generic_free_coherent(struct device *dev, size_t size,
67 void *vaddr, dma_addr_t dma_handle) 68 void *vaddr, dma_addr_t dma_handle,
69 struct dma_attrs *attrs)
68{ 70{
69 int order = get_order(size); 71 int order = get_order(size);
70 unsigned long pfn = dma_handle >> PAGE_SHIFT; 72 unsigned long pfn = dma_handle >> PAGE_SHIFT;
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c
index 324eef93c900..e99b104d967a 100644
--- a/arch/sh/mm/fault_32.c
+++ b/arch/sh/mm/fault_32.c
@@ -86,7 +86,7 @@ static noinline int vmalloc_fault(unsigned long address)
86 pte_t *pte_k; 86 pte_t *pte_k;
87 87
88 /* Make sure we are in vmalloc/module/P3 area: */ 88 /* Make sure we are in vmalloc/module/P3 area: */
89 if (!(address >= VMALLOC_START && address < P3_ADDR_MAX)) 89 if (!(address >= P3SEG && address < P3_ADDR_MAX))
90 return -1; 90 return -1;
91 91
92 /* 92 /*
diff --git a/arch/sh/mm/flush-sh4.c b/arch/sh/mm/flush-sh4.c
index 75a17f5bfa14..0b85dd9dd3a7 100644
--- a/arch/sh/mm/flush-sh4.c
+++ b/arch/sh/mm/flush-sh4.c
@@ -1,5 +1,6 @@
1#include <linux/mm.h> 1#include <linux/mm.h>
2#include <asm/mmu_context.h> 2#include <asm/mmu_context.h>
3#include <asm/cache_insns.h>
3#include <asm/cacheflush.h> 4#include <asm/cacheflush.h>
4#include <asm/traps.h> 5#include <asm/traps.h>
5 6
diff --git a/arch/sh/mm/sram.c b/arch/sh/mm/sram.c
index bc156ec4545e..2d8fa718d55e 100644
--- a/arch/sh/mm/sram.c
+++ b/arch/sh/mm/sram.c
@@ -9,6 +9,7 @@
9 */ 9 */
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/errno.h>
12#include <asm/sram.h> 13#include <asm/sram.h>
13 14
14/* 15/*
diff --git a/arch/sparc/include/asm/dma-mapping.h b/arch/sparc/include/asm/dma-mapping.h
index 8c0e4f7bb204..48a7c65731d2 100644
--- a/arch/sparc/include/asm/dma-mapping.h
+++ b/arch/sparc/include/asm/dma-mapping.h
@@ -26,24 +26,30 @@ static inline struct dma_map_ops *get_dma_ops(struct device *dev)
26 26
27#include <asm-generic/dma-mapping-common.h> 27#include <asm-generic/dma-mapping-common.h>
28 28
29static inline void *dma_alloc_coherent(struct device *dev, size_t size, 29#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
30 dma_addr_t *dma_handle, gfp_t flag) 30
31static inline void *dma_alloc_attrs(struct device *dev, size_t size,
32 dma_addr_t *dma_handle, gfp_t flag,
33 struct dma_attrs *attrs)
31{ 34{
32 struct dma_map_ops *ops = get_dma_ops(dev); 35 struct dma_map_ops *ops = get_dma_ops(dev);
33 void *cpu_addr; 36 void *cpu_addr;
34 37
35 cpu_addr = ops->alloc_coherent(dev, size, dma_handle, flag); 38 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
36 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); 39 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
37 return cpu_addr; 40 return cpu_addr;
38} 41}
39 42
40static inline void dma_free_coherent(struct device *dev, size_t size, 43#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
41 void *cpu_addr, dma_addr_t dma_handle) 44
45static inline void dma_free_attrs(struct device *dev, size_t size,
46 void *cpu_addr, dma_addr_t dma_handle,
47 struct dma_attrs *attrs)
42{ 48{
43 struct dma_map_ops *ops = get_dma_ops(dev); 49 struct dma_map_ops *ops = get_dma_ops(dev);
44 50
45 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); 51 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
46 ops->free_coherent(dev, size, cpu_addr, dma_handle); 52 ops->free(dev, size, cpu_addr, dma_handle, attrs);
47} 53}
48 54
49static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 55static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h
index 6fa2f7980e6b..76e4a52aa85e 100644
--- a/arch/sparc/include/asm/pgtable_64.h
+++ b/arch/sparc/include/asm/pgtable_64.h
@@ -12,8 +12,6 @@
12 * the SpitFire page tables. 12 * the SpitFire page tables.
13 */ 13 */
14 14
15#include <asm-generic/pgtable-nopud.h>
16
17#include <linux/compiler.h> 15#include <linux/compiler.h>
18#include <linux/const.h> 16#include <linux/const.h>
19#include <asm/types.h> 17#include <asm/types.h>
@@ -22,6 +20,8 @@
22#include <asm/page.h> 20#include <asm/page.h>
23#include <asm/processor.h> 21#include <asm/processor.h>
24 22
23#include <asm-generic/pgtable-nopud.h>
24
25/* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB). 25/* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB).
26 * The page copy blockops can use 0x6000000 to 0x8000000. 26 * The page copy blockops can use 0x6000000 to 0x8000000.
27 * The TSB is mapped in the 0x8000000 to 0xa000000 range. 27 * The TSB is mapped in the 0x8000000 to 0xa000000 range.
diff --git a/arch/sparc/kernel/ds.c b/arch/sparc/kernel/ds.c
index fea13c7b1aee..b93c2c9ccb1d 100644
--- a/arch/sparc/kernel/ds.c
+++ b/arch/sparc/kernel/ds.c
@@ -1264,4 +1264,4 @@ static int __init ds_init(void)
1264 return vio_register_driver(&ds_driver); 1264 return vio_register_driver(&ds_driver);
1265} 1265}
1266 1266
1267subsys_initcall(ds_init); 1267fs_initcall(ds_init);
diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c
index 4643d68713fa..070ed141aac7 100644
--- a/arch/sparc/kernel/iommu.c
+++ b/arch/sparc/kernel/iommu.c
@@ -280,7 +280,8 @@ static inline void iommu_free_ctx(struct iommu *iommu, int ctx)
280} 280}
281 281
282static void *dma_4u_alloc_coherent(struct device *dev, size_t size, 282static void *dma_4u_alloc_coherent(struct device *dev, size_t size,
283 dma_addr_t *dma_addrp, gfp_t gfp) 283 dma_addr_t *dma_addrp, gfp_t gfp,
284 struct dma_attrs *attrs)
284{ 285{
285 unsigned long flags, order, first_page; 286 unsigned long flags, order, first_page;
286 struct iommu *iommu; 287 struct iommu *iommu;
@@ -330,7 +331,8 @@ static void *dma_4u_alloc_coherent(struct device *dev, size_t size,
330} 331}
331 332
332static void dma_4u_free_coherent(struct device *dev, size_t size, 333static void dma_4u_free_coherent(struct device *dev, size_t size,
333 void *cpu, dma_addr_t dvma) 334 void *cpu, dma_addr_t dvma,
335 struct dma_attrs *attrs)
334{ 336{
335 struct iommu *iommu; 337 struct iommu *iommu;
336 unsigned long flags, order, npages; 338 unsigned long flags, order, npages;
@@ -825,8 +827,8 @@ static void dma_4u_sync_sg_for_cpu(struct device *dev,
825} 827}
826 828
827static struct dma_map_ops sun4u_dma_ops = { 829static struct dma_map_ops sun4u_dma_ops = {
828 .alloc_coherent = dma_4u_alloc_coherent, 830 .alloc = dma_4u_alloc_coherent,
829 .free_coherent = dma_4u_free_coherent, 831 .free = dma_4u_free_coherent,
830 .map_page = dma_4u_map_page, 832 .map_page = dma_4u_map_page,
831 .unmap_page = dma_4u_unmap_page, 833 .unmap_page = dma_4u_unmap_page,
832 .map_sg = dma_4u_map_sg, 834 .map_sg = dma_4u_map_sg,
diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c
index d0479e2163fa..21bd73943f7f 100644
--- a/arch/sparc/kernel/ioport.c
+++ b/arch/sparc/kernel/ioport.c
@@ -261,7 +261,8 @@ EXPORT_SYMBOL(sbus_set_sbus64);
261 * CPU may access them without any explicit flushing. 261 * CPU may access them without any explicit flushing.
262 */ 262 */
263static void *sbus_alloc_coherent(struct device *dev, size_t len, 263static void *sbus_alloc_coherent(struct device *dev, size_t len,
264 dma_addr_t *dma_addrp, gfp_t gfp) 264 dma_addr_t *dma_addrp, gfp_t gfp,
265 struct dma_attrs *attrs)
265{ 266{
266 struct platform_device *op = to_platform_device(dev); 267 struct platform_device *op = to_platform_device(dev);
267 unsigned long len_total = PAGE_ALIGN(len); 268 unsigned long len_total = PAGE_ALIGN(len);
@@ -315,7 +316,7 @@ err_nopages:
315} 316}
316 317
317static void sbus_free_coherent(struct device *dev, size_t n, void *p, 318static void sbus_free_coherent(struct device *dev, size_t n, void *p,
318 dma_addr_t ba) 319 dma_addr_t ba, struct dma_attrs *attrs)
319{ 320{
320 struct resource *res; 321 struct resource *res;
321 struct page *pgv; 322 struct page *pgv;
@@ -407,8 +408,8 @@ static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
407} 408}
408 409
409struct dma_map_ops sbus_dma_ops = { 410struct dma_map_ops sbus_dma_ops = {
410 .alloc_coherent = sbus_alloc_coherent, 411 .alloc = sbus_alloc_coherent,
411 .free_coherent = sbus_free_coherent, 412 .free = sbus_free_coherent,
412 .map_page = sbus_map_page, 413 .map_page = sbus_map_page,
413 .unmap_page = sbus_unmap_page, 414 .unmap_page = sbus_unmap_page,
414 .map_sg = sbus_map_sg, 415 .map_sg = sbus_map_sg,
@@ -436,7 +437,8 @@ arch_initcall(sparc_register_ioport);
436 * hwdev should be valid struct pci_dev pointer for PCI devices. 437 * hwdev should be valid struct pci_dev pointer for PCI devices.
437 */ 438 */
438static void *pci32_alloc_coherent(struct device *dev, size_t len, 439static void *pci32_alloc_coherent(struct device *dev, size_t len,
439 dma_addr_t *pba, gfp_t gfp) 440 dma_addr_t *pba, gfp_t gfp,
441 struct dma_attrs *attrs)
440{ 442{
441 unsigned long len_total = PAGE_ALIGN(len); 443 unsigned long len_total = PAGE_ALIGN(len);
442 void *va; 444 void *va;
@@ -489,7 +491,7 @@ err_nopages:
489 * past this call are illegal. 491 * past this call are illegal.
490 */ 492 */
491static void pci32_free_coherent(struct device *dev, size_t n, void *p, 493static void pci32_free_coherent(struct device *dev, size_t n, void *p,
492 dma_addr_t ba) 494 dma_addr_t ba, struct dma_attrs *attrs)
493{ 495{
494 struct resource *res; 496 struct resource *res;
495 497
@@ -645,8 +647,8 @@ static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *
645} 647}
646 648
647struct dma_map_ops pci32_dma_ops = { 649struct dma_map_ops pci32_dma_ops = {
648 .alloc_coherent = pci32_alloc_coherent, 650 .alloc = pci32_alloc_coherent,
649 .free_coherent = pci32_free_coherent, 651 .free = pci32_free_coherent,
650 .map_page = pci32_map_page, 652 .map_page = pci32_map_page,
651 .unmap_page = pci32_unmap_page, 653 .unmap_page = pci32_unmap_page,
652 .map_sg = pci32_map_sg, 654 .map_sg = pci32_map_sg,
diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c
index a19c8a063683..35e43673c453 100644
--- a/arch/sparc/kernel/leon_kernel.c
+++ b/arch/sparc/kernel/leon_kernel.c
@@ -104,11 +104,11 @@ static int irq_choose_cpu(const struct cpumask *affinity)
104{ 104{
105 cpumask_t mask; 105 cpumask_t mask;
106 106
107 cpus_and(mask, cpu_online_map, *affinity); 107 cpumask_and(&mask, cpu_online_mask, affinity);
108 if (cpus_equal(mask, cpu_online_map) || cpus_empty(mask)) 108 if (cpumask_equal(&mask, cpu_online_mask) || cpumask_empty(&mask))
109 return boot_cpu_id; 109 return boot_cpu_id;
110 else 110 else
111 return first_cpu(mask); 111 return cpumask_first(&mask);
112} 112}
113#else 113#else
114#define irq_choose_cpu(affinity) boot_cpu_id 114#define irq_choose_cpu(affinity) boot_cpu_id
diff --git a/arch/sparc/kernel/leon_pci.c b/arch/sparc/kernel/leon_pci.c
index aba6b958b2a5..19f56058742b 100644
--- a/arch/sparc/kernel/leon_pci.c
+++ b/arch/sparc/kernel/leon_pci.c
@@ -45,7 +45,6 @@ void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
45 45
46void __devinit pcibios_fixup_bus(struct pci_bus *pbus) 46void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
47{ 47{
48 struct leon_pci_info *info = pbus->sysdata;
49 struct pci_dev *dev; 48 struct pci_dev *dev;
50 int i, has_io, has_mem; 49 int i, has_io, has_mem;
51 u16 cmd; 50 u16 cmd;
@@ -111,18 +110,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
111 return pci_enable_resources(dev, mask); 110 return pci_enable_resources(dev, mask);
112} 111}
113 112
114struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
115{
116 /*
117 * Currently the OpenBoot nodes are not connected with the PCI device,
118 * this is because the LEON PROM does not create PCI nodes. Eventually
119 * this will change and the same approach as pcic.c can be used to
120 * match PROM nodes with pci devices.
121 */
122 return NULL;
123}
124EXPORT_SYMBOL(pci_device_to_OF_node);
125
126void __devinit pcibios_update_irq(struct pci_dev *dev, int irq) 113void __devinit pcibios_update_irq(struct pci_dev *dev, int irq)
127{ 114{
128#ifdef CONFIG_PCI_DEBUG 115#ifdef CONFIG_PCI_DEBUG
diff --git a/arch/sparc/kernel/leon_smp.c b/arch/sparc/kernel/leon_smp.c
index 1210fde18740..160cac9c4036 100644
--- a/arch/sparc/kernel/leon_smp.c
+++ b/arch/sparc/kernel/leon_smp.c
@@ -23,6 +23,7 @@
23#include <linux/pm.h> 23#include <linux/pm.h>
24#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/gfp.h> 25#include <linux/gfp.h>
26#include <linux/cpu.h>
26 27
27#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
28#include <asm/tlbflush.h> 29#include <asm/tlbflush.h>
@@ -78,6 +79,8 @@ void __cpuinit leon_callin(void)
78 local_flush_tlb_all(); 79 local_flush_tlb_all();
79 leon_configure_cache_smp(); 80 leon_configure_cache_smp();
80 81
82 notify_cpu_starting(cpuid);
83
81 /* Get our local ticker going. */ 84 /* Get our local ticker going. */
82 smp_setup_percpu_timer(); 85 smp_setup_percpu_timer();
83 86
diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c
index af5755d20fbe..7661e84a05a0 100644
--- a/arch/sparc/kernel/pci_sun4v.c
+++ b/arch/sparc/kernel/pci_sun4v.c
@@ -128,7 +128,8 @@ static inline long iommu_batch_end(void)
128} 128}
129 129
130static void *dma_4v_alloc_coherent(struct device *dev, size_t size, 130static void *dma_4v_alloc_coherent(struct device *dev, size_t size,
131 dma_addr_t *dma_addrp, gfp_t gfp) 131 dma_addr_t *dma_addrp, gfp_t gfp,
132 struct dma_attrs *attrs)
132{ 133{
133 unsigned long flags, order, first_page, npages, n; 134 unsigned long flags, order, first_page, npages, n;
134 struct iommu *iommu; 135 struct iommu *iommu;
@@ -198,7 +199,7 @@ range_alloc_fail:
198} 199}
199 200
200static void dma_4v_free_coherent(struct device *dev, size_t size, void *cpu, 201static void dma_4v_free_coherent(struct device *dev, size_t size, void *cpu,
201 dma_addr_t dvma) 202 dma_addr_t dvma, struct dma_attrs *attrs)
202{ 203{
203 struct pci_pbm_info *pbm; 204 struct pci_pbm_info *pbm;
204 struct iommu *iommu; 205 struct iommu *iommu;
@@ -527,8 +528,8 @@ static void dma_4v_unmap_sg(struct device *dev, struct scatterlist *sglist,
527} 528}
528 529
529static struct dma_map_ops sun4v_dma_ops = { 530static struct dma_map_ops sun4v_dma_ops = {
530 .alloc_coherent = dma_4v_alloc_coherent, 531 .alloc = dma_4v_alloc_coherent,
531 .free_coherent = dma_4v_free_coherent, 532 .free = dma_4v_free_coherent,
532 .map_page = dma_4v_map_page, 533 .map_page = dma_4v_map_page,
533 .unmap_page = dma_4v_unmap_page, 534 .unmap_page = dma_4v_unmap_page,
534 .map_sg = dma_4v_map_sg, 535 .map_sg = dma_4v_map_sg,
diff --git a/arch/sparc/kernel/rtrap_64.S b/arch/sparc/kernel/rtrap_64.S
index 77f1b95e0806..9171fc238def 100644
--- a/arch/sparc/kernel/rtrap_64.S
+++ b/arch/sparc/kernel/rtrap_64.S
@@ -20,11 +20,6 @@
20 20
21 .text 21 .text
22 .align 32 22 .align 32
23__handle_softirq:
24 call do_softirq
25 nop
26 ba,a,pt %xcc, __handle_softirq_continue
27 nop
28__handle_preemption: 23__handle_preemption:
29 call schedule 24 call schedule
30 wrpr %g0, RTRAP_PSTATE, %pstate 25 wrpr %g0, RTRAP_PSTATE, %pstate
@@ -89,9 +84,7 @@ rtrap:
89 cmp %l1, 0 84 cmp %l1, 0
90 85
91 /* mm/ultra.S:xcall_report_regs KNOWS about this load. */ 86 /* mm/ultra.S:xcall_report_regs KNOWS about this load. */
92 bne,pn %icc, __handle_softirq
93 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1 87 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
94__handle_softirq_continue:
95rtrap_xcall: 88rtrap_xcall:
96 sethi %hi(0xf << 20), %l4 89 sethi %hi(0xf << 20), %l4
97 and %l1, %l4, %l4 90 and %l1, %l4, %l4
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index 232df9949530..3ee51f189a55 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -566,15 +566,10 @@ out:
566 566
567SYSCALL_DEFINE2(64_munmap, unsigned long, addr, size_t, len) 567SYSCALL_DEFINE2(64_munmap, unsigned long, addr, size_t, len)
568{ 568{
569 long ret;
570
571 if (invalid_64bit_range(addr, len)) 569 if (invalid_64bit_range(addr, len))
572 return -EINVAL; 570 return -EINVAL;
573 571
574 down_write(&current->mm->mmap_sem); 572 return vm_munmap(addr, len);
575 ret = do_munmap(current->mm, addr, len);
576 up_write(&current->mm->mmap_sem);
577 return ret;
578} 573}
579 574
580extern unsigned long do_mremap(unsigned long addr, 575extern unsigned long do_mremap(unsigned long addr,
diff --git a/arch/sparc/mm/fault_32.c b/arch/sparc/mm/fault_32.c
index 7705c6731e28..df3155a17991 100644
--- a/arch/sparc/mm/fault_32.c
+++ b/arch/sparc/mm/fault_32.c
@@ -225,6 +225,8 @@ asmlinkage void do_sparc_fault(struct pt_regs *regs, int text_fault, int write,
225 unsigned long g2; 225 unsigned long g2;
226 int from_user = !(regs->psr & PSR_PS); 226 int from_user = !(regs->psr & PSR_PS);
227 int fault, code; 227 int fault, code;
228 unsigned int flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
229 (write ? FAULT_FLAG_WRITE : 0));
228 230
229 if(text_fault) 231 if(text_fault)
230 address = regs->pc; 232 address = regs->pc;
@@ -251,6 +253,7 @@ asmlinkage void do_sparc_fault(struct pt_regs *regs, int text_fault, int write,
251 253
252 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); 254 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
253 255
256retry:
254 down_read(&mm->mmap_sem); 257 down_read(&mm->mmap_sem);
255 258
256 /* 259 /*
@@ -289,7 +292,11 @@ good_area:
289 * make sure we exit gracefully rather than endlessly redo 292 * make sure we exit gracefully rather than endlessly redo
290 * the fault. 293 * the fault.
291 */ 294 */
292 fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0); 295 fault = handle_mm_fault(mm, vma, address, flags);
296
297 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
298 return;
299
293 if (unlikely(fault & VM_FAULT_ERROR)) { 300 if (unlikely(fault & VM_FAULT_ERROR)) {
294 if (fault & VM_FAULT_OOM) 301 if (fault & VM_FAULT_OOM)
295 goto out_of_memory; 302 goto out_of_memory;
@@ -297,13 +304,29 @@ good_area:
297 goto do_sigbus; 304 goto do_sigbus;
298 BUG(); 305 BUG();
299 } 306 }
300 if (fault & VM_FAULT_MAJOR) { 307
301 current->maj_flt++; 308 if (flags & FAULT_FLAG_ALLOW_RETRY) {
302 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, address); 309 if (fault & VM_FAULT_MAJOR) {
303 } else { 310 current->maj_flt++;
304 current->min_flt++; 311 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ,
305 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, address); 312 1, regs, address);
313 } else {
314 current->min_flt++;
315 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN,
316 1, regs, address);
317 }
318 if (fault & VM_FAULT_RETRY) {
319 flags &= ~FAULT_FLAG_ALLOW_RETRY;
320
321 /* No need to up_read(&mm->mmap_sem) as we would
322 * have already released it in __lock_page_or_retry
323 * in mm/filemap.c.
324 */
325
326 goto retry;
327 }
306 } 328 }
329
307 up_read(&mm->mmap_sem); 330 up_read(&mm->mmap_sem);
308 return; 331 return;
309 332
diff --git a/arch/sparc/mm/fault_64.c b/arch/sparc/mm/fault_64.c
index 504c0622f729..1fe0429b6314 100644
--- a/arch/sparc/mm/fault_64.c
+++ b/arch/sparc/mm/fault_64.c
@@ -279,6 +279,7 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
279 unsigned int insn = 0; 279 unsigned int insn = 0;
280 int si_code, fault_code, fault; 280 int si_code, fault_code, fault;
281 unsigned long address, mm_rss; 281 unsigned long address, mm_rss;
282 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
282 283
283 fault_code = get_thread_fault_code(); 284 fault_code = get_thread_fault_code();
284 285
@@ -333,6 +334,8 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
333 insn = get_fault_insn(regs, insn); 334 insn = get_fault_insn(regs, insn);
334 goto handle_kernel_fault; 335 goto handle_kernel_fault;
335 } 336 }
337
338retry:
336 down_read(&mm->mmap_sem); 339 down_read(&mm->mmap_sem);
337 } 340 }
338 341
@@ -423,7 +426,12 @@ good_area:
423 goto bad_area; 426 goto bad_area;
424 } 427 }
425 428
426 fault = handle_mm_fault(mm, vma, address, (fault_code & FAULT_CODE_WRITE) ? FAULT_FLAG_WRITE : 0); 429 flags |= ((fault_code & FAULT_CODE_WRITE) ? FAULT_FLAG_WRITE : 0);
430 fault = handle_mm_fault(mm, vma, address, flags);
431
432 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
433 return;
434
427 if (unlikely(fault & VM_FAULT_ERROR)) { 435 if (unlikely(fault & VM_FAULT_ERROR)) {
428 if (fault & VM_FAULT_OOM) 436 if (fault & VM_FAULT_OOM)
429 goto out_of_memory; 437 goto out_of_memory;
@@ -431,12 +439,27 @@ good_area:
431 goto do_sigbus; 439 goto do_sigbus;
432 BUG(); 440 BUG();
433 } 441 }
434 if (fault & VM_FAULT_MAJOR) { 442
435 current->maj_flt++; 443 if (flags & FAULT_FLAG_ALLOW_RETRY) {
436 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, address); 444 if (fault & VM_FAULT_MAJOR) {
437 } else { 445 current->maj_flt++;
438 current->min_flt++; 446 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ,
439 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, address); 447 1, regs, address);
448 } else {
449 current->min_flt++;
450 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN,
451 1, regs, address);
452 }
453 if (fault & VM_FAULT_RETRY) {
454 flags &= ~FAULT_FLAG_ALLOW_RETRY;
455
456 /* No need to up_read(&mm->mmap_sem) as we would
457 * have already released it in __lock_page_or_retry
458 * in mm/filemap.c.
459 */
460
461 goto retry;
462 }
440 } 463 }
441 up_read(&mm->mmap_sem); 464 up_read(&mm->mmap_sem);
442 465
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index 11270ca22c0a..96033e2d6845 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -12,7 +12,7 @@ config TILE
12 select GENERIC_PENDING_IRQ if SMP 12 select GENERIC_PENDING_IRQ if SMP
13 select GENERIC_IRQ_SHOW 13 select GENERIC_IRQ_SHOW
14 select SYS_HYPERVISOR 14 select SYS_HYPERVISOR
15 select ARCH_HAVE_NMI_SAFE_CMPXCHG if !M386 15 select ARCH_HAVE_NMI_SAFE_CMPXCHG
16 16
17# FIXME: investigate whether we need/want these options. 17# FIXME: investigate whether we need/want these options.
18# select HAVE_IOREMAP_PROT 18# select HAVE_IOREMAP_PROT
@@ -69,6 +69,9 @@ config ARCH_PHYS_ADDR_T_64BIT
69config ARCH_DMA_ADDR_T_64BIT 69config ARCH_DMA_ADDR_T_64BIT
70 def_bool y 70 def_bool y
71 71
72config NEED_DMA_MAP_STATE
73 def_bool y
74
72config LOCKDEP_SUPPORT 75config LOCKDEP_SUPPORT
73 def_bool y 76 def_bool y
74 77
@@ -118,7 +121,7 @@ config 64BIT
118 121
119config ARCH_DEFCONFIG 122config ARCH_DEFCONFIG
120 string 123 string
121 default "arch/tile/configs/tile_defconfig" if !TILEGX 124 default "arch/tile/configs/tilepro_defconfig" if !TILEGX
122 default "arch/tile/configs/tilegx_defconfig" if TILEGX 125 default "arch/tile/configs/tilegx_defconfig" if TILEGX
123 126
124source "init/Kconfig" 127source "init/Kconfig"
@@ -240,6 +243,7 @@ endchoice
240 243
241config PAGE_OFFSET 244config PAGE_OFFSET
242 hex 245 hex
246 depends on !64BIT
243 default 0xF0000000 if VMSPLIT_3_75G 247 default 0xF0000000 if VMSPLIT_3_75G
244 default 0xE0000000 if VMSPLIT_3_5G 248 default 0xE0000000 if VMSPLIT_3_5G
245 default 0xB0000000 if VMSPLIT_2_75G 249 default 0xB0000000 if VMSPLIT_2_75G
diff --git a/arch/tile/Makefile b/arch/tile/Makefile
index 17acce70569b..9520bc5a4b7f 100644
--- a/arch/tile/Makefile
+++ b/arch/tile/Makefile
@@ -30,7 +30,8 @@ ifneq ($(CONFIG_DEBUG_EXTRA_FLAGS),"")
30KBUILD_CFLAGS += $(CONFIG_DEBUG_EXTRA_FLAGS) 30KBUILD_CFLAGS += $(CONFIG_DEBUG_EXTRA_FLAGS)
31endif 31endif
32 32
33LIBGCC_PATH := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) 33LIBGCC_PATH := \
34 $(shell $(CC) $(KBUILD_CFLAGS) $(KCFLAGS) -print-libgcc-file-name)
34 35
35# Provide the path to use for "make defconfig". 36# Provide the path to use for "make defconfig".
36KBUILD_DEFCONFIG := $(ARCH)_defconfig 37KBUILD_DEFCONFIG := $(ARCH)_defconfig
@@ -53,8 +54,6 @@ libs-y += $(LIBGCC_PATH)
53# See arch/tile/Kbuild for content of core part of the kernel 54# See arch/tile/Kbuild for content of core part of the kernel
54core-y += arch/tile/ 55core-y += arch/tile/
55 56
56core-$(CONFIG_KVM) += arch/tile/kvm/
57
58ifdef TILERA_ROOT 57ifdef TILERA_ROOT
59INSTALL_PATH ?= $(TILERA_ROOT)/tile/boot 58INSTALL_PATH ?= $(TILERA_ROOT)/tile/boot
60endif 59endif
diff --git a/arch/tile/include/arch/spr_def.h b/arch/tile/include/arch/spr_def.h
index f548efeb2de3..d6ba449b5363 100644
--- a/arch/tile/include/arch/spr_def.h
+++ b/arch/tile/include/arch/spr_def.h
@@ -60,8 +60,8 @@
60 _concat4(SPR_IPI_EVENT_, CONFIG_KERNEL_PL,,) 60 _concat4(SPR_IPI_EVENT_, CONFIG_KERNEL_PL,,)
61#define SPR_IPI_EVENT_RESET_K \ 61#define SPR_IPI_EVENT_RESET_K \
62 _concat4(SPR_IPI_EVENT_RESET_, CONFIG_KERNEL_PL,,) 62 _concat4(SPR_IPI_EVENT_RESET_, CONFIG_KERNEL_PL,,)
63#define SPR_IPI_MASK_SET_K \ 63#define SPR_IPI_EVENT_SET_K \
64 _concat4(SPR_IPI_MASK_SET_, CONFIG_KERNEL_PL,,) 64 _concat4(SPR_IPI_EVENT_SET_, CONFIG_KERNEL_PL,,)
65#define INT_IPI_K \ 65#define INT_IPI_K \
66 _concat4(INT_IPI_, CONFIG_KERNEL_PL,,) 66 _concat4(INT_IPI_, CONFIG_KERNEL_PL,,)
67 67
diff --git a/arch/tile/include/asm/atomic.h b/arch/tile/include/asm/atomic.h
index bb696da5d7cd..f2461429a4a4 100644
--- a/arch/tile/include/asm/atomic.h
+++ b/arch/tile/include/asm/atomic.h
@@ -17,6 +17,8 @@
17#ifndef _ASM_TILE_ATOMIC_H 17#ifndef _ASM_TILE_ATOMIC_H
18#define _ASM_TILE_ATOMIC_H 18#define _ASM_TILE_ATOMIC_H
19 19
20#include <asm/cmpxchg.h>
21
20#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
21 23
22#include <linux/compiler.h> 24#include <linux/compiler.h>
@@ -121,54 +123,6 @@ static inline int atomic_read(const atomic_t *v)
121 */ 123 */
122#define atomic_add_negative(i, v) (atomic_add_return((i), (v)) < 0) 124#define atomic_add_negative(i, v) (atomic_add_return((i), (v)) < 0)
123 125
124/* Nonexistent functions intended to cause link errors. */
125extern unsigned long __xchg_called_with_bad_pointer(void);
126extern unsigned long __cmpxchg_called_with_bad_pointer(void);
127
128#define xchg(ptr, x) \
129 ({ \
130 typeof(*(ptr)) __x; \
131 switch (sizeof(*(ptr))) { \
132 case 4: \
133 __x = (typeof(__x))(typeof(__x-__x))atomic_xchg( \
134 (atomic_t *)(ptr), \
135 (u32)(typeof((x)-(x)))(x)); \
136 break; \
137 case 8: \
138 __x = (typeof(__x))(typeof(__x-__x))atomic64_xchg( \
139 (atomic64_t *)(ptr), \
140 (u64)(typeof((x)-(x)))(x)); \
141 break; \
142 default: \
143 __xchg_called_with_bad_pointer(); \
144 } \
145 __x; \
146 })
147
148#define cmpxchg(ptr, o, n) \
149 ({ \
150 typeof(*(ptr)) __x; \
151 switch (sizeof(*(ptr))) { \
152 case 4: \
153 __x = (typeof(__x))(typeof(__x-__x))atomic_cmpxchg( \
154 (atomic_t *)(ptr), \
155 (u32)(typeof((o)-(o)))(o), \
156 (u32)(typeof((n)-(n)))(n)); \
157 break; \
158 case 8: \
159 __x = (typeof(__x))(typeof(__x-__x))atomic64_cmpxchg( \
160 (atomic64_t *)(ptr), \
161 (u64)(typeof((o)-(o)))(o), \
162 (u64)(typeof((n)-(n)))(n)); \
163 break; \
164 default: \
165 __cmpxchg_called_with_bad_pointer(); \
166 } \
167 __x; \
168 })
169
170#define tas(ptr) (xchg((ptr), 1))
171
172#endif /* __ASSEMBLY__ */ 126#endif /* __ASSEMBLY__ */
173 127
174#ifndef __tilegx__ 128#ifndef __tilegx__
diff --git a/arch/tile/include/asm/atomic_32.h b/arch/tile/include/asm/atomic_32.h
index 466dc4a39a4f..54d1da826f93 100644
--- a/arch/tile/include/asm/atomic_32.h
+++ b/arch/tile/include/asm/atomic_32.h
@@ -200,7 +200,7 @@ static inline u64 atomic64_add_return(u64 i, atomic64_t *v)
200 * @u: ...unless v is equal to u. 200 * @u: ...unless v is equal to u.
201 * 201 *
202 * Atomically adds @a to @v, so long as @v was not already @u. 202 * Atomically adds @a to @v, so long as @v was not already @u.
203 * Returns the old value of @v. 203 * Returns non-zero if @v was not @u, and zero otherwise.
204 */ 204 */
205static inline u64 atomic64_add_unless(atomic64_t *v, u64 a, u64 u) 205static inline u64 atomic64_add_unless(atomic64_t *v, u64 a, u64 u)
206{ 206{
diff --git a/arch/tile/include/asm/bitops_64.h b/arch/tile/include/asm/bitops_64.h
index 58d021a9834f..60b87ee54fb8 100644
--- a/arch/tile/include/asm/bitops_64.h
+++ b/arch/tile/include/asm/bitops_64.h
@@ -38,10 +38,10 @@ static inline void clear_bit(unsigned nr, volatile unsigned long *addr)
38 38
39static inline void change_bit(unsigned nr, volatile unsigned long *addr) 39static inline void change_bit(unsigned nr, volatile unsigned long *addr)
40{ 40{
41 unsigned long old, mask = (1UL << (nr % BITS_PER_LONG)); 41 unsigned long mask = (1UL << (nr % BITS_PER_LONG));
42 long guess, oldval; 42 unsigned long guess, oldval;
43 addr += nr / BITS_PER_LONG; 43 addr += nr / BITS_PER_LONG;
44 old = *addr; 44 oldval = *addr;
45 do { 45 do {
46 guess = oldval; 46 guess = oldval;
47 oldval = atomic64_cmpxchg((atomic64_t *)addr, 47 oldval = atomic64_cmpxchg((atomic64_t *)addr,
@@ -85,7 +85,7 @@ static inline int test_and_change_bit(unsigned nr,
85 volatile unsigned long *addr) 85 volatile unsigned long *addr)
86{ 86{
87 unsigned long mask = (1UL << (nr % BITS_PER_LONG)); 87 unsigned long mask = (1UL << (nr % BITS_PER_LONG));
88 long guess, oldval = *addr; 88 unsigned long guess, oldval;
89 addr += nr / BITS_PER_LONG; 89 addr += nr / BITS_PER_LONG;
90 oldval = *addr; 90 oldval = *addr;
91 do { 91 do {
diff --git a/arch/tile/include/asm/cmpxchg.h b/arch/tile/include/asm/cmpxchg.h
new file mode 100644
index 000000000000..276f067e3640
--- /dev/null
+++ b/arch/tile/include/asm/cmpxchg.h
@@ -0,0 +1,73 @@
1/*
2 * cmpxchg.h -- forked from asm/atomic.h with this copyright:
3 *
4 * Copyright 2010 Tilera Corporation. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation, version 2.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for
14 * more details.
15 *
16 */
17
18#ifndef _ASM_TILE_CMPXCHG_H
19#define _ASM_TILE_CMPXCHG_H
20
21#ifndef __ASSEMBLY__
22
23/* Nonexistent functions intended to cause link errors. */
24extern unsigned long __xchg_called_with_bad_pointer(void);
25extern unsigned long __cmpxchg_called_with_bad_pointer(void);
26
27#define xchg(ptr, x) \
28 ({ \
29 typeof(*(ptr)) __x; \
30 switch (sizeof(*(ptr))) { \
31 case 4: \
32 __x = (typeof(__x))(typeof(__x-__x))atomic_xchg( \
33 (atomic_t *)(ptr), \
34 (u32)(typeof((x)-(x)))(x)); \
35 break; \
36 case 8: \
37 __x = (typeof(__x))(typeof(__x-__x))atomic64_xchg( \
38 (atomic64_t *)(ptr), \
39 (u64)(typeof((x)-(x)))(x)); \
40 break; \
41 default: \
42 __xchg_called_with_bad_pointer(); \
43 } \
44 __x; \
45 })
46
47#define cmpxchg(ptr, o, n) \
48 ({ \
49 typeof(*(ptr)) __x; \
50 switch (sizeof(*(ptr))) { \
51 case 4: \
52 __x = (typeof(__x))(typeof(__x-__x))atomic_cmpxchg( \
53 (atomic_t *)(ptr), \
54 (u32)(typeof((o)-(o)))(o), \
55 (u32)(typeof((n)-(n)))(n)); \
56 break; \
57 case 8: \
58 __x = (typeof(__x))(typeof(__x-__x))atomic64_cmpxchg( \
59 (atomic64_t *)(ptr), \
60 (u64)(typeof((o)-(o)))(o), \
61 (u64)(typeof((n)-(n)))(n)); \
62 break; \
63 default: \
64 __cmpxchg_called_with_bad_pointer(); \
65 } \
66 __x; \
67 })
68
69#define tas(ptr) (xchg((ptr), 1))
70
71#endif /* __ASSEMBLY__ */
72
73#endif /* _ASM_TILE_CMPXCHG_H */
diff --git a/arch/tile/include/asm/irq.h b/arch/tile/include/asm/irq.h
index f80f8ceabc67..33cff9a3058b 100644
--- a/arch/tile/include/asm/irq.h
+++ b/arch/tile/include/asm/irq.h
@@ -21,7 +21,7 @@
21#define NR_IRQS 32 21#define NR_IRQS 32
22 22
23/* IRQ numbers used for linux IPIs. */ 23/* IRQ numbers used for linux IPIs. */
24#define IRQ_RESCHEDULE 1 24#define IRQ_RESCHEDULE 0
25 25
26#define irq_canonicalize(irq) (irq) 26#define irq_canonicalize(irq) (irq)
27 27
diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h
index 5d5a635530bd..32e6cbe8dff3 100644
--- a/arch/tile/include/asm/pci.h
+++ b/arch/tile/include/asm/pci.h
@@ -47,8 +47,8 @@ struct pci_controller {
47 */ 47 */
48#define PCI_DMA_BUS_IS_PHYS 1 48#define PCI_DMA_BUS_IS_PHYS 1
49 49
50int __devinit tile_pci_init(void); 50int __init tile_pci_init(void);
51int __devinit pcibios_init(void); 51int __init pcibios_init(void);
52 52
53static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) {} 53static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) {}
54 54
diff --git a/arch/tile/include/asm/spinlock_64.h b/arch/tile/include/asm/spinlock_64.h
index 72be5904e020..5f8b6a095fd8 100644
--- a/arch/tile/include/asm/spinlock_64.h
+++ b/arch/tile/include/asm/spinlock_64.h
@@ -137,7 +137,7 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
137static inline void arch_write_unlock(arch_rwlock_t *rw) 137static inline void arch_write_unlock(arch_rwlock_t *rw)
138{ 138{
139 __insn_mf(); 139 __insn_mf();
140 rw->lock = 0; 140 __insn_exch4(&rw->lock, 0); /* Avoid waiting in the write buffer. */
141} 141}
142 142
143static inline int arch_read_trylock(arch_rwlock_t *rw) 143static inline int arch_read_trylock(arch_rwlock_t *rw)
diff --git a/arch/tile/include/asm/stack.h b/arch/tile/include/asm/stack.h
index 4d97a2db932e..0e9d382a2d45 100644
--- a/arch/tile/include/asm/stack.h
+++ b/arch/tile/include/asm/stack.h
@@ -25,7 +25,6 @@
25struct KBacktraceIterator { 25struct KBacktraceIterator {
26 BacktraceIterator it; 26 BacktraceIterator it;
27 struct task_struct *task; /* task we are backtracing */ 27 struct task_struct *task; /* task we are backtracing */
28 pte_t *pgtable; /* page table for user space access */
29 int end; /* iteration complete. */ 28 int end; /* iteration complete. */
30 int new_context; /* new context is starting */ 29 int new_context; /* new context is starting */
31 int profile; /* profiling, so stop on async intrpt */ 30 int profile; /* profiling, so stop on async intrpt */
diff --git a/arch/tile/include/asm/traps.h b/arch/tile/include/asm/traps.h
index 5f20f920f932..e28c3df4176a 100644
--- a/arch/tile/include/asm/traps.h
+++ b/arch/tile/include/asm/traps.h
@@ -64,7 +64,11 @@ void do_breakpoint(struct pt_regs *, int fault_num);
64 64
65 65
66#ifdef __tilegx__ 66#ifdef __tilegx__
67/* kernel/single_step.c */
67void gx_singlestep_handle(struct pt_regs *, int fault_num); 68void gx_singlestep_handle(struct pt_regs *, int fault_num);
69
70/* kernel/intvec_64.S */
71void fill_ra_stack(void);
68#endif 72#endif
69 73
70#endif /* _ASM_TILE_SYSCALLS_H */ 74#endif /* _ASM_TILE_TRAPS_H */
diff --git a/arch/tile/kernel/entry.S b/arch/tile/kernel/entry.S
index 431e9ae60488..ec91568df880 100644
--- a/arch/tile/kernel/entry.S
+++ b/arch/tile/kernel/entry.S
@@ -85,6 +85,7 @@ STD_ENTRY(cpu_idle_on_new_stack)
85/* Loop forever on a nap during SMP boot. */ 85/* Loop forever on a nap during SMP boot. */
86STD_ENTRY(smp_nap) 86STD_ENTRY(smp_nap)
87 nap 87 nap
88 nop /* avoid provoking the icache prefetch with a jump */
88 j smp_nap /* we are not architecturally guaranteed not to exit nap */ 89 j smp_nap /* we are not architecturally guaranteed not to exit nap */
89 jrp lr /* clue in the backtracer */ 90 jrp lr /* clue in the backtracer */
90 STD_ENDPROC(smp_nap) 91 STD_ENDPROC(smp_nap)
@@ -105,5 +106,6 @@ STD_ENTRY(_cpu_idle)
105 .global _cpu_idle_nap 106 .global _cpu_idle_nap
106_cpu_idle_nap: 107_cpu_idle_nap:
107 nap 108 nap
109 nop /* avoid provoking the icache prefetch with a jump */
108 jrp lr 110 jrp lr
109 STD_ENDPROC(_cpu_idle) 111 STD_ENDPROC(_cpu_idle)
diff --git a/arch/tile/kernel/intvec_32.S b/arch/tile/kernel/intvec_32.S
index aecc8ed5f39b..5d56a1ef5ba5 100644
--- a/arch/tile/kernel/intvec_32.S
+++ b/arch/tile/kernel/intvec_32.S
@@ -799,6 +799,10 @@ handle_interrupt:
799 * This routine takes a boolean in r30 indicating if this is an NMI. 799 * This routine takes a boolean in r30 indicating if this is an NMI.
800 * If so, we also expect a boolean in r31 indicating whether to 800 * If so, we also expect a boolean in r31 indicating whether to
801 * re-enable the oprofile interrupts. 801 * re-enable the oprofile interrupts.
802 *
803 * Note that .Lresume_userspace is jumped to directly in several
804 * places, and we need to make sure r30 is set correctly in those
805 * callers as well.
802 */ 806 */
803STD_ENTRY(interrupt_return) 807STD_ENTRY(interrupt_return)
804 /* If we're resuming to kernel space, don't check thread flags. */ 808 /* If we're resuming to kernel space, don't check thread flags. */
@@ -1237,7 +1241,10 @@ handle_syscall:
1237 bzt r30, 1f 1241 bzt r30, 1f
1238 jal do_syscall_trace 1242 jal do_syscall_trace
1239 FEEDBACK_REENTER(handle_syscall) 1243 FEEDBACK_REENTER(handle_syscall)
12401: j .Lresume_userspace /* jump into middle of interrupt_return */ 12441: {
1245 movei r30, 0 /* not an NMI */
1246 j .Lresume_userspace /* jump into middle of interrupt_return */
1247 }
1241 1248
1242.Linvalid_syscall: 1249.Linvalid_syscall:
1243 /* Report an invalid syscall back to the user program */ 1250 /* Report an invalid syscall back to the user program */
@@ -1246,7 +1253,10 @@ handle_syscall:
1246 movei r28, -ENOSYS 1253 movei r28, -ENOSYS
1247 } 1254 }
1248 sw r29, r28 1255 sw r29, r28
1249 j .Lresume_userspace /* jump into middle of interrupt_return */ 1256 {
1257 movei r30, 0 /* not an NMI */
1258 j .Lresume_userspace /* jump into middle of interrupt_return */
1259 }
1250 STD_ENDPROC(handle_syscall) 1260 STD_ENDPROC(handle_syscall)
1251 1261
1252 /* Return the address for oprofile to suppress in backtraces. */ 1262 /* Return the address for oprofile to suppress in backtraces. */
@@ -1262,7 +1272,10 @@ STD_ENTRY(ret_from_fork)
1262 jal sim_notify_fork 1272 jal sim_notify_fork
1263 jal schedule_tail 1273 jal schedule_tail
1264 FEEDBACK_REENTER(ret_from_fork) 1274 FEEDBACK_REENTER(ret_from_fork)
1265 j .Lresume_userspace /* jump into middle of interrupt_return */ 1275 {
1276 movei r30, 0 /* not an NMI */
1277 j .Lresume_userspace /* jump into middle of interrupt_return */
1278 }
1266 STD_ENDPROC(ret_from_fork) 1279 STD_ENDPROC(ret_from_fork)
1267 1280
1268 /* 1281 /*
@@ -1376,7 +1389,10 @@ handle_ill:
1376 1389
1377 jal send_sigtrap /* issue a SIGTRAP */ 1390 jal send_sigtrap /* issue a SIGTRAP */
1378 FEEDBACK_REENTER(handle_ill) 1391 FEEDBACK_REENTER(handle_ill)
1379 j .Lresume_userspace /* jump into middle of interrupt_return */ 1392 {
1393 movei r30, 0 /* not an NMI */
1394 j .Lresume_userspace /* jump into middle of interrupt_return */
1395 }
1380 1396
1381.Ldispatch_normal_ill: 1397.Ldispatch_normal_ill:
1382 { 1398 {
diff --git a/arch/tile/kernel/intvec_64.S b/arch/tile/kernel/intvec_64.S
index 79c93e10ba27..49d9d6621682 100644
--- a/arch/tile/kernel/intvec_64.S
+++ b/arch/tile/kernel/intvec_64.S
@@ -22,6 +22,7 @@
22#include <asm/irqflags.h> 22#include <asm/irqflags.h>
23#include <asm/asm-offsets.h> 23#include <asm/asm-offsets.h>
24#include <asm/types.h> 24#include <asm/types.h>
25#include <asm/signal.h>
25#include <hv/hypervisor.h> 26#include <hv/hypervisor.h>
26#include <arch/abi.h> 27#include <arch/abi.h>
27#include <arch/interrupts.h> 28#include <arch/interrupts.h>
@@ -605,6 +606,10 @@ handle_interrupt:
605 * This routine takes a boolean in r30 indicating if this is an NMI. 606 * This routine takes a boolean in r30 indicating if this is an NMI.
606 * If so, we also expect a boolean in r31 indicating whether to 607 * If so, we also expect a boolean in r31 indicating whether to
607 * re-enable the oprofile interrupts. 608 * re-enable the oprofile interrupts.
609 *
610 * Note that .Lresume_userspace is jumped to directly in several
611 * places, and we need to make sure r30 is set correctly in those
612 * callers as well.
608 */ 613 */
609STD_ENTRY(interrupt_return) 614STD_ENTRY(interrupt_return)
610 /* If we're resuming to kernel space, don't check thread flags. */ 615 /* If we're resuming to kernel space, don't check thread flags. */
@@ -1039,11 +1044,28 @@ handle_syscall:
1039 1044
1040 /* Do syscall trace again, if requested. */ 1045 /* Do syscall trace again, if requested. */
1041 ld r30, r31 1046 ld r30, r31
1042 andi r30, r30, _TIF_SYSCALL_TRACE 1047 andi r0, r30, _TIF_SYSCALL_TRACE
1043 beqzt r30, 1f 1048 {
1049 andi r0, r30, _TIF_SINGLESTEP
1050 beqzt r0, 1f
1051 }
1044 jal do_syscall_trace 1052 jal do_syscall_trace
1045 FEEDBACK_REENTER(handle_syscall) 1053 FEEDBACK_REENTER(handle_syscall)
10461: j .Lresume_userspace /* jump into middle of interrupt_return */ 1054 andi r0, r30, _TIF_SINGLESTEP
1055
10561: beqzt r0, 2f
1057
1058 /* Single stepping -- notify ptrace. */
1059 {
1060 movei r0, SIGTRAP
1061 jal ptrace_notify
1062 }
1063 FEEDBACK_REENTER(handle_syscall)
1064
10652: {
1066 movei r30, 0 /* not an NMI */
1067 j .Lresume_userspace /* jump into middle of interrupt_return */
1068 }
1047 1069
1048.Lcompat_syscall: 1070.Lcompat_syscall:
1049 /* 1071 /*
@@ -1077,7 +1099,10 @@ handle_syscall:
1077 movei r28, -ENOSYS 1099 movei r28, -ENOSYS
1078 } 1100 }
1079 st r29, r28 1101 st r29, r28
1080 j .Lresume_userspace /* jump into middle of interrupt_return */ 1102 {
1103 movei r30, 0 /* not an NMI */
1104 j .Lresume_userspace /* jump into middle of interrupt_return */
1105 }
1081 STD_ENDPROC(handle_syscall) 1106 STD_ENDPROC(handle_syscall)
1082 1107
1083 /* Return the address for oprofile to suppress in backtraces. */ 1108 /* Return the address for oprofile to suppress in backtraces. */
@@ -1093,7 +1118,10 @@ STD_ENTRY(ret_from_fork)
1093 jal sim_notify_fork 1118 jal sim_notify_fork
1094 jal schedule_tail 1119 jal schedule_tail
1095 FEEDBACK_REENTER(ret_from_fork) 1120 FEEDBACK_REENTER(ret_from_fork)
1096 j .Lresume_userspace 1121 {
1122 movei r30, 0 /* not an NMI */
1123 j .Lresume_userspace /* jump into middle of interrupt_return */
1124 }
1097 STD_ENDPROC(ret_from_fork) 1125 STD_ENDPROC(ret_from_fork)
1098 1126
1099/* Various stub interrupt handlers and syscall handlers */ 1127/* Various stub interrupt handlers and syscall handlers */
@@ -1156,6 +1184,18 @@ int_unalign:
1156 push_extra_callee_saves r0 1184 push_extra_callee_saves r0
1157 j do_trap 1185 j do_trap
1158 1186
1187/* Fill the return address stack with nonzero entries. */
1188STD_ENTRY(fill_ra_stack)
1189 {
1190 move r0, lr
1191 jal 1f
1192 }
11931: jal 2f
11942: jal 3f
11953: jal 4f
11964: jrp r0
1197 STD_ENDPROC(fill_ra_stack)
1198
1159/* Include .intrpt1 array of interrupt vectors */ 1199/* Include .intrpt1 array of interrupt vectors */
1160 .section ".intrpt1", "ax" 1200 .section ".intrpt1", "ax"
1161 1201
@@ -1166,7 +1206,7 @@ int_unalign:
1166#define do_hardwall_trap bad_intr 1206#define do_hardwall_trap bad_intr
1167#endif 1207#endif
1168 1208
1169 int_hand INT_MEM_ERROR, MEM_ERROR, bad_intr 1209 int_hand INT_MEM_ERROR, MEM_ERROR, do_trap
1170 int_hand INT_SINGLE_STEP_3, SINGLE_STEP_3, bad_intr 1210 int_hand INT_SINGLE_STEP_3, SINGLE_STEP_3, bad_intr
1171#if CONFIG_KERNEL_PL == 2 1211#if CONFIG_KERNEL_PL == 2
1172 int_hand INT_SINGLE_STEP_2, SINGLE_STEP_2, gx_singlestep_handle 1212 int_hand INT_SINGLE_STEP_2, SINGLE_STEP_2, gx_singlestep_handle
diff --git a/arch/tile/kernel/module.c b/arch/tile/kernel/module.c
index b90ab9925674..98d476920106 100644
--- a/arch/tile/kernel/module.c
+++ b/arch/tile/kernel/module.c
@@ -67,6 +67,8 @@ void *module_alloc(unsigned long size)
67 area = __get_vm_area(size, VM_ALLOC, MEM_MODULE_START, MEM_MODULE_END); 67 area = __get_vm_area(size, VM_ALLOC, MEM_MODULE_START, MEM_MODULE_END);
68 if (!area) 68 if (!area)
69 goto error; 69 goto error;
70 area->nr_pages = npages;
71 area->pages = pages;
70 72
71 if (map_vm_area(area, prot_rwx, &pages)) { 73 if (map_vm_area(area, prot_rwx, &pages)) {
72 vunmap(area->addr); 74 vunmap(area->addr);
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index a1bb59eecc18..b56d12bf5900 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -141,7 +141,7 @@ static int __devinit tile_init_irqs(int controller_id,
141 * 141 *
142 * Returns the number of controllers discovered. 142 * Returns the number of controllers discovered.
143 */ 143 */
144int __devinit tile_pci_init(void) 144int __init tile_pci_init(void)
145{ 145{
146 int i; 146 int i;
147 147
@@ -287,7 +287,7 @@ static void __devinit fixup_read_and_payload_sizes(void)
287 * The controllers have been set up by the time we get here, by a call to 287 * The controllers have been set up by the time we get here, by a call to
288 * tile_pci_init. 288 * tile_pci_init.
289 */ 289 */
290int __devinit pcibios_init(void) 290int __init pcibios_init(void)
291{ 291{
292 int i; 292 int i;
293 293
diff --git a/arch/tile/kernel/proc.c b/arch/tile/kernel/proc.c
index 7a9327046404..446a7f52cc11 100644
--- a/arch/tile/kernel/proc.c
+++ b/arch/tile/kernel/proc.c
@@ -146,7 +146,6 @@ static ctl_table unaligned_table[] = {
146 }, 146 },
147 {} 147 {}
148}; 148};
149#endif
150 149
151static struct ctl_path tile_path[] = { 150static struct ctl_path tile_path[] = {
152 { .procname = "tile" }, 151 { .procname = "tile" },
@@ -155,10 +154,9 @@ static struct ctl_path tile_path[] = {
155 154
156static int __init proc_sys_tile_init(void) 155static int __init proc_sys_tile_init(void)
157{ 156{
158#ifndef __tilegx__ /* FIXME: GX: no support for unaligned access yet */
159 register_sysctl_paths(tile_path, unaligned_table); 157 register_sysctl_paths(tile_path, unaligned_table);
160#endif
161 return 0; 158 return 0;
162} 159}
163 160
164arch_initcall(proc_sys_tile_init); 161arch_initcall(proc_sys_tile_init);
162#endif
diff --git a/arch/tile/kernel/process.c b/arch/tile/kernel/process.c
index 30caecac94dc..2d5ef617bb39 100644
--- a/arch/tile/kernel/process.c
+++ b/arch/tile/kernel/process.c
@@ -28,6 +28,7 @@
28#include <linux/tracehook.h> 28#include <linux/tracehook.h>
29#include <linux/signal.h> 29#include <linux/signal.h>
30#include <asm/stack.h> 30#include <asm/stack.h>
31#include <asm/switch_to.h>
31#include <asm/homecache.h> 32#include <asm/homecache.h>
32#include <asm/syscalls.h> 33#include <asm/syscalls.h>
33#include <asm/traps.h> 34#include <asm/traps.h>
@@ -285,7 +286,7 @@ struct task_struct *validate_current(void)
285 static struct task_struct corrupt = { .comm = "<corrupt>" }; 286 static struct task_struct corrupt = { .comm = "<corrupt>" };
286 struct task_struct *tsk = current; 287 struct task_struct *tsk = current;
287 if (unlikely((unsigned long)tsk < PAGE_OFFSET || 288 if (unlikely((unsigned long)tsk < PAGE_OFFSET ||
288 (void *)tsk > high_memory || 289 (high_memory && (void *)tsk > high_memory) ||
289 ((unsigned long)tsk & (__alignof__(*tsk) - 1)) != 0)) { 290 ((unsigned long)tsk & (__alignof__(*tsk) - 1)) != 0)) {
290 pr_err("Corrupt 'current' %p (sp %#lx)\n", tsk, stack_pointer); 291 pr_err("Corrupt 'current' %p (sp %#lx)\n", tsk, stack_pointer);
291 tsk = &corrupt; 292 tsk = &corrupt;
diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c
index 5f85d8b34dbb..bff23f476110 100644
--- a/arch/tile/kernel/setup.c
+++ b/arch/tile/kernel/setup.c
@@ -103,13 +103,11 @@ unsigned long __initdata pci_reserve_end_pfn = -1U;
103 103
104static int __init setup_maxmem(char *str) 104static int __init setup_maxmem(char *str)
105{ 105{
106 long maxmem_mb; 106 unsigned long long maxmem;
107 if (str == NULL || strict_strtol(str, 0, &maxmem_mb) != 0 || 107 if (str == NULL || (maxmem = memparse(str, NULL)) == 0)
108 maxmem_mb == 0)
109 return -EINVAL; 108 return -EINVAL;
110 109
111 maxmem_pfn = (maxmem_mb >> (HPAGE_SHIFT - 20)) << 110 maxmem_pfn = (maxmem >> HPAGE_SHIFT) << (HPAGE_SHIFT - PAGE_SHIFT);
112 (HPAGE_SHIFT - PAGE_SHIFT);
113 pr_info("Forcing RAM used to no more than %dMB\n", 111 pr_info("Forcing RAM used to no more than %dMB\n",
114 maxmem_pfn >> (20 - PAGE_SHIFT)); 112 maxmem_pfn >> (20 - PAGE_SHIFT));
115 return 0; 113 return 0;
@@ -119,14 +117,15 @@ early_param("maxmem", setup_maxmem);
119static int __init setup_maxnodemem(char *str) 117static int __init setup_maxnodemem(char *str)
120{ 118{
121 char *endp; 119 char *endp;
122 long maxnodemem_mb, node; 120 unsigned long long maxnodemem;
121 long node;
123 122
124 node = str ? simple_strtoul(str, &endp, 0) : INT_MAX; 123 node = str ? simple_strtoul(str, &endp, 0) : INT_MAX;
125 if (node >= MAX_NUMNODES || *endp != ':' || 124 if (node >= MAX_NUMNODES || *endp != ':')
126 strict_strtol(endp+1, 0, &maxnodemem_mb) != 0)
127 return -EINVAL; 125 return -EINVAL;
128 126
129 maxnodemem_pfn[node] = (maxnodemem_mb >> (HPAGE_SHIFT - 20)) << 127 maxnodemem = memparse(endp+1, NULL);
128 maxnodemem_pfn[node] = (maxnodemem >> HPAGE_SHIFT) <<
130 (HPAGE_SHIFT - PAGE_SHIFT); 129 (HPAGE_SHIFT - PAGE_SHIFT);
131 pr_info("Forcing RAM used on node %ld to no more than %dMB\n", 130 pr_info("Forcing RAM used on node %ld to no more than %dMB\n",
132 node, maxnodemem_pfn[node] >> (20 - PAGE_SHIFT)); 131 node, maxnodemem_pfn[node] >> (20 - PAGE_SHIFT));
@@ -913,6 +912,13 @@ void __cpuinit setup_cpu(int boot)
913 912
914#ifdef CONFIG_BLK_DEV_INITRD 913#ifdef CONFIG_BLK_DEV_INITRD
915 914
915/*
916 * Note that the kernel can potentially support other compression
917 * techniques than gz, though we don't do so by default. If we ever
918 * decide to do so we can either look for other filename extensions,
919 * or just allow a file with this name to be compressed with an
920 * arbitrary compressor (somewhat counterintuitively).
921 */
916static int __initdata set_initramfs_file; 922static int __initdata set_initramfs_file;
917static char __initdata initramfs_file[128] = "initramfs.cpio.gz"; 923static char __initdata initramfs_file[128] = "initramfs.cpio.gz";
918 924
@@ -928,9 +934,9 @@ static int __init setup_initramfs_file(char *str)
928early_param("initramfs_file", setup_initramfs_file); 934early_param("initramfs_file", setup_initramfs_file);
929 935
930/* 936/*
931 * We look for an additional "initramfs.cpio.gz" file in the hvfs. 937 * We look for an "initramfs.cpio.gz" file in the hvfs.
932 * If there is one, we allocate some memory for it and it will be 938 * If there is one, we allocate some memory for it and it will be
933 * unpacked to the initramfs after any built-in initramfs_data. 939 * unpacked to the initramfs.
934 */ 940 */
935static void __init load_hv_initrd(void) 941static void __init load_hv_initrd(void)
936{ 942{
@@ -1100,7 +1106,7 @@ EXPORT_SYMBOL(hash_for_home_map);
1100 1106
1101/* 1107/*
1102 * cpu_cacheable_map lists all the cpus whose caches the hypervisor can 1108 * cpu_cacheable_map lists all the cpus whose caches the hypervisor can
1103 * flush on our behalf. It is set to cpu_possible_map OR'ed with 1109 * flush on our behalf. It is set to cpu_possible_mask OR'ed with
1104 * hash_for_home_map, and it is what should be passed to 1110 * hash_for_home_map, and it is what should be passed to
1105 * hv_flush_remote() to flush all caches. Note that if there are 1111 * hv_flush_remote() to flush all caches. Note that if there are
1106 * dedicated hypervisor driver tiles that have authorized use of their 1112 * dedicated hypervisor driver tiles that have authorized use of their
@@ -1186,7 +1192,7 @@ static void __init setup_cpu_maps(void)
1186 sizeof(cpu_lotar_map)); 1192 sizeof(cpu_lotar_map));
1187 if (rc < 0) { 1193 if (rc < 0) {
1188 pr_err("warning: no HV_INQ_TILES_LOTAR; using AVAIL\n"); 1194 pr_err("warning: no HV_INQ_TILES_LOTAR; using AVAIL\n");
1189 cpu_lotar_map = cpu_possible_map; 1195 cpu_lotar_map = *cpu_possible_mask;
1190 } 1196 }
1191 1197
1192#if CHIP_HAS_CBOX_HOME_MAP() 1198#if CHIP_HAS_CBOX_HOME_MAP()
@@ -1196,9 +1202,9 @@ static void __init setup_cpu_maps(void)
1196 sizeof(hash_for_home_map)); 1202 sizeof(hash_for_home_map));
1197 if (rc < 0) 1203 if (rc < 0)
1198 early_panic("hv_inquire_tiles(HFH_CACHE) failed: rc %d\n", rc); 1204 early_panic("hv_inquire_tiles(HFH_CACHE) failed: rc %d\n", rc);
1199 cpumask_or(&cpu_cacheable_map, &cpu_possible_map, &hash_for_home_map); 1205 cpumask_or(&cpu_cacheable_map, cpu_possible_mask, &hash_for_home_map);
1200#else 1206#else
1201 cpu_cacheable_map = cpu_possible_map; 1207 cpu_cacheable_map = *cpu_possible_mask;
1202#endif 1208#endif
1203} 1209}
1204 1210
diff --git a/arch/tile/kernel/single_step.c b/arch/tile/kernel/single_step.c
index bc1eb586e24d..89529c9f0605 100644
--- a/arch/tile/kernel/single_step.c
+++ b/arch/tile/kernel/single_step.c
@@ -153,6 +153,25 @@ static tile_bundle_bits rewrite_load_store_unaligned(
153 if (((unsigned long)addr % size) == 0) 153 if (((unsigned long)addr % size) == 0)
154 return bundle; 154 return bundle;
155 155
156 /*
157 * Return SIGBUS with the unaligned address, if requested.
158 * Note that we return SIGBUS even for completely invalid addresses
159 * as long as they are in fact unaligned; this matches what the
160 * tilepro hardware would be doing, if it could provide us with the
161 * actual bad address in an SPR, which it doesn't.
162 */
163 if (unaligned_fixup == 0) {
164 siginfo_t info = {
165 .si_signo = SIGBUS,
166 .si_code = BUS_ADRALN,
167 .si_addr = addr
168 };
169 trace_unhandled_signal("unaligned trap", regs,
170 (unsigned long)addr, SIGBUS);
171 force_sig_info(info.si_signo, &info, current);
172 return (tilepro_bundle_bits) 0;
173 }
174
156#ifndef __LITTLE_ENDIAN 175#ifndef __LITTLE_ENDIAN
157# error We assume little-endian representation with copy_xx_user size 2 here 176# error We assume little-endian representation with copy_xx_user size 2 here
158#endif 177#endif
@@ -192,18 +211,6 @@ static tile_bundle_bits rewrite_load_store_unaligned(
192 return (tile_bundle_bits) 0; 211 return (tile_bundle_bits) 0;
193 } 212 }
194 213
195 if (unaligned_fixup == 0) {
196 siginfo_t info = {
197 .si_signo = SIGBUS,
198 .si_code = BUS_ADRALN,
199 .si_addr = addr
200 };
201 trace_unhandled_signal("unaligned trap", regs,
202 (unsigned long)addr, SIGBUS);
203 force_sig_info(info.si_signo, &info, current);
204 return (tile_bundle_bits) 0;
205 }
206
207 if (unaligned_printk || unaligned_fixup_count == 0) { 214 if (unaligned_printk || unaligned_fixup_count == 0) {
208 pr_info("Process %d/%s: PC %#lx: Fixup of" 215 pr_info("Process %d/%s: PC %#lx: Fixup of"
209 " unaligned %s at %#lx.\n", 216 " unaligned %s at %#lx.\n",
@@ -339,12 +346,10 @@ void single_step_once(struct pt_regs *regs)
339 } 346 }
340 347
341 /* allocate a cache line of writable, executable memory */ 348 /* allocate a cache line of writable, executable memory */
342 down_write(&current->mm->mmap_sem); 349 buffer = (void __user *) vm_mmap(NULL, 0, 64,
343 buffer = (void __user *) do_mmap(NULL, 0, 64,
344 PROT_EXEC | PROT_READ | PROT_WRITE, 350 PROT_EXEC | PROT_READ | PROT_WRITE,
345 MAP_PRIVATE | MAP_ANONYMOUS, 351 MAP_PRIVATE | MAP_ANONYMOUS,
346 0); 352 0);
347 up_write(&current->mm->mmap_sem);
348 353
349 if (IS_ERR((void __force *)buffer)) { 354 if (IS_ERR((void __force *)buffer)) {
350 kfree(state); 355 kfree(state);
diff --git a/arch/tile/kernel/smp.c b/arch/tile/kernel/smp.c
index a44e103c5a63..91da0f721958 100644
--- a/arch/tile/kernel/smp.c
+++ b/arch/tile/kernel/smp.c
@@ -103,7 +103,7 @@ static void smp_stop_cpu_interrupt(void)
103 set_cpu_online(smp_processor_id(), 0); 103 set_cpu_online(smp_processor_id(), 0);
104 arch_local_irq_disable_all(); 104 arch_local_irq_disable_all();
105 for (;;) 105 for (;;)
106 asm("nap"); 106 asm("nap; nop");
107} 107}
108 108
109/* This function calls the 'stop' function on all other CPUs in the system. */ 109/* This function calls the 'stop' function on all other CPUs in the system. */
@@ -113,6 +113,12 @@ void smp_send_stop(void)
113 send_IPI_allbutself(MSG_TAG_STOP_CPU); 113 send_IPI_allbutself(MSG_TAG_STOP_CPU);
114} 114}
115 115
116/* On panic, just wait; we may get an smp_send_stop() later on. */
117void panic_smp_self_stop(void)
118{
119 while (1)
120 asm("nap; nop");
121}
116 122
117/* 123/*
118 * Dispatch code called from hv_message_intr() for HV_MSG_TILE hv messages. 124 * Dispatch code called from hv_message_intr() for HV_MSG_TILE hv messages.
diff --git a/arch/tile/kernel/smpboot.c b/arch/tile/kernel/smpboot.c
index b949edcec200..172aef7d3159 100644
--- a/arch/tile/kernel/smpboot.c
+++ b/arch/tile/kernel/smpboot.c
@@ -196,6 +196,8 @@ void __cpuinit online_secondary(void)
196 /* This must be done before setting cpu_online_mask */ 196 /* This must be done before setting cpu_online_mask */
197 wmb(); 197 wmb();
198 198
199 notify_cpu_starting(smp_processor_id());
200
199 /* 201 /*
200 * We need to hold call_lock, so there is no inconsistency 202 * We need to hold call_lock, so there is no inconsistency
201 * between the time smp_call_function() determines number of 203 * between the time smp_call_function() determines number of
diff --git a/arch/tile/kernel/stack.c b/arch/tile/kernel/stack.c
index 37ee4d037e0b..b2f44c28dda6 100644
--- a/arch/tile/kernel/stack.c
+++ b/arch/tile/kernel/stack.c
@@ -21,10 +21,12 @@
21#include <linux/stacktrace.h> 21#include <linux/stacktrace.h>
22#include <linux/uaccess.h> 22#include <linux/uaccess.h>
23#include <linux/mmzone.h> 23#include <linux/mmzone.h>
24#include <linux/dcache.h>
25#include <linux/fs.h>
24#include <asm/backtrace.h> 26#include <asm/backtrace.h>
25#include <asm/page.h> 27#include <asm/page.h>
26#include <asm/tlbflush.h>
27#include <asm/ucontext.h> 28#include <asm/ucontext.h>
29#include <asm/switch_to.h>
28#include <asm/sigframe.h> 30#include <asm/sigframe.h>
29#include <asm/stack.h> 31#include <asm/stack.h>
30#include <arch/abi.h> 32#include <arch/abi.h>
@@ -44,72 +46,23 @@ static int in_kernel_stack(struct KBacktraceIterator *kbt, unsigned long sp)
44 return sp >= kstack_base && sp < kstack_base + THREAD_SIZE; 46 return sp >= kstack_base && sp < kstack_base + THREAD_SIZE;
45} 47}
46 48
47/* Is address valid for reading? */
48static int valid_address(struct KBacktraceIterator *kbt, unsigned long address)
49{
50 HV_PTE *l1_pgtable = kbt->pgtable;
51 HV_PTE *l2_pgtable;
52 unsigned long pfn;
53 HV_PTE pte;
54 struct page *page;
55
56 if (l1_pgtable == NULL)
57 return 0; /* can't read user space in other tasks */
58
59#ifdef CONFIG_64BIT
60 /* Find the real l1_pgtable by looking in the l0_pgtable. */
61 pte = l1_pgtable[HV_L0_INDEX(address)];
62 if (!hv_pte_get_present(pte))
63 return 0;
64 pfn = hv_pte_get_pfn(pte);
65 if (pte_huge(pte)) {
66 if (!pfn_valid(pfn)) {
67 pr_err("L0 huge page has bad pfn %#lx\n", pfn);
68 return 0;
69 }
70 return hv_pte_get_present(pte) && hv_pte_get_readable(pte);
71 }
72 page = pfn_to_page(pfn);
73 BUG_ON(PageHighMem(page)); /* No HIGHMEM on 64-bit. */
74 l1_pgtable = (HV_PTE *)pfn_to_kaddr(pfn);
75#endif
76 pte = l1_pgtable[HV_L1_INDEX(address)];
77 if (!hv_pte_get_present(pte))
78 return 0;
79 pfn = hv_pte_get_pfn(pte);
80 if (pte_huge(pte)) {
81 if (!pfn_valid(pfn)) {
82 pr_err("huge page has bad pfn %#lx\n", pfn);
83 return 0;
84 }
85 return hv_pte_get_present(pte) && hv_pte_get_readable(pte);
86 }
87
88 page = pfn_to_page(pfn);
89 if (PageHighMem(page)) {
90 pr_err("L2 page table not in LOWMEM (%#llx)\n",
91 HV_PFN_TO_CPA(pfn));
92 return 0;
93 }
94 l2_pgtable = (HV_PTE *)pfn_to_kaddr(pfn);
95 pte = l2_pgtable[HV_L2_INDEX(address)];
96 return hv_pte_get_present(pte) && hv_pte_get_readable(pte);
97}
98
99/* Callback for backtracer; basically a glorified memcpy */ 49/* Callback for backtracer; basically a glorified memcpy */
100static bool read_memory_func(void *result, unsigned long address, 50static bool read_memory_func(void *result, unsigned long address,
101 unsigned int size, void *vkbt) 51 unsigned int size, void *vkbt)
102{ 52{
103 int retval; 53 int retval;
104 struct KBacktraceIterator *kbt = (struct KBacktraceIterator *)vkbt; 54 struct KBacktraceIterator *kbt = (struct KBacktraceIterator *)vkbt;
55
56 if (address == 0)
57 return 0;
105 if (__kernel_text_address(address)) { 58 if (__kernel_text_address(address)) {
106 /* OK to read kernel code. */ 59 /* OK to read kernel code. */
107 } else if (address >= PAGE_OFFSET) { 60 } else if (address >= PAGE_OFFSET) {
108 /* We only tolerate kernel-space reads of this task's stack */ 61 /* We only tolerate kernel-space reads of this task's stack */
109 if (!in_kernel_stack(kbt, address)) 62 if (!in_kernel_stack(kbt, address))
110 return 0; 63 return 0;
111 } else if (!valid_address(kbt, address)) { 64 } else if (!kbt->is_current) {
112 return 0; /* invalid user-space address */ 65 return 0; /* can't read from other user address spaces */
113 } 66 }
114 pagefault_disable(); 67 pagefault_disable();
115 retval = __copy_from_user_inatomic(result, 68 retval = __copy_from_user_inatomic(result,
@@ -127,6 +80,8 @@ static struct pt_regs *valid_fault_handler(struct KBacktraceIterator* kbt)
127 unsigned long sp = kbt->it.sp; 80 unsigned long sp = kbt->it.sp;
128 struct pt_regs *p; 81 struct pt_regs *p;
129 82
83 if (sp % sizeof(long) != 0)
84 return NULL;
130 if (!in_kernel_stack(kbt, sp)) 85 if (!in_kernel_stack(kbt, sp))
131 return NULL; 86 return NULL;
132 if (!in_kernel_stack(kbt, sp + C_ABI_SAVE_AREA_SIZE + PTREGS_SIZE-1)) 87 if (!in_kernel_stack(kbt, sp + C_ABI_SAVE_AREA_SIZE + PTREGS_SIZE-1))
@@ -169,27 +124,27 @@ static int is_sigreturn(unsigned long pc)
169} 124}
170 125
171/* Return a pt_regs pointer for a valid signal handler frame */ 126/* Return a pt_regs pointer for a valid signal handler frame */
172static struct pt_regs *valid_sigframe(struct KBacktraceIterator* kbt) 127static struct pt_regs *valid_sigframe(struct KBacktraceIterator* kbt,
128 struct rt_sigframe* kframe)
173{ 129{
174 BacktraceIterator *b = &kbt->it; 130 BacktraceIterator *b = &kbt->it;
175 131
176 if (b->pc == VDSO_BASE) { 132 if (b->pc == VDSO_BASE && b->sp < PAGE_OFFSET &&
177 struct rt_sigframe *frame; 133 b->sp % sizeof(long) == 0) {
178 unsigned long sigframe_top = 134 int retval;
179 b->sp + sizeof(struct rt_sigframe) - 1; 135 pagefault_disable();
180 if (!valid_address(kbt, b->sp) || 136 retval = __copy_from_user_inatomic(
181 !valid_address(kbt, sigframe_top)) { 137 kframe, (void __user __force *)b->sp,
182 if (kbt->verbose) 138 sizeof(*kframe));
183 pr_err(" (odd signal: sp %#lx?)\n", 139 pagefault_enable();
184 (unsigned long)(b->sp)); 140 if (retval != 0 ||
141 (unsigned int)(kframe->info.si_signo) >= _NSIG)
185 return NULL; 142 return NULL;
186 }
187 frame = (struct rt_sigframe *)b->sp;
188 if (kbt->verbose) { 143 if (kbt->verbose) {
189 pr_err(" <received signal %d>\n", 144 pr_err(" <received signal %d>\n",
190 frame->info.si_signo); 145 kframe->info.si_signo);
191 } 146 }
192 return (struct pt_regs *)&frame->uc.uc_mcontext; 147 return (struct pt_regs *)&kframe->uc.uc_mcontext;
193 } 148 }
194 return NULL; 149 return NULL;
195} 150}
@@ -202,10 +157,11 @@ static int KBacktraceIterator_is_sigreturn(struct KBacktraceIterator *kbt)
202static int KBacktraceIterator_restart(struct KBacktraceIterator *kbt) 157static int KBacktraceIterator_restart(struct KBacktraceIterator *kbt)
203{ 158{
204 struct pt_regs *p; 159 struct pt_regs *p;
160 struct rt_sigframe kframe;
205 161
206 p = valid_fault_handler(kbt); 162 p = valid_fault_handler(kbt);
207 if (p == NULL) 163 if (p == NULL)
208 p = valid_sigframe(kbt); 164 p = valid_sigframe(kbt, &kframe);
209 if (p == NULL) 165 if (p == NULL)
210 return 0; 166 return 0;
211 backtrace_init(&kbt->it, read_memory_func, kbt, 167 backtrace_init(&kbt->it, read_memory_func, kbt,
@@ -265,41 +221,19 @@ void KBacktraceIterator_init(struct KBacktraceIterator *kbt,
265 221
266 /* 222 /*
267 * Set up callback information. We grab the kernel stack base 223 * Set up callback information. We grab the kernel stack base
268 * so we will allow reads of that address range, and if we're 224 * so we will allow reads of that address range.
269 * asking about the current process we grab the page table
270 * so we can check user accesses before trying to read them.
271 * We flush the TLB to avoid any weird skew issues.
272 */ 225 */
273 is_current = (t == NULL); 226 is_current = (t == NULL || t == current);
274 kbt->is_current = is_current; 227 kbt->is_current = is_current;
275 if (is_current) 228 if (is_current)
276 t = validate_current(); 229 t = validate_current();
277 kbt->task = t; 230 kbt->task = t;
278 kbt->pgtable = NULL;
279 kbt->verbose = 0; /* override in caller if desired */ 231 kbt->verbose = 0; /* override in caller if desired */
280 kbt->profile = 0; /* override in caller if desired */ 232 kbt->profile = 0; /* override in caller if desired */
281 kbt->end = KBT_ONGOING; 233 kbt->end = KBT_ONGOING;
282 kbt->new_context = 0; 234 kbt->new_context = 1;
283 if (is_current) { 235 if (is_current)
284 HV_PhysAddr pgdir_pa = hv_inquire_context().page_table;
285 if (pgdir_pa == (unsigned long)swapper_pg_dir - PAGE_OFFSET) {
286 /*
287 * Not just an optimization: this also allows
288 * this to work at all before va/pa mappings
289 * are set up.
290 */
291 kbt->pgtable = swapper_pg_dir;
292 } else {
293 struct page *page = pfn_to_page(PFN_DOWN(pgdir_pa));
294 if (!PageHighMem(page))
295 kbt->pgtable = __va(pgdir_pa);
296 else
297 pr_err("page table not in LOWMEM"
298 " (%#llx)\n", pgdir_pa);
299 }
300 local_flush_tlb_all();
301 validate_stack(regs); 236 validate_stack(regs);
302 }
303 237
304 if (regs == NULL) { 238 if (regs == NULL) {
305 if (is_current || t->state == TASK_RUNNING) { 239 if (is_current || t->state == TASK_RUNNING) {
@@ -345,6 +279,78 @@ void KBacktraceIterator_next(struct KBacktraceIterator *kbt)
345} 279}
346EXPORT_SYMBOL(KBacktraceIterator_next); 280EXPORT_SYMBOL(KBacktraceIterator_next);
347 281
282static void describe_addr(struct KBacktraceIterator *kbt,
283 unsigned long address,
284 int have_mmap_sem, char *buf, size_t bufsize)
285{
286 struct vm_area_struct *vma;
287 size_t namelen, remaining;
288 unsigned long size, offset, adjust;
289 char *p, *modname;
290 const char *name;
291 int rc;
292
293 /*
294 * Look one byte back for every caller frame (i.e. those that
295 * aren't a new context) so we look up symbol data for the
296 * call itself, not the following instruction, which may be on
297 * a different line (or in a different function).
298 */
299 adjust = !kbt->new_context;
300 address -= adjust;
301
302 if (address >= PAGE_OFFSET) {
303 /* Handle kernel symbols. */
304 BUG_ON(bufsize < KSYM_NAME_LEN);
305 name = kallsyms_lookup(address, &size, &offset,
306 &modname, buf);
307 if (name == NULL) {
308 buf[0] = '\0';
309 return;
310 }
311 namelen = strlen(buf);
312 remaining = (bufsize - 1) - namelen;
313 p = buf + namelen;
314 rc = snprintf(p, remaining, "+%#lx/%#lx ",
315 offset + adjust, size);
316 if (modname && rc < remaining)
317 snprintf(p + rc, remaining - rc, "[%s] ", modname);
318 buf[bufsize-1] = '\0';
319 return;
320 }
321
322 /* If we don't have the mmap_sem, we can't show any more info. */
323 buf[0] = '\0';
324 if (!have_mmap_sem)
325 return;
326
327 /* Find vma info. */
328 vma = find_vma(kbt->task->mm, address);
329 if (vma == NULL || address < vma->vm_start) {
330 snprintf(buf, bufsize, "[unmapped address] ");
331 return;
332 }
333
334 if (vma->vm_file) {
335 char *s;
336 p = d_path(&vma->vm_file->f_path, buf, bufsize);
337 if (IS_ERR(p))
338 p = "?";
339 s = strrchr(p, '/');
340 if (s)
341 p = s+1;
342 } else {
343 p = "anon";
344 }
345
346 /* Generate a string description of the vma info. */
347 namelen = strlen(p);
348 remaining = (bufsize - 1) - namelen;
349 memmove(buf, p, namelen);
350 snprintf(buf + namelen, remaining, "[%lx+%lx] ",
351 vma->vm_start, vma->vm_end - vma->vm_start);
352}
353
348/* 354/*
349 * This method wraps the backtracer's more generic support. 355 * This method wraps the backtracer's more generic support.
350 * It is only invoked from the architecture-specific code; show_stack() 356 * It is only invoked from the architecture-specific code; show_stack()
@@ -353,6 +359,7 @@ EXPORT_SYMBOL(KBacktraceIterator_next);
353void tile_show_stack(struct KBacktraceIterator *kbt, int headers) 359void tile_show_stack(struct KBacktraceIterator *kbt, int headers)
354{ 360{
355 int i; 361 int i;
362 int have_mmap_sem = 0;
356 363
357 if (headers) { 364 if (headers) {
358 /* 365 /*
@@ -369,31 +376,16 @@ void tile_show_stack(struct KBacktraceIterator *kbt, int headers)
369 kbt->verbose = 1; 376 kbt->verbose = 1;
370 i = 0; 377 i = 0;
371 for (; !KBacktraceIterator_end(kbt); KBacktraceIterator_next(kbt)) { 378 for (; !KBacktraceIterator_end(kbt); KBacktraceIterator_next(kbt)) {
372 char *modname;
373 const char *name;
374 unsigned long address = kbt->it.pc;
375 unsigned long offset, size;
376 char namebuf[KSYM_NAME_LEN+100]; 379 char namebuf[KSYM_NAME_LEN+100];
380 unsigned long address = kbt->it.pc;
377 381
378 if (address >= PAGE_OFFSET) 382 /* Try to acquire the mmap_sem as we pass into userspace. */
379 name = kallsyms_lookup(address, &size, &offset, 383 if (address < PAGE_OFFSET && !have_mmap_sem && kbt->task->mm)
380 &modname, namebuf); 384 have_mmap_sem =
381 else 385 down_read_trylock(&kbt->task->mm->mmap_sem);
382 name = NULL; 386
383 387 describe_addr(kbt, address, have_mmap_sem,
384 if (!name) 388 namebuf, sizeof(namebuf));
385 namebuf[0] = '\0';
386 else {
387 size_t namelen = strlen(namebuf);
388 size_t remaining = (sizeof(namebuf) - 1) - namelen;
389 char *p = namebuf + namelen;
390 int rc = snprintf(p, remaining, "+%#lx/%#lx ",
391 offset, size);
392 if (modname && rc < remaining)
393 snprintf(p + rc, remaining - rc,
394 "[%s] ", modname);
395 namebuf[sizeof(namebuf)-1] = '\0';
396 }
397 389
398 pr_err(" frame %d: 0x%lx %s(sp 0x%lx)\n", 390 pr_err(" frame %d: 0x%lx %s(sp 0x%lx)\n",
399 i++, address, namebuf, (unsigned long)(kbt->it.sp)); 391 i++, address, namebuf, (unsigned long)(kbt->it.sp));
@@ -408,6 +400,8 @@ void tile_show_stack(struct KBacktraceIterator *kbt, int headers)
408 pr_err("Stack dump stopped; next frame identical to this one\n"); 400 pr_err("Stack dump stopped; next frame identical to this one\n");
409 if (headers) 401 if (headers)
410 pr_err("Stack dump complete\n"); 402 pr_err("Stack dump complete\n");
403 if (have_mmap_sem)
404 up_read(&kbt->task->mm->mmap_sem);
411} 405}
412EXPORT_SYMBOL(tile_show_stack); 406EXPORT_SYMBOL(tile_show_stack);
413 407
diff --git a/arch/tile/kernel/traps.c b/arch/tile/kernel/traps.c
index 2bb6602a1ee7..73cff814ac57 100644
--- a/arch/tile/kernel/traps.c
+++ b/arch/tile/kernel/traps.c
@@ -200,7 +200,7 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
200{ 200{
201 siginfo_t info = { 0 }; 201 siginfo_t info = { 0 };
202 int signo, code; 202 int signo, code;
203 unsigned long address; 203 unsigned long address = 0;
204 bundle_bits instr; 204 bundle_bits instr;
205 205
206 /* Re-enable interrupts. */ 206 /* Re-enable interrupts. */
@@ -223,6 +223,10 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
223 } 223 }
224 224
225 switch (fault_num) { 225 switch (fault_num) {
226 case INT_MEM_ERROR:
227 signo = SIGBUS;
228 code = BUS_OBJERR;
229 break;
226 case INT_ILL: 230 case INT_ILL:
227 if (copy_from_user(&instr, (void __user *)regs->pc, 231 if (copy_from_user(&instr, (void __user *)regs->pc,
228 sizeof(instr))) { 232 sizeof(instr))) {
@@ -289,7 +293,10 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
289 address = regs->pc; 293 address = regs->pc;
290 break; 294 break;
291#ifdef __tilegx__ 295#ifdef __tilegx__
292 case INT_ILL_TRANS: 296 case INT_ILL_TRANS: {
297 /* Avoid a hardware erratum with the return address stack. */
298 fill_ra_stack();
299
293 signo = SIGSEGV; 300 signo = SIGSEGV;
294 code = SEGV_MAPERR; 301 code = SEGV_MAPERR;
295 if (reason & SPR_ILL_TRANS_REASON__I_STREAM_VA_RMASK) 302 if (reason & SPR_ILL_TRANS_REASON__I_STREAM_VA_RMASK)
@@ -297,6 +304,7 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
297 else 304 else
298 address = 0; /* FIXME: GX: single-step for address */ 305 address = 0; /* FIXME: GX: single-step for address */
299 break; 306 break;
307 }
300#endif 308#endif
301 default: 309 default:
302 panic("Unexpected do_trap interrupt number %d", fault_num); 310 panic("Unexpected do_trap interrupt number %d", fault_num);
@@ -308,7 +316,8 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
308 info.si_addr = (void __user *)address; 316 info.si_addr = (void __user *)address;
309 if (signo == SIGILL) 317 if (signo == SIGILL)
310 info.si_trapno = fault_num; 318 info.si_trapno = fault_num;
311 trace_unhandled_signal("trap", regs, address, signo); 319 if (signo != SIGTRAP)
320 trace_unhandled_signal("trap", regs, address, signo);
312 force_sig_info(signo, &info, current); 321 force_sig_info(signo, &info, current);
313} 322}
314 323
diff --git a/arch/tile/lib/Makefile b/arch/tile/lib/Makefile
index 0c26086ecbef..985f59858234 100644
--- a/arch/tile/lib/Makefile
+++ b/arch/tile/lib/Makefile
@@ -7,6 +7,7 @@ lib-y = cacheflush.o checksum.o cpumask.o delay.o uaccess.o \
7 strchr_$(BITS).o strlen_$(BITS).o 7 strchr_$(BITS).o strlen_$(BITS).o
8 8
9ifeq ($(CONFIG_TILEGX),y) 9ifeq ($(CONFIG_TILEGX),y)
10CFLAGS_REMOVE_memcpy_user_64.o = -fno-omit-frame-pointer
10lib-y += memcpy_user_64.o 11lib-y += memcpy_user_64.o
11else 12else
12lib-y += atomic_32.o atomic_asm_32.o memcpy_tile64.o 13lib-y += atomic_32.o atomic_asm_32.o memcpy_tile64.o
diff --git a/arch/tile/lib/cacheflush.c b/arch/tile/lib/cacheflush.c
index 8928aace7a64..db4fb89e12d8 100644
--- a/arch/tile/lib/cacheflush.c
+++ b/arch/tile/lib/cacheflush.c
@@ -39,7 +39,21 @@ void finv_buffer_remote(void *buffer, size_t size, int hfh)
39{ 39{
40 char *p, *base; 40 char *p, *base;
41 size_t step_size, load_count; 41 size_t step_size, load_count;
42
43 /*
44 * On TILEPro the striping granularity is a fixed 8KB; on
45 * TILE-Gx it is configurable, and we rely on the fact that
46 * the hypervisor always configures maximum striping, so that
47 * bits 9 and 10 of the PA are part of the stripe function, so
48 * every 512 bytes we hit a striping boundary.
49 *
50 */
51#ifdef __tilegx__
52 const unsigned long STRIPE_WIDTH = 512;
53#else
42 const unsigned long STRIPE_WIDTH = 8192; 54 const unsigned long STRIPE_WIDTH = 8192;
55#endif
56
43#ifdef __tilegx__ 57#ifdef __tilegx__
44 /* 58 /*
45 * On TILE-Gx, we must disable the dstream prefetcher before doing 59 * On TILE-Gx, we must disable the dstream prefetcher before doing
@@ -74,7 +88,7 @@ void finv_buffer_remote(void *buffer, size_t size, int hfh)
74 * memory, that one load would be sufficient, but since we may 88 * memory, that one load would be sufficient, but since we may
75 * be, we also need to back up to the last load issued to 89 * be, we also need to back up to the last load issued to
76 * another memory controller, which would be the point where 90 * another memory controller, which would be the point where
77 * we crossed an 8KB boundary (the granularity of striping 91 * we crossed a "striping" boundary (the granularity of striping
78 * across memory controllers). Keep backing up and doing this 92 * across memory controllers). Keep backing up and doing this
79 * until we are before the beginning of the buffer, or have 93 * until we are before the beginning of the buffer, or have
80 * hit all the controllers. 94 * hit all the controllers.
@@ -88,12 +102,22 @@ void finv_buffer_remote(void *buffer, size_t size, int hfh)
88 * every cache line on a full memory stripe on each 102 * every cache line on a full memory stripe on each
89 * controller" that we simply do that, to simplify the logic. 103 * controller" that we simply do that, to simplify the logic.
90 * 104 *
91 * FIXME: See bug 9535 for some issues with this code. 105 * On TILE-Gx the hash-for-home function is much more complex,
106 * with the upshot being we can't readily guarantee we have
107 * hit both entries in the 128-entry AMT that were hit by any
108 * load in the entire range, so we just re-load them all.
109 * With larger buffers, we may want to consider using a hypervisor
110 * trap to issue loads directly to each hash-for-home tile for
111 * each controller (doing it from Linux would trash the TLB).
92 */ 112 */
93 if (hfh) { 113 if (hfh) {
94 step_size = L2_CACHE_BYTES; 114 step_size = L2_CACHE_BYTES;
115#ifdef __tilegx__
116 load_count = (size + L2_CACHE_BYTES - 1) / L2_CACHE_BYTES;
117#else
95 load_count = (STRIPE_WIDTH / L2_CACHE_BYTES) * 118 load_count = (STRIPE_WIDTH / L2_CACHE_BYTES) *
96 (1 << CHIP_LOG_NUM_MSHIMS()); 119 (1 << CHIP_LOG_NUM_MSHIMS());
120#endif
97 } else { 121 } else {
98 step_size = STRIPE_WIDTH; 122 step_size = STRIPE_WIDTH;
99 load_count = (1 << CHIP_LOG_NUM_MSHIMS()); 123 load_count = (1 << CHIP_LOG_NUM_MSHIMS());
@@ -109,7 +133,7 @@ void finv_buffer_remote(void *buffer, size_t size, int hfh)
109 133
110 /* Figure out how far back we need to go. */ 134 /* Figure out how far back we need to go. */
111 base = p - (step_size * (load_count - 2)); 135 base = p - (step_size * (load_count - 2));
112 if ((long)base < (long)buffer) 136 if ((unsigned long)base < (unsigned long)buffer)
113 base = buffer; 137 base = buffer;
114 138
115 /* 139 /*
diff --git a/arch/tile/lib/memcpy_user_64.c b/arch/tile/lib/memcpy_user_64.c
index 4763b3aff1cc..37440caa7370 100644
--- a/arch/tile/lib/memcpy_user_64.c
+++ b/arch/tile/lib/memcpy_user_64.c
@@ -14,7 +14,13 @@
14 * Do memcpy(), but trap and return "n" when a load or store faults. 14 * Do memcpy(), but trap and return "n" when a load or store faults.
15 * 15 *
16 * Note: this idiom only works when memcpy() compiles to a leaf function. 16 * Note: this idiom only works when memcpy() compiles to a leaf function.
17 * If "sp" is updated during memcpy, the "jrp lr" will be incorrect. 17 * Here leaf function not only means it does not have calls, but also
18 * requires no stack operations (sp, stack frame pointer) and no
19 * use of callee-saved registers, else "jrp lr" will be incorrect since
20 * unwinding stack frame is bypassed. Since memcpy() is not complex so
21 * these conditions are satisfied here, but we need to be careful when
22 * modifying this file. This is not a clean solution but is the best
23 * one so far.
18 * 24 *
19 * Also note that we are capturing "n" from the containing scope here. 25 * Also note that we are capturing "n" from the containing scope here.
20 */ 26 */
diff --git a/arch/tile/lib/spinlock_common.h b/arch/tile/lib/spinlock_common.h
index c10109809132..6ac37509faca 100644
--- a/arch/tile/lib/spinlock_common.h
+++ b/arch/tile/lib/spinlock_common.h
@@ -60,5 +60,5 @@ static void delay_backoff(int iterations)
60 loops += __insn_crc32_32(stack_pointer, get_cycles_low()) & 60 loops += __insn_crc32_32(stack_pointer, get_cycles_low()) &
61 (loops - 1); 61 (loops - 1);
62 62
63 relax(1 << exponent); 63 relax(loops);
64} 64}
diff --git a/arch/tile/mm/fault.c b/arch/tile/mm/fault.c
index cba30e9547b4..22e58f51ed23 100644
--- a/arch/tile/mm/fault.c
+++ b/arch/tile/mm/fault.c
@@ -130,7 +130,7 @@ static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
130} 130}
131 131
132/* 132/*
133 * Handle a fault on the vmalloc or module mapping area 133 * Handle a fault on the vmalloc area.
134 */ 134 */
135static inline int vmalloc_fault(pgd_t *pgd, unsigned long address) 135static inline int vmalloc_fault(pgd_t *pgd, unsigned long address)
136{ 136{
@@ -203,9 +203,14 @@ static pgd_t *get_current_pgd(void)
203 * interrupt or a critical region, and must do as little as possible. 203 * interrupt or a critical region, and must do as little as possible.
204 * Similarly, we can't use atomic ops here, since we may be handling a 204 * Similarly, we can't use atomic ops here, since we may be handling a
205 * fault caused by an atomic op access. 205 * fault caused by an atomic op access.
206 *
207 * If we find a migrating PTE while we're in an NMI context, and we're
208 * at a PC that has a registered exception handler, we don't wait,
209 * since this thread may (e.g.) have been interrupted while migrating
210 * its own stack, which would then cause us to self-deadlock.
206 */ 211 */
207static int handle_migrating_pte(pgd_t *pgd, int fault_num, 212static int handle_migrating_pte(pgd_t *pgd, int fault_num,
208 unsigned long address, 213 unsigned long address, unsigned long pc,
209 int is_kernel_mode, int write) 214 int is_kernel_mode, int write)
210{ 215{
211 pud_t *pud; 216 pud_t *pud;
@@ -227,6 +232,8 @@ static int handle_migrating_pte(pgd_t *pgd, int fault_num,
227 pte_offset_kernel(pmd, address); 232 pte_offset_kernel(pmd, address);
228 pteval = *pte; 233 pteval = *pte;
229 if (pte_migrating(pteval)) { 234 if (pte_migrating(pteval)) {
235 if (in_nmi() && search_exception_tables(pc))
236 return 0;
230 wait_for_migration(pte); 237 wait_for_migration(pte);
231 return 1; 238 return 1;
232 } 239 }
@@ -300,7 +307,7 @@ static int handle_page_fault(struct pt_regs *regs,
300 * rather than trying to patch up the existing PTE. 307 * rather than trying to patch up the existing PTE.
301 */ 308 */
302 pgd = get_current_pgd(); 309 pgd = get_current_pgd();
303 if (handle_migrating_pte(pgd, fault_num, address, 310 if (handle_migrating_pte(pgd, fault_num, address, regs->pc,
304 is_kernel_mode, write)) 311 is_kernel_mode, write))
305 return 1; 312 return 1;
306 313
@@ -335,9 +342,12 @@ static int handle_page_fault(struct pt_regs *regs,
335 /* 342 /*
336 * If we're trying to touch user-space addresses, we must 343 * If we're trying to touch user-space addresses, we must
337 * be either at PL0, or else with interrupts enabled in the 344 * be either at PL0, or else with interrupts enabled in the
338 * kernel, so either way we can re-enable interrupts here. 345 * kernel, so either way we can re-enable interrupts here
346 * unless we are doing atomic access to user space with
347 * interrupts disabled.
339 */ 348 */
340 local_irq_enable(); 349 if (!(regs->flags & PT_FLAGS_DISABLE_IRQ))
350 local_irq_enable();
341 351
342 mm = tsk->mm; 352 mm = tsk->mm;
343 353
@@ -665,7 +675,7 @@ struct intvec_state do_page_fault_ics(struct pt_regs *regs, int fault_num,
665 */ 675 */
666 if (fault_num == INT_DTLB_ACCESS) 676 if (fault_num == INT_DTLB_ACCESS)
667 write = 1; 677 write = 1;
668 if (handle_migrating_pte(pgd, fault_num, address, 1, write)) 678 if (handle_migrating_pte(pgd, fault_num, address, pc, 1, write))
669 return state; 679 return state;
670 680
671 /* Return zero so that we continue on with normal fault handling. */ 681 /* Return zero so that we continue on with normal fault handling. */
diff --git a/arch/tile/mm/homecache.c b/arch/tile/mm/homecache.c
index 1cc6ae477c98..499f73770b05 100644
--- a/arch/tile/mm/homecache.c
+++ b/arch/tile/mm/homecache.c
@@ -394,6 +394,7 @@ int page_home(struct page *page)
394 return pte_to_home(*virt_to_pte(NULL, kva)); 394 return pte_to_home(*virt_to_pte(NULL, kva));
395 } 395 }
396} 396}
397EXPORT_SYMBOL(page_home);
397 398
398void homecache_change_page_home(struct page *page, int order, int home) 399void homecache_change_page_home(struct page *page, int order, int home)
399{ 400{
diff --git a/arch/tile/mm/init.c b/arch/tile/mm/init.c
index 830c4908ea76..6a9d20ddc34f 100644
--- a/arch/tile/mm/init.c
+++ b/arch/tile/mm/init.c
@@ -254,11 +254,6 @@ static pgprot_t __init init_pgprot(ulong address)
254 return construct_pgprot(PAGE_KERNEL_RO, PAGE_HOME_IMMUTABLE); 254 return construct_pgprot(PAGE_KERNEL_RO, PAGE_HOME_IMMUTABLE);
255 } 255 }
256 256
257 /* As a performance optimization, keep the boot init stack here. */
258 if (address >= (ulong)&init_thread_union &&
259 address < (ulong)&init_thread_union + THREAD_SIZE)
260 return construct_pgprot(PAGE_KERNEL, smp_processor_id());
261
262#ifndef __tilegx__ 257#ifndef __tilegx__
263#if !ATOMIC_LOCKS_FOUND_VIA_TABLE() 258#if !ATOMIC_LOCKS_FOUND_VIA_TABLE()
264 /* Force the atomic_locks[] array page to be hash-for-home. */ 259 /* Force the atomic_locks[] array page to be hash-for-home. */
@@ -557,6 +552,7 @@ static void __init kernel_physical_mapping_init(pgd_t *pgd_base)
557 552
558 address = MEM_SV_INTRPT; 553 address = MEM_SV_INTRPT;
559 pmd = get_pmd(pgtables, address); 554 pmd = get_pmd(pgtables, address);
555 pfn = 0; /* code starts at PA 0 */
560 if (ktext_small) { 556 if (ktext_small) {
561 /* Allocate an L2 PTE for the kernel text */ 557 /* Allocate an L2 PTE for the kernel text */
562 int cpu = 0; 558 int cpu = 0;
@@ -579,10 +575,15 @@ static void __init kernel_physical_mapping_init(pgd_t *pgd_base)
579 } 575 }
580 576
581 BUG_ON(address != (unsigned long)_stext); 577 BUG_ON(address != (unsigned long)_stext);
582 pfn = 0; /* code starts at PA 0 */ 578 pte = NULL;
583 pte = alloc_pte(); 579 for (; address < (unsigned long)_einittext;
584 for (pte_ofs = 0; address < (unsigned long)_einittext; 580 pfn++, address += PAGE_SIZE) {
585 pfn++, pte_ofs++, address += PAGE_SIZE) { 581 pte_ofs = pte_index(address);
582 if (pte_ofs == 0) {
583 if (pte)
584 assign_pte(pmd++, pte);
585 pte = alloc_pte();
586 }
586 if (!ktext_local) { 587 if (!ktext_local) {
587 prot = set_remote_cache_cpu(prot, cpu); 588 prot = set_remote_cache_cpu(prot, cpu);
588 cpu = cpumask_next(cpu, &ktext_mask); 589 cpu = cpumask_next(cpu, &ktext_mask);
@@ -591,7 +592,8 @@ static void __init kernel_physical_mapping_init(pgd_t *pgd_base)
591 } 592 }
592 pte[pte_ofs] = pfn_pte(pfn, prot); 593 pte[pte_ofs] = pfn_pte(pfn, prot);
593 } 594 }
594 assign_pte(pmd, pte); 595 if (pte)
596 assign_pte(pmd, pte);
595 } else { 597 } else {
596 pte_t pteval = pfn_pte(0, PAGE_KERNEL_EXEC); 598 pte_t pteval = pfn_pte(0, PAGE_KERNEL_EXEC);
597 pteval = pte_mkhuge(pteval); 599 pteval = pte_mkhuge(pteval);
@@ -614,7 +616,9 @@ static void __init kernel_physical_mapping_init(pgd_t *pgd_base)
614 else 616 else
615 pteval = hv_pte_set_mode(pteval, 617 pteval = hv_pte_set_mode(pteval,
616 HV_PTE_MODE_CACHE_NO_L3); 618 HV_PTE_MODE_CACHE_NO_L3);
617 *(pte_t *)pmd = pteval; 619 for (; address < (unsigned long)_einittext;
620 pfn += PFN_DOWN(HPAGE_SIZE), address += HPAGE_SIZE)
621 *(pte_t *)(pmd++) = pfn_pte(pfn, pteval);
618 } 622 }
619 623
620 /* Set swapper_pgprot here so it is flushed to memory right away. */ 624 /* Set swapper_pgprot here so it is flushed to memory right away. */
diff --git a/arch/tile/mm/pgtable.c b/arch/tile/mm/pgtable.c
index 87303693a072..2410aa899b3e 100644
--- a/arch/tile/mm/pgtable.c
+++ b/arch/tile/mm/pgtable.c
@@ -177,14 +177,10 @@ void shatter_huge_page(unsigned long addr)
177 if (!pmd_huge_page(*pmd)) 177 if (!pmd_huge_page(*pmd))
178 return; 178 return;
179 179
180 /* 180 spin_lock_irqsave(&init_mm.page_table_lock, flags);
181 * Grab the pgd_lock, since we may need it to walk the pgd_list,
182 * and since we need some kind of lock here to avoid races.
183 */
184 spin_lock_irqsave(&pgd_lock, flags);
185 if (!pmd_huge_page(*pmd)) { 181 if (!pmd_huge_page(*pmd)) {
186 /* Lost the race to convert the huge page. */ 182 /* Lost the race to convert the huge page. */
187 spin_unlock_irqrestore(&pgd_lock, flags); 183 spin_unlock_irqrestore(&init_mm.page_table_lock, flags);
188 return; 184 return;
189 } 185 }
190 186
@@ -194,6 +190,7 @@ void shatter_huge_page(unsigned long addr)
194 190
195#ifdef __PAGETABLE_PMD_FOLDED 191#ifdef __PAGETABLE_PMD_FOLDED
196 /* Walk every pgd on the system and update the pmd there. */ 192 /* Walk every pgd on the system and update the pmd there. */
193 spin_lock(&pgd_lock);
197 list_for_each(pos, &pgd_list) { 194 list_for_each(pos, &pgd_list) {
198 pmd_t *copy_pmd; 195 pmd_t *copy_pmd;
199 pgd = list_to_pgd(pos) + pgd_index(addr); 196 pgd = list_to_pgd(pos) + pgd_index(addr);
@@ -201,6 +198,7 @@ void shatter_huge_page(unsigned long addr)
201 copy_pmd = pmd_offset(pud, addr); 198 copy_pmd = pmd_offset(pud, addr);
202 __set_pmd(copy_pmd, *pmd); 199 __set_pmd(copy_pmd, *pmd);
203 } 200 }
201 spin_unlock(&pgd_lock);
204#endif 202#endif
205 203
206 /* Tell every cpu to notice the change. */ 204 /* Tell every cpu to notice the change. */
@@ -208,7 +206,7 @@ void shatter_huge_page(unsigned long addr)
208 cpu_possible_mask, NULL, 0); 206 cpu_possible_mask, NULL, 0);
209 207
210 /* Hold the lock until the TLB flush is finished to avoid races. */ 208 /* Hold the lock until the TLB flush is finished to avoid races. */
211 spin_unlock_irqrestore(&pgd_lock, flags); 209 spin_unlock_irqrestore(&init_mm.page_table_lock, flags);
212} 210}
213 211
214/* 212/*
@@ -217,9 +215,13 @@ void shatter_huge_page(unsigned long addr)
217 * against pageattr.c; it is the unique case in which a valid change 215 * against pageattr.c; it is the unique case in which a valid change
218 * of kernel pagetables can't be lazily synchronized by vmalloc faults. 216 * of kernel pagetables can't be lazily synchronized by vmalloc faults.
219 * vmalloc faults work because attached pagetables are never freed. 217 * vmalloc faults work because attached pagetables are never freed.
220 * The locking scheme was chosen on the basis of manfred's 218 *
221 * recommendations and having no core impact whatsoever. 219 * The lock is always taken with interrupts disabled, unlike on x86
222 * -- wli 220 * and other platforms, because we need to take the lock in
221 * shatter_huge_page(), which may be called from an interrupt context.
222 * We are not at risk from the tlbflush IPI deadlock that was seen on
223 * x86, since we use the flush_remote() API to have the hypervisor do
224 * the TLB flushes regardless of irq disabling.
223 */ 225 */
224DEFINE_SPINLOCK(pgd_lock); 226DEFINE_SPINLOCK(pgd_lock);
225LIST_HEAD(pgd_list); 227LIST_HEAD(pgd_list);
@@ -469,10 +471,18 @@ void __set_pte(pte_t *ptep, pte_t pte)
469 471
470void set_pte(pte_t *ptep, pte_t pte) 472void set_pte(pte_t *ptep, pte_t pte)
471{ 473{
472 struct page *page = pfn_to_page(pte_pfn(pte)); 474 if (pte_present(pte) &&
473 475 (!CHIP_HAS_MMIO() || hv_pte_get_mode(pte) != HV_PTE_MODE_MMIO)) {
474 /* Update the home of a PTE if necessary */ 476 /* The PTE actually references physical memory. */
475 pte = pte_set_home(pte, page_home(page)); 477 unsigned long pfn = pte_pfn(pte);
478 if (pfn_valid(pfn)) {
479 /* Update the home of the PTE from the struct page. */
480 pte = pte_set_home(pte, page_home(pfn_to_page(pfn)));
481 } else if (hv_pte_get_mode(pte) == 0) {
482 /* remap_pfn_range(), etc, must supply PTE mode. */
483 panic("set_pte(): out-of-range PFN and mode 0\n");
484 }
485 }
476 486
477 __set_pte(ptep, pte); 487 __set_pte(ptep, pte);
478} 488}
diff --git a/arch/um/drivers/cow.h b/arch/um/drivers/cow.h
index dc36b222100b..6673508f3426 100644
--- a/arch/um/drivers/cow.h
+++ b/arch/um/drivers/cow.h
@@ -3,41 +3,6 @@
3 3
4#include <asm/types.h> 4#include <asm/types.h>
5 5
6#if defined(__KERNEL__)
7
8# include <asm/byteorder.h>
9
10# if defined(__BIG_ENDIAN)
11# define ntohll(x) (x)
12# define htonll(x) (x)
13# elif defined(__LITTLE_ENDIAN)
14# define ntohll(x) be64_to_cpu(x)
15# define htonll(x) cpu_to_be64(x)
16# else
17# error "Could not determine byte order"
18# endif
19
20#else
21/* For the definition of ntohl, htonl and __BYTE_ORDER */
22#include <endian.h>
23#include <netinet/in.h>
24#if defined(__BYTE_ORDER)
25
26# if __BYTE_ORDER == __BIG_ENDIAN
27# define ntohll(x) (x)
28# define htonll(x) (x)
29# elif __BYTE_ORDER == __LITTLE_ENDIAN
30# define ntohll(x) bswap_64(x)
31# define htonll(x) bswap_64(x)
32# else
33# error "Could not determine byte order: __BYTE_ORDER uncorrectly defined"
34# endif
35
36#else /* ! defined(__BYTE_ORDER) */
37# error "Could not determine byte order: __BYTE_ORDER not defined"
38#endif
39#endif /* ! defined(__KERNEL__) */
40
41extern int init_cow_file(int fd, char *cow_file, char *backing_file, 6extern int init_cow_file(int fd, char *cow_file, char *backing_file,
42 int sectorsize, int alignment, int *bitmap_offset_out, 7 int sectorsize, int alignment, int *bitmap_offset_out,
43 unsigned long *bitmap_len_out, int *data_offset_out); 8 unsigned long *bitmap_len_out, int *data_offset_out);
diff --git a/arch/um/drivers/cow_user.c b/arch/um/drivers/cow_user.c
index 9cbb426c0b91..0ee9cc6cc4c7 100644
--- a/arch/um/drivers/cow_user.c
+++ b/arch/um/drivers/cow_user.c
@@ -8,11 +8,10 @@
8 * that. 8 * that.
9 */ 9 */
10#include <unistd.h> 10#include <unistd.h>
11#include <byteswap.h>
12#include <errno.h> 11#include <errno.h>
13#include <string.h> 12#include <string.h>
14#include <arpa/inet.h> 13#include <arpa/inet.h>
15#include <asm/types.h> 14#include <endian.h>
16#include "cow.h" 15#include "cow.h"
17#include "cow_sys.h" 16#include "cow_sys.h"
18 17
@@ -214,8 +213,8 @@ int write_cow_header(char *cow_file, int fd, char *backing_file,
214 "header\n"); 213 "header\n");
215 goto out; 214 goto out;
216 } 215 }
217 header->magic = htonl(COW_MAGIC); 216 header->magic = htobe32(COW_MAGIC);
218 header->version = htonl(COW_VERSION); 217 header->version = htobe32(COW_VERSION);
219 218
220 err = -EINVAL; 219 err = -EINVAL;
221 if (strlen(backing_file) > sizeof(header->backing_file) - 1) { 220 if (strlen(backing_file) > sizeof(header->backing_file) - 1) {
@@ -246,10 +245,10 @@ int write_cow_header(char *cow_file, int fd, char *backing_file,
246 goto out_free; 245 goto out_free;
247 } 246 }
248 247
249 header->mtime = htonl(modtime); 248 header->mtime = htobe32(modtime);
250 header->size = htonll(*size); 249 header->size = htobe64(*size);
251 header->sectorsize = htonl(sectorsize); 250 header->sectorsize = htobe32(sectorsize);
252 header->alignment = htonl(alignment); 251 header->alignment = htobe32(alignment);
253 header->cow_format = COW_BITMAP; 252 header->cow_format = COW_BITMAP;
254 253
255 err = cow_write_file(fd, header, sizeof(*header)); 254 err = cow_write_file(fd, header, sizeof(*header));
@@ -301,8 +300,8 @@ int read_cow_header(int (*reader)(__u64, char *, int, void *), void *arg,
301 magic = header->v1.magic; 300 magic = header->v1.magic;
302 if (magic == COW_MAGIC) 301 if (magic == COW_MAGIC)
303 version = header->v1.version; 302 version = header->v1.version;
304 else if (magic == ntohl(COW_MAGIC)) 303 else if (magic == be32toh(COW_MAGIC))
305 version = ntohl(header->v1.version); 304 version = be32toh(header->v1.version);
306 /* No error printed because the non-COW case comes through here */ 305 /* No error printed because the non-COW case comes through here */
307 else goto out; 306 else goto out;
308 307
@@ -327,9 +326,9 @@ int read_cow_header(int (*reader)(__u64, char *, int, void *), void *arg,
327 "header\n"); 326 "header\n");
328 goto out; 327 goto out;
329 } 328 }
330 *mtime_out = ntohl(header->v2.mtime); 329 *mtime_out = be32toh(header->v2.mtime);
331 *size_out = ntohll(header->v2.size); 330 *size_out = be64toh(header->v2.size);
332 *sectorsize_out = ntohl(header->v2.sectorsize); 331 *sectorsize_out = be32toh(header->v2.sectorsize);
333 *bitmap_offset_out = sizeof(header->v2); 332 *bitmap_offset_out = sizeof(header->v2);
334 *align_out = *sectorsize_out; 333 *align_out = *sectorsize_out;
335 file = header->v2.backing_file; 334 file = header->v2.backing_file;
@@ -341,10 +340,10 @@ int read_cow_header(int (*reader)(__u64, char *, int, void *), void *arg,
341 "header\n"); 340 "header\n");
342 goto out; 341 goto out;
343 } 342 }
344 *mtime_out = ntohl(header->v3.mtime); 343 *mtime_out = be32toh(header->v3.mtime);
345 *size_out = ntohll(header->v3.size); 344 *size_out = be64toh(header->v3.size);
346 *sectorsize_out = ntohl(header->v3.sectorsize); 345 *sectorsize_out = be32toh(header->v3.sectorsize);
347 *align_out = ntohl(header->v3.alignment); 346 *align_out = be32toh(header->v3.alignment);
348 if (*align_out == 0) { 347 if (*align_out == 0) {
349 cow_printf("read_cow_header - invalid COW header, " 348 cow_printf("read_cow_header - invalid COW header, "
350 "align == 0\n"); 349 "align == 0\n");
@@ -366,16 +365,16 @@ int read_cow_header(int (*reader)(__u64, char *, int, void *), void *arg,
366 * this was used until Dec2005 - 64bits are needed to represent 365 * this was used until Dec2005 - 64bits are needed to represent
367 * 2038+. I.e. we can safely do this truncating cast. 366 * 2038+. I.e. we can safely do this truncating cast.
368 * 367 *
369 * Additionally, we must use ntohl() instead of ntohll(), since 368 * Additionally, we must use be32toh() instead of be64toh(), since
370 * the program used to use the former (tested - I got mtime 369 * the program used to use the former (tested - I got mtime
371 * mismatch "0 vs whatever"). 370 * mismatch "0 vs whatever").
372 * 371 *
373 * Ever heard about bug-to-bug-compatibility ? ;-) */ 372 * Ever heard about bug-to-bug-compatibility ? ;-) */
374 *mtime_out = (time32_t) ntohl(header->v3_b.mtime); 373 *mtime_out = (time32_t) be32toh(header->v3_b.mtime);
375 374
376 *size_out = ntohll(header->v3_b.size); 375 *size_out = be64toh(header->v3_b.size);
377 *sectorsize_out = ntohl(header->v3_b.sectorsize); 376 *sectorsize_out = be32toh(header->v3_b.sectorsize);
378 *align_out = ntohl(header->v3_b.alignment); 377 *align_out = be32toh(header->v3_b.alignment);
379 if (*align_out == 0) { 378 if (*align_out == 0) {
380 cow_printf("read_cow_header - invalid COW header, " 379 cow_printf("read_cow_header - invalid COW header, "
381 "align == 0\n"); 380 "align == 0\n");
diff --git a/arch/um/drivers/mconsole_kern.c b/arch/um/drivers/mconsole_kern.c
index e672bd6d43e3..43b39d61b538 100644
--- a/arch/um/drivers/mconsole_kern.c
+++ b/arch/um/drivers/mconsole_kern.c
@@ -22,6 +22,7 @@
22#include <linux/workqueue.h> 22#include <linux/workqueue.h>
23#include <linux/mutex.h> 23#include <linux/mutex.h>
24#include <asm/uaccess.h> 24#include <asm/uaccess.h>
25#include <asm/switch_to.h>
25 26
26#include "init.h" 27#include "init.h"
27#include "irq_kern.h" 28#include "irq_kern.h"
diff --git a/arch/um/include/asm/Kbuild b/arch/um/include/asm/Kbuild
index 8419f5cf2ac7..fff24352255d 100644
--- a/arch/um/include/asm/Kbuild
+++ b/arch/um/include/asm/Kbuild
@@ -1,3 +1,4 @@
1generic-y += bug.h cputime.h device.h emergency-restart.h futex.h hardirq.h 1generic-y += bug.h cputime.h device.h emergency-restart.h futex.h hardirq.h
2generic-y += hw_irq.h irq_regs.h kdebug.h percpu.h sections.h topology.h xor.h 2generic-y += hw_irq.h irq_regs.h kdebug.h percpu.h sections.h topology.h xor.h
3generic-y += ftrace.h pci.h io.h param.h delay.h mutex.h current.h 3generic-y += ftrace.h pci.h io.h param.h delay.h mutex.h current.h exec.h
4generic-y += switch_to.h
diff --git a/arch/um/kernel/Makefile b/arch/um/kernel/Makefile
index 492bc4c1b62b..65a1c3d690ea 100644
--- a/arch/um/kernel/Makefile
+++ b/arch/um/kernel/Makefile
@@ -3,9 +3,10 @@
3# Licensed under the GPL 3# Licensed under the GPL
4# 4#
5 5
6CPPFLAGS_vmlinux.lds := -DSTART=$(LDS_START) \ 6CPPFLAGS_vmlinux.lds := -DSTART=$(LDS_START) \
7 -DELF_ARCH=$(LDS_ELF_ARCH) \ 7 -DELF_ARCH=$(LDS_ELF_ARCH) \
8 -DELF_FORMAT=$(LDS_ELF_FORMAT) 8 -DELF_FORMAT=$(LDS_ELF_FORMAT) \
9 $(LDS_EXTRA)
9extra-y := vmlinux.lds 10extra-y := vmlinux.lds
10clean-files := 11clean-files :=
11 12
diff --git a/arch/um/kernel/process.c b/arch/um/kernel/process.c
index f386d04a84a5..2b73dedb44ca 100644
--- a/arch/um/kernel/process.c
+++ b/arch/um/kernel/process.c
@@ -88,11 +88,8 @@ static inline void set_current(struct task_struct *task)
88 88
89extern void arch_switch_to(struct task_struct *to); 89extern void arch_switch_to(struct task_struct *to);
90 90
91void *_switch_to(void *prev, void *next, void *last) 91void *__switch_to(struct task_struct *from, struct task_struct *to)
92{ 92{
93 struct task_struct *from = prev;
94 struct task_struct *to = next;
95
96 to->thread.prev_sched = from; 93 to->thread.prev_sched = from;
97 set_current(to); 94 set_current(to);
98 95
@@ -111,7 +108,6 @@ void *_switch_to(void *prev, void *next, void *last)
111 } while (current->thread.saved_task); 108 } while (current->thread.saved_task);
112 109
113 return current->thread.prev_sched; 110 return current->thread.prev_sched;
114
115} 111}
116 112
117void interrupt_end(void) 113void interrupt_end(void)
diff --git a/arch/um/kernel/skas/mmu.c b/arch/um/kernel/skas/mmu.c
index 4947b319f53a..0a49ef0c2bf4 100644
--- a/arch/um/kernel/skas/mmu.c
+++ b/arch/um/kernel/skas/mmu.c
@@ -103,7 +103,6 @@ int init_new_context(struct task_struct *task, struct mm_struct *mm)
103 103
104void uml_setup_stubs(struct mm_struct *mm) 104void uml_setup_stubs(struct mm_struct *mm)
105{ 105{
106 struct page **pages;
107 int err, ret; 106 int err, ret;
108 107
109 if (!skas_needs_stub) 108 if (!skas_needs_stub)
diff --git a/arch/um/kernel/skas/process.c b/arch/um/kernel/skas/process.c
index 2e9852c0d487..0a9e57e7446b 100644
--- a/arch/um/kernel/skas/process.c
+++ b/arch/um/kernel/skas/process.c
@@ -41,7 +41,7 @@ static int __init start_kernel_proc(void *unused)
41 cpu_tasks[0].pid = pid; 41 cpu_tasks[0].pid = pid;
42 cpu_tasks[0].task = current; 42 cpu_tasks[0].task = current;
43#ifdef CONFIG_SMP 43#ifdef CONFIG_SMP
44 cpu_online_map = cpumask_of_cpu(0); 44 init_cpu_online(get_cpu_mask(0));
45#endif 45#endif
46 start_kernel(); 46 start_kernel();
47 return 0; 47 return 0;
diff --git a/arch/um/kernel/smp.c b/arch/um/kernel/smp.c
index 155206a66908..6f588e160fb0 100644
--- a/arch/um/kernel/smp.c
+++ b/arch/um/kernel/smp.c
@@ -76,7 +76,7 @@ static int idle_proc(void *cpup)
76 cpu_relax(); 76 cpu_relax();
77 77
78 notify_cpu_starting(cpu); 78 notify_cpu_starting(cpu);
79 cpu_set(cpu, cpu_online_map); 79 set_cpu_online(cpu, true);
80 default_idle(); 80 default_idle();
81 return 0; 81 return 0;
82} 82}
@@ -110,8 +110,7 @@ void smp_prepare_cpus(unsigned int maxcpus)
110 for (i = 0; i < ncpus; ++i) 110 for (i = 0; i < ncpus; ++i)
111 set_cpu_possible(i, true); 111 set_cpu_possible(i, true);
112 112
113 cpu_clear(me, cpu_online_map); 113 set_cpu_online(me, true);
114 cpu_set(me, cpu_online_map);
115 cpu_set(me, cpu_callin_map); 114 cpu_set(me, cpu_callin_map);
116 115
117 err = os_pipe(cpu_data[me].ipi_pipe, 1, 1); 116 err = os_pipe(cpu_data[me].ipi_pipe, 1, 1);
@@ -138,13 +137,13 @@ void smp_prepare_cpus(unsigned int maxcpus)
138 137
139void smp_prepare_boot_cpu(void) 138void smp_prepare_boot_cpu(void)
140{ 139{
141 cpu_set(smp_processor_id(), cpu_online_map); 140 set_cpu_online(smp_processor_id(), true);
142} 141}
143 142
144int __cpu_up(unsigned int cpu) 143int __cpu_up(unsigned int cpu)
145{ 144{
146 cpu_set(cpu, smp_commenced_mask); 145 cpu_set(cpu, smp_commenced_mask);
147 while (!cpu_isset(cpu, cpu_online_map)) 146 while (!cpu_online(cpu))
148 mb(); 147 mb();
149 return 0; 148 return 0;
150} 149}
diff --git a/arch/unicore32/include/asm/dma-mapping.h b/arch/unicore32/include/asm/dma-mapping.h
index 9258e592f414..366460a81796 100644
--- a/arch/unicore32/include/asm/dma-mapping.h
+++ b/arch/unicore32/include/asm/dma-mapping.h
@@ -82,20 +82,26 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
82 return 0; 82 return 0;
83} 83}
84 84
85static inline void *dma_alloc_coherent(struct device *dev, size_t size, 85#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
86 dma_addr_t *dma_handle, gfp_t flag) 86
87static inline void *dma_alloc_attrs(struct device *dev, size_t size,
88 dma_addr_t *dma_handle, gfp_t flag,
89 struct dma_attrs *attrs)
87{ 90{
88 struct dma_map_ops *dma_ops = get_dma_ops(dev); 91 struct dma_map_ops *dma_ops = get_dma_ops(dev);
89 92
90 return dma_ops->alloc_coherent(dev, size, dma_handle, flag); 93 return dma_ops->alloc(dev, size, dma_handle, flag, attrs);
91} 94}
92 95
93static inline void dma_free_coherent(struct device *dev, size_t size, 96#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
94 void *cpu_addr, dma_addr_t dma_handle) 97
98static inline void dma_free_attrs(struct device *dev, size_t size,
99 void *cpu_addr, dma_addr_t dma_handle,
100 struct dma_attrs *attrs)
95{ 101{
96 struct dma_map_ops *dma_ops = get_dma_ops(dev); 102 struct dma_map_ops *dma_ops = get_dma_ops(dev);
97 103
98 dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); 104 dma_ops->free(dev, size, cpu_addr, dma_handle, attrs);
99} 105}
100 106
101#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 107#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
diff --git a/arch/unicore32/mm/dma-swiotlb.c b/arch/unicore32/mm/dma-swiotlb.c
index bfa9fbb2bbb1..16c08b2143a7 100644
--- a/arch/unicore32/mm/dma-swiotlb.c
+++ b/arch/unicore32/mm/dma-swiotlb.c
@@ -17,9 +17,23 @@
17 17
18#include <asm/dma.h> 18#include <asm/dma.h>
19 19
20static void *unicore_swiotlb_alloc_coherent(struct device *dev, size_t size,
21 dma_addr_t *dma_handle, gfp_t flags,
22 struct dma_attrs *attrs)
23{
24 return swiotlb_alloc_coherent(dev, size, dma_handle, flags);
25}
26
27static void unicore_swiotlb_free_coherent(struct device *dev, size_t size,
28 void *vaddr, dma_addr_t dma_addr,
29 struct dma_attrs *attrs)
30{
31 swiotlb_free_coherent(dev, size, vaddr, dma_addr);
32}
33
20struct dma_map_ops swiotlb_dma_map_ops = { 34struct dma_map_ops swiotlb_dma_map_ops = {
21 .alloc_coherent = swiotlb_alloc_coherent, 35 .alloc = unicore_swiotlb_alloc_coherent,
22 .free_coherent = swiotlb_free_coherent, 36 .free = unicore_swiotlb_free_coherent,
23 .map_sg = swiotlb_map_sg_attrs, 37 .map_sg = swiotlb_map_sg_attrs,
24 .unmap_sg = swiotlb_unmap_sg_attrs, 38 .unmap_sg = swiotlb_unmap_sg_attrs,
25 .dma_supported = swiotlb_dma_supported, 39 .dma_supported = swiotlb_dma_supported,
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 1d14cc6b79ad..c9866b0b77d8 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -81,7 +81,7 @@ config X86
81 select CLKEVT_I8253 81 select CLKEVT_I8253
82 select ARCH_HAVE_NMI_SAFE_CMPXCHG 82 select ARCH_HAVE_NMI_SAFE_CMPXCHG
83 select GENERIC_IOMAP 83 select GENERIC_IOMAP
84 select DCACHE_WORD_ACCESS if !DEBUG_PAGEALLOC 84 select DCACHE_WORD_ACCESS
85 85
86config INSTRUCTION_DECODER 86config INSTRUCTION_DECODER
87 def_bool (KPROBES || PERF_EVENTS) 87 def_bool (KPROBES || PERF_EVENTS)
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 968dbe24a255..41a7237606a3 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -129,6 +129,7 @@ KBUILD_CFLAGS += -Wno-sign-compare
129KBUILD_CFLAGS += -fno-asynchronous-unwind-tables 129KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
130# prevent gcc from generating any FP code by mistake 130# prevent gcc from generating any FP code by mistake
131KBUILD_CFLAGS += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,) 131KBUILD_CFLAGS += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,)
132KBUILD_CFLAGS += $(call cc-option,-mno-avx,)
132 133
133KBUILD_CFLAGS += $(mflags-y) 134KBUILD_CFLAGS += $(mflags-y)
134KBUILD_AFLAGS += $(mflags-y) 135KBUILD_AFLAGS += $(mflags-y)
diff --git a/arch/x86/Makefile.um b/arch/x86/Makefile.um
index 4be406abeefd..36b62bc52638 100644
--- a/arch/x86/Makefile.um
+++ b/arch/x86/Makefile.um
@@ -14,6 +14,9 @@ LINK-y += $(call cc-option,-m32)
14 14
15export LDFLAGS 15export LDFLAGS
16 16
17LDS_EXTRA := -Ui386
18export LDS_EXTRA
19
17# First of all, tune CFLAGS for the specific CPU. This actually sets cflags-y. 20# First of all, tune CFLAGS for the specific CPU. This actually sets cflags-y.
18include $(srctree)/arch/x86/Makefile_32.cpu 21include $(srctree)/arch/x86/Makefile_32.cpu
19 22
diff --git a/arch/x86/boot/compressed/head_32.S b/arch/x86/boot/compressed/head_32.S
index a0559930a180..c85e3ac99bba 100644
--- a/arch/x86/boot/compressed/head_32.S
+++ b/arch/x86/boot/compressed/head_32.S
@@ -33,6 +33,9 @@
33 __HEAD 33 __HEAD
34ENTRY(startup_32) 34ENTRY(startup_32)
35#ifdef CONFIG_EFI_STUB 35#ifdef CONFIG_EFI_STUB
36 jmp preferred_addr
37
38 .balign 0x10
36 /* 39 /*
37 * We don't need the return address, so set up the stack so 40 * We don't need the return address, so set up the stack so
38 * efi_main() can find its arugments. 41 * efi_main() can find its arugments.
@@ -41,12 +44,17 @@ ENTRY(startup_32)
41 44
42 call efi_main 45 call efi_main
43 cmpl $0, %eax 46 cmpl $0, %eax
44 je preferred_addr
45 movl %eax, %esi 47 movl %eax, %esi
46 call 1f 48 jne 2f
471: 491:
50 /* EFI init failed, so hang. */
51 hlt
52 jmp 1b
532:
54 call 3f
553:
48 popl %eax 56 popl %eax
49 subl $1b, %eax 57 subl $3b, %eax
50 subl BP_pref_address(%esi), %eax 58 subl BP_pref_address(%esi), %eax
51 add BP_code32_start(%esi), %eax 59 add BP_code32_start(%esi), %eax
52 leal preferred_addr(%eax), %eax 60 leal preferred_addr(%eax), %eax
diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
index 558d76ce23bc..87e03a13d8e3 100644
--- a/arch/x86/boot/compressed/head_64.S
+++ b/arch/x86/boot/compressed/head_64.S
@@ -200,18 +200,28 @@ ENTRY(startup_64)
200 * entire text+data+bss and hopefully all of memory. 200 * entire text+data+bss and hopefully all of memory.
201 */ 201 */
202#ifdef CONFIG_EFI_STUB 202#ifdef CONFIG_EFI_STUB
203 pushq %rsi 203 /*
204 * The entry point for the PE/COFF executable is 0x210, so only
205 * legacy boot loaders will execute this jmp.
206 */
207 jmp preferred_addr
208
209 .org 0x210
204 mov %rcx, %rdi 210 mov %rcx, %rdi
205 mov %rdx, %rsi 211 mov %rdx, %rsi
206 call efi_main 212 call efi_main
207 popq %rsi
208 cmpq $0,%rax
209 je preferred_addr
210 movq %rax,%rsi 213 movq %rax,%rsi
211 call 1f 214 cmpq $0,%rax
215 jne 2f
2121: 2161:
217 /* EFI init failed, so hang. */
218 hlt
219 jmp 1b
2202:
221 call 3f
2223:
213 popq %rax 223 popq %rax
214 subq $1b, %rax 224 subq $3b, %rax
215 subq BP_pref_address(%rsi), %rax 225 subq BP_pref_address(%rsi), %rax
216 add BP_code32_start(%esi), %eax 226 add BP_code32_start(%esi), %eax
217 leaq preferred_addr(%rax), %rax 227 leaq preferred_addr(%rax), %rax
diff --git a/arch/x86/boot/compressed/relocs.c b/arch/x86/boot/compressed/relocs.c
index d3c0b0277666..fb7117a4ade1 100644
--- a/arch/x86/boot/compressed/relocs.c
+++ b/arch/x86/boot/compressed/relocs.c
@@ -403,13 +403,11 @@ static void print_absolute_symbols(void)
403 for (i = 0; i < ehdr.e_shnum; i++) { 403 for (i = 0; i < ehdr.e_shnum; i++) {
404 struct section *sec = &secs[i]; 404 struct section *sec = &secs[i];
405 char *sym_strtab; 405 char *sym_strtab;
406 Elf32_Sym *sh_symtab;
407 int j; 406 int j;
408 407
409 if (sec->shdr.sh_type != SHT_SYMTAB) { 408 if (sec->shdr.sh_type != SHT_SYMTAB) {
410 continue; 409 continue;
411 } 410 }
412 sh_symtab = sec->symtab;
413 sym_strtab = sec->link->strtab; 411 sym_strtab = sec->link->strtab;
414 for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Sym); j++) { 412 for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Sym); j++) {
415 Elf32_Sym *sym; 413 Elf32_Sym *sym;
diff --git a/arch/x86/boot/tools/build.c b/arch/x86/boot/tools/build.c
index ed549767a231..24443a332083 100644
--- a/arch/x86/boot/tools/build.c
+++ b/arch/x86/boot/tools/build.c
@@ -205,8 +205,13 @@ int main(int argc, char ** argv)
205 put_unaligned_le32(file_sz, &buf[pe_header + 0x50]); 205 put_unaligned_le32(file_sz, &buf[pe_header + 0x50]);
206 206
207#ifdef CONFIG_X86_32 207#ifdef CONFIG_X86_32
208 /* Address of entry point */ 208 /*
209 put_unaligned_le32(i, &buf[pe_header + 0x28]); 209 * Address of entry point.
210 *
211 * The EFI stub entry point is +16 bytes from the start of
212 * the .text section.
213 */
214 put_unaligned_le32(i + 16, &buf[pe_header + 0x28]);
210 215
211 /* .text size */ 216 /* .text size */
212 put_unaligned_le32(file_sz, &buf[pe_header + 0xb0]); 217 put_unaligned_le32(file_sz, &buf[pe_header + 0xb0]);
@@ -217,9 +222,11 @@ int main(int argc, char ** argv)
217 /* 222 /*
218 * Address of entry point. startup_32 is at the beginning and 223 * Address of entry point. startup_32 is at the beginning and
219 * the 64-bit entry point (startup_64) is always 512 bytes 224 * the 64-bit entry point (startup_64) is always 512 bytes
220 * after. 225 * after. The EFI stub entry point is 16 bytes after that, as
226 * the first instruction allows legacy loaders to jump over
227 * the EFI stub initialisation
221 */ 228 */
222 put_unaligned_le32(i + 512, &buf[pe_header + 0x28]); 229 put_unaligned_le32(i + 528, &buf[pe_header + 0x28]);
223 230
224 /* .text size */ 231 /* .text size */
225 put_unaligned_le32(file_sz, &buf[pe_header + 0xc0]); 232 put_unaligned_le32(file_sz, &buf[pe_header + 0xc0]);
diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c
index d511d951a052..07b3a68d2d29 100644
--- a/arch/x86/ia32/ia32_aout.c
+++ b/arch/x86/ia32/ia32_aout.c
@@ -119,9 +119,7 @@ static void set_brk(unsigned long start, unsigned long end)
119 end = PAGE_ALIGN(end); 119 end = PAGE_ALIGN(end);
120 if (end <= start) 120 if (end <= start)
121 return; 121 return;
122 down_write(&current->mm->mmap_sem); 122 vm_brk(start, end - start);
123 do_brk(start, end - start);
124 up_write(&current->mm->mmap_sem);
125} 123}
126 124
127#ifdef CORE_DUMP 125#ifdef CORE_DUMP
@@ -296,8 +294,7 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
296 294
297 /* OK, This is the point of no return */ 295 /* OK, This is the point of no return */
298 set_personality(PER_LINUX); 296 set_personality(PER_LINUX);
299 set_thread_flag(TIF_IA32); 297 set_personality_ia32(false);
300 current->mm->context.ia32_compat = 1;
301 298
302 setup_new_exec(bprm); 299 setup_new_exec(bprm);
303 300
@@ -332,9 +329,7 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
332 pos = 32; 329 pos = 32;
333 map_size = ex.a_text+ex.a_data; 330 map_size = ex.a_text+ex.a_data;
334 331
335 down_write(&current->mm->mmap_sem); 332 error = vm_brk(text_addr & PAGE_MASK, map_size);
336 error = do_brk(text_addr & PAGE_MASK, map_size);
337 up_write(&current->mm->mmap_sem);
338 333
339 if (error != (text_addr & PAGE_MASK)) { 334 if (error != (text_addr & PAGE_MASK)) {
340 send_sig(SIGKILL, current, 0); 335 send_sig(SIGKILL, current, 0);
@@ -373,9 +368,7 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
373 if (!bprm->file->f_op->mmap || (fd_offset & ~PAGE_MASK) != 0) { 368 if (!bprm->file->f_op->mmap || (fd_offset & ~PAGE_MASK) != 0) {
374 loff_t pos = fd_offset; 369 loff_t pos = fd_offset;
375 370
376 down_write(&current->mm->mmap_sem); 371 vm_brk(N_TXTADDR(ex), ex.a_text+ex.a_data);
377 do_brk(N_TXTADDR(ex), ex.a_text+ex.a_data);
378 up_write(&current->mm->mmap_sem);
379 bprm->file->f_op->read(bprm->file, 372 bprm->file->f_op->read(bprm->file,
380 (char __user *)N_TXTADDR(ex), 373 (char __user *)N_TXTADDR(ex),
381 ex.a_text+ex.a_data, &pos); 374 ex.a_text+ex.a_data, &pos);
@@ -385,26 +378,22 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
385 goto beyond_if; 378 goto beyond_if;
386 } 379 }
387 380
388 down_write(&current->mm->mmap_sem); 381 error = vm_mmap(bprm->file, N_TXTADDR(ex), ex.a_text,
389 error = do_mmap(bprm->file, N_TXTADDR(ex), ex.a_text,
390 PROT_READ | PROT_EXEC, 382 PROT_READ | PROT_EXEC,
391 MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | 383 MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE |
392 MAP_EXECUTABLE | MAP_32BIT, 384 MAP_EXECUTABLE | MAP_32BIT,
393 fd_offset); 385 fd_offset);
394 up_write(&current->mm->mmap_sem);
395 386
396 if (error != N_TXTADDR(ex)) { 387 if (error != N_TXTADDR(ex)) {
397 send_sig(SIGKILL, current, 0); 388 send_sig(SIGKILL, current, 0);
398 return error; 389 return error;
399 } 390 }
400 391
401 down_write(&current->mm->mmap_sem); 392 error = vm_mmap(bprm->file, N_DATADDR(ex), ex.a_data,
402 error = do_mmap(bprm->file, N_DATADDR(ex), ex.a_data,
403 PROT_READ | PROT_WRITE | PROT_EXEC, 393 PROT_READ | PROT_WRITE | PROT_EXEC,
404 MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | 394 MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE |
405 MAP_EXECUTABLE | MAP_32BIT, 395 MAP_EXECUTABLE | MAP_32BIT,
406 fd_offset + ex.a_text); 396 fd_offset + ex.a_text);
407 up_write(&current->mm->mmap_sem);
408 if (error != N_DATADDR(ex)) { 397 if (error != N_DATADDR(ex)) {
409 send_sig(SIGKILL, current, 0); 398 send_sig(SIGKILL, current, 0);
410 return error; 399 return error;
@@ -476,9 +465,7 @@ static int load_aout_library(struct file *file)
476 error_time = jiffies; 465 error_time = jiffies;
477 } 466 }
478#endif 467#endif
479 down_write(&current->mm->mmap_sem); 468 vm_brk(start_addr, ex.a_text + ex.a_data + ex.a_bss);
480 do_brk(start_addr, ex.a_text + ex.a_data + ex.a_bss);
481 up_write(&current->mm->mmap_sem);
482 469
483 file->f_op->read(file, (char __user *)start_addr, 470 file->f_op->read(file, (char __user *)start_addr,
484 ex.a_text + ex.a_data, &pos); 471 ex.a_text + ex.a_data, &pos);
@@ -490,12 +477,10 @@ static int load_aout_library(struct file *file)
490 goto out; 477 goto out;
491 } 478 }
492 /* Now use mmap to map the library into memory. */ 479 /* Now use mmap to map the library into memory. */
493 down_write(&current->mm->mmap_sem); 480 error = vm_mmap(file, start_addr, ex.a_text + ex.a_data,
494 error = do_mmap(file, start_addr, ex.a_text + ex.a_data,
495 PROT_READ | PROT_WRITE | PROT_EXEC, 481 PROT_READ | PROT_WRITE | PROT_EXEC,
496 MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_32BIT, 482 MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_32BIT,
497 N_TXTOFF(ex)); 483 N_TXTOFF(ex));
498 up_write(&current->mm->mmap_sem);
499 retval = error; 484 retval = error;
500 if (error != start_addr) 485 if (error != start_addr)
501 goto out; 486 goto out;
@@ -503,9 +488,7 @@ static int load_aout_library(struct file *file)
503 len = PAGE_ALIGN(ex.a_text + ex.a_data); 488 len = PAGE_ALIGN(ex.a_text + ex.a_data);
504 bss = ex.a_text + ex.a_data + ex.a_bss; 489 bss = ex.a_text + ex.a_data + ex.a_bss;
505 if (bss > len) { 490 if (bss > len) {
506 down_write(&current->mm->mmap_sem); 491 error = vm_brk(start_addr + len, bss - len);
507 error = do_brk(start_addr + len, bss - len);
508 up_write(&current->mm->mmap_sem);
509 retval = error; 492 retval = error;
510 if (error != start_addr + len) 493 if (error != start_addr + len)
511 goto out; 494 goto out;
diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
index b3b733262909..99480e55973d 100644
--- a/arch/x86/include/asm/cmpxchg.h
+++ b/arch/x86/include/asm/cmpxchg.h
@@ -43,7 +43,7 @@ extern void __add_wrong_size(void)
43 switch (sizeof(*(ptr))) { \ 43 switch (sizeof(*(ptr))) { \
44 case __X86_CASE_B: \ 44 case __X86_CASE_B: \
45 asm volatile (lock #op "b %b0, %1\n" \ 45 asm volatile (lock #op "b %b0, %1\n" \
46 : "+r" (__ret), "+m" (*(ptr)) \ 46 : "+q" (__ret), "+m" (*(ptr)) \
47 : : "memory", "cc"); \ 47 : : "memory", "cc"); \
48 break; \ 48 break; \
49 case __X86_CASE_W: \ 49 case __X86_CASE_W: \
@@ -173,7 +173,7 @@ extern void __add_wrong_size(void)
173 switch (sizeof(*(ptr))) { \ 173 switch (sizeof(*(ptr))) { \
174 case __X86_CASE_B: \ 174 case __X86_CASE_B: \
175 asm volatile (lock "addb %b1, %0\n" \ 175 asm volatile (lock "addb %b1, %0\n" \
176 : "+m" (*(ptr)) : "ri" (inc) \ 176 : "+m" (*(ptr)) : "qi" (inc) \
177 : "memory", "cc"); \ 177 : "memory", "cc"); \
178 break; \ 178 break; \
179 case __X86_CASE_W: \ 179 case __X86_CASE_W: \
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index ed3065fd6314..4b4331d71935 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -59,7 +59,8 @@ extern int dma_supported(struct device *hwdev, u64 mask);
59extern int dma_set_mask(struct device *dev, u64 mask); 59extern int dma_set_mask(struct device *dev, u64 mask);
60 60
61extern void *dma_generic_alloc_coherent(struct device *dev, size_t size, 61extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
62 dma_addr_t *dma_addr, gfp_t flag); 62 dma_addr_t *dma_addr, gfp_t flag,
63 struct dma_attrs *attrs);
63 64
64static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) 65static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
65{ 66{
@@ -111,9 +112,11 @@ static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
111 return gfp; 112 return gfp;
112} 113}
113 114
115#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
116
114static inline void * 117static inline void *
115dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, 118dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
116 gfp_t gfp) 119 gfp_t gfp, struct dma_attrs *attrs)
117{ 120{
118 struct dma_map_ops *ops = get_dma_ops(dev); 121 struct dma_map_ops *ops = get_dma_ops(dev);
119 void *memory; 122 void *memory;
@@ -129,18 +132,21 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
129 if (!is_device_dma_capable(dev)) 132 if (!is_device_dma_capable(dev))
130 return NULL; 133 return NULL;
131 134
132 if (!ops->alloc_coherent) 135 if (!ops->alloc)
133 return NULL; 136 return NULL;
134 137
135 memory = ops->alloc_coherent(dev, size, dma_handle, 138 memory = ops->alloc(dev, size, dma_handle,
136 dma_alloc_coherent_gfp_flags(dev, gfp)); 139 dma_alloc_coherent_gfp_flags(dev, gfp), attrs);
137 debug_dma_alloc_coherent(dev, size, *dma_handle, memory); 140 debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
138 141
139 return memory; 142 return memory;
140} 143}
141 144
142static inline void dma_free_coherent(struct device *dev, size_t size, 145#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
143 void *vaddr, dma_addr_t bus) 146
147static inline void dma_free_attrs(struct device *dev, size_t size,
148 void *vaddr, dma_addr_t bus,
149 struct dma_attrs *attrs)
144{ 150{
145 struct dma_map_ops *ops = get_dma_ops(dev); 151 struct dma_map_ops *ops = get_dma_ops(dev);
146 152
@@ -150,8 +156,8 @@ static inline void dma_free_coherent(struct device *dev, size_t size,
150 return; 156 return;
151 157
152 debug_dma_free_coherent(dev, size, vaddr, bus); 158 debug_dma_free_coherent(dev, size, vaddr, bus);
153 if (ops->free_coherent) 159 if (ops->free)
154 ops->free_coherent(dev, size, vaddr, bus); 160 ops->free(dev, size, vaddr, bus, attrs);
155} 161}
156 162
157#endif 163#endif
diff --git a/arch/x86/include/asm/posix_types.h b/arch/x86/include/asm/posix_types.h
index 3427b7798dbc..7ef7c3020e5c 100644
--- a/arch/x86/include/asm/posix_types.h
+++ b/arch/x86/include/asm/posix_types.h
@@ -7,9 +7,9 @@
7#else 7#else
8# ifdef __i386__ 8# ifdef __i386__
9# include "posix_types_32.h" 9# include "posix_types_32.h"
10# elif defined(__LP64__) 10# elif defined(__ILP32__)
11# include "posix_types_64.h"
12# else
13# include "posix_types_x32.h" 11# include "posix_types_x32.h"
12# else
13# include "posix_types_64.h"
14# endif 14# endif
15#endif 15#endif
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 7284c9a6a0b5..4fa7dcceb6c0 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -974,16 +974,6 @@ extern bool cpu_has_amd_erratum(const int *);
974#define cpu_has_amd_erratum(x) (false) 974#define cpu_has_amd_erratum(x) (false)
975#endif /* CONFIG_CPU_SUP_AMD */ 975#endif /* CONFIG_CPU_SUP_AMD */
976 976
977#ifdef CONFIG_X86_32
978/*
979 * disable hlt during certain critical i/o operations
980 */
981#define HAVE_DISABLE_HLT
982#endif
983
984void disable_hlt(void);
985void enable_hlt(void);
986
987void cpu_idle_wait(void); 977void cpu_idle_wait(void);
988 978
989extern unsigned long arch_align_stack(unsigned long sp); 979extern unsigned long arch_align_stack(unsigned long sp);
diff --git a/arch/x86/include/asm/sigcontext.h b/arch/x86/include/asm/sigcontext.h
index 4a085383af27..5ca71c065eef 100644
--- a/arch/x86/include/asm/sigcontext.h
+++ b/arch/x86/include/asm/sigcontext.h
@@ -257,7 +257,7 @@ struct sigcontext {
257 __u64 oldmask; 257 __u64 oldmask;
258 __u64 cr2; 258 __u64 cr2;
259 struct _fpstate __user *fpstate; /* zero when no FPU context */ 259 struct _fpstate __user *fpstate; /* zero when no FPU context */
260#ifndef __LP64__ 260#ifdef __ILP32__
261 __u32 __fpstate_pad; 261 __u32 __fpstate_pad;
262#endif 262#endif
263 __u64 reserved1[8]; 263 __u64 reserved1[8];
diff --git a/arch/x86/include/asm/siginfo.h b/arch/x86/include/asm/siginfo.h
index fc1aa5535646..34c47b3341c0 100644
--- a/arch/x86/include/asm/siginfo.h
+++ b/arch/x86/include/asm/siginfo.h
@@ -2,7 +2,13 @@
2#define _ASM_X86_SIGINFO_H 2#define _ASM_X86_SIGINFO_H
3 3
4#ifdef __x86_64__ 4#ifdef __x86_64__
5# define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) 5# ifdef __ILP32__ /* x32 */
6typedef long long __kernel_si_clock_t __attribute__((aligned(4)));
7# define __ARCH_SI_CLOCK_T __kernel_si_clock_t
8# define __ARCH_SI_ATTRIBUTES __attribute__((aligned(8)))
9# else /* x86-64 */
10# define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
11# endif
6#endif 12#endif
7 13
8#include <asm-generic/siginfo.h> 14#include <asm-generic/siginfo.h>
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
index 8be5f54d9360..e0544597cfe7 100644
--- a/arch/x86/include/asm/uaccess.h
+++ b/arch/x86/include/asm/uaccess.h
@@ -557,6 +557,8 @@ struct __large_struct { unsigned long buf[100]; };
557 557
558extern unsigned long 558extern unsigned long
559copy_from_user_nmi(void *to, const void __user *from, unsigned long n); 559copy_from_user_nmi(void *to, const void __user *from, unsigned long n);
560extern __must_check long
561strncpy_from_user(char *dst, const char __user *src, long count);
560 562
561/* 563/*
562 * movsl can be slow when source and dest are not both 8-byte aligned 564 * movsl can be slow when source and dest are not both 8-byte aligned
diff --git a/arch/x86/include/asm/uaccess_32.h b/arch/x86/include/asm/uaccess_32.h
index 566e803cc602..8084bc73b18c 100644
--- a/arch/x86/include/asm/uaccess_32.h
+++ b/arch/x86/include/asm/uaccess_32.h
@@ -213,11 +213,6 @@ static inline unsigned long __must_check copy_from_user(void *to,
213 return n; 213 return n;
214} 214}
215 215
216long __must_check strncpy_from_user(char *dst, const char __user *src,
217 long count);
218long __must_check __strncpy_from_user(char *dst,
219 const char __user *src, long count);
220
221/** 216/**
222 * strlen_user: - Get the size of a string in user space. 217 * strlen_user: - Get the size of a string in user space.
223 * @str: The string to measure. 218 * @str: The string to measure.
diff --git a/arch/x86/include/asm/uaccess_64.h b/arch/x86/include/asm/uaccess_64.h
index 1c66d30971ad..fcd4b6f3ef02 100644
--- a/arch/x86/include/asm/uaccess_64.h
+++ b/arch/x86/include/asm/uaccess_64.h
@@ -208,10 +208,6 @@ int __copy_in_user(void __user *dst, const void __user *src, unsigned size)
208 } 208 }
209} 209}
210 210
211__must_check long
212strncpy_from_user(char *dst, const char __user *src, long count);
213__must_check long
214__strncpy_from_user(char *dst, const char __user *src, long count);
215__must_check long strnlen_user(const char __user *str, long n); 211__must_check long strnlen_user(const char __user *str, long n);
216__must_check long __strnlen_user(const char __user *str, long n); 212__must_check long __strnlen_user(const char __user *str, long n);
217__must_check long strlen_user(const char __user *str); 213__must_check long strlen_user(const char __user *str);
diff --git a/arch/x86/include/asm/unistd.h b/arch/x86/include/asm/unistd.h
index 37cdc9d99bb1..4437001d8e3d 100644
--- a/arch/x86/include/asm/unistd.h
+++ b/arch/x86/include/asm/unistd.h
@@ -63,10 +63,10 @@
63#else 63#else
64# ifdef __i386__ 64# ifdef __i386__
65# include <asm/unistd_32.h> 65# include <asm/unistd_32.h>
66# elif defined(__LP64__) 66# elif defined(__ILP32__)
67# include <asm/unistd_64.h>
68# else
69# include <asm/unistd_x32.h> 67# include <asm/unistd_x32.h>
68# else
69# include <asm/unistd_64.h>
70# endif 70# endif
71#endif 71#endif
72 72
diff --git a/arch/x86/include/asm/word-at-a-time.h b/arch/x86/include/asm/word-at-a-time.h
new file mode 100644
index 000000000000..e58f03b206c3
--- /dev/null
+++ b/arch/x86/include/asm/word-at-a-time.h
@@ -0,0 +1,79 @@
1#ifndef _ASM_WORD_AT_A_TIME_H
2#define _ASM_WORD_AT_A_TIME_H
3
4/*
5 * This is largely generic for little-endian machines, but the
6 * optimal byte mask counting is probably going to be something
7 * that is architecture-specific. If you have a reliably fast
8 * bit count instruction, that might be better than the multiply
9 * and shift, for example.
10 */
11
12#ifdef CONFIG_64BIT
13
14/*
15 * Jan Achrenius on G+: microoptimized version of
16 * the simpler "(mask & ONEBYTES) * ONEBYTES >> 56"
17 * that works for the bytemasks without having to
18 * mask them first.
19 */
20static inline long count_masked_bytes(unsigned long mask)
21{
22 return mask*0x0001020304050608ul >> 56;
23}
24
25#else /* 32-bit case */
26
27/* Carl Chatfield / Jan Achrenius G+ version for 32-bit */
28static inline long count_masked_bytes(long mask)
29{
30 /* (000000 0000ff 00ffff ffffff) -> ( 1 1 2 3 ) */
31 long a = (0x0ff0001+mask) >> 23;
32 /* Fix the 1 for 00 case */
33 return a & mask;
34}
35
36#endif
37
38#define REPEAT_BYTE(x) ((~0ul / 0xff) * (x))
39
40/* Return the high bit set in the first byte that is a zero */
41static inline unsigned long has_zero(unsigned long a)
42{
43 return ((a - REPEAT_BYTE(0x01)) & ~a) & REPEAT_BYTE(0x80);
44}
45
46/*
47 * Load an unaligned word from kernel space.
48 *
49 * In the (very unlikely) case of the word being a page-crosser
50 * and the next page not being mapped, take the exception and
51 * return zeroes in the non-existing part.
52 */
53static inline unsigned long load_unaligned_zeropad(const void *addr)
54{
55 unsigned long ret, dummy;
56
57 asm(
58 "1:\tmov %2,%0\n"
59 "2:\n"
60 ".section .fixup,\"ax\"\n"
61 "3:\t"
62 "lea %2,%1\n\t"
63 "and %3,%1\n\t"
64 "mov (%1),%0\n\t"
65 "leal %2,%%ecx\n\t"
66 "andl %4,%%ecx\n\t"
67 "shll $3,%%ecx\n\t"
68 "shr %%cl,%0\n\t"
69 "jmp 2b\n"
70 ".previous\n"
71 _ASM_EXTABLE(1b, 3b)
72 :"=&r" (ret),"=&c" (dummy)
73 :"m" (*(unsigned long *)addr),
74 "i" (-sizeof(unsigned long)),
75 "i" (sizeof(unsigned long)-1));
76 return ret;
77}
78
79#endif /* _ASM_WORD_AT_A_TIME_H */
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index baaca8defec8..764b66a4cf89 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -195,6 +195,5 @@ extern struct x86_msi_ops x86_msi;
195 195
196extern void x86_init_noop(void); 196extern void x86_init_noop(void);
197extern void x86_init_uint_noop(unsigned int unused); 197extern void x86_init_uint_noop(unsigned int unused);
198extern void x86_default_fixup_cpu_id(struct cpuinfo_x86 *c, int node);
199 198
200#endif 199#endif
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 103b6ab368d3..146a49c763a4 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -24,6 +24,10 @@ unsigned long acpi_realmode_flags;
24static char temp_stack[4096]; 24static char temp_stack[4096];
25#endif 25#endif
26 26
27asmlinkage void acpi_enter_s3(void)
28{
29 acpi_enter_sleep_state(3, wake_sleep_flags);
30}
27/** 31/**
28 * acpi_suspend_lowlevel - save kernel state 32 * acpi_suspend_lowlevel - save kernel state
29 * 33 *
diff --git a/arch/x86/kernel/acpi/sleep.h b/arch/x86/kernel/acpi/sleep.h
index 416d4be13fef..d68677a2a010 100644
--- a/arch/x86/kernel/acpi/sleep.h
+++ b/arch/x86/kernel/acpi/sleep.h
@@ -3,12 +3,16 @@
3 */ 3 */
4 4
5#include <asm/trampoline.h> 5#include <asm/trampoline.h>
6#include <linux/linkage.h>
6 7
7extern unsigned long saved_video_mode; 8extern unsigned long saved_video_mode;
8extern long saved_magic; 9extern long saved_magic;
9 10
10extern int wakeup_pmode_return; 11extern int wakeup_pmode_return;
11 12
13extern u8 wake_sleep_flags;
14extern asmlinkage void acpi_enter_s3(void);
15
12extern unsigned long acpi_copy_wakeup_routine(unsigned long); 16extern unsigned long acpi_copy_wakeup_routine(unsigned long);
13extern void wakeup_long64(void); 17extern void wakeup_long64(void);
14 18
diff --git a/arch/x86/kernel/acpi/wakeup_32.S b/arch/x86/kernel/acpi/wakeup_32.S
index 13ab720573e3..72610839f03b 100644
--- a/arch/x86/kernel/acpi/wakeup_32.S
+++ b/arch/x86/kernel/acpi/wakeup_32.S
@@ -74,9 +74,7 @@ restore_registers:
74ENTRY(do_suspend_lowlevel) 74ENTRY(do_suspend_lowlevel)
75 call save_processor_state 75 call save_processor_state
76 call save_registers 76 call save_registers
77 pushl $3 77 call acpi_enter_s3
78 call acpi_enter_sleep_state
79 addl $4, %esp
80 78
81# In case of S3 failure, we'll emerge here. Jump 79# In case of S3 failure, we'll emerge here. Jump
82# to ret_point to recover 80# to ret_point to recover
diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S
index 8ea5164cbd04..014d1d28c397 100644
--- a/arch/x86/kernel/acpi/wakeup_64.S
+++ b/arch/x86/kernel/acpi/wakeup_64.S
@@ -71,9 +71,7 @@ ENTRY(do_suspend_lowlevel)
71 movq %rsi, saved_rsi 71 movq %rsi, saved_rsi
72 72
73 addq $8, %rsp 73 addq $8, %rsp
74 movl $3, %edi 74 call acpi_enter_s3
75 xorl %eax, %eax
76 call acpi_enter_sleep_state
77 /* in case something went wrong, restore the machine status and go on */ 75 /* in case something went wrong, restore the machine status and go on */
78 jmp resume_point 76 jmp resume_point
79 77
diff --git a/arch/x86/kernel/amd_gart_64.c b/arch/x86/kernel/amd_gart_64.c
index b1e7c7f7a0af..e66311200cbd 100644
--- a/arch/x86/kernel/amd_gart_64.c
+++ b/arch/x86/kernel/amd_gart_64.c
@@ -477,7 +477,7 @@ error:
477/* allocate and map a coherent mapping */ 477/* allocate and map a coherent mapping */
478static void * 478static void *
479gart_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_addr, 479gart_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_addr,
480 gfp_t flag) 480 gfp_t flag, struct dma_attrs *attrs)
481{ 481{
482 dma_addr_t paddr; 482 dma_addr_t paddr;
483 unsigned long align_mask; 483 unsigned long align_mask;
@@ -500,7 +500,8 @@ gart_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_addr,
500 } 500 }
501 __free_pages(page, get_order(size)); 501 __free_pages(page, get_order(size));
502 } else 502 } else
503 return dma_generic_alloc_coherent(dev, size, dma_addr, flag); 503 return dma_generic_alloc_coherent(dev, size, dma_addr, flag,
504 attrs);
504 505
505 return NULL; 506 return NULL;
506} 507}
@@ -508,7 +509,7 @@ gart_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_addr,
508/* free a coherent mapping */ 509/* free a coherent mapping */
509static void 510static void
510gart_free_coherent(struct device *dev, size_t size, void *vaddr, 511gart_free_coherent(struct device *dev, size_t size, void *vaddr,
511 dma_addr_t dma_addr) 512 dma_addr_t dma_addr, struct dma_attrs *attrs)
512{ 513{
513 gart_unmap_page(dev, dma_addr, size, DMA_BIDIRECTIONAL, NULL); 514 gart_unmap_page(dev, dma_addr, size, DMA_BIDIRECTIONAL, NULL);
514 free_pages((unsigned long)vaddr, get_order(size)); 515 free_pages((unsigned long)vaddr, get_order(size));
@@ -700,8 +701,8 @@ static struct dma_map_ops gart_dma_ops = {
700 .unmap_sg = gart_unmap_sg, 701 .unmap_sg = gart_unmap_sg,
701 .map_page = gart_map_page, 702 .map_page = gart_map_page,
702 .unmap_page = gart_unmap_page, 703 .unmap_page = gart_unmap_page,
703 .alloc_coherent = gart_alloc_coherent, 704 .alloc = gart_alloc_coherent,
704 .free_coherent = gart_free_coherent, 705 .free = gart_free_coherent,
705 .mapping_error = gart_mapping_error, 706 .mapping_error = gart_mapping_error,
706}; 707};
707 708
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 11544d8f1e97..edc24480469f 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1637,9 +1637,11 @@ static int __init apic_verify(void)
1637 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 1637 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
1638 1638
1639 /* The BIOS may have set up the APIC at some other address */ 1639 /* The BIOS may have set up the APIC at some other address */
1640 rdmsr(MSR_IA32_APICBASE, l, h); 1640 if (boot_cpu_data.x86 >= 6) {
1641 if (l & MSR_IA32_APICBASE_ENABLE) 1641 rdmsr(MSR_IA32_APICBASE, l, h);
1642 mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; 1642 if (l & MSR_IA32_APICBASE_ENABLE)
1643 mp_lapic_addr = l & MSR_IA32_APICBASE_BASE;
1644 }
1643 1645
1644 pr_info("Found and enabled local APIC!\n"); 1646 pr_info("Found and enabled local APIC!\n");
1645 return 0; 1647 return 0;
@@ -1657,13 +1659,15 @@ int __init apic_force_enable(unsigned long addr)
1657 * MSR. This can only be done in software for Intel P6 or later 1659 * MSR. This can only be done in software for Intel P6 or later
1658 * and AMD K7 (Model > 1) or later. 1660 * and AMD K7 (Model > 1) or later.
1659 */ 1661 */
1660 rdmsr(MSR_IA32_APICBASE, l, h); 1662 if (boot_cpu_data.x86 >= 6) {
1661 if (!(l & MSR_IA32_APICBASE_ENABLE)) { 1663 rdmsr(MSR_IA32_APICBASE, l, h);
1662 pr_info("Local APIC disabled by BIOS -- reenabling.\n"); 1664 if (!(l & MSR_IA32_APICBASE_ENABLE)) {
1663 l &= ~MSR_IA32_APICBASE_BASE; 1665 pr_info("Local APIC disabled by BIOS -- reenabling.\n");
1664 l |= MSR_IA32_APICBASE_ENABLE | addr; 1666 l &= ~MSR_IA32_APICBASE_BASE;
1665 wrmsr(MSR_IA32_APICBASE, l, h); 1667 l |= MSR_IA32_APICBASE_ENABLE | addr;
1666 enabled_via_apicbase = 1; 1668 wrmsr(MSR_IA32_APICBASE, l, h);
1669 enabled_via_apicbase = 1;
1670 }
1667 } 1671 }
1668 return apic_verify(); 1672 return apic_verify();
1669} 1673}
@@ -2209,10 +2213,12 @@ static void lapic_resume(void)
2209 * FIXME! This will be wrong if we ever support suspend on 2213 * FIXME! This will be wrong if we ever support suspend on
2210 * SMP! We'll need to do this as part of the CPU restore! 2214 * SMP! We'll need to do this as part of the CPU restore!
2211 */ 2215 */
2212 rdmsr(MSR_IA32_APICBASE, l, h); 2216 if (boot_cpu_data.x86 >= 6) {
2213 l &= ~MSR_IA32_APICBASE_BASE; 2217 rdmsr(MSR_IA32_APICBASE, l, h);
2214 l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr; 2218 l &= ~MSR_IA32_APICBASE_BASE;
2215 wrmsr(MSR_IA32_APICBASE, l, h); 2219 l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr;
2220 wrmsr(MSR_IA32_APICBASE, l, h);
2221 }
2216 } 2222 }
2217 2223
2218 maxlvt = lapic_get_maxlvt(); 2224 maxlvt = lapic_get_maxlvt();
diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c
index 899803e03214..23e75422e013 100644
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -207,8 +207,11 @@ static void __init map_csrs(void)
207 207
208static void fixup_cpu_id(struct cpuinfo_x86 *c, int node) 208static void fixup_cpu_id(struct cpuinfo_x86 *c, int node)
209{ 209{
210 c->phys_proc_id = node; 210
211 per_cpu(cpu_llc_id, smp_processor_id()) = node; 211 if (c->phys_proc_id != node) {
212 c->phys_proc_id = node;
213 per_cpu(cpu_llc_id, smp_processor_id()) = node;
214 }
212} 215}
213 216
214static int __init numachip_system_init(void) 217static int __init numachip_system_init(void)
diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c
index 8a778db45e3a..991e315f4227 100644
--- a/arch/x86/kernel/apic/x2apic_phys.c
+++ b/arch/x86/kernel/apic/x2apic_phys.c
@@ -24,6 +24,12 @@ static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
24{ 24{
25 if (x2apic_phys) 25 if (x2apic_phys)
26 return x2apic_enabled(); 26 return x2apic_enabled();
27 else if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) &&
28 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL) &&
29 x2apic_enabled()) {
30 printk(KERN_DEBUG "System requires x2apic physical mode\n");
31 return 1;
32 }
27 else 33 else
28 return 0; 34 return 0;
29} 35}
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 0a44b90602b0..146bb6218eec 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -26,7 +26,8 @@
26 * contact AMD for precise details and a CPU swap. 26 * contact AMD for precise details and a CPU swap.
27 * 27 *
28 * See http://www.multimania.com/poulot/k6bug.html 28 * See http://www.multimania.com/poulot/k6bug.html
29 * http://www.amd.com/K6/k6docs/revgd.html 29 * and section 2.6.2 of "AMD-K6 Processor Revision Guide - Model 6"
30 * (Publication # 21266 Issue Date: August 1998)
30 * 31 *
31 * The following test is erm.. interesting. AMD neglected to up 32 * The following test is erm.. interesting. AMD neglected to up
32 * the chip setting when fixing the bug but they also tweaked some 33 * the chip setting when fixing the bug but they also tweaked some
@@ -94,7 +95,6 @@ static void __cpuinit init_amd_k6(struct cpuinfo_x86 *c)
94 "system stability may be impaired when more than 32 MB are used.\n"); 95 "system stability may be impaired when more than 32 MB are used.\n");
95 else 96 else
96 printk(KERN_CONT "probably OK (after B9730xxxx).\n"); 97 printk(KERN_CONT "probably OK (after B9730xxxx).\n");
97 printk(KERN_INFO "Please see http://membres.lycos.fr/poulot/k6bug.html\n");
98 } 98 }
99 99
100 /* K6 with old style WHCR */ 100 /* K6 with old style WHCR */
@@ -353,10 +353,11 @@ static void __cpuinit srat_detect_node(struct cpuinfo_x86 *c)
353 node = per_cpu(cpu_llc_id, cpu); 353 node = per_cpu(cpu_llc_id, cpu);
354 354
355 /* 355 /*
356 * If core numbers are inconsistent, it's likely a multi-fabric platform, 356 * On multi-fabric platform (e.g. Numascale NumaChip) a
357 * so invoke platform-specific handler 357 * platform-specific handler needs to be called to fixup some
358 * IDs of the CPU.
358 */ 359 */
359 if (c->phys_proc_id != node) 360 if (x86_cpuinit.fixup_cpu_id)
360 x86_cpuinit.fixup_cpu_id(c, node); 361 x86_cpuinit.fixup_cpu_id(c, node);
361 362
362 if (!node_online(node)) { 363 if (!node_online(node)) {
@@ -579,6 +580,24 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
579 } 580 }
580 } 581 }
581 582
583 /* re-enable TopologyExtensions if switched off by BIOS */
584 if ((c->x86 == 0x15) &&
585 (c->x86_model >= 0x10) && (c->x86_model <= 0x1f) &&
586 !cpu_has(c, X86_FEATURE_TOPOEXT)) {
587 u64 val;
588
589 if (!rdmsrl_amd_safe(0xc0011005, &val)) {
590 val |= 1ULL << 54;
591 wrmsrl_amd_safe(0xc0011005, val);
592 rdmsrl(0xc0011005, val);
593 if (val & (1ULL << 54)) {
594 set_cpu_cap(c, X86_FEATURE_TOPOEXT);
595 printk(KERN_INFO FW_INFO "CPU: Re-enabling "
596 "disabled Topology Extensions Support\n");
597 }
598 }
599 }
600
582 cpu_detect_cache_sizes(c); 601 cpu_detect_cache_sizes(c);
583 602
584 /* Multi core CPU? */ 603 /* Multi core CPU? */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 67e258362a3d..cf79302198a6 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1163,15 +1163,6 @@ static void dbg_restore_debug_regs(void)
1163#endif /* ! CONFIG_KGDB */ 1163#endif /* ! CONFIG_KGDB */
1164 1164
1165/* 1165/*
1166 * Prints an error where the NUMA and configured core-number mismatch and the
1167 * platform didn't override this to fix it up
1168 */
1169void __cpuinit x86_default_fixup_cpu_id(struct cpuinfo_x86 *c, int node)
1170{
1171 pr_err("NUMA core number %d differs from configured core number %d\n", node, c->phys_proc_id);
1172}
1173
1174/*
1175 * cpu_init() initializes state that is per-CPU. Some data is already 1166 * cpu_init() initializes state that is per-CPU. Some data is already
1176 * initialized (naturally) in the bootstrap process, such as the GDT 1167 * initialized (naturally) in the bootstrap process, such as the GDT
1177 * and IDT. We reload them nevertheless, this function acts as a 1168 * and IDT. We reload them nevertheless, this function acts as a
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 73d08ed98a64..b8f3653dddbc 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -433,14 +433,14 @@ int amd_set_l3_disable_slot(struct amd_northbridge *nb, int cpu, unsigned slot,
433 /* check if @slot is already used or the index is already disabled */ 433 /* check if @slot is already used or the index is already disabled */
434 ret = amd_get_l3_disable_slot(nb, slot); 434 ret = amd_get_l3_disable_slot(nb, slot);
435 if (ret >= 0) 435 if (ret >= 0)
436 return -EINVAL; 436 return -EEXIST;
437 437
438 if (index > nb->l3_cache.indices) 438 if (index > nb->l3_cache.indices)
439 return -EINVAL; 439 return -EINVAL;
440 440
441 /* check whether the other slot has disabled the same index already */ 441 /* check whether the other slot has disabled the same index already */
442 if (index == amd_get_l3_disable_slot(nb, !slot)) 442 if (index == amd_get_l3_disable_slot(nb, !slot))
443 return -EINVAL; 443 return -EEXIST;
444 444
445 amd_l3_disable_index(nb, cpu, slot, index); 445 amd_l3_disable_index(nb, cpu, slot, index);
446 446
@@ -468,8 +468,8 @@ static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
468 err = amd_set_l3_disable_slot(this_leaf->base.nb, cpu, slot, val); 468 err = amd_set_l3_disable_slot(this_leaf->base.nb, cpu, slot, val);
469 if (err) { 469 if (err) {
470 if (err == -EEXIST) 470 if (err == -EEXIST)
471 printk(KERN_WARNING "L3 disable slot %d in use!\n", 471 pr_warning("L3 slot %d in use/index already disabled!\n",
472 slot); 472 slot);
473 return err; 473 return err;
474 } 474 }
475 return count; 475 return count;
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index ef484d9d0a25..a2dfacfd7103 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -1271,6 +1271,17 @@ done:
1271 return num ? -EINVAL : 0; 1271 return num ? -EINVAL : 0;
1272} 1272}
1273 1273
1274PMU_FORMAT_ATTR(cccr, "config:0-31" );
1275PMU_FORMAT_ATTR(escr, "config:32-62");
1276PMU_FORMAT_ATTR(ht, "config:63" );
1277
1278static struct attribute *intel_p4_formats_attr[] = {
1279 &format_attr_cccr.attr,
1280 &format_attr_escr.attr,
1281 &format_attr_ht.attr,
1282 NULL,
1283};
1284
1274static __initconst const struct x86_pmu p4_pmu = { 1285static __initconst const struct x86_pmu p4_pmu = {
1275 .name = "Netburst P4/Xeon", 1286 .name = "Netburst P4/Xeon",
1276 .handle_irq = p4_pmu_handle_irq, 1287 .handle_irq = p4_pmu_handle_irq,
@@ -1305,6 +1316,8 @@ static __initconst const struct x86_pmu p4_pmu = {
1305 * the former idea is taken from OProfile code 1316 * the former idea is taken from OProfile code
1306 */ 1317 */
1307 .perfctr_second_write = 1, 1318 .perfctr_second_write = 1,
1319
1320 .format_attrs = intel_p4_formats_attr,
1308}; 1321};
1309 1322
1310__init int p4_pmu_init(void) 1323__init int p4_pmu_init(void)
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index 7734bcbb5a3a..2d6e6498c176 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -235,6 +235,7 @@ int init_fpu(struct task_struct *tsk)
235 if (tsk_used_math(tsk)) { 235 if (tsk_used_math(tsk)) {
236 if (HAVE_HWFP && tsk == current) 236 if (HAVE_HWFP && tsk == current)
237 unlazy_fpu(tsk); 237 unlazy_fpu(tsk);
238 tsk->thread.fpu.last_cpu = ~0;
238 return 0; 239 return 0;
239 } 240 }
240 241
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 7943e0c21bde..3dafc6003b7c 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -282,8 +282,13 @@ void fixup_irqs(void)
282 else if (!(warned++)) 282 else if (!(warned++))
283 set_affinity = 0; 283 set_affinity = 0;
284 284
285 /*
286 * We unmask if the irq was not marked masked by the
287 * core code. That respects the lazy irq disable
288 * behaviour.
289 */
285 if (!irqd_can_move_in_process_context(data) && 290 if (!irqd_can_move_in_process_context(data) &&
286 !irqd_irq_disabled(data) && chip->irq_unmask) 291 !irqd_irq_masked(data) && chip->irq_unmask)
287 chip->irq_unmask(data); 292 chip->irq_unmask(data);
288 293
289 raw_spin_unlock(&desc->lock); 294 raw_spin_unlock(&desc->lock);
diff --git a/arch/x86/kernel/kdebugfs.c b/arch/x86/kernel/kdebugfs.c
index 90fcf62854bb..1d5d31ea686b 100644
--- a/arch/x86/kernel/kdebugfs.c
+++ b/arch/x86/kernel/kdebugfs.c
@@ -68,16 +68,9 @@ static ssize_t setup_data_read(struct file *file, char __user *user_buf,
68 return count; 68 return count;
69} 69}
70 70
71static int setup_data_open(struct inode *inode, struct file *file)
72{
73 file->private_data = inode->i_private;
74
75 return 0;
76}
77
78static const struct file_operations fops_setup_data = { 71static const struct file_operations fops_setup_data = {
79 .read = setup_data_read, 72 .read = setup_data_read,
80 .open = setup_data_open, 73 .open = simple_open,
81 .llseek = default_llseek, 74 .llseek = default_llseek,
82}; 75};
83 76
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index db6720edfdd0..8bfb6146f753 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -43,6 +43,8 @@
43#include <linux/smp.h> 43#include <linux/smp.h>
44#include <linux/nmi.h> 44#include <linux/nmi.h>
45#include <linux/hw_breakpoint.h> 45#include <linux/hw_breakpoint.h>
46#include <linux/uaccess.h>
47#include <linux/memory.h>
46 48
47#include <asm/debugreg.h> 49#include <asm/debugreg.h>
48#include <asm/apicdef.h> 50#include <asm/apicdef.h>
@@ -741,6 +743,64 @@ void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long ip)
741 regs->ip = ip; 743 regs->ip = ip;
742} 744}
743 745
746int kgdb_arch_set_breakpoint(struct kgdb_bkpt *bpt)
747{
748 int err;
749 char opc[BREAK_INSTR_SIZE];
750
751 bpt->type = BP_BREAKPOINT;
752 err = probe_kernel_read(bpt->saved_instr, (char *)bpt->bpt_addr,
753 BREAK_INSTR_SIZE);
754 if (err)
755 return err;
756 err = probe_kernel_write((char *)bpt->bpt_addr,
757 arch_kgdb_ops.gdb_bpt_instr, BREAK_INSTR_SIZE);
758#ifdef CONFIG_DEBUG_RODATA
759 if (!err)
760 return err;
761 /*
762 * It is safe to call text_poke() because normal kernel execution
763 * is stopped on all cores, so long as the text_mutex is not locked.
764 */
765 if (mutex_is_locked(&text_mutex))
766 return -EBUSY;
767 text_poke((void *)bpt->bpt_addr, arch_kgdb_ops.gdb_bpt_instr,
768 BREAK_INSTR_SIZE);
769 err = probe_kernel_read(opc, (char *)bpt->bpt_addr, BREAK_INSTR_SIZE);
770 if (err)
771 return err;
772 if (memcmp(opc, arch_kgdb_ops.gdb_bpt_instr, BREAK_INSTR_SIZE))
773 return -EINVAL;
774 bpt->type = BP_POKE_BREAKPOINT;
775#endif /* CONFIG_DEBUG_RODATA */
776 return err;
777}
778
779int kgdb_arch_remove_breakpoint(struct kgdb_bkpt *bpt)
780{
781#ifdef CONFIG_DEBUG_RODATA
782 int err;
783 char opc[BREAK_INSTR_SIZE];
784
785 if (bpt->type != BP_POKE_BREAKPOINT)
786 goto knl_write;
787 /*
788 * It is safe to call text_poke() because normal kernel execution
789 * is stopped on all cores, so long as the text_mutex is not locked.
790 */
791 if (mutex_is_locked(&text_mutex))
792 goto knl_write;
793 text_poke((void *)bpt->bpt_addr, bpt->saved_instr, BREAK_INSTR_SIZE);
794 err = probe_kernel_read(opc, (char *)bpt->bpt_addr, BREAK_INSTR_SIZE);
795 if (err || memcmp(opc, bpt->saved_instr, BREAK_INSTR_SIZE))
796 goto knl_write;
797 return err;
798knl_write:
799#endif /* CONFIG_DEBUG_RODATA */
800 return probe_kernel_write((char *)bpt->bpt_addr,
801 (char *)bpt->saved_instr, BREAK_INSTR_SIZE);
802}
803
744struct kgdb_arch arch_kgdb_ops = { 804struct kgdb_arch arch_kgdb_ops = {
745 /* Breakpoint instruction: */ 805 /* Breakpoint instruction: */
746 .gdb_bpt_instr = { 0xcc }, 806 .gdb_bpt_instr = { 0xcc },
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index 694d801bf606..b8ba6e4a27e4 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -38,6 +38,7 @@
38#include <asm/traps.h> 38#include <asm/traps.h>
39#include <asm/desc.h> 39#include <asm/desc.h>
40#include <asm/tlbflush.h> 40#include <asm/tlbflush.h>
41#include <asm/idle.h>
41 42
42static int kvmapf = 1; 43static int kvmapf = 1;
43 44
@@ -253,7 +254,10 @@ do_async_page_fault(struct pt_regs *regs, unsigned long error_code)
253 kvm_async_pf_task_wait((u32)read_cr2()); 254 kvm_async_pf_task_wait((u32)read_cr2());
254 break; 255 break;
255 case KVM_PV_REASON_PAGE_READY: 256 case KVM_PV_REASON_PAGE_READY:
257 rcu_irq_enter();
258 exit_idle();
256 kvm_async_pf_task_wake((u32)read_cr2()); 259 kvm_async_pf_task_wake((u32)read_cr2());
260 rcu_irq_exit();
257 break; 261 break;
258 } 262 }
259} 263}
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index 73465aab28f8..8a2ce8fd41c0 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -82,11 +82,6 @@ static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
82{ 82{
83 struct cpuinfo_x86 *c = &cpu_data(cpu); 83 struct cpuinfo_x86 *c = &cpu_data(cpu);
84 84
85 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
86 pr_warning("CPU%d: family %d not supported\n", cpu, c->x86);
87 return -1;
88 }
89
90 csig->rev = c->microcode; 85 csig->rev = c->microcode;
91 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev); 86 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
92 87
@@ -380,6 +375,13 @@ static struct microcode_ops microcode_amd_ops = {
380 375
381struct microcode_ops * __init init_amd_microcode(void) 376struct microcode_ops * __init init_amd_microcode(void)
382{ 377{
378 struct cpuinfo_x86 *c = &cpu_data(0);
379
380 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
381 pr_warning("AMD CPU family 0x%x not supported\n", c->x86);
382 return NULL;
383 }
384
383 patch = (void *)get_zeroed_page(GFP_KERNEL); 385 patch = (void *)get_zeroed_page(GFP_KERNEL);
384 if (!patch) 386 if (!patch)
385 return NULL; 387 return NULL;
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 87a0f8688301..c9bda6d6035c 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -419,10 +419,8 @@ static int mc_device_add(struct device *dev, struct subsys_interface *sif)
419 if (err) 419 if (err)
420 return err; 420 return err;
421 421
422 if (microcode_init_cpu(cpu) == UCODE_ERROR) { 422 if (microcode_init_cpu(cpu) == UCODE_ERROR)
423 sysfs_remove_group(&dev->kobj, &mc_attr_group);
424 return -EINVAL; 423 return -EINVAL;
425 }
426 424
427 return err; 425 return err;
428} 426}
@@ -528,11 +526,11 @@ static int __init microcode_init(void)
528 microcode_ops = init_intel_microcode(); 526 microcode_ops = init_intel_microcode();
529 else if (c->x86_vendor == X86_VENDOR_AMD) 527 else if (c->x86_vendor == X86_VENDOR_AMD)
530 microcode_ops = init_amd_microcode(); 528 microcode_ops = init_amd_microcode();
531 529 else
532 if (!microcode_ops) {
533 pr_err("no support for this CPU vendor\n"); 530 pr_err("no support for this CPU vendor\n");
531
532 if (!microcode_ops)
534 return -ENODEV; 533 return -ENODEV;
535 }
536 534
537 microcode_pdev = platform_device_register_simple("microcode", -1, 535 microcode_pdev = platform_device_register_simple("microcode", -1,
538 NULL, 0); 536 NULL, 0);
diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c
index 6ac5782f4d6b..d0b2fb9ccbb1 100644
--- a/arch/x86/kernel/pci-calgary_64.c
+++ b/arch/x86/kernel/pci-calgary_64.c
@@ -430,7 +430,7 @@ static void calgary_unmap_page(struct device *dev, dma_addr_t dma_addr,
430} 430}
431 431
432static void* calgary_alloc_coherent(struct device *dev, size_t size, 432static void* calgary_alloc_coherent(struct device *dev, size_t size,
433 dma_addr_t *dma_handle, gfp_t flag) 433 dma_addr_t *dma_handle, gfp_t flag, struct dma_attrs *attrs)
434{ 434{
435 void *ret = NULL; 435 void *ret = NULL;
436 dma_addr_t mapping; 436 dma_addr_t mapping;
@@ -463,7 +463,8 @@ error:
463} 463}
464 464
465static void calgary_free_coherent(struct device *dev, size_t size, 465static void calgary_free_coherent(struct device *dev, size_t size,
466 void *vaddr, dma_addr_t dma_handle) 466 void *vaddr, dma_addr_t dma_handle,
467 struct dma_attrs *attrs)
467{ 468{
468 unsigned int npages; 469 unsigned int npages;
469 struct iommu_table *tbl = find_iommu_table(dev); 470 struct iommu_table *tbl = find_iommu_table(dev);
@@ -476,8 +477,8 @@ static void calgary_free_coherent(struct device *dev, size_t size,
476} 477}
477 478
478static struct dma_map_ops calgary_dma_ops = { 479static struct dma_map_ops calgary_dma_ops = {
479 .alloc_coherent = calgary_alloc_coherent, 480 .alloc = calgary_alloc_coherent,
480 .free_coherent = calgary_free_coherent, 481 .free = calgary_free_coherent,
481 .map_sg = calgary_map_sg, 482 .map_sg = calgary_map_sg,
482 .unmap_sg = calgary_unmap_sg, 483 .unmap_sg = calgary_unmap_sg,
483 .map_page = calgary_map_page, 484 .map_page = calgary_map_page,
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 28e5e06fcba4..3003250ac51d 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -96,7 +96,8 @@ void __init pci_iommu_alloc(void)
96 } 96 }
97} 97}
98void *dma_generic_alloc_coherent(struct device *dev, size_t size, 98void *dma_generic_alloc_coherent(struct device *dev, size_t size,
99 dma_addr_t *dma_addr, gfp_t flag) 99 dma_addr_t *dma_addr, gfp_t flag,
100 struct dma_attrs *attrs)
100{ 101{
101 unsigned long dma_mask; 102 unsigned long dma_mask;
102 struct page *page; 103 struct page *page;
diff --git a/arch/x86/kernel/pci-nommu.c b/arch/x86/kernel/pci-nommu.c
index 3af4af810c07..f96050685b46 100644
--- a/arch/x86/kernel/pci-nommu.c
+++ b/arch/x86/kernel/pci-nommu.c
@@ -75,7 +75,7 @@ static int nommu_map_sg(struct device *hwdev, struct scatterlist *sg,
75} 75}
76 76
77static void nommu_free_coherent(struct device *dev, size_t size, void *vaddr, 77static void nommu_free_coherent(struct device *dev, size_t size, void *vaddr,
78 dma_addr_t dma_addr) 78 dma_addr_t dma_addr, struct dma_attrs *attrs)
79{ 79{
80 free_pages((unsigned long)vaddr, get_order(size)); 80 free_pages((unsigned long)vaddr, get_order(size));
81} 81}
@@ -96,8 +96,8 @@ static void nommu_sync_sg_for_device(struct device *dev,
96} 96}
97 97
98struct dma_map_ops nommu_dma_ops = { 98struct dma_map_ops nommu_dma_ops = {
99 .alloc_coherent = dma_generic_alloc_coherent, 99 .alloc = dma_generic_alloc_coherent,
100 .free_coherent = nommu_free_coherent, 100 .free = nommu_free_coherent,
101 .map_sg = nommu_map_sg, 101 .map_sg = nommu_map_sg,
102 .map_page = nommu_map_page, 102 .map_page = nommu_map_page,
103 .sync_single_for_device = nommu_sync_single_for_device, 103 .sync_single_for_device = nommu_sync_single_for_device,
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 8f972cbddef0..6c483ba98b9c 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -15,21 +15,30 @@
15int swiotlb __read_mostly; 15int swiotlb __read_mostly;
16 16
17static void *x86_swiotlb_alloc_coherent(struct device *hwdev, size_t size, 17static void *x86_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
18 dma_addr_t *dma_handle, gfp_t flags) 18 dma_addr_t *dma_handle, gfp_t flags,
19 struct dma_attrs *attrs)
19{ 20{
20 void *vaddr; 21 void *vaddr;
21 22
22 vaddr = dma_generic_alloc_coherent(hwdev, size, dma_handle, flags); 23 vaddr = dma_generic_alloc_coherent(hwdev, size, dma_handle, flags,
24 attrs);
23 if (vaddr) 25 if (vaddr)
24 return vaddr; 26 return vaddr;
25 27
26 return swiotlb_alloc_coherent(hwdev, size, dma_handle, flags); 28 return swiotlb_alloc_coherent(hwdev, size, dma_handle, flags);
27} 29}
28 30
31static void x86_swiotlb_free_coherent(struct device *dev, size_t size,
32 void *vaddr, dma_addr_t dma_addr,
33 struct dma_attrs *attrs)
34{
35 swiotlb_free_coherent(dev, size, vaddr, dma_addr);
36}
37
29static struct dma_map_ops swiotlb_dma_ops = { 38static struct dma_map_ops swiotlb_dma_ops = {
30 .mapping_error = swiotlb_dma_mapping_error, 39 .mapping_error = swiotlb_dma_mapping_error,
31 .alloc_coherent = x86_swiotlb_alloc_coherent, 40 .alloc = x86_swiotlb_alloc_coherent,
32 .free_coherent = swiotlb_free_coherent, 41 .free = x86_swiotlb_free_coherent,
33 .sync_single_for_cpu = swiotlb_sync_single_for_cpu, 42 .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
34 .sync_single_for_device = swiotlb_sync_single_for_device, 43 .sync_single_for_device = swiotlb_sync_single_for_device,
35 .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, 44 .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index a33afaa5ddb7..1d92a5ab6e8b 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -362,34 +362,10 @@ void (*pm_idle)(void);
362EXPORT_SYMBOL(pm_idle); 362EXPORT_SYMBOL(pm_idle);
363#endif 363#endif
364 364
365#ifdef CONFIG_X86_32
366/*
367 * This halt magic was a workaround for ancient floppy DMA
368 * wreckage. It should be safe to remove.
369 */
370static int hlt_counter;
371void disable_hlt(void)
372{
373 hlt_counter++;
374}
375EXPORT_SYMBOL(disable_hlt);
376
377void enable_hlt(void)
378{
379 hlt_counter--;
380}
381EXPORT_SYMBOL(enable_hlt);
382
383static inline int hlt_use_halt(void)
384{
385 return (!hlt_counter && boot_cpu_data.hlt_works_ok);
386}
387#else
388static inline int hlt_use_halt(void) 365static inline int hlt_use_halt(void)
389{ 366{
390 return 1; 367 return 1;
391} 368}
392#endif
393 369
394#ifndef CONFIG_SMP 370#ifndef CONFIG_SMP
395static inline void play_dead(void) 371static inline void play_dead(void)
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index f386dc49f988..7515cf0e1805 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -216,9 +216,9 @@ bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
216 current_thread_info()->sig_on_uaccess_error = 1; 216 current_thread_info()->sig_on_uaccess_error = 1;
217 217
218 /* 218 /*
219 * 0 is a valid user pointer (in the access_ok sense) on 32-bit and 219 * NULL is a valid user pointer (in the access_ok sense) on 32-bit and
220 * 64-bit, so we don't need to special-case it here. For all the 220 * 64-bit, so we don't need to special-case it here. For all the
221 * vsyscalls, 0 means "don't write anything" not "write it at 221 * vsyscalls, NULL means "don't write anything" not "write it at
222 * address 0". 222 * address 0".
223 */ 223 */
224 ret = -EFAULT; 224 ret = -EFAULT;
@@ -247,7 +247,7 @@ bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
247 247
248 ret = sys_getcpu((unsigned __user *)regs->di, 248 ret = sys_getcpu((unsigned __user *)regs->di,
249 (unsigned __user *)regs->si, 249 (unsigned __user *)regs->si,
250 0); 250 NULL);
251 break; 251 break;
252 } 252 }
253 253
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index e9f265fd79ae..9cf71d0b2d37 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -93,7 +93,6 @@ struct x86_init_ops x86_init __initdata = {
93struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = { 93struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = {
94 .early_percpu_clock_init = x86_init_noop, 94 .early_percpu_clock_init = x86_init_noop,
95 .setup_percpu_clockev = setup_secondary_APIC_clock, 95 .setup_percpu_clockev = setup_secondary_APIC_clock,
96 .fixup_cpu_id = x86_default_fixup_cpu_id,
97}; 96};
98 97
99static void default_nmi_init(void) { }; 98static void default_nmi_init(void) { };
diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
index a73f0c104813..2e88438ffd83 100644
--- a/arch/x86/kvm/pmu.c
+++ b/arch/x86/kvm/pmu.c
@@ -369,7 +369,7 @@ int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
369 case MSR_CORE_PERF_FIXED_CTR_CTRL: 369 case MSR_CORE_PERF_FIXED_CTR_CTRL:
370 if (pmu->fixed_ctr_ctrl == data) 370 if (pmu->fixed_ctr_ctrl == data)
371 return 0; 371 return 0;
372 if (!(data & 0xfffffffffffff444)) { 372 if (!(data & 0xfffffffffffff444ull)) {
373 reprogram_fixed_counters(pmu, data); 373 reprogram_fixed_counters(pmu, data);
374 return 0; 374 return 0;
375 } 375 }
@@ -459,17 +459,17 @@ void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu)
459 pmu->available_event_types = ~entry->ebx & ((1ull << bitmap_len) - 1); 459 pmu->available_event_types = ~entry->ebx & ((1ull << bitmap_len) - 1);
460 460
461 if (pmu->version == 1) { 461 if (pmu->version == 1) {
462 pmu->global_ctrl = (1 << pmu->nr_arch_gp_counters) - 1; 462 pmu->nr_arch_fixed_counters = 0;
463 return; 463 } else {
464 pmu->nr_arch_fixed_counters = min((int)(entry->edx & 0x1f),
465 X86_PMC_MAX_FIXED);
466 pmu->counter_bitmask[KVM_PMC_FIXED] =
467 ((u64)1 << ((entry->edx >> 5) & 0xff)) - 1;
464 } 468 }
465 469
466 pmu->nr_arch_fixed_counters = min((int)(entry->edx & 0x1f), 470 pmu->global_ctrl = ((1 << pmu->nr_arch_gp_counters) - 1) |
467 X86_PMC_MAX_FIXED); 471 (((1ull << pmu->nr_arch_fixed_counters) - 1) << X86_PMC_IDX_FIXED);
468 pmu->counter_bitmask[KVM_PMC_FIXED] = 472 pmu->global_ctrl_mask = ~pmu->global_ctrl;
469 ((u64)1 << ((entry->edx >> 5) & 0xff)) - 1;
470 pmu->global_ctrl_mask = ~(((1 << pmu->nr_arch_gp_counters) - 1)
471 | (((1ull << pmu->nr_arch_fixed_counters) - 1)
472 << X86_PMC_IDX_FIXED));
473} 473}
474 474
475void kvm_pmu_init(struct kvm_vcpu *vcpu) 475void kvm_pmu_init(struct kvm_vcpu *vcpu)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 280751c84724..4ff0ab9bc3c8 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -2210,9 +2210,12 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
2210 msr = find_msr_entry(vmx, msr_index); 2210 msr = find_msr_entry(vmx, msr_index);
2211 if (msr) { 2211 if (msr) {
2212 msr->data = data; 2212 msr->data = data;
2213 if (msr - vmx->guest_msrs < vmx->save_nmsrs) 2213 if (msr - vmx->guest_msrs < vmx->save_nmsrs) {
2214 preempt_disable();
2214 kvm_set_shared_msr(msr->index, msr->data, 2215 kvm_set_shared_msr(msr->index, msr->data,
2215 msr->mask); 2216 msr->mask);
2217 preempt_enable();
2218 }
2216 break; 2219 break;
2217 } 2220 }
2218 ret = kvm_set_msr_common(vcpu, msr_index, data); 2221 ret = kvm_set_msr_common(vcpu, msr_index, data);
@@ -3906,7 +3909,9 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
3906 vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid); 3909 vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid);
3907 3910
3908 vmx->vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET; 3911 vmx->vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET;
3912 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
3909 vmx_set_cr0(&vmx->vcpu, kvm_read_cr0(vcpu)); /* enter rmode */ 3913 vmx_set_cr0(&vmx->vcpu, kvm_read_cr0(vcpu)); /* enter rmode */
3914 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
3910 vmx_set_cr4(&vmx->vcpu, 0); 3915 vmx_set_cr4(&vmx->vcpu, 0);
3911 vmx_set_efer(&vmx->vcpu, 0); 3916 vmx_set_efer(&vmx->vcpu, 0);
3912 vmx_fpu_activate(&vmx->vcpu); 3917 vmx_fpu_activate(&vmx->vcpu);
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 4044ce0bf7c1..91a5e989abcf 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -6336,13 +6336,11 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
6336 if (npages && !old.rmap) { 6336 if (npages && !old.rmap) {
6337 unsigned long userspace_addr; 6337 unsigned long userspace_addr;
6338 6338
6339 down_write(&current->mm->mmap_sem); 6339 userspace_addr = vm_mmap(NULL, 0,
6340 userspace_addr = do_mmap(NULL, 0,
6341 npages * PAGE_SIZE, 6340 npages * PAGE_SIZE,
6342 PROT_READ | PROT_WRITE, 6341 PROT_READ | PROT_WRITE,
6343 map_flags, 6342 map_flags,
6344 0); 6343 0);
6345 up_write(&current->mm->mmap_sem);
6346 6344
6347 if (IS_ERR((void *)userspace_addr)) 6345 if (IS_ERR((void *)userspace_addr))
6348 return PTR_ERR((void *)userspace_addr); 6346 return PTR_ERR((void *)userspace_addr);
@@ -6366,10 +6364,8 @@ void kvm_arch_commit_memory_region(struct kvm *kvm,
6366 if (!user_alloc && !old.user_alloc && old.rmap && !npages) { 6364 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6367 int ret; 6365 int ret;
6368 6366
6369 down_write(&current->mm->mmap_sem); 6367 ret = vm_munmap(old.userspace_addr,
6370 ret = do_munmap(current->mm, old.userspace_addr,
6371 old.npages * PAGE_SIZE); 6368 old.npages * PAGE_SIZE);
6372 up_write(&current->mm->mmap_sem);
6373 if (ret < 0) 6369 if (ret < 0)
6374 printk(KERN_WARNING 6370 printk(KERN_WARNING
6375 "kvm_vm_ioctl_set_memory_region: " 6371 "kvm_vm_ioctl_set_memory_region: "
diff --git a/arch/x86/lib/insn.c b/arch/x86/lib/insn.c
index 25feb1ae71c5..b1e6c4b2e8eb 100644
--- a/arch/x86/lib/insn.c
+++ b/arch/x86/lib/insn.c
@@ -379,8 +379,8 @@ err_out:
379 return; 379 return;
380} 380}
381 381
382/* Decode moffset16/32/64 */ 382/* Decode moffset16/32/64. Return 0 if failed */
383static void __get_moffset(struct insn *insn) 383static int __get_moffset(struct insn *insn)
384{ 384{
385 switch (insn->addr_bytes) { 385 switch (insn->addr_bytes) {
386 case 2: 386 case 2:
@@ -397,15 +397,19 @@ static void __get_moffset(struct insn *insn)
397 insn->moffset2.value = get_next(int, insn); 397 insn->moffset2.value = get_next(int, insn);
398 insn->moffset2.nbytes = 4; 398 insn->moffset2.nbytes = 4;
399 break; 399 break;
400 default: /* opnd_bytes must be modified manually */
401 goto err_out;
400 } 402 }
401 insn->moffset1.got = insn->moffset2.got = 1; 403 insn->moffset1.got = insn->moffset2.got = 1;
402 404
405 return 1;
406
403err_out: 407err_out:
404 return; 408 return 0;
405} 409}
406 410
407/* Decode imm v32(Iz) */ 411/* Decode imm v32(Iz). Return 0 if failed */
408static void __get_immv32(struct insn *insn) 412static int __get_immv32(struct insn *insn)
409{ 413{
410 switch (insn->opnd_bytes) { 414 switch (insn->opnd_bytes) {
411 case 2: 415 case 2:
@@ -417,14 +421,18 @@ static void __get_immv32(struct insn *insn)
417 insn->immediate.value = get_next(int, insn); 421 insn->immediate.value = get_next(int, insn);
418 insn->immediate.nbytes = 4; 422 insn->immediate.nbytes = 4;
419 break; 423 break;
424 default: /* opnd_bytes must be modified manually */
425 goto err_out;
420 } 426 }
421 427
428 return 1;
429
422err_out: 430err_out:
423 return; 431 return 0;
424} 432}
425 433
426/* Decode imm v64(Iv/Ov) */ 434/* Decode imm v64(Iv/Ov), Return 0 if failed */
427static void __get_immv(struct insn *insn) 435static int __get_immv(struct insn *insn)
428{ 436{
429 switch (insn->opnd_bytes) { 437 switch (insn->opnd_bytes) {
430 case 2: 438 case 2:
@@ -441,15 +449,18 @@ static void __get_immv(struct insn *insn)
441 insn->immediate2.value = get_next(int, insn); 449 insn->immediate2.value = get_next(int, insn);
442 insn->immediate2.nbytes = 4; 450 insn->immediate2.nbytes = 4;
443 break; 451 break;
452 default: /* opnd_bytes must be modified manually */
453 goto err_out;
444 } 454 }
445 insn->immediate1.got = insn->immediate2.got = 1; 455 insn->immediate1.got = insn->immediate2.got = 1;
446 456
457 return 1;
447err_out: 458err_out:
448 return; 459 return 0;
449} 460}
450 461
451/* Decode ptr16:16/32(Ap) */ 462/* Decode ptr16:16/32(Ap) */
452static void __get_immptr(struct insn *insn) 463static int __get_immptr(struct insn *insn)
453{ 464{
454 switch (insn->opnd_bytes) { 465 switch (insn->opnd_bytes) {
455 case 2: 466 case 2:
@@ -462,14 +473,17 @@ static void __get_immptr(struct insn *insn)
462 break; 473 break;
463 case 8: 474 case 8:
464 /* ptr16:64 is not exist (no segment) */ 475 /* ptr16:64 is not exist (no segment) */
465 return; 476 return 0;
477 default: /* opnd_bytes must be modified manually */
478 goto err_out;
466 } 479 }
467 insn->immediate2.value = get_next(unsigned short, insn); 480 insn->immediate2.value = get_next(unsigned short, insn);
468 insn->immediate2.nbytes = 2; 481 insn->immediate2.nbytes = 2;
469 insn->immediate1.got = insn->immediate2.got = 1; 482 insn->immediate1.got = insn->immediate2.got = 1;
470 483
484 return 1;
471err_out: 485err_out:
472 return; 486 return 0;
473} 487}
474 488
475/** 489/**
@@ -489,7 +503,8 @@ void insn_get_immediate(struct insn *insn)
489 insn_get_displacement(insn); 503 insn_get_displacement(insn);
490 504
491 if (inat_has_moffset(insn->attr)) { 505 if (inat_has_moffset(insn->attr)) {
492 __get_moffset(insn); 506 if (!__get_moffset(insn))
507 goto err_out;
493 goto done; 508 goto done;
494 } 509 }
495 510
@@ -517,16 +532,20 @@ void insn_get_immediate(struct insn *insn)
517 insn->immediate2.nbytes = 4; 532 insn->immediate2.nbytes = 4;
518 break; 533 break;
519 case INAT_IMM_PTR: 534 case INAT_IMM_PTR:
520 __get_immptr(insn); 535 if (!__get_immptr(insn))
536 goto err_out;
521 break; 537 break;
522 case INAT_IMM_VWORD32: 538 case INAT_IMM_VWORD32:
523 __get_immv32(insn); 539 if (!__get_immv32(insn))
540 goto err_out;
524 break; 541 break;
525 case INAT_IMM_VWORD: 542 case INAT_IMM_VWORD:
526 __get_immv(insn); 543 if (!__get_immv(insn))
544 goto err_out;
527 break; 545 break;
528 default: 546 default:
529 break; 547 /* Here, insn must have an immediate, but failed */
548 goto err_out;
530 } 549 }
531 if (inat_has_second_immediate(insn->attr)) { 550 if (inat_has_second_immediate(insn->attr)) {
532 insn->immediate2.value = get_next(char, insn); 551 insn->immediate2.value = get_next(char, insn);
diff --git a/arch/x86/lib/usercopy.c b/arch/x86/lib/usercopy.c
index 97be9cb54483..d6ae30bbd7bb 100644
--- a/arch/x86/lib/usercopy.c
+++ b/arch/x86/lib/usercopy.c
@@ -7,6 +7,8 @@
7#include <linux/highmem.h> 7#include <linux/highmem.h>
8#include <linux/module.h> 8#include <linux/module.h>
9 9
10#include <asm/word-at-a-time.h>
11
10/* 12/*
11 * best effort, GUP based copy_from_user() that is NMI-safe 13 * best effort, GUP based copy_from_user() that is NMI-safe
12 */ 14 */
@@ -41,3 +43,104 @@ copy_from_user_nmi(void *to, const void __user *from, unsigned long n)
41 return len; 43 return len;
42} 44}
43EXPORT_SYMBOL_GPL(copy_from_user_nmi); 45EXPORT_SYMBOL_GPL(copy_from_user_nmi);
46
47static inline unsigned long count_bytes(unsigned long mask)
48{
49 mask = (mask - 1) & ~mask;
50 mask >>= 7;
51 return count_masked_bytes(mask);
52}
53
54/*
55 * Do a strncpy, return length of string without final '\0'.
56 * 'count' is the user-supplied count (return 'count' if we
57 * hit it), 'max' is the address space maximum (and we return
58 * -EFAULT if we hit it).
59 */
60static inline long do_strncpy_from_user(char *dst, const char __user *src, long count, unsigned long max)
61{
62 long res = 0;
63
64 /*
65 * Truncate 'max' to the user-specified limit, so that
66 * we only have one limit we need to check in the loop
67 */
68 if (max > count)
69 max = count;
70
71 while (max >= sizeof(unsigned long)) {
72 unsigned long c;
73
74 /* Fall back to byte-at-a-time if we get a page fault */
75 if (unlikely(__get_user(c,(unsigned long __user *)(src+res))))
76 break;
77 /* This can write a few bytes past the NUL character, but that's ok */
78 *(unsigned long *)(dst+res) = c;
79 c = has_zero(c);
80 if (c)
81 return res + count_bytes(c);
82 res += sizeof(unsigned long);
83 max -= sizeof(unsigned long);
84 }
85
86 while (max) {
87 char c;
88
89 if (unlikely(__get_user(c,src+res)))
90 return -EFAULT;
91 dst[res] = c;
92 if (!c)
93 return res;
94 res++;
95 max--;
96 }
97
98 /*
99 * Uhhuh. We hit 'max'. But was that the user-specified maximum
100 * too? If so, that's ok - we got as much as the user asked for.
101 */
102 if (res >= count)
103 return res;
104
105 /*
106 * Nope: we hit the address space limit, and we still had more
107 * characters the caller would have wanted. That's an EFAULT.
108 */
109 return -EFAULT;
110}
111
112/**
113 * strncpy_from_user: - Copy a NUL terminated string from userspace.
114 * @dst: Destination address, in kernel space. This buffer must be at
115 * least @count bytes long.
116 * @src: Source address, in user space.
117 * @count: Maximum number of bytes to copy, including the trailing NUL.
118 *
119 * Copies a NUL-terminated string from userspace to kernel space.
120 *
121 * On success, returns the length of the string (not including the trailing
122 * NUL).
123 *
124 * If access to userspace fails, returns -EFAULT (some data may have been
125 * copied).
126 *
127 * If @count is smaller than the length of the string, copies @count bytes
128 * and returns @count.
129 */
130long
131strncpy_from_user(char *dst, const char __user *src, long count)
132{
133 unsigned long max_addr, src_addr;
134
135 if (unlikely(count <= 0))
136 return 0;
137
138 max_addr = current_thread_info()->addr_limit.seg;
139 src_addr = (unsigned long)src;
140 if (likely(src_addr < max_addr)) {
141 unsigned long max = max_addr - src_addr;
142 return do_strncpy_from_user(dst, src, count, max);
143 }
144 return -EFAULT;
145}
146EXPORT_SYMBOL(strncpy_from_user);
diff --git a/arch/x86/lib/usercopy_32.c b/arch/x86/lib/usercopy_32.c
index d9b094ca7aaa..ef2a6a5d78e3 100644
--- a/arch/x86/lib/usercopy_32.c
+++ b/arch/x86/lib/usercopy_32.c
@@ -33,93 +33,6 @@ static inline int __movsl_is_ok(unsigned long a1, unsigned long a2, unsigned lon
33 __movsl_is_ok((unsigned long)(a1), (unsigned long)(a2), (n)) 33 __movsl_is_ok((unsigned long)(a1), (unsigned long)(a2), (n))
34 34
35/* 35/*
36 * Copy a null terminated string from userspace.
37 */
38
39#define __do_strncpy_from_user(dst, src, count, res) \
40do { \
41 int __d0, __d1, __d2; \
42 might_fault(); \
43 __asm__ __volatile__( \
44 " testl %1,%1\n" \
45 " jz 2f\n" \
46 "0: lodsb\n" \
47 " stosb\n" \
48 " testb %%al,%%al\n" \
49 " jz 1f\n" \
50 " decl %1\n" \
51 " jnz 0b\n" \
52 "1: subl %1,%0\n" \
53 "2:\n" \
54 ".section .fixup,\"ax\"\n" \
55 "3: movl %5,%0\n" \
56 " jmp 2b\n" \
57 ".previous\n" \
58 _ASM_EXTABLE(0b,3b) \
59 : "=&d"(res), "=&c"(count), "=&a" (__d0), "=&S" (__d1), \
60 "=&D" (__d2) \
61 : "i"(-EFAULT), "0"(count), "1"(count), "3"(src), "4"(dst) \
62 : "memory"); \
63} while (0)
64
65/**
66 * __strncpy_from_user: - Copy a NUL terminated string from userspace, with less checking.
67 * @dst: Destination address, in kernel space. This buffer must be at
68 * least @count bytes long.
69 * @src: Source address, in user space.
70 * @count: Maximum number of bytes to copy, including the trailing NUL.
71 *
72 * Copies a NUL-terminated string from userspace to kernel space.
73 * Caller must check the specified block with access_ok() before calling
74 * this function.
75 *
76 * On success, returns the length of the string (not including the trailing
77 * NUL).
78 *
79 * If access to userspace fails, returns -EFAULT (some data may have been
80 * copied).
81 *
82 * If @count is smaller than the length of the string, copies @count bytes
83 * and returns @count.
84 */
85long
86__strncpy_from_user(char *dst, const char __user *src, long count)
87{
88 long res;
89 __do_strncpy_from_user(dst, src, count, res);
90 return res;
91}
92EXPORT_SYMBOL(__strncpy_from_user);
93
94/**
95 * strncpy_from_user: - Copy a NUL terminated string from userspace.
96 * @dst: Destination address, in kernel space. This buffer must be at
97 * least @count bytes long.
98 * @src: Source address, in user space.
99 * @count: Maximum number of bytes to copy, including the trailing NUL.
100 *
101 * Copies a NUL-terminated string from userspace to kernel space.
102 *
103 * On success, returns the length of the string (not including the trailing
104 * NUL).
105 *
106 * If access to userspace fails, returns -EFAULT (some data may have been
107 * copied).
108 *
109 * If @count is smaller than the length of the string, copies @count bytes
110 * and returns @count.
111 */
112long
113strncpy_from_user(char *dst, const char __user *src, long count)
114{
115 long res = -EFAULT;
116 if (access_ok(VERIFY_READ, src, 1))
117 __do_strncpy_from_user(dst, src, count, res);
118 return res;
119}
120EXPORT_SYMBOL(strncpy_from_user);
121
122/*
123 * Zero Userspace 36 * Zero Userspace
124 */ 37 */
125 38
diff --git a/arch/x86/lib/usercopy_64.c b/arch/x86/lib/usercopy_64.c
index b7c2849ffb66..0d0326f388c0 100644
--- a/arch/x86/lib/usercopy_64.c
+++ b/arch/x86/lib/usercopy_64.c
@@ -9,55 +9,6 @@
9#include <asm/uaccess.h> 9#include <asm/uaccess.h>
10 10
11/* 11/*
12 * Copy a null terminated string from userspace.
13 */
14
15#define __do_strncpy_from_user(dst,src,count,res) \
16do { \
17 long __d0, __d1, __d2; \
18 might_fault(); \
19 __asm__ __volatile__( \
20 " testq %1,%1\n" \
21 " jz 2f\n" \
22 "0: lodsb\n" \
23 " stosb\n" \
24 " testb %%al,%%al\n" \
25 " jz 1f\n" \
26 " decq %1\n" \
27 " jnz 0b\n" \
28 "1: subq %1,%0\n" \
29 "2:\n" \
30 ".section .fixup,\"ax\"\n" \
31 "3: movq %5,%0\n" \
32 " jmp 2b\n" \
33 ".previous\n" \
34 _ASM_EXTABLE(0b,3b) \
35 : "=&r"(res), "=&c"(count), "=&a" (__d0), "=&S" (__d1), \
36 "=&D" (__d2) \
37 : "i"(-EFAULT), "0"(count), "1"(count), "3"(src), "4"(dst) \
38 : "memory"); \
39} while (0)
40
41long
42__strncpy_from_user(char *dst, const char __user *src, long count)
43{
44 long res;
45 __do_strncpy_from_user(dst, src, count, res);
46 return res;
47}
48EXPORT_SYMBOL(__strncpy_from_user);
49
50long
51strncpy_from_user(char *dst, const char __user *src, long count)
52{
53 long res = -EFAULT;
54 if (access_ok(VERIFY_READ, src, 1))
55 return __strncpy_from_user(dst, src, count);
56 return res;
57}
58EXPORT_SYMBOL(strncpy_from_user);
59
60/*
61 * Zero Userspace 12 * Zero Userspace
62 */ 13 */
63 14
diff --git a/arch/x86/net/bpf_jit.S b/arch/x86/net/bpf_jit.S
index 66870223f8c5..877b9a1b2152 100644
--- a/arch/x86/net/bpf_jit.S
+++ b/arch/x86/net/bpf_jit.S
@@ -18,17 +18,17 @@
18 * r9d : hlen = skb->len - skb->data_len 18 * r9d : hlen = skb->len - skb->data_len
19 */ 19 */
20#define SKBDATA %r8 20#define SKBDATA %r8
21 21#define SKF_MAX_NEG_OFF $(-0x200000) /* SKF_LL_OFF from filter.h */
22sk_load_word_ind:
23 .globl sk_load_word_ind
24
25 add %ebx,%esi /* offset += X */
26# test %esi,%esi /* if (offset < 0) goto bpf_error; */
27 js bpf_error
28 22
29sk_load_word: 23sk_load_word:
30 .globl sk_load_word 24 .globl sk_load_word
31 25
26 test %esi,%esi
27 js bpf_slow_path_word_neg
28
29sk_load_word_positive_offset:
30 .globl sk_load_word_positive_offset
31
32 mov %r9d,%eax # hlen 32 mov %r9d,%eax # hlen
33 sub %esi,%eax # hlen - offset 33 sub %esi,%eax # hlen - offset
34 cmp $3,%eax 34 cmp $3,%eax
@@ -37,16 +37,15 @@ sk_load_word:
37 bswap %eax /* ntohl() */ 37 bswap %eax /* ntohl() */
38 ret 38 ret
39 39
40
41sk_load_half_ind:
42 .globl sk_load_half_ind
43
44 add %ebx,%esi /* offset += X */
45 js bpf_error
46
47sk_load_half: 40sk_load_half:
48 .globl sk_load_half 41 .globl sk_load_half
49 42
43 test %esi,%esi
44 js bpf_slow_path_half_neg
45
46sk_load_half_positive_offset:
47 .globl sk_load_half_positive_offset
48
50 mov %r9d,%eax 49 mov %r9d,%eax
51 sub %esi,%eax # hlen - offset 50 sub %esi,%eax # hlen - offset
52 cmp $1,%eax 51 cmp $1,%eax
@@ -55,14 +54,15 @@ sk_load_half:
55 rol $8,%ax # ntohs() 54 rol $8,%ax # ntohs()
56 ret 55 ret
57 56
58sk_load_byte_ind:
59 .globl sk_load_byte_ind
60 add %ebx,%esi /* offset += X */
61 js bpf_error
62
63sk_load_byte: 57sk_load_byte:
64 .globl sk_load_byte 58 .globl sk_load_byte
65 59
60 test %esi,%esi
61 js bpf_slow_path_byte_neg
62
63sk_load_byte_positive_offset:
64 .globl sk_load_byte_positive_offset
65
66 cmp %esi,%r9d /* if (offset >= hlen) goto bpf_slow_path_byte */ 66 cmp %esi,%r9d /* if (offset >= hlen) goto bpf_slow_path_byte */
67 jle bpf_slow_path_byte 67 jle bpf_slow_path_byte
68 movzbl (SKBDATA,%rsi),%eax 68 movzbl (SKBDATA,%rsi),%eax
@@ -73,25 +73,21 @@ sk_load_byte:
73 * 73 *
74 * Implements BPF_S_LDX_B_MSH : ldxb 4*([offset]&0xf) 74 * Implements BPF_S_LDX_B_MSH : ldxb 4*([offset]&0xf)
75 * Must preserve A accumulator (%eax) 75 * Must preserve A accumulator (%eax)
76 * Inputs : %esi is the offset value, already known positive 76 * Inputs : %esi is the offset value
77 */ 77 */
78ENTRY(sk_load_byte_msh) 78sk_load_byte_msh:
79 CFI_STARTPROC 79 .globl sk_load_byte_msh
80 test %esi,%esi
81 js bpf_slow_path_byte_msh_neg
82
83sk_load_byte_msh_positive_offset:
84 .globl sk_load_byte_msh_positive_offset
80 cmp %esi,%r9d /* if (offset >= hlen) goto bpf_slow_path_byte_msh */ 85 cmp %esi,%r9d /* if (offset >= hlen) goto bpf_slow_path_byte_msh */
81 jle bpf_slow_path_byte_msh 86 jle bpf_slow_path_byte_msh
82 movzbl (SKBDATA,%rsi),%ebx 87 movzbl (SKBDATA,%rsi),%ebx
83 and $15,%bl 88 and $15,%bl
84 shl $2,%bl 89 shl $2,%bl
85 ret 90 ret
86 CFI_ENDPROC
87ENDPROC(sk_load_byte_msh)
88
89bpf_error:
90# force a return 0 from jit handler
91 xor %eax,%eax
92 mov -8(%rbp),%rbx
93 leaveq
94 ret
95 91
96/* rsi contains offset and can be scratched */ 92/* rsi contains offset and can be scratched */
97#define bpf_slow_path_common(LEN) \ 93#define bpf_slow_path_common(LEN) \
@@ -138,3 +134,67 @@ bpf_slow_path_byte_msh:
138 shl $2,%al 134 shl $2,%al
139 xchg %eax,%ebx 135 xchg %eax,%ebx
140 ret 136 ret
137
138#define sk_negative_common(SIZE) \
139 push %rdi; /* save skb */ \
140 push %r9; \
141 push SKBDATA; \
142/* rsi already has offset */ \
143 mov $SIZE,%ecx; /* size */ \
144 call bpf_internal_load_pointer_neg_helper; \
145 test %rax,%rax; \
146 pop SKBDATA; \
147 pop %r9; \
148 pop %rdi; \
149 jz bpf_error
150
151
152bpf_slow_path_word_neg:
153 cmp SKF_MAX_NEG_OFF, %esi /* test range */
154 jl bpf_error /* offset lower -> error */
155sk_load_word_negative_offset:
156 .globl sk_load_word_negative_offset
157 sk_negative_common(4)
158 mov (%rax), %eax
159 bswap %eax
160 ret
161
162bpf_slow_path_half_neg:
163 cmp SKF_MAX_NEG_OFF, %esi
164 jl bpf_error
165sk_load_half_negative_offset:
166 .globl sk_load_half_negative_offset
167 sk_negative_common(2)
168 mov (%rax),%ax
169 rol $8,%ax
170 movzwl %ax,%eax
171 ret
172
173bpf_slow_path_byte_neg:
174 cmp SKF_MAX_NEG_OFF, %esi
175 jl bpf_error
176sk_load_byte_negative_offset:
177 .globl sk_load_byte_negative_offset
178 sk_negative_common(1)
179 movzbl (%rax), %eax
180 ret
181
182bpf_slow_path_byte_msh_neg:
183 cmp SKF_MAX_NEG_OFF, %esi
184 jl bpf_error
185sk_load_byte_msh_negative_offset:
186 .globl sk_load_byte_msh_negative_offset
187 xchg %eax,%ebx /* dont lose A , X is about to be scratched */
188 sk_negative_common(1)
189 movzbl (%rax),%eax
190 and $15,%al
191 shl $2,%al
192 xchg %eax,%ebx
193 ret
194
195bpf_error:
196# force a return 0 from jit handler
197 xor %eax,%eax
198 mov -8(%rbp),%rbx
199 leaveq
200 ret
diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
index 5671752f8d9c..0597f95b6da6 100644
--- a/arch/x86/net/bpf_jit_comp.c
+++ b/arch/x86/net/bpf_jit_comp.c
@@ -30,7 +30,10 @@ int bpf_jit_enable __read_mostly;
30 * assembly code in arch/x86/net/bpf_jit.S 30 * assembly code in arch/x86/net/bpf_jit.S
31 */ 31 */
32extern u8 sk_load_word[], sk_load_half[], sk_load_byte[], sk_load_byte_msh[]; 32extern u8 sk_load_word[], sk_load_half[], sk_load_byte[], sk_load_byte_msh[];
33extern u8 sk_load_word_ind[], sk_load_half_ind[], sk_load_byte_ind[]; 33extern u8 sk_load_word_positive_offset[], sk_load_half_positive_offset[];
34extern u8 sk_load_byte_positive_offset[], sk_load_byte_msh_positive_offset[];
35extern u8 sk_load_word_negative_offset[], sk_load_half_negative_offset[];
36extern u8 sk_load_byte_negative_offset[], sk_load_byte_msh_negative_offset[];
34 37
35static inline u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len) 38static inline u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)
36{ 39{
@@ -117,6 +120,8 @@ static inline void bpf_flush_icache(void *start, void *end)
117 set_fs(old_fs); 120 set_fs(old_fs);
118} 121}
119 122
123#define CHOOSE_LOAD_FUNC(K, func) \
124 ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
120 125
121void bpf_jit_compile(struct sk_filter *fp) 126void bpf_jit_compile(struct sk_filter *fp)
122{ 127{
@@ -289,7 +294,7 @@ void bpf_jit_compile(struct sk_filter *fp)
289 EMIT2(0x24, K & 0xFF); /* and imm8,%al */ 294 EMIT2(0x24, K & 0xFF); /* and imm8,%al */
290 } else if (K >= 0xFFFF0000) { 295 } else if (K >= 0xFFFF0000) {
291 EMIT2(0x66, 0x25); /* and imm16,%ax */ 296 EMIT2(0x66, 0x25); /* and imm16,%ax */
292 EMIT2(K, 2); 297 EMIT(K, 2);
293 } else { 298 } else {
294 EMIT1_off32(0x25, K); /* and imm32,%eax */ 299 EMIT1_off32(0x25, K); /* and imm32,%eax */
295 } 300 }
@@ -473,44 +478,46 @@ void bpf_jit_compile(struct sk_filter *fp)
473#endif 478#endif
474 break; 479 break;
475 case BPF_S_LD_W_ABS: 480 case BPF_S_LD_W_ABS:
476 func = sk_load_word; 481 func = CHOOSE_LOAD_FUNC(K, sk_load_word);
477common_load: seen |= SEEN_DATAREF; 482common_load: seen |= SEEN_DATAREF;
478 if ((int)K < 0) {
479 /* Abort the JIT because __load_pointer() is needed. */
480 goto out;
481 }
482 t_offset = func - (image + addrs[i]); 483 t_offset = func - (image + addrs[i]);
483 EMIT1_off32(0xbe, K); /* mov imm32,%esi */ 484 EMIT1_off32(0xbe, K); /* mov imm32,%esi */
484 EMIT1_off32(0xe8, t_offset); /* call */ 485 EMIT1_off32(0xe8, t_offset); /* call */
485 break; 486 break;
486 case BPF_S_LD_H_ABS: 487 case BPF_S_LD_H_ABS:
487 func = sk_load_half; 488 func = CHOOSE_LOAD_FUNC(K, sk_load_half);
488 goto common_load; 489 goto common_load;
489 case BPF_S_LD_B_ABS: 490 case BPF_S_LD_B_ABS:
490 func = sk_load_byte; 491 func = CHOOSE_LOAD_FUNC(K, sk_load_byte);
491 goto common_load; 492 goto common_load;
492 case BPF_S_LDX_B_MSH: 493 case BPF_S_LDX_B_MSH:
493 if ((int)K < 0) { 494 func = CHOOSE_LOAD_FUNC(K, sk_load_byte_msh);
494 /* Abort the JIT because __load_pointer() is needed. */
495 goto out;
496 }
497 seen |= SEEN_DATAREF | SEEN_XREG; 495 seen |= SEEN_DATAREF | SEEN_XREG;
498 t_offset = sk_load_byte_msh - (image + addrs[i]); 496 t_offset = func - (image + addrs[i]);
499 EMIT1_off32(0xbe, K); /* mov imm32,%esi */ 497 EMIT1_off32(0xbe, K); /* mov imm32,%esi */
500 EMIT1_off32(0xe8, t_offset); /* call sk_load_byte_msh */ 498 EMIT1_off32(0xe8, t_offset); /* call sk_load_byte_msh */
501 break; 499 break;
502 case BPF_S_LD_W_IND: 500 case BPF_S_LD_W_IND:
503 func = sk_load_word_ind; 501 func = sk_load_word;
504common_load_ind: seen |= SEEN_DATAREF | SEEN_XREG; 502common_load_ind: seen |= SEEN_DATAREF | SEEN_XREG;
505 t_offset = func - (image + addrs[i]); 503 t_offset = func - (image + addrs[i]);
506 EMIT1_off32(0xbe, K); /* mov imm32,%esi */ 504 if (K) {
505 if (is_imm8(K)) {
506 EMIT3(0x8d, 0x73, K); /* lea imm8(%rbx), %esi */
507 } else {
508 EMIT2(0x8d, 0xb3); /* lea imm32(%rbx),%esi */
509 EMIT(K, 4);
510 }
511 } else {
512 EMIT2(0x89,0xde); /* mov %ebx,%esi */
513 }
507 EMIT1_off32(0xe8, t_offset); /* call sk_load_xxx_ind */ 514 EMIT1_off32(0xe8, t_offset); /* call sk_load_xxx_ind */
508 break; 515 break;
509 case BPF_S_LD_H_IND: 516 case BPF_S_LD_H_IND:
510 func = sk_load_half_ind; 517 func = sk_load_half;
511 goto common_load_ind; 518 goto common_load_ind;
512 case BPF_S_LD_B_IND: 519 case BPF_S_LD_B_IND:
513 func = sk_load_byte_ind; 520 func = sk_load_byte;
514 goto common_load_ind; 521 goto common_load_ind;
515 case BPF_S_JMP_JA: 522 case BPF_S_JMP_JA:
516 t_offset = addrs[i + K] - addrs[i]; 523 t_offset = addrs[i + K] - addrs[i];
diff --git a/arch/x86/platform/geode/net5501.c b/arch/x86/platform/geode/net5501.c
index 66d377e334f7..646e3b5b4bb6 100644
--- a/arch/x86/platform/geode/net5501.c
+++ b/arch/x86/platform/geode/net5501.c
@@ -63,7 +63,7 @@ static struct gpio_led net5501_leds[] = {
63 .name = "net5501:1", 63 .name = "net5501:1",
64 .gpio = 6, 64 .gpio = 6,
65 .default_trigger = "default-on", 65 .default_trigger = "default-on",
66 .active_low = 1, 66 .active_low = 0,
67 }, 67 },
68}; 68};
69 69
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c
index e0a37233c0af..e31bcd8f2eee 100644
--- a/arch/x86/platform/mrst/mrst.c
+++ b/arch/x86/platform/mrst/mrst.c
@@ -805,7 +805,7 @@ void intel_scu_devices_create(void)
805 } else 805 } else
806 i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1); 806 i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1);
807 } 807 }
808 intel_scu_notifier_post(SCU_AVAILABLE, 0L); 808 intel_scu_notifier_post(SCU_AVAILABLE, NULL);
809} 809}
810EXPORT_SYMBOL_GPL(intel_scu_devices_create); 810EXPORT_SYMBOL_GPL(intel_scu_devices_create);
811 811
@@ -814,7 +814,7 @@ void intel_scu_devices_destroy(void)
814{ 814{
815 int i; 815 int i;
816 816
817 intel_scu_notifier_post(SCU_DOWN, 0L); 817 intel_scu_notifier_post(SCU_DOWN, NULL);
818 818
819 for (i = 0; i < ipc_next_dev; i++) 819 for (i = 0; i < ipc_next_dev; i++)
820 platform_device_del(ipc_devs[i]); 820 platform_device_del(ipc_devs[i]);
diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c
index 47936830968c..218cdb16163c 100644
--- a/arch/x86/power/cpu.c
+++ b/arch/x86/power/cpu.c
@@ -225,13 +225,13 @@ static void __restore_processor_state(struct saved_context *ctxt)
225 fix_processor_context(); 225 fix_processor_context();
226 226
227 do_fpu_end(); 227 do_fpu_end();
228 x86_platform.restore_sched_clock_state();
228 mtrr_bp_restore(); 229 mtrr_bp_restore();
229} 230}
230 231
231/* Needed by apm.c */ 232/* Needed by apm.c */
232void restore_processor_state(void) 233void restore_processor_state(void)
233{ 234{
234 x86_platform.restore_sched_clock_state();
235 __restore_processor_state(&saved_context); 235 __restore_processor_state(&saved_context);
236} 236}
237#ifdef CONFIG_X86_32 237#ifdef CONFIG_X86_32
diff --git a/arch/x86/um/asm/barrier.h b/arch/x86/um/asm/barrier.h
new file mode 100644
index 000000000000..7d01b8c56c00
--- /dev/null
+++ b/arch/x86/um/asm/barrier.h
@@ -0,0 +1,75 @@
1#ifndef _ASM_UM_BARRIER_H_
2#define _ASM_UM_BARRIER_H_
3
4#include <asm/asm.h>
5#include <asm/segment.h>
6#include <asm/cpufeature.h>
7#include <asm/cmpxchg.h>
8#include <asm/nops.h>
9
10#include <linux/kernel.h>
11#include <linux/irqflags.h>
12
13/*
14 * Force strict CPU ordering.
15 * And yes, this is required on UP too when we're talking
16 * to devices.
17 */
18#ifdef CONFIG_X86_32
19
20#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
21#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
22#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
23
24#else /* CONFIG_X86_32 */
25
26#define mb() asm volatile("mfence" : : : "memory")
27#define rmb() asm volatile("lfence" : : : "memory")
28#define wmb() asm volatile("sfence" : : : "memory")
29
30#endif /* CONFIG_X86_32 */
31
32#define read_barrier_depends() do { } while (0)
33
34#ifdef CONFIG_SMP
35
36#define smp_mb() mb()
37#ifdef CONFIG_X86_PPRO_FENCE
38#define smp_rmb() rmb()
39#else /* CONFIG_X86_PPRO_FENCE */
40#define smp_rmb() barrier()
41#endif /* CONFIG_X86_PPRO_FENCE */
42
43#ifdef CONFIG_X86_OOSTORE
44#define smp_wmb() wmb()
45#else /* CONFIG_X86_OOSTORE */
46#define smp_wmb() barrier()
47#endif /* CONFIG_X86_OOSTORE */
48
49#define smp_read_barrier_depends() read_barrier_depends()
50#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
51
52#else /* CONFIG_SMP */
53
54#define smp_mb() barrier()
55#define smp_rmb() barrier()
56#define smp_wmb() barrier()
57#define smp_read_barrier_depends() do { } while (0)
58#define set_mb(var, value) do { var = value; barrier(); } while (0)
59
60#endif /* CONFIG_SMP */
61
62/*
63 * Stop RDTSC speculation. This is needed when you need to use RDTSC
64 * (or get_cycles or vread that possibly accesses the TSC) in a defined
65 * code region.
66 *
67 * (Could use an alternative three way for this if there was one.)
68 */
69static inline void rdtsc_barrier(void)
70{
71 alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
72 alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
73}
74
75#endif
diff --git a/arch/x86/um/asm/system.h b/arch/x86/um/asm/system.h
deleted file mode 100644
index a459fd9b7598..000000000000
--- a/arch/x86/um/asm/system.h
+++ /dev/null
@@ -1,135 +0,0 @@
1#ifndef _ASM_X86_SYSTEM_H_
2#define _ASM_X86_SYSTEM_H_
3
4#include <asm/asm.h>
5#include <asm/segment.h>
6#include <asm/cpufeature.h>
7#include <asm/cmpxchg.h>
8#include <asm/nops.h>
9
10#include <linux/kernel.h>
11#include <linux/irqflags.h>
12
13/* entries in ARCH_DLINFO: */
14#ifdef CONFIG_IA32_EMULATION
15# define AT_VECTOR_SIZE_ARCH 2
16#else
17# define AT_VECTOR_SIZE_ARCH 1
18#endif
19
20extern unsigned long arch_align_stack(unsigned long sp);
21
22void default_idle(void);
23
24/*
25 * Force strict CPU ordering.
26 * And yes, this is required on UP too when we're talking
27 * to devices.
28 */
29#ifdef CONFIG_X86_32
30/*
31 * Some non-Intel clones support out of order store. wmb() ceases to be a
32 * nop for these.
33 */
34#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
35#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
36#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
37#else
38#define mb() asm volatile("mfence":::"memory")
39#define rmb() asm volatile("lfence":::"memory")
40#define wmb() asm volatile("sfence" ::: "memory")
41#endif
42
43/**
44 * read_barrier_depends - Flush all pending reads that subsequents reads
45 * depend on.
46 *
47 * No data-dependent reads from memory-like regions are ever reordered
48 * over this barrier. All reads preceding this primitive are guaranteed
49 * to access memory (but not necessarily other CPUs' caches) before any
50 * reads following this primitive that depend on the data return by
51 * any of the preceding reads. This primitive is much lighter weight than
52 * rmb() on most CPUs, and is never heavier weight than is
53 * rmb().
54 *
55 * These ordering constraints are respected by both the local CPU
56 * and the compiler.
57 *
58 * Ordering is not guaranteed by anything other than these primitives,
59 * not even by data dependencies. See the documentation for
60 * memory_barrier() for examples and URLs to more information.
61 *
62 * For example, the following code would force ordering (the initial
63 * value of "a" is zero, "b" is one, and "p" is "&a"):
64 *
65 * <programlisting>
66 * CPU 0 CPU 1
67 *
68 * b = 2;
69 * memory_barrier();
70 * p = &b; q = p;
71 * read_barrier_depends();
72 * d = *q;
73 * </programlisting>
74 *
75 * because the read of "*q" depends on the read of "p" and these
76 * two reads are separated by a read_barrier_depends(). However,
77 * the following code, with the same initial values for "a" and "b":
78 *
79 * <programlisting>
80 * CPU 0 CPU 1
81 *
82 * a = 2;
83 * memory_barrier();
84 * b = 3; y = b;
85 * read_barrier_depends();
86 * x = a;
87 * </programlisting>
88 *
89 * does not enforce ordering, since there is no data dependency between
90 * the read of "a" and the read of "b". Therefore, on some CPUs, such
91 * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
92 * in cases like this where there are no data dependencies.
93 **/
94
95#define read_barrier_depends() do { } while (0)
96
97#ifdef CONFIG_SMP
98#define smp_mb() mb()
99#ifdef CONFIG_X86_PPRO_FENCE
100# define smp_rmb() rmb()
101#else
102# define smp_rmb() barrier()
103#endif
104#ifdef CONFIG_X86_OOSTORE
105# define smp_wmb() wmb()
106#else
107# define smp_wmb() barrier()
108#endif
109#define smp_read_barrier_depends() read_barrier_depends()
110#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
111#else
112#define smp_mb() barrier()
113#define smp_rmb() barrier()
114#define smp_wmb() barrier()
115#define smp_read_barrier_depends() do { } while (0)
116#define set_mb(var, value) do { var = value; barrier(); } while (0)
117#endif
118
119/*
120 * Stop RDTSC speculation. This is needed when you need to use RDTSC
121 * (or get_cycles or vread that possibly accesses the TSC) in a defined
122 * code region.
123 *
124 * (Could use an alternative three way for this if there was one.)
125 */
126static inline void rdtsc_barrier(void)
127{
128 alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
129 alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
130}
131
132extern void *_switch_to(void *prev, void *next, void *last);
133#define switch_to(prev, next, last) prev = _switch_to(prev, next, last)
134
135#endif
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index b132ade26f77..a8f8844b8d32 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -261,7 +261,8 @@ static void xen_cpuid(unsigned int *ax, unsigned int *bx,
261 261
262static bool __init xen_check_mwait(void) 262static bool __init xen_check_mwait(void)
263{ 263{
264#ifdef CONFIG_ACPI 264#if defined(CONFIG_ACPI) && !defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR) && \
265 !defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR_MODULE)
265 struct xen_platform_op op = { 266 struct xen_platform_op op = {
266 .cmd = XENPF_set_processor_pminfo, 267 .cmd = XENPF_set_processor_pminfo,
267 .u.set_pminfo.id = -1, 268 .u.set_pminfo.id = -1,
@@ -349,7 +350,6 @@ static void __init xen_init_cpuid_mask(void)
349 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 350 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
350 if ((cx & xsave_mask) != xsave_mask) 351 if ((cx & xsave_mask) != xsave_mask)
351 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */ 352 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */
352
353 if (xen_check_mwait()) 353 if (xen_check_mwait())
354 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32)); 354 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32));
355} 355}
@@ -967,7 +967,7 @@ void xen_setup_shared_info(void)
967 xen_setup_mfn_list_list(); 967 xen_setup_mfn_list_list();
968} 968}
969 969
970/* This is called once we have the cpu_possible_map */ 970/* This is called once we have the cpu_possible_mask */
971void xen_setup_vcpu_info_placement(void) 971void xen_setup_vcpu_info_placement(void)
972{ 972{
973 int cpu; 973 int cpu;
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 988828b479ed..b8e279479a6b 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1859,6 +1859,7 @@ pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
1859#endif /* CONFIG_X86_64 */ 1859#endif /* CONFIG_X86_64 */
1860 1860
1861static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss; 1861static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
1862static unsigned char fake_ioapic_mapping[PAGE_SIZE] __page_aligned_bss;
1862 1863
1863static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) 1864static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
1864{ 1865{
@@ -1899,7 +1900,7 @@ static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
1899 * We just don't map the IO APIC - all access is via 1900 * We just don't map the IO APIC - all access is via
1900 * hypercalls. Keep the address in the pte for reference. 1901 * hypercalls. Keep the address in the pte for reference.
1901 */ 1902 */
1902 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); 1903 pte = pfn_pte(PFN_DOWN(__pa(fake_ioapic_mapping)), PAGE_KERNEL);
1903 break; 1904 break;
1904#endif 1905#endif
1905 1906
@@ -2064,6 +2065,7 @@ void __init xen_init_mmu_ops(void)
2064 pv_mmu_ops = xen_mmu_ops; 2065 pv_mmu_ops = xen_mmu_ops;
2065 2066
2066 memset(dummy_mapping, 0xff, PAGE_SIZE); 2067 memset(dummy_mapping, 0xff, PAGE_SIZE);
2068 memset(fake_ioapic_mapping, 0xfd, PAGE_SIZE);
2067} 2069}
2068 2070
2069/* Protected by xen_reservation_lock. */ 2071/* Protected by xen_reservation_lock. */
diff --git a/arch/x86/xen/pci-swiotlb-xen.c b/arch/x86/xen/pci-swiotlb-xen.c
index b480d4207a4c..967633ad98c4 100644
--- a/arch/x86/xen/pci-swiotlb-xen.c
+++ b/arch/x86/xen/pci-swiotlb-xen.c
@@ -12,8 +12,8 @@ int xen_swiotlb __read_mostly;
12 12
13static struct dma_map_ops xen_swiotlb_dma_ops = { 13static struct dma_map_ops xen_swiotlb_dma_ops = {
14 .mapping_error = xen_swiotlb_dma_mapping_error, 14 .mapping_error = xen_swiotlb_dma_mapping_error,
15 .alloc_coherent = xen_swiotlb_alloc_coherent, 15 .alloc = xen_swiotlb_alloc_coherent,
16 .free_coherent = xen_swiotlb_free_coherent, 16 .free = xen_swiotlb_free_coherent,
17 .sync_single_for_cpu = xen_swiotlb_sync_single_for_cpu, 17 .sync_single_for_cpu = xen_swiotlb_sync_single_for_cpu,
18 .sync_single_for_device = xen_swiotlb_sync_single_for_device, 18 .sync_single_for_device = xen_swiotlb_sync_single_for_device,
19 .sync_sg_for_cpu = xen_swiotlb_sync_sg_for_cpu, 19 .sync_sg_for_cpu = xen_swiotlb_sync_sg_for_cpu,
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index 02900e8ce26c..0503c0c493a9 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -59,7 +59,7 @@ static irqreturn_t xen_reschedule_interrupt(int irq, void *dev_id)
59 59
60static void __cpuinit cpu_bringup(void) 60static void __cpuinit cpu_bringup(void)
61{ 61{
62 int cpu = smp_processor_id(); 62 int cpu;
63 63
64 cpu_init(); 64 cpu_init();
65 touch_softlockup_watchdog(); 65 touch_softlockup_watchdog();
@@ -178,6 +178,7 @@ static void __init xen_fill_possible_map(void)
178static void __init xen_filter_cpu_maps(void) 178static void __init xen_filter_cpu_maps(void)
179{ 179{
180 int i, rc; 180 int i, rc;
181 unsigned int subtract = 0;
181 182
182 if (!xen_initial_domain()) 183 if (!xen_initial_domain())
183 return; 184 return;
@@ -192,8 +193,22 @@ static void __init xen_filter_cpu_maps(void)
192 } else { 193 } else {
193 set_cpu_possible(i, false); 194 set_cpu_possible(i, false);
194 set_cpu_present(i, false); 195 set_cpu_present(i, false);
196 subtract++;
195 } 197 }
196 } 198 }
199#ifdef CONFIG_HOTPLUG_CPU
200 /* This is akin to using 'nr_cpus' on the Linux command line.
201 * Which is OK as when we use 'dom0_max_vcpus=X' we can only
202 * have up to X, while nr_cpu_ids is greater than X. This
203 * normally is not a problem, except when CPU hotplugging
204 * is involved and then there might be more than X CPUs
205 * in the guest - which will not work as there is no
206 * hypercall to expand the max number of VCPUs an already
207 * running guest has. So cap it up to X. */
208 if (subtract)
209 nr_cpu_ids = nr_cpu_ids - subtract;
210#endif
211
197} 212}
198 213
199static void __init xen_smp_prepare_boot_cpu(void) 214static void __init xen_smp_prepare_boot_cpu(void)
diff --git a/arch/x86/xen/xen-asm.S b/arch/x86/xen/xen-asm.S
index 79d7362ad6d1..3e45aa000718 100644
--- a/arch/x86/xen/xen-asm.S
+++ b/arch/x86/xen/xen-asm.S
@@ -96,7 +96,7 @@ ENTRY(xen_restore_fl_direct)
96 96
97 /* check for unmasked and pending */ 97 /* check for unmasked and pending */
98 cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending 98 cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending
99 jz 1f 99 jnz 1f
1002: call check_events 1002: call check_events
1011: 1011:
102ENDPATCH(xen_restore_fl_direct) 102ENDPATCH(xen_restore_fl_direct)
diff --git a/arch/xtensa/include/asm/hardirq.h b/arch/xtensa/include/asm/hardirq.h
index 26664cef8f11..91695a135498 100644
--- a/arch/xtensa/include/asm/hardirq.h
+++ b/arch/xtensa/include/asm/hardirq.h
@@ -11,9 +11,6 @@
11#ifndef _XTENSA_HARDIRQ_H 11#ifndef _XTENSA_HARDIRQ_H
12#define _XTENSA_HARDIRQ_H 12#define _XTENSA_HARDIRQ_H
13 13
14void ack_bad_irq(unsigned int irq);
15#define ack_bad_irq ack_bad_irq
16
17#include <asm-generic/hardirq.h> 14#include <asm-generic/hardirq.h>
18 15
19#endif /* _XTENSA_HARDIRQ_H */ 16#endif /* _XTENSA_HARDIRQ_H */
diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h
index d04cd3a625fa..4beb43c087d3 100644
--- a/arch/xtensa/include/asm/io.h
+++ b/arch/xtensa/include/asm/io.h
@@ -14,6 +14,7 @@
14#ifdef __KERNEL__ 14#ifdef __KERNEL__
15#include <asm/byteorder.h> 15#include <asm/byteorder.h>
16#include <asm/page.h> 16#include <asm/page.h>
17#include <linux/bug.h>
17#include <linux/kernel.h> 18#include <linux/kernel.h>
18 19
19#include <linux/types.h> 20#include <linux/types.h>
diff --git a/arch/xtensa/kernel/signal.c b/arch/xtensa/kernel/signal.c
index b69b000349fc..d78869a00b11 100644
--- a/arch/xtensa/kernel/signal.c
+++ b/arch/xtensa/kernel/signal.c
@@ -496,6 +496,7 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset)
496 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 496 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
497 497
498 if (signr > 0) { 498 if (signr > 0) {
499 int ret;
499 500
500 /* Are we from a system call? */ 501 /* Are we from a system call? */
501 502