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-rw-r--r--arch/arm/mach-mxs/Makefile2
-rw-r--r--arch/arm/mach-mxs/include/mach/common.h2
-rw-r--r--arch/arm/mach-mxs/mach-mxs.c37
-rw-r--r--arch/arm/mach-mxs/system.c137
4 files changed, 38 insertions, 140 deletions
diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile
index b934603e2765..5339973d503f 100644
--- a/arch/arm/mach-mxs/Makefile
+++ b/arch/arm/mach-mxs/Makefile
@@ -1,5 +1,5 @@
1# Common support 1# Common support
2obj-y := ocotp.o system.o mm.o 2obj-y := ocotp.o mm.o
3 3
4obj-$(CONFIG_PM) += pm.o 4obj-$(CONFIG_PM) += pm.o
5 5
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h
index df2a4ef14dae..b7946a62d350 100644
--- a/arch/arm/mach-mxs/include/mach/common.h
+++ b/arch/arm/mach-mxs/include/mach/common.h
@@ -12,8 +12,6 @@
12#define __MACH_MXS_COMMON_H__ 12#define __MACH_MXS_COMMON_H__
13 13
14extern const u32 *mxs_get_ocotp(void); 14extern const u32 *mxs_get_ocotp(void);
15extern int mxs_reset_block(void __iomem *);
16extern void mxs_restart(char, const char *);
17extern int mxs_saif_clkmux_select(unsigned int clkmux); 15extern int mxs_saif_clkmux_select(unsigned int clkmux);
18 16
19extern int mx23_clocks_init(void); 17extern int mx23_clocks_init(void);
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index 10506381b446..c192fd62ebef 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -22,11 +22,13 @@
22#include <linux/irqchip/mxs.h> 22#include <linux/irqchip/mxs.h>
23#include <linux/micrel_phy.h> 23#include <linux/micrel_phy.h>
24#include <linux/mxsfb.h> 24#include <linux/mxsfb.h>
25#include <linux/of_address.h>
25#include <linux/of_platform.h> 26#include <linux/of_platform.h>
26#include <linux/phy.h> 27#include <linux/phy.h>
27#include <linux/pinctrl/consumer.h> 28#include <linux/pinctrl/consumer.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29#include <asm/mach/time.h> 30#include <asm/mach/time.h>
31#include <asm/system_misc.h>
30#include <mach/common.h> 32#include <mach/common.h>
31#include <mach/digctl.h> 33#include <mach/digctl.h>
32#include <mach/mxs.h> 34#include <mach/mxs.h>
@@ -459,6 +461,41 @@ static void __init mxs_machine_init(void)
459 imx28_evk_post_init(); 461 imx28_evk_post_init();
460} 462}
461 463
464#define MX23_CLKCTRL_RESET_OFFSET 0x120
465#define MX28_CLKCTRL_RESET_OFFSET 0x1e0
466#define MXS_CLKCTRL_RESET_CHIP (1 << 1)
467
468/*
469 * Reset the system. It is called by machine_restart().
470 */
471static void mxs_restart(char mode, const char *cmd)
472{
473 struct device_node *np;
474 void __iomem *reset_addr;
475
476 np = of_find_compatible_node(NULL, NULL, "fsl,clkctrl");
477 reset_addr = of_iomap(np, 0);
478 if (!reset_addr)
479 goto soft;
480
481 if (of_device_is_compatible(np, "fsl,imx23-clkctrl"))
482 reset_addr += MX23_CLKCTRL_RESET_OFFSET;
483 else
484 reset_addr += MX28_CLKCTRL_RESET_OFFSET;
485
486 /* reset the chip */
487 __mxs_setl(MXS_CLKCTRL_RESET_CHIP, reset_addr);
488
489 pr_err("Failed to assert the chip reset\n");
490
491 /* Delay to allow the serial port to show the message */
492 mdelay(50);
493
494soft:
495 /* We'll take a jump through zero as a poor second */
496 soft_restart(0);
497}
498
462static const char *imx23_dt_compat[] __initdata = { 499static const char *imx23_dt_compat[] __initdata = {
463 "fsl,imx23", 500 "fsl,imx23",
464 NULL, 501 NULL,
diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c
deleted file mode 100644
index 2d64ee9bbd3f..000000000000
--- a/arch/arm/mach-mxs/system.c
+++ /dev/null
@@ -1,137 +0,0 @@
1/*
2 * Copyright (C) 1999 ARM Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright 2006-2007,2010 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
6 * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/kernel.h>
20#include <linux/clk.h>
21#include <linux/io.h>
22#include <linux/err.h>
23#include <linux/delay.h>
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/of.h>
27#include <linux/of_address.h>
28
29#include <asm/proc-fns.h>
30#include <asm/system_misc.h>
31
32#include <mach/mxs.h>
33#include <mach/common.h>
34
35#define MX23_CLKCTRL_RESET_OFFSET 0x120
36#define MX28_CLKCTRL_RESET_OFFSET 0x1e0
37#define MXS_CLKCTRL_RESET_CHIP (1 << 1)
38
39#define MXS_MODULE_CLKGATE (1 << 30)
40#define MXS_MODULE_SFTRST (1 << 31)
41
42/*
43 * Reset the system. It is called by machine_restart().
44 */
45void mxs_restart(char mode, const char *cmd)
46{
47 struct device_node *np;
48 void __iomem *reset_addr;
49
50 np = of_find_compatible_node(NULL, NULL, "fsl,clkctrl");
51 reset_addr = of_iomap(np, 0);
52 if (!reset_addr)
53 goto soft;
54
55 if (of_device_is_compatible(np, "fsl,imx23-clkctrl"))
56 reset_addr += MX23_CLKCTRL_RESET_OFFSET;
57 else
58 reset_addr += MX28_CLKCTRL_RESET_OFFSET;
59
60 /* reset the chip */
61 __mxs_setl(MXS_CLKCTRL_RESET_CHIP, reset_addr);
62
63 pr_err("Failed to assert the chip reset\n");
64
65 /* Delay to allow the serial port to show the message */
66 mdelay(50);
67
68soft:
69 /* We'll take a jump through zero as a poor second */
70 soft_restart(0);
71}
72
73/*
74 * Clear the bit and poll it cleared. This is usually called with
75 * a reset address and mask being either SFTRST(bit 31) or CLKGATE
76 * (bit 30).
77 */
78static int clear_poll_bit(void __iomem *addr, u32 mask)
79{
80 int timeout = 0x400;
81
82 /* clear the bit */
83 __mxs_clrl(mask, addr);
84
85 /*
86 * SFTRST needs 3 GPMI clocks to settle, the reference manual
87 * recommends to wait 1us.
88 */
89 udelay(1);
90
91 /* poll the bit becoming clear */
92 while ((__raw_readl(addr) & mask) && --timeout)
93 /* nothing */;
94
95 return !timeout;
96}
97
98int mxs_reset_block(void __iomem *reset_addr)
99{
100 int ret;
101 int timeout = 0x400;
102
103 /* clear and poll SFTRST */
104 ret = clear_poll_bit(reset_addr, MXS_MODULE_SFTRST);
105 if (unlikely(ret))
106 goto error;
107
108 /* clear CLKGATE */
109 __mxs_clrl(MXS_MODULE_CLKGATE, reset_addr);
110
111 /* set SFTRST to reset the block */
112 __mxs_setl(MXS_MODULE_SFTRST, reset_addr);
113 udelay(1);
114
115 /* poll CLKGATE becoming set */
116 while ((!(__raw_readl(reset_addr) & MXS_MODULE_CLKGATE)) && --timeout)
117 /* nothing */;
118 if (unlikely(!timeout))
119 goto error;
120
121 /* clear and poll SFTRST */
122 ret = clear_poll_bit(reset_addr, MXS_MODULE_SFTRST);
123 if (unlikely(ret))
124 goto error;
125
126 /* clear and poll CLKGATE */
127 ret = clear_poll_bit(reset_addr, MXS_MODULE_CLKGATE);
128 if (unlikely(ret))
129 goto error;
130
131 return 0;
132
133error:
134 pr_err("%s(%p): module reset timeout\n", __func__, reset_addr);
135 return -ETIMEDOUT;
136}
137EXPORT_SYMBOL(mxs_reset_block);