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-rw-r--r--arch/mips/include/asm/i8259.h6
-rw-r--r--arch/mips/kernel/i8259.c22
-rw-r--r--arch/mips/loongson/lemote-2f/irq.c4
3 files changed, 16 insertions, 16 deletions
diff --git a/arch/mips/include/asm/i8259.h b/arch/mips/include/asm/i8259.h
index 8572a2d90484..c7e278447c0a 100644
--- a/arch/mips/include/asm/i8259.h
+++ b/arch/mips/include/asm/i8259.h
@@ -35,7 +35,7 @@
35#define SLAVE_ICW4_DEFAULT 0x01 35#define SLAVE_ICW4_DEFAULT 0x01
36#define PIC_ICW4_AEOI 2 36#define PIC_ICW4_AEOI 2
37 37
38extern spinlock_t i8259A_lock; 38extern raw_spinlock_t i8259A_lock;
39 39
40extern int i8259A_irq_pending(unsigned int irq); 40extern int i8259A_irq_pending(unsigned int irq);
41extern void make_8259A_irq(unsigned int irq); 41extern void make_8259A_irq(unsigned int irq);
@@ -51,7 +51,7 @@ static inline int i8259_irq(void)
51{ 51{
52 int irq; 52 int irq;
53 53
54 spin_lock(&i8259A_lock); 54 raw_spin_lock(&i8259A_lock);
55 55
56 /* Perform an interrupt acknowledge cycle on controller 1. */ 56 /* Perform an interrupt acknowledge cycle on controller 1. */
57 outb(0x0C, PIC_MASTER_CMD); /* prepare for poll */ 57 outb(0x0C, PIC_MASTER_CMD); /* prepare for poll */
@@ -78,7 +78,7 @@ static inline int i8259_irq(void)
78 irq = -1; 78 irq = -1;
79 } 79 }
80 80
81 spin_unlock(&i8259A_lock); 81 raw_spin_unlock(&i8259A_lock);
82 82
83 return likely(irq >= 0) ? irq + I8259A_IRQ_BASE : irq; 83 return likely(irq >= 0) ? irq + I8259A_IRQ_BASE : irq;
84} 84}
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 01c0885a8061..27799113332c 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -29,7 +29,7 @@
29 */ 29 */
30 30
31static int i8259A_auto_eoi = -1; 31static int i8259A_auto_eoi = -1;
32DEFINE_SPINLOCK(i8259A_lock); 32DEFINE_RAW_SPINLOCK(i8259A_lock);
33static void disable_8259A_irq(unsigned int irq); 33static void disable_8259A_irq(unsigned int irq);
34static void enable_8259A_irq(unsigned int irq); 34static void enable_8259A_irq(unsigned int irq);
35static void mask_and_ack_8259A(unsigned int irq); 35static void mask_and_ack_8259A(unsigned int irq);
@@ -65,13 +65,13 @@ static void disable_8259A_irq(unsigned int irq)
65 65
66 irq -= I8259A_IRQ_BASE; 66 irq -= I8259A_IRQ_BASE;
67 mask = 1 << irq; 67 mask = 1 << irq;
68 spin_lock_irqsave(&i8259A_lock, flags); 68 raw_spin_lock_irqsave(&i8259A_lock, flags);
69 cached_irq_mask |= mask; 69 cached_irq_mask |= mask;
70 if (irq & 8) 70 if (irq & 8)
71 outb(cached_slave_mask, PIC_SLAVE_IMR); 71 outb(cached_slave_mask, PIC_SLAVE_IMR);
72 else 72 else
73 outb(cached_master_mask, PIC_MASTER_IMR); 73 outb(cached_master_mask, PIC_MASTER_IMR);
74 spin_unlock_irqrestore(&i8259A_lock, flags); 74 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
75} 75}
76 76
77static void enable_8259A_irq(unsigned int irq) 77static void enable_8259A_irq(unsigned int irq)
@@ -81,13 +81,13 @@ static void enable_8259A_irq(unsigned int irq)
81 81
82 irq -= I8259A_IRQ_BASE; 82 irq -= I8259A_IRQ_BASE;
83 mask = ~(1 << irq); 83 mask = ~(1 << irq);
84 spin_lock_irqsave(&i8259A_lock, flags); 84 raw_spin_lock_irqsave(&i8259A_lock, flags);
85 cached_irq_mask &= mask; 85 cached_irq_mask &= mask;
86 if (irq & 8) 86 if (irq & 8)
87 outb(cached_slave_mask, PIC_SLAVE_IMR); 87 outb(cached_slave_mask, PIC_SLAVE_IMR);
88 else 88 else
89 outb(cached_master_mask, PIC_MASTER_IMR); 89 outb(cached_master_mask, PIC_MASTER_IMR);
90 spin_unlock_irqrestore(&i8259A_lock, flags); 90 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
91} 91}
92 92
93int i8259A_irq_pending(unsigned int irq) 93int i8259A_irq_pending(unsigned int irq)
@@ -98,12 +98,12 @@ int i8259A_irq_pending(unsigned int irq)
98 98
99 irq -= I8259A_IRQ_BASE; 99 irq -= I8259A_IRQ_BASE;
100 mask = 1 << irq; 100 mask = 1 << irq;
101 spin_lock_irqsave(&i8259A_lock, flags); 101 raw_spin_lock_irqsave(&i8259A_lock, flags);
102 if (irq < 8) 102 if (irq < 8)
103 ret = inb(PIC_MASTER_CMD) & mask; 103 ret = inb(PIC_MASTER_CMD) & mask;
104 else 104 else
105 ret = inb(PIC_SLAVE_CMD) & (mask >> 8); 105 ret = inb(PIC_SLAVE_CMD) & (mask >> 8);
106 spin_unlock_irqrestore(&i8259A_lock, flags); 106 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
107 107
108 return ret; 108 return ret;
109} 109}
@@ -151,7 +151,7 @@ static void mask_and_ack_8259A(unsigned int irq)
151 151
152 irq -= I8259A_IRQ_BASE; 152 irq -= I8259A_IRQ_BASE;
153 irqmask = 1 << irq; 153 irqmask = 1 << irq;
154 spin_lock_irqsave(&i8259A_lock, flags); 154 raw_spin_lock_irqsave(&i8259A_lock, flags);
155 /* 155 /*
156 * Lightweight spurious IRQ detection. We do not want 156 * Lightweight spurious IRQ detection. We do not want
157 * to overdo spurious IRQ handling - it's usually a sign 157 * to overdo spurious IRQ handling - it's usually a sign
@@ -183,7 +183,7 @@ handle_real_irq:
183 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */ 183 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */
184 } 184 }
185 smtc_im_ack_irq(irq); 185 smtc_im_ack_irq(irq);
186 spin_unlock_irqrestore(&i8259A_lock, flags); 186 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
187 return; 187 return;
188 188
189spurious_8259A_irq: 189spurious_8259A_irq:
@@ -264,7 +264,7 @@ static void init_8259A(int auto_eoi)
264 264
265 i8259A_auto_eoi = auto_eoi; 265 i8259A_auto_eoi = auto_eoi;
266 266
267 spin_lock_irqsave(&i8259A_lock, flags); 267 raw_spin_lock_irqsave(&i8259A_lock, flags);
268 268
269 outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ 269 outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
270 outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */ 270 outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */
@@ -298,7 +298,7 @@ static void init_8259A(int auto_eoi)
298 outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */ 298 outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */
299 outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */ 299 outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */
300 300
301 spin_unlock_irqrestore(&i8259A_lock, flags); 301 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
302} 302}
303 303
304/* 304/*
diff --git a/arch/mips/loongson/lemote-2f/irq.c b/arch/mips/loongson/lemote-2f/irq.c
index 77d32f9cf31e..882dfcd42c00 100644
--- a/arch/mips/loongson/lemote-2f/irq.c
+++ b/arch/mips/loongson/lemote-2f/irq.c
@@ -38,7 +38,7 @@ int mach_i8259_irq(void)
38 irq = -1; 38 irq = -1;
39 39
40 if ((LOONGSON_INTISR & LOONGSON_INTEN) & LOONGSON_INT_BIT_INT0) { 40 if ((LOONGSON_INTISR & LOONGSON_INTEN) & LOONGSON_INT_BIT_INT0) {
41 spin_lock(&i8259A_lock); 41 raw_spin_lock(&i8259A_lock);
42 isr = inb(PIC_MASTER_CMD) & 42 isr = inb(PIC_MASTER_CMD) &
43 ~inb(PIC_MASTER_IMR) & ~(1 << PIC_CASCADE_IR); 43 ~inb(PIC_MASTER_IMR) & ~(1 << PIC_CASCADE_IR);
44 if (!isr) 44 if (!isr)
@@ -56,7 +56,7 @@ int mach_i8259_irq(void)
56 if (~inb(PIC_MASTER_ISR) & 0x80) 56 if (~inb(PIC_MASTER_ISR) & 0x80)
57 irq = -1; 57 irq = -1;
58 } 58 }
59 spin_unlock(&i8259A_lock); 59 raw_spin_unlock(&i8259A_lock);
60 } 60 }
61 61
62 return irq; 62 return irq;