2 files changed, 13 insertions, 2 deletions

diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index a81ed251e667..c45b4fa1deeb 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -146,7 +146,7 @@ static void omap3_core_save_context(void)
 
         /*
          * Force write last pad into memory, as this can fail in some
-         * cases according to erratas 1.157, 1.185
+         * cases according to errata 1.157, 1.185
          */
         omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14),
                 OMAP343X_CONTROL_MEM_WKUP + 0x2a0);
@@ -433,7 +433,7 @@ void omap_sram_idle(void)
         /*
         * On EMU/HS devices ROM code restores a SRDC value
         * from scratchpad which has automatic self refresh on timeout
-        * of AUTO_CNT = 1 enabled. This takes care of errata 1.142.
+        * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443.
         * Hence store/restore the SDRC_POWER register here.
         */
         if (omap_rev() >= OMAP3430_REV_ES3_0 &&
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 06e47326e17c..17dfe30db3a7 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -596,6 +596,7 @@ usettbr0:
  * Internal functions
  */
 
+/* This function implements the erratum ID i443 WA, applies to 34xx >= ES3.0 */
         .text
 ENTRY(es3_sdrc_fix)
         ldr     r4, sdrc_syscfg         @ get config addr
@@ -641,6 +642,16 @@ sdrc_manual_1:
 ENTRY(es3_sdrc_fix_sz)
         .word   . - es3_sdrc_fix
 
+/*
+ * This function implements the erratum ID i581 WA:
+ *  SDRC state restore before accessing the SDRAM
+ *
+ * Only used at return from non-OFF mode. For OFF
+ * mode the ROM code configures the SDRC and
+ * the DPLL before calling the restore code directly
+ * from DDR.
+ */
+
 /* Make sure SDRC accesses are ok */
 wait_sdrc_ok: