diff options
Diffstat (limited to 'arch')
517 files changed, 20862 insertions, 9314 deletions
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c index f238370c907d..8d0097f10208 100644 --- a/arch/alpha/kernel/process.c +++ b/arch/alpha/kernel/process.c | |||
| @@ -93,8 +93,8 @@ common_shutdown_1(void *generic_ptr) | |||
| 93 | if (cpuid != boot_cpuid) { | 93 | if (cpuid != boot_cpuid) { |
| 94 | flags |= 0x00040000UL; /* "remain halted" */ | 94 | flags |= 0x00040000UL; /* "remain halted" */ |
| 95 | *pflags = flags; | 95 | *pflags = flags; |
| 96 | cpu_clear(cpuid, cpu_present_map); | 96 | set_cpu_present(cpuid, false); |
| 97 | cpu_clear(cpuid, cpu_possible_map); | 97 | set_cpu_possible(cpuid, false); |
| 98 | halt(); | 98 | halt(); |
| 99 | } | 99 | } |
| 100 | #endif | 100 | #endif |
| @@ -120,8 +120,8 @@ common_shutdown_1(void *generic_ptr) | |||
| 120 | 120 | ||
| 121 | #ifdef CONFIG_SMP | 121 | #ifdef CONFIG_SMP |
| 122 | /* Wait for the secondaries to halt. */ | 122 | /* Wait for the secondaries to halt. */ |
| 123 | cpu_clear(boot_cpuid, cpu_present_map); | 123 | set_cpu_present(boot_cpuid, false); |
| 124 | cpu_clear(boot_cpuid, cpu_possible_map); | 124 | set_cpu_possible(boot_cpuid, false); |
| 125 | while (cpus_weight(cpu_present_map)) | 125 | while (cpus_weight(cpu_present_map)) |
| 126 | barrier(); | 126 | barrier(); |
| 127 | #endif | 127 | #endif |
diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c index 00f1dc3dfd5f..b1fe5674c3a1 100644 --- a/arch/alpha/kernel/smp.c +++ b/arch/alpha/kernel/smp.c | |||
| @@ -120,12 +120,12 @@ void __cpuinit | |||
| 120 | smp_callin(void) | 120 | smp_callin(void) |
| 121 | { | 121 | { |
| 122 | int cpuid = hard_smp_processor_id(); | 122 | int cpuid = hard_smp_processor_id(); |
| 123 | cpumask_t mask = cpu_online_map; | ||
| 124 | 123 | ||
| 125 | if (cpu_test_and_set(cpuid, mask)) { | 124 | if (cpu_online(cpuid)) { |
| 126 | printk("??, cpu 0x%x already present??\n", cpuid); | 125 | printk("??, cpu 0x%x already present??\n", cpuid); |
| 127 | BUG(); | 126 | BUG(); |
| 128 | } | 127 | } |
| 128 | set_cpu_online(cpuid, true); | ||
| 129 | 129 | ||
| 130 | /* Turn on machine checks. */ | 130 | /* Turn on machine checks. */ |
| 131 | wrmces(7); | 131 | wrmces(7); |
| @@ -436,8 +436,8 @@ setup_smp(void) | |||
| 436 | ((char *)cpubase + i*hwrpb->processor_size); | 436 | ((char *)cpubase + i*hwrpb->processor_size); |
| 437 | if ((cpu->flags & 0x1cc) == 0x1cc) { | 437 | if ((cpu->flags & 0x1cc) == 0x1cc) { |
| 438 | smp_num_probed++; | 438 | smp_num_probed++; |
| 439 | cpu_set(i, cpu_possible_map); | 439 | set_cpu_possible(i, true); |
| 440 | cpu_set(i, cpu_present_map); | 440 | set_cpu_present(i, true); |
| 441 | cpu->pal_revision = boot_cpu_palrev; | 441 | cpu->pal_revision = boot_cpu_palrev; |
| 442 | } | 442 | } |
| 443 | 443 | ||
| @@ -470,8 +470,8 @@ smp_prepare_cpus(unsigned int max_cpus) | |||
| 470 | 470 | ||
| 471 | /* Nothing to do on a UP box, or when told not to. */ | 471 | /* Nothing to do on a UP box, or when told not to. */ |
| 472 | if (smp_num_probed == 1 || max_cpus == 0) { | 472 | if (smp_num_probed == 1 || max_cpus == 0) { |
| 473 | cpu_possible_map = cpumask_of_cpu(boot_cpuid); | 473 | init_cpu_possible(cpumask_of(boot_cpuid)); |
| 474 | cpu_present_map = cpumask_of_cpu(boot_cpuid); | 474 | init_cpu_present(cpumask_of(boot_cpuid)); |
| 475 | printk(KERN_INFO "SMP mode deactivated.\n"); | 475 | printk(KERN_INFO "SMP mode deactivated.\n"); |
| 476 | return; | 476 | return; |
| 477 | } | 477 | } |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dbfdf87f993f..12abdd43201f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
| @@ -241,6 +241,7 @@ config ARCH_VERSATILE | |||
| 241 | config ARCH_AT91 | 241 | config ARCH_AT91 |
| 242 | bool "Atmel AT91" | 242 | bool "Atmel AT91" |
| 243 | select GENERIC_GPIO | 243 | select GENERIC_GPIO |
| 244 | select ARCH_REQUIRE_GPIOLIB | ||
| 244 | select HAVE_CLK | 245 | select HAVE_CLK |
| 245 | help | 246 | help |
| 246 | This enables support for systems based on the Atmel AT91RM9200, | 247 | This enables support for systems based on the Atmel AT91RM9200, |
| @@ -1092,7 +1093,7 @@ source "drivers/cpufreq/Kconfig" | |||
| 1092 | 1093 | ||
| 1093 | config CPU_FREQ_SA1100 | 1094 | config CPU_FREQ_SA1100 |
| 1094 | bool | 1095 | bool |
| 1095 | depends on CPU_FREQ && (SA1100_H3100 || SA1100_H3600 || SA1100_H3800 || SA1100_LART || SA1100_PLEB || SA1100_BADGE4 || SA1100_HACKKIT) | 1096 | depends on CPU_FREQ && (SA1100_H3100 || SA1100_H3600 || SA1100_LART || SA1100_PLEB || SA1100_BADGE4 || SA1100_HACKKIT) |
| 1096 | default y | 1097 | default y |
| 1097 | 1098 | ||
| 1098 | config CPU_FREQ_SA1110 | 1099 | config CPU_FREQ_SA1110 |
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 192ee01a9ba2..a71fd941ade7 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
| @@ -2,18 +2,29 @@ menu "Kernel hacking" | |||
| 2 | 2 | ||
| 3 | source "lib/Kconfig.debug" | 3 | source "lib/Kconfig.debug" |
| 4 | 4 | ||
| 5 | # RMK wants arm kernels compiled with frame pointers so hardwire this to y. | 5 | # RMK wants arm kernels compiled with frame pointers or stack unwinding. |
| 6 | # If you know what you are doing and are willing to live without stack | 6 | # If you know what you are doing and are willing to live without stack |
| 7 | # traces, you can get a slightly smaller kernel by setting this option to | 7 | # traces, you can get a slightly smaller kernel by setting this option to |
| 8 | # n, but then RMK will have to kill you ;). | 8 | # n, but then RMK will have to kill you ;). |
| 9 | config FRAME_POINTER | 9 | config FRAME_POINTER |
| 10 | bool | 10 | bool |
| 11 | default y | 11 | default y if !ARM_UNWIND |
| 12 | help | 12 | help |
| 13 | If you say N here, the resulting kernel will be slightly smaller and | 13 | If you say N here, the resulting kernel will be slightly smaller and |
| 14 | faster. However, when a problem occurs with the kernel, the | 14 | faster. However, if neither FRAME_POINTER nor ARM_UNWIND are enabled, |
| 15 | information that is reported is severely limited. Most people | 15 | when a problem occurs with the kernel, the information that is |
| 16 | should say Y here. | 16 | reported is severely limited. |
| 17 | |||
| 18 | config ARM_UNWIND | ||
| 19 | bool "Enable stack unwinding support" | ||
| 20 | depends on AEABI && EXPERIMENTAL | ||
| 21 | default y | ||
| 22 | help | ||
| 23 | This option enables stack unwinding support in the kernel | ||
| 24 | using the information automatically generated by the | ||
| 25 | compiler. The resulting kernel image is slightly bigger but | ||
| 26 | the performance is not affected. Currently, this feature | ||
| 27 | only works with EABI compilers. If unsure say Y. | ||
| 17 | 28 | ||
| 18 | config DEBUG_USER | 29 | config DEBUG_USER |
| 19 | bool "Verbose user fault messages" | 30 | bool "Verbose user fault messages" |
| @@ -66,7 +77,7 @@ config DEBUG_ICEDCC | |||
| 66 | Say Y here if you want the debug print routines to direct their | 77 | Say Y here if you want the debug print routines to direct their |
| 67 | output to the EmbeddedICE macrocell's DCC channel using | 78 | output to the EmbeddedICE macrocell's DCC channel using |
| 68 | co-processor 14. This is known to work on the ARM9 style ICE | 79 | co-processor 14. This is known to work on the ARM9 style ICE |
| 69 | channel. | 80 | channel and on the XScale with the PEEDI. |
| 70 | 81 | ||
| 71 | It does include a timeout to ensure that the system does not | 82 | It does include a timeout to ensure that the system does not |
| 72 | totally freeze when there is nothing connected to read. | 83 | totally freeze when there is nothing connected to read. |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 24e0f0187697..e7ef876e574b 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
| @@ -85,6 +85,10 @@ else | |||
| 85 | CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,) | 85 | CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,) |
| 86 | endif | 86 | endif |
| 87 | 87 | ||
| 88 | ifeq ($(CONFIG_ARM_UNWIND),y) | ||
| 89 | CFLAGS_ABI +=-funwind-tables | ||
| 90 | endif | ||
| 91 | |||
| 88 | # Need -Uarm for gcc < 3.x | 92 | # Need -Uarm for gcc < 3.x |
| 89 | KBUILD_CFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm | 93 | KBUILD_CFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm |
| 90 | KBUILD_AFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float | 94 | KBUILD_AFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float |
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 77d614232d81..d1b678dc120b 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S | |||
| @@ -27,6 +27,12 @@ | |||
| 27 | .macro writeb, ch, rb | 27 | .macro writeb, ch, rb |
| 28 | mcr p14, 0, \ch, c0, c5, 0 | 28 | mcr p14, 0, \ch, c0, c5, 0 |
| 29 | .endm | 29 | .endm |
| 30 | #elif defined(CONFIG_CPU_XSCALE) | ||
| 31 | .macro loadsp, rb | ||
| 32 | .endm | ||
| 33 | .macro writeb, ch, rb | ||
| 34 | mcr p14, 0, \ch, c8, c0, 0 | ||
| 35 | .endm | ||
| 30 | #else | 36 | #else |
| 31 | .macro loadsp, rb | 37 | .macro loadsp, rb |
| 32 | .endm | 38 | .endm |
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c index 3fc08413fff0..393c81641314 100644 --- a/arch/arm/boot/compressed/misc.c +++ b/arch/arm/boot/compressed/misc.c | |||
| @@ -46,6 +46,21 @@ static void icedcc_putc(int ch) | |||
| 46 | 46 | ||
| 47 | asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); | 47 | asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); |
| 48 | } | 48 | } |
| 49 | #elif defined(CONFIG_CPU_XSCALE) | ||
| 50 | |||
| 51 | static void icedcc_putc(int ch) | ||
| 52 | { | ||
| 53 | int status, i = 0x4000000; | ||
| 54 | |||
| 55 | do { | ||
| 56 | if (--i < 0) | ||
| 57 | return; | ||
| 58 | |||
| 59 | asm volatile ("mrc p14, 0, %0, c14, c0, 0" : "=r" (status)); | ||
| 60 | } while (status & (1 << 28)); | ||
| 61 | |||
| 62 | asm("mcr p14, 0, %0, c8, c0, 0" : : "r" (ch)); | ||
| 63 | } | ||
| 49 | 64 | ||
| 50 | #else | 65 | #else |
| 51 | 66 | ||
diff --git a/arch/arm/boot/compressed/vmlinux.lds.in b/arch/arm/boot/compressed/vmlinux.lds.in index 153a07e7222b..a5924b9b88bd 100644 --- a/arch/arm/boot/compressed/vmlinux.lds.in +++ b/arch/arm/boot/compressed/vmlinux.lds.in | |||
| @@ -11,6 +11,11 @@ OUTPUT_ARCH(arm) | |||
| 11 | ENTRY(_start) | 11 | ENTRY(_start) |
| 12 | SECTIONS | 12 | SECTIONS |
| 13 | { | 13 | { |
| 14 | /DISCARD/ : { | ||
| 15 | *(.ARM.exidx*) | ||
| 16 | *(.ARM.extab*) | ||
| 17 | } | ||
| 18 | |||
| 14 | . = TEXT_START; | 19 | . = TEXT_START; |
| 15 | _text = .; | 20 | _text = .; |
| 16 | 21 | ||
diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c index 780bbf7cb26f..140f1d721d50 100644 --- a/arch/arm/common/sharpsl_pm.c +++ b/arch/arm/common/sharpsl_pm.c | |||
| @@ -29,8 +29,8 @@ | |||
| 29 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
| 30 | #include <asm/irq.h> | 30 | #include <asm/irq.h> |
| 31 | #include <mach/pm.h> | 31 | #include <mach/pm.h> |
| 32 | #include <mach/pxa-regs.h> | ||
| 33 | #include <mach/pxa2xx-regs.h> | 32 | #include <mach/pxa2xx-regs.h> |
| 33 | #include <mach/regs-rtc.h> | ||
| 34 | #include <mach/sharpsl.h> | 34 | #include <mach/sharpsl.h> |
| 35 | #include <asm/hardware/sharpsl_pm.h> | 35 | #include <asm/hardware/sharpsl_pm.h> |
| 36 | 36 | ||
diff --git a/arch/arm/configs/acs5k_defconfig b/arch/arm/configs/acs5k_defconfig new file mode 100644 index 000000000000..1cab4e79d368 --- /dev/null +++ b/arch/arm/configs/acs5k_defconfig | |||
| @@ -0,0 +1,1233 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.27-simtec-micrel1 | ||
| 4 | # Tue Dec 16 13:31:34 2008 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | # CONFIG_GENERIC_TIME is not set | ||
| 10 | # CONFIG_GENERIC_CLOCKEVENTS is not set | ||
| 11 | CONFIG_MMU=y | ||
| 12 | # CONFIG_NO_IOPORT is not set | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | ||
| 14 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 16 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 17 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | ||
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 25 | CONFIG_ARCH_SUPPORTS_AOUT=y | ||
| 26 | CONFIG_ZONE_DMA=y | ||
| 27 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 28 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 29 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 30 | |||
| 31 | # | ||
| 32 | # General setup | ||
| 33 | # | ||
| 34 | CONFIG_EXPERIMENTAL=y | ||
| 35 | CONFIG_BROKEN_ON_SMP=y | ||
| 36 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 37 | CONFIG_LOCALVERSION="" | ||
| 38 | CONFIG_LOCALVERSION_AUTO=y | ||
| 39 | # CONFIG_SWAP is not set | ||
| 40 | CONFIG_SYSVIPC=y | ||
| 41 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 42 | CONFIG_POSIX_MQUEUE=y | ||
| 43 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 44 | # CONFIG_TASKSTATS is not set | ||
| 45 | # CONFIG_AUDIT is not set | ||
| 46 | # CONFIG_IKCONFIG is not set | ||
| 47 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 48 | # CONFIG_CGROUPS is not set | ||
| 49 | # CONFIG_GROUP_SCHED is not set | ||
| 50 | CONFIG_SYSFS_DEPRECATED=y | ||
| 51 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 52 | # CONFIG_RELAY is not set | ||
| 53 | CONFIG_NAMESPACES=y | ||
| 54 | # CONFIG_UTS_NS is not set | ||
| 55 | # CONFIG_IPC_NS is not set | ||
| 56 | # CONFIG_USER_NS is not set | ||
| 57 | # CONFIG_PID_NS is not set | ||
| 58 | CONFIG_BLK_DEV_INITRD=y | ||
| 59 | CONFIG_INITRAMFS_SOURCE="" | ||
| 60 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 61 | CONFIG_SYSCTL=y | ||
| 62 | # CONFIG_EMBEDDED is not set | ||
| 63 | CONFIG_UID16=y | ||
| 64 | CONFIG_SYSCTL_SYSCALL=y | ||
| 65 | CONFIG_KALLSYMS=y | ||
| 66 | # CONFIG_KALLSYMS_ALL is not set | ||
| 67 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 68 | CONFIG_HOTPLUG=y | ||
| 69 | CONFIG_PRINTK=y | ||
| 70 | CONFIG_BUG=y | ||
| 71 | CONFIG_ELF_CORE=y | ||
| 72 | CONFIG_COMPAT_BRK=y | ||
| 73 | CONFIG_BASE_FULL=y | ||
| 74 | CONFIG_FUTEX=y | ||
| 75 | CONFIG_ANON_INODES=y | ||
| 76 | CONFIG_EPOLL=y | ||
| 77 | CONFIG_SIGNALFD=y | ||
| 78 | CONFIG_TIMERFD=y | ||
| 79 | CONFIG_EVENTFD=y | ||
| 80 | CONFIG_SHMEM=y | ||
| 81 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 82 | CONFIG_SLAB=y | ||
| 83 | # CONFIG_SLUB is not set | ||
| 84 | # CONFIG_SLOB is not set | ||
| 85 | # CONFIG_PROFILING is not set | ||
| 86 | # CONFIG_MARKERS is not set | ||
| 87 | CONFIG_HAVE_OPROFILE=y | ||
| 88 | # CONFIG_KPROBES is not set | ||
| 89 | # CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set | ||
| 90 | # CONFIG_HAVE_IOREMAP_PROT is not set | ||
| 91 | CONFIG_HAVE_KPROBES=y | ||
| 92 | CONFIG_HAVE_KRETPROBES=y | ||
| 93 | # CONFIG_HAVE_ARCH_TRACEHOOK is not set | ||
| 94 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
| 95 | # CONFIG_USE_GENERIC_SMP_HELPERS is not set | ||
| 96 | # CONFIG_HAVE_CLK is not set | ||
| 97 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 98 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 99 | CONFIG_SLABINFO=y | ||
| 100 | CONFIG_RT_MUTEXES=y | ||
| 101 | # CONFIG_TINY_SHMEM is not set | ||
| 102 | CONFIG_BASE_SMALL=0 | ||
| 103 | CONFIG_MODULES=y | ||
| 104 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 105 | CONFIG_MODULE_UNLOAD=y | ||
| 106 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 107 | # CONFIG_MODVERSIONS is not set | ||
| 108 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 109 | CONFIG_KMOD=y | ||
| 110 | CONFIG_BLOCK=y | ||
| 111 | # CONFIG_LBD is not set | ||
| 112 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 113 | # CONFIG_LSF is not set | ||
| 114 | # CONFIG_BLK_DEV_BSG is not set | ||
| 115 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 116 | |||
| 117 | # | ||
| 118 | # IO Schedulers | ||
| 119 | # | ||
| 120 | CONFIG_IOSCHED_NOOP=y | ||
| 121 | CONFIG_IOSCHED_AS=y | ||
| 122 | # CONFIG_IOSCHED_DEADLINE is not set | ||
| 123 | # CONFIG_IOSCHED_CFQ is not set | ||
| 124 | CONFIG_DEFAULT_AS=y | ||
| 125 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 126 | # CONFIG_DEFAULT_CFQ is not set | ||
| 127 | # CONFIG_DEFAULT_NOOP is not set | ||
| 128 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 129 | CONFIG_CLASSIC_RCU=y | ||
| 130 | |||
| 131 | # | ||
| 132 | # System Type | ||
| 133 | # | ||
| 134 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 135 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 136 | # CONFIG_ARCH_REALVIEW is not set | ||
| 137 | # CONFIG_ARCH_VERSATILE is not set | ||
| 138 | # CONFIG_ARCH_AT91 is not set | ||
| 139 | # CONFIG_ARCH_CLPS7500 is not set | ||
| 140 | # CONFIG_ARCH_CLPS711X is not set | ||
| 141 | # CONFIG_ARCH_EBSA110 is not set | ||
| 142 | # CONFIG_ARCH_EP93XX is not set | ||
| 143 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 144 | # CONFIG_ARCH_NETX is not set | ||
| 145 | # CONFIG_ARCH_H720X is not set | ||
| 146 | # CONFIG_ARCH_IMX is not set | ||
| 147 | # CONFIG_ARCH_IOP13XX is not set | ||
| 148 | # CONFIG_ARCH_IOP32X is not set | ||
| 149 | # CONFIG_ARCH_IOP33X is not set | ||
| 150 | # CONFIG_ARCH_IXP23XX is not set | ||
| 151 | # CONFIG_ARCH_IXP2000 is not set | ||
| 152 | # CONFIG_ARCH_IXP4XX is not set | ||
| 153 | # CONFIG_ARCH_L7200 is not set | ||
| 154 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 155 | CONFIG_ARCH_KS8695=y | ||
| 156 | # CONFIG_ARCH_NS9XXX is not set | ||
| 157 | # CONFIG_ARCH_LOKI is not set | ||
| 158 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 159 | # CONFIG_ARCH_MXC is not set | ||
| 160 | # CONFIG_ARCH_ORION5X is not set | ||
| 161 | # CONFIG_ARCH_PNX4008 is not set | ||
| 162 | # CONFIG_ARCH_PXA is not set | ||
| 163 | # CONFIG_ARCH_RPC is not set | ||
| 164 | # CONFIG_ARCH_SA1100 is not set | ||
| 165 | # CONFIG_ARCH_S3C2410 is not set | ||
| 166 | # CONFIG_ARCH_SHARK is not set | ||
| 167 | # CONFIG_ARCH_LH7A40X is not set | ||
| 168 | # CONFIG_ARCH_DAVINCI is not set | ||
| 169 | # CONFIG_ARCH_OMAP is not set | ||
| 170 | # CONFIG_ARCH_MSM7X00A is not set | ||
| 171 | |||
| 172 | # | ||
| 173 | # Boot options | ||
| 174 | # | ||
| 175 | |||
| 176 | # | ||
| 177 | # Power management | ||
| 178 | # | ||
| 179 | |||
| 180 | # | ||
| 181 | # Kendin/Micrel KS8695 Implementations | ||
| 182 | # | ||
| 183 | CONFIG_MACH_KS8695=y | ||
| 184 | CONFIG_MACH_DSM320=y | ||
| 185 | CONFIG_MACH_ACS5K=y | ||
| 186 | |||
| 187 | # | ||
| 188 | # Processor Type | ||
| 189 | # | ||
| 190 | CONFIG_CPU_32=y | ||
| 191 | CONFIG_CPU_ARM922T=y | ||
| 192 | CONFIG_CPU_32v4T=y | ||
| 193 | CONFIG_CPU_ABRT_EV4T=y | ||
| 194 | CONFIG_CPU_PABRT_NOIFAR=y | ||
| 195 | CONFIG_CPU_CACHE_V4WT=y | ||
| 196 | CONFIG_CPU_CACHE_VIVT=y | ||
| 197 | CONFIG_CPU_COPY_V4WB=y | ||
| 198 | CONFIG_CPU_TLB_V4WBI=y | ||
| 199 | CONFIG_CPU_CP15=y | ||
| 200 | CONFIG_CPU_CP15_MMU=y | ||
| 201 | |||
| 202 | # | ||
| 203 | # Processor Features | ||
| 204 | # | ||
| 205 | # CONFIG_ARM_THUMB is not set | ||
| 206 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 207 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 208 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | ||
| 209 | # CONFIG_OUTER_CACHE is not set | ||
| 210 | |||
| 211 | # | ||
| 212 | # Bus support | ||
| 213 | # | ||
| 214 | CONFIG_PCI=y | ||
| 215 | CONFIG_PCI_SYSCALL=y | ||
| 216 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 217 | CONFIG_PCI_LEGACY=y | ||
| 218 | CONFIG_PCI_DEBUG=y | ||
| 219 | CONFIG_PCCARD=y | ||
| 220 | # CONFIG_PCMCIA_DEBUG is not set | ||
| 221 | CONFIG_PCMCIA=y | ||
| 222 | CONFIG_PCMCIA_LOAD_CIS=y | ||
| 223 | CONFIG_PCMCIA_IOCTL=y | ||
| 224 | CONFIG_CARDBUS=y | ||
| 225 | |||
| 226 | # | ||
| 227 | # PC-card bridges | ||
| 228 | # | ||
| 229 | CONFIG_YENTA=y | ||
| 230 | CONFIG_YENTA_O2=y | ||
| 231 | CONFIG_YENTA_RICOH=y | ||
| 232 | CONFIG_YENTA_TI=y | ||
| 233 | CONFIG_YENTA_ENE_TUNE=y | ||
| 234 | CONFIG_YENTA_TOSHIBA=y | ||
| 235 | # CONFIG_PD6729 is not set | ||
| 236 | # CONFIG_I82092 is not set | ||
| 237 | CONFIG_PCCARD_NONSTATIC=y | ||
| 238 | |||
| 239 | # | ||
| 240 | # Kernel Features | ||
| 241 | # | ||
| 242 | # CONFIG_TICK_ONESHOT is not set | ||
| 243 | # CONFIG_PREEMPT is not set | ||
| 244 | CONFIG_HZ=100 | ||
| 245 | CONFIG_AEABI=y | ||
| 246 | CONFIG_OABI_COMPAT=y | ||
| 247 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y | ||
| 248 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
| 249 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 250 | CONFIG_FLATMEM_MANUAL=y | ||
| 251 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 252 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 253 | CONFIG_FLATMEM=y | ||
| 254 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 255 | # CONFIG_SPARSEMEM_STATIC is not set | ||
| 256 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
| 257 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 258 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 259 | # CONFIG_RESOURCES_64BIT is not set | ||
| 260 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 261 | CONFIG_BOUNCE=y | ||
| 262 | CONFIG_VIRT_TO_BUS=y | ||
| 263 | # CONFIG_LEDS is not set | ||
| 264 | CONFIG_ALIGNMENT_TRAP=y | ||
| 265 | |||
| 266 | # | ||
| 267 | # Boot options | ||
| 268 | # | ||
| 269 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 270 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 271 | CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw" | ||
| 272 | # CONFIG_XIP_KERNEL is not set | ||
| 273 | # CONFIG_KEXEC is not set | ||
| 274 | |||
| 275 | # | ||
| 276 | # Floating point emulation | ||
| 277 | # | ||
| 278 | |||
| 279 | # | ||
| 280 | # At least one emulation must be selected | ||
| 281 | # | ||
| 282 | # CONFIG_FPE_NWFPE is not set | ||
| 283 | # CONFIG_FPE_FASTFPE is not set | ||
| 284 | |||
| 285 | # | ||
| 286 | # Userspace binary formats | ||
| 287 | # | ||
| 288 | CONFIG_BINFMT_ELF=y | ||
| 289 | # CONFIG_BINFMT_AOUT is not set | ||
| 290 | # CONFIG_BINFMT_MISC is not set | ||
| 291 | |||
| 292 | # | ||
| 293 | # Power management options | ||
| 294 | # | ||
| 295 | # CONFIG_PM is not set | ||
| 296 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 297 | CONFIG_NET=y | ||
| 298 | |||
| 299 | # | ||
| 300 | # Networking options | ||
| 301 | # | ||
| 302 | CONFIG_PACKET=y | ||
| 303 | # CONFIG_PACKET_MMAP is not set | ||
| 304 | CONFIG_UNIX=y | ||
| 305 | CONFIG_XFRM=y | ||
| 306 | # CONFIG_XFRM_USER is not set | ||
| 307 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 308 | # CONFIG_XFRM_MIGRATE is not set | ||
| 309 | # CONFIG_XFRM_STATISTICS is not set | ||
| 310 | # CONFIG_NET_KEY is not set | ||
| 311 | CONFIG_INET=y | ||
| 312 | # CONFIG_IP_MULTICAST is not set | ||
| 313 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 314 | CONFIG_IP_FIB_HASH=y | ||
| 315 | CONFIG_IP_PNP=y | ||
| 316 | CONFIG_IP_PNP_DHCP=y | ||
| 317 | # CONFIG_IP_PNP_BOOTP is not set | ||
| 318 | # CONFIG_IP_PNP_RARP is not set | ||
| 319 | # CONFIG_NET_IPIP is not set | ||
| 320 | # CONFIG_NET_IPGRE is not set | ||
| 321 | # CONFIG_ARPD is not set | ||
| 322 | # CONFIG_SYN_COOKIES is not set | ||
| 323 | # CONFIG_INET_AH is not set | ||
| 324 | # CONFIG_INET_ESP is not set | ||
| 325 | # CONFIG_INET_IPCOMP is not set | ||
| 326 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 327 | # CONFIG_INET_TUNNEL is not set | ||
| 328 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 329 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 330 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 331 | # CONFIG_INET_LRO is not set | ||
| 332 | CONFIG_INET_DIAG=y | ||
| 333 | CONFIG_INET_TCP_DIAG=y | ||
| 334 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 335 | CONFIG_TCP_CONG_CUBIC=y | ||
| 336 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 337 | # CONFIG_TCP_MD5SIG is not set | ||
| 338 | # CONFIG_IPV6 is not set | ||
| 339 | # CONFIG_NETWORK_SECMARK is not set | ||
| 340 | # CONFIG_NETFILTER is not set | ||
| 341 | # CONFIG_IP_DCCP is not set | ||
| 342 | # CONFIG_IP_SCTP is not set | ||
| 343 | # CONFIG_TIPC is not set | ||
| 344 | # CONFIG_ATM is not set | ||
| 345 | # CONFIG_BRIDGE is not set | ||
| 346 | # CONFIG_VLAN_8021Q is not set | ||
| 347 | # CONFIG_DECNET is not set | ||
| 348 | # CONFIG_LLC2 is not set | ||
| 349 | # CONFIG_IPX is not set | ||
| 350 | # CONFIG_ATALK is not set | ||
| 351 | # CONFIG_X25 is not set | ||
| 352 | # CONFIG_LAPB is not set | ||
| 353 | # CONFIG_ECONET is not set | ||
| 354 | # CONFIG_WAN_ROUTER is not set | ||
| 355 | # CONFIG_NET_SCHED is not set | ||
| 356 | |||
| 357 | # | ||
| 358 | # Network testing | ||
| 359 | # | ||
| 360 | # CONFIG_NET_PKTGEN is not set | ||
| 361 | # CONFIG_HAMRADIO is not set | ||
| 362 | # CONFIG_CAN is not set | ||
| 363 | # CONFIG_IRDA is not set | ||
| 364 | # CONFIG_BT is not set | ||
| 365 | # CONFIG_AF_RXRPC is not set | ||
| 366 | |||
| 367 | # | ||
| 368 | # Wireless | ||
| 369 | # | ||
| 370 | # CONFIG_CFG80211 is not set | ||
| 371 | CONFIG_WIRELESS_EXT=y | ||
| 372 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
| 373 | # CONFIG_MAC80211 is not set | ||
| 374 | # CONFIG_IEEE80211 is not set | ||
| 375 | # CONFIG_RFKILL is not set | ||
| 376 | # CONFIG_NET_9P is not set | ||
| 377 | |||
| 378 | # | ||
| 379 | # Device Drivers | ||
| 380 | # | ||
| 381 | |||
| 382 | # | ||
| 383 | # Generic Driver Options | ||
| 384 | # | ||
| 385 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 386 | CONFIG_STANDALONE=y | ||
| 387 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 388 | CONFIG_FW_LOADER=y | ||
| 389 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 390 | CONFIG_EXTRA_FIRMWARE="" | ||
| 391 | # CONFIG_DEBUG_DRIVER is not set | ||
| 392 | # CONFIG_DEBUG_DEVRES is not set | ||
| 393 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 394 | # CONFIG_CONNECTOR is not set | ||
| 395 | CONFIG_MTD=y | ||
| 396 | # CONFIG_MTD_DEBUG is not set | ||
| 397 | CONFIG_MTD_CONCAT=y | ||
| 398 | CONFIG_MTD_PARTITIONS=y | ||
| 399 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 400 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
| 401 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 402 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 403 | |||
| 404 | # | ||
| 405 | # User Modules And Translation Layers | ||
| 406 | # | ||
| 407 | CONFIG_MTD_CHAR=y | ||
| 408 | CONFIG_MTD_BLKDEVS=y | ||
| 409 | CONFIG_MTD_BLOCK=y | ||
| 410 | # CONFIG_FTL is not set | ||
| 411 | # CONFIG_NFTL is not set | ||
| 412 | # CONFIG_INFTL is not set | ||
| 413 | # CONFIG_RFD_FTL is not set | ||
| 414 | # CONFIG_SSFDC is not set | ||
| 415 | # CONFIG_MTD_OOPS is not set | ||
| 416 | |||
| 417 | # | ||
| 418 | # RAM/ROM/Flash chip drivers | ||
| 419 | # | ||
| 420 | CONFIG_MTD_CFI=y | ||
| 421 | CONFIG_MTD_JEDECPROBE=y | ||
| 422 | CONFIG_MTD_GEN_PROBE=y | ||
| 423 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
| 424 | CONFIG_MTD_CFI_NOSWAP=y | ||
| 425 | # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set | ||
| 426 | # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set | ||
| 427 | # CONFIG_MTD_CFI_GEOMETRY is not set | ||
| 428 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 429 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 430 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 431 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 432 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 433 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 434 | CONFIG_MTD_CFI_I1=y | ||
| 435 | CONFIG_MTD_CFI_I2=y | ||
| 436 | # CONFIG_MTD_CFI_I4 is not set | ||
| 437 | # CONFIG_MTD_CFI_I8 is not set | ||
| 438 | # CONFIG_MTD_OTP is not set | ||
| 439 | CONFIG_MTD_CFI_INTELEXT=y | ||
| 440 | CONFIG_MTD_CFI_AMDSTD=y | ||
| 441 | # CONFIG_MTD_CFI_STAA is not set | ||
| 442 | CONFIG_MTD_CFI_UTIL=y | ||
| 443 | # CONFIG_MTD_RAM is not set | ||
| 444 | # CONFIG_MTD_ROM is not set | ||
| 445 | # CONFIG_MTD_ABSENT is not set | ||
| 446 | |||
| 447 | # | ||
| 448 | # Mapping drivers for chip access | ||
| 449 | # | ||
| 450 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 451 | CONFIG_MTD_PHYSMAP=y | ||
| 452 | CONFIG_MTD_PHYSMAP_START=0x8000000 | ||
| 453 | CONFIG_MTD_PHYSMAP_LEN=0 | ||
| 454 | CONFIG_MTD_PHYSMAP_BANKWIDTH=4 | ||
| 455 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
| 456 | # CONFIG_MTD_IMPA7 is not set | ||
| 457 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
| 458 | # CONFIG_MTD_PLATRAM is not set | ||
| 459 | |||
| 460 | # | ||
| 461 | # Self-contained MTD device drivers | ||
| 462 | # | ||
| 463 | # CONFIG_MTD_PMC551 is not set | ||
| 464 | # CONFIG_MTD_SLRAM is not set | ||
| 465 | # CONFIG_MTD_PHRAM is not set | ||
| 466 | # CONFIG_MTD_MTDRAM is not set | ||
| 467 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 468 | |||
| 469 | # | ||
| 470 | # Disk-On-Chip Device Drivers | ||
| 471 | # | ||
| 472 | # CONFIG_MTD_DOC2000 is not set | ||
| 473 | # CONFIG_MTD_DOC2001 is not set | ||
| 474 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 475 | # CONFIG_MTD_NAND is not set | ||
| 476 | # CONFIG_MTD_ONENAND is not set | ||
| 477 | |||
| 478 | # | ||
| 479 | # UBI - Unsorted block images | ||
| 480 | # | ||
| 481 | # CONFIG_MTD_UBI is not set | ||
| 482 | # CONFIG_PARPORT is not set | ||
| 483 | CONFIG_BLK_DEV=y | ||
| 484 | # CONFIG_BLK_CPQ_DA is not set | ||
| 485 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
| 486 | # CONFIG_BLK_DEV_DAC960 is not set | ||
| 487 | # CONFIG_BLK_DEV_UMEM is not set | ||
| 488 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 489 | # CONFIG_BLK_DEV_LOOP is not set | ||
| 490 | # CONFIG_BLK_DEV_NBD is not set | ||
| 491 | # CONFIG_BLK_DEV_SX8 is not set | ||
| 492 | CONFIG_BLK_DEV_RAM=y | ||
| 493 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 494 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
| 495 | # CONFIG_BLK_DEV_XIP is not set | ||
| 496 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 497 | # CONFIG_ATA_OVER_ETH is not set | ||
| 498 | CONFIG_MISC_DEVICES=y | ||
| 499 | # CONFIG_PHANTOM is not set | ||
| 500 | # CONFIG_EEPROM_93CX6 is not set | ||
| 501 | # CONFIG_SGI_IOC4 is not set | ||
| 502 | # CONFIG_TIFM_CORE is not set | ||
| 503 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 504 | # CONFIG_HP_ILO is not set | ||
| 505 | CONFIG_HAVE_IDE=y | ||
| 506 | # CONFIG_IDE is not set | ||
| 507 | |||
| 508 | # | ||
| 509 | # SCSI device support | ||
| 510 | # | ||
| 511 | # CONFIG_RAID_ATTRS is not set | ||
| 512 | # CONFIG_SCSI is not set | ||
| 513 | # CONFIG_SCSI_DMA is not set | ||
| 514 | # CONFIG_SCSI_NETLINK is not set | ||
| 515 | # CONFIG_ATA is not set | ||
| 516 | # CONFIG_MD is not set | ||
| 517 | # CONFIG_FUSION is not set | ||
| 518 | |||
| 519 | # | ||
| 520 | # IEEE 1394 (FireWire) support | ||
| 521 | # | ||
| 522 | |||
| 523 | # | ||
| 524 | # Enable only one of the two stacks, unless you know what you are doing | ||
| 525 | # | ||
| 526 | # CONFIG_FIREWIRE is not set | ||
| 527 | # CONFIG_IEEE1394 is not set | ||
| 528 | # CONFIG_I2O is not set | ||
| 529 | CONFIG_NETDEVICES=y | ||
| 530 | # CONFIG_DUMMY is not set | ||
| 531 | # CONFIG_BONDING is not set | ||
| 532 | # CONFIG_MACVLAN is not set | ||
| 533 | # CONFIG_EQUALIZER is not set | ||
| 534 | # CONFIG_TUN is not set | ||
| 535 | # CONFIG_VETH is not set | ||
| 536 | # CONFIG_ARCNET is not set | ||
| 537 | # CONFIG_PHYLIB is not set | ||
| 538 | CONFIG_NET_ETHERNET=y | ||
| 539 | CONFIG_MII=y | ||
| 540 | CONFIG_ARM_KS8695_ETHER=y | ||
| 541 | # CONFIG_AX88796 is not set | ||
| 542 | # CONFIG_HAPPYMEAL is not set | ||
| 543 | # CONFIG_SUNGEM is not set | ||
| 544 | # CONFIG_CASSINI is not set | ||
| 545 | # CONFIG_NET_VENDOR_3COM is not set | ||
| 546 | # CONFIG_SMC91X is not set | ||
| 547 | # CONFIG_DM9000 is not set | ||
| 548 | # CONFIG_NET_TULIP is not set | ||
| 549 | # CONFIG_HP100 is not set | ||
| 550 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 551 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 552 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 553 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 554 | # CONFIG_NET_PCI is not set | ||
| 555 | # CONFIG_B44 is not set | ||
| 556 | # CONFIG_NETDEV_1000 is not set | ||
| 557 | # CONFIG_NETDEV_10000 is not set | ||
| 558 | # CONFIG_TR is not set | ||
| 559 | |||
| 560 | # | ||
| 561 | # Wireless LAN | ||
| 562 | # | ||
| 563 | # CONFIG_WLAN_PRE80211 is not set | ||
| 564 | CONFIG_WLAN_80211=y | ||
| 565 | # CONFIG_PCMCIA_RAYCS is not set | ||
| 566 | # CONFIG_IPW2100 is not set | ||
| 567 | # CONFIG_IPW2200 is not set | ||
| 568 | # CONFIG_LIBERTAS is not set | ||
| 569 | # CONFIG_HERMES is not set | ||
| 570 | # CONFIG_ATMEL is not set | ||
| 571 | # CONFIG_AIRO_CS is not set | ||
| 572 | # CONFIG_PCMCIA_WL3501 is not set | ||
| 573 | CONFIG_PRISM54=m | ||
| 574 | # CONFIG_IWLWIFI_LEDS is not set | ||
| 575 | # CONFIG_HOSTAP is not set | ||
| 576 | # CONFIG_NET_PCMCIA is not set | ||
| 577 | # CONFIG_WAN is not set | ||
| 578 | # CONFIG_FDDI is not set | ||
| 579 | # CONFIG_HIPPI is not set | ||
| 580 | # CONFIG_PPP is not set | ||
| 581 | # CONFIG_SLIP is not set | ||
| 582 | # CONFIG_NETCONSOLE is not set | ||
| 583 | # CONFIG_NETPOLL is not set | ||
| 584 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 585 | # CONFIG_ISDN is not set | ||
| 586 | |||
| 587 | # | ||
| 588 | # Input device support | ||
| 589 | # | ||
| 590 | CONFIG_INPUT=y | ||
| 591 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 592 | # CONFIG_INPUT_POLLDEV is not set | ||
| 593 | |||
| 594 | # | ||
| 595 | # Userland interfaces | ||
| 596 | # | ||
| 597 | CONFIG_INPUT_MOUSEDEV=y | ||
| 598 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
| 599 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 600 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 601 | # CONFIG_INPUT_JOYDEV is not set | ||
| 602 | # CONFIG_INPUT_EVDEV is not set | ||
| 603 | # CONFIG_INPUT_EVBUG is not set | ||
| 604 | |||
| 605 | # | ||
| 606 | # Input Device Drivers | ||
| 607 | # | ||
| 608 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 609 | # CONFIG_INPUT_MOUSE is not set | ||
| 610 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 611 | # CONFIG_INPUT_TABLET is not set | ||
| 612 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 613 | # CONFIG_INPUT_MISC is not set | ||
| 614 | |||
| 615 | # | ||
| 616 | # Hardware I/O ports | ||
| 617 | # | ||
| 618 | # CONFIG_SERIO is not set | ||
| 619 | # CONFIG_GAMEPORT is not set | ||
| 620 | |||
| 621 | # | ||
| 622 | # Character devices | ||
| 623 | # | ||
| 624 | CONFIG_VT=y | ||
| 625 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 626 | CONFIG_VT_CONSOLE=y | ||
| 627 | CONFIG_HW_CONSOLE=y | ||
| 628 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 629 | CONFIG_DEVKMEM=y | ||
| 630 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 631 | # CONFIG_NOZOMI is not set | ||
| 632 | |||
| 633 | # | ||
| 634 | # Serial drivers | ||
| 635 | # | ||
| 636 | # CONFIG_SERIAL_8250 is not set | ||
| 637 | |||
| 638 | # | ||
| 639 | # Non-8250 serial port support | ||
| 640 | # | ||
| 641 | CONFIG_SERIAL_KS8695=y | ||
| 642 | CONFIG_SERIAL_KS8695_CONSOLE=y | ||
| 643 | CONFIG_SERIAL_CORE=y | ||
| 644 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 645 | # CONFIG_SERIAL_JSM is not set | ||
| 646 | CONFIG_UNIX98_PTYS=y | ||
| 647 | CONFIG_LEGACY_PTYS=y | ||
| 648 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 649 | # CONFIG_IPMI_HANDLER is not set | ||
| 650 | CONFIG_HW_RANDOM=m | ||
| 651 | # CONFIG_NVRAM is not set | ||
| 652 | # CONFIG_R3964 is not set | ||
| 653 | # CONFIG_APPLICOM is not set | ||
| 654 | |||
| 655 | # | ||
| 656 | # PCMCIA character devices | ||
| 657 | # | ||
| 658 | # CONFIG_SYNCLINK_CS is not set | ||
| 659 | # CONFIG_CARDMAN_4000 is not set | ||
| 660 | # CONFIG_CARDMAN_4040 is not set | ||
| 661 | # CONFIG_IPWIRELESS is not set | ||
| 662 | # CONFIG_RAW_DRIVER is not set | ||
| 663 | # CONFIG_TCG_TPM is not set | ||
| 664 | CONFIG_DEVPORT=y | ||
| 665 | CONFIG_ACS5KCAN=y | ||
| 666 | CONFIG_I2C=y | ||
| 667 | CONFIG_I2C_BOARDINFO=y | ||
| 668 | CONFIG_I2C_CHARDEV=y | ||
| 669 | CONFIG_I2C_HELPER_AUTO=y | ||
| 670 | CONFIG_I2C_ALGOBIT=y | ||
| 671 | |||
| 672 | # | ||
| 673 | # I2C Hardware Bus support | ||
| 674 | # | ||
| 675 | |||
| 676 | # | ||
| 677 | # PC SMBus host controller drivers | ||
| 678 | # | ||
| 679 | # CONFIG_I2C_ALI1535 is not set | ||
| 680 | # CONFIG_I2C_ALI1563 is not set | ||
| 681 | # CONFIG_I2C_ALI15X3 is not set | ||
| 682 | # CONFIG_I2C_AMD756 is not set | ||
| 683 | # CONFIG_I2C_AMD8111 is not set | ||
| 684 | # CONFIG_I2C_I801 is not set | ||
| 685 | # CONFIG_I2C_ISCH is not set | ||
| 686 | # CONFIG_I2C_PIIX4 is not set | ||
| 687 | # CONFIG_I2C_NFORCE2 is not set | ||
| 688 | # CONFIG_I2C_SIS5595 is not set | ||
| 689 | # CONFIG_I2C_SIS630 is not set | ||
| 690 | # CONFIG_I2C_SIS96X is not set | ||
| 691 | # CONFIG_I2C_VIA is not set | ||
| 692 | # CONFIG_I2C_VIAPRO is not set | ||
| 693 | |||
| 694 | # | ||
| 695 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 696 | # | ||
| 697 | CONFIG_I2C_GPIO=y | ||
| 698 | # CONFIG_I2C_OCORES is not set | ||
| 699 | # CONFIG_I2C_SIMTEC is not set | ||
| 700 | |||
| 701 | # | ||
| 702 | # External I2C/SMBus adapter drivers | ||
| 703 | # | ||
| 704 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 705 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 706 | |||
| 707 | # | ||
| 708 | # Graphics adapter I2C/DDC channel drivers | ||
| 709 | # | ||
| 710 | # CONFIG_I2C_VOODOO3 is not set | ||
| 711 | |||
| 712 | # | ||
| 713 | # Other I2C/SMBus bus drivers | ||
| 714 | # | ||
| 715 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 716 | # CONFIG_I2C_STUB is not set | ||
| 717 | |||
| 718 | # | ||
| 719 | # Miscellaneous I2C Chip support | ||
| 720 | # | ||
| 721 | # CONFIG_DS1682 is not set | ||
| 722 | # CONFIG_AT24 is not set | ||
| 723 | # CONFIG_SENSORS_EEPROM is not set | ||
| 724 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 725 | # CONFIG_PCF8575 is not set | ||
| 726 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 727 | # CONFIG_TPS65010 is not set | ||
| 728 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 729 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 730 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 731 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 732 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 733 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 734 | # CONFIG_SPI is not set | ||
| 735 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 736 | CONFIG_GPIOLIB=y | ||
| 737 | # CONFIG_DEBUG_GPIO is not set | ||
| 738 | CONFIG_GPIO_SYSFS=y | ||
| 739 | |||
| 740 | # | ||
| 741 | # I2C GPIO expanders: | ||
| 742 | # | ||
| 743 | # CONFIG_GPIO_MAX732X is not set | ||
| 744 | CONFIG_GPIO_PCA953X=y | ||
| 745 | # CONFIG_GPIO_PCF857X is not set | ||
| 746 | |||
| 747 | # | ||
| 748 | # PCI GPIO expanders: | ||
| 749 | # | ||
| 750 | # CONFIG_GPIO_BT8XX is not set | ||
| 751 | |||
| 752 | # | ||
| 753 | # SPI GPIO expanders: | ||
| 754 | # | ||
| 755 | # CONFIG_W1 is not set | ||
| 756 | # CONFIG_POWER_SUPPLY is not set | ||
| 757 | CONFIG_HWMON=y | ||
| 758 | # CONFIG_HWMON_VID is not set | ||
| 759 | # CONFIG_SENSORS_AD7414 is not set | ||
| 760 | # CONFIG_SENSORS_AD7418 is not set | ||
| 761 | # CONFIG_SENSORS_ADM1021 is not set | ||
| 762 | # CONFIG_SENSORS_ADM1025 is not set | ||
| 763 | # CONFIG_SENSORS_ADM1026 is not set | ||
| 764 | # CONFIG_SENSORS_ADM1029 is not set | ||
| 765 | # CONFIG_SENSORS_ADM1031 is not set | ||
| 766 | # CONFIG_SENSORS_ADM9240 is not set | ||
| 767 | # CONFIG_SENSORS_ADT7470 is not set | ||
| 768 | # CONFIG_SENSORS_ADT7473 is not set | ||
| 769 | # CONFIG_SENSORS_ATXP1 is not set | ||
| 770 | # CONFIG_SENSORS_DS1621 is not set | ||
| 771 | # CONFIG_SENSORS_I5K_AMB is not set | ||
| 772 | # CONFIG_SENSORS_F71805F is not set | ||
| 773 | # CONFIG_SENSORS_F71882FG is not set | ||
| 774 | # CONFIG_SENSORS_F75375S is not set | ||
| 775 | # CONFIG_SENSORS_GL518SM is not set | ||
| 776 | # CONFIG_SENSORS_GL520SM is not set | ||
| 777 | # CONFIG_SENSORS_IT87 is not set | ||
| 778 | # CONFIG_SENSORS_LM63 is not set | ||
| 779 | # CONFIG_SENSORS_LM75 is not set | ||
| 780 | # CONFIG_SENSORS_LM77 is not set | ||
| 781 | # CONFIG_SENSORS_LM78 is not set | ||
| 782 | # CONFIG_SENSORS_LM80 is not set | ||
| 783 | # CONFIG_SENSORS_LM83 is not set | ||
| 784 | # CONFIG_SENSORS_LM85 is not set | ||
| 785 | # CONFIG_SENSORS_LM87 is not set | ||
| 786 | # CONFIG_SENSORS_LM90 is not set | ||
| 787 | # CONFIG_SENSORS_LM92 is not set | ||
| 788 | # CONFIG_SENSORS_LM93 is not set | ||
| 789 | # CONFIG_SENSORS_MAX1619 is not set | ||
| 790 | # CONFIG_SENSORS_MAX6650 is not set | ||
| 791 | # CONFIG_SENSORS_PC87360 is not set | ||
| 792 | # CONFIG_SENSORS_PC87427 is not set | ||
| 793 | # CONFIG_SENSORS_SIS5595 is not set | ||
| 794 | # CONFIG_SENSORS_DME1737 is not set | ||
| 795 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
| 796 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
| 797 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
| 798 | # CONFIG_SENSORS_ADS7828 is not set | ||
| 799 | # CONFIG_SENSORS_THMC50 is not set | ||
| 800 | # CONFIG_SENSORS_VIA686A is not set | ||
| 801 | # CONFIG_SENSORS_VT1211 is not set | ||
| 802 | # CONFIG_SENSORS_VT8231 is not set | ||
| 803 | # CONFIG_SENSORS_W83781D is not set | ||
| 804 | # CONFIG_SENSORS_W83791D is not set | ||
| 805 | # CONFIG_SENSORS_W83792D is not set | ||
| 806 | # CONFIG_SENSORS_W83793 is not set | ||
| 807 | # CONFIG_SENSORS_W83L785TS is not set | ||
| 808 | # CONFIG_SENSORS_W83L786NG is not set | ||
| 809 | # CONFIG_SENSORS_W83627HF is not set | ||
| 810 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 811 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 812 | CONFIG_WATCHDOG=y | ||
| 813 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
| 814 | |||
| 815 | # | ||
| 816 | # Watchdog Device Drivers | ||
| 817 | # | ||
| 818 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 819 | CONFIG_KS8695_WATCHDOG=y | ||
| 820 | # CONFIG_ALIM7101_WDT is not set | ||
| 821 | |||
| 822 | # | ||
| 823 | # PCI-based Watchdog Cards | ||
| 824 | # | ||
| 825 | # CONFIG_PCIPCWATCHDOG is not set | ||
| 826 | # CONFIG_WDTPCI is not set | ||
| 827 | |||
| 828 | # | ||
| 829 | # Sonics Silicon Backplane | ||
| 830 | # | ||
| 831 | CONFIG_SSB_POSSIBLE=y | ||
| 832 | # CONFIG_SSB is not set | ||
| 833 | |||
| 834 | # | ||
| 835 | # Multifunction device drivers | ||
| 836 | # | ||
| 837 | # CONFIG_MFD_CORE is not set | ||
| 838 | # CONFIG_MFD_SM501 is not set | ||
| 839 | # CONFIG_MFD_ASIC3 is not set | ||
| 840 | # CONFIG_HTC_EGPIO is not set | ||
| 841 | # CONFIG_HTC_PASIC3 is not set | ||
| 842 | # CONFIG_MFD_TMIO is not set | ||
| 843 | # CONFIG_MFD_T7L66XB is not set | ||
| 844 | # CONFIG_MFD_TC6387XB is not set | ||
| 845 | # CONFIG_MFD_TC6393XB is not set | ||
| 846 | |||
| 847 | # | ||
| 848 | # Multimedia devices | ||
| 849 | # | ||
| 850 | |||
| 851 | # | ||
| 852 | # Multimedia core support | ||
| 853 | # | ||
| 854 | # CONFIG_VIDEO_DEV is not set | ||
| 855 | # CONFIG_DVB_CORE is not set | ||
| 856 | # CONFIG_VIDEO_MEDIA is not set | ||
| 857 | |||
| 858 | # | ||
| 859 | # Multimedia drivers | ||
| 860 | # | ||
| 861 | # CONFIG_DAB is not set | ||
| 862 | |||
| 863 | # | ||
| 864 | # Graphics support | ||
| 865 | # | ||
| 866 | # CONFIG_DRM is not set | ||
| 867 | # CONFIG_VGASTATE is not set | ||
| 868 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 869 | # CONFIG_FB is not set | ||
| 870 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 871 | |||
| 872 | # | ||
| 873 | # Display device support | ||
| 874 | # | ||
| 875 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 876 | |||
| 877 | # | ||
| 878 | # Console display driver support | ||
| 879 | # | ||
| 880 | # CONFIG_VGA_CONSOLE is not set | ||
| 881 | CONFIG_DUMMY_CONSOLE=y | ||
| 882 | # CONFIG_SOUND is not set | ||
| 883 | CONFIG_HID_SUPPORT=y | ||
| 884 | CONFIG_HID=y | ||
| 885 | CONFIG_HID_DEBUG=y | ||
| 886 | # CONFIG_HIDRAW is not set | ||
| 887 | CONFIG_USB_SUPPORT=y | ||
| 888 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 889 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 890 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 891 | # CONFIG_USB is not set | ||
| 892 | |||
| 893 | # | ||
| 894 | # Enable Host or Gadget support to see Inventra options | ||
| 895 | # | ||
| 896 | |||
| 897 | # | ||
| 898 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
| 899 | # | ||
| 900 | # CONFIG_USB_GADGET is not set | ||
| 901 | # CONFIG_MMC is not set | ||
| 902 | # CONFIG_NEW_LEDS is not set | ||
| 903 | CONFIG_RTC_LIB=y | ||
| 904 | CONFIG_RTC_CLASS=y | ||
| 905 | CONFIG_RTC_HCTOSYS=y | ||
| 906 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 907 | # CONFIG_RTC_DEBUG is not set | ||
| 908 | |||
| 909 | # | ||
| 910 | # RTC interfaces | ||
| 911 | # | ||
| 912 | CONFIG_RTC_INTF_SYSFS=y | ||
| 913 | CONFIG_RTC_INTF_PROC=y | ||
| 914 | CONFIG_RTC_INTF_DEV=y | ||
| 915 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 916 | # CONFIG_RTC_DRV_TEST is not set | ||
| 917 | |||
| 918 | # | ||
| 919 | # I2C RTC drivers | ||
| 920 | # | ||
| 921 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 922 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 923 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 924 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 925 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 926 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 927 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 928 | CONFIG_RTC_DRV_PCF8563=y | ||
| 929 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 930 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 931 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 932 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 933 | |||
| 934 | # | ||
| 935 | # SPI RTC drivers | ||
| 936 | # | ||
| 937 | |||
| 938 | # | ||
| 939 | # Platform RTC drivers | ||
| 940 | # | ||
| 941 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 942 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 943 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 944 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 945 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 946 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 947 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 948 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 949 | |||
| 950 | # | ||
| 951 | # on-CPU RTC drivers | ||
| 952 | # | ||
| 953 | # CONFIG_DMADEVICES is not set | ||
| 954 | |||
| 955 | # | ||
| 956 | # Voltage and Current regulators | ||
| 957 | # | ||
| 958 | # CONFIG_REGULATOR is not set | ||
| 959 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 960 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 961 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 962 | # CONFIG_UIO is not set | ||
| 963 | |||
| 964 | # | ||
| 965 | # File systems | ||
| 966 | # | ||
| 967 | CONFIG_EXT2_FS=y | ||
| 968 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 969 | # CONFIG_EXT2_FS_XIP is not set | ||
| 970 | # CONFIG_EXT3_FS is not set | ||
| 971 | # CONFIG_EXT4DEV_FS is not set | ||
| 972 | # CONFIG_REISERFS_FS is not set | ||
| 973 | # CONFIG_JFS_FS is not set | ||
| 974 | # CONFIG_FS_POSIX_ACL is not set | ||
| 975 | # CONFIG_XFS_FS is not set | ||
| 976 | # CONFIG_OCFS2_FS is not set | ||
| 977 | CONFIG_DNOTIFY=y | ||
| 978 | CONFIG_INOTIFY=y | ||
| 979 | CONFIG_INOTIFY_USER=y | ||
| 980 | # CONFIG_QUOTA is not set | ||
| 981 | # CONFIG_AUTOFS_FS is not set | ||
| 982 | # CONFIG_AUTOFS4_FS is not set | ||
| 983 | # CONFIG_FUSE_FS is not set | ||
| 984 | |||
| 985 | # | ||
| 986 | # CD-ROM/DVD Filesystems | ||
| 987 | # | ||
| 988 | # CONFIG_ISO9660_FS is not set | ||
| 989 | # CONFIG_UDF_FS is not set | ||
| 990 | |||
| 991 | # | ||
| 992 | # DOS/FAT/NT Filesystems | ||
| 993 | # | ||
| 994 | # CONFIG_MSDOS_FS is not set | ||
| 995 | # CONFIG_VFAT_FS is not set | ||
| 996 | # CONFIG_NTFS_FS is not set | ||
| 997 | |||
| 998 | # | ||
| 999 | # Pseudo filesystems | ||
| 1000 | # | ||
| 1001 | CONFIG_PROC_FS=y | ||
| 1002 | CONFIG_PROC_SYSCTL=y | ||
| 1003 | CONFIG_SYSFS=y | ||
| 1004 | CONFIG_TMPFS=y | ||
| 1005 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1006 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1007 | # CONFIG_CONFIGFS_FS is not set | ||
| 1008 | |||
| 1009 | # | ||
| 1010 | # Miscellaneous filesystems | ||
| 1011 | # | ||
| 1012 | # CONFIG_ADFS_FS is not set | ||
| 1013 | # CONFIG_AFFS_FS is not set | ||
| 1014 | # CONFIG_HFS_FS is not set | ||
| 1015 | # CONFIG_HFSPLUS_FS is not set | ||
| 1016 | # CONFIG_BEFS_FS is not set | ||
| 1017 | # CONFIG_BFS_FS is not set | ||
| 1018 | # CONFIG_EFS_FS is not set | ||
| 1019 | CONFIG_JFFS2_FS=y | ||
| 1020 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 1021 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 1022 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 1023 | CONFIG_JFFS2_SUMMARY=y | ||
| 1024 | # CONFIG_JFFS2_FS_XATTR is not set | ||
| 1025 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
| 1026 | CONFIG_JFFS2_ZLIB=y | ||
| 1027 | # CONFIG_JFFS2_LZO is not set | ||
| 1028 | CONFIG_JFFS2_RTIME=y | ||
| 1029 | CONFIG_JFFS2_RUBIN=y | ||
| 1030 | # CONFIG_JFFS2_CMODE_NONE is not set | ||
| 1031 | CONFIG_JFFS2_CMODE_PRIORITY=y | ||
| 1032 | # CONFIG_JFFS2_CMODE_SIZE is not set | ||
| 1033 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set | ||
| 1034 | CONFIG_CRAMFS=y | ||
| 1035 | # CONFIG_VXFS_FS is not set | ||
| 1036 | # CONFIG_MINIX_FS is not set | ||
| 1037 | # CONFIG_OMFS_FS is not set | ||
| 1038 | # CONFIG_HPFS_FS is not set | ||
| 1039 | # CONFIG_QNX4FS_FS is not set | ||
| 1040 | # CONFIG_ROMFS_FS is not set | ||
| 1041 | # CONFIG_SYSV_FS is not set | ||
| 1042 | # CONFIG_UFS_FS is not set | ||
| 1043 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1044 | CONFIG_NFS_FS=y | ||
| 1045 | CONFIG_NFS_V3=y | ||
| 1046 | # CONFIG_NFS_V3_ACL is not set | ||
| 1047 | # CONFIG_NFS_V4 is not set | ||
| 1048 | CONFIG_ROOT_NFS=y | ||
| 1049 | # CONFIG_NFSD is not set | ||
| 1050 | CONFIG_LOCKD=y | ||
| 1051 | CONFIG_LOCKD_V4=y | ||
| 1052 | CONFIG_NFS_COMMON=y | ||
| 1053 | CONFIG_SUNRPC=y | ||
| 1054 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
| 1055 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1056 | # CONFIG_SMB_FS is not set | ||
| 1057 | # CONFIG_CIFS is not set | ||
| 1058 | # CONFIG_NCP_FS is not set | ||
| 1059 | # CONFIG_CODA_FS is not set | ||
| 1060 | # CONFIG_AFS_FS is not set | ||
| 1061 | |||
| 1062 | # | ||
| 1063 | # Partition Types | ||
| 1064 | # | ||
| 1065 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 1066 | CONFIG_MSDOS_PARTITION=y | ||
| 1067 | # CONFIG_NLS is not set | ||
| 1068 | # CONFIG_DLM is not set | ||
| 1069 | |||
| 1070 | # | ||
| 1071 | # Kernel hacking | ||
| 1072 | # | ||
| 1073 | # CONFIG_PRINTK_TIME is not set | ||
| 1074 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1075 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1076 | CONFIG_FRAME_WARN=1024 | ||
| 1077 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 1078 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1079 | # CONFIG_DEBUG_FS is not set | ||
| 1080 | # CONFIG_HEADERS_CHECK is not set | ||
| 1081 | CONFIG_DEBUG_KERNEL=y | ||
| 1082 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1083 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1084 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1085 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1086 | CONFIG_SCHED_DEBUG=y | ||
| 1087 | # CONFIG_SCHEDSTATS is not set | ||
| 1088 | # CONFIG_TIMER_STATS is not set | ||
| 1089 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1090 | # CONFIG_DEBUG_SLAB is not set | ||
| 1091 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1092 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1093 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1094 | CONFIG_DEBUG_MUTEXES=y | ||
| 1095 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1096 | # CONFIG_PROVE_LOCKING is not set | ||
| 1097 | # CONFIG_LOCK_STAT is not set | ||
| 1098 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1099 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1100 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1101 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 1102 | # CONFIG_DEBUG_INFO is not set | ||
| 1103 | # CONFIG_DEBUG_VM is not set | ||
| 1104 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1105 | CONFIG_DEBUG_MEMORY_INIT=y | ||
| 1106 | # CONFIG_DEBUG_LIST is not set | ||
| 1107 | # CONFIG_DEBUG_SG is not set | ||
| 1108 | CONFIG_FRAME_POINTER=y | ||
| 1109 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1110 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1111 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1112 | # CONFIG_FAULT_INJECTION is not set | ||
| 1113 | # CONFIG_LATENCYTOP is not set | ||
| 1114 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1115 | CONFIG_HAVE_FTRACE=y | ||
| 1116 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 1117 | # CONFIG_FTRACE is not set | ||
| 1118 | # CONFIG_SCHED_TRACER is not set | ||
| 1119 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 1120 | # CONFIG_SAMPLES is not set | ||
| 1121 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1122 | # CONFIG_KGDB is not set | ||
| 1123 | CONFIG_DEBUG_USER=y | ||
| 1124 | # CONFIG_DEBUG_ERRORS is not set | ||
| 1125 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1126 | CONFIG_DEBUG_LL=y | ||
| 1127 | # CONFIG_DEBUG_ICEDCC is not set | ||
| 1128 | |||
| 1129 | # | ||
| 1130 | # Security options | ||
| 1131 | # | ||
| 1132 | # CONFIG_KEYS is not set | ||
| 1133 | # CONFIG_SECURITY is not set | ||
| 1134 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1135 | CONFIG_CRYPTO=y | ||
| 1136 | |||
| 1137 | # | ||
| 1138 | # Crypto core or helper | ||
| 1139 | # | ||
| 1140 | # CONFIG_CRYPTO_MANAGER is not set | ||
| 1141 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1142 | # CONFIG_CRYPTO_NULL is not set | ||
| 1143 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1144 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1145 | # CONFIG_CRYPTO_TEST is not set | ||
| 1146 | |||
| 1147 | # | ||
| 1148 | # Authenticated Encryption with Associated Data | ||
| 1149 | # | ||
| 1150 | # CONFIG_CRYPTO_CCM is not set | ||
| 1151 | # CONFIG_CRYPTO_GCM is not set | ||
| 1152 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1153 | |||
| 1154 | # | ||
| 1155 | # Block modes | ||
| 1156 | # | ||
| 1157 | # CONFIG_CRYPTO_CBC is not set | ||
| 1158 | # CONFIG_CRYPTO_CTR is not set | ||
| 1159 | # CONFIG_CRYPTO_CTS is not set | ||
| 1160 | # CONFIG_CRYPTO_ECB is not set | ||
| 1161 | # CONFIG_CRYPTO_LRW is not set | ||
| 1162 | # CONFIG_CRYPTO_PCBC is not set | ||
| 1163 | # CONFIG_CRYPTO_XTS is not set | ||
| 1164 | |||
| 1165 | # | ||
| 1166 | # Hash modes | ||
| 1167 | # | ||
| 1168 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1169 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1170 | |||
| 1171 | # | ||
| 1172 | # Digest | ||
| 1173 | # | ||
| 1174 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1175 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1176 | # CONFIG_CRYPTO_MD5 is not set | ||
| 1177 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1178 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1179 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1180 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1181 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1182 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1183 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1184 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1185 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1186 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1187 | |||
| 1188 | # | ||
| 1189 | # Ciphers | ||
| 1190 | # | ||
| 1191 | # CONFIG_CRYPTO_AES is not set | ||
| 1192 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1193 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1194 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1195 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1196 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1197 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1198 | # CONFIG_CRYPTO_DES is not set | ||
| 1199 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1200 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1201 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1202 | # CONFIG_CRYPTO_SEED is not set | ||
| 1203 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1204 | # CONFIG_CRYPTO_TEA is not set | ||
| 1205 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1206 | |||
| 1207 | # | ||
| 1208 | # Compression | ||
| 1209 | # | ||
| 1210 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1211 | # CONFIG_CRYPTO_LZO is not set | ||
| 1212 | CONFIG_CRYPTO_HW=y | ||
| 1213 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
| 1214 | |||
| 1215 | # | ||
| 1216 | # Library routines | ||
| 1217 | # | ||
| 1218 | CONFIG_BITREVERSE=y | ||
| 1219 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | ||
| 1220 | # CONFIG_GENERIC_FIND_NEXT_BIT is not set | ||
| 1221 | # CONFIG_CRC_CCITT is not set | ||
| 1222 | # CONFIG_CRC16 is not set | ||
| 1223 | # CONFIG_CRC_T10DIF is not set | ||
| 1224 | # CONFIG_CRC_ITU_T is not set | ||
| 1225 | CONFIG_CRC32=y | ||
| 1226 | # CONFIG_CRC7 is not set | ||
| 1227 | # CONFIG_LIBCRC32C is not set | ||
| 1228 | CONFIG_ZLIB_INFLATE=y | ||
| 1229 | CONFIG_ZLIB_DEFLATE=y | ||
| 1230 | CONFIG_PLIST=y | ||
| 1231 | CONFIG_HAS_IOMEM=y | ||
| 1232 | CONFIG_HAS_IOPORT=y | ||
| 1233 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/acs5k_tiny_defconfig b/arch/arm/configs/acs5k_tiny_defconfig new file mode 100644 index 000000000000..8e3d084afd78 --- /dev/null +++ b/arch/arm/configs/acs5k_tiny_defconfig | |||
| @@ -0,0 +1,941 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.27-simtec-micrel1 | ||
| 4 | # Tue Jan 6 13:23:07 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | # CONFIG_GENERIC_TIME is not set | ||
| 10 | # CONFIG_GENERIC_CLOCKEVENTS is not set | ||
| 11 | CONFIG_MMU=y | ||
| 12 | # CONFIG_NO_IOPORT is not set | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | ||
| 14 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 16 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 17 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | ||
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 25 | CONFIG_ARCH_SUPPORTS_AOUT=y | ||
| 26 | CONFIG_ZONE_DMA=y | ||
| 27 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 28 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 29 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 30 | |||
| 31 | # | ||
| 32 | # General setup | ||
| 33 | # | ||
| 34 | CONFIG_EXPERIMENTAL=y | ||
| 35 | CONFIG_BROKEN_ON_SMP=y | ||
| 36 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 37 | CONFIG_LOCALVERSION="" | ||
| 38 | CONFIG_LOCALVERSION_AUTO=y | ||
| 39 | # CONFIG_SWAP is not set | ||
| 40 | CONFIG_SYSVIPC=y | ||
| 41 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 42 | CONFIG_POSIX_MQUEUE=y | ||
| 43 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 44 | # CONFIG_TASKSTATS is not set | ||
| 45 | # CONFIG_AUDIT is not set | ||
| 46 | # CONFIG_IKCONFIG is not set | ||
| 47 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 48 | # CONFIG_CGROUPS is not set | ||
| 49 | # CONFIG_GROUP_SCHED is not set | ||
| 50 | CONFIG_SYSFS_DEPRECATED=y | ||
| 51 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 52 | # CONFIG_RELAY is not set | ||
| 53 | CONFIG_NAMESPACES=y | ||
| 54 | # CONFIG_UTS_NS is not set | ||
| 55 | # CONFIG_IPC_NS is not set | ||
| 56 | # CONFIG_USER_NS is not set | ||
| 57 | # CONFIG_PID_NS is not set | ||
| 58 | # CONFIG_BLK_DEV_INITRD is not set | ||
| 59 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 60 | CONFIG_SYSCTL=y | ||
| 61 | # CONFIG_EMBEDDED is not set | ||
| 62 | CONFIG_UID16=y | ||
| 63 | CONFIG_SYSCTL_SYSCALL=y | ||
| 64 | CONFIG_KALLSYMS=y | ||
| 65 | # CONFIG_KALLSYMS_ALL is not set | ||
| 66 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 67 | CONFIG_HOTPLUG=y | ||
| 68 | CONFIG_PRINTK=y | ||
| 69 | CONFIG_BUG=y | ||
| 70 | CONFIG_ELF_CORE=y | ||
| 71 | CONFIG_COMPAT_BRK=y | ||
| 72 | CONFIG_BASE_FULL=y | ||
| 73 | CONFIG_FUTEX=y | ||
| 74 | CONFIG_ANON_INODES=y | ||
| 75 | CONFIG_EPOLL=y | ||
| 76 | CONFIG_SIGNALFD=y | ||
| 77 | CONFIG_TIMERFD=y | ||
| 78 | CONFIG_EVENTFD=y | ||
| 79 | CONFIG_SHMEM=y | ||
| 80 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 81 | CONFIG_SLAB=y | ||
| 82 | # CONFIG_SLUB is not set | ||
| 83 | # CONFIG_SLOB is not set | ||
| 84 | # CONFIG_PROFILING is not set | ||
| 85 | # CONFIG_MARKERS is not set | ||
| 86 | CONFIG_HAVE_OPROFILE=y | ||
| 87 | # CONFIG_KPROBES is not set | ||
| 88 | # CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set | ||
| 89 | # CONFIG_HAVE_IOREMAP_PROT is not set | ||
| 90 | CONFIG_HAVE_KPROBES=y | ||
| 91 | CONFIG_HAVE_KRETPROBES=y | ||
| 92 | # CONFIG_HAVE_ARCH_TRACEHOOK is not set | ||
| 93 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
| 94 | # CONFIG_USE_GENERIC_SMP_HELPERS is not set | ||
| 95 | # CONFIG_HAVE_CLK is not set | ||
| 96 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 97 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 98 | CONFIG_SLABINFO=y | ||
| 99 | CONFIG_RT_MUTEXES=y | ||
| 100 | # CONFIG_TINY_SHMEM is not set | ||
| 101 | CONFIG_BASE_SMALL=0 | ||
| 102 | CONFIG_MODULES=y | ||
| 103 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 104 | CONFIG_MODULE_UNLOAD=y | ||
| 105 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 106 | # CONFIG_MODVERSIONS is not set | ||
| 107 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 108 | CONFIG_KMOD=y | ||
| 109 | CONFIG_BLOCK=y | ||
| 110 | # CONFIG_LBD is not set | ||
| 111 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 112 | # CONFIG_LSF is not set | ||
| 113 | # CONFIG_BLK_DEV_BSG is not set | ||
| 114 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 115 | |||
| 116 | # | ||
| 117 | # IO Schedulers | ||
| 118 | # | ||
| 119 | CONFIG_IOSCHED_NOOP=y | ||
| 120 | CONFIG_IOSCHED_AS=y | ||
| 121 | # CONFIG_IOSCHED_DEADLINE is not set | ||
| 122 | # CONFIG_IOSCHED_CFQ is not set | ||
| 123 | CONFIG_DEFAULT_AS=y | ||
| 124 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 125 | # CONFIG_DEFAULT_CFQ is not set | ||
| 126 | # CONFIG_DEFAULT_NOOP is not set | ||
| 127 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 128 | CONFIG_CLASSIC_RCU=y | ||
| 129 | |||
| 130 | # | ||
| 131 | # System Type | ||
| 132 | # | ||
| 133 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 134 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 135 | # CONFIG_ARCH_REALVIEW is not set | ||
| 136 | # CONFIG_ARCH_VERSATILE is not set | ||
| 137 | # CONFIG_ARCH_AT91 is not set | ||
| 138 | # CONFIG_ARCH_CLPS7500 is not set | ||
| 139 | # CONFIG_ARCH_CLPS711X is not set | ||
| 140 | # CONFIG_ARCH_EBSA110 is not set | ||
| 141 | # CONFIG_ARCH_EP93XX is not set | ||
| 142 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 143 | # CONFIG_ARCH_NETX is not set | ||
| 144 | # CONFIG_ARCH_H720X is not set | ||
| 145 | # CONFIG_ARCH_IMX is not set | ||
| 146 | # CONFIG_ARCH_IOP13XX is not set | ||
| 147 | # CONFIG_ARCH_IOP32X is not set | ||
| 148 | # CONFIG_ARCH_IOP33X is not set | ||
| 149 | # CONFIG_ARCH_IXP23XX is not set | ||
| 150 | # CONFIG_ARCH_IXP2000 is not set | ||
| 151 | # CONFIG_ARCH_IXP4XX is not set | ||
| 152 | # CONFIG_ARCH_L7200 is not set | ||
| 153 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 154 | CONFIG_ARCH_KS8695=y | ||
| 155 | # CONFIG_ARCH_NS9XXX is not set | ||
| 156 | # CONFIG_ARCH_LOKI is not set | ||
| 157 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 158 | # CONFIG_ARCH_MXC is not set | ||
| 159 | # CONFIG_ARCH_ORION5X is not set | ||
| 160 | # CONFIG_ARCH_PNX4008 is not set | ||
| 161 | # CONFIG_ARCH_PXA is not set | ||
| 162 | # CONFIG_ARCH_RPC is not set | ||
| 163 | # CONFIG_ARCH_SA1100 is not set | ||
| 164 | # CONFIG_ARCH_S3C2410 is not set | ||
| 165 | # CONFIG_ARCH_SHARK is not set | ||
| 166 | # CONFIG_ARCH_LH7A40X is not set | ||
| 167 | # CONFIG_ARCH_DAVINCI is not set | ||
| 168 | # CONFIG_ARCH_OMAP is not set | ||
| 169 | # CONFIG_ARCH_MSM7X00A is not set | ||
| 170 | |||
| 171 | # | ||
| 172 | # Boot options | ||
| 173 | # | ||
| 174 | |||
| 175 | # | ||
| 176 | # Power management | ||
| 177 | # | ||
| 178 | |||
| 179 | # | ||
| 180 | # Kendin/Micrel KS8695 Implementations | ||
| 181 | # | ||
| 182 | # CONFIG_MACH_KS8695 is not set | ||
| 183 | # CONFIG_MACH_DSM320 is not set | ||
| 184 | CONFIG_MACH_ACS5K=y | ||
| 185 | |||
| 186 | # | ||
| 187 | # Processor Type | ||
| 188 | # | ||
| 189 | CONFIG_CPU_32=y | ||
| 190 | CONFIG_CPU_ARM922T=y | ||
| 191 | CONFIG_CPU_32v4T=y | ||
| 192 | CONFIG_CPU_ABRT_EV4T=y | ||
| 193 | CONFIG_CPU_PABRT_NOIFAR=y | ||
| 194 | CONFIG_CPU_CACHE_V4WT=y | ||
| 195 | CONFIG_CPU_CACHE_VIVT=y | ||
| 196 | CONFIG_CPU_COPY_V4WB=y | ||
| 197 | CONFIG_CPU_TLB_V4WBI=y | ||
| 198 | CONFIG_CPU_CP15=y | ||
| 199 | CONFIG_CPU_CP15_MMU=y | ||
| 200 | |||
| 201 | # | ||
| 202 | # Processor Features | ||
| 203 | # | ||
| 204 | # CONFIG_ARM_THUMB is not set | ||
| 205 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 206 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 207 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | ||
| 208 | # CONFIG_OUTER_CACHE is not set | ||
| 209 | |||
| 210 | # | ||
| 211 | # Bus support | ||
| 212 | # | ||
| 213 | # CONFIG_PCI is not set | ||
| 214 | # CONFIG_PCI_SYSCALL is not set | ||
| 215 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 216 | # CONFIG_PCCARD is not set | ||
| 217 | |||
| 218 | # | ||
| 219 | # Kernel Features | ||
| 220 | # | ||
| 221 | # CONFIG_TICK_ONESHOT is not set | ||
| 222 | # CONFIG_PREEMPT is not set | ||
| 223 | CONFIG_HZ=100 | ||
| 224 | CONFIG_AEABI=y | ||
| 225 | CONFIG_OABI_COMPAT=y | ||
| 226 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y | ||
| 227 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
| 228 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 229 | CONFIG_FLATMEM_MANUAL=y | ||
| 230 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 231 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 232 | CONFIG_FLATMEM=y | ||
| 233 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 234 | # CONFIG_SPARSEMEM_STATIC is not set | ||
| 235 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
| 236 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 237 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 238 | # CONFIG_RESOURCES_64BIT is not set | ||
| 239 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 240 | CONFIG_BOUNCE=y | ||
| 241 | CONFIG_VIRT_TO_BUS=y | ||
| 242 | # CONFIG_LEDS is not set | ||
| 243 | CONFIG_ALIGNMENT_TRAP=y | ||
| 244 | |||
| 245 | # | ||
| 246 | # Boot options | ||
| 247 | # | ||
| 248 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 249 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 250 | CONFIG_CMDLINE="console=ttyAM0,115200 init=/bin/sh" | ||
| 251 | # CONFIG_XIP_KERNEL is not set | ||
| 252 | # CONFIG_KEXEC is not set | ||
| 253 | |||
| 254 | # | ||
| 255 | # Floating point emulation | ||
| 256 | # | ||
| 257 | |||
| 258 | # | ||
| 259 | # At least one emulation must be selected | ||
| 260 | # | ||
| 261 | CONFIG_FPE_NWFPE=y | ||
| 262 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 263 | # CONFIG_FPE_FASTFPE is not set | ||
| 264 | |||
| 265 | # | ||
| 266 | # Userspace binary formats | ||
| 267 | # | ||
| 268 | CONFIG_BINFMT_ELF=y | ||
| 269 | # CONFIG_BINFMT_AOUT is not set | ||
| 270 | # CONFIG_BINFMT_MISC is not set | ||
| 271 | |||
| 272 | # | ||
| 273 | # Power management options | ||
| 274 | # | ||
| 275 | # CONFIG_PM is not set | ||
| 276 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 277 | CONFIG_NET=y | ||
| 278 | |||
| 279 | # | ||
| 280 | # Networking options | ||
| 281 | # | ||
| 282 | CONFIG_PACKET=y | ||
| 283 | # CONFIG_PACKET_MMAP is not set | ||
| 284 | CONFIG_UNIX=y | ||
| 285 | # CONFIG_NET_KEY is not set | ||
| 286 | CONFIG_INET=y | ||
| 287 | # CONFIG_IP_MULTICAST is not set | ||
| 288 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 289 | CONFIG_IP_FIB_HASH=y | ||
| 290 | # CONFIG_IP_PNP is not set | ||
| 291 | # CONFIG_NET_IPIP is not set | ||
| 292 | # CONFIG_NET_IPGRE is not set | ||
| 293 | # CONFIG_ARPD is not set | ||
| 294 | # CONFIG_SYN_COOKIES is not set | ||
| 295 | # CONFIG_INET_AH is not set | ||
| 296 | # CONFIG_INET_ESP is not set | ||
| 297 | # CONFIG_INET_IPCOMP is not set | ||
| 298 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 299 | # CONFIG_INET_TUNNEL is not set | ||
| 300 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
| 301 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
| 302 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
| 303 | # CONFIG_INET_LRO is not set | ||
| 304 | CONFIG_INET_DIAG=y | ||
| 305 | CONFIG_INET_TCP_DIAG=y | ||
| 306 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 307 | CONFIG_TCP_CONG_CUBIC=y | ||
| 308 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 309 | # CONFIG_TCP_MD5SIG is not set | ||
| 310 | # CONFIG_IPV6 is not set | ||
| 311 | # CONFIG_NETWORK_SECMARK is not set | ||
| 312 | # CONFIG_NETFILTER is not set | ||
| 313 | # CONFIG_IP_DCCP is not set | ||
| 314 | # CONFIG_IP_SCTP is not set | ||
| 315 | # CONFIG_TIPC is not set | ||
| 316 | # CONFIG_ATM is not set | ||
| 317 | # CONFIG_BRIDGE is not set | ||
| 318 | # CONFIG_VLAN_8021Q is not set | ||
| 319 | # CONFIG_DECNET is not set | ||
| 320 | # CONFIG_LLC2 is not set | ||
| 321 | # CONFIG_IPX is not set | ||
| 322 | # CONFIG_ATALK is not set | ||
| 323 | # CONFIG_X25 is not set | ||
| 324 | # CONFIG_LAPB is not set | ||
| 325 | # CONFIG_ECONET is not set | ||
| 326 | # CONFIG_WAN_ROUTER is not set | ||
| 327 | # CONFIG_NET_SCHED is not set | ||
| 328 | |||
| 329 | # | ||
| 330 | # Network testing | ||
| 331 | # | ||
| 332 | # CONFIG_NET_PKTGEN is not set | ||
| 333 | # CONFIG_HAMRADIO is not set | ||
| 334 | # CONFIG_CAN is not set | ||
| 335 | # CONFIG_IRDA is not set | ||
| 336 | # CONFIG_BT is not set | ||
| 337 | # CONFIG_AF_RXRPC is not set | ||
| 338 | |||
| 339 | # | ||
| 340 | # Wireless | ||
| 341 | # | ||
| 342 | # CONFIG_CFG80211 is not set | ||
| 343 | # CONFIG_WIRELESS_EXT is not set | ||
| 344 | # CONFIG_MAC80211 is not set | ||
| 345 | # CONFIG_IEEE80211 is not set | ||
| 346 | # CONFIG_RFKILL is not set | ||
| 347 | # CONFIG_NET_9P is not set | ||
| 348 | |||
| 349 | # | ||
| 350 | # Device Drivers | ||
| 351 | # | ||
| 352 | |||
| 353 | # | ||
| 354 | # Generic Driver Options | ||
| 355 | # | ||
| 356 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 357 | CONFIG_STANDALONE=y | ||
| 358 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 359 | CONFIG_FW_LOADER=y | ||
| 360 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 361 | CONFIG_EXTRA_FIRMWARE="" | ||
| 362 | # CONFIG_DEBUG_DRIVER is not set | ||
| 363 | # CONFIG_DEBUG_DEVRES is not set | ||
| 364 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 365 | # CONFIG_CONNECTOR is not set | ||
| 366 | CONFIG_MTD=y | ||
| 367 | # CONFIG_MTD_DEBUG is not set | ||
| 368 | CONFIG_MTD_CONCAT=y | ||
| 369 | CONFIG_MTD_PARTITIONS=y | ||
| 370 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 371 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
| 372 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 373 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 374 | |||
| 375 | # | ||
| 376 | # User Modules And Translation Layers | ||
| 377 | # | ||
| 378 | CONFIG_MTD_CHAR=y | ||
| 379 | CONFIG_MTD_BLKDEVS=y | ||
| 380 | CONFIG_MTD_BLOCK=y | ||
| 381 | # CONFIG_FTL is not set | ||
| 382 | # CONFIG_NFTL is not set | ||
| 383 | # CONFIG_INFTL is not set | ||
| 384 | # CONFIG_RFD_FTL is not set | ||
| 385 | # CONFIG_SSFDC is not set | ||
| 386 | # CONFIG_MTD_OOPS is not set | ||
| 387 | |||
| 388 | # | ||
| 389 | # RAM/ROM/Flash chip drivers | ||
| 390 | # | ||
| 391 | CONFIG_MTD_CFI=y | ||
| 392 | CONFIG_MTD_JEDECPROBE=y | ||
| 393 | CONFIG_MTD_GEN_PROBE=y | ||
| 394 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
| 395 | CONFIG_MTD_CFI_NOSWAP=y | ||
| 396 | # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set | ||
| 397 | # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set | ||
| 398 | # CONFIG_MTD_CFI_GEOMETRY is not set | ||
| 399 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 400 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 401 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 402 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 403 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 404 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 405 | CONFIG_MTD_CFI_I1=y | ||
| 406 | CONFIG_MTD_CFI_I2=y | ||
| 407 | # CONFIG_MTD_CFI_I4 is not set | ||
| 408 | # CONFIG_MTD_CFI_I8 is not set | ||
| 409 | # CONFIG_MTD_OTP is not set | ||
| 410 | CONFIG_MTD_CFI_INTELEXT=y | ||
| 411 | CONFIG_MTD_CFI_AMDSTD=y | ||
| 412 | # CONFIG_MTD_CFI_STAA is not set | ||
| 413 | CONFIG_MTD_CFI_UTIL=y | ||
| 414 | # CONFIG_MTD_RAM is not set | ||
| 415 | # CONFIG_MTD_ROM is not set | ||
| 416 | # CONFIG_MTD_ABSENT is not set | ||
| 417 | |||
| 418 | # | ||
| 419 | # Mapping drivers for chip access | ||
| 420 | # | ||
| 421 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 422 | CONFIG_MTD_PHYSMAP=y | ||
| 423 | CONFIG_MTD_PHYSMAP_START=0x8000000 | ||
| 424 | CONFIG_MTD_PHYSMAP_LEN=0 | ||
| 425 | CONFIG_MTD_PHYSMAP_BANKWIDTH=4 | ||
| 426 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
| 427 | # CONFIG_MTD_IMPA7 is not set | ||
| 428 | # CONFIG_MTD_PLATRAM is not set | ||
| 429 | |||
| 430 | # | ||
| 431 | # Self-contained MTD device drivers | ||
| 432 | # | ||
| 433 | # CONFIG_MTD_SLRAM is not set | ||
| 434 | # CONFIG_MTD_PHRAM is not set | ||
| 435 | # CONFIG_MTD_MTDRAM is not set | ||
| 436 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 437 | |||
| 438 | # | ||
| 439 | # Disk-On-Chip Device Drivers | ||
| 440 | # | ||
| 441 | # CONFIG_MTD_DOC2000 is not set | ||
| 442 | # CONFIG_MTD_DOC2001 is not set | ||
| 443 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 444 | # CONFIG_MTD_NAND is not set | ||
| 445 | # CONFIG_MTD_ONENAND is not set | ||
| 446 | |||
| 447 | # | ||
| 448 | # UBI - Unsorted block images | ||
| 449 | # | ||
| 450 | # CONFIG_MTD_UBI is not set | ||
| 451 | # CONFIG_PARPORT is not set | ||
| 452 | # CONFIG_BLK_DEV is not set | ||
| 453 | # CONFIG_MISC_DEVICES is not set | ||
| 454 | CONFIG_HAVE_IDE=y | ||
| 455 | # CONFIG_IDE is not set | ||
| 456 | |||
| 457 | # | ||
| 458 | # SCSI device support | ||
| 459 | # | ||
| 460 | # CONFIG_RAID_ATTRS is not set | ||
| 461 | # CONFIG_SCSI is not set | ||
| 462 | # CONFIG_SCSI_DMA is not set | ||
| 463 | # CONFIG_SCSI_NETLINK is not set | ||
| 464 | # CONFIG_ATA is not set | ||
| 465 | # CONFIG_MD is not set | ||
| 466 | CONFIG_NETDEVICES=y | ||
| 467 | # CONFIG_DUMMY is not set | ||
| 468 | # CONFIG_BONDING is not set | ||
| 469 | # CONFIG_MACVLAN is not set | ||
| 470 | # CONFIG_EQUALIZER is not set | ||
| 471 | # CONFIG_TUN is not set | ||
| 472 | # CONFIG_VETH is not set | ||
| 473 | # CONFIG_PHYLIB is not set | ||
| 474 | CONFIG_NET_ETHERNET=y | ||
| 475 | CONFIG_MII=y | ||
| 476 | CONFIG_ARM_KS8695_ETHER=y | ||
| 477 | # CONFIG_AX88796 is not set | ||
| 478 | # CONFIG_SMC91X is not set | ||
| 479 | # CONFIG_DM9000 is not set | ||
| 480 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 481 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 482 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 483 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 484 | # CONFIG_B44 is not set | ||
| 485 | # CONFIG_NETDEV_1000 is not set | ||
| 486 | # CONFIG_NETDEV_10000 is not set | ||
| 487 | |||
| 488 | # | ||
| 489 | # Wireless LAN | ||
| 490 | # | ||
| 491 | # CONFIG_WLAN_PRE80211 is not set | ||
| 492 | CONFIG_WLAN_80211=y | ||
| 493 | # CONFIG_LIBERTAS is not set | ||
| 494 | # CONFIG_IWLWIFI_LEDS is not set | ||
| 495 | # CONFIG_HOSTAP is not set | ||
| 496 | # CONFIG_WAN is not set | ||
| 497 | # CONFIG_PPP is not set | ||
| 498 | # CONFIG_SLIP is not set | ||
| 499 | # CONFIG_NETCONSOLE is not set | ||
| 500 | # CONFIG_NETPOLL is not set | ||
| 501 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 502 | # CONFIG_ISDN is not set | ||
| 503 | |||
| 504 | # | ||
| 505 | # Input device support | ||
| 506 | # | ||
| 507 | CONFIG_INPUT=y | ||
| 508 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 509 | # CONFIG_INPUT_POLLDEV is not set | ||
| 510 | |||
| 511 | # | ||
| 512 | # Userland interfaces | ||
| 513 | # | ||
| 514 | CONFIG_INPUT_MOUSEDEV=y | ||
| 515 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
| 516 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 517 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 518 | # CONFIG_INPUT_JOYDEV is not set | ||
| 519 | # CONFIG_INPUT_EVDEV is not set | ||
| 520 | # CONFIG_INPUT_EVBUG is not set | ||
| 521 | |||
| 522 | # | ||
| 523 | # Input Device Drivers | ||
| 524 | # | ||
| 525 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 526 | # CONFIG_INPUT_MOUSE is not set | ||
| 527 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 528 | # CONFIG_INPUT_TABLET is not set | ||
| 529 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 530 | # CONFIG_INPUT_MISC is not set | ||
| 531 | |||
| 532 | # | ||
| 533 | # Hardware I/O ports | ||
| 534 | # | ||
| 535 | # CONFIG_SERIO is not set | ||
| 536 | # CONFIG_GAMEPORT is not set | ||
| 537 | |||
| 538 | # | ||
| 539 | # Character devices | ||
| 540 | # | ||
| 541 | CONFIG_VT=y | ||
| 542 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 543 | CONFIG_VT_CONSOLE=y | ||
| 544 | CONFIG_HW_CONSOLE=y | ||
| 545 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 546 | CONFIG_DEVKMEM=y | ||
| 547 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 548 | |||
| 549 | # | ||
| 550 | # Serial drivers | ||
| 551 | # | ||
| 552 | # CONFIG_SERIAL_8250 is not set | ||
| 553 | |||
| 554 | # | ||
| 555 | # Non-8250 serial port support | ||
| 556 | # | ||
| 557 | CONFIG_SERIAL_KS8695=y | ||
| 558 | CONFIG_SERIAL_KS8695_CONSOLE=y | ||
| 559 | CONFIG_SERIAL_CORE=y | ||
| 560 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 561 | CONFIG_UNIX98_PTYS=y | ||
| 562 | CONFIG_LEGACY_PTYS=y | ||
| 563 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 564 | # CONFIG_IPMI_HANDLER is not set | ||
| 565 | # CONFIG_HW_RANDOM is not set | ||
| 566 | # CONFIG_NVRAM is not set | ||
| 567 | # CONFIG_R3964 is not set | ||
| 568 | # CONFIG_RAW_DRIVER is not set | ||
| 569 | # CONFIG_TCG_TPM is not set | ||
| 570 | CONFIG_ACS5KCAN=y | ||
| 571 | CONFIG_I2C=y | ||
| 572 | CONFIG_I2C_BOARDINFO=y | ||
| 573 | CONFIG_I2C_CHARDEV=y | ||
| 574 | CONFIG_I2C_HELPER_AUTO=y | ||
| 575 | CONFIG_I2C_ALGOBIT=y | ||
| 576 | |||
| 577 | # | ||
| 578 | # I2C Hardware Bus support | ||
| 579 | # | ||
| 580 | |||
| 581 | # | ||
| 582 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 583 | # | ||
| 584 | CONFIG_I2C_GPIO=y | ||
| 585 | # CONFIG_I2C_OCORES is not set | ||
| 586 | # CONFIG_I2C_SIMTEC is not set | ||
| 587 | |||
| 588 | # | ||
| 589 | # External I2C/SMBus adapter drivers | ||
| 590 | # | ||
| 591 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 592 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 593 | |||
| 594 | # | ||
| 595 | # Other I2C/SMBus bus drivers | ||
| 596 | # | ||
| 597 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 598 | # CONFIG_I2C_STUB is not set | ||
| 599 | |||
| 600 | # | ||
| 601 | # Miscellaneous I2C Chip support | ||
| 602 | # | ||
| 603 | # CONFIG_DS1682 is not set | ||
| 604 | # CONFIG_AT24 is not set | ||
| 605 | # CONFIG_SENSORS_EEPROM is not set | ||
| 606 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 607 | # CONFIG_PCF8575 is not set | ||
| 608 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 609 | # CONFIG_TPS65010 is not set | ||
| 610 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 611 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 612 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 613 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 614 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 615 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 616 | # CONFIG_SPI is not set | ||
| 617 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 618 | CONFIG_GPIOLIB=y | ||
| 619 | # CONFIG_DEBUG_GPIO is not set | ||
| 620 | CONFIG_GPIO_SYSFS=y | ||
| 621 | |||
| 622 | # | ||
| 623 | # I2C GPIO expanders: | ||
| 624 | # | ||
| 625 | # CONFIG_GPIO_MAX732X is not set | ||
| 626 | CONFIG_GPIO_PCA953X=y | ||
| 627 | # CONFIG_GPIO_PCF857X is not set | ||
| 628 | |||
| 629 | # | ||
| 630 | # PCI GPIO expanders: | ||
| 631 | # | ||
| 632 | |||
| 633 | # | ||
| 634 | # SPI GPIO expanders: | ||
| 635 | # | ||
| 636 | # CONFIG_W1 is not set | ||
| 637 | # CONFIG_POWER_SUPPLY is not set | ||
| 638 | # CONFIG_HWMON is not set | ||
| 639 | CONFIG_WATCHDOG=y | ||
| 640 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
| 641 | |||
| 642 | # | ||
| 643 | # Watchdog Device Drivers | ||
| 644 | # | ||
| 645 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 646 | CONFIG_KS8695_WATCHDOG=y | ||
| 647 | |||
| 648 | # | ||
| 649 | # Sonics Silicon Backplane | ||
| 650 | # | ||
| 651 | CONFIG_SSB_POSSIBLE=y | ||
| 652 | # CONFIG_SSB is not set | ||
| 653 | |||
| 654 | # | ||
| 655 | # Multifunction device drivers | ||
| 656 | # | ||
| 657 | # CONFIG_MFD_CORE is not set | ||
| 658 | # CONFIG_MFD_SM501 is not set | ||
| 659 | # CONFIG_MFD_ASIC3 is not set | ||
| 660 | # CONFIG_HTC_EGPIO is not set | ||
| 661 | # CONFIG_HTC_PASIC3 is not set | ||
| 662 | # CONFIG_MFD_TMIO is not set | ||
| 663 | # CONFIG_MFD_T7L66XB is not set | ||
| 664 | # CONFIG_MFD_TC6387XB is not set | ||
| 665 | # CONFIG_MFD_TC6393XB is not set | ||
| 666 | |||
| 667 | # | ||
| 668 | # Multimedia devices | ||
| 669 | # | ||
| 670 | |||
| 671 | # | ||
| 672 | # Multimedia core support | ||
| 673 | # | ||
| 674 | # CONFIG_VIDEO_DEV is not set | ||
| 675 | # CONFIG_DVB_CORE is not set | ||
| 676 | # CONFIG_VIDEO_MEDIA is not set | ||
| 677 | |||
| 678 | # | ||
| 679 | # Multimedia drivers | ||
| 680 | # | ||
| 681 | # CONFIG_DAB is not set | ||
| 682 | |||
| 683 | # | ||
| 684 | # Graphics support | ||
| 685 | # | ||
| 686 | # CONFIG_VGASTATE is not set | ||
| 687 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 688 | # CONFIG_FB is not set | ||
| 689 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 690 | |||
| 691 | # | ||
| 692 | # Display device support | ||
| 693 | # | ||
| 694 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 695 | |||
| 696 | # | ||
| 697 | # Console display driver support | ||
| 698 | # | ||
| 699 | # CONFIG_VGA_CONSOLE is not set | ||
| 700 | CONFIG_DUMMY_CONSOLE=y | ||
| 701 | # CONFIG_SOUND is not set | ||
| 702 | # CONFIG_HID_SUPPORT is not set | ||
| 703 | # CONFIG_USB_SUPPORT is not set | ||
| 704 | # CONFIG_MMC is not set | ||
| 705 | # CONFIG_NEW_LEDS is not set | ||
| 706 | CONFIG_RTC_LIB=y | ||
| 707 | CONFIG_RTC_CLASS=y | ||
| 708 | CONFIG_RTC_HCTOSYS=y | ||
| 709 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 710 | # CONFIG_RTC_DEBUG is not set | ||
| 711 | |||
| 712 | # | ||
| 713 | # RTC interfaces | ||
| 714 | # | ||
| 715 | CONFIG_RTC_INTF_SYSFS=y | ||
| 716 | CONFIG_RTC_INTF_PROC=y | ||
| 717 | CONFIG_RTC_INTF_DEV=y | ||
| 718 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 719 | # CONFIG_RTC_DRV_TEST is not set | ||
| 720 | |||
| 721 | # | ||
| 722 | # I2C RTC drivers | ||
| 723 | # | ||
| 724 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 725 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 726 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 727 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 728 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 729 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 730 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 731 | CONFIG_RTC_DRV_PCF8563=y | ||
| 732 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 733 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 734 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 735 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 736 | |||
| 737 | # | ||
| 738 | # SPI RTC drivers | ||
| 739 | # | ||
| 740 | |||
| 741 | # | ||
| 742 | # Platform RTC drivers | ||
| 743 | # | ||
| 744 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 745 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 746 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 747 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 748 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 749 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 750 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 751 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 752 | |||
| 753 | # | ||
| 754 | # on-CPU RTC drivers | ||
| 755 | # | ||
| 756 | # CONFIG_DMADEVICES is not set | ||
| 757 | |||
| 758 | # | ||
| 759 | # Voltage and Current regulators | ||
| 760 | # | ||
| 761 | # CONFIG_REGULATOR is not set | ||
| 762 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 763 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 764 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 765 | # CONFIG_UIO is not set | ||
| 766 | |||
| 767 | # | ||
| 768 | # File systems | ||
| 769 | # | ||
| 770 | # CONFIG_EXT2_FS is not set | ||
| 771 | # CONFIG_EXT3_FS is not set | ||
| 772 | # CONFIG_EXT4DEV_FS is not set | ||
| 773 | # CONFIG_REISERFS_FS is not set | ||
| 774 | # CONFIG_JFS_FS is not set | ||
| 775 | # CONFIG_FS_POSIX_ACL is not set | ||
| 776 | # CONFIG_XFS_FS is not set | ||
| 777 | # CONFIG_OCFS2_FS is not set | ||
| 778 | CONFIG_DNOTIFY=y | ||
| 779 | CONFIG_INOTIFY=y | ||
| 780 | CONFIG_INOTIFY_USER=y | ||
| 781 | # CONFIG_QUOTA is not set | ||
| 782 | # CONFIG_AUTOFS_FS is not set | ||
| 783 | # CONFIG_AUTOFS4_FS is not set | ||
| 784 | # CONFIG_FUSE_FS is not set | ||
| 785 | |||
| 786 | # | ||
| 787 | # CD-ROM/DVD Filesystems | ||
| 788 | # | ||
| 789 | # CONFIG_ISO9660_FS is not set | ||
| 790 | # CONFIG_UDF_FS is not set | ||
| 791 | |||
| 792 | # | ||
| 793 | # DOS/FAT/NT Filesystems | ||
| 794 | # | ||
| 795 | # CONFIG_MSDOS_FS is not set | ||
| 796 | # CONFIG_VFAT_FS is not set | ||
| 797 | # CONFIG_NTFS_FS is not set | ||
| 798 | |||
| 799 | # | ||
| 800 | # Pseudo filesystems | ||
| 801 | # | ||
| 802 | CONFIG_PROC_FS=y | ||
| 803 | CONFIG_PROC_SYSCTL=y | ||
| 804 | CONFIG_SYSFS=y | ||
| 805 | CONFIG_TMPFS=y | ||
| 806 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 807 | # CONFIG_HUGETLB_PAGE is not set | ||
| 808 | # CONFIG_CONFIGFS_FS is not set | ||
| 809 | |||
| 810 | # | ||
| 811 | # Miscellaneous filesystems | ||
| 812 | # | ||
| 813 | # CONFIG_ADFS_FS is not set | ||
| 814 | # CONFIG_AFFS_FS is not set | ||
| 815 | # CONFIG_HFS_FS is not set | ||
| 816 | # CONFIG_HFSPLUS_FS is not set | ||
| 817 | # CONFIG_BEFS_FS is not set | ||
| 818 | # CONFIG_BFS_FS is not set | ||
| 819 | # CONFIG_EFS_FS is not set | ||
| 820 | CONFIG_JFFS2_FS=y | ||
| 821 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 822 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 823 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 824 | CONFIG_JFFS2_SUMMARY=y | ||
| 825 | # CONFIG_JFFS2_FS_XATTR is not set | ||
| 826 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
| 827 | CONFIG_JFFS2_ZLIB=y | ||
| 828 | # CONFIG_JFFS2_LZO is not set | ||
| 829 | CONFIG_JFFS2_RTIME=y | ||
| 830 | CONFIG_JFFS2_RUBIN=y | ||
| 831 | # CONFIG_JFFS2_CMODE_NONE is not set | ||
| 832 | CONFIG_JFFS2_CMODE_PRIORITY=y | ||
| 833 | # CONFIG_JFFS2_CMODE_SIZE is not set | ||
| 834 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set | ||
| 835 | # CONFIG_CRAMFS is not set | ||
| 836 | CONFIG_SQUASHFS=y | ||
| 837 | # CONFIG_SQUASHFS_EMBEDDED is not set | ||
| 838 | CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 | ||
| 839 | # CONFIG_VXFS_FS is not set | ||
| 840 | # CONFIG_MINIX_FS is not set | ||
| 841 | # CONFIG_OMFS_FS is not set | ||
| 842 | # CONFIG_HPFS_FS is not set | ||
| 843 | # CONFIG_QNX4FS_FS is not set | ||
| 844 | # CONFIG_ROMFS_FS is not set | ||
| 845 | # CONFIG_SYSV_FS is not set | ||
| 846 | # CONFIG_UFS_FS is not set | ||
| 847 | # CONFIG_NETWORK_FILESYSTEMS is not set | ||
| 848 | |||
| 849 | # | ||
| 850 | # Partition Types | ||
| 851 | # | ||
| 852 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 853 | CONFIG_MSDOS_PARTITION=y | ||
| 854 | # CONFIG_NLS is not set | ||
| 855 | # CONFIG_DLM is not set | ||
| 856 | |||
| 857 | # | ||
| 858 | # Kernel hacking | ||
| 859 | # | ||
| 860 | # CONFIG_PRINTK_TIME is not set | ||
| 861 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 862 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 863 | CONFIG_FRAME_WARN=1024 | ||
| 864 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 865 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 866 | # CONFIG_DEBUG_FS is not set | ||
| 867 | # CONFIG_HEADERS_CHECK is not set | ||
| 868 | CONFIG_DEBUG_KERNEL=y | ||
| 869 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 870 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 871 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 872 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 873 | CONFIG_SCHED_DEBUG=y | ||
| 874 | # CONFIG_SCHEDSTATS is not set | ||
| 875 | # CONFIG_TIMER_STATS is not set | ||
| 876 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 877 | # CONFIG_DEBUG_SLAB is not set | ||
| 878 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 879 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 880 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 881 | CONFIG_DEBUG_MUTEXES=y | ||
| 882 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 883 | # CONFIG_PROVE_LOCKING is not set | ||
| 884 | # CONFIG_LOCK_STAT is not set | ||
| 885 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 886 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 887 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 888 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 889 | # CONFIG_DEBUG_INFO is not set | ||
| 890 | # CONFIG_DEBUG_VM is not set | ||
| 891 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 892 | CONFIG_DEBUG_MEMORY_INIT=y | ||
| 893 | # CONFIG_DEBUG_LIST is not set | ||
| 894 | # CONFIG_DEBUG_SG is not set | ||
| 895 | CONFIG_FRAME_POINTER=y | ||
| 896 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 897 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 898 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 899 | # CONFIG_FAULT_INJECTION is not set | ||
| 900 | # CONFIG_LATENCYTOP is not set | ||
| 901 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 902 | CONFIG_HAVE_FTRACE=y | ||
| 903 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 904 | # CONFIG_FTRACE is not set | ||
| 905 | # CONFIG_SCHED_TRACER is not set | ||
| 906 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 907 | # CONFIG_SAMPLES is not set | ||
| 908 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 909 | # CONFIG_KGDB is not set | ||
| 910 | CONFIG_DEBUG_USER=y | ||
| 911 | # CONFIG_DEBUG_ERRORS is not set | ||
| 912 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 913 | # CONFIG_DEBUG_LL is not set | ||
| 914 | |||
| 915 | # | ||
| 916 | # Security options | ||
| 917 | # | ||
| 918 | # CONFIG_KEYS is not set | ||
| 919 | # CONFIG_SECURITY is not set | ||
| 920 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 921 | # CONFIG_CRYPTO is not set | ||
| 922 | |||
| 923 | # | ||
| 924 | # Library routines | ||
| 925 | # | ||
| 926 | CONFIG_BITREVERSE=y | ||
| 927 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | ||
| 928 | # CONFIG_GENERIC_FIND_NEXT_BIT is not set | ||
| 929 | # CONFIG_CRC_CCITT is not set | ||
| 930 | # CONFIG_CRC16 is not set | ||
| 931 | # CONFIG_CRC_T10DIF is not set | ||
| 932 | # CONFIG_CRC_ITU_T is not set | ||
| 933 | CONFIG_CRC32=y | ||
| 934 | # CONFIG_CRC7 is not set | ||
| 935 | # CONFIG_LIBCRC32C is not set | ||
| 936 | CONFIG_ZLIB_INFLATE=y | ||
| 937 | CONFIG_ZLIB_DEFLATE=y | ||
| 938 | CONFIG_PLIST=y | ||
| 939 | CONFIG_HAS_IOMEM=y | ||
| 940 | CONFIG_HAS_IOPORT=y | ||
| 941 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/assabet_defconfig b/arch/arm/configs/assabet_defconfig index b1cd331aaecf..c66dd399e426 100644 --- a/arch/arm/configs/assabet_defconfig +++ b/arch/arm/configs/assabet_defconfig | |||
| @@ -89,7 +89,6 @@ CONFIG_SA1100_ASSABET=y | |||
| 89 | # CONFIG_SA1100_COLLIE is not set | 89 | # CONFIG_SA1100_COLLIE is not set |
| 90 | # CONFIG_SA1100_H3100 is not set | 90 | # CONFIG_SA1100_H3100 is not set |
| 91 | # CONFIG_SA1100_H3600 is not set | 91 | # CONFIG_SA1100_H3600 is not set |
| 92 | # CONFIG_SA1100_H3800 is not set | ||
| 93 | # CONFIG_SA1100_BADGE4 is not set | 92 | # CONFIG_SA1100_BADGE4 is not set |
| 94 | # CONFIG_SA1100_JORNADA720 is not set | 93 | # CONFIG_SA1100_JORNADA720 is not set |
| 95 | # CONFIG_SA1100_HACKKIT is not set | 94 | # CONFIG_SA1100_HACKKIT is not set |
diff --git a/arch/arm/configs/at91sam9260ek_defconfig b/arch/arm/configs/at91sam9260ek_defconfig index e0ee7060f9aa..98e2f3de4bc5 100644 --- a/arch/arm/configs/at91sam9260ek_defconfig +++ b/arch/arm/configs/at91sam9260ek_defconfig | |||
| @@ -608,7 +608,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y | |||
| 608 | # Watchdog Device Drivers | 608 | # Watchdog Device Drivers |
| 609 | # | 609 | # |
| 610 | # CONFIG_SOFT_WATCHDOG is not set | 610 | # CONFIG_SOFT_WATCHDOG is not set |
| 611 | CONFIG_AT91SAM9_WATCHDOG=y | 611 | CONFIG_AT91SAM9X_WATCHDOG=y |
| 612 | 612 | ||
| 613 | # | 613 | # |
| 614 | # USB-based Watchdog Cards | 614 | # USB-based Watchdog Cards |
diff --git a/arch/arm/configs/at91sam9261ek_defconfig b/arch/arm/configs/at91sam9261ek_defconfig index 01d1ef97d8be..149456142392 100644 --- a/arch/arm/configs/at91sam9261ek_defconfig +++ b/arch/arm/configs/at91sam9261ek_defconfig | |||
| @@ -700,7 +700,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y | |||
| 700 | # Watchdog Device Drivers | 700 | # Watchdog Device Drivers |
| 701 | # | 701 | # |
| 702 | # CONFIG_SOFT_WATCHDOG is not set | 702 | # CONFIG_SOFT_WATCHDOG is not set |
| 703 | CONFIG_AT91SAM9_WATCHDOG=y | 703 | CONFIG_AT91SAM9X_WATCHDOG=y |
| 704 | 704 | ||
| 705 | # | 705 | # |
| 706 | # USB-based Watchdog Cards | 706 | # USB-based Watchdog Cards |
diff --git a/arch/arm/configs/at91sam9263ek_defconfig b/arch/arm/configs/at91sam9263ek_defconfig index 036a126725c1..21599f3c6275 100644 --- a/arch/arm/configs/at91sam9263ek_defconfig +++ b/arch/arm/configs/at91sam9263ek_defconfig | |||
| @@ -710,7 +710,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y | |||
| 710 | # Watchdog Device Drivers | 710 | # Watchdog Device Drivers |
| 711 | # | 711 | # |
| 712 | # CONFIG_SOFT_WATCHDOG is not set | 712 | # CONFIG_SOFT_WATCHDOG is not set |
| 713 | CONFIG_AT91SAM9_WATCHDOG=y | 713 | CONFIG_AT91SAM9X_WATCHDOG=y |
| 714 | 714 | ||
| 715 | # | 715 | # |
| 716 | # USB-based Watchdog Cards | 716 | # USB-based Watchdog Cards |
diff --git a/arch/arm/configs/at91sam9rlek_defconfig b/arch/arm/configs/at91sam9rlek_defconfig index 237a2a6a8517..e2df81a3e804 100644 --- a/arch/arm/configs/at91sam9rlek_defconfig +++ b/arch/arm/configs/at91sam9rlek_defconfig | |||
| @@ -606,7 +606,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y | |||
| 606 | # Watchdog Device Drivers | 606 | # Watchdog Device Drivers |
| 607 | # | 607 | # |
| 608 | # CONFIG_SOFT_WATCHDOG is not set | 608 | # CONFIG_SOFT_WATCHDOG is not set |
| 609 | CONFIG_AT91SAM9_WATCHDOG=y | 609 | CONFIG_AT91SAM9X_WATCHDOG=y |
| 610 | 610 | ||
| 611 | # | 611 | # |
| 612 | # Sonics Silicon Backplane | 612 | # Sonics Silicon Backplane |
diff --git a/arch/arm/configs/badge4_defconfig b/arch/arm/configs/badge4_defconfig index 80222feb7dad..f264846218a2 100644 --- a/arch/arm/configs/badge4_defconfig +++ b/arch/arm/configs/badge4_defconfig | |||
| @@ -91,7 +91,6 @@ CONFIG_ARCH_SA1100=y | |||
| 91 | # CONFIG_SA1100_COLLIE is not set | 91 | # CONFIG_SA1100_COLLIE is not set |
| 92 | # CONFIG_SA1100_H3100 is not set | 92 | # CONFIG_SA1100_H3100 is not set |
| 93 | # CONFIG_SA1100_H3600 is not set | 93 | # CONFIG_SA1100_H3600 is not set |
| 94 | # CONFIG_SA1100_H3800 is not set | ||
| 95 | CONFIG_SA1100_BADGE4=y | 94 | CONFIG_SA1100_BADGE4=y |
| 96 | # CONFIG_SA1100_JORNADA720 is not set | 95 | # CONFIG_SA1100_JORNADA720 is not set |
| 97 | # CONFIG_SA1100_HACKKIT is not set | 96 | # CONFIG_SA1100_HACKKIT is not set |
diff --git a/arch/arm/configs/cerfcube_defconfig b/arch/arm/configs/cerfcube_defconfig index ee130b528bd4..2b4c0668b1b4 100644 --- a/arch/arm/configs/cerfcube_defconfig +++ b/arch/arm/configs/cerfcube_defconfig | |||
| @@ -93,7 +93,6 @@ CONFIG_SA1100_CERF_FLASH_16MB=y | |||
| 93 | # CONFIG_SA1100_COLLIE is not set | 93 | # CONFIG_SA1100_COLLIE is not set |
| 94 | # CONFIG_SA1100_H3100 is not set | 94 | # CONFIG_SA1100_H3100 is not set |
| 95 | # CONFIG_SA1100_H3600 is not set | 95 | # CONFIG_SA1100_H3600 is not set |
| 96 | # CONFIG_SA1100_H3800 is not set | ||
| 97 | # CONFIG_SA1100_BADGE4 is not set | 96 | # CONFIG_SA1100_BADGE4 is not set |
| 98 | # CONFIG_SA1100_JORNADA720 is not set | 97 | # CONFIG_SA1100_JORNADA720 is not set |
| 99 | # CONFIG_SA1100_HACKKIT is not set | 98 | # CONFIG_SA1100_HACKKIT is not set |
diff --git a/arch/arm/configs/xm_x2xx_defconfig b/arch/arm/configs/cm_x2xx_defconfig index 1039f366bf8d..797b790cba78 100644 --- a/arch/arm/configs/xm_x2xx_defconfig +++ b/arch/arm/configs/cm_x2xx_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.27-rc8 | 3 | # Linux kernel version: 2.6.29-rc2 |
| 4 | # Sun Oct 5 11:05:36 2008 | 4 | # Sun Feb 1 16:31:36 2009 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| @@ -22,7 +22,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y | |||
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set |
| 23 | CONFIG_GENERIC_HWEIGHT=y | 23 | CONFIG_GENERIC_HWEIGHT=y |
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 25 | CONFIG_ARCH_SUPPORTS_AOUT=y | ||
| 26 | CONFIG_ZONE_DMA=y | 25 | CONFIG_ZONE_DMA=y |
| 27 | CONFIG_ARCH_MTD_XIP=y | 26 | CONFIG_ARCH_MTD_XIP=y |
| 28 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 27 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| @@ -47,12 +46,12 @@ CONFIG_SYSVIPC_SYSCTL=y | |||
| 47 | CONFIG_IKCONFIG=y | 46 | CONFIG_IKCONFIG=y |
| 48 | CONFIG_IKCONFIG_PROC=y | 47 | CONFIG_IKCONFIG_PROC=y |
| 49 | CONFIG_LOG_BUF_SHIFT=14 | 48 | CONFIG_LOG_BUF_SHIFT=14 |
| 50 | # CONFIG_CGROUPS is not set | ||
| 51 | CONFIG_GROUP_SCHED=y | 49 | CONFIG_GROUP_SCHED=y |
| 52 | CONFIG_FAIR_GROUP_SCHED=y | 50 | CONFIG_FAIR_GROUP_SCHED=y |
| 53 | # CONFIG_RT_GROUP_SCHED is not set | 51 | # CONFIG_RT_GROUP_SCHED is not set |
| 54 | CONFIG_USER_SCHED=y | 52 | CONFIG_USER_SCHED=y |
| 55 | # CONFIG_CGROUP_SCHED is not set | 53 | # CONFIG_CGROUP_SCHED is not set |
| 54 | # CONFIG_CGROUPS is not set | ||
| 56 | CONFIG_SYSFS_DEPRECATED=y | 55 | CONFIG_SYSFS_DEPRECATED=y |
| 57 | CONFIG_SYSFS_DEPRECATED_V2=y | 56 | CONFIG_SYSFS_DEPRECATED_V2=y |
| 58 | # CONFIG_RELAY is not set | 57 | # CONFIG_RELAY is not set |
| @@ -80,27 +79,21 @@ CONFIG_SIGNALFD=y | |||
| 80 | CONFIG_TIMERFD=y | 79 | CONFIG_TIMERFD=y |
| 81 | CONFIG_EVENTFD=y | 80 | CONFIG_EVENTFD=y |
| 82 | CONFIG_SHMEM=y | 81 | CONFIG_SHMEM=y |
| 82 | CONFIG_AIO=y | ||
| 83 | # CONFIG_VM_EVENT_COUNTERS is not set | 83 | # CONFIG_VM_EVENT_COUNTERS is not set |
| 84 | CONFIG_PCI_QUIRKS=y | ||
| 84 | # CONFIG_SLUB_DEBUG is not set | 85 | # CONFIG_SLUB_DEBUG is not set |
| 85 | # CONFIG_SLAB is not set | 86 | # CONFIG_SLAB is not set |
| 86 | CONFIG_SLUB=y | 87 | CONFIG_SLUB=y |
| 87 | # CONFIG_SLOB is not set | 88 | # CONFIG_SLOB is not set |
| 88 | # CONFIG_PROFILING is not set | 89 | # CONFIG_PROFILING is not set |
| 89 | # CONFIG_MARKERS is not set | ||
| 90 | CONFIG_HAVE_OPROFILE=y | 90 | CONFIG_HAVE_OPROFILE=y |
| 91 | # CONFIG_KPROBES is not set | 91 | # CONFIG_KPROBES is not set |
| 92 | # CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set | ||
| 93 | # CONFIG_HAVE_IOREMAP_PROT is not set | ||
| 94 | CONFIG_HAVE_KPROBES=y | 92 | CONFIG_HAVE_KPROBES=y |
| 95 | CONFIG_HAVE_KRETPROBES=y | 93 | CONFIG_HAVE_KRETPROBES=y |
| 96 | # CONFIG_HAVE_ARCH_TRACEHOOK is not set | ||
| 97 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
| 98 | # CONFIG_USE_GENERIC_SMP_HELPERS is not set | ||
| 99 | CONFIG_HAVE_CLK=y | 94 | CONFIG_HAVE_CLK=y |
| 100 | # CONFIG_PROC_PAGE_MONITOR is not set | ||
| 101 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | 95 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
| 102 | CONFIG_RT_MUTEXES=y | 96 | CONFIG_RT_MUTEXES=y |
| 103 | # CONFIG_TINY_SHMEM is not set | ||
| 104 | CONFIG_BASE_SMALL=0 | 97 | CONFIG_BASE_SMALL=0 |
| 105 | CONFIG_MODULES=y | 98 | CONFIG_MODULES=y |
| 106 | # CONFIG_MODULE_FORCE_LOAD is not set | 99 | # CONFIG_MODULE_FORCE_LOAD is not set |
| @@ -108,11 +101,9 @@ CONFIG_MODULE_UNLOAD=y | |||
| 108 | # CONFIG_MODULE_FORCE_UNLOAD is not set | 101 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
| 109 | # CONFIG_MODVERSIONS is not set | 102 | # CONFIG_MODVERSIONS is not set |
| 110 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 103 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 111 | CONFIG_KMOD=y | ||
| 112 | CONFIG_BLOCK=y | 104 | CONFIG_BLOCK=y |
| 113 | # CONFIG_LBD is not set | 105 | # CONFIG_LBD is not set |
| 114 | # CONFIG_BLK_DEV_IO_TRACE is not set | 106 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 115 | # CONFIG_LSF is not set | ||
| 116 | # CONFIG_BLK_DEV_BSG is not set | 107 | # CONFIG_BLK_DEV_BSG is not set |
| 117 | # CONFIG_BLK_DEV_INTEGRITY is not set | 108 | # CONFIG_BLK_DEV_INTEGRITY is not set |
| 118 | 109 | ||
| @@ -129,6 +120,11 @@ CONFIG_DEFAULT_CFQ=y | |||
| 129 | # CONFIG_DEFAULT_NOOP is not set | 120 | # CONFIG_DEFAULT_NOOP is not set |
| 130 | CONFIG_DEFAULT_IOSCHED="cfq" | 121 | CONFIG_DEFAULT_IOSCHED="cfq" |
| 131 | CONFIG_CLASSIC_RCU=y | 122 | CONFIG_CLASSIC_RCU=y |
| 123 | # CONFIG_TREE_RCU is not set | ||
| 124 | # CONFIG_PREEMPT_RCU is not set | ||
| 125 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 126 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 127 | CONFIG_FREEZER=y | ||
| 132 | 128 | ||
| 133 | # | 129 | # |
| 134 | # System Type | 130 | # System Type |
| @@ -138,7 +134,6 @@ CONFIG_CLASSIC_RCU=y | |||
| 138 | # CONFIG_ARCH_REALVIEW is not set | 134 | # CONFIG_ARCH_REALVIEW is not set |
| 139 | # CONFIG_ARCH_VERSATILE is not set | 135 | # CONFIG_ARCH_VERSATILE is not set |
| 140 | # CONFIG_ARCH_AT91 is not set | 136 | # CONFIG_ARCH_AT91 is not set |
| 141 | # CONFIG_ARCH_CLPS7500 is not set | ||
| 142 | # CONFIG_ARCH_CLPS711X is not set | 137 | # CONFIG_ARCH_CLPS711X is not set |
| 143 | # CONFIG_ARCH_EBSA110 is not set | 138 | # CONFIG_ARCH_EBSA110 is not set |
| 144 | # CONFIG_ARCH_EP93XX is not set | 139 | # CONFIG_ARCH_EP93XX is not set |
| @@ -165,17 +160,19 @@ CONFIG_ARCH_PXA=y | |||
| 165 | # CONFIG_ARCH_RPC is not set | 160 | # CONFIG_ARCH_RPC is not set |
| 166 | # CONFIG_ARCH_SA1100 is not set | 161 | # CONFIG_ARCH_SA1100 is not set |
| 167 | # CONFIG_ARCH_S3C2410 is not set | 162 | # CONFIG_ARCH_S3C2410 is not set |
| 163 | # CONFIG_ARCH_S3C64XX is not set | ||
| 168 | # CONFIG_ARCH_SHARK is not set | 164 | # CONFIG_ARCH_SHARK is not set |
| 169 | # CONFIG_ARCH_LH7A40X is not set | 165 | # CONFIG_ARCH_LH7A40X is not set |
| 170 | # CONFIG_ARCH_DAVINCI is not set | 166 | # CONFIG_ARCH_DAVINCI is not set |
| 171 | # CONFIG_ARCH_OMAP is not set | 167 | # CONFIG_ARCH_OMAP is not set |
| 172 | # CONFIG_ARCH_MSM7X00A is not set | 168 | # CONFIG_ARCH_MSM is not set |
| 173 | CONFIG_DMABOUNCE=y | 169 | # CONFIG_ARCH_W90X900 is not set |
| 174 | 170 | ||
| 175 | # | 171 | # |
| 176 | # Intel PXA2xx/PXA3xx Implementations | 172 | # Intel PXA2xx/PXA3xx Implementations |
| 177 | # | 173 | # |
| 178 | # CONFIG_ARCH_GUMSTIX is not set | 174 | # CONFIG_ARCH_GUMSTIX is not set |
| 175 | # CONFIG_MACH_INTELMOTE2 is not set | ||
| 179 | # CONFIG_ARCH_LUBBOCK is not set | 176 | # CONFIG_ARCH_LUBBOCK is not set |
| 180 | # CONFIG_MACH_LOGICPD_PXA270 is not set | 177 | # CONFIG_MACH_LOGICPD_PXA270 is not set |
| 181 | # CONFIG_MACH_MAINSTONE is not set | 178 | # CONFIG_MACH_MAINSTONE is not set |
| @@ -185,7 +182,9 @@ CONFIG_DMABOUNCE=y | |||
| 185 | # CONFIG_ARCH_VIPER is not set | 182 | # CONFIG_ARCH_VIPER is not set |
| 186 | # CONFIG_ARCH_PXA_ESERIES is not set | 183 | # CONFIG_ARCH_PXA_ESERIES is not set |
| 187 | # CONFIG_TRIZEPS_PXA is not set | 184 | # CONFIG_TRIZEPS_PXA is not set |
| 188 | CONFIG_MACH_EM_X270=y | 185 | # CONFIG_MACH_H5000 is not set |
| 186 | # CONFIG_MACH_EM_X270 is not set | ||
| 187 | # CONFIG_MACH_EXEDA is not set | ||
| 189 | # CONFIG_MACH_COLIBRI is not set | 188 | # CONFIG_MACH_COLIBRI is not set |
| 190 | # CONFIG_MACH_ZYLONITE is not set | 189 | # CONFIG_MACH_ZYLONITE is not set |
| 191 | # CONFIG_MACH_LITTLETON is not set | 190 | # CONFIG_MACH_LITTLETON is not set |
| @@ -204,14 +203,6 @@ CONFIG_PXA_SSP=y | |||
| 204 | # CONFIG_PXA_PWM is not set | 203 | # CONFIG_PXA_PWM is not set |
| 205 | 204 | ||
| 206 | # | 205 | # |
| 207 | # Boot options | ||
| 208 | # | ||
| 209 | |||
| 210 | # | ||
| 211 | # Power management | ||
| 212 | # | ||
| 213 | |||
| 214 | # | ||
| 215 | # Processor Type | 206 | # Processor Type |
| 216 | # | 207 | # |
| 217 | CONFIG_CPU_32=y | 208 | CONFIG_CPU_32=y |
| @@ -232,6 +223,8 @@ CONFIG_ARM_THUMB=y | |||
| 232 | # CONFIG_OUTER_CACHE is not set | 223 | # CONFIG_OUTER_CACHE is not set |
| 233 | CONFIG_IWMMXT=y | 224 | CONFIG_IWMMXT=y |
| 234 | CONFIG_XSCALE_PMU=y | 225 | CONFIG_XSCALE_PMU=y |
| 226 | CONFIG_DMABOUNCE=y | ||
| 227 | CONFIG_COMMON_CLKDEV=y | ||
| 235 | 228 | ||
| 236 | # | 229 | # |
| 237 | # Bus support | 230 | # Bus support |
| @@ -242,6 +235,7 @@ CONFIG_PCI_HOST_ITE8152=y | |||
| 242 | # CONFIG_ARCH_SUPPORTS_MSI is not set | 235 | # CONFIG_ARCH_SUPPORTS_MSI is not set |
| 243 | CONFIG_PCI_LEGACY=y | 236 | CONFIG_PCI_LEGACY=y |
| 244 | # CONFIG_PCI_DEBUG is not set | 237 | # CONFIG_PCI_DEBUG is not set |
| 238 | # CONFIG_PCI_STUB is not set | ||
| 245 | CONFIG_PCCARD=m | 239 | CONFIG_PCCARD=m |
| 246 | # CONFIG_PCMCIA_DEBUG is not set | 240 | # CONFIG_PCMCIA_DEBUG is not set |
| 247 | CONFIG_PCMCIA=m | 241 | CONFIG_PCMCIA=m |
| @@ -287,14 +281,13 @@ CONFIG_FLATMEM_MANUAL=y | |||
| 287 | # CONFIG_SPARSEMEM_MANUAL is not set | 281 | # CONFIG_SPARSEMEM_MANUAL is not set |
| 288 | CONFIG_FLATMEM=y | 282 | CONFIG_FLATMEM=y |
| 289 | CONFIG_FLAT_NODE_MEM_MAP=y | 283 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 290 | # CONFIG_SPARSEMEM_STATIC is not set | ||
| 291 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
| 292 | CONFIG_PAGEFLAGS_EXTENDED=y | 284 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 293 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | 285 | CONFIG_SPLIT_PTLOCK_CPUS=4096 |
| 294 | # CONFIG_RESOURCES_64BIT is not set | 286 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 295 | CONFIG_ZONE_DMA_FLAG=1 | 287 | CONFIG_ZONE_DMA_FLAG=1 |
| 296 | CONFIG_BOUNCE=y | 288 | CONFIG_BOUNCE=y |
| 297 | CONFIG_VIRT_TO_BUS=y | 289 | CONFIG_VIRT_TO_BUS=y |
| 290 | CONFIG_UNEVICTABLE_LRU=y | ||
| 298 | CONFIG_ALIGNMENT_TRAP=y | 291 | CONFIG_ALIGNMENT_TRAP=y |
| 299 | 292 | ||
| 300 | # | 293 | # |
| @@ -327,6 +320,8 @@ CONFIG_FPE_NWFPE=y | |||
| 327 | # Userspace binary formats | 320 | # Userspace binary formats |
| 328 | # | 321 | # |
| 329 | CONFIG_BINFMT_ELF=y | 322 | CONFIG_BINFMT_ELF=y |
| 323 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 324 | CONFIG_HAVE_AOUT=y | ||
| 330 | # CONFIG_BINFMT_AOUT is not set | 325 | # CONFIG_BINFMT_AOUT is not set |
| 331 | # CONFIG_BINFMT_MISC is not set | 326 | # CONFIG_BINFMT_MISC is not set |
| 332 | 327 | ||
| @@ -345,6 +340,7 @@ CONFIG_NET=y | |||
| 345 | # | 340 | # |
| 346 | # Networking options | 341 | # Networking options |
| 347 | # | 342 | # |
| 343 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 348 | CONFIG_PACKET=y | 344 | CONFIG_PACKET=y |
| 349 | CONFIG_PACKET_MMAP=y | 345 | CONFIG_PACKET_MMAP=y |
| 350 | CONFIG_UNIX=y | 346 | CONFIG_UNIX=y |
| @@ -389,6 +385,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 389 | # CONFIG_TIPC is not set | 385 | # CONFIG_TIPC is not set |
| 390 | # CONFIG_ATM is not set | 386 | # CONFIG_ATM is not set |
| 391 | # CONFIG_BRIDGE is not set | 387 | # CONFIG_BRIDGE is not set |
| 388 | # CONFIG_NET_DSA is not set | ||
| 392 | # CONFIG_VLAN_8021Q is not set | 389 | # CONFIG_VLAN_8021Q is not set |
| 393 | # CONFIG_DECNET is not set | 390 | # CONFIG_DECNET is not set |
| 394 | # CONFIG_LLC2 is not set | 391 | # CONFIG_LLC2 is not set |
| @@ -399,6 +396,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 399 | # CONFIG_ECONET is not set | 396 | # CONFIG_ECONET is not set |
| 400 | # CONFIG_WAN_ROUTER is not set | 397 | # CONFIG_WAN_ROUTER is not set |
| 401 | # CONFIG_NET_SCHED is not set | 398 | # CONFIG_NET_SCHED is not set |
| 399 | # CONFIG_DCB is not set | ||
| 402 | 400 | ||
| 403 | # | 401 | # |
| 404 | # Network testing | 402 | # Network testing |
| @@ -420,8 +418,6 @@ CONFIG_BT_HIDP=m | |||
| 420 | # | 418 | # |
| 421 | # Bluetooth device drivers | 419 | # Bluetooth device drivers |
| 422 | # | 420 | # |
| 423 | CONFIG_BT_HCIUSB=m | ||
| 424 | CONFIG_BT_HCIUSB_SCO=y | ||
| 425 | # CONFIG_BT_HCIBTUSB is not set | 421 | # CONFIG_BT_HCIBTUSB is not set |
| 426 | # CONFIG_BT_HCIBTSDIO is not set | 422 | # CONFIG_BT_HCIBTSDIO is not set |
| 427 | # CONFIG_BT_HCIUART is not set | 423 | # CONFIG_BT_HCIUART is not set |
| @@ -434,15 +430,15 @@ CONFIG_BT_HCIUSB_SCO=y | |||
| 434 | # CONFIG_BT_HCIBTUART is not set | 430 | # CONFIG_BT_HCIBTUART is not set |
| 435 | # CONFIG_BT_HCIVHCI is not set | 431 | # CONFIG_BT_HCIVHCI is not set |
| 436 | # CONFIG_AF_RXRPC is not set | 432 | # CONFIG_AF_RXRPC is not set |
| 437 | 433 | # CONFIG_PHONET is not set | |
| 438 | # | 434 | CONFIG_WIRELESS=y |
| 439 | # Wireless | ||
| 440 | # | ||
| 441 | # CONFIG_CFG80211 is not set | 435 | # CONFIG_CFG80211 is not set |
| 436 | CONFIG_WIRELESS_OLD_REGULATORY=y | ||
| 442 | CONFIG_WIRELESS_EXT=y | 437 | CONFIG_WIRELESS_EXT=y |
| 443 | CONFIG_WIRELESS_EXT_SYSFS=y | 438 | CONFIG_WIRELESS_EXT_SYSFS=y |
| 439 | CONFIG_LIB80211=m | ||
| 444 | # CONFIG_MAC80211 is not set | 440 | # CONFIG_MAC80211 is not set |
| 445 | # CONFIG_IEEE80211 is not set | 441 | # CONFIG_WIMAX is not set |
| 446 | # CONFIG_RFKILL is not set | 442 | # CONFIG_RFKILL is not set |
| 447 | # CONFIG_NET_9P is not set | 443 | # CONFIG_NET_9P is not set |
| 448 | 444 | ||
| @@ -467,6 +463,7 @@ CONFIG_MTD=y | |||
| 467 | # CONFIG_MTD_DEBUG is not set | 463 | # CONFIG_MTD_DEBUG is not set |
| 468 | # CONFIG_MTD_CONCAT is not set | 464 | # CONFIG_MTD_CONCAT is not set |
| 469 | CONFIG_MTD_PARTITIONS=y | 465 | CONFIG_MTD_PARTITIONS=y |
| 466 | # CONFIG_MTD_TESTS is not set | ||
| 470 | # CONFIG_MTD_REDBOOT_PARTS is not set | 467 | # CONFIG_MTD_REDBOOT_PARTS is not set |
| 471 | CONFIG_MTD_CMDLINE_PARTS=y | 468 | CONFIG_MTD_CMDLINE_PARTS=y |
| 472 | # CONFIG_MTD_AFS_PARTS is not set | 469 | # CONFIG_MTD_AFS_PARTS is not set |
| @@ -521,9 +518,7 @@ CONFIG_MTD_CFI_UTIL=y | |||
| 521 | # | 518 | # |
| 522 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 519 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
| 523 | CONFIG_MTD_PHYSMAP=y | 520 | CONFIG_MTD_PHYSMAP=y |
| 524 | CONFIG_MTD_PHYSMAP_START=0x0 | 521 | # CONFIG_MTD_PHYSMAP_COMPAT is not set |
| 525 | CONFIG_MTD_PHYSMAP_LEN=0x400000 | ||
| 526 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
| 527 | CONFIG_MTD_PXA2XX=y | 522 | CONFIG_MTD_PXA2XX=y |
| 528 | # CONFIG_MTD_ARM_INTEGRATOR is not set | 523 | # CONFIG_MTD_ARM_INTEGRATOR is not set |
| 529 | # CONFIG_MTD_IMPA7 is not set | 524 | # CONFIG_MTD_IMPA7 is not set |
| @@ -535,6 +530,8 @@ CONFIG_MTD_PXA2XX=y | |||
| 535 | # Self-contained MTD device drivers | 530 | # Self-contained MTD device drivers |
| 536 | # | 531 | # |
| 537 | # CONFIG_MTD_PMC551 is not set | 532 | # CONFIG_MTD_PMC551 is not set |
| 533 | # CONFIG_MTD_DATAFLASH is not set | ||
| 534 | # CONFIG_MTD_M25P80 is not set | ||
| 538 | # CONFIG_MTD_SLRAM is not set | 535 | # CONFIG_MTD_SLRAM is not set |
| 539 | # CONFIG_MTD_PHRAM is not set | 536 | # CONFIG_MTD_PHRAM is not set |
| 540 | # CONFIG_MTD_MTDRAM is not set | 537 | # CONFIG_MTD_MTDRAM is not set |
| @@ -563,6 +560,12 @@ CONFIG_MTD_NAND_PLATFORM=y | |||
| 563 | # CONFIG_MTD_ONENAND is not set | 560 | # CONFIG_MTD_ONENAND is not set |
| 564 | 561 | ||
| 565 | # | 562 | # |
| 563 | # LPDDR flash memory drivers | ||
| 564 | # | ||
| 565 | # CONFIG_MTD_LPDDR is not set | ||
| 566 | # CONFIG_MTD_QINFO_PROBE is not set | ||
| 567 | |||
| 568 | # | ||
| 566 | # UBI - Unsorted block images | 569 | # UBI - Unsorted block images |
| 567 | # | 570 | # |
| 568 | # CONFIG_MTD_UBI is not set | 571 | # CONFIG_MTD_UBI is not set |
| @@ -642,6 +645,8 @@ CONFIG_SCSI_LOWLEVEL=y | |||
| 642 | # CONFIG_MEGARAID_LEGACY is not set | 645 | # CONFIG_MEGARAID_LEGACY is not set |
| 643 | # CONFIG_MEGARAID_SAS is not set | 646 | # CONFIG_MEGARAID_SAS is not set |
| 644 | # CONFIG_SCSI_HPTIOP is not set | 647 | # CONFIG_SCSI_HPTIOP is not set |
| 648 | # CONFIG_LIBFC is not set | ||
| 649 | # CONFIG_FCOE is not set | ||
| 645 | # CONFIG_SCSI_DMX3191D is not set | 650 | # CONFIG_SCSI_DMX3191D is not set |
| 646 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | 651 | # CONFIG_SCSI_FUTURE_DOMAIN is not set |
| 647 | # CONFIG_SCSI_IPS is not set | 652 | # CONFIG_SCSI_IPS is not set |
| @@ -756,26 +761,30 @@ CONFIG_MII=y | |||
| 756 | CONFIG_DM9000=y | 761 | CONFIG_DM9000=y |
| 757 | CONFIG_DM9000_DEBUGLEVEL=1 | 762 | CONFIG_DM9000_DEBUGLEVEL=1 |
| 758 | # CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set | 763 | # CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set |
| 764 | # CONFIG_ENC28J60 is not set | ||
| 759 | # CONFIG_SMC911X is not set | 765 | # CONFIG_SMC911X is not set |
| 766 | # CONFIG_SMSC911X is not set | ||
| 760 | # CONFIG_NET_TULIP is not set | 767 | # CONFIG_NET_TULIP is not set |
| 761 | # CONFIG_HP100 is not set | 768 | # CONFIG_HP100 is not set |
| 762 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | 769 | # CONFIG_IBM_NEW_EMAC_ZMII is not set |
| 763 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 770 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
| 764 | # CONFIG_IBM_NEW_EMAC_TAH is not set | 771 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
| 765 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | 772 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set |
| 773 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 774 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 775 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 766 | CONFIG_NET_PCI=y | 776 | CONFIG_NET_PCI=y |
| 767 | # CONFIG_PCNET32 is not set | 777 | # CONFIG_PCNET32 is not set |
| 768 | # CONFIG_AMD8111_ETH is not set | 778 | # CONFIG_AMD8111_ETH is not set |
| 769 | # CONFIG_ADAPTEC_STARFIRE is not set | 779 | # CONFIG_ADAPTEC_STARFIRE is not set |
| 770 | # CONFIG_B44 is not set | 780 | # CONFIG_B44 is not set |
| 771 | # CONFIG_FORCEDETH is not set | 781 | # CONFIG_FORCEDETH is not set |
| 772 | # CONFIG_EEPRO100 is not set | ||
| 773 | # CONFIG_E100 is not set | 782 | # CONFIG_E100 is not set |
| 774 | # CONFIG_FEALNX is not set | 783 | # CONFIG_FEALNX is not set |
| 775 | # CONFIG_NATSEMI is not set | 784 | # CONFIG_NATSEMI is not set |
| 776 | # CONFIG_NE2K_PCI is not set | 785 | # CONFIG_NE2K_PCI is not set |
| 777 | # CONFIG_8139CP is not set | 786 | # CONFIG_8139CP is not set |
| 778 | CONFIG_8139TOO=y | 787 | CONFIG_8139TOO=m |
| 779 | # CONFIG_8139TOO_PIO is not set | 788 | # CONFIG_8139TOO_PIO is not set |
| 780 | # CONFIG_8139TOO_TUNE_TWISTER is not set | 789 | # CONFIG_8139TOO_TUNE_TWISTER is not set |
| 781 | # CONFIG_8139TOO_8129 is not set | 790 | # CONFIG_8139TOO_8129 is not set |
| @@ -783,10 +792,12 @@ CONFIG_8139TOO=y | |||
| 783 | # CONFIG_R6040 is not set | 792 | # CONFIG_R6040 is not set |
| 784 | # CONFIG_SIS900 is not set | 793 | # CONFIG_SIS900 is not set |
| 785 | # CONFIG_EPIC100 is not set | 794 | # CONFIG_EPIC100 is not set |
| 795 | # CONFIG_SMSC9420 is not set | ||
| 786 | # CONFIG_SUNDANCE is not set | 796 | # CONFIG_SUNDANCE is not set |
| 787 | # CONFIG_TLAN is not set | 797 | # CONFIG_TLAN is not set |
| 788 | # CONFIG_VIA_RHINE is not set | 798 | # CONFIG_VIA_RHINE is not set |
| 789 | # CONFIG_SC92031 is not set | 799 | # CONFIG_SC92031 is not set |
| 800 | # CONFIG_ATL2 is not set | ||
| 790 | # CONFIG_NETDEV_1000 is not set | 801 | # CONFIG_NETDEV_1000 is not set |
| 791 | # CONFIG_NETDEV_10000 is not set | 802 | # CONFIG_NETDEV_10000 is not set |
| 792 | # CONFIG_TR is not set | 803 | # CONFIG_TR is not set |
| @@ -797,8 +808,6 @@ CONFIG_8139TOO=y | |||
| 797 | # CONFIG_WLAN_PRE80211 is not set | 808 | # CONFIG_WLAN_PRE80211 is not set |
| 798 | CONFIG_WLAN_80211=y | 809 | CONFIG_WLAN_80211=y |
| 799 | # CONFIG_PCMCIA_RAYCS is not set | 810 | # CONFIG_PCMCIA_RAYCS is not set |
| 800 | # CONFIG_IPW2100 is not set | ||
| 801 | # CONFIG_IPW2200 is not set | ||
| 802 | CONFIG_LIBERTAS=m | 811 | CONFIG_LIBERTAS=m |
| 803 | # CONFIG_LIBERTAS_USB is not set | 812 | # CONFIG_LIBERTAS_USB is not set |
| 804 | # CONFIG_LIBERTAS_CS is not set | 813 | # CONFIG_LIBERTAS_CS is not set |
| @@ -811,10 +820,16 @@ CONFIG_LIBERTAS_SDIO=m | |||
| 811 | # CONFIG_PRISM54 is not set | 820 | # CONFIG_PRISM54 is not set |
| 812 | # CONFIG_USB_ZD1201 is not set | 821 | # CONFIG_USB_ZD1201 is not set |
| 813 | # CONFIG_USB_NET_RNDIS_WLAN is not set | 822 | # CONFIG_USB_NET_RNDIS_WLAN is not set |
| 823 | # CONFIG_IPW2100 is not set | ||
| 824 | # CONFIG_IPW2200 is not set | ||
| 814 | # CONFIG_IWLWIFI_LEDS is not set | 825 | # CONFIG_IWLWIFI_LEDS is not set |
| 815 | # CONFIG_HOSTAP is not set | 826 | # CONFIG_HOSTAP is not set |
| 816 | 827 | ||
| 817 | # | 828 | # |
| 829 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 830 | # | ||
| 831 | |||
| 832 | # | ||
| 818 | # USB Network Adapters | 833 | # USB Network Adapters |
| 819 | # | 834 | # |
| 820 | # CONFIG_USB_CATC is not set | 835 | # CONFIG_USB_CATC is not set |
| @@ -879,22 +894,22 @@ CONFIG_KEYBOARD_PXA27x=m | |||
| 879 | # CONFIG_INPUT_JOYSTICK is not set | 894 | # CONFIG_INPUT_JOYSTICK is not set |
| 880 | # CONFIG_INPUT_TABLET is not set | 895 | # CONFIG_INPUT_TABLET is not set |
| 881 | CONFIG_INPUT_TOUCHSCREEN=y | 896 | CONFIG_INPUT_TOUCHSCREEN=y |
| 897 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
| 882 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 898 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 883 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 899 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 884 | # CONFIG_TOUCHSCREEN_ELO is not set | 900 | # CONFIG_TOUCHSCREEN_ELO is not set |
| 901 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
| 885 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | 902 | # CONFIG_TOUCHSCREEN_MTOUCH is not set |
| 886 | # CONFIG_TOUCHSCREEN_INEXIO is not set | 903 | # CONFIG_TOUCHSCREEN_INEXIO is not set |
| 887 | # CONFIG_TOUCHSCREEN_MK712 is not set | 904 | # CONFIG_TOUCHSCREEN_MK712 is not set |
| 888 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | 905 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set |
| 889 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | 906 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set |
| 890 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | 907 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set |
| 891 | CONFIG_TOUCHSCREEN_WM97XX=m | 908 | CONFIG_TOUCHSCREEN_UCB1400=m |
| 892 | # CONFIG_TOUCHSCREEN_WM9705 is not set | 909 | # CONFIG_TOUCHSCREEN_WM97XX is not set |
| 893 | CONFIG_TOUCHSCREEN_WM9712=y | ||
| 894 | # CONFIG_TOUCHSCREEN_WM9713 is not set | ||
| 895 | # CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set | ||
| 896 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | 910 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set |
| 897 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | 911 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set |
| 912 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
| 898 | # CONFIG_INPUT_MISC is not set | 913 | # CONFIG_INPUT_MISC is not set |
| 899 | 914 | ||
| 900 | # | 915 | # |
| @@ -933,6 +948,7 @@ CONFIG_SERIAL_CORE=y | |||
| 933 | CONFIG_SERIAL_CORE_CONSOLE=y | 948 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 934 | # CONFIG_SERIAL_JSM is not set | 949 | # CONFIG_SERIAL_JSM is not set |
| 935 | CONFIG_UNIX98_PTYS=y | 950 | CONFIG_UNIX98_PTYS=y |
| 951 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 936 | CONFIG_LEGACY_PTYS=y | 952 | CONFIG_LEGACY_PTYS=y |
| 937 | CONFIG_LEGACY_PTY_COUNT=16 | 953 | CONFIG_LEGACY_PTY_COUNT=16 |
| 938 | # CONFIG_IPMI_HANDLER is not set | 954 | # CONFIG_IPMI_HANDLER is not set |
| @@ -1009,26 +1025,45 @@ CONFIG_I2C_PXA=y | |||
| 1009 | # Miscellaneous I2C Chip support | 1025 | # Miscellaneous I2C Chip support |
| 1010 | # | 1026 | # |
| 1011 | # CONFIG_DS1682 is not set | 1027 | # CONFIG_DS1682 is not set |
| 1012 | # CONFIG_EEPROM_AT24 is not set | 1028 | # CONFIG_AT24 is not set |
| 1013 | # CONFIG_EEPROM_LEGACY is not set | 1029 | # CONFIG_SENSORS_EEPROM is not set |
| 1014 | # CONFIG_SENSORS_PCF8574 is not set | 1030 | # CONFIG_SENSORS_PCF8574 is not set |
| 1015 | # CONFIG_PCF8575 is not set | 1031 | # CONFIG_PCF8575 is not set |
| 1016 | # CONFIG_SENSORS_PCA9539 is not set | 1032 | # CONFIG_SENSORS_PCA9539 is not set |
| 1017 | # CONFIG_SENSORS_PCF8591 is not set | 1033 | # CONFIG_SENSORS_PCF8591 is not set |
| 1018 | # CONFIG_TPS65010 is not set | ||
| 1019 | # CONFIG_SENSORS_MAX6875 is not set | 1034 | # CONFIG_SENSORS_MAX6875 is not set |
| 1020 | # CONFIG_SENSORS_TSL2550 is not set | 1035 | # CONFIG_SENSORS_TSL2550 is not set |
| 1021 | # CONFIG_I2C_DEBUG_CORE is not set | 1036 | # CONFIG_I2C_DEBUG_CORE is not set |
| 1022 | # CONFIG_I2C_DEBUG_ALGO is not set | 1037 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 1023 | # CONFIG_I2C_DEBUG_BUS is not set | 1038 | # CONFIG_I2C_DEBUG_BUS is not set |
| 1024 | # CONFIG_I2C_DEBUG_CHIP is not set | 1039 | # CONFIG_I2C_DEBUG_CHIP is not set |
| 1025 | # CONFIG_SPI is not set | 1040 | CONFIG_SPI=y |
| 1041 | # CONFIG_SPI_DEBUG is not set | ||
| 1042 | CONFIG_SPI_MASTER=y | ||
| 1043 | |||
| 1044 | # | ||
| 1045 | # SPI Master Controller Drivers | ||
| 1046 | # | ||
| 1047 | # CONFIG_SPI_BITBANG is not set | ||
| 1048 | # CONFIG_SPI_GPIO is not set | ||
| 1049 | CONFIG_SPI_PXA2XX=m | ||
| 1050 | |||
| 1051 | # | ||
| 1052 | # SPI Protocol Masters | ||
| 1053 | # | ||
| 1054 | # CONFIG_SPI_AT25 is not set | ||
| 1055 | # CONFIG_SPI_SPIDEV is not set | ||
| 1056 | # CONFIG_SPI_TLE62X0 is not set | ||
| 1026 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | 1057 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
| 1027 | CONFIG_GPIOLIB=y | 1058 | CONFIG_GPIOLIB=y |
| 1028 | # CONFIG_DEBUG_GPIO is not set | 1059 | # CONFIG_DEBUG_GPIO is not set |
| 1029 | # CONFIG_GPIO_SYSFS is not set | 1060 | # CONFIG_GPIO_SYSFS is not set |
| 1030 | 1061 | ||
| 1031 | # | 1062 | # |
| 1063 | # Memory mapped GPIO expanders: | ||
| 1064 | # | ||
| 1065 | |||
| 1066 | # | ||
| 1032 | # I2C GPIO expanders: | 1067 | # I2C GPIO expanders: |
| 1033 | # | 1068 | # |
| 1034 | # CONFIG_GPIO_MAX732X is not set | 1069 | # CONFIG_GPIO_MAX732X is not set |
| @@ -1043,17 +1078,19 @@ CONFIG_GPIOLIB=y | |||
| 1043 | # | 1078 | # |
| 1044 | # SPI GPIO expanders: | 1079 | # SPI GPIO expanders: |
| 1045 | # | 1080 | # |
| 1081 | # CONFIG_GPIO_MAX7301 is not set | ||
| 1082 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 1046 | # CONFIG_W1 is not set | 1083 | # CONFIG_W1 is not set |
| 1047 | # CONFIG_POWER_SUPPLY is not set | 1084 | # CONFIG_POWER_SUPPLY is not set |
| 1048 | # CONFIG_HWMON is not set | 1085 | # CONFIG_HWMON is not set |
| 1049 | # CONFIG_THERMAL is not set | 1086 | # CONFIG_THERMAL is not set |
| 1050 | # CONFIG_THERMAL_HWMON is not set | 1087 | # CONFIG_THERMAL_HWMON is not set |
| 1051 | # CONFIG_WATCHDOG is not set | 1088 | # CONFIG_WATCHDOG is not set |
| 1089 | CONFIG_SSB_POSSIBLE=y | ||
| 1052 | 1090 | ||
| 1053 | # | 1091 | # |
| 1054 | # Sonics Silicon Backplane | 1092 | # Sonics Silicon Backplane |
| 1055 | # | 1093 | # |
| 1056 | CONFIG_SSB_POSSIBLE=y | ||
| 1057 | # CONFIG_SSB is not set | 1094 | # CONFIG_SSB is not set |
| 1058 | 1095 | ||
| 1059 | # | 1096 | # |
| @@ -1064,11 +1101,17 @@ CONFIG_SSB_POSSIBLE=y | |||
| 1064 | # CONFIG_MFD_ASIC3 is not set | 1101 | # CONFIG_MFD_ASIC3 is not set |
| 1065 | # CONFIG_HTC_EGPIO is not set | 1102 | # CONFIG_HTC_EGPIO is not set |
| 1066 | # CONFIG_HTC_PASIC3 is not set | 1103 | # CONFIG_HTC_PASIC3 is not set |
| 1067 | # CONFIG_UCB1400_CORE is not set | 1104 | CONFIG_UCB1400_CORE=m |
| 1105 | # CONFIG_TPS65010 is not set | ||
| 1106 | # CONFIG_TWL4030_CORE is not set | ||
| 1068 | # CONFIG_MFD_TMIO is not set | 1107 | # CONFIG_MFD_TMIO is not set |
| 1069 | # CONFIG_MFD_T7L66XB is not set | 1108 | # CONFIG_MFD_T7L66XB is not set |
| 1070 | # CONFIG_MFD_TC6387XB is not set | 1109 | # CONFIG_MFD_TC6387XB is not set |
| 1071 | # CONFIG_MFD_TC6393XB is not set | 1110 | # CONFIG_MFD_TC6393XB is not set |
| 1111 | # CONFIG_PMIC_DA903X is not set | ||
| 1112 | # CONFIG_MFD_WM8400 is not set | ||
| 1113 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 1114 | # CONFIG_MFD_PCF50633 is not set | ||
| 1072 | 1115 | ||
| 1073 | # | 1116 | # |
| 1074 | # Multimedia devices | 1117 | # Multimedia devices |
| @@ -1077,13 +1120,117 @@ CONFIG_SSB_POSSIBLE=y | |||
| 1077 | # | 1120 | # |
| 1078 | # Multimedia core support | 1121 | # Multimedia core support |
| 1079 | # | 1122 | # |
| 1080 | # CONFIG_VIDEO_DEV is not set | 1123 | CONFIG_VIDEO_DEV=m |
| 1124 | CONFIG_VIDEO_V4L2_COMMON=m | ||
| 1125 | # CONFIG_VIDEO_ALLOW_V4L1 is not set | ||
| 1126 | CONFIG_VIDEO_V4L1_COMPAT=y | ||
| 1081 | # CONFIG_DVB_CORE is not set | 1127 | # CONFIG_DVB_CORE is not set |
| 1082 | # CONFIG_VIDEO_MEDIA is not set | 1128 | CONFIG_VIDEO_MEDIA=m |
| 1083 | 1129 | ||
| 1084 | # | 1130 | # |
| 1085 | # Multimedia drivers | 1131 | # Multimedia drivers |
| 1086 | # | 1132 | # |
| 1133 | # CONFIG_MEDIA_ATTACH is not set | ||
| 1134 | CONFIG_MEDIA_TUNER=m | ||
| 1135 | CONFIG_MEDIA_TUNER_CUSTOMIZE=y | ||
| 1136 | # CONFIG_MEDIA_TUNER_SIMPLE is not set | ||
| 1137 | # CONFIG_MEDIA_TUNER_TDA8290 is not set | ||
| 1138 | # CONFIG_MEDIA_TUNER_TDA827X is not set | ||
| 1139 | # CONFIG_MEDIA_TUNER_TDA18271 is not set | ||
| 1140 | # CONFIG_MEDIA_TUNER_TDA9887 is not set | ||
| 1141 | # CONFIG_MEDIA_TUNER_TEA5761 is not set | ||
| 1142 | # CONFIG_MEDIA_TUNER_TEA5767 is not set | ||
| 1143 | # CONFIG_MEDIA_TUNER_MT20XX is not set | ||
| 1144 | # CONFIG_MEDIA_TUNER_MT2060 is not set | ||
| 1145 | # CONFIG_MEDIA_TUNER_MT2266 is not set | ||
| 1146 | # CONFIG_MEDIA_TUNER_MT2131 is not set | ||
| 1147 | # CONFIG_MEDIA_TUNER_QT1010 is not set | ||
| 1148 | # CONFIG_MEDIA_TUNER_XC2028 is not set | ||
| 1149 | # CONFIG_MEDIA_TUNER_XC5000 is not set | ||
| 1150 | # CONFIG_MEDIA_TUNER_MXL5005S is not set | ||
| 1151 | # CONFIG_MEDIA_TUNER_MXL5007T is not set | ||
| 1152 | CONFIG_VIDEO_V4L2=m | ||
| 1153 | CONFIG_VIDEOBUF_GEN=m | ||
| 1154 | CONFIG_VIDEOBUF_DMA_SG=m | ||
| 1155 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
| 1156 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
| 1157 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
| 1158 | # CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set | ||
| 1159 | |||
| 1160 | # | ||
| 1161 | # Encoders/decoders and other helper chips | ||
| 1162 | # | ||
| 1163 | |||
| 1164 | # | ||
| 1165 | # Audio decoders | ||
| 1166 | # | ||
| 1167 | # CONFIG_VIDEO_TVAUDIO is not set | ||
| 1168 | # CONFIG_VIDEO_TDA7432 is not set | ||
| 1169 | # CONFIG_VIDEO_TDA9840 is not set | ||
| 1170 | # CONFIG_VIDEO_TDA9875 is not set | ||
| 1171 | # CONFIG_VIDEO_TEA6415C is not set | ||
| 1172 | # CONFIG_VIDEO_TEA6420 is not set | ||
| 1173 | # CONFIG_VIDEO_MSP3400 is not set | ||
| 1174 | # CONFIG_VIDEO_CS5345 is not set | ||
| 1175 | # CONFIG_VIDEO_CS53L32A is not set | ||
| 1176 | # CONFIG_VIDEO_M52790 is not set | ||
| 1177 | # CONFIG_VIDEO_TLV320AIC23B is not set | ||
| 1178 | # CONFIG_VIDEO_WM8775 is not set | ||
| 1179 | # CONFIG_VIDEO_WM8739 is not set | ||
| 1180 | # CONFIG_VIDEO_VP27SMPX is not set | ||
| 1181 | |||
| 1182 | # | ||
| 1183 | # Video decoders | ||
| 1184 | # | ||
| 1185 | # CONFIG_VIDEO_OV7670 is not set | ||
| 1186 | # CONFIG_VIDEO_TCM825X is not set | ||
| 1187 | # CONFIG_VIDEO_SAA711X is not set | ||
| 1188 | # CONFIG_VIDEO_SAA717X is not set | ||
| 1189 | # CONFIG_VIDEO_TVP514X is not set | ||
| 1190 | # CONFIG_VIDEO_TVP5150 is not set | ||
| 1191 | |||
| 1192 | # | ||
| 1193 | # Video and audio decoders | ||
| 1194 | # | ||
| 1195 | # CONFIG_VIDEO_CX25840 is not set | ||
| 1196 | |||
| 1197 | # | ||
| 1198 | # MPEG video encoders | ||
| 1199 | # | ||
| 1200 | # CONFIG_VIDEO_CX2341X is not set | ||
| 1201 | |||
| 1202 | # | ||
| 1203 | # Video encoders | ||
| 1204 | # | ||
| 1205 | # CONFIG_VIDEO_SAA7127 is not set | ||
| 1206 | |||
| 1207 | # | ||
| 1208 | # Video improvement chips | ||
| 1209 | # | ||
| 1210 | # CONFIG_VIDEO_UPD64031A is not set | ||
| 1211 | # CONFIG_VIDEO_UPD64083 is not set | ||
| 1212 | # CONFIG_VIDEO_VIVI is not set | ||
| 1213 | # CONFIG_VIDEO_BT848 is not set | ||
| 1214 | # CONFIG_VIDEO_SAA5246A is not set | ||
| 1215 | # CONFIG_VIDEO_SAA5249 is not set | ||
| 1216 | # CONFIG_VIDEO_SAA7134 is not set | ||
| 1217 | # CONFIG_VIDEO_HEXIUM_ORION is not set | ||
| 1218 | # CONFIG_VIDEO_HEXIUM_GEMINI is not set | ||
| 1219 | # CONFIG_VIDEO_CX88 is not set | ||
| 1220 | # CONFIG_VIDEO_IVTV is not set | ||
| 1221 | # CONFIG_VIDEO_CAFE_CCIC is not set | ||
| 1222 | CONFIG_SOC_CAMERA=m | ||
| 1223 | # CONFIG_SOC_CAMERA_MT9M001 is not set | ||
| 1224 | CONFIG_SOC_CAMERA_MT9M111=m | ||
| 1225 | # CONFIG_SOC_CAMERA_MT9T031 is not set | ||
| 1226 | # CONFIG_SOC_CAMERA_MT9V022 is not set | ||
| 1227 | # CONFIG_SOC_CAMERA_TW9910 is not set | ||
| 1228 | # CONFIG_SOC_CAMERA_PLATFORM is not set | ||
| 1229 | # CONFIG_SOC_CAMERA_OV772X is not set | ||
| 1230 | CONFIG_VIDEO_PXA27x=m | ||
| 1231 | # CONFIG_VIDEO_SH_MOBILE_CEU is not set | ||
| 1232 | # CONFIG_V4L_USB_DRIVERS is not set | ||
| 1233 | # CONFIG_RADIO_ADAPTERS is not set | ||
| 1087 | # CONFIG_DAB is not set | 1234 | # CONFIG_DAB is not set |
| 1088 | 1235 | ||
| 1089 | # | 1236 | # |
| @@ -1095,6 +1242,7 @@ CONFIG_SSB_POSSIBLE=y | |||
| 1095 | CONFIG_FB=y | 1242 | CONFIG_FB=y |
| 1096 | # CONFIG_FIRMWARE_EDID is not set | 1243 | # CONFIG_FIRMWARE_EDID is not set |
| 1097 | # CONFIG_FB_DDC is not set | 1244 | # CONFIG_FB_DDC is not set |
| 1245 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 1098 | CONFIG_FB_CFB_FILLRECT=y | 1246 | CONFIG_FB_CFB_FILLRECT=y |
| 1099 | CONFIG_FB_CFB_COPYAREA=y | 1247 | CONFIG_FB_CFB_COPYAREA=y |
| 1100 | CONFIG_FB_CFB_IMAGEBLIT=y | 1248 | CONFIG_FB_CFB_IMAGEBLIT=y |
| @@ -1128,6 +1276,7 @@ CONFIG_FB_CFB_IMAGEBLIT=y | |||
| 1128 | # CONFIG_FB_S3 is not set | 1276 | # CONFIG_FB_S3 is not set |
| 1129 | # CONFIG_FB_SAVAGE is not set | 1277 | # CONFIG_FB_SAVAGE is not set |
| 1130 | # CONFIG_FB_SIS is not set | 1278 | # CONFIG_FB_SIS is not set |
| 1279 | # CONFIG_FB_VIA is not set | ||
| 1131 | # CONFIG_FB_NEOMAGIC is not set | 1280 | # CONFIG_FB_NEOMAGIC is not set |
| 1132 | # CONFIG_FB_KYRO is not set | 1281 | # CONFIG_FB_KYRO is not set |
| 1133 | # CONFIG_FB_3DFX is not set | 1282 | # CONFIG_FB_3DFX is not set |
| @@ -1138,13 +1287,17 @@ CONFIG_FB_CFB_IMAGEBLIT=y | |||
| 1138 | # CONFIG_FB_PM3 is not set | 1287 | # CONFIG_FB_PM3 is not set |
| 1139 | # CONFIG_FB_CARMINE is not set | 1288 | # CONFIG_FB_CARMINE is not set |
| 1140 | CONFIG_FB_PXA=y | 1289 | CONFIG_FB_PXA=y |
| 1290 | # CONFIG_FB_PXA_OVERLAY is not set | ||
| 1141 | # CONFIG_FB_PXA_SMARTPANEL is not set | 1291 | # CONFIG_FB_PXA_SMARTPANEL is not set |
| 1142 | CONFIG_FB_PXA_PARAMETERS=y | 1292 | CONFIG_FB_PXA_PARAMETERS=y |
| 1143 | CONFIG_FB_MBX=m | 1293 | CONFIG_FB_MBX=m |
| 1144 | # CONFIG_FB_W100 is not set | 1294 | # CONFIG_FB_W100 is not set |
| 1145 | # CONFIG_FB_VIRTUAL is not set | 1295 | # CONFIG_FB_VIRTUAL is not set |
| 1146 | # CONFIG_FB_METRONOME is not set | 1296 | # CONFIG_FB_METRONOME is not set |
| 1147 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 1297 | # CONFIG_FB_MB862XX is not set |
| 1298 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
| 1299 | # CONFIG_LCD_CLASS_DEVICE is not set | ||
| 1300 | # CONFIG_BACKLIGHT_CLASS_DEVICE is not set | ||
| 1148 | 1301 | ||
| 1149 | # | 1302 | # |
| 1150 | # Display device support | 1303 | # Display device support |
| @@ -1167,6 +1320,7 @@ CONFIG_LOGO_LINUX_MONO=y | |||
| 1167 | CONFIG_LOGO_LINUX_VGA16=y | 1320 | CONFIG_LOGO_LINUX_VGA16=y |
| 1168 | CONFIG_LOGO_LINUX_CLUT224=y | 1321 | CONFIG_LOGO_LINUX_CLUT224=y |
| 1169 | CONFIG_SOUND=m | 1322 | CONFIG_SOUND=m |
| 1323 | CONFIG_SOUND_OSS_CORE=y | ||
| 1170 | CONFIG_SND=m | 1324 | CONFIG_SND=m |
| 1171 | CONFIG_SND_TIMER=m | 1325 | CONFIG_SND_TIMER=m |
| 1172 | CONFIG_SND_PCM=m | 1326 | CONFIG_SND_PCM=m |
| @@ -1182,81 +1336,16 @@ CONFIG_SND_VERBOSE_PROCFS=y | |||
| 1182 | # CONFIG_SND_DEBUG is not set | 1336 | # CONFIG_SND_DEBUG is not set |
| 1183 | CONFIG_SND_VMASTER=y | 1337 | CONFIG_SND_VMASTER=y |
| 1184 | CONFIG_SND_AC97_CODEC=m | 1338 | CONFIG_SND_AC97_CODEC=m |
| 1185 | CONFIG_SND_DRIVERS=y | 1339 | # CONFIG_SND_DRIVERS is not set |
| 1186 | # CONFIG_SND_DUMMY is not set | 1340 | # CONFIG_SND_PCI is not set |
| 1187 | # CONFIG_SND_MTPAV is not set | ||
| 1188 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 1189 | # CONFIG_SND_MPU401 is not set | ||
| 1190 | # CONFIG_SND_AC97_POWER_SAVE is not set | ||
| 1191 | CONFIG_SND_PCI=y | ||
| 1192 | # CONFIG_SND_AD1889 is not set | ||
| 1193 | # CONFIG_SND_ALS300 is not set | ||
| 1194 | # CONFIG_SND_ALI5451 is not set | ||
| 1195 | # CONFIG_SND_ATIIXP is not set | ||
| 1196 | # CONFIG_SND_ATIIXP_MODEM is not set | ||
| 1197 | # CONFIG_SND_AU8810 is not set | ||
| 1198 | # CONFIG_SND_AU8820 is not set | ||
| 1199 | # CONFIG_SND_AU8830 is not set | ||
| 1200 | # CONFIG_SND_AW2 is not set | ||
| 1201 | # CONFIG_SND_AZT3328 is not set | ||
| 1202 | # CONFIG_SND_BT87X is not set | ||
| 1203 | # CONFIG_SND_CA0106 is not set | ||
| 1204 | # CONFIG_SND_CMIPCI is not set | ||
| 1205 | # CONFIG_SND_OXYGEN is not set | ||
| 1206 | # CONFIG_SND_CS4281 is not set | ||
| 1207 | # CONFIG_SND_CS46XX is not set | ||
| 1208 | # CONFIG_SND_DARLA20 is not set | ||
| 1209 | # CONFIG_SND_GINA20 is not set | ||
| 1210 | # CONFIG_SND_LAYLA20 is not set | ||
| 1211 | # CONFIG_SND_DARLA24 is not set | ||
| 1212 | # CONFIG_SND_GINA24 is not set | ||
| 1213 | # CONFIG_SND_LAYLA24 is not set | ||
| 1214 | # CONFIG_SND_MONA is not set | ||
| 1215 | # CONFIG_SND_MIA is not set | ||
| 1216 | # CONFIG_SND_ECHO3G is not set | ||
| 1217 | # CONFIG_SND_INDIGO is not set | ||
| 1218 | # CONFIG_SND_INDIGOIO is not set | ||
| 1219 | # CONFIG_SND_INDIGODJ is not set | ||
| 1220 | # CONFIG_SND_EMU10K1 is not set | ||
| 1221 | # CONFIG_SND_EMU10K1X is not set | ||
| 1222 | # CONFIG_SND_ENS1370 is not set | ||
| 1223 | # CONFIG_SND_ENS1371 is not set | ||
| 1224 | # CONFIG_SND_ES1938 is not set | ||
| 1225 | # CONFIG_SND_ES1968 is not set | ||
| 1226 | # CONFIG_SND_FM801 is not set | ||
| 1227 | # CONFIG_SND_HDA_INTEL is not set | ||
| 1228 | # CONFIG_SND_HDSP is not set | ||
| 1229 | # CONFIG_SND_HDSPM is not set | ||
| 1230 | # CONFIG_SND_HIFIER is not set | ||
| 1231 | # CONFIG_SND_ICE1712 is not set | ||
| 1232 | # CONFIG_SND_ICE1724 is not set | ||
| 1233 | # CONFIG_SND_INTEL8X0 is not set | ||
| 1234 | # CONFIG_SND_INTEL8X0M is not set | ||
| 1235 | # CONFIG_SND_KORG1212 is not set | ||
| 1236 | # CONFIG_SND_MAESTRO3 is not set | ||
| 1237 | # CONFIG_SND_MIXART is not set | ||
| 1238 | # CONFIG_SND_NM256 is not set | ||
| 1239 | # CONFIG_SND_PCXHR is not set | ||
| 1240 | # CONFIG_SND_RIPTIDE is not set | ||
| 1241 | # CONFIG_SND_RME32 is not set | ||
| 1242 | # CONFIG_SND_RME96 is not set | ||
| 1243 | # CONFIG_SND_RME9652 is not set | ||
| 1244 | # CONFIG_SND_SONICVIBES is not set | ||
| 1245 | # CONFIG_SND_TRIDENT is not set | ||
| 1246 | # CONFIG_SND_VIA82XX is not set | ||
| 1247 | # CONFIG_SND_VIA82XX_MODEM is not set | ||
| 1248 | # CONFIG_SND_VIRTUOSO is not set | ||
| 1249 | # CONFIG_SND_VX222 is not set | ||
| 1250 | # CONFIG_SND_YMFPCI is not set | ||
| 1251 | CONFIG_SND_ARM=y | 1341 | CONFIG_SND_ARM=y |
| 1252 | CONFIG_SND_PXA2XX_PCM=m | 1342 | CONFIG_SND_PXA2XX_PCM=m |
| 1343 | CONFIG_SND_PXA2XX_LIB=m | ||
| 1344 | CONFIG_SND_PXA2XX_LIB_AC97=y | ||
| 1253 | CONFIG_SND_PXA2XX_AC97=m | 1345 | CONFIG_SND_PXA2XX_AC97=m |
| 1254 | CONFIG_SND_USB=y | 1346 | # CONFIG_SND_SPI is not set |
| 1255 | # CONFIG_SND_USB_AUDIO is not set | 1347 | # CONFIG_SND_USB is not set |
| 1256 | # CONFIG_SND_USB_CAIAQ is not set | 1348 | # CONFIG_SND_PCMCIA is not set |
| 1257 | CONFIG_SND_PCMCIA=y | ||
| 1258 | # CONFIG_SND_VXPOCKET is not set | ||
| 1259 | # CONFIG_SND_PDAUDIOCF is not set | ||
| 1260 | # CONFIG_SND_SOC is not set | 1349 | # CONFIG_SND_SOC is not set |
| 1261 | # CONFIG_SOUND_PRIME is not set | 1350 | # CONFIG_SOUND_PRIME is not set |
| 1262 | CONFIG_AC97_BUS=m | 1351 | CONFIG_AC97_BUS=m |
| @@ -1269,9 +1358,37 @@ CONFIG_HID_DEBUG=y | |||
| 1269 | # USB Input Devices | 1358 | # USB Input Devices |
| 1270 | # | 1359 | # |
| 1271 | CONFIG_USB_HID=y | 1360 | CONFIG_USB_HID=y |
| 1272 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | 1361 | # CONFIG_HID_PID is not set |
| 1273 | # CONFIG_HID_FF is not set | ||
| 1274 | # CONFIG_USB_HIDDEV is not set | 1362 | # CONFIG_USB_HIDDEV is not set |
| 1363 | |||
| 1364 | # | ||
| 1365 | # Special HID drivers | ||
| 1366 | # | ||
| 1367 | CONFIG_HID_COMPAT=y | ||
| 1368 | CONFIG_HID_A4TECH=y | ||
| 1369 | CONFIG_HID_APPLE=y | ||
| 1370 | CONFIG_HID_BELKIN=y | ||
| 1371 | CONFIG_HID_CHERRY=y | ||
| 1372 | CONFIG_HID_CHICONY=y | ||
| 1373 | CONFIG_HID_CYPRESS=y | ||
| 1374 | CONFIG_HID_EZKEY=y | ||
| 1375 | CONFIG_HID_GYRATION=y | ||
| 1376 | CONFIG_HID_LOGITECH=y | ||
| 1377 | # CONFIG_LOGITECH_FF is not set | ||
| 1378 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
| 1379 | CONFIG_HID_MICROSOFT=y | ||
| 1380 | CONFIG_HID_MONTEREY=y | ||
| 1381 | # CONFIG_HID_NTRIG is not set | ||
| 1382 | CONFIG_HID_PANTHERLORD=y | ||
| 1383 | # CONFIG_PANTHERLORD_FF is not set | ||
| 1384 | CONFIG_HID_PETALYNX=y | ||
| 1385 | CONFIG_HID_SAMSUNG=y | ||
| 1386 | CONFIG_HID_SONY=y | ||
| 1387 | CONFIG_HID_SUNPLUS=y | ||
| 1388 | # CONFIG_GREENASIA_FF is not set | ||
| 1389 | # CONFIG_HID_TOPSEED is not set | ||
| 1390 | # CONFIG_THRUSTMASTER_FF is not set | ||
| 1391 | # CONFIG_ZEROPLUS_FF is not set | ||
| 1275 | CONFIG_USB_SUPPORT=y | 1392 | CONFIG_USB_SUPPORT=y |
| 1276 | CONFIG_USB_ARCH_HAS_HCD=y | 1393 | CONFIG_USB_ARCH_HAS_HCD=y |
| 1277 | CONFIG_USB_ARCH_HAS_OHCI=y | 1394 | CONFIG_USB_ARCH_HAS_OHCI=y |
| @@ -1291,12 +1408,15 @@ CONFIG_USB_DEVICEFS=y | |||
| 1291 | # CONFIG_USB_OTG_WHITELIST is not set | 1408 | # CONFIG_USB_OTG_WHITELIST is not set |
| 1292 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | 1409 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set |
| 1293 | CONFIG_USB_MON=y | 1410 | CONFIG_USB_MON=y |
| 1411 | # CONFIG_USB_WUSB is not set | ||
| 1412 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 1294 | 1413 | ||
| 1295 | # | 1414 | # |
| 1296 | # USB Host Controller Drivers | 1415 | # USB Host Controller Drivers |
| 1297 | # | 1416 | # |
| 1298 | # CONFIG_USB_C67X00_HCD is not set | 1417 | # CONFIG_USB_C67X00_HCD is not set |
| 1299 | # CONFIG_USB_EHCI_HCD is not set | 1418 | # CONFIG_USB_EHCI_HCD is not set |
| 1419 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1300 | # CONFIG_USB_ISP116X_HCD is not set | 1420 | # CONFIG_USB_ISP116X_HCD is not set |
| 1301 | # CONFIG_USB_ISP1760_HCD is not set | 1421 | # CONFIG_USB_ISP1760_HCD is not set |
| 1302 | CONFIG_USB_OHCI_HCD=y | 1422 | CONFIG_USB_OHCI_HCD=y |
| @@ -1306,6 +1426,8 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y | |||
| 1306 | # CONFIG_USB_UHCI_HCD is not set | 1426 | # CONFIG_USB_UHCI_HCD is not set |
| 1307 | # CONFIG_USB_SL811_HCD is not set | 1427 | # CONFIG_USB_SL811_HCD is not set |
| 1308 | # CONFIG_USB_R8A66597_HCD is not set | 1428 | # CONFIG_USB_R8A66597_HCD is not set |
| 1429 | # CONFIG_USB_WHCI_HCD is not set | ||
| 1430 | # CONFIG_USB_HWA_HCD is not set | ||
| 1309 | # CONFIG_USB_MUSB_HDRC is not set | 1431 | # CONFIG_USB_MUSB_HDRC is not set |
| 1310 | 1432 | ||
| 1311 | # | 1433 | # |
| @@ -1314,20 +1436,20 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y | |||
| 1314 | # CONFIG_USB_ACM is not set | 1436 | # CONFIG_USB_ACM is not set |
| 1315 | # CONFIG_USB_PRINTER is not set | 1437 | # CONFIG_USB_PRINTER is not set |
| 1316 | # CONFIG_USB_WDM is not set | 1438 | # CONFIG_USB_WDM is not set |
| 1439 | # CONFIG_USB_TMC is not set | ||
| 1317 | 1440 | ||
| 1318 | # | 1441 | # |
| 1319 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | 1442 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; |
| 1320 | # | 1443 | # |
| 1321 | 1444 | ||
| 1322 | # | 1445 | # |
| 1323 | # may also be needed; see USB_STORAGE Help for more information | 1446 | # see USB_STORAGE Help for more information |
| 1324 | # | 1447 | # |
| 1325 | CONFIG_USB_STORAGE=y | 1448 | CONFIG_USB_STORAGE=y |
| 1326 | # CONFIG_USB_STORAGE_DEBUG is not set | 1449 | # CONFIG_USB_STORAGE_DEBUG is not set |
| 1327 | # CONFIG_USB_STORAGE_DATAFAB is not set | 1450 | # CONFIG_USB_STORAGE_DATAFAB is not set |
| 1328 | # CONFIG_USB_STORAGE_FREECOM is not set | 1451 | # CONFIG_USB_STORAGE_FREECOM is not set |
| 1329 | # CONFIG_USB_STORAGE_ISD200 is not set | 1452 | # CONFIG_USB_STORAGE_ISD200 is not set |
| 1330 | # CONFIG_USB_STORAGE_DPCM is not set | ||
| 1331 | # CONFIG_USB_STORAGE_USBAT is not set | 1453 | # CONFIG_USB_STORAGE_USBAT is not set |
| 1332 | # CONFIG_USB_STORAGE_SDDR09 is not set | 1454 | # CONFIG_USB_STORAGE_SDDR09 is not set |
| 1333 | # CONFIG_USB_STORAGE_SDDR55 is not set | 1455 | # CONFIG_USB_STORAGE_SDDR55 is not set |
| @@ -1355,6 +1477,7 @@ CONFIG_USB_STORAGE=y | |||
| 1355 | # CONFIG_USB_EMI62 is not set | 1477 | # CONFIG_USB_EMI62 is not set |
| 1356 | # CONFIG_USB_EMI26 is not set | 1478 | # CONFIG_USB_EMI26 is not set |
| 1357 | # CONFIG_USB_ADUTUX is not set | 1479 | # CONFIG_USB_ADUTUX is not set |
| 1480 | # CONFIG_USB_SEVSEG is not set | ||
| 1358 | # CONFIG_USB_RIO500 is not set | 1481 | # CONFIG_USB_RIO500 is not set |
| 1359 | # CONFIG_USB_LEGOTOWER is not set | 1482 | # CONFIG_USB_LEGOTOWER is not set |
| 1360 | # CONFIG_USB_LCD is not set | 1483 | # CONFIG_USB_LCD is not set |
| @@ -1371,13 +1494,20 @@ CONFIG_USB_STORAGE=y | |||
| 1371 | # CONFIG_USB_IOWARRIOR is not set | 1494 | # CONFIG_USB_IOWARRIOR is not set |
| 1372 | # CONFIG_USB_TEST is not set | 1495 | # CONFIG_USB_TEST is not set |
| 1373 | # CONFIG_USB_ISIGHTFW is not set | 1496 | # CONFIG_USB_ISIGHTFW is not set |
| 1497 | # CONFIG_USB_VST is not set | ||
| 1374 | # CONFIG_USB_GADGET is not set | 1498 | # CONFIG_USB_GADGET is not set |
| 1499 | |||
| 1500 | # | ||
| 1501 | # OTG and related infrastructure | ||
| 1502 | # | ||
| 1503 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1504 | # CONFIG_UWB is not set | ||
| 1375 | CONFIG_MMC=m | 1505 | CONFIG_MMC=m |
| 1376 | # CONFIG_MMC_DEBUG is not set | 1506 | # CONFIG_MMC_DEBUG is not set |
| 1377 | # CONFIG_MMC_UNSAFE_RESUME is not set | 1507 | # CONFIG_MMC_UNSAFE_RESUME is not set |
| 1378 | 1508 | ||
| 1379 | # | 1509 | # |
| 1380 | # MMC/SD Card Drivers | 1510 | # MMC/SD/SDIO Card Drivers |
| 1381 | # | 1511 | # |
| 1382 | CONFIG_MMC_BLOCK=m | 1512 | CONFIG_MMC_BLOCK=m |
| 1383 | CONFIG_MMC_BLOCK_BOUNCE=y | 1513 | CONFIG_MMC_BLOCK_BOUNCE=y |
| @@ -1385,11 +1515,12 @@ CONFIG_MMC_BLOCK_BOUNCE=y | |||
| 1385 | # CONFIG_MMC_TEST is not set | 1515 | # CONFIG_MMC_TEST is not set |
| 1386 | 1516 | ||
| 1387 | # | 1517 | # |
| 1388 | # MMC/SD Host Controller Drivers | 1518 | # MMC/SD/SDIO Host Controller Drivers |
| 1389 | # | 1519 | # |
| 1390 | CONFIG_MMC_PXA=m | 1520 | CONFIG_MMC_PXA=m |
| 1391 | # CONFIG_MMC_SDHCI is not set | 1521 | # CONFIG_MMC_SDHCI is not set |
| 1392 | # CONFIG_MMC_TIFM_SD is not set | 1522 | # CONFIG_MMC_TIFM_SD is not set |
| 1523 | # CONFIG_MMC_SPI is not set | ||
| 1393 | # CONFIG_MMC_SDRICOH_CS is not set | 1524 | # CONFIG_MMC_SDRICOH_CS is not set |
| 1394 | # CONFIG_MEMSTICK is not set | 1525 | # CONFIG_MEMSTICK is not set |
| 1395 | # CONFIG_ACCESSIBILITY is not set | 1526 | # CONFIG_ACCESSIBILITY is not set |
| @@ -1400,8 +1531,7 @@ CONFIG_LEDS_CLASS=y | |||
| 1400 | # LED drivers | 1531 | # LED drivers |
| 1401 | # | 1532 | # |
| 1402 | # CONFIG_LEDS_PCA9532 is not set | 1533 | # CONFIG_LEDS_PCA9532 is not set |
| 1403 | # CONFIG_LEDS_GPIO is not set | 1534 | CONFIG_LEDS_GPIO=m |
| 1404 | CONFIG_LEDS_CM_X270=y | ||
| 1405 | # CONFIG_LEDS_PCA955X is not set | 1535 | # CONFIG_LEDS_PCA955X is not set |
| 1406 | 1536 | ||
| 1407 | # | 1537 | # |
| @@ -1410,6 +1540,7 @@ CONFIG_LEDS_CM_X270=y | |||
| 1410 | CONFIG_LEDS_TRIGGERS=y | 1540 | CONFIG_LEDS_TRIGGERS=y |
| 1411 | # CONFIG_LEDS_TRIGGER_TIMER is not set | 1541 | # CONFIG_LEDS_TRIGGER_TIMER is not set |
| 1412 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | 1542 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y |
| 1543 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | ||
| 1413 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | 1544 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set |
| 1414 | CONFIG_RTC_LIB=y | 1545 | CONFIG_RTC_LIB=y |
| 1415 | CONFIG_RTC_CLASS=y | 1546 | CONFIG_RTC_CLASS=y |
| @@ -1441,37 +1572,43 @@ CONFIG_RTC_INTF_DEV=y | |||
| 1441 | # CONFIG_RTC_DRV_M41T80 is not set | 1572 | # CONFIG_RTC_DRV_M41T80 is not set |
| 1442 | # CONFIG_RTC_DRV_S35390A is not set | 1573 | # CONFIG_RTC_DRV_S35390A is not set |
| 1443 | # CONFIG_RTC_DRV_FM3130 is not set | 1574 | # CONFIG_RTC_DRV_FM3130 is not set |
| 1575 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 1444 | 1576 | ||
| 1445 | # | 1577 | # |
| 1446 | # SPI RTC drivers | 1578 | # SPI RTC drivers |
| 1447 | # | 1579 | # |
| 1580 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 1581 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 1582 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 1583 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 1584 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 1585 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 1586 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 1448 | 1587 | ||
| 1449 | # | 1588 | # |
| 1450 | # Platform RTC drivers | 1589 | # Platform RTC drivers |
| 1451 | # | 1590 | # |
| 1452 | # CONFIG_RTC_DRV_CMOS is not set | 1591 | # CONFIG_RTC_DRV_CMOS is not set |
| 1592 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 1453 | # CONFIG_RTC_DRV_DS1511 is not set | 1593 | # CONFIG_RTC_DRV_DS1511 is not set |
| 1454 | # CONFIG_RTC_DRV_DS1553 is not set | 1594 | # CONFIG_RTC_DRV_DS1553 is not set |
| 1455 | # CONFIG_RTC_DRV_DS1742 is not set | 1595 | # CONFIG_RTC_DRV_DS1742 is not set |
| 1456 | # CONFIG_RTC_DRV_STK17TA8 is not set | 1596 | # CONFIG_RTC_DRV_STK17TA8 is not set |
| 1457 | # CONFIG_RTC_DRV_M48T86 is not set | 1597 | # CONFIG_RTC_DRV_M48T86 is not set |
| 1598 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 1458 | # CONFIG_RTC_DRV_M48T59 is not set | 1599 | # CONFIG_RTC_DRV_M48T59 is not set |
| 1600 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 1459 | CONFIG_RTC_DRV_V3020=y | 1601 | CONFIG_RTC_DRV_V3020=y |
| 1460 | 1602 | ||
| 1461 | # | 1603 | # |
| 1462 | # on-CPU RTC drivers | 1604 | # on-CPU RTC drivers |
| 1463 | # | 1605 | # |
| 1464 | CONFIG_RTC_DRV_SA1100=y | 1606 | CONFIG_RTC_DRV_SA1100=y |
| 1607 | # CONFIG_RTC_DRV_PXA is not set | ||
| 1465 | # CONFIG_DMADEVICES is not set | 1608 | # CONFIG_DMADEVICES is not set |
| 1466 | |||
| 1467 | # | ||
| 1468 | # Voltage and Current regulators | ||
| 1469 | # | ||
| 1470 | # CONFIG_REGULATOR is not set | 1609 | # CONFIG_REGULATOR is not set |
| 1471 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 1472 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 1473 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 1474 | # CONFIG_UIO is not set | 1610 | # CONFIG_UIO is not set |
| 1611 | # CONFIG_STAGING is not set | ||
| 1475 | 1612 | ||
| 1476 | # | 1613 | # |
| 1477 | # File systems | 1614 | # File systems |
| @@ -1483,14 +1620,16 @@ CONFIG_EXT3_FS=y | |||
| 1483 | CONFIG_EXT3_FS_XATTR=y | 1620 | CONFIG_EXT3_FS_XATTR=y |
| 1484 | # CONFIG_EXT3_FS_POSIX_ACL is not set | 1621 | # CONFIG_EXT3_FS_POSIX_ACL is not set |
| 1485 | # CONFIG_EXT3_FS_SECURITY is not set | 1622 | # CONFIG_EXT3_FS_SECURITY is not set |
| 1486 | # CONFIG_EXT4DEV_FS is not set | 1623 | # CONFIG_EXT4_FS is not set |
| 1487 | CONFIG_JBD=y | 1624 | CONFIG_JBD=y |
| 1488 | CONFIG_FS_MBCACHE=y | 1625 | CONFIG_FS_MBCACHE=y |
| 1489 | # CONFIG_REISERFS_FS is not set | 1626 | # CONFIG_REISERFS_FS is not set |
| 1490 | # CONFIG_JFS_FS is not set | 1627 | # CONFIG_JFS_FS is not set |
| 1491 | # CONFIG_FS_POSIX_ACL is not set | 1628 | # CONFIG_FS_POSIX_ACL is not set |
| 1629 | CONFIG_FILE_LOCKING=y | ||
| 1492 | # CONFIG_XFS_FS is not set | 1630 | # CONFIG_XFS_FS is not set |
| 1493 | # CONFIG_OCFS2_FS is not set | 1631 | # CONFIG_OCFS2_FS is not set |
| 1632 | # CONFIG_BTRFS_FS is not set | ||
| 1494 | CONFIG_DNOTIFY=y | 1633 | CONFIG_DNOTIFY=y |
| 1495 | CONFIG_INOTIFY=y | 1634 | CONFIG_INOTIFY=y |
| 1496 | CONFIG_INOTIFY_USER=y | 1635 | CONFIG_INOTIFY_USER=y |
| @@ -1520,15 +1659,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | |||
| 1520 | # | 1659 | # |
| 1521 | CONFIG_PROC_FS=y | 1660 | CONFIG_PROC_FS=y |
| 1522 | CONFIG_PROC_SYSCTL=y | 1661 | CONFIG_PROC_SYSCTL=y |
| 1662 | # CONFIG_PROC_PAGE_MONITOR is not set | ||
| 1523 | CONFIG_SYSFS=y | 1663 | CONFIG_SYSFS=y |
| 1524 | CONFIG_TMPFS=y | 1664 | CONFIG_TMPFS=y |
| 1525 | # CONFIG_TMPFS_POSIX_ACL is not set | 1665 | # CONFIG_TMPFS_POSIX_ACL is not set |
| 1526 | # CONFIG_HUGETLB_PAGE is not set | 1666 | # CONFIG_HUGETLB_PAGE is not set |
| 1527 | # CONFIG_CONFIGFS_FS is not set | 1667 | # CONFIG_CONFIGFS_FS is not set |
| 1528 | 1668 | CONFIG_MISC_FILESYSTEMS=y | |
| 1529 | # | ||
| 1530 | # Miscellaneous filesystems | ||
| 1531 | # | ||
| 1532 | # CONFIG_ADFS_FS is not set | 1669 | # CONFIG_ADFS_FS is not set |
| 1533 | # CONFIG_AFFS_FS is not set | 1670 | # CONFIG_AFFS_FS is not set |
| 1534 | # CONFIG_HFS_FS is not set | 1671 | # CONFIG_HFS_FS is not set |
| @@ -1548,6 +1685,7 @@ CONFIG_JFFS2_ZLIB=y | |||
| 1548 | CONFIG_JFFS2_RTIME=y | 1685 | CONFIG_JFFS2_RTIME=y |
| 1549 | # CONFIG_JFFS2_RUBIN is not set | 1686 | # CONFIG_JFFS2_RUBIN is not set |
| 1550 | # CONFIG_CRAMFS is not set | 1687 | # CONFIG_CRAMFS is not set |
| 1688 | # CONFIG_SQUASHFS is not set | ||
| 1551 | # CONFIG_VXFS_FS is not set | 1689 | # CONFIG_VXFS_FS is not set |
| 1552 | # CONFIG_MINIX_FS is not set | 1690 | # CONFIG_MINIX_FS is not set |
| 1553 | # CONFIG_OMFS_FS is not set | 1691 | # CONFIG_OMFS_FS is not set |
| @@ -1567,6 +1705,7 @@ CONFIG_LOCKD=y | |||
| 1567 | CONFIG_LOCKD_V4=y | 1705 | CONFIG_LOCKD_V4=y |
| 1568 | CONFIG_NFS_COMMON=y | 1706 | CONFIG_NFS_COMMON=y |
| 1569 | CONFIG_SUNRPC=y | 1707 | CONFIG_SUNRPC=y |
| 1708 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
| 1570 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 1709 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
| 1571 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1710 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
| 1572 | # CONFIG_SMB_FS is not set | 1711 | # CONFIG_SMB_FS is not set |
| @@ -1678,19 +1817,29 @@ CONFIG_DEBUG_KERNEL=y | |||
| 1678 | # CONFIG_DEBUG_MEMORY_INIT is not set | 1817 | # CONFIG_DEBUG_MEMORY_INIT is not set |
| 1679 | # CONFIG_DEBUG_LIST is not set | 1818 | # CONFIG_DEBUG_LIST is not set |
| 1680 | # CONFIG_DEBUG_SG is not set | 1819 | # CONFIG_DEBUG_SG is not set |
| 1820 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1681 | CONFIG_FRAME_POINTER=y | 1821 | CONFIG_FRAME_POINTER=y |
| 1682 | # CONFIG_BOOT_PRINTK_DELAY is not set | 1822 | # CONFIG_BOOT_PRINTK_DELAY is not set |
| 1683 | # CONFIG_RCU_TORTURE_TEST is not set | 1823 | # CONFIG_RCU_TORTURE_TEST is not set |
| 1824 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1684 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1825 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1826 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1685 | # CONFIG_FAULT_INJECTION is not set | 1827 | # CONFIG_FAULT_INJECTION is not set |
| 1686 | # CONFIG_LATENCYTOP is not set | 1828 | # CONFIG_LATENCYTOP is not set |
| 1687 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 1829 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| 1688 | CONFIG_HAVE_FTRACE=y | 1830 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 1689 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 1831 | |
| 1690 | # CONFIG_FTRACE is not set | 1832 | # |
| 1833 | # Tracers | ||
| 1834 | # | ||
| 1835 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1691 | # CONFIG_IRQSOFF_TRACER is not set | 1836 | # CONFIG_IRQSOFF_TRACER is not set |
| 1692 | # CONFIG_SCHED_TRACER is not set | 1837 | # CONFIG_SCHED_TRACER is not set |
| 1693 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 1838 | # CONFIG_CONTEXT_SWITCH_TRACER is not set |
| 1839 | # CONFIG_BOOT_TRACER is not set | ||
| 1840 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
| 1841 | # CONFIG_STACK_TRACER is not set | ||
| 1842 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
| 1694 | # CONFIG_SAMPLES is not set | 1843 | # CONFIG_SAMPLES is not set |
| 1695 | CONFIG_HAVE_ARCH_KGDB=y | 1844 | CONFIG_HAVE_ARCH_KGDB=y |
| 1696 | # CONFIG_KGDB is not set | 1845 | # CONFIG_KGDB is not set |
| @@ -1705,13 +1854,16 @@ CONFIG_DEBUG_LL=y | |||
| 1705 | # | 1854 | # |
| 1706 | # CONFIG_KEYS is not set | 1855 | # CONFIG_KEYS is not set |
| 1707 | # CONFIG_SECURITY is not set | 1856 | # CONFIG_SECURITY is not set |
| 1857 | # CONFIG_SECURITYFS is not set | ||
| 1708 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 1858 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set |
| 1709 | CONFIG_CRYPTO=y | 1859 | CONFIG_CRYPTO=y |
| 1710 | 1860 | ||
| 1711 | # | 1861 | # |
| 1712 | # Crypto core or helper | 1862 | # Crypto core or helper |
| 1713 | # | 1863 | # |
| 1864 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1714 | # CONFIG_CRYPTO_MANAGER is not set | 1865 | # CONFIG_CRYPTO_MANAGER is not set |
| 1866 | # CONFIG_CRYPTO_MANAGER2 is not set | ||
| 1715 | # CONFIG_CRYPTO_GF128MUL is not set | 1867 | # CONFIG_CRYPTO_GF128MUL is not set |
| 1716 | # CONFIG_CRYPTO_NULL is not set | 1868 | # CONFIG_CRYPTO_NULL is not set |
| 1717 | # CONFIG_CRYPTO_CRYPTD is not set | 1869 | # CONFIG_CRYPTO_CRYPTD is not set |
| @@ -1783,14 +1935,18 @@ CONFIG_CRYPTO=y | |||
| 1783 | # | 1935 | # |
| 1784 | # CONFIG_CRYPTO_DEFLATE is not set | 1936 | # CONFIG_CRYPTO_DEFLATE is not set |
| 1785 | # CONFIG_CRYPTO_LZO is not set | 1937 | # CONFIG_CRYPTO_LZO is not set |
| 1938 | |||
| 1939 | # | ||
| 1940 | # Random Number Generation | ||
| 1941 | # | ||
| 1942 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1786 | # CONFIG_CRYPTO_HW is not set | 1943 | # CONFIG_CRYPTO_HW is not set |
| 1787 | 1944 | ||
| 1788 | # | 1945 | # |
| 1789 | # Library routines | 1946 | # Library routines |
| 1790 | # | 1947 | # |
| 1791 | CONFIG_BITREVERSE=y | 1948 | CONFIG_BITREVERSE=y |
| 1792 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | 1949 | CONFIG_GENERIC_FIND_LAST_BIT=y |
| 1793 | # CONFIG_GENERIC_FIND_NEXT_BIT is not set | ||
| 1794 | CONFIG_CRC_CCITT=m | 1950 | CONFIG_CRC_CCITT=m |
| 1795 | # CONFIG_CRC16 is not set | 1951 | # CONFIG_CRC16 is not set |
| 1796 | # CONFIG_CRC_T10DIF is not set | 1952 | # CONFIG_CRC_T10DIF is not set |
diff --git a/arch/arm/configs/collie_defconfig b/arch/arm/configs/collie_defconfig index f7622e658163..1aa62249031b 100644 --- a/arch/arm/configs/collie_defconfig +++ b/arch/arm/configs/collie_defconfig | |||
| @@ -113,7 +113,6 @@ CONFIG_ARCH_SA1100=y | |||
| 113 | CONFIG_SA1100_COLLIE=y | 113 | CONFIG_SA1100_COLLIE=y |
| 114 | # CONFIG_SA1100_H3100 is not set | 114 | # CONFIG_SA1100_H3100 is not set |
| 115 | # CONFIG_SA1100_H3600 is not set | 115 | # CONFIG_SA1100_H3600 is not set |
| 116 | # CONFIG_SA1100_H3800 is not set | ||
| 117 | # CONFIG_SA1100_BADGE4 is not set | 116 | # CONFIG_SA1100_BADGE4 is not set |
| 118 | # CONFIG_SA1100_JORNADA720 is not set | 117 | # CONFIG_SA1100_JORNADA720 is not set |
| 119 | # CONFIG_SA1100_HACKKIT is not set | 118 | # CONFIG_SA1100_HACKKIT is not set |
diff --git a/arch/arm/configs/em_x270_defconfig b/arch/arm/configs/em_x270_defconfig new file mode 100644 index 000000000000..e9955b786c80 --- /dev/null +++ b/arch/arm/configs/em_x270_defconfig | |||
| @@ -0,0 +1,1741 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.29-rc2 | ||
| 4 | # Sun Feb 1 16:43:31 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_MMU=y | ||
| 12 | # CONFIG_NO_IOPORT is not set | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | ||
| 14 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 16 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 17 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | ||
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 25 | CONFIG_ARCH_MTD_XIP=y | ||
| 26 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 27 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 29 | |||
| 30 | # | ||
| 31 | # General setup | ||
| 32 | # | ||
| 33 | CONFIG_EXPERIMENTAL=y | ||
| 34 | CONFIG_BROKEN_ON_SMP=y | ||
| 35 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 36 | CONFIG_LOCALVERSION="" | ||
| 37 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 38 | CONFIG_SWAP=y | ||
| 39 | CONFIG_SYSVIPC=y | ||
| 40 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 41 | # CONFIG_POSIX_MQUEUE is not set | ||
| 42 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 43 | # CONFIG_TASKSTATS is not set | ||
| 44 | # CONFIG_AUDIT is not set | ||
| 45 | CONFIG_IKCONFIG=y | ||
| 46 | CONFIG_IKCONFIG_PROC=y | ||
| 47 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 48 | CONFIG_GROUP_SCHED=y | ||
| 49 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 50 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 51 | CONFIG_USER_SCHED=y | ||
| 52 | # CONFIG_CGROUP_SCHED is not set | ||
| 53 | # CONFIG_CGROUPS is not set | ||
| 54 | CONFIG_SYSFS_DEPRECATED=y | ||
| 55 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 56 | # CONFIG_RELAY is not set | ||
| 57 | # CONFIG_NAMESPACES is not set | ||
| 58 | CONFIG_BLK_DEV_INITRD=y | ||
| 59 | CONFIG_INITRAMFS_SOURCE="" | ||
| 60 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 61 | CONFIG_SYSCTL=y | ||
| 62 | CONFIG_EMBEDDED=y | ||
| 63 | CONFIG_UID16=y | ||
| 64 | CONFIG_SYSCTL_SYSCALL=y | ||
| 65 | CONFIG_KALLSYMS=y | ||
| 66 | # CONFIG_KALLSYMS_ALL is not set | ||
| 67 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 68 | CONFIG_HOTPLUG=y | ||
| 69 | CONFIG_PRINTK=y | ||
| 70 | CONFIG_BUG=y | ||
| 71 | CONFIG_ELF_CORE=y | ||
| 72 | # CONFIG_COMPAT_BRK is not set | ||
| 73 | CONFIG_BASE_FULL=y | ||
| 74 | CONFIG_FUTEX=y | ||
| 75 | CONFIG_ANON_INODES=y | ||
| 76 | CONFIG_EPOLL=y | ||
| 77 | CONFIG_SIGNALFD=y | ||
| 78 | CONFIG_TIMERFD=y | ||
| 79 | CONFIG_EVENTFD=y | ||
| 80 | CONFIG_SHMEM=y | ||
| 81 | CONFIG_AIO=y | ||
| 82 | # CONFIG_VM_EVENT_COUNTERS is not set | ||
| 83 | # CONFIG_SLUB_DEBUG is not set | ||
| 84 | # CONFIG_SLAB is not set | ||
| 85 | CONFIG_SLUB=y | ||
| 86 | # CONFIG_SLOB is not set | ||
| 87 | # CONFIG_PROFILING is not set | ||
| 88 | CONFIG_HAVE_OPROFILE=y | ||
| 89 | # CONFIG_KPROBES is not set | ||
| 90 | CONFIG_HAVE_KPROBES=y | ||
| 91 | CONFIG_HAVE_KRETPROBES=y | ||
| 92 | CONFIG_HAVE_CLK=y | ||
| 93 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 94 | CONFIG_RT_MUTEXES=y | ||
| 95 | CONFIG_BASE_SMALL=0 | ||
| 96 | CONFIG_MODULES=y | ||
| 97 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 98 | CONFIG_MODULE_UNLOAD=y | ||
| 99 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 100 | # CONFIG_MODVERSIONS is not set | ||
| 101 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 102 | CONFIG_BLOCK=y | ||
| 103 | # CONFIG_LBD is not set | ||
| 104 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 105 | # CONFIG_BLK_DEV_BSG is not set | ||
| 106 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 107 | |||
| 108 | # | ||
| 109 | # IO Schedulers | ||
| 110 | # | ||
| 111 | CONFIG_IOSCHED_NOOP=y | ||
| 112 | CONFIG_IOSCHED_AS=y | ||
| 113 | CONFIG_IOSCHED_DEADLINE=y | ||
| 114 | CONFIG_IOSCHED_CFQ=y | ||
| 115 | # CONFIG_DEFAULT_AS is not set | ||
| 116 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 117 | CONFIG_DEFAULT_CFQ=y | ||
| 118 | # CONFIG_DEFAULT_NOOP is not set | ||
| 119 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 120 | CONFIG_CLASSIC_RCU=y | ||
| 121 | # CONFIG_TREE_RCU is not set | ||
| 122 | # CONFIG_PREEMPT_RCU is not set | ||
| 123 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 124 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 125 | CONFIG_FREEZER=y | ||
| 126 | |||
| 127 | # | ||
| 128 | # System Type | ||
| 129 | # | ||
| 130 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 131 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 132 | # CONFIG_ARCH_REALVIEW is not set | ||
| 133 | # CONFIG_ARCH_VERSATILE is not set | ||
| 134 | # CONFIG_ARCH_AT91 is not set | ||
| 135 | # CONFIG_ARCH_CLPS711X is not set | ||
| 136 | # CONFIG_ARCH_EBSA110 is not set | ||
| 137 | # CONFIG_ARCH_EP93XX is not set | ||
| 138 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 139 | # CONFIG_ARCH_NETX is not set | ||
| 140 | # CONFIG_ARCH_H720X is not set | ||
| 141 | # CONFIG_ARCH_IMX is not set | ||
| 142 | # CONFIG_ARCH_IOP13XX is not set | ||
| 143 | # CONFIG_ARCH_IOP32X is not set | ||
| 144 | # CONFIG_ARCH_IOP33X is not set | ||
| 145 | # CONFIG_ARCH_IXP23XX is not set | ||
| 146 | # CONFIG_ARCH_IXP2000 is not set | ||
| 147 | # CONFIG_ARCH_IXP4XX is not set | ||
| 148 | # CONFIG_ARCH_L7200 is not set | ||
| 149 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 150 | # CONFIG_ARCH_KS8695 is not set | ||
| 151 | # CONFIG_ARCH_NS9XXX is not set | ||
| 152 | # CONFIG_ARCH_LOKI is not set | ||
| 153 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 154 | # CONFIG_ARCH_MXC is not set | ||
| 155 | # CONFIG_ARCH_ORION5X is not set | ||
| 156 | # CONFIG_ARCH_PNX4008 is not set | ||
| 157 | CONFIG_ARCH_PXA=y | ||
| 158 | # CONFIG_ARCH_RPC is not set | ||
| 159 | # CONFIG_ARCH_SA1100 is not set | ||
| 160 | # CONFIG_ARCH_S3C2410 is not set | ||
| 161 | # CONFIG_ARCH_S3C64XX is not set | ||
| 162 | # CONFIG_ARCH_SHARK is not set | ||
| 163 | # CONFIG_ARCH_LH7A40X is not set | ||
| 164 | # CONFIG_ARCH_DAVINCI is not set | ||
| 165 | # CONFIG_ARCH_OMAP is not set | ||
| 166 | # CONFIG_ARCH_MSM is not set | ||
| 167 | # CONFIG_ARCH_W90X900 is not set | ||
| 168 | |||
| 169 | # | ||
| 170 | # Intel PXA2xx/PXA3xx Implementations | ||
| 171 | # | ||
| 172 | # CONFIG_ARCH_GUMSTIX is not set | ||
| 173 | # CONFIG_MACH_INTELMOTE2 is not set | ||
| 174 | # CONFIG_ARCH_LUBBOCK is not set | ||
| 175 | # CONFIG_MACH_LOGICPD_PXA270 is not set | ||
| 176 | # CONFIG_MACH_MAINSTONE is not set | ||
| 177 | # CONFIG_MACH_MP900C is not set | ||
| 178 | # CONFIG_ARCH_PXA_IDP is not set | ||
| 179 | # CONFIG_PXA_SHARPSL is not set | ||
| 180 | # CONFIG_ARCH_VIPER is not set | ||
| 181 | # CONFIG_ARCH_PXA_ESERIES is not set | ||
| 182 | # CONFIG_TRIZEPS_PXA is not set | ||
| 183 | # CONFIG_MACH_H5000 is not set | ||
| 184 | CONFIG_MACH_EM_X270=y | ||
| 185 | CONFIG_MACH_EXEDA=y | ||
| 186 | # CONFIG_MACH_COLIBRI is not set | ||
| 187 | # CONFIG_MACH_ZYLONITE is not set | ||
| 188 | # CONFIG_MACH_LITTLETON is not set | ||
| 189 | # CONFIG_MACH_TAVOREVB is not set | ||
| 190 | # CONFIG_MACH_SAAR is not set | ||
| 191 | # CONFIG_MACH_ARMCORE is not set | ||
| 192 | # CONFIG_MACH_CM_X300 is not set | ||
| 193 | # CONFIG_MACH_MAGICIAN is not set | ||
| 194 | # CONFIG_MACH_MIOA701 is not set | ||
| 195 | # CONFIG_MACH_PCM027 is not set | ||
| 196 | # CONFIG_ARCH_PXA_PALM is not set | ||
| 197 | # CONFIG_PXA_EZX is not set | ||
| 198 | CONFIG_PXA27x=y | ||
| 199 | CONFIG_PXA_SSP=y | ||
| 200 | # CONFIG_PXA_PWM is not set | ||
| 201 | |||
| 202 | # | ||
| 203 | # Processor Type | ||
| 204 | # | ||
| 205 | CONFIG_CPU_32=y | ||
| 206 | CONFIG_CPU_XSCALE=y | ||
| 207 | CONFIG_CPU_32v5=y | ||
| 208 | CONFIG_CPU_ABRT_EV5T=y | ||
| 209 | CONFIG_CPU_PABRT_NOIFAR=y | ||
| 210 | CONFIG_CPU_CACHE_VIVT=y | ||
| 211 | CONFIG_CPU_TLB_V4WBI=y | ||
| 212 | CONFIG_CPU_CP15=y | ||
| 213 | CONFIG_CPU_CP15_MMU=y | ||
| 214 | |||
| 215 | # | ||
| 216 | # Processor Features | ||
| 217 | # | ||
| 218 | CONFIG_ARM_THUMB=y | ||
| 219 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 220 | # CONFIG_OUTER_CACHE is not set | ||
| 221 | CONFIG_IWMMXT=y | ||
| 222 | CONFIG_XSCALE_PMU=y | ||
| 223 | CONFIG_COMMON_CLKDEV=y | ||
| 224 | |||
| 225 | # | ||
| 226 | # Bus support | ||
| 227 | # | ||
| 228 | # CONFIG_PCI_SYSCALL is not set | ||
| 229 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 230 | # CONFIG_PCCARD is not set | ||
| 231 | |||
| 232 | # | ||
| 233 | # Kernel Features | ||
| 234 | # | ||
| 235 | CONFIG_TICK_ONESHOT=y | ||
| 236 | CONFIG_NO_HZ=y | ||
| 237 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 238 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 239 | CONFIG_VMSPLIT_3G=y | ||
| 240 | # CONFIG_VMSPLIT_2G is not set | ||
| 241 | # CONFIG_VMSPLIT_1G is not set | ||
| 242 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 243 | # CONFIG_PREEMPT is not set | ||
| 244 | CONFIG_HZ=100 | ||
| 245 | CONFIG_AEABI=y | ||
| 246 | CONFIG_OABI_COMPAT=y | ||
| 247 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y | ||
| 248 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 249 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 250 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 251 | CONFIG_FLATMEM_MANUAL=y | ||
| 252 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 253 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 254 | CONFIG_FLATMEM=y | ||
| 255 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 256 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 257 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 258 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 259 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 260 | CONFIG_VIRT_TO_BUS=y | ||
| 261 | CONFIG_UNEVICTABLE_LRU=y | ||
| 262 | CONFIG_ALIGNMENT_TRAP=y | ||
| 263 | |||
| 264 | # | ||
| 265 | # Boot options | ||
| 266 | # | ||
| 267 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 268 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 269 | CONFIG_CMDLINE="root=1f03 mem=32M" | ||
| 270 | # CONFIG_XIP_KERNEL is not set | ||
| 271 | # CONFIG_KEXEC is not set | ||
| 272 | |||
| 273 | # | ||
| 274 | # CPU Power Management | ||
| 275 | # | ||
| 276 | CONFIG_CPU_FREQ=y | ||
| 277 | CONFIG_CPU_FREQ_TABLE=y | ||
| 278 | # CONFIG_CPU_FREQ_DEBUG is not set | ||
| 279 | CONFIG_CPU_FREQ_STAT=y | ||
| 280 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set | ||
| 281 | CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y | ||
| 282 | # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | ||
| 283 | # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set | ||
| 284 | # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | ||
| 285 | # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | ||
| 286 | CONFIG_CPU_FREQ_GOV_PERFORMANCE=y | ||
| 287 | # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set | ||
| 288 | CONFIG_CPU_FREQ_GOV_USERSPACE=m | ||
| 289 | # CONFIG_CPU_FREQ_GOV_ONDEMAND is not set | ||
| 290 | # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set | ||
| 291 | # CONFIG_CPU_IDLE is not set | ||
| 292 | |||
| 293 | # | ||
| 294 | # Floating point emulation | ||
| 295 | # | ||
| 296 | |||
| 297 | # | ||
| 298 | # At least one emulation must be selected | ||
| 299 | # | ||
| 300 | CONFIG_FPE_NWFPE=y | ||
| 301 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 302 | # CONFIG_FPE_FASTFPE is not set | ||
| 303 | |||
| 304 | # | ||
| 305 | # Userspace binary formats | ||
| 306 | # | ||
| 307 | CONFIG_BINFMT_ELF=y | ||
| 308 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 309 | CONFIG_HAVE_AOUT=y | ||
| 310 | # CONFIG_BINFMT_AOUT is not set | ||
| 311 | # CONFIG_BINFMT_MISC is not set | ||
| 312 | |||
| 313 | # | ||
| 314 | # Power management options | ||
| 315 | # | ||
| 316 | CONFIG_PM=y | ||
| 317 | # CONFIG_PM_DEBUG is not set | ||
| 318 | CONFIG_PM_SLEEP=y | ||
| 319 | CONFIG_SUSPEND=y | ||
| 320 | CONFIG_SUSPEND_FREEZER=y | ||
| 321 | CONFIG_APM_EMULATION=y | ||
| 322 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 323 | CONFIG_NET=y | ||
| 324 | |||
| 325 | # | ||
| 326 | # Networking options | ||
| 327 | # | ||
| 328 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 329 | CONFIG_PACKET=y | ||
| 330 | CONFIG_PACKET_MMAP=y | ||
| 331 | CONFIG_UNIX=y | ||
| 332 | CONFIG_XFRM=y | ||
| 333 | # CONFIG_XFRM_USER is not set | ||
| 334 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 335 | # CONFIG_XFRM_MIGRATE is not set | ||
| 336 | # CONFIG_XFRM_STATISTICS is not set | ||
| 337 | # CONFIG_NET_KEY is not set | ||
| 338 | CONFIG_INET=y | ||
| 339 | CONFIG_IP_MULTICAST=y | ||
| 340 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 341 | CONFIG_IP_FIB_HASH=y | ||
| 342 | CONFIG_IP_PNP=y | ||
| 343 | CONFIG_IP_PNP_DHCP=y | ||
| 344 | CONFIG_IP_PNP_BOOTP=y | ||
| 345 | # CONFIG_IP_PNP_RARP is not set | ||
| 346 | # CONFIG_NET_IPIP is not set | ||
| 347 | # CONFIG_NET_IPGRE is not set | ||
| 348 | # CONFIG_IP_MROUTE is not set | ||
| 349 | # CONFIG_ARPD is not set | ||
| 350 | # CONFIG_SYN_COOKIES is not set | ||
| 351 | # CONFIG_INET_AH is not set | ||
| 352 | # CONFIG_INET_ESP is not set | ||
| 353 | # CONFIG_INET_IPCOMP is not set | ||
| 354 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 355 | # CONFIG_INET_TUNNEL is not set | ||
| 356 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 357 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 358 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 359 | # CONFIG_INET_LRO is not set | ||
| 360 | # CONFIG_INET_DIAG is not set | ||
| 361 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 362 | CONFIG_TCP_CONG_CUBIC=y | ||
| 363 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 364 | # CONFIG_TCP_MD5SIG is not set | ||
| 365 | # CONFIG_IPV6 is not set | ||
| 366 | # CONFIG_NETWORK_SECMARK is not set | ||
| 367 | # CONFIG_NETFILTER is not set | ||
| 368 | # CONFIG_IP_DCCP is not set | ||
| 369 | # CONFIG_IP_SCTP is not set | ||
| 370 | # CONFIG_TIPC is not set | ||
| 371 | # CONFIG_ATM is not set | ||
| 372 | # CONFIG_BRIDGE is not set | ||
| 373 | # CONFIG_NET_DSA is not set | ||
| 374 | # CONFIG_VLAN_8021Q is not set | ||
| 375 | # CONFIG_DECNET is not set | ||
| 376 | # CONFIG_LLC2 is not set | ||
| 377 | # CONFIG_IPX is not set | ||
| 378 | # CONFIG_ATALK is not set | ||
| 379 | # CONFIG_X25 is not set | ||
| 380 | # CONFIG_LAPB is not set | ||
| 381 | # CONFIG_ECONET is not set | ||
| 382 | # CONFIG_WAN_ROUTER is not set | ||
| 383 | # CONFIG_NET_SCHED is not set | ||
| 384 | # CONFIG_DCB is not set | ||
| 385 | |||
| 386 | # | ||
| 387 | # Network testing | ||
| 388 | # | ||
| 389 | # CONFIG_NET_PKTGEN is not set | ||
| 390 | # CONFIG_HAMRADIO is not set | ||
| 391 | # CONFIG_CAN is not set | ||
| 392 | # CONFIG_IRDA is not set | ||
| 393 | CONFIG_BT=m | ||
| 394 | CONFIG_BT_L2CAP=m | ||
| 395 | CONFIG_BT_SCO=m | ||
| 396 | CONFIG_BT_RFCOMM=m | ||
| 397 | # CONFIG_BT_RFCOMM_TTY is not set | ||
| 398 | CONFIG_BT_BNEP=m | ||
| 399 | # CONFIG_BT_BNEP_MC_FILTER is not set | ||
| 400 | # CONFIG_BT_BNEP_PROTO_FILTER is not set | ||
| 401 | CONFIG_BT_HIDP=m | ||
| 402 | |||
| 403 | # | ||
| 404 | # Bluetooth device drivers | ||
| 405 | # | ||
| 406 | CONFIG_BT_HCIBTUSB=m | ||
| 407 | # CONFIG_BT_HCIBTSDIO is not set | ||
| 408 | # CONFIG_BT_HCIUART is not set | ||
| 409 | # CONFIG_BT_HCIBCM203X is not set | ||
| 410 | # CONFIG_BT_HCIBPA10X is not set | ||
| 411 | # CONFIG_BT_HCIBFUSB is not set | ||
| 412 | # CONFIG_BT_HCIVHCI is not set | ||
| 413 | # CONFIG_AF_RXRPC is not set | ||
| 414 | # CONFIG_PHONET is not set | ||
| 415 | CONFIG_WIRELESS=y | ||
| 416 | # CONFIG_CFG80211 is not set | ||
| 417 | CONFIG_WIRELESS_OLD_REGULATORY=y | ||
| 418 | CONFIG_WIRELESS_EXT=y | ||
| 419 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
| 420 | CONFIG_LIB80211=m | ||
| 421 | # CONFIG_MAC80211 is not set | ||
| 422 | # CONFIG_WIMAX is not set | ||
| 423 | # CONFIG_RFKILL is not set | ||
| 424 | # CONFIG_NET_9P is not set | ||
| 425 | |||
| 426 | # | ||
| 427 | # Device Drivers | ||
| 428 | # | ||
| 429 | |||
| 430 | # | ||
| 431 | # Generic Driver Options | ||
| 432 | # | ||
| 433 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 434 | CONFIG_STANDALONE=y | ||
| 435 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 436 | CONFIG_FW_LOADER=m | ||
| 437 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 438 | CONFIG_EXTRA_FIRMWARE="" | ||
| 439 | # CONFIG_DEBUG_DRIVER is not set | ||
| 440 | # CONFIG_DEBUG_DEVRES is not set | ||
| 441 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 442 | # CONFIG_CONNECTOR is not set | ||
| 443 | CONFIG_MTD=y | ||
| 444 | # CONFIG_MTD_DEBUG is not set | ||
| 445 | # CONFIG_MTD_CONCAT is not set | ||
| 446 | CONFIG_MTD_PARTITIONS=y | ||
| 447 | # CONFIG_MTD_TESTS is not set | ||
| 448 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 449 | CONFIG_MTD_CMDLINE_PARTS=y | ||
| 450 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 451 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 452 | |||
| 453 | # | ||
| 454 | # User Modules And Translation Layers | ||
| 455 | # | ||
| 456 | CONFIG_MTD_CHAR=y | ||
| 457 | CONFIG_MTD_BLKDEVS=y | ||
| 458 | CONFIG_MTD_BLOCK=y | ||
| 459 | # CONFIG_FTL is not set | ||
| 460 | # CONFIG_NFTL is not set | ||
| 461 | # CONFIG_INFTL is not set | ||
| 462 | # CONFIG_RFD_FTL is not set | ||
| 463 | # CONFIG_SSFDC is not set | ||
| 464 | # CONFIG_MTD_OOPS is not set | ||
| 465 | |||
| 466 | # | ||
| 467 | # RAM/ROM/Flash chip drivers | ||
| 468 | # | ||
| 469 | CONFIG_MTD_CFI=y | ||
| 470 | CONFIG_MTD_JEDECPROBE=y | ||
| 471 | CONFIG_MTD_GEN_PROBE=y | ||
| 472 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
| 473 | CONFIG_MTD_CFI_NOSWAP=y | ||
| 474 | # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set | ||
| 475 | # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set | ||
| 476 | # CONFIG_MTD_CFI_GEOMETRY is not set | ||
| 477 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 478 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 479 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 480 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 481 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 482 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 483 | CONFIG_MTD_CFI_I1=y | ||
| 484 | CONFIG_MTD_CFI_I2=y | ||
| 485 | # CONFIG_MTD_CFI_I4 is not set | ||
| 486 | # CONFIG_MTD_CFI_I8 is not set | ||
| 487 | # CONFIG_MTD_OTP is not set | ||
| 488 | CONFIG_MTD_CFI_INTELEXT=y | ||
| 489 | CONFIG_MTD_CFI_AMDSTD=y | ||
| 490 | CONFIG_MTD_CFI_STAA=y | ||
| 491 | CONFIG_MTD_CFI_UTIL=y | ||
| 492 | # CONFIG_MTD_RAM is not set | ||
| 493 | # CONFIG_MTD_ROM is not set | ||
| 494 | # CONFIG_MTD_ABSENT is not set | ||
| 495 | # CONFIG_MTD_XIP is not set | ||
| 496 | |||
| 497 | # | ||
| 498 | # Mapping drivers for chip access | ||
| 499 | # | ||
| 500 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 501 | CONFIG_MTD_PHYSMAP=y | ||
| 502 | # CONFIG_MTD_PHYSMAP_COMPAT is not set | ||
| 503 | CONFIG_MTD_PXA2XX=y | ||
| 504 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
| 505 | # CONFIG_MTD_IMPA7 is not set | ||
| 506 | # CONFIG_MTD_SHARP_SL is not set | ||
| 507 | # CONFIG_MTD_PLATRAM is not set | ||
| 508 | |||
| 509 | # | ||
| 510 | # Self-contained MTD device drivers | ||
| 511 | # | ||
| 512 | # CONFIG_MTD_DATAFLASH is not set | ||
| 513 | # CONFIG_MTD_M25P80 is not set | ||
| 514 | # CONFIG_MTD_SLRAM is not set | ||
| 515 | # CONFIG_MTD_PHRAM is not set | ||
| 516 | # CONFIG_MTD_MTDRAM is not set | ||
| 517 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 518 | |||
| 519 | # | ||
| 520 | # Disk-On-Chip Device Drivers | ||
| 521 | # | ||
| 522 | # CONFIG_MTD_DOC2000 is not set | ||
| 523 | # CONFIG_MTD_DOC2001 is not set | ||
| 524 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 525 | CONFIG_MTD_NAND=y | ||
| 526 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
| 527 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
| 528 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
| 529 | # CONFIG_MTD_NAND_H1900 is not set | ||
| 530 | # CONFIG_MTD_NAND_GPIO is not set | ||
| 531 | CONFIG_MTD_NAND_IDS=y | ||
| 532 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
| 533 | # CONFIG_MTD_NAND_SHARPSL is not set | ||
| 534 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
| 535 | CONFIG_MTD_NAND_PLATFORM=y | ||
| 536 | # CONFIG_MTD_ALAUDA is not set | ||
| 537 | # CONFIG_MTD_ONENAND is not set | ||
| 538 | |||
| 539 | # | ||
| 540 | # LPDDR flash memory drivers | ||
| 541 | # | ||
| 542 | # CONFIG_MTD_LPDDR is not set | ||
| 543 | # CONFIG_MTD_QINFO_PROBE is not set | ||
| 544 | |||
| 545 | # | ||
| 546 | # UBI - Unsorted block images | ||
| 547 | # | ||
| 548 | # CONFIG_MTD_UBI is not set | ||
| 549 | # CONFIG_PARPORT is not set | ||
| 550 | CONFIG_BLK_DEV=y | ||
| 551 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 552 | CONFIG_BLK_DEV_LOOP=y | ||
| 553 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 554 | # CONFIG_BLK_DEV_NBD is not set | ||
| 555 | # CONFIG_BLK_DEV_UB is not set | ||
| 556 | CONFIG_BLK_DEV_RAM=y | ||
| 557 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 558 | CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
| 559 | # CONFIG_BLK_DEV_XIP is not set | ||
| 560 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 561 | # CONFIG_ATA_OVER_ETH is not set | ||
| 562 | # CONFIG_MISC_DEVICES is not set | ||
| 563 | CONFIG_HAVE_IDE=y | ||
| 564 | # CONFIG_IDE is not set | ||
| 565 | |||
| 566 | # | ||
| 567 | # SCSI device support | ||
| 568 | # | ||
| 569 | # CONFIG_RAID_ATTRS is not set | ||
| 570 | CONFIG_SCSI=y | ||
| 571 | CONFIG_SCSI_DMA=y | ||
| 572 | # CONFIG_SCSI_TGT is not set | ||
| 573 | # CONFIG_SCSI_NETLINK is not set | ||
| 574 | CONFIG_SCSI_PROC_FS=y | ||
| 575 | |||
| 576 | # | ||
| 577 | # SCSI support type (disk, tape, CD-ROM) | ||
| 578 | # | ||
| 579 | CONFIG_BLK_DEV_SD=y | ||
| 580 | # CONFIG_CHR_DEV_ST is not set | ||
| 581 | # CONFIG_CHR_DEV_OSST is not set | ||
| 582 | # CONFIG_BLK_DEV_SR is not set | ||
| 583 | # CONFIG_CHR_DEV_SG is not set | ||
| 584 | # CONFIG_CHR_DEV_SCH is not set | ||
| 585 | |||
| 586 | # | ||
| 587 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 588 | # | ||
| 589 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 590 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 591 | # CONFIG_SCSI_LOGGING is not set | ||
| 592 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 593 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 594 | |||
| 595 | # | ||
| 596 | # SCSI Transports | ||
| 597 | # | ||
| 598 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 599 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 600 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 601 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 602 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 603 | # CONFIG_SCSI_LOWLEVEL is not set | ||
| 604 | # CONFIG_SCSI_DH is not set | ||
| 605 | # CONFIG_ATA is not set | ||
| 606 | # CONFIG_MD is not set | ||
| 607 | CONFIG_NETDEVICES=y | ||
| 608 | # CONFIG_DUMMY is not set | ||
| 609 | # CONFIG_BONDING is not set | ||
| 610 | # CONFIG_MACVLAN is not set | ||
| 611 | # CONFIG_EQUALIZER is not set | ||
| 612 | # CONFIG_TUN is not set | ||
| 613 | # CONFIG_VETH is not set | ||
| 614 | # CONFIG_PHYLIB is not set | ||
| 615 | CONFIG_NET_ETHERNET=y | ||
| 616 | CONFIG_MII=y | ||
| 617 | # CONFIG_AX88796 is not set | ||
| 618 | # CONFIG_SMC91X is not set | ||
| 619 | CONFIG_DM9000=y | ||
| 620 | CONFIG_DM9000_DEBUGLEVEL=1 | ||
| 621 | # CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set | ||
| 622 | # CONFIG_ENC28J60 is not set | ||
| 623 | # CONFIG_SMC911X is not set | ||
| 624 | # CONFIG_SMSC911X is not set | ||
| 625 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 626 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 627 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 628 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 629 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 630 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 631 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 632 | # CONFIG_B44 is not set | ||
| 633 | # CONFIG_NETDEV_1000 is not set | ||
| 634 | # CONFIG_NETDEV_10000 is not set | ||
| 635 | |||
| 636 | # | ||
| 637 | # Wireless LAN | ||
| 638 | # | ||
| 639 | # CONFIG_WLAN_PRE80211 is not set | ||
| 640 | CONFIG_WLAN_80211=y | ||
| 641 | CONFIG_LIBERTAS=m | ||
| 642 | # CONFIG_LIBERTAS_USB is not set | ||
| 643 | CONFIG_LIBERTAS_SDIO=m | ||
| 644 | # CONFIG_LIBERTAS_DEBUG is not set | ||
| 645 | # CONFIG_USB_ZD1201 is not set | ||
| 646 | # CONFIG_USB_NET_RNDIS_WLAN is not set | ||
| 647 | # CONFIG_IWLWIFI_LEDS is not set | ||
| 648 | # CONFIG_HOSTAP is not set | ||
| 649 | |||
| 650 | # | ||
| 651 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 652 | # | ||
| 653 | |||
| 654 | # | ||
| 655 | # USB Network Adapters | ||
| 656 | # | ||
| 657 | # CONFIG_USB_CATC is not set | ||
| 658 | # CONFIG_USB_KAWETH is not set | ||
| 659 | # CONFIG_USB_PEGASUS is not set | ||
| 660 | # CONFIG_USB_RTL8150 is not set | ||
| 661 | # CONFIG_USB_USBNET is not set | ||
| 662 | # CONFIG_WAN is not set | ||
| 663 | CONFIG_PPP=m | ||
| 664 | CONFIG_PPP_MULTILINK=y | ||
| 665 | CONFIG_PPP_FILTER=y | ||
| 666 | CONFIG_PPP_ASYNC=m | ||
| 667 | # CONFIG_PPP_SYNC_TTY is not set | ||
| 668 | CONFIG_PPP_DEFLATE=m | ||
| 669 | CONFIG_PPP_BSDCOMP=m | ||
| 670 | # CONFIG_PPP_MPPE is not set | ||
| 671 | # CONFIG_PPPOE is not set | ||
| 672 | # CONFIG_PPPOL2TP is not set | ||
| 673 | # CONFIG_SLIP is not set | ||
| 674 | CONFIG_SLHC=m | ||
| 675 | # CONFIG_NETCONSOLE is not set | ||
| 676 | # CONFIG_NETPOLL is not set | ||
| 677 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 678 | # CONFIG_ISDN is not set | ||
| 679 | |||
| 680 | # | ||
| 681 | # Input device support | ||
| 682 | # | ||
| 683 | CONFIG_INPUT=y | ||
| 684 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 685 | # CONFIG_INPUT_POLLDEV is not set | ||
| 686 | |||
| 687 | # | ||
| 688 | # Userland interfaces | ||
| 689 | # | ||
| 690 | CONFIG_INPUT_MOUSEDEV=y | ||
| 691 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
| 692 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 693 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 694 | # CONFIG_INPUT_JOYDEV is not set | ||
| 695 | CONFIG_INPUT_EVDEV=y | ||
| 696 | # CONFIG_INPUT_EVBUG is not set | ||
| 697 | CONFIG_INPUT_APMPOWER=y | ||
| 698 | |||
| 699 | # | ||
| 700 | # Input Device Drivers | ||
| 701 | # | ||
| 702 | CONFIG_INPUT_KEYBOARD=y | ||
| 703 | CONFIG_KEYBOARD_ATKBD=y | ||
| 704 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 705 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 706 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 707 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 708 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 709 | CONFIG_KEYBOARD_PXA27x=y | ||
| 710 | CONFIG_KEYBOARD_GPIO=y | ||
| 711 | # CONFIG_INPUT_MOUSE is not set | ||
| 712 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 713 | # CONFIG_INPUT_TABLET is not set | ||
| 714 | CONFIG_INPUT_TOUCHSCREEN=y | ||
| 715 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
| 716 | # CONFIG_TOUCHSCREEN_DA9034 is not set | ||
| 717 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
| 718 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 719 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
| 720 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
| 721 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
| 722 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
| 723 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 724 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
| 725 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
| 726 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
| 727 | CONFIG_TOUCHSCREEN_WM97XX=m | ||
| 728 | # CONFIG_TOUCHSCREEN_WM9705 is not set | ||
| 729 | CONFIG_TOUCHSCREEN_WM9712=y | ||
| 730 | # CONFIG_TOUCHSCREEN_WM9713 is not set | ||
| 731 | # CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set | ||
| 732 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 733 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
| 734 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
| 735 | # CONFIG_INPUT_MISC is not set | ||
| 736 | |||
| 737 | # | ||
| 738 | # Hardware I/O ports | ||
| 739 | # | ||
| 740 | CONFIG_SERIO=y | ||
| 741 | # CONFIG_SERIO_SERPORT is not set | ||
| 742 | CONFIG_SERIO_LIBPS2=y | ||
| 743 | # CONFIG_SERIO_RAW is not set | ||
| 744 | # CONFIG_GAMEPORT is not set | ||
| 745 | |||
| 746 | # | ||
| 747 | # Character devices | ||
| 748 | # | ||
| 749 | CONFIG_VT=y | ||
| 750 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 751 | CONFIG_VT_CONSOLE=y | ||
| 752 | CONFIG_HW_CONSOLE=y | ||
| 753 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 754 | CONFIG_DEVKMEM=y | ||
| 755 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 756 | |||
| 757 | # | ||
| 758 | # Serial drivers | ||
| 759 | # | ||
| 760 | # CONFIG_SERIAL_8250 is not set | ||
| 761 | |||
| 762 | # | ||
| 763 | # Non-8250 serial port support | ||
| 764 | # | ||
| 765 | CONFIG_SERIAL_PXA=y | ||
| 766 | CONFIG_SERIAL_PXA_CONSOLE=y | ||
| 767 | CONFIG_SERIAL_CORE=y | ||
| 768 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 769 | CONFIG_UNIX98_PTYS=y | ||
| 770 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 771 | CONFIG_LEGACY_PTYS=y | ||
| 772 | CONFIG_LEGACY_PTY_COUNT=16 | ||
| 773 | # CONFIG_IPMI_HANDLER is not set | ||
| 774 | # CONFIG_HW_RANDOM is not set | ||
| 775 | # CONFIG_NVRAM is not set | ||
| 776 | # CONFIG_R3964 is not set | ||
| 777 | # CONFIG_RAW_DRIVER is not set | ||
| 778 | # CONFIG_TCG_TPM is not set | ||
| 779 | CONFIG_I2C=y | ||
| 780 | CONFIG_I2C_BOARDINFO=y | ||
| 781 | CONFIG_I2C_CHARDEV=m | ||
| 782 | CONFIG_I2C_HELPER_AUTO=y | ||
| 783 | |||
| 784 | # | ||
| 785 | # I2C Hardware Bus support | ||
| 786 | # | ||
| 787 | |||
| 788 | # | ||
| 789 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 790 | # | ||
| 791 | # CONFIG_I2C_GPIO is not set | ||
| 792 | # CONFIG_I2C_OCORES is not set | ||
| 793 | CONFIG_I2C_PXA=y | ||
| 794 | # CONFIG_I2C_PXA_SLAVE is not set | ||
| 795 | # CONFIG_I2C_SIMTEC is not set | ||
| 796 | |||
| 797 | # | ||
| 798 | # External I2C/SMBus adapter drivers | ||
| 799 | # | ||
| 800 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 801 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 802 | # CONFIG_I2C_TINY_USB is not set | ||
| 803 | |||
| 804 | # | ||
| 805 | # Other I2C/SMBus bus drivers | ||
| 806 | # | ||
| 807 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 808 | # CONFIG_I2C_STUB is not set | ||
| 809 | |||
| 810 | # | ||
| 811 | # Miscellaneous I2C Chip support | ||
| 812 | # | ||
| 813 | # CONFIG_DS1682 is not set | ||
| 814 | # CONFIG_EEPROM_AT24 is not set | ||
| 815 | # CONFIG_EEPROM_LEGACY is not set | ||
| 816 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 817 | # CONFIG_PCF8575 is not set | ||
| 818 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 819 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 820 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 821 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 822 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 823 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 824 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 825 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 826 | CONFIG_SPI=y | ||
| 827 | # CONFIG_SPI_DEBUG is not set | ||
| 828 | CONFIG_SPI_MASTER=y | ||
| 829 | |||
| 830 | # | ||
| 831 | # SPI Master Controller Drivers | ||
| 832 | # | ||
| 833 | # CONFIG_SPI_BITBANG is not set | ||
| 834 | # CONFIG_SPI_GPIO is not set | ||
| 835 | CONFIG_SPI_PXA2XX=y | ||
| 836 | |||
| 837 | # | ||
| 838 | # SPI Protocol Masters | ||
| 839 | # | ||
| 840 | # CONFIG_SPI_AT25 is not set | ||
| 841 | # CONFIG_SPI_SPIDEV is not set | ||
| 842 | # CONFIG_SPI_TLE62X0 is not set | ||
| 843 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 844 | CONFIG_GPIOLIB=y | ||
| 845 | # CONFIG_DEBUG_GPIO is not set | ||
| 846 | # CONFIG_GPIO_SYSFS is not set | ||
| 847 | |||
| 848 | # | ||
| 849 | # Memory mapped GPIO expanders: | ||
| 850 | # | ||
| 851 | |||
| 852 | # | ||
| 853 | # I2C GPIO expanders: | ||
| 854 | # | ||
| 855 | # CONFIG_GPIO_MAX732X is not set | ||
| 856 | # CONFIG_GPIO_PCA953X is not set | ||
| 857 | # CONFIG_GPIO_PCF857X is not set | ||
| 858 | |||
| 859 | # | ||
| 860 | # PCI GPIO expanders: | ||
| 861 | # | ||
| 862 | |||
| 863 | # | ||
| 864 | # SPI GPIO expanders: | ||
| 865 | # | ||
| 866 | # CONFIG_GPIO_MAX7301 is not set | ||
| 867 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 868 | # CONFIG_W1 is not set | ||
| 869 | CONFIG_POWER_SUPPLY=y | ||
| 870 | # CONFIG_POWER_SUPPLY_DEBUG is not set | ||
| 871 | # CONFIG_PDA_POWER is not set | ||
| 872 | # CONFIG_APM_POWER is not set | ||
| 873 | # CONFIG_BATTERY_DS2760 is not set | ||
| 874 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 875 | CONFIG_BATTERY_DA9030=y | ||
| 876 | # CONFIG_HWMON is not set | ||
| 877 | # CONFIG_THERMAL is not set | ||
| 878 | # CONFIG_THERMAL_HWMON is not set | ||
| 879 | # CONFIG_WATCHDOG is not set | ||
| 880 | CONFIG_SSB_POSSIBLE=y | ||
| 881 | |||
| 882 | # | ||
| 883 | # Sonics Silicon Backplane | ||
| 884 | # | ||
| 885 | # CONFIG_SSB is not set | ||
| 886 | |||
| 887 | # | ||
| 888 | # Multifunction device drivers | ||
| 889 | # | ||
| 890 | # CONFIG_MFD_CORE is not set | ||
| 891 | # CONFIG_MFD_SM501 is not set | ||
| 892 | # CONFIG_MFD_ASIC3 is not set | ||
| 893 | # CONFIG_HTC_EGPIO is not set | ||
| 894 | # CONFIG_HTC_PASIC3 is not set | ||
| 895 | # CONFIG_UCB1400_CORE is not set | ||
| 896 | # CONFIG_TPS65010 is not set | ||
| 897 | # CONFIG_TWL4030_CORE is not set | ||
| 898 | # CONFIG_MFD_TMIO is not set | ||
| 899 | # CONFIG_MFD_T7L66XB is not set | ||
| 900 | # CONFIG_MFD_TC6387XB is not set | ||
| 901 | # CONFIG_MFD_TC6393XB is not set | ||
| 902 | CONFIG_PMIC_DA903X=y | ||
| 903 | # CONFIG_MFD_WM8400 is not set | ||
| 904 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 905 | # CONFIG_MFD_PCF50633 is not set | ||
| 906 | |||
| 907 | # | ||
| 908 | # Multimedia devices | ||
| 909 | # | ||
| 910 | |||
| 911 | # | ||
| 912 | # Multimedia core support | ||
| 913 | # | ||
| 914 | CONFIG_VIDEO_DEV=m | ||
| 915 | CONFIG_VIDEO_V4L2_COMMON=m | ||
| 916 | # CONFIG_VIDEO_ALLOW_V4L1 is not set | ||
| 917 | CONFIG_VIDEO_V4L1_COMPAT=y | ||
| 918 | # CONFIG_DVB_CORE is not set | ||
| 919 | CONFIG_VIDEO_MEDIA=m | ||
| 920 | |||
| 921 | # | ||
| 922 | # Multimedia drivers | ||
| 923 | # | ||
| 924 | # CONFIG_MEDIA_ATTACH is not set | ||
| 925 | CONFIG_MEDIA_TUNER=m | ||
| 926 | CONFIG_MEDIA_TUNER_CUSTOMIZE=y | ||
| 927 | # CONFIG_MEDIA_TUNER_SIMPLE is not set | ||
| 928 | # CONFIG_MEDIA_TUNER_TDA8290 is not set | ||
| 929 | # CONFIG_MEDIA_TUNER_TDA827X is not set | ||
| 930 | # CONFIG_MEDIA_TUNER_TDA18271 is not set | ||
| 931 | # CONFIG_MEDIA_TUNER_TDA9887 is not set | ||
| 932 | # CONFIG_MEDIA_TUNER_TEA5761 is not set | ||
| 933 | # CONFIG_MEDIA_TUNER_TEA5767 is not set | ||
| 934 | # CONFIG_MEDIA_TUNER_MT20XX is not set | ||
| 935 | # CONFIG_MEDIA_TUNER_MT2060 is not set | ||
| 936 | # CONFIG_MEDIA_TUNER_MT2266 is not set | ||
| 937 | # CONFIG_MEDIA_TUNER_MT2131 is not set | ||
| 938 | # CONFIG_MEDIA_TUNER_QT1010 is not set | ||
| 939 | # CONFIG_MEDIA_TUNER_XC2028 is not set | ||
| 940 | # CONFIG_MEDIA_TUNER_XC5000 is not set | ||
| 941 | # CONFIG_MEDIA_TUNER_MXL5005S is not set | ||
| 942 | # CONFIG_MEDIA_TUNER_MXL5007T is not set | ||
| 943 | CONFIG_VIDEO_V4L2=m | ||
| 944 | CONFIG_VIDEOBUF_GEN=m | ||
| 945 | CONFIG_VIDEOBUF_DMA_SG=m | ||
| 946 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
| 947 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
| 948 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
| 949 | # CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set | ||
| 950 | |||
| 951 | # | ||
| 952 | # Encoders/decoders and other helper chips | ||
| 953 | # | ||
| 954 | |||
| 955 | # | ||
| 956 | # Audio decoders | ||
| 957 | # | ||
| 958 | # CONFIG_VIDEO_TVAUDIO is not set | ||
| 959 | # CONFIG_VIDEO_TDA7432 is not set | ||
| 960 | # CONFIG_VIDEO_TDA9840 is not set | ||
| 961 | # CONFIG_VIDEO_TDA9875 is not set | ||
| 962 | # CONFIG_VIDEO_TEA6415C is not set | ||
| 963 | # CONFIG_VIDEO_TEA6420 is not set | ||
| 964 | # CONFIG_VIDEO_MSP3400 is not set | ||
| 965 | # CONFIG_VIDEO_CS5345 is not set | ||
| 966 | # CONFIG_VIDEO_CS53L32A is not set | ||
| 967 | # CONFIG_VIDEO_M52790 is not set | ||
| 968 | # CONFIG_VIDEO_TLV320AIC23B is not set | ||
| 969 | # CONFIG_VIDEO_WM8775 is not set | ||
| 970 | # CONFIG_VIDEO_WM8739 is not set | ||
| 971 | # CONFIG_VIDEO_VP27SMPX is not set | ||
| 972 | |||
| 973 | # | ||
| 974 | # Video decoders | ||
| 975 | # | ||
| 976 | # CONFIG_VIDEO_OV7670 is not set | ||
| 977 | # CONFIG_VIDEO_TCM825X is not set | ||
| 978 | # CONFIG_VIDEO_SAA711X is not set | ||
| 979 | # CONFIG_VIDEO_SAA717X is not set | ||
| 980 | # CONFIG_VIDEO_TVP514X is not set | ||
| 981 | # CONFIG_VIDEO_TVP5150 is not set | ||
| 982 | |||
| 983 | # | ||
| 984 | # Video and audio decoders | ||
| 985 | # | ||
| 986 | # CONFIG_VIDEO_CX25840 is not set | ||
| 987 | |||
| 988 | # | ||
| 989 | # MPEG video encoders | ||
| 990 | # | ||
| 991 | # CONFIG_VIDEO_CX2341X is not set | ||
| 992 | |||
| 993 | # | ||
| 994 | # Video encoders | ||
| 995 | # | ||
| 996 | # CONFIG_VIDEO_SAA7127 is not set | ||
| 997 | |||
| 998 | # | ||
| 999 | # Video improvement chips | ||
| 1000 | # | ||
| 1001 | # CONFIG_VIDEO_UPD64031A is not set | ||
| 1002 | # CONFIG_VIDEO_UPD64083 is not set | ||
| 1003 | # CONFIG_VIDEO_VIVI is not set | ||
| 1004 | # CONFIG_VIDEO_SAA5246A is not set | ||
| 1005 | # CONFIG_VIDEO_SAA5249 is not set | ||
| 1006 | CONFIG_SOC_CAMERA=m | ||
| 1007 | # CONFIG_SOC_CAMERA_MT9M001 is not set | ||
| 1008 | CONFIG_SOC_CAMERA_MT9M111=m | ||
| 1009 | # CONFIG_SOC_CAMERA_MT9T031 is not set | ||
| 1010 | # CONFIG_SOC_CAMERA_MT9V022 is not set | ||
| 1011 | # CONFIG_SOC_CAMERA_TW9910 is not set | ||
| 1012 | # CONFIG_SOC_CAMERA_PLATFORM is not set | ||
| 1013 | # CONFIG_SOC_CAMERA_OV772X is not set | ||
| 1014 | CONFIG_VIDEO_PXA27x=m | ||
| 1015 | # CONFIG_VIDEO_SH_MOBILE_CEU is not set | ||
| 1016 | # CONFIG_V4L_USB_DRIVERS is not set | ||
| 1017 | # CONFIG_RADIO_ADAPTERS is not set | ||
| 1018 | # CONFIG_DAB is not set | ||
| 1019 | |||
| 1020 | # | ||
| 1021 | # Graphics support | ||
| 1022 | # | ||
| 1023 | # CONFIG_VGASTATE is not set | ||
| 1024 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 1025 | CONFIG_FB=y | ||
| 1026 | # CONFIG_FIRMWARE_EDID is not set | ||
| 1027 | # CONFIG_FB_DDC is not set | ||
| 1028 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 1029 | CONFIG_FB_CFB_FILLRECT=y | ||
| 1030 | CONFIG_FB_CFB_COPYAREA=y | ||
| 1031 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 1032 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 1033 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 1034 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 1035 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 1036 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 1037 | # CONFIG_FB_SYS_FOPS is not set | ||
| 1038 | # CONFIG_FB_SVGALIB is not set | ||
| 1039 | # CONFIG_FB_MACMODES is not set | ||
| 1040 | # CONFIG_FB_BACKLIGHT is not set | ||
| 1041 | # CONFIG_FB_MODE_HELPERS is not set | ||
| 1042 | # CONFIG_FB_TILEBLITTING is not set | ||
| 1043 | |||
| 1044 | # | ||
| 1045 | # Frame buffer hardware drivers | ||
| 1046 | # | ||
| 1047 | # CONFIG_FB_S1D13XXX is not set | ||
| 1048 | CONFIG_FB_PXA=y | ||
| 1049 | # CONFIG_FB_PXA_OVERLAY is not set | ||
| 1050 | # CONFIG_FB_PXA_SMARTPANEL is not set | ||
| 1051 | CONFIG_FB_PXA_PARAMETERS=y | ||
| 1052 | CONFIG_FB_MBX=m | ||
| 1053 | # CONFIG_FB_MBX_DEBUG is not set | ||
| 1054 | # CONFIG_FB_W100 is not set | ||
| 1055 | # CONFIG_FB_VIRTUAL is not set | ||
| 1056 | # CONFIG_FB_METRONOME is not set | ||
| 1057 | # CONFIG_FB_MB862XX is not set | ||
| 1058 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
| 1059 | CONFIG_LCD_CLASS_DEVICE=y | ||
| 1060 | # CONFIG_LCD_LTV350QV is not set | ||
| 1061 | # CONFIG_LCD_ILI9320 is not set | ||
| 1062 | CONFIG_LCD_TDO24M=y | ||
| 1063 | # CONFIG_LCD_VGG2432A4 is not set | ||
| 1064 | # CONFIG_LCD_PLATFORM is not set | ||
| 1065 | CONFIG_BACKLIGHT_CLASS_DEVICE=m | ||
| 1066 | # CONFIG_BACKLIGHT_GENERIC is not set | ||
| 1067 | CONFIG_BACKLIGHT_DA903X=m | ||
| 1068 | |||
| 1069 | # | ||
| 1070 | # Display device support | ||
| 1071 | # | ||
| 1072 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 1073 | |||
| 1074 | # | ||
| 1075 | # Console display driver support | ||
| 1076 | # | ||
| 1077 | # CONFIG_VGA_CONSOLE is not set | ||
| 1078 | CONFIG_DUMMY_CONSOLE=y | ||
| 1079 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 1080 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 1081 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
| 1082 | # CONFIG_FONTS is not set | ||
| 1083 | CONFIG_FONT_8x8=y | ||
| 1084 | CONFIG_FONT_8x16=y | ||
| 1085 | CONFIG_LOGO=y | ||
| 1086 | CONFIG_LOGO_LINUX_MONO=y | ||
| 1087 | CONFIG_LOGO_LINUX_VGA16=y | ||
| 1088 | CONFIG_LOGO_LINUX_CLUT224=y | ||
| 1089 | CONFIG_SOUND=m | ||
| 1090 | CONFIG_SOUND_OSS_CORE=y | ||
| 1091 | CONFIG_SND=m | ||
| 1092 | CONFIG_SND_TIMER=m | ||
| 1093 | CONFIG_SND_PCM=m | ||
| 1094 | # CONFIG_SND_SEQUENCER is not set | ||
| 1095 | CONFIG_SND_OSSEMUL=y | ||
| 1096 | CONFIG_SND_MIXER_OSS=m | ||
| 1097 | CONFIG_SND_PCM_OSS=m | ||
| 1098 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
| 1099 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
| 1100 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 1101 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 1102 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
| 1103 | # CONFIG_SND_DEBUG is not set | ||
| 1104 | CONFIG_SND_VMASTER=y | ||
| 1105 | CONFIG_SND_AC97_CODEC=m | ||
| 1106 | # CONFIG_SND_DRIVERS is not set | ||
| 1107 | CONFIG_SND_ARM=y | ||
| 1108 | CONFIG_SND_PXA2XX_LIB=m | ||
| 1109 | CONFIG_SND_PXA2XX_LIB_AC97=y | ||
| 1110 | # CONFIG_SND_PXA2XX_AC97 is not set | ||
| 1111 | # CONFIG_SND_SPI is not set | ||
| 1112 | # CONFIG_SND_USB is not set | ||
| 1113 | CONFIG_SND_SOC=m | ||
| 1114 | CONFIG_SND_SOC_AC97_BUS=y | ||
| 1115 | CONFIG_SND_PXA2XX_SOC=m | ||
| 1116 | CONFIG_SND_PXA2XX_SOC_AC97=m | ||
| 1117 | CONFIG_SND_PXA2XX_SOC_EM_X270=m | ||
| 1118 | CONFIG_SND_SOC_I2C_AND_SPI=m | ||
| 1119 | # CONFIG_SND_SOC_ALL_CODECS is not set | ||
| 1120 | CONFIG_SND_SOC_WM9712=m | ||
| 1121 | # CONFIG_SOUND_PRIME is not set | ||
| 1122 | CONFIG_AC97_BUS=m | ||
| 1123 | CONFIG_HID_SUPPORT=y | ||
| 1124 | CONFIG_HID=y | ||
| 1125 | CONFIG_HID_DEBUG=y | ||
| 1126 | # CONFIG_HIDRAW is not set | ||
| 1127 | |||
| 1128 | # | ||
| 1129 | # USB Input Devices | ||
| 1130 | # | ||
| 1131 | CONFIG_USB_HID=y | ||
| 1132 | # CONFIG_HID_PID is not set | ||
| 1133 | # CONFIG_USB_HIDDEV is not set | ||
| 1134 | |||
| 1135 | # | ||
| 1136 | # Special HID drivers | ||
| 1137 | # | ||
| 1138 | CONFIG_HID_COMPAT=y | ||
| 1139 | CONFIG_HID_A4TECH=y | ||
| 1140 | CONFIG_HID_APPLE=y | ||
| 1141 | CONFIG_HID_BELKIN=y | ||
| 1142 | CONFIG_HID_CHERRY=y | ||
| 1143 | CONFIG_HID_CHICONY=y | ||
| 1144 | CONFIG_HID_CYPRESS=y | ||
| 1145 | CONFIG_HID_EZKEY=y | ||
| 1146 | CONFIG_HID_GYRATION=y | ||
| 1147 | CONFIG_HID_LOGITECH=y | ||
| 1148 | # CONFIG_LOGITECH_FF is not set | ||
| 1149 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
| 1150 | CONFIG_HID_MICROSOFT=y | ||
| 1151 | CONFIG_HID_MONTEREY=y | ||
| 1152 | # CONFIG_HID_NTRIG is not set | ||
| 1153 | CONFIG_HID_PANTHERLORD=y | ||
| 1154 | # CONFIG_PANTHERLORD_FF is not set | ||
| 1155 | CONFIG_HID_PETALYNX=y | ||
| 1156 | CONFIG_HID_SAMSUNG=y | ||
| 1157 | CONFIG_HID_SONY=y | ||
| 1158 | CONFIG_HID_SUNPLUS=y | ||
| 1159 | # CONFIG_GREENASIA_FF is not set | ||
| 1160 | # CONFIG_HID_TOPSEED is not set | ||
| 1161 | # CONFIG_THRUSTMASTER_FF is not set | ||
| 1162 | # CONFIG_ZEROPLUS_FF is not set | ||
| 1163 | CONFIG_USB_SUPPORT=y | ||
| 1164 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 1165 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 1166 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 1167 | CONFIG_USB=y | ||
| 1168 | # CONFIG_USB_DEBUG is not set | ||
| 1169 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
| 1170 | |||
| 1171 | # | ||
| 1172 | # Miscellaneous USB options | ||
| 1173 | # | ||
| 1174 | CONFIG_USB_DEVICEFS=y | ||
| 1175 | # CONFIG_USB_DEVICE_CLASS is not set | ||
| 1176 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 1177 | # CONFIG_USB_SUSPEND is not set | ||
| 1178 | # CONFIG_USB_OTG is not set | ||
| 1179 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 1180 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 1181 | CONFIG_USB_MON=y | ||
| 1182 | # CONFIG_USB_WUSB is not set | ||
| 1183 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 1184 | |||
| 1185 | # | ||
| 1186 | # USB Host Controller Drivers | ||
| 1187 | # | ||
| 1188 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1189 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1190 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 1191 | CONFIG_USB_OHCI_HCD=y | ||
| 1192 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
| 1193 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
| 1194 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
| 1195 | # CONFIG_USB_SL811_HCD is not set | ||
| 1196 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 1197 | # CONFIG_USB_HWA_HCD is not set | ||
| 1198 | # CONFIG_USB_MUSB_HDRC is not set | ||
| 1199 | |||
| 1200 | # | ||
| 1201 | # USB Device Class drivers | ||
| 1202 | # | ||
| 1203 | # CONFIG_USB_ACM is not set | ||
| 1204 | # CONFIG_USB_PRINTER is not set | ||
| 1205 | # CONFIG_USB_WDM is not set | ||
| 1206 | # CONFIG_USB_TMC is not set | ||
| 1207 | |||
| 1208 | # | ||
| 1209 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | ||
| 1210 | # | ||
| 1211 | |||
| 1212 | # | ||
| 1213 | # see USB_STORAGE Help for more information | ||
| 1214 | # | ||
| 1215 | CONFIG_USB_STORAGE=y | ||
| 1216 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 1217 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 1218 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 1219 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 1220 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 1221 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 1222 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 1223 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 1224 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 1225 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 1226 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 1227 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 1228 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1229 | |||
| 1230 | # | ||
| 1231 | # USB Imaging devices | ||
| 1232 | # | ||
| 1233 | # CONFIG_USB_MDC800 is not set | ||
| 1234 | # CONFIG_USB_MICROTEK is not set | ||
| 1235 | |||
| 1236 | # | ||
| 1237 | # USB port drivers | ||
| 1238 | # | ||
| 1239 | # CONFIG_USB_SERIAL is not set | ||
| 1240 | |||
| 1241 | # | ||
| 1242 | # USB Miscellaneous drivers | ||
| 1243 | # | ||
| 1244 | # CONFIG_USB_EMI62 is not set | ||
| 1245 | # CONFIG_USB_EMI26 is not set | ||
| 1246 | # CONFIG_USB_ADUTUX is not set | ||
| 1247 | # CONFIG_USB_SEVSEG is not set | ||
| 1248 | # CONFIG_USB_RIO500 is not set | ||
| 1249 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1250 | # CONFIG_USB_LCD is not set | ||
| 1251 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1252 | # CONFIG_USB_LED is not set | ||
| 1253 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1254 | # CONFIG_USB_CYTHERM is not set | ||
| 1255 | # CONFIG_USB_PHIDGET is not set | ||
| 1256 | # CONFIG_USB_IDMOUSE is not set | ||
| 1257 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1258 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1259 | # CONFIG_USB_LD is not set | ||
| 1260 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1261 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1262 | # CONFIG_USB_TEST is not set | ||
| 1263 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1264 | # CONFIG_USB_VST is not set | ||
| 1265 | # CONFIG_USB_GADGET is not set | ||
| 1266 | |||
| 1267 | # | ||
| 1268 | # OTG and related infrastructure | ||
| 1269 | # | ||
| 1270 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1271 | CONFIG_MMC=m | ||
| 1272 | # CONFIG_MMC_DEBUG is not set | ||
| 1273 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
| 1274 | |||
| 1275 | # | ||
| 1276 | # MMC/SD/SDIO Card Drivers | ||
| 1277 | # | ||
| 1278 | CONFIG_MMC_BLOCK=m | ||
| 1279 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 1280 | # CONFIG_SDIO_UART is not set | ||
| 1281 | # CONFIG_MMC_TEST is not set | ||
| 1282 | |||
| 1283 | # | ||
| 1284 | # MMC/SD/SDIO Host Controller Drivers | ||
| 1285 | # | ||
| 1286 | CONFIG_MMC_PXA=m | ||
| 1287 | # CONFIG_MMC_SDHCI is not set | ||
| 1288 | # CONFIG_MMC_SPI is not set | ||
| 1289 | # CONFIG_MEMSTICK is not set | ||
| 1290 | # CONFIG_ACCESSIBILITY is not set | ||
| 1291 | CONFIG_NEW_LEDS=y | ||
| 1292 | CONFIG_LEDS_CLASS=y | ||
| 1293 | |||
| 1294 | # | ||
| 1295 | # LED drivers | ||
| 1296 | # | ||
| 1297 | # CONFIG_LEDS_PCA9532 is not set | ||
| 1298 | # CONFIG_LEDS_GPIO is not set | ||
| 1299 | # CONFIG_LEDS_PCA955X is not set | ||
| 1300 | CONFIG_LEDS_DA903X=y | ||
| 1301 | |||
| 1302 | # | ||
| 1303 | # LED Triggers | ||
| 1304 | # | ||
| 1305 | CONFIG_LEDS_TRIGGERS=y | ||
| 1306 | # CONFIG_LEDS_TRIGGER_TIMER is not set | ||
| 1307 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
| 1308 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | ||
| 1309 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | ||
| 1310 | CONFIG_RTC_LIB=y | ||
| 1311 | CONFIG_RTC_CLASS=y | ||
| 1312 | CONFIG_RTC_HCTOSYS=y | ||
| 1313 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 1314 | # CONFIG_RTC_DEBUG is not set | ||
| 1315 | |||
| 1316 | # | ||
| 1317 | # RTC interfaces | ||
| 1318 | # | ||
| 1319 | CONFIG_RTC_INTF_SYSFS=y | ||
| 1320 | CONFIG_RTC_INTF_PROC=y | ||
| 1321 | CONFIG_RTC_INTF_DEV=y | ||
| 1322 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 1323 | # CONFIG_RTC_DRV_TEST is not set | ||
| 1324 | |||
| 1325 | # | ||
| 1326 | # I2C RTC drivers | ||
| 1327 | # | ||
| 1328 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 1329 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 1330 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 1331 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 1332 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 1333 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 1334 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 1335 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 1336 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 1337 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 1338 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 1339 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1340 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 1341 | |||
| 1342 | # | ||
| 1343 | # SPI RTC drivers | ||
| 1344 | # | ||
| 1345 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 1346 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 1347 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 1348 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 1349 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 1350 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 1351 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 1352 | |||
| 1353 | # | ||
| 1354 | # Platform RTC drivers | ||
| 1355 | # | ||
| 1356 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 1357 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 1358 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 1359 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 1360 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 1361 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 1362 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 1363 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 1364 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 1365 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 1366 | CONFIG_RTC_DRV_V3020=y | ||
| 1367 | |||
| 1368 | # | ||
| 1369 | # on-CPU RTC drivers | ||
| 1370 | # | ||
| 1371 | CONFIG_RTC_DRV_SA1100=y | ||
| 1372 | # CONFIG_RTC_DRV_PXA is not set | ||
| 1373 | # CONFIG_DMADEVICES is not set | ||
| 1374 | CONFIG_REGULATOR=y | ||
| 1375 | # CONFIG_REGULATOR_DEBUG is not set | ||
| 1376 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 1377 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 1378 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 1379 | CONFIG_REGULATOR_DA903X=y | ||
| 1380 | # CONFIG_UIO is not set | ||
| 1381 | # CONFIG_STAGING is not set | ||
| 1382 | |||
| 1383 | # | ||
| 1384 | # File systems | ||
| 1385 | # | ||
| 1386 | CONFIG_EXT2_FS=y | ||
| 1387 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 1388 | # CONFIG_EXT2_FS_XIP is not set | ||
| 1389 | CONFIG_EXT3_FS=y | ||
| 1390 | CONFIG_EXT3_FS_XATTR=y | ||
| 1391 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
| 1392 | # CONFIG_EXT3_FS_SECURITY is not set | ||
| 1393 | # CONFIG_EXT4_FS is not set | ||
| 1394 | CONFIG_JBD=y | ||
| 1395 | # CONFIG_JBD_DEBUG is not set | ||
| 1396 | CONFIG_FS_MBCACHE=y | ||
| 1397 | # CONFIG_REISERFS_FS is not set | ||
| 1398 | # CONFIG_JFS_FS is not set | ||
| 1399 | # CONFIG_FS_POSIX_ACL is not set | ||
| 1400 | CONFIG_FILE_LOCKING=y | ||
| 1401 | # CONFIG_XFS_FS is not set | ||
| 1402 | # CONFIG_OCFS2_FS is not set | ||
| 1403 | # CONFIG_BTRFS_FS is not set | ||
| 1404 | CONFIG_DNOTIFY=y | ||
| 1405 | CONFIG_INOTIFY=y | ||
| 1406 | CONFIG_INOTIFY_USER=y | ||
| 1407 | # CONFIG_QUOTA is not set | ||
| 1408 | # CONFIG_AUTOFS_FS is not set | ||
| 1409 | # CONFIG_AUTOFS4_FS is not set | ||
| 1410 | # CONFIG_FUSE_FS is not set | ||
| 1411 | |||
| 1412 | # | ||
| 1413 | # CD-ROM/DVD Filesystems | ||
| 1414 | # | ||
| 1415 | # CONFIG_ISO9660_FS is not set | ||
| 1416 | # CONFIG_UDF_FS is not set | ||
| 1417 | |||
| 1418 | # | ||
| 1419 | # DOS/FAT/NT Filesystems | ||
| 1420 | # | ||
| 1421 | CONFIG_FAT_FS=m | ||
| 1422 | # CONFIG_MSDOS_FS is not set | ||
| 1423 | CONFIG_VFAT_FS=m | ||
| 1424 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1425 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1426 | # CONFIG_NTFS_FS is not set | ||
| 1427 | |||
| 1428 | # | ||
| 1429 | # Pseudo filesystems | ||
| 1430 | # | ||
| 1431 | CONFIG_PROC_FS=y | ||
| 1432 | CONFIG_PROC_SYSCTL=y | ||
| 1433 | # CONFIG_PROC_PAGE_MONITOR is not set | ||
| 1434 | CONFIG_SYSFS=y | ||
| 1435 | CONFIG_TMPFS=y | ||
| 1436 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1437 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1438 | # CONFIG_CONFIGFS_FS is not set | ||
| 1439 | CONFIG_MISC_FILESYSTEMS=y | ||
| 1440 | # CONFIG_ADFS_FS is not set | ||
| 1441 | # CONFIG_AFFS_FS is not set | ||
| 1442 | # CONFIG_HFS_FS is not set | ||
| 1443 | # CONFIG_HFSPLUS_FS is not set | ||
| 1444 | # CONFIG_BEFS_FS is not set | ||
| 1445 | # CONFIG_BFS_FS is not set | ||
| 1446 | # CONFIG_EFS_FS is not set | ||
| 1447 | CONFIG_JFFS2_FS=y | ||
| 1448 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 1449 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 1450 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 1451 | CONFIG_JFFS2_SUMMARY=y | ||
| 1452 | # CONFIG_JFFS2_FS_XATTR is not set | ||
| 1453 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
| 1454 | CONFIG_JFFS2_ZLIB=y | ||
| 1455 | # CONFIG_JFFS2_LZO is not set | ||
| 1456 | CONFIG_JFFS2_RTIME=y | ||
| 1457 | # CONFIG_JFFS2_RUBIN is not set | ||
| 1458 | # CONFIG_CRAMFS is not set | ||
| 1459 | # CONFIG_SQUASHFS is not set | ||
| 1460 | # CONFIG_VXFS_FS is not set | ||
| 1461 | # CONFIG_MINIX_FS is not set | ||
| 1462 | # CONFIG_OMFS_FS is not set | ||
| 1463 | # CONFIG_HPFS_FS is not set | ||
| 1464 | # CONFIG_QNX4FS_FS is not set | ||
| 1465 | # CONFIG_ROMFS_FS is not set | ||
| 1466 | # CONFIG_SYSV_FS is not set | ||
| 1467 | # CONFIG_UFS_FS is not set | ||
| 1468 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1469 | CONFIG_NFS_FS=y | ||
| 1470 | CONFIG_NFS_V3=y | ||
| 1471 | # CONFIG_NFS_V3_ACL is not set | ||
| 1472 | # CONFIG_NFS_V4 is not set | ||
| 1473 | CONFIG_ROOT_NFS=y | ||
| 1474 | # CONFIG_NFSD is not set | ||
| 1475 | CONFIG_LOCKD=y | ||
| 1476 | CONFIG_LOCKD_V4=y | ||
| 1477 | CONFIG_NFS_COMMON=y | ||
| 1478 | CONFIG_SUNRPC=y | ||
| 1479 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
| 1480 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
| 1481 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1482 | # CONFIG_SMB_FS is not set | ||
| 1483 | CONFIG_CIFS=m | ||
| 1484 | # CONFIG_CIFS_STATS is not set | ||
| 1485 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
| 1486 | # CONFIG_CIFS_XATTR is not set | ||
| 1487 | # CONFIG_CIFS_DEBUG2 is not set | ||
| 1488 | # CONFIG_CIFS_EXPERIMENTAL is not set | ||
| 1489 | # CONFIG_NCP_FS is not set | ||
| 1490 | # CONFIG_CODA_FS is not set | ||
| 1491 | # CONFIG_AFS_FS is not set | ||
| 1492 | |||
| 1493 | # | ||
| 1494 | # Partition Types | ||
| 1495 | # | ||
| 1496 | CONFIG_PARTITION_ADVANCED=y | ||
| 1497 | # CONFIG_ACORN_PARTITION is not set | ||
| 1498 | # CONFIG_OSF_PARTITION is not set | ||
| 1499 | # CONFIG_AMIGA_PARTITION is not set | ||
| 1500 | # CONFIG_ATARI_PARTITION is not set | ||
| 1501 | # CONFIG_MAC_PARTITION is not set | ||
| 1502 | CONFIG_MSDOS_PARTITION=y | ||
| 1503 | # CONFIG_BSD_DISKLABEL is not set | ||
| 1504 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 1505 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 1506 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 1507 | # CONFIG_LDM_PARTITION is not set | ||
| 1508 | # CONFIG_SGI_PARTITION is not set | ||
| 1509 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 1510 | # CONFIG_SUN_PARTITION is not set | ||
| 1511 | # CONFIG_KARMA_PARTITION is not set | ||
| 1512 | # CONFIG_EFI_PARTITION is not set | ||
| 1513 | # CONFIG_SYSV68_PARTITION is not set | ||
| 1514 | CONFIG_NLS=m | ||
| 1515 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1516 | CONFIG_NLS_CODEPAGE_437=m | ||
| 1517 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1518 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1519 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 1520 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1521 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1522 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1523 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1524 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1525 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1526 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1527 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1528 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1529 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1530 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1531 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1532 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1533 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1534 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1535 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1536 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1537 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1538 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1539 | # CONFIG_NLS_ASCII is not set | ||
| 1540 | CONFIG_NLS_ISO8859_1=m | ||
| 1541 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1542 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1543 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1544 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1545 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1546 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1547 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1548 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1549 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1550 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1551 | # CONFIG_NLS_KOI8_R is not set | ||
| 1552 | # CONFIG_NLS_KOI8_U is not set | ||
| 1553 | CONFIG_NLS_UTF8=m | ||
| 1554 | # CONFIG_DLM is not set | ||
| 1555 | |||
| 1556 | # | ||
| 1557 | # Kernel hacking | ||
| 1558 | # | ||
| 1559 | # CONFIG_PRINTK_TIME is not set | ||
| 1560 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1561 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1562 | CONFIG_FRAME_WARN=0 | ||
| 1563 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 1564 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1565 | CONFIG_DEBUG_FS=y | ||
| 1566 | # CONFIG_HEADERS_CHECK is not set | ||
| 1567 | CONFIG_DEBUG_KERNEL=y | ||
| 1568 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1569 | # CONFIG_DETECT_SOFTLOCKUP is not set | ||
| 1570 | # CONFIG_SCHED_DEBUG is not set | ||
| 1571 | # CONFIG_SCHEDSTATS is not set | ||
| 1572 | # CONFIG_TIMER_STATS is not set | ||
| 1573 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1574 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1575 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1576 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1577 | # CONFIG_DEBUG_MUTEXES is not set | ||
| 1578 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1579 | # CONFIG_PROVE_LOCKING is not set | ||
| 1580 | # CONFIG_LOCK_STAT is not set | ||
| 1581 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1582 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1583 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1584 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 1585 | # CONFIG_DEBUG_INFO is not set | ||
| 1586 | # CONFIG_DEBUG_VM is not set | ||
| 1587 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1588 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1589 | # CONFIG_DEBUG_LIST is not set | ||
| 1590 | # CONFIG_DEBUG_SG is not set | ||
| 1591 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1592 | CONFIG_FRAME_POINTER=y | ||
| 1593 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1594 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1595 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1596 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1597 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1598 | # CONFIG_FAULT_INJECTION is not set | ||
| 1599 | # CONFIG_LATENCYTOP is not set | ||
| 1600 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 1601 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1602 | |||
| 1603 | # | ||
| 1604 | # Tracers | ||
| 1605 | # | ||
| 1606 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1607 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1608 | # CONFIG_SCHED_TRACER is not set | ||
| 1609 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 1610 | # CONFIG_BOOT_TRACER is not set | ||
| 1611 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
| 1612 | # CONFIG_STACK_TRACER is not set | ||
| 1613 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
| 1614 | # CONFIG_SAMPLES is not set | ||
| 1615 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1616 | # CONFIG_KGDB is not set | ||
| 1617 | CONFIG_DEBUG_USER=y | ||
| 1618 | CONFIG_DEBUG_ERRORS=y | ||
| 1619 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1620 | CONFIG_DEBUG_LL=y | ||
| 1621 | # CONFIG_DEBUG_ICEDCC is not set | ||
| 1622 | |||
| 1623 | # | ||
| 1624 | # Security options | ||
| 1625 | # | ||
| 1626 | # CONFIG_KEYS is not set | ||
| 1627 | # CONFIG_SECURITY is not set | ||
| 1628 | # CONFIG_SECURITYFS is not set | ||
| 1629 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1630 | CONFIG_CRYPTO=y | ||
| 1631 | |||
| 1632 | # | ||
| 1633 | # Crypto core or helper | ||
| 1634 | # | ||
| 1635 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1636 | CONFIG_CRYPTO_ALGAPI=m | ||
| 1637 | CONFIG_CRYPTO_ALGAPI2=m | ||
| 1638 | CONFIG_CRYPTO_AEAD2=m | ||
| 1639 | CONFIG_CRYPTO_BLKCIPHER=m | ||
| 1640 | CONFIG_CRYPTO_BLKCIPHER2=m | ||
| 1641 | CONFIG_CRYPTO_HASH=m | ||
| 1642 | CONFIG_CRYPTO_HASH2=m | ||
| 1643 | CONFIG_CRYPTO_RNG2=m | ||
| 1644 | CONFIG_CRYPTO_MANAGER=m | ||
| 1645 | CONFIG_CRYPTO_MANAGER2=m | ||
| 1646 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1647 | # CONFIG_CRYPTO_NULL is not set | ||
| 1648 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1649 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1650 | # CONFIG_CRYPTO_TEST is not set | ||
| 1651 | |||
| 1652 | # | ||
| 1653 | # Authenticated Encryption with Associated Data | ||
| 1654 | # | ||
| 1655 | # CONFIG_CRYPTO_CCM is not set | ||
| 1656 | # CONFIG_CRYPTO_GCM is not set | ||
| 1657 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1658 | |||
| 1659 | # | ||
| 1660 | # Block modes | ||
| 1661 | # | ||
| 1662 | # CONFIG_CRYPTO_CBC is not set | ||
| 1663 | # CONFIG_CRYPTO_CTR is not set | ||
| 1664 | # CONFIG_CRYPTO_CTS is not set | ||
| 1665 | CONFIG_CRYPTO_ECB=m | ||
| 1666 | # CONFIG_CRYPTO_LRW is not set | ||
| 1667 | # CONFIG_CRYPTO_PCBC is not set | ||
| 1668 | # CONFIG_CRYPTO_XTS is not set | ||
| 1669 | |||
| 1670 | # | ||
| 1671 | # Hash modes | ||
| 1672 | # | ||
| 1673 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1674 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1675 | |||
| 1676 | # | ||
| 1677 | # Digest | ||
| 1678 | # | ||
| 1679 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1680 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1681 | # CONFIG_CRYPTO_MD5 is not set | ||
| 1682 | CONFIG_CRYPTO_MICHAEL_MIC=m | ||
| 1683 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1684 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1685 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1686 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1687 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1688 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1689 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1690 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1691 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1692 | |||
| 1693 | # | ||
| 1694 | # Ciphers | ||
| 1695 | # | ||
| 1696 | CONFIG_CRYPTO_AES=m | ||
| 1697 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1698 | CONFIG_CRYPTO_ARC4=m | ||
| 1699 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1700 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1701 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1702 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1703 | # CONFIG_CRYPTO_DES is not set | ||
| 1704 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1705 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1706 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1707 | # CONFIG_CRYPTO_SEED is not set | ||
| 1708 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1709 | # CONFIG_CRYPTO_TEA is not set | ||
| 1710 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1711 | |||
| 1712 | # | ||
| 1713 | # Compression | ||
| 1714 | # | ||
| 1715 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1716 | # CONFIG_CRYPTO_LZO is not set | ||
| 1717 | |||
| 1718 | # | ||
| 1719 | # Random Number Generation | ||
| 1720 | # | ||
| 1721 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1722 | # CONFIG_CRYPTO_HW is not set | ||
| 1723 | |||
| 1724 | # | ||
| 1725 | # Library routines | ||
| 1726 | # | ||
| 1727 | CONFIG_BITREVERSE=y | ||
| 1728 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1729 | CONFIG_CRC_CCITT=m | ||
| 1730 | # CONFIG_CRC16 is not set | ||
| 1731 | # CONFIG_CRC_T10DIF is not set | ||
| 1732 | # CONFIG_CRC_ITU_T is not set | ||
| 1733 | CONFIG_CRC32=y | ||
| 1734 | # CONFIG_CRC7 is not set | ||
| 1735 | # CONFIG_LIBCRC32C is not set | ||
| 1736 | CONFIG_ZLIB_INFLATE=y | ||
| 1737 | CONFIG_ZLIB_DEFLATE=y | ||
| 1738 | CONFIG_PLIST=y | ||
| 1739 | CONFIG_HAS_IOMEM=y | ||
| 1740 | CONFIG_HAS_IOPORT=y | ||
| 1741 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/h3600_defconfig b/arch/arm/configs/h3600_defconfig index 8f986e9f1c62..1502957db2c3 100644 --- a/arch/arm/configs/h3600_defconfig +++ b/arch/arm/configs/h3600_defconfig | |||
| @@ -90,7 +90,6 @@ CONFIG_ARCH_SA1100=y | |||
| 90 | # CONFIG_SA1100_COLLIE is not set | 90 | # CONFIG_SA1100_COLLIE is not set |
| 91 | # CONFIG_SA1100_H3100 is not set | 91 | # CONFIG_SA1100_H3100 is not set |
| 92 | CONFIG_SA1100_H3600=y | 92 | CONFIG_SA1100_H3600=y |
| 93 | # CONFIG_SA1100_H3800 is not set | ||
| 94 | CONFIG_SA1100_H3XXX=y | 93 | CONFIG_SA1100_H3XXX=y |
| 95 | # CONFIG_SA1100_BADGE4 is not set | 94 | # CONFIG_SA1100_BADGE4 is not set |
| 96 | # CONFIG_SA1100_JORNADA720 is not set | 95 | # CONFIG_SA1100_JORNADA720 is not set |
| @@ -100,7 +99,6 @@ CONFIG_SA1100_H3XXX=y | |||
| 100 | # CONFIG_SA1100_SHANNON is not set | 99 | # CONFIG_SA1100_SHANNON is not set |
| 101 | # CONFIG_SA1100_SIMPAD is not set | 100 | # CONFIG_SA1100_SIMPAD is not set |
| 102 | # CONFIG_SA1100_SSP is not set | 101 | # CONFIG_SA1100_SSP is not set |
| 103 | # CONFIG_H3600_SLEEVE is not set | ||
| 104 | 102 | ||
| 105 | # | 103 | # |
| 106 | # Processor Type | 104 | # Processor Type |
diff --git a/arch/arm/configs/hackkit_defconfig b/arch/arm/configs/hackkit_defconfig index 1c8fb89a6730..db0708d5cbea 100644 --- a/arch/arm/configs/hackkit_defconfig +++ b/arch/arm/configs/hackkit_defconfig | |||
| @@ -91,7 +91,6 @@ CONFIG_ARCH_SA1100=y | |||
| 91 | # CONFIG_SA1100_COLLIE is not set | 91 | # CONFIG_SA1100_COLLIE is not set |
| 92 | # CONFIG_SA1100_H3100 is not set | 92 | # CONFIG_SA1100_H3100 is not set |
| 93 | # CONFIG_SA1100_H3600 is not set | 93 | # CONFIG_SA1100_H3600 is not set |
| 94 | # CONFIG_SA1100_H3800 is not set | ||
| 95 | # CONFIG_SA1100_BADGE4 is not set | 94 | # CONFIG_SA1100_BADGE4 is not set |
| 96 | # CONFIG_SA1100_JORNADA720 is not set | 95 | # CONFIG_SA1100_JORNADA720 is not set |
| 97 | CONFIG_SA1100_HACKKIT=y | 96 | CONFIG_SA1100_HACKKIT=y |
diff --git a/arch/arm/configs/jornada720_defconfig b/arch/arm/configs/jornada720_defconfig index 81fadafae02d..f3074e49f2fa 100644 --- a/arch/arm/configs/jornada720_defconfig +++ b/arch/arm/configs/jornada720_defconfig | |||
| @@ -178,7 +178,6 @@ CONFIG_DMABOUNCE=y | |||
| 178 | # CONFIG_SA1100_COLLIE is not set | 178 | # CONFIG_SA1100_COLLIE is not set |
| 179 | # CONFIG_SA1100_H3100 is not set | 179 | # CONFIG_SA1100_H3100 is not set |
| 180 | # CONFIG_SA1100_H3600 is not set | 180 | # CONFIG_SA1100_H3600 is not set |
| 181 | # CONFIG_SA1100_H3800 is not set | ||
| 182 | # CONFIG_SA1100_BADGE4 is not set | 181 | # CONFIG_SA1100_BADGE4 is not set |
| 183 | CONFIG_SA1100_JORNADA720=y | 182 | CONFIG_SA1100_JORNADA720=y |
| 184 | CONFIG_SA1100_JORNADA720_SSP=y | 183 | CONFIG_SA1100_JORNADA720_SSP=y |
diff --git a/arch/arm/configs/lart_defconfig b/arch/arm/configs/lart_defconfig index a1cc34f25602..56ae56899d2e 100644 --- a/arch/arm/configs/lart_defconfig +++ b/arch/arm/configs/lart_defconfig | |||
| @@ -87,7 +87,6 @@ CONFIG_ARCH_SA1100=y | |||
| 87 | # CONFIG_SA1100_COLLIE is not set | 87 | # CONFIG_SA1100_COLLIE is not set |
| 88 | # CONFIG_SA1100_H3100 is not set | 88 | # CONFIG_SA1100_H3100 is not set |
| 89 | # CONFIG_SA1100_H3600 is not set | 89 | # CONFIG_SA1100_H3600 is not set |
| 90 | # CONFIG_SA1100_H3800 is not set | ||
| 91 | # CONFIG_SA1100_BADGE4 is not set | 90 | # CONFIG_SA1100_BADGE4 is not set |
| 92 | # CONFIG_SA1100_JORNADA720 is not set | 91 | # CONFIG_SA1100_JORNADA720 is not set |
| 93 | # CONFIG_SA1100_HACKKIT is not set | 92 | # CONFIG_SA1100_HACKKIT is not set |
diff --git a/arch/arm/configs/magician_defconfig b/arch/arm/configs/magician_defconfig index 73ba62b71063..82428c2f234c 100644 --- a/arch/arm/configs/magician_defconfig +++ b/arch/arm/configs/magician_defconfig | |||
| @@ -1,9 +1,10 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.24-rc6 | 3 | # Linux kernel version: 2.6.29-rc3 |
| 4 | # Sun Dec 30 13:02:54 2007 | 4 | # Fri Jan 30 12:42:03 2009 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_HAVE_PWM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 8 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 9 | CONFIG_GENERIC_GPIO=y |
| 9 | CONFIG_GENERIC_TIME=y | 10 | CONFIG_GENERIC_TIME=y |
| @@ -12,6 +13,7 @@ CONFIG_MMU=y | |||
| 12 | # CONFIG_NO_IOPORT is not set | 13 | # CONFIG_NO_IOPORT is not set |
| 13 | CONFIG_GENERIC_HARDIRQS=y | 14 | CONFIG_GENERIC_HARDIRQS=y |
| 14 | CONFIG_STACKTRACE_SUPPORT=y | 15 | CONFIG_STACKTRACE_SUPPORT=y |
| 16 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 15 | CONFIG_LOCKDEP_SUPPORT=y | 17 | CONFIG_LOCKDEP_SUPPORT=y |
| 16 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | 18 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y |
| 17 | CONFIG_HARDIRQS_SW_RESEND=y | 19 | CONFIG_HARDIRQS_SW_RESEND=y |
| @@ -21,8 +23,8 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y | |||
| 21 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | 23 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set |
| 22 | CONFIG_GENERIC_HWEIGHT=y | 24 | CONFIG_GENERIC_HWEIGHT=y |
| 23 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 25 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 24 | CONFIG_ZONE_DMA=y | ||
| 25 | CONFIG_ARCH_MTD_XIP=y | 26 | CONFIG_ARCH_MTD_XIP=y |
| 27 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 26 | CONFIG_VECTORS_BASE=0xffff0000 | 28 | CONFIG_VECTORS_BASE=0xffff0000 |
| 27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 29 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 28 | 30 | ||
| @@ -41,16 +43,24 @@ CONFIG_SYSVIPC_SYSCTL=y | |||
| 41 | # CONFIG_POSIX_MQUEUE is not set | 43 | # CONFIG_POSIX_MQUEUE is not set |
| 42 | # CONFIG_BSD_PROCESS_ACCT is not set | 44 | # CONFIG_BSD_PROCESS_ACCT is not set |
| 43 | # CONFIG_TASKSTATS is not set | 45 | # CONFIG_TASKSTATS is not set |
| 44 | # CONFIG_USER_NS is not set | ||
| 45 | # CONFIG_PID_NS is not set | ||
| 46 | # CONFIG_AUDIT is not set | 46 | # CONFIG_AUDIT is not set |
| 47 | |||
| 48 | # | ||
| 49 | # RCU Subsystem | ||
| 50 | # | ||
| 51 | CONFIG_CLASSIC_RCU=y | ||
| 52 | # CONFIG_TREE_RCU is not set | ||
| 53 | # CONFIG_PREEMPT_RCU is not set | ||
| 54 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 55 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 47 | CONFIG_IKCONFIG=y | 56 | CONFIG_IKCONFIG=y |
| 48 | CONFIG_IKCONFIG_PROC=y | 57 | CONFIG_IKCONFIG_PROC=y |
| 49 | CONFIG_LOG_BUF_SHIFT=16 | 58 | CONFIG_LOG_BUF_SHIFT=16 |
| 59 | # CONFIG_GROUP_SCHED is not set | ||
| 50 | # CONFIG_CGROUPS is not set | 60 | # CONFIG_CGROUPS is not set |
| 51 | # CONFIG_FAIR_GROUP_SCHED is not set | 61 | # CONFIG_SYSFS_DEPRECATED_V2 is not set |
| 52 | # CONFIG_SYSFS_DEPRECATED is not set | ||
| 53 | # CONFIG_RELAY is not set | 62 | # CONFIG_RELAY is not set |
| 63 | # CONFIG_NAMESPACES is not set | ||
| 54 | CONFIG_BLK_DEV_INITRD=y | 64 | CONFIG_BLK_DEV_INITRD=y |
| 55 | CONFIG_INITRAMFS_SOURCE="" | 65 | CONFIG_INITRAMFS_SOURCE="" |
| 56 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 66 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| @@ -65,31 +75,41 @@ CONFIG_HOTPLUG=y | |||
| 65 | CONFIG_PRINTK=y | 75 | CONFIG_PRINTK=y |
| 66 | CONFIG_BUG=y | 76 | CONFIG_BUG=y |
| 67 | CONFIG_ELF_CORE=y | 77 | CONFIG_ELF_CORE=y |
| 78 | CONFIG_COMPAT_BRK=y | ||
| 68 | CONFIG_BASE_FULL=y | 79 | CONFIG_BASE_FULL=y |
| 69 | CONFIG_FUTEX=y | 80 | CONFIG_FUTEX=y |
| 70 | CONFIG_ANON_INODES=y | 81 | CONFIG_ANON_INODES=y |
| 71 | CONFIG_EPOLL=y | 82 | CONFIG_EPOLL=y |
| 72 | CONFIG_SIGNALFD=y | 83 | CONFIG_SIGNALFD=y |
| 84 | CONFIG_TIMERFD=y | ||
| 73 | CONFIG_EVENTFD=y | 85 | CONFIG_EVENTFD=y |
| 74 | CONFIG_SHMEM=y | 86 | CONFIG_SHMEM=y |
| 87 | CONFIG_AIO=y | ||
| 75 | CONFIG_VM_EVENT_COUNTERS=y | 88 | CONFIG_VM_EVENT_COUNTERS=y |
| 76 | CONFIG_SLAB=y | 89 | CONFIG_SLAB=y |
| 77 | # CONFIG_SLUB is not set | 90 | # CONFIG_SLUB is not set |
| 78 | # CONFIG_SLOB is not set | 91 | # CONFIG_SLOB is not set |
| 92 | # CONFIG_PROFILING is not set | ||
| 93 | CONFIG_HAVE_OPROFILE=y | ||
| 94 | # CONFIG_KPROBES is not set | ||
| 95 | CONFIG_HAVE_KPROBES=y | ||
| 96 | CONFIG_HAVE_KRETPROBES=y | ||
| 97 | CONFIG_HAVE_CLK=y | ||
| 98 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 99 | CONFIG_SLABINFO=y | ||
| 79 | CONFIG_RT_MUTEXES=y | 100 | CONFIG_RT_MUTEXES=y |
| 80 | # CONFIG_TINY_SHMEM is not set | ||
| 81 | CONFIG_BASE_SMALL=0 | 101 | CONFIG_BASE_SMALL=0 |
| 82 | CONFIG_MODULES=y | 102 | CONFIG_MODULES=y |
| 103 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 83 | CONFIG_MODULE_UNLOAD=y | 104 | CONFIG_MODULE_UNLOAD=y |
| 84 | CONFIG_MODULE_FORCE_UNLOAD=y | 105 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
| 85 | # CONFIG_MODVERSIONS is not set | 106 | # CONFIG_MODVERSIONS is not set |
| 86 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 107 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 87 | CONFIG_KMOD=y | ||
| 88 | CONFIG_BLOCK=y | 108 | CONFIG_BLOCK=y |
| 89 | # CONFIG_LBD is not set | 109 | # CONFIG_LBD is not set |
| 90 | # CONFIG_BLK_DEV_IO_TRACE is not set | 110 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 91 | # CONFIG_LSF is not set | ||
| 92 | # CONFIG_BLK_DEV_BSG is not set | 111 | # CONFIG_BLK_DEV_BSG is not set |
| 112 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 93 | 113 | ||
| 94 | # | 114 | # |
| 95 | # IO Schedulers | 115 | # IO Schedulers |
| @@ -103,8 +123,7 @@ CONFIG_IOSCHED_NOOP=y | |||
| 103 | # CONFIG_DEFAULT_CFQ is not set | 123 | # CONFIG_DEFAULT_CFQ is not set |
| 104 | CONFIG_DEFAULT_NOOP=y | 124 | CONFIG_DEFAULT_NOOP=y |
| 105 | CONFIG_DEFAULT_IOSCHED="noop" | 125 | CONFIG_DEFAULT_IOSCHED="noop" |
| 106 | CONFIG_CLASSIC_RCU=y | 126 | CONFIG_FREEZER=y |
| 107 | # CONFIG_PREEMPT_RCU is not set | ||
| 108 | 127 | ||
| 109 | # | 128 | # |
| 110 | # System Type | 129 | # System Type |
| @@ -114,9 +133,7 @@ CONFIG_CLASSIC_RCU=y | |||
| 114 | # CONFIG_ARCH_REALVIEW is not set | 133 | # CONFIG_ARCH_REALVIEW is not set |
| 115 | # CONFIG_ARCH_VERSATILE is not set | 134 | # CONFIG_ARCH_VERSATILE is not set |
| 116 | # CONFIG_ARCH_AT91 is not set | 135 | # CONFIG_ARCH_AT91 is not set |
| 117 | # CONFIG_ARCH_CLPS7500 is not set | ||
| 118 | # CONFIG_ARCH_CLPS711X is not set | 136 | # CONFIG_ARCH_CLPS711X is not set |
| 119 | # CONFIG_ARCH_CO285 is not set | ||
| 120 | # CONFIG_ARCH_EBSA110 is not set | 137 | # CONFIG_ARCH_EBSA110 is not set |
| 121 | # CONFIG_ARCH_EP93XX is not set | 138 | # CONFIG_ARCH_EP93XX is not set |
| 122 | # CONFIG_ARCH_FOOTBRIDGE is not set | 139 | # CONFIG_ARCH_FOOTBRIDGE is not set |
| @@ -130,41 +147,58 @@ CONFIG_CLASSIC_RCU=y | |||
| 130 | # CONFIG_ARCH_IXP2000 is not set | 147 | # CONFIG_ARCH_IXP2000 is not set |
| 131 | # CONFIG_ARCH_IXP4XX is not set | 148 | # CONFIG_ARCH_IXP4XX is not set |
| 132 | # CONFIG_ARCH_L7200 is not set | 149 | # CONFIG_ARCH_L7200 is not set |
| 150 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 133 | # CONFIG_ARCH_KS8695 is not set | 151 | # CONFIG_ARCH_KS8695 is not set |
| 134 | # CONFIG_ARCH_NS9XXX is not set | 152 | # CONFIG_ARCH_NS9XXX is not set |
| 153 | # CONFIG_ARCH_LOKI is not set | ||
| 154 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 135 | # CONFIG_ARCH_MXC is not set | 155 | # CONFIG_ARCH_MXC is not set |
| 156 | # CONFIG_ARCH_ORION5X is not set | ||
| 136 | # CONFIG_ARCH_PNX4008 is not set | 157 | # CONFIG_ARCH_PNX4008 is not set |
| 137 | CONFIG_ARCH_PXA=y | 158 | CONFIG_ARCH_PXA=y |
| 138 | # CONFIG_ARCH_RPC is not set | 159 | # CONFIG_ARCH_RPC is not set |
| 139 | # CONFIG_ARCH_SA1100 is not set | 160 | # CONFIG_ARCH_SA1100 is not set |
| 140 | # CONFIG_ARCH_S3C2410 is not set | 161 | # CONFIG_ARCH_S3C2410 is not set |
| 162 | # CONFIG_ARCH_S3C64XX is not set | ||
| 141 | # CONFIG_ARCH_SHARK is not set | 163 | # CONFIG_ARCH_SHARK is not set |
| 142 | # CONFIG_ARCH_LH7A40X is not set | 164 | # CONFIG_ARCH_LH7A40X is not set |
| 143 | # CONFIG_ARCH_DAVINCI is not set | 165 | # CONFIG_ARCH_DAVINCI is not set |
| 144 | # CONFIG_ARCH_OMAP is not set | 166 | # CONFIG_ARCH_OMAP is not set |
| 167 | # CONFIG_ARCH_MSM is not set | ||
| 168 | # CONFIG_ARCH_W90X900 is not set | ||
| 145 | 169 | ||
| 146 | # | 170 | # |
| 147 | # Intel PXA2xx/PXA3xx Implementations | 171 | # Intel PXA2xx/PXA3xx Implementations |
| 148 | # | 172 | # |
| 173 | # CONFIG_ARCH_GUMSTIX is not set | ||
| 174 | # CONFIG_MACH_INTELMOTE2 is not set | ||
| 149 | # CONFIG_ARCH_LUBBOCK is not set | 175 | # CONFIG_ARCH_LUBBOCK is not set |
| 150 | # CONFIG_MACH_LOGICPD_PXA270 is not set | 176 | # CONFIG_MACH_LOGICPD_PXA270 is not set |
| 151 | # CONFIG_MACH_MAINSTONE is not set | 177 | # CONFIG_MACH_MAINSTONE is not set |
| 178 | # CONFIG_MACH_MP900C is not set | ||
| 152 | # CONFIG_ARCH_PXA_IDP is not set | 179 | # CONFIG_ARCH_PXA_IDP is not set |
| 153 | # CONFIG_PXA_SHARPSL is not set | 180 | # CONFIG_PXA_SHARPSL is not set |
| 154 | # CONFIG_MACH_TRIZEPS4 is not set | 181 | # CONFIG_ARCH_VIPER is not set |
| 182 | # CONFIG_ARCH_PXA_ESERIES is not set | ||
| 183 | # CONFIG_TRIZEPS_PXA is not set | ||
| 184 | # CONFIG_MACH_H5000 is not set | ||
| 155 | # CONFIG_MACH_EM_X270 is not set | 185 | # CONFIG_MACH_EM_X270 is not set |
| 186 | # CONFIG_MACH_COLIBRI is not set | ||
| 156 | # CONFIG_MACH_ZYLONITE is not set | 187 | # CONFIG_MACH_ZYLONITE is not set |
| 188 | # CONFIG_MACH_LITTLETON is not set | ||
| 189 | # CONFIG_MACH_TAVOREVB is not set | ||
| 190 | # CONFIG_MACH_SAAR is not set | ||
| 157 | # CONFIG_MACH_ARMCORE is not set | 191 | # CONFIG_MACH_ARMCORE is not set |
| 192 | # CONFIG_MACH_CM_X300 is not set | ||
| 158 | CONFIG_MACH_MAGICIAN=y | 193 | CONFIG_MACH_MAGICIAN=y |
| 194 | # CONFIG_MACH_MIOA701 is not set | ||
| 195 | # CONFIG_MACH_PCM027 is not set | ||
| 196 | # CONFIG_ARCH_PXA_PALM is not set | ||
| 197 | # CONFIG_PXA_EZX is not set | ||
| 159 | CONFIG_PXA27x=y | 198 | CONFIG_PXA27x=y |
| 160 | 199 | CONFIG_PXA_SSP=y | |
| 161 | # | 200 | CONFIG_PXA_PWM=y |
| 162 | # Boot options | 201 | CONFIG_PXA_HAVE_BOARD_IRQS=y |
| 163 | # | ||
| 164 | |||
| 165 | # | ||
| 166 | # Power management | ||
| 167 | # | ||
| 168 | 202 | ||
| 169 | # | 203 | # |
| 170 | # Processor Type | 204 | # Processor Type |
| @@ -173,6 +207,7 @@ CONFIG_CPU_32=y | |||
| 173 | CONFIG_CPU_XSCALE=y | 207 | CONFIG_CPU_XSCALE=y |
| 174 | CONFIG_CPU_32v5=y | 208 | CONFIG_CPU_32v5=y |
| 175 | CONFIG_CPU_ABRT_EV5T=y | 209 | CONFIG_CPU_ABRT_EV5T=y |
| 210 | CONFIG_CPU_PABRT_NOIFAR=y | ||
| 176 | CONFIG_CPU_CACHE_VIVT=y | 211 | CONFIG_CPU_CACHE_VIVT=y |
| 177 | CONFIG_CPU_TLB_V4WBI=y | 212 | CONFIG_CPU_TLB_V4WBI=y |
| 178 | CONFIG_CPU_CP15=y | 213 | CONFIG_CPU_CP15=y |
| @@ -186,6 +221,7 @@ CONFIG_ARM_THUMB=y | |||
| 186 | # CONFIG_OUTER_CACHE is not set | 221 | # CONFIG_OUTER_CACHE is not set |
| 187 | CONFIG_IWMMXT=y | 222 | CONFIG_IWMMXT=y |
| 188 | CONFIG_XSCALE_PMU=y | 223 | CONFIG_XSCALE_PMU=y |
| 224 | CONFIG_COMMON_CLKDEV=y | ||
| 189 | 225 | ||
| 190 | # | 226 | # |
| 191 | # Bus support | 227 | # Bus support |
| @@ -197,28 +233,33 @@ CONFIG_XSCALE_PMU=y | |||
| 197 | # | 233 | # |
| 198 | # Kernel Features | 234 | # Kernel Features |
| 199 | # | 235 | # |
| 200 | # CONFIG_TICK_ONESHOT is not set | 236 | CONFIG_TICK_ONESHOT=y |
| 201 | # CONFIG_NO_HZ is not set | 237 | CONFIG_NO_HZ=y |
| 202 | # CONFIG_HIGH_RES_TIMERS is not set | 238 | # CONFIG_HIGH_RES_TIMERS is not set |
| 203 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 239 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
| 240 | CONFIG_VMSPLIT_3G=y | ||
| 241 | # CONFIG_VMSPLIT_2G is not set | ||
| 242 | # CONFIG_VMSPLIT_1G is not set | ||
| 243 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 204 | CONFIG_PREEMPT=y | 244 | CONFIG_PREEMPT=y |
| 205 | CONFIG_HZ=100 | 245 | CONFIG_HZ=100 |
| 206 | CONFIG_AEABI=y | 246 | CONFIG_AEABI=y |
| 207 | CONFIG_OABI_COMPAT=y | 247 | CONFIG_OABI_COMPAT=y |
| 208 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | 248 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y |
| 249 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 250 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 209 | CONFIG_SELECT_MEMORY_MODEL=y | 251 | CONFIG_SELECT_MEMORY_MODEL=y |
| 210 | CONFIG_FLATMEM_MANUAL=y | 252 | CONFIG_FLATMEM_MANUAL=y |
| 211 | # CONFIG_DISCONTIGMEM_MANUAL is not set | 253 | # CONFIG_DISCONTIGMEM_MANUAL is not set |
| 212 | # CONFIG_SPARSEMEM_MANUAL is not set | 254 | # CONFIG_SPARSEMEM_MANUAL is not set |
| 213 | CONFIG_FLATMEM=y | 255 | CONFIG_FLATMEM=y |
| 214 | CONFIG_FLAT_NODE_MEM_MAP=y | 256 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 215 | # CONFIG_SPARSEMEM_STATIC is not set | 257 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 216 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
| 217 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | 258 | CONFIG_SPLIT_PTLOCK_CPUS=4096 |
| 218 | # CONFIG_RESOURCES_64BIT is not set | 259 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 219 | CONFIG_ZONE_DMA_FLAG=1 | 260 | CONFIG_ZONE_DMA_FLAG=0 |
| 220 | CONFIG_BOUNCE=y | ||
| 221 | CONFIG_VIRT_TO_BUS=y | 261 | CONFIG_VIRT_TO_BUS=y |
| 262 | CONFIG_UNEVICTABLE_LRU=y | ||
| 222 | CONFIG_ALIGNMENT_TRAP=y | 263 | CONFIG_ALIGNMENT_TRAP=y |
| 223 | 264 | ||
| 224 | # | 265 | # |
| @@ -229,9 +270,10 @@ CONFIG_ZBOOT_ROM_BSS=0x0 | |||
| 229 | CONFIG_CMDLINE="keepinitrd" | 270 | CONFIG_CMDLINE="keepinitrd" |
| 230 | # CONFIG_XIP_KERNEL is not set | 271 | # CONFIG_XIP_KERNEL is not set |
| 231 | CONFIG_KEXEC=y | 272 | CONFIG_KEXEC=y |
| 273 | CONFIG_ATAGS_PROC=y | ||
| 232 | 274 | ||
| 233 | # | 275 | # |
| 234 | # CPU Frequency scaling | 276 | # CPU Power Management |
| 235 | # | 277 | # |
| 236 | CONFIG_CPU_FREQ=y | 278 | CONFIG_CPU_FREQ=y |
| 237 | CONFIG_CPU_FREQ_TABLE=y | 279 | CONFIG_CPU_FREQ_TABLE=y |
| @@ -239,6 +281,7 @@ CONFIG_CPU_FREQ_TABLE=y | |||
| 239 | CONFIG_CPU_FREQ_STAT=y | 281 | CONFIG_CPU_FREQ_STAT=y |
| 240 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set | 282 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set |
| 241 | CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y | 283 | CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y |
| 284 | # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | ||
| 242 | # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set | 285 | # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set |
| 243 | # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | 286 | # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set |
| 244 | # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | 287 | # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set |
| @@ -247,6 +290,7 @@ CONFIG_CPU_FREQ_GOV_PERFORMANCE=y | |||
| 247 | # CONFIG_CPU_FREQ_GOV_USERSPACE is not set | 290 | # CONFIG_CPU_FREQ_GOV_USERSPACE is not set |
| 248 | CONFIG_CPU_FREQ_GOV_ONDEMAND=y | 291 | CONFIG_CPU_FREQ_GOV_ONDEMAND=y |
| 249 | # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set | 292 | # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set |
| 293 | # CONFIG_CPU_IDLE is not set | ||
| 250 | 294 | ||
| 251 | # | 295 | # |
| 252 | # Floating point emulation | 296 | # Floating point emulation |
| @@ -263,6 +307,8 @@ CONFIG_FPE_NWFPE=y | |||
| 263 | # Userspace binary formats | 307 | # Userspace binary formats |
| 264 | # | 308 | # |
| 265 | CONFIG_BINFMT_ELF=y | 309 | CONFIG_BINFMT_ELF=y |
| 310 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 311 | CONFIG_HAVE_AOUT=y | ||
| 266 | # CONFIG_BINFMT_AOUT is not set | 312 | # CONFIG_BINFMT_AOUT is not set |
| 267 | # CONFIG_BINFMT_MISC is not set | 313 | # CONFIG_BINFMT_MISC is not set |
| 268 | 314 | ||
| @@ -270,21 +316,18 @@ CONFIG_BINFMT_ELF=y | |||
| 270 | # Power management options | 316 | # Power management options |
| 271 | # | 317 | # |
| 272 | CONFIG_PM=y | 318 | CONFIG_PM=y |
| 273 | # CONFIG_PM_LEGACY is not set | ||
| 274 | # CONFIG_PM_DEBUG is not set | 319 | # CONFIG_PM_DEBUG is not set |
| 275 | CONFIG_PM_SLEEP=y | 320 | CONFIG_PM_SLEEP=y |
| 276 | CONFIG_SUSPEND_UP_POSSIBLE=y | ||
| 277 | CONFIG_SUSPEND=y | 321 | CONFIG_SUSPEND=y |
| 278 | CONFIG_APM_EMULATION=y | 322 | CONFIG_SUSPEND_FREEZER=y |
| 279 | 323 | # CONFIG_APM_EMULATION is not set | |
| 280 | # | 324 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 281 | # Networking | ||
| 282 | # | ||
| 283 | CONFIG_NET=y | 325 | CONFIG_NET=y |
| 284 | 326 | ||
| 285 | # | 327 | # |
| 286 | # Networking options | 328 | # Networking options |
| 287 | # | 329 | # |
| 330 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 288 | CONFIG_PACKET=y | 331 | CONFIG_PACKET=y |
| 289 | CONFIG_PACKET_MMAP=y | 332 | CONFIG_PACKET_MMAP=y |
| 290 | CONFIG_UNIX=y | 333 | CONFIG_UNIX=y |
| @@ -316,33 +359,15 @@ CONFIG_IP_PNP=y | |||
| 316 | CONFIG_TCP_CONG_CUBIC=y | 359 | CONFIG_TCP_CONG_CUBIC=y |
| 317 | CONFIG_DEFAULT_TCP_CONG="cubic" | 360 | CONFIG_DEFAULT_TCP_CONG="cubic" |
| 318 | # CONFIG_TCP_MD5SIG is not set | 361 | # CONFIG_TCP_MD5SIG is not set |
| 319 | # CONFIG_IP_VS is not set | ||
| 320 | # CONFIG_IPV6 is not set | 362 | # CONFIG_IPV6 is not set |
| 321 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
| 322 | # CONFIG_INET6_TUNNEL is not set | ||
| 323 | # CONFIG_NETWORK_SECMARK is not set | 363 | # CONFIG_NETWORK_SECMARK is not set |
| 324 | CONFIG_NETFILTER=y | 364 | # CONFIG_NETFILTER is not set |
| 325 | # CONFIG_NETFILTER_DEBUG is not set | ||
| 326 | |||
| 327 | # | ||
| 328 | # Core Netfilter Configuration | ||
| 329 | # | ||
| 330 | # CONFIG_NETFILTER_NETLINK is not set | ||
| 331 | # CONFIG_NF_CONNTRACK_ENABLED is not set | ||
| 332 | # CONFIG_NF_CONNTRACK is not set | ||
| 333 | # CONFIG_NETFILTER_XTABLES is not set | ||
| 334 | |||
| 335 | # | ||
| 336 | # IP: Netfilter Configuration | ||
| 337 | # | ||
| 338 | # CONFIG_IP_NF_QUEUE is not set | ||
| 339 | # CONFIG_IP_NF_IPTABLES is not set | ||
| 340 | # CONFIG_IP_NF_ARPTABLES is not set | ||
| 341 | # CONFIG_IP_DCCP is not set | 365 | # CONFIG_IP_DCCP is not set |
| 342 | # CONFIG_IP_SCTP is not set | 366 | # CONFIG_IP_SCTP is not set |
| 343 | # CONFIG_TIPC is not set | 367 | # CONFIG_TIPC is not set |
| 344 | # CONFIG_ATM is not set | 368 | # CONFIG_ATM is not set |
| 345 | # CONFIG_BRIDGE is not set | 369 | # CONFIG_BRIDGE is not set |
| 370 | # CONFIG_NET_DSA is not set | ||
| 346 | # CONFIG_VLAN_8021Q is not set | 371 | # CONFIG_VLAN_8021Q is not set |
| 347 | # CONFIG_DECNET is not set | 372 | # CONFIG_DECNET is not set |
| 348 | # CONFIG_LLC2 is not set | 373 | # CONFIG_LLC2 is not set |
| @@ -353,6 +378,7 @@ CONFIG_NETFILTER=y | |||
| 353 | # CONFIG_ECONET is not set | 378 | # CONFIG_ECONET is not set |
| 354 | # CONFIG_WAN_ROUTER is not set | 379 | # CONFIG_WAN_ROUTER is not set |
| 355 | # CONFIG_NET_SCHED is not set | 380 | # CONFIG_NET_SCHED is not set |
| 381 | # CONFIG_DCB is not set | ||
| 356 | 382 | ||
| 357 | # | 383 | # |
| 358 | # Network testing | 384 | # Network testing |
| @@ -390,20 +416,17 @@ CONFIG_IRTTY_SIR=m | |||
| 390 | # Dongle support | 416 | # Dongle support |
| 391 | # | 417 | # |
| 392 | # CONFIG_DONGLE is not set | 418 | # CONFIG_DONGLE is not set |
| 393 | 419 | # CONFIG_KINGSUN_DONGLE is not set | |
| 394 | # | 420 | # CONFIG_KSDAZZLE_DONGLE is not set |
| 395 | # Old SIR device drivers | 421 | # CONFIG_KS959_DONGLE is not set |
| 396 | # | ||
| 397 | # CONFIG_IRPORT_SIR is not set | ||
| 398 | |||
| 399 | # | ||
| 400 | # Old Serial dongle support | ||
| 401 | # | ||
| 402 | 422 | ||
| 403 | # | 423 | # |
| 404 | # FIR device drivers | 424 | # FIR device drivers |
| 405 | # | 425 | # |
| 426 | # CONFIG_USB_IRDA is not set | ||
| 427 | # CONFIG_SIGMATEL_FIR is not set | ||
| 406 | CONFIG_PXA_FICP=m | 428 | CONFIG_PXA_FICP=m |
| 429 | # CONFIG_MCS_FIR is not set | ||
| 407 | CONFIG_BT=m | 430 | CONFIG_BT=m |
| 408 | CONFIG_BT_L2CAP=m | 431 | CONFIG_BT_L2CAP=m |
| 409 | CONFIG_BT_SCO=m | 432 | CONFIG_BT_SCO=m |
| @@ -417,17 +440,17 @@ CONFIG_BT_HIDP=m | |||
| 417 | # | 440 | # |
| 418 | # Bluetooth device drivers | 441 | # Bluetooth device drivers |
| 419 | # | 442 | # |
| 443 | CONFIG_BT_HCIBTUSB=m | ||
| 444 | # CONFIG_BT_HCIBTSDIO is not set | ||
| 420 | # CONFIG_BT_HCIUART is not set | 445 | # CONFIG_BT_HCIUART is not set |
| 446 | # CONFIG_BT_HCIBCM203X is not set | ||
| 447 | # CONFIG_BT_HCIBPA10X is not set | ||
| 448 | # CONFIG_BT_HCIBFUSB is not set | ||
| 421 | # CONFIG_BT_HCIVHCI is not set | 449 | # CONFIG_BT_HCIVHCI is not set |
| 422 | # CONFIG_AF_RXRPC is not set | 450 | # CONFIG_AF_RXRPC is not set |
| 423 | 451 | # CONFIG_PHONET is not set | |
| 424 | # | 452 | # CONFIG_WIRELESS is not set |
| 425 | # Wireless | 453 | # CONFIG_WIMAX is not set |
| 426 | # | ||
| 427 | # CONFIG_CFG80211 is not set | ||
| 428 | # CONFIG_WIRELESS_EXT is not set | ||
| 429 | # CONFIG_MAC80211 is not set | ||
| 430 | # CONFIG_IEEE80211 is not set | ||
| 431 | # CONFIG_RFKILL is not set | 454 | # CONFIG_RFKILL is not set |
| 432 | # CONFIG_NET_9P is not set | 455 | # CONFIG_NET_9P is not set |
| 433 | 456 | ||
| @@ -442,25 +465,28 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |||
| 442 | CONFIG_STANDALONE=y | 465 | CONFIG_STANDALONE=y |
| 443 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 466 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 444 | CONFIG_FW_LOADER=y | 467 | CONFIG_FW_LOADER=y |
| 468 | # CONFIG_FIRMWARE_IN_KERNEL is not set | ||
| 469 | CONFIG_EXTRA_FIRMWARE="" | ||
| 445 | # CONFIG_DEBUG_DRIVER is not set | 470 | # CONFIG_DEBUG_DRIVER is not set |
| 446 | # CONFIG_DEBUG_DEVRES is not set | 471 | # CONFIG_DEBUG_DEVRES is not set |
| 447 | # CONFIG_SYS_HYPERVISOR is not set | 472 | # CONFIG_SYS_HYPERVISOR is not set |
| 448 | # CONFIG_CONNECTOR is not set | 473 | # CONFIG_CONNECTOR is not set |
| 449 | CONFIG_MTD=y | 474 | CONFIG_MTD=y |
| 450 | CONFIG_MTD_DEBUG=y | 475 | # CONFIG_MTD_DEBUG is not set |
| 451 | CONFIG_MTD_DEBUG_VERBOSE=0 | ||
| 452 | # CONFIG_MTD_CONCAT is not set | 476 | # CONFIG_MTD_CONCAT is not set |
| 453 | CONFIG_MTD_PARTITIONS=y | 477 | CONFIG_MTD_PARTITIONS=y |
| 478 | # CONFIG_MTD_TESTS is not set | ||
| 454 | # CONFIG_MTD_REDBOOT_PARTS is not set | 479 | # CONFIG_MTD_REDBOOT_PARTS is not set |
| 455 | CONFIG_MTD_CMDLINE_PARTS=y | 480 | CONFIG_MTD_CMDLINE_PARTS=y |
| 456 | # CONFIG_MTD_AFS_PARTS is not set | 481 | # CONFIG_MTD_AFS_PARTS is not set |
| 482 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 457 | 483 | ||
| 458 | # | 484 | # |
| 459 | # User Modules And Translation Layers | 485 | # User Modules And Translation Layers |
| 460 | # | 486 | # |
| 461 | CONFIG_MTD_CHAR=m | 487 | CONFIG_MTD_CHAR=y |
| 462 | CONFIG_MTD_BLKDEVS=m | 488 | CONFIG_MTD_BLKDEVS=y |
| 463 | CONFIG_MTD_BLOCK=m | 489 | CONFIG_MTD_BLOCK=y |
| 464 | # CONFIG_FTL is not set | 490 | # CONFIG_FTL is not set |
| 465 | # CONFIG_NFTL is not set | 491 | # CONFIG_NFTL is not set |
| 466 | # CONFIG_INFTL is not set | 492 | # CONFIG_INFTL is not set |
| @@ -473,6 +499,7 @@ CONFIG_MTD_BLOCK=m | |||
| 473 | # | 499 | # |
| 474 | CONFIG_MTD_CFI=y | 500 | CONFIG_MTD_CFI=y |
| 475 | # CONFIG_MTD_JEDECPROBE is not set | 501 | # CONFIG_MTD_JEDECPROBE is not set |
| 502 | CONFIG_MTD_GEN_PROBE=y | ||
| 476 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | 503 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set |
| 477 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | 504 | CONFIG_MTD_MAP_BANK_WIDTH_1=y |
| 478 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | 505 | CONFIG_MTD_MAP_BANK_WIDTH_2=y |
| @@ -487,6 +514,7 @@ CONFIG_MTD_CFI_I2=y | |||
| 487 | CONFIG_MTD_CFI_INTELEXT=y | 514 | CONFIG_MTD_CFI_INTELEXT=y |
| 488 | # CONFIG_MTD_CFI_AMDSTD is not set | 515 | # CONFIG_MTD_CFI_AMDSTD is not set |
| 489 | # CONFIG_MTD_CFI_STAA is not set | 516 | # CONFIG_MTD_CFI_STAA is not set |
| 517 | CONFIG_MTD_CFI_UTIL=y | ||
| 490 | # CONFIG_MTD_RAM is not set | 518 | # CONFIG_MTD_RAM is not set |
| 491 | # CONFIG_MTD_ROM is not set | 519 | # CONFIG_MTD_ROM is not set |
| 492 | # CONFIG_MTD_ABSENT is not set | 520 | # CONFIG_MTD_ABSENT is not set |
| @@ -497,9 +525,7 @@ CONFIG_MTD_CFI_INTELEXT=y | |||
| 497 | # | 525 | # |
| 498 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 526 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
| 499 | CONFIG_MTD_PHYSMAP=y | 527 | CONFIG_MTD_PHYSMAP=y |
| 500 | CONFIG_MTD_PHYSMAP_START=0x00000000 | 528 | # CONFIG_MTD_PHYSMAP_COMPAT is not set |
| 501 | CONFIG_MTD_PHYSMAP_LEN=0x04000000 | ||
| 502 | CONFIG_MTD_PHYSMAP_BANKWIDTH=4 | ||
| 503 | # CONFIG_MTD_PXA2XX is not set | 529 | # CONFIG_MTD_PXA2XX is not set |
| 504 | # CONFIG_MTD_ARM_INTEGRATOR is not set | 530 | # CONFIG_MTD_ARM_INTEGRATOR is not set |
| 505 | # CONFIG_MTD_SHARP_SL is not set | 531 | # CONFIG_MTD_SHARP_SL is not set |
| @@ -523,6 +549,12 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=4 | |||
| 523 | # CONFIG_MTD_ONENAND is not set | 549 | # CONFIG_MTD_ONENAND is not set |
| 524 | 550 | ||
| 525 | # | 551 | # |
| 552 | # LPDDR flash memory drivers | ||
| 553 | # | ||
| 554 | # CONFIG_MTD_LPDDR is not set | ||
| 555 | # CONFIG_MTD_QINFO_PROBE is not set | ||
| 556 | |||
| 557 | # | ||
| 526 | # UBI - Unsorted block images | 558 | # UBI - Unsorted block images |
| 527 | # | 559 | # |
| 528 | # CONFIG_MTD_UBI is not set | 560 | # CONFIG_MTD_UBI is not set |
| @@ -531,10 +563,12 @@ CONFIG_BLK_DEV=y | |||
| 531 | # CONFIG_BLK_DEV_COW_COMMON is not set | 563 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 532 | # CONFIG_BLK_DEV_LOOP is not set | 564 | # CONFIG_BLK_DEV_LOOP is not set |
| 533 | # CONFIG_BLK_DEV_NBD is not set | 565 | # CONFIG_BLK_DEV_NBD is not set |
| 566 | # CONFIG_BLK_DEV_UB is not set | ||
| 534 | # CONFIG_BLK_DEV_RAM is not set | 567 | # CONFIG_BLK_DEV_RAM is not set |
| 535 | # CONFIG_CDROM_PKTCDVD is not set | 568 | # CONFIG_CDROM_PKTCDVD is not set |
| 536 | # CONFIG_ATA_OVER_ETH is not set | 569 | # CONFIG_ATA_OVER_ETH is not set |
| 537 | # CONFIG_MISC_DEVICES is not set | 570 | # CONFIG_MISC_DEVICES is not set |
| 571 | CONFIG_HAVE_IDE=y | ||
| 538 | # CONFIG_IDE is not set | 572 | # CONFIG_IDE is not set |
| 539 | 573 | ||
| 540 | # | 574 | # |
| @@ -547,7 +581,6 @@ CONFIG_BLK_DEV=y | |||
| 547 | # CONFIG_ATA is not set | 581 | # CONFIG_ATA is not set |
| 548 | # CONFIG_MD is not set | 582 | # CONFIG_MD is not set |
| 549 | CONFIG_NETDEVICES=y | 583 | CONFIG_NETDEVICES=y |
| 550 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
| 551 | # CONFIG_DUMMY is not set | 584 | # CONFIG_DUMMY is not set |
| 552 | # CONFIG_BONDING is not set | 585 | # CONFIG_BONDING is not set |
| 553 | # CONFIG_MACVLAN is not set | 586 | # CONFIG_MACVLAN is not set |
| @@ -563,6 +596,20 @@ CONFIG_NETDEVICES=y | |||
| 563 | # | 596 | # |
| 564 | # CONFIG_WLAN_PRE80211 is not set | 597 | # CONFIG_WLAN_PRE80211 is not set |
| 565 | # CONFIG_WLAN_80211 is not set | 598 | # CONFIG_WLAN_80211 is not set |
| 599 | # CONFIG_IWLWIFI_LEDS is not set | ||
| 600 | |||
| 601 | # | ||
| 602 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 603 | # | ||
| 604 | |||
| 605 | # | ||
| 606 | # USB Network Adapters | ||
| 607 | # | ||
| 608 | # CONFIG_USB_CATC is not set | ||
| 609 | # CONFIG_USB_KAWETH is not set | ||
| 610 | # CONFIG_USB_PEGASUS is not set | ||
| 611 | # CONFIG_USB_RTL8150 is not set | ||
| 612 | # CONFIG_USB_USBNET is not set | ||
| 566 | # CONFIG_WAN is not set | 613 | # CONFIG_WAN is not set |
| 567 | CONFIG_PPP=m | 614 | CONFIG_PPP=m |
| 568 | # CONFIG_PPP_MULTILINK is not set | 615 | # CONFIG_PPP_MULTILINK is not set |
| @@ -612,7 +659,26 @@ CONFIG_KEYBOARD_GPIO=y | |||
| 612 | # CONFIG_INPUT_JOYSTICK is not set | 659 | # CONFIG_INPUT_JOYSTICK is not set |
| 613 | # CONFIG_INPUT_TABLET is not set | 660 | # CONFIG_INPUT_TABLET is not set |
| 614 | CONFIG_INPUT_TOUCHSCREEN=y | 661 | CONFIG_INPUT_TOUCHSCREEN=y |
| 662 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
| 663 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 664 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
| 665 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
| 666 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
| 667 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
| 668 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 669 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
| 670 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
| 671 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
| 672 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 673 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
| 674 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
| 615 | CONFIG_INPUT_MISC=y | 675 | CONFIG_INPUT_MISC=y |
| 676 | # CONFIG_INPUT_ATI_REMOTE is not set | ||
| 677 | # CONFIG_INPUT_ATI_REMOTE2 is not set | ||
| 678 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
| 679 | # CONFIG_INPUT_POWERMATE is not set | ||
| 680 | # CONFIG_INPUT_YEALINK is not set | ||
| 681 | # CONFIG_INPUT_CM109 is not set | ||
| 616 | CONFIG_INPUT_UINPUT=m | 682 | CONFIG_INPUT_UINPUT=m |
| 617 | 683 | ||
| 618 | # | 684 | # |
| @@ -625,9 +691,11 @@ CONFIG_INPUT_UINPUT=m | |||
| 625 | # Character devices | 691 | # Character devices |
| 626 | # | 692 | # |
| 627 | CONFIG_VT=y | 693 | CONFIG_VT=y |
| 694 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 628 | CONFIG_VT_CONSOLE=y | 695 | CONFIG_VT_CONSOLE=y |
| 629 | CONFIG_HW_CONSOLE=y | 696 | CONFIG_HW_CONSOLE=y |
| 630 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | 697 | # CONFIG_VT_HW_CONSOLE_BINDING is not set |
| 698 | # CONFIG_DEVKMEM is not set | ||
| 631 | # CONFIG_SERIAL_NONSTANDARD is not set | 699 | # CONFIG_SERIAL_NONSTANDARD is not set |
| 632 | 700 | ||
| 633 | # | 701 | # |
| @@ -642,6 +710,7 @@ CONFIG_SERIAL_PXA=y | |||
| 642 | # CONFIG_SERIAL_PXA_CONSOLE is not set | 710 | # CONFIG_SERIAL_PXA_CONSOLE is not set |
| 643 | CONFIG_SERIAL_CORE=y | 711 | CONFIG_SERIAL_CORE=y |
| 644 | CONFIG_UNIX98_PTYS=y | 712 | CONFIG_UNIX98_PTYS=y |
| 713 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 645 | # CONFIG_LEGACY_PTYS is not set | 714 | # CONFIG_LEGACY_PTYS is not set |
| 646 | # CONFIG_IPMI_HANDLER is not set | 715 | # CONFIG_IPMI_HANDLER is not set |
| 647 | # CONFIG_HW_RANDOM is not set | 716 | # CONFIG_HW_RANDOM is not set |
| @@ -649,37 +718,45 @@ CONFIG_UNIX98_PTYS=y | |||
| 649 | # CONFIG_R3964 is not set | 718 | # CONFIG_R3964 is not set |
| 650 | # CONFIG_RAW_DRIVER is not set | 719 | # CONFIG_RAW_DRIVER is not set |
| 651 | # CONFIG_TCG_TPM is not set | 720 | # CONFIG_TCG_TPM is not set |
| 652 | CONFIG_I2C=m | 721 | CONFIG_I2C=y |
| 653 | CONFIG_I2C_BOARDINFO=y | 722 | CONFIG_I2C_BOARDINFO=y |
| 654 | CONFIG_I2C_CHARDEV=m | 723 | CONFIG_I2C_CHARDEV=m |
| 724 | CONFIG_I2C_HELPER_AUTO=y | ||
| 655 | 725 | ||
| 656 | # | 726 | # |
| 657 | # I2C Algorithms | 727 | # I2C Hardware Bus support |
| 658 | # | 728 | # |
| 659 | # CONFIG_I2C_ALGOBIT is not set | ||
| 660 | # CONFIG_I2C_ALGOPCF is not set | ||
| 661 | # CONFIG_I2C_ALGOPCA is not set | ||
| 662 | 729 | ||
| 663 | # | 730 | # |
| 664 | # I2C Hardware Bus support | 731 | # I2C system bus drivers (mostly embedded / system-on-chip) |
| 665 | # | 732 | # |
| 666 | # CONFIG_I2C_GPIO is not set | 733 | # CONFIG_I2C_GPIO is not set |
| 667 | CONFIG_I2C_PXA=m | ||
| 668 | # CONFIG_I2C_PXA_SLAVE is not set | ||
| 669 | # CONFIG_I2C_OCORES is not set | 734 | # CONFIG_I2C_OCORES is not set |
| 670 | # CONFIG_I2C_PARPORT_LIGHT is not set | 735 | CONFIG_I2C_PXA=y |
| 736 | # CONFIG_I2C_PXA_SLAVE is not set | ||
| 671 | # CONFIG_I2C_SIMTEC is not set | 737 | # CONFIG_I2C_SIMTEC is not set |
| 738 | |||
| 739 | # | ||
| 740 | # External I2C/SMBus adapter drivers | ||
| 741 | # | ||
| 742 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 672 | # CONFIG_I2C_TAOS_EVM is not set | 743 | # CONFIG_I2C_TAOS_EVM is not set |
| 744 | # CONFIG_I2C_TINY_USB is not set | ||
| 745 | |||
| 746 | # | ||
| 747 | # Other I2C/SMBus bus drivers | ||
| 748 | # | ||
| 749 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 673 | # CONFIG_I2C_STUB is not set | 750 | # CONFIG_I2C_STUB is not set |
| 674 | 751 | ||
| 675 | # | 752 | # |
| 676 | # Miscellaneous I2C Chip support | 753 | # Miscellaneous I2C Chip support |
| 677 | # | 754 | # |
| 678 | # CONFIG_SENSORS_DS1337 is not set | ||
| 679 | # CONFIG_SENSORS_DS1374 is not set | ||
| 680 | # CONFIG_DS1682 is not set | 755 | # CONFIG_DS1682 is not set |
| 756 | # CONFIG_AT24 is not set | ||
| 681 | # CONFIG_EEPROM_LEGACY is not set | 757 | # CONFIG_EEPROM_LEGACY is not set |
| 682 | # CONFIG_SENSORS_PCF8574 is not set | 758 | # CONFIG_SENSORS_PCF8574 is not set |
| 759 | # CONFIG_PCF8575 is not set | ||
| 683 | # CONFIG_SENSORS_PCA9539 is not set | 760 | # CONFIG_SENSORS_PCA9539 is not set |
| 684 | # CONFIG_SENSORS_PCF8591 is not set | 761 | # CONFIG_SENSORS_PCF8591 is not set |
| 685 | # CONFIG_SENSORS_MAX6875 is not set | 762 | # CONFIG_SENSORS_MAX6875 is not set |
| @@ -688,19 +765,39 @@ CONFIG_I2C_PXA=m | |||
| 688 | # CONFIG_I2C_DEBUG_ALGO is not set | 765 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 689 | # CONFIG_I2C_DEBUG_BUS is not set | 766 | # CONFIG_I2C_DEBUG_BUS is not set |
| 690 | # CONFIG_I2C_DEBUG_CHIP is not set | 767 | # CONFIG_I2C_DEBUG_CHIP is not set |
| 768 | # CONFIG_SPI is not set | ||
| 769 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 770 | CONFIG_GPIOLIB=y | ||
| 771 | # CONFIG_DEBUG_GPIO is not set | ||
| 772 | # CONFIG_GPIO_SYSFS is not set | ||
| 691 | 773 | ||
| 692 | # | 774 | # |
| 693 | # SPI support | 775 | # Memory mapped GPIO expanders: |
| 776 | # | ||
| 777 | |||
| 778 | # | ||
| 779 | # I2C GPIO expanders: | ||
| 780 | # | ||
| 781 | # CONFIG_GPIO_MAX732X is not set | ||
| 782 | # CONFIG_GPIO_PCA953X is not set | ||
| 783 | # CONFIG_GPIO_PCF857X is not set | ||
| 784 | |||
| 785 | # | ||
| 786 | # PCI GPIO expanders: | ||
| 787 | # | ||
| 788 | |||
| 789 | # | ||
| 790 | # SPI GPIO expanders: | ||
| 694 | # | 791 | # |
| 695 | # CONFIG_SPI is not set | ||
| 696 | # CONFIG_SPI_MASTER is not set | ||
| 697 | CONFIG_W1=y | 792 | CONFIG_W1=y |
| 698 | 793 | ||
| 699 | # | 794 | # |
| 700 | # 1-wire Bus Masters | 795 | # 1-wire Bus Masters |
| 701 | # | 796 | # |
| 797 | # CONFIG_W1_MASTER_DS2490 is not set | ||
| 702 | # CONFIG_W1_MASTER_DS2482 is not set | 798 | # CONFIG_W1_MASTER_DS2482 is not set |
| 703 | CONFIG_W1_MASTER_DS1WM=y | 799 | CONFIG_W1_MASTER_DS1WM=y |
| 800 | # CONFIG_W1_MASTER_GPIO is not set | ||
| 704 | 801 | ||
| 705 | # | 802 | # |
| 706 | # 1-wire Slaves | 803 | # 1-wire Slaves |
| @@ -709,32 +806,56 @@ CONFIG_W1_MASTER_DS1WM=y | |||
| 709 | # CONFIG_W1_SLAVE_SMEM is not set | 806 | # CONFIG_W1_SLAVE_SMEM is not set |
| 710 | # CONFIG_W1_SLAVE_DS2433 is not set | 807 | # CONFIG_W1_SLAVE_DS2433 is not set |
| 711 | CONFIG_W1_SLAVE_DS2760=y | 808 | CONFIG_W1_SLAVE_DS2760=y |
| 809 | # CONFIG_W1_SLAVE_BQ27000 is not set | ||
| 712 | CONFIG_POWER_SUPPLY=y | 810 | CONFIG_POWER_SUPPLY=y |
| 713 | # CONFIG_POWER_SUPPLY_DEBUG is not set | 811 | # CONFIG_POWER_SUPPLY_DEBUG is not set |
| 714 | CONFIG_PDA_POWER=y | 812 | CONFIG_PDA_POWER=y |
| 715 | # CONFIG_APM_POWER is not set | ||
| 716 | CONFIG_BATTERY_DS2760=y | 813 | CONFIG_BATTERY_DS2760=y |
| 814 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 717 | # CONFIG_HWMON is not set | 815 | # CONFIG_HWMON is not set |
| 816 | # CONFIG_THERMAL is not set | ||
| 817 | # CONFIG_THERMAL_HWMON is not set | ||
| 718 | # CONFIG_WATCHDOG is not set | 818 | # CONFIG_WATCHDOG is not set |
| 819 | CONFIG_SSB_POSSIBLE=y | ||
| 719 | 820 | ||
| 720 | # | 821 | # |
| 721 | # Sonics Silicon Backplane | 822 | # Sonics Silicon Backplane |
| 722 | # | 823 | # |
| 723 | CONFIG_SSB_POSSIBLE=y | ||
| 724 | # CONFIG_SSB is not set | 824 | # CONFIG_SSB is not set |
| 725 | 825 | ||
| 726 | # | 826 | # |
| 727 | # Multifunction device drivers | 827 | # Multifunction device drivers |
| 728 | # | 828 | # |
| 829 | # CONFIG_MFD_CORE is not set | ||
| 729 | # CONFIG_MFD_SM501 is not set | 830 | # CONFIG_MFD_SM501 is not set |
| 831 | # CONFIG_MFD_ASIC3 is not set | ||
| 730 | CONFIG_HTC_EGPIO=y | 832 | CONFIG_HTC_EGPIO=y |
| 731 | CONFIG_HTC_PASIC3=y | 833 | CONFIG_HTC_PASIC3=y |
| 834 | # CONFIG_TPS65010 is not set | ||
| 835 | # CONFIG_TWL4030_CORE is not set | ||
| 836 | # CONFIG_MFD_TMIO is not set | ||
| 837 | # CONFIG_MFD_T7L66XB is not set | ||
| 838 | # CONFIG_MFD_TC6387XB is not set | ||
| 839 | # CONFIG_MFD_TC6393XB is not set | ||
| 840 | # CONFIG_PMIC_DA903X is not set | ||
| 841 | # CONFIG_MFD_WM8400 is not set | ||
| 842 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 843 | # CONFIG_MFD_PCF50633 is not set | ||
| 732 | 844 | ||
| 733 | # | 845 | # |
| 734 | # Multimedia devices | 846 | # Multimedia devices |
| 735 | # | 847 | # |
| 848 | |||
| 849 | # | ||
| 850 | # Multimedia core support | ||
| 851 | # | ||
| 736 | # CONFIG_VIDEO_DEV is not set | 852 | # CONFIG_VIDEO_DEV is not set |
| 737 | # CONFIG_DVB_CORE is not set | 853 | # CONFIG_DVB_CORE is not set |
| 854 | # CONFIG_VIDEO_MEDIA is not set | ||
| 855 | |||
| 856 | # | ||
| 857 | # Multimedia drivers | ||
| 858 | # | ||
| 738 | # CONFIG_DAB is not set | 859 | # CONFIG_DAB is not set |
| 739 | 860 | ||
| 740 | # | 861 | # |
| @@ -745,6 +866,7 @@ CONFIG_HTC_PASIC3=y | |||
| 745 | CONFIG_FB=y | 866 | CONFIG_FB=y |
| 746 | # CONFIG_FIRMWARE_EDID is not set | 867 | # CONFIG_FIRMWARE_EDID is not set |
| 747 | # CONFIG_FB_DDC is not set | 868 | # CONFIG_FB_DDC is not set |
| 869 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 748 | CONFIG_FB_CFB_FILLRECT=y | 870 | CONFIG_FB_CFB_FILLRECT=y |
| 749 | CONFIG_FB_CFB_COPYAREA=y | 871 | CONFIG_FB_CFB_COPYAREA=y |
| 750 | CONFIG_FB_CFB_IMAGEBLIT=y | 872 | CONFIG_FB_CFB_IMAGEBLIT=y |
| @@ -752,8 +874,8 @@ CONFIG_FB_CFB_IMAGEBLIT=y | |||
| 752 | # CONFIG_FB_SYS_FILLRECT is not set | 874 | # CONFIG_FB_SYS_FILLRECT is not set |
| 753 | # CONFIG_FB_SYS_COPYAREA is not set | 875 | # CONFIG_FB_SYS_COPYAREA is not set |
| 754 | # CONFIG_FB_SYS_IMAGEBLIT is not set | 876 | # CONFIG_FB_SYS_IMAGEBLIT is not set |
| 877 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 755 | # CONFIG_FB_SYS_FOPS is not set | 878 | # CONFIG_FB_SYS_FOPS is not set |
| 756 | CONFIG_FB_DEFERRED_IO=y | ||
| 757 | # CONFIG_FB_SVGALIB is not set | 879 | # CONFIG_FB_SVGALIB is not set |
| 758 | # CONFIG_FB_MACMODES is not set | 880 | # CONFIG_FB_MACMODES is not set |
| 759 | # CONFIG_FB_BACKLIGHT is not set | 881 | # CONFIG_FB_BACKLIGHT is not set |
| @@ -765,13 +887,21 @@ CONFIG_FB_DEFERRED_IO=y | |||
| 765 | # | 887 | # |
| 766 | # CONFIG_FB_S1D13XXX is not set | 888 | # CONFIG_FB_S1D13XXX is not set |
| 767 | CONFIG_FB_PXA=y | 889 | CONFIG_FB_PXA=y |
| 890 | CONFIG_FB_PXA_OVERLAY=y | ||
| 891 | # CONFIG_FB_PXA_SMARTPANEL is not set | ||
| 768 | # CONFIG_FB_PXA_PARAMETERS is not set | 892 | # CONFIG_FB_PXA_PARAMETERS is not set |
| 769 | # CONFIG_FB_MBX is not set | 893 | # CONFIG_FB_MBX is not set |
| 894 | # CONFIG_FB_W100 is not set | ||
| 770 | # CONFIG_FB_VIRTUAL is not set | 895 | # CONFIG_FB_VIRTUAL is not set |
| 896 | # CONFIG_FB_METRONOME is not set | ||
| 897 | # CONFIG_FB_MB862XX is not set | ||
| 771 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | 898 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
| 772 | CONFIG_LCD_CLASS_DEVICE=y | 899 | CONFIG_LCD_CLASS_DEVICE=y |
| 900 | # CONFIG_LCD_ILI9320 is not set | ||
| 901 | # CONFIG_LCD_PLATFORM is not set | ||
| 773 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | 902 | CONFIG_BACKLIGHT_CLASS_DEVICE=y |
| 774 | CONFIG_BACKLIGHT_CORGI=y | 903 | # CONFIG_BACKLIGHT_GENERIC is not set |
| 904 | CONFIG_BACKLIGHT_PWM=y | ||
| 775 | 905 | ||
| 776 | # | 906 | # |
| 777 | # Display device support | 907 | # Display device support |
| @@ -802,15 +932,8 @@ CONFIG_FONT_MINI_4x6=y | |||
| 802 | # CONFIG_FONT_SUN12x22 is not set | 932 | # CONFIG_FONT_SUN12x22 is not set |
| 803 | # CONFIG_FONT_10x18 is not set | 933 | # CONFIG_FONT_10x18 is not set |
| 804 | # CONFIG_LOGO is not set | 934 | # CONFIG_LOGO is not set |
| 805 | |||
| 806 | # | ||
| 807 | # Sound | ||
| 808 | # | ||
| 809 | CONFIG_SOUND=y | 935 | CONFIG_SOUND=y |
| 810 | 936 | CONFIG_SOUND_OSS_CORE=y | |
| 811 | # | ||
| 812 | # Advanced Linux Sound Architecture | ||
| 813 | # | ||
| 814 | CONFIG_SND=m | 937 | CONFIG_SND=m |
| 815 | CONFIG_SND_TIMER=m | 938 | CONFIG_SND_TIMER=m |
| 816 | CONFIG_SND_PCM=m | 939 | CONFIG_SND_PCM=m |
| @@ -824,53 +947,185 @@ CONFIG_SND_SUPPORT_OLD_API=y | |||
| 824 | CONFIG_SND_VERBOSE_PROCFS=y | 947 | CONFIG_SND_VERBOSE_PROCFS=y |
| 825 | # CONFIG_SND_VERBOSE_PRINTK is not set | 948 | # CONFIG_SND_VERBOSE_PRINTK is not set |
| 826 | # CONFIG_SND_DEBUG is not set | 949 | # CONFIG_SND_DEBUG is not set |
| 827 | 950 | CONFIG_SND_DRIVERS=y | |
| 828 | # | ||
| 829 | # Generic devices | ||
| 830 | # | ||
| 831 | # CONFIG_SND_DUMMY is not set | 951 | # CONFIG_SND_DUMMY is not set |
| 832 | # CONFIG_SND_MTPAV is not set | 952 | # CONFIG_SND_MTPAV is not set |
| 833 | # CONFIG_SND_SERIAL_U16550 is not set | 953 | # CONFIG_SND_SERIAL_U16550 is not set |
| 834 | # CONFIG_SND_MPU401 is not set | 954 | # CONFIG_SND_MPU401 is not set |
| 835 | 955 | # CONFIG_SND_ARM is not set | |
| 836 | # | 956 | CONFIG_SND_PXA2XX_LIB=m |
| 837 | # ALSA ARM devices | 957 | # CONFIG_SND_USB is not set |
| 838 | # | ||
| 839 | # CONFIG_SND_PXA2XX_AC97 is not set | ||
| 840 | |||
| 841 | # | ||
| 842 | # System on Chip audio support | ||
| 843 | # | ||
| 844 | CONFIG_SND_SOC=m | 958 | CONFIG_SND_SOC=m |
| 845 | CONFIG_SND_PXA2XX_SOC=m | 959 | CONFIG_SND_PXA2XX_SOC=m |
| 846 | 960 | CONFIG_SND_SOC_I2C_AND_SPI=m | |
| 847 | # | 961 | # CONFIG_SND_SOC_ALL_CODECS is not set |
| 848 | # SoC Audio support for SuperH | ||
| 849 | # | ||
| 850 | |||
| 851 | # | ||
| 852 | # Open Sound System | ||
| 853 | # | ||
| 854 | # CONFIG_SOUND_PRIME is not set | 962 | # CONFIG_SOUND_PRIME is not set |
| 855 | # CONFIG_HID_SUPPORT is not set | 963 | # CONFIG_HID_SUPPORT is not set |
| 856 | CONFIG_HID=m | 964 | CONFIG_HID=m |
| 857 | # CONFIG_USB_SUPPORT is not set | 965 | CONFIG_USB_SUPPORT=y |
| 966 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 967 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 968 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 969 | CONFIG_USB=y | ||
| 970 | # CONFIG_USB_DEBUG is not set | ||
| 971 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
| 972 | |||
| 973 | # | ||
| 974 | # Miscellaneous USB options | ||
| 975 | # | ||
| 976 | # CONFIG_USB_DEVICEFS is not set | ||
| 977 | # CONFIG_USB_DEVICE_CLASS is not set | ||
| 978 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 979 | # CONFIG_USB_SUSPEND is not set | ||
| 980 | # CONFIG_USB_OTG is not set | ||
| 981 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 982 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 983 | CONFIG_USB_MON=m | ||
| 984 | # CONFIG_USB_WUSB is not set | ||
| 985 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 986 | |||
| 987 | # | ||
| 988 | # USB Host Controller Drivers | ||
| 989 | # | ||
| 990 | # CONFIG_USB_C67X00_HCD is not set | ||
| 991 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 992 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 993 | CONFIG_USB_OHCI_HCD=y | ||
| 994 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
| 995 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
| 996 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
| 997 | # CONFIG_USB_SL811_HCD is not set | ||
| 998 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 999 | # CONFIG_USB_HWA_HCD is not set | ||
| 1000 | # CONFIG_USB_MUSB_HDRC is not set | ||
| 1001 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
| 1002 | |||
| 1003 | # | ||
| 1004 | # USB Device Class drivers | ||
| 1005 | # | ||
| 1006 | # CONFIG_USB_ACM is not set | ||
| 1007 | # CONFIG_USB_PRINTER is not set | ||
| 1008 | # CONFIG_USB_WDM is not set | ||
| 1009 | # CONFIG_USB_TMC is not set | ||
| 1010 | |||
| 1011 | # | ||
| 1012 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | ||
| 1013 | # | ||
| 1014 | |||
| 1015 | # | ||
| 1016 | # see USB_STORAGE Help for more information | ||
| 1017 | # | ||
| 1018 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1019 | |||
| 1020 | # | ||
| 1021 | # USB Imaging devices | ||
| 1022 | # | ||
| 1023 | # CONFIG_USB_MDC800 is not set | ||
| 1024 | |||
| 1025 | # | ||
| 1026 | # USB port drivers | ||
| 1027 | # | ||
| 1028 | # CONFIG_USB_SERIAL is not set | ||
| 1029 | |||
| 1030 | # | ||
| 1031 | # USB Miscellaneous drivers | ||
| 1032 | # | ||
| 1033 | # CONFIG_USB_EMI62 is not set | ||
| 1034 | # CONFIG_USB_EMI26 is not set | ||
| 1035 | # CONFIG_USB_ADUTUX is not set | ||
| 1036 | # CONFIG_USB_SEVSEG is not set | ||
| 1037 | # CONFIG_USB_RIO500 is not set | ||
| 1038 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1039 | # CONFIG_USB_LCD is not set | ||
| 1040 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1041 | # CONFIG_USB_LED is not set | ||
| 1042 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1043 | # CONFIG_USB_CYTHERM is not set | ||
| 1044 | # CONFIG_USB_PHIDGET is not set | ||
| 1045 | # CONFIG_USB_IDMOUSE is not set | ||
| 1046 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1047 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1048 | # CONFIG_USB_LD is not set | ||
| 1049 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1050 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1051 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1052 | # CONFIG_USB_VST is not set | ||
| 1053 | CONFIG_USB_GADGET=y | ||
| 1054 | # CONFIG_USB_GADGET_DEBUG is not set | ||
| 1055 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
| 1056 | CONFIG_USB_GADGET_VBUS_DRAW=500 | ||
| 1057 | CONFIG_USB_GADGET_SELECTED=y | ||
| 1058 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 1059 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 1060 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 1061 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 1062 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 1063 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 1064 | CONFIG_USB_GADGET_PXA27X=y | ||
| 1065 | CONFIG_USB_PXA27X=y | ||
| 1066 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 1067 | # CONFIG_USB_GADGET_IMX is not set | ||
| 1068 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 1069 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 1070 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 1071 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 1072 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 1073 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1074 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 1075 | # CONFIG_USB_GADGET_DUALSPEED is not set | ||
| 1076 | # CONFIG_USB_ZERO is not set | ||
| 1077 | CONFIG_USB_ETH=m | ||
| 1078 | # CONFIG_USB_ETH_RNDIS is not set | ||
| 1079 | CONFIG_USB_GADGETFS=m | ||
| 1080 | CONFIG_USB_FILE_STORAGE=m | ||
| 1081 | # CONFIG_USB_FILE_STORAGE_TEST is not set | ||
| 1082 | CONFIG_USB_G_SERIAL=m | ||
| 1083 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 1084 | # CONFIG_USB_G_PRINTER is not set | ||
| 1085 | CONFIG_USB_CDC_COMPOSITE=m | ||
| 1086 | |||
| 1087 | # | ||
| 1088 | # OTG and related infrastructure | ||
| 1089 | # | ||
| 1090 | CONFIG_USB_OTG_UTILS=y | ||
| 1091 | CONFIG_USB_GPIO_VBUS=y | ||
| 858 | CONFIG_MMC=y | 1092 | CONFIG_MMC=y |
| 859 | # CONFIG_MMC_DEBUG is not set | 1093 | # CONFIG_MMC_DEBUG is not set |
| 860 | # CONFIG_MMC_UNSAFE_RESUME is not set | 1094 | # CONFIG_MMC_UNSAFE_RESUME is not set |
| 861 | 1095 | ||
| 862 | # | 1096 | # |
| 863 | # MMC/SD Card Drivers | 1097 | # MMC/SD/SDIO Card Drivers |
| 864 | # | 1098 | # |
| 865 | CONFIG_MMC_BLOCK=y | 1099 | CONFIG_MMC_BLOCK=y |
| 866 | CONFIG_MMC_BLOCK_BOUNCE=y | 1100 | CONFIG_MMC_BLOCK_BOUNCE=y |
| 867 | CONFIG_SDIO_UART=m | 1101 | CONFIG_SDIO_UART=m |
| 1102 | # CONFIG_MMC_TEST is not set | ||
| 868 | 1103 | ||
| 869 | # | 1104 | # |
| 870 | # MMC/SD Host Controller Drivers | 1105 | # MMC/SD/SDIO Host Controller Drivers |
| 871 | # | 1106 | # |
| 872 | CONFIG_MMC_PXA=y | 1107 | CONFIG_MMC_PXA=y |
| 1108 | # CONFIG_MMC_SDHCI is not set | ||
| 1109 | # CONFIG_MEMSTICK is not set | ||
| 1110 | # CONFIG_ACCESSIBILITY is not set | ||
| 873 | CONFIG_NEW_LEDS=y | 1111 | CONFIG_NEW_LEDS=y |
| 1112 | CONFIG_LEDS_CLASS=y | ||
| 1113 | |||
| 1114 | # | ||
| 1115 | # LED drivers | ||
| 1116 | # | ||
| 1117 | # CONFIG_LEDS_PCA9532 is not set | ||
| 1118 | CONFIG_LEDS_GPIO=y | ||
| 1119 | # CONFIG_LEDS_PCA955X is not set | ||
| 1120 | |||
| 1121 | # | ||
| 1122 | # LED Triggers | ||
| 1123 | # | ||
| 1124 | CONFIG_LEDS_TRIGGERS=y | ||
| 1125 | # CONFIG_LEDS_TRIGGER_TIMER is not set | ||
| 1126 | # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set | ||
| 1127 | CONFIG_LEDS_TRIGGER_BACKLIGHT=y | ||
| 1128 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | ||
| 874 | CONFIG_RTC_LIB=y | 1129 | CONFIG_RTC_LIB=y |
| 875 | CONFIG_RTC_CLASS=y | 1130 | CONFIG_RTC_CLASS=y |
| 876 | CONFIG_RTC_HCTOSYS=y | 1131 | CONFIG_RTC_HCTOSYS=y |
| @@ -899,6 +1154,9 @@ CONFIG_RTC_INTF_DEV=y | |||
| 899 | # CONFIG_RTC_DRV_PCF8563 is not set | 1154 | # CONFIG_RTC_DRV_PCF8563 is not set |
| 900 | # CONFIG_RTC_DRV_PCF8583 is not set | 1155 | # CONFIG_RTC_DRV_PCF8583 is not set |
| 901 | # CONFIG_RTC_DRV_M41T80 is not set | 1156 | # CONFIG_RTC_DRV_M41T80 is not set |
| 1157 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 1158 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1159 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 902 | 1160 | ||
| 903 | # | 1161 | # |
| 904 | # SPI RTC drivers | 1162 | # SPI RTC drivers |
| @@ -908,17 +1166,26 @@ CONFIG_RTC_INTF_DEV=y | |||
| 908 | # Platform RTC drivers | 1166 | # Platform RTC drivers |
| 909 | # | 1167 | # |
| 910 | # CONFIG_RTC_DRV_CMOS is not set | 1168 | # CONFIG_RTC_DRV_CMOS is not set |
| 1169 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 1170 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 911 | # CONFIG_RTC_DRV_DS1553 is not set | 1171 | # CONFIG_RTC_DRV_DS1553 is not set |
| 912 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 913 | # CONFIG_RTC_DRV_DS1742 is not set | 1172 | # CONFIG_RTC_DRV_DS1742 is not set |
| 1173 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 914 | # CONFIG_RTC_DRV_M48T86 is not set | 1174 | # CONFIG_RTC_DRV_M48T86 is not set |
| 1175 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 915 | # CONFIG_RTC_DRV_M48T59 is not set | 1176 | # CONFIG_RTC_DRV_M48T59 is not set |
| 1177 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 916 | # CONFIG_RTC_DRV_V3020 is not set | 1178 | # CONFIG_RTC_DRV_V3020 is not set |
| 917 | 1179 | ||
| 918 | # | 1180 | # |
| 919 | # on-CPU RTC drivers | 1181 | # on-CPU RTC drivers |
| 920 | # | 1182 | # |
| 921 | CONFIG_RTC_DRV_SA1100=y | 1183 | CONFIG_RTC_DRV_SA1100=y |
| 1184 | # CONFIG_RTC_DRV_PXA is not set | ||
| 1185 | # CONFIG_DMADEVICES is not set | ||
| 1186 | # CONFIG_REGULATOR is not set | ||
| 1187 | # CONFIG_UIO is not set | ||
| 1188 | # CONFIG_STAGING is not set | ||
| 922 | 1189 | ||
| 923 | # | 1190 | # |
| 924 | # File systems | 1191 | # File systems |
| @@ -927,19 +1194,18 @@ CONFIG_EXT2_FS=y | |||
| 927 | # CONFIG_EXT2_FS_XATTR is not set | 1194 | # CONFIG_EXT2_FS_XATTR is not set |
| 928 | # CONFIG_EXT2_FS_XIP is not set | 1195 | # CONFIG_EXT2_FS_XIP is not set |
| 929 | # CONFIG_EXT3_FS is not set | 1196 | # CONFIG_EXT3_FS is not set |
| 930 | # CONFIG_EXT4DEV_FS is not set | 1197 | # CONFIG_EXT4_FS is not set |
| 931 | # CONFIG_REISERFS_FS is not set | 1198 | # CONFIG_REISERFS_FS is not set |
| 932 | # CONFIG_JFS_FS is not set | 1199 | # CONFIG_JFS_FS is not set |
| 933 | # CONFIG_FS_POSIX_ACL is not set | 1200 | # CONFIG_FS_POSIX_ACL is not set |
| 1201 | CONFIG_FILE_LOCKING=y | ||
| 934 | # CONFIG_XFS_FS is not set | 1202 | # CONFIG_XFS_FS is not set |
| 935 | # CONFIG_GFS2_FS is not set | ||
| 936 | # CONFIG_OCFS2_FS is not set | 1203 | # CONFIG_OCFS2_FS is not set |
| 937 | # CONFIG_MINIX_FS is not set | 1204 | # CONFIG_BTRFS_FS is not set |
| 938 | # CONFIG_ROMFS_FS is not set | 1205 | CONFIG_DNOTIFY=y |
| 939 | CONFIG_INOTIFY=y | 1206 | CONFIG_INOTIFY=y |
| 940 | CONFIG_INOTIFY_USER=y | 1207 | CONFIG_INOTIFY_USER=y |
| 941 | # CONFIG_QUOTA is not set | 1208 | # CONFIG_QUOTA is not set |
| 942 | CONFIG_DNOTIFY=y | ||
| 943 | # CONFIG_AUTOFS_FS is not set | 1209 | # CONFIG_AUTOFS_FS is not set |
| 944 | # CONFIG_AUTOFS4_FS is not set | 1210 | # CONFIG_AUTOFS4_FS is not set |
| 945 | # CONFIG_FUSE_FS is not set | 1211 | # CONFIG_FUSE_FS is not set |
| @@ -965,15 +1231,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | |||
| 965 | # | 1231 | # |
| 966 | CONFIG_PROC_FS=y | 1232 | CONFIG_PROC_FS=y |
| 967 | CONFIG_PROC_SYSCTL=y | 1233 | CONFIG_PROC_SYSCTL=y |
| 1234 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 968 | CONFIG_SYSFS=y | 1235 | CONFIG_SYSFS=y |
| 969 | CONFIG_TMPFS=y | 1236 | CONFIG_TMPFS=y |
| 970 | # CONFIG_TMPFS_POSIX_ACL is not set | 1237 | # CONFIG_TMPFS_POSIX_ACL is not set |
| 971 | # CONFIG_HUGETLB_PAGE is not set | 1238 | # CONFIG_HUGETLB_PAGE is not set |
| 972 | # CONFIG_CONFIGFS_FS is not set | 1239 | # CONFIG_CONFIGFS_FS is not set |
| 973 | 1240 | CONFIG_MISC_FILESYSTEMS=y | |
| 974 | # | ||
| 975 | # Miscellaneous filesystems | ||
| 976 | # | ||
| 977 | # CONFIG_ADFS_FS is not set | 1241 | # CONFIG_ADFS_FS is not set |
| 978 | # CONFIG_AFFS_FS is not set | 1242 | # CONFIG_AFFS_FS is not set |
| 979 | # CONFIG_HFS_FS is not set | 1243 | # CONFIG_HFS_FS is not set |
| @@ -997,9 +1261,13 @@ CONFIG_JFFS2_CMODE_PRIORITY=y | |||
| 997 | # CONFIG_JFFS2_CMODE_SIZE is not set | 1261 | # CONFIG_JFFS2_CMODE_SIZE is not set |
| 998 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set | 1262 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set |
| 999 | # CONFIG_CRAMFS is not set | 1263 | # CONFIG_CRAMFS is not set |
| 1264 | # CONFIG_SQUASHFS is not set | ||
| 1000 | # CONFIG_VXFS_FS is not set | 1265 | # CONFIG_VXFS_FS is not set |
| 1266 | # CONFIG_MINIX_FS is not set | ||
| 1267 | # CONFIG_OMFS_FS is not set | ||
| 1001 | # CONFIG_HPFS_FS is not set | 1268 | # CONFIG_HPFS_FS is not set |
| 1002 | # CONFIG_QNX4FS_FS is not set | 1269 | # CONFIG_QNX4FS_FS is not set |
| 1270 | # CONFIG_ROMFS_FS is not set | ||
| 1003 | # CONFIG_SYSV_FS is not set | 1271 | # CONFIG_SYSV_FS is not set |
| 1004 | # CONFIG_UFS_FS is not set | 1272 | # CONFIG_UFS_FS is not set |
| 1005 | CONFIG_NETWORK_FILESYSTEMS=y | 1273 | CONFIG_NETWORK_FILESYSTEMS=y |
| @@ -1007,14 +1275,13 @@ CONFIG_NFS_FS=y | |||
| 1007 | CONFIG_NFS_V3=y | 1275 | CONFIG_NFS_V3=y |
| 1008 | # CONFIG_NFS_V3_ACL is not set | 1276 | # CONFIG_NFS_V3_ACL is not set |
| 1009 | # CONFIG_NFS_V4 is not set | 1277 | # CONFIG_NFS_V4 is not set |
| 1010 | # CONFIG_NFS_DIRECTIO is not set | ||
| 1011 | # CONFIG_NFSD is not set | ||
| 1012 | CONFIG_ROOT_NFS=y | 1278 | CONFIG_ROOT_NFS=y |
| 1279 | # CONFIG_NFSD is not set | ||
| 1013 | CONFIG_LOCKD=y | 1280 | CONFIG_LOCKD=y |
| 1014 | CONFIG_LOCKD_V4=y | 1281 | CONFIG_LOCKD_V4=y |
| 1015 | CONFIG_NFS_COMMON=y | 1282 | CONFIG_NFS_COMMON=y |
| 1016 | CONFIG_SUNRPC=y | 1283 | CONFIG_SUNRPC=y |
| 1017 | # CONFIG_SUNRPC_BIND34 is not set | 1284 | # CONFIG_SUNRPC_REGISTER_V4 is not set |
| 1018 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 1285 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
| 1019 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1286 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
| 1020 | # CONFIG_SMB_FS is not set | 1287 | # CONFIG_SMB_FS is not set |
| @@ -1076,6 +1343,7 @@ CONFIG_NLS_UTF8=y | |||
| 1076 | CONFIG_PRINTK_TIME=y | 1343 | CONFIG_PRINTK_TIME=y |
| 1077 | CONFIG_ENABLE_WARN_DEPRECATED=y | 1344 | CONFIG_ENABLE_WARN_DEPRECATED=y |
| 1078 | CONFIG_ENABLE_MUST_CHECK=y | 1345 | CONFIG_ENABLE_MUST_CHECK=y |
| 1346 | CONFIG_FRAME_WARN=1024 | ||
| 1079 | # CONFIG_MAGIC_SYSRQ is not set | 1347 | # CONFIG_MAGIC_SYSRQ is not set |
| 1080 | # CONFIG_UNUSED_SYMBOLS is not set | 1348 | # CONFIG_UNUSED_SYMBOLS is not set |
| 1081 | # CONFIG_DEBUG_FS is not set | 1349 | # CONFIG_DEBUG_FS is not set |
| @@ -1083,15 +1351,18 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
| 1083 | CONFIG_DEBUG_KERNEL=y | 1351 | CONFIG_DEBUG_KERNEL=y |
| 1084 | # CONFIG_DEBUG_SHIRQ is not set | 1352 | # CONFIG_DEBUG_SHIRQ is not set |
| 1085 | CONFIG_DETECT_SOFTLOCKUP=y | 1353 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1354 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1355 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1086 | # CONFIG_SCHED_DEBUG is not set | 1356 | # CONFIG_SCHED_DEBUG is not set |
| 1087 | # CONFIG_SCHEDSTATS is not set | 1357 | # CONFIG_SCHEDSTATS is not set |
| 1088 | CONFIG_TIMER_STATS=y | 1358 | CONFIG_TIMER_STATS=y |
| 1359 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1089 | # CONFIG_DEBUG_SLAB is not set | 1360 | # CONFIG_DEBUG_SLAB is not set |
| 1090 | CONFIG_DEBUG_PREEMPT=y | 1361 | # CONFIG_DEBUG_PREEMPT is not set |
| 1091 | # CONFIG_DEBUG_RT_MUTEXES is not set | 1362 | # CONFIG_DEBUG_RT_MUTEXES is not set |
| 1092 | # CONFIG_RT_MUTEX_TESTER is not set | 1363 | # CONFIG_RT_MUTEX_TESTER is not set |
| 1093 | # CONFIG_DEBUG_SPINLOCK is not set | 1364 | # CONFIG_DEBUG_SPINLOCK is not set |
| 1094 | CONFIG_DEBUG_MUTEXES=y | 1365 | # CONFIG_DEBUG_MUTEXES is not set |
| 1095 | # CONFIG_DEBUG_LOCK_ALLOC is not set | 1366 | # CONFIG_DEBUG_LOCK_ALLOC is not set |
| 1096 | # CONFIG_PROVE_LOCKING is not set | 1367 | # CONFIG_PROVE_LOCKING is not set |
| 1097 | # CONFIG_LOCK_STAT is not set | 1368 | # CONFIG_LOCK_STAT is not set |
| @@ -1100,17 +1371,41 @@ CONFIG_DEBUG_MUTEXES=y | |||
| 1100 | # CONFIG_DEBUG_KOBJECT is not set | 1371 | # CONFIG_DEBUG_KOBJECT is not set |
| 1101 | CONFIG_DEBUG_BUGVERBOSE=y | 1372 | CONFIG_DEBUG_BUGVERBOSE=y |
| 1102 | # CONFIG_DEBUG_INFO is not set | 1373 | # CONFIG_DEBUG_INFO is not set |
| 1103 | CONFIG_DEBUG_VM=y | 1374 | # CONFIG_DEBUG_VM is not set |
| 1375 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1376 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1104 | # CONFIG_DEBUG_LIST is not set | 1377 | # CONFIG_DEBUG_LIST is not set |
| 1105 | # CONFIG_DEBUG_SG is not set | 1378 | # CONFIG_DEBUG_SG is not set |
| 1379 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1106 | CONFIG_FRAME_POINTER=y | 1380 | CONFIG_FRAME_POINTER=y |
| 1107 | CONFIG_FORCED_INLINING=y | ||
| 1108 | # CONFIG_BOOT_PRINTK_DELAY is not set | 1381 | # CONFIG_BOOT_PRINTK_DELAY is not set |
| 1109 | # CONFIG_RCU_TORTURE_TEST is not set | 1382 | # CONFIG_RCU_TORTURE_TEST is not set |
| 1383 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1384 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1385 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1110 | # CONFIG_FAULT_INJECTION is not set | 1386 | # CONFIG_FAULT_INJECTION is not set |
| 1387 | # CONFIG_LATENCYTOP is not set | ||
| 1388 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1389 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1390 | |||
| 1391 | # | ||
| 1392 | # Tracers | ||
| 1393 | # | ||
| 1394 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1395 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1396 | # CONFIG_PREEMPT_TRACER is not set | ||
| 1397 | # CONFIG_SCHED_TRACER is not set | ||
| 1398 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 1399 | # CONFIG_BOOT_TRACER is not set | ||
| 1400 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
| 1401 | # CONFIG_STACK_TRACER is not set | ||
| 1402 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
| 1111 | # CONFIG_SAMPLES is not set | 1403 | # CONFIG_SAMPLES is not set |
| 1404 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1405 | # CONFIG_KGDB is not set | ||
| 1112 | CONFIG_DEBUG_USER=y | 1406 | CONFIG_DEBUG_USER=y |
| 1113 | CONFIG_DEBUG_ERRORS=y | 1407 | CONFIG_DEBUG_ERRORS=y |
| 1408 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1114 | CONFIG_DEBUG_LL=y | 1409 | CONFIG_DEBUG_LL=y |
| 1115 | # CONFIG_DEBUG_ICEDCC is not set | 1410 | # CONFIG_DEBUG_ICEDCC is not set |
| 1116 | 1411 | ||
| @@ -1119,55 +1414,110 @@ CONFIG_DEBUG_LL=y | |||
| 1119 | # | 1414 | # |
| 1120 | # CONFIG_KEYS is not set | 1415 | # CONFIG_KEYS is not set |
| 1121 | # CONFIG_SECURITY is not set | 1416 | # CONFIG_SECURITY is not set |
| 1417 | # CONFIG_SECURITYFS is not set | ||
| 1122 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 1418 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set |
| 1123 | CONFIG_CRYPTO=y | 1419 | CONFIG_CRYPTO=y |
| 1420 | |||
| 1421 | # | ||
| 1422 | # Crypto core or helper | ||
| 1423 | # | ||
| 1424 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1124 | CONFIG_CRYPTO_ALGAPI=m | 1425 | CONFIG_CRYPTO_ALGAPI=m |
| 1426 | CONFIG_CRYPTO_ALGAPI2=m | ||
| 1427 | CONFIG_CRYPTO_AEAD2=m | ||
| 1125 | CONFIG_CRYPTO_BLKCIPHER=m | 1428 | CONFIG_CRYPTO_BLKCIPHER=m |
| 1429 | CONFIG_CRYPTO_BLKCIPHER2=m | ||
| 1430 | CONFIG_CRYPTO_HASH=m | ||
| 1431 | CONFIG_CRYPTO_HASH2=m | ||
| 1432 | CONFIG_CRYPTO_RNG2=m | ||
| 1126 | CONFIG_CRYPTO_MANAGER=m | 1433 | CONFIG_CRYPTO_MANAGER=m |
| 1434 | CONFIG_CRYPTO_MANAGER2=m | ||
| 1435 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1436 | # CONFIG_CRYPTO_NULL is not set | ||
| 1437 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1438 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1439 | # CONFIG_CRYPTO_TEST is not set | ||
| 1440 | |||
| 1441 | # | ||
| 1442 | # Authenticated Encryption with Associated Data | ||
| 1443 | # | ||
| 1444 | # CONFIG_CRYPTO_CCM is not set | ||
| 1445 | # CONFIG_CRYPTO_GCM is not set | ||
| 1446 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1447 | |||
| 1448 | # | ||
| 1449 | # Block modes | ||
| 1450 | # | ||
| 1451 | # CONFIG_CRYPTO_CBC is not set | ||
| 1452 | # CONFIG_CRYPTO_CTR is not set | ||
| 1453 | # CONFIG_CRYPTO_CTS is not set | ||
| 1454 | CONFIG_CRYPTO_ECB=m | ||
| 1455 | # CONFIG_CRYPTO_LRW is not set | ||
| 1456 | # CONFIG_CRYPTO_PCBC is not set | ||
| 1457 | # CONFIG_CRYPTO_XTS is not set | ||
| 1458 | |||
| 1459 | # | ||
| 1460 | # Hash modes | ||
| 1461 | # | ||
| 1127 | # CONFIG_CRYPTO_HMAC is not set | 1462 | # CONFIG_CRYPTO_HMAC is not set |
| 1128 | # CONFIG_CRYPTO_XCBC is not set | 1463 | # CONFIG_CRYPTO_XCBC is not set |
| 1129 | # CONFIG_CRYPTO_NULL is not set | 1464 | |
| 1465 | # | ||
| 1466 | # Digest | ||
| 1467 | # | ||
| 1468 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1130 | # CONFIG_CRYPTO_MD4 is not set | 1469 | # CONFIG_CRYPTO_MD4 is not set |
| 1131 | # CONFIG_CRYPTO_MD5 is not set | 1470 | # CONFIG_CRYPTO_MD5 is not set |
| 1471 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1472 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1473 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1474 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1475 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1132 | CONFIG_CRYPTO_SHA1=m | 1476 | CONFIG_CRYPTO_SHA1=m |
| 1133 | # CONFIG_CRYPTO_SHA256 is not set | 1477 | # CONFIG_CRYPTO_SHA256 is not set |
| 1134 | # CONFIG_CRYPTO_SHA512 is not set | 1478 | # CONFIG_CRYPTO_SHA512 is not set |
| 1135 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1136 | # CONFIG_CRYPTO_TGR192 is not set | 1479 | # CONFIG_CRYPTO_TGR192 is not set |
| 1137 | # CONFIG_CRYPTO_GF128MUL is not set | 1480 | # CONFIG_CRYPTO_WP512 is not set |
| 1138 | CONFIG_CRYPTO_ECB=m | 1481 | |
| 1139 | # CONFIG_CRYPTO_CBC is not set | 1482 | # |
| 1140 | CONFIG_CRYPTO_PCBC=m | 1483 | # Ciphers |
| 1141 | # CONFIG_CRYPTO_LRW is not set | 1484 | # |
| 1142 | # CONFIG_CRYPTO_XTS is not set | ||
| 1143 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1144 | # CONFIG_CRYPTO_DES is not set | ||
| 1145 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1146 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1147 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1148 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1149 | # CONFIG_CRYPTO_AES is not set | 1485 | # CONFIG_CRYPTO_AES is not set |
| 1486 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1487 | CONFIG_CRYPTO_ARC4=m | ||
| 1488 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1489 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1150 | # CONFIG_CRYPTO_CAST5 is not set | 1490 | # CONFIG_CRYPTO_CAST5 is not set |
| 1151 | # CONFIG_CRYPTO_CAST6 is not set | 1491 | # CONFIG_CRYPTO_CAST6 is not set |
| 1152 | # CONFIG_CRYPTO_TEA is not set | 1492 | # CONFIG_CRYPTO_DES is not set |
| 1153 | CONFIG_CRYPTO_ARC4=m | 1493 | # CONFIG_CRYPTO_FCRYPT is not set |
| 1154 | # CONFIG_CRYPTO_KHAZAD is not set | 1494 | # CONFIG_CRYPTO_KHAZAD is not set |
| 1155 | # CONFIG_CRYPTO_ANUBIS is not set | 1495 | # CONFIG_CRYPTO_SALSA20 is not set |
| 1156 | # CONFIG_CRYPTO_SEED is not set | 1496 | # CONFIG_CRYPTO_SEED is not set |
| 1497 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1498 | # CONFIG_CRYPTO_TEA is not set | ||
| 1499 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1500 | |||
| 1501 | # | ||
| 1502 | # Compression | ||
| 1503 | # | ||
| 1157 | # CONFIG_CRYPTO_DEFLATE is not set | 1504 | # CONFIG_CRYPTO_DEFLATE is not set |
| 1158 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | 1505 | # CONFIG_CRYPTO_LZO is not set |
| 1159 | # CONFIG_CRYPTO_CRC32C is not set | 1506 | |
| 1160 | # CONFIG_CRYPTO_CAMELLIA is not set | 1507 | # |
| 1161 | # CONFIG_CRYPTO_TEST is not set | 1508 | # Random Number Generation |
| 1162 | # CONFIG_CRYPTO_AUTHENC is not set | 1509 | # |
| 1510 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1163 | # CONFIG_CRYPTO_HW is not set | 1511 | # CONFIG_CRYPTO_HW is not set |
| 1164 | 1512 | ||
| 1165 | # | 1513 | # |
| 1166 | # Library routines | 1514 | # Library routines |
| 1167 | # | 1515 | # |
| 1168 | CONFIG_BITREVERSE=y | 1516 | CONFIG_BITREVERSE=y |
| 1517 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1169 | CONFIG_CRC_CCITT=y | 1518 | CONFIG_CRC_CCITT=y |
| 1170 | # CONFIG_CRC16 is not set | 1519 | # CONFIG_CRC16 is not set |
| 1520 | # CONFIG_CRC_T10DIF is not set | ||
| 1171 | # CONFIG_CRC_ITU_T is not set | 1521 | # CONFIG_CRC_ITU_T is not set |
| 1172 | CONFIG_CRC32=y | 1522 | CONFIG_CRC32=y |
| 1173 | # CONFIG_CRC7 is not set | 1523 | # CONFIG_CRC7 is not set |
diff --git a/arch/arm/configs/neponset_defconfig b/arch/arm/configs/neponset_defconfig index d81ea219c934..36cd62edd05c 100644 --- a/arch/arm/configs/neponset_defconfig +++ b/arch/arm/configs/neponset_defconfig | |||
| @@ -91,7 +91,6 @@ CONFIG_ASSABET_NEPONSET=y | |||
| 91 | # CONFIG_SA1100_COLLIE is not set | 91 | # CONFIG_SA1100_COLLIE is not set |
| 92 | # CONFIG_SA1100_H3100 is not set | 92 | # CONFIG_SA1100_H3100 is not set |
| 93 | # CONFIG_SA1100_H3600 is not set | 93 | # CONFIG_SA1100_H3600 is not set |
| 94 | # CONFIG_SA1100_H3800 is not set | ||
| 95 | # CONFIG_SA1100_BADGE4 is not set | 94 | # CONFIG_SA1100_BADGE4 is not set |
| 96 | # CONFIG_SA1100_JORNADA720 is not set | 95 | # CONFIG_SA1100_JORNADA720 is not set |
| 97 | # CONFIG_SA1100_HACKKIT is not set | 96 | # CONFIG_SA1100_HACKKIT is not set |
diff --git a/arch/arm/configs/pleb_defconfig b/arch/arm/configs/pleb_defconfig index a6b47ea8e465..f2d2dda25949 100644 --- a/arch/arm/configs/pleb_defconfig +++ b/arch/arm/configs/pleb_defconfig | |||
| @@ -88,7 +88,6 @@ CONFIG_ARCH_SA1100=y | |||
| 88 | # CONFIG_SA1100_COLLIE is not set | 88 | # CONFIG_SA1100_COLLIE is not set |
| 89 | # CONFIG_SA1100_H3100 is not set | 89 | # CONFIG_SA1100_H3100 is not set |
| 90 | # CONFIG_SA1100_H3600 is not set | 90 | # CONFIG_SA1100_H3600 is not set |
| 91 | # CONFIG_SA1100_H3800 is not set | ||
| 92 | # CONFIG_SA1100_BADGE4 is not set | 91 | # CONFIG_SA1100_BADGE4 is not set |
| 93 | # CONFIG_SA1100_JORNADA720 is not set | 92 | # CONFIG_SA1100_JORNADA720 is not set |
| 94 | # CONFIG_SA1100_HACKKIT is not set | 93 | # CONFIG_SA1100_HACKKIT is not set |
diff --git a/arch/arm/configs/qil-a9260_defconfig b/arch/arm/configs/qil-a9260_defconfig index cd1d717903ac..9b32d0eb89ba 100644 --- a/arch/arm/configs/qil-a9260_defconfig +++ b/arch/arm/configs/qil-a9260_defconfig | |||
| @@ -727,7 +727,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y | |||
| 727 | # Watchdog Device Drivers | 727 | # Watchdog Device Drivers |
| 728 | # | 728 | # |
| 729 | # CONFIG_SOFT_WATCHDOG is not set | 729 | # CONFIG_SOFT_WATCHDOG is not set |
| 730 | # CONFIG_AT91SAM9_WATCHDOG is not set | 730 | # CONFIG_AT91SAM9X_WATCHDOG is not set |
| 731 | 731 | ||
| 732 | # | 732 | # |
| 733 | # USB-based Watchdog Cards | 733 | # USB-based Watchdog Cards |
diff --git a/arch/arm/configs/shannon_defconfig b/arch/arm/configs/shannon_defconfig index d052c8f80515..984f7096a533 100644 --- a/arch/arm/configs/shannon_defconfig +++ b/arch/arm/configs/shannon_defconfig | |||
| @@ -87,7 +87,6 @@ CONFIG_ARCH_SA1100=y | |||
| 87 | # CONFIG_SA1100_COLLIE is not set | 87 | # CONFIG_SA1100_COLLIE is not set |
| 88 | # CONFIG_SA1100_H3100 is not set | 88 | # CONFIG_SA1100_H3100 is not set |
| 89 | # CONFIG_SA1100_H3600 is not set | 89 | # CONFIG_SA1100_H3600 is not set |
| 90 | # CONFIG_SA1100_H3800 is not set | ||
| 91 | # CONFIG_SA1100_BADGE4 is not set | 90 | # CONFIG_SA1100_BADGE4 is not set |
| 92 | # CONFIG_SA1100_JORNADA720 is not set | 91 | # CONFIG_SA1100_JORNADA720 is not set |
| 93 | # CONFIG_SA1100_HACKKIT is not set | 92 | # CONFIG_SA1100_HACKKIT is not set |
diff --git a/arch/arm/configs/shark_defconfig b/arch/arm/configs/shark_defconfig index 9b6561d119af..90235bf7a1de 100644 --- a/arch/arm/configs/shark_defconfig +++ b/arch/arm/configs/shark_defconfig | |||
| @@ -1,88 +1,174 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.12-git3 | 3 | # Linux kernel version: 2.6.28-git6 |
| 4 | # Sat Jul 16 15:21:47 2005 | 4 | # Thu Jan 8 17:14:47 2009 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | # CONFIG_GENERIC_GPIO is not set | ||
| 9 | # CONFIG_GENERIC_TIME is not set | ||
| 10 | # CONFIG_GENERIC_CLOCKEVENTS is not set | ||
| 7 | CONFIG_MMU=y | 11 | CONFIG_MMU=y |
| 8 | CONFIG_UID16=y | 12 | # CONFIG_NO_IOPORT is not set |
| 13 | CONFIG_GENERIC_HARDIRQS=y | ||
| 14 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 16 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 17 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 9 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | ||
| 10 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 25 | CONFIG_ZONE_DMA=y | ||
| 26 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 27 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 11 | 29 | ||
| 12 | # | 30 | # |
| 13 | # Code maturity level options | 31 | # General setup |
| 14 | # | 32 | # |
| 15 | CONFIG_EXPERIMENTAL=y | 33 | CONFIG_EXPERIMENTAL=y |
| 16 | CONFIG_CLEAN_COMPILE=y | ||
| 17 | CONFIG_BROKEN_ON_SMP=y | 34 | CONFIG_BROKEN_ON_SMP=y |
| 18 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 35 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 19 | |||
| 20 | # | ||
| 21 | # General setup | ||
| 22 | # | ||
| 23 | CONFIG_LOCALVERSION="" | 36 | CONFIG_LOCALVERSION="" |
| 37 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 24 | CONFIG_SWAP=y | 38 | CONFIG_SWAP=y |
| 25 | CONFIG_SYSVIPC=y | 39 | CONFIG_SYSVIPC=y |
| 40 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 26 | # CONFIG_POSIX_MQUEUE is not set | 41 | # CONFIG_POSIX_MQUEUE is not set |
| 27 | # CONFIG_BSD_PROCESS_ACCT is not set | 42 | # CONFIG_BSD_PROCESS_ACCT is not set |
| 28 | CONFIG_SYSCTL=y | 43 | # CONFIG_TASKSTATS is not set |
| 29 | # CONFIG_AUDIT is not set | 44 | # CONFIG_AUDIT is not set |
| 30 | # CONFIG_HOTPLUG is not set | ||
| 31 | CONFIG_KOBJECT_UEVENT=y | ||
| 32 | # CONFIG_IKCONFIG is not set | 45 | # CONFIG_IKCONFIG is not set |
| 46 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 47 | # CONFIG_CGROUPS is not set | ||
| 48 | CONFIG_GROUP_SCHED=y | ||
| 49 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 50 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 51 | CONFIG_USER_SCHED=y | ||
| 52 | # CONFIG_CGROUP_SCHED is not set | ||
| 53 | CONFIG_SYSFS_DEPRECATED=y | ||
| 54 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 55 | # CONFIG_RELAY is not set | ||
| 56 | CONFIG_NAMESPACES=y | ||
| 57 | # CONFIG_UTS_NS is not set | ||
| 58 | # CONFIG_IPC_NS is not set | ||
| 59 | # CONFIG_USER_NS is not set | ||
| 60 | # CONFIG_PID_NS is not set | ||
| 61 | # CONFIG_BLK_DEV_INITRD is not set | ||
| 62 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 63 | CONFIG_SYSCTL=y | ||
| 33 | # CONFIG_EMBEDDED is not set | 64 | # CONFIG_EMBEDDED is not set |
| 65 | CONFIG_UID16=y | ||
| 66 | CONFIG_SYSCTL_SYSCALL=y | ||
| 34 | CONFIG_KALLSYMS=y | 67 | CONFIG_KALLSYMS=y |
| 35 | # CONFIG_KALLSYMS_ALL is not set | 68 | # CONFIG_KALLSYMS_ALL is not set |
| 36 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 69 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 70 | CONFIG_HOTPLUG=y | ||
| 37 | CONFIG_PRINTK=y | 71 | CONFIG_PRINTK=y |
| 38 | CONFIG_BUG=y | 72 | CONFIG_BUG=y |
| 73 | CONFIG_ELF_CORE=y | ||
| 74 | CONFIG_COMPAT_BRK=y | ||
| 39 | CONFIG_BASE_FULL=y | 75 | CONFIG_BASE_FULL=y |
| 40 | CONFIG_FUTEX=y | 76 | CONFIG_FUTEX=y |
| 77 | CONFIG_ANON_INODES=y | ||
| 41 | CONFIG_EPOLL=y | 78 | CONFIG_EPOLL=y |
| 42 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 79 | CONFIG_SIGNALFD=y |
| 80 | CONFIG_TIMERFD=y | ||
| 81 | CONFIG_EVENTFD=y | ||
| 43 | CONFIG_SHMEM=y | 82 | CONFIG_SHMEM=y |
| 44 | CONFIG_CC_ALIGN_FUNCTIONS=0 | 83 | CONFIG_AIO=y |
| 45 | CONFIG_CC_ALIGN_LABELS=0 | 84 | CONFIG_VM_EVENT_COUNTERS=y |
| 46 | CONFIG_CC_ALIGN_LOOPS=0 | 85 | CONFIG_PCI_QUIRKS=y |
| 47 | CONFIG_CC_ALIGN_JUMPS=0 | 86 | CONFIG_SLAB=y |
| 87 | # CONFIG_SLUB is not set | ||
| 88 | # CONFIG_SLOB is not set | ||
| 89 | # CONFIG_PROFILING is not set | ||
| 90 | CONFIG_HAVE_OPROFILE=y | ||
| 91 | # CONFIG_KPROBES is not set | ||
| 92 | CONFIG_HAVE_KPROBES=y | ||
| 93 | CONFIG_HAVE_KRETPROBES=y | ||
| 94 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 95 | CONFIG_SLABINFO=y | ||
| 96 | CONFIG_RT_MUTEXES=y | ||
| 48 | # CONFIG_TINY_SHMEM is not set | 97 | # CONFIG_TINY_SHMEM is not set |
| 49 | CONFIG_BASE_SMALL=0 | 98 | CONFIG_BASE_SMALL=0 |
| 50 | |||
| 51 | # | ||
| 52 | # Loadable module support | ||
| 53 | # | ||
| 54 | CONFIG_MODULES=y | 99 | CONFIG_MODULES=y |
| 100 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 55 | CONFIG_MODULE_UNLOAD=y | 101 | CONFIG_MODULE_UNLOAD=y |
| 56 | CONFIG_MODULE_FORCE_UNLOAD=y | 102 | CONFIG_MODULE_FORCE_UNLOAD=y |
| 57 | CONFIG_OBSOLETE_MODPARM=y | ||
| 58 | # CONFIG_MODVERSIONS is not set | 103 | # CONFIG_MODVERSIONS is not set |
| 59 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 104 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 60 | CONFIG_KMOD=y | 105 | CONFIG_KMOD=y |
| 106 | CONFIG_BLOCK=y | ||
| 107 | # CONFIG_LBD is not set | ||
| 108 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 109 | # CONFIG_BLK_DEV_BSG is not set | ||
| 110 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 111 | |||
| 112 | # | ||
| 113 | # IO Schedulers | ||
| 114 | # | ||
| 115 | CONFIG_IOSCHED_NOOP=y | ||
| 116 | CONFIG_IOSCHED_AS=y | ||
| 117 | CONFIG_IOSCHED_DEADLINE=y | ||
| 118 | CONFIG_IOSCHED_CFQ=y | ||
| 119 | # CONFIG_DEFAULT_AS is not set | ||
| 120 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 121 | CONFIG_DEFAULT_CFQ=y | ||
| 122 | # CONFIG_DEFAULT_NOOP is not set | ||
| 123 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 124 | CONFIG_CLASSIC_RCU=y | ||
| 125 | # CONFIG_TREE_RCU is not set | ||
| 126 | # CONFIG_PREEMPT_RCU is not set | ||
| 127 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 128 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 129 | # CONFIG_FREEZER is not set | ||
| 61 | 130 | ||
| 62 | # | 131 | # |
| 63 | # System Type | 132 | # System Type |
| 64 | # | 133 | # |
| 65 | # CONFIG_ARCH_CLPS7500 is not set | 134 | # CONFIG_ARCH_AAEC2000 is not set |
| 135 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 136 | # CONFIG_ARCH_REALVIEW is not set | ||
| 137 | # CONFIG_ARCH_VERSATILE is not set | ||
| 138 | # CONFIG_ARCH_AT91 is not set | ||
| 66 | # CONFIG_ARCH_CLPS711X is not set | 139 | # CONFIG_ARCH_CLPS711X is not set |
| 67 | # CONFIG_ARCH_CO285 is not set | ||
| 68 | # CONFIG_ARCH_EBSA110 is not set | 140 | # CONFIG_ARCH_EBSA110 is not set |
| 141 | # CONFIG_ARCH_EP93XX is not set | ||
| 69 | # CONFIG_ARCH_FOOTBRIDGE is not set | 142 | # CONFIG_ARCH_FOOTBRIDGE is not set |
| 70 | # CONFIG_ARCH_INTEGRATOR is not set | 143 | # CONFIG_ARCH_NETX is not set |
| 71 | # CONFIG_ARCH_IOP3XX is not set | 144 | # CONFIG_ARCH_H720X is not set |
| 72 | # CONFIG_ARCH_IXP4XX is not set | 145 | # CONFIG_ARCH_IMX is not set |
| 146 | # CONFIG_ARCH_IOP13XX is not set | ||
| 147 | # CONFIG_ARCH_IOP32X is not set | ||
| 148 | # CONFIG_ARCH_IOP33X is not set | ||
| 149 | # CONFIG_ARCH_IXP23XX is not set | ||
| 73 | # CONFIG_ARCH_IXP2000 is not set | 150 | # CONFIG_ARCH_IXP2000 is not set |
| 151 | # CONFIG_ARCH_IXP4XX is not set | ||
| 74 | # CONFIG_ARCH_L7200 is not set | 152 | # CONFIG_ARCH_L7200 is not set |
| 153 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 154 | # CONFIG_ARCH_KS8695 is not set | ||
| 155 | # CONFIG_ARCH_NS9XXX is not set | ||
| 156 | # CONFIG_ARCH_LOKI is not set | ||
| 157 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 158 | # CONFIG_ARCH_MXC is not set | ||
| 159 | # CONFIG_ARCH_ORION5X is not set | ||
| 160 | # CONFIG_ARCH_PNX4008 is not set | ||
| 75 | # CONFIG_ARCH_PXA is not set | 161 | # CONFIG_ARCH_PXA is not set |
| 76 | # CONFIG_ARCH_RPC is not set | 162 | # CONFIG_ARCH_RPC is not set |
| 77 | # CONFIG_ARCH_SA1100 is not set | 163 | # CONFIG_ARCH_SA1100 is not set |
| 78 | # CONFIG_ARCH_S3C2410 is not set | 164 | # CONFIG_ARCH_S3C2410 is not set |
| 165 | # CONFIG_ARCH_S3C64XX is not set | ||
| 79 | CONFIG_ARCH_SHARK=y | 166 | CONFIG_ARCH_SHARK=y |
| 80 | # CONFIG_ARCH_LH7A40X is not set | 167 | # CONFIG_ARCH_LH7A40X is not set |
| 168 | # CONFIG_ARCH_DAVINCI is not set | ||
| 81 | # CONFIG_ARCH_OMAP is not set | 169 | # CONFIG_ARCH_OMAP is not set |
| 82 | # CONFIG_ARCH_VERSATILE is not set | 170 | # CONFIG_ARCH_MSM is not set |
| 83 | # CONFIG_ARCH_IMX is not set | 171 | # CONFIG_ARCH_W90X900 is not set |
| 84 | # CONFIG_ARCH_H720X is not set | ||
| 85 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 86 | 172 | ||
| 87 | # | 173 | # |
| 88 | # Processor Type | 174 | # Processor Type |
| @@ -91,14 +177,20 @@ CONFIG_CPU_32=y | |||
| 91 | CONFIG_CPU_SA110=y | 177 | CONFIG_CPU_SA110=y |
| 92 | CONFIG_CPU_32v4=y | 178 | CONFIG_CPU_32v4=y |
| 93 | CONFIG_CPU_ABRT_EV4=y | 179 | CONFIG_CPU_ABRT_EV4=y |
| 180 | CONFIG_CPU_PABRT_NOIFAR=y | ||
| 94 | CONFIG_CPU_CACHE_V4WB=y | 181 | CONFIG_CPU_CACHE_V4WB=y |
| 95 | CONFIG_CPU_CACHE_VIVT=y | 182 | CONFIG_CPU_CACHE_VIVT=y |
| 96 | CONFIG_CPU_COPY_V4WB=y | 183 | CONFIG_CPU_COPY_V4WB=y |
| 97 | CONFIG_CPU_TLB_V4WB=y | 184 | CONFIG_CPU_TLB_V4WB=y |
| 185 | CONFIG_CPU_CP15=y | ||
| 186 | CONFIG_CPU_CP15_MMU=y | ||
| 98 | 187 | ||
| 99 | # | 188 | # |
| 100 | # Processor Features | 189 | # Processor Features |
| 101 | # | 190 | # |
| 191 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 192 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 193 | # CONFIG_OUTER_CACHE is not set | ||
| 102 | 194 | ||
| 103 | # | 195 | # |
| 104 | # Bus support | 196 | # Bus support |
| @@ -107,22 +199,40 @@ CONFIG_ISA=y | |||
| 107 | CONFIG_ISA_DMA=y | 199 | CONFIG_ISA_DMA=y |
| 108 | CONFIG_ISA_DMA_API=y | 200 | CONFIG_ISA_DMA_API=y |
| 109 | CONFIG_PCI=y | 201 | CONFIG_PCI=y |
| 202 | CONFIG_PCI_SYSCALL=y | ||
| 110 | CONFIG_PCI_HOST_VIA82C505=y | 203 | CONFIG_PCI_HOST_VIA82C505=y |
| 111 | CONFIG_PCI_LEGACY_PROC=y | 204 | # CONFIG_ARCH_SUPPORTS_MSI is not set |
| 112 | # CONFIG_PCI_NAMES is not set | 205 | CONFIG_PCI_LEGACY=y |
| 113 | # CONFIG_PCI_DEBUG is not set | 206 | # CONFIG_PCI_DEBUG is not set |
| 114 | |||
| 115 | # | ||
| 116 | # PCCARD (PCMCIA/CardBus) support | ||
| 117 | # | ||
| 118 | # CONFIG_PCCARD is not set | 207 | # CONFIG_PCCARD is not set |
| 119 | 208 | ||
| 120 | # | 209 | # |
| 121 | # Kernel Features | 210 | # Kernel Features |
| 122 | # | 211 | # |
| 123 | # CONFIG_SMP is not set | 212 | CONFIG_VMSPLIT_3G=y |
| 213 | # CONFIG_VMSPLIT_2G is not set | ||
| 214 | # CONFIG_VMSPLIT_1G is not set | ||
| 215 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 124 | # CONFIG_PREEMPT is not set | 216 | # CONFIG_PREEMPT is not set |
| 125 | # CONFIG_DISCONTIGMEM is not set | 217 | CONFIG_HZ=100 |
| 218 | # CONFIG_AEABI is not set | ||
| 219 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y | ||
| 220 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 221 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 222 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 223 | CONFIG_FLATMEM_MANUAL=y | ||
| 224 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 225 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 226 | CONFIG_FLATMEM=y | ||
| 227 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 228 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 229 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 230 | # CONFIG_RESOURCES_64BIT is not set | ||
| 231 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 232 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 233 | CONFIG_BOUNCE=y | ||
| 234 | CONFIG_VIRT_TO_BUS=y | ||
| 235 | CONFIG_UNEVICTABLE_LRU=y | ||
| 126 | CONFIG_LEDS=y | 236 | CONFIG_LEDS=y |
| 127 | CONFIG_LEDS_TIMER=y | 237 | CONFIG_LEDS_TIMER=y |
| 128 | # CONFIG_LEDS_CPU is not set | 238 | # CONFIG_LEDS_CPU is not set |
| @@ -135,6 +245,12 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 | |||
| 135 | CONFIG_ZBOOT_ROM_BSS=0x0 | 245 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 136 | CONFIG_CMDLINE="" | 246 | CONFIG_CMDLINE="" |
| 137 | # CONFIG_XIP_KERNEL is not set | 247 | # CONFIG_XIP_KERNEL is not set |
| 248 | # CONFIG_KEXEC is not set | ||
| 249 | |||
| 250 | # | ||
| 251 | # CPU Power Management | ||
| 252 | # | ||
| 253 | # CONFIG_CPU_IDLE is not set | ||
| 138 | 254 | ||
| 139 | # | 255 | # |
| 140 | # Floating point emulation | 256 | # Floating point emulation |
| @@ -143,13 +259,16 @@ CONFIG_CMDLINE="" | |||
| 143 | # | 259 | # |
| 144 | # At least one emulation must be selected | 260 | # At least one emulation must be selected |
| 145 | # | 261 | # |
| 146 | # CONFIG_FPE_NWFPE is not set | 262 | CONFIG_FPE_NWFPE=y |
| 147 | CONFIG_FPE_FASTFPE=y | 263 | # CONFIG_FPE_NWFPE_XP is not set |
| 264 | # CONFIG_FPE_FASTFPE is not set | ||
| 148 | 265 | ||
| 149 | # | 266 | # |
| 150 | # Userspace binary formats | 267 | # Userspace binary formats |
| 151 | # | 268 | # |
| 152 | CONFIG_BINFMT_ELF=y | 269 | CONFIG_BINFMT_ELF=y |
| 270 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 271 | CONFIG_HAVE_AOUT=y | ||
| 153 | # CONFIG_BINFMT_AOUT is not set | 272 | # CONFIG_BINFMT_AOUT is not set |
| 154 | # CONFIG_BINFMT_MISC is not set | 273 | # CONFIG_BINFMT_MISC is not set |
| 155 | # CONFIG_ARTHUR is not set | 274 | # CONFIG_ARTHUR is not set |
| @@ -158,44 +277,104 @@ CONFIG_BINFMT_ELF=y | |||
| 158 | # Power management options | 277 | # Power management options |
| 159 | # | 278 | # |
| 160 | # CONFIG_PM is not set | 279 | # CONFIG_PM is not set |
| 280 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 281 | CONFIG_NET=y | ||
| 161 | 282 | ||
| 162 | # | 283 | # |
| 163 | # Device Drivers | 284 | # Networking options |
| 164 | # | 285 | # |
| 286 | # CONFIG_NET_NS is not set | ||
| 287 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 288 | CONFIG_PACKET=y | ||
| 289 | # CONFIG_PACKET_MMAP is not set | ||
| 290 | CONFIG_UNIX=y | ||
| 291 | # CONFIG_NET_KEY is not set | ||
| 292 | CONFIG_INET=y | ||
| 293 | # CONFIG_IP_MULTICAST is not set | ||
| 294 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 295 | CONFIG_IP_FIB_HASH=y | ||
| 296 | # CONFIG_IP_PNP is not set | ||
| 297 | # CONFIG_NET_IPIP is not set | ||
| 298 | # CONFIG_NET_IPGRE is not set | ||
| 299 | # CONFIG_ARPD is not set | ||
| 300 | # CONFIG_SYN_COOKIES is not set | ||
| 301 | # CONFIG_INET_AH is not set | ||
| 302 | # CONFIG_INET_ESP is not set | ||
| 303 | # CONFIG_INET_IPCOMP is not set | ||
| 304 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 305 | # CONFIG_INET_TUNNEL is not set | ||
| 306 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
| 307 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
| 308 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
| 309 | # CONFIG_INET_LRO is not set | ||
| 310 | # CONFIG_INET_DIAG is not set | ||
| 311 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 312 | CONFIG_TCP_CONG_CUBIC=y | ||
| 313 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 314 | # CONFIG_TCP_MD5SIG is not set | ||
| 315 | # CONFIG_IPV6 is not set | ||
| 316 | # CONFIG_NETWORK_SECMARK is not set | ||
| 317 | # CONFIG_NETFILTER is not set | ||
| 318 | # CONFIG_IP_DCCP is not set | ||
| 319 | # CONFIG_IP_SCTP is not set | ||
| 320 | # CONFIG_TIPC is not set | ||
| 321 | # CONFIG_ATM is not set | ||
| 322 | # CONFIG_BRIDGE is not set | ||
| 323 | # CONFIG_NET_DSA is not set | ||
| 324 | # CONFIG_VLAN_8021Q is not set | ||
| 325 | # CONFIG_DECNET is not set | ||
| 326 | # CONFIG_LLC2 is not set | ||
| 327 | # CONFIG_IPX is not set | ||
| 328 | # CONFIG_ATALK is not set | ||
| 329 | # CONFIG_X25 is not set | ||
| 330 | # CONFIG_LAPB is not set | ||
| 331 | # CONFIG_ECONET is not set | ||
| 332 | # CONFIG_WAN_ROUTER is not set | ||
| 333 | # CONFIG_NET_SCHED is not set | ||
| 334 | # CONFIG_DCB is not set | ||
| 165 | 335 | ||
| 166 | # | 336 | # |
| 167 | # Generic Driver Options | 337 | # Network testing |
| 168 | # | 338 | # |
| 169 | # CONFIG_STANDALONE is not set | 339 | # CONFIG_NET_PKTGEN is not set |
| 170 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 340 | # CONFIG_HAMRADIO is not set |
| 171 | # CONFIG_FW_LOADER is not set | 341 | # CONFIG_CAN is not set |
| 172 | # CONFIG_DEBUG_DRIVER is not set | 342 | # CONFIG_IRDA is not set |
| 343 | # CONFIG_BT is not set | ||
| 344 | # CONFIG_AF_RXRPC is not set | ||
| 345 | # CONFIG_PHONET is not set | ||
| 346 | # CONFIG_WIRELESS is not set | ||
| 347 | # CONFIG_RFKILL is not set | ||
| 348 | # CONFIG_NET_9P is not set | ||
| 173 | 349 | ||
| 174 | # | 350 | # |
| 175 | # Memory Technology Devices (MTD) | 351 | # Device Drivers |
| 176 | # | 352 | # |
| 177 | # CONFIG_MTD is not set | ||
| 178 | 353 | ||
| 179 | # | 354 | # |
| 180 | # Parallel port support | 355 | # Generic Driver Options |
| 181 | # | 356 | # |
| 357 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 358 | # CONFIG_STANDALONE is not set | ||
| 359 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 360 | CONFIG_FW_LOADER=y | ||
| 361 | # CONFIG_FIRMWARE_IN_KERNEL is not set | ||
| 362 | CONFIG_EXTRA_FIRMWARE="" | ||
| 363 | # CONFIG_DEBUG_DRIVER is not set | ||
| 364 | # CONFIG_DEBUG_DEVRES is not set | ||
| 365 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 366 | # CONFIG_CONNECTOR is not set | ||
| 367 | # CONFIG_MTD is not set | ||
| 182 | CONFIG_PARPORT=m | 368 | CONFIG_PARPORT=m |
| 183 | CONFIG_PARPORT_PC=m | 369 | CONFIG_PARPORT_PC=m |
| 184 | # CONFIG_PARPORT_SERIAL is not set | 370 | # CONFIG_PARPORT_SERIAL is not set |
| 185 | # CONFIG_PARPORT_PC_FIFO is not set | 371 | # CONFIG_PARPORT_PC_FIFO is not set |
| 186 | # CONFIG_PARPORT_PC_SUPERIO is not set | 372 | # CONFIG_PARPORT_PC_SUPERIO is not set |
| 187 | # CONFIG_PARPORT_ARC is not set | ||
| 188 | # CONFIG_PARPORT_GSC is not set | 373 | # CONFIG_PARPORT_GSC is not set |
| 374 | # CONFIG_PARPORT_AX88796 is not set | ||
| 189 | # CONFIG_PARPORT_1284 is not set | 375 | # CONFIG_PARPORT_1284 is not set |
| 190 | |||
| 191 | # | ||
| 192 | # Plug and Play support | ||
| 193 | # | ||
| 194 | # CONFIG_PNP is not set | 376 | # CONFIG_PNP is not set |
| 195 | 377 | CONFIG_BLK_DEV=y | |
| 196 | # | ||
| 197 | # Block devices | ||
| 198 | # | ||
| 199 | # CONFIG_BLK_DEV_XD is not set | 378 | # CONFIG_BLK_DEV_XD is not set |
| 200 | # CONFIG_PARIDE is not set | 379 | # CONFIG_PARIDE is not set |
| 201 | # CONFIG_BLK_CPQ_DA is not set | 380 | # CONFIG_BLK_CPQ_DA is not set |
| @@ -210,52 +389,78 @@ CONFIG_BLK_DEV_LOOP=y | |||
| 210 | CONFIG_BLK_DEV_RAM=y | 389 | CONFIG_BLK_DEV_RAM=y |
| 211 | CONFIG_BLK_DEV_RAM_COUNT=16 | 390 | CONFIG_BLK_DEV_RAM_COUNT=16 |
| 212 | CONFIG_BLK_DEV_RAM_SIZE=4096 | 391 | CONFIG_BLK_DEV_RAM_SIZE=4096 |
| 213 | # CONFIG_BLK_DEV_INITRD is not set | 392 | # CONFIG_BLK_DEV_XIP is not set |
| 214 | CONFIG_INITRAMFS_SOURCE="" | ||
| 215 | # CONFIG_CDROM_PKTCDVD is not set | 393 | # CONFIG_CDROM_PKTCDVD is not set |
| 216 | |||
| 217 | # | ||
| 218 | # IO Schedulers | ||
| 219 | # | ||
| 220 | CONFIG_IOSCHED_NOOP=y | ||
| 221 | CONFIG_IOSCHED_AS=y | ||
| 222 | CONFIG_IOSCHED_DEADLINE=y | ||
| 223 | CONFIG_IOSCHED_CFQ=y | ||
| 224 | # CONFIG_ATA_OVER_ETH is not set | 394 | # CONFIG_ATA_OVER_ETH is not set |
| 225 | 395 | # CONFIG_BLK_DEV_HD is not set | |
| 226 | # | 396 | CONFIG_MISC_DEVICES=y |
| 227 | # ATA/ATAPI/MFM/RLL support | 397 | # CONFIG_PHANTOM is not set |
| 228 | # | 398 | # CONFIG_EEPROM_93CX6 is not set |
| 399 | # CONFIG_SGI_IOC4 is not set | ||
| 400 | # CONFIG_TIFM_CORE is not set | ||
| 401 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 402 | # CONFIG_HP_ILO is not set | ||
| 403 | # CONFIG_C2PORT is not set | ||
| 404 | CONFIG_HAVE_IDE=y | ||
| 229 | CONFIG_IDE=y | 405 | CONFIG_IDE=y |
| 230 | CONFIG_BLK_DEV_IDE=y | ||
| 231 | 406 | ||
| 232 | # | 407 | # |
| 233 | # Please see Documentation/ide.txt for help/info on IDE drives | 408 | # Please see Documentation/ide/ide.txt for help/info on IDE drives |
| 234 | # | 409 | # |
| 410 | CONFIG_IDE_ATAPI=y | ||
| 235 | # CONFIG_BLK_DEV_IDE_SATA is not set | 411 | # CONFIG_BLK_DEV_IDE_SATA is not set |
| 236 | CONFIG_BLK_DEV_IDEDISK=y | 412 | CONFIG_IDE_GD=y |
| 237 | # CONFIG_IDEDISK_MULTI_MODE is not set | 413 | CONFIG_IDE_GD_ATA=y |
| 414 | # CONFIG_IDE_GD_ATAPI is not set | ||
| 238 | CONFIG_BLK_DEV_IDECD=m | 415 | CONFIG_BLK_DEV_IDECD=m |
| 416 | CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y | ||
| 239 | # CONFIG_BLK_DEV_IDETAPE is not set | 417 | # CONFIG_BLK_DEV_IDETAPE is not set |
| 240 | CONFIG_BLK_DEV_IDEFLOPPY=y | ||
| 241 | # CONFIG_BLK_DEV_IDESCSI is not set | ||
| 242 | # CONFIG_IDE_TASK_IOCTL is not set | 418 | # CONFIG_IDE_TASK_IOCTL is not set |
| 419 | CONFIG_IDE_PROC_FS=y | ||
| 243 | 420 | ||
| 244 | # | 421 | # |
| 245 | # IDE chipset support/bugfixes | 422 | # IDE chipset support/bugfixes |
| 246 | # | 423 | # |
| 247 | CONFIG_IDE_GENERIC=y | 424 | # CONFIG_BLK_DEV_PLATFORM is not set |
| 248 | # CONFIG_BLK_DEV_IDEPCI is not set | 425 | |
| 426 | # | ||
| 427 | # PCI IDE chipsets support | ||
| 428 | # | ||
| 429 | # CONFIG_BLK_DEV_GENERIC is not set | ||
| 430 | # CONFIG_BLK_DEV_OPTI621 is not set | ||
| 431 | # CONFIG_BLK_DEV_AEC62XX is not set | ||
| 432 | # CONFIG_BLK_DEV_ALI15X3 is not set | ||
| 433 | # CONFIG_BLK_DEV_CMD64X is not set | ||
| 434 | # CONFIG_BLK_DEV_TRIFLEX is not set | ||
| 435 | # CONFIG_BLK_DEV_CS5520 is not set | ||
| 436 | # CONFIG_BLK_DEV_CS5530 is not set | ||
| 437 | # CONFIG_BLK_DEV_HPT366 is not set | ||
| 438 | # CONFIG_BLK_DEV_JMICRON is not set | ||
| 439 | # CONFIG_BLK_DEV_SC1200 is not set | ||
| 440 | # CONFIG_BLK_DEV_PIIX is not set | ||
| 441 | # CONFIG_BLK_DEV_IT8213 is not set | ||
| 442 | # CONFIG_BLK_DEV_IT821X is not set | ||
| 443 | # CONFIG_BLK_DEV_NS87415 is not set | ||
| 444 | # CONFIG_BLK_DEV_PDC202XX_OLD is not set | ||
| 445 | # CONFIG_BLK_DEV_PDC202XX_NEW is not set | ||
| 446 | # CONFIG_BLK_DEV_SVWKS is not set | ||
| 447 | # CONFIG_BLK_DEV_SIIMAGE is not set | ||
| 448 | # CONFIG_BLK_DEV_SL82C105 is not set | ||
| 449 | # CONFIG_BLK_DEV_SLC90E66 is not set | ||
| 450 | # CONFIG_BLK_DEV_TRM290 is not set | ||
| 451 | # CONFIG_BLK_DEV_VIA82CXXX is not set | ||
| 452 | # CONFIG_BLK_DEV_TC86C001 is not set | ||
| 249 | CONFIG_IDE_ARM=y | 453 | CONFIG_IDE_ARM=y |
| 250 | # CONFIG_IDE_CHIPSETS is not set | ||
| 251 | # CONFIG_BLK_DEV_IDEDMA is not set | 454 | # CONFIG_BLK_DEV_IDEDMA is not set |
| 252 | # CONFIG_IDEDMA_AUTO is not set | ||
| 253 | # CONFIG_BLK_DEV_HD is not set | ||
| 254 | 455 | ||
| 255 | # | 456 | # |
| 256 | # SCSI device support | 457 | # SCSI device support |
| 257 | # | 458 | # |
| 459 | # CONFIG_RAID_ATTRS is not set | ||
| 258 | CONFIG_SCSI=m | 460 | CONFIG_SCSI=m |
| 461 | CONFIG_SCSI_DMA=y | ||
| 462 | # CONFIG_SCSI_TGT is not set | ||
| 463 | # CONFIG_SCSI_NETLINK is not set | ||
| 259 | CONFIG_SCSI_PROC_FS=y | 464 | CONFIG_SCSI_PROC_FS=y |
| 260 | 465 | ||
| 261 | # | 466 | # |
| @@ -275,17 +480,20 @@ CONFIG_CHR_DEV_SG=m | |||
| 275 | # CONFIG_SCSI_MULTI_LUN is not set | 480 | # CONFIG_SCSI_MULTI_LUN is not set |
| 276 | # CONFIG_SCSI_CONSTANTS is not set | 481 | # CONFIG_SCSI_CONSTANTS is not set |
| 277 | # CONFIG_SCSI_LOGGING is not set | 482 | # CONFIG_SCSI_LOGGING is not set |
| 483 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 484 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 278 | 485 | ||
| 279 | # | 486 | # |
| 280 | # SCSI Transport Attributes | 487 | # SCSI Transports |
| 281 | # | 488 | # |
| 282 | # CONFIG_SCSI_SPI_ATTRS is not set | 489 | # CONFIG_SCSI_SPI_ATTRS is not set |
| 283 | # CONFIG_SCSI_FC_ATTRS is not set | 490 | # CONFIG_SCSI_FC_ATTRS is not set |
| 284 | # CONFIG_SCSI_ISCSI_ATTRS is not set | 491 | # CONFIG_SCSI_ISCSI_ATTRS is not set |
| 285 | 492 | # CONFIG_SCSI_SAS_LIBSAS is not set | |
| 286 | # | 493 | # CONFIG_SCSI_SRP_ATTRS is not set |
| 287 | # SCSI low-level drivers | 494 | CONFIG_SCSI_LOWLEVEL=y |
| 288 | # | 495 | # CONFIG_ISCSI_TCP is not set |
| 496 | # CONFIG_SCSI_CXGB3_ISCSI is not set | ||
| 289 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | 497 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set |
| 290 | # CONFIG_SCSI_3W_9XXX is not set | 498 | # CONFIG_SCSI_3W_9XXX is not set |
| 291 | # CONFIG_SCSI_7000FASST is not set | 499 | # CONFIG_SCSI_7000FASST is not set |
| @@ -296,12 +504,18 @@ CONFIG_CHR_DEV_SG=m | |||
| 296 | # CONFIG_SCSI_AIC7XXX is not set | 504 | # CONFIG_SCSI_AIC7XXX is not set |
| 297 | # CONFIG_SCSI_AIC7XXX_OLD is not set | 505 | # CONFIG_SCSI_AIC7XXX_OLD is not set |
| 298 | # CONFIG_SCSI_AIC79XX is not set | 506 | # CONFIG_SCSI_AIC79XX is not set |
| 507 | # CONFIG_SCSI_AIC94XX is not set | ||
| 299 | # CONFIG_SCSI_DPT_I2O is not set | 508 | # CONFIG_SCSI_DPT_I2O is not set |
| 509 | # CONFIG_SCSI_ADVANSYS is not set | ||
| 300 | # CONFIG_SCSI_IN2000 is not set | 510 | # CONFIG_SCSI_IN2000 is not set |
| 511 | # CONFIG_SCSI_ARCMSR is not set | ||
| 301 | # CONFIG_MEGARAID_NEWGEN is not set | 512 | # CONFIG_MEGARAID_NEWGEN is not set |
| 302 | # CONFIG_MEGARAID_LEGACY is not set | 513 | # CONFIG_MEGARAID_LEGACY is not set |
| 303 | # CONFIG_SCSI_SATA is not set | 514 | # CONFIG_MEGARAID_SAS is not set |
| 515 | # CONFIG_SCSI_HPTIOP is not set | ||
| 304 | # CONFIG_SCSI_BUSLOGIC is not set | 516 | # CONFIG_SCSI_BUSLOGIC is not set |
| 517 | # CONFIG_LIBFC is not set | ||
| 518 | # CONFIG_FCOE is not set | ||
| 305 | # CONFIG_SCSI_DMX3191D is not set | 519 | # CONFIG_SCSI_DMX3191D is not set |
| 306 | # CONFIG_SCSI_DTC3280 is not set | 520 | # CONFIG_SCSI_DTC3280 is not set |
| 307 | # CONFIG_SCSI_EATA is not set | 521 | # CONFIG_SCSI_EATA is not set |
| @@ -314,20 +528,15 @@ CONFIG_CHR_DEV_SG=m | |||
| 314 | # CONFIG_SCSI_INIA100 is not set | 528 | # CONFIG_SCSI_INIA100 is not set |
| 315 | # CONFIG_SCSI_PPA is not set | 529 | # CONFIG_SCSI_PPA is not set |
| 316 | # CONFIG_SCSI_IMM is not set | 530 | # CONFIG_SCSI_IMM is not set |
| 531 | # CONFIG_SCSI_MVSAS is not set | ||
| 317 | # CONFIG_SCSI_NCR53C406A is not set | 532 | # CONFIG_SCSI_NCR53C406A is not set |
| 533 | # CONFIG_SCSI_STEX is not set | ||
| 318 | # CONFIG_SCSI_SYM53C8XX_2 is not set | 534 | # CONFIG_SCSI_SYM53C8XX_2 is not set |
| 319 | # CONFIG_SCSI_IPR is not set | ||
| 320 | # CONFIG_SCSI_PAS16 is not set | 535 | # CONFIG_SCSI_PAS16 is not set |
| 321 | # CONFIG_SCSI_PSI240I is not set | ||
| 322 | # CONFIG_SCSI_QLOGIC_FAS is not set | 536 | # CONFIG_SCSI_QLOGIC_FAS is not set |
| 323 | # CONFIG_SCSI_QLOGIC_FC is not set | ||
| 324 | # CONFIG_SCSI_QLOGIC_1280 is not set | 537 | # CONFIG_SCSI_QLOGIC_1280 is not set |
| 325 | CONFIG_SCSI_QLA2XXX=m | 538 | # CONFIG_SCSI_QLA_FC is not set |
| 326 | # CONFIG_SCSI_QLA21XX is not set | 539 | # CONFIG_SCSI_QLA_ISCSI is not set |
| 327 | # CONFIG_SCSI_QLA22XX is not set | ||
| 328 | # CONFIG_SCSI_QLA2300 is not set | ||
| 329 | # CONFIG_SCSI_QLA2322 is not set | ||
| 330 | # CONFIG_SCSI_QLA6312 is not set | ||
| 331 | # CONFIG_SCSI_LPFC is not set | 540 | # CONFIG_SCSI_LPFC is not set |
| 332 | # CONFIG_SCSI_SYM53C416 is not set | 541 | # CONFIG_SCSI_SYM53C416 is not set |
| 333 | # CONFIG_SCSI_DC395x is not set | 542 | # CONFIG_SCSI_DC395x is not set |
| @@ -336,123 +545,57 @@ CONFIG_SCSI_QLA2XXX=m | |||
| 336 | # CONFIG_SCSI_U14_34F is not set | 545 | # CONFIG_SCSI_U14_34F is not set |
| 337 | # CONFIG_SCSI_NSP32 is not set | 546 | # CONFIG_SCSI_NSP32 is not set |
| 338 | # CONFIG_SCSI_DEBUG is not set | 547 | # CONFIG_SCSI_DEBUG is not set |
| 339 | 548 | # CONFIG_SCSI_SRP is not set | |
| 340 | # | 549 | # CONFIG_SCSI_DH is not set |
| 341 | # Multi-device support (RAID and LVM) | 550 | # CONFIG_ATA is not set |
| 342 | # | ||
| 343 | # CONFIG_MD is not set | 551 | # CONFIG_MD is not set |
| 344 | |||
| 345 | # | ||
| 346 | # Fusion MPT device support | ||
| 347 | # | ||
| 348 | # CONFIG_FUSION is not set | 552 | # CONFIG_FUSION is not set |
| 349 | # CONFIG_FUSION_SPI is not set | ||
| 350 | # CONFIG_FUSION_FC is not set | ||
| 351 | 553 | ||
| 352 | # | 554 | # |
| 353 | # IEEE 1394 (FireWire) support | 555 | # IEEE 1394 (FireWire) support |
| 354 | # | 556 | # |
| 355 | # CONFIG_IEEE1394 is not set | ||
| 356 | 557 | ||
| 357 | # | 558 | # |
| 358 | # I2O device support | 559 | # Enable only one of the two stacks, unless you know what you are doing |
| 359 | # | 560 | # |
| 561 | # CONFIG_FIREWIRE is not set | ||
| 562 | # CONFIG_IEEE1394 is not set | ||
| 360 | # CONFIG_I2O is not set | 563 | # CONFIG_I2O is not set |
| 361 | |||
| 362 | # | ||
| 363 | # Networking support | ||
| 364 | # | ||
| 365 | CONFIG_NET=y | ||
| 366 | |||
| 367 | # | ||
| 368 | # Networking options | ||
| 369 | # | ||
| 370 | CONFIG_PACKET=y | ||
| 371 | # CONFIG_PACKET_MMAP is not set | ||
| 372 | CONFIG_UNIX=y | ||
| 373 | # CONFIG_NET_KEY is not set | ||
| 374 | CONFIG_INET=y | ||
| 375 | # CONFIG_IP_MULTICAST is not set | ||
| 376 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 377 | # CONFIG_IP_PNP is not set | ||
| 378 | # CONFIG_NET_IPIP is not set | ||
| 379 | # CONFIG_NET_IPGRE is not set | ||
| 380 | # CONFIG_ARPD is not set | ||
| 381 | # CONFIG_SYN_COOKIES is not set | ||
| 382 | # CONFIG_INET_AH is not set | ||
| 383 | # CONFIG_INET_ESP is not set | ||
| 384 | # CONFIG_INET_IPCOMP is not set | ||
| 385 | # CONFIG_INET_TUNNEL is not set | ||
| 386 | CONFIG_IP_TCPDIAG=y | ||
| 387 | # CONFIG_IP_TCPDIAG_IPV6 is not set | ||
| 388 | # CONFIG_IPV6 is not set | ||
| 389 | # CONFIG_NETFILTER is not set | ||
| 390 | |||
| 391 | # | ||
| 392 | # SCTP Configuration (EXPERIMENTAL) | ||
| 393 | # | ||
| 394 | # CONFIG_IP_SCTP is not set | ||
| 395 | # CONFIG_ATM is not set | ||
| 396 | # CONFIG_BRIDGE is not set | ||
| 397 | # CONFIG_VLAN_8021Q is not set | ||
| 398 | # CONFIG_DECNET is not set | ||
| 399 | # CONFIG_LLC2 is not set | ||
| 400 | # CONFIG_IPX is not set | ||
| 401 | # CONFIG_ATALK is not set | ||
| 402 | # CONFIG_X25 is not set | ||
| 403 | # CONFIG_LAPB is not set | ||
| 404 | # CONFIG_NET_DIVERT is not set | ||
| 405 | # CONFIG_ECONET is not set | ||
| 406 | # CONFIG_WAN_ROUTER is not set | ||
| 407 | |||
| 408 | # | ||
| 409 | # QoS and/or fair queueing | ||
| 410 | # | ||
| 411 | # CONFIG_NET_SCHED is not set | ||
| 412 | # CONFIG_NET_CLS_ROUTE is not set | ||
| 413 | |||
| 414 | # | ||
| 415 | # Network testing | ||
| 416 | # | ||
| 417 | # CONFIG_NET_PKTGEN is not set | ||
| 418 | # CONFIG_NETPOLL is not set | ||
| 419 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 420 | # CONFIG_HAMRADIO is not set | ||
| 421 | # CONFIG_IRDA is not set | ||
| 422 | # CONFIG_BT is not set | ||
| 423 | CONFIG_NETDEVICES=y | 564 | CONFIG_NETDEVICES=y |
| 424 | # CONFIG_DUMMY is not set | 565 | # CONFIG_DUMMY is not set |
| 425 | # CONFIG_BONDING is not set | 566 | # CONFIG_BONDING is not set |
| 567 | # CONFIG_MACVLAN is not set | ||
| 426 | # CONFIG_EQUALIZER is not set | 568 | # CONFIG_EQUALIZER is not set |
| 427 | # CONFIG_TUN is not set | 569 | # CONFIG_TUN is not set |
| 428 | 570 | # CONFIG_VETH is not set | |
| 429 | # | ||
| 430 | # ARCnet devices | ||
| 431 | # | ||
| 432 | # CONFIG_ARCNET is not set | 571 | # CONFIG_ARCNET is not set |
| 433 | 572 | # CONFIG_PHYLIB is not set | |
| 434 | # | ||
| 435 | # Ethernet (10 or 100Mbit) | ||
| 436 | # | ||
| 437 | CONFIG_NET_ETHERNET=y | 573 | CONFIG_NET_ETHERNET=y |
| 438 | # CONFIG_MII is not set | 574 | # CONFIG_MII is not set |
| 575 | # CONFIG_AX88796 is not set | ||
| 439 | # CONFIG_HAPPYMEAL is not set | 576 | # CONFIG_HAPPYMEAL is not set |
| 440 | # CONFIG_SUNGEM is not set | 577 | # CONFIG_SUNGEM is not set |
| 578 | # CONFIG_CASSINI is not set | ||
| 441 | # CONFIG_NET_VENDOR_3COM is not set | 579 | # CONFIG_NET_VENDOR_3COM is not set |
| 442 | # CONFIG_LANCE is not set | 580 | # CONFIG_LANCE is not set |
| 443 | # CONFIG_NET_VENDOR_SMC is not set | 581 | # CONFIG_NET_VENDOR_SMC is not set |
| 444 | # CONFIG_SMC91X is not set | 582 | # CONFIG_SMC91X is not set |
| 445 | # CONFIG_DM9000 is not set | 583 | # CONFIG_DM9000 is not set |
| 584 | # CONFIG_SMC911X is not set | ||
| 585 | # CONFIG_SMSC911X is not set | ||
| 446 | # CONFIG_NET_VENDOR_RACAL is not set | 586 | # CONFIG_NET_VENDOR_RACAL is not set |
| 447 | |||
| 448 | # | ||
| 449 | # Tulip family network device support | ||
| 450 | # | ||
| 451 | # CONFIG_NET_TULIP is not set | 587 | # CONFIG_NET_TULIP is not set |
| 452 | # CONFIG_AT1700 is not set | 588 | # CONFIG_AT1700 is not set |
| 453 | # CONFIG_DEPCA is not set | 589 | # CONFIG_DEPCA is not set |
| 454 | # CONFIG_HP100 is not set | 590 | # CONFIG_HP100 is not set |
| 455 | # CONFIG_NET_ISA is not set | 591 | # CONFIG_NET_ISA is not set |
| 592 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 593 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 594 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 595 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 596 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 597 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 598 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 456 | CONFIG_NET_PCI=y | 599 | CONFIG_NET_PCI=y |
| 457 | # CONFIG_PCNET32 is not set | 600 | # CONFIG_PCNET32 is not set |
| 458 | # CONFIG_AMD8111_ETH is not set | 601 | # CONFIG_AMD8111_ETH is not set |
| @@ -462,56 +605,69 @@ CONFIG_NET_PCI=y | |||
| 462 | # CONFIG_B44 is not set | 605 | # CONFIG_B44 is not set |
| 463 | # CONFIG_FORCEDETH is not set | 606 | # CONFIG_FORCEDETH is not set |
| 464 | CONFIG_CS89x0=y | 607 | CONFIG_CS89x0=y |
| 465 | # CONFIG_DGRS is not set | 608 | CONFIG_CS89x0_NOEEPROM=y |
| 466 | # CONFIG_EEPRO100 is not set | ||
| 467 | # CONFIG_E100 is not set | 609 | # CONFIG_E100 is not set |
| 468 | # CONFIG_FEALNX is not set | 610 | # CONFIG_FEALNX is not set |
| 469 | # CONFIG_NATSEMI is not set | 611 | # CONFIG_NATSEMI is not set |
| 470 | # CONFIG_NE2K_PCI is not set | 612 | # CONFIG_NE2K_PCI is not set |
| 471 | # CONFIG_8139CP is not set | 613 | # CONFIG_8139CP is not set |
| 472 | # CONFIG_8139TOO is not set | 614 | # CONFIG_8139TOO is not set |
| 615 | # CONFIG_R6040 is not set | ||
| 473 | # CONFIG_SIS900 is not set | 616 | # CONFIG_SIS900 is not set |
| 474 | # CONFIG_EPIC100 is not set | 617 | # CONFIG_EPIC100 is not set |
| 618 | # CONFIG_SMSC9420 is not set | ||
| 475 | # CONFIG_SUNDANCE is not set | 619 | # CONFIG_SUNDANCE is not set |
| 476 | # CONFIG_TLAN is not set | 620 | # CONFIG_TLAN is not set |
| 477 | # CONFIG_VIA_RHINE is not set | 621 | # CONFIG_VIA_RHINE is not set |
| 622 | # CONFIG_SC92031 is not set | ||
| 478 | # CONFIG_NET_POCKET is not set | 623 | # CONFIG_NET_POCKET is not set |
| 479 | 624 | # CONFIG_ATL2 is not set | |
| 480 | # | 625 | CONFIG_NETDEV_1000=y |
| 481 | # Ethernet (1000 Mbit) | ||
| 482 | # | ||
| 483 | # CONFIG_ACENIC is not set | 626 | # CONFIG_ACENIC is not set |
| 484 | # CONFIG_DL2K is not set | 627 | # CONFIG_DL2K is not set |
| 485 | # CONFIG_E1000 is not set | 628 | # CONFIG_E1000 is not set |
| 629 | # CONFIG_E1000E is not set | ||
| 630 | # CONFIG_IP1000 is not set | ||
| 631 | # CONFIG_IGB is not set | ||
| 486 | # CONFIG_NS83820 is not set | 632 | # CONFIG_NS83820 is not set |
| 487 | # CONFIG_HAMACHI is not set | 633 | # CONFIG_HAMACHI is not set |
| 488 | # CONFIG_YELLOWFIN is not set | 634 | # CONFIG_YELLOWFIN is not set |
| 489 | # CONFIG_R8169 is not set | 635 | # CONFIG_R8169 is not set |
| 636 | # CONFIG_SIS190 is not set | ||
| 490 | # CONFIG_SKGE is not set | 637 | # CONFIG_SKGE is not set |
| 491 | # CONFIG_SK98LIN is not set | 638 | # CONFIG_SKY2 is not set |
| 492 | # CONFIG_VIA_VELOCITY is not set | 639 | # CONFIG_VIA_VELOCITY is not set |
| 493 | # CONFIG_TIGON3 is not set | 640 | # CONFIG_TIGON3 is not set |
| 494 | # CONFIG_BNX2 is not set | 641 | # CONFIG_BNX2 is not set |
| 495 | 642 | # CONFIG_QLA3XXX is not set | |
| 496 | # | 643 | # CONFIG_ATL1 is not set |
| 497 | # Ethernet (10000 Mbit) | 644 | # CONFIG_ATL1E is not set |
| 498 | # | 645 | # CONFIG_JME is not set |
| 646 | CONFIG_NETDEV_10000=y | ||
| 647 | # CONFIG_CHELSIO_T1 is not set | ||
| 648 | CONFIG_CHELSIO_T3_DEPENDS=y | ||
| 649 | # CONFIG_CHELSIO_T3 is not set | ||
| 650 | # CONFIG_ENIC is not set | ||
| 651 | # CONFIG_IXGBE is not set | ||
| 499 | # CONFIG_IXGB is not set | 652 | # CONFIG_IXGB is not set |
| 500 | # CONFIG_S2IO is not set | 653 | # CONFIG_S2IO is not set |
| 501 | 654 | # CONFIG_MYRI10GE is not set | |
| 502 | # | 655 | # CONFIG_NETXEN_NIC is not set |
| 503 | # Token Ring devices | 656 | # CONFIG_NIU is not set |
| 504 | # | 657 | # CONFIG_MLX4_EN is not set |
| 658 | # CONFIG_MLX4_CORE is not set | ||
| 659 | # CONFIG_TEHUTI is not set | ||
| 660 | # CONFIG_BNX2X is not set | ||
| 661 | # CONFIG_QLGE is not set | ||
| 662 | # CONFIG_SFC is not set | ||
| 505 | # CONFIG_TR is not set | 663 | # CONFIG_TR is not set |
| 506 | 664 | ||
| 507 | # | 665 | # |
| 508 | # Wireless LAN (non-hamradio) | 666 | # Wireless LAN |
| 509 | # | ||
| 510 | # CONFIG_NET_RADIO is not set | ||
| 511 | |||
| 512 | # | ||
| 513 | # Wan interfaces | ||
| 514 | # | 667 | # |
| 668 | # CONFIG_WLAN_PRE80211 is not set | ||
| 669 | # CONFIG_WLAN_80211 is not set | ||
| 670 | # CONFIG_IWLWIFI_LEDS is not set | ||
| 515 | # CONFIG_WAN is not set | 671 | # CONFIG_WAN is not set |
| 516 | # CONFIG_FDDI is not set | 672 | # CONFIG_FDDI is not set |
| 517 | # CONFIG_HIPPI is not set | 673 | # CONFIG_HIPPI is not set |
| @@ -519,18 +675,17 @@ CONFIG_CS89x0=y | |||
| 519 | # CONFIG_PPP is not set | 675 | # CONFIG_PPP is not set |
| 520 | # CONFIG_SLIP is not set | 676 | # CONFIG_SLIP is not set |
| 521 | # CONFIG_NET_FC is not set | 677 | # CONFIG_NET_FC is not set |
| 522 | # CONFIG_SHAPER is not set | ||
| 523 | # CONFIG_NETCONSOLE is not set | 678 | # CONFIG_NETCONSOLE is not set |
| 524 | 679 | # CONFIG_NETPOLL is not set | |
| 525 | # | 680 | # CONFIG_NET_POLL_CONTROLLER is not set |
| 526 | # ISDN subsystem | ||
| 527 | # | ||
| 528 | # CONFIG_ISDN is not set | 681 | # CONFIG_ISDN is not set |
| 529 | 682 | ||
| 530 | # | 683 | # |
| 531 | # Input device support | 684 | # Input device support |
| 532 | # | 685 | # |
| 533 | CONFIG_INPUT=y | 686 | CONFIG_INPUT=y |
| 687 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 688 | # CONFIG_INPUT_POLLDEV is not set | ||
| 534 | 689 | ||
| 535 | # | 690 | # |
| 536 | # Userland interfaces | 691 | # Userland interfaces |
| @@ -540,7 +695,6 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y | |||
| 540 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | 695 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 |
| 541 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | 696 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 |
| 542 | # CONFIG_INPUT_JOYDEV is not set | 697 | # CONFIG_INPUT_JOYDEV is not set |
| 543 | # CONFIG_INPUT_TSDEV is not set | ||
| 544 | # CONFIG_INPUT_EVDEV is not set | 698 | # CONFIG_INPUT_EVDEV is not set |
| 545 | # CONFIG_INPUT_EVBUG is not set | 699 | # CONFIG_INPUT_EVBUG is not set |
| 546 | 700 | ||
| @@ -553,14 +707,25 @@ CONFIG_KEYBOARD_ATKBD=y | |||
| 553 | # CONFIG_KEYBOARD_LKKBD is not set | 707 | # CONFIG_KEYBOARD_LKKBD is not set |
| 554 | # CONFIG_KEYBOARD_XTKBD is not set | 708 | # CONFIG_KEYBOARD_XTKBD is not set |
| 555 | # CONFIG_KEYBOARD_NEWTON is not set | 709 | # CONFIG_KEYBOARD_NEWTON is not set |
| 710 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 556 | CONFIG_INPUT_MOUSE=y | 711 | CONFIG_INPUT_MOUSE=y |
| 557 | CONFIG_MOUSE_PS2=y | 712 | CONFIG_MOUSE_PS2=y |
| 713 | CONFIG_MOUSE_PS2_ALPS=y | ||
| 714 | CONFIG_MOUSE_PS2_LOGIPS2PP=y | ||
| 715 | CONFIG_MOUSE_PS2_SYNAPTICS=y | ||
| 716 | CONFIG_MOUSE_PS2_LIFEBOOK=y | ||
| 717 | CONFIG_MOUSE_PS2_TRACKPOINT=y | ||
| 718 | # CONFIG_MOUSE_PS2_ELANTECH is not set | ||
| 719 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | ||
| 558 | # CONFIG_MOUSE_SERIAL is not set | 720 | # CONFIG_MOUSE_SERIAL is not set |
| 721 | # CONFIG_MOUSE_APPLETOUCH is not set | ||
| 722 | # CONFIG_MOUSE_BCM5974 is not set | ||
| 559 | # CONFIG_MOUSE_INPORT is not set | 723 | # CONFIG_MOUSE_INPORT is not set |
| 560 | # CONFIG_MOUSE_LOGIBM is not set | 724 | # CONFIG_MOUSE_LOGIBM is not set |
| 561 | # CONFIG_MOUSE_PC110PAD is not set | 725 | # CONFIG_MOUSE_PC110PAD is not set |
| 562 | # CONFIG_MOUSE_VSXXXAA is not set | 726 | # CONFIG_MOUSE_VSXXXAA is not set |
| 563 | # CONFIG_INPUT_JOYSTICK is not set | 727 | # CONFIG_INPUT_JOYSTICK is not set |
| 728 | # CONFIG_INPUT_TABLET is not set | ||
| 564 | # CONFIG_INPUT_TOUCHSCREEN is not set | 729 | # CONFIG_INPUT_TOUCHSCREEN is not set |
| 565 | # CONFIG_INPUT_MISC is not set | 730 | # CONFIG_INPUT_MISC is not set |
| 566 | 731 | ||
| @@ -580,16 +745,22 @@ CONFIG_SERIO_LIBPS2=y | |||
| 580 | # Character devices | 745 | # Character devices |
| 581 | # | 746 | # |
| 582 | CONFIG_VT=y | 747 | CONFIG_VT=y |
| 748 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 583 | CONFIG_VT_CONSOLE=y | 749 | CONFIG_VT_CONSOLE=y |
| 584 | CONFIG_HW_CONSOLE=y | 750 | CONFIG_HW_CONSOLE=y |
| 751 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 752 | CONFIG_DEVKMEM=y | ||
| 585 | # CONFIG_SERIAL_NONSTANDARD is not set | 753 | # CONFIG_SERIAL_NONSTANDARD is not set |
| 754 | # CONFIG_NOZOMI is not set | ||
| 586 | 755 | ||
| 587 | # | 756 | # |
| 588 | # Serial drivers | 757 | # Serial drivers |
| 589 | # | 758 | # |
| 590 | CONFIG_SERIAL_8250=y | 759 | CONFIG_SERIAL_8250=y |
| 591 | CONFIG_SERIAL_8250_CONSOLE=y | 760 | CONFIG_SERIAL_8250_CONSOLE=y |
| 761 | CONFIG_SERIAL_8250_PCI=y | ||
| 592 | CONFIG_SERIAL_8250_NR_UARTS=4 | 762 | CONFIG_SERIAL_8250_NR_UARTS=4 |
| 763 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 593 | # CONFIG_SERIAL_8250_EXTENDED is not set | 764 | # CONFIG_SERIAL_8250_EXTENDED is not set |
| 594 | 765 | ||
| 595 | # | 766 | # |
| @@ -599,90 +770,122 @@ CONFIG_SERIAL_CORE=y | |||
| 599 | CONFIG_SERIAL_CORE_CONSOLE=y | 770 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 600 | # CONFIG_SERIAL_JSM is not set | 771 | # CONFIG_SERIAL_JSM is not set |
| 601 | CONFIG_UNIX98_PTYS=y | 772 | CONFIG_UNIX98_PTYS=y |
| 773 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 602 | CONFIG_LEGACY_PTYS=y | 774 | CONFIG_LEGACY_PTYS=y |
| 603 | CONFIG_LEGACY_PTY_COUNT=256 | 775 | CONFIG_LEGACY_PTY_COUNT=256 |
| 604 | CONFIG_PRINTER=m | 776 | CONFIG_PRINTER=m |
| 605 | # CONFIG_LP_CONSOLE is not set | 777 | # CONFIG_LP_CONSOLE is not set |
| 606 | # CONFIG_PPDEV is not set | 778 | # CONFIG_PPDEV is not set |
| 607 | # CONFIG_TIPAR is not set | ||
| 608 | |||
| 609 | # | ||
| 610 | # IPMI | ||
| 611 | # | ||
| 612 | # CONFIG_IPMI_HANDLER is not set | 779 | # CONFIG_IPMI_HANDLER is not set |
| 613 | 780 | CONFIG_HW_RANDOM=m | |
| 614 | # | ||
| 615 | # Watchdog Cards | ||
| 616 | # | ||
| 617 | # CONFIG_WATCHDOG is not set | ||
| 618 | # CONFIG_NVRAM is not set | 781 | # CONFIG_NVRAM is not set |
| 619 | CONFIG_RTC=y | ||
| 620 | # CONFIG_DTLK is not set | 782 | # CONFIG_DTLK is not set |
| 621 | # CONFIG_R3964 is not set | 783 | # CONFIG_R3964 is not set |
| 622 | # CONFIG_APPLICOM is not set | 784 | # CONFIG_APPLICOM is not set |
| 623 | |||
| 624 | # | ||
| 625 | # Ftape, the floppy tape device driver | ||
| 626 | # | ||
| 627 | # CONFIG_DRM is not set | ||
| 628 | # CONFIG_RAW_DRIVER is not set | 785 | # CONFIG_RAW_DRIVER is not set |
| 786 | # CONFIG_TCG_TPM is not set | ||
| 787 | CONFIG_DEVPORT=y | ||
| 788 | # CONFIG_I2C is not set | ||
| 789 | # CONFIG_SPI is not set | ||
| 790 | # CONFIG_W1 is not set | ||
| 791 | # CONFIG_POWER_SUPPLY is not set | ||
| 792 | # CONFIG_HWMON is not set | ||
| 793 | # CONFIG_THERMAL is not set | ||
| 794 | # CONFIG_THERMAL_HWMON is not set | ||
| 795 | # CONFIG_WATCHDOG is not set | ||
| 796 | CONFIG_SSB_POSSIBLE=y | ||
| 629 | 797 | ||
| 630 | # | 798 | # |
| 631 | # TPM devices | 799 | # Sonics Silicon Backplane |
| 632 | # | 800 | # |
| 633 | # CONFIG_TCG_TPM is not set | 801 | # CONFIG_SSB is not set |
| 634 | 802 | ||
| 635 | # | 803 | # |
| 636 | # I2C support | 804 | # Multifunction device drivers |
| 637 | # | 805 | # |
| 638 | # CONFIG_I2C is not set | 806 | # CONFIG_MFD_CORE is not set |
| 807 | # CONFIG_MFD_SM501 is not set | ||
| 808 | # CONFIG_HTC_PASIC3 is not set | ||
| 809 | # CONFIG_MFD_TMIO is not set | ||
| 639 | 810 | ||
| 640 | # | 811 | # |
| 641 | # Misc devices | 812 | # Multimedia devices |
| 642 | # | 813 | # |
| 643 | 814 | ||
| 644 | # | 815 | # |
| 645 | # Multimedia devices | 816 | # Multimedia core support |
| 646 | # | 817 | # |
| 647 | # CONFIG_VIDEO_DEV is not set | 818 | # CONFIG_VIDEO_DEV is not set |
| 819 | # CONFIG_DVB_CORE is not set | ||
| 820 | # CONFIG_VIDEO_MEDIA is not set | ||
| 648 | 821 | ||
| 649 | # | 822 | # |
| 650 | # Digital Video Broadcasting Devices | 823 | # Multimedia drivers |
| 651 | # | 824 | # |
| 652 | # CONFIG_DVB is not set | 825 | # CONFIG_DAB is not set |
| 653 | 826 | ||
| 654 | # | 827 | # |
| 655 | # Graphics support | 828 | # Graphics support |
| 656 | # | 829 | # |
| 830 | # CONFIG_DRM is not set | ||
| 831 | # CONFIG_VGASTATE is not set | ||
| 832 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 657 | CONFIG_FB=y | 833 | CONFIG_FB=y |
| 834 | # CONFIG_FIRMWARE_EDID is not set | ||
| 835 | # CONFIG_FB_DDC is not set | ||
| 836 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 658 | CONFIG_FB_CFB_FILLRECT=y | 837 | CONFIG_FB_CFB_FILLRECT=y |
| 659 | CONFIG_FB_CFB_COPYAREA=y | 838 | CONFIG_FB_CFB_COPYAREA=y |
| 660 | CONFIG_FB_CFB_IMAGEBLIT=y | 839 | CONFIG_FB_CFB_IMAGEBLIT=y |
| 661 | CONFIG_FB_SOFT_CURSOR=y | 840 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set |
| 841 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 842 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 843 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 844 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 845 | # CONFIG_FB_SYS_FOPS is not set | ||
| 846 | # CONFIG_FB_SVGALIB is not set | ||
| 662 | # CONFIG_FB_MACMODES is not set | 847 | # CONFIG_FB_MACMODES is not set |
| 848 | # CONFIG_FB_BACKLIGHT is not set | ||
| 663 | # CONFIG_FB_MODE_HELPERS is not set | 849 | # CONFIG_FB_MODE_HELPERS is not set |
| 664 | # CONFIG_FB_TILEBLITTING is not set | 850 | # CONFIG_FB_TILEBLITTING is not set |
| 851 | |||
| 852 | # | ||
| 853 | # Frame buffer hardware drivers | ||
| 854 | # | ||
| 665 | # CONFIG_FB_CIRRUS is not set | 855 | # CONFIG_FB_CIRRUS is not set |
| 666 | # CONFIG_FB_PM2 is not set | 856 | # CONFIG_FB_PM2 is not set |
| 667 | CONFIG_FB_CYBER2000=y | 857 | CONFIG_FB_CYBER2000=y |
| 668 | # CONFIG_FB_ASILIANT is not set | 858 | # CONFIG_FB_ASILIANT is not set |
| 669 | # CONFIG_FB_IMSTT is not set | 859 | # CONFIG_FB_IMSTT is not set |
| 860 | # CONFIG_FB_S1D13XXX is not set | ||
| 670 | # CONFIG_FB_NVIDIA is not set | 861 | # CONFIG_FB_NVIDIA is not set |
| 671 | # CONFIG_FB_RIVA is not set | 862 | # CONFIG_FB_RIVA is not set |
| 672 | # CONFIG_FB_MATROX is not set | 863 | # CONFIG_FB_MATROX is not set |
| 673 | # CONFIG_FB_RADEON_OLD is not set | ||
| 674 | # CONFIG_FB_RADEON is not set | 864 | # CONFIG_FB_RADEON is not set |
| 675 | # CONFIG_FB_ATY128 is not set | 865 | # CONFIG_FB_ATY128 is not set |
| 676 | # CONFIG_FB_ATY is not set | 866 | # CONFIG_FB_ATY is not set |
| 867 | # CONFIG_FB_S3 is not set | ||
| 677 | # CONFIG_FB_SAVAGE is not set | 868 | # CONFIG_FB_SAVAGE is not set |
| 678 | # CONFIG_FB_SIS is not set | 869 | # CONFIG_FB_SIS is not set |
| 870 | # CONFIG_FB_VIA is not set | ||
| 679 | # CONFIG_FB_NEOMAGIC is not set | 871 | # CONFIG_FB_NEOMAGIC is not set |
| 680 | # CONFIG_FB_KYRO is not set | 872 | # CONFIG_FB_KYRO is not set |
| 681 | # CONFIG_FB_3DFX is not set | 873 | # CONFIG_FB_3DFX is not set |
| 682 | # CONFIG_FB_VOODOO1 is not set | 874 | # CONFIG_FB_VOODOO1 is not set |
| 875 | # CONFIG_FB_VT8623 is not set | ||
| 683 | # CONFIG_FB_TRIDENT is not set | 876 | # CONFIG_FB_TRIDENT is not set |
| 684 | # CONFIG_FB_S1D13XXX is not set | 877 | # CONFIG_FB_ARK is not set |
| 878 | # CONFIG_FB_PM3 is not set | ||
| 879 | # CONFIG_FB_CARMINE is not set | ||
| 685 | # CONFIG_FB_VIRTUAL is not set | 880 | # CONFIG_FB_VIRTUAL is not set |
| 881 | # CONFIG_FB_METRONOME is not set | ||
| 882 | # CONFIG_FB_MB862XX is not set | ||
| 883 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 884 | |||
| 885 | # | ||
| 886 | # Display device support | ||
| 887 | # | ||
| 888 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 686 | 889 | ||
| 687 | # | 890 | # |
| 688 | # Console display driver support | 891 | # Console display driver support |
| @@ -691,126 +894,132 @@ CONFIG_FB_CYBER2000=y | |||
| 691 | # CONFIG_MDA_CONSOLE is not set | 894 | # CONFIG_MDA_CONSOLE is not set |
| 692 | CONFIG_DUMMY_CONSOLE=y | 895 | CONFIG_DUMMY_CONSOLE=y |
| 693 | CONFIG_FRAMEBUFFER_CONSOLE=y | 896 | CONFIG_FRAMEBUFFER_CONSOLE=y |
| 897 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 898 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
| 694 | # CONFIG_FONTS is not set | 899 | # CONFIG_FONTS is not set |
| 695 | CONFIG_FONT_8x8=y | 900 | CONFIG_FONT_8x8=y |
| 696 | CONFIG_FONT_8x16=y | 901 | CONFIG_FONT_8x16=y |
| 697 | |||
| 698 | # | ||
| 699 | # Logo configuration | ||
| 700 | # | ||
| 701 | CONFIG_LOGO=y | 902 | CONFIG_LOGO=y |
| 702 | # CONFIG_LOGO_LINUX_MONO is not set | 903 | # CONFIG_LOGO_LINUX_MONO is not set |
| 703 | # CONFIG_LOGO_LINUX_VGA16 is not set | 904 | # CONFIG_LOGO_LINUX_VGA16 is not set |
| 704 | CONFIG_LOGO_LINUX_CLUT224=y | 905 | CONFIG_LOGO_LINUX_CLUT224=y |
| 705 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 706 | |||
| 707 | # | ||
| 708 | # Sound | ||
| 709 | # | ||
| 710 | CONFIG_SOUND=m | 906 | CONFIG_SOUND=m |
| 711 | 907 | CONFIG_SOUND_OSS_CORE=y | |
| 712 | # | ||
| 713 | # Advanced Linux Sound Architecture | ||
| 714 | # | ||
| 715 | # CONFIG_SND is not set | 908 | # CONFIG_SND is not set |
| 716 | |||
| 717 | # | ||
| 718 | # Open Sound System | ||
| 719 | # | ||
| 720 | CONFIG_SOUND_PRIME=m | 909 | CONFIG_SOUND_PRIME=m |
| 721 | # CONFIG_SOUND_BT878 is not set | ||
| 722 | # CONFIG_SOUND_CMPCI is not set | ||
| 723 | # CONFIG_SOUND_EMU10K1 is not set | ||
| 724 | # CONFIG_SOUND_FUSION is not set | ||
| 725 | # CONFIG_SOUND_CS4281 is not set | ||
| 726 | # CONFIG_SOUND_ES1370 is not set | ||
| 727 | # CONFIG_SOUND_ES1371 is not set | ||
| 728 | # CONFIG_SOUND_ESSSOLO1 is not set | ||
| 729 | # CONFIG_SOUND_MAESTRO is not set | ||
| 730 | # CONFIG_SOUND_MAESTRO3 is not set | ||
| 731 | # CONFIG_SOUND_ICH is not set | ||
| 732 | # CONFIG_SOUND_SONICVIBES is not set | ||
| 733 | # CONFIG_SOUND_TRIDENT is not set | ||
| 734 | # CONFIG_SOUND_MSNDCLAS is not set | 910 | # CONFIG_SOUND_MSNDCLAS is not set |
| 735 | # CONFIG_SOUND_MSNDPIN is not set | 911 | # CONFIG_SOUND_MSNDPIN is not set |
| 736 | # CONFIG_SOUND_VIA82CXXX is not set | ||
| 737 | CONFIG_SOUND_OSS=m | 912 | CONFIG_SOUND_OSS=m |
| 738 | # CONFIG_SOUND_TRACEINIT is not set | 913 | # CONFIG_SOUND_TRACEINIT is not set |
| 739 | # CONFIG_SOUND_DMAP is not set | 914 | # CONFIG_SOUND_DMAP is not set |
| 740 | # CONFIG_SOUND_AD1816 is not set | ||
| 741 | # CONFIG_SOUND_AD1889 is not set | ||
| 742 | # CONFIG_SOUND_SGALAXY is not set | ||
| 743 | CONFIG_SOUND_ADLIB=m | ||
| 744 | # CONFIG_SOUND_ACI_MIXER is not set | ||
| 745 | # CONFIG_SOUND_CS4232 is not set | ||
| 746 | # CONFIG_SOUND_SSCAPE is not set | 915 | # CONFIG_SOUND_SSCAPE is not set |
| 747 | # CONFIG_SOUND_GUS is not set | ||
| 748 | # CONFIG_SOUND_VMIDI is not set | 916 | # CONFIG_SOUND_VMIDI is not set |
| 749 | # CONFIG_SOUND_TRIX is not set | 917 | # CONFIG_SOUND_TRIX is not set |
| 750 | # CONFIG_SOUND_MSS is not set | 918 | # CONFIG_SOUND_MSS is not set |
| 751 | # CONFIG_SOUND_MPU401 is not set | 919 | # CONFIG_SOUND_MPU401 is not set |
| 752 | # CONFIG_SOUND_NM256 is not set | ||
| 753 | # CONFIG_SOUND_MAD16 is not set | ||
| 754 | # CONFIG_SOUND_PAS is not set | 920 | # CONFIG_SOUND_PAS is not set |
| 755 | # CONFIG_SOUND_PSS is not set | 921 | # CONFIG_SOUND_PSS is not set |
| 756 | CONFIG_SOUND_SB=m | 922 | CONFIG_SOUND_SB=m |
| 757 | # CONFIG_SOUND_AWE32_SYNTH is not set | ||
| 758 | # CONFIG_SOUND_WAVEFRONT is not set | ||
| 759 | # CONFIG_SOUND_MAUI is not set | ||
| 760 | # CONFIG_SOUND_YM3812 is not set | 923 | # CONFIG_SOUND_YM3812 is not set |
| 761 | # CONFIG_SOUND_OPL3SA1 is not set | ||
| 762 | # CONFIG_SOUND_OPL3SA2 is not set | ||
| 763 | # CONFIG_SOUND_YMFPCI is not set | ||
| 764 | # CONFIG_SOUND_UART6850 is not set | 924 | # CONFIG_SOUND_UART6850 is not set |
| 765 | # CONFIG_SOUND_AEDSP16 is not set | 925 | # CONFIG_SOUND_AEDSP16 is not set |
| 766 | # CONFIG_SOUND_KAHLUA is not set | 926 | # CONFIG_SOUND_KAHLUA is not set |
| 767 | # CONFIG_SOUND_ALI5455 is not set | 927 | CONFIG_HID_SUPPORT=y |
| 768 | # CONFIG_SOUND_FORTE is not set | 928 | CONFIG_HID=y |
| 769 | # CONFIG_SOUND_RME96XX is not set | 929 | # CONFIG_HID_DEBUG is not set |
| 770 | # CONFIG_SOUND_AD1980 is not set | 930 | # CONFIG_HIDRAW is not set |
| 931 | # CONFIG_HID_PID is not set | ||
| 771 | 932 | ||
| 772 | # | 933 | # |
| 773 | # USB support | 934 | # Special HID drivers |
| 774 | # | 935 | # |
| 936 | CONFIG_HID_COMPAT=y | ||
| 937 | CONFIG_USB_SUPPORT=y | ||
| 775 | CONFIG_USB_ARCH_HAS_HCD=y | 938 | CONFIG_USB_ARCH_HAS_HCD=y |
| 776 | CONFIG_USB_ARCH_HAS_OHCI=y | 939 | CONFIG_USB_ARCH_HAS_OHCI=y |
| 940 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 777 | # CONFIG_USB is not set | 941 | # CONFIG_USB is not set |
| 778 | 942 | ||
| 779 | # | 943 | # |
| 780 | # USB Gadget Support | 944 | # Enable Host or Gadget support to see Inventra options |
| 781 | # | 945 | # |
| 782 | # CONFIG_USB_GADGET is not set | ||
| 783 | 946 | ||
| 784 | # | 947 | # |
| 785 | # MMC/SD Card support | 948 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; |
| 786 | # | 949 | # |
| 950 | # CONFIG_USB_GADGET is not set | ||
| 951 | # CONFIG_UWB is not set | ||
| 787 | # CONFIG_MMC is not set | 952 | # CONFIG_MMC is not set |
| 953 | # CONFIG_MEMSTICK is not set | ||
| 954 | # CONFIG_ACCESSIBILITY is not set | ||
| 955 | # CONFIG_NEW_LEDS is not set | ||
| 956 | CONFIG_RTC_LIB=y | ||
| 957 | CONFIG_RTC_CLASS=y | ||
| 958 | CONFIG_RTC_HCTOSYS=y | ||
| 959 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 960 | # CONFIG_RTC_DEBUG is not set | ||
| 961 | |||
| 962 | # | ||
| 963 | # RTC interfaces | ||
| 964 | # | ||
| 965 | CONFIG_RTC_INTF_SYSFS=y | ||
| 966 | CONFIG_RTC_INTF_PROC=y | ||
| 967 | CONFIG_RTC_INTF_DEV=y | ||
| 968 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 969 | # CONFIG_RTC_DRV_TEST is not set | ||
| 970 | |||
| 971 | # | ||
| 972 | # SPI RTC drivers | ||
| 973 | # | ||
| 974 | |||
| 975 | # | ||
| 976 | # Platform RTC drivers | ||
| 977 | # | ||
| 978 | CONFIG_RTC_DRV_CMOS=y | ||
| 979 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 980 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 981 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 982 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 983 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 984 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 985 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 986 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 987 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 988 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 989 | |||
| 990 | # | ||
| 991 | # on-CPU RTC drivers | ||
| 992 | # | ||
| 993 | # CONFIG_DMADEVICES is not set | ||
| 994 | # CONFIG_AUXDISPLAY is not set | ||
| 995 | # CONFIG_REGULATOR is not set | ||
| 996 | # CONFIG_UIO is not set | ||
| 788 | 997 | ||
| 789 | # | 998 | # |
| 790 | # File systems | 999 | # File systems |
| 791 | # | 1000 | # |
| 792 | CONFIG_EXT2_FS=y | 1001 | CONFIG_EXT2_FS=y |
| 793 | # CONFIG_EXT2_FS_XATTR is not set | 1002 | # CONFIG_EXT2_FS_XATTR is not set |
| 1003 | # CONFIG_EXT2_FS_XIP is not set | ||
| 794 | CONFIG_EXT3_FS=y | 1004 | CONFIG_EXT3_FS=y |
| 795 | CONFIG_EXT3_FS_XATTR=y | 1005 | CONFIG_EXT3_FS_XATTR=y |
| 796 | # CONFIG_EXT3_FS_POSIX_ACL is not set | 1006 | # CONFIG_EXT3_FS_POSIX_ACL is not set |
| 797 | # CONFIG_EXT3_FS_SECURITY is not set | 1007 | # CONFIG_EXT3_FS_SECURITY is not set |
| 1008 | # CONFIG_EXT4_FS is not set | ||
| 798 | CONFIG_JBD=y | 1009 | CONFIG_JBD=y |
| 799 | # CONFIG_JBD_DEBUG is not set | ||
| 800 | CONFIG_FS_MBCACHE=y | 1010 | CONFIG_FS_MBCACHE=y |
| 801 | # CONFIG_REISERFS_FS is not set | 1011 | # CONFIG_REISERFS_FS is not set |
| 802 | # CONFIG_JFS_FS is not set | 1012 | # CONFIG_JFS_FS is not set |
| 803 | 1013 | # CONFIG_FS_POSIX_ACL is not set | |
| 804 | # | 1014 | CONFIG_FILE_LOCKING=y |
| 805 | # XFS support | ||
| 806 | # | ||
| 807 | # CONFIG_XFS_FS is not set | 1015 | # CONFIG_XFS_FS is not set |
| 808 | # CONFIG_MINIX_FS is not set | 1016 | # CONFIG_OCFS2_FS is not set |
| 809 | # CONFIG_ROMFS_FS is not set | ||
| 810 | # CONFIG_QUOTA is not set | ||
| 811 | CONFIG_DNOTIFY=y | 1017 | CONFIG_DNOTIFY=y |
| 1018 | # CONFIG_INOTIFY is not set | ||
| 1019 | # CONFIG_QUOTA is not set | ||
| 812 | # CONFIG_AUTOFS_FS is not set | 1020 | # CONFIG_AUTOFS_FS is not set |
| 813 | # CONFIG_AUTOFS4_FS is not set | 1021 | # CONFIG_AUTOFS4_FS is not set |
| 1022 | # CONFIG_FUSE_FS is not set | ||
| 814 | 1023 | ||
| 815 | # | 1024 | # |
| 816 | # CD-ROM/DVD Filesystems | 1025 | # CD-ROM/DVD Filesystems |
| @@ -834,14 +1043,12 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | |||
| 834 | # Pseudo filesystems | 1043 | # Pseudo filesystems |
| 835 | # | 1044 | # |
| 836 | CONFIG_PROC_FS=y | 1045 | CONFIG_PROC_FS=y |
| 1046 | CONFIG_PROC_SYSCTL=y | ||
| 1047 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 837 | CONFIG_SYSFS=y | 1048 | CONFIG_SYSFS=y |
| 838 | CONFIG_DEVFS_FS=y | ||
| 839 | CONFIG_DEVFS_MOUNT=y | ||
| 840 | # CONFIG_DEVFS_DEBUG is not set | ||
| 841 | # CONFIG_DEVPTS_FS_XATTR is not set | ||
| 842 | # CONFIG_TMPFS is not set | 1049 | # CONFIG_TMPFS is not set |
| 843 | # CONFIG_HUGETLB_PAGE is not set | 1050 | # CONFIG_HUGETLB_PAGE is not set |
| 844 | CONFIG_RAMFS=y | 1051 | # CONFIG_CONFIGFS_FS is not set |
| 845 | 1052 | ||
| 846 | # | 1053 | # |
| 847 | # Miscellaneous filesystems | 1054 | # Miscellaneous filesystems |
| @@ -855,22 +1062,27 @@ CONFIG_RAMFS=y | |||
| 855 | # CONFIG_EFS_FS is not set | 1062 | # CONFIG_EFS_FS is not set |
| 856 | # CONFIG_CRAMFS is not set | 1063 | # CONFIG_CRAMFS is not set |
| 857 | # CONFIG_VXFS_FS is not set | 1064 | # CONFIG_VXFS_FS is not set |
| 1065 | # CONFIG_MINIX_FS is not set | ||
| 1066 | # CONFIG_OMFS_FS is not set | ||
| 858 | # CONFIG_HPFS_FS is not set | 1067 | # CONFIG_HPFS_FS is not set |
| 859 | # CONFIG_QNX4FS_FS is not set | 1068 | # CONFIG_QNX4FS_FS is not set |
| 1069 | # CONFIG_ROMFS_FS is not set | ||
| 860 | # CONFIG_SYSV_FS is not set | 1070 | # CONFIG_SYSV_FS is not set |
| 861 | # CONFIG_UFS_FS is not set | 1071 | # CONFIG_UFS_FS is not set |
| 862 | 1072 | CONFIG_NETWORK_FILESYSTEMS=y | |
| 863 | # | 1073 | CONFIG_NFS_FS=y |
| 864 | # Network File Systems | ||
| 865 | # | ||
| 866 | CONFIG_NFS_FS=m | ||
| 867 | CONFIG_NFS_V3=y | 1074 | CONFIG_NFS_V3=y |
| 1075 | # CONFIG_NFS_V3_ACL is not set | ||
| 868 | # CONFIG_NFS_V4 is not set | 1076 | # CONFIG_NFS_V4 is not set |
| 869 | # CONFIG_NFS_DIRECTIO is not set | 1077 | CONFIG_NFSD=m |
| 870 | # CONFIG_NFSD is not set | 1078 | # CONFIG_NFSD_V3 is not set |
| 871 | CONFIG_LOCKD=m | 1079 | # CONFIG_NFSD_V4 is not set |
| 1080 | CONFIG_LOCKD=y | ||
| 872 | CONFIG_LOCKD_V4=y | 1081 | CONFIG_LOCKD_V4=y |
| 873 | CONFIG_SUNRPC=m | 1082 | CONFIG_EXPORTFS=m |
| 1083 | CONFIG_NFS_COMMON=y | ||
| 1084 | CONFIG_SUNRPC=y | ||
| 1085 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
| 874 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 1086 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
| 875 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1087 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
| 876 | # CONFIG_SMB_FS is not set | 1088 | # CONFIG_SMB_FS is not set |
| @@ -897,11 +1109,9 @@ CONFIG_MSDOS_PARTITION=y | |||
| 897 | # CONFIG_SGI_PARTITION is not set | 1109 | # CONFIG_SGI_PARTITION is not set |
| 898 | # CONFIG_ULTRIX_PARTITION is not set | 1110 | # CONFIG_ULTRIX_PARTITION is not set |
| 899 | # CONFIG_SUN_PARTITION is not set | 1111 | # CONFIG_SUN_PARTITION is not set |
| 1112 | # CONFIG_KARMA_PARTITION is not set | ||
| 900 | # CONFIG_EFI_PARTITION is not set | 1113 | # CONFIG_EFI_PARTITION is not set |
| 901 | 1114 | # CONFIG_SYSV68_PARTITION is not set | |
| 902 | # | ||
| 903 | # Native Language Support | ||
| 904 | # | ||
| 905 | CONFIG_NLS=m | 1115 | CONFIG_NLS=m |
| 906 | CONFIG_NLS_DEFAULT="iso8859-1" | 1116 | CONFIG_NLS_DEFAULT="iso8859-1" |
| 907 | CONFIG_NLS_CODEPAGE_437=m | 1117 | CONFIG_NLS_CODEPAGE_437=m |
| @@ -942,30 +1152,74 @@ CONFIG_NLS_ISO8859_1=m | |||
| 942 | # CONFIG_NLS_KOI8_R is not set | 1152 | # CONFIG_NLS_KOI8_R is not set |
| 943 | # CONFIG_NLS_KOI8_U is not set | 1153 | # CONFIG_NLS_KOI8_U is not set |
| 944 | # CONFIG_NLS_UTF8 is not set | 1154 | # CONFIG_NLS_UTF8 is not set |
| 945 | 1155 | # CONFIG_DLM is not set | |
| 946 | # | ||
| 947 | # Profiling support | ||
| 948 | # | ||
| 949 | # CONFIG_PROFILING is not set | ||
| 950 | 1156 | ||
| 951 | # | 1157 | # |
| 952 | # Kernel hacking | 1158 | # Kernel hacking |
| 953 | # | 1159 | # |
| 954 | # CONFIG_PRINTK_TIME is not set | 1160 | # CONFIG_PRINTK_TIME is not set |
| 955 | CONFIG_DEBUG_KERNEL=y | 1161 | # CONFIG_ENABLE_WARN_DEPRECATED is not set |
| 1162 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
| 1163 | CONFIG_FRAME_WARN=1024 | ||
| 956 | # CONFIG_MAGIC_SYSRQ is not set | 1164 | # CONFIG_MAGIC_SYSRQ is not set |
| 957 | CONFIG_LOG_BUF_SHIFT=14 | 1165 | # CONFIG_UNUSED_SYMBOLS is not set |
| 1166 | # CONFIG_DEBUG_FS is not set | ||
| 1167 | # CONFIG_HEADERS_CHECK is not set | ||
| 1168 | CONFIG_DEBUG_KERNEL=y | ||
| 1169 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1170 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1171 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1172 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1173 | # CONFIG_SCHED_DEBUG is not set | ||
| 958 | # CONFIG_SCHEDSTATS is not set | 1174 | # CONFIG_SCHEDSTATS is not set |
| 1175 | # CONFIG_TIMER_STATS is not set | ||
| 1176 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 959 | # CONFIG_DEBUG_SLAB is not set | 1177 | # CONFIG_DEBUG_SLAB is not set |
| 1178 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1179 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 960 | # CONFIG_DEBUG_SPINLOCK is not set | 1180 | # CONFIG_DEBUG_SPINLOCK is not set |
| 1181 | # CONFIG_DEBUG_MUTEXES is not set | ||
| 1182 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1183 | # CONFIG_PROVE_LOCKING is not set | ||
| 1184 | # CONFIG_LOCK_STAT is not set | ||
| 961 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1185 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
| 1186 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 962 | # CONFIG_DEBUG_KOBJECT is not set | 1187 | # CONFIG_DEBUG_KOBJECT is not set |
| 963 | CONFIG_DEBUG_BUGVERBOSE=y | 1188 | CONFIG_DEBUG_BUGVERBOSE=y |
| 964 | # CONFIG_DEBUG_INFO is not set | 1189 | # CONFIG_DEBUG_INFO is not set |
| 965 | # CONFIG_DEBUG_FS is not set | 1190 | # CONFIG_DEBUG_VM is not set |
| 1191 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1192 | CONFIG_DEBUG_MEMORY_INIT=y | ||
| 1193 | # CONFIG_DEBUG_LIST is not set | ||
| 1194 | # CONFIG_DEBUG_SG is not set | ||
| 1195 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 966 | CONFIG_FRAME_POINTER=y | 1196 | CONFIG_FRAME_POINTER=y |
| 1197 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1198 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1199 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1200 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1201 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1202 | # CONFIG_FAULT_INJECTION is not set | ||
| 1203 | # CONFIG_LATENCYTOP is not set | ||
| 1204 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1205 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1206 | |||
| 1207 | # | ||
| 1208 | # Tracers | ||
| 1209 | # | ||
| 1210 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1211 | # CONFIG_SCHED_TRACER is not set | ||
| 1212 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 1213 | # CONFIG_BOOT_TRACER is not set | ||
| 1214 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
| 1215 | # CONFIG_STACK_TRACER is not set | ||
| 1216 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
| 1217 | # CONFIG_SAMPLES is not set | ||
| 1218 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1219 | # CONFIG_KGDB is not set | ||
| 967 | CONFIG_DEBUG_USER=y | 1220 | CONFIG_DEBUG_USER=y |
| 968 | # CONFIG_DEBUG_ERRORS is not set | 1221 | # CONFIG_DEBUG_ERRORS is not set |
| 1222 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 969 | # CONFIG_DEBUG_LL is not set | 1223 | # CONFIG_DEBUG_LL is not set |
| 970 | 1224 | ||
| 971 | # | 1225 | # |
| @@ -973,19 +1227,23 @@ CONFIG_DEBUG_USER=y | |||
| 973 | # | 1227 | # |
| 974 | # CONFIG_KEYS is not set | 1228 | # CONFIG_KEYS is not set |
| 975 | # CONFIG_SECURITY is not set | 1229 | # CONFIG_SECURITY is not set |
| 976 | 1230 | # CONFIG_SECURITYFS is not set | |
| 977 | # | 1231 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set |
| 978 | # Cryptographic options | ||
| 979 | # | ||
| 980 | # CONFIG_CRYPTO is not set | 1232 | # CONFIG_CRYPTO is not set |
| 981 | 1233 | ||
| 982 | # | 1234 | # |
| 983 | # Hardware crypto devices | ||
| 984 | # | ||
| 985 | |||
| 986 | # | ||
| 987 | # Library routines | 1235 | # Library routines |
| 988 | # | 1236 | # |
| 1237 | CONFIG_BITREVERSE=y | ||
| 1238 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 989 | # CONFIG_CRC_CCITT is not set | 1239 | # CONFIG_CRC_CCITT is not set |
| 1240 | # CONFIG_CRC16 is not set | ||
| 1241 | # CONFIG_CRC_T10DIF is not set | ||
| 1242 | # CONFIG_CRC_ITU_T is not set | ||
| 990 | CONFIG_CRC32=y | 1243 | CONFIG_CRC32=y |
| 1244 | # CONFIG_CRC7 is not set | ||
| 991 | # CONFIG_LIBCRC32C is not set | 1245 | # CONFIG_LIBCRC32C is not set |
| 1246 | CONFIG_PLIST=y | ||
| 1247 | CONFIG_HAS_IOMEM=y | ||
| 1248 | CONFIG_HAS_IOPORT=y | ||
| 1249 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/simpad_defconfig b/arch/arm/configs/simpad_defconfig index 03f783e696b3..685d2b513206 100644 --- a/arch/arm/configs/simpad_defconfig +++ b/arch/arm/configs/simpad_defconfig | |||
| @@ -89,7 +89,6 @@ CONFIG_ARCH_SA1100=y | |||
| 89 | # CONFIG_SA1100_COLLIE is not set | 89 | # CONFIG_SA1100_COLLIE is not set |
| 90 | # CONFIG_SA1100_H3100 is not set | 90 | # CONFIG_SA1100_H3100 is not set |
| 91 | # CONFIG_SA1100_H3600 is not set | 91 | # CONFIG_SA1100_H3600 is not set |
| 92 | # CONFIG_SA1100_H3800 is not set | ||
| 93 | # CONFIG_SA1100_BADGE4 is not set | 92 | # CONFIG_SA1100_BADGE4 is not set |
| 94 | # CONFIG_SA1100_JORNADA720 is not set | 93 | # CONFIG_SA1100_JORNADA720 is not set |
| 95 | # CONFIG_SA1100_HACKKIT is not set | 94 | # CONFIG_SA1100_HACKKIT is not set |
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h index df5638f3643a..7edf3536df24 100644 --- a/arch/arm/include/asm/dma.h +++ b/arch/arm/include/asm/dma.h | |||
| @@ -19,21 +19,17 @@ | |||
| 19 | #include <asm/system.h> | 19 | #include <asm/system.h> |
| 20 | #include <asm/scatterlist.h> | 20 | #include <asm/scatterlist.h> |
| 21 | 21 | ||
| 22 | typedef unsigned int dmach_t; | ||
| 23 | |||
| 24 | #include <mach/isa-dma.h> | 22 | #include <mach/isa-dma.h> |
| 25 | 23 | ||
| 26 | /* | 24 | /* |
| 27 | * DMA modes | 25 | * The DMA modes reflect the settings for the ISA DMA controller |
| 28 | */ | 26 | */ |
| 29 | typedef unsigned int dmamode_t; | 27 | #define DMA_MODE_MASK 0xcc |
| 30 | |||
| 31 | #define DMA_MODE_MASK 3 | ||
| 32 | 28 | ||
| 33 | #define DMA_MODE_READ 0 | 29 | #define DMA_MODE_READ 0x44 |
| 34 | #define DMA_MODE_WRITE 1 | 30 | #define DMA_MODE_WRITE 0x48 |
| 35 | #define DMA_MODE_CASCADE 2 | 31 | #define DMA_MODE_CASCADE 0xc0 |
| 36 | #define DMA_AUTOINIT 4 | 32 | #define DMA_AUTOINIT 0x10 |
| 37 | 33 | ||
| 38 | extern spinlock_t dma_spin_lock; | 34 | extern spinlock_t dma_spin_lock; |
| 39 | 35 | ||
| @@ -52,44 +48,44 @@ static inline void release_dma_lock(unsigned long flags) | |||
| 52 | /* Clear the 'DMA Pointer Flip Flop'. | 48 | /* Clear the 'DMA Pointer Flip Flop'. |
| 53 | * Write 0 for LSB/MSB, 1 for MSB/LSB access. | 49 | * Write 0 for LSB/MSB, 1 for MSB/LSB access. |
| 54 | */ | 50 | */ |
| 55 | #define clear_dma_ff(channel) | 51 | #define clear_dma_ff(chan) |
| 56 | 52 | ||
| 57 | /* Set only the page register bits of the transfer address. | 53 | /* Set only the page register bits of the transfer address. |
| 58 | * | 54 | * |
| 59 | * NOTE: This is an architecture specific function, and should | 55 | * NOTE: This is an architecture specific function, and should |
| 60 | * be hidden from the drivers | 56 | * be hidden from the drivers |
| 61 | */ | 57 | */ |
| 62 | extern void set_dma_page(dmach_t channel, char pagenr); | 58 | extern void set_dma_page(unsigned int chan, char pagenr); |
| 63 | 59 | ||
| 64 | /* Request a DMA channel | 60 | /* Request a DMA channel |
| 65 | * | 61 | * |
| 66 | * Some architectures may need to do allocate an interrupt | 62 | * Some architectures may need to do allocate an interrupt |
| 67 | */ | 63 | */ |
| 68 | extern int request_dma(dmach_t channel, const char * device_id); | 64 | extern int request_dma(unsigned int chan, const char * device_id); |
| 69 | 65 | ||
| 70 | /* Free a DMA channel | 66 | /* Free a DMA channel |
| 71 | * | 67 | * |
| 72 | * Some architectures may need to do free an interrupt | 68 | * Some architectures may need to do free an interrupt |
| 73 | */ | 69 | */ |
| 74 | extern void free_dma(dmach_t channel); | 70 | extern void free_dma(unsigned int chan); |
| 75 | 71 | ||
| 76 | /* Enable DMA for this channel | 72 | /* Enable DMA for this channel |
| 77 | * | 73 | * |
| 78 | * On some architectures, this may have other side effects like | 74 | * On some architectures, this may have other side effects like |
| 79 | * enabling an interrupt and setting the DMA registers. | 75 | * enabling an interrupt and setting the DMA registers. |
| 80 | */ | 76 | */ |
| 81 | extern void enable_dma(dmach_t channel); | 77 | extern void enable_dma(unsigned int chan); |
| 82 | 78 | ||
| 83 | /* Disable DMA for this channel | 79 | /* Disable DMA for this channel |
| 84 | * | 80 | * |
| 85 | * On some architectures, this may have other side effects like | 81 | * On some architectures, this may have other side effects like |
| 86 | * disabling an interrupt or whatever. | 82 | * disabling an interrupt or whatever. |
| 87 | */ | 83 | */ |
| 88 | extern void disable_dma(dmach_t channel); | 84 | extern void disable_dma(unsigned int chan); |
| 89 | 85 | ||
| 90 | /* Test whether the specified channel has an active DMA transfer | 86 | /* Test whether the specified channel has an active DMA transfer |
| 91 | */ | 87 | */ |
| 92 | extern int dma_channel_active(dmach_t channel); | 88 | extern int dma_channel_active(unsigned int chan); |
| 93 | 89 | ||
| 94 | /* Set the DMA scatter gather list for this channel | 90 | /* Set the DMA scatter gather list for this channel |
| 95 | * | 91 | * |
| @@ -97,7 +93,7 @@ extern int dma_channel_active(dmach_t channel); | |||
| 97 | * especially since some DMA architectures don't update the | 93 | * especially since some DMA architectures don't update the |
| 98 | * DMA address immediately, but defer it to the enable_dma(). | 94 | * DMA address immediately, but defer it to the enable_dma(). |
| 99 | */ | 95 | */ |
| 100 | extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); | 96 | extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg); |
| 101 | 97 | ||
| 102 | /* Set the DMA address for this channel | 98 | /* Set the DMA address for this channel |
| 103 | * | 99 | * |
| @@ -105,9 +101,9 @@ extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); | |||
| 105 | * especially since some DMA architectures don't update the | 101 | * especially since some DMA architectures don't update the |
| 106 | * DMA address immediately, but defer it to the enable_dma(). | 102 | * DMA address immediately, but defer it to the enable_dma(). |
| 107 | */ | 103 | */ |
| 108 | extern void __set_dma_addr(dmach_t channel, void *addr); | 104 | extern void __set_dma_addr(unsigned int chan, void *addr); |
| 109 | #define set_dma_addr(channel, addr) \ | 105 | #define set_dma_addr(chan, addr) \ |
| 110 | __set_dma_addr(channel, bus_to_virt(addr)) | 106 | __set_dma_addr(chan, bus_to_virt(addr)) |
| 111 | 107 | ||
| 112 | /* Set the DMA byte count for this channel | 108 | /* Set the DMA byte count for this channel |
| 113 | * | 109 | * |
| @@ -115,7 +111,7 @@ extern void __set_dma_addr(dmach_t channel, void *addr); | |||
| 115 | * especially since some DMA architectures don't update the | 111 | * especially since some DMA architectures don't update the |
| 116 | * DMA count immediately, but defer it to the enable_dma(). | 112 | * DMA count immediately, but defer it to the enable_dma(). |
| 117 | */ | 113 | */ |
| 118 | extern void set_dma_count(dmach_t channel, unsigned long count); | 114 | extern void set_dma_count(unsigned int chan, unsigned long count); |
| 119 | 115 | ||
| 120 | /* Set the transfer direction for this channel | 116 | /* Set the transfer direction for this channel |
| 121 | * | 117 | * |
| @@ -124,11 +120,11 @@ extern void set_dma_count(dmach_t channel, unsigned long count); | |||
| 124 | * DMA transfer direction immediately, but defer it to the | 120 | * DMA transfer direction immediately, but defer it to the |
| 125 | * enable_dma(). | 121 | * enable_dma(). |
| 126 | */ | 122 | */ |
| 127 | extern void set_dma_mode(dmach_t channel, dmamode_t mode); | 123 | extern void set_dma_mode(unsigned int chan, unsigned int mode); |
| 128 | 124 | ||
| 129 | /* Set the transfer speed for this channel | 125 | /* Set the transfer speed for this channel |
| 130 | */ | 126 | */ |
| 131 | extern void set_dma_speed(dmach_t channel, int cycle_ns); | 127 | extern void set_dma_speed(unsigned int chan, int cycle_ns); |
| 132 | 128 | ||
| 133 | /* Get DMA residue count. After a DMA transfer, this | 129 | /* Get DMA residue count. After a DMA transfer, this |
| 134 | * should return zero. Reading this while a DMA transfer is | 130 | * should return zero. Reading this while a DMA transfer is |
| @@ -136,7 +132,7 @@ extern void set_dma_speed(dmach_t channel, int cycle_ns); | |||
| 136 | * If called before the channel has been used, it may return 1. | 132 | * If called before the channel has been used, it may return 1. |
| 137 | * Otherwise, it returns the number of _bytes_ left to transfer. | 133 | * Otherwise, it returns the number of _bytes_ left to transfer. |
| 138 | */ | 134 | */ |
| 139 | extern int get_dma_residue(dmach_t channel); | 135 | extern int get_dma_residue(unsigned int chan); |
| 140 | 136 | ||
| 141 | #ifndef NO_DMA | 137 | #ifndef NO_DMA |
| 142 | #define NO_DMA 255 | 138 | #define NO_DMA 255 |
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h index a58378c343b9..def8eac6e89d 100644 --- a/arch/arm/include/asm/elf.h +++ b/arch/arm/include/asm/elf.h | |||
| @@ -50,6 +50,7 @@ typedef struct user_fp elf_fpregset_t; | |||
| 50 | #define R_ARM_ABS32 2 | 50 | #define R_ARM_ABS32 2 |
| 51 | #define R_ARM_CALL 28 | 51 | #define R_ARM_CALL 28 |
| 52 | #define R_ARM_JUMP24 29 | 52 | #define R_ARM_JUMP24 29 |
| 53 | #define R_ARM_PREL31 42 | ||
| 53 | 54 | ||
| 54 | /* | 55 | /* |
| 55 | * These are used to set parameters in the core dumps. | 56 | * These are used to set parameters in the core dumps. |
diff --git a/arch/arm/include/asm/hwcap.h b/arch/arm/include/asm/hwcap.h index bda489f9f017..f7bd52b1c365 100644 --- a/arch/arm/include/asm/hwcap.h +++ b/arch/arm/include/asm/hwcap.h | |||
| @@ -17,6 +17,8 @@ | |||
| 17 | #define HWCAP_CRUNCH 1024 | 17 | #define HWCAP_CRUNCH 1024 |
| 18 | #define HWCAP_THUMBEE 2048 | 18 | #define HWCAP_THUMBEE 2048 |
| 19 | #define HWCAP_NEON 4096 | 19 | #define HWCAP_NEON 4096 |
| 20 | #define HWCAP_VFPv3 8192 | ||
| 21 | #define HWCAP_VFPv3D16 16384 | ||
| 20 | 22 | ||
| 21 | #if defined(__KERNEL__) && !defined(__ASSEMBLY__) | 23 | #if defined(__KERNEL__) && !defined(__ASSEMBLY__) |
| 22 | /* | 24 | /* |
diff --git a/arch/arm/include/asm/mach/dma.h b/arch/arm/include/asm/mach/dma.h index fc7278ea7146..9e614a18e680 100644 --- a/arch/arm/include/asm/mach/dma.h +++ b/arch/arm/include/asm/mach/dma.h | |||
| @@ -15,13 +15,13 @@ struct dma_struct; | |||
| 15 | typedef struct dma_struct dma_t; | 15 | typedef struct dma_struct dma_t; |
| 16 | 16 | ||
| 17 | struct dma_ops { | 17 | struct dma_ops { |
| 18 | int (*request)(dmach_t, dma_t *); /* optional */ | 18 | int (*request)(unsigned int, dma_t *); /* optional */ |
| 19 | void (*free)(dmach_t, dma_t *); /* optional */ | 19 | void (*free)(unsigned int, dma_t *); /* optional */ |
| 20 | void (*enable)(dmach_t, dma_t *); /* mandatory */ | 20 | void (*enable)(unsigned int, dma_t *); /* mandatory */ |
| 21 | void (*disable)(dmach_t, dma_t *); /* mandatory */ | 21 | void (*disable)(unsigned int, dma_t *); /* mandatory */ |
| 22 | int (*residue)(dmach_t, dma_t *); /* optional */ | 22 | int (*residue)(unsigned int, dma_t *); /* optional */ |
| 23 | int (*setspeed)(dmach_t, dma_t *, int); /* optional */ | 23 | int (*setspeed)(unsigned int, dma_t *, int); /* optional */ |
| 24 | char *type; | 24 | const char *type; |
| 25 | }; | 25 | }; |
| 26 | 26 | ||
| 27 | struct dma_struct { | 27 | struct dma_struct { |
| @@ -34,24 +34,21 @@ struct dma_struct { | |||
| 34 | unsigned int active:1; /* Transfer active */ | 34 | unsigned int active:1; /* Transfer active */ |
| 35 | unsigned int invalid:1; /* Address/Count changed */ | 35 | unsigned int invalid:1; /* Address/Count changed */ |
| 36 | 36 | ||
| 37 | dmamode_t dma_mode; /* DMA mode */ | 37 | unsigned int dma_mode; /* DMA mode */ |
| 38 | int speed; /* DMA speed */ | 38 | int speed; /* DMA speed */ |
| 39 | 39 | ||
| 40 | unsigned int lock; /* Device is allocated */ | 40 | unsigned int lock; /* Device is allocated */ |
| 41 | const char *device_id; /* Device name */ | 41 | const char *device_id; /* Device name */ |
| 42 | 42 | ||
| 43 | unsigned int dma_base; /* Controller base address */ | 43 | const struct dma_ops *d_ops; |
| 44 | int dma_irq; /* Controller IRQ */ | ||
| 45 | struct scatterlist cur_sg; /* Current controller buffer */ | ||
| 46 | unsigned int state; | ||
| 47 | |||
| 48 | struct dma_ops *d_ops; | ||
| 49 | }; | 44 | }; |
| 50 | 45 | ||
| 51 | /* Prototype: void arch_dma_init(dma) | 46 | /* |
| 52 | * Purpose : Initialise architecture specific DMA | 47 | * isa_dma_add - add an ISA-style DMA channel |
| 53 | * Params : dma - pointer to array of DMA structures | ||
| 54 | */ | 48 | */ |
| 55 | extern void arch_dma_init(dma_t *dma); | 49 | extern int isa_dma_add(unsigned int, dma_t *dma); |
| 56 | 50 | ||
| 57 | extern void isa_init_dma(dma_t *dma); | 51 | /* |
| 52 | * Add the ISA DMA controller. Always takes channels 0-7. | ||
| 53 | */ | ||
| 54 | extern void isa_init_dma(void); | ||
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h index 39d949b63e80..58cf91f38e6f 100644 --- a/arch/arm/include/asm/mach/map.h +++ b/arch/arm/include/asm/mach/map.h | |||
| @@ -26,6 +26,7 @@ struct map_desc { | |||
| 26 | #define MT_HIGH_VECTORS 8 | 26 | #define MT_HIGH_VECTORS 8 |
| 27 | #define MT_MEMORY 9 | 27 | #define MT_MEMORY 9 |
| 28 | #define MT_ROM 10 | 28 | #define MT_ROM 10 |
| 29 | #define MT_MEMORY_NONCACHED 11 | ||
| 29 | 30 | ||
| 30 | #ifdef CONFIG_MMU | 31 | #ifdef CONFIG_MMU |
| 31 | extern void iotable_init(struct map_desc *, int); | 32 | extern void iotable_init(struct map_desc *, int); |
diff --git a/arch/arm/include/asm/module.h b/arch/arm/include/asm/module.h index 24b168dc31a3..e4dfa69abb68 100644 --- a/arch/arm/include/asm/module.h +++ b/arch/arm/include/asm/module.h | |||
| @@ -1,15 +1,27 @@ | |||
| 1 | #ifndef _ASM_ARM_MODULE_H | 1 | #ifndef _ASM_ARM_MODULE_H |
| 2 | #define _ASM_ARM_MODULE_H | 2 | #define _ASM_ARM_MODULE_H |
| 3 | 3 | ||
| 4 | struct mod_arch_specific | ||
| 5 | { | ||
| 6 | int foo; | ||
| 7 | }; | ||
| 8 | |||
| 9 | #define Elf_Shdr Elf32_Shdr | 4 | #define Elf_Shdr Elf32_Shdr |
| 10 | #define Elf_Sym Elf32_Sym | 5 | #define Elf_Sym Elf32_Sym |
| 11 | #define Elf_Ehdr Elf32_Ehdr | 6 | #define Elf_Ehdr Elf32_Ehdr |
| 12 | 7 | ||
| 8 | struct unwind_table; | ||
| 9 | |||
| 10 | struct mod_arch_specific | ||
| 11 | { | ||
| 12 | #ifdef CONFIG_ARM_UNWIND | ||
| 13 | Elf_Shdr *unw_sec_init; | ||
| 14 | Elf_Shdr *unw_sec_devinit; | ||
| 15 | Elf_Shdr *unw_sec_core; | ||
| 16 | Elf_Shdr *sec_init_text; | ||
| 17 | Elf_Shdr *sec_devinit_text; | ||
| 18 | Elf_Shdr *sec_core_text; | ||
| 19 | struct unwind_table *unwind_init; | ||
| 20 | struct unwind_table *unwind_devinit; | ||
| 21 | struct unwind_table *unwind_core; | ||
| 22 | #endif | ||
| 23 | }; | ||
| 24 | |||
| 13 | /* | 25 | /* |
| 14 | * Include the ARM architecture version. | 26 | * Include the ARM architecture version. |
| 15 | */ | 27 | */ |
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h index 73192618f1c2..236a06b9b7ce 100644 --- a/arch/arm/include/asm/ptrace.h +++ b/arch/arm/include/asm/ptrace.h | |||
| @@ -27,6 +27,8 @@ | |||
| 27 | /* PTRACE_SYSCALL is 24 */ | 27 | /* PTRACE_SYSCALL is 24 */ |
| 28 | #define PTRACE_GETCRUNCHREGS 25 | 28 | #define PTRACE_GETCRUNCHREGS 25 |
| 29 | #define PTRACE_SETCRUNCHREGS 26 | 29 | #define PTRACE_SETCRUNCHREGS 26 |
| 30 | #define PTRACE_GETVFPREGS 27 | ||
| 31 | #define PTRACE_SETVFPREGS 28 | ||
| 30 | 32 | ||
| 31 | /* | 33 | /* |
| 32 | * PSR bits | 34 | * PSR bits |
diff --git a/arch/arm/include/asm/stacktrace.h b/arch/arm/include/asm/stacktrace.h new file mode 100644 index 000000000000..4d0a16441b29 --- /dev/null +++ b/arch/arm/include/asm/stacktrace.h | |||
| @@ -0,0 +1,15 @@ | |||
| 1 | #ifndef __ASM_STACKTRACE_H | ||
| 2 | #define __ASM_STACKTRACE_H | ||
| 3 | |||
| 4 | struct stackframe { | ||
| 5 | unsigned long fp; | ||
| 6 | unsigned long sp; | ||
| 7 | unsigned long lr; | ||
| 8 | unsigned long pc; | ||
| 9 | }; | ||
| 10 | |||
| 11 | extern int unwind_frame(struct stackframe *frame); | ||
| 12 | extern void walk_stackframe(struct stackframe *frame, | ||
| 13 | int (*fn)(struct stackframe *, void *), void *data); | ||
| 14 | |||
| 15 | #endif /* __ASM_STACKTRACE_H */ | ||
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h index 68b9ec82a37f..4f8848260ee2 100644 --- a/arch/arm/include/asm/thread_info.h +++ b/arch/arm/include/asm/thread_info.h | |||
| @@ -99,6 +99,8 @@ static inline struct thread_info *current_thread_info(void) | |||
| 99 | 99 | ||
| 100 | #define thread_saved_pc(tsk) \ | 100 | #define thread_saved_pc(tsk) \ |
| 101 | ((unsigned long)(task_thread_info(tsk)->cpu_context.pc)) | 101 | ((unsigned long)(task_thread_info(tsk)->cpu_context.pc)) |
| 102 | #define thread_saved_sp(tsk) \ | ||
| 103 | ((unsigned long)(task_thread_info(tsk)->cpu_context.sp)) | ||
| 102 | #define thread_saved_fp(tsk) \ | 104 | #define thread_saved_fp(tsk) \ |
| 103 | ((unsigned long)(task_thread_info(tsk)->cpu_context.fp)) | 105 | ((unsigned long)(task_thread_info(tsk)->cpu_context.fp)) |
| 104 | 106 | ||
| @@ -113,6 +115,8 @@ extern void iwmmxt_task_restore(struct thread_info *, void *); | |||
| 113 | extern void iwmmxt_task_release(struct thread_info *); | 115 | extern void iwmmxt_task_release(struct thread_info *); |
| 114 | extern void iwmmxt_task_switch(struct thread_info *); | 116 | extern void iwmmxt_task_switch(struct thread_info *); |
| 115 | 117 | ||
| 118 | extern void vfp_sync_state(struct thread_info *thread); | ||
| 119 | |||
| 116 | #endif | 120 | #endif |
| 117 | 121 | ||
| 118 | /* | 122 | /* |
diff --git a/arch/arm/include/asm/traps.h b/arch/arm/include/asm/traps.h index aa399aec568e..491960bf4260 100644 --- a/arch/arm/include/asm/traps.h +++ b/arch/arm/include/asm/traps.h | |||
| @@ -25,5 +25,6 @@ static inline int in_exception_text(unsigned long ptr) | |||
| 25 | } | 25 | } |
| 26 | 26 | ||
| 27 | extern void __init early_trap_init(void); | 27 | extern void __init early_trap_init(void); |
| 28 | extern void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame); | ||
| 28 | 29 | ||
| 29 | #endif | 30 | #endif |
diff --git a/arch/arm/include/asm/unwind.h b/arch/arm/include/asm/unwind.h new file mode 100644 index 000000000000..a5edf421005c --- /dev/null +++ b/arch/arm/include/asm/unwind.h | |||
| @@ -0,0 +1,69 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/include/asm/unwind.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 ARM Limited | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, | ||
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License | ||
| 16 | * along with this program; if not, write to the Free Software | ||
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 18 | */ | ||
| 19 | |||
| 20 | #ifndef __ASM_UNWIND_H | ||
| 21 | #define __ASM_UNWIND_H | ||
| 22 | |||
| 23 | #ifndef __ASSEMBLY__ | ||
| 24 | |||
| 25 | /* Unwind reason code according the the ARM EABI documents */ | ||
| 26 | enum unwind_reason_code { | ||
| 27 | URC_OK = 0, /* operation completed successfully */ | ||
| 28 | URC_CONTINUE_UNWIND = 8, | ||
| 29 | URC_FAILURE = 9 /* unspecified failure of some kind */ | ||
| 30 | }; | ||
| 31 | |||
| 32 | struct unwind_idx { | ||
| 33 | unsigned long addr; | ||
| 34 | unsigned long insn; | ||
| 35 | }; | ||
| 36 | |||
| 37 | struct unwind_table { | ||
| 38 | struct list_head list; | ||
| 39 | struct unwind_idx *start; | ||
| 40 | struct unwind_idx *stop; | ||
| 41 | unsigned long begin_addr; | ||
| 42 | unsigned long end_addr; | ||
| 43 | }; | ||
| 44 | |||
| 45 | extern struct unwind_table *unwind_table_add(unsigned long start, | ||
| 46 | unsigned long size, | ||
| 47 | unsigned long text_addr, | ||
| 48 | unsigned long text_size); | ||
| 49 | extern void unwind_table_del(struct unwind_table *tab); | ||
| 50 | extern void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk); | ||
| 51 | |||
| 52 | #ifdef CONFIG_ARM_UNWIND | ||
| 53 | extern int __init unwind_init(void); | ||
| 54 | #else | ||
| 55 | static inline int __init unwind_init(void) | ||
| 56 | { | ||
| 57 | return 0; | ||
| 58 | } | ||
| 59 | #endif | ||
| 60 | |||
| 61 | #endif /* !__ASSEMBLY__ */ | ||
| 62 | |||
| 63 | #ifdef CONFIG_ARM_UNWIND | ||
| 64 | #define UNWIND(code...) code | ||
| 65 | #else | ||
| 66 | #define UNWIND(code...) | ||
| 67 | #endif | ||
| 68 | |||
| 69 | #endif /* __ASM_UNWIND_H */ | ||
diff --git a/arch/arm/include/asm/user.h b/arch/arm/include/asm/user.h index 825c1e7c582d..df95e050f9dd 100644 --- a/arch/arm/include/asm/user.h +++ b/arch/arm/include/asm/user.h | |||
| @@ -81,4 +81,13 @@ struct user{ | |||
| 81 | #define HOST_TEXT_START_ADDR (u.start_code) | 81 | #define HOST_TEXT_START_ADDR (u.start_code) |
| 82 | #define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) | 82 | #define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) |
| 83 | 83 | ||
| 84 | /* | ||
| 85 | * User specific VFP registers. If only VFPv2 is present, registers 16 to 31 | ||
| 86 | * are ignored by the ptrace system call. | ||
| 87 | */ | ||
| 88 | struct user_vfp { | ||
| 89 | unsigned long long fpregs[32]; | ||
| 90 | unsigned long fpscr; | ||
| 91 | }; | ||
| 92 | |||
| 84 | #endif /* _ARM_USER_H */ | 93 | #endif /* _ARM_USER_H */ |
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 4305345987d3..ca60d335e8fa 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile | |||
| @@ -29,6 +29,7 @@ obj-$(CONFIG_ATAGS_PROC) += atags.o | |||
| 29 | obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o | 29 | obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o |
| 30 | obj-$(CONFIG_ARM_THUMBEE) += thumbee.o | 30 | obj-$(CONFIG_ARM_THUMBEE) += thumbee.o |
| 31 | obj-$(CONFIG_KGDB) += kgdb.o | 31 | obj-$(CONFIG_KGDB) += kgdb.o |
| 32 | obj-$(CONFIG_ARM_UNWIND) += unwind.o | ||
| 32 | 33 | ||
| 33 | obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o | 34 | obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o |
| 34 | AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 | 35 | AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 |
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index f53c58290543..b121b6053cce 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S | |||
| @@ -49,6 +49,33 @@ | |||
| 49 | 1002: | 49 | 1002: |
| 50 | .endm | 50 | .endm |
| 51 | 51 | ||
| 52 | #elif defined(CONFIG_CPU_XSCALE) | ||
| 53 | |||
| 54 | .macro addruart, rx | ||
| 55 | .endm | ||
| 56 | |||
| 57 | .macro senduart, rd, rx | ||
| 58 | mcr p14, 0, \rd, c8, c0, 0 | ||
| 59 | .endm | ||
| 60 | |||
| 61 | .macro busyuart, rd, rx | ||
| 62 | 1001: | ||
| 63 | mrc p14, 0, \rx, c14, c0, 0 | ||
| 64 | tst \rx, #0x10000000 | ||
| 65 | beq 1001b | ||
| 66 | .endm | ||
| 67 | |||
| 68 | .macro waituart, rd, rx | ||
| 69 | mov \rd, #0x10000000 | ||
| 70 | 1001: | ||
| 71 | subs \rd, \rd, #1 | ||
| 72 | bmi 1002f | ||
| 73 | mrc p14, 0, \rx, c14, c0, 0 | ||
| 74 | tst \rx, #0x10000000 | ||
| 75 | bne 1001b | ||
| 76 | 1002: | ||
| 77 | .endm | ||
| 78 | |||
| 52 | #else | 79 | #else |
| 53 | 80 | ||
| 54 | .macro addruart, rx | 81 | .macro addruart, rx |
diff --git a/arch/arm/kernel/dma-isa.c b/arch/arm/kernel/dma-isa.c index 4a3a50495c60..0e88e46fc732 100644 --- a/arch/arm/kernel/dma-isa.c +++ b/arch/arm/kernel/dma-isa.c | |||
| @@ -24,11 +24,6 @@ | |||
| 24 | #include <asm/dma.h> | 24 | #include <asm/dma.h> |
| 25 | #include <asm/mach/dma.h> | 25 | #include <asm/mach/dma.h> |
| 26 | 26 | ||
| 27 | #define ISA_DMA_MODE_READ 0x44 | ||
| 28 | #define ISA_DMA_MODE_WRITE 0x48 | ||
| 29 | #define ISA_DMA_MODE_CASCADE 0xc0 | ||
| 30 | #define ISA_DMA_AUTOINIT 0x10 | ||
| 31 | |||
| 32 | #define ISA_DMA_MASK 0 | 27 | #define ISA_DMA_MASK 0 |
| 33 | #define ISA_DMA_MODE 1 | 28 | #define ISA_DMA_MODE 1 |
| 34 | #define ISA_DMA_CLRFF 2 | 29 | #define ISA_DMA_CLRFF 2 |
| @@ -49,38 +44,35 @@ static unsigned int isa_dma_port[8][7] = { | |||
| 49 | { 0xd4, 0xd6, 0xd8, 0x48a, 0x08a, 0xcc, 0xce } | 44 | { 0xd4, 0xd6, 0xd8, 0x48a, 0x08a, 0xcc, 0xce } |
| 50 | }; | 45 | }; |
| 51 | 46 | ||
| 52 | static int isa_get_dma_residue(dmach_t channel, dma_t *dma) | 47 | static int isa_get_dma_residue(unsigned int chan, dma_t *dma) |
| 53 | { | 48 | { |
| 54 | unsigned int io_port = isa_dma_port[channel][ISA_DMA_COUNT]; | 49 | unsigned int io_port = isa_dma_port[chan][ISA_DMA_COUNT]; |
| 55 | int count; | 50 | int count; |
| 56 | 51 | ||
| 57 | count = 1 + inb(io_port); | 52 | count = 1 + inb(io_port); |
| 58 | count |= inb(io_port) << 8; | 53 | count |= inb(io_port) << 8; |
| 59 | 54 | ||
| 60 | return channel < 4 ? count : (count << 1); | 55 | return chan < 4 ? count : (count << 1); |
| 61 | } | 56 | } |
| 62 | 57 | ||
| 63 | static void isa_enable_dma(dmach_t channel, dma_t *dma) | 58 | static void isa_enable_dma(unsigned int chan, dma_t *dma) |
| 64 | { | 59 | { |
| 65 | if (dma->invalid) { | 60 | if (dma->invalid) { |
| 66 | unsigned long address, length; | 61 | unsigned long address, length; |
| 67 | unsigned int mode; | 62 | unsigned int mode; |
| 68 | enum dma_data_direction direction; | 63 | enum dma_data_direction direction; |
| 69 | 64 | ||
| 70 | mode = channel & 3; | 65 | mode = (chan & 3) | dma->dma_mode; |
| 71 | switch (dma->dma_mode & DMA_MODE_MASK) { | 66 | switch (dma->dma_mode & DMA_MODE_MASK) { |
| 72 | case DMA_MODE_READ: | 67 | case DMA_MODE_READ: |
| 73 | mode |= ISA_DMA_MODE_READ; | ||
| 74 | direction = DMA_FROM_DEVICE; | 68 | direction = DMA_FROM_DEVICE; |
| 75 | break; | 69 | break; |
| 76 | 70 | ||
| 77 | case DMA_MODE_WRITE: | 71 | case DMA_MODE_WRITE: |
| 78 | mode |= ISA_DMA_MODE_WRITE; | ||
| 79 | direction = DMA_TO_DEVICE; | 72 | direction = DMA_TO_DEVICE; |
| 80 | break; | 73 | break; |
| 81 | 74 | ||
| 82 | case DMA_MODE_CASCADE: | 75 | case DMA_MODE_CASCADE: |
| 83 | mode |= ISA_DMA_MODE_CASCADE; | ||
| 84 | direction = DMA_BIDIRECTIONAL; | 76 | direction = DMA_BIDIRECTIONAL; |
| 85 | break; | 77 | break; |
| 86 | 78 | ||
| @@ -105,34 +97,31 @@ static void isa_enable_dma(dmach_t channel, dma_t *dma) | |||
| 105 | address = dma->buf.dma_address; | 97 | address = dma->buf.dma_address; |
| 106 | length = dma->buf.length - 1; | 98 | length = dma->buf.length - 1; |
| 107 | 99 | ||
| 108 | outb(address >> 16, isa_dma_port[channel][ISA_DMA_PGLO]); | 100 | outb(address >> 16, isa_dma_port[chan][ISA_DMA_PGLO]); |
| 109 | outb(address >> 24, isa_dma_port[channel][ISA_DMA_PGHI]); | 101 | outb(address >> 24, isa_dma_port[chan][ISA_DMA_PGHI]); |
| 110 | 102 | ||
| 111 | if (channel >= 4) { | 103 | if (chan >= 4) { |
| 112 | address >>= 1; | 104 | address >>= 1; |
| 113 | length >>= 1; | 105 | length >>= 1; |
| 114 | } | 106 | } |
| 115 | 107 | ||
| 116 | outb(0, isa_dma_port[channel][ISA_DMA_CLRFF]); | 108 | outb(0, isa_dma_port[chan][ISA_DMA_CLRFF]); |
| 117 | |||
| 118 | outb(address, isa_dma_port[channel][ISA_DMA_ADDR]); | ||
| 119 | outb(address >> 8, isa_dma_port[channel][ISA_DMA_ADDR]); | ||
| 120 | 109 | ||
| 121 | outb(length, isa_dma_port[channel][ISA_DMA_COUNT]); | 110 | outb(address, isa_dma_port[chan][ISA_DMA_ADDR]); |
| 122 | outb(length >> 8, isa_dma_port[channel][ISA_DMA_COUNT]); | 111 | outb(address >> 8, isa_dma_port[chan][ISA_DMA_ADDR]); |
| 123 | 112 | ||
| 124 | if (dma->dma_mode & DMA_AUTOINIT) | 113 | outb(length, isa_dma_port[chan][ISA_DMA_COUNT]); |
| 125 | mode |= ISA_DMA_AUTOINIT; | 114 | outb(length >> 8, isa_dma_port[chan][ISA_DMA_COUNT]); |
| 126 | 115 | ||
| 127 | outb(mode, isa_dma_port[channel][ISA_DMA_MODE]); | 116 | outb(mode, isa_dma_port[chan][ISA_DMA_MODE]); |
| 128 | dma->invalid = 0; | 117 | dma->invalid = 0; |
| 129 | } | 118 | } |
| 130 | outb(channel & 3, isa_dma_port[channel][ISA_DMA_MASK]); | 119 | outb(chan & 3, isa_dma_port[chan][ISA_DMA_MASK]); |
| 131 | } | 120 | } |
| 132 | 121 | ||
| 133 | static void isa_disable_dma(dmach_t channel, dma_t *dma) | 122 | static void isa_disable_dma(unsigned int chan, dma_t *dma) |
| 134 | { | 123 | { |
| 135 | outb(channel | 4, isa_dma_port[channel][ISA_DMA_MASK]); | 124 | outb(chan | 4, isa_dma_port[chan][ISA_DMA_MASK]); |
| 136 | } | 125 | } |
| 137 | 126 | ||
| 138 | static struct dma_ops isa_dma_ops = { | 127 | static struct dma_ops isa_dma_ops = { |
| @@ -160,7 +149,12 @@ static struct resource dma_resources[] = { { | |||
| 160 | .end = 0x048f | 149 | .end = 0x048f |
| 161 | } }; | 150 | } }; |
| 162 | 151 | ||
| 163 | void __init isa_init_dma(dma_t *dma) | 152 | static dma_t isa_dma[8]; |
| 153 | |||
| 154 | /* | ||
| 155 | * ISA DMA always starts at channel 0 | ||
| 156 | */ | ||
| 157 | void __init isa_init_dma(void) | ||
| 164 | { | 158 | { |
| 165 | /* | 159 | /* |
| 166 | * Try to autodetect presence of an ISA DMA controller. | 160 | * Try to autodetect presence of an ISA DMA controller. |
| @@ -178,11 +172,11 @@ void __init isa_init_dma(dma_t *dma) | |||
| 178 | outb(0xaa, 0x00); | 172 | outb(0xaa, 0x00); |
| 179 | 173 | ||
| 180 | if (inb(0) == 0x55 && inb(0) == 0xaa) { | 174 | if (inb(0) == 0x55 && inb(0) == 0xaa) { |
| 181 | int channel, i; | 175 | unsigned int chan, i; |
| 182 | 176 | ||
| 183 | for (channel = 0; channel < 8; channel++) { | 177 | for (chan = 0; chan < 8; chan++) { |
| 184 | dma[channel].d_ops = &isa_dma_ops; | 178 | isa_dma[chan].d_ops = &isa_dma_ops; |
| 185 | isa_disable_dma(channel, NULL); | 179 | isa_disable_dma(chan, NULL); |
| 186 | } | 180 | } |
| 187 | 181 | ||
| 188 | outb(0x40, 0x0b); | 182 | outb(0x40, 0x0b); |
| @@ -217,5 +211,12 @@ void __init isa_init_dma(dma_t *dma) | |||
| 217 | 211 | ||
| 218 | for (i = 0; i < ARRAY_SIZE(dma_resources); i++) | 212 | for (i = 0; i < ARRAY_SIZE(dma_resources); i++) |
| 219 | request_resource(&ioport_resource, dma_resources + i); | 213 | request_resource(&ioport_resource, dma_resources + i); |
| 214 | |||
| 215 | for (chan = 0; chan < 8; chan++) { | ||
| 216 | int ret = isa_dma_add(chan, &isa_dma[chan]); | ||
| 217 | if (ret) | ||
| 218 | printk(KERN_ERR "ISADMA%u: unable to register: %d\n", | ||
| 219 | chan, ret); | ||
| 220 | } | ||
| 220 | } | 221 | } |
| 221 | } | 222 | } |
diff --git a/arch/arm/kernel/dma.c b/arch/arm/kernel/dma.c index d006085ed7e7..7d5b9fb01e71 100644 --- a/arch/arm/kernel/dma.c +++ b/arch/arm/kernel/dma.c | |||
| @@ -15,6 +15,7 @@ | |||
| 15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
| 16 | #include <linux/spinlock.h> | 16 | #include <linux/spinlock.h> |
| 17 | #include <linux/errno.h> | 17 | #include <linux/errno.h> |
| 18 | #include <linux/scatterlist.h> | ||
| 18 | 19 | ||
| 19 | #include <asm/dma.h> | 20 | #include <asm/dma.h> |
| 20 | 21 | ||
| @@ -23,19 +24,40 @@ | |||
| 23 | DEFINE_SPINLOCK(dma_spin_lock); | 24 | DEFINE_SPINLOCK(dma_spin_lock); |
| 24 | EXPORT_SYMBOL(dma_spin_lock); | 25 | EXPORT_SYMBOL(dma_spin_lock); |
| 25 | 26 | ||
| 26 | static dma_t dma_chan[MAX_DMA_CHANNELS]; | 27 | static dma_t *dma_chan[MAX_DMA_CHANNELS]; |
| 28 | |||
| 29 | static inline dma_t *dma_channel(unsigned int chan) | ||
| 30 | { | ||
| 31 | if (chan >= MAX_DMA_CHANNELS) | ||
| 32 | return NULL; | ||
| 33 | |||
| 34 | return dma_chan[chan]; | ||
| 35 | } | ||
| 36 | |||
| 37 | int __init isa_dma_add(unsigned int chan, dma_t *dma) | ||
| 38 | { | ||
| 39 | if (!dma->d_ops) | ||
| 40 | return -EINVAL; | ||
| 41 | |||
| 42 | sg_init_table(&dma->buf, 1); | ||
| 43 | |||
| 44 | if (dma_chan[chan]) | ||
| 45 | return -EBUSY; | ||
| 46 | dma_chan[chan] = dma; | ||
| 47 | return 0; | ||
| 48 | } | ||
| 27 | 49 | ||
| 28 | /* | 50 | /* |
| 29 | * Request DMA channel | 51 | * Request DMA channel |
| 30 | * | 52 | * |
| 31 | * On certain platforms, we have to allocate an interrupt as well... | 53 | * On certain platforms, we have to allocate an interrupt as well... |
| 32 | */ | 54 | */ |
| 33 | int request_dma(dmach_t channel, const char *device_id) | 55 | int request_dma(unsigned int chan, const char *device_id) |
| 34 | { | 56 | { |
| 35 | dma_t *dma = dma_chan + channel; | 57 | dma_t *dma = dma_channel(chan); |
| 36 | int ret; | 58 | int ret; |
| 37 | 59 | ||
| 38 | if (channel >= MAX_DMA_CHANNELS || !dma->d_ops) | 60 | if (!dma) |
| 39 | goto bad_dma; | 61 | goto bad_dma; |
| 40 | 62 | ||
| 41 | if (xchg(&dma->lock, 1) != 0) | 63 | if (xchg(&dma->lock, 1) != 0) |
| @@ -47,7 +69,7 @@ int request_dma(dmach_t channel, const char *device_id) | |||
| 47 | 69 | ||
| 48 | ret = 0; | 70 | ret = 0; |
| 49 | if (dma->d_ops->request) | 71 | if (dma->d_ops->request) |
| 50 | ret = dma->d_ops->request(channel, dma); | 72 | ret = dma->d_ops->request(chan, dma); |
| 51 | 73 | ||
| 52 | if (ret) | 74 | if (ret) |
| 53 | xchg(&dma->lock, 0); | 75 | xchg(&dma->lock, 0); |
| @@ -55,7 +77,7 @@ int request_dma(dmach_t channel, const char *device_id) | |||
| 55 | return ret; | 77 | return ret; |
| 56 | 78 | ||
| 57 | bad_dma: | 79 | bad_dma: |
| 58 | printk(KERN_ERR "dma: trying to allocate DMA%d\n", channel); | 80 | printk(KERN_ERR "dma: trying to allocate DMA%d\n", chan); |
| 59 | return -EINVAL; | 81 | return -EINVAL; |
| 60 | 82 | ||
| 61 | busy: | 83 | busy: |
| @@ -68,42 +90,42 @@ EXPORT_SYMBOL(request_dma); | |||
| 68 | * | 90 | * |
| 69 | * On certain platforms, we have to free interrupt as well... | 91 | * On certain platforms, we have to free interrupt as well... |
| 70 | */ | 92 | */ |
| 71 | void free_dma(dmach_t channel) | 93 | void free_dma(unsigned int chan) |
| 72 | { | 94 | { |
| 73 | dma_t *dma = dma_chan + channel; | 95 | dma_t *dma = dma_channel(chan); |
| 74 | 96 | ||
| 75 | if (channel >= MAX_DMA_CHANNELS || !dma->d_ops) | 97 | if (!dma) |
| 76 | goto bad_dma; | 98 | goto bad_dma; |
| 77 | 99 | ||
| 78 | if (dma->active) { | 100 | if (dma->active) { |
| 79 | printk(KERN_ERR "dma%d: freeing active DMA\n", channel); | 101 | printk(KERN_ERR "dma%d: freeing active DMA\n", chan); |
| 80 | dma->d_ops->disable(channel, dma); | 102 | dma->d_ops->disable(chan, dma); |
| 81 | dma->active = 0; | 103 | dma->active = 0; |
| 82 | } | 104 | } |
| 83 | 105 | ||
| 84 | if (xchg(&dma->lock, 0) != 0) { | 106 | if (xchg(&dma->lock, 0) != 0) { |
| 85 | if (dma->d_ops->free) | 107 | if (dma->d_ops->free) |
| 86 | dma->d_ops->free(channel, dma); | 108 | dma->d_ops->free(chan, dma); |
| 87 | return; | 109 | return; |
| 88 | } | 110 | } |
| 89 | 111 | ||
| 90 | printk(KERN_ERR "dma%d: trying to free free DMA\n", channel); | 112 | printk(KERN_ERR "dma%d: trying to free free DMA\n", chan); |
| 91 | return; | 113 | return; |
| 92 | 114 | ||
| 93 | bad_dma: | 115 | bad_dma: |
| 94 | printk(KERN_ERR "dma: trying to free DMA%d\n", channel); | 116 | printk(KERN_ERR "dma: trying to free DMA%d\n", chan); |
| 95 | } | 117 | } |
| 96 | EXPORT_SYMBOL(free_dma); | 118 | EXPORT_SYMBOL(free_dma); |
| 97 | 119 | ||
| 98 | /* Set DMA Scatter-Gather list | 120 | /* Set DMA Scatter-Gather list |
| 99 | */ | 121 | */ |
| 100 | void set_dma_sg (dmach_t channel, struct scatterlist *sg, int nr_sg) | 122 | void set_dma_sg (unsigned int chan, struct scatterlist *sg, int nr_sg) |
| 101 | { | 123 | { |
| 102 | dma_t *dma = dma_chan + channel; | 124 | dma_t *dma = dma_channel(chan); |
| 103 | 125 | ||
| 104 | if (dma->active) | 126 | if (dma->active) |
| 105 | printk(KERN_ERR "dma%d: altering DMA SG while " | 127 | printk(KERN_ERR "dma%d: altering DMA SG while " |
| 106 | "DMA active\n", channel); | 128 | "DMA active\n", chan); |
| 107 | 129 | ||
| 108 | dma->sg = sg; | 130 | dma->sg = sg; |
| 109 | dma->sgcount = nr_sg; | 131 | dma->sgcount = nr_sg; |
| @@ -115,13 +137,13 @@ EXPORT_SYMBOL(set_dma_sg); | |||
| 115 | * | 137 | * |
| 116 | * Copy address to the structure, and set the invalid bit | 138 | * Copy address to the structure, and set the invalid bit |
| 117 | */ | 139 | */ |
| 118 | void __set_dma_addr (dmach_t channel, void *addr) | 140 | void __set_dma_addr (unsigned int chan, void *addr) |
| 119 | { | 141 | { |
| 120 | dma_t *dma = dma_chan + channel; | 142 | dma_t *dma = dma_channel(chan); |
| 121 | 143 | ||
| 122 | if (dma->active) | 144 | if (dma->active) |
| 123 | printk(KERN_ERR "dma%d: altering DMA address while " | 145 | printk(KERN_ERR "dma%d: altering DMA address while " |
| 124 | "DMA active\n", channel); | 146 | "DMA active\n", chan); |
| 125 | 147 | ||
| 126 | dma->sg = NULL; | 148 | dma->sg = NULL; |
| 127 | dma->addr = addr; | 149 | dma->addr = addr; |
| @@ -133,13 +155,13 @@ EXPORT_SYMBOL(__set_dma_addr); | |||
| 133 | * | 155 | * |
| 134 | * Copy address to the structure, and set the invalid bit | 156 | * Copy address to the structure, and set the invalid bit |
| 135 | */ | 157 | */ |
| 136 | void set_dma_count (dmach_t channel, unsigned long count) | 158 | void set_dma_count (unsigned int chan, unsigned long count) |
| 137 | { | 159 | { |
| 138 | dma_t *dma = dma_chan + channel; | 160 | dma_t *dma = dma_channel(chan); |
| 139 | 161 | ||
| 140 | if (dma->active) | 162 | if (dma->active) |
| 141 | printk(KERN_ERR "dma%d: altering DMA count while " | 163 | printk(KERN_ERR "dma%d: altering DMA count while " |
| 142 | "DMA active\n", channel); | 164 | "DMA active\n", chan); |
| 143 | 165 | ||
| 144 | dma->sg = NULL; | 166 | dma->sg = NULL; |
| 145 | dma->count = count; | 167 | dma->count = count; |
| @@ -149,13 +171,13 @@ EXPORT_SYMBOL(set_dma_count); | |||
| 149 | 171 | ||
| 150 | /* Set DMA direction mode | 172 | /* Set DMA direction mode |
| 151 | */ | 173 | */ |
| 152 | void set_dma_mode (dmach_t channel, dmamode_t mode) | 174 | void set_dma_mode (unsigned int chan, unsigned int mode) |
| 153 | { | 175 | { |
| 154 | dma_t *dma = dma_chan + channel; | 176 | dma_t *dma = dma_channel(chan); |
| 155 | 177 | ||
| 156 | if (dma->active) | 178 | if (dma->active) |
| 157 | printk(KERN_ERR "dma%d: altering DMA mode while " | 179 | printk(KERN_ERR "dma%d: altering DMA mode while " |
| 158 | "DMA active\n", channel); | 180 | "DMA active\n", chan); |
| 159 | 181 | ||
| 160 | dma->dma_mode = mode; | 182 | dma->dma_mode = mode; |
| 161 | dma->invalid = 1; | 183 | dma->invalid = 1; |
| @@ -164,42 +186,42 @@ EXPORT_SYMBOL(set_dma_mode); | |||
| 164 | 186 | ||
| 165 | /* Enable DMA channel | 187 | /* Enable DMA channel |
| 166 | */ | 188 | */ |
| 167 | void enable_dma (dmach_t channel) | 189 | void enable_dma (unsigned int chan) |
| 168 | { | 190 | { |
| 169 | dma_t *dma = dma_chan + channel; | 191 | dma_t *dma = dma_channel(chan); |
| 170 | 192 | ||
| 171 | if (!dma->lock) | 193 | if (!dma->lock) |
| 172 | goto free_dma; | 194 | goto free_dma; |
| 173 | 195 | ||
| 174 | if (dma->active == 0) { | 196 | if (dma->active == 0) { |
| 175 | dma->active = 1; | 197 | dma->active = 1; |
| 176 | dma->d_ops->enable(channel, dma); | 198 | dma->d_ops->enable(chan, dma); |
| 177 | } | 199 | } |
| 178 | return; | 200 | return; |
| 179 | 201 | ||
| 180 | free_dma: | 202 | free_dma: |
| 181 | printk(KERN_ERR "dma%d: trying to enable free DMA\n", channel); | 203 | printk(KERN_ERR "dma%d: trying to enable free DMA\n", chan); |
| 182 | BUG(); | 204 | BUG(); |
| 183 | } | 205 | } |
| 184 | EXPORT_SYMBOL(enable_dma); | 206 | EXPORT_SYMBOL(enable_dma); |
| 185 | 207 | ||
| 186 | /* Disable DMA channel | 208 | /* Disable DMA channel |
| 187 | */ | 209 | */ |
| 188 | void disable_dma (dmach_t channel) | 210 | void disable_dma (unsigned int chan) |
| 189 | { | 211 | { |
| 190 | dma_t *dma = dma_chan + channel; | 212 | dma_t *dma = dma_channel(chan); |
| 191 | 213 | ||
| 192 | if (!dma->lock) | 214 | if (!dma->lock) |
| 193 | goto free_dma; | 215 | goto free_dma; |
| 194 | 216 | ||
| 195 | if (dma->active == 1) { | 217 | if (dma->active == 1) { |
| 196 | dma->active = 0; | 218 | dma->active = 0; |
| 197 | dma->d_ops->disable(channel, dma); | 219 | dma->d_ops->disable(chan, dma); |
| 198 | } | 220 | } |
| 199 | return; | 221 | return; |
| 200 | 222 | ||
| 201 | free_dma: | 223 | free_dma: |
| 202 | printk(KERN_ERR "dma%d: trying to disable free DMA\n", channel); | 224 | printk(KERN_ERR "dma%d: trying to disable free DMA\n", chan); |
| 203 | BUG(); | 225 | BUG(); |
| 204 | } | 226 | } |
| 205 | EXPORT_SYMBOL(disable_dma); | 227 | EXPORT_SYMBOL(disable_dma); |
| @@ -207,45 +229,38 @@ EXPORT_SYMBOL(disable_dma); | |||
| 207 | /* | 229 | /* |
| 208 | * Is the specified DMA channel active? | 230 | * Is the specified DMA channel active? |
| 209 | */ | 231 | */ |
| 210 | int dma_channel_active(dmach_t channel) | 232 | int dma_channel_active(unsigned int chan) |
| 211 | { | 233 | { |
| 212 | return dma_chan[channel].active; | 234 | dma_t *dma = dma_channel(chan); |
| 235 | return dma->active; | ||
| 213 | } | 236 | } |
| 214 | EXPORT_SYMBOL(dma_channel_active); | 237 | EXPORT_SYMBOL(dma_channel_active); |
| 215 | 238 | ||
| 216 | void set_dma_page(dmach_t channel, char pagenr) | 239 | void set_dma_page(unsigned int chan, char pagenr) |
| 217 | { | 240 | { |
| 218 | printk(KERN_ERR "dma%d: trying to set_dma_page\n", channel); | 241 | printk(KERN_ERR "dma%d: trying to set_dma_page\n", chan); |
| 219 | } | 242 | } |
| 220 | EXPORT_SYMBOL(set_dma_page); | 243 | EXPORT_SYMBOL(set_dma_page); |
| 221 | 244 | ||
| 222 | void set_dma_speed(dmach_t channel, int cycle_ns) | 245 | void set_dma_speed(unsigned int chan, int cycle_ns) |
| 223 | { | 246 | { |
| 224 | dma_t *dma = dma_chan + channel; | 247 | dma_t *dma = dma_channel(chan); |
| 225 | int ret = 0; | 248 | int ret = 0; |
| 226 | 249 | ||
| 227 | if (dma->d_ops->setspeed) | 250 | if (dma->d_ops->setspeed) |
| 228 | ret = dma->d_ops->setspeed(channel, dma, cycle_ns); | 251 | ret = dma->d_ops->setspeed(chan, dma, cycle_ns); |
| 229 | dma->speed = ret; | 252 | dma->speed = ret; |
| 230 | } | 253 | } |
| 231 | EXPORT_SYMBOL(set_dma_speed); | 254 | EXPORT_SYMBOL(set_dma_speed); |
| 232 | 255 | ||
| 233 | int get_dma_residue(dmach_t channel) | 256 | int get_dma_residue(unsigned int chan) |
| 234 | { | 257 | { |
| 235 | dma_t *dma = dma_chan + channel; | 258 | dma_t *dma = dma_channel(chan); |
| 236 | int ret = 0; | 259 | int ret = 0; |
| 237 | 260 | ||
| 238 | if (dma->d_ops->residue) | 261 | if (dma->d_ops->residue) |
| 239 | ret = dma->d_ops->residue(channel, dma); | 262 | ret = dma->d_ops->residue(chan, dma); |
| 240 | 263 | ||
| 241 | return ret; | 264 | return ret; |
| 242 | } | 265 | } |
| 243 | EXPORT_SYMBOL(get_dma_residue); | 266 | EXPORT_SYMBOL(get_dma_residue); |
| 244 | |||
| 245 | static int __init init_dma(void) | ||
| 246 | { | ||
| 247 | arch_dma_init(dma_chan); | ||
| 248 | return 0; | ||
| 249 | } | ||
| 250 | |||
| 251 | core_initcall(init_dma); | ||
diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c index 84849098c8e8..d4a0da1e48f4 100644 --- a/arch/arm/kernel/elf.c +++ b/arch/arm/kernel/elf.c | |||
| @@ -74,9 +74,9 @@ EXPORT_SYMBOL(elf_set_personality); | |||
| 74 | */ | 74 | */ |
| 75 | int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack) | 75 | int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack) |
| 76 | { | 76 | { |
| 77 | if (executable_stack != EXSTACK_ENABLE_X) | 77 | if (executable_stack != EXSTACK_DISABLE_X) |
| 78 | return 1; | 78 | return 1; |
| 79 | if (cpu_architecture() <= CPU_ARCH_ARMv6) | 79 | if (cpu_architecture() < CPU_ARCH_ARMv6) |
| 80 | return 1; | 80 | return 1; |
| 81 | return 0; | 81 | return 0; |
| 82 | } | 82 | } |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 85040cfeb5e5..d662a2f1fd85 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
| @@ -20,6 +20,7 @@ | |||
| 20 | #include <asm/vfpmacros.h> | 20 | #include <asm/vfpmacros.h> |
| 21 | #include <mach/entry-macro.S> | 21 | #include <mach/entry-macro.S> |
| 22 | #include <asm/thread_notify.h> | 22 | #include <asm/thread_notify.h> |
| 23 | #include <asm/unwind.h> | ||
| 23 | 24 | ||
| 24 | #include "entry-header.S" | 25 | #include "entry-header.S" |
| 25 | 26 | ||
| @@ -123,6 +124,8 @@ ENDPROC(__und_invalid) | |||
| 123 | #endif | 124 | #endif |
| 124 | 125 | ||
| 125 | .macro svc_entry, stack_hole=0 | 126 | .macro svc_entry, stack_hole=0 |
| 127 | UNWIND(.fnstart ) | ||
| 128 | UNWIND(.save {r0 - pc} ) | ||
| 126 | sub sp, sp, #(S_FRAME_SIZE + \stack_hole) | 129 | sub sp, sp, #(S_FRAME_SIZE + \stack_hole) |
| 127 | SPFIX( tst sp, #4 ) | 130 | SPFIX( tst sp, #4 ) |
| 128 | SPFIX( bicne sp, sp, #4 ) | 131 | SPFIX( bicne sp, sp, #4 ) |
| @@ -196,6 +199,7 @@ __dabt_svc: | |||
| 196 | ldr r0, [sp, #S_PSR] | 199 | ldr r0, [sp, #S_PSR] |
| 197 | msr spsr_cxsf, r0 | 200 | msr spsr_cxsf, r0 |
| 198 | ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr | 201 | ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr |
| 202 | UNWIND(.fnend ) | ||
| 199 | ENDPROC(__dabt_svc) | 203 | ENDPROC(__dabt_svc) |
| 200 | 204 | ||
| 201 | .align 5 | 205 | .align 5 |
| @@ -228,6 +232,7 @@ __irq_svc: | |||
| 228 | bleq trace_hardirqs_on | 232 | bleq trace_hardirqs_on |
| 229 | #endif | 233 | #endif |
| 230 | ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr | 234 | ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr |
| 235 | UNWIND(.fnend ) | ||
| 231 | ENDPROC(__irq_svc) | 236 | ENDPROC(__irq_svc) |
| 232 | 237 | ||
| 233 | .ltorg | 238 | .ltorg |
| @@ -278,6 +283,7 @@ __und_svc: | |||
| 278 | ldr lr, [sp, #S_PSR] @ Get SVC cpsr | 283 | ldr lr, [sp, #S_PSR] @ Get SVC cpsr |
| 279 | msr spsr_cxsf, lr | 284 | msr spsr_cxsf, lr |
| 280 | ldmia sp, {r0 - pc}^ @ Restore SVC registers | 285 | ldmia sp, {r0 - pc}^ @ Restore SVC registers |
| 286 | UNWIND(.fnend ) | ||
| 281 | ENDPROC(__und_svc) | 287 | ENDPROC(__und_svc) |
| 282 | 288 | ||
| 283 | .align 5 | 289 | .align 5 |
| @@ -320,6 +326,7 @@ __pabt_svc: | |||
| 320 | ldr r0, [sp, #S_PSR] | 326 | ldr r0, [sp, #S_PSR] |
| 321 | msr spsr_cxsf, r0 | 327 | msr spsr_cxsf, r0 |
| 322 | ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr | 328 | ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr |
| 329 | UNWIND(.fnend ) | ||
| 323 | ENDPROC(__pabt_svc) | 330 | ENDPROC(__pabt_svc) |
| 324 | 331 | ||
| 325 | .align 5 | 332 | .align 5 |
| @@ -343,6 +350,8 @@ ENDPROC(__pabt_svc) | |||
| 343 | #endif | 350 | #endif |
| 344 | 351 | ||
| 345 | .macro usr_entry | 352 | .macro usr_entry |
| 353 | UNWIND(.fnstart ) | ||
| 354 | UNWIND(.cantunwind ) @ don't unwind the user space | ||
| 346 | sub sp, sp, #S_FRAME_SIZE | 355 | sub sp, sp, #S_FRAME_SIZE |
| 347 | stmib sp, {r1 - r12} | 356 | stmib sp, {r1 - r12} |
| 348 | 357 | ||
| @@ -420,6 +429,7 @@ __dabt_usr: | |||
| 420 | mov r2, sp | 429 | mov r2, sp |
| 421 | adr lr, ret_from_exception | 430 | adr lr, ret_from_exception |
| 422 | b do_DataAbort | 431 | b do_DataAbort |
| 432 | UNWIND(.fnend ) | ||
| 423 | ENDPROC(__dabt_usr) | 433 | ENDPROC(__dabt_usr) |
| 424 | 434 | ||
| 425 | .align 5 | 435 | .align 5 |
| @@ -450,6 +460,7 @@ __irq_usr: | |||
| 450 | 460 | ||
| 451 | mov why, #0 | 461 | mov why, #0 |
| 452 | b ret_to_user | 462 | b ret_to_user |
| 463 | UNWIND(.fnend ) | ||
| 453 | ENDPROC(__irq_usr) | 464 | ENDPROC(__irq_usr) |
| 454 | 465 | ||
| 455 | .ltorg | 466 | .ltorg |
| @@ -484,6 +495,7 @@ __und_usr: | |||
| 484 | #else | 495 | #else |
| 485 | b __und_usr_unknown | 496 | b __und_usr_unknown |
| 486 | #endif | 497 | #endif |
| 498 | UNWIND(.fnend ) | ||
| 487 | ENDPROC(__und_usr) | 499 | ENDPROC(__und_usr) |
| 488 | 500 | ||
| 489 | @ | 501 | @ |
| @@ -671,14 +683,18 @@ __pabt_usr: | |||
| 671 | enable_irq @ Enable interrupts | 683 | enable_irq @ Enable interrupts |
| 672 | mov r1, sp @ regs | 684 | mov r1, sp @ regs |
| 673 | bl do_PrefetchAbort @ call abort handler | 685 | bl do_PrefetchAbort @ call abort handler |
| 686 | UNWIND(.fnend ) | ||
| 674 | /* fall through */ | 687 | /* fall through */ |
| 675 | /* | 688 | /* |
| 676 | * This is the return code to user mode for abort handlers | 689 | * This is the return code to user mode for abort handlers |
| 677 | */ | 690 | */ |
| 678 | ENTRY(ret_from_exception) | 691 | ENTRY(ret_from_exception) |
| 692 | UNWIND(.fnstart ) | ||
| 693 | UNWIND(.cantunwind ) | ||
| 679 | get_thread_info tsk | 694 | get_thread_info tsk |
| 680 | mov why, #0 | 695 | mov why, #0 |
| 681 | b ret_to_user | 696 | b ret_to_user |
| 697 | UNWIND(.fnend ) | ||
| 682 | ENDPROC(__pabt_usr) | 698 | ENDPROC(__pabt_usr) |
| 683 | ENDPROC(ret_from_exception) | 699 | ENDPROC(ret_from_exception) |
| 684 | 700 | ||
| @@ -688,6 +704,8 @@ ENDPROC(ret_from_exception) | |||
| 688 | * previous and next are guaranteed not to be the same. | 704 | * previous and next are guaranteed not to be the same. |
| 689 | */ | 705 | */ |
| 690 | ENTRY(__switch_to) | 706 | ENTRY(__switch_to) |
| 707 | UNWIND(.fnstart ) | ||
| 708 | UNWIND(.cantunwind ) | ||
| 691 | add ip, r1, #TI_CPU_SAVE | 709 | add ip, r1, #TI_CPU_SAVE |
| 692 | ldr r3, [r2, #TI_TP_VALUE] | 710 | ldr r3, [r2, #TI_TP_VALUE] |
| 693 | stmia ip!, {r4 - sl, fp, sp, lr} @ Store most regs on stack | 711 | stmia ip!, {r4 - sl, fp, sp, lr} @ Store most regs on stack |
| @@ -717,6 +735,7 @@ ENTRY(__switch_to) | |||
| 717 | bl atomic_notifier_call_chain | 735 | bl atomic_notifier_call_chain |
| 718 | mov r0, r5 | 736 | mov r0, r5 |
| 719 | ldmia r4, {r4 - sl, fp, sp, pc} @ Load all regs saved previously | 737 | ldmia r4, {r4 - sl, fp, sp, pc} @ Load all regs saved previously |
| 738 | UNWIND(.fnend ) | ||
| 720 | ENDPROC(__switch_to) | 739 | ENDPROC(__switch_to) |
| 721 | 740 | ||
| 722 | __INIT | 741 | __INIT |
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 49a6ba926c2b..b8c1f1411440 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S | |||
| @@ -11,6 +11,7 @@ | |||
| 11 | #include <asm/unistd.h> | 11 | #include <asm/unistd.h> |
| 12 | #include <asm/ftrace.h> | 12 | #include <asm/ftrace.h> |
| 13 | #include <mach/entry-macro.S> | 13 | #include <mach/entry-macro.S> |
| 14 | #include <asm/unwind.h> | ||
| 14 | 15 | ||
| 15 | #include "entry-header.S" | 16 | #include "entry-header.S" |
| 16 | 17 | ||
| @@ -22,6 +23,8 @@ | |||
| 22 | * stack. | 23 | * stack. |
| 23 | */ | 24 | */ |
| 24 | ret_fast_syscall: | 25 | ret_fast_syscall: |
| 26 | UNWIND(.fnstart ) | ||
| 27 | UNWIND(.cantunwind ) | ||
| 25 | disable_irq @ disable interrupts | 28 | disable_irq @ disable interrupts |
| 26 | ldr r1, [tsk, #TI_FLAGS] | 29 | ldr r1, [tsk, #TI_FLAGS] |
| 27 | tst r1, #_TIF_WORK_MASK | 30 | tst r1, #_TIF_WORK_MASK |
| @@ -38,6 +41,7 @@ ret_fast_syscall: | |||
| 38 | mov r0, r0 | 41 | mov r0, r0 |
| 39 | add sp, sp, #S_FRAME_SIZE - S_PC | 42 | add sp, sp, #S_FRAME_SIZE - S_PC |
| 40 | movs pc, lr @ return & move spsr_svc into cpsr | 43 | movs pc, lr @ return & move spsr_svc into cpsr |
| 44 | UNWIND(.fnend ) | ||
| 41 | 45 | ||
| 42 | /* | 46 | /* |
| 43 | * Ok, we need to do extra processing, enter the slow path. | 47 | * Ok, we need to do extra processing, enter the slow path. |
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index dab48f27263f..13dbd5bf5cc2 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | 22 | ||
| 23 | #include <asm/pgtable.h> | 23 | #include <asm/pgtable.h> |
| 24 | #include <asm/sections.h> | 24 | #include <asm/sections.h> |
| 25 | #include <asm/unwind.h> | ||
| 25 | 26 | ||
| 26 | #ifdef CONFIG_XIP_KERNEL | 27 | #ifdef CONFIG_XIP_KERNEL |
| 27 | /* | 28 | /* |
| @@ -66,6 +67,24 @@ int module_frob_arch_sections(Elf_Ehdr *hdr, | |||
| 66 | char *secstrings, | 67 | char *secstrings, |
| 67 | struct module *mod) | 68 | struct module *mod) |
| 68 | { | 69 | { |
| 70 | #ifdef CONFIG_ARM_UNWIND | ||
| 71 | Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum; | ||
| 72 | |||
| 73 | for (s = sechdrs; s < sechdrs_end; s++) { | ||
| 74 | if (strcmp(".ARM.exidx.init.text", secstrings + s->sh_name) == 0) | ||
| 75 | mod->arch.unw_sec_init = s; | ||
| 76 | else if (strcmp(".ARM.exidx.devinit.text", secstrings + s->sh_name) == 0) | ||
| 77 | mod->arch.unw_sec_devinit = s; | ||
| 78 | else if (strcmp(".ARM.exidx", secstrings + s->sh_name) == 0) | ||
| 79 | mod->arch.unw_sec_core = s; | ||
| 80 | else if (strcmp(".init.text", secstrings + s->sh_name) == 0) | ||
| 81 | mod->arch.sec_init_text = s; | ||
| 82 | else if (strcmp(".devinit.text", secstrings + s->sh_name) == 0) | ||
| 83 | mod->arch.sec_devinit_text = s; | ||
| 84 | else if (strcmp(".text", secstrings + s->sh_name) == 0) | ||
| 85 | mod->arch.sec_core_text = s; | ||
| 86 | } | ||
| 87 | #endif | ||
| 69 | return 0; | 88 | return 0; |
| 70 | } | 89 | } |
| 71 | 90 | ||
| @@ -104,6 +123,10 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, | |||
| 104 | loc = dstsec->sh_addr + rel->r_offset; | 123 | loc = dstsec->sh_addr + rel->r_offset; |
| 105 | 124 | ||
| 106 | switch (ELF32_R_TYPE(rel->r_info)) { | 125 | switch (ELF32_R_TYPE(rel->r_info)) { |
| 126 | case R_ARM_NONE: | ||
| 127 | /* ignore */ | ||
| 128 | break; | ||
| 129 | |||
| 107 | case R_ARM_ABS32: | 130 | case R_ARM_ABS32: |
| 108 | *(u32 *)loc += sym->st_value; | 131 | *(u32 *)loc += sym->st_value; |
| 109 | break; | 132 | break; |
| @@ -132,6 +155,11 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, | |||
| 132 | *(u32 *)loc |= offset & 0x00ffffff; | 155 | *(u32 *)loc |= offset & 0x00ffffff; |
| 133 | break; | 156 | break; |
| 134 | 157 | ||
| 158 | case R_ARM_PREL31: | ||
| 159 | offset = *(u32 *)loc + sym->st_value - loc; | ||
| 160 | *(u32 *)loc = offset & 0x7fffffff; | ||
| 161 | break; | ||
| 162 | |||
| 135 | default: | 163 | default: |
| 136 | printk(KERN_ERR "%s: unknown relocation: %u\n", | 164 | printk(KERN_ERR "%s: unknown relocation: %u\n", |
| 137 | module->name, ELF32_R_TYPE(rel->r_info)); | 165 | module->name, ELF32_R_TYPE(rel->r_info)); |
| @@ -150,14 +178,50 @@ apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab, | |||
| 150 | return -ENOEXEC; | 178 | return -ENOEXEC; |
| 151 | } | 179 | } |
| 152 | 180 | ||
| 181 | #ifdef CONFIG_ARM_UNWIND | ||
| 182 | static void register_unwind_tables(struct module *mod) | ||
| 183 | { | ||
| 184 | if (mod->arch.unw_sec_init && mod->arch.sec_init_text) | ||
| 185 | mod->arch.unwind_init = | ||
| 186 | unwind_table_add(mod->arch.unw_sec_init->sh_addr, | ||
| 187 | mod->arch.unw_sec_init->sh_size, | ||
| 188 | mod->arch.sec_init_text->sh_addr, | ||
| 189 | mod->arch.sec_init_text->sh_size); | ||
| 190 | if (mod->arch.unw_sec_devinit && mod->arch.sec_devinit_text) | ||
| 191 | mod->arch.unwind_devinit = | ||
| 192 | unwind_table_add(mod->arch.unw_sec_devinit->sh_addr, | ||
| 193 | mod->arch.unw_sec_devinit->sh_size, | ||
| 194 | mod->arch.sec_devinit_text->sh_addr, | ||
| 195 | mod->arch.sec_devinit_text->sh_size); | ||
| 196 | if (mod->arch.unw_sec_core && mod->arch.sec_core_text) | ||
| 197 | mod->arch.unwind_core = | ||
| 198 | unwind_table_add(mod->arch.unw_sec_core->sh_addr, | ||
| 199 | mod->arch.unw_sec_core->sh_size, | ||
| 200 | mod->arch.sec_core_text->sh_addr, | ||
| 201 | mod->arch.sec_core_text->sh_size); | ||
| 202 | } | ||
| 203 | |||
| 204 | static void unregister_unwind_tables(struct module *mod) | ||
| 205 | { | ||
| 206 | unwind_table_del(mod->arch.unwind_init); | ||
| 207 | unwind_table_del(mod->arch.unwind_devinit); | ||
| 208 | unwind_table_del(mod->arch.unwind_core); | ||
| 209 | } | ||
| 210 | #else | ||
| 211 | static inline void register_unwind_tables(struct module *mod) { } | ||
| 212 | static inline void unregister_unwind_tables(struct module *mod) { } | ||
| 213 | #endif | ||
| 214 | |||
| 153 | int | 215 | int |
| 154 | module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, | 216 | module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, |
| 155 | struct module *module) | 217 | struct module *module) |
| 156 | { | 218 | { |
| 219 | register_unwind_tables(module); | ||
| 157 | return 0; | 220 | return 0; |
| 158 | } | 221 | } |
| 159 | 222 | ||
| 160 | void | 223 | void |
| 161 | module_arch_cleanup(struct module *mod) | 224 | module_arch_cleanup(struct module *mod) |
| 162 | { | 225 | { |
| 226 | unregister_unwind_tables(mod); | ||
| 163 | } | 227 | } |
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index d3ea6fa89521..af377c73d90b 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c | |||
| @@ -34,6 +34,7 @@ | |||
| 34 | #include <asm/processor.h> | 34 | #include <asm/processor.h> |
| 35 | #include <asm/system.h> | 35 | #include <asm/system.h> |
| 36 | #include <asm/thread_notify.h> | 36 | #include <asm/thread_notify.h> |
| 37 | #include <asm/stacktrace.h> | ||
| 37 | #include <asm/mach/time.h> | 38 | #include <asm/mach/time.h> |
| 38 | 39 | ||
| 39 | static const char *processor_modes[] = { | 40 | static const char *processor_modes[] = { |
| @@ -372,23 +373,21 @@ EXPORT_SYMBOL(kernel_thread); | |||
| 372 | 373 | ||
| 373 | unsigned long get_wchan(struct task_struct *p) | 374 | unsigned long get_wchan(struct task_struct *p) |
| 374 | { | 375 | { |
| 375 | unsigned long fp, lr; | 376 | struct stackframe frame; |
| 376 | unsigned long stack_start, stack_end; | ||
| 377 | int count = 0; | 377 | int count = 0; |
| 378 | if (!p || p == current || p->state == TASK_RUNNING) | 378 | if (!p || p == current || p->state == TASK_RUNNING) |
| 379 | return 0; | 379 | return 0; |
| 380 | 380 | ||
| 381 | stack_start = (unsigned long)end_of_stack(p); | 381 | frame.fp = thread_saved_fp(p); |
| 382 | stack_end = (unsigned long)task_stack_page(p) + THREAD_SIZE; | 382 | frame.sp = thread_saved_sp(p); |
| 383 | 383 | frame.lr = 0; /* recovered from the stack */ | |
| 384 | fp = thread_saved_fp(p); | 384 | frame.pc = thread_saved_pc(p); |
| 385 | do { | 385 | do { |
| 386 | if (fp < stack_start || fp > stack_end) | 386 | int ret = unwind_frame(&frame); |
| 387 | if (ret < 0) | ||
| 387 | return 0; | 388 | return 0; |
| 388 | lr = ((unsigned long *)fp)[-1]; | 389 | if (!in_sched_functions(frame.pc)) |
| 389 | if (!in_sched_functions(lr)) | 390 | return frame.pc; |
| 390 | return lr; | ||
| 391 | fp = *(unsigned long *) (fp - 12); | ||
| 392 | } while (count ++ < 16); | 391 | } while (count ++ < 16); |
| 393 | return 0; | 392 | return 0; |
| 394 | } | 393 | } |
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index df653ea59250..89882a1d0187 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c | |||
| @@ -653,6 +653,54 @@ static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp) | |||
| 653 | } | 653 | } |
| 654 | #endif | 654 | #endif |
| 655 | 655 | ||
| 656 | #ifdef CONFIG_VFP | ||
| 657 | /* | ||
| 658 | * Get the child VFP state. | ||
| 659 | */ | ||
| 660 | static int ptrace_getvfpregs(struct task_struct *tsk, void __user *data) | ||
| 661 | { | ||
| 662 | struct thread_info *thread = task_thread_info(tsk); | ||
| 663 | union vfp_state *vfp = &thread->vfpstate; | ||
| 664 | struct user_vfp __user *ufp = data; | ||
| 665 | |||
| 666 | vfp_sync_state(thread); | ||
| 667 | |||
| 668 | /* copy the floating point registers */ | ||
| 669 | if (copy_to_user(&ufp->fpregs, &vfp->hard.fpregs, | ||
| 670 | sizeof(vfp->hard.fpregs))) | ||
| 671 | return -EFAULT; | ||
| 672 | |||
| 673 | /* copy the status and control register */ | ||
| 674 | if (put_user(vfp->hard.fpscr, &ufp->fpscr)) | ||
| 675 | return -EFAULT; | ||
| 676 | |||
| 677 | return 0; | ||
| 678 | } | ||
| 679 | |||
| 680 | /* | ||
| 681 | * Set the child VFP state. | ||
| 682 | */ | ||
| 683 | static int ptrace_setvfpregs(struct task_struct *tsk, void __user *data) | ||
| 684 | { | ||
| 685 | struct thread_info *thread = task_thread_info(tsk); | ||
| 686 | union vfp_state *vfp = &thread->vfpstate; | ||
| 687 | struct user_vfp __user *ufp = data; | ||
| 688 | |||
| 689 | vfp_sync_state(thread); | ||
| 690 | |||
| 691 | /* copy the floating point registers */ | ||
| 692 | if (copy_from_user(&vfp->hard.fpregs, &ufp->fpregs, | ||
| 693 | sizeof(vfp->hard.fpregs))) | ||
| 694 | return -EFAULT; | ||
| 695 | |||
| 696 | /* copy the status and control register */ | ||
| 697 | if (get_user(vfp->hard.fpscr, &ufp->fpscr)) | ||
| 698 | return -EFAULT; | ||
| 699 | |||
| 700 | return 0; | ||
| 701 | } | ||
| 702 | #endif | ||
| 703 | |||
| 656 | long arch_ptrace(struct task_struct *child, long request, long addr, long data) | 704 | long arch_ptrace(struct task_struct *child, long request, long addr, long data) |
| 657 | { | 705 | { |
| 658 | int ret; | 706 | int ret; |
| @@ -775,6 +823,16 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 775 | break; | 823 | break; |
| 776 | #endif | 824 | #endif |
| 777 | 825 | ||
| 826 | #ifdef CONFIG_VFP | ||
| 827 | case PTRACE_GETVFPREGS: | ||
| 828 | ret = ptrace_getvfpregs(child, (void __user *)data); | ||
| 829 | break; | ||
| 830 | |||
| 831 | case PTRACE_SETVFPREGS: | ||
| 832 | ret = ptrace_setvfpregs(child, (void __user *)data); | ||
| 833 | break; | ||
| 834 | #endif | ||
| 835 | |||
| 778 | default: | 836 | default: |
| 779 | ret = ptrace_request(child, request, addr, data); | 837 | ret = ptrace_request(child, request, addr, data); |
| 780 | break; | 838 | break; |
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 7049815d66d5..bc5e4128f9f3 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
| @@ -40,6 +40,7 @@ | |||
| 40 | #include <asm/mach/irq.h> | 40 | #include <asm/mach/irq.h> |
| 41 | #include <asm/mach/time.h> | 41 | #include <asm/mach/time.h> |
| 42 | #include <asm/traps.h> | 42 | #include <asm/traps.h> |
| 43 | #include <asm/unwind.h> | ||
| 43 | 44 | ||
| 44 | #include "compat.h" | 45 | #include "compat.h" |
| 45 | #include "atags.h" | 46 | #include "atags.h" |
| @@ -233,12 +234,13 @@ static void __init cacheid_init(void) | |||
| 233 | unsigned int cachetype = read_cpuid_cachetype(); | 234 | unsigned int cachetype = read_cpuid_cachetype(); |
| 234 | unsigned int arch = cpu_architecture(); | 235 | unsigned int arch = cpu_architecture(); |
| 235 | 236 | ||
| 236 | if (arch >= CPU_ARCH_ARMv7) { | 237 | if (arch >= CPU_ARCH_ARMv6) { |
| 237 | cacheid = CACHEID_VIPT_NONALIASING; | 238 | if ((cachetype & (7 << 29)) == 4 << 29) { |
| 238 | if ((cachetype & (3 << 14)) == 1 << 14) | 239 | /* ARMv7 register format */ |
| 239 | cacheid |= CACHEID_ASID_TAGGED; | 240 | cacheid = CACHEID_VIPT_NONALIASING; |
| 240 | } else if (arch >= CPU_ARCH_ARMv6) { | 241 | if ((cachetype & (3 << 14)) == 1 << 14) |
| 241 | if (cachetype & (1 << 23)) | 242 | cacheid |= CACHEID_ASID_TAGGED; |
| 243 | } else if (cachetype & (1 << 23)) | ||
| 242 | cacheid = CACHEID_VIPT_ALIASING; | 244 | cacheid = CACHEID_VIPT_ALIASING; |
| 243 | else | 245 | else |
| 244 | cacheid = CACHEID_VIPT_NONALIASING; | 246 | cacheid = CACHEID_VIPT_NONALIASING; |
| @@ -684,6 +686,8 @@ void __init setup_arch(char **cmdline_p) | |||
| 684 | struct machine_desc *mdesc; | 686 | struct machine_desc *mdesc; |
| 685 | char *from = default_command_line; | 687 | char *from = default_command_line; |
| 686 | 688 | ||
| 689 | unwind_init(); | ||
| 690 | |||
| 687 | setup_processor(); | 691 | setup_processor(); |
| 688 | mdesc = setup_machine(machine_arch_type); | 692 | mdesc = setup_machine(machine_arch_type); |
| 689 | machine_name = mdesc->name; | 693 | machine_name = mdesc->name; |
| @@ -779,6 +783,8 @@ static const char *hwcap_str[] = { | |||
| 779 | "crunch", | 783 | "crunch", |
| 780 | "thumbee", | 784 | "thumbee", |
| 781 | "neon", | 785 | "neon", |
| 786 | "vfpv3", | ||
| 787 | "vfpv3d16", | ||
| 782 | NULL | 788 | NULL |
| 783 | }; | 789 | }; |
| 784 | 790 | ||
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 55fa7ff96a3e..7801aac3c043 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c | |||
| @@ -93,6 +93,7 @@ int __cpuinit __cpu_up(unsigned int cpu) | |||
| 93 | pmd = pmd_offset(pgd + pgd_index(PHYS_OFFSET), PHYS_OFFSET); | 93 | pmd = pmd_offset(pgd + pgd_index(PHYS_OFFSET), PHYS_OFFSET); |
| 94 | *pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) | | 94 | *pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) | |
| 95 | PMD_TYPE_SECT | PMD_SECT_AP_WRITE); | 95 | PMD_TYPE_SECT | PMD_SECT_AP_WRITE); |
| 96 | flush_pmd_entry(pmd); | ||
| 96 | 97 | ||
| 97 | /* | 98 | /* |
| 98 | * We need to tell the secondary core where to find | 99 | * We need to tell the secondary core where to find |
| @@ -130,6 +131,7 @@ int __cpuinit __cpu_up(unsigned int cpu) | |||
| 130 | secondary_data.pgdir = 0; | 131 | secondary_data.pgdir = 0; |
| 131 | 132 | ||
| 132 | *pmd = __pmd(0); | 133 | *pmd = __pmd(0); |
| 134 | clean_pmd_entry(pmd); | ||
| 133 | pgd_free(&init_mm, pgd); | 135 | pgd_free(&init_mm, pgd); |
| 134 | 136 | ||
| 135 | if (ret) { | 137 | if (ret) { |
diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c index fc650f64df43..9f444e5cc165 100644 --- a/arch/arm/kernel/stacktrace.c +++ b/arch/arm/kernel/stacktrace.c | |||
| @@ -2,35 +2,60 @@ | |||
| 2 | #include <linux/sched.h> | 2 | #include <linux/sched.h> |
| 3 | #include <linux/stacktrace.h> | 3 | #include <linux/stacktrace.h> |
| 4 | 4 | ||
| 5 | #include "stacktrace.h" | 5 | #include <asm/stacktrace.h> |
| 6 | 6 | ||
| 7 | int walk_stackframe(unsigned long fp, unsigned long low, unsigned long high, | 7 | #if defined(CONFIG_FRAME_POINTER) && !defined(CONFIG_ARM_UNWIND) |
| 8 | int (*fn)(struct stackframe *, void *), void *data) | 8 | /* |
| 9 | * Unwind the current stack frame and store the new register values in the | ||
| 10 | * structure passed as argument. Unwinding is equivalent to a function return, | ||
| 11 | * hence the new PC value rather than LR should be used for backtrace. | ||
| 12 | * | ||
| 13 | * With framepointer enabled, a simple function prologue looks like this: | ||
| 14 | * mov ip, sp | ||
| 15 | * stmdb sp!, {fp, ip, lr, pc} | ||
| 16 | * sub fp, ip, #4 | ||
| 17 | * | ||
| 18 | * A simple function epilogue looks like this: | ||
| 19 | * ldm sp, {fp, sp, pc} | ||
| 20 | * | ||
| 21 | * Note that with framepointer enabled, even the leaf functions have the same | ||
| 22 | * prologue and epilogue, therefore we can ignore the LR value in this case. | ||
| 23 | */ | ||
| 24 | int unwind_frame(struct stackframe *frame) | ||
| 9 | { | 25 | { |
| 10 | struct stackframe *frame; | 26 | unsigned long high, low; |
| 11 | 27 | unsigned long fp = frame->fp; | |
| 12 | do { | ||
| 13 | /* | ||
| 14 | * Check current frame pointer is within bounds | ||
| 15 | */ | ||
| 16 | if (fp < (low + 12) || fp + 4 >= high) | ||
| 17 | break; | ||
| 18 | 28 | ||
| 19 | frame = (struct stackframe *)(fp - 12); | 29 | /* only go to a higher address on the stack */ |
| 30 | low = frame->sp; | ||
| 31 | high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; | ||
| 20 | 32 | ||
| 21 | if (fn(frame, data)) | 33 | /* check current frame pointer is within bounds */ |
| 22 | break; | 34 | if (fp < (low + 12) || fp + 4 >= high) |
| 35 | return -EINVAL; | ||
| 23 | 36 | ||
| 24 | /* | 37 | /* restore the registers from the stack frame */ |
| 25 | * Update the low bound - the next frame must always | 38 | frame->fp = *(unsigned long *)(fp - 12); |
| 26 | * be at a higher address than the current frame. | 39 | frame->sp = *(unsigned long *)(fp - 8); |
| 27 | */ | 40 | frame->pc = *(unsigned long *)(fp - 4); |
| 28 | low = fp + 4; | ||
| 29 | fp = frame->fp; | ||
| 30 | } while (fp); | ||
| 31 | 41 | ||
| 32 | return 0; | 42 | return 0; |
| 33 | } | 43 | } |
| 44 | #endif | ||
| 45 | |||
| 46 | void walk_stackframe(struct stackframe *frame, | ||
| 47 | int (*fn)(struct stackframe *, void *), void *data) | ||
| 48 | { | ||
| 49 | while (1) { | ||
| 50 | int ret; | ||
| 51 | |||
| 52 | if (fn(frame, data)) | ||
| 53 | break; | ||
| 54 | ret = unwind_frame(frame); | ||
| 55 | if (ret < 0) | ||
| 56 | break; | ||
| 57 | } | ||
| 58 | } | ||
| 34 | EXPORT_SYMBOL(walk_stackframe); | 59 | EXPORT_SYMBOL(walk_stackframe); |
| 35 | 60 | ||
| 36 | #ifdef CONFIG_STACKTRACE | 61 | #ifdef CONFIG_STACKTRACE |
| @@ -44,7 +69,7 @@ static int save_trace(struct stackframe *frame, void *d) | |||
| 44 | { | 69 | { |
| 45 | struct stack_trace_data *data = d; | 70 | struct stack_trace_data *data = d; |
| 46 | struct stack_trace *trace = data->trace; | 71 | struct stack_trace *trace = data->trace; |
| 47 | unsigned long addr = frame->lr; | 72 | unsigned long addr = frame->pc; |
| 48 | 73 | ||
| 49 | if (data->no_sched_functions && in_sched_functions(addr)) | 74 | if (data->no_sched_functions && in_sched_functions(addr)) |
| 50 | return 0; | 75 | return 0; |
| @@ -61,11 +86,10 @@ static int save_trace(struct stackframe *frame, void *d) | |||
| 61 | void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) | 86 | void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) |
| 62 | { | 87 | { |
| 63 | struct stack_trace_data data; | 88 | struct stack_trace_data data; |
| 64 | unsigned long fp, base; | 89 | struct stackframe frame; |
| 65 | 90 | ||
| 66 | data.trace = trace; | 91 | data.trace = trace; |
| 67 | data.skip = trace->skip; | 92 | data.skip = trace->skip; |
| 68 | base = (unsigned long)task_stack_page(tsk); | ||
| 69 | 93 | ||
| 70 | if (tsk != current) { | 94 | if (tsk != current) { |
| 71 | #ifdef CONFIG_SMP | 95 | #ifdef CONFIG_SMP |
| @@ -76,14 +100,22 @@ void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) | |||
| 76 | BUG(); | 100 | BUG(); |
| 77 | #else | 101 | #else |
| 78 | data.no_sched_functions = 1; | 102 | data.no_sched_functions = 1; |
| 79 | fp = thread_saved_fp(tsk); | 103 | frame.fp = thread_saved_fp(tsk); |
| 104 | frame.sp = thread_saved_sp(tsk); | ||
| 105 | frame.lr = 0; /* recovered from the stack */ | ||
| 106 | frame.pc = thread_saved_pc(tsk); | ||
| 80 | #endif | 107 | #endif |
| 81 | } else { | 108 | } else { |
| 109 | register unsigned long current_sp asm ("sp"); | ||
| 110 | |||
| 82 | data.no_sched_functions = 0; | 111 | data.no_sched_functions = 0; |
| 83 | asm("mov %0, fp" : "=r" (fp)); | 112 | frame.fp = (unsigned long)__builtin_frame_address(0); |
| 113 | frame.sp = current_sp; | ||
| 114 | frame.lr = (unsigned long)__builtin_return_address(0); | ||
| 115 | frame.pc = (unsigned long)save_stack_trace_tsk; | ||
| 84 | } | 116 | } |
| 85 | 117 | ||
| 86 | walk_stackframe(fp, base, base + THREAD_SIZE, save_trace, &data); | 118 | walk_stackframe(&frame, save_trace, &data); |
| 87 | if (trace->nr_entries < trace->max_entries) | 119 | if (trace->nr_entries < trace->max_entries) |
| 88 | trace->entries[trace->nr_entries++] = ULONG_MAX; | 120 | trace->entries[trace->nr_entries++] = ULONG_MAX; |
| 89 | } | 121 | } |
diff --git a/arch/arm/kernel/stacktrace.h b/arch/arm/kernel/stacktrace.h deleted file mode 100644 index e9fd20cb5662..000000000000 --- a/arch/arm/kernel/stacktrace.h +++ /dev/null | |||
| @@ -1,9 +0,0 @@ | |||
| 1 | struct stackframe { | ||
| 2 | unsigned long fp; | ||
| 3 | unsigned long sp; | ||
| 4 | unsigned long lr; | ||
| 5 | unsigned long pc; | ||
| 6 | }; | ||
| 7 | |||
| 8 | int walk_stackframe(unsigned long fp, unsigned long low, unsigned long high, | ||
| 9 | int (*fn)(struct stackframe *, void *), void *data); | ||
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index c68b44aa88d2..4cdc4a0bd02d 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c | |||
| @@ -33,6 +33,7 @@ | |||
| 33 | 33 | ||
| 34 | #include <asm/leds.h> | 34 | #include <asm/leds.h> |
| 35 | #include <asm/thread_info.h> | 35 | #include <asm/thread_info.h> |
| 36 | #include <asm/stacktrace.h> | ||
| 36 | #include <asm/mach/time.h> | 37 | #include <asm/mach/time.h> |
| 37 | 38 | ||
| 38 | /* | 39 | /* |
| @@ -55,14 +56,22 @@ EXPORT_SYMBOL(rtc_lock); | |||
| 55 | #ifdef CONFIG_SMP | 56 | #ifdef CONFIG_SMP |
| 56 | unsigned long profile_pc(struct pt_regs *regs) | 57 | unsigned long profile_pc(struct pt_regs *regs) |
| 57 | { | 58 | { |
| 58 | unsigned long fp, pc = instruction_pointer(regs); | 59 | struct stackframe frame; |
| 59 | 60 | ||
| 60 | if (in_lock_functions(pc)) { | 61 | if (!in_lock_functions(regs->ARM_pc)) |
| 61 | fp = regs->ARM_fp; | 62 | return regs->ARM_pc; |
| 62 | pc = ((unsigned long *)fp)[-1]; | 63 | |
| 63 | } | 64 | frame.fp = regs->ARM_fp; |
| 65 | frame.sp = regs->ARM_sp; | ||
| 66 | frame.lr = regs->ARM_lr; | ||
| 67 | frame.pc = regs->ARM_pc; | ||
| 68 | do { | ||
| 69 | int ret = unwind_frame(&frame); | ||
| 70 | if (ret < 0) | ||
| 71 | return 0; | ||
| 72 | } while (in_lock_functions(frame.pc)); | ||
| 64 | 73 | ||
| 65 | return pc; | 74 | return frame.pc; |
| 66 | } | 75 | } |
| 67 | EXPORT_SYMBOL(profile_pc); | 76 | EXPORT_SYMBOL(profile_pc); |
| 68 | #endif | 77 | #endif |
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 79abc4ddc0cf..57eb0f6f6005 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
| @@ -27,6 +27,7 @@ | |||
| 27 | #include <asm/system.h> | 27 | #include <asm/system.h> |
| 28 | #include <asm/unistd.h> | 28 | #include <asm/unistd.h> |
| 29 | #include <asm/traps.h> | 29 | #include <asm/traps.h> |
| 30 | #include <asm/unwind.h> | ||
| 30 | 31 | ||
| 31 | #include "ptrace.h" | 32 | #include "ptrace.h" |
| 32 | #include "signal.h" | 33 | #include "signal.h" |
| @@ -61,6 +62,7 @@ void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long | |||
| 61 | dump_mem("Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs)); | 62 | dump_mem("Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs)); |
| 62 | } | 63 | } |
| 63 | 64 | ||
| 65 | #ifndef CONFIG_ARM_UNWIND | ||
| 64 | /* | 66 | /* |
| 65 | * Stack pointers should always be within the kernels view of | 67 | * Stack pointers should always be within the kernels view of |
| 66 | * physical memory. If it is not there, then we can't dump | 68 | * physical memory. If it is not there, then we can't dump |
| @@ -74,6 +76,7 @@ static int verify_stack(unsigned long sp) | |||
| 74 | 76 | ||
| 75 | return 0; | 77 | return 0; |
| 76 | } | 78 | } |
| 79 | #endif | ||
| 77 | 80 | ||
| 78 | /* | 81 | /* |
| 79 | * Dump out the contents of some memory nicely... | 82 | * Dump out the contents of some memory nicely... |
| @@ -150,13 +153,33 @@ static void dump_instr(struct pt_regs *regs) | |||
| 150 | set_fs(fs); | 153 | set_fs(fs); |
| 151 | } | 154 | } |
| 152 | 155 | ||
| 156 | #ifdef CONFIG_ARM_UNWIND | ||
| 157 | static inline void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) | ||
| 158 | { | ||
| 159 | unwind_backtrace(regs, tsk); | ||
| 160 | } | ||
| 161 | #else | ||
| 153 | static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) | 162 | static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) |
| 154 | { | 163 | { |
| 155 | unsigned int fp; | 164 | unsigned int fp, mode; |
| 156 | int ok = 1; | 165 | int ok = 1; |
| 157 | 166 | ||
| 158 | printk("Backtrace: "); | 167 | printk("Backtrace: "); |
| 159 | fp = regs->ARM_fp; | 168 | |
| 169 | if (!tsk) | ||
| 170 | tsk = current; | ||
| 171 | |||
| 172 | if (regs) { | ||
| 173 | fp = regs->ARM_fp; | ||
| 174 | mode = processor_mode(regs); | ||
| 175 | } else if (tsk != current) { | ||
| 176 | fp = thread_saved_fp(tsk); | ||
| 177 | mode = 0x10; | ||
| 178 | } else { | ||
| 179 | asm("mov %0, fp" : "=r" (fp) : : "cc"); | ||
| 180 | mode = 0x10; | ||
| 181 | } | ||
| 182 | |||
| 160 | if (!fp) { | 183 | if (!fp) { |
| 161 | printk("no frame pointer"); | 184 | printk("no frame pointer"); |
| 162 | ok = 0; | 185 | ok = 0; |
| @@ -168,29 +191,20 @@ static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) | |||
| 168 | printk("\n"); | 191 | printk("\n"); |
| 169 | 192 | ||
| 170 | if (ok) | 193 | if (ok) |
| 171 | c_backtrace(fp, processor_mode(regs)); | 194 | c_backtrace(fp, mode); |
| 172 | } | 195 | } |
| 196 | #endif | ||
| 173 | 197 | ||
| 174 | void dump_stack(void) | 198 | void dump_stack(void) |
| 175 | { | 199 | { |
| 176 | __backtrace(); | 200 | dump_backtrace(NULL, NULL); |
| 177 | } | 201 | } |
| 178 | 202 | ||
| 179 | EXPORT_SYMBOL(dump_stack); | 203 | EXPORT_SYMBOL(dump_stack); |
| 180 | 204 | ||
| 181 | void show_stack(struct task_struct *tsk, unsigned long *sp) | 205 | void show_stack(struct task_struct *tsk, unsigned long *sp) |
| 182 | { | 206 | { |
| 183 | unsigned long fp; | 207 | dump_backtrace(NULL, tsk); |
| 184 | |||
| 185 | if (!tsk) | ||
| 186 | tsk = current; | ||
| 187 | |||
| 188 | if (tsk != current) | ||
| 189 | fp = thread_saved_fp(tsk); | ||
| 190 | else | ||
| 191 | asm("mov %0, fp" : "=r" (fp) : : "cc"); | ||
| 192 | |||
| 193 | c_backtrace(fp, 0x10); | ||
| 194 | barrier(); | 208 | barrier(); |
| 195 | } | 209 | } |
| 196 | 210 | ||
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c new file mode 100644 index 000000000000..1dedc2c7ff49 --- /dev/null +++ b/arch/arm/kernel/unwind.c | |||
| @@ -0,0 +1,434 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/kernel/unwind.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 ARM Limited | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, | ||
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License | ||
| 16 | * along with this program; if not, write to the Free Software | ||
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 18 | * | ||
| 19 | * | ||
| 20 | * Stack unwinding support for ARM | ||
| 21 | * | ||
| 22 | * An ARM EABI version of gcc is required to generate the unwind | ||
| 23 | * tables. For information about the structure of the unwind tables, | ||
| 24 | * see "Exception Handling ABI for the ARM Architecture" at: | ||
| 25 | * | ||
| 26 | * http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html | ||
| 27 | */ | ||
| 28 | |||
| 29 | #include <linux/kernel.h> | ||
| 30 | #include <linux/init.h> | ||
| 31 | #include <linux/module.h> | ||
| 32 | #include <linux/sched.h> | ||
| 33 | #include <linux/slab.h> | ||
| 34 | #include <linux/spinlock.h> | ||
| 35 | #include <linux/list.h> | ||
| 36 | |||
| 37 | #include <asm/stacktrace.h> | ||
| 38 | #include <asm/traps.h> | ||
| 39 | #include <asm/unwind.h> | ||
| 40 | |||
| 41 | /* Dummy functions to avoid linker complaints */ | ||
| 42 | void __aeabi_unwind_cpp_pr0(void) | ||
| 43 | { | ||
| 44 | }; | ||
| 45 | EXPORT_SYMBOL(__aeabi_unwind_cpp_pr0); | ||
| 46 | |||
| 47 | void __aeabi_unwind_cpp_pr1(void) | ||
| 48 | { | ||
| 49 | }; | ||
| 50 | EXPORT_SYMBOL(__aeabi_unwind_cpp_pr1); | ||
| 51 | |||
| 52 | void __aeabi_unwind_cpp_pr2(void) | ||
| 53 | { | ||
| 54 | }; | ||
| 55 | EXPORT_SYMBOL(__aeabi_unwind_cpp_pr2); | ||
| 56 | |||
| 57 | struct unwind_ctrl_block { | ||
| 58 | unsigned long vrs[16]; /* virtual register set */ | ||
| 59 | unsigned long *insn; /* pointer to the current instructions word */ | ||
| 60 | int entries; /* number of entries left to interpret */ | ||
| 61 | int byte; /* current byte number in the instructions word */ | ||
| 62 | }; | ||
| 63 | |||
| 64 | enum regs { | ||
| 65 | FP = 11, | ||
| 66 | SP = 13, | ||
| 67 | LR = 14, | ||
| 68 | PC = 15 | ||
| 69 | }; | ||
| 70 | |||
| 71 | extern struct unwind_idx __start_unwind_idx[]; | ||
| 72 | extern struct unwind_idx __stop_unwind_idx[]; | ||
| 73 | |||
| 74 | static DEFINE_SPINLOCK(unwind_lock); | ||
| 75 | static LIST_HEAD(unwind_tables); | ||
| 76 | |||
| 77 | /* Convert a prel31 symbol to an absolute address */ | ||
| 78 | #define prel31_to_addr(ptr) \ | ||
| 79 | ({ \ | ||
| 80 | /* sign-extend to 32 bits */ \ | ||
| 81 | long offset = (((long)*(ptr)) << 1) >> 1; \ | ||
| 82 | (unsigned long)(ptr) + offset; \ | ||
| 83 | }) | ||
| 84 | |||
| 85 | /* | ||
| 86 | * Binary search in the unwind index. The entries entries are | ||
| 87 | * guaranteed to be sorted in ascending order by the linker. | ||
| 88 | */ | ||
| 89 | static struct unwind_idx *search_index(unsigned long addr, | ||
| 90 | struct unwind_idx *first, | ||
| 91 | struct unwind_idx *last) | ||
| 92 | { | ||
| 93 | pr_debug("%s(%08lx, %p, %p)\n", __func__, addr, first, last); | ||
| 94 | |||
| 95 | if (addr < first->addr) { | ||
| 96 | pr_warning("unwind: Unknown symbol address %08lx\n", addr); | ||
| 97 | return NULL; | ||
| 98 | } else if (addr >= last->addr) | ||
| 99 | return last; | ||
| 100 | |||
| 101 | while (first < last - 1) { | ||
| 102 | struct unwind_idx *mid = first + ((last - first + 1) >> 1); | ||
| 103 | |||
| 104 | if (addr < mid->addr) | ||
| 105 | last = mid; | ||
| 106 | else | ||
| 107 | first = mid; | ||
| 108 | } | ||
| 109 | |||
| 110 | return first; | ||
| 111 | } | ||
| 112 | |||
| 113 | static struct unwind_idx *unwind_find_idx(unsigned long addr) | ||
| 114 | { | ||
| 115 | struct unwind_idx *idx = NULL; | ||
| 116 | unsigned long flags; | ||
| 117 | |||
| 118 | pr_debug("%s(%08lx)\n", __func__, addr); | ||
| 119 | |||
| 120 | if (core_kernel_text(addr)) | ||
| 121 | /* main unwind table */ | ||
| 122 | idx = search_index(addr, __start_unwind_idx, | ||
| 123 | __stop_unwind_idx - 1); | ||
| 124 | else { | ||
| 125 | /* module unwind tables */ | ||
| 126 | struct unwind_table *table; | ||
| 127 | |||
| 128 | spin_lock_irqsave(&unwind_lock, flags); | ||
| 129 | list_for_each_entry(table, &unwind_tables, list) { | ||
| 130 | if (addr >= table->begin_addr && | ||
| 131 | addr < table->end_addr) { | ||
| 132 | idx = search_index(addr, table->start, | ||
| 133 | table->stop - 1); | ||
| 134 | break; | ||
| 135 | } | ||
| 136 | } | ||
| 137 | spin_unlock_irqrestore(&unwind_lock, flags); | ||
| 138 | } | ||
| 139 | |||
| 140 | pr_debug("%s: idx = %p\n", __func__, idx); | ||
| 141 | return idx; | ||
| 142 | } | ||
| 143 | |||
| 144 | static unsigned long unwind_get_byte(struct unwind_ctrl_block *ctrl) | ||
| 145 | { | ||
| 146 | unsigned long ret; | ||
| 147 | |||
| 148 | if (ctrl->entries <= 0) { | ||
| 149 | pr_warning("unwind: Corrupt unwind table\n"); | ||
| 150 | return 0; | ||
| 151 | } | ||
| 152 | |||
| 153 | ret = (*ctrl->insn >> (ctrl->byte * 8)) & 0xff; | ||
| 154 | |||
| 155 | if (ctrl->byte == 0) { | ||
| 156 | ctrl->insn++; | ||
| 157 | ctrl->entries--; | ||
| 158 | ctrl->byte = 3; | ||
| 159 | } else | ||
| 160 | ctrl->byte--; | ||
| 161 | |||
| 162 | return ret; | ||
| 163 | } | ||
| 164 | |||
| 165 | /* | ||
| 166 | * Execute the current unwind instruction. | ||
| 167 | */ | ||
| 168 | static int unwind_exec_insn(struct unwind_ctrl_block *ctrl) | ||
| 169 | { | ||
| 170 | unsigned long insn = unwind_get_byte(ctrl); | ||
| 171 | |||
| 172 | pr_debug("%s: insn = %08lx\n", __func__, insn); | ||
| 173 | |||
| 174 | if ((insn & 0xc0) == 0x00) | ||
| 175 | ctrl->vrs[SP] += ((insn & 0x3f) << 2) + 4; | ||
| 176 | else if ((insn & 0xc0) == 0x40) | ||
| 177 | ctrl->vrs[SP] -= ((insn & 0x3f) << 2) + 4; | ||
| 178 | else if ((insn & 0xf0) == 0x80) { | ||
| 179 | unsigned long mask; | ||
| 180 | unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; | ||
| 181 | int load_sp, reg = 4; | ||
| 182 | |||
| 183 | insn = (insn << 8) | unwind_get_byte(ctrl); | ||
| 184 | mask = insn & 0x0fff; | ||
| 185 | if (mask == 0) { | ||
| 186 | pr_warning("unwind: 'Refuse to unwind' instruction %04lx\n", | ||
| 187 | insn); | ||
| 188 | return -URC_FAILURE; | ||
| 189 | } | ||
| 190 | |||
| 191 | /* pop R4-R15 according to mask */ | ||
| 192 | load_sp = mask & (1 << (13 - 4)); | ||
| 193 | while (mask) { | ||
| 194 | if (mask & 1) | ||
| 195 | ctrl->vrs[reg] = *vsp++; | ||
| 196 | mask >>= 1; | ||
| 197 | reg++; | ||
| 198 | } | ||
| 199 | if (!load_sp) | ||
| 200 | ctrl->vrs[SP] = (unsigned long)vsp; | ||
| 201 | } else if ((insn & 0xf0) == 0x90 && | ||
| 202 | (insn & 0x0d) != 0x0d) | ||
| 203 | ctrl->vrs[SP] = ctrl->vrs[insn & 0x0f]; | ||
| 204 | else if ((insn & 0xf0) == 0xa0) { | ||
| 205 | unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; | ||
| 206 | int reg; | ||
| 207 | |||
| 208 | /* pop R4-R[4+bbb] */ | ||
| 209 | for (reg = 4; reg <= 4 + (insn & 7); reg++) | ||
| 210 | ctrl->vrs[reg] = *vsp++; | ||
| 211 | if (insn & 0x80) | ||
| 212 | ctrl->vrs[14] = *vsp++; | ||
| 213 | ctrl->vrs[SP] = (unsigned long)vsp; | ||
| 214 | } else if (insn == 0xb0) { | ||
| 215 | ctrl->vrs[PC] = ctrl->vrs[LR]; | ||
| 216 | /* no further processing */ | ||
| 217 | ctrl->entries = 0; | ||
| 218 | } else if (insn == 0xb1) { | ||
| 219 | unsigned long mask = unwind_get_byte(ctrl); | ||
| 220 | unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; | ||
| 221 | int reg = 0; | ||
| 222 | |||
| 223 | if (mask == 0 || mask & 0xf0) { | ||
| 224 | pr_warning("unwind: Spare encoding %04lx\n", | ||
| 225 | (insn << 8) | mask); | ||
| 226 | return -URC_FAILURE; | ||
| 227 | } | ||
| 228 | |||
| 229 | /* pop R0-R3 according to mask */ | ||
| 230 | while (mask) { | ||
| 231 | if (mask & 1) | ||
| 232 | ctrl->vrs[reg] = *vsp++; | ||
| 233 | mask >>= 1; | ||
| 234 | reg++; | ||
| 235 | } | ||
| 236 | ctrl->vrs[SP] = (unsigned long)vsp; | ||
| 237 | } else if (insn == 0xb2) { | ||
| 238 | unsigned long uleb128 = unwind_get_byte(ctrl); | ||
| 239 | |||
| 240 | ctrl->vrs[SP] += 0x204 + (uleb128 << 2); | ||
| 241 | } else { | ||
| 242 | pr_warning("unwind: Unhandled instruction %02lx\n", insn); | ||
| 243 | return -URC_FAILURE; | ||
| 244 | } | ||
| 245 | |||
| 246 | pr_debug("%s: fp = %08lx sp = %08lx lr = %08lx pc = %08lx\n", __func__, | ||
| 247 | ctrl->vrs[FP], ctrl->vrs[SP], ctrl->vrs[LR], ctrl->vrs[PC]); | ||
| 248 | |||
| 249 | return URC_OK; | ||
| 250 | } | ||
| 251 | |||
| 252 | /* | ||
| 253 | * Unwind a single frame starting with *sp for the symbol at *pc. It | ||
| 254 | * updates the *pc and *sp with the new values. | ||
| 255 | */ | ||
| 256 | int unwind_frame(struct stackframe *frame) | ||
| 257 | { | ||
| 258 | unsigned long high, low; | ||
| 259 | struct unwind_idx *idx; | ||
| 260 | struct unwind_ctrl_block ctrl; | ||
| 261 | |||
| 262 | /* only go to a higher address on the stack */ | ||
| 263 | low = frame->sp; | ||
| 264 | high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; | ||
| 265 | |||
| 266 | pr_debug("%s(pc = %08lx lr = %08lx sp = %08lx)\n", __func__, | ||
| 267 | frame->pc, frame->lr, frame->sp); | ||
| 268 | |||
| 269 | if (!kernel_text_address(frame->pc)) | ||
| 270 | return -URC_FAILURE; | ||
| 271 | |||
| 272 | idx = unwind_find_idx(frame->pc); | ||
| 273 | if (!idx) { | ||
| 274 | pr_warning("unwind: Index not found %08lx\n", frame->pc); | ||
| 275 | return -URC_FAILURE; | ||
| 276 | } | ||
| 277 | |||
| 278 | ctrl.vrs[FP] = frame->fp; | ||
| 279 | ctrl.vrs[SP] = frame->sp; | ||
| 280 | ctrl.vrs[LR] = frame->lr; | ||
| 281 | ctrl.vrs[PC] = 0; | ||
| 282 | |||
| 283 | if (idx->insn == 1) | ||
| 284 | /* can't unwind */ | ||
| 285 | return -URC_FAILURE; | ||
| 286 | else if ((idx->insn & 0x80000000) == 0) | ||
| 287 | /* prel31 to the unwind table */ | ||
| 288 | ctrl.insn = (unsigned long *)prel31_to_addr(&idx->insn); | ||
| 289 | else if ((idx->insn & 0xff000000) == 0x80000000) | ||
| 290 | /* only personality routine 0 supported in the index */ | ||
| 291 | ctrl.insn = &idx->insn; | ||
| 292 | else { | ||
| 293 | pr_warning("unwind: Unsupported personality routine %08lx in the index at %p\n", | ||
| 294 | idx->insn, idx); | ||
| 295 | return -URC_FAILURE; | ||
| 296 | } | ||
| 297 | |||
| 298 | /* check the personality routine */ | ||
| 299 | if ((*ctrl.insn & 0xff000000) == 0x80000000) { | ||
| 300 | ctrl.byte = 2; | ||
| 301 | ctrl.entries = 1; | ||
| 302 | } else if ((*ctrl.insn & 0xff000000) == 0x81000000) { | ||
| 303 | ctrl.byte = 1; | ||
| 304 | ctrl.entries = 1 + ((*ctrl.insn & 0x00ff0000) >> 16); | ||
| 305 | } else { | ||
| 306 | pr_warning("unwind: Unsupported personality routine %08lx at %p\n", | ||
| 307 | *ctrl.insn, ctrl.insn); | ||
| 308 | return -URC_FAILURE; | ||
| 309 | } | ||
| 310 | |||
| 311 | while (ctrl.entries > 0) { | ||
| 312 | int urc; | ||
| 313 | |||
| 314 | if (ctrl.vrs[SP] < low || ctrl.vrs[SP] >= high) | ||
| 315 | return -URC_FAILURE; | ||
| 316 | urc = unwind_exec_insn(&ctrl); | ||
| 317 | if (urc < 0) | ||
| 318 | return urc; | ||
| 319 | } | ||
| 320 | |||
| 321 | if (ctrl.vrs[PC] == 0) | ||
| 322 | ctrl.vrs[PC] = ctrl.vrs[LR]; | ||
| 323 | |||
| 324 | frame->fp = ctrl.vrs[FP]; | ||
| 325 | frame->sp = ctrl.vrs[SP]; | ||
| 326 | frame->lr = ctrl.vrs[LR]; | ||
| 327 | frame->pc = ctrl.vrs[PC]; | ||
| 328 | |||
| 329 | return URC_OK; | ||
| 330 | } | ||
| 331 | |||
| 332 | void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk) | ||
| 333 | { | ||
| 334 | struct stackframe frame; | ||
| 335 | unsigned long high, low; | ||
| 336 | register unsigned long current_sp asm ("sp"); | ||
| 337 | |||
| 338 | pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk); | ||
| 339 | |||
| 340 | if (!tsk) | ||
| 341 | tsk = current; | ||
| 342 | |||
| 343 | if (regs) { | ||
| 344 | frame.fp = regs->ARM_fp; | ||
| 345 | frame.sp = regs->ARM_sp; | ||
| 346 | frame.lr = regs->ARM_lr; | ||
| 347 | frame.pc = regs->ARM_pc; | ||
| 348 | } else if (tsk == current) { | ||
| 349 | frame.fp = (unsigned long)__builtin_frame_address(0); | ||
| 350 | frame.sp = current_sp; | ||
| 351 | frame.lr = (unsigned long)__builtin_return_address(0); | ||
| 352 | frame.pc = (unsigned long)unwind_backtrace; | ||
| 353 | } else { | ||
| 354 | /* task blocked in __switch_to */ | ||
| 355 | frame.fp = thread_saved_fp(tsk); | ||
| 356 | frame.sp = thread_saved_sp(tsk); | ||
| 357 | /* | ||
| 358 | * The function calling __switch_to cannot be a leaf function | ||
| 359 | * so LR is recovered from the stack. | ||
| 360 | */ | ||
| 361 | frame.lr = 0; | ||
| 362 | frame.pc = thread_saved_pc(tsk); | ||
| 363 | } | ||
| 364 | |||
| 365 | low = frame.sp & ~(THREAD_SIZE - 1); | ||
| 366 | high = low + THREAD_SIZE; | ||
| 367 | |||
| 368 | while (1) { | ||
| 369 | int urc; | ||
| 370 | unsigned long where = frame.pc; | ||
| 371 | |||
| 372 | urc = unwind_frame(&frame); | ||
| 373 | if (urc < 0) | ||
| 374 | break; | ||
| 375 | dump_backtrace_entry(where, frame.pc, frame.sp - 4); | ||
| 376 | } | ||
| 377 | } | ||
| 378 | |||
| 379 | struct unwind_table *unwind_table_add(unsigned long start, unsigned long size, | ||
| 380 | unsigned long text_addr, | ||
| 381 | unsigned long text_size) | ||
| 382 | { | ||
| 383 | unsigned long flags; | ||
| 384 | struct unwind_idx *idx; | ||
| 385 | struct unwind_table *tab = kmalloc(sizeof(*tab), GFP_KERNEL); | ||
| 386 | |||
| 387 | pr_debug("%s(%08lx, %08lx, %08lx, %08lx)\n", __func__, start, size, | ||
| 388 | text_addr, text_size); | ||
| 389 | |||
| 390 | if (!tab) | ||
| 391 | return tab; | ||
| 392 | |||
| 393 | tab->start = (struct unwind_idx *)start; | ||
| 394 | tab->stop = (struct unwind_idx *)(start + size); | ||
| 395 | tab->begin_addr = text_addr; | ||
| 396 | tab->end_addr = text_addr + text_size; | ||
| 397 | |||
| 398 | /* Convert the symbol addresses to absolute values */ | ||
| 399 | for (idx = tab->start; idx < tab->stop; idx++) | ||
| 400 | idx->addr = prel31_to_addr(&idx->addr); | ||
| 401 | |||
| 402 | spin_lock_irqsave(&unwind_lock, flags); | ||
| 403 | list_add_tail(&tab->list, &unwind_tables); | ||
| 404 | spin_unlock_irqrestore(&unwind_lock, flags); | ||
| 405 | |||
| 406 | return tab; | ||
| 407 | } | ||
| 408 | |||
| 409 | void unwind_table_del(struct unwind_table *tab) | ||
| 410 | { | ||
| 411 | unsigned long flags; | ||
| 412 | |||
| 413 | if (!tab) | ||
| 414 | return; | ||
| 415 | |||
| 416 | spin_lock_irqsave(&unwind_lock, flags); | ||
| 417 | list_del(&tab->list); | ||
| 418 | spin_unlock_irqrestore(&unwind_lock, flags); | ||
| 419 | |||
| 420 | kfree(tab); | ||
| 421 | } | ||
| 422 | |||
| 423 | int __init unwind_init(void) | ||
| 424 | { | ||
| 425 | struct unwind_idx *idx; | ||
| 426 | |||
| 427 | /* Convert the symbol addresses to absolute values */ | ||
| 428 | for (idx = __start_unwind_idx; idx < __stop_unwind_idx; idx++) | ||
| 429 | idx->addr = prel31_to_addr(&idx->addr); | ||
| 430 | |||
| 431 | pr_debug("unwind: ARM stack unwinding initialised\n"); | ||
| 432 | |||
| 433 | return 0; | ||
| 434 | } | ||
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index 00216071eaf7..5f664599c945 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S | |||
| @@ -80,6 +80,8 @@ SECTIONS | |||
| 80 | EXIT_TEXT | 80 | EXIT_TEXT |
| 81 | EXIT_DATA | 81 | EXIT_DATA |
| 82 | *(.exitcall.exit) | 82 | *(.exitcall.exit) |
| 83 | *(.ARM.exidx.exit.text) | ||
| 84 | *(.ARM.extab.exit.text) | ||
| 83 | #ifndef CONFIG_MMU | 85 | #ifndef CONFIG_MMU |
| 84 | *(.fixup) | 86 | *(.fixup) |
| 85 | *(__ex_table) | 87 | *(__ex_table) |
| @@ -110,6 +112,23 @@ SECTIONS | |||
| 110 | 112 | ||
| 111 | _etext = .; /* End of text and rodata section */ | 113 | _etext = .; /* End of text and rodata section */ |
| 112 | 114 | ||
| 115 | #ifdef CONFIG_ARM_UNWIND | ||
| 116 | /* | ||
| 117 | * Stack unwinding tables | ||
| 118 | */ | ||
| 119 | . = ALIGN(8); | ||
| 120 | .ARM.unwind_idx : { | ||
| 121 | __start_unwind_idx = .; | ||
| 122 | *(.ARM.exidx*) | ||
| 123 | __stop_unwind_idx = .; | ||
| 124 | } | ||
| 125 | .ARM.unwind_tab : { | ||
| 126 | __start_unwind_tab = .; | ||
| 127 | *(.ARM.extab*) | ||
| 128 | __stop_unwind_tab = .; | ||
| 129 | } | ||
| 130 | #endif | ||
| 131 | |||
| 113 | #ifdef CONFIG_XIP_KERNEL | 132 | #ifdef CONFIG_XIP_KERNEL |
| 114 | __data_loc = ALIGN(4); /* location in binary */ | 133 | __data_loc = ALIGN(4); /* location in binary */ |
| 115 | . = PAGE_OFFSET + TEXT_OFFSET; | 134 | . = PAGE_OFFSET + TEXT_OFFSET; |
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c index 9eca2209cde6..412aa49ad2fb 100644 --- a/arch/arm/mach-at91/at91cap9_devices.c +++ b/arch/arm/mach-at91/at91cap9_devices.c | |||
| @@ -697,7 +697,7 @@ static void __init at91_add_device_rtt(void) | |||
| 697 | * Watchdog | 697 | * Watchdog |
| 698 | * -------------------------------------------------------------------- */ | 698 | * -------------------------------------------------------------------- */ |
| 699 | 699 | ||
| 700 | #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) | 700 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
| 701 | static struct platform_device at91cap9_wdt_device = { | 701 | static struct platform_device at91cap9_wdt_device = { |
| 702 | .name = "at91_wdt", | 702 | .name = "at91_wdt", |
| 703 | .id = -1, | 703 | .id = -1, |
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index fdde1ea21b07..d74c9ac007e7 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c | |||
| @@ -643,7 +643,7 @@ static void __init at91_add_device_rtt(void) | |||
| 643 | * Watchdog | 643 | * Watchdog |
| 644 | * -------------------------------------------------------------------- */ | 644 | * -------------------------------------------------------------------- */ |
| 645 | 645 | ||
| 646 | #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) | 646 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
| 647 | static struct platform_device at91sam9260_wdt_device = { | 647 | static struct platform_device at91sam9260_wdt_device = { |
| 648 | .name = "at91_wdt", | 648 | .name = "at91_wdt", |
| 649 | .id = -1, | 649 | .id = -1, |
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 17289756f80f..59fc48311fb0 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c | |||
| @@ -621,7 +621,7 @@ static void __init at91_add_device_rtt(void) | |||
| 621 | * Watchdog | 621 | * Watchdog |
| 622 | * -------------------------------------------------------------------- */ | 622 | * -------------------------------------------------------------------- */ |
| 623 | 623 | ||
| 624 | #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) | 624 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
| 625 | static struct platform_device at91sam9261_wdt_device = { | 625 | static struct platform_device at91sam9261_wdt_device = { |
| 626 | .name = "at91_wdt", | 626 | .name = "at91_wdt", |
| 627 | .id = -1, | 627 | .id = -1, |
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index b753cb879d8e..b7f233242315 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c | |||
| @@ -347,6 +347,111 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
| 347 | void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} | 347 | void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} |
| 348 | #endif | 348 | #endif |
| 349 | 349 | ||
| 350 | /* -------------------------------------------------------------------- | ||
| 351 | * Compact Flash (PCMCIA or IDE) | ||
| 352 | * -------------------------------------------------------------------- */ | ||
| 353 | |||
| 354 | #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \ | ||
| 355 | defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) | ||
| 356 | |||
| 357 | static struct at91_cf_data cf0_data; | ||
| 358 | |||
| 359 | static struct resource cf0_resources[] = { | ||
| 360 | [0] = { | ||
| 361 | .start = AT91_CHIPSELECT_4, | ||
| 362 | .end = AT91_CHIPSELECT_4 + SZ_256M - 1, | ||
| 363 | .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT, | ||
| 364 | } | ||
| 365 | }; | ||
| 366 | |||
| 367 | static struct platform_device cf0_device = { | ||
| 368 | .id = 0, | ||
| 369 | .dev = { | ||
| 370 | .platform_data = &cf0_data, | ||
| 371 | }, | ||
| 372 | .resource = cf0_resources, | ||
| 373 | .num_resources = ARRAY_SIZE(cf0_resources), | ||
| 374 | }; | ||
| 375 | |||
| 376 | static struct at91_cf_data cf1_data; | ||
| 377 | |||
| 378 | static struct resource cf1_resources[] = { | ||
| 379 | [0] = { | ||
| 380 | .start = AT91_CHIPSELECT_5, | ||
| 381 | .end = AT91_CHIPSELECT_5 + SZ_256M - 1, | ||
| 382 | .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT, | ||
| 383 | } | ||
| 384 | }; | ||
| 385 | |||
| 386 | static struct platform_device cf1_device = { | ||
| 387 | .id = 1, | ||
| 388 | .dev = { | ||
| 389 | .platform_data = &cf1_data, | ||
| 390 | }, | ||
| 391 | .resource = cf1_resources, | ||
| 392 | .num_resources = ARRAY_SIZE(cf1_resources), | ||
| 393 | }; | ||
| 394 | |||
| 395 | void __init at91_add_device_cf(struct at91_cf_data *data) | ||
| 396 | { | ||
| 397 | unsigned long ebi0_csa; | ||
| 398 | struct platform_device *pdev; | ||
| 399 | |||
| 400 | if (!data) | ||
| 401 | return; | ||
| 402 | |||
| 403 | /* | ||
| 404 | * assign CS4 or CS5 to SMC with Compact Flash logic support, | ||
| 405 | * we assume SMC timings are configured by board code, | ||
| 406 | * except True IDE where timings are controlled by driver | ||
| 407 | */ | ||
| 408 | ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA); | ||
| 409 | switch (data->chipselect) { | ||
| 410 | case 4: | ||
| 411 | at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */ | ||
| 412 | ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1; | ||
| 413 | cf0_data = *data; | ||
| 414 | pdev = &cf0_device; | ||
| 415 | break; | ||
| 416 | case 5: | ||
| 417 | at91_set_A_periph(AT91_PIN_PD7, 0); /* EBI0_NCS5/CFCS1 */ | ||
| 418 | ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2; | ||
| 419 | cf1_data = *data; | ||
| 420 | pdev = &cf1_device; | ||
| 421 | break; | ||
| 422 | default: | ||
| 423 | printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n", | ||
| 424 | data->chipselect); | ||
| 425 | return; | ||
| 426 | } | ||
| 427 | at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa); | ||
| 428 | |||
| 429 | if (data->det_pin) { | ||
| 430 | at91_set_gpio_input(data->det_pin, 1); | ||
| 431 | at91_set_deglitch(data->det_pin, 1); | ||
| 432 | } | ||
| 433 | |||
| 434 | if (data->irq_pin) { | ||
| 435 | at91_set_gpio_input(data->irq_pin, 1); | ||
| 436 | at91_set_deglitch(data->irq_pin, 1); | ||
| 437 | } | ||
| 438 | |||
| 439 | if (data->vcc_pin) | ||
| 440 | /* initially off */ | ||
| 441 | at91_set_gpio_output(data->vcc_pin, 0); | ||
| 442 | |||
| 443 | /* enable EBI controlled pins */ | ||
| 444 | at91_set_A_periph(AT91_PIN_PD5, 1); /* NWAIT */ | ||
| 445 | at91_set_A_periph(AT91_PIN_PD8, 0); /* CFCE1 */ | ||
| 446 | at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */ | ||
| 447 | at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */ | ||
| 448 | |||
| 449 | pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf"; | ||
| 450 | platform_device_register(pdev); | ||
| 451 | } | ||
| 452 | #else | ||
| 453 | void __init at91_add_device_cf(struct at91_cf_data *data) {} | ||
| 454 | #endif | ||
| 350 | 455 | ||
| 351 | /* -------------------------------------------------------------------- | 456 | /* -------------------------------------------------------------------- |
| 352 | * NAND / SmartMedia | 457 | * NAND / SmartMedia |
| @@ -854,7 +959,7 @@ static void __init at91_add_device_rtt(void) | |||
| 854 | * Watchdog | 959 | * Watchdog |
| 855 | * -------------------------------------------------------------------- */ | 960 | * -------------------------------------------------------------------- */ |
| 856 | 961 | ||
| 857 | #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) | 962 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
| 858 | static struct platform_device at91sam9263_wdt_device = { | 963 | static struct platform_device at91sam9263_wdt_device = { |
| 859 | .name = "at91_wdt", | 964 | .name = "at91_wdt", |
| 860 | .id = -1, | 965 | .id = -1, |
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 145324f4ec56..728186515cdf 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c | |||
| @@ -609,7 +609,7 @@ static void __init at91_add_device_rtt(void) | |||
| 609 | * Watchdog | 609 | * Watchdog |
| 610 | * -------------------------------------------------------------------- */ | 610 | * -------------------------------------------------------------------- */ |
| 611 | 611 | ||
| 612 | #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) | 612 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
| 613 | static struct platform_device at91sam9rl_wdt_device = { | 613 | static struct platform_device at91sam9rl_wdt_device = { |
| 614 | .name = "at91_wdt", | 614 | .name = "at91_wdt", |
| 615 | .id = -1, | 615 | .id = -1, |
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index 81439fe6fb3d..438efbb17482 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c | |||
| @@ -238,6 +238,10 @@ static void __init ek_board_init(void) | |||
| 238 | at91_add_device_i2c(NULL, 0); | 238 | at91_add_device_i2c(NULL, 0); |
| 239 | /* LEDs */ | 239 | /* LEDs */ |
| 240 | at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); | 240 | at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); |
| 241 | /* PCK0 provides MCLK to the WM8731 */ | ||
| 242 | at91_set_B_periph(AT91_PIN_PC1, 0); | ||
| 243 | /* SSC (for WM8731) */ | ||
| 244 | at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX); | ||
| 241 | } | 245 | } |
| 242 | 246 | ||
| 243 | MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") | 247 | MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") |
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 7b9ce7a336b0..b5daf7f5e011 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h | |||
| @@ -47,9 +47,6 @@ extern void at91_irq_resume(void); | |||
| 47 | #define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */ | 47 | #define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */ |
| 48 | 48 | ||
| 49 | struct at91_gpio_bank { | 49 | struct at91_gpio_bank { |
| 50 | unsigned chipbase; /* bank's first GPIO number */ | ||
| 51 | void __iomem *regbase; /* base of register bank */ | ||
| 52 | struct at91_gpio_bank *next; /* bank sharing same IRQ/clock/... */ | ||
| 53 | unsigned short id; /* peripheral ID */ | 50 | unsigned short id; /* peripheral ID */ |
| 54 | unsigned long offset; /* offset from system peripheral base */ | 51 | unsigned long offset; /* offset from system peripheral base */ |
| 55 | struct clk *clock; /* associated clock */ | 52 | struct clk *clock; /* associated clock */ |
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 9b0447c3d59b..f2236f0e101f 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c | |||
| @@ -24,19 +24,59 @@ | |||
| 24 | #include <mach/at91_pio.h> | 24 | #include <mach/at91_pio.h> |
| 25 | #include <mach/gpio.h> | 25 | #include <mach/gpio.h> |
| 26 | 26 | ||
| 27 | #include <asm/gpio.h> | ||
| 28 | |||
| 27 | #include "generic.h" | 29 | #include "generic.h" |
| 28 | 30 | ||
| 31 | struct at91_gpio_chip { | ||
| 32 | struct gpio_chip chip; | ||
| 33 | struct at91_gpio_chip *next; /* Bank sharing same clock */ | ||
| 34 | struct at91_gpio_bank *bank; /* Bank definition */ | ||
| 35 | void __iomem *regbase; /* Base of register bank */ | ||
| 36 | }; | ||
| 29 | 37 | ||
| 30 | static struct at91_gpio_bank *gpio; | 38 | #define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) |
| 31 | static int gpio_banks; | 39 | |
| 40 | static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip); | ||
| 41 | static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val); | ||
| 42 | static int at91_gpiolib_get(struct gpio_chip *chip, unsigned offset); | ||
| 43 | static int at91_gpiolib_direction_output(struct gpio_chip *chip, | ||
| 44 | unsigned offset, int val); | ||
| 45 | static int at91_gpiolib_direction_input(struct gpio_chip *chip, | ||
| 46 | unsigned offset); | ||
| 47 | static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset); | ||
| 48 | |||
| 49 | #define AT91_GPIO_CHIP(name, base_gpio, nr_gpio) \ | ||
| 50 | { \ | ||
| 51 | .chip = { \ | ||
| 52 | .label = name, \ | ||
| 53 | .request = at91_gpiolib_request, \ | ||
| 54 | .direction_input = at91_gpiolib_direction_input, \ | ||
| 55 | .direction_output = at91_gpiolib_direction_output, \ | ||
| 56 | .get = at91_gpiolib_get, \ | ||
| 57 | .set = at91_gpiolib_set, \ | ||
| 58 | .dbg_show = at91_gpiolib_dbg_show, \ | ||
| 59 | .base = base_gpio, \ | ||
| 60 | .ngpio = nr_gpio, \ | ||
| 61 | }, \ | ||
| 62 | } | ||
| 63 | |||
| 64 | static struct at91_gpio_chip gpio_chip[] = { | ||
| 65 | AT91_GPIO_CHIP("A", 0x00 + PIN_BASE, 32), | ||
| 66 | AT91_GPIO_CHIP("B", 0x20 + PIN_BASE, 32), | ||
| 67 | AT91_GPIO_CHIP("C", 0x40 + PIN_BASE, 32), | ||
| 68 | AT91_GPIO_CHIP("D", 0x60 + PIN_BASE, 32), | ||
| 69 | AT91_GPIO_CHIP("E", 0x80 + PIN_BASE, 32), | ||
| 70 | }; | ||
| 32 | 71 | ||
| 72 | static int gpio_banks; | ||
| 33 | 73 | ||
| 34 | static inline void __iomem *pin_to_controller(unsigned pin) | 74 | static inline void __iomem *pin_to_controller(unsigned pin) |
| 35 | { | 75 | { |
| 36 | pin -= PIN_BASE; | 76 | pin -= PIN_BASE; |
| 37 | pin /= 32; | 77 | pin /= 32; |
| 38 | if (likely(pin < gpio_banks)) | 78 | if (likely(pin < gpio_banks)) |
| 39 | return gpio[pin].regbase; | 79 | return gpio_chip[pin].regbase; |
| 40 | 80 | ||
| 41 | return NULL; | 81 | return NULL; |
| 42 | } | 82 | } |
| @@ -197,39 +237,6 @@ int __init_or_module at91_set_multi_drive(unsigned pin, int is_on) | |||
| 197 | } | 237 | } |
| 198 | EXPORT_SYMBOL(at91_set_multi_drive); | 238 | EXPORT_SYMBOL(at91_set_multi_drive); |
| 199 | 239 | ||
| 200 | /*--------------------------------------------------------------------------*/ | ||
| 201 | |||
| 202 | /* new-style GPIO calls; these expect at91_set_GPIO_periph to have been | ||
| 203 | * called, and maybe at91_set_multi_drive() for putout pins. | ||
| 204 | */ | ||
| 205 | |||
| 206 | int gpio_direction_input(unsigned pin) | ||
| 207 | { | ||
| 208 | void __iomem *pio = pin_to_controller(pin); | ||
| 209 | unsigned mask = pin_to_mask(pin); | ||
| 210 | |||
| 211 | if (!pio || !(__raw_readl(pio + PIO_PSR) & mask)) | ||
| 212 | return -EINVAL; | ||
| 213 | __raw_writel(mask, pio + PIO_ODR); | ||
| 214 | return 0; | ||
| 215 | } | ||
| 216 | EXPORT_SYMBOL(gpio_direction_input); | ||
| 217 | |||
| 218 | int gpio_direction_output(unsigned pin, int value) | ||
| 219 | { | ||
| 220 | void __iomem *pio = pin_to_controller(pin); | ||
| 221 | unsigned mask = pin_to_mask(pin); | ||
| 222 | |||
| 223 | if (!pio || !(__raw_readl(pio + PIO_PSR) & mask)) | ||
| 224 | return -EINVAL; | ||
| 225 | __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR)); | ||
| 226 | __raw_writel(mask, pio + PIO_OER); | ||
| 227 | return 0; | ||
| 228 | } | ||
| 229 | EXPORT_SYMBOL(gpio_direction_output); | ||
| 230 | |||
| 231 | /*--------------------------------------------------------------------------*/ | ||
| 232 | |||
| 233 | /* | 240 | /* |
| 234 | * assuming the pin is muxed as a gpio output, set its value. | 241 | * assuming the pin is muxed as a gpio output, set its value. |
| 235 | */ | 242 | */ |
| @@ -282,7 +289,7 @@ static int gpio_irq_set_wake(unsigned pin, unsigned state) | |||
| 282 | else | 289 | else |
| 283 | wakeups[bank] &= ~mask; | 290 | wakeups[bank] &= ~mask; |
| 284 | 291 | ||
| 285 | set_irq_wake(gpio[bank].id, state); | 292 | set_irq_wake(gpio_chip[bank].bank->id, state); |
| 286 | 293 | ||
| 287 | return 0; | 294 | return 0; |
| 288 | } | 295 | } |
| @@ -292,14 +299,14 @@ void at91_gpio_suspend(void) | |||
| 292 | int i; | 299 | int i; |
| 293 | 300 | ||
| 294 | for (i = 0; i < gpio_banks; i++) { | 301 | for (i = 0; i < gpio_banks; i++) { |
| 295 | void __iomem *pio = gpio[i].regbase; | 302 | void __iomem *pio = gpio_chip[i].regbase; |
| 296 | 303 | ||
| 297 | backups[i] = __raw_readl(pio + PIO_IMR); | 304 | backups[i] = __raw_readl(pio + PIO_IMR); |
| 298 | __raw_writel(backups[i], pio + PIO_IDR); | 305 | __raw_writel(backups[i], pio + PIO_IDR); |
| 299 | __raw_writel(wakeups[i], pio + PIO_IER); | 306 | __raw_writel(wakeups[i], pio + PIO_IER); |
| 300 | 307 | ||
| 301 | if (!wakeups[i]) | 308 | if (!wakeups[i]) |
| 302 | clk_disable(gpio[i].clock); | 309 | clk_disable(gpio_chip[i].bank->clock); |
| 303 | else { | 310 | else { |
| 304 | #ifdef CONFIG_PM_DEBUG | 311 | #ifdef CONFIG_PM_DEBUG |
| 305 | printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); | 312 | printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); |
| @@ -313,10 +320,10 @@ void at91_gpio_resume(void) | |||
| 313 | int i; | 320 | int i; |
| 314 | 321 | ||
| 315 | for (i = 0; i < gpio_banks; i++) { | 322 | for (i = 0; i < gpio_banks; i++) { |
| 316 | void __iomem *pio = gpio[i].regbase; | 323 | void __iomem *pio = gpio_chip[i].regbase; |
| 317 | 324 | ||
| 318 | if (!wakeups[i]) | 325 | if (!wakeups[i]) |
| 319 | clk_enable(gpio[i].clock); | 326 | clk_enable(gpio_chip[i].bank->clock); |
| 320 | 327 | ||
| 321 | __raw_writel(wakeups[i], pio + PIO_IDR); | 328 | __raw_writel(wakeups[i], pio + PIO_IDR); |
| 322 | __raw_writel(backups[i], pio + PIO_IER); | 329 | __raw_writel(backups[i], pio + PIO_IER); |
| @@ -380,12 +387,12 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
| 380 | { | 387 | { |
| 381 | unsigned pin; | 388 | unsigned pin; |
| 382 | struct irq_desc *gpio; | 389 | struct irq_desc *gpio; |
| 383 | struct at91_gpio_bank *bank; | 390 | struct at91_gpio_chip *at91_gpio; |
| 384 | void __iomem *pio; | 391 | void __iomem *pio; |
| 385 | u32 isr; | 392 | u32 isr; |
| 386 | 393 | ||
| 387 | bank = get_irq_chip_data(irq); | 394 | at91_gpio = get_irq_chip_data(irq); |
| 388 | pio = bank->regbase; | 395 | pio = at91_gpio->regbase; |
| 389 | 396 | ||
| 390 | /* temporarily mask (level sensitive) parent IRQ */ | 397 | /* temporarily mask (level sensitive) parent IRQ */ |
| 391 | desc->chip->ack(irq); | 398 | desc->chip->ack(irq); |
| @@ -396,14 +403,14 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
| 396 | */ | 403 | */ |
| 397 | isr = __raw_readl(pio + PIO_ISR) & __raw_readl(pio + PIO_IMR); | 404 | isr = __raw_readl(pio + PIO_ISR) & __raw_readl(pio + PIO_IMR); |
| 398 | if (!isr) { | 405 | if (!isr) { |
| 399 | if (!bank->next) | 406 | if (!at91_gpio->next) |
| 400 | break; | 407 | break; |
| 401 | bank = bank->next; | 408 | at91_gpio = at91_gpio->next; |
| 402 | pio = bank->regbase; | 409 | pio = at91_gpio->regbase; |
| 403 | continue; | 410 | continue; |
| 404 | } | 411 | } |
| 405 | 412 | ||
| 406 | pin = bank->chipbase; | 413 | pin = at91_gpio->chip.base; |
| 407 | gpio = &irq_desc[pin]; | 414 | gpio = &irq_desc[pin]; |
| 408 | 415 | ||
| 409 | while (isr) { | 416 | while (isr) { |
| @@ -490,7 +497,8 @@ postcore_initcall(at91_gpio_debugfs_init); | |||
| 490 | 497 | ||
| 491 | /*--------------------------------------------------------------------------*/ | 498 | /*--------------------------------------------------------------------------*/ |
| 492 | 499 | ||
| 493 | /* This lock class tells lockdep that GPIO irqs are in a different | 500 | /* |
| 501 | * This lock class tells lockdep that GPIO irqs are in a different | ||
| 494 | * category than their parents, so it won't report false recursion. | 502 | * category than their parents, so it won't report false recursion. |
| 495 | */ | 503 | */ |
| 496 | static struct lock_class_key gpio_lock_class; | 504 | static struct lock_class_key gpio_lock_class; |
| @@ -501,20 +509,17 @@ static struct lock_class_key gpio_lock_class; | |||
| 501 | void __init at91_gpio_irq_setup(void) | 509 | void __init at91_gpio_irq_setup(void) |
| 502 | { | 510 | { |
| 503 | unsigned pioc, pin; | 511 | unsigned pioc, pin; |
| 504 | struct at91_gpio_bank *this, *prev; | 512 | struct at91_gpio_chip *this, *prev; |
| 505 | 513 | ||
| 506 | for (pioc = 0, pin = PIN_BASE, this = gpio, prev = NULL; | 514 | for (pioc = 0, pin = PIN_BASE, this = gpio_chip, prev = NULL; |
| 507 | pioc++ < gpio_banks; | 515 | pioc++ < gpio_banks; |
| 508 | prev = this, this++) { | 516 | prev = this, this++) { |
| 509 | unsigned id = this->id; | 517 | unsigned id = this->bank->id; |
| 510 | unsigned i; | 518 | unsigned i; |
| 511 | 519 | ||
| 512 | /* enable PIO controller's clock */ | ||
| 513 | clk_enable(this->clock); | ||
| 514 | |||
| 515 | __raw_writel(~0, this->regbase + PIO_IDR); | 520 | __raw_writel(~0, this->regbase + PIO_IDR); |
| 516 | 521 | ||
| 517 | for (i = 0, pin = this->chipbase; i < 32; i++, pin++) { | 522 | for (i = 0, pin = this->chip.base; i < 32; i++, pin++) { |
| 518 | lockdep_set_class(&irq_desc[pin].lock, &gpio_lock_class); | 523 | lockdep_set_class(&irq_desc[pin].lock, &gpio_lock_class); |
| 519 | 524 | ||
| 520 | /* | 525 | /* |
| @@ -539,25 +544,117 @@ void __init at91_gpio_irq_setup(void) | |||
| 539 | pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks); | 544 | pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks); |
| 540 | } | 545 | } |
| 541 | 546 | ||
| 547 | /* gpiolib support */ | ||
| 548 | static int at91_gpiolib_direction_input(struct gpio_chip *chip, | ||
| 549 | unsigned offset) | ||
| 550 | { | ||
| 551 | struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); | ||
| 552 | void __iomem *pio = at91_gpio->regbase; | ||
| 553 | unsigned mask = 1 << offset; | ||
| 554 | |||
| 555 | __raw_writel(mask, pio + PIO_ODR); | ||
| 556 | return 0; | ||
| 557 | } | ||
| 558 | |||
| 559 | static int at91_gpiolib_direction_output(struct gpio_chip *chip, | ||
| 560 | unsigned offset, int val) | ||
| 561 | { | ||
| 562 | struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); | ||
| 563 | void __iomem *pio = at91_gpio->regbase; | ||
| 564 | unsigned mask = 1 << offset; | ||
| 565 | |||
| 566 | __raw_writel(mask, pio + (val ? PIO_SODR : PIO_CODR)); | ||
| 567 | __raw_writel(mask, pio + PIO_OER); | ||
| 568 | return 0; | ||
| 569 | } | ||
| 570 | |||
| 571 | static int at91_gpiolib_get(struct gpio_chip *chip, unsigned offset) | ||
| 572 | { | ||
| 573 | struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); | ||
| 574 | void __iomem *pio = at91_gpio->regbase; | ||
| 575 | unsigned mask = 1 << offset; | ||
| 576 | u32 pdsr; | ||
| 577 | |||
| 578 | pdsr = __raw_readl(pio + PIO_PDSR); | ||
| 579 | return (pdsr & mask) != 0; | ||
| 580 | } | ||
| 581 | |||
| 582 | static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val) | ||
| 583 | { | ||
| 584 | struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); | ||
| 585 | void __iomem *pio = at91_gpio->regbase; | ||
| 586 | unsigned mask = 1 << offset; | ||
| 587 | |||
| 588 | __raw_writel(mask, pio + (val ? PIO_SODR : PIO_CODR)); | ||
| 589 | } | ||
| 590 | |||
| 591 | static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset) | ||
| 592 | { | ||
| 593 | unsigned pin = chip->base + offset; | ||
| 594 | void __iomem *pio = pin_to_controller(pin); | ||
| 595 | unsigned mask = pin_to_mask(pin); | ||
| 596 | |||
| 597 | /* Cannot request GPIOs that are in alternate function mode */ | ||
| 598 | if (!(__raw_readl(pio + PIO_PSR) & mask)) | ||
| 599 | return -EPERM; | ||
| 600 | |||
| 601 | return 0; | ||
| 602 | } | ||
| 603 | |||
| 604 | static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip) | ||
| 605 | { | ||
| 606 | int i; | ||
| 607 | |||
| 608 | for (i = 0; i < chip->ngpio; i++) { | ||
| 609 | unsigned pin = chip->base + i; | ||
| 610 | void __iomem *pio = pin_to_controller(pin); | ||
| 611 | unsigned mask = pin_to_mask(pin); | ||
| 612 | const char *gpio_label; | ||
| 613 | |||
| 614 | gpio_label = gpiochip_is_requested(chip, i); | ||
| 615 | if (gpio_label) { | ||
| 616 | seq_printf(s, "[%s] GPIO%s%d: ", | ||
| 617 | gpio_label, chip->label, i); | ||
| 618 | if (__raw_readl(pio + PIO_PSR) & mask) | ||
| 619 | seq_printf(s, "[gpio] %s\n", | ||
| 620 | at91_get_gpio_value(pin) ? | ||
| 621 | "set" : "clear"); | ||
| 622 | else | ||
| 623 | seq_printf(s, "[periph %s]\n", | ||
| 624 | __raw_readl(pio + PIO_ABSR) & | ||
| 625 | mask ? "B" : "A"); | ||
| 626 | } | ||
| 627 | } | ||
| 628 | } | ||
| 629 | |||
| 542 | /* | 630 | /* |
| 543 | * Called from the processor-specific init to enable GPIO pin support. | 631 | * Called from the processor-specific init to enable GPIO pin support. |
| 544 | */ | 632 | */ |
| 545 | void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks) | 633 | void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks) |
| 546 | { | 634 | { |
| 547 | unsigned i; | 635 | unsigned i; |
| 548 | struct at91_gpio_bank *last; | 636 | struct at91_gpio_chip *at91_gpio, *last = NULL; |
| 549 | 637 | ||
| 550 | BUG_ON(nr_banks > MAX_GPIO_BANKS); | 638 | BUG_ON(nr_banks > MAX_GPIO_BANKS); |
| 551 | 639 | ||
| 552 | gpio = data; | ||
| 553 | gpio_banks = nr_banks; | 640 | gpio_banks = nr_banks; |
| 554 | 641 | ||
| 555 | for (i = 0, last = NULL; i < nr_banks; i++, last = data, data++) { | 642 | for (i = 0; i < nr_banks; i++) { |
| 556 | data->chipbase = PIN_BASE + i * 32; | 643 | at91_gpio = &gpio_chip[i]; |
| 557 | data->regbase = data->offset + (void __iomem *)AT91_VA_BASE_SYS; | 644 | |
| 645 | at91_gpio->bank = &data[i]; | ||
| 646 | at91_gpio->chip.base = PIN_BASE + i * 32; | ||
| 647 | at91_gpio->regbase = at91_gpio->bank->offset + | ||
| 648 | (void __iomem *)AT91_VA_BASE_SYS; | ||
| 649 | |||
| 650 | /* enable PIO controller's clock */ | ||
| 651 | clk_enable(at91_gpio->bank->clock); | ||
| 558 | 652 | ||
| 559 | /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ | 653 | /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ |
| 560 | if (last && last->id == data->id) | 654 | if (last && last->bank->id == at91_gpio->bank->id) |
| 561 | last->next = data; | 655 | last->next = at91_gpio; |
| 656 | last = at91_gpio; | ||
| 657 | |||
| 658 | gpiochip_add(&at91_gpio->chip); | ||
| 562 | } | 659 | } |
| 563 | } | 660 | } |
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index fb51f0e0a83f..793fe7b25f36 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h | |||
| @@ -56,6 +56,9 @@ struct at91_cf_data { | |||
| 56 | u8 vcc_pin; /* power switching */ | 56 | u8 vcc_pin; /* power switching */ |
| 57 | u8 rst_pin; /* card reset */ | 57 | u8 rst_pin; /* card reset */ |
| 58 | u8 chipselect; /* EBI Chip Select number */ | 58 | u8 chipselect; /* EBI Chip Select number */ |
| 59 | u8 flags; | ||
| 60 | #define AT91_CF_TRUE_IDE 0x01 | ||
| 61 | #define AT91_IDE_SWAP_A0_A2 0x02 | ||
| 59 | }; | 62 | }; |
| 60 | extern void __init at91_add_device_cf(struct at91_cf_data *data); | 63 | extern void __init at91_add_device_cf(struct at91_cf_data *data); |
| 61 | 64 | ||
| @@ -93,6 +96,7 @@ struct atmel_nand_data { | |||
| 93 | u8 enable_pin; /* chip enable */ | 96 | u8 enable_pin; /* chip enable */ |
| 94 | u8 det_pin; /* card detect */ | 97 | u8 det_pin; /* card detect */ |
| 95 | u8 rdy_pin; /* ready/busy */ | 98 | u8 rdy_pin; /* ready/busy */ |
| 99 | u8 rdy_pin_active_low; /* rdy_pin value is inverted */ | ||
| 96 | u8 ale; /* address line number connected to ALE */ | 100 | u8 ale; /* address line number connected to ALE */ |
| 97 | u8 cle; /* address line number connected to CLE */ | 101 | u8 cle; /* address line number connected to CLE */ |
| 98 | u8 bus_width_16; /* buswidth is 16 bit */ | 102 | u8 bus_width_16; /* buswidth is 16 bit */ |
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h index bffa6741a751..04c91e31c9c5 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/include/mach/gpio.h | |||
| @@ -213,32 +213,12 @@ extern void at91_gpio_resume(void); | |||
| 213 | */ | 213 | */ |
| 214 | 214 | ||
| 215 | #include <asm/errno.h> | 215 | #include <asm/errno.h> |
| 216 | |||
| 217 | static inline int gpio_request(unsigned gpio, const char *label) | ||
| 218 | { | ||
| 219 | return 0; | ||
| 220 | } | ||
| 221 | |||
| 222 | static inline void gpio_free(unsigned gpio) | ||
| 223 | { | ||
| 224 | might_sleep(); | ||
| 225 | } | ||
| 226 | |||
| 227 | extern int gpio_direction_input(unsigned gpio); | ||
| 228 | extern int gpio_direction_output(unsigned gpio, int value); | ||
| 229 | |||
| 230 | static inline int gpio_get_value(unsigned gpio) | ||
| 231 | { | ||
| 232 | return at91_get_gpio_value(gpio); | ||
| 233 | } | ||
| 234 | |||
| 235 | static inline void gpio_set_value(unsigned gpio, int value) | ||
| 236 | { | ||
| 237 | at91_set_gpio_value(gpio, value); | ||
| 238 | } | ||
| 239 | |||
| 240 | #include <asm-generic/gpio.h> /* cansleep wrappers */ | 216 | #include <asm-generic/gpio.h> /* cansleep wrappers */ |
| 241 | 217 | ||
| 218 | #define gpio_get_value __gpio_get_value | ||
| 219 | #define gpio_set_value __gpio_set_value | ||
| 220 | #define gpio_cansleep __gpio_cansleep | ||
| 221 | |||
| 242 | static inline int gpio_to_irq(unsigned gpio) | 222 | static inline int gpio_to_irq(unsigned gpio) |
| 243 | { | 223 | { |
| 244 | return gpio; | 224 | return gpio; |
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 9bb4f043aa22..7ac812dc055a 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c | |||
| @@ -332,7 +332,6 @@ static int at91_pm_enter(suspend_state_t state) | |||
| 332 | at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); | 332 | at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); |
| 333 | 333 | ||
| 334 | error: | 334 | error: |
| 335 | sdram_selfrefresh_disable(); | ||
| 336 | target_state = PM_SUSPEND_ON; | 335 | target_state = PM_SUSPEND_ON; |
| 337 | at91_irq_resume(); | 336 | at91_irq_resume(); |
| 338 | at91_gpio_resume(); | 337 | at91_gpio_resume(); |
diff --git a/arch/arm/mach-davinci/board-evm.c b/arch/arm/mach-davinci/board-evm.c index a957d239a683..38b6a9ce2a93 100644 --- a/arch/arm/mach-davinci/board-evm.c +++ b/arch/arm/mach-davinci/board-evm.c | |||
| @@ -311,6 +311,9 @@ evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c) | |||
| 311 | gpio_request(gpio + 7, "nCF_SEL"); | 311 | gpio_request(gpio + 7, "nCF_SEL"); |
| 312 | gpio_direction_output(gpio + 7, 1); | 312 | gpio_direction_output(gpio + 7, 1); |
| 313 | 313 | ||
| 314 | /* irlml6401 sustains over 3A, switches 5V in under 8 msec */ | ||
| 315 | setup_usb(500, 8); | ||
| 316 | |||
| 314 | return 0; | 317 | return 0; |
| 315 | } | 318 | } |
| 316 | 319 | ||
| @@ -417,9 +420,6 @@ static __init void davinci_evm_init(void) | |||
| 417 | platform_add_devices(davinci_evm_devices, | 420 | platform_add_devices(davinci_evm_devices, |
| 418 | ARRAY_SIZE(davinci_evm_devices)); | 421 | ARRAY_SIZE(davinci_evm_devices)); |
| 419 | evm_init_i2c(); | 422 | evm_init_i2c(); |
| 420 | |||
| 421 | /* irlml6401 sustains over 3A, switches 5V in under 8 msec */ | ||
| 422 | setup_usb(500, 8); | ||
| 423 | } | 423 | } |
| 424 | 424 | ||
| 425 | static __init void davinci_evm_irq_init(void) | 425 | static __init void davinci_evm_irq_init(void) |
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index 28f6dbc95bd7..abb92b7eca0c 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c | |||
| @@ -231,6 +231,11 @@ static struct clk davinci_clks[] = { | |||
| 231 | .lpsc = DAVINCI_LPSC_GPIO, | 231 | .lpsc = DAVINCI_LPSC_GPIO, |
| 232 | }, | 232 | }, |
| 233 | { | 233 | { |
| 234 | .name = "usb", | ||
| 235 | .rate = &commonrate, | ||
| 236 | .lpsc = DAVINCI_LPSC_USB, | ||
| 237 | }, | ||
| 238 | { | ||
| 234 | .name = "AEMIFCLK", | 239 | .name = "AEMIFCLK", |
| 235 | .rate = &commonrate, | 240 | .rate = &commonrate, |
| 236 | .lpsc = DAVINCI_LPSC_AEMIF, | 241 | .lpsc = DAVINCI_LPSC_AEMIF, |
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c index 867ead2559ad..69680784448a 100644 --- a/arch/arm/mach-davinci/usb.c +++ b/arch/arm/mach-davinci/usb.c | |||
| @@ -47,6 +47,7 @@ static struct musb_hdrc_platform_data usb_data = { | |||
| 47 | #elif defined(CONFIG_USB_MUSB_HOST) | 47 | #elif defined(CONFIG_USB_MUSB_HOST) |
| 48 | .mode = MUSB_HOST, | 48 | .mode = MUSB_HOST, |
| 49 | #endif | 49 | #endif |
| 50 | .clock = "usb", | ||
| 50 | .config = &musb_config, | 51 | .config = &musb_config, |
| 51 | }; | 52 | }; |
| 52 | 53 | ||
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile index 944e42d51646..9522e205b73f 100644 --- a/arch/arm/mach-ep93xx/Makefile +++ b/arch/arm/mach-ep93xx/Makefile | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Makefile for the linux kernel. | 2 | # Makefile for the linux kernel. |
| 3 | # | 3 | # |
| 4 | obj-y := core.o clock.o gpio.o | 4 | obj-y := core.o clock.o dma-m2p.o gpio.o |
| 5 | obj-m := | 5 | obj-m := |
| 6 | obj-n := | 6 | obj-n := |
| 7 | obj- := | 7 | obj- := |
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c index 96049283a10a..e8ebeaea6c48 100644 --- a/arch/arm/mach-ep93xx/clock.c +++ b/arch/arm/mach-ep93xx/clock.c | |||
| @@ -41,6 +41,56 @@ static struct clk clk_usb_host = { | |||
| 41 | .enable_mask = EP93XX_SYSCON_CLOCK_USH_EN, | 41 | .enable_mask = EP93XX_SYSCON_CLOCK_USH_EN, |
| 42 | }; | 42 | }; |
| 43 | 43 | ||
| 44 | /* DMA Clocks */ | ||
| 45 | static struct clk clk_m2p0 = { | ||
| 46 | .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, | ||
| 47 | .enable_mask = 0x00020000, | ||
| 48 | }; | ||
| 49 | static struct clk clk_m2p1 = { | ||
| 50 | .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, | ||
| 51 | .enable_mask = 0x00010000, | ||
| 52 | }; | ||
| 53 | static struct clk clk_m2p2 = { | ||
| 54 | .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, | ||
| 55 | .enable_mask = 0x00080000, | ||
| 56 | }; | ||
| 57 | static struct clk clk_m2p3 = { | ||
| 58 | .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, | ||
| 59 | .enable_mask = 0x00040000, | ||
| 60 | }; | ||
| 61 | static struct clk clk_m2p4 = { | ||
| 62 | .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, | ||
| 63 | .enable_mask = 0x00200000, | ||
| 64 | }; | ||
| 65 | static struct clk clk_m2p5 = { | ||
| 66 | .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, | ||
| 67 | .enable_mask = 0x00100000, | ||
| 68 | }; | ||
| 69 | static struct clk clk_m2p6 = { | ||
| 70 | .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, | ||
| 71 | .enable_mask = 0x00800000, | ||
| 72 | }; | ||
| 73 | static struct clk clk_m2p7 = { | ||
| 74 | .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, | ||
| 75 | .enable_mask = 0x00400000, | ||
| 76 | }; | ||
| 77 | static struct clk clk_m2p8 = { | ||
| 78 | .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, | ||
| 79 | .enable_mask = 0x02000000, | ||
| 80 | }; | ||
| 81 | static struct clk clk_m2p9 = { | ||
| 82 | .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, | ||
| 83 | .enable_mask = 0x01000000, | ||
| 84 | }; | ||
| 85 | static struct clk clk_m2m0 = { | ||
| 86 | .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, | ||
| 87 | .enable_mask = 0x04000000, | ||
| 88 | }; | ||
| 89 | static struct clk clk_m2m1 = { | ||
| 90 | .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, | ||
| 91 | .enable_mask = 0x08000000, | ||
| 92 | }; | ||
| 93 | |||
| 44 | #define INIT_CK(dev,con,ck) \ | 94 | #define INIT_CK(dev,con,ck) \ |
| 45 | { .dev_id = dev, .con_id = con, .clk = ck } | 95 | { .dev_id = dev, .con_id = con, .clk = ck } |
| 46 | 96 | ||
| @@ -54,6 +104,18 @@ static struct clk_lookup clocks[] = { | |||
| 54 | INIT_CK(NULL, "pclk", &clk_p), | 104 | INIT_CK(NULL, "pclk", &clk_p), |
| 55 | INIT_CK(NULL, "pll2", &clk_pll2), | 105 | INIT_CK(NULL, "pll2", &clk_pll2), |
| 56 | INIT_CK(NULL, "usb_host", &clk_usb_host), | 106 | INIT_CK(NULL, "usb_host", &clk_usb_host), |
| 107 | INIT_CK(NULL, "m2p0", &clk_m2p0), | ||
| 108 | INIT_CK(NULL, "m2p1", &clk_m2p1), | ||
| 109 | INIT_CK(NULL, "m2p2", &clk_m2p2), | ||
| 110 | INIT_CK(NULL, "m2p3", &clk_m2p3), | ||
| 111 | INIT_CK(NULL, "m2p4", &clk_m2p4), | ||
| 112 | INIT_CK(NULL, "m2p5", &clk_m2p5), | ||
| 113 | INIT_CK(NULL, "m2p6", &clk_m2p6), | ||
| 114 | INIT_CK(NULL, "m2p7", &clk_m2p7), | ||
| 115 | INIT_CK(NULL, "m2p8", &clk_m2p8), | ||
| 116 | INIT_CK(NULL, "m2p9", &clk_m2p9), | ||
| 117 | INIT_CK(NULL, "m2m0", &clk_m2m0), | ||
| 118 | INIT_CK(NULL, "m2m1", &clk_m2m1), | ||
| 57 | }; | 119 | }; |
| 58 | 120 | ||
| 59 | 121 | ||
| @@ -110,6 +172,22 @@ static unsigned long calc_pll_rate(u32 config_word) | |||
| 110 | return (unsigned long)rate; | 172 | return (unsigned long)rate; |
| 111 | } | 173 | } |
| 112 | 174 | ||
| 175 | static void __init ep93xx_dma_clock_init(void) | ||
| 176 | { | ||
| 177 | clk_m2p0.rate = clk_h.rate; | ||
| 178 | clk_m2p1.rate = clk_h.rate; | ||
| 179 | clk_m2p2.rate = clk_h.rate; | ||
| 180 | clk_m2p3.rate = clk_h.rate; | ||
| 181 | clk_m2p4.rate = clk_h.rate; | ||
| 182 | clk_m2p5.rate = clk_h.rate; | ||
| 183 | clk_m2p6.rate = clk_h.rate; | ||
| 184 | clk_m2p7.rate = clk_h.rate; | ||
| 185 | clk_m2p8.rate = clk_h.rate; | ||
| 186 | clk_m2p9.rate = clk_h.rate; | ||
| 187 | clk_m2m0.rate = clk_h.rate; | ||
| 188 | clk_m2m1.rate = clk_h.rate; | ||
| 189 | } | ||
| 190 | |||
| 113 | static int __init ep93xx_clock_init(void) | 191 | static int __init ep93xx_clock_init(void) |
| 114 | { | 192 | { |
| 115 | u32 value; | 193 | u32 value; |
| @@ -124,6 +202,7 @@ static int __init ep93xx_clock_init(void) | |||
| 124 | clk_f.rate = clk_pll1.rate / fclk_divisors[(value >> 25) & 0x7]; | 202 | clk_f.rate = clk_pll1.rate / fclk_divisors[(value >> 25) & 0x7]; |
| 125 | clk_h.rate = clk_pll1.rate / hclk_divisors[(value >> 20) & 0x7]; | 203 | clk_h.rate = clk_pll1.rate / hclk_divisors[(value >> 20) & 0x7]; |
| 126 | clk_p.rate = clk_h.rate / pclk_divisors[(value >> 18) & 0x3]; | 204 | clk_p.rate = clk_h.rate / pclk_divisors[(value >> 18) & 0x3]; |
| 205 | ep93xx_dma_clock_init(); | ||
| 127 | 206 | ||
| 128 | value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2); | 207 | value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2); |
| 129 | if (!(value & 0x00080000)) { /* PLL2 bypassed? */ | 208 | if (!(value & 0x00080000)) { /* PLL2 bypassed? */ |
diff --git a/arch/arm/mach-ep93xx/dma-m2p.c b/arch/arm/mach-ep93xx/dma-m2p.c new file mode 100644 index 000000000000..a2df5bb7dff0 --- /dev/null +++ b/arch/arm/mach-ep93xx/dma-m2p.c | |||
| @@ -0,0 +1,408 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-ep93xx/dma-m2p.c | ||
| 3 | * M2P DMA handling for Cirrus EP93xx chips. | ||
| 4 | * | ||
| 5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> | ||
| 6 | * Copyright (C) 2006 Applied Data Systems | ||
| 7 | * | ||
| 8 | * Copyright (C) 2009 Ryan Mallon <ryan@bluewatersys.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or (at | ||
| 13 | * your option) any later version. | ||
| 14 | */ | ||
| 15 | |||
| 16 | /* | ||
| 17 | * On the EP93xx chip the following peripherals my be allocated to the 10 | ||
| 18 | * Memory to Internal Peripheral (M2P) channels (5 transmit + 5 receive). | ||
| 19 | * | ||
| 20 | * I2S contains 3 Tx and 3 Rx DMA Channels | ||
| 21 | * AAC contains 3 Tx and 3 Rx DMA Channels | ||
| 22 | * UART1 contains 1 Tx and 1 Rx DMA Channels | ||
| 23 | * UART2 contains 1 Tx and 1 Rx DMA Channels | ||
| 24 | * UART3 contains 1 Tx and 1 Rx DMA Channels | ||
| 25 | * IrDA contains 1 Tx and 1 Rx DMA Channels | ||
| 26 | * | ||
| 27 | * SSP and IDE use the Memory to Memory (M2M) channels and are not covered | ||
| 28 | * with this implementation. | ||
| 29 | */ | ||
| 30 | |||
| 31 | #include <linux/kernel.h> | ||
| 32 | #include <linux/clk.h> | ||
| 33 | #include <linux/err.h> | ||
| 34 | #include <linux/interrupt.h> | ||
| 35 | #include <linux/module.h> | ||
| 36 | |||
| 37 | #include <mach/dma.h> | ||
| 38 | #include <mach/hardware.h> | ||
| 39 | |||
| 40 | #define M2P_CONTROL 0x00 | ||
| 41 | #define M2P_CONTROL_STALL_IRQ_EN (1 << 0) | ||
| 42 | #define M2P_CONTROL_NFB_IRQ_EN (1 << 1) | ||
| 43 | #define M2P_CONTROL_ERROR_IRQ_EN (1 << 3) | ||
| 44 | #define M2P_CONTROL_ENABLE (1 << 4) | ||
| 45 | #define M2P_INTERRUPT 0x04 | ||
| 46 | #define M2P_INTERRUPT_STALL (1 << 0) | ||
| 47 | #define M2P_INTERRUPT_NFB (1 << 1) | ||
| 48 | #define M2P_INTERRUPT_ERROR (1 << 3) | ||
| 49 | #define M2P_PPALLOC 0x08 | ||
| 50 | #define M2P_STATUS 0x0c | ||
| 51 | #define M2P_REMAIN 0x14 | ||
| 52 | #define M2P_MAXCNT0 0x20 | ||
| 53 | #define M2P_BASE0 0x24 | ||
| 54 | #define M2P_MAXCNT1 0x30 | ||
| 55 | #define M2P_BASE1 0x34 | ||
| 56 | |||
| 57 | #define STATE_IDLE 0 /* Channel is inactive. */ | ||
| 58 | #define STATE_STALL 1 /* Channel is active, no buffers pending. */ | ||
| 59 | #define STATE_ON 2 /* Channel is active, one buffer pending. */ | ||
| 60 | #define STATE_NEXT 3 /* Channel is active, two buffers pending. */ | ||
| 61 | |||
| 62 | struct m2p_channel { | ||
| 63 | char *name; | ||
| 64 | void __iomem *base; | ||
| 65 | int irq; | ||
| 66 | |||
| 67 | struct clk *clk; | ||
| 68 | spinlock_t lock; | ||
| 69 | |||
| 70 | void *client; | ||
| 71 | unsigned next_slot:1; | ||
| 72 | struct ep93xx_dma_buffer *buffer_xfer; | ||
| 73 | struct ep93xx_dma_buffer *buffer_next; | ||
| 74 | struct list_head buffers_pending; | ||
| 75 | }; | ||
| 76 | |||
| 77 | static struct m2p_channel m2p_rx[] = { | ||
| 78 | {"m2p1", EP93XX_DMA_BASE + 0x0040, IRQ_EP93XX_DMAM2P1}, | ||
| 79 | {"m2p3", EP93XX_DMA_BASE + 0x00c0, IRQ_EP93XX_DMAM2P3}, | ||
| 80 | {"m2p5", EP93XX_DMA_BASE + 0x0200, IRQ_EP93XX_DMAM2P5}, | ||
| 81 | {"m2p7", EP93XX_DMA_BASE + 0x0280, IRQ_EP93XX_DMAM2P7}, | ||
| 82 | {"m2p9", EP93XX_DMA_BASE + 0x0300, IRQ_EP93XX_DMAM2P9}, | ||
| 83 | {NULL}, | ||
| 84 | }; | ||
| 85 | |||
| 86 | static struct m2p_channel m2p_tx[] = { | ||
| 87 | {"m2p0", EP93XX_DMA_BASE + 0x0000, IRQ_EP93XX_DMAM2P0}, | ||
| 88 | {"m2p2", EP93XX_DMA_BASE + 0x0080, IRQ_EP93XX_DMAM2P2}, | ||
| 89 | {"m2p4", EP93XX_DMA_BASE + 0x0240, IRQ_EP93XX_DMAM2P4}, | ||
| 90 | {"m2p6", EP93XX_DMA_BASE + 0x02c0, IRQ_EP93XX_DMAM2P6}, | ||
| 91 | {"m2p8", EP93XX_DMA_BASE + 0x0340, IRQ_EP93XX_DMAM2P8}, | ||
| 92 | {NULL}, | ||
| 93 | }; | ||
| 94 | |||
| 95 | static void feed_buf(struct m2p_channel *ch, struct ep93xx_dma_buffer *buf) | ||
| 96 | { | ||
| 97 | if (ch->next_slot == 0) { | ||
| 98 | writel(buf->size, ch->base + M2P_MAXCNT0); | ||
| 99 | writel(buf->bus_addr, ch->base + M2P_BASE0); | ||
| 100 | } else { | ||
| 101 | writel(buf->size, ch->base + M2P_MAXCNT1); | ||
| 102 | writel(buf->bus_addr, ch->base + M2P_BASE1); | ||
| 103 | } | ||
| 104 | ch->next_slot ^= 1; | ||
| 105 | } | ||
| 106 | |||
| 107 | static void choose_buffer_xfer(struct m2p_channel *ch) | ||
| 108 | { | ||
| 109 | struct ep93xx_dma_buffer *buf; | ||
| 110 | |||
| 111 | ch->buffer_xfer = NULL; | ||
| 112 | if (!list_empty(&ch->buffers_pending)) { | ||
| 113 | buf = list_entry(ch->buffers_pending.next, | ||
| 114 | struct ep93xx_dma_buffer, list); | ||
| 115 | list_del(&buf->list); | ||
| 116 | feed_buf(ch, buf); | ||
| 117 | ch->buffer_xfer = buf; | ||
| 118 | } | ||
| 119 | } | ||
| 120 | |||
| 121 | static void choose_buffer_next(struct m2p_channel *ch) | ||
| 122 | { | ||
| 123 | struct ep93xx_dma_buffer *buf; | ||
| 124 | |||
| 125 | ch->buffer_next = NULL; | ||
| 126 | if (!list_empty(&ch->buffers_pending)) { | ||
| 127 | buf = list_entry(ch->buffers_pending.next, | ||
| 128 | struct ep93xx_dma_buffer, list); | ||
| 129 | list_del(&buf->list); | ||
| 130 | feed_buf(ch, buf); | ||
| 131 | ch->buffer_next = buf; | ||
| 132 | } | ||
| 133 | } | ||
| 134 | |||
| 135 | static inline void m2p_set_control(struct m2p_channel *ch, u32 v) | ||
| 136 | { | ||
| 137 | /* | ||
| 138 | * The control register must be read immediately after being written so | ||
| 139 | * that the internal state machine is correctly updated. See the ep93xx | ||
| 140 | * users' guide for details. | ||
| 141 | */ | ||
| 142 | writel(v, ch->base + M2P_CONTROL); | ||
| 143 | readl(ch->base + M2P_CONTROL); | ||
| 144 | } | ||
| 145 | |||
| 146 | static inline int m2p_channel_state(struct m2p_channel *ch) | ||
| 147 | { | ||
| 148 | return (readl(ch->base + M2P_STATUS) >> 4) & 0x3; | ||
| 149 | } | ||
| 150 | |||
| 151 | static irqreturn_t m2p_irq(int irq, void *dev_id) | ||
| 152 | { | ||
| 153 | struct m2p_channel *ch = dev_id; | ||
| 154 | struct ep93xx_dma_m2p_client *cl; | ||
| 155 | u32 irq_status, v; | ||
| 156 | int error = 0; | ||
| 157 | |||
| 158 | cl = ch->client; | ||
| 159 | |||
| 160 | spin_lock(&ch->lock); | ||
| 161 | irq_status = readl(ch->base + M2P_INTERRUPT); | ||
| 162 | |||
| 163 | if (irq_status & M2P_INTERRUPT_ERROR) { | ||
| 164 | writel(M2P_INTERRUPT_ERROR, ch->base + M2P_INTERRUPT); | ||
| 165 | error = 1; | ||
| 166 | } | ||
| 167 | |||
| 168 | if ((irq_status & (M2P_INTERRUPT_STALL | M2P_INTERRUPT_NFB)) == 0) { | ||
| 169 | spin_unlock(&ch->lock); | ||
| 170 | return IRQ_NONE; | ||
| 171 | } | ||
| 172 | |||
| 173 | switch (m2p_channel_state(ch)) { | ||
| 174 | case STATE_IDLE: | ||
| 175 | pr_crit("m2p_irq: dma interrupt without a dma buffer\n"); | ||
| 176 | BUG(); | ||
| 177 | break; | ||
| 178 | |||
| 179 | case STATE_STALL: | ||
| 180 | cl->buffer_finished(cl->cookie, ch->buffer_xfer, 0, error); | ||
| 181 | if (ch->buffer_next != NULL) { | ||
| 182 | cl->buffer_finished(cl->cookie, ch->buffer_next, | ||
| 183 | 0, error); | ||
| 184 | } | ||
| 185 | choose_buffer_xfer(ch); | ||
| 186 | choose_buffer_next(ch); | ||
| 187 | if (ch->buffer_xfer != NULL) | ||
| 188 | cl->buffer_started(cl->cookie, ch->buffer_xfer); | ||
| 189 | break; | ||
| 190 | |||
| 191 | case STATE_ON: | ||
| 192 | cl->buffer_finished(cl->cookie, ch->buffer_xfer, 0, error); | ||
| 193 | ch->buffer_xfer = ch->buffer_next; | ||
| 194 | choose_buffer_next(ch); | ||
| 195 | cl->buffer_started(cl->cookie, ch->buffer_xfer); | ||
| 196 | break; | ||
| 197 | |||
| 198 | case STATE_NEXT: | ||
| 199 | pr_crit("m2p_irq: dma interrupt while next\n"); | ||
| 200 | BUG(); | ||
| 201 | break; | ||
| 202 | } | ||
| 203 | |||
| 204 | v = readl(ch->base + M2P_CONTROL) & ~(M2P_CONTROL_STALL_IRQ_EN | | ||
| 205 | M2P_CONTROL_NFB_IRQ_EN); | ||
| 206 | if (ch->buffer_xfer != NULL) | ||
| 207 | v |= M2P_CONTROL_STALL_IRQ_EN; | ||
| 208 | if (ch->buffer_next != NULL) | ||
| 209 | v |= M2P_CONTROL_NFB_IRQ_EN; | ||
| 210 | m2p_set_control(ch, v); | ||
| 211 | |||
| 212 | spin_unlock(&ch->lock); | ||
| 213 | return IRQ_HANDLED; | ||
| 214 | } | ||
| 215 | |||
| 216 | static struct m2p_channel *find_free_channel(struct ep93xx_dma_m2p_client *cl) | ||
| 217 | { | ||
| 218 | struct m2p_channel *ch; | ||
| 219 | int i; | ||
| 220 | |||
| 221 | if (cl->flags & EP93XX_DMA_M2P_RX) | ||
| 222 | ch = m2p_rx; | ||
| 223 | else | ||
| 224 | ch = m2p_tx; | ||
| 225 | |||
| 226 | for (i = 0; ch[i].base; i++) { | ||
| 227 | struct ep93xx_dma_m2p_client *client; | ||
| 228 | |||
| 229 | client = ch[i].client; | ||
| 230 | if (client != NULL) { | ||
| 231 | int port; | ||
| 232 | |||
| 233 | port = cl->flags & EP93XX_DMA_M2P_PORT_MASK; | ||
| 234 | if (port == (client->flags & | ||
| 235 | EP93XX_DMA_M2P_PORT_MASK)) { | ||
| 236 | pr_warning("DMA channel already used by %s\n", | ||
| 237 | cl->name ? : "unknown client"); | ||
| 238 | return ERR_PTR(-EBUSY); | ||
| 239 | } | ||
| 240 | } | ||
| 241 | } | ||
| 242 | |||
| 243 | for (i = 0; ch[i].base; i++) { | ||
| 244 | if (ch[i].client == NULL) | ||
| 245 | return ch + i; | ||
| 246 | } | ||
| 247 | |||
| 248 | pr_warning("No free DMA channel for %s\n", | ||
| 249 | cl->name ? : "unknown client"); | ||
| 250 | return ERR_PTR(-ENODEV); | ||
| 251 | } | ||
| 252 | |||
| 253 | static void channel_enable(struct m2p_channel *ch) | ||
| 254 | { | ||
| 255 | struct ep93xx_dma_m2p_client *cl = ch->client; | ||
| 256 | u32 v; | ||
| 257 | |||
| 258 | clk_enable(ch->clk); | ||
| 259 | |||
| 260 | v = cl->flags & EP93XX_DMA_M2P_PORT_MASK; | ||
| 261 | writel(v, ch->base + M2P_PPALLOC); | ||
| 262 | |||
| 263 | v = cl->flags & EP93XX_DMA_M2P_ERROR_MASK; | ||
| 264 | v |= M2P_CONTROL_ENABLE | M2P_CONTROL_ERROR_IRQ_EN; | ||
| 265 | m2p_set_control(ch, v); | ||
| 266 | } | ||
| 267 | |||
| 268 | static void channel_disable(struct m2p_channel *ch) | ||
| 269 | { | ||
| 270 | u32 v; | ||
| 271 | |||
| 272 | v = readl(ch->base + M2P_CONTROL); | ||
| 273 | v &= ~(M2P_CONTROL_STALL_IRQ_EN | M2P_CONTROL_NFB_IRQ_EN); | ||
| 274 | m2p_set_control(ch, v); | ||
| 275 | |||
| 276 | while (m2p_channel_state(ch) == STATE_ON) | ||
| 277 | cpu_relax(); | ||
| 278 | |||
| 279 | m2p_set_control(ch, 0x0); | ||
| 280 | |||
| 281 | while (m2p_channel_state(ch) == STATE_STALL) | ||
| 282 | cpu_relax(); | ||
| 283 | |||
| 284 | clk_disable(ch->clk); | ||
| 285 | } | ||
| 286 | |||
| 287 | int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *cl) | ||
| 288 | { | ||
| 289 | struct m2p_channel *ch; | ||
| 290 | int err; | ||
| 291 | |||
| 292 | ch = find_free_channel(cl); | ||
| 293 | if (IS_ERR(ch)) | ||
| 294 | return PTR_ERR(ch); | ||
| 295 | |||
| 296 | err = request_irq(ch->irq, m2p_irq, 0, cl->name ? : "dma-m2p", ch); | ||
| 297 | if (err) | ||
| 298 | return err; | ||
| 299 | |||
| 300 | ch->client = cl; | ||
| 301 | ch->next_slot = 0; | ||
| 302 | ch->buffer_xfer = NULL; | ||
| 303 | ch->buffer_next = NULL; | ||
| 304 | INIT_LIST_HEAD(&ch->buffers_pending); | ||
| 305 | |||
| 306 | cl->channel = ch; | ||
| 307 | |||
| 308 | channel_enable(ch); | ||
| 309 | |||
| 310 | return 0; | ||
| 311 | } | ||
| 312 | EXPORT_SYMBOL_GPL(ep93xx_dma_m2p_client_register); | ||
| 313 | |||
| 314 | void ep93xx_dma_m2p_client_unregister(struct ep93xx_dma_m2p_client *cl) | ||
| 315 | { | ||
| 316 | struct m2p_channel *ch = cl->channel; | ||
| 317 | |||
| 318 | channel_disable(ch); | ||
| 319 | free_irq(ch->irq, ch); | ||
| 320 | ch->client = NULL; | ||
| 321 | } | ||
| 322 | EXPORT_SYMBOL_GPL(ep93xx_dma_m2p_client_unregister); | ||
| 323 | |||
| 324 | void ep93xx_dma_m2p_submit(struct ep93xx_dma_m2p_client *cl, | ||
| 325 | struct ep93xx_dma_buffer *buf) | ||
| 326 | { | ||
| 327 | struct m2p_channel *ch = cl->channel; | ||
| 328 | unsigned long flags; | ||
| 329 | u32 v; | ||
| 330 | |||
| 331 | spin_lock_irqsave(&ch->lock, flags); | ||
| 332 | v = readl(ch->base + M2P_CONTROL); | ||
| 333 | if (ch->buffer_xfer == NULL) { | ||
| 334 | ch->buffer_xfer = buf; | ||
| 335 | feed_buf(ch, buf); | ||
| 336 | cl->buffer_started(cl->cookie, buf); | ||
| 337 | |||
| 338 | v |= M2P_CONTROL_STALL_IRQ_EN; | ||
| 339 | m2p_set_control(ch, v); | ||
| 340 | |||
| 341 | } else if (ch->buffer_next == NULL) { | ||
| 342 | ch->buffer_next = buf; | ||
| 343 | feed_buf(ch, buf); | ||
| 344 | |||
| 345 | v |= M2P_CONTROL_NFB_IRQ_EN; | ||
| 346 | m2p_set_control(ch, v); | ||
| 347 | } else { | ||
| 348 | list_add_tail(&buf->list, &ch->buffers_pending); | ||
| 349 | } | ||
| 350 | spin_unlock_irqrestore(&ch->lock, flags); | ||
| 351 | } | ||
| 352 | EXPORT_SYMBOL_GPL(ep93xx_dma_m2p_submit); | ||
| 353 | |||
| 354 | void ep93xx_dma_m2p_submit_recursive(struct ep93xx_dma_m2p_client *cl, | ||
| 355 | struct ep93xx_dma_buffer *buf) | ||
| 356 | { | ||
| 357 | struct m2p_channel *ch = cl->channel; | ||
| 358 | |||
| 359 | list_add_tail(&buf->list, &ch->buffers_pending); | ||
| 360 | } | ||
| 361 | EXPORT_SYMBOL_GPL(ep93xx_dma_m2p_submit_recursive); | ||
| 362 | |||
| 363 | void ep93xx_dma_m2p_flush(struct ep93xx_dma_m2p_client *cl) | ||
| 364 | { | ||
| 365 | struct m2p_channel *ch = cl->channel; | ||
| 366 | |||
| 367 | channel_disable(ch); | ||
| 368 | ch->next_slot = 0; | ||
| 369 | ch->buffer_xfer = NULL; | ||
| 370 | ch->buffer_next = NULL; | ||
| 371 | INIT_LIST_HEAD(&ch->buffers_pending); | ||
| 372 | channel_enable(ch); | ||
| 373 | } | ||
| 374 | EXPORT_SYMBOL_GPL(ep93xx_dma_m2p_flush); | ||
| 375 | |||
| 376 | static int init_channel(struct m2p_channel *ch) | ||
| 377 | { | ||
| 378 | ch->clk = clk_get(NULL, ch->name); | ||
| 379 | if (IS_ERR(ch->clk)) | ||
| 380 | return PTR_ERR(ch->clk); | ||
| 381 | |||
| 382 | spin_lock_init(&ch->lock); | ||
| 383 | ch->client = NULL; | ||
| 384 | |||
| 385 | return 0; | ||
| 386 | } | ||
| 387 | |||
| 388 | static int __init ep93xx_dma_m2p_init(void) | ||
| 389 | { | ||
| 390 | int i; | ||
| 391 | int ret; | ||
| 392 | |||
| 393 | for (i = 0; m2p_rx[i].base; i++) { | ||
| 394 | ret = init_channel(m2p_rx + i); | ||
| 395 | if (ret) | ||
| 396 | return ret; | ||
| 397 | } | ||
| 398 | |||
| 399 | for (i = 0; m2p_tx[i].base; i++) { | ||
| 400 | ret = init_channel(m2p_tx + i); | ||
| 401 | if (ret) | ||
| 402 | return ret; | ||
| 403 | } | ||
| 404 | |||
| 405 | pr_info("M2P DMA subsystem initialized\n"); | ||
| 406 | return 0; | ||
| 407 | } | ||
| 408 | arch_initcall(ep93xx_dma_m2p_init); | ||
diff --git a/arch/arm/mach-ep93xx/edb9307a.c b/arch/arm/mach-ep93xx/edb9307a.c index 5b5c22b681be..6171167d3315 100644 --- a/arch/arm/mach-ep93xx/edb9307a.c +++ b/arch/arm/mach-ep93xx/edb9307a.c | |||
| @@ -48,12 +48,24 @@ static struct ep93xx_eth_data edb9307a_eth_data = { | |||
| 48 | .phy_id = 1, | 48 | .phy_id = 1, |
| 49 | }; | 49 | }; |
| 50 | 50 | ||
| 51 | static struct i2c_board_info __initdata edb9307a_i2c_data[] = { | ||
| 52 | { | ||
| 53 | /* On-board battery backed RTC */ | ||
| 54 | I2C_BOARD_INFO("isl1208", 0x6f), | ||
| 55 | }, | ||
| 56 | /* | ||
| 57 | * The I2C signals are also routed to the Expansion Connector (J4) | ||
| 58 | */ | ||
| 59 | }; | ||
| 60 | |||
| 51 | static void __init edb9307a_init_machine(void) | 61 | static void __init edb9307a_init_machine(void) |
| 52 | { | 62 | { |
| 53 | ep93xx_init_devices(); | 63 | ep93xx_init_devices(); |
| 54 | platform_device_register(&edb9307a_flash); | 64 | platform_device_register(&edb9307a_flash); |
| 55 | 65 | ||
| 56 | ep93xx_register_eth(&edb9307a_eth_data, 1); | 66 | ep93xx_register_eth(&edb9307a_eth_data, 1); |
| 67 | |||
| 68 | ep93xx_init_i2c(edb9307a_i2c_data, ARRAY_SIZE(edb9307a_i2c_data)); | ||
| 57 | } | 69 | } |
| 58 | 70 | ||
| 59 | MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board") | 71 | MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board") |
diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h new file mode 100644 index 000000000000..ef6bd9d13148 --- /dev/null +++ b/arch/arm/mach-ep93xx/include/mach/dma.h | |||
| @@ -0,0 +1,52 @@ | |||
| 1 | #ifndef __ASM_ARCH_DMA_H | ||
| 2 | #define __ASM_ARCH_DMA_H | ||
| 3 | |||
| 4 | #include <linux/list.h> | ||
| 5 | #include <linux/types.h> | ||
| 6 | |||
| 7 | struct ep93xx_dma_buffer { | ||
| 8 | struct list_head list; | ||
| 9 | u32 bus_addr; | ||
| 10 | u16 size; | ||
| 11 | }; | ||
| 12 | |||
| 13 | struct ep93xx_dma_m2p_client { | ||
| 14 | char *name; | ||
| 15 | u8 flags; | ||
| 16 | void *cookie; | ||
| 17 | void (*buffer_started)(void *cookie, | ||
| 18 | struct ep93xx_dma_buffer *buf); | ||
| 19 | void (*buffer_finished)(void *cookie, | ||
| 20 | struct ep93xx_dma_buffer *buf, | ||
| 21 | int bytes, int error); | ||
| 22 | |||
| 23 | /* Internal to the DMA code. */ | ||
| 24 | void *channel; | ||
| 25 | }; | ||
| 26 | |||
| 27 | #define EP93XX_DMA_M2P_PORT_I2S1 0x00 | ||
| 28 | #define EP93XX_DMA_M2P_PORT_I2S2 0x01 | ||
| 29 | #define EP93XX_DMA_M2P_PORT_AAC1 0x02 | ||
| 30 | #define EP93XX_DMA_M2P_PORT_AAC2 0x03 | ||
| 31 | #define EP93XX_DMA_M2P_PORT_AAC3 0x04 | ||
| 32 | #define EP93XX_DMA_M2P_PORT_I2S3 0x05 | ||
| 33 | #define EP93XX_DMA_M2P_PORT_UART1 0x06 | ||
| 34 | #define EP93XX_DMA_M2P_PORT_UART2 0x07 | ||
| 35 | #define EP93XX_DMA_M2P_PORT_UART3 0x08 | ||
| 36 | #define EP93XX_DMA_M2P_PORT_IRDA 0x09 | ||
| 37 | #define EP93XX_DMA_M2P_PORT_MASK 0x0f | ||
| 38 | #define EP93XX_DMA_M2P_TX 0x00 | ||
| 39 | #define EP93XX_DMA_M2P_RX 0x10 | ||
| 40 | #define EP93XX_DMA_M2P_ABORT_ON_ERROR 0x20 | ||
| 41 | #define EP93XX_DMA_M2P_IGNORE_ERROR 0x40 | ||
| 42 | #define EP93XX_DMA_M2P_ERROR_MASK 0x60 | ||
| 43 | |||
| 44 | int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *m2p); | ||
| 45 | void ep93xx_dma_m2p_client_unregister(struct ep93xx_dma_m2p_client *m2p); | ||
| 46 | void ep93xx_dma_m2p_submit(struct ep93xx_dma_m2p_client *m2p, | ||
| 47 | struct ep93xx_dma_buffer *buf); | ||
| 48 | void ep93xx_dma_m2p_submit_recursive(struct ep93xx_dma_m2p_client *m2p, | ||
| 49 | struct ep93xx_dma_buffer *buf); | ||
| 50 | void ep93xx_dma_m2p_flush(struct ep93xx_dma_m2p_client *m2p); | ||
| 51 | |||
| 52 | #endif /* __ASM_ARCH_DMA_H */ | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index 22d6c9a6e4ca..f66be12b856e 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | |||
| @@ -58,7 +58,8 @@ | |||
| 58 | 58 | ||
| 59 | 59 | ||
| 60 | /* AHB peripherals */ | 60 | /* AHB peripherals */ |
| 61 | #define EP93XX_DMA_BASE (EP93XX_AHB_VIRT_BASE + 0x00000000) | 61 | #define EP93XX_DMA_BASE ((void __iomem *) \ |
| 62 | (EP93XX_AHB_VIRT_BASE + 0x00000000)) | ||
| 62 | 63 | ||
| 63 | #define EP93XX_ETHERNET_BASE (EP93XX_AHB_VIRT_BASE + 0x00010000) | 64 | #define EP93XX_ETHERNET_BASE (EP93XX_AHB_VIRT_BASE + 0x00010000) |
| 64 | #define EP93XX_ETHERNET_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00010000) | 65 | #define EP93XX_ETHERNET_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00010000) |
diff --git a/arch/arm/mach-ep93xx/include/mach/gesbc9312.h b/arch/arm/mach-ep93xx/include/mach/gesbc9312.h deleted file mode 100644 index 21fe2b922aa5..000000000000 --- a/arch/arm/mach-ep93xx/include/mach/gesbc9312.h +++ /dev/null | |||
| @@ -1,3 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-ep93xx/include/mach/gesbc9312.h | ||
| 3 | */ | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/hardware.h b/arch/arm/mach-ep93xx/include/mach/hardware.h index 529807d182bf..2866297310b7 100644 --- a/arch/arm/mach-ep93xx/include/mach/hardware.h +++ b/arch/arm/mach-ep93xx/include/mach/hardware.h | |||
| @@ -10,7 +10,6 @@ | |||
| 10 | 10 | ||
| 11 | #include "platform.h" | 11 | #include "platform.h" |
| 12 | 12 | ||
| 13 | #include "gesbc9312.h" | ||
| 14 | #include "ts72xx.h" | 13 | #include "ts72xx.h" |
| 15 | 14 | ||
| 16 | #endif | 15 | #endif |
diff --git a/arch/arm/mach-footbridge/dma.c b/arch/arm/mach-footbridge/dma.c index 4f3506346969..e2e0df8bcee2 100644 --- a/arch/arm/mach-footbridge/dma.c +++ b/arch/arm/mach-footbridge/dma.c | |||
| @@ -21,16 +21,16 @@ | |||
| 21 | #include <asm/hardware/dec21285.h> | 21 | #include <asm/hardware/dec21285.h> |
| 22 | 22 | ||
| 23 | #if 0 | 23 | #if 0 |
| 24 | static int fb_dma_request(dmach_t channel, dma_t *dma) | 24 | static int fb_dma_request(unsigned int chan, dma_t *dma) |
| 25 | { | 25 | { |
| 26 | return -EINVAL; | 26 | return -EINVAL; |
| 27 | } | 27 | } |
| 28 | 28 | ||
| 29 | static void fb_dma_enable(dmach_t channel, dma_t *dma) | 29 | static void fb_dma_enable(unsigned int chan, dma_t *dma) |
| 30 | { | 30 | { |
| 31 | } | 31 | } |
| 32 | 32 | ||
| 33 | static void fb_dma_disable(dmach_t channel, dma_t *dma) | 33 | static void fb_dma_disable(unsigned int chan, dma_t *dma) |
| 34 | { | 34 | { |
| 35 | } | 35 | } |
| 36 | 36 | ||
| @@ -42,7 +42,7 @@ static struct dma_ops fb_dma_ops = { | |||
| 42 | }; | 42 | }; |
| 43 | #endif | 43 | #endif |
| 44 | 44 | ||
| 45 | void __init arch_dma_init(dma_t *dma) | 45 | static int __init fb_dma_init(void) |
| 46 | { | 46 | { |
| 47 | #if 0 | 47 | #if 0 |
| 48 | dma[_DC21285_DMA(0)].d_ops = &fb_dma_ops; | 48 | dma[_DC21285_DMA(0)].d_ops = &fb_dma_ops; |
| @@ -50,6 +50,8 @@ void __init arch_dma_init(dma_t *dma) | |||
| 50 | #endif | 50 | #endif |
| 51 | #ifdef CONFIG_ISA_DMA | 51 | #ifdef CONFIG_ISA_DMA |
| 52 | if (footbridge_cfn_mode()) | 52 | if (footbridge_cfn_mode()) |
| 53 | isa_init_dma(dma + _ISA_DMA(0)); | 53 | isa_init_dma(); |
| 54 | #endif | 54 | #endif |
| 55 | return 0; | ||
| 55 | } | 56 | } |
| 57 | core_initcall(fb_dma_init); | ||
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c index efb86b700276..06083b23bb44 100644 --- a/arch/arm/mach-kirkwood/irq.c +++ b/arch/arm/mach-kirkwood/irq.c | |||
| @@ -42,7 +42,7 @@ void __init kirkwood_init_irq(void) | |||
| 42 | writel(0, GPIO_EDGE_CAUSE(32)); | 42 | writel(0, GPIO_EDGE_CAUSE(32)); |
| 43 | 43 | ||
| 44 | for (i = IRQ_KIRKWOOD_GPIO_START; i < NR_IRQS; i++) { | 44 | for (i = IRQ_KIRKWOOD_GPIO_START; i < NR_IRQS; i++) { |
| 45 | set_irq_chip(i, &orion_gpio_irq_level_chip); | 45 | set_irq_chip(i, &orion_gpio_irq_chip); |
| 46 | set_irq_handler(i, handle_level_irq); | 46 | set_irq_handler(i, handle_level_irq); |
| 47 | irq_desc[i].status |= IRQ_LEVEL; | 47 | irq_desc[i].status |= IRQ_LEVEL; |
| 48 | set_irq_flags(i, IRQF_VALID); | 48 | set_irq_flags(i, IRQF_VALID); |
diff --git a/arch/arm/mach-ks8695/Kconfig b/arch/arm/mach-ks8695/Kconfig index 2754daabda55..fe0c82e30b2d 100644 --- a/arch/arm/mach-ks8695/Kconfig +++ b/arch/arm/mach-ks8695/Kconfig | |||
| @@ -14,6 +14,12 @@ config MACH_DSM320 | |||
| 14 | Say 'Y' here if you want your kernel to run on the D-Link | 14 | Say 'Y' here if you want your kernel to run on the D-Link |
| 15 | DSM-320 Wireless Media Player. | 15 | DSM-320 Wireless Media Player. |
| 16 | 16 | ||
| 17 | config MACH_ACS5K | ||
| 18 | bool "Brivo Systems LLC, ACS-5000 Master board" | ||
| 19 | help | ||
| 20 | say 'Y' here if you want your kernel to run on the Brivo | ||
| 21 | Systems LLC, ACS-5000 Master board. | ||
| 22 | |||
| 17 | endmenu | 23 | endmenu |
| 18 | 24 | ||
| 19 | endif | 25 | endif |
diff --git a/arch/arm/mach-ks8695/Makefile b/arch/arm/mach-ks8695/Makefile index f735d2cc0294..7e3e8160ed30 100644 --- a/arch/arm/mach-ks8695/Makefile +++ b/arch/arm/mach-ks8695/Makefile | |||
| @@ -17,3 +17,4 @@ obj-$(CONFIG_LEDS) += leds.o | |||
| 17 | # Board-specific support | 17 | # Board-specific support |
| 18 | obj-$(CONFIG_MACH_KS8695) += board-micrel.o | 18 | obj-$(CONFIG_MACH_KS8695) += board-micrel.o |
| 19 | obj-$(CONFIG_MACH_DSM320) += board-dsm320.o | 19 | obj-$(CONFIG_MACH_DSM320) += board-dsm320.o |
| 20 | obj-$(CONFIG_MACH_ACS5K) += board-acs5k.o | ||
diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c new file mode 100644 index 000000000000..9e3e5a640ad2 --- /dev/null +++ b/arch/arm/mach-ks8695/board-acs5k.c | |||
| @@ -0,0 +1,233 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-ks8695/board-acs5k.c | ||
| 3 | * | ||
| 4 | * Brivo Systems LLC, ACS-5000 Master Board | ||
| 5 | * | ||
| 6 | * Copyright 2008 Simtec Electronics | ||
| 7 | * Daniel Silverstone <dsilvers@simtec.co.uk> | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/types.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/init.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | |||
| 20 | #include <linux/i2c.h> | ||
| 21 | #include <linux/i2c-algo-bit.h> | ||
| 22 | #include <linux/i2c-gpio.h> | ||
| 23 | #include <linux/i2c/pca953x.h> | ||
| 24 | |||
| 25 | #include <linux/mtd/mtd.h> | ||
| 26 | #include <linux/mtd/map.h> | ||
| 27 | #include <linux/mtd/physmap.h> | ||
| 28 | #include <linux/mtd/partitions.h> | ||
| 29 | |||
| 30 | #include <asm/mach-types.h> | ||
| 31 | |||
| 32 | #include <asm/mach/arch.h> | ||
| 33 | #include <asm/mach/map.h> | ||
| 34 | #include <asm/mach/irq.h> | ||
| 35 | |||
| 36 | #include <mach/devices.h> | ||
| 37 | #include <mach/gpio.h> | ||
| 38 | |||
| 39 | #include "generic.h" | ||
| 40 | |||
| 41 | static struct i2c_gpio_platform_data acs5k_i2c_device_platdata = { | ||
| 42 | .sda_pin = 4, | ||
| 43 | .scl_pin = 5, | ||
| 44 | .udelay = 10, | ||
| 45 | }; | ||
| 46 | |||
| 47 | static struct platform_device acs5k_i2c_device = { | ||
| 48 | .name = "i2c-gpio", | ||
| 49 | .id = -1, | ||
| 50 | .num_resources = 0, | ||
| 51 | .resource = NULL, | ||
| 52 | .dev = { | ||
| 53 | .platform_data = &acs5k_i2c_device_platdata, | ||
| 54 | }, | ||
| 55 | }; | ||
| 56 | |||
| 57 | static int acs5k_pca9555_setup(struct i2c_client *client, | ||
| 58 | unsigned gpio_base, unsigned ngpio, | ||
| 59 | void *context) | ||
| 60 | { | ||
| 61 | static int acs5k_gpio_value[] = { | ||
| 62 | -1, -1, -1, -1, -1, -1, -1, 0, 1, 1, -1, 0, 1, 0, -1, -1 | ||
| 63 | }; | ||
| 64 | int n; | ||
| 65 | |||
| 66 | for (n = 0; n < ARRAY_SIZE(acs5k_gpio_value); ++n) { | ||
| 67 | gpio_request(gpio_base + n, "ACS-5000 GPIO Expander"); | ||
| 68 | if (acs5k_gpio_value[n] < 0) | ||
| 69 | gpio_direction_input(gpio_base + n); | ||
| 70 | else | ||
| 71 | gpio_direction_output(gpio_base + n, | ||
| 72 | acs5k_gpio_value[n]); | ||
| 73 | gpio_export(gpio_base + n, 0); /* Export, direction locked down */ | ||
| 74 | } | ||
| 75 | |||
| 76 | return 0; | ||
| 77 | } | ||
| 78 | |||
| 79 | static struct pca953x_platform_data acs5k_i2c_pca9555_platdata = { | ||
| 80 | .gpio_base = 16, /* Start directly after the CPU's GPIO */ | ||
| 81 | .invert = 0, /* Do not invert */ | ||
| 82 | .setup = acs5k_pca9555_setup, | ||
| 83 | }; | ||
| 84 | |||
| 85 | static struct i2c_board_info acs5k_i2c_devs[] __initdata = { | ||
| 86 | { | ||
| 87 | I2C_BOARD_INFO("pcf8563", 0x51), | ||
| 88 | }, | ||
| 89 | { | ||
| 90 | I2C_BOARD_INFO("pca9555", 0x20), | ||
| 91 | .platform_data = &acs5k_i2c_pca9555_platdata, | ||
| 92 | }, | ||
| 93 | }; | ||
| 94 | |||
| 95 | static void __devinit acs5k_i2c_init(void) | ||
| 96 | { | ||
| 97 | /* The gpio interface */ | ||
| 98 | platform_device_register(&acs5k_i2c_device); | ||
| 99 | /* I2C devices */ | ||
| 100 | i2c_register_board_info(0, acs5k_i2c_devs, | ||
| 101 | ARRAY_SIZE(acs5k_i2c_devs)); | ||
| 102 | } | ||
| 103 | |||
| 104 | static struct mtd_partition acs5k_nor_partitions[] = { | ||
| 105 | [0] = { | ||
| 106 | .name = "Boot Agent and config", | ||
| 107 | .size = SZ_256K, | ||
| 108 | .offset = 0, | ||
| 109 | .mask_flags = MTD_WRITEABLE, | ||
| 110 | }, | ||
| 111 | [1] = { | ||
| 112 | .name = "Kernel", | ||
| 113 | .size = SZ_1M, | ||
| 114 | .offset = SZ_256K, | ||
| 115 | }, | ||
| 116 | [2] = { | ||
| 117 | .name = "SquashFS1", | ||
| 118 | .size = SZ_2M, | ||
| 119 | .offset = SZ_256K + SZ_1M, | ||
| 120 | }, | ||
| 121 | [3] = { | ||
| 122 | .name = "SquashFS2", | ||
| 123 | .size = SZ_4M + SZ_2M, | ||
| 124 | .offset = SZ_256K + SZ_1M + SZ_2M, | ||
| 125 | }, | ||
| 126 | [4] = { | ||
| 127 | .name = "Data", | ||
| 128 | .size = SZ_16M + SZ_4M + SZ_2M + SZ_512K, /* 22.5 MB */ | ||
| 129 | .offset = SZ_256K + SZ_8M + SZ_1M, | ||
| 130 | } | ||
| 131 | }; | ||
| 132 | |||
| 133 | static struct physmap_flash_data acs5k_nor_pdata = { | ||
| 134 | .width = 4, | ||
| 135 | .nr_parts = ARRAY_SIZE(acs5k_nor_partitions), | ||
| 136 | .parts = acs5k_nor_partitions, | ||
| 137 | }; | ||
| 138 | |||
| 139 | static struct resource acs5k_nor_resource[] = { | ||
| 140 | [0] = { | ||
| 141 | .start = SZ_32M, /* We expect the bootloader to map | ||
| 142 | * the flash here. | ||
| 143 | */ | ||
| 144 | .end = SZ_32M + SZ_16M - 1, | ||
| 145 | .flags = IORESOURCE_MEM, | ||
| 146 | }, | ||
| 147 | [1] = { | ||
| 148 | .start = SZ_32M + SZ_16M, | ||
| 149 | .end = SZ_32M + SZ_32M - SZ_256K - 1, | ||
| 150 | .flags = IORESOURCE_MEM, | ||
| 151 | } | ||
| 152 | }; | ||
| 153 | |||
| 154 | static struct platform_device acs5k_device_nor = { | ||
| 155 | .name = "physmap-flash", | ||
| 156 | .id = -1, | ||
| 157 | .num_resources = ARRAY_SIZE(acs5k_nor_resource), | ||
| 158 | .resource = acs5k_nor_resource, | ||
| 159 | .dev = { | ||
| 160 | .platform_data = &acs5k_nor_pdata, | ||
| 161 | }, | ||
| 162 | }; | ||
| 163 | |||
| 164 | static void __init acs5k_register_nor(void) | ||
| 165 | { | ||
| 166 | int ret; | ||
| 167 | |||
| 168 | if (acs5k_nor_partitions[0].mask_flags == 0) | ||
| 169 | printk(KERN_WARNING "Warning: Unprotecting bootloader and configuration partition\n"); | ||
| 170 | |||
| 171 | ret = platform_device_register(&acs5k_device_nor); | ||
| 172 | if (ret < 0) | ||
| 173 | printk(KERN_ERR "failed to register physmap-flash device\n"); | ||
| 174 | } | ||
| 175 | |||
| 176 | static int __init acs5k_protection_setup(char *s) | ||
| 177 | { | ||
| 178 | /* We can't allocate anything here but we should be able | ||
| 179 | * to trivially parse s and decide if we can protect the | ||
| 180 | * bootloader partition or not | ||
| 181 | */ | ||
| 182 | if (strcmp(s, "no") == 0) | ||
| 183 | acs5k_nor_partitions[0].mask_flags = 0; | ||
| 184 | |||
| 185 | return 1; | ||
| 186 | } | ||
| 187 | |||
| 188 | __setup("protect_bootloader=", acs5k_protection_setup); | ||
| 189 | |||
| 190 | static void __init acs5k_init_gpio(void) | ||
| 191 | { | ||
| 192 | int i; | ||
| 193 | |||
| 194 | ks8695_register_gpios(); | ||
| 195 | for (i = 0; i < 4; ++i) | ||
| 196 | gpio_request(i, "ACS5K IRQ"); | ||
| 197 | gpio_request(7, "ACS5K KS_FRDY"); | ||
| 198 | for (i = 8; i < 16; ++i) | ||
| 199 | gpio_request(i, "ACS5K Unused"); | ||
| 200 | |||
| 201 | gpio_request(3, "ACS5K CAN Control"); | ||
| 202 | gpio_request(6, "ACS5K Heartbeat"); | ||
| 203 | gpio_direction_output(3, 1); /* Default CAN_RESET high */ | ||
| 204 | gpio_direction_output(6, 0); /* Default KS8695_ACTIVE low */ | ||
| 205 | gpio_export(3, 0); /* export CAN_RESET as output only */ | ||
| 206 | gpio_export(6, 0); /* export KS8695_ACTIVE as output only */ | ||
| 207 | } | ||
| 208 | |||
| 209 | static void __init acs5k_init(void) | ||
| 210 | { | ||
| 211 | acs5k_init_gpio(); | ||
| 212 | |||
| 213 | /* Network device */ | ||
| 214 | ks8695_add_device_lan(); /* eth0 = LAN */ | ||
| 215 | ks8695_add_device_wan(); /* ethX = WAN */ | ||
| 216 | |||
| 217 | /* NOR devices */ | ||
| 218 | acs5k_register_nor(); | ||
| 219 | |||
| 220 | /* I2C bus */ | ||
| 221 | acs5k_i2c_init(); | ||
| 222 | } | ||
| 223 | |||
| 224 | MACHINE_START(ACS5K, "Brivo Systems LLC ACS-5000 Master board") | ||
| 225 | /* Maintainer: Simtec Electronics. */ | ||
| 226 | .phys_io = KS8695_IO_PA, | ||
| 227 | .io_pg_offst = (KS8695_IO_VA >> 18) & 0xfffc, | ||
| 228 | .boot_params = KS8695_SDRAM_PA + 0x100, | ||
| 229 | .map_io = ks8695_map_io, | ||
| 230 | .init_irq = ks8695_init_irq, | ||
| 231 | .init_machine = acs5k_init, | ||
| 232 | .timer = &ks8695_timer, | ||
| 233 | MACHINE_END | ||
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c index e273418797b4..30b7e4bcdbc7 100644 --- a/arch/arm/mach-mv78xx0/irq.c +++ b/arch/arm/mach-mv78xx0/irq.c | |||
| @@ -40,7 +40,7 @@ void __init mv78xx0_init_irq(void) | |||
| 40 | writel(0, GPIO_EDGE_CAUSE(0)); | 40 | writel(0, GPIO_EDGE_CAUSE(0)); |
| 41 | 41 | ||
| 42 | for (i = IRQ_MV78XX0_GPIO_START; i < NR_IRQS; i++) { | 42 | for (i = IRQ_MV78XX0_GPIO_START; i < NR_IRQS; i++) { |
| 43 | set_irq_chip(i, &orion_gpio_irq_level_chip); | 43 | set_irq_chip(i, &orion_gpio_irq_chip); |
| 44 | set_irq_handler(i, handle_level_irq); | 44 | set_irq_handler(i, handle_level_irq); |
| 45 | irq_desc[i].status |= IRQ_LEVEL; | 45 | irq_desc[i].status |= IRQ_LEVEL; |
| 46 | set_irq_flags(i, IRQF_VALID); | 46 | set_irq_flags(i, IRQF_VALID); |
diff --git a/arch/arm/mach-mx1/Kconfig b/arch/arm/mach-mx1/Kconfig index 2b59fc74784f..eb7660f5d4b7 100644 --- a/arch/arm/mach-mx1/Kconfig +++ b/arch/arm/mach-mx1/Kconfig | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | if ARCH_MX1 | 1 | if ARCH_MX1 |
| 2 | 2 | ||
| 3 | comment "MX1 Platforms" | 3 | comment "MX1 platforms:" |
| 4 | 4 | ||
| 5 | config MACH_MXLADS | 5 | config MACH_MXLADS |
| 6 | bool | 6 | bool |
| @@ -11,4 +11,9 @@ config ARCH_MX1ADS | |||
| 11 | help | 11 | help |
| 12 | Say Y here if you are using Motorola MX1ADS/MXLADS boards | 12 | Say Y here if you are using Motorola MX1ADS/MXLADS boards |
| 13 | 13 | ||
| 14 | config MACH_SCB9328 | ||
| 15 | bool "Synertronixx scb9328" | ||
| 16 | help | ||
| 17 | Say Y here if you are using a Synertronixx scb9328 board | ||
| 18 | |||
| 14 | endif | 19 | endif |
diff --git a/arch/arm/mach-mx1/Makefile b/arch/arm/mach-mx1/Makefile index b969719011fa..82f1309568ef 100644 --- a/arch/arm/mach-mx1/Makefile +++ b/arch/arm/mach-mx1/Makefile | |||
| @@ -8,3 +8,4 @@ obj-y += generic.o clock.o devices.o | |||
| 8 | 8 | ||
| 9 | # Specific board support | 9 | # Specific board support |
| 10 | obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o | 10 | obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o |
| 11 | obj-$(CONFIG_MACH_SCB9328) += scb9328.o \ No newline at end of file | ||
diff --git a/arch/arm/mach-mx1/clock.c b/arch/arm/mach-mx1/clock.c index 4bcd1ece55f5..0d0f306851d0 100644 --- a/arch/arm/mach-mx1/clock.c +++ b/arch/arm/mach-mx1/clock.c | |||
| @@ -25,6 +25,7 @@ | |||
| 25 | 25 | ||
| 26 | #include <mach/clock.h> | 26 | #include <mach/clock.h> |
| 27 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
| 28 | #include <mach/common.h> | ||
| 28 | #include "crm_regs.h" | 29 | #include "crm_regs.h" |
| 29 | 30 | ||
| 30 | static int _clk_enable(struct clk *clk) | 31 | static int _clk_enable(struct clk *clk) |
| @@ -87,33 +88,6 @@ static int _clk_parent_set_rate(struct clk *clk, unsigned long rate) | |||
| 87 | return clk->parent->set_rate(clk->parent, rate); | 88 | return clk->parent->set_rate(clk->parent, rate); |
| 88 | } | 89 | } |
| 89 | 90 | ||
| 90 | /* | ||
| 91 | * get the system pll clock in Hz | ||
| 92 | * | ||
| 93 | * mfi + mfn / (mfd +1) | ||
| 94 | * f = 2 * f_ref * -------------------- | ||
| 95 | * pd + 1 | ||
| 96 | */ | ||
| 97 | static unsigned long mx1_decode_pll(unsigned int pll, u32 f_ref) | ||
| 98 | { | ||
| 99 | unsigned long long ll; | ||
| 100 | unsigned long quot; | ||
| 101 | |||
| 102 | u32 mfi = (pll >> 10) & 0xf; | ||
| 103 | u32 mfn = pll & 0x3ff; | ||
| 104 | u32 mfd = (pll >> 16) & 0x3ff; | ||
| 105 | u32 pd = (pll >> 26) & 0xf; | ||
| 106 | |||
| 107 | mfi = mfi <= 5 ? 5 : mfi; | ||
| 108 | |||
| 109 | ll = 2 * (unsigned long long)f_ref * | ||
| 110 | ((mfi << 16) + (mfn << 16) / (mfd + 1)); | ||
| 111 | quot = (pd + 1) * (1 << 16); | ||
| 112 | ll += quot / 2; | ||
| 113 | do_div(ll, quot); | ||
| 114 | return (unsigned long)ll; | ||
| 115 | } | ||
| 116 | |||
| 117 | static unsigned long clk16m_get_rate(struct clk *clk) | 91 | static unsigned long clk16m_get_rate(struct clk *clk) |
| 118 | { | 92 | { |
| 119 | return 16000000; | 93 | return 16000000; |
| @@ -188,7 +162,7 @@ static struct clk prem_clk = { | |||
| 188 | 162 | ||
| 189 | static unsigned long system_clk_get_rate(struct clk *clk) | 163 | static unsigned long system_clk_get_rate(struct clk *clk) |
| 190 | { | 164 | { |
| 191 | return mx1_decode_pll(__raw_readl(CCM_SPCTL0), | 165 | return mxc_decode_pll(__raw_readl(CCM_SPCTL0), |
| 192 | clk_get_rate(clk->parent)); | 166 | clk_get_rate(clk->parent)); |
| 193 | } | 167 | } |
| 194 | 168 | ||
| @@ -200,7 +174,7 @@ static struct clk system_clk = { | |||
| 200 | 174 | ||
| 201 | static unsigned long mcu_clk_get_rate(struct clk *clk) | 175 | static unsigned long mcu_clk_get_rate(struct clk *clk) |
| 202 | { | 176 | { |
| 203 | return mx1_decode_pll(__raw_readl(CCM_MPCTL0), | 177 | return mxc_decode_pll(__raw_readl(CCM_MPCTL0), |
| 204 | clk_get_rate(clk->parent)); | 178 | clk_get_rate(clk->parent)); |
| 205 | } | 179 | } |
| 206 | 180 | ||
| @@ -488,7 +462,7 @@ static struct clk clko_clk = { | |||
| 488 | }; | 462 | }; |
| 489 | 463 | ||
| 490 | static struct clk dma_clk = { | 464 | static struct clk dma_clk = { |
| 491 | .name = "dma_clk", | 465 | .name = "dma", |
| 492 | .parent = &hclk, | 466 | .parent = &hclk, |
| 493 | .round_rate = _clk_parent_round_rate, | 467 | .round_rate = _clk_parent_round_rate, |
| 494 | .set_rate = _clk_parent_set_rate, | 468 | .set_rate = _clk_parent_set_rate, |
| @@ -539,7 +513,7 @@ static struct clk gpt_clk = { | |||
| 539 | }; | 513 | }; |
| 540 | 514 | ||
| 541 | static struct clk uart_clk = { | 515 | static struct clk uart_clk = { |
| 542 | .name = "uart_clk", | 516 | .name = "uart", |
| 543 | .parent = &perclk[0], | 517 | .parent = &perclk[0], |
| 544 | .round_rate = _clk_parent_round_rate, | 518 | .round_rate = _clk_parent_round_rate, |
| 545 | .set_rate = _clk_parent_set_rate, | 519 | .set_rate = _clk_parent_set_rate, |
| @@ -621,7 +595,7 @@ static struct clk *mxc_clks[] = { | |||
| 621 | &rtc_clk, | 595 | &rtc_clk, |
| 622 | }; | 596 | }; |
| 623 | 597 | ||
| 624 | int __init mxc_clocks_init(unsigned long fref) | 598 | int __init mx1_clocks_init(unsigned long fref) |
| 625 | { | 599 | { |
| 626 | struct clk **clkp; | 600 | struct clk **clkp; |
| 627 | unsigned int reg; | 601 | unsigned int reg; |
| @@ -652,5 +626,7 @@ int __init mxc_clocks_init(unsigned long fref) | |||
| 652 | clk_enable(&hclk); | 626 | clk_enable(&hclk); |
| 653 | clk_enable(&fclk); | 627 | clk_enable(&fclk); |
| 654 | 628 | ||
| 629 | mxc_timer_init(&gpt_clk); | ||
| 630 | |||
| 655 | return 0; | 631 | return 0; |
| 656 | } | 632 | } |
diff --git a/arch/arm/mach-mx1/devices.c b/arch/arm/mach-mx1/devices.c index 686d8d2dbb24..97f42d96d7a1 100644 --- a/arch/arm/mach-mx1/devices.c +++ b/arch/arm/mach-mx1/devices.c | |||
| @@ -23,8 +23,11 @@ | |||
| 23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
| 24 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
| 25 | #include <linux/gpio.h> | 25 | #include <linux/gpio.h> |
| 26 | #include <mach/irqs.h> | ||
| 26 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
| 27 | 28 | ||
| 29 | #include "devices.h" | ||
| 30 | |||
| 28 | static struct resource imx_csi_resources[] = { | 31 | static struct resource imx_csi_resources[] = { |
| 29 | [0] = { | 32 | [0] = { |
| 30 | .start = 0x00224000, | 33 | .start = 0x00224000, |
diff --git a/arch/arm/mach-mx1/mx1ads.c b/arch/arm/mach-mx1/mx1ads.c index 2e4b185fe4a9..89738fe576b1 100644 --- a/arch/arm/mach-mx1/mx1ads.c +++ b/arch/arm/mach-mx1/mx1ads.c | |||
| @@ -16,6 +16,8 @@ | |||
| 16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
| 17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
| 18 | #include <linux/mtd/physmap.h> | 18 | #include <linux/mtd/physmap.h> |
| 19 | #include <linux/i2c.h> | ||
| 20 | #include <linux/i2c/pcf857x.h> | ||
| 19 | 21 | ||
| 20 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
| 21 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
| @@ -24,7 +26,11 @@ | |||
| 24 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
| 25 | #include <mach/common.h> | 27 | #include <mach/common.h> |
| 26 | #include <mach/imx-uart.h> | 28 | #include <mach/imx-uart.h> |
| 27 | #include <mach/iomux-mx1-mx2.h> | 29 | #include <mach/irqs.h> |
| 30 | #ifdef CONFIG_I2C_IMX | ||
| 31 | #include <mach/i2c.h> | ||
| 32 | #endif | ||
| 33 | #include <mach/iomux.h> | ||
| 28 | #include "devices.h" | 34 | #include "devices.h" |
| 29 | 35 | ||
| 30 | /* | 36 | /* |
| @@ -104,6 +110,55 @@ static struct platform_device flash_device = { | |||
| 104 | }; | 110 | }; |
| 105 | 111 | ||
| 106 | /* | 112 | /* |
| 113 | * I2C | ||
| 114 | */ | ||
| 115 | |||
| 116 | #ifdef CONFIG_I2C_IMX | ||
| 117 | static int i2c_pins[] = { | ||
| 118 | PA15_PF_I2C_SDA, | ||
| 119 | PA16_PF_I2C_SCL, | ||
| 120 | }; | ||
| 121 | |||
| 122 | static int i2c_init(struct device *dev) | ||
| 123 | { | ||
| 124 | return mxc_gpio_setup_multiple_pins(i2c_pins, | ||
| 125 | ARRAY_SIZE(i2c_pins), "I2C"); | ||
| 126 | } | ||
| 127 | |||
| 128 | static void i2c_exit(struct device *dev) | ||
| 129 | { | ||
| 130 | mxc_gpio_release_multiple_pins(i2c_pins, | ||
| 131 | ARRAY_SIZE(i2c_pins)); | ||
| 132 | } | ||
| 133 | |||
| 134 | static struct pcf857x_platform_data pcf857x_data[] = { | ||
| 135 | { | ||
| 136 | .gpio_base = 4 * 32, | ||
| 137 | }, { | ||
| 138 | .gpio_base = 4 * 32 + 16, | ||
| 139 | } | ||
| 140 | }; | ||
| 141 | |||
| 142 | static struct imxi2c_platform_data mx1ads_i2c_data = { | ||
| 143 | .bitrate = 100000, | ||
| 144 | .init = i2c_init, | ||
| 145 | .exit = i2c_exit, | ||
| 146 | }; | ||
| 147 | |||
| 148 | static struct i2c_board_info mx1ads_i2c_devices[] = { | ||
| 149 | { | ||
| 150 | I2C_BOARD_INFO("pcf857x", 0x22), | ||
| 151 | .type = "pcf8575", | ||
| 152 | .platform_data = &pcf857x_data[0], | ||
| 153 | }, { | ||
| 154 | I2C_BOARD_INFO("pcf857x", 0x24), | ||
| 155 | .type = "pcf8575", | ||
| 156 | .platform_data = &pcf857x_data[1], | ||
| 157 | }, | ||
| 158 | }; | ||
| 159 | #endif | ||
| 160 | |||
| 161 | /* | ||
| 107 | * Board init | 162 | * Board init |
| 108 | */ | 163 | */ |
| 109 | static void __init mx1ads_init(void) | 164 | static void __init mx1ads_init(void) |
| @@ -114,12 +169,19 @@ static void __init mx1ads_init(void) | |||
| 114 | 169 | ||
| 115 | /* Physmap flash */ | 170 | /* Physmap flash */ |
| 116 | mxc_register_device(&flash_device, &mx1ads_flash_data); | 171 | mxc_register_device(&flash_device, &mx1ads_flash_data); |
| 172 | |||
| 173 | /* I2C */ | ||
| 174 | #ifdef CONFIG_I2C_IMX | ||
| 175 | i2c_register_board_info(0, mx1ads_i2c_devices, | ||
| 176 | ARRAY_SIZE(mx1ads_i2c_devices)); | ||
| 177 | |||
| 178 | mxc_register_device(&imx_i2c_device, &mx1ads_i2c_data); | ||
| 179 | #endif | ||
| 117 | } | 180 | } |
| 118 | 181 | ||
| 119 | static void __init mx1ads_timer_init(void) | 182 | static void __init mx1ads_timer_init(void) |
| 120 | { | 183 | { |
| 121 | mxc_clocks_init(32000); | 184 | mx1_clocks_init(32000); |
| 122 | mxc_timer_init("gpt_clk"); | ||
| 123 | } | 185 | } |
| 124 | 186 | ||
| 125 | struct sys_timer mx1ads_timer = { | 187 | struct sys_timer mx1ads_timer = { |
diff --git a/arch/arm/mach-mx1/scb9328.c b/arch/arm/mach-mx1/scb9328.c new file mode 100644 index 000000000000..0e71f3fa28bf --- /dev/null +++ b/arch/arm/mach-mx1/scb9328.c | |||
| @@ -0,0 +1,160 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-mx1/scb9328.c | ||
| 3 | * | ||
| 4 | * Copyright (c) 2004 Sascha Hauer <saschahauer@web.de> | ||
| 5 | * Copyright (c) 2006-2008 Juergen Beisert <jbeisert@netscape.net> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/platform_device.h> | ||
| 14 | #include <linux/mtd/physmap.h> | ||
| 15 | #include <linux/interrupt.h> | ||
| 16 | #include <linux/dm9000.h> | ||
| 17 | |||
| 18 | #include <asm/mach-types.h> | ||
| 19 | #include <asm/mach/arch.h> | ||
| 20 | #include <asm/mach/time.h> | ||
| 21 | |||
| 22 | #include <mach/common.h> | ||
| 23 | #include <mach/hardware.h> | ||
| 24 | #include <mach/irqs.h> | ||
| 25 | #include <mach/imx-uart.h> | ||
| 26 | #include <mach/iomux.h> | ||
| 27 | |||
| 28 | #include "devices.h" | ||
| 29 | |||
| 30 | /* | ||
| 31 | * This scb9328 has a 32MiB flash | ||
| 32 | */ | ||
| 33 | static struct resource flash_resource = { | ||
| 34 | .start = IMX_CS0_PHYS, | ||
| 35 | .end = IMX_CS0_PHYS + (32 * 1024 * 1024) - 1, | ||
| 36 | .flags = IORESOURCE_MEM, | ||
| 37 | }; | ||
| 38 | |||
| 39 | static struct physmap_flash_data scb_flash_data = { | ||
| 40 | .width = 2, | ||
| 41 | }; | ||
| 42 | |||
| 43 | static struct platform_device scb_flash_device = { | ||
| 44 | .name = "physmap-flash", | ||
| 45 | .id = 0, | ||
| 46 | .dev = { | ||
| 47 | .platform_data = &scb_flash_data, | ||
| 48 | }, | ||
| 49 | .resource = &flash_resource, | ||
| 50 | .num_resources = 1, | ||
| 51 | }; | ||
| 52 | |||
| 53 | /* | ||
| 54 | * scb9328 has a DM9000 network controller | ||
| 55 | * connected to CS5, with 16 bit data path | ||
| 56 | * and interrupt connected to GPIO 3 | ||
| 57 | */ | ||
| 58 | |||
| 59 | /* | ||
| 60 | * internal datapath is fixed 16 bit | ||
| 61 | */ | ||
| 62 | static struct dm9000_plat_data dm9000_platdata = { | ||
| 63 | .flags = DM9000_PLATF_16BITONLY, | ||
| 64 | }; | ||
| 65 | |||
| 66 | /* | ||
| 67 | * the DM9000 drivers wants two defined address spaces | ||
| 68 | * to gain access to address latch registers and the data path. | ||
| 69 | */ | ||
| 70 | static struct resource dm9000x_resources[] = { | ||
| 71 | [0] = { | ||
| 72 | .name = "address area", | ||
| 73 | .start = IMX_CS5_PHYS, | ||
| 74 | .end = IMX_CS5_PHYS + 1, | ||
| 75 | .flags = IORESOURCE_MEM /* address access */ | ||
| 76 | }, | ||
| 77 | [1] = { | ||
| 78 | .name = "data area", | ||
| 79 | .start = IMX_CS5_PHYS + 4, | ||
| 80 | .end = IMX_CS5_PHYS + 5, | ||
| 81 | .flags = IORESOURCE_MEM /* data access */ | ||
| 82 | }, | ||
| 83 | [2] = { | ||
| 84 | .start = IRQ_GPIOC(3), | ||
| 85 | .end = IRQ_GPIOC(3), | ||
| 86 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL | ||
| 87 | }, | ||
| 88 | }; | ||
| 89 | |||
| 90 | static struct platform_device dm9000x_device = { | ||
| 91 | .name = "dm9000", | ||
| 92 | .id = 0, | ||
| 93 | .num_resources = ARRAY_SIZE(dm9000x_resources), | ||
| 94 | .resource = dm9000x_resources, | ||
| 95 | .dev = { | ||
| 96 | .platform_data = &dm9000_platdata, | ||
| 97 | } | ||
| 98 | }; | ||
| 99 | |||
| 100 | static int mxc_uart1_pins[] = { | ||
| 101 | PC9_PF_UART1_CTS, | ||
| 102 | PC10_PF_UART1_RTS, | ||
| 103 | PC11_PF_UART1_TXD, | ||
| 104 | PC12_PF_UART1_RXD, | ||
| 105 | }; | ||
| 106 | |||
| 107 | static int uart1_mxc_init(struct platform_device *pdev) | ||
| 108 | { | ||
| 109 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | ||
| 110 | ARRAY_SIZE(mxc_uart1_pins), "UART1"); | ||
| 111 | } | ||
| 112 | |||
| 113 | static int uart1_mxc_exit(struct platform_device *pdev) | ||
| 114 | { | ||
| 115 | mxc_gpio_release_multiple_pins(mxc_uart1_pins, | ||
| 116 | ARRAY_SIZE(mxc_uart1_pins)); | ||
| 117 | return 0; | ||
| 118 | } | ||
| 119 | |||
| 120 | static struct imxuart_platform_data uart_pdata = { | ||
| 121 | .init = uart1_mxc_init, | ||
| 122 | .exit = uart1_mxc_exit, | ||
| 123 | .flags = IMXUART_HAVE_RTSCTS, | ||
| 124 | }; | ||
| 125 | |||
| 126 | static struct platform_device *devices[] __initdata = { | ||
| 127 | &scb_flash_device, | ||
| 128 | &dm9000x_device, | ||
| 129 | }; | ||
| 130 | |||
| 131 | /* | ||
| 132 | * scb9328_init - Init the CPU card itself | ||
| 133 | */ | ||
| 134 | static void __init scb9328_init(void) | ||
| 135 | { | ||
| 136 | mxc_register_device(&imx_uart1_device, &uart_pdata); | ||
| 137 | |||
| 138 | printk(KERN_INFO"Scb9328: Adding devices\n"); | ||
| 139 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 140 | } | ||
| 141 | |||
| 142 | static void __init scb9328_timer_init(void) | ||
| 143 | { | ||
| 144 | mx1_clocks_init(32000); | ||
| 145 | } | ||
| 146 | |||
| 147 | static struct sys_timer scb9328_timer = { | ||
| 148 | .init = scb9328_timer_init, | ||
| 149 | }; | ||
| 150 | |||
| 151 | MACHINE_START(SCB9328, "Synertronixx scb9328") | ||
| 152 | /* Sascha Hauer */ | ||
| 153 | .phys_io = 0x00200000, | ||
| 154 | .io_pg_offst = ((0xe0200000) >> 18) & 0xfffc, | ||
| 155 | .boot_params = 0x08000100, | ||
| 156 | .map_io = mxc_map_io, | ||
| 157 | .init_irq = mxc_init_irq, | ||
| 158 | .timer = &scb9328_timer, | ||
| 159 | .init_machine = scb9328_init, | ||
| 160 | MACHINE_END | ||
diff --git a/arch/arm/mach-mx2/Kconfig b/arch/arm/mach-mx2/Kconfig index 1eaa97cb716d..42a788842f49 100644 --- a/arch/arm/mach-mx2/Kconfig +++ b/arch/arm/mach-mx2/Kconfig | |||
| @@ -1,14 +1,22 @@ | |||
| 1 | comment "MX2 family CPU support" | 1 | if ARCH_MX2 |
| 2 | depends on ARCH_MX2 | 2 | |
| 3 | choice | ||
| 4 | prompt "CPUs:" | ||
| 5 | default MACH_MX21 | ||
| 6 | |||
| 7 | config MACH_MX21 | ||
| 8 | bool "i.MX21 support" | ||
| 9 | help | ||
| 10 | This enables support for Freescale's MX2 based i.MX21 processor. | ||
| 3 | 11 | ||
| 4 | config MACH_MX27 | 12 | config MACH_MX27 |
| 5 | bool "i.MX27 support" | 13 | bool "i.MX27 support" |
| 6 | depends on ARCH_MX2 | ||
| 7 | help | 14 | help |
| 8 | This enables support for Freescale's MX2 based i.MX27 processor. | 15 | This enables support for Freescale's MX2 based i.MX27 processor. |
| 9 | 16 | ||
| 10 | comment "MX2 Platforms" | 17 | endchoice |
| 11 | depends on ARCH_MX2 | 18 | |
| 19 | comment "MX2 platforms:" | ||
| 12 | 20 | ||
| 13 | config MACH_MX27ADS | 21 | config MACH_MX27ADS |
| 14 | bool "MX27ADS platform" | 22 | bool "MX27ADS platform" |
| @@ -37,3 +45,5 @@ config MACH_PCM970_BASEBOARD | |||
| 37 | PCM970 evaluation board. | 45 | PCM970 evaluation board. |
| 38 | 46 | ||
| 39 | endchoice | 47 | endchoice |
| 48 | |||
| 49 | endif | ||
diff --git a/arch/arm/mach-mx2/Makefile b/arch/arm/mach-mx2/Makefile index 382d86080e86..6e1a2bffc812 100644 --- a/arch/arm/mach-mx2/Makefile +++ b/arch/arm/mach-mx2/Makefile | |||
| @@ -6,6 +6,8 @@ | |||
| 6 | 6 | ||
| 7 | obj-y := system.o generic.o devices.o serial.o | 7 | obj-y := system.o generic.o devices.o serial.o |
| 8 | 8 | ||
| 9 | obj-$(CONFIG_MACH_MX21) += clock_imx21.o | ||
| 10 | |||
| 9 | obj-$(CONFIG_MACH_MX27) += cpu_imx27.o | 11 | obj-$(CONFIG_MACH_MX27) += cpu_imx27.o |
| 10 | obj-$(CONFIG_MACH_MX27) += clock_imx27.o | 12 | obj-$(CONFIG_MACH_MX27) += clock_imx27.o |
| 11 | 13 | ||
diff --git a/arch/arm/mach-mx2/Makefile.boot b/arch/arm/mach-mx2/Makefile.boot index 696831dcd485..e867398a8fdb 100644 --- a/arch/arm/mach-mx2/Makefile.boot +++ b/arch/arm/mach-mx2/Makefile.boot | |||
| @@ -1,3 +1,7 @@ | |||
| 1 | zreladdr-y := 0xA0008000 | 1 | zreladdr-$(CONFIG_MACH_MX21) := 0xC0008000 |
| 2 | params_phys-y := 0xA0000100 | 2 | params_phys-$(CONFIG_MACH_MX21) := 0xC0000100 |
| 3 | initrd_phys-y := 0xA0800000 | 3 | initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000 |
| 4 | |||
| 5 | zreladdr-$(CONFIG_MACH_MX27) := 0xA0008000 | ||
| 6 | params_phys-$(CONFIG_MACH_MX27) := 0xA0000100 | ||
| 7 | initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 | ||
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c new file mode 100644 index 000000000000..2dee5c87614c --- /dev/null +++ b/arch/arm/mach-mx2/clock_imx21.c | |||
| @@ -0,0 +1,984 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
| 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | ||
| 4 | * Copyright 2008 Martin Fuzzey, mfuzzey@gmail.com | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public License | ||
| 8 | * as published by the Free Software Foundation; either version 2 | ||
| 9 | * of the License, or (at your option) any later version. | ||
| 10 | * This program is distributed in the hope that it will be useful, | ||
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License | ||
| 16 | * along with this program; if not, write to the Free Software | ||
| 17 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
| 18 | * MA 02110-1301, USA. | ||
| 19 | */ | ||
| 20 | |||
| 21 | #include <linux/clk.h> | ||
| 22 | #include <linux/io.h> | ||
| 23 | #include <linux/module.h> | ||
| 24 | |||
| 25 | #include <mach/clock.h> | ||
| 26 | #include <mach/common.h> | ||
| 27 | #include <asm/clkdev.h> | ||
| 28 | #include <asm/div64.h> | ||
| 29 | |||
| 30 | #include "crm_regs.h" | ||
| 31 | |||
| 32 | static int _clk_enable(struct clk *clk) | ||
| 33 | { | ||
| 34 | u32 reg; | ||
| 35 | |||
| 36 | reg = __raw_readl(clk->enable_reg); | ||
| 37 | reg |= 1 << clk->enable_shift; | ||
| 38 | __raw_writel(reg, clk->enable_reg); | ||
| 39 | return 0; | ||
| 40 | } | ||
| 41 | |||
| 42 | static void _clk_disable(struct clk *clk) | ||
| 43 | { | ||
| 44 | u32 reg; | ||
| 45 | |||
| 46 | reg = __raw_readl(clk->enable_reg); | ||
| 47 | reg &= ~(1 << clk->enable_shift); | ||
| 48 | __raw_writel(reg, clk->enable_reg); | ||
| 49 | } | ||
| 50 | |||
| 51 | static int _clk_spll_enable(struct clk *clk) | ||
| 52 | { | ||
| 53 | u32 reg; | ||
| 54 | |||
| 55 | reg = __raw_readl(CCM_CSCR); | ||
| 56 | reg |= CCM_CSCR_SPEN; | ||
| 57 | __raw_writel(reg, CCM_CSCR); | ||
| 58 | |||
| 59 | while ((__raw_readl(CCM_SPCTL1) & CCM_SPCTL1_LF) == 0) | ||
| 60 | ; | ||
| 61 | return 0; | ||
| 62 | } | ||
| 63 | |||
| 64 | static void _clk_spll_disable(struct clk *clk) | ||
| 65 | { | ||
| 66 | u32 reg; | ||
| 67 | |||
| 68 | reg = __raw_readl(CCM_CSCR); | ||
| 69 | reg &= ~CCM_CSCR_SPEN; | ||
| 70 | __raw_writel(reg, CCM_CSCR); | ||
| 71 | } | ||
| 72 | |||
| 73 | |||
| 74 | #define CSCR() (__raw_readl(CCM_CSCR)) | ||
| 75 | #define PCDR0() (__raw_readl(CCM_PCDR0)) | ||
| 76 | #define PCDR1() (__raw_readl(CCM_PCDR1)) | ||
| 77 | |||
| 78 | static unsigned long _clk_perclkx_round_rate(struct clk *clk, | ||
| 79 | unsigned long rate) | ||
| 80 | { | ||
| 81 | u32 div; | ||
| 82 | unsigned long parent_rate; | ||
| 83 | |||
| 84 | parent_rate = clk_get_rate(clk->parent); | ||
| 85 | |||
| 86 | div = parent_rate / rate; | ||
| 87 | if (parent_rate % rate) | ||
| 88 | div++; | ||
| 89 | |||
| 90 | if (div > 64) | ||
| 91 | div = 64; | ||
| 92 | |||
| 93 | return parent_rate / div; | ||
| 94 | } | ||
| 95 | |||
| 96 | static int _clk_perclkx_set_rate(struct clk *clk, unsigned long rate) | ||
| 97 | { | ||
| 98 | u32 reg; | ||
| 99 | u32 div; | ||
| 100 | unsigned long parent_rate; | ||
| 101 | |||
| 102 | parent_rate = clk_get_rate(clk->parent); | ||
| 103 | |||
| 104 | if (clk->id < 0 || clk->id > 3) | ||
| 105 | return -EINVAL; | ||
| 106 | |||
| 107 | div = parent_rate / rate; | ||
| 108 | if (div > 64 || div < 1 || ((parent_rate / div) != rate)) | ||
| 109 | return -EINVAL; | ||
| 110 | div--; | ||
| 111 | |||
| 112 | reg = | ||
| 113 | __raw_readl(CCM_PCDR1) & ~(CCM_PCDR1_PERDIV1_MASK << | ||
| 114 | (clk->id << 3)); | ||
| 115 | reg |= div << (clk->id << 3); | ||
| 116 | __raw_writel(reg, CCM_PCDR1); | ||
| 117 | |||
| 118 | return 0; | ||
| 119 | } | ||
| 120 | |||
| 121 | static unsigned long _clk_usb_recalc(struct clk *clk) | ||
| 122 | { | ||
| 123 | unsigned long usb_pdf; | ||
| 124 | unsigned long parent_rate; | ||
| 125 | |||
| 126 | parent_rate = clk_get_rate(clk->parent); | ||
| 127 | |||
| 128 | usb_pdf = (CSCR() & CCM_CSCR_USB_MASK) >> CCM_CSCR_USB_OFFSET; | ||
| 129 | |||
| 130 | return parent_rate / (usb_pdf + 1U); | ||
| 131 | } | ||
| 132 | |||
| 133 | static unsigned long _clk_ssix_recalc(struct clk *clk, unsigned long pdf) | ||
| 134 | { | ||
| 135 | unsigned long parent_rate; | ||
| 136 | |||
| 137 | parent_rate = clk_get_rate(clk->parent); | ||
| 138 | |||
| 139 | pdf = (pdf < 2) ? 124UL : pdf; /* MX21 & MX27 TO1 */ | ||
| 140 | |||
| 141 | return 2UL * parent_rate / pdf; | ||
| 142 | } | ||
| 143 | |||
| 144 | static unsigned long _clk_ssi1_recalc(struct clk *clk) | ||
| 145 | { | ||
| 146 | return _clk_ssix_recalc(clk, | ||
| 147 | (PCDR0() & CCM_PCDR0_SSI1BAUDDIV_MASK) | ||
| 148 | >> CCM_PCDR0_SSI1BAUDDIV_OFFSET); | ||
| 149 | } | ||
| 150 | |||
| 151 | static unsigned long _clk_ssi2_recalc(struct clk *clk) | ||
| 152 | { | ||
| 153 | return _clk_ssix_recalc(clk, | ||
| 154 | (PCDR0() & CCM_PCDR0_SSI2BAUDDIV_MASK) >> | ||
| 155 | CCM_PCDR0_SSI2BAUDDIV_OFFSET); | ||
| 156 | } | ||
| 157 | |||
| 158 | static unsigned long _clk_nfc_recalc(struct clk *clk) | ||
| 159 | { | ||
| 160 | unsigned long nfc_pdf; | ||
| 161 | unsigned long parent_rate; | ||
| 162 | |||
| 163 | parent_rate = clk_get_rate(clk->parent); | ||
| 164 | |||
| 165 | nfc_pdf = (PCDR0() & CCM_PCDR0_NFCDIV_MASK) | ||
| 166 | >> CCM_PCDR0_NFCDIV_OFFSET; | ||
| 167 | |||
| 168 | return parent_rate / (nfc_pdf + 1); | ||
| 169 | } | ||
| 170 | |||
| 171 | static unsigned long _clk_parent_round_rate(struct clk *clk, unsigned long rate) | ||
| 172 | { | ||
| 173 | return clk->parent->round_rate(clk->parent, rate); | ||
| 174 | } | ||
| 175 | |||
| 176 | static int _clk_parent_set_rate(struct clk *clk, unsigned long rate) | ||
| 177 | { | ||
| 178 | return clk->parent->set_rate(clk->parent, rate); | ||
| 179 | } | ||
| 180 | |||
| 181 | static unsigned long external_high_reference; /* in Hz */ | ||
| 182 | |||
| 183 | static unsigned long get_high_reference_clock_rate(struct clk *clk) | ||
| 184 | { | ||
| 185 | return external_high_reference; | ||
| 186 | } | ||
| 187 | |||
| 188 | /* | ||
| 189 | * the high frequency external clock reference | ||
| 190 | * Default case is 26MHz. | ||
| 191 | */ | ||
| 192 | static struct clk ckih_clk = { | ||
| 193 | .get_rate = get_high_reference_clock_rate, | ||
| 194 | }; | ||
| 195 | |||
| 196 | static unsigned long external_low_reference; /* in Hz */ | ||
| 197 | |||
| 198 | static unsigned long get_low_reference_clock_rate(struct clk *clk) | ||
| 199 | { | ||
| 200 | return external_low_reference; | ||
| 201 | } | ||
| 202 | |||
| 203 | /* | ||
| 204 | * the low frequency external clock reference | ||
| 205 | * Default case is 32.768kHz. | ||
| 206 | */ | ||
| 207 | static struct clk ckil_clk = { | ||
| 208 | .get_rate = get_low_reference_clock_rate, | ||
| 209 | }; | ||
| 210 | |||
| 211 | |||
| 212 | static unsigned long _clk_fpm_recalc(struct clk *clk) | ||
| 213 | { | ||
| 214 | return clk_get_rate(clk->parent) * 512; | ||
| 215 | } | ||
| 216 | |||
| 217 | /* Output of frequency pre multiplier */ | ||
| 218 | static struct clk fpm_clk = { | ||
| 219 | .parent = &ckil_clk, | ||
| 220 | .get_rate = _clk_fpm_recalc, | ||
| 221 | }; | ||
| 222 | |||
| 223 | static unsigned long get_mpll_clk(struct clk *clk) | ||
| 224 | { | ||
| 225 | uint32_t reg; | ||
| 226 | unsigned long ref_clk; | ||
| 227 | unsigned long mfi = 0, mfn = 0, mfd = 0, pdf = 0; | ||
| 228 | unsigned long long temp; | ||
| 229 | |||
| 230 | ref_clk = clk_get_rate(clk->parent); | ||
| 231 | |||
| 232 | reg = __raw_readl(CCM_MPCTL0); | ||
| 233 | pdf = (reg & CCM_MPCTL0_PD_MASK) >> CCM_MPCTL0_PD_OFFSET; | ||
| 234 | mfd = (reg & CCM_MPCTL0_MFD_MASK) >> CCM_MPCTL0_MFD_OFFSET; | ||
| 235 | mfi = (reg & CCM_MPCTL0_MFI_MASK) >> CCM_MPCTL0_MFI_OFFSET; | ||
| 236 | mfn = (reg & CCM_MPCTL0_MFN_MASK) >> CCM_MPCTL0_MFN_OFFSET; | ||
| 237 | |||
| 238 | mfi = (mfi <= 5) ? 5 : mfi; | ||
| 239 | temp = 2LL * ref_clk * mfn; | ||
| 240 | do_div(temp, mfd + 1); | ||
| 241 | temp = 2LL * ref_clk * mfi + temp; | ||
| 242 | do_div(temp, pdf + 1); | ||
| 243 | |||
| 244 | return (unsigned long)temp; | ||
| 245 | } | ||
| 246 | |||
| 247 | static struct clk mpll_clk = { | ||
| 248 | .parent = &ckih_clk, | ||
| 249 | .get_rate = get_mpll_clk, | ||
| 250 | }; | ||
| 251 | |||
| 252 | static unsigned long _clk_fclk_get_rate(struct clk *clk) | ||
| 253 | { | ||
| 254 | unsigned long parent_rate; | ||
| 255 | u32 div; | ||
| 256 | |||
| 257 | div = (CSCR() & CCM_CSCR_PRESC_MASK) >> CCM_CSCR_PRESC_OFFSET; | ||
| 258 | parent_rate = clk_get_rate(clk->parent); | ||
| 259 | |||
| 260 | return parent_rate / (div+1); | ||
| 261 | } | ||
| 262 | |||
| 263 | static struct clk fclk_clk = { | ||
| 264 | .parent = &mpll_clk, | ||
| 265 | .get_rate = _clk_fclk_get_rate | ||
| 266 | }; | ||
| 267 | |||
| 268 | static unsigned long get_spll_clk(struct clk *clk) | ||
| 269 | { | ||
| 270 | uint32_t reg; | ||
| 271 | unsigned long ref_clk; | ||
| 272 | unsigned long mfi = 0, mfn = 0, mfd = 0, pdf = 0; | ||
| 273 | unsigned long long temp; | ||
| 274 | |||
| 275 | ref_clk = clk_get_rate(clk->parent); | ||
| 276 | |||
| 277 | reg = __raw_readl(CCM_SPCTL0); | ||
| 278 | pdf = (reg & CCM_SPCTL0_PD_MASK) >> CCM_SPCTL0_PD_OFFSET; | ||
| 279 | mfd = (reg & CCM_SPCTL0_MFD_MASK) >> CCM_SPCTL0_MFD_OFFSET; | ||
| 280 | mfi = (reg & CCM_SPCTL0_MFI_MASK) >> CCM_SPCTL0_MFI_OFFSET; | ||
| 281 | mfn = (reg & CCM_SPCTL0_MFN_MASK) >> CCM_SPCTL0_MFN_OFFSET; | ||
| 282 | |||
| 283 | mfi = (mfi <= 5) ? 5 : mfi; | ||
| 284 | temp = 2LL * ref_clk * mfn; | ||
| 285 | do_div(temp, mfd + 1); | ||
| 286 | temp = 2LL * ref_clk * mfi + temp; | ||
| 287 | do_div(temp, pdf + 1); | ||
| 288 | |||
| 289 | return (unsigned long)temp; | ||
| 290 | } | ||
| 291 | |||
| 292 | static struct clk spll_clk = { | ||
| 293 | .parent = &ckih_clk, | ||
| 294 | .get_rate = get_spll_clk, | ||
| 295 | .enable = _clk_spll_enable, | ||
| 296 | .disable = _clk_spll_disable, | ||
| 297 | }; | ||
| 298 | |||
| 299 | static unsigned long get_hclk_clk(struct clk *clk) | ||
| 300 | { | ||
| 301 | unsigned long rate; | ||
| 302 | unsigned long bclk_pdf; | ||
| 303 | |||
| 304 | bclk_pdf = (CSCR() & CCM_CSCR_BCLK_MASK) | ||
| 305 | >> CCM_CSCR_BCLK_OFFSET; | ||
| 306 | |||
| 307 | rate = clk_get_rate(clk->parent); | ||
| 308 | return rate / (bclk_pdf + 1); | ||
| 309 | } | ||
| 310 | |||
| 311 | static struct clk hclk_clk = { | ||
| 312 | .parent = &fclk_clk, | ||
| 313 | .get_rate = get_hclk_clk, | ||
| 314 | }; | ||
| 315 | |||
| 316 | static unsigned long get_ipg_clk(struct clk *clk) | ||
| 317 | { | ||
| 318 | unsigned long rate; | ||
| 319 | unsigned long ipg_pdf; | ||
| 320 | |||
| 321 | ipg_pdf = (CSCR() & CCM_CSCR_IPDIV) >> CCM_CSCR_IPDIV_OFFSET; | ||
| 322 | |||
| 323 | rate = clk_get_rate(clk->parent); | ||
| 324 | return rate / (ipg_pdf + 1); | ||
| 325 | } | ||
| 326 | |||
| 327 | static struct clk ipg_clk = { | ||
| 328 | .parent = &hclk_clk, | ||
| 329 | .get_rate = get_ipg_clk, | ||
| 330 | }; | ||
| 331 | |||
| 332 | static unsigned long _clk_perclkx_recalc(struct clk *clk) | ||
| 333 | { | ||
| 334 | unsigned long perclk_pdf; | ||
| 335 | unsigned long parent_rate; | ||
| 336 | |||
| 337 | parent_rate = clk_get_rate(clk->parent); | ||
| 338 | |||
| 339 | if (clk->id < 0 || clk->id > 3) | ||
| 340 | return 0; | ||
| 341 | |||
| 342 | perclk_pdf = (PCDR1() >> (clk->id << 3)) & CCM_PCDR1_PERDIV1_MASK; | ||
| 343 | |||
| 344 | return parent_rate / (perclk_pdf + 1); | ||
| 345 | } | ||
| 346 | |||
| 347 | static struct clk per_clk[] = { | ||
| 348 | { | ||
| 349 | .id = 0, | ||
| 350 | .parent = &mpll_clk, | ||
| 351 | .get_rate = _clk_perclkx_recalc, | ||
| 352 | }, { | ||
| 353 | .id = 1, | ||
| 354 | .parent = &mpll_clk, | ||
| 355 | .get_rate = _clk_perclkx_recalc, | ||
| 356 | }, { | ||
| 357 | .id = 2, | ||
| 358 | .parent = &mpll_clk, | ||
| 359 | .round_rate = _clk_perclkx_round_rate, | ||
| 360 | .set_rate = _clk_perclkx_set_rate, | ||
| 361 | .get_rate = _clk_perclkx_recalc, | ||
| 362 | /* Enable/Disable done via lcd_clkc[1] */ | ||
| 363 | }, { | ||
| 364 | .id = 3, | ||
| 365 | .parent = &mpll_clk, | ||
| 366 | .round_rate = _clk_perclkx_round_rate, | ||
| 367 | .set_rate = _clk_perclkx_set_rate, | ||
| 368 | .get_rate = _clk_perclkx_recalc, | ||
| 369 | /* Enable/Disable done via csi_clk[1] */ | ||
| 370 | }, | ||
| 371 | }; | ||
| 372 | |||
| 373 | static struct clk uart_ipg_clk[]; | ||
| 374 | |||
| 375 | static struct clk uart_clk[] = { | ||
| 376 | { | ||
| 377 | .id = 0, | ||
| 378 | .parent = &per_clk[0], | ||
| 379 | .secondary = &uart_ipg_clk[0], | ||
| 380 | }, { | ||
| 381 | .id = 1, | ||
| 382 | .parent = &per_clk[0], | ||
| 383 | .secondary = &uart_ipg_clk[1], | ||
| 384 | }, { | ||
| 385 | .id = 2, | ||
| 386 | .parent = &per_clk[0], | ||
| 387 | .secondary = &uart_ipg_clk[2], | ||
| 388 | }, { | ||
| 389 | .id = 3, | ||
| 390 | .parent = &per_clk[0], | ||
| 391 | .secondary = &uart_ipg_clk[3], | ||
| 392 | }, | ||
| 393 | }; | ||
| 394 | |||
| 395 | static struct clk uart_ipg_clk[] = { | ||
| 396 | { | ||
| 397 | .id = 0, | ||
| 398 | .parent = &ipg_clk, | ||
| 399 | .enable = _clk_enable, | ||
| 400 | .enable_reg = CCM_PCCR_UART1_REG, | ||
| 401 | .enable_shift = CCM_PCCR_UART1_OFFSET, | ||
| 402 | .disable = _clk_disable, | ||
| 403 | }, { | ||
| 404 | .id = 1, | ||
| 405 | .parent = &ipg_clk, | ||
| 406 | .enable = _clk_enable, | ||
| 407 | .enable_reg = CCM_PCCR_UART2_REG, | ||
| 408 | .enable_shift = CCM_PCCR_UART2_OFFSET, | ||
| 409 | .disable = _clk_disable, | ||
| 410 | }, { | ||
| 411 | .id = 2, | ||
| 412 | .parent = &ipg_clk, | ||
| 413 | .enable = _clk_enable, | ||
| 414 | .enable_reg = CCM_PCCR_UART3_REG, | ||
| 415 | .enable_shift = CCM_PCCR_UART3_OFFSET, | ||
| 416 | .disable = _clk_disable, | ||
| 417 | }, { | ||
| 418 | .id = 3, | ||
| 419 | .parent = &ipg_clk, | ||
| 420 | .enable = _clk_enable, | ||
| 421 | .enable_reg = CCM_PCCR_UART4_REG, | ||
| 422 | .enable_shift = CCM_PCCR_UART4_OFFSET, | ||
| 423 | .disable = _clk_disable, | ||
| 424 | }, | ||
| 425 | }; | ||
| 426 | |||
| 427 | static struct clk gpt_ipg_clk[]; | ||
| 428 | |||
| 429 | static struct clk gpt_clk[] = { | ||
| 430 | { | ||
| 431 | .id = 0, | ||
| 432 | .parent = &per_clk[0], | ||
| 433 | .secondary = &gpt_ipg_clk[0], | ||
| 434 | }, { | ||
| 435 | .id = 1, | ||
| 436 | .parent = &per_clk[0], | ||
| 437 | .secondary = &gpt_ipg_clk[1], | ||
| 438 | }, { | ||
| 439 | .id = 2, | ||
| 440 | .parent = &per_clk[0], | ||
| 441 | .secondary = &gpt_ipg_clk[2], | ||
| 442 | }, | ||
| 443 | }; | ||
| 444 | |||
| 445 | static struct clk gpt_ipg_clk[] = { | ||
| 446 | { | ||
| 447 | .id = 0, | ||
| 448 | .parent = &ipg_clk, | ||
| 449 | .enable = _clk_enable, | ||
| 450 | .enable_reg = CCM_PCCR_GPT1_REG, | ||
| 451 | .enable_shift = CCM_PCCR_GPT1_OFFSET, | ||
| 452 | .disable = _clk_disable, | ||
| 453 | }, { | ||
| 454 | .id = 1, | ||
| 455 | .parent = &ipg_clk, | ||
| 456 | .enable = _clk_enable, | ||
| 457 | .enable_reg = CCM_PCCR_GPT2_REG, | ||
| 458 | .enable_shift = CCM_PCCR_GPT2_OFFSET, | ||
| 459 | .disable = _clk_disable, | ||
| 460 | }, { | ||
| 461 | .id = 2, | ||
| 462 | .parent = &ipg_clk, | ||
| 463 | .enable = _clk_enable, | ||
| 464 | .enable_reg = CCM_PCCR_GPT3_REG, | ||
| 465 | .enable_shift = CCM_PCCR_GPT3_OFFSET, | ||
| 466 | .disable = _clk_disable, | ||
| 467 | }, | ||
| 468 | }; | ||
| 469 | |||
| 470 | static struct clk pwm_clk[] = { | ||
| 471 | { | ||
| 472 | .parent = &per_clk[0], | ||
| 473 | .secondary = &pwm_clk[1], | ||
| 474 | }, { | ||
| 475 | .parent = &ipg_clk, | ||
| 476 | .enable = _clk_enable, | ||
| 477 | .enable_reg = CCM_PCCR_PWM_REG, | ||
| 478 | .enable_shift = CCM_PCCR_PWM_OFFSET, | ||
| 479 | .disable = _clk_disable, | ||
| 480 | }, | ||
| 481 | }; | ||
| 482 | |||
| 483 | static struct clk sdhc_ipg_clk[]; | ||
| 484 | |||
| 485 | static struct clk sdhc_clk[] = { | ||
| 486 | { | ||
| 487 | .id = 0, | ||
| 488 | .parent = &per_clk[1], | ||
| 489 | .secondary = &sdhc_ipg_clk[0], | ||
| 490 | }, { | ||
| 491 | .id = 1, | ||
| 492 | .parent = &per_clk[1], | ||
| 493 | .secondary = &sdhc_ipg_clk[1], | ||
| 494 | }, | ||
| 495 | }; | ||
| 496 | |||
| 497 | static struct clk sdhc_ipg_clk[] = { | ||
| 498 | { | ||
| 499 | .id = 0, | ||
| 500 | .parent = &ipg_clk, | ||
| 501 | .enable = _clk_enable, | ||
| 502 | .enable_reg = CCM_PCCR_SDHC1_REG, | ||
| 503 | .enable_shift = CCM_PCCR_SDHC1_OFFSET, | ||
| 504 | .disable = _clk_disable, | ||
| 505 | }, { | ||
| 506 | .id = 1, | ||
| 507 | .parent = &ipg_clk, | ||
| 508 | .enable = _clk_enable, | ||
| 509 | .enable_reg = CCM_PCCR_SDHC2_REG, | ||
| 510 | .enable_shift = CCM_PCCR_SDHC2_OFFSET, | ||
| 511 | .disable = _clk_disable, | ||
| 512 | }, | ||
| 513 | }; | ||
| 514 | |||
| 515 | static struct clk cspi_ipg_clk[]; | ||
| 516 | |||
| 517 | static struct clk cspi_clk[] = { | ||
| 518 | { | ||
| 519 | .id = 0, | ||
| 520 | .parent = &per_clk[1], | ||
| 521 | .secondary = &cspi_ipg_clk[0], | ||
| 522 | }, { | ||
| 523 | .id = 1, | ||
| 524 | .parent = &per_clk[1], | ||
| 525 | .secondary = &cspi_ipg_clk[1], | ||
| 526 | }, { | ||
| 527 | .id = 2, | ||
| 528 | .parent = &per_clk[1], | ||
| 529 | .secondary = &cspi_ipg_clk[2], | ||
| 530 | }, | ||
| 531 | }; | ||
| 532 | |||
| 533 | static struct clk cspi_ipg_clk[] = { | ||
| 534 | { | ||
| 535 | .id = 0, | ||
| 536 | .parent = &ipg_clk, | ||
| 537 | .enable = _clk_enable, | ||
| 538 | .enable_reg = CCM_PCCR_CSPI1_REG, | ||
| 539 | .enable_shift = CCM_PCCR_CSPI1_OFFSET, | ||
| 540 | .disable = _clk_disable, | ||
| 541 | }, { | ||
| 542 | .id = 1, | ||
| 543 | .parent = &ipg_clk, | ||
| 544 | .enable = _clk_enable, | ||
| 545 | .enable_reg = CCM_PCCR_CSPI2_REG, | ||
| 546 | .enable_shift = CCM_PCCR_CSPI2_OFFSET, | ||
| 547 | .disable = _clk_disable, | ||
| 548 | }, { | ||
| 549 | .id = 3, | ||
| 550 | .parent = &ipg_clk, | ||
| 551 | .enable = _clk_enable, | ||
| 552 | .enable_reg = CCM_PCCR_CSPI3_REG, | ||
| 553 | .enable_shift = CCM_PCCR_CSPI3_OFFSET, | ||
| 554 | .disable = _clk_disable, | ||
| 555 | }, | ||
| 556 | }; | ||
| 557 | |||
| 558 | static struct clk lcdc_clk[] = { | ||
| 559 | { | ||
| 560 | .parent = &per_clk[2], | ||
| 561 | .secondary = &lcdc_clk[1], | ||
| 562 | .round_rate = _clk_parent_round_rate, | ||
| 563 | .set_rate = _clk_parent_set_rate, | ||
| 564 | }, { | ||
| 565 | .parent = &ipg_clk, | ||
| 566 | .secondary = &lcdc_clk[2], | ||
| 567 | .enable = _clk_enable, | ||
| 568 | .enable_reg = CCM_PCCR_LCDC_REG, | ||
| 569 | .enable_shift = CCM_PCCR_LCDC_OFFSET, | ||
| 570 | .disable = _clk_disable, | ||
| 571 | }, { | ||
| 572 | .parent = &hclk_clk, | ||
| 573 | .enable = _clk_enable, | ||
| 574 | .enable_reg = CCM_PCCR_HCLK_LCDC_REG, | ||
| 575 | .enable_shift = CCM_PCCR_HCLK_LCDC_OFFSET, | ||
| 576 | .disable = _clk_disable, | ||
| 577 | }, | ||
| 578 | }; | ||
| 579 | |||
| 580 | static struct clk csi_clk[] = { | ||
| 581 | { | ||
| 582 | .parent = &per_clk[3], | ||
| 583 | .secondary = &csi_clk[1], | ||
| 584 | .round_rate = _clk_parent_round_rate, | ||
| 585 | .set_rate = _clk_parent_set_rate, | ||
| 586 | }, { | ||
| 587 | .parent = &hclk_clk, | ||
| 588 | .enable = _clk_enable, | ||
| 589 | .enable_reg = CCM_PCCR_HCLK_CSI_REG, | ||
| 590 | .enable_shift = CCM_PCCR_HCLK_CSI_OFFSET, | ||
| 591 | .disable = _clk_disable, | ||
| 592 | }, | ||
| 593 | }; | ||
| 594 | |||
| 595 | static struct clk usb_clk[] = { | ||
| 596 | { | ||
| 597 | .parent = &spll_clk, | ||
| 598 | .get_rate = _clk_usb_recalc, | ||
| 599 | .enable = _clk_enable, | ||
| 600 | .enable_reg = CCM_PCCR_USBOTG_REG, | ||
| 601 | .enable_shift = CCM_PCCR_USBOTG_OFFSET, | ||
| 602 | .disable = _clk_disable, | ||
| 603 | }, { | ||
| 604 | .parent = &hclk_clk, | ||
| 605 | .enable = _clk_enable, | ||
| 606 | .enable_reg = CCM_PCCR_HCLK_USBOTG_REG, | ||
| 607 | .enable_shift = CCM_PCCR_HCLK_USBOTG_OFFSET, | ||
| 608 | .disable = _clk_disable, | ||
| 609 | } | ||
| 610 | }; | ||
| 611 | |||
| 612 | static struct clk ssi_ipg_clk[]; | ||
| 613 | |||
| 614 | static struct clk ssi_clk[] = { | ||
| 615 | { | ||
| 616 | .id = 0, | ||
| 617 | .parent = &mpll_clk, | ||
| 618 | .secondary = &ssi_ipg_clk[0], | ||
| 619 | .get_rate = _clk_ssi1_recalc, | ||
| 620 | .enable = _clk_enable, | ||
| 621 | .enable_reg = CCM_PCCR_SSI1_BAUD_REG, | ||
| 622 | .enable_shift = CCM_PCCR_SSI1_BAUD_OFFSET, | ||
| 623 | .disable = _clk_disable, | ||
| 624 | }, { | ||
| 625 | .id = 1, | ||
| 626 | .parent = &mpll_clk, | ||
| 627 | .secondary = &ssi_ipg_clk[1], | ||
| 628 | .get_rate = _clk_ssi2_recalc, | ||
| 629 | .enable = _clk_enable, | ||
| 630 | .enable_reg = CCM_PCCR_SSI2_BAUD_REG, | ||
| 631 | .enable_shift = CCM_PCCR_SSI2_BAUD_OFFSET, | ||
| 632 | .disable = _clk_disable, | ||
| 633 | }, | ||
| 634 | }; | ||
| 635 | |||
| 636 | static struct clk ssi_ipg_clk[] = { | ||
| 637 | { | ||
| 638 | .id = 0, | ||
| 639 | .parent = &ipg_clk, | ||
| 640 | .enable = _clk_enable, | ||
| 641 | .enable_reg = CCM_PCCR_SSI1_REG, | ||
| 642 | .enable_shift = CCM_PCCR_SSI1_IPG_OFFSET, | ||
| 643 | .disable = _clk_disable, | ||
| 644 | }, { | ||
| 645 | .id = 1, | ||
| 646 | .parent = &ipg_clk, | ||
| 647 | .enable = _clk_enable, | ||
| 648 | .enable_reg = CCM_PCCR_SSI2_REG, | ||
| 649 | .enable_shift = CCM_PCCR_SSI2_IPG_OFFSET, | ||
| 650 | .disable = _clk_disable, | ||
| 651 | }, | ||
| 652 | }; | ||
| 653 | |||
| 654 | |||
| 655 | static struct clk nfc_clk = { | ||
| 656 | .parent = &fclk_clk, | ||
| 657 | .get_rate = _clk_nfc_recalc, | ||
| 658 | .enable = _clk_enable, | ||
| 659 | .enable_reg = CCM_PCCR_NFC_REG, | ||
| 660 | .enable_shift = CCM_PCCR_NFC_OFFSET, | ||
| 661 | .disable = _clk_disable, | ||
| 662 | }; | ||
| 663 | |||
| 664 | static struct clk dma_clk[] = { | ||
| 665 | { | ||
| 666 | .parent = &hclk_clk, | ||
| 667 | .enable = _clk_enable, | ||
| 668 | .enable_reg = CCM_PCCR_DMA_REG, | ||
| 669 | .enable_shift = CCM_PCCR_DMA_OFFSET, | ||
| 670 | .disable = _clk_disable, | ||
| 671 | .secondary = &dma_clk[1], | ||
| 672 | }, { | ||
| 673 | .enable = _clk_enable, | ||
| 674 | .enable_reg = CCM_PCCR_HCLK_DMA_REG, | ||
| 675 | .enable_shift = CCM_PCCR_HCLK_DMA_OFFSET, | ||
| 676 | .disable = _clk_disable, | ||
| 677 | }, | ||
| 678 | }; | ||
| 679 | |||
| 680 | static struct clk brom_clk = { | ||
| 681 | .parent = &hclk_clk, | ||
| 682 | .enable = _clk_enable, | ||
| 683 | .enable_reg = CCM_PCCR_HCLK_BROM_REG, | ||
| 684 | .enable_shift = CCM_PCCR_HCLK_BROM_OFFSET, | ||
| 685 | .disable = _clk_disable, | ||
| 686 | }; | ||
| 687 | |||
| 688 | static struct clk emma_clk[] = { | ||
| 689 | { | ||
| 690 | .parent = &hclk_clk, | ||
| 691 | .enable = _clk_enable, | ||
| 692 | .enable_reg = CCM_PCCR_EMMA_REG, | ||
| 693 | .enable_shift = CCM_PCCR_EMMA_OFFSET, | ||
| 694 | .disable = _clk_disable, | ||
| 695 | .secondary = &emma_clk[1], | ||
| 696 | }, { | ||
| 697 | .enable = _clk_enable, | ||
| 698 | .enable_reg = CCM_PCCR_HCLK_EMMA_REG, | ||
| 699 | .enable_shift = CCM_PCCR_HCLK_EMMA_OFFSET, | ||
| 700 | .disable = _clk_disable, | ||
| 701 | } | ||
| 702 | }; | ||
| 703 | |||
| 704 | static struct clk slcdc_clk[] = { | ||
| 705 | { | ||
| 706 | .parent = &hclk_clk, | ||
| 707 | .enable = _clk_enable, | ||
| 708 | .enable_reg = CCM_PCCR_SLCDC_REG, | ||
| 709 | .enable_shift = CCM_PCCR_SLCDC_OFFSET, | ||
| 710 | .disable = _clk_disable, | ||
| 711 | .secondary = &slcdc_clk[1], | ||
| 712 | }, { | ||
| 713 | .enable = _clk_enable, | ||
| 714 | .enable_reg = CCM_PCCR_HCLK_SLCDC_REG, | ||
| 715 | .enable_shift = CCM_PCCR_HCLK_SLCDC_OFFSET, | ||
| 716 | .disable = _clk_disable, | ||
| 717 | } | ||
| 718 | }; | ||
| 719 | |||
| 720 | static struct clk wdog_clk = { | ||
| 721 | .parent = &ipg_clk, | ||
| 722 | .enable = _clk_enable, | ||
| 723 | .enable_reg = CCM_PCCR_WDT_REG, | ||
| 724 | .enable_shift = CCM_PCCR_WDT_OFFSET, | ||
| 725 | .disable = _clk_disable, | ||
| 726 | }; | ||
| 727 | |||
| 728 | static struct clk gpio_clk = { | ||
| 729 | .parent = &ipg_clk, | ||
| 730 | .enable = _clk_enable, | ||
| 731 | .enable_reg = CCM_PCCR_GPIO_REG, | ||
| 732 | .enable_shift = CCM_PCCR_GPIO_OFFSET, | ||
| 733 | .disable = _clk_disable, | ||
| 734 | }; | ||
| 735 | |||
| 736 | static struct clk i2c_clk = { | ||
| 737 | .id = 0, | ||
| 738 | .parent = &ipg_clk, | ||
| 739 | .enable = _clk_enable, | ||
| 740 | .enable_reg = CCM_PCCR_I2C1_REG, | ||
| 741 | .enable_shift = CCM_PCCR_I2C1_OFFSET, | ||
| 742 | .disable = _clk_disable, | ||
| 743 | }; | ||
| 744 | |||
| 745 | static struct clk kpp_clk = { | ||
| 746 | .parent = &ipg_clk, | ||
| 747 | .enable = _clk_enable, | ||
| 748 | .enable_reg = CCM_PCCR_KPP_REG, | ||
| 749 | .enable_shift = CCM_PCCR_KPP_OFFSET, | ||
| 750 | .disable = _clk_disable, | ||
| 751 | }; | ||
| 752 | |||
| 753 | static struct clk owire_clk = { | ||
| 754 | .parent = &ipg_clk, | ||
| 755 | .enable = _clk_enable, | ||
| 756 | .enable_reg = CCM_PCCR_OWIRE_REG, | ||
| 757 | .enable_shift = CCM_PCCR_OWIRE_OFFSET, | ||
| 758 | .disable = _clk_disable, | ||
| 759 | }; | ||
| 760 | |||
| 761 | static struct clk rtc_clk = { | ||
| 762 | .parent = &ipg_clk, | ||
| 763 | .enable = _clk_enable, | ||
| 764 | .enable_reg = CCM_PCCR_RTC_REG, | ||
| 765 | .enable_shift = CCM_PCCR_RTC_OFFSET, | ||
| 766 | .disable = _clk_disable, | ||
| 767 | }; | ||
| 768 | |||
| 769 | static unsigned long _clk_clko_round_rate(struct clk *clk, unsigned long rate) | ||
| 770 | { | ||
| 771 | u32 div; | ||
| 772 | unsigned long parent_rate; | ||
| 773 | |||
| 774 | parent_rate = clk_get_rate(clk->parent); | ||
| 775 | div = parent_rate / rate; | ||
| 776 | if (parent_rate % rate) | ||
| 777 | div++; | ||
| 778 | |||
| 779 | if (div > 8) | ||
| 780 | div = 8; | ||
| 781 | |||
| 782 | return parent_rate / div; | ||
| 783 | } | ||
| 784 | |||
| 785 | static int _clk_clko_set_rate(struct clk *clk, unsigned long rate) | ||
| 786 | { | ||
| 787 | u32 reg; | ||
| 788 | u32 div; | ||
| 789 | unsigned long parent_rate; | ||
| 790 | |||
| 791 | parent_rate = clk_get_rate(clk->parent); | ||
| 792 | |||
| 793 | div = parent_rate / rate; | ||
| 794 | |||
| 795 | if (div > 8 || div < 1 || ((parent_rate / div) != rate)) | ||
| 796 | return -EINVAL; | ||
| 797 | div--; | ||
| 798 | |||
| 799 | reg = __raw_readl(CCM_PCDR0); | ||
| 800 | |||
| 801 | if (clk->parent == &usb_clk[0]) { | ||
| 802 | reg &= ~CCM_PCDR0_48MDIV_MASK; | ||
| 803 | reg |= div << CCM_PCDR0_48MDIV_OFFSET; | ||
| 804 | } | ||
| 805 | __raw_writel(reg, CCM_PCDR0); | ||
| 806 | |||
| 807 | return 0; | ||
| 808 | } | ||
| 809 | |||
| 810 | static unsigned long _clk_clko_recalc(struct clk *clk) | ||
| 811 | { | ||
| 812 | u32 div = 0; | ||
| 813 | unsigned long parent_rate; | ||
| 814 | |||
| 815 | parent_rate = clk_get_rate(clk->parent); | ||
| 816 | |||
| 817 | if (clk->parent == &usb_clk[0]) /* 48M */ | ||
| 818 | div = __raw_readl(CCM_PCDR0) & CCM_PCDR0_48MDIV_MASK | ||
| 819 | >> CCM_PCDR0_48MDIV_OFFSET; | ||
| 820 | div++; | ||
| 821 | |||
| 822 | return parent_rate / div; | ||
| 823 | } | ||
| 824 | |||
| 825 | static struct clk clko_clk; | ||
| 826 | |||
| 827 | static int _clk_clko_set_parent(struct clk *clk, struct clk *parent) | ||
| 828 | { | ||
| 829 | u32 reg; | ||
| 830 | |||
| 831 | reg = __raw_readl(CCM_CCSR) & ~CCM_CCSR_CLKOSEL_MASK; | ||
| 832 | |||
| 833 | if (parent == &ckil_clk) | ||
| 834 | reg |= 0 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 835 | else if (parent == &fpm_clk) | ||
| 836 | reg |= 1 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 837 | else if (parent == &ckih_clk) | ||
| 838 | reg |= 2 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 839 | else if (parent == mpll_clk.parent) | ||
| 840 | reg |= 3 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 841 | else if (parent == spll_clk.parent) | ||
| 842 | reg |= 4 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 843 | else if (parent == &mpll_clk) | ||
| 844 | reg |= 5 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 845 | else if (parent == &spll_clk) | ||
| 846 | reg |= 6 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 847 | else if (parent == &fclk_clk) | ||
| 848 | reg |= 7 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 849 | else if (parent == &hclk_clk) | ||
| 850 | reg |= 8 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 851 | else if (parent == &ipg_clk) | ||
| 852 | reg |= 9 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 853 | else if (parent == &per_clk[0]) | ||
| 854 | reg |= 0xA << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 855 | else if (parent == &per_clk[1]) | ||
| 856 | reg |= 0xB << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 857 | else if (parent == &per_clk[2]) | ||
| 858 | reg |= 0xC << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 859 | else if (parent == &per_clk[3]) | ||
| 860 | reg |= 0xD << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 861 | else if (parent == &ssi_clk[0]) | ||
| 862 | reg |= 0xE << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 863 | else if (parent == &ssi_clk[1]) | ||
| 864 | reg |= 0xF << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 865 | else if (parent == &nfc_clk) | ||
| 866 | reg |= 0x10 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 867 | else if (parent == &usb_clk[0]) | ||
| 868 | reg |= 0x14 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 869 | else if (parent == &clko_clk) | ||
| 870 | reg |= 0x15 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 871 | else | ||
| 872 | return -EINVAL; | ||
| 873 | |||
| 874 | __raw_writel(reg, CCM_CCSR); | ||
| 875 | |||
| 876 | return 0; | ||
| 877 | } | ||
| 878 | |||
| 879 | static struct clk clko_clk = { | ||
| 880 | .get_rate = _clk_clko_recalc, | ||
| 881 | .set_rate = _clk_clko_set_rate, | ||
| 882 | .round_rate = _clk_clko_round_rate, | ||
| 883 | .set_parent = _clk_clko_set_parent, | ||
| 884 | }; | ||
| 885 | |||
| 886 | |||
| 887 | #define _REGISTER_CLOCK(d, n, c) \ | ||
| 888 | { \ | ||
| 889 | .dev_id = d, \ | ||
| 890 | .con_id = n, \ | ||
| 891 | .clk = &c, \ | ||
| 892 | }, | ||
| 893 | static struct clk_lookup lookups[] __initdata = { | ||
| 894 | /* It's unlikely that any driver wants one of them directly: | ||
| 895 | _REGISTER_CLOCK(NULL, "ckih", ckih_clk) | ||
| 896 | _REGISTER_CLOCK(NULL, "ckil", ckil_clk) | ||
| 897 | _REGISTER_CLOCK(NULL, "fpm", fpm_clk) | ||
| 898 | _REGISTER_CLOCK(NULL, "mpll", mpll_clk) | ||
| 899 | _REGISTER_CLOCK(NULL, "spll", spll_clk) | ||
| 900 | _REGISTER_CLOCK(NULL, "fclk", fclk_clk) | ||
| 901 | _REGISTER_CLOCK(NULL, "hclk", hclk_clk) | ||
| 902 | _REGISTER_CLOCK(NULL, "ipg", ipg_clk) | ||
| 903 | */ | ||
| 904 | _REGISTER_CLOCK(NULL, "perclk1", per_clk[0]) | ||
| 905 | _REGISTER_CLOCK(NULL, "perclk2", per_clk[1]) | ||
| 906 | _REGISTER_CLOCK(NULL, "perclk3", per_clk[2]) | ||
| 907 | _REGISTER_CLOCK(NULL, "perclk4", per_clk[3]) | ||
| 908 | _REGISTER_CLOCK(NULL, "clko", clko_clk) | ||
| 909 | _REGISTER_CLOCK("imx-uart.0", NULL, uart_clk[0]) | ||
| 910 | _REGISTER_CLOCK("imx-uart.1", NULL, uart_clk[1]) | ||
| 911 | _REGISTER_CLOCK("imx-uart.2", NULL, uart_clk[2]) | ||
| 912 | _REGISTER_CLOCK("imx-uart.3", NULL, uart_clk[3]) | ||
| 913 | _REGISTER_CLOCK(NULL, "gpt1", gpt_clk[0]) | ||
| 914 | _REGISTER_CLOCK(NULL, "gpt1", gpt_clk[1]) | ||
| 915 | _REGISTER_CLOCK(NULL, "gpt1", gpt_clk[2]) | ||
| 916 | _REGISTER_CLOCK(NULL, "pwm", pwm_clk[0]) | ||
| 917 | _REGISTER_CLOCK(NULL, "sdhc1", sdhc_clk[0]) | ||
| 918 | _REGISTER_CLOCK(NULL, "sdhc2", sdhc_clk[1]) | ||
| 919 | _REGISTER_CLOCK(NULL, "cspi1", cspi_clk[0]) | ||
| 920 | _REGISTER_CLOCK(NULL, "cspi2", cspi_clk[1]) | ||
| 921 | _REGISTER_CLOCK(NULL, "cspi3", cspi_clk[2]) | ||
| 922 | _REGISTER_CLOCK(NULL, "lcdc", lcdc_clk[0]) | ||
| 923 | _REGISTER_CLOCK(NULL, "csi", csi_clk[0]) | ||
| 924 | _REGISTER_CLOCK(NULL, "usb", usb_clk[0]) | ||
| 925 | _REGISTER_CLOCK(NULL, "ssi1", ssi_clk[0]) | ||
| 926 | _REGISTER_CLOCK(NULL, "ssi2", ssi_clk[1]) | ||
| 927 | _REGISTER_CLOCK(NULL, "nfc", nfc_clk) | ||
| 928 | _REGISTER_CLOCK(NULL, "dma", dma_clk[0]) | ||
| 929 | _REGISTER_CLOCK(NULL, "brom", brom_clk) | ||
| 930 | _REGISTER_CLOCK(NULL, "emma", emma_clk[0]) | ||
| 931 | _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk[0]) | ||
| 932 | _REGISTER_CLOCK(NULL, "wdog", wdog_clk) | ||
| 933 | _REGISTER_CLOCK(NULL, "gpio", gpio_clk) | ||
| 934 | _REGISTER_CLOCK(NULL, "i2c", i2c_clk) | ||
| 935 | _REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk) | ||
| 936 | _REGISTER_CLOCK(NULL, "owire", owire_clk) | ||
| 937 | _REGISTER_CLOCK(NULL, "rtc", rtc_clk) | ||
| 938 | }; | ||
| 939 | |||
| 940 | /* | ||
| 941 | * must be called very early to get information about the | ||
| 942 | * available clock rate when the timer framework starts | ||
| 943 | */ | ||
| 944 | int __init mx21_clocks_init(unsigned long lref, unsigned long href) | ||
| 945 | { | ||
| 946 | int i; | ||
| 947 | u32 cscr; | ||
| 948 | |||
| 949 | external_low_reference = lref; | ||
| 950 | external_high_reference = href; | ||
| 951 | |||
| 952 | /* detect clock reference for both system PLL */ | ||
| 953 | cscr = CSCR(); | ||
| 954 | if (cscr & CCM_CSCR_MCU) | ||
| 955 | mpll_clk.parent = &ckih_clk; | ||
| 956 | else | ||
| 957 | mpll_clk.parent = &fpm_clk; | ||
| 958 | |||
| 959 | if (cscr & CCM_CSCR_SP) | ||
| 960 | spll_clk.parent = &ckih_clk; | ||
| 961 | else | ||
| 962 | spll_clk.parent = &fpm_clk; | ||
| 963 | |||
| 964 | for (i = 0; i < ARRAY_SIZE(lookups); i++) | ||
| 965 | clkdev_add(&lookups[i]); | ||
| 966 | |||
| 967 | /* Turn off all clock gates */ | ||
| 968 | __raw_writel(0, CCM_PCCR0); | ||
| 969 | __raw_writel(CCM_PCCR_GPT1_MASK, CCM_PCCR1); | ||
| 970 | |||
| 971 | /* This turns of the serial PLL as well */ | ||
| 972 | spll_clk.disable(&spll_clk); | ||
| 973 | |||
| 974 | /* This will propagate to all children and init all the clock rates. */ | ||
| 975 | clk_enable(&per_clk[0]); | ||
| 976 | clk_enable(&gpio_clk); | ||
| 977 | |||
| 978 | #ifdef CONFIG_DEBUG_LL_CONSOLE | ||
| 979 | clk_enable(&uart_clk[0]); | ||
| 980 | #endif | ||
| 981 | |||
| 982 | mxc_timer_init(&gpt_clk[0]); | ||
| 983 | return 0; | ||
| 984 | } | ||
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c index c69896d011a1..3f7280c490f0 100644 --- a/arch/arm/mach-mx2/clock_imx27.c +++ b/arch/arm/mach-mx2/clock_imx27.c | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | 2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. |
| 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de |
| 4 | * Copyright 2008 Martin Fuzzey, mfuzzey@gmail.com | ||
| 4 | * | 5 | * |
| 5 | * This program is free software; you can redistribute it and/or | 6 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License | 7 | * modify it under the terms of the GNU General Public License |
| @@ -20,23 +21,60 @@ | |||
| 20 | #include <linux/clk.h> | 21 | #include <linux/clk.h> |
| 21 | #include <linux/io.h> | 22 | #include <linux/io.h> |
| 22 | #include <linux/module.h> | 23 | #include <linux/module.h> |
| 23 | #include <linux/spinlock.h> | ||
| 24 | 24 | ||
| 25 | #include <mach/clock.h> | 25 | #include <asm/clkdev.h> |
| 26 | #include <mach/common.h> | ||
| 27 | #include <asm/div64.h> | 26 | #include <asm/div64.h> |
| 28 | 27 | ||
| 29 | #include "crm_regs.h" | 28 | #include <mach/clock.h> |
| 30 | 29 | #include <mach/common.h> | |
| 31 | static struct clk ckil_clk; | 30 | #include <mach/hardware.h> |
| 32 | static struct clk mpll_clk; | 31 | |
| 33 | static struct clk mpll_main_clk[]; | 32 | /* Register offsets */ |
| 34 | static struct clk spll_clk; | 33 | #define CCM_CSCR (IO_ADDRESS(CCM_BASE_ADDR) + 0x0) |
| 35 | 34 | #define CCM_MPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x4) | |
| 36 | static int _clk_enable(struct clk *clk) | 35 | #define CCM_MPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x8) |
| 36 | #define CCM_SPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0xC) | ||
| 37 | #define CCM_SPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x10) | ||
| 38 | #define CCM_OSC26MCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x14) | ||
| 39 | #define CCM_PCDR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x18) | ||
| 40 | #define CCM_PCDR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c) | ||
| 41 | #define CCM_PCCR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x20) | ||
| 42 | #define CCM_PCCR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x24) | ||
| 43 | #define CCM_CCSR (IO_ADDRESS(CCM_BASE_ADDR) + 0x28) | ||
| 44 | #define CCM_PMCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c) | ||
| 45 | #define CCM_PMCOUNT (IO_ADDRESS(CCM_BASE_ADDR) + 0x30) | ||
| 46 | #define CCM_WKGDCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x34) | ||
| 47 | |||
| 48 | #define CCM_CSCR_UPDATE_DIS (1 << 31) | ||
| 49 | #define CCM_CSCR_SSI2 (1 << 23) | ||
| 50 | #define CCM_CSCR_SSI1 (1 << 22) | ||
| 51 | #define CCM_CSCR_VPU (1 << 21) | ||
| 52 | #define CCM_CSCR_MSHC (1 << 20) | ||
| 53 | #define CCM_CSCR_SPLLRES (1 << 19) | ||
| 54 | #define CCM_CSCR_MPLLRES (1 << 18) | ||
| 55 | #define CCM_CSCR_SP (1 << 17) | ||
| 56 | #define CCM_CSCR_MCU (1 << 16) | ||
| 57 | #define CCM_CSCR_OSC26MDIV (1 << 4) | ||
| 58 | #define CCM_CSCR_OSC26M (1 << 3) | ||
| 59 | #define CCM_CSCR_FPM (1 << 2) | ||
| 60 | #define CCM_CSCR_SPEN (1 << 1) | ||
| 61 | #define CCM_CSCR_MPEN (1 << 0) | ||
| 62 | |||
| 63 | /* i.MX27 TO 2+ */ | ||
| 64 | #define CCM_CSCR_ARM_SRC (1 << 15) | ||
| 65 | |||
| 66 | #define CCM_SPCTL1_LF (1 << 15) | ||
| 67 | #define CCM_SPCTL1_BRMO (1 << 6) | ||
| 68 | |||
| 69 | static struct clk mpll_main1_clk, mpll_main2_clk; | ||
| 70 | |||
| 71 | static int clk_pccr_enable(struct clk *clk) | ||
| 37 | { | 72 | { |
| 38 | unsigned long reg; | 73 | unsigned long reg; |
| 39 | 74 | ||
| 75 | if (!clk->enable_reg) | ||
| 76 | return 0; | ||
| 77 | |||
| 40 | reg = __raw_readl(clk->enable_reg); | 78 | reg = __raw_readl(clk->enable_reg); |
| 41 | reg |= 1 << clk->enable_shift; | 79 | reg |= 1 << clk->enable_shift; |
| 42 | __raw_writel(reg, clk->enable_reg); | 80 | __raw_writel(reg, clk->enable_reg); |
| @@ -44,16 +82,19 @@ static int _clk_enable(struct clk *clk) | |||
| 44 | return 0; | 82 | return 0; |
| 45 | } | 83 | } |
| 46 | 84 | ||
| 47 | static void _clk_disable(struct clk *clk) | 85 | static void clk_pccr_disable(struct clk *clk) |
| 48 | { | 86 | { |
| 49 | unsigned long reg; | 87 | unsigned long reg; |
| 50 | 88 | ||
| 89 | if (!clk->enable_reg) | ||
| 90 | return; | ||
| 91 | |||
| 51 | reg = __raw_readl(clk->enable_reg); | 92 | reg = __raw_readl(clk->enable_reg); |
| 52 | reg &= ~(1 << clk->enable_shift); | 93 | reg &= ~(1 << clk->enable_shift); |
| 53 | __raw_writel(reg, clk->enable_reg); | 94 | __raw_writel(reg, clk->enable_reg); |
| 54 | } | 95 | } |
| 55 | 96 | ||
| 56 | static int _clk_spll_enable(struct clk *clk) | 97 | static int clk_spll_enable(struct clk *clk) |
| 57 | { | 98 | { |
| 58 | unsigned long reg; | 99 | unsigned long reg; |
| 59 | 100 | ||
| @@ -61,13 +102,12 @@ static int _clk_spll_enable(struct clk *clk) | |||
| 61 | reg |= CCM_CSCR_SPEN; | 102 | reg |= CCM_CSCR_SPEN; |
| 62 | __raw_writel(reg, CCM_CSCR); | 103 | __raw_writel(reg, CCM_CSCR); |
| 63 | 104 | ||
| 64 | while ((__raw_readl(CCM_SPCTL1) & CCM_SPCTL1_LF) == 0) | 105 | while (!(__raw_readl(CCM_SPCTL1) & CCM_SPCTL1_LF)); |
| 65 | ; | ||
| 66 | 106 | ||
| 67 | return 0; | 107 | return 0; |
| 68 | } | 108 | } |
| 69 | 109 | ||
| 70 | static void _clk_spll_disable(struct clk *clk) | 110 | static void clk_spll_disable(struct clk *clk) |
| 71 | { | 111 | { |
| 72 | unsigned long reg; | 112 | unsigned long reg; |
| 73 | 113 | ||
| @@ -76,192 +116,30 @@ static void _clk_spll_disable(struct clk *clk) | |||
| 76 | __raw_writel(reg, CCM_CSCR); | 116 | __raw_writel(reg, CCM_CSCR); |
| 77 | } | 117 | } |
| 78 | 118 | ||
| 79 | static void _clk_pccr01_enable(unsigned long mask0, unsigned long mask1) | 119 | static int clk_cpu_set_parent(struct clk *clk, struct clk *parent) |
| 80 | { | ||
| 81 | unsigned long reg; | ||
| 82 | |||
| 83 | reg = __raw_readl(CCM_PCCR0); | ||
| 84 | reg |= mask0; | ||
| 85 | __raw_writel(reg, CCM_PCCR0); | ||
| 86 | |||
| 87 | reg = __raw_readl(CCM_PCCR1); | ||
| 88 | reg |= mask1; | ||
| 89 | __raw_writel(reg, CCM_PCCR1); | ||
| 90 | |||
| 91 | } | ||
| 92 | |||
| 93 | static void _clk_pccr01_disable(unsigned long mask0, unsigned long mask1) | ||
| 94 | { | ||
| 95 | unsigned long reg; | ||
| 96 | |||
| 97 | reg = __raw_readl(CCM_PCCR0); | ||
| 98 | reg &= ~mask0; | ||
| 99 | __raw_writel(reg, CCM_PCCR0); | ||
| 100 | |||
| 101 | reg = __raw_readl(CCM_PCCR1); | ||
| 102 | reg &= ~mask1; | ||
| 103 | __raw_writel(reg, CCM_PCCR1); | ||
| 104 | } | ||
| 105 | |||
| 106 | static void _clk_pccr10_enable(unsigned long mask1, unsigned long mask0) | ||
| 107 | { | ||
| 108 | unsigned long reg; | ||
| 109 | |||
| 110 | reg = __raw_readl(CCM_PCCR1); | ||
| 111 | reg |= mask1; | ||
| 112 | __raw_writel(reg, CCM_PCCR1); | ||
| 113 | |||
| 114 | reg = __raw_readl(CCM_PCCR0); | ||
| 115 | reg |= mask0; | ||
| 116 | __raw_writel(reg, CCM_PCCR0); | ||
| 117 | } | ||
| 118 | |||
| 119 | static void _clk_pccr10_disable(unsigned long mask1, unsigned long mask0) | ||
| 120 | { | ||
| 121 | unsigned long reg; | ||
| 122 | |||
| 123 | reg = __raw_readl(CCM_PCCR1); | ||
| 124 | reg &= ~mask1; | ||
| 125 | __raw_writel(reg, CCM_PCCR1); | ||
| 126 | |||
| 127 | reg = __raw_readl(CCM_PCCR0); | ||
| 128 | reg &= ~mask0; | ||
| 129 | __raw_writel(reg, CCM_PCCR0); | ||
| 130 | } | ||
| 131 | |||
| 132 | static int _clk_dma_enable(struct clk *clk) | ||
| 133 | { | ||
| 134 | _clk_pccr01_enable(CCM_PCCR0_DMA_MASK, CCM_PCCR1_HCLK_DMA_MASK); | ||
| 135 | |||
| 136 | return 0; | ||
| 137 | } | ||
| 138 | |||
| 139 | static void _clk_dma_disable(struct clk *clk) | ||
| 140 | { | ||
| 141 | _clk_pccr01_disable(CCM_PCCR0_DMA_MASK, CCM_PCCR1_HCLK_DMA_MASK); | ||
| 142 | } | ||
| 143 | |||
| 144 | static int _clk_rtic_enable(struct clk *clk) | ||
| 145 | { | ||
| 146 | _clk_pccr01_enable(CCM_PCCR0_RTIC_MASK, CCM_PCCR1_HCLK_RTIC_MASK); | ||
| 147 | |||
| 148 | return 0; | ||
| 149 | } | ||
| 150 | |||
| 151 | static void _clk_rtic_disable(struct clk *clk) | ||
| 152 | { | ||
| 153 | _clk_pccr01_disable(CCM_PCCR0_RTIC_MASK, CCM_PCCR1_HCLK_RTIC_MASK); | ||
| 154 | } | ||
| 155 | |||
| 156 | static int _clk_emma_enable(struct clk *clk) | ||
| 157 | { | ||
| 158 | _clk_pccr01_enable(CCM_PCCR0_EMMA_MASK, CCM_PCCR1_HCLK_EMMA_MASK); | ||
| 159 | |||
| 160 | return 0; | ||
| 161 | } | ||
| 162 | |||
| 163 | static void _clk_emma_disable(struct clk *clk) | ||
| 164 | { | ||
| 165 | _clk_pccr01_disable(CCM_PCCR0_EMMA_MASK, CCM_PCCR1_HCLK_EMMA_MASK); | ||
| 166 | } | ||
| 167 | |||
| 168 | static int _clk_slcdc_enable(struct clk *clk) | ||
| 169 | { | ||
| 170 | _clk_pccr01_enable(CCM_PCCR0_SLCDC_MASK, CCM_PCCR1_HCLK_SLCDC_MASK); | ||
| 171 | |||
| 172 | return 0; | ||
| 173 | } | ||
| 174 | |||
| 175 | static void _clk_slcdc_disable(struct clk *clk) | ||
| 176 | { | ||
| 177 | _clk_pccr01_disable(CCM_PCCR0_SLCDC_MASK, CCM_PCCR1_HCLK_SLCDC_MASK); | ||
| 178 | } | ||
| 179 | |||
| 180 | static int _clk_fec_enable(struct clk *clk) | ||
| 181 | { | ||
| 182 | _clk_pccr01_enable(CCM_PCCR0_FEC_MASK, CCM_PCCR1_HCLK_FEC_MASK); | ||
| 183 | |||
| 184 | return 0; | ||
| 185 | } | ||
| 186 | |||
| 187 | static void _clk_fec_disable(struct clk *clk) | ||
| 188 | { | ||
| 189 | _clk_pccr01_disable(CCM_PCCR0_FEC_MASK, CCM_PCCR1_HCLK_FEC_MASK); | ||
| 190 | } | ||
| 191 | |||
| 192 | static int _clk_vpu_enable(struct clk *clk) | ||
| 193 | { | ||
| 194 | unsigned long reg; | ||
| 195 | |||
| 196 | reg = __raw_readl(CCM_PCCR1); | ||
| 197 | reg |= CCM_PCCR1_VPU_BAUD_MASK | CCM_PCCR1_HCLK_VPU_MASK; | ||
| 198 | __raw_writel(reg, CCM_PCCR1); | ||
| 199 | |||
| 200 | return 0; | ||
| 201 | } | ||
| 202 | |||
| 203 | static void _clk_vpu_disable(struct clk *clk) | ||
| 204 | { | 120 | { |
| 205 | unsigned long reg; | 121 | int cscr = __raw_readl(CCM_CSCR); |
| 206 | |||
| 207 | reg = __raw_readl(CCM_PCCR1); | ||
| 208 | reg &= ~(CCM_PCCR1_VPU_BAUD_MASK | CCM_PCCR1_HCLK_VPU_MASK); | ||
| 209 | __raw_writel(reg, CCM_PCCR1); | ||
| 210 | } | ||
| 211 | |||
| 212 | static int _clk_sahara2_enable(struct clk *clk) | ||
| 213 | { | ||
| 214 | _clk_pccr01_enable(CCM_PCCR0_SAHARA_MASK, CCM_PCCR1_HCLK_SAHARA_MASK); | ||
| 215 | |||
| 216 | return 0; | ||
| 217 | } | ||
| 218 | |||
| 219 | static void _clk_sahara2_disable(struct clk *clk) | ||
| 220 | { | ||
| 221 | _clk_pccr01_disable(CCM_PCCR0_SAHARA_MASK, CCM_PCCR1_HCLK_SAHARA_MASK); | ||
| 222 | } | ||
| 223 | |||
| 224 | static int _clk_mstick1_enable(struct clk *clk) | ||
| 225 | { | ||
| 226 | _clk_pccr10_enable(CCM_PCCR1_MSHC_BAUD_MASK, CCM_PCCR0_MSHC_MASK); | ||
| 227 | |||
| 228 | return 0; | ||
| 229 | } | ||
| 230 | |||
| 231 | static void _clk_mstick1_disable(struct clk *clk) | ||
| 232 | { | ||
| 233 | _clk_pccr10_disable(CCM_PCCR1_MSHC_BAUD_MASK, CCM_PCCR0_MSHC_MASK); | ||
| 234 | } | ||
| 235 | |||
| 236 | #define CSCR() (__raw_readl(CCM_CSCR)) | ||
| 237 | #define PCDR0() (__raw_readl(CCM_PCDR0)) | ||
| 238 | #define PCDR1() (__raw_readl(CCM_PCDR1)) | ||
| 239 | |||
| 240 | static int _clk_cpu_set_parent(struct clk *clk, struct clk *parent) | ||
| 241 | { | ||
| 242 | int cscr = CSCR(); | ||
| 243 | 122 | ||
| 244 | if (clk->parent == parent) | 123 | if (clk->parent == parent) |
| 245 | return 0; | 124 | return 0; |
| 246 | 125 | ||
| 247 | if (mx27_revision() >= CHIP_REV_2_0) { | 126 | if (mx27_revision() >= CHIP_REV_2_0) { |
| 248 | if (parent == &mpll_main_clk[0]) { | 127 | if (parent == &mpll_main1_clk) { |
| 249 | cscr |= CCM_CSCR_ARM_SRC; | 128 | cscr |= CCM_CSCR_ARM_SRC; |
| 250 | } else { | 129 | } else { |
| 251 | if (parent == &mpll_main_clk[1]) | 130 | if (parent == &mpll_main2_clk) |
| 252 | cscr &= ~CCM_CSCR_ARM_SRC; | 131 | cscr &= ~CCM_CSCR_ARM_SRC; |
| 253 | else | 132 | else |
| 254 | return -EINVAL; | 133 | return -EINVAL; |
| 255 | } | 134 | } |
| 256 | __raw_writel(cscr, CCM_CSCR); | 135 | __raw_writel(cscr, CCM_CSCR); |
| 257 | } else | 136 | clk->parent = parent; |
| 258 | return -ENODEV; | 137 | return 0; |
| 259 | 138 | } | |
| 260 | clk->parent = parent; | 139 | return -ENODEV; |
| 261 | return 0; | ||
| 262 | } | 140 | } |
| 263 | 141 | ||
| 264 | static unsigned long _clk_cpu_round_rate(struct clk *clk, unsigned long rate) | 142 | static unsigned long round_rate_cpu(struct clk *clk, unsigned long rate) |
| 265 | { | 143 | { |
| 266 | int div; | 144 | int div; |
| 267 | unsigned long parent_rate; | 145 | unsigned long parent_rate; |
| @@ -278,7 +156,7 @@ static unsigned long _clk_cpu_round_rate(struct clk *clk, unsigned long rate) | |||
| 278 | return parent_rate / div; | 156 | return parent_rate / div; |
| 279 | } | 157 | } |
| 280 | 158 | ||
| 281 | static int _clk_cpu_set_rate(struct clk *clk, unsigned long rate) | 159 | static int set_rate_cpu(struct clk *clk, unsigned long rate) |
| 282 | { | 160 | { |
| 283 | unsigned int div; | 161 | unsigned int div; |
| 284 | uint32_t reg; | 162 | uint32_t reg; |
| @@ -295,19 +173,18 @@ static int _clk_cpu_set_rate(struct clk *clk, unsigned long rate) | |||
| 295 | 173 | ||
| 296 | reg = __raw_readl(CCM_CSCR); | 174 | reg = __raw_readl(CCM_CSCR); |
| 297 | if (mx27_revision() >= CHIP_REV_2_0) { | 175 | if (mx27_revision() >= CHIP_REV_2_0) { |
| 298 | reg &= ~CCM_CSCR_ARM_MASK; | 176 | reg &= ~(3 << 12); |
| 299 | reg |= div << CCM_CSCR_ARM_OFFSET; | 177 | reg |= div << 12; |
| 300 | reg &= ~0x06; | 178 | reg &= ~(CCM_CSCR_FPM | CCM_CSCR_SPEN); |
| 301 | __raw_writel(reg | 0x80000000, CCM_CSCR); | 179 | __raw_writel(reg | CCM_CSCR_UPDATE_DIS, CCM_CSCR); |
| 302 | } else { | 180 | } else { |
| 303 | printk(KERN_ERR "Cant set CPU frequency!\n"); | 181 | printk(KERN_ERR "Can't set CPU frequency!\n"); |
| 304 | } | 182 | } |
| 305 | 183 | ||
| 306 | return 0; | 184 | return 0; |
| 307 | } | 185 | } |
| 308 | 186 | ||
| 309 | static unsigned long _clk_perclkx_round_rate(struct clk *clk, | 187 | static unsigned long round_rate_per(struct clk *clk, unsigned long rate) |
| 310 | unsigned long rate) | ||
| 311 | { | 188 | { |
| 312 | u32 div; | 189 | u32 div; |
| 313 | unsigned long parent_rate; | 190 | unsigned long parent_rate; |
| @@ -324,7 +201,7 @@ static unsigned long _clk_perclkx_round_rate(struct clk *clk, | |||
| 324 | return parent_rate / div; | 201 | return parent_rate / div; |
| 325 | } | 202 | } |
| 326 | 203 | ||
| 327 | static int _clk_perclkx_set_rate(struct clk *clk, unsigned long rate) | 204 | static int set_rate_per(struct clk *clk, unsigned long rate) |
| 328 | { | 205 | { |
| 329 | u32 reg; | 206 | u32 reg; |
| 330 | u32 div; | 207 | u32 div; |
| @@ -340,84 +217,65 @@ static int _clk_perclkx_set_rate(struct clk *clk, unsigned long rate) | |||
| 340 | return -EINVAL; | 217 | return -EINVAL; |
| 341 | div--; | 218 | div--; |
| 342 | 219 | ||
| 343 | reg = | 220 | reg = __raw_readl(CCM_PCDR1) & ~(0x3f << (clk->id << 3)); |
| 344 | __raw_readl(CCM_PCDR1) & ~(CCM_PCDR1_PERDIV1_MASK << | ||
| 345 | (clk->id << 3)); | ||
| 346 | reg |= div << (clk->id << 3); | 221 | reg |= div << (clk->id << 3); |
| 347 | __raw_writel(reg, CCM_PCDR1); | 222 | __raw_writel(reg, CCM_PCDR1); |
| 348 | 223 | ||
| 349 | return 0; | 224 | return 0; |
| 350 | } | 225 | } |
| 351 | 226 | ||
| 352 | static unsigned long _clk_usb_recalc(struct clk *clk) | 227 | static unsigned long get_rate_usb(struct clk *clk) |
| 353 | { | 228 | { |
| 354 | unsigned long usb_pdf; | 229 | unsigned long usb_pdf; |
| 355 | unsigned long parent_rate; | 230 | unsigned long parent_rate; |
| 356 | 231 | ||
| 357 | parent_rate = clk_get_rate(clk->parent); | 232 | parent_rate = clk_get_rate(clk->parent); |
| 358 | 233 | ||
| 359 | usb_pdf = (CSCR() & CCM_CSCR_USB_MASK) >> CCM_CSCR_USB_OFFSET; | 234 | usb_pdf = (__raw_readl(CCM_CSCR) >> 28) & 0x7; |
| 360 | 235 | ||
| 361 | return parent_rate / (usb_pdf + 1U); | 236 | return parent_rate / (usb_pdf + 1U); |
| 362 | } | 237 | } |
| 363 | 238 | ||
| 364 | static unsigned long _clk_ssi1_recalc(struct clk *clk) | 239 | static unsigned long get_rate_ssix(struct clk *clk, unsigned long pdf) |
| 365 | { | 240 | { |
| 366 | unsigned long ssi1_pdf; | ||
| 367 | unsigned long parent_rate; | 241 | unsigned long parent_rate; |
| 368 | 242 | ||
| 369 | parent_rate = clk_get_rate(clk->parent); | 243 | parent_rate = clk_get_rate(clk->parent); |
| 370 | 244 | ||
| 371 | ssi1_pdf = (PCDR0() & CCM_PCDR0_SSI1BAUDDIV_MASK) >> | ||
| 372 | CCM_PCDR0_SSI1BAUDDIV_OFFSET; | ||
| 373 | |||
| 374 | if (mx27_revision() >= CHIP_REV_2_0) | 245 | if (mx27_revision() >= CHIP_REV_2_0) |
| 375 | ssi1_pdf += 4; | 246 | pdf += 4; /* MX27 TO2+ */ |
| 376 | else | 247 | else |
| 377 | ssi1_pdf = (ssi1_pdf < 2) ? 124UL : ssi1_pdf; | 248 | pdf = (pdf < 2) ? 124UL : pdf; /* MX21 & MX27 TO1 */ |
| 378 | 249 | ||
| 379 | return 2UL * parent_rate / ssi1_pdf; | 250 | return 2UL * parent_rate / pdf; |
| 380 | } | 251 | } |
| 381 | 252 | ||
| 382 | static unsigned long _clk_ssi2_recalc(struct clk *clk) | 253 | static unsigned long get_rate_ssi1(struct clk *clk) |
| 383 | { | 254 | { |
| 384 | unsigned long ssi2_pdf; | 255 | return get_rate_ssix(clk, (__raw_readl(CCM_PCDR0) >> 16) & 0x3f); |
| 385 | unsigned long parent_rate; | 256 | } |
| 386 | |||
| 387 | parent_rate = clk_get_rate(clk->parent); | ||
| 388 | |||
| 389 | ssi2_pdf = (PCDR0() & CCM_PCDR0_SSI2BAUDDIV_MASK) >> | ||
| 390 | CCM_PCDR0_SSI2BAUDDIV_OFFSET; | ||
| 391 | |||
| 392 | if (mx27_revision() >= CHIP_REV_2_0) | ||
| 393 | ssi2_pdf += 4; | ||
| 394 | else | ||
| 395 | ssi2_pdf = (ssi2_pdf < 2) ? 124UL : ssi2_pdf; | ||
| 396 | 257 | ||
| 397 | return 2UL * parent_rate / ssi2_pdf; | 258 | static unsigned long get_rate_ssi2(struct clk *clk) |
| 259 | { | ||
| 260 | return get_rate_ssix(clk, (__raw_readl(CCM_PCDR0) >> 26) & 0x3f); | ||
| 398 | } | 261 | } |
| 399 | 262 | ||
| 400 | static unsigned long _clk_nfc_recalc(struct clk *clk) | 263 | static unsigned long get_rate_nfc(struct clk *clk) |
| 401 | { | 264 | { |
| 402 | unsigned long nfc_pdf; | 265 | unsigned long nfc_pdf; |
| 403 | unsigned long parent_rate; | 266 | unsigned long parent_rate; |
| 404 | 267 | ||
| 405 | parent_rate = clk_get_rate(clk->parent); | 268 | parent_rate = clk_get_rate(clk->parent); |
| 406 | 269 | ||
| 407 | if (mx27_revision() >= CHIP_REV_2_0) { | 270 | if (mx27_revision() >= CHIP_REV_2_0) |
| 408 | nfc_pdf = | 271 | nfc_pdf = (__raw_readl(CCM_PCDR0) >> 6) & 0xf; |
| 409 | (PCDR0() & CCM_PCDR0_NFCDIV2_MASK) >> | 272 | else |
| 410 | CCM_PCDR0_NFCDIV2_OFFSET; | 273 | nfc_pdf = (__raw_readl(CCM_PCDR0) >> 12) & 0xf; |
| 411 | } else { | ||
| 412 | nfc_pdf = | ||
| 413 | (PCDR0() & CCM_PCDR0_NFCDIV_MASK) >> | ||
| 414 | CCM_PCDR0_NFCDIV_OFFSET; | ||
| 415 | } | ||
| 416 | 274 | ||
| 417 | return parent_rate / (nfc_pdf + 1); | 275 | return parent_rate / (nfc_pdf + 1); |
| 418 | } | 276 | } |
| 419 | 277 | ||
| 420 | static unsigned long _clk_vpu_recalc(struct clk *clk) | 278 | static unsigned long get_rate_vpu(struct clk *clk) |
| 421 | { | 279 | { |
| 422 | unsigned long vpu_pdf; | 280 | unsigned long vpu_pdf; |
| 423 | unsigned long parent_rate; | 281 | unsigned long parent_rate; |
| @@ -425,25 +283,27 @@ static unsigned long _clk_vpu_recalc(struct clk *clk) | |||
| 425 | parent_rate = clk_get_rate(clk->parent); | 283 | parent_rate = clk_get_rate(clk->parent); |
| 426 | 284 | ||
| 427 | if (mx27_revision() >= CHIP_REV_2_0) { | 285 | if (mx27_revision() >= CHIP_REV_2_0) { |
| 428 | vpu_pdf = | 286 | vpu_pdf = (__raw_readl(CCM_PCDR0) >> 10) & 0x3f; |
| 429 | (PCDR0() & CCM_PCDR0_VPUDIV2_MASK) >> | ||
| 430 | CCM_PCDR0_VPUDIV2_OFFSET; | ||
| 431 | vpu_pdf += 4; | 287 | vpu_pdf += 4; |
| 432 | } else { | 288 | } else { |
| 433 | vpu_pdf = | 289 | vpu_pdf = (__raw_readl(CCM_PCDR0) >> 8) & 0xf; |
| 434 | (PCDR0() & CCM_PCDR0_VPUDIV_MASK) >> | ||
| 435 | CCM_PCDR0_VPUDIV_OFFSET; | ||
| 436 | vpu_pdf = (vpu_pdf < 2) ? 124 : vpu_pdf; | 290 | vpu_pdf = (vpu_pdf < 2) ? 124 : vpu_pdf; |
| 437 | } | 291 | } |
| 292 | |||
| 438 | return 2UL * parent_rate / vpu_pdf; | 293 | return 2UL * parent_rate / vpu_pdf; |
| 439 | } | 294 | } |
| 440 | 295 | ||
| 441 | static unsigned long _clk_parent_round_rate(struct clk *clk, unsigned long rate) | 296 | static unsigned long round_rate_parent(struct clk *clk, unsigned long rate) |
| 442 | { | 297 | { |
| 443 | return clk->parent->round_rate(clk->parent, rate); | 298 | return clk->parent->round_rate(clk->parent, rate); |
| 444 | } | 299 | } |
| 445 | 300 | ||
| 446 | static int _clk_parent_set_rate(struct clk *clk, unsigned long rate) | 301 | static unsigned long get_rate_parent(struct clk *clk) |
| 302 | { | ||
| 303 | return clk_get_rate(clk->parent); | ||
| 304 | } | ||
| 305 | |||
| 306 | static int set_rate_parent(struct clk *clk, unsigned long rate) | ||
| 447 | { | 307 | { |
| 448 | return clk->parent->set_rate(clk->parent, rate); | 308 | return clk->parent->set_rate(clk->parent, rate); |
| 449 | } | 309 | } |
| @@ -451,1112 +311,380 @@ static int _clk_parent_set_rate(struct clk *clk, unsigned long rate) | |||
| 451 | /* in Hz */ | 311 | /* in Hz */ |
| 452 | static unsigned long external_high_reference = 26000000; | 312 | static unsigned long external_high_reference = 26000000; |
| 453 | 313 | ||
| 454 | static unsigned long get_high_reference_clock_rate(struct clk *clk) | 314 | static unsigned long get_rate_high_reference(struct clk *clk) |
| 455 | { | 315 | { |
| 456 | return external_high_reference; | 316 | return external_high_reference; |
| 457 | } | 317 | } |
| 458 | 318 | ||
| 459 | /* | ||
| 460 | * the high frequency external clock reference | ||
| 461 | * Default case is 26MHz. Could be changed at runtime | ||
| 462 | * with a call to change_external_high_reference() | ||
| 463 | */ | ||
| 464 | static struct clk ckih_clk = { | ||
| 465 | .name = "ckih", | ||
| 466 | .get_rate = get_high_reference_clock_rate, | ||
| 467 | }; | ||
| 468 | |||
| 469 | /* in Hz */ | 319 | /* in Hz */ |
| 470 | static unsigned long external_low_reference = 32768; | 320 | static unsigned long external_low_reference = 32768; |
| 471 | 321 | ||
| 472 | static unsigned long get_low_reference_clock_rate(struct clk *clk) | 322 | static unsigned long get_rate_low_reference(struct clk *clk) |
| 473 | { | 323 | { |
| 474 | return external_low_reference; | 324 | return external_low_reference; |
| 475 | } | 325 | } |
| 476 | 326 | ||
| 477 | /* | 327 | static unsigned long get_rate_fpm(struct clk *clk) |
| 478 | * the low frequency external clock reference | ||
| 479 | * Default case is 32.768kHz Could be changed at runtime | ||
| 480 | * with a call to change_external_low_reference() | ||
| 481 | */ | ||
| 482 | static struct clk ckil_clk = { | ||
| 483 | .name = "ckil", | ||
| 484 | .get_rate = get_low_reference_clock_rate, | ||
| 485 | }; | ||
| 486 | |||
| 487 | static unsigned long get_mpll_clk(struct clk *clk) | ||
| 488 | { | 328 | { |
| 489 | uint32_t reg; | 329 | return clk_get_rate(clk->parent) * 1024; |
| 490 | unsigned long ref_clk; | ||
| 491 | unsigned long mfi = 0, mfn = 0, mfd = 0, pdf = 0; | ||
| 492 | unsigned long long temp; | ||
| 493 | |||
| 494 | ref_clk = clk_get_rate(clk->parent); | ||
| 495 | |||
| 496 | reg = __raw_readl(CCM_MPCTL0); | ||
| 497 | pdf = (reg & CCM_MPCTL0_PD_MASK) >> CCM_MPCTL0_PD_OFFSET; | ||
| 498 | mfd = (reg & CCM_MPCTL0_MFD_MASK) >> CCM_MPCTL0_MFD_OFFSET; | ||
| 499 | mfi = (reg & CCM_MPCTL0_MFI_MASK) >> CCM_MPCTL0_MFI_OFFSET; | ||
| 500 | mfn = (reg & CCM_MPCTL0_MFN_MASK) >> CCM_MPCTL0_MFN_OFFSET; | ||
| 501 | |||
| 502 | mfi = (mfi <= 5) ? 5 : mfi; | ||
| 503 | temp = 2LL * ref_clk * mfn; | ||
| 504 | do_div(temp, mfd + 1); | ||
| 505 | temp = 2LL * ref_clk * mfi + temp; | ||
| 506 | do_div(temp, pdf + 1); | ||
| 507 | |||
| 508 | return (unsigned long)temp; | ||
| 509 | } | 330 | } |
| 510 | 331 | ||
| 511 | static struct clk mpll_clk = { | 332 | static unsigned long get_rate_mpll(struct clk *clk) |
| 512 | .name = "mpll", | 333 | { |
| 513 | .parent = &ckih_clk, | 334 | return mxc_decode_pll(__raw_readl(CCM_MPCTL0), |
| 514 | .get_rate = get_mpll_clk, | 335 | clk_get_rate(clk->parent)); |
| 515 | }; | 336 | } |
| 516 | 337 | ||
| 517 | static unsigned long _clk_mpll_main_get_rate(struct clk *clk) | 338 | static unsigned long get_rate_mpll_main(struct clk *clk) |
| 518 | { | 339 | { |
| 519 | unsigned long parent_rate; | 340 | unsigned long parent_rate; |
| 520 | 341 | ||
| 521 | parent_rate = clk_get_rate(clk->parent); | 342 | parent_rate = clk_get_rate(clk->parent); |
| 522 | 343 | ||
| 523 | /* i.MX27 TO2: | 344 | /* i.MX27 TO2: |
| 524 | * clk->id == 0: arm clock source path 1 which is from 2*MPLL/DIV_2 | 345 | * clk->id == 0: arm clock source path 1 which is from 2 * MPLL / 2 |
| 525 | * clk->id == 1: arm clock source path 2 which is from 2*MPLL/DIV_3 | 346 | * clk->id == 1: arm clock source path 2 which is from 2 * MPLL / 3 |
| 526 | */ | 347 | */ |
| 527 | |||
| 528 | if (mx27_revision() >= CHIP_REV_2_0 && clk->id == 1) | 348 | if (mx27_revision() >= CHIP_REV_2_0 && clk->id == 1) |
| 529 | return 2UL * parent_rate / 3UL; | 349 | return 2UL * parent_rate / 3UL; |
| 530 | 350 | ||
| 531 | return parent_rate; | 351 | return parent_rate; |
| 532 | } | 352 | } |
| 533 | 353 | ||
| 534 | static struct clk mpll_main_clk[] = { | 354 | static unsigned long get_rate_spll(struct clk *clk) |
| 535 | { | ||
| 536 | /* For i.MX27 TO2, it is the MPLL path 1 of ARM core | ||
| 537 | * It provide the clock source whose rate is same as MPLL | ||
| 538 | */ | ||
| 539 | .name = "mpll_main", | ||
| 540 | .id = 0, | ||
| 541 | .parent = &mpll_clk, | ||
| 542 | .get_rate = _clk_mpll_main_get_rate | ||
| 543 | }, { | ||
| 544 | /* For i.MX27 TO2, it is the MPLL path 2 of ARM core | ||
| 545 | * It provide the clock source whose rate is same MPLL * 2/3 | ||
| 546 | */ | ||
| 547 | .name = "mpll_main", | ||
| 548 | .id = 1, | ||
| 549 | .parent = &mpll_clk, | ||
| 550 | .get_rate = _clk_mpll_main_get_rate | ||
| 551 | } | ||
| 552 | }; | ||
| 553 | |||
| 554 | static unsigned long get_spll_clk(struct clk *clk) | ||
| 555 | { | 355 | { |
| 556 | uint32_t reg; | 356 | uint32_t reg; |
| 557 | unsigned long ref_clk; | 357 | unsigned long rate; |
| 558 | unsigned long mfi = 0, mfn = 0, mfd = 0, pdf = 0; | ||
| 559 | unsigned long long temp; | ||
| 560 | 358 | ||
| 561 | ref_clk = clk_get_rate(clk->parent); | 359 | rate = clk_get_rate(clk->parent); |
| 562 | 360 | ||
| 563 | reg = __raw_readl(CCM_SPCTL0); | 361 | reg = __raw_readl(CCM_SPCTL0); |
| 564 | /*TODO: This is TO2 Bug */ | 362 | |
| 363 | /* On TO2 we have to write the value back. Otherwise we | ||
| 364 | * read 0 from this register the next time. | ||
| 365 | */ | ||
| 565 | if (mx27_revision() >= CHIP_REV_2_0) | 366 | if (mx27_revision() >= CHIP_REV_2_0) |
| 566 | __raw_writel(reg, CCM_SPCTL0); | 367 | __raw_writel(reg, CCM_SPCTL0); |
| 567 | 368 | ||
| 568 | pdf = (reg & CCM_SPCTL0_PD_MASK) >> CCM_SPCTL0_PD_OFFSET; | 369 | return mxc_decode_pll(reg, rate); |
| 569 | mfd = (reg & CCM_SPCTL0_MFD_MASK) >> CCM_SPCTL0_MFD_OFFSET; | ||
| 570 | mfi = (reg & CCM_SPCTL0_MFI_MASK) >> CCM_SPCTL0_MFI_OFFSET; | ||
| 571 | mfn = (reg & CCM_SPCTL0_MFN_MASK) >> CCM_SPCTL0_MFN_OFFSET; | ||
| 572 | |||
| 573 | mfi = (mfi <= 5) ? 5 : mfi; | ||
| 574 | temp = 2LL * ref_clk * mfn; | ||
| 575 | do_div(temp, mfd + 1); | ||
| 576 | temp = 2LL * ref_clk * mfi + temp; | ||
| 577 | do_div(temp, pdf + 1); | ||
| 578 | |||
| 579 | return (unsigned long)temp; | ||
| 580 | } | 370 | } |
| 581 | 371 | ||
| 582 | static struct clk spll_clk = { | 372 | static unsigned long get_rate_cpu(struct clk *clk) |
| 583 | .name = "spll", | ||
| 584 | .parent = &ckih_clk, | ||
| 585 | .get_rate = get_spll_clk, | ||
| 586 | .enable = _clk_spll_enable, | ||
| 587 | .disable = _clk_spll_disable, | ||
| 588 | }; | ||
| 589 | |||
| 590 | static unsigned long get_cpu_clk(struct clk *clk) | ||
| 591 | { | 373 | { |
| 592 | u32 div; | 374 | u32 div; |
| 593 | unsigned long rate; | 375 | unsigned long rate; |
| 594 | 376 | ||
| 595 | if (mx27_revision() >= CHIP_REV_2_0) | 377 | if (mx27_revision() >= CHIP_REV_2_0) |
| 596 | div = (CSCR() & CCM_CSCR_ARM_MASK) >> CCM_CSCR_ARM_OFFSET; | 378 | div = (__raw_readl(CCM_CSCR) >> 12) & 0x3; |
| 597 | else | 379 | else |
| 598 | div = (CSCR() & CCM_CSCR_PRESC_MASK) >> CCM_CSCR_PRESC_OFFSET; | 380 | div = (__raw_readl(CCM_CSCR) >> 13) & 0x7; |
| 599 | 381 | ||
| 600 | rate = clk_get_rate(clk->parent); | 382 | rate = clk_get_rate(clk->parent); |
| 601 | return rate / (div + 1); | 383 | return rate / (div + 1); |
| 602 | } | 384 | } |
| 603 | 385 | ||
| 604 | static struct clk cpu_clk = { | 386 | static unsigned long get_rate_ahb(struct clk *clk) |
| 605 | .name = "cpu_clk", | ||
| 606 | .parent = &mpll_main_clk[1], | ||
| 607 | .set_parent = _clk_cpu_set_parent, | ||
| 608 | .round_rate = _clk_cpu_round_rate, | ||
| 609 | .get_rate = get_cpu_clk, | ||
| 610 | .set_rate = _clk_cpu_set_rate, | ||
| 611 | }; | ||
| 612 | |||
| 613 | static unsigned long get_ahb_clk(struct clk *clk) | ||
| 614 | { | 387 | { |
| 615 | unsigned long rate; | 388 | unsigned long rate, bclk_pdf; |
| 616 | unsigned long bclk_pdf; | ||
| 617 | 389 | ||
| 618 | if (mx27_revision() >= CHIP_REV_2_0) | 390 | if (mx27_revision() >= CHIP_REV_2_0) |
| 619 | bclk_pdf = (CSCR() & CCM_CSCR_AHB_MASK) | 391 | bclk_pdf = (__raw_readl(CCM_CSCR) >> 8) & 0x3; |
| 620 | >> CCM_CSCR_AHB_OFFSET; | ||
| 621 | else | 392 | else |
| 622 | bclk_pdf = (CSCR() & CCM_CSCR_BCLK_MASK) | 393 | bclk_pdf = (__raw_readl(CCM_CSCR) >> 9) & 0xf; |
| 623 | >> CCM_CSCR_BCLK_OFFSET; | ||
| 624 | 394 | ||
| 625 | rate = clk_get_rate(clk->parent); | 395 | rate = clk_get_rate(clk->parent); |
| 626 | return rate / (bclk_pdf + 1); | 396 | return rate / (bclk_pdf + 1); |
| 627 | } | 397 | } |
| 628 | 398 | ||
| 629 | static struct clk ahb_clk = { | 399 | static unsigned long get_rate_ipg(struct clk *clk) |
| 630 | .name = "ahb_clk", | ||
| 631 | .parent = &mpll_main_clk[1], | ||
| 632 | .get_rate = get_ahb_clk, | ||
| 633 | }; | ||
| 634 | |||
| 635 | static unsigned long get_ipg_clk(struct clk *clk) | ||
| 636 | { | 400 | { |
| 637 | unsigned long rate; | 401 | unsigned long rate, ipg_pdf; |
| 638 | unsigned long ipg_pdf; | ||
| 639 | 402 | ||
| 640 | if (mx27_revision() >= CHIP_REV_2_0) | 403 | if (mx27_revision() >= CHIP_REV_2_0) |
| 641 | return clk_get_rate(clk->parent); | 404 | return clk_get_rate(clk->parent); |
| 642 | else | 405 | else |
| 643 | ipg_pdf = (CSCR() & CCM_CSCR_IPDIV) >> CCM_CSCR_IPDIV_OFFSET; | 406 | ipg_pdf = (__raw_readl(CCM_CSCR) >> 8) & 1; |
| 644 | 407 | ||
| 645 | rate = clk_get_rate(clk->parent); | 408 | rate = clk_get_rate(clk->parent); |
| 646 | return rate / (ipg_pdf + 1); | 409 | return rate / (ipg_pdf + 1); |
| 647 | } | 410 | } |
| 648 | 411 | ||
| 649 | static struct clk ipg_clk = { | 412 | static unsigned long get_rate_per(struct clk *clk) |
| 650 | .name = "ipg_clk", | ||
| 651 | .parent = &ahb_clk, | ||
| 652 | .get_rate = get_ipg_clk, | ||
| 653 | }; | ||
| 654 | |||
| 655 | static unsigned long _clk_perclkx_recalc(struct clk *clk) | ||
| 656 | { | 413 | { |
| 657 | unsigned long perclk_pdf; | 414 | unsigned long perclk_pdf, parent_rate; |
| 658 | unsigned long parent_rate; | ||
| 659 | 415 | ||
| 660 | parent_rate = clk_get_rate(clk->parent); | 416 | parent_rate = clk_get_rate(clk->parent); |
| 661 | 417 | ||
| 662 | if (clk->id < 0 || clk->id > 3) | 418 | if (clk->id < 0 || clk->id > 3) |
| 663 | return 0; | 419 | return 0; |
| 664 | 420 | ||
| 665 | perclk_pdf = (PCDR1() >> (clk->id << 3)) & CCM_PCDR1_PERDIV1_MASK; | 421 | perclk_pdf = (__raw_readl(CCM_PCDR1) >> (clk->id << 3)) & 0x3f; |
| 666 | 422 | ||
| 667 | return parent_rate / (perclk_pdf + 1); | 423 | return parent_rate / (perclk_pdf + 1); |
| 668 | } | 424 | } |
| 669 | 425 | ||
| 670 | static struct clk per_clk[] = { | 426 | /* |
| 671 | { | 427 | * the high frequency external clock reference |
| 672 | .name = "per_clk", | 428 | * Default case is 26MHz. Could be changed at runtime |
| 673 | .id = 0, | 429 | * with a call to change_external_high_reference() |
| 674 | .parent = &mpll_main_clk[1], | 430 | */ |
| 675 | .get_rate = _clk_perclkx_recalc, | 431 | static struct clk ckih_clk = { |
| 676 | .enable = _clk_enable, | 432 | .get_rate = get_rate_high_reference, |
| 677 | .enable_reg = CCM_PCCR1, | ||
| 678 | .enable_shift = CCM_PCCR1_PERCLK1_OFFSET, | ||
| 679 | .disable = _clk_disable, | ||
| 680 | }, { | ||
| 681 | .name = "per_clk", | ||
| 682 | .id = 1, | ||
| 683 | .parent = &mpll_main_clk[1], | ||
| 684 | .get_rate = _clk_perclkx_recalc, | ||
| 685 | .enable = _clk_enable, | ||
| 686 | .enable_reg = CCM_PCCR1, | ||
| 687 | .enable_shift = CCM_PCCR1_PERCLK2_OFFSET, | ||
| 688 | .disable = _clk_disable, | ||
| 689 | }, { | ||
| 690 | .name = "per_clk", | ||
| 691 | .id = 2, | ||
| 692 | .parent = &mpll_main_clk[1], | ||
| 693 | .round_rate = _clk_perclkx_round_rate, | ||
| 694 | .set_rate = _clk_perclkx_set_rate, | ||
| 695 | .get_rate = _clk_perclkx_recalc, | ||
| 696 | .enable = _clk_enable, | ||
| 697 | .enable_reg = CCM_PCCR1, | ||
| 698 | .enable_shift = CCM_PCCR1_PERCLK3_OFFSET, | ||
| 699 | .disable = _clk_disable, | ||
| 700 | }, { | ||
| 701 | .name = "per_clk", | ||
| 702 | .id = 3, | ||
| 703 | .parent = &mpll_main_clk[1], | ||
| 704 | .round_rate = _clk_perclkx_round_rate, | ||
| 705 | .set_rate = _clk_perclkx_set_rate, | ||
| 706 | .get_rate = _clk_perclkx_recalc, | ||
| 707 | .enable = _clk_enable, | ||
| 708 | .enable_reg = CCM_PCCR1, | ||
| 709 | .enable_shift = CCM_PCCR1_PERCLK4_OFFSET, | ||
| 710 | .disable = _clk_disable, | ||
| 711 | }, | ||
| 712 | }; | ||
| 713 | |||
| 714 | struct clk uart1_clk[] = { | ||
| 715 | { | ||
| 716 | .name = "uart_clk", | ||
| 717 | .id = 0, | ||
| 718 | .parent = &per_clk[0], | ||
| 719 | .secondary = &uart1_clk[1], | ||
| 720 | }, { | ||
| 721 | .name = "uart_ipg_clk", | ||
| 722 | .id = 0, | ||
| 723 | .parent = &ipg_clk, | ||
| 724 | .enable = _clk_enable, | ||
| 725 | .enable_reg = CCM_PCCR1, | ||
| 726 | .enable_shift = CCM_PCCR1_UART1_OFFSET, | ||
| 727 | .disable = _clk_disable, | ||
| 728 | }, | ||
| 729 | }; | ||
| 730 | |||
| 731 | struct clk uart2_clk[] = { | ||
| 732 | { | ||
| 733 | .name = "uart_clk", | ||
| 734 | .id = 1, | ||
| 735 | .parent = &per_clk[0], | ||
| 736 | .secondary = &uart2_clk[1], | ||
| 737 | }, { | ||
| 738 | .name = "uart_ipg_clk", | ||
| 739 | .id = 1, | ||
| 740 | .parent = &ipg_clk, | ||
| 741 | .enable = _clk_enable, | ||
| 742 | .enable_reg = CCM_PCCR1, | ||
| 743 | .enable_shift = CCM_PCCR1_UART2_OFFSET, | ||
| 744 | .disable = _clk_disable, | ||
| 745 | }, | ||
| 746 | }; | ||
| 747 | |||
| 748 | struct clk uart3_clk[] = { | ||
| 749 | { | ||
| 750 | .name = "uart_clk", | ||
| 751 | .id = 2, | ||
| 752 | .parent = &per_clk[0], | ||
| 753 | .secondary = &uart3_clk[1], | ||
| 754 | }, { | ||
| 755 | .name = "uart_ipg_clk", | ||
| 756 | .id = 2, | ||
| 757 | .parent = &ipg_clk, | ||
| 758 | .enable = _clk_enable, | ||
| 759 | .enable_reg = CCM_PCCR1, | ||
| 760 | .enable_shift = CCM_PCCR1_UART3_OFFSET, | ||
| 761 | .disable = _clk_disable, | ||
| 762 | }, | ||
| 763 | }; | ||
| 764 | |||
| 765 | struct clk uart4_clk[] = { | ||
| 766 | { | ||
| 767 | .name = "uart_clk", | ||
| 768 | .id = 3, | ||
| 769 | .parent = &per_clk[0], | ||
| 770 | .secondary = &uart4_clk[1], | ||
| 771 | }, { | ||
| 772 | .name = "uart_ipg_clk", | ||
| 773 | .id = 3, | ||
| 774 | .parent = &ipg_clk, | ||
| 775 | .enable = _clk_enable, | ||
| 776 | .enable_reg = CCM_PCCR1, | ||
| 777 | .enable_shift = CCM_PCCR1_UART4_OFFSET, | ||
| 778 | .disable = _clk_disable, | ||
| 779 | }, | ||
| 780 | }; | ||
| 781 | |||
| 782 | struct clk uart5_clk[] = { | ||
| 783 | { | ||
| 784 | .name = "uart_clk", | ||
| 785 | .id = 4, | ||
| 786 | .parent = &per_clk[0], | ||
| 787 | .secondary = &uart5_clk[1], | ||
| 788 | }, { | ||
| 789 | .name = "uart_ipg_clk", | ||
| 790 | .id = 4, | ||
| 791 | .parent = &ipg_clk, | ||
| 792 | .enable = _clk_enable, | ||
| 793 | .enable_reg = CCM_PCCR1, | ||
| 794 | .enable_shift = CCM_PCCR1_UART5_OFFSET, | ||
| 795 | .disable = _clk_disable, | ||
| 796 | }, | ||
| 797 | }; | ||
| 798 | |||
| 799 | struct clk uart6_clk[] = { | ||
| 800 | { | ||
| 801 | .name = "uart_clk", | ||
| 802 | .id = 5, | ||
| 803 | .parent = &per_clk[0], | ||
| 804 | .secondary = &uart6_clk[1], | ||
| 805 | }, { | ||
| 806 | .name = "uart_ipg_clk", | ||
| 807 | .id = 5, | ||
| 808 | .parent = &ipg_clk, | ||
| 809 | .enable = _clk_enable, | ||
| 810 | .enable_reg = CCM_PCCR1, | ||
| 811 | .enable_shift = CCM_PCCR1_UART6_OFFSET, | ||
| 812 | .disable = _clk_disable, | ||
| 813 | }, | ||
| 814 | }; | ||
| 815 | |||
| 816 | static struct clk gpt1_clk[] = { | ||
| 817 | { | ||
| 818 | .name = "gpt_clk", | ||
| 819 | .id = 0, | ||
| 820 | .parent = &per_clk[0], | ||
| 821 | .secondary = &gpt1_clk[1], | ||
| 822 | }, { | ||
| 823 | .name = "gpt_ipg_clk", | ||
| 824 | .id = 0, | ||
| 825 | .parent = &ipg_clk, | ||
| 826 | .enable = _clk_enable, | ||
| 827 | .enable_reg = CCM_PCCR0, | ||
| 828 | .enable_shift = CCM_PCCR0_GPT1_OFFSET, | ||
| 829 | .disable = _clk_disable, | ||
| 830 | }, | ||
| 831 | }; | ||
| 832 | |||
| 833 | static struct clk gpt2_clk[] = { | ||
| 834 | { | ||
| 835 | .name = "gpt_clk", | ||
| 836 | .id = 1, | ||
| 837 | .parent = &per_clk[0], | ||
| 838 | .secondary = &gpt2_clk[1], | ||
| 839 | }, { | ||
| 840 | .name = "gpt_ipg_clk", | ||
| 841 | .id = 1, | ||
| 842 | .parent = &ipg_clk, | ||
| 843 | .enable = _clk_enable, | ||
| 844 | .enable_reg = CCM_PCCR0, | ||
| 845 | .enable_shift = CCM_PCCR0_GPT2_OFFSET, | ||
| 846 | .disable = _clk_disable, | ||
| 847 | }, | ||
| 848 | }; | ||
| 849 | |||
| 850 | static struct clk gpt3_clk[] = { | ||
| 851 | { | ||
| 852 | .name = "gpt_clk", | ||
| 853 | .id = 2, | ||
| 854 | .parent = &per_clk[0], | ||
| 855 | .secondary = &gpt3_clk[1], | ||
| 856 | }, { | ||
| 857 | .name = "gpt_ipg_clk", | ||
| 858 | .id = 2, | ||
| 859 | .parent = &ipg_clk, | ||
| 860 | .enable = _clk_enable, | ||
| 861 | .enable_reg = CCM_PCCR0, | ||
| 862 | .enable_shift = CCM_PCCR0_GPT3_OFFSET, | ||
| 863 | .disable = _clk_disable, | ||
| 864 | }, | ||
| 865 | }; | ||
| 866 | |||
| 867 | static struct clk gpt4_clk[] = { | ||
| 868 | { | ||
| 869 | .name = "gpt_clk", | ||
| 870 | .id = 3, | ||
| 871 | .parent = &per_clk[0], | ||
| 872 | .secondary = &gpt4_clk[1], | ||
| 873 | }, { | ||
| 874 | .name = "gpt_ipg_clk", | ||
| 875 | .id = 3, | ||
| 876 | .parent = &ipg_clk, | ||
| 877 | .enable = _clk_enable, | ||
| 878 | .enable_reg = CCM_PCCR0, | ||
| 879 | .enable_shift = CCM_PCCR0_GPT4_OFFSET, | ||
| 880 | .disable = _clk_disable, | ||
| 881 | }, | ||
| 882 | }; | ||
| 883 | |||
| 884 | static struct clk gpt5_clk[] = { | ||
| 885 | { | ||
| 886 | .name = "gpt_clk", | ||
| 887 | .id = 4, | ||
| 888 | .parent = &per_clk[0], | ||
| 889 | .secondary = &gpt5_clk[1], | ||
| 890 | }, { | ||
| 891 | .name = "gpt_ipg_clk", | ||
| 892 | .id = 4, | ||
| 893 | .parent = &ipg_clk, | ||
| 894 | .enable = _clk_enable, | ||
| 895 | .enable_reg = CCM_PCCR0, | ||
| 896 | .enable_shift = CCM_PCCR0_GPT5_OFFSET, | ||
| 897 | .disable = _clk_disable, | ||
| 898 | }, | ||
| 899 | }; | 433 | }; |
| 900 | 434 | ||
| 901 | static struct clk gpt6_clk[] = { | 435 | static struct clk mpll_clk = { |
| 902 | { | 436 | .parent = &ckih_clk, |
| 903 | .name = "gpt_clk", | 437 | .get_rate = get_rate_mpll, |
| 904 | .id = 5, | ||
| 905 | .parent = &per_clk[0], | ||
| 906 | .secondary = &gpt6_clk[1], | ||
| 907 | }, { | ||
| 908 | .name = "gpt_ipg_clk", | ||
| 909 | .id = 5, | ||
| 910 | .parent = &ipg_clk, | ||
| 911 | .enable = _clk_enable, | ||
| 912 | .enable_reg = CCM_PCCR0, | ||
| 913 | .enable_shift = CCM_PCCR0_GPT6_OFFSET, | ||
| 914 | .disable = _clk_disable, | ||
| 915 | }, | ||
| 916 | }; | 438 | }; |
| 917 | 439 | ||
| 918 | static struct clk pwm_clk[] = { | 440 | /* For i.MX27 TO2, it is the MPLL path 1 of ARM core |
| 919 | { | 441 | * It provides the clock source whose rate is same as MPLL |
| 920 | .name = "pwm_clk", | 442 | */ |
| 921 | .parent = &per_clk[0], | 443 | static struct clk mpll_main1_clk = { |
| 922 | .secondary = &pwm_clk[1], | 444 | .id = 0, |
| 923 | }, { | 445 | .parent = &mpll_clk, |
| 924 | .name = "pwm_clk", | 446 | .get_rate = get_rate_mpll_main, |
| 925 | .parent = &ipg_clk, | ||
| 926 | .enable = _clk_enable, | ||
| 927 | .enable_reg = CCM_PCCR0, | ||
| 928 | .enable_shift = CCM_PCCR0_PWM_OFFSET, | ||
| 929 | .disable = _clk_disable, | ||
| 930 | }, | ||
| 931 | }; | 447 | }; |
| 932 | 448 | ||
| 933 | static struct clk sdhc1_clk[] = { | 449 | /* For i.MX27 TO2, it is the MPLL path 2 of ARM core |
| 934 | { | 450 | * It provides the clock source whose rate is same MPLL * 2 / 3 |
| 935 | .name = "sdhc_clk", | 451 | */ |
| 936 | .id = 0, | 452 | static struct clk mpll_main2_clk = { |
| 937 | .parent = &per_clk[1], | 453 | .id = 1, |
| 938 | .secondary = &sdhc1_clk[1], | 454 | .parent = &mpll_clk, |
| 939 | }, { | 455 | .get_rate = get_rate_mpll_main, |
| 940 | .name = "sdhc_ipg_clk", | ||
| 941 | .id = 0, | ||
| 942 | .parent = &ipg_clk, | ||
| 943 | .enable = _clk_enable, | ||
| 944 | .enable_reg = CCM_PCCR0, | ||
| 945 | .enable_shift = CCM_PCCR0_SDHC1_OFFSET, | ||
| 946 | .disable = _clk_disable, | ||
| 947 | }, | ||
| 948 | }; | 456 | }; |
| 949 | 457 | ||
| 950 | static struct clk sdhc2_clk[] = { | 458 | static struct clk ahb_clk = { |
| 951 | { | 459 | .parent = &mpll_main2_clk, |
| 952 | .name = "sdhc_clk", | 460 | .get_rate = get_rate_ahb, |
| 953 | .id = 1, | ||
| 954 | .parent = &per_clk[1], | ||
| 955 | .secondary = &sdhc2_clk[1], | ||
| 956 | }, { | ||
| 957 | .name = "sdhc_ipg_clk", | ||
| 958 | .id = 1, | ||
| 959 | .parent = &ipg_clk, | ||
| 960 | .enable = _clk_enable, | ||
| 961 | .enable_reg = CCM_PCCR0, | ||
| 962 | .enable_shift = CCM_PCCR0_SDHC2_OFFSET, | ||
| 963 | .disable = _clk_disable, | ||
| 964 | }, | ||
| 965 | }; | 461 | }; |
| 966 | 462 | ||
| 967 | static struct clk sdhc3_clk[] = { | 463 | static struct clk ipg_clk = { |
| 968 | { | 464 | .parent = &ahb_clk, |
| 969 | .name = "sdhc_clk", | 465 | .get_rate = get_rate_ipg, |
| 970 | .id = 2, | ||
| 971 | .parent = &per_clk[1], | ||
| 972 | .secondary = &sdhc3_clk[1], | ||
| 973 | }, { | ||
| 974 | .name = "sdhc_ipg_clk", | ||
| 975 | .id = 2, | ||
| 976 | .parent = &ipg_clk, | ||
| 977 | .enable = _clk_enable, | ||
| 978 | .enable_reg = CCM_PCCR0, | ||
| 979 | .enable_shift = CCM_PCCR0_SDHC3_OFFSET, | ||
| 980 | .disable = _clk_disable, | ||
| 981 | }, | ||
| 982 | }; | 466 | }; |
| 983 | 467 | ||
| 984 | static struct clk cspi1_clk[] = { | 468 | static struct clk cpu_clk = { |
| 985 | { | 469 | .parent = &mpll_main2_clk, |
| 986 | .name = "cspi_clk", | 470 | .set_parent = clk_cpu_set_parent, |
| 987 | .id = 0, | 471 | .round_rate = round_rate_cpu, |
| 988 | .parent = &per_clk[1], | 472 | .get_rate = get_rate_cpu, |
| 989 | .secondary = &cspi1_clk[1], | 473 | .set_rate = set_rate_cpu, |
| 990 | }, { | ||
| 991 | .name = "cspi_ipg_clk", | ||
| 992 | .id = 0, | ||
| 993 | .parent = &ipg_clk, | ||
| 994 | .enable = _clk_enable, | ||
| 995 | .enable_reg = CCM_PCCR0, | ||
| 996 | .enable_shift = CCM_PCCR0_CSPI1_OFFSET, | ||
| 997 | .disable = _clk_disable, | ||
| 998 | }, | ||
| 999 | }; | 474 | }; |
| 1000 | 475 | ||
| 1001 | static struct clk cspi2_clk[] = { | 476 | static struct clk spll_clk = { |
| 1002 | { | 477 | .parent = &ckih_clk, |
| 1003 | .name = "cspi_clk", | 478 | .get_rate = get_rate_spll, |
| 1004 | .id = 1, | 479 | .enable = clk_spll_enable, |
| 1005 | .parent = &per_clk[1], | 480 | .disable = clk_spll_disable, |
| 1006 | .secondary = &cspi2_clk[1], | ||
| 1007 | }, { | ||
| 1008 | .name = "cspi_ipg_clk", | ||
| 1009 | .id = 1, | ||
| 1010 | .parent = &ipg_clk, | ||
| 1011 | .enable = _clk_enable, | ||
| 1012 | .enable_reg = CCM_PCCR0, | ||
| 1013 | .enable_shift = CCM_PCCR0_CSPI2_OFFSET, | ||
| 1014 | .disable = _clk_disable, | ||
| 1015 | }, | ||
| 1016 | }; | 481 | }; |
| 1017 | 482 | ||
| 1018 | static struct clk cspi3_clk[] = { | 483 | /* |
| 1019 | { | 484 | * the low frequency external clock reference |
| 1020 | .name = "cspi_clk", | 485 | * Default case is 32.768kHz. |
| 1021 | .id = 2, | 486 | */ |
| 1022 | .parent = &per_clk[1], | 487 | static struct clk ckil_clk = { |
| 1023 | .secondary = &cspi3_clk[1], | 488 | .get_rate = get_rate_low_reference, |
| 1024 | }, { | ||
| 1025 | .name = "cspi_ipg_clk", | ||
| 1026 | .id = 2, | ||
| 1027 | .parent = &ipg_clk, | ||
| 1028 | .enable = _clk_enable, | ||
| 1029 | .enable_reg = CCM_PCCR0, | ||
| 1030 | .enable_shift = CCM_PCCR0_CSPI3_OFFSET, | ||
| 1031 | .disable = _clk_disable, | ||
| 1032 | }, | ||
| 1033 | }; | 489 | }; |
| 1034 | 490 | ||
| 1035 | static struct clk lcdc_clk[] = { | 491 | /* Output of frequency pre multiplier */ |
| 1036 | { | 492 | static struct clk fpm_clk = { |
| 1037 | .name = "lcdc_clk", | 493 | .parent = &ckil_clk, |
| 1038 | .parent = &per_clk[2], | 494 | .get_rate = get_rate_fpm, |
| 1039 | .secondary = &lcdc_clk[1], | ||
| 1040 | .round_rate = _clk_parent_round_rate, | ||
| 1041 | .set_rate = _clk_parent_set_rate, | ||
| 1042 | }, { | ||
| 1043 | .name = "lcdc_ipg_clk", | ||
| 1044 | .parent = &ipg_clk, | ||
| 1045 | .secondary = &lcdc_clk[2], | ||
| 1046 | .enable = _clk_enable, | ||
| 1047 | .enable_reg = CCM_PCCR0, | ||
| 1048 | .enable_shift = CCM_PCCR0_LCDC_OFFSET, | ||
| 1049 | .disable = _clk_disable, | ||
| 1050 | }, { | ||
| 1051 | .name = "lcdc_ahb_clk", | ||
| 1052 | .parent = &ahb_clk, | ||
| 1053 | .enable = _clk_enable, | ||
| 1054 | .enable_reg = CCM_PCCR1, | ||
| 1055 | .enable_shift = CCM_PCCR1_HCLK_LCDC_OFFSET, | ||
| 1056 | .disable = _clk_disable, | ||
| 1057 | }, | ||
| 1058 | }; | 495 | }; |
| 1059 | 496 | ||
| 1060 | static struct clk csi_clk[] = { | 497 | #define PCCR0 CCM_PCCR0 |
| 1061 | { | 498 | #define PCCR1 CCM_PCCR1 |
| 1062 | .name = "csi_perclk", | ||
| 1063 | .parent = &per_clk[3], | ||
| 1064 | .secondary = &csi_clk[1], | ||
| 1065 | .round_rate = _clk_parent_round_rate, | ||
| 1066 | .set_rate = _clk_parent_set_rate, | ||
| 1067 | }, { | ||
| 1068 | .name = "csi_ahb_clk", | ||
| 1069 | .parent = &ahb_clk, | ||
| 1070 | .enable = _clk_enable, | ||
| 1071 | .enable_reg = CCM_PCCR1, | ||
| 1072 | .enable_shift = CCM_PCCR1_HCLK_CSI_OFFSET, | ||
| 1073 | .disable = _clk_disable, | ||
| 1074 | }, | ||
| 1075 | }; | ||
| 1076 | 499 | ||
| 1077 | static struct clk usb_clk[] = { | 500 | #define DEFINE_CLOCK(name, i, er, es, gr, s, p) \ |
| 1078 | { | 501 | static struct clk name = { \ |
| 1079 | .name = "usb_clk", | 502 | .id = i, \ |
| 1080 | .parent = &spll_clk, | 503 | .enable_reg = er, \ |
| 1081 | .get_rate = _clk_usb_recalc, | 504 | .enable_shift = es, \ |
| 1082 | .enable = _clk_enable, | 505 | .get_rate = gr, \ |
| 1083 | .enable_reg = CCM_PCCR1, | 506 | .enable = clk_pccr_enable, \ |
| 1084 | .enable_shift = CCM_PCCR1_USBOTG_OFFSET, | 507 | .disable = clk_pccr_disable, \ |
| 1085 | .disable = _clk_disable, | 508 | .secondary = s, \ |
| 1086 | }, { | 509 | .parent = p, \ |
| 1087 | .name = "usb_ahb_clk", | ||
| 1088 | .parent = &ahb_clk, | ||
| 1089 | .enable = _clk_enable, | ||
| 1090 | .enable_reg = CCM_PCCR1, | ||
| 1091 | .enable_shift = CCM_PCCR1_HCLK_USBOTG_OFFSET, | ||
| 1092 | .disable = _clk_disable, | ||
| 1093 | } | 510 | } |
| 1094 | }; | ||
| 1095 | 511 | ||
| 1096 | static struct clk ssi1_clk[] = { | 512 | #define DEFINE_CLOCK1(name, i, er, es, getsetround, s, p) \ |
| 1097 | { | 513 | static struct clk name = { \ |
| 1098 | .name = "ssi_clk", | 514 | .id = i, \ |
| 1099 | .id = 0, | 515 | .enable_reg = er, \ |
| 1100 | .parent = &mpll_main_clk[1], | 516 | .enable_shift = es, \ |
| 1101 | .secondary = &ssi1_clk[1], | 517 | .get_rate = get_rate_##getsetround, \ |
| 1102 | .get_rate = _clk_ssi1_recalc, | 518 | .set_rate = set_rate_##getsetround, \ |
| 1103 | .enable = _clk_enable, | 519 | .round_rate = round_rate_##getsetround, \ |
| 1104 | .enable_reg = CCM_PCCR1, | 520 | .enable = clk_pccr_enable, \ |
| 1105 | .enable_shift = CCM_PCCR1_SSI1_BAUD_OFFSET, | 521 | .disable = clk_pccr_disable, \ |
| 1106 | .disable = _clk_disable, | 522 | .secondary = s, \ |
| 1107 | }, { | 523 | .parent = p, \ |
| 1108 | .name = "ssi_ipg_clk", | 524 | } |
| 1109 | .id = 0, | ||
| 1110 | .parent = &ipg_clk, | ||
| 1111 | .enable = _clk_enable, | ||
| 1112 | .enable_reg = CCM_PCCR0, | ||
| 1113 | .enable_shift = CCM_PCCR0_SSI1_IPG_OFFSET, | ||
| 1114 | .disable = _clk_disable, | ||
| 1115 | }, | ||
| 1116 | }; | ||
| 1117 | 525 | ||
| 1118 | static struct clk ssi2_clk[] = { | 526 | /* Forward declaration to keep the following list in order */ |
| 1119 | { | 527 | static struct clk slcdc_clk1, sahara2_clk1, rtic_clk1, fec_clk1, emma_clk1, |
| 1120 | .name = "ssi_clk", | 528 | dma_clk1, lcdc_clk2, vpu_clk1; |
| 1121 | .id = 1, | 529 | |
| 1122 | .parent = &mpll_main_clk[1], | 530 | /* All clocks we can gate through PCCRx in the order of PCCRx bits */ |
| 1123 | .secondary = &ssi2_clk[1], | 531 | DEFINE_CLOCK(ssi2_clk1, 1, PCCR0, 0, NULL, NULL, &ipg_clk); |
| 1124 | .get_rate = _clk_ssi2_recalc, | 532 | DEFINE_CLOCK(ssi1_clk1, 0, PCCR0, 1, NULL, NULL, &ipg_clk); |
| 1125 | .enable = _clk_enable, | 533 | DEFINE_CLOCK(slcdc_clk, 0, PCCR0, 2, NULL, &slcdc_clk1, &ahb_clk); |
| 1126 | .enable_reg = CCM_PCCR1, | 534 | DEFINE_CLOCK(sdhc3_clk1, 0, PCCR0, 3, NULL, NULL, &ipg_clk); |
| 1127 | .enable_shift = CCM_PCCR1_SSI2_BAUD_OFFSET, | 535 | DEFINE_CLOCK(sdhc2_clk1, 0, PCCR0, 4, NULL, NULL, &ipg_clk); |
| 1128 | .disable = _clk_disable, | 536 | DEFINE_CLOCK(sdhc1_clk1, 0, PCCR0, 5, NULL, NULL, &ipg_clk); |
| 1129 | }, { | 537 | DEFINE_CLOCK(scc_clk, 0, PCCR0, 6, NULL, NULL, &ipg_clk); |
| 1130 | .name = "ssi_ipg_clk", | 538 | DEFINE_CLOCK(sahara2_clk, 0, PCCR0, 7, NULL, &sahara2_clk1, &ahb_clk); |
| 1131 | .id = 1, | 539 | DEFINE_CLOCK(rtic_clk, 0, PCCR0, 8, NULL, &rtic_clk1, &ahb_clk); |
| 1132 | .parent = &ipg_clk, | 540 | DEFINE_CLOCK(rtc_clk, 0, PCCR0, 9, NULL, NULL, &ipg_clk); |
| 1133 | .enable = _clk_enable, | 541 | DEFINE_CLOCK(pwm_clk1, 0, PCCR0, 11, NULL, NULL, &ipg_clk); |
| 1134 | .enable_reg = CCM_PCCR0, | 542 | DEFINE_CLOCK(owire_clk, 0, PCCR0, 12, NULL, NULL, &ipg_clk); |
| 1135 | .enable_shift = CCM_PCCR0_SSI2_IPG_OFFSET, | 543 | DEFINE_CLOCK(mstick_clk1, 0, PCCR0, 13, NULL, NULL, &ipg_clk); |
| 1136 | .disable = _clk_disable, | 544 | DEFINE_CLOCK(lcdc_clk1, 0, PCCR0, 14, NULL, &lcdc_clk2, &ipg_clk); |
| 545 | DEFINE_CLOCK(kpp_clk, 0, PCCR0, 15, NULL, NULL, &ipg_clk); | ||
| 546 | DEFINE_CLOCK(iim_clk, 0, PCCR0, 16, NULL, NULL, &ipg_clk); | ||
| 547 | DEFINE_CLOCK(i2c2_clk, 1, PCCR0, 17, NULL, NULL, &ipg_clk); | ||
| 548 | DEFINE_CLOCK(i2c1_clk, 0, PCCR0, 18, NULL, NULL, &ipg_clk); | ||
| 549 | DEFINE_CLOCK(gpt6_clk1, 0, PCCR0, 29, NULL, NULL, &ipg_clk); | ||
| 550 | DEFINE_CLOCK(gpt5_clk1, 0, PCCR0, 20, NULL, NULL, &ipg_clk); | ||
| 551 | DEFINE_CLOCK(gpt4_clk1, 0, PCCR0, 21, NULL, NULL, &ipg_clk); | ||
| 552 | DEFINE_CLOCK(gpt3_clk1, 0, PCCR0, 22, NULL, NULL, &ipg_clk); | ||
| 553 | DEFINE_CLOCK(gpt2_clk1, 0, PCCR0, 23, NULL, NULL, &ipg_clk); | ||
| 554 | DEFINE_CLOCK(gpt1_clk1, 0, PCCR0, 24, NULL, NULL, &ipg_clk); | ||
| 555 | DEFINE_CLOCK(gpio_clk, 0, PCCR0, 25, NULL, NULL, &ipg_clk); | ||
| 556 | DEFINE_CLOCK(fec_clk, 0, PCCR0, 26, NULL, &fec_clk1, &ahb_clk); | ||
| 557 | DEFINE_CLOCK(emma_clk, 0, PCCR0, 27, NULL, &emma_clk1, &ahb_clk); | ||
| 558 | DEFINE_CLOCK(dma_clk, 0, PCCR0, 28, NULL, &dma_clk1, &ahb_clk); | ||
| 559 | DEFINE_CLOCK(cspi13_clk1, 0, PCCR0, 29, NULL, NULL, &ipg_clk); | ||
| 560 | DEFINE_CLOCK(cspi2_clk1, 0, PCCR0, 30, NULL, NULL, &ipg_clk); | ||
| 561 | DEFINE_CLOCK(cspi1_clk1, 0, PCCR0, 31, NULL, NULL, &ipg_clk); | ||
| 562 | |||
| 563 | DEFINE_CLOCK(mstick_clk, 0, PCCR1, 2, NULL, &mstick_clk1, &ipg_clk); | ||
| 564 | DEFINE_CLOCK(nfc_clk, 0, PCCR1, 3, get_rate_nfc, NULL, &cpu_clk); | ||
| 565 | DEFINE_CLOCK(ssi2_clk, 1, PCCR1, 4, get_rate_ssi2, &ssi2_clk1, &mpll_main2_clk); | ||
| 566 | DEFINE_CLOCK(ssi1_clk, 0, PCCR1, 5, get_rate_ssi1, &ssi1_clk1, &mpll_main2_clk); | ||
| 567 | DEFINE_CLOCK(vpu_clk, 0, PCCR1, 6, get_rate_vpu, &vpu_clk1, &mpll_main2_clk); | ||
| 568 | DEFINE_CLOCK1(per4_clk, 3, PCCR1, 7, per, NULL, &mpll_main2_clk); | ||
| 569 | DEFINE_CLOCK1(per3_clk, 2, PCCR1, 8, per, NULL, &mpll_main2_clk); | ||
| 570 | DEFINE_CLOCK1(per2_clk, 1, PCCR1, 9, per, NULL, &mpll_main2_clk); | ||
| 571 | DEFINE_CLOCK1(per1_clk, 0, PCCR1, 10, per, NULL, &mpll_main2_clk); | ||
| 572 | DEFINE_CLOCK(usb_clk1, 0, PCCR1, 11, NULL, NULL, &ahb_clk); | ||
| 573 | DEFINE_CLOCK(slcdc_clk1, 0, PCCR1, 12, NULL, NULL, &ahb_clk); | ||
| 574 | DEFINE_CLOCK(sahara2_clk1, 0, PCCR1, 13, NULL, NULL, &ahb_clk); | ||
| 575 | DEFINE_CLOCK(rtic_clk1, 0, PCCR1, 14, NULL, NULL, &ahb_clk); | ||
| 576 | DEFINE_CLOCK(lcdc_clk2, 0, PCCR1, 15, NULL, NULL, &ahb_clk); | ||
| 577 | DEFINE_CLOCK(vpu_clk1, 0, PCCR1, 16, NULL, NULL, &ahb_clk); | ||
| 578 | DEFINE_CLOCK(fec_clk1, 0, PCCR1, 17, NULL, NULL, &ahb_clk); | ||
| 579 | DEFINE_CLOCK(emma_clk1, 0, PCCR1, 18, NULL, NULL, &ahb_clk); | ||
| 580 | DEFINE_CLOCK(emi_clk, 0, PCCR1, 19, NULL, NULL, &ahb_clk); | ||
| 581 | DEFINE_CLOCK(dma_clk1, 0, PCCR1, 20, NULL, NULL, &ahb_clk); | ||
| 582 | DEFINE_CLOCK(csi_clk1, 0, PCCR1, 21, NULL, NULL, &ahb_clk); | ||
| 583 | DEFINE_CLOCK(brom_clk, 0, PCCR1, 22, NULL, NULL, &ahb_clk); | ||
| 584 | DEFINE_CLOCK(ata_clk, 0, PCCR1, 23, NULL, NULL, &ahb_clk); | ||
| 585 | DEFINE_CLOCK(wdog_clk, 0, PCCR1, 24, NULL, NULL, &ipg_clk); | ||
| 586 | DEFINE_CLOCK(usb_clk, 0, PCCR1, 25, get_rate_usb, &usb_clk1, &spll_clk); | ||
| 587 | DEFINE_CLOCK(uart6_clk1, 0, PCCR1, 26, NULL, NULL, &ipg_clk); | ||
| 588 | DEFINE_CLOCK(uart5_clk1, 0, PCCR1, 27, NULL, NULL, &ipg_clk); | ||
| 589 | DEFINE_CLOCK(uart4_clk1, 0, PCCR1, 28, NULL, NULL, &ipg_clk); | ||
| 590 | DEFINE_CLOCK(uart3_clk1, 0, PCCR1, 29, NULL, NULL, &ipg_clk); | ||
| 591 | DEFINE_CLOCK(uart2_clk1, 0, PCCR1, 30, NULL, NULL, &ipg_clk); | ||
| 592 | DEFINE_CLOCK(uart1_clk1, 0, PCCR1, 31, NULL, NULL, &ipg_clk); | ||
| 593 | |||
| 594 | /* Clocks we cannot directly gate, but drivers need their rates */ | ||
| 595 | DEFINE_CLOCK(cspi1_clk, 0, 0, 0, NULL, &cspi1_clk1, &per2_clk); | ||
| 596 | DEFINE_CLOCK(cspi2_clk, 1, 0, 0, NULL, &cspi2_clk1, &per2_clk); | ||
| 597 | DEFINE_CLOCK(cspi3_clk, 2, 0, 0, NULL, &cspi13_clk1, &per2_clk); | ||
| 598 | DEFINE_CLOCK(sdhc1_clk, 0, 0, 0, NULL, &sdhc1_clk1, &per2_clk); | ||
| 599 | DEFINE_CLOCK(sdhc2_clk, 1, 0, 0, NULL, &sdhc2_clk1, &per2_clk); | ||
| 600 | DEFINE_CLOCK(sdhc3_clk, 2, 0, 0, NULL, &sdhc3_clk1, &per2_clk); | ||
| 601 | DEFINE_CLOCK(pwm_clk, 0, 0, 0, NULL, &pwm_clk1, &per1_clk); | ||
| 602 | DEFINE_CLOCK(gpt1_clk, 0, 0, 0, NULL, &gpt1_clk1, &per1_clk); | ||
| 603 | DEFINE_CLOCK(gpt2_clk, 1, 0, 0, NULL, &gpt2_clk1, &per1_clk); | ||
| 604 | DEFINE_CLOCK(gpt3_clk, 2, 0, 0, NULL, &gpt3_clk1, &per1_clk); | ||
| 605 | DEFINE_CLOCK(gpt4_clk, 3, 0, 0, NULL, &gpt4_clk1, &per1_clk); | ||
| 606 | DEFINE_CLOCK(gpt5_clk, 4, 0, 0, NULL, &gpt5_clk1, &per1_clk); | ||
| 607 | DEFINE_CLOCK(gpt6_clk, 5, 0, 0, NULL, &gpt6_clk1, &per1_clk); | ||
| 608 | DEFINE_CLOCK(uart1_clk, 0, 0, 0, NULL, &uart1_clk1, &per1_clk); | ||
| 609 | DEFINE_CLOCK(uart2_clk, 1, 0, 0, NULL, &uart2_clk1, &per1_clk); | ||
| 610 | DEFINE_CLOCK(uart3_clk, 2, 0, 0, NULL, &uart3_clk1, &per1_clk); | ||
| 611 | DEFINE_CLOCK(uart4_clk, 3, 0, 0, NULL, &uart4_clk1, &per1_clk); | ||
| 612 | DEFINE_CLOCK(uart5_clk, 4, 0, 0, NULL, &uart5_clk1, &per1_clk); | ||
| 613 | DEFINE_CLOCK(uart6_clk, 5, 0, 0, NULL, &uart6_clk1, &per1_clk); | ||
| 614 | DEFINE_CLOCK1(lcdc_clk, 0, 0, 0, parent, &lcdc_clk1, &per3_clk); | ||
| 615 | DEFINE_CLOCK1(csi_clk, 0, 0, 0, parent, &csi_clk1, &per4_clk); | ||
| 616 | |||
| 617 | #define _REGISTER_CLOCK(d, n, c) \ | ||
| 618 | { \ | ||
| 619 | .dev_id = d, \ | ||
| 620 | .con_id = n, \ | ||
| 621 | .clk = &c, \ | ||
| 1137 | }, | 622 | }, |
| 1138 | }; | ||
| 1139 | |||
| 1140 | static struct clk nfc_clk = { | ||
| 1141 | .name = "nfc_clk", | ||
| 1142 | .parent = &cpu_clk, | ||
| 1143 | .get_rate = _clk_nfc_recalc, | ||
| 1144 | .enable = _clk_enable, | ||
| 1145 | .enable_reg = CCM_PCCR1, | ||
| 1146 | .enable_shift = CCM_PCCR1_NFC_BAUD_OFFSET, | ||
| 1147 | .disable = _clk_disable, | ||
| 1148 | }; | ||
| 1149 | |||
| 1150 | static struct clk vpu_clk = { | ||
| 1151 | .name = "vpu_clk", | ||
| 1152 | .parent = &mpll_main_clk[1], | ||
| 1153 | .get_rate = _clk_vpu_recalc, | ||
| 1154 | .enable = _clk_vpu_enable, | ||
| 1155 | .disable = _clk_vpu_disable, | ||
| 1156 | }; | ||
| 1157 | |||
| 1158 | static struct clk dma_clk = { | ||
| 1159 | .name = "dma_clk", | ||
| 1160 | .parent = &ahb_clk, | ||
| 1161 | .enable = _clk_dma_enable, | ||
| 1162 | .disable = _clk_dma_disable, | ||
| 1163 | }; | ||
| 1164 | |||
| 1165 | static struct clk rtic_clk = { | ||
| 1166 | .name = "rtic_clk", | ||
| 1167 | .parent = &ahb_clk, | ||
| 1168 | .enable = _clk_rtic_enable, | ||
| 1169 | .disable = _clk_rtic_disable, | ||
| 1170 | }; | ||
| 1171 | 623 | ||
| 1172 | static struct clk brom_clk = { | 624 | static struct clk_lookup lookups[] __initdata = { |
| 1173 | .name = "brom_clk", | 625 | _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) |
| 1174 | .parent = &ahb_clk, | 626 | _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) |
| 1175 | .enable = _clk_enable, | 627 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) |
| 1176 | .enable_reg = CCM_PCCR1, | 628 | _REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk) |
| 1177 | .enable_shift = CCM_PCCR1_HCLK_BROM_OFFSET, | 629 | _REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk) |
| 1178 | .disable = _clk_disable, | 630 | _REGISTER_CLOCK("imx-uart.5", NULL, uart6_clk) |
| 1179 | }; | 631 | _REGISTER_CLOCK(NULL, "gpt1", gpt1_clk) |
| 1180 | 632 | _REGISTER_CLOCK(NULL, "gpt2", gpt2_clk) | |
| 1181 | static struct clk emma_clk = { | 633 | _REGISTER_CLOCK(NULL, "gpt3", gpt3_clk) |
| 1182 | .name = "emma_clk", | 634 | _REGISTER_CLOCK(NULL, "gpt4", gpt4_clk) |
| 1183 | .parent = &ahb_clk, | 635 | _REGISTER_CLOCK(NULL, "gpt5", gpt5_clk) |
| 1184 | .enable = _clk_emma_enable, | 636 | _REGISTER_CLOCK(NULL, "gpt6", gpt6_clk) |
| 1185 | .disable = _clk_emma_disable, | 637 | _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm_clk) |
| 1186 | }; | 638 | _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk) |
| 1187 | 639 | _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk) | |
| 1188 | static struct clk slcdc_clk = { | 640 | _REGISTER_CLOCK("mxc-mmc.2", NULL, sdhc3_clk) |
| 1189 | .name = "slcdc_clk", | 641 | _REGISTER_CLOCK(NULL, "cspi1", cspi1_clk) |
| 1190 | .parent = &ahb_clk, | 642 | _REGISTER_CLOCK(NULL, "cspi2", cspi2_clk) |
| 1191 | .enable = _clk_slcdc_enable, | 643 | _REGISTER_CLOCK(NULL, "cspi3", cspi3_clk) |
| 1192 | .disable = _clk_slcdc_disable, | 644 | _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk) |
| 1193 | }; | 645 | _REGISTER_CLOCK(NULL, "csi", csi_clk) |
| 1194 | 646 | _REGISTER_CLOCK(NULL, "usb", usb_clk) | |
| 1195 | static struct clk fec_clk = { | 647 | _REGISTER_CLOCK(NULL, "ssi1", ssi1_clk) |
| 1196 | .name = "fec_clk", | 648 | _REGISTER_CLOCK(NULL, "ssi2", ssi2_clk) |
| 1197 | .parent = &ahb_clk, | 649 | _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) |
| 1198 | .enable = _clk_fec_enable, | 650 | _REGISTER_CLOCK(NULL, "vpu", vpu_clk) |
| 1199 | .disable = _clk_fec_disable, | 651 | _REGISTER_CLOCK(NULL, "dma", dma_clk) |
| 1200 | }; | 652 | _REGISTER_CLOCK(NULL, "rtic", rtic_clk) |
| 1201 | 653 | _REGISTER_CLOCK(NULL, "brom", brom_clk) | |
| 1202 | static struct clk emi_clk = { | 654 | _REGISTER_CLOCK(NULL, "emma", emma_clk) |
| 1203 | .name = "emi_clk", | 655 | _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk) |
| 1204 | .parent = &ahb_clk, | 656 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) |
| 1205 | .enable = _clk_enable, | 657 | _REGISTER_CLOCK(NULL, "emi", emi_clk) |
| 1206 | .enable_reg = CCM_PCCR1, | 658 | _REGISTER_CLOCK(NULL, "sahara2", sahara2_clk) |
| 1207 | .enable_shift = CCM_PCCR1_HCLK_EMI_OFFSET, | 659 | _REGISTER_CLOCK(NULL, "ata", ata_clk) |
| 1208 | .disable = _clk_disable, | 660 | _REGISTER_CLOCK(NULL, "mstick", mstick_clk) |
| 1209 | }; | 661 | _REGISTER_CLOCK(NULL, "wdog", wdog_clk) |
| 1210 | 662 | _REGISTER_CLOCK(NULL, "gpio", gpio_clk) | |
| 1211 | static struct clk sahara2_clk = { | 663 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) |
| 1212 | .name = "sahara_clk", | 664 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) |
| 1213 | .parent = &ahb_clk, | 665 | _REGISTER_CLOCK(NULL, "iim", iim_clk) |
| 1214 | .enable = _clk_sahara2_enable, | 666 | _REGISTER_CLOCK(NULL, "kpp", kpp_clk) |
| 1215 | .disable = _clk_sahara2_disable, | 667 | _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk) |
| 1216 | }; | 668 | _REGISTER_CLOCK(NULL, "rtc", rtc_clk) |
| 1217 | 669 | _REGISTER_CLOCK(NULL, "scc", scc_clk) | |
| 1218 | static struct clk ata_clk = { | 670 | }; |
| 1219 | .name = "ata_clk", | 671 | |
| 1220 | .parent = &ahb_clk, | 672 | /* Adjust the clock path for TO2 and later */ |
| 1221 | .enable = _clk_enable, | 673 | static void __init to2_adjust_clocks(void) |
| 1222 | .enable_reg = CCM_PCCR1, | 674 | { |
| 1223 | .enable_shift = CCM_PCCR1_HCLK_ATA_OFFSET, | 675 | unsigned long cscr = __raw_readl(CCM_CSCR); |
| 1224 | .disable = _clk_disable, | ||
| 1225 | }; | ||
| 1226 | |||
| 1227 | static struct clk mstick1_clk = { | ||
| 1228 | .name = "mstick1_clk", | ||
| 1229 | .parent = &ipg_clk, | ||
| 1230 | .enable = _clk_mstick1_enable, | ||
| 1231 | .disable = _clk_mstick1_disable, | ||
| 1232 | }; | ||
| 1233 | |||
| 1234 | static struct clk wdog_clk = { | ||
| 1235 | .name = "wdog_clk", | ||
| 1236 | .parent = &ipg_clk, | ||
| 1237 | .enable = _clk_enable, | ||
| 1238 | .enable_reg = CCM_PCCR1, | ||
| 1239 | .enable_shift = CCM_PCCR1_WDT_OFFSET, | ||
| 1240 | .disable = _clk_disable, | ||
| 1241 | }; | ||
| 1242 | |||
| 1243 | static struct clk gpio_clk = { | ||
| 1244 | .name = "gpio_clk", | ||
| 1245 | .parent = &ipg_clk, | ||
| 1246 | .enable = _clk_enable, | ||
| 1247 | .enable_reg = CCM_PCCR1, | ||
| 1248 | .enable_shift = CCM_PCCR0_GPIO_OFFSET, | ||
| 1249 | .disable = _clk_disable, | ||
| 1250 | }; | ||
| 1251 | |||
| 1252 | static struct clk i2c_clk[] = { | ||
| 1253 | { | ||
| 1254 | .name = "i2c_clk", | ||
| 1255 | .id = 0, | ||
| 1256 | .parent = &ipg_clk, | ||
| 1257 | .enable = _clk_enable, | ||
| 1258 | .enable_reg = CCM_PCCR0, | ||
| 1259 | .enable_shift = CCM_PCCR0_I2C1_OFFSET, | ||
| 1260 | .disable = _clk_disable, | ||
| 1261 | }, { | ||
| 1262 | .name = "i2c_clk", | ||
| 1263 | .id = 1, | ||
| 1264 | .parent = &ipg_clk, | ||
| 1265 | .enable = _clk_enable, | ||
| 1266 | .enable_reg = CCM_PCCR0, | ||
| 1267 | .enable_shift = CCM_PCCR0_I2C2_OFFSET, | ||
| 1268 | .disable = _clk_disable, | ||
| 1269 | }, | ||
| 1270 | }; | ||
| 1271 | |||
| 1272 | static struct clk iim_clk = { | ||
| 1273 | .name = "iim_clk", | ||
| 1274 | .parent = &ipg_clk, | ||
| 1275 | .enable = _clk_enable, | ||
| 1276 | .enable_reg = CCM_PCCR0, | ||
| 1277 | .enable_shift = CCM_PCCR0_IIM_OFFSET, | ||
| 1278 | .disable = _clk_disable, | ||
| 1279 | }; | ||
| 1280 | |||
| 1281 | static struct clk kpp_clk = { | ||
| 1282 | .name = "kpp_clk", | ||
| 1283 | .parent = &ipg_clk, | ||
| 1284 | .enable = _clk_enable, | ||
| 1285 | .enable_reg = CCM_PCCR0, | ||
| 1286 | .enable_shift = CCM_PCCR0_KPP_OFFSET, | ||
| 1287 | .disable = _clk_disable, | ||
| 1288 | }; | ||
| 1289 | |||
| 1290 | static struct clk owire_clk = { | ||
| 1291 | .name = "owire_clk", | ||
| 1292 | .parent = &ipg_clk, | ||
| 1293 | .enable = _clk_enable, | ||
| 1294 | .enable_reg = CCM_PCCR0, | ||
| 1295 | .enable_shift = CCM_PCCR0_OWIRE_OFFSET, | ||
| 1296 | .disable = _clk_disable, | ||
| 1297 | }; | ||
| 1298 | |||
| 1299 | static struct clk rtc_clk = { | ||
| 1300 | .name = "rtc_clk", | ||
| 1301 | .parent = &ipg_clk, | ||
| 1302 | .enable = _clk_enable, | ||
| 1303 | .enable_reg = CCM_PCCR0, | ||
| 1304 | .enable_shift = CCM_PCCR0_RTC_OFFSET, | ||
| 1305 | .disable = _clk_disable, | ||
| 1306 | }; | ||
| 1307 | |||
| 1308 | static struct clk scc_clk = { | ||
| 1309 | .name = "scc_clk", | ||
| 1310 | .parent = &ipg_clk, | ||
| 1311 | .enable = _clk_enable, | ||
| 1312 | .enable_reg = CCM_PCCR0, | ||
| 1313 | .enable_shift = CCM_PCCR0_SCC_OFFSET, | ||
| 1314 | .disable = _clk_disable, | ||
| 1315 | }; | ||
| 1316 | |||
| 1317 | static unsigned long _clk_clko_round_rate(struct clk *clk, unsigned long rate) | ||
| 1318 | { | ||
| 1319 | u32 div; | ||
| 1320 | unsigned long parent_rate; | ||
| 1321 | |||
| 1322 | parent_rate = clk_get_rate(clk->parent); | ||
| 1323 | div = parent_rate / rate; | ||
| 1324 | if (parent_rate % rate) | ||
| 1325 | div++; | ||
| 1326 | |||
| 1327 | if (div > 8) | ||
| 1328 | div = 8; | ||
| 1329 | |||
| 1330 | return parent_rate / div; | ||
| 1331 | } | ||
| 1332 | |||
| 1333 | static int _clk_clko_set_rate(struct clk *clk, unsigned long rate) | ||
| 1334 | { | ||
| 1335 | u32 reg; | ||
| 1336 | u32 div; | ||
| 1337 | unsigned long parent_rate; | ||
| 1338 | |||
| 1339 | parent_rate = clk_get_rate(clk->parent); | ||
| 1340 | |||
| 1341 | div = parent_rate / rate; | ||
| 1342 | |||
| 1343 | if (div > 8 || div < 1 || ((parent_rate / div) != rate)) | ||
| 1344 | return -EINVAL; | ||
| 1345 | div--; | ||
| 1346 | |||
| 1347 | reg = __raw_readl(CCM_PCDR0) & ~CCM_PCDR0_CLKODIV_MASK; | ||
| 1348 | reg |= div << CCM_PCDR0_CLKODIV_OFFSET; | ||
| 1349 | __raw_writel(reg, CCM_PCDR0); | ||
| 1350 | |||
| 1351 | return 0; | ||
| 1352 | } | ||
| 1353 | |||
| 1354 | static unsigned long _clk_clko_recalc(struct clk *clk) | ||
| 1355 | { | ||
| 1356 | u32 div; | ||
| 1357 | unsigned long parent_rate; | ||
| 1358 | |||
| 1359 | parent_rate = clk_get_rate(clk->parent); | ||
| 1360 | |||
| 1361 | div = __raw_readl(CCM_PCDR0) & CCM_PCDR0_CLKODIV_MASK >> | ||
| 1362 | CCM_PCDR0_CLKODIV_OFFSET; | ||
| 1363 | div++; | ||
| 1364 | |||
| 1365 | return parent_rate / div; | ||
| 1366 | } | ||
| 1367 | |||
| 1368 | static int _clk_clko_set_parent(struct clk *clk, struct clk *parent) | ||
| 1369 | { | ||
| 1370 | u32 reg; | ||
| 1371 | |||
| 1372 | reg = __raw_readl(CCM_CCSR) & ~CCM_CCSR_CLKOSEL_MASK; | ||
| 1373 | |||
| 1374 | if (parent == &ckil_clk) | ||
| 1375 | reg |= 0 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1376 | else if (parent == &ckih_clk) | ||
| 1377 | reg |= 2 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1378 | else if (parent == mpll_clk.parent) | ||
| 1379 | reg |= 3 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1380 | else if (parent == spll_clk.parent) | ||
| 1381 | reg |= 4 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1382 | else if (parent == &mpll_clk) | ||
| 1383 | reg |= 5 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1384 | else if (parent == &spll_clk) | ||
| 1385 | reg |= 6 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1386 | else if (parent == &cpu_clk) | ||
| 1387 | reg |= 7 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1388 | else if (parent == &ahb_clk) | ||
| 1389 | reg |= 8 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1390 | else if (parent == &ipg_clk) | ||
| 1391 | reg |= 9 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1392 | else if (parent == &per_clk[0]) | ||
| 1393 | reg |= 0xA << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1394 | else if (parent == &per_clk[1]) | ||
| 1395 | reg |= 0xB << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1396 | else if (parent == &per_clk[2]) | ||
| 1397 | reg |= 0xC << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1398 | else if (parent == &per_clk[3]) | ||
| 1399 | reg |= 0xD << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1400 | else if (parent == &ssi1_clk[0]) | ||
| 1401 | reg |= 0xE << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1402 | else if (parent == &ssi2_clk[0]) | ||
| 1403 | reg |= 0xF << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1404 | else if (parent == &nfc_clk) | ||
| 1405 | reg |= 0x10 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1406 | else if (parent == &mstick1_clk) | ||
| 1407 | reg |= 0x11 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1408 | else if (parent == &vpu_clk) | ||
| 1409 | reg |= 0x12 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1410 | else if (parent == &usb_clk[0]) | ||
| 1411 | reg |= 0x15 << CCM_CCSR_CLKOSEL_OFFSET; | ||
| 1412 | else | ||
| 1413 | return -EINVAL; | ||
| 1414 | |||
| 1415 | __raw_writel(reg, CCM_CCSR); | ||
| 1416 | |||
| 1417 | return 0; | ||
| 1418 | } | ||
| 1419 | |||
| 1420 | static int _clk_clko_enable(struct clk *clk) | ||
| 1421 | { | ||
| 1422 | u32 reg; | ||
| 1423 | |||
| 1424 | reg = __raw_readl(CCM_PCDR0) | CCM_PCDR0_CLKO_EN; | ||
| 1425 | __raw_writel(reg, CCM_PCDR0); | ||
| 1426 | |||
| 1427 | return 0; | ||
| 1428 | } | ||
| 1429 | |||
| 1430 | static void _clk_clko_disable(struct clk *clk) | ||
| 1431 | { | ||
| 1432 | u32 reg; | ||
| 1433 | |||
| 1434 | reg = __raw_readl(CCM_PCDR0) & ~CCM_PCDR0_CLKO_EN; | ||
| 1435 | __raw_writel(reg, CCM_PCDR0); | ||
| 1436 | } | ||
| 1437 | |||
| 1438 | static struct clk clko_clk = { | ||
| 1439 | .name = "clko_clk", | ||
| 1440 | .get_rate = _clk_clko_recalc, | ||
| 1441 | .set_rate = _clk_clko_set_rate, | ||
| 1442 | .round_rate = _clk_clko_round_rate, | ||
| 1443 | .set_parent = _clk_clko_set_parent, | ||
| 1444 | .enable = _clk_clko_enable, | ||
| 1445 | .disable = _clk_clko_disable, | ||
| 1446 | }; | ||
| 1447 | |||
| 1448 | static struct clk *mxc_clks[] = { | ||
| 1449 | &ckih_clk, | ||
| 1450 | &ckil_clk, | ||
| 1451 | &mpll_clk, | ||
| 1452 | &mpll_main_clk[0], | ||
| 1453 | &mpll_main_clk[1], | ||
| 1454 | &spll_clk, | ||
| 1455 | &cpu_clk, | ||
| 1456 | &ahb_clk, | ||
| 1457 | &ipg_clk, | ||
| 1458 | &per_clk[0], | ||
| 1459 | &per_clk[1], | ||
| 1460 | &per_clk[2], | ||
| 1461 | &per_clk[3], | ||
| 1462 | &clko_clk, | ||
| 1463 | &uart1_clk[0], | ||
| 1464 | &uart1_clk[1], | ||
| 1465 | &uart2_clk[0], | ||
| 1466 | &uart2_clk[1], | ||
| 1467 | &uart3_clk[0], | ||
| 1468 | &uart3_clk[1], | ||
| 1469 | &uart4_clk[0], | ||
| 1470 | &uart4_clk[1], | ||
| 1471 | &uart5_clk[0], | ||
| 1472 | &uart5_clk[1], | ||
| 1473 | &uart6_clk[0], | ||
| 1474 | &uart6_clk[1], | ||
| 1475 | &gpt1_clk[0], | ||
| 1476 | &gpt1_clk[1], | ||
| 1477 | &gpt2_clk[0], | ||
| 1478 | &gpt2_clk[1], | ||
| 1479 | &gpt3_clk[0], | ||
| 1480 | &gpt3_clk[1], | ||
| 1481 | &gpt4_clk[0], | ||
| 1482 | &gpt4_clk[1], | ||
| 1483 | &gpt5_clk[0], | ||
| 1484 | &gpt5_clk[1], | ||
| 1485 | &gpt6_clk[0], | ||
| 1486 | &gpt6_clk[1], | ||
| 1487 | &pwm_clk[0], | ||
| 1488 | &pwm_clk[1], | ||
| 1489 | &sdhc1_clk[0], | ||
| 1490 | &sdhc1_clk[1], | ||
| 1491 | &sdhc2_clk[0], | ||
| 1492 | &sdhc2_clk[1], | ||
| 1493 | &sdhc3_clk[0], | ||
| 1494 | &sdhc3_clk[1], | ||
| 1495 | &cspi1_clk[0], | ||
| 1496 | &cspi1_clk[1], | ||
| 1497 | &cspi2_clk[0], | ||
| 1498 | &cspi2_clk[1], | ||
| 1499 | &cspi3_clk[0], | ||
| 1500 | &cspi3_clk[1], | ||
| 1501 | &lcdc_clk[0], | ||
| 1502 | &lcdc_clk[1], | ||
| 1503 | &lcdc_clk[2], | ||
| 1504 | &csi_clk[0], | ||
| 1505 | &csi_clk[1], | ||
| 1506 | &usb_clk[0], | ||
| 1507 | &usb_clk[1], | ||
| 1508 | &ssi1_clk[0], | ||
| 1509 | &ssi1_clk[1], | ||
| 1510 | &ssi2_clk[0], | ||
| 1511 | &ssi2_clk[1], | ||
| 1512 | &nfc_clk, | ||
| 1513 | &vpu_clk, | ||
| 1514 | &dma_clk, | ||
| 1515 | &rtic_clk, | ||
| 1516 | &brom_clk, | ||
| 1517 | &emma_clk, | ||
| 1518 | &slcdc_clk, | ||
| 1519 | &fec_clk, | ||
| 1520 | &emi_clk, | ||
| 1521 | &sahara2_clk, | ||
| 1522 | &ata_clk, | ||
| 1523 | &mstick1_clk, | ||
| 1524 | &wdog_clk, | ||
| 1525 | &gpio_clk, | ||
| 1526 | &i2c_clk[0], | ||
| 1527 | &i2c_clk[1], | ||
| 1528 | &iim_clk, | ||
| 1529 | &kpp_clk, | ||
| 1530 | &owire_clk, | ||
| 1531 | &rtc_clk, | ||
| 1532 | &scc_clk, | ||
| 1533 | }; | ||
| 1534 | |||
| 1535 | void __init change_external_low_reference(unsigned long new_ref) | ||
| 1536 | { | ||
| 1537 | external_low_reference = new_ref; | ||
| 1538 | } | ||
| 1539 | |||
| 1540 | unsigned long __init clk_early_get_timer_rate(void) | ||
| 1541 | { | ||
| 1542 | return clk_get_rate(&per_clk[0]); | ||
| 1543 | } | ||
| 1544 | |||
| 1545 | static void __init probe_mxc_clocks(void) | ||
| 1546 | { | ||
| 1547 | int i; | ||
| 1548 | 676 | ||
| 1549 | if (mx27_revision() >= CHIP_REV_2_0) { | 677 | if (mx27_revision() >= CHIP_REV_2_0) { |
| 1550 | if (CSCR() & 0x8000) | 678 | if (cscr & CCM_CSCR_ARM_SRC) |
| 1551 | cpu_clk.parent = &mpll_main_clk[0]; | 679 | cpu_clk.parent = &mpll_main1_clk; |
| 1552 | 680 | ||
| 1553 | if (!(CSCR() & 0x00800000)) | 681 | if (!(cscr & CCM_CSCR_SSI2)) |
| 1554 | ssi2_clk[0].parent = &spll_clk; | 682 | ssi1_clk.parent = &spll_clk; |
| 1555 | 683 | ||
| 1556 | if (!(CSCR() & 0x00400000)) | 684 | if (!(cscr & CCM_CSCR_SSI1)) |
| 1557 | ssi1_clk[0].parent = &spll_clk; | 685 | ssi1_clk.parent = &spll_clk; |
| 1558 | 686 | ||
| 1559 | if (!(CSCR() & 0x00200000)) | 687 | if (!(cscr & CCM_CSCR_VPU)) |
| 1560 | vpu_clk.parent = &spll_clk; | 688 | vpu_clk.parent = &spll_clk; |
| 1561 | } else { | 689 | } else { |
| 1562 | cpu_clk.parent = &mpll_clk; | 690 | cpu_clk.parent = &mpll_clk; |
| @@ -1565,11 +693,13 @@ static void __init probe_mxc_clocks(void) | |||
| 1565 | cpu_clk.set_rate = NULL; | 693 | cpu_clk.set_rate = NULL; |
| 1566 | ahb_clk.parent = &mpll_clk; | 694 | ahb_clk.parent = &mpll_clk; |
| 1567 | 695 | ||
| 1568 | for (i = 0; i < sizeof(per_clk) / sizeof(per_clk[0]); i++) | 696 | per1_clk.parent = &mpll_clk; |
| 1569 | per_clk[i].parent = &mpll_clk; | 697 | per2_clk.parent = &mpll_clk; |
| 698 | per3_clk.parent = &mpll_clk; | ||
| 699 | per4_clk.parent = &mpll_clk; | ||
| 1570 | 700 | ||
| 1571 | ssi1_clk[0].parent = &mpll_clk; | 701 | ssi1_clk.parent = &mpll_clk; |
| 1572 | ssi2_clk[0].parent = &mpll_clk; | 702 | ssi2_clk.parent = &mpll_clk; |
| 1573 | 703 | ||
| 1574 | vpu_clk.parent = &mpll_clk; | 704 | vpu_clk.parent = &mpll_clk; |
| 1575 | } | 705 | } |
| @@ -1579,47 +709,47 @@ static void __init probe_mxc_clocks(void) | |||
| 1579 | * must be called very early to get information about the | 709 | * must be called very early to get information about the |
| 1580 | * available clock rate when the timer framework starts | 710 | * available clock rate when the timer framework starts |
| 1581 | */ | 711 | */ |
| 1582 | int __init mxc_clocks_init(unsigned long fref) | 712 | int __init mx27_clocks_init(unsigned long fref) |
| 1583 | { | 713 | { |
| 1584 | u32 cscr; | 714 | u32 cscr = __raw_readl(CCM_CSCR); |
| 1585 | struct clk **clkp; | 715 | int i; |
| 1586 | 716 | ||
| 1587 | external_high_reference = fref; | 717 | external_high_reference = fref; |
| 1588 | 718 | ||
| 1589 | /* detect clock reference for both system PLL */ | 719 | /* detect clock reference for both system PLLs */ |
| 1590 | cscr = CSCR(); | ||
| 1591 | if (cscr & CCM_CSCR_MCU) | 720 | if (cscr & CCM_CSCR_MCU) |
| 1592 | mpll_clk.parent = &ckih_clk; | 721 | mpll_clk.parent = &ckih_clk; |
| 1593 | else | 722 | else |
| 1594 | mpll_clk.parent = &ckil_clk; | 723 | mpll_clk.parent = &fpm_clk; |
| 1595 | 724 | ||
| 1596 | if (cscr & CCM_CSCR_SP) | 725 | if (cscr & CCM_CSCR_SP) |
| 1597 | spll_clk.parent = &ckih_clk; | 726 | spll_clk.parent = &ckih_clk; |
| 1598 | else | 727 | else |
| 1599 | spll_clk.parent = &ckil_clk; | 728 | spll_clk.parent = &fpm_clk; |
| 1600 | 729 | ||
| 1601 | probe_mxc_clocks(); | 730 | to2_adjust_clocks(); |
| 1602 | 731 | ||
| 1603 | per_clk[0].enable(&per_clk[0]); | 732 | for (i = 0; i < ARRAY_SIZE(lookups); i++) |
| 1604 | gpt1_clk[1].enable(&gpt1_clk[1]); | 733 | clkdev_add(&lookups[i]); |
| 1605 | 734 | ||
| 1606 | for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) | 735 | /* Turn off all clocks we do not need */ |
| 1607 | clk_register(*clkp); | 736 | __raw_writel(0, CCM_PCCR0); |
| 737 | __raw_writel((1 << 10) | (1 << 19), CCM_PCCR1); | ||
| 1608 | 738 | ||
| 1609 | /* Turn off all possible clocks */ | ||
| 1610 | __raw_writel(CCM_PCCR0_GPT1_MASK, CCM_PCCR0); | ||
| 1611 | __raw_writel(CCM_PCCR1_PERCLK1_MASK | CCM_PCCR1_HCLK_EMI_MASK, | ||
| 1612 | CCM_PCCR1); | ||
| 1613 | spll_clk.disable(&spll_clk); | 739 | spll_clk.disable(&spll_clk); |
| 1614 | 740 | ||
| 1615 | /* This will propagate to all children and init all the clock rates */ | 741 | /* enable basic clocks */ |
| 1616 | 742 | clk_enable(&per1_clk); | |
| 1617 | clk_enable(&emi_clk); | ||
| 1618 | clk_enable(&gpio_clk); | 743 | clk_enable(&gpio_clk); |
| 744 | clk_enable(&emi_clk); | ||
| 1619 | clk_enable(&iim_clk); | 745 | clk_enable(&iim_clk); |
| 1620 | clk_enable(&gpt1_clk[0]); | 746 | |
| 1621 | #ifdef CONFIG_DEBUG_LL_CONSOLE | 747 | #ifdef CONFIG_DEBUG_LL_CONSOLE |
| 1622 | clk_enable(&uart1_clk[0]); | 748 | clk_enable(&uart1_clk); |
| 1623 | #endif | 749 | #endif |
| 750 | |||
| 751 | mxc_timer_init(&gpt1_clk); | ||
| 752 | |||
| 1624 | return 0; | 753 | return 0; |
| 1625 | } | 754 | } |
| 755 | |||
diff --git a/arch/arm/mach-mx2/cpu_imx27.c b/arch/arm/mach-mx2/cpu_imx27.c index 239308fe6652..d9e3bf9644c9 100644 --- a/arch/arm/mach-mx2/cpu_imx27.c +++ b/arch/arm/mach-mx2/cpu_imx27.c | |||
| @@ -26,11 +26,11 @@ | |||
| 26 | 26 | ||
| 27 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
| 28 | 28 | ||
| 29 | #include "crm_regs.h" | ||
| 30 | |||
| 31 | static int cpu_silicon_rev = -1; | 29 | static int cpu_silicon_rev = -1; |
| 32 | static int cpu_partnumber; | 30 | static int cpu_partnumber; |
| 33 | 31 | ||
| 32 | #define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */ | ||
| 33 | |||
| 34 | static void query_silicon_parameter(void) | 34 | static void query_silicon_parameter(void) |
| 35 | { | 35 | { |
| 36 | u32 val; | 36 | u32 val; |
diff --git a/arch/arm/mach-mx2/crm_regs.h b/arch/arm/mach-mx2/crm_regs.h index 94644cd0a0fc..749de76b3f95 100644 --- a/arch/arm/mach-mx2/crm_regs.h +++ b/arch/arm/mach-mx2/crm_regs.h | |||
| @@ -38,42 +38,36 @@ | |||
| 38 | #define CCM_PMCOUNT (IO_ADDRESS(CCM_BASE_ADDR) + 0x30) | 38 | #define CCM_PMCOUNT (IO_ADDRESS(CCM_BASE_ADDR) + 0x30) |
| 39 | #define CCM_WKGDCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x34) | 39 | #define CCM_WKGDCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x34) |
| 40 | 40 | ||
| 41 | #define CCM_CSCR_USB_OFFSET 28 | 41 | #define CCM_CSCR_PRESC_OFFSET 29 |
| 42 | #define CCM_CSCR_USB_MASK (0x7 << 28) | 42 | #define CCM_CSCR_PRESC_MASK (0x7 << CCM_CSCR_PRESC_OFFSET) |
| 43 | |||
| 44 | #define CCM_CSCR_USB_OFFSET 26 | ||
| 45 | #define CCM_CSCR_USB_MASK (0x7 << CCM_CSCR_USB_OFFSET) | ||
| 43 | #define CCM_CSCR_SD_OFFSET 24 | 46 | #define CCM_CSCR_SD_OFFSET 24 |
| 44 | #define CCM_CSCR_SD_MASK (0x3 << 24) | 47 | #define CCM_CSCR_SD_MASK (0x3 << CCM_CSCR_SD_OFFSET) |
| 45 | #define CCM_CSCR_SSI2 (1 << 23) | 48 | #define CCM_CSCR_SPLLRES (1 << 22) |
| 46 | #define CCM_CSCR_SSI2_OFFSET 23 | 49 | #define CCM_CSCR_MPLLRES (1 << 21) |
| 47 | #define CCM_CSCR_SSI1 (1 << 22) | 50 | #define CCM_CSCR_SSI2_OFFSET 20 |
| 48 | #define CCM_CSCR_SSI1_OFFSET 22 | 51 | #define CCM_CSCR_SSI2 (1 << CCM_CSCR_SSI2_OFFSET) |
| 49 | #define CCM_CSCR_VPU (1 << 21) | 52 | #define CCM_CSCR_SSI1_OFFSET 19 |
| 50 | #define CCM_CSCR_VPU_OFFSET 21 | 53 | #define CCM_CSCR_SSI1 (1 << CCM_CSCR_SSI1_OFFSET) |
| 51 | #define CCM_CSCR_MSHC (1 << 20) | 54 | #define CCM_CSCR_FIR_OFFSET 18 |
| 52 | #define CCM_CSCR_SPLLRES (1 << 19) | 55 | #define CCM_CSCR_FIR (1 << CCM_CSCR_FIR_OFFSET) |
| 53 | #define CCM_CSCR_MPLLRES (1 << 18) | ||
| 54 | #define CCM_CSCR_SP (1 << 17) | 56 | #define CCM_CSCR_SP (1 << 17) |
| 55 | #define CCM_CSCR_MCU (1 << 16) | 57 | #define CCM_CSCR_MCU (1 << 16) |
| 56 | /* CCM_CSCR_ARM_xxx just be avaliable on i.MX27 TO2*/ | 58 | #define CCM_CSCR_BCLK_OFFSET 10 |
| 57 | #define CCM_CSCR_ARM_SRC (1 << 15) | 59 | #define CCM_CSCR_BCLK_MASK (0xf << CCM_CSCR_BCLK_OFFSET) |
| 58 | #define CCM_CSCR_ARM_OFFSET 12 | 60 | #define CCM_CSCR_IPDIV_OFFSET 9 |
| 59 | #define CCM_CSCR_ARM_MASK (0x3 << 12) | 61 | #define CCM_CSCR_IPDIV (1 << CCM_CSCR_IPDIV_OFFSET) |
| 60 | /* CCM_CSCR_ARM_xxx just be avaliable on i.MX27 TO2*/ | 62 | |
| 61 | #define CCM_CSCR_PRESC_OFFSET 13 | ||
| 62 | #define CCM_CSCR_PRESC_MASK (0x7 << 13) | ||
| 63 | #define CCM_CSCR_BCLK_OFFSET 9 | ||
| 64 | #define CCM_CSCR_BCLK_MASK (0xf << 9) | ||
| 65 | #define CCM_CSCR_IPDIV_OFFSET 8 | ||
| 66 | #define CCM_CSCR_IPDIV (1 << 8) | ||
| 67 | /* CCM_CSCR_AHB_xxx just be avaliable on i.MX27 TO2*/ | ||
| 68 | #define CCM_CSCR_AHB_OFFSET 8 | ||
| 69 | #define CCM_CSCR_AHB_MASK (0x3 << 8) | ||
| 70 | /* CCM_CSCR_AHB_xxx just be avaliable on i.MX27 TO2*/ | ||
| 71 | #define CCM_CSCR_OSC26MDIV (1 << 4) | 63 | #define CCM_CSCR_OSC26MDIV (1 << 4) |
| 72 | #define CCM_CSCR_OSC26M (1 << 3) | 64 | #define CCM_CSCR_OSC26M (1 << 3) |
| 73 | #define CCM_CSCR_FPM (1 << 2) | 65 | #define CCM_CSCR_FPM (1 << 2) |
| 74 | #define CCM_CSCR_SPEN (1 << 1) | 66 | #define CCM_CSCR_SPEN (1 << 1) |
| 75 | #define CCM_CSCR_MPEN 1 | 67 | #define CCM_CSCR_MPEN 1 |
| 76 | 68 | ||
| 69 | |||
| 70 | |||
| 77 | #define CCM_MPCTL0_CPLM (1 << 31) | 71 | #define CCM_MPCTL0_CPLM (1 << 31) |
| 78 | #define CCM_MPCTL0_PD_OFFSET 26 | 72 | #define CCM_MPCTL0_PD_OFFSET 26 |
| 79 | #define CCM_MPCTL0_PD_MASK (0xf << 26) | 73 | #define CCM_MPCTL0_PD_MASK (0xf << 26) |
| @@ -109,25 +103,14 @@ | |||
| 109 | 103 | ||
| 110 | #define CCM_PCDR0_SSI2BAUDDIV_OFFSET 26 | 104 | #define CCM_PCDR0_SSI2BAUDDIV_OFFSET 26 |
| 111 | #define CCM_PCDR0_SSI2BAUDDIV_MASK (0x3f << 26) | 105 | #define CCM_PCDR0_SSI2BAUDDIV_MASK (0x3f << 26) |
| 112 | #define CCM_PCDR0_CLKO_EN 25 | ||
| 113 | #define CCM_PCDR0_CLKODIV_OFFSET 22 | ||
| 114 | #define CCM_PCDR0_CLKODIV_MASK (0x7 << 22) | ||
| 115 | #define CCM_PCDR0_SSI1BAUDDIV_OFFSET 16 | 106 | #define CCM_PCDR0_SSI1BAUDDIV_OFFSET 16 |
| 116 | #define CCM_PCDR0_SSI1BAUDDIV_MASK (0x3f << 16) | 107 | #define CCM_PCDR0_SSI1BAUDDIV_MASK (0x3f << 16) |
| 117 | /*The difinition for i.MX27 TO2*/ | ||
| 118 | #define CCM_PCDR0_VPUDIV2_OFFSET 10 | ||
| 119 | #define CCM_PCDR0_VPUDIV2_MASK (0x3f << 10) | ||
| 120 | #define CCM_PCDR0_NFCDIV2_OFFSET 6 | ||
| 121 | #define CCM_PCDR0_NFCDIV2_MASK (0xf << 6) | ||
| 122 | #define CCM_PCDR0_MSHCDIV2_MASK 0x3f | ||
| 123 | /*The difinition for i.MX27 TO2*/ | ||
| 124 | #define CCM_PCDR0_NFCDIV_OFFSET 12 | 108 | #define CCM_PCDR0_NFCDIV_OFFSET 12 |
| 125 | #define CCM_PCDR0_NFCDIV_MASK (0xf << 12) | 109 | #define CCM_PCDR0_NFCDIV_MASK (0xf << 12) |
| 126 | #define CCM_PCDR0_VPUDIV_OFFSET 8 | 110 | #define CCM_PCDR0_48MDIV_OFFSET 5 |
| 127 | #define CCM_PCDR0_VPUDIV_MASK (0xf << 8) | 111 | #define CCM_PCDR0_48MDIV_MASK (0x7 << CCM_PCDR0_48MDIV_OFFSET) |
| 128 | #define CCM_PCDR0_MSHCDIV_OFFSET 0 | 112 | #define CCM_PCDR0_FIRIDIV_OFFSET 0 |
| 129 | #define CCM_PCDR0_MSHCDIV_MASK 0x1f | 113 | #define CCM_PCDR0_FIRIDIV_MASK 0x1f |
| 130 | |||
| 131 | #define CCM_PCDR1_PERDIV4_OFFSET 24 | 114 | #define CCM_PCDR1_PERDIV4_OFFSET 24 |
| 132 | #define CCM_PCDR1_PERDIV4_MASK (0x3f << 24) | 115 | #define CCM_PCDR1_PERDIV4_MASK (0x3f << 24) |
| 133 | #define CCM_PCDR1_PERDIV3_OFFSET 16 | 116 | #define CCM_PCDR1_PERDIV3_OFFSET 16 |
| @@ -137,133 +120,135 @@ | |||
| 137 | #define CCM_PCDR1_PERDIV1_OFFSET 0 | 120 | #define CCM_PCDR1_PERDIV1_OFFSET 0 |
| 138 | #define CCM_PCDR1_PERDIV1_MASK 0x3f | 121 | #define CCM_PCDR1_PERDIV1_MASK 0x3f |
| 139 | 122 | ||
| 140 | #define CCM_PCCR0_CSPI1_OFFSET 31 | 123 | #define CCM_PCCR_HCLK_CSI_OFFSET 31 |
| 141 | #define CCM_PCCR0_CSPI1_MASK (1 << 31) | 124 | #define CCM_PCCR_HCLK_CSI_REG CCM_PCCR0 |
| 142 | #define CCM_PCCR0_CSPI2_OFFSET 30 | 125 | #define CCM_PCCR_HCLK_DMA_OFFSET 30 |
| 143 | #define CCM_PCCR0_CSPI2_MASK (1 << 30) | 126 | #define CCM_PCCR_HCLK_DMA_REG CCM_PCCR0 |
| 144 | #define CCM_PCCR0_CSPI3_OFFSET 29 | 127 | #define CCM_PCCR_HCLK_BROM_OFFSET 28 |
| 145 | #define CCM_PCCR0_CSPI3_MASK (1 << 29) | 128 | #define CCM_PCCR_HCLK_BROM_REG CCM_PCCR0 |
| 146 | #define CCM_PCCR0_DMA_OFFSET 28 | 129 | #define CCM_PCCR_HCLK_EMMA_OFFSET 27 |
| 147 | #define CCM_PCCR0_DMA_MASK (1 << 28) | 130 | #define CCM_PCCR_HCLK_EMMA_REG CCM_PCCR0 |
| 148 | #define CCM_PCCR0_EMMA_OFFSET 27 | 131 | #define CCM_PCCR_HCLK_LCDC_OFFSET 26 |
| 149 | #define CCM_PCCR0_EMMA_MASK (1 << 27) | 132 | #define CCM_PCCR_HCLK_LCDC_REG CCM_PCCR0 |
| 150 | #define CCM_PCCR0_FEC_OFFSET 26 | 133 | #define CCM_PCCR_HCLK_SLCDC_OFFSET 25 |
| 151 | #define CCM_PCCR0_FEC_MASK (1 << 26) | 134 | #define CCM_PCCR_HCLK_SLCDC_REG CCM_PCCR0 |
| 152 | #define CCM_PCCR0_GPIO_OFFSET 25 | 135 | #define CCM_PCCR_HCLK_USBOTG_OFFSET 24 |
| 153 | #define CCM_PCCR0_GPIO_MASK (1 << 25) | 136 | #define CCM_PCCR_HCLK_USBOTG_REG CCM_PCCR0 |
| 154 | #define CCM_PCCR0_GPT1_OFFSET 24 | 137 | #define CCM_PCCR_HCLK_BMI_OFFSET 23 |
| 155 | #define CCM_PCCR0_GPT1_MASK (1 << 24) | 138 | #define CCM_PCCR_BMI_MASK (1 << CCM_PCCR_BMI_MASK) |
| 156 | #define CCM_PCCR0_GPT2_OFFSET 23 | 139 | #define CCM_PCCR_HCLK_BMI_REG CCM_PCCR0 |
| 157 | #define CCM_PCCR0_GPT2_MASK (1 << 23) | 140 | #define CCM_PCCR_PERCLK4_OFFSET 22 |
| 158 | #define CCM_PCCR0_GPT3_OFFSET 22 | 141 | #define CCM_PCCR_PERCLK4_REG CCM_PCCR0 |
| 159 | #define CCM_PCCR0_GPT3_MASK (1 << 22) | 142 | #define CCM_PCCR_SLCDC_OFFSET 21 |
| 160 | #define CCM_PCCR0_GPT4_OFFSET 21 | 143 | #define CCM_PCCR_SLCDC_REG CCM_PCCR0 |
| 161 | #define CCM_PCCR0_GPT4_MASK (1 << 21) | 144 | #define CCM_PCCR_FIRI_BAUD_OFFSET 20 |
| 162 | #define CCM_PCCR0_GPT5_OFFSET 20 | 145 | #define CCM_PCCR_FIRI_BAUD_MASK (1 << CCM_PCCR_FIRI_BAUD_MASK) |
| 163 | #define CCM_PCCR0_GPT5_MASK (1 << 20) | 146 | #define CCM_PCCR_FIRI_BAUD_REG CCM_PCCR0 |
| 164 | #define CCM_PCCR0_GPT6_OFFSET 19 | 147 | #define CCM_PCCR_NFC_OFFSET 19 |
| 165 | #define CCM_PCCR0_GPT6_MASK (1 << 19) | 148 | #define CCM_PCCR_NFC_REG CCM_PCCR0 |
| 166 | #define CCM_PCCR0_I2C1_OFFSET 18 | 149 | #define CCM_PCCR_LCDC_OFFSET 18 |
| 167 | #define CCM_PCCR0_I2C1_MASK (1 << 18) | 150 | #define CCM_PCCR_LCDC_REG CCM_PCCR0 |
| 168 | #define CCM_PCCR0_I2C2_OFFSET 17 | 151 | #define CCM_PCCR_SSI1_BAUD_OFFSET 17 |
| 169 | #define CCM_PCCR0_I2C2_MASK (1 << 17) | 152 | #define CCM_PCCR_SSI1_BAUD_REG CCM_PCCR0 |
| 170 | #define CCM_PCCR0_IIM_OFFSET 16 | 153 | #define CCM_PCCR_SSI2_BAUD_OFFSET 16 |
| 171 | #define CCM_PCCR0_IIM_MASK (1 << 16) | 154 | #define CCM_PCCR_SSI2_BAUD_REG CCM_PCCR0 |
| 172 | #define CCM_PCCR0_KPP_OFFSET 15 | 155 | #define CCM_PCCR_EMMA_OFFSET 15 |
| 173 | #define CCM_PCCR0_KPP_MASK (1 << 15) | 156 | #define CCM_PCCR_EMMA_REG CCM_PCCR0 |
| 174 | #define CCM_PCCR0_LCDC_OFFSET 14 | 157 | #define CCM_PCCR_USBOTG_OFFSET 14 |
| 175 | #define CCM_PCCR0_LCDC_MASK (1 << 14) | 158 | #define CCM_PCCR_USBOTG_REG CCM_PCCR0 |
| 176 | #define CCM_PCCR0_MSHC_OFFSET 13 | 159 | #define CCM_PCCR_DMA_OFFSET 13 |
| 177 | #define CCM_PCCR0_MSHC_MASK (1 << 13) | 160 | #define CCM_PCCR_DMA_REG CCM_PCCR0 |
| 178 | #define CCM_PCCR0_OWIRE_OFFSET 12 | 161 | #define CCM_PCCR_I2C1_OFFSET 12 |
| 179 | #define CCM_PCCR0_OWIRE_MASK (1 << 12) | 162 | #define CCM_PCCR_I2C1_REG CCM_PCCR0 |
| 180 | #define CCM_PCCR0_PWM_OFFSET 11 | 163 | #define CCM_PCCR_GPIO_OFFSET 11 |
| 181 | #define CCM_PCCR0_PWM_MASK (1 << 11) | 164 | #define CCM_PCCR_GPIO_REG CCM_PCCR0 |
| 182 | #define CCM_PCCR0_RTC_OFFSET 9 | 165 | #define CCM_PCCR_SDHC2_OFFSET 10 |
| 183 | #define CCM_PCCR0_RTC_MASK (1 << 9) | 166 | #define CCM_PCCR_SDHC2_REG CCM_PCCR0 |
| 184 | #define CCM_PCCR0_RTIC_OFFSET 8 | 167 | #define CCM_PCCR_SDHC1_OFFSET 9 |
| 185 | #define CCM_PCCR0_RTIC_MASK (1 << 8) | 168 | #define CCM_PCCR_SDHC1_REG CCM_PCCR0 |
| 186 | #define CCM_PCCR0_SAHARA_OFFSET 7 | 169 | #define CCM_PCCR_FIRI_OFFSET 8 |
| 187 | #define CCM_PCCR0_SAHARA_MASK (1 << 7) | 170 | #define CCM_PCCR_FIRI_MASK (1 << CCM_PCCR_BAUD_MASK) |
| 188 | #define CCM_PCCR0_SCC_OFFSET 6 | 171 | #define CCM_PCCR_FIRI_REG CCM_PCCR0 |
| 189 | #define CCM_PCCR0_SCC_MASK (1 << 6) | 172 | #define CCM_PCCR_SSI2_IPG_OFFSET 7 |
| 190 | #define CCM_PCCR0_SDHC1_OFFSET 5 | 173 | #define CCM_PCCR_SSI2_REG CCM_PCCR0 |
| 191 | #define CCM_PCCR0_SDHC1_MASK (1 << 5) | 174 | #define CCM_PCCR_SSI1_IPG_OFFSET 6 |
| 192 | #define CCM_PCCR0_SDHC2_OFFSET 4 | 175 | #define CCM_PCCR_SSI1_REG CCM_PCCR0 |
| 193 | #define CCM_PCCR0_SDHC2_MASK (1 << 4) | 176 | #define CCM_PCCR_CSPI2_OFFSET 5 |
| 194 | #define CCM_PCCR0_SDHC3_OFFSET 3 | 177 | #define CCM_PCCR_CSPI2_REG CCM_PCCR0 |
| 195 | #define CCM_PCCR0_SDHC3_MASK (1 << 3) | 178 | #define CCM_PCCR_CSPI1_OFFSET 4 |
| 196 | #define CCM_PCCR0_SLCDC_OFFSET 2 | 179 | #define CCM_PCCR_CSPI1_REG CCM_PCCR0 |
| 197 | #define CCM_PCCR0_SLCDC_MASK (1 << 2) | 180 | #define CCM_PCCR_UART4_OFFSET 3 |
| 198 | #define CCM_PCCR0_SSI1_IPG_OFFSET 1 | 181 | #define CCM_PCCR_UART4_REG CCM_PCCR0 |
| 199 | #define CCM_PCCR0_SSI1_IPG_MASK (1 << 1) | 182 | #define CCM_PCCR_UART3_OFFSET 2 |
| 200 | #define CCM_PCCR0_SSI2_IPG_OFFSET 0 | 183 | #define CCM_PCCR_UART3_REG CCM_PCCR0 |
| 201 | #define CCM_PCCR0_SSI2_IPG_MASK (1 << 0) | 184 | #define CCM_PCCR_UART2_OFFSET 1 |
| 185 | #define CCM_PCCR_UART2_REG CCM_PCCR0 | ||
| 186 | #define CCM_PCCR_UART1_OFFSET 0 | ||
| 187 | #define CCM_PCCR_UART1_REG CCM_PCCR0 | ||
| 188 | |||
| 189 | #define CCM_PCCR_OWIRE_OFFSET 31 | ||
| 190 | #define CCM_PCCR_OWIRE_REG CCM_PCCR1 | ||
| 191 | #define CCM_PCCR_KPP_OFFSET 30 | ||
| 192 | #define CCM_PCCR_KPP_REG CCM_PCCR1 | ||
| 193 | #define CCM_PCCR_RTC_OFFSET 29 | ||
| 194 | #define CCM_PCCR_RTC_REG CCM_PCCR1 | ||
| 195 | #define CCM_PCCR_PWM_OFFSET 28 | ||
| 196 | #define CCM_PCCR_PWM_REG CCM_PCCR1 | ||
| 197 | #define CCM_PCCR_GPT3_OFFSET 27 | ||
| 198 | #define CCM_PCCR_GPT3_REG CCM_PCCR1 | ||
| 199 | #define CCM_PCCR_GPT2_OFFSET 26 | ||
| 200 | #define CCM_PCCR_GPT2_REG CCM_PCCR1 | ||
| 201 | #define CCM_PCCR_GPT1_OFFSET 25 | ||
| 202 | #define CCM_PCCR_GPT1_REG CCM_PCCR1 | ||
| 203 | #define CCM_PCCR_WDT_OFFSET 24 | ||
| 204 | #define CCM_PCCR_WDT_REG CCM_PCCR1 | ||
| 205 | #define CCM_PCCR_CSPI3_OFFSET 23 | ||
| 206 | #define CCM_PCCR_CSPI3_REG CCM_PCCR1 | ||
| 207 | |||
| 208 | #define CCM_PCCR_CSPI1_MASK (1 << CCM_PCCR_CSPI1_OFFSET) | ||
| 209 | #define CCM_PCCR_CSPI2_MASK (1 << CCM_PCCR_CSPI2_OFFSET) | ||
| 210 | #define CCM_PCCR_CSPI3_MASK (1 << CCM_PCCR_CSPI3_OFFSET) | ||
| 211 | #define CCM_PCCR_DMA_MASK (1 << CCM_PCCR_DMA_OFFSET) | ||
| 212 | #define CCM_PCCR_EMMA_MASK (1 << CCM_PCCR_EMMA_OFFSET) | ||
| 213 | #define CCM_PCCR_GPIO_MASK (1 << CCM_PCCR_GPIO_OFFSET) | ||
| 214 | #define CCM_PCCR_GPT1_MASK (1 << CCM_PCCR_GPT1_OFFSET) | ||
| 215 | #define CCM_PCCR_GPT2_MASK (1 << CCM_PCCR_GPT2_OFFSET) | ||
| 216 | #define CCM_PCCR_GPT3_MASK (1 << CCM_PCCR_GPT3_OFFSET) | ||
| 217 | #define CCM_PCCR_HCLK_BROM_MASK (1 << CCM_PCCR_HCLK_BROM_OFFSET) | ||
| 218 | #define CCM_PCCR_HCLK_CSI_MASK (1 << CCM_PCCR_HCLK_CSI_OFFSET) | ||
| 219 | #define CCM_PCCR_HCLK_DMA_MASK (1 << CCM_PCCR_HCLK_DMA_OFFSET) | ||
| 220 | #define CCM_PCCR_HCLK_EMMA_MASK (1 << CCM_PCCR_HCLK_EMMA_OFFSET) | ||
| 221 | #define CCM_PCCR_HCLK_LCDC_MASK (1 << CCM_PCCR_HCLK_LCDC_OFFSET) | ||
| 222 | #define CCM_PCCR_HCLK_SLCDC_MASK (1 << CCM_PCCR_HCLK_SLCDC_OFFSET) | ||
| 223 | #define CCM_PCCR_HCLK_USBOTG_MASK (1 << CCM_PCCR_HCLK_USBOTG_OFFSET) | ||
| 224 | #define CCM_PCCR_I2C1_MASK (1 << CCM_PCCR_I2C1_OFFSET) | ||
| 225 | #define CCM_PCCR_KPP_MASK (1 << CCM_PCCR_KPP_OFFSET) | ||
| 226 | #define CCM_PCCR_LCDC_MASK (1 << CCM_PCCR_LCDC_OFFSET) | ||
| 227 | #define CCM_PCCR_NFC_MASK (1 << CCM_PCCR_NFC_OFFSET) | ||
| 228 | #define CCM_PCCR_OWIRE_MASK (1 << CCM_PCCR_OWIRE_OFFSET) | ||
| 229 | #define CCM_PCCR_PERCLK4_MASK (1 << CCM_PCCR_PERCLK4_OFFSET) | ||
| 230 | #define CCM_PCCR_PWM_MASK (1 << CCM_PCCR_PWM_OFFSET) | ||
| 231 | #define CCM_PCCR_RTC_MASK (1 << CCM_PCCR_RTC_OFFSET) | ||
| 232 | #define CCM_PCCR_SDHC1_MASK (1 << CCM_PCCR_SDHC1_OFFSET) | ||
| 233 | #define CCM_PCCR_SDHC2_MASK (1 << CCM_PCCR_SDHC2_OFFSET) | ||
| 234 | #define CCM_PCCR_SLCDC_MASK (1 << CCM_PCCR_SLCDC_OFFSET) | ||
| 235 | #define CCM_PCCR_SSI1_BAUD_MASK (1 << CCM_PCCR_SSI1_BAUD_OFFSET) | ||
| 236 | #define CCM_PCCR_SSI1_IPG_MASK (1 << CCM_PCCR_SSI1_IPG_OFFSET) | ||
| 237 | #define CCM_PCCR_SSI2_BAUD_MASK (1 << CCM_PCCR_SSI2_BAUD_OFFSET) | ||
| 238 | #define CCM_PCCR_SSI2_IPG_MASK (1 << CCM_PCCR_SSI2_IPG_OFFSET) | ||
| 239 | #define CCM_PCCR_UART1_MASK (1 << CCM_PCCR_UART1_OFFSET) | ||
| 240 | #define CCM_PCCR_UART2_MASK (1 << CCM_PCCR_UART2_OFFSET) | ||
| 241 | #define CCM_PCCR_UART3_MASK (1 << CCM_PCCR_UART3_OFFSET) | ||
| 242 | #define CCM_PCCR_UART4_MASK (1 << CCM_PCCR_UART4_OFFSET) | ||
| 243 | #define CCM_PCCR_USBOTG_MASK (1 << CCM_PCCR_USBOTG_OFFSET) | ||
| 244 | #define CCM_PCCR_WDT_MASK (1 << CCM_PCCR_WDT_OFFSET) | ||
| 202 | 245 | ||
| 203 | #define CCM_PCCR1_UART1_OFFSET 31 | ||
| 204 | #define CCM_PCCR1_UART1_MASK (1 << 31) | ||
| 205 | #define CCM_PCCR1_UART2_OFFSET 30 | ||
| 206 | #define CCM_PCCR1_UART2_MASK (1 << 30) | ||
| 207 | #define CCM_PCCR1_UART3_OFFSET 29 | ||
| 208 | #define CCM_PCCR1_UART3_MASK (1 << 29) | ||
| 209 | #define CCM_PCCR1_UART4_OFFSET 28 | ||
| 210 | #define CCM_PCCR1_UART4_MASK (1 << 28) | ||
| 211 | #define CCM_PCCR1_UART5_OFFSET 27 | ||
| 212 | #define CCM_PCCR1_UART5_MASK (1 << 27) | ||
| 213 | #define CCM_PCCR1_UART6_OFFSET 26 | ||
| 214 | #define CCM_PCCR1_UART6_MASK (1 << 26) | ||
| 215 | #define CCM_PCCR1_USBOTG_OFFSET 25 | ||
| 216 | #define CCM_PCCR1_USBOTG_MASK (1 << 25) | ||
| 217 | #define CCM_PCCR1_WDT_OFFSET 24 | ||
| 218 | #define CCM_PCCR1_WDT_MASK (1 << 24) | ||
| 219 | #define CCM_PCCR1_HCLK_ATA_OFFSET 23 | ||
| 220 | #define CCM_PCCR1_HCLK_ATA_MASK (1 << 23) | ||
| 221 | #define CCM_PCCR1_HCLK_BROM_OFFSET 22 | ||
| 222 | #define CCM_PCCR1_HCLK_BROM_MASK (1 << 22) | ||
| 223 | #define CCM_PCCR1_HCLK_CSI_OFFSET 21 | ||
| 224 | #define CCM_PCCR1_HCLK_CSI_MASK (1 << 21) | ||
| 225 | #define CCM_PCCR1_HCLK_DMA_OFFSET 20 | ||
| 226 | #define CCM_PCCR1_HCLK_DMA_MASK (1 << 20) | ||
| 227 | #define CCM_PCCR1_HCLK_EMI_OFFSET 19 | ||
| 228 | #define CCM_PCCR1_HCLK_EMI_MASK (1 << 19) | ||
| 229 | #define CCM_PCCR1_HCLK_EMMA_OFFSET 18 | ||
| 230 | #define CCM_PCCR1_HCLK_EMMA_MASK (1 << 18) | ||
| 231 | #define CCM_PCCR1_HCLK_FEC_OFFSET 17 | ||
| 232 | #define CCM_PCCR1_HCLK_FEC_MASK (1 << 17) | ||
| 233 | #define CCM_PCCR1_HCLK_VPU_OFFSET 16 | ||
| 234 | #define CCM_PCCR1_HCLK_VPU_MASK (1 << 16) | ||
| 235 | #define CCM_PCCR1_HCLK_LCDC_OFFSET 15 | ||
| 236 | #define CCM_PCCR1_HCLK_LCDC_MASK (1 << 15) | ||
| 237 | #define CCM_PCCR1_HCLK_RTIC_OFFSET 14 | ||
| 238 | #define CCM_PCCR1_HCLK_RTIC_MASK (1 << 14) | ||
| 239 | #define CCM_PCCR1_HCLK_SAHARA_OFFSET 13 | ||
| 240 | #define CCM_PCCR1_HCLK_SAHARA_MASK (1 << 13) | ||
| 241 | #define CCM_PCCR1_HCLK_SLCDC_OFFSET 12 | ||
| 242 | #define CCM_PCCR1_HCLK_SLCDC_MASK (1 << 12) | ||
| 243 | #define CCM_PCCR1_HCLK_USBOTG_OFFSET 11 | ||
| 244 | #define CCM_PCCR1_HCLK_USBOTG_MASK (1 << 11) | ||
| 245 | #define CCM_PCCR1_PERCLK1_OFFSET 10 | ||
| 246 | #define CCM_PCCR1_PERCLK1_MASK (1 << 10) | ||
| 247 | #define CCM_PCCR1_PERCLK2_OFFSET 9 | ||
| 248 | #define CCM_PCCR1_PERCLK2_MASK (1 << 9) | ||
| 249 | #define CCM_PCCR1_PERCLK3_OFFSET 8 | ||
| 250 | #define CCM_PCCR1_PERCLK3_MASK (1 << 8) | ||
| 251 | #define CCM_PCCR1_PERCLK4_OFFSET 7 | ||
| 252 | #define CCM_PCCR1_PERCLK4_MASK (1 << 7) | ||
| 253 | #define CCM_PCCR1_VPU_BAUD_OFFSET 6 | ||
| 254 | #define CCM_PCCR1_VPU_BAUD_MASK (1 << 6) | ||
| 255 | #define CCM_PCCR1_SSI1_BAUD_OFFSET 5 | ||
| 256 | #define CCM_PCCR1_SSI1_BAUD_MASK (1 << 5) | ||
| 257 | #define CCM_PCCR1_SSI2_BAUD_OFFSET 4 | ||
| 258 | #define CCM_PCCR1_SSI2_BAUD_MASK (1 << 4) | ||
| 259 | #define CCM_PCCR1_NFC_BAUD_OFFSET 3 | ||
| 260 | #define CCM_PCCR1_NFC_BAUD_MASK (1 << 3) | ||
| 261 | #define CCM_PCCR1_MSHC_BAUD_OFFSET 2 | ||
| 262 | #define CCM_PCCR1_MSHC_BAUD_MASK (1 << 2) | ||
| 263 | 246 | ||
| 264 | #define CCM_CCSR_32KSR (1 << 15) | 247 | #define CCM_CCSR_32KSR (1 << 15) |
| 248 | |||
| 265 | #define CCM_CCSR_CLKMODE1 (1 << 9) | 249 | #define CCM_CCSR_CLKMODE1 (1 << 9) |
| 266 | #define CCM_CCSR_CLKMODE0 (1 << 8) | 250 | #define CCM_CCSR_CLKMODE0 (1 << 8) |
| 251 | |||
| 267 | #define CCM_CCSR_CLKOSEL_OFFSET 0 | 252 | #define CCM_CCSR_CLKOSEL_OFFSET 0 |
| 268 | #define CCM_CCSR_CLKOSEL_MASK 0x1f | 253 | #define CCM_CCSR_CLKOSEL_MASK 0x1f |
| 269 | 254 | ||
diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-mx2/devices.c index 2f9240be1c76..f81aa8a8fbb4 100644 --- a/arch/arm/mach-mx2/devices.c +++ b/arch/arm/mach-mx2/devices.c | |||
| @@ -34,6 +34,10 @@ | |||
| 34 | 34 | ||
| 35 | #include <mach/irqs.h> | 35 | #include <mach/irqs.h> |
| 36 | #include <mach/hardware.h> | 36 | #include <mach/hardware.h> |
| 37 | #include <mach/common.h> | ||
| 38 | #include <mach/mmc.h> | ||
| 39 | |||
| 40 | #include "devices.h" | ||
| 37 | 41 | ||
| 38 | /* | 42 | /* |
| 39 | * Resource definition for the MXC IrDA | 43 | * Resource definition for the MXC IrDA |
| @@ -225,37 +229,217 @@ struct platform_device mxc_nand_device = { | |||
| 225 | .resource = mxc_nand_resources, | 229 | .resource = mxc_nand_resources, |
| 226 | }; | 230 | }; |
| 227 | 231 | ||
| 232 | #ifdef CONFIG_FB_IMX | ||
| 233 | /* | ||
| 234 | * lcdc: | ||
| 235 | * - i.MX1: the basic controller | ||
| 236 | * - i.MX21: to be checked | ||
| 237 | * - i.MX27: like i.MX1, with slightly variations | ||
| 238 | */ | ||
| 239 | static struct resource mxc_fb[] = { | ||
| 240 | { | ||
| 241 | .start = LCDC_BASE_ADDR, | ||
| 242 | .end = LCDC_BASE_ADDR + 0xFFF, | ||
| 243 | .flags = IORESOURCE_MEM, | ||
| 244 | }, | ||
| 245 | { | ||
| 246 | .start = MXC_INT_LCDC, | ||
| 247 | .end = MXC_INT_LCDC, | ||
| 248 | .flags = IORESOURCE_IRQ, | ||
| 249 | } | ||
| 250 | }; | ||
| 251 | |||
| 252 | /* mxc lcd driver */ | ||
| 253 | struct platform_device mxc_fb_device = { | ||
| 254 | .name = "imx-fb", | ||
| 255 | .id = 0, | ||
| 256 | .num_resources = ARRAY_SIZE(mxc_fb), | ||
| 257 | .resource = mxc_fb, | ||
| 258 | .dev = { | ||
| 259 | .coherent_dma_mask = 0xFFFFFFFF, | ||
| 260 | }, | ||
| 261 | }; | ||
| 262 | #endif | ||
| 263 | |||
| 264 | #ifdef CONFIG_MACH_MX27 | ||
| 265 | static struct resource mxc_fec_resources[] = { | ||
| 266 | { | ||
| 267 | .start = FEC_BASE_ADDR, | ||
| 268 | .end = FEC_BASE_ADDR + 0xfff, | ||
| 269 | .flags = IORESOURCE_MEM | ||
| 270 | }, { | ||
| 271 | .start = MXC_INT_FEC, | ||
| 272 | .end = MXC_INT_FEC, | ||
| 273 | .flags = IORESOURCE_IRQ | ||
| 274 | }, | ||
| 275 | }; | ||
| 276 | |||
| 277 | struct platform_device mxc_fec_device = { | ||
| 278 | .name = "fec", | ||
| 279 | .id = 0, | ||
| 280 | .num_resources = ARRAY_SIZE(mxc_fec_resources), | ||
| 281 | .resource = mxc_fec_resources, | ||
| 282 | }; | ||
| 283 | #endif | ||
| 284 | |||
| 285 | static struct resource mxc_i2c_1_resources[] = { | ||
| 286 | [0] = { | ||
| 287 | .start = I2C_BASE_ADDR, | ||
| 288 | .end = I2C_BASE_ADDR + 0x0fff, | ||
| 289 | .flags = IORESOURCE_MEM | ||
| 290 | }, | ||
| 291 | [1] = { | ||
| 292 | .start = MXC_INT_I2C, | ||
| 293 | .end = MXC_INT_I2C, | ||
| 294 | .flags = IORESOURCE_IRQ | ||
| 295 | } | ||
| 296 | }; | ||
| 297 | |||
| 298 | struct platform_device mxc_i2c_device0 = { | ||
| 299 | .name = "imx-i2c", | ||
| 300 | .id = 0, | ||
| 301 | .num_resources = ARRAY_SIZE(mxc_i2c_1_resources), | ||
| 302 | .resource = mxc_i2c_1_resources | ||
| 303 | }; | ||
| 304 | |||
| 305 | #ifdef CONFIG_MACH_MX27 | ||
| 306 | static struct resource mxc_i2c_2_resources[] = { | ||
| 307 | [0] = { | ||
| 308 | .start = I2C2_BASE_ADDR, | ||
| 309 | .end = I2C2_BASE_ADDR + 0x0fff, | ||
| 310 | .flags = IORESOURCE_MEM | ||
| 311 | }, | ||
| 312 | [1] = { | ||
| 313 | .start = MXC_INT_I2C2, | ||
| 314 | .end = MXC_INT_I2C2, | ||
| 315 | .flags = IORESOURCE_IRQ | ||
| 316 | } | ||
| 317 | }; | ||
| 318 | |||
| 319 | struct platform_device mxc_i2c_device1 = { | ||
| 320 | .name = "imx-i2c", | ||
| 321 | .id = 1, | ||
| 322 | .num_resources = ARRAY_SIZE(mxc_i2c_2_resources), | ||
| 323 | .resource = mxc_i2c_2_resources | ||
| 324 | }; | ||
| 325 | #endif | ||
| 326 | |||
| 327 | static struct resource mxc_pwm_resources[] = { | ||
| 328 | [0] = { | ||
| 329 | .start = PWM_BASE_ADDR, | ||
| 330 | .end = PWM_BASE_ADDR + 0x0fff, | ||
| 331 | .flags = IORESOURCE_MEM | ||
| 332 | }, | ||
| 333 | [1] = { | ||
| 334 | .start = MXC_INT_PWM, | ||
| 335 | .end = MXC_INT_PWM, | ||
| 336 | .flags = IORESOURCE_IRQ, | ||
| 337 | } | ||
| 338 | }; | ||
| 339 | |||
| 340 | struct platform_device mxc_pwm_device = { | ||
| 341 | .name = "mxc_pwm", | ||
| 342 | .id = 0, | ||
| 343 | .num_resources = ARRAY_SIZE(mxc_pwm_resources), | ||
| 344 | .resource = mxc_pwm_resources | ||
| 345 | }; | ||
| 346 | |||
| 347 | /* | ||
| 348 | * Resource definition for the MXC SDHC | ||
| 349 | */ | ||
| 350 | static struct resource mxc_sdhc1_resources[] = { | ||
| 351 | [0] = { | ||
| 352 | .start = SDHC1_BASE_ADDR, | ||
| 353 | .end = SDHC1_BASE_ADDR + SZ_4K - 1, | ||
| 354 | .flags = IORESOURCE_MEM, | ||
| 355 | }, | ||
| 356 | [1] = { | ||
| 357 | .start = MXC_INT_SDHC1, | ||
| 358 | .end = MXC_INT_SDHC1, | ||
| 359 | .flags = IORESOURCE_IRQ, | ||
| 360 | }, | ||
| 361 | [2] = { | ||
| 362 | .start = DMA_REQ_SDHC1, | ||
| 363 | .end = DMA_REQ_SDHC1, | ||
| 364 | .flags = IORESOURCE_DMA | ||
| 365 | }, | ||
| 366 | }; | ||
| 367 | |||
| 368 | static u64 mxc_sdhc1_dmamask = 0xffffffffUL; | ||
| 369 | |||
| 370 | struct platform_device mxc_sdhc_device0 = { | ||
| 371 | .name = "mxc-mmc", | ||
| 372 | .id = 0, | ||
| 373 | .dev = { | ||
| 374 | .dma_mask = &mxc_sdhc1_dmamask, | ||
| 375 | .coherent_dma_mask = 0xffffffff, | ||
| 376 | }, | ||
| 377 | .num_resources = ARRAY_SIZE(mxc_sdhc1_resources), | ||
| 378 | .resource = mxc_sdhc1_resources, | ||
| 379 | }; | ||
| 380 | |||
| 381 | static struct resource mxc_sdhc2_resources[] = { | ||
| 382 | [0] = { | ||
| 383 | .start = SDHC2_BASE_ADDR, | ||
| 384 | .end = SDHC2_BASE_ADDR + SZ_4K - 1, | ||
| 385 | .flags = IORESOURCE_MEM, | ||
| 386 | }, | ||
| 387 | [1] = { | ||
| 388 | .start = MXC_INT_SDHC2, | ||
| 389 | .end = MXC_INT_SDHC2, | ||
| 390 | .flags = IORESOURCE_IRQ, | ||
| 391 | }, | ||
| 392 | [2] = { | ||
| 393 | .start = DMA_REQ_SDHC2, | ||
| 394 | .end = DMA_REQ_SDHC2, | ||
| 395 | .flags = IORESOURCE_DMA | ||
| 396 | }, | ||
| 397 | }; | ||
| 398 | |||
| 399 | static u64 mxc_sdhc2_dmamask = 0xffffffffUL; | ||
| 400 | |||
| 401 | struct platform_device mxc_sdhc_device1 = { | ||
| 402 | .name = "mxc-mmc", | ||
| 403 | .id = 1, | ||
| 404 | .dev = { | ||
| 405 | .dma_mask = &mxc_sdhc2_dmamask, | ||
| 406 | .coherent_dma_mask = 0xffffffff, | ||
| 407 | }, | ||
| 408 | .num_resources = ARRAY_SIZE(mxc_sdhc2_resources), | ||
| 409 | .resource = mxc_sdhc2_resources, | ||
| 410 | }; | ||
| 411 | |||
| 228 | /* GPIO port description */ | 412 | /* GPIO port description */ |
| 229 | static struct mxc_gpio_port imx_gpio_ports[] = { | 413 | static struct mxc_gpio_port imx_gpio_ports[] = { |
| 230 | [0] = { | 414 | [0] = { |
| 231 | .chip.label = "gpio-0", | 415 | .chip.label = "gpio-0", |
| 232 | .irq = MXC_INT_GPIO, | 416 | .irq = MXC_INT_GPIO, |
| 233 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 0), | 417 | .base = IO_ADDRESS(GPIO_BASE_ADDR), |
| 234 | .virtual_irq_start = MXC_GPIO_IRQ_START, | 418 | .virtual_irq_start = MXC_GPIO_IRQ_START, |
| 235 | }, | 419 | }, |
| 236 | [1] = { | 420 | [1] = { |
| 237 | .chip.label = "gpio-1", | 421 | .chip.label = "gpio-1", |
| 238 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 1), | 422 | .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x100), |
| 239 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32, | 423 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32, |
| 240 | }, | 424 | }, |
| 241 | [2] = { | 425 | [2] = { |
| 242 | .chip.label = "gpio-2", | 426 | .chip.label = "gpio-2", |
| 243 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 2), | 427 | .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x200), |
| 244 | .virtual_irq_start = MXC_GPIO_IRQ_START + 64, | 428 | .virtual_irq_start = MXC_GPIO_IRQ_START + 64, |
| 245 | }, | 429 | }, |
| 246 | [3] = { | 430 | [3] = { |
| 247 | .chip.label = "gpio-3", | 431 | .chip.label = "gpio-3", |
| 248 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 3), | 432 | .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x300), |
| 249 | .virtual_irq_start = MXC_GPIO_IRQ_START + 96, | 433 | .virtual_irq_start = MXC_GPIO_IRQ_START + 96, |
| 250 | }, | 434 | }, |
| 251 | [4] = { | 435 | [4] = { |
| 252 | .chip.label = "gpio-4", | 436 | .chip.label = "gpio-4", |
| 253 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 4), | 437 | .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x400), |
| 254 | .virtual_irq_start = MXC_GPIO_IRQ_START + 128, | 438 | .virtual_irq_start = MXC_GPIO_IRQ_START + 128, |
| 255 | }, | 439 | }, |
| 256 | [5] = { | 440 | [5] = { |
| 257 | .chip.label = "gpio-5", | 441 | .chip.label = "gpio-5", |
| 258 | .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 5), | 442 | .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x500), |
| 259 | .virtual_irq_start = MXC_GPIO_IRQ_START + 160, | 443 | .virtual_irq_start = MXC_GPIO_IRQ_START + 160, |
| 260 | } | 444 | } |
| 261 | }; | 445 | }; |
diff --git a/arch/arm/mach-mx2/devices.h b/arch/arm/mach-mx2/devices.h index 1e8cb577a642..049005bb6aa9 100644 --- a/arch/arm/mach-mx2/devices.h +++ b/arch/arm/mach-mx2/devices.h | |||
| @@ -1,4 +1,3 @@ | |||
| 1 | |||
| 2 | extern struct platform_device mxc_gpt1; | 1 | extern struct platform_device mxc_gpt1; |
| 3 | extern struct platform_device mxc_gpt2; | 2 | extern struct platform_device mxc_gpt2; |
| 4 | extern struct platform_device mxc_gpt3; | 3 | extern struct platform_device mxc_gpt3; |
| @@ -14,3 +13,10 @@ extern struct platform_device mxc_uart_device4; | |||
| 14 | extern struct platform_device mxc_uart_device5; | 13 | extern struct platform_device mxc_uart_device5; |
| 15 | extern struct platform_device mxc_w1_master_device; | 14 | extern struct platform_device mxc_w1_master_device; |
| 16 | extern struct platform_device mxc_nand_device; | 15 | extern struct platform_device mxc_nand_device; |
| 16 | extern struct platform_device mxc_fb_device; | ||
| 17 | extern struct platform_device mxc_fec_device; | ||
| 18 | extern struct platform_device mxc_pwm_device; | ||
| 19 | extern struct platform_device mxc_i2c_device0; | ||
| 20 | extern struct platform_device mxc_i2c_device1; | ||
| 21 | extern struct platform_device mxc_sdhc_device0; | ||
| 22 | extern struct platform_device mxc_sdhc_device1; | ||
diff --git a/arch/arm/mach-mx2/generic.c b/arch/arm/mach-mx2/generic.c index dea6521d4d5c..bd51dd04948e 100644 --- a/arch/arm/mach-mx2/generic.c +++ b/arch/arm/mach-mx2/generic.c | |||
| @@ -21,6 +21,7 @@ | |||
| 21 | #include <linux/mm.h> | 21 | #include <linux/mm.h> |
| 22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
| 23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
| 24 | #include <mach/common.h> | ||
| 24 | #include <asm/pgtable.h> | 25 | #include <asm/pgtable.h> |
| 25 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
| 26 | 27 | ||
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mx27ads.c index 2b5c67f54571..4a3b097adc12 100644 --- a/arch/arm/mach-mx2/mx27ads.c +++ b/arch/arm/mach-mx2/mx27ads.c | |||
| @@ -31,7 +31,7 @@ | |||
| 31 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
| 32 | #include <mach/gpio.h> | 32 | #include <mach/gpio.h> |
| 33 | #include <mach/imx-uart.h> | 33 | #include <mach/imx-uart.h> |
| 34 | #include <mach/iomux-mx1-mx2.h> | 34 | #include <mach/iomux.h> |
| 35 | #include <mach/board-mx27ads.h> | 35 | #include <mach/board-mx27ads.h> |
| 36 | 36 | ||
| 37 | #include "devices.h" | 37 | #include "devices.h" |
| @@ -135,6 +135,7 @@ static int uart_mxc_port3_exit(struct platform_device *pdev) | |||
| 135 | { | 135 | { |
| 136 | mxc_gpio_release_multiple_pins(mxc_uart3_pins, | 136 | mxc_gpio_release_multiple_pins(mxc_uart3_pins, |
| 137 | ARRAY_SIZE(mxc_uart3_pins)); | 137 | ARRAY_SIZE(mxc_uart3_pins)); |
| 138 | return 0; | ||
| 138 | } | 139 | } |
| 139 | 140 | ||
| 140 | static int mxc_uart4_pins[] = { | 141 | static int mxc_uart4_pins[] = { |
| @@ -179,6 +180,7 @@ static int uart_mxc_port5_exit(struct platform_device *pdev) | |||
| 179 | 180 | ||
| 180 | static struct platform_device *platform_devices[] __initdata = { | 181 | static struct platform_device *platform_devices[] __initdata = { |
| 181 | &mx27ads_nor_mtd_device, | 182 | &mx27ads_nor_mtd_device, |
| 183 | &mxc_fec_device, | ||
| 182 | }; | 184 | }; |
| 183 | 185 | ||
| 184 | static int mxc_fec_pins[] = { | 186 | static int mxc_fec_pins[] = { |
| @@ -196,7 +198,7 @@ static int mxc_fec_pins[] = { | |||
| 196 | PD11_AOUT_FEC_TX_CLK, | 198 | PD11_AOUT_FEC_TX_CLK, |
| 197 | PD12_AOUT_FEC_RXD0, | 199 | PD12_AOUT_FEC_RXD0, |
| 198 | PD13_AOUT_FEC_RX_DV, | 200 | PD13_AOUT_FEC_RX_DV, |
| 199 | PD14_AOUT_FEC_CLR, | 201 | PD14_AOUT_FEC_RX_CLK, |
| 200 | PD15_AOUT_FEC_COL, | 202 | PD15_AOUT_FEC_COL, |
| 201 | PD16_AIN_FEC_TX_ER, | 203 | PD16_AIN_FEC_TX_ER, |
| 202 | PF23_AIN_FEC_TX_EN | 204 | PF23_AIN_FEC_TX_EN |
| @@ -208,12 +210,6 @@ static void gpio_fec_active(void) | |||
| 208 | ARRAY_SIZE(mxc_fec_pins), "FEC"); | 210 | ARRAY_SIZE(mxc_fec_pins), "FEC"); |
| 209 | } | 211 | } |
| 210 | 212 | ||
| 211 | static void gpio_fec_inactive(void) | ||
| 212 | { | ||
| 213 | mxc_gpio_release_multiple_pins(mxc_fec_pins, | ||
| 214 | ARRAY_SIZE(mxc_fec_pins)); | ||
| 215 | } | ||
| 216 | |||
| 217 | static struct imxuart_platform_data uart_pdata[] = { | 213 | static struct imxuart_platform_data uart_pdata[] = { |
| 218 | { | 214 | { |
| 219 | .init = uart_mxc_port0_init, | 215 | .init = uart_mxc_port0_init, |
| @@ -263,11 +259,10 @@ static void __init mx27ads_timer_init(void) | |||
| 263 | if ((__raw_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0) | 259 | if ((__raw_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0) |
| 264 | fref = 27000000; | 260 | fref = 27000000; |
| 265 | 261 | ||
| 266 | mxc_clocks_init(fref); | 262 | mx27_clocks_init(fref); |
| 267 | mxc_timer_init("gpt_clk.0"); | ||
| 268 | } | 263 | } |
| 269 | 264 | ||
| 270 | struct sys_timer mx27ads_timer = { | 265 | static struct sys_timer mx27ads_timer = { |
| 271 | .init = mx27ads_timer_init, | 266 | .init = mx27ads_timer_init, |
| 272 | }; | 267 | }; |
| 273 | 268 | ||
| @@ -280,7 +275,7 @@ static struct map_desc mx27ads_io_desc[] __initdata = { | |||
| 280 | }, | 275 | }, |
| 281 | }; | 276 | }; |
| 282 | 277 | ||
| 283 | void __init mx27ads_map_io(void) | 278 | static void __init mx27ads_map_io(void) |
| 284 | { | 279 | { |
| 285 | mxc_map_io(); | 280 | mxc_map_io(); |
| 286 | iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc)); | 281 | iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc)); |
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c index dfd4156da7d5..aa4eaa61d1b5 100644 --- a/arch/arm/mach-mx2/pcm038.c +++ b/arch/arm/mach-mx2/pcm038.c | |||
| @@ -20,11 +20,18 @@ | |||
| 20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/mtd/physmap.h> | 21 | #include <linux/mtd/physmap.h> |
| 22 | #include <linux/mtd/plat-ram.h> | 22 | #include <linux/mtd/plat-ram.h> |
| 23 | #include <linux/io.h> | ||
| 24 | #include <linux/i2c.h> | ||
| 25 | #include <linux/i2c/at24.h> | ||
| 26 | |||
| 23 | #include <asm/mach/arch.h> | 27 | #include <asm/mach/arch.h> |
| 24 | #include <asm/mach-types.h> | 28 | #include <asm/mach-types.h> |
| 25 | #include <mach/common.h> | 29 | #include <mach/common.h> |
| 26 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
| 27 | #include <mach/iomux-mx1-mx2.h> | 31 | #include <mach/iomux.h> |
| 32 | #ifdef CONFIG_I2C_IMX | ||
| 33 | #include <mach/i2c.h> | ||
| 34 | #endif | ||
| 28 | #include <asm/mach/time.h> | 35 | #include <asm/mach/time.h> |
| 29 | #include <mach/imx-uart.h> | 36 | #include <mach/imx-uart.h> |
| 30 | #include <mach/board-pcm038.h> | 37 | #include <mach/board-pcm038.h> |
| @@ -121,10 +128,10 @@ static int uart_mxc_port1_exit(struct platform_device *pdev) | |||
| 121 | return 0; | 128 | return 0; |
| 122 | } | 129 | } |
| 123 | 130 | ||
| 124 | static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS, | 131 | static int mxc_uart2_pins[] = { PE8_PF_UART3_TXD, |
| 125 | PE9_PF_UART3_RXD, | 132 | PE9_PF_UART3_RXD, |
| 126 | PE10_PF_UART3_CTS, | 133 | PE10_PF_UART3_CTS, |
| 127 | PE9_PF_UART3_RXD }; | 134 | PE11_PF_UART3_RTS }; |
| 128 | 135 | ||
| 129 | static int uart_mxc_port2_init(struct platform_device *pdev) | 136 | static int uart_mxc_port2_init(struct platform_device *pdev) |
| 130 | { | 137 | { |
| @@ -170,7 +177,7 @@ static int mxc_fec_pins[] = { | |||
| 170 | PD11_AOUT_FEC_TX_CLK, | 177 | PD11_AOUT_FEC_TX_CLK, |
| 171 | PD12_AOUT_FEC_RXD0, | 178 | PD12_AOUT_FEC_RXD0, |
| 172 | PD13_AOUT_FEC_RX_DV, | 179 | PD13_AOUT_FEC_RX_DV, |
| 173 | PD14_AOUT_FEC_CLR, | 180 | PD14_AOUT_FEC_RX_CLK, |
| 174 | PD15_AOUT_FEC_COL, | 181 | PD15_AOUT_FEC_COL, |
| 175 | PD16_AIN_FEC_TX_ER, | 182 | PD16_AIN_FEC_TX_ER, |
| 176 | PF23_AIN_FEC_TX_EN | 183 | PF23_AIN_FEC_TX_EN |
| @@ -182,12 +189,6 @@ static void gpio_fec_active(void) | |||
| 182 | ARRAY_SIZE(mxc_fec_pins), "FEC"); | 189 | ARRAY_SIZE(mxc_fec_pins), "FEC"); |
| 183 | } | 190 | } |
| 184 | 191 | ||
| 185 | static void gpio_fec_inactive(void) | ||
| 186 | { | ||
| 187 | mxc_gpio_release_multiple_pins(mxc_fec_pins, | ||
| 188 | ARRAY_SIZE(mxc_fec_pins)); | ||
| 189 | } | ||
| 190 | |||
| 191 | static struct mxc_nand_platform_data pcm038_nand_board_info = { | 192 | static struct mxc_nand_platform_data pcm038_nand_board_info = { |
| 192 | .width = 1, | 193 | .width = 1, |
| 193 | .hw_ecc = 1, | 194 | .hw_ecc = 1, |
| @@ -196,6 +197,7 @@ static struct mxc_nand_platform_data pcm038_nand_board_info = { | |||
| 196 | static struct platform_device *platform_devices[] __initdata = { | 197 | static struct platform_device *platform_devices[] __initdata = { |
| 197 | &pcm038_nor_mtd_device, | 198 | &pcm038_nor_mtd_device, |
| 198 | &mxc_w1_master_device, | 199 | &mxc_w1_master_device, |
| 200 | &mxc_fec_device, | ||
| 199 | &pcm038_sram_mtd_device, | 201 | &pcm038_sram_mtd_device, |
| 200 | }; | 202 | }; |
| 201 | 203 | ||
| @@ -208,6 +210,51 @@ static void __init pcm038_init_sram(void) | |||
| 208 | __raw_writel(0x22220a00, CSCR_A(1)); | 210 | __raw_writel(0x22220a00, CSCR_A(1)); |
| 209 | } | 211 | } |
| 210 | 212 | ||
| 213 | #ifdef CONFIG_I2C_IMX | ||
| 214 | static int mxc_i2c1_pins[] = { | ||
| 215 | PC5_PF_I2C2_SDA, | ||
| 216 | PC6_PF_I2C2_SCL | ||
| 217 | }; | ||
| 218 | |||
| 219 | static int pcm038_i2c_1_init(struct device *dev) | ||
| 220 | { | ||
| 221 | return mxc_gpio_setup_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins), | ||
| 222 | "I2C1"); | ||
| 223 | } | ||
| 224 | |||
| 225 | static void pcm038_i2c_1_exit(struct device *dev) | ||
| 226 | { | ||
| 227 | mxc_gpio_release_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins)); | ||
| 228 | } | ||
| 229 | |||
| 230 | static struct imxi2c_platform_data pcm038_i2c_1_data = { | ||
| 231 | .bitrate = 100000, | ||
| 232 | .init = pcm038_i2c_1_init, | ||
| 233 | .exit = pcm038_i2c_1_exit, | ||
| 234 | }; | ||
| 235 | |||
| 236 | static struct at24_platform_data board_eeprom = { | ||
| 237 | .byte_len = 4096, | ||
| 238 | .page_size = 32, | ||
| 239 | .flags = AT24_FLAG_ADDR16, | ||
| 240 | }; | ||
| 241 | |||
| 242 | static struct i2c_board_info pcm038_i2c_devices[] = { | ||
| 243 | [0] = { | ||
| 244 | I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ | ||
| 245 | .platform_data = &board_eeprom, | ||
| 246 | }, | ||
| 247 | [1] = { | ||
| 248 | I2C_BOARD_INFO("rtc-pcf8563", 0x51), | ||
| 249 | .type = "pcf8563" | ||
| 250 | }, | ||
| 251 | [2] = { | ||
| 252 | I2C_BOARD_INFO("lm75", 0x4a), | ||
| 253 | .type = "lm75" | ||
| 254 | } | ||
| 255 | }; | ||
| 256 | #endif | ||
| 257 | |||
| 211 | static void __init pcm038_init(void) | 258 | static void __init pcm038_init(void) |
| 212 | { | 259 | { |
| 213 | gpio_fec_active(); | 260 | gpio_fec_active(); |
| @@ -217,9 +264,17 @@ static void __init pcm038_init(void) | |||
| 217 | mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); | 264 | mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); |
| 218 | mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); | 265 | mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); |
| 219 | 266 | ||
| 220 | mxc_gpio_mode(PE16_AF_RTCK); /* OWIRE */ | 267 | mxc_gpio_mode(PE16_AF_OWIRE); |
| 221 | mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info); | 268 | mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info); |
| 222 | 269 | ||
| 270 | #ifdef CONFIG_I2C_IMX | ||
| 271 | /* only the i2c master 1 is used on this CPU card */ | ||
| 272 | i2c_register_board_info(1, pcm038_i2c_devices, | ||
| 273 | ARRAY_SIZE(pcm038_i2c_devices)); | ||
| 274 | |||
| 275 | mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data); | ||
| 276 | #endif | ||
| 277 | |||
| 223 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 278 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
| 224 | 279 | ||
| 225 | #ifdef CONFIG_MACH_PCM970_BASEBOARD | 280 | #ifdef CONFIG_MACH_PCM970_BASEBOARD |
| @@ -229,11 +284,10 @@ static void __init pcm038_init(void) | |||
| 229 | 284 | ||
| 230 | static void __init pcm038_timer_init(void) | 285 | static void __init pcm038_timer_init(void) |
| 231 | { | 286 | { |
| 232 | mxc_clocks_init(26000000); | 287 | mx27_clocks_init(26000000); |
| 233 | mxc_timer_init("gpt_clk.0"); | ||
| 234 | } | 288 | } |
| 235 | 289 | ||
| 236 | struct sys_timer pcm038_timer = { | 290 | static struct sys_timer pcm038_timer = { |
| 237 | .init = pcm038_timer_init, | 291 | .init = pcm038_timer_init, |
| 238 | }; | 292 | }; |
| 239 | 293 | ||
diff --git a/arch/arm/mach-mx2/pcm970-baseboard.c b/arch/arm/mach-mx2/pcm970-baseboard.c index a560cd6ad23d..bf4e520bc1bc 100644 --- a/arch/arm/mach-mx2/pcm970-baseboard.c +++ b/arch/arm/mach-mx2/pcm970-baseboard.c | |||
| @@ -17,9 +17,138 @@ | |||
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
| 20 | #include <mach/hardware.h> | 20 | #include <linux/gpio.h> |
| 21 | #include <linux/irq.h> | ||
| 22 | |||
| 21 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
| 22 | 24 | ||
| 25 | #include <mach/hardware.h> | ||
| 26 | #include <mach/common.h> | ||
| 27 | #include <mach/mmc.h> | ||
| 28 | #include <mach/imxfb.h> | ||
| 29 | #include <mach/iomux.h> | ||
| 30 | |||
| 31 | #include "devices.h" | ||
| 32 | |||
| 33 | static int pcm970_sdhc2_get_ro(struct device *dev) | ||
| 34 | { | ||
| 35 | return gpio_get_value(GPIO_PORTC + 28); | ||
| 36 | } | ||
| 37 | |||
| 38 | static int pcm970_sdhc2_pins[] = { | ||
| 39 | PB4_PF_SD2_D0, | ||
| 40 | PB5_PF_SD2_D1, | ||
| 41 | PB6_PF_SD2_D2, | ||
| 42 | PB7_PF_SD2_D3, | ||
| 43 | PB8_PF_SD2_CMD, | ||
| 44 | PB9_PF_SD2_CLK, | ||
| 45 | }; | ||
| 46 | |||
| 47 | static int pcm970_sdhc2_init(struct device *dev, irq_handler_t detect_irq, void *data) | ||
| 48 | { | ||
| 49 | int ret; | ||
| 50 | |||
| 51 | ret = mxc_gpio_setup_multiple_pins(pcm970_sdhc2_pins, | ||
| 52 | ARRAY_SIZE(pcm970_sdhc2_pins), "sdhc2"); | ||
| 53 | if(ret) | ||
| 54 | return ret; | ||
| 55 | |||
| 56 | ret = request_irq(IRQ_GPIOC(29), detect_irq, 0, | ||
| 57 | "imx-mmc-detect", data); | ||
| 58 | if (ret) | ||
| 59 | goto out_release_gpio; | ||
| 60 | |||
| 61 | set_irq_type(IRQ_GPIOC(29), IRQF_TRIGGER_FALLING); | ||
| 62 | |||
| 63 | ret = gpio_request(GPIO_PORTC + 28, "imx-mmc-ro"); | ||
| 64 | if (ret) | ||
| 65 | goto out_release_gpio; | ||
| 66 | |||
| 67 | mxc_gpio_mode((GPIO_PORTC | 28) | GPIO_GPIO | GPIO_IN); | ||
| 68 | gpio_direction_input(GPIO_PORTC + 28); | ||
| 69 | |||
| 70 | return 0; | ||
| 71 | |||
| 72 | out_release_gpio: | ||
| 73 | mxc_gpio_release_multiple_pins(pcm970_sdhc2_pins, | ||
| 74 | ARRAY_SIZE(pcm970_sdhc2_pins)); | ||
| 75 | return ret; | ||
| 76 | } | ||
| 77 | |||
| 78 | static void pcm970_sdhc2_exit(struct device *dev, void *data) | ||
| 79 | { | ||
| 80 | free_irq(IRQ_GPIOC(29), data); | ||
| 81 | gpio_free(GPIO_PORTC + 28); | ||
| 82 | mxc_gpio_release_multiple_pins(pcm970_sdhc2_pins, | ||
| 83 | ARRAY_SIZE(pcm970_sdhc2_pins)); | ||
| 84 | } | ||
| 85 | |||
| 86 | static struct imxmmc_platform_data sdhc_pdata = { | ||
| 87 | .get_ro = pcm970_sdhc2_get_ro, | ||
| 88 | .init = pcm970_sdhc2_init, | ||
| 89 | .exit = pcm970_sdhc2_exit, | ||
| 90 | }; | ||
| 91 | |||
| 92 | static int mxc_fb_pins[] = { | ||
| 93 | PA5_PF_LSCLK, PA6_PF_LD0, PA7_PF_LD1, PA8_PF_LD2, | ||
| 94 | PA9_PF_LD3, PA10_PF_LD4, PA11_PF_LD5, PA12_PF_LD6, | ||
| 95 | PA13_PF_LD7, PA14_PF_LD8, PA15_PF_LD9, PA16_PF_LD10, | ||
| 96 | PA17_PF_LD11, PA18_PF_LD12, PA19_PF_LD13, PA20_PF_LD14, | ||
| 97 | PA21_PF_LD15, PA22_PF_LD16, PA23_PF_LD17, PA24_PF_REV, | ||
| 98 | PA25_PF_CLS, PA26_PF_PS, PA27_PF_SPL_SPR, PA28_PF_HSYNC, | ||
| 99 | PA29_PF_VSYNC, PA30_PF_CONTRAST, PA31_PF_OE_ACD | ||
| 100 | }; | ||
| 101 | |||
| 102 | static int pcm038_fb_init(struct platform_device *pdev) | ||
| 103 | { | ||
| 104 | return mxc_gpio_setup_multiple_pins(mxc_fb_pins, | ||
| 105 | ARRAY_SIZE(mxc_fb_pins), "FB"); | ||
| 106 | } | ||
| 107 | |||
| 108 | static int pcm038_fb_exit(struct platform_device *pdev) | ||
| 109 | { | ||
| 110 | mxc_gpio_release_multiple_pins(mxc_fb_pins, ARRAY_SIZE(mxc_fb_pins)); | ||
| 111 | |||
| 112 | return 0; | ||
| 113 | } | ||
| 114 | |||
| 115 | /* | ||
| 116 | * Connected is a portrait Sharp-QVGA display | ||
| 117 | * of type: LQ035Q7DH06 | ||
| 118 | */ | ||
| 119 | static struct imx_fb_platform_data pcm038_fb_data = { | ||
| 120 | .pixclock = 188679, /* in ps (5.3MHz) */ | ||
| 121 | .xres = 240, | ||
| 122 | .yres = 320, | ||
| 123 | |||
| 124 | .bpp = 16, | ||
| 125 | .hsync_len = 7, | ||
| 126 | .left_margin = 5, | ||
| 127 | .right_margin = 16, | ||
| 128 | |||
| 129 | .vsync_len = 1, | ||
| 130 | .upper_margin = 7, | ||
| 131 | .lower_margin = 9, | ||
| 132 | .fixed_screen_cpu = 0, | ||
| 133 | |||
| 134 | /* | ||
| 135 | * - HSYNC active high | ||
| 136 | * - VSYNC active high | ||
| 137 | * - clk notenabled while idle | ||
| 138 | * - clock not inverted | ||
| 139 | * - data not inverted | ||
| 140 | * - data enable low active | ||
| 141 | * - enable sharp mode | ||
| 142 | */ | ||
| 143 | .pcr = 0xFA0080C0, | ||
| 144 | .pwmr = 0x00A903FF, | ||
| 145 | .lscr1 = 0x00120300, | ||
| 146 | .dmacr = 0x00020010, | ||
| 147 | |||
| 148 | .init = pcm038_fb_init, | ||
| 149 | .exit = pcm038_fb_exit, | ||
| 150 | }; | ||
| 151 | |||
| 23 | /* | 152 | /* |
| 24 | * system init for baseboard usage. Will be called by pcm038 init. | 153 | * system init for baseboard usage. Will be called by pcm038 init. |
| 25 | * | 154 | * |
| @@ -28,4 +157,6 @@ | |||
| 28 | */ | 157 | */ |
| 29 | void __init pcm970_baseboard_init(void) | 158 | void __init pcm970_baseboard_init(void) |
| 30 | { | 159 | { |
| 160 | mxc_register_device(&mxc_fb_device, &pcm038_fb_data); | ||
| 161 | mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); | ||
| 31 | } | 162 | } |
diff --git a/arch/arm/mach-mx2/serial.c b/arch/arm/mach-mx2/serial.c index 16debc296dad..40a485cdc10e 100644 --- a/arch/arm/mach-mx2/serial.c +++ b/arch/arm/mach-mx2/serial.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include <linux/serial.h> | 22 | #include <linux/serial.h> |
| 23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
| 24 | #include <mach/imx-uart.h> | 24 | #include <mach/imx-uart.h> |
| 25 | #include "devices.h" | ||
| 25 | 26 | ||
| 26 | static struct resource uart0[] = { | 27 | static struct resource uart0[] = { |
| 27 | { | 28 | { |
| @@ -99,6 +100,7 @@ struct platform_device mxc_uart_device3 = { | |||
| 99 | .num_resources = ARRAY_SIZE(uart3), | 100 | .num_resources = ARRAY_SIZE(uart3), |
| 100 | }; | 101 | }; |
| 101 | 102 | ||
| 103 | #ifdef CONFIG_MACH_MX27 | ||
| 102 | static struct resource uart4[] = { | 104 | static struct resource uart4[] = { |
| 103 | { | 105 | { |
| 104 | .start = UART5_BASE_ADDR, | 106 | .start = UART5_BASE_ADDR, |
| @@ -136,3 +138,4 @@ struct platform_device mxc_uart_device5 = { | |||
| 136 | .resource = uart5, | 138 | .resource = uart5, |
| 137 | .num_resources = ARRAY_SIZE(uart5), | 139 | .num_resources = ARRAY_SIZE(uart5), |
| 138 | }; | 140 | }; |
| 141 | #endif | ||
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index e79659e8176e..d6235583e979 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig | |||
| @@ -1,21 +1,40 @@ | |||
| 1 | menu "MX3 Options" | 1 | if ARCH_MX3 |
| 2 | depends on ARCH_MX3 | 2 | |
| 3 | config ARCH_MX31 | ||
| 4 | bool | ||
| 5 | |||
| 6 | config ARCH_MX35 | ||
| 7 | bool | ||
| 8 | |||
| 9 | comment "MX3 platforms:" | ||
| 3 | 10 | ||
| 4 | config MACH_MX31ADS | 11 | config MACH_MX31ADS |
| 5 | bool "Support MX31ADS platforms" | 12 | bool "Support MX31ADS platforms" |
| 13 | select ARCH_MX31 | ||
| 6 | default y | 14 | default y |
| 7 | help | 15 | help |
| 8 | Include support for MX31ADS platform. This includes specific | 16 | Include support for MX31ADS platform. This includes specific |
| 9 | configurations for the board and its peripherals. | 17 | configurations for the board and its peripherals. |
| 10 | 18 | ||
| 19 | config MACH_MX31ADS_WM1133_EV1 | ||
| 20 | bool "Support Wolfson Microelectronics 1133-EV1 module" | ||
| 21 | depends on MACH_MX31ADS | ||
| 22 | select MFD_WM8350_CONFIG_MODE_0 | ||
| 23 | select MFD_WM8352_CONFIG_MODE_0 | ||
| 24 | help | ||
| 25 | Include support for the Wolfson Microelectronics 1133-EV1 PMU | ||
| 26 | and audio module for the MX31ADS platform. | ||
| 27 | |||
| 11 | config MACH_PCM037 | 28 | config MACH_PCM037 |
| 12 | bool "Support Phytec pcm037 platforms" | 29 | bool "Support Phytec pcm037 (i.MX31) platforms" |
| 30 | select ARCH_MX31 | ||
| 13 | help | 31 | help |
| 14 | Include support for Phytec pcm037 platform. This includes | 32 | Include support for Phytec pcm037 platform. This includes |
| 15 | specific configurations for the board and its peripherals. | 33 | specific configurations for the board and its peripherals. |
| 16 | 34 | ||
| 17 | config MACH_MX31LITE | 35 | config MACH_MX31LITE |
| 18 | bool "Support MX31 LITEKIT (LogicPD)" | 36 | bool "Support MX31 LITEKIT (LogicPD)" |
| 37 | select ARCH_MX31 | ||
| 19 | default n | 38 | default n |
| 20 | help | 39 | help |
| 21 | Include support for MX31 LITEKIT platform. This includes specific | 40 | Include support for MX31 LITEKIT platform. This includes specific |
| @@ -23,6 +42,7 @@ config MACH_MX31LITE | |||
| 23 | 42 | ||
| 24 | config MACH_MX31_3DS | 43 | config MACH_MX31_3DS |
| 25 | bool "Support MX31PDK (3DS)" | 44 | bool "Support MX31PDK (3DS)" |
| 45 | select ARCH_MX31 | ||
| 26 | default n | 46 | default n |
| 27 | help | 47 | help |
| 28 | Include support for MX31PDK (3DS) platform. This includes specific | 48 | Include support for MX31PDK (3DS) platform. This includes specific |
| @@ -30,10 +50,18 @@ config MACH_MX31_3DS | |||
| 30 | 50 | ||
| 31 | config MACH_MX31MOBOARD | 51 | config MACH_MX31MOBOARD |
| 32 | bool "Support mx31moboard platforms (EPFL Mobots group)" | 52 | bool "Support mx31moboard platforms (EPFL Mobots group)" |
| 53 | select ARCH_MX31 | ||
| 33 | default n | 54 | default n |
| 34 | help | 55 | help |
| 35 | Include support for mx31moboard platform. This includes specific | 56 | Include support for mx31moboard platform. This includes specific |
| 36 | configurations for the board and its peripherals. | 57 | configurations for the board and its peripherals. |
| 37 | 58 | ||
| 38 | endmenu | 59 | config MACH_QONG |
| 60 | bool "Support Dave/DENX QongEVB-LITE platform" | ||
| 61 | select ARCH_MX31 | ||
| 62 | default n | ||
| 63 | help | ||
| 64 | Include support for Dave/DENX QongEVB-LITE platform. This includes | ||
| 65 | specific configurations for the board and its peripherals. | ||
| 39 | 66 | ||
| 67 | endif | ||
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile index 5a151540fe83..272c8a953b30 100644 --- a/arch/arm/mach-mx3/Makefile +++ b/arch/arm/mach-mx3/Makefile | |||
| @@ -4,9 +4,13 @@ | |||
| 4 | 4 | ||
| 5 | # Object file lists. | 5 | # Object file lists. |
| 6 | 6 | ||
| 7 | obj-y := mm.o clock.o devices.o iomux.o | 7 | obj-y := mm.o devices.o |
| 8 | obj-$(CONFIG_ARCH_MX31) += clock.o iomux.o | ||
| 9 | obj-$(CONFIG_ARCH_MX35) += clock-imx35.o | ||
| 8 | obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o | 10 | obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o |
| 9 | obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o | 11 | obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o |
| 10 | obj-$(CONFIG_MACH_PCM037) += pcm037.o | 12 | obj-$(CONFIG_MACH_PCM037) += pcm037.o |
| 11 | obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o | 13 | obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o |
| 12 | obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o | 14 | obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o mx31moboard-devboard.o \ |
| 15 | mx31moboard-marxbot.o | ||
| 16 | obj-$(CONFIG_MACH_QONG) += qong.o | ||
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c new file mode 100644 index 000000000000..53a112d4e04a --- /dev/null +++ b/arch/arm/mach-mx3/clock-imx35.c | |||
| @@ -0,0 +1,487 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 by Sascha Hauer, Pengutronix | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License | ||
| 6 | * as published by the Free Software Foundation; either version 2 | ||
| 7 | * of the License, or (at your option) any later version. | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program; if not, write to the Free Software | ||
| 15 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
| 16 | * MA 02110-1301, USA. | ||
| 17 | */ | ||
| 18 | |||
| 19 | #include <linux/kernel.h> | ||
| 20 | #include <linux/init.h> | ||
| 21 | #include <linux/list.h> | ||
| 22 | #include <linux/clk.h> | ||
| 23 | #include <linux/io.h> | ||
| 24 | |||
| 25 | #include <asm/clkdev.h> | ||
| 26 | |||
| 27 | #include <mach/clock.h> | ||
| 28 | #include <mach/hardware.h> | ||
| 29 | #include <mach/common.h> | ||
| 30 | |||
| 31 | #define CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) | ||
| 32 | |||
| 33 | #define CCM_CCMR 0x00 | ||
| 34 | #define CCM_PDR0 0x04 | ||
| 35 | #define CCM_PDR1 0x08 | ||
| 36 | #define CCM_PDR2 0x0C | ||
| 37 | #define CCM_PDR3 0x10 | ||
| 38 | #define CCM_PDR4 0x14 | ||
| 39 | #define CCM_RCSR 0x18 | ||
| 40 | #define CCM_MPCTL 0x1C | ||
| 41 | #define CCM_PPCTL 0x20 | ||
| 42 | #define CCM_ACMR 0x24 | ||
| 43 | #define CCM_COSR 0x28 | ||
| 44 | #define CCM_CGR0 0x2C | ||
| 45 | #define CCM_CGR1 0x30 | ||
| 46 | #define CCM_CGR2 0x34 | ||
| 47 | #define CCM_CGR3 0x38 | ||
| 48 | |||
| 49 | #ifdef HAVE_SET_RATE_SUPPORT | ||
| 50 | static void calc_dividers(u32 div, u32 *pre, u32 *post, u32 maxpost) | ||
| 51 | { | ||
| 52 | u32 min_pre, temp_pre, old_err, err; | ||
| 53 | |||
| 54 | min_pre = (div - 1) / maxpost + 1; | ||
| 55 | old_err = 8; | ||
| 56 | |||
| 57 | for (temp_pre = 8; temp_pre >= min_pre; temp_pre--) { | ||
| 58 | if (div > (temp_pre * maxpost)) | ||
| 59 | break; | ||
| 60 | |||
| 61 | if (div < (temp_pre * temp_pre)) | ||
| 62 | continue; | ||
| 63 | |||
| 64 | err = div % temp_pre; | ||
| 65 | |||
| 66 | if (err == 0) { | ||
| 67 | *pre = temp_pre; | ||
| 68 | break; | ||
| 69 | } | ||
| 70 | |||
| 71 | err = temp_pre - err; | ||
| 72 | |||
| 73 | if (err < old_err) { | ||
| 74 | old_err = err; | ||
| 75 | *pre = temp_pre; | ||
| 76 | } | ||
| 77 | } | ||
| 78 | |||
| 79 | *post = (div + *pre - 1) / *pre; | ||
| 80 | } | ||
| 81 | |||
| 82 | /* get the best values for a 3-bit divider combined with a 6-bit divider */ | ||
| 83 | static void calc_dividers_3_6(u32 div, u32 *pre, u32 *post) | ||
| 84 | { | ||
| 85 | if (div >= 512) { | ||
| 86 | *pre = 8; | ||
| 87 | *post = 64; | ||
| 88 | } else if (div >= 64) { | ||
| 89 | calc_dividers(div, pre, post, 64); | ||
| 90 | } else if (div <= 8) { | ||
| 91 | *pre = div; | ||
| 92 | *post = 1; | ||
| 93 | } else { | ||
| 94 | *pre = 1; | ||
| 95 | *post = div; | ||
| 96 | } | ||
| 97 | } | ||
| 98 | |||
| 99 | /* get the best values for two cascaded 3-bit dividers */ | ||
| 100 | static void calc_dividers_3_3(u32 div, u32 *pre, u32 *post) | ||
| 101 | { | ||
| 102 | if (div >= 64) { | ||
| 103 | *pre = *post = 8; | ||
| 104 | } else if (div > 8) { | ||
| 105 | calc_dividers(div, pre, post, 8); | ||
| 106 | } else { | ||
| 107 | *pre = 1; | ||
| 108 | *post = div; | ||
| 109 | } | ||
| 110 | } | ||
| 111 | #endif | ||
| 112 | |||
| 113 | static unsigned long get_rate_mpll(void) | ||
| 114 | { | ||
| 115 | ulong mpctl = __raw_readl(CCM_BASE + CCM_MPCTL); | ||
| 116 | |||
| 117 | return mxc_decode_pll(mpctl, 24000000); | ||
| 118 | } | ||
| 119 | |||
| 120 | static unsigned long get_rate_ppll(void) | ||
| 121 | { | ||
| 122 | ulong ppctl = __raw_readl(CCM_BASE + CCM_PPCTL); | ||
| 123 | |||
| 124 | return mxc_decode_pll(ppctl, 24000000); | ||
| 125 | } | ||
| 126 | |||
| 127 | struct arm_ahb_div { | ||
| 128 | unsigned char arm, ahb, sel; | ||
| 129 | }; | ||
| 130 | |||
| 131 | static struct arm_ahb_div clk_consumer[] = { | ||
| 132 | { .arm = 1, .ahb = 4, .sel = 0}, | ||
| 133 | { .arm = 1, .ahb = 3, .sel = 1}, | ||
| 134 | { .arm = 2, .ahb = 2, .sel = 0}, | ||
| 135 | { .arm = 0, .ahb = 0, .sel = 0}, | ||
| 136 | { .arm = 0, .ahb = 0, .sel = 0}, | ||
| 137 | { .arm = 0, .ahb = 0, .sel = 0}, | ||
| 138 | { .arm = 4, .ahb = 1, .sel = 0}, | ||
| 139 | { .arm = 1, .ahb = 5, .sel = 0}, | ||
| 140 | { .arm = 1, .ahb = 8, .sel = 0}, | ||
| 141 | { .arm = 1, .ahb = 6, .sel = 1}, | ||
| 142 | { .arm = 2, .ahb = 4, .sel = 0}, | ||
| 143 | { .arm = 0, .ahb = 0, .sel = 0}, | ||
| 144 | { .arm = 0, .ahb = 0, .sel = 0}, | ||
| 145 | { .arm = 0, .ahb = 0, .sel = 0}, | ||
| 146 | { .arm = 4, .ahb = 2, .sel = 0}, | ||
| 147 | { .arm = 0, .ahb = 0, .sel = 0}, | ||
| 148 | }; | ||
| 149 | |||
| 150 | static struct arm_ahb_div clk_automotive[] = { | ||
| 151 | { .arm = 1, .ahb = 3, .sel = 0}, | ||
| 152 | { .arm = 1, .ahb = 2, .sel = 1}, | ||
| 153 | { .arm = 2, .ahb = 1, .sel = 1}, | ||
| 154 | { .arm = 0, .ahb = 0, .sel = 0}, | ||
| 155 | { .arm = 1, .ahb = 6, .sel = 0}, | ||
| 156 | { .arm = 1, .ahb = 4, .sel = 1}, | ||
| 157 | { .arm = 2, .ahb = 2, .sel = 1}, | ||
| 158 | { .arm = 0, .ahb = 0, .sel = 0}, | ||
| 159 | }; | ||
| 160 | |||
| 161 | static unsigned long get_rate_arm(void) | ||
| 162 | { | ||
| 163 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); | ||
| 164 | struct arm_ahb_div *aad; | ||
| 165 | unsigned long fref = get_rate_mpll(); | ||
| 166 | |||
| 167 | if (pdr0 & 1) { | ||
| 168 | /* consumer path */ | ||
| 169 | aad = &clk_consumer[(pdr0 >> 16) & 0xf]; | ||
| 170 | if (aad->sel) | ||
| 171 | fref = fref * 2 / 3; | ||
| 172 | } else { | ||
| 173 | /* auto path */ | ||
| 174 | aad = &clk_automotive[(pdr0 >> 9) & 0x7]; | ||
| 175 | if (aad->sel) | ||
| 176 | fref = fref * 3 / 4; | ||
| 177 | } | ||
| 178 | return fref / aad->arm; | ||
| 179 | } | ||
| 180 | |||
| 181 | static unsigned long get_rate_ahb(struct clk *clk) | ||
| 182 | { | ||
| 183 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); | ||
| 184 | struct arm_ahb_div *aad; | ||
| 185 | unsigned long fref = get_rate_mpll(); | ||
| 186 | |||
| 187 | if (pdr0 & 1) | ||
| 188 | /* consumer path */ | ||
| 189 | aad = &clk_consumer[(pdr0 >> 16) & 0xf]; | ||
| 190 | else | ||
| 191 | /* auto path */ | ||
| 192 | aad = &clk_automotive[(pdr0 >> 9) & 0x7]; | ||
| 193 | |||
| 194 | return fref / aad->ahb; | ||
| 195 | } | ||
| 196 | |||
| 197 | static unsigned long get_rate_ipg(struct clk *clk) | ||
| 198 | { | ||
| 199 | return get_rate_ahb(NULL) >> 1; | ||
| 200 | } | ||
| 201 | |||
| 202 | static unsigned long get_3_3_div(unsigned long in) | ||
| 203 | { | ||
| 204 | return (((in >> 3) & 0x7) + 1) * ((in & 0x7) + 1); | ||
| 205 | } | ||
| 206 | |||
| 207 | static unsigned long get_rate_uart(struct clk *clk) | ||
| 208 | { | ||
| 209 | unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); | ||
| 210 | unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); | ||
| 211 | unsigned long div = get_3_3_div(pdr4 >> 10); | ||
| 212 | |||
| 213 | if (pdr3 & (1 << 14)) | ||
| 214 | return get_rate_arm() / div; | ||
| 215 | else | ||
| 216 | return get_rate_ppll() / div; | ||
| 217 | } | ||
| 218 | |||
| 219 | static unsigned long get_rate_sdhc(struct clk *clk) | ||
| 220 | { | ||
| 221 | unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); | ||
| 222 | unsigned long div, rate; | ||
| 223 | |||
| 224 | if (pdr3 & (1 << 6)) | ||
| 225 | rate = get_rate_arm(); | ||
| 226 | else | ||
| 227 | rate = get_rate_ppll(); | ||
| 228 | |||
| 229 | switch (clk->id) { | ||
| 230 | default: | ||
| 231 | case 0: | ||
| 232 | div = pdr3 & 0x3f; | ||
| 233 | break; | ||
| 234 | case 1: | ||
| 235 | div = (pdr3 >> 8) & 0x3f; | ||
| 236 | break; | ||
| 237 | case 2: | ||
| 238 | div = (pdr3 >> 16) & 0x3f; | ||
| 239 | break; | ||
| 240 | } | ||
| 241 | |||
| 242 | return rate / get_3_3_div(div); | ||
| 243 | } | ||
| 244 | |||
| 245 | static unsigned long get_rate_mshc(struct clk *clk) | ||
| 246 | { | ||
| 247 | unsigned long pdr1 = __raw_readl(CCM_BASE + CCM_PDR1); | ||
| 248 | unsigned long div1, div2, rate; | ||
| 249 | |||
| 250 | if (pdr1 & (1 << 7)) | ||
| 251 | rate = get_rate_arm(); | ||
| 252 | else | ||
| 253 | rate = get_rate_ppll(); | ||
| 254 | |||
| 255 | div1 = (pdr1 >> 29) & 0x7; | ||
| 256 | div2 = (pdr1 >> 22) & 0x3f; | ||
| 257 | |||
| 258 | return rate / ((div1 + 1) * (div2 + 1)); | ||
| 259 | } | ||
| 260 | |||
| 261 | static unsigned long get_rate_ssi(struct clk *clk) | ||
| 262 | { | ||
| 263 | unsigned long pdr2 = __raw_readl(CCM_BASE + CCM_PDR2); | ||
| 264 | unsigned long div1, div2, rate; | ||
| 265 | |||
| 266 | if (pdr2 & (1 << 6)) | ||
| 267 | rate = get_rate_arm(); | ||
| 268 | else | ||
| 269 | rate = get_rate_ppll(); | ||
| 270 | |||
| 271 | switch (clk->id) { | ||
| 272 | default: | ||
| 273 | case 0: | ||
| 274 | div1 = pdr2 & 0x3f; | ||
| 275 | div2 = (pdr2 >> 24) & 0x7; | ||
| 276 | break; | ||
| 277 | case 1: | ||
| 278 | div1 = (pdr2 >> 8) & 0x3f; | ||
| 279 | div2 = (pdr2 >> 27) & 0x7; | ||
| 280 | break; | ||
| 281 | } | ||
| 282 | |||
| 283 | return rate / ((div1 + 1) * (div2 + 1)); | ||
| 284 | } | ||
| 285 | |||
| 286 | static unsigned long get_rate_csi(struct clk *clk) | ||
| 287 | { | ||
| 288 | unsigned long pdr2 = __raw_readl(CCM_BASE + CCM_PDR2); | ||
| 289 | unsigned long rate; | ||
| 290 | |||
| 291 | if (pdr2 & (1 << 7)) | ||
| 292 | rate = get_rate_arm(); | ||
| 293 | else | ||
| 294 | rate = get_rate_ppll(); | ||
| 295 | |||
| 296 | return rate / get_3_3_div((pdr2 >> 16) & 0x3f); | ||
| 297 | } | ||
| 298 | |||
| 299 | static unsigned long get_rate_ipg_per(struct clk *clk) | ||
| 300 | { | ||
| 301 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); | ||
| 302 | unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); | ||
| 303 | unsigned long div1, div2; | ||
| 304 | |||
| 305 | if (pdr0 & (1 << 26)) { | ||
| 306 | div1 = (pdr4 >> 19) & 0x7; | ||
| 307 | div2 = (pdr4 >> 16) & 0x7; | ||
| 308 | return get_rate_arm() / ((div1 + 1) * (div2 + 1)); | ||
| 309 | } else { | ||
| 310 | div1 = (pdr0 >> 12) & 0x7; | ||
| 311 | return get_rate_ahb(NULL) / div1; | ||
| 312 | } | ||
| 313 | } | ||
| 314 | |||
| 315 | static int clk_cgr_enable(struct clk *clk) | ||
| 316 | { | ||
| 317 | u32 reg; | ||
| 318 | |||
| 319 | reg = __raw_readl(clk->enable_reg); | ||
| 320 | reg |= 3 << clk->enable_shift; | ||
| 321 | __raw_writel(reg, clk->enable_reg); | ||
| 322 | |||
| 323 | return 0; | ||
| 324 | } | ||
| 325 | |||
| 326 | static void clk_cgr_disable(struct clk *clk) | ||
| 327 | { | ||
| 328 | u32 reg; | ||
| 329 | |||
| 330 | reg = __raw_readl(clk->enable_reg); | ||
| 331 | reg &= ~(3 << clk->enable_shift); | ||
| 332 | __raw_writel(reg, clk->enable_reg); | ||
| 333 | } | ||
| 334 | |||
| 335 | #define DEFINE_CLOCK(name, i, er, es, gr, sr) \ | ||
| 336 | static struct clk name = { \ | ||
| 337 | .id = i, \ | ||
| 338 | .enable_reg = CCM_BASE + er, \ | ||
| 339 | .enable_shift = es, \ | ||
| 340 | .get_rate = gr, \ | ||
| 341 | .set_rate = sr, \ | ||
| 342 | .enable = clk_cgr_enable, \ | ||
| 343 | .disable = clk_cgr_disable, \ | ||
| 344 | } | ||
| 345 | |||
| 346 | DEFINE_CLOCK(asrc_clk, 0, CCM_CGR0, 0, NULL, NULL); | ||
| 347 | DEFINE_CLOCK(ata_clk, 0, CCM_CGR0, 2, get_rate_ipg, NULL); | ||
| 348 | DEFINE_CLOCK(audmux_clk, 0, CCM_CGR0, 4, NULL, NULL); | ||
| 349 | DEFINE_CLOCK(can1_clk, 0, CCM_CGR0, 6, get_rate_ipg, NULL); | ||
| 350 | DEFINE_CLOCK(can2_clk, 1, CCM_CGR0, 8, get_rate_ipg, NULL); | ||
| 351 | DEFINE_CLOCK(cspi1_clk, 0, CCM_CGR0, 10, get_rate_ipg, NULL); | ||
| 352 | DEFINE_CLOCK(cspi2_clk, 1, CCM_CGR0, 12, get_rate_ipg, NULL); | ||
| 353 | DEFINE_CLOCK(ect_clk, 0, CCM_CGR0, 14, get_rate_ipg, NULL); | ||
| 354 | DEFINE_CLOCK(edio_clk, 0, CCM_CGR0, 16, NULL, NULL); | ||
| 355 | DEFINE_CLOCK(emi_clk, 0, CCM_CGR0, 18, get_rate_ipg, NULL); | ||
| 356 | DEFINE_CLOCK(epit1_clk, 0, CCM_CGR0, 20, get_rate_ipg_per, NULL); | ||
| 357 | DEFINE_CLOCK(epit2_clk, 1, CCM_CGR0, 22, get_rate_ipg_per, NULL); | ||
| 358 | DEFINE_CLOCK(esai_clk, 0, CCM_CGR0, 24, NULL, NULL); | ||
| 359 | DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGR0, 26, get_rate_sdhc, NULL); | ||
| 360 | DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGR0, 28, get_rate_sdhc, NULL); | ||
| 361 | DEFINE_CLOCK(esdhc3_clk, 2, CCM_CGR0, 30, get_rate_sdhc, NULL); | ||
| 362 | |||
| 363 | DEFINE_CLOCK(fec_clk, 0, CCM_CGR1, 0, get_rate_ipg, NULL); | ||
| 364 | DEFINE_CLOCK(gpio1_clk, 0, CCM_CGR1, 2, NULL, NULL); | ||
| 365 | DEFINE_CLOCK(gpio2_clk, 1, CCM_CGR1, 4, NULL, NULL); | ||
| 366 | DEFINE_CLOCK(gpio3_clk, 2, CCM_CGR1, 6, NULL, NULL); | ||
| 367 | DEFINE_CLOCK(gpt_clk, 0, CCM_CGR1, 8, get_rate_ipg, NULL); | ||
| 368 | DEFINE_CLOCK(i2c1_clk, 0, CCM_CGR1, 10, get_rate_ipg_per, NULL); | ||
| 369 | DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL); | ||
| 370 | DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL); | ||
| 371 | DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL); | ||
| 372 | DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, NULL, NULL); | ||
| 373 | DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL); | ||
| 374 | DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL); | ||
| 375 | DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL); | ||
| 376 | DEFINE_CLOCK(owire_clk, 0, CCM_CGR1, 26, get_rate_ipg_per, NULL); | ||
| 377 | DEFINE_CLOCK(pwm_clk, 0, CCM_CGR1, 28, get_rate_ipg_per, NULL); | ||
| 378 | DEFINE_CLOCK(rngc_clk, 0, CCM_CGR1, 30, get_rate_ipg, NULL); | ||
| 379 | |||
| 380 | DEFINE_CLOCK(rtc_clk, 0, CCM_CGR2, 0, get_rate_ipg, NULL); | ||
| 381 | DEFINE_CLOCK(rtic_clk, 0, CCM_CGR2, 2, get_rate_ahb, NULL); | ||
| 382 | DEFINE_CLOCK(scc_clk, 0, CCM_CGR2, 4, get_rate_ipg, NULL); | ||
| 383 | DEFINE_CLOCK(sdma_clk, 0, CCM_CGR2, 6, NULL, NULL); | ||
| 384 | DEFINE_CLOCK(spba_clk, 0, CCM_CGR2, 8, get_rate_ipg, NULL); | ||
| 385 | DEFINE_CLOCK(spdif_clk, 0, CCM_CGR2, 10, NULL, NULL); | ||
| 386 | DEFINE_CLOCK(ssi1_clk, 0, CCM_CGR2, 12, get_rate_ssi, NULL); | ||
| 387 | DEFINE_CLOCK(ssi2_clk, 1, CCM_CGR2, 14, get_rate_ssi, NULL); | ||
| 388 | DEFINE_CLOCK(uart1_clk, 0, CCM_CGR2, 16, get_rate_uart, NULL); | ||
| 389 | DEFINE_CLOCK(uart2_clk, 1, CCM_CGR2, 18, get_rate_uart, NULL); | ||
| 390 | DEFINE_CLOCK(uart3_clk, 2, CCM_CGR2, 20, get_rate_uart, NULL); | ||
| 391 | DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, NULL, NULL); | ||
| 392 | DEFINE_CLOCK(wdog_clk, 0, CCM_CGR2, 24, NULL, NULL); | ||
| 393 | DEFINE_CLOCK(max_clk, 0, CCM_CGR2, 26, NULL, NULL); | ||
| 394 | DEFINE_CLOCK(admux_clk, 0, CCM_CGR2, 30, NULL, NULL); | ||
| 395 | |||
| 396 | DEFINE_CLOCK(csi_clk, 0, CCM_CGR3, 0, get_rate_csi, NULL); | ||
| 397 | DEFINE_CLOCK(iim_clk, 0, CCM_CGR3, 2, NULL, NULL); | ||
| 398 | DEFINE_CLOCK(gpu2d_clk, 0, CCM_CGR3, 4, NULL, NULL); | ||
| 399 | |||
| 400 | #define _REGISTER_CLOCK(d, n, c) \ | ||
| 401 | { \ | ||
| 402 | .dev_id = d, \ | ||
| 403 | .con_id = n, \ | ||
| 404 | .clk = &c, \ | ||
| 405 | }, | ||
| 406 | |||
| 407 | static struct clk_lookup lookups[] __initdata = { | ||
| 408 | _REGISTER_CLOCK(NULL, "asrc", asrc_clk) | ||
| 409 | _REGISTER_CLOCK(NULL, "ata", ata_clk) | ||
| 410 | _REGISTER_CLOCK(NULL, "audmux", audmux_clk) | ||
| 411 | _REGISTER_CLOCK(NULL, "can", can1_clk) | ||
| 412 | _REGISTER_CLOCK(NULL, "can", can2_clk) | ||
| 413 | _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) | ||
| 414 | _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk) | ||
| 415 | _REGISTER_CLOCK(NULL, "ect", ect_clk) | ||
| 416 | _REGISTER_CLOCK(NULL, "edio", edio_clk) | ||
| 417 | _REGISTER_CLOCK(NULL, "emi", emi_clk) | ||
| 418 | _REGISTER_CLOCK(NULL, "epit", epit1_clk) | ||
| 419 | _REGISTER_CLOCK(NULL, "epit", epit2_clk) | ||
| 420 | _REGISTER_CLOCK(NULL, "esai", esai_clk) | ||
| 421 | _REGISTER_CLOCK(NULL, "sdhc", esdhc1_clk) | ||
| 422 | _REGISTER_CLOCK(NULL, "sdhc", esdhc2_clk) | ||
| 423 | _REGISTER_CLOCK(NULL, "sdhc", esdhc3_clk) | ||
| 424 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) | ||
| 425 | _REGISTER_CLOCK(NULL, "gpio", gpio1_clk) | ||
| 426 | _REGISTER_CLOCK(NULL, "gpio", gpio2_clk) | ||
| 427 | _REGISTER_CLOCK(NULL, "gpio", gpio3_clk) | ||
| 428 | _REGISTER_CLOCK("gpt.0", NULL, gpt_clk) | ||
| 429 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) | ||
| 430 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) | ||
| 431 | _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk) | ||
| 432 | _REGISTER_CLOCK(NULL, "iomuxc", iomuxc_clk) | ||
| 433 | _REGISTER_CLOCK(NULL, "ipu", ipu_clk) | ||
| 434 | _REGISTER_CLOCK(NULL, "kpp", kpp_clk) | ||
| 435 | _REGISTER_CLOCK(NULL, "mlb", mlb_clk) | ||
| 436 | _REGISTER_CLOCK(NULL, "mshc", mshc_clk) | ||
| 437 | _REGISTER_CLOCK("mxc_w1", NULL, owire_clk) | ||
| 438 | _REGISTER_CLOCK(NULL, "pwm", pwm_clk) | ||
| 439 | _REGISTER_CLOCK(NULL, "rngc", rngc_clk) | ||
| 440 | _REGISTER_CLOCK(NULL, "rtc", rtc_clk) | ||
| 441 | _REGISTER_CLOCK(NULL, "rtic", rtic_clk) | ||
| 442 | _REGISTER_CLOCK(NULL, "scc", scc_clk) | ||
| 443 | _REGISTER_CLOCK(NULL, "sdma", sdma_clk) | ||
| 444 | _REGISTER_CLOCK(NULL, "spba", spba_clk) | ||
| 445 | _REGISTER_CLOCK(NULL, "spdif", spdif_clk) | ||
| 446 | _REGISTER_CLOCK(NULL, "ssi", ssi1_clk) | ||
| 447 | _REGISTER_CLOCK(NULL, "ssi", ssi2_clk) | ||
| 448 | _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) | ||
| 449 | _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) | ||
| 450 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) | ||
| 451 | _REGISTER_CLOCK(NULL, "usbotg", usbotg_clk) | ||
| 452 | _REGISTER_CLOCK("mxc_wdt.0", NULL, wdog_clk) | ||
| 453 | _REGISTER_CLOCK(NULL, "max", max_clk) | ||
| 454 | _REGISTER_CLOCK(NULL, "admux", admux_clk) | ||
| 455 | _REGISTER_CLOCK(NULL, "csi", csi_clk) | ||
| 456 | _REGISTER_CLOCK(NULL, "iim", iim_clk) | ||
| 457 | _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk) | ||
| 458 | }; | ||
| 459 | |||
| 460 | int __init mx35_clocks_init() | ||
| 461 | { | ||
| 462 | int i; | ||
| 463 | unsigned int ll = 0; | ||
| 464 | |||
| 465 | mxc_set_cpu_type(MXC_CPU_MX35); | ||
| 466 | |||
| 467 | #ifdef CONFIG_DEBUG_LL_CONSOLE | ||
| 468 | ll = (3 << 16); | ||
| 469 | #endif | ||
| 470 | |||
| 471 | for (i = 0; i < ARRAY_SIZE(lookups); i++) | ||
| 472 | clkdev_add(&lookups[i]); | ||
| 473 | |||
| 474 | /* Turn off all clocks except the ones we need to survive, namely: | ||
| 475 | * EMI, GPIO1/2/3, GPT, IOMUX, MAX and eventually uart | ||
| 476 | */ | ||
| 477 | __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); | ||
| 478 | __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), | ||
| 479 | CCM_BASE + CCM_CGR1); | ||
| 480 | __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2); | ||
| 481 | __raw_writel(0, CCM_BASE + CCM_CGR3); | ||
| 482 | |||
| 483 | mxc_timer_init(&gpt_clk); | ||
| 484 | |||
| 485 | return 0; | ||
| 486 | } | ||
| 487 | |||
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c index b1746aae1f89..ca46f4801c3d 100644 --- a/arch/arm/mach-mx3/clock.c +++ b/arch/arm/mach-mx3/clock.c | |||
| @@ -23,9 +23,13 @@ | |||
| 23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
| 24 | #include <linux/err.h> | 24 | #include <linux/err.h> |
| 25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
| 26 | |||
| 27 | #include <asm/clkdev.h> | ||
| 28 | #include <asm/div64.h> | ||
| 29 | |||
| 26 | #include <mach/clock.h> | 30 | #include <mach/clock.h> |
| 27 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
| 28 | #include <asm/div64.h> | 32 | #include <mach/common.h> |
| 29 | 33 | ||
| 30 | #include "crm_regs.h" | 34 | #include "crm_regs.h" |
| 31 | 35 | ||
| @@ -64,17 +68,17 @@ static void __calc_pre_post_dividers(u32 div, u32 *pre, u32 *post) | |||
| 64 | } | 68 | } |
| 65 | 69 | ||
| 66 | static struct clk mcu_pll_clk; | 70 | static struct clk mcu_pll_clk; |
| 67 | static struct clk mcu_main_clk; | ||
| 68 | static struct clk usb_pll_clk; | ||
| 69 | static struct clk serial_pll_clk; | 71 | static struct clk serial_pll_clk; |
| 70 | static struct clk ipg_clk; | 72 | static struct clk ipg_clk; |
| 71 | static struct clk ckih_clk; | 73 | static struct clk ckih_clk; |
| 72 | static struct clk ahb_clk; | ||
| 73 | 74 | ||
| 74 | static int _clk_enable(struct clk *clk) | 75 | static int cgr_enable(struct clk *clk) |
| 75 | { | 76 | { |
| 76 | u32 reg; | 77 | u32 reg; |
| 77 | 78 | ||
| 79 | if (!clk->enable_reg) | ||
| 80 | return 0; | ||
| 81 | |||
| 78 | reg = __raw_readl(clk->enable_reg); | 82 | reg = __raw_readl(clk->enable_reg); |
| 79 | reg |= 3 << clk->enable_shift; | 83 | reg |= 3 << clk->enable_shift; |
| 80 | __raw_writel(reg, clk->enable_reg); | 84 | __raw_writel(reg, clk->enable_reg); |
| @@ -82,133 +86,69 @@ static int _clk_enable(struct clk *clk) | |||
| 82 | return 0; | 86 | return 0; |
| 83 | } | 87 | } |
| 84 | 88 | ||
| 85 | static void _clk_disable(struct clk *clk) | 89 | static void cgr_disable(struct clk *clk) |
| 86 | { | 90 | { |
| 87 | u32 reg; | 91 | u32 reg; |
| 88 | 92 | ||
| 93 | if (!clk->enable_reg) | ||
| 94 | return; | ||
| 95 | |||
| 89 | reg = __raw_readl(clk->enable_reg); | 96 | reg = __raw_readl(clk->enable_reg); |
| 90 | reg &= ~(3 << clk->enable_shift); | 97 | reg &= ~(3 << clk->enable_shift); |
| 98 | |||
| 99 | /* special case for EMI clock */ | ||
| 100 | if (clk->enable_reg == MXC_CCM_CGR2 && clk->enable_shift == 8) | ||
| 101 | reg |= (1 << clk->enable_shift); | ||
| 102 | |||
| 91 | __raw_writel(reg, clk->enable_reg); | 103 | __raw_writel(reg, clk->enable_reg); |
| 92 | } | 104 | } |
| 93 | 105 | ||
| 94 | static void _clk_emi_disable(struct clk *clk) | 106 | static unsigned long pll_ref_get_rate(void) |
| 95 | { | 107 | { |
| 96 | u32 reg; | 108 | unsigned long ccmr; |
| 109 | unsigned int prcs; | ||
| 97 | 110 | ||
| 98 | reg = __raw_readl(clk->enable_reg); | 111 | ccmr = __raw_readl(MXC_CCM_CCMR); |
| 99 | reg &= ~(3 << clk->enable_shift); | 112 | prcs = (ccmr & MXC_CCM_CCMR_PRCS_MASK) >> MXC_CCM_CCMR_PRCS_OFFSET; |
| 100 | reg |= (1 << clk->enable_shift); | 113 | if (prcs == 0x1) |
| 101 | __raw_writel(reg, clk->enable_reg); | 114 | return CKIL_CLK_FREQ * 1024; |
| 115 | else | ||
| 116 | return clk_get_rate(&ckih_clk); | ||
| 102 | } | 117 | } |
| 103 | 118 | ||
| 104 | static int _clk_pll_set_rate(struct clk *clk, unsigned long rate) | 119 | static unsigned long usb_pll_get_rate(struct clk *clk) |
| 105 | { | 120 | { |
| 106 | u32 reg; | 121 | unsigned long reg; |
| 107 | signed long pd = 1; /* Pre-divider */ | ||
| 108 | signed long mfi; /* Multiplication Factor (Integer part) */ | ||
| 109 | signed long mfn; /* Multiplication Factor (Integer part) */ | ||
| 110 | signed long mfd; /* Multiplication Factor (Denominator Part) */ | ||
| 111 | signed long tmp; | ||
| 112 | u32 ref_freq = clk_get_rate(clk->parent); | ||
| 113 | 122 | ||
| 114 | while (((ref_freq / pd) * 10) > rate) | 123 | reg = __raw_readl(MXC_CCM_UPCTL); |
| 115 | pd++; | ||
| 116 | 124 | ||
| 117 | if ((ref_freq / pd) < PRE_DIV_MIN_FREQ) | 125 | return mxc_decode_pll(reg, pll_ref_get_rate()); |
| 118 | return -EINVAL; | 126 | } |
| 119 | 127 | ||
| 120 | /* the ref_freq/2 in the following is to round up */ | 128 | static unsigned long serial_pll_get_rate(struct clk *clk) |
| 121 | mfi = (((rate / 2) * pd) + (ref_freq / 2)) / ref_freq; | 129 | { |
| 122 | if (mfi < 5 || mfi > 15) | 130 | unsigned long reg; |
| 123 | return -EINVAL; | ||
| 124 | 131 | ||
| 125 | /* pick a mfd value that will work | 132 | reg = __raw_readl(MXC_CCM_SRPCTL); |
| 126 | * then solve for mfn */ | ||
| 127 | mfd = ref_freq / 50000; | ||
| 128 | |||
| 129 | /* | ||
| 130 | * pll_freq * pd * mfd | ||
| 131 | * mfn = -------------------- - (mfi * mfd) | ||
| 132 | * 2 * ref_freq | ||
| 133 | */ | ||
| 134 | /* the tmp/2 is for rounding */ | ||
| 135 | tmp = ref_freq / 10000; | ||
| 136 | mfn = | ||
| 137 | ((((((rate / 2) + (tmp / 2)) / tmp) * pd) * mfd) / 10000) - | ||
| 138 | (mfi * mfd); | ||
| 139 | |||
| 140 | mfn = mfn & 0x3ff; | ||
| 141 | pd--; | ||
| 142 | mfd--; | ||
| 143 | |||
| 144 | /* Change the Pll value */ | ||
| 145 | reg = (mfi << MXC_CCM_PCTL_MFI_OFFSET) | | ||
| 146 | (mfn << MXC_CCM_PCTL_MFN_OFFSET) | | ||
| 147 | (mfd << MXC_CCM_PCTL_MFD_OFFSET) | (pd << MXC_CCM_PCTL_PD_OFFSET); | ||
| 148 | |||
| 149 | if (clk == &mcu_pll_clk) | ||
| 150 | __raw_writel(reg, MXC_CCM_MPCTL); | ||
| 151 | else if (clk == &usb_pll_clk) | ||
| 152 | __raw_writel(reg, MXC_CCM_UPCTL); | ||
| 153 | else if (clk == &serial_pll_clk) | ||
| 154 | __raw_writel(reg, MXC_CCM_SRPCTL); | ||
| 155 | 133 | ||
| 156 | return 0; | 134 | return mxc_decode_pll(reg, pll_ref_get_rate()); |
| 157 | } | 135 | } |
| 158 | 136 | ||
| 159 | static unsigned long _clk_pll_get_rate(struct clk *clk) | 137 | static unsigned long mcu_pll_get_rate(struct clk *clk) |
| 160 | { | 138 | { |
| 161 | long mfi, mfn, mfd, pdf, ref_clk, mfn_abs; | ||
| 162 | unsigned long reg, ccmr; | 139 | unsigned long reg, ccmr; |
| 163 | s64 temp; | ||
| 164 | unsigned int prcs; | ||
| 165 | 140 | ||
| 166 | ccmr = __raw_readl(MXC_CCM_CCMR); | 141 | ccmr = __raw_readl(MXC_CCM_CCMR); |
| 167 | prcs = (ccmr & MXC_CCM_CCMR_PRCS_MASK) >> MXC_CCM_CCMR_PRCS_OFFSET; | ||
| 168 | if (prcs == 0x1) | ||
| 169 | ref_clk = CKIL_CLK_FREQ * 1024; | ||
| 170 | else | ||
| 171 | ref_clk = clk_get_rate(&ckih_clk); | ||
| 172 | |||
| 173 | if (clk == &mcu_pll_clk) { | ||
| 174 | if ((ccmr & MXC_CCM_CCMR_MPE) == 0) | ||
| 175 | return ref_clk; | ||
| 176 | if ((ccmr & MXC_CCM_CCMR_MDS) != 0) | ||
| 177 | return ref_clk; | ||
| 178 | reg = __raw_readl(MXC_CCM_MPCTL); | ||
| 179 | } else if (clk == &usb_pll_clk) | ||
| 180 | reg = __raw_readl(MXC_CCM_UPCTL); | ||
| 181 | else if (clk == &serial_pll_clk) | ||
| 182 | reg = __raw_readl(MXC_CCM_SRPCTL); | ||
| 183 | else { | ||
| 184 | BUG(); | ||
| 185 | return 0; | ||
| 186 | } | ||
| 187 | |||
| 188 | pdf = (reg & MXC_CCM_PCTL_PD_MASK) >> MXC_CCM_PCTL_PD_OFFSET; | ||
| 189 | mfd = (reg & MXC_CCM_PCTL_MFD_MASK) >> MXC_CCM_PCTL_MFD_OFFSET; | ||
| 190 | mfi = (reg & MXC_CCM_PCTL_MFI_MASK) >> MXC_CCM_PCTL_MFI_OFFSET; | ||
| 191 | mfi = (mfi <= 5) ? 5 : mfi; | ||
| 192 | mfn = mfn_abs = reg & MXC_CCM_PCTL_MFN_MASK; | ||
| 193 | 142 | ||
| 194 | if (mfn >= 0x200) { | 143 | if (!(ccmr & MXC_CCM_CCMR_MPE) || (ccmr & MXC_CCM_CCMR_MDS)) |
| 195 | mfn |= 0xFFFFFE00; | 144 | return clk_get_rate(&ckih_clk); |
| 196 | mfn_abs = -mfn; | ||
| 197 | } | ||
| 198 | |||
| 199 | ref_clk *= 2; | ||
| 200 | ref_clk /= pdf + 1; | ||
| 201 | 145 | ||
| 202 | temp = (u64) ref_clk * mfn_abs; | 146 | reg = __raw_readl(MXC_CCM_MPCTL); |
| 203 | do_div(temp, mfd + 1); | ||
| 204 | if (mfn < 0) | ||
| 205 | temp = -temp; | ||
| 206 | temp = (ref_clk * mfi) + temp; | ||
| 207 | 147 | ||
| 208 | return temp; | 148 | return mxc_decode_pll(reg, pll_ref_get_rate()); |
| 209 | } | 149 | } |
| 210 | 150 | ||
| 211 | static int _clk_usb_pll_enable(struct clk *clk) | 151 | static int usb_pll_enable(struct clk *clk) |
| 212 | { | 152 | { |
| 213 | u32 reg; | 153 | u32 reg; |
| 214 | 154 | ||
| @@ -222,7 +162,7 @@ static int _clk_usb_pll_enable(struct clk *clk) | |||
| 222 | return 0; | 162 | return 0; |
| 223 | } | 163 | } |
| 224 | 164 | ||
| 225 | static void _clk_usb_pll_disable(struct clk *clk) | 165 | static void usb_pll_disable(struct clk *clk) |
| 226 | { | 166 | { |
| 227 | u32 reg; | 167 | u32 reg; |
| 228 | 168 | ||
| @@ -231,7 +171,7 @@ static void _clk_usb_pll_disable(struct clk *clk) | |||
| 231 | __raw_writel(reg, MXC_CCM_CCMR); | 171 | __raw_writel(reg, MXC_CCM_CCMR); |
| 232 | } | 172 | } |
| 233 | 173 | ||
| 234 | static int _clk_serial_pll_enable(struct clk *clk) | 174 | static int serial_pll_enable(struct clk *clk) |
| 235 | { | 175 | { |
| 236 | u32 reg; | 176 | u32 reg; |
| 237 | 177 | ||
| @@ -245,7 +185,7 @@ static int _clk_serial_pll_enable(struct clk *clk) | |||
| 245 | return 0; | 185 | return 0; |
| 246 | } | 186 | } |
| 247 | 187 | ||
| 248 | static void _clk_serial_pll_disable(struct clk *clk) | 188 | static void serial_pll_disable(struct clk *clk) |
| 249 | { | 189 | { |
| 250 | u32 reg; | 190 | u32 reg; |
| 251 | 191 | ||
| @@ -258,7 +198,7 @@ static void _clk_serial_pll_disable(struct clk *clk) | |||
| 258 | #define PDR1(mask, off) ((__raw_readl(MXC_CCM_PDR1) & mask) >> off) | 198 | #define PDR1(mask, off) ((__raw_readl(MXC_CCM_PDR1) & mask) >> off) |
| 259 | #define PDR2(mask, off) ((__raw_readl(MXC_CCM_PDR2) & mask) >> off) | 199 | #define PDR2(mask, off) ((__raw_readl(MXC_CCM_PDR2) & mask) >> off) |
| 260 | 200 | ||
| 261 | static unsigned long _clk_mcu_main_get_rate(struct clk *clk) | 201 | static unsigned long mcu_main_get_rate(struct clk *clk) |
| 262 | { | 202 | { |
| 263 | u32 pmcr0 = __raw_readl(MXC_CCM_PMCR0); | 203 | u32 pmcr0 = __raw_readl(MXC_CCM_PMCR0); |
| 264 | 204 | ||
| @@ -268,7 +208,7 @@ static unsigned long _clk_mcu_main_get_rate(struct clk *clk) | |||
| 268 | return clk_get_rate(&mcu_pll_clk); | 208 | return clk_get_rate(&mcu_pll_clk); |
| 269 | } | 209 | } |
| 270 | 210 | ||
| 271 | static unsigned long _clk_hclk_get_rate(struct clk *clk) | 211 | static unsigned long ahb_get_rate(struct clk *clk) |
| 272 | { | 212 | { |
| 273 | unsigned long max_pdf; | 213 | unsigned long max_pdf; |
| 274 | 214 | ||
| @@ -277,7 +217,7 @@ static unsigned long _clk_hclk_get_rate(struct clk *clk) | |||
| 277 | return clk_get_rate(clk->parent) / (max_pdf + 1); | 217 | return clk_get_rate(clk->parent) / (max_pdf + 1); |
| 278 | } | 218 | } |
| 279 | 219 | ||
| 280 | static unsigned long _clk_ipg_get_rate(struct clk *clk) | 220 | static unsigned long ipg_get_rate(struct clk *clk) |
| 281 | { | 221 | { |
| 282 | unsigned long ipg_pdf; | 222 | unsigned long ipg_pdf; |
| 283 | 223 | ||
| @@ -286,7 +226,7 @@ static unsigned long _clk_ipg_get_rate(struct clk *clk) | |||
| 286 | return clk_get_rate(clk->parent) / (ipg_pdf + 1); | 226 | return clk_get_rate(clk->parent) / (ipg_pdf + 1); |
| 287 | } | 227 | } |
| 288 | 228 | ||
| 289 | static unsigned long _clk_nfc_get_rate(struct clk *clk) | 229 | static unsigned long nfc_get_rate(struct clk *clk) |
| 290 | { | 230 | { |
| 291 | unsigned long nfc_pdf; | 231 | unsigned long nfc_pdf; |
| 292 | 232 | ||
| @@ -295,7 +235,7 @@ static unsigned long _clk_nfc_get_rate(struct clk *clk) | |||
| 295 | return clk_get_rate(clk->parent) / (nfc_pdf + 1); | 235 | return clk_get_rate(clk->parent) / (nfc_pdf + 1); |
| 296 | } | 236 | } |
| 297 | 237 | ||
| 298 | static unsigned long _clk_hsp_get_rate(struct clk *clk) | 238 | static unsigned long hsp_get_rate(struct clk *clk) |
| 299 | { | 239 | { |
| 300 | unsigned long hsp_pdf; | 240 | unsigned long hsp_pdf; |
| 301 | 241 | ||
| @@ -304,7 +244,7 @@ static unsigned long _clk_hsp_get_rate(struct clk *clk) | |||
| 304 | return clk_get_rate(clk->parent) / (hsp_pdf + 1); | 244 | return clk_get_rate(clk->parent) / (hsp_pdf + 1); |
| 305 | } | 245 | } |
| 306 | 246 | ||
| 307 | static unsigned long _clk_usb_get_rate(struct clk *clk) | 247 | static unsigned long usb_get_rate(struct clk *clk) |
| 308 | { | 248 | { |
| 309 | unsigned long usb_pdf, usb_prepdf; | 249 | unsigned long usb_pdf, usb_prepdf; |
| 310 | 250 | ||
| @@ -315,7 +255,7 @@ static unsigned long _clk_usb_get_rate(struct clk *clk) | |||
| 315 | return clk_get_rate(clk->parent) / (usb_prepdf + 1) / (usb_pdf + 1); | 255 | return clk_get_rate(clk->parent) / (usb_prepdf + 1) / (usb_pdf + 1); |
| 316 | } | 256 | } |
| 317 | 257 | ||
| 318 | static unsigned long _clk_csi_get_rate(struct clk *clk) | 258 | static unsigned long csi_get_rate(struct clk *clk) |
| 319 | { | 259 | { |
| 320 | u32 reg, pre, post; | 260 | u32 reg, pre, post; |
| 321 | 261 | ||
| @@ -329,7 +269,7 @@ static unsigned long _clk_csi_get_rate(struct clk *clk) | |||
| 329 | return clk_get_rate(clk->parent) / (pre * post); | 269 | return clk_get_rate(clk->parent) / (pre * post); |
| 330 | } | 270 | } |
| 331 | 271 | ||
| 332 | static unsigned long _clk_csi_round_rate(struct clk *clk, unsigned long rate) | 272 | static unsigned long csi_round_rate(struct clk *clk, unsigned long rate) |
| 333 | { | 273 | { |
| 334 | u32 pre, post, parent = clk_get_rate(clk->parent); | 274 | u32 pre, post, parent = clk_get_rate(clk->parent); |
| 335 | u32 div = parent / rate; | 275 | u32 div = parent / rate; |
| @@ -342,7 +282,7 @@ static unsigned long _clk_csi_round_rate(struct clk *clk, unsigned long rate) | |||
| 342 | return parent / (pre * post); | 282 | return parent / (pre * post); |
| 343 | } | 283 | } |
| 344 | 284 | ||
| 345 | static int _clk_csi_set_rate(struct clk *clk, unsigned long rate) | 285 | static int csi_set_rate(struct clk *clk, unsigned long rate) |
| 346 | { | 286 | { |
| 347 | u32 reg, div, pre, post, parent = clk_get_rate(clk->parent); | 287 | u32 reg, div, pre, post, parent = clk_get_rate(clk->parent); |
| 348 | 288 | ||
| @@ -363,16 +303,7 @@ static int _clk_csi_set_rate(struct clk *clk, unsigned long rate) | |||
| 363 | return 0; | 303 | return 0; |
| 364 | } | 304 | } |
| 365 | 305 | ||
| 366 | static unsigned long _clk_per_get_rate(struct clk *clk) | 306 | static unsigned long ssi1_get_rate(struct clk *clk) |
| 367 | { | ||
| 368 | unsigned long per_pdf; | ||
| 369 | |||
| 370 | per_pdf = PDR0(MXC_CCM_PDR0_PER_PODF_MASK, | ||
| 371 | MXC_CCM_PDR0_PER_PODF_OFFSET); | ||
| 372 | return clk_get_rate(clk->parent) / (per_pdf + 1); | ||
| 373 | } | ||
| 374 | |||
| 375 | static unsigned long _clk_ssi1_get_rate(struct clk *clk) | ||
| 376 | { | 307 | { |
| 377 | unsigned long ssi1_pdf, ssi1_prepdf; | 308 | unsigned long ssi1_pdf, ssi1_prepdf; |
| 378 | 309 | ||
| @@ -383,7 +314,7 @@ static unsigned long _clk_ssi1_get_rate(struct clk *clk) | |||
| 383 | return clk_get_rate(clk->parent) / (ssi1_prepdf + 1) / (ssi1_pdf + 1); | 314 | return clk_get_rate(clk->parent) / (ssi1_prepdf + 1) / (ssi1_pdf + 1); |
| 384 | } | 315 | } |
| 385 | 316 | ||
| 386 | static unsigned long _clk_ssi2_get_rate(struct clk *clk) | 317 | static unsigned long ssi2_get_rate(struct clk *clk) |
| 387 | { | 318 | { |
| 388 | unsigned long ssi2_pdf, ssi2_prepdf; | 319 | unsigned long ssi2_pdf, ssi2_prepdf; |
| 389 | 320 | ||
| @@ -394,7 +325,7 @@ static unsigned long _clk_ssi2_get_rate(struct clk *clk) | |||
| 394 | return clk_get_rate(clk->parent) / (ssi2_prepdf + 1) / (ssi2_pdf + 1); | 325 | return clk_get_rate(clk->parent) / (ssi2_prepdf + 1) / (ssi2_pdf + 1); |
| 395 | } | 326 | } |
| 396 | 327 | ||
| 397 | static unsigned long _clk_firi_get_rate(struct clk *clk) | 328 | static unsigned long firi_get_rate(struct clk *clk) |
| 398 | { | 329 | { |
| 399 | unsigned long firi_pdf, firi_prepdf; | 330 | unsigned long firi_pdf, firi_prepdf; |
| 400 | 331 | ||
| @@ -405,7 +336,7 @@ static unsigned long _clk_firi_get_rate(struct clk *clk) | |||
| 405 | return clk_get_rate(clk->parent) / (firi_prepdf + 1) / (firi_pdf + 1); | 336 | return clk_get_rate(clk->parent) / (firi_prepdf + 1) / (firi_pdf + 1); |
| 406 | } | 337 | } |
| 407 | 338 | ||
| 408 | static unsigned long _clk_firi_round_rate(struct clk *clk, unsigned long rate) | 339 | static unsigned long firi_round_rate(struct clk *clk, unsigned long rate) |
| 409 | { | 340 | { |
| 410 | u32 pre, post; | 341 | u32 pre, post; |
| 411 | u32 parent = clk_get_rate(clk->parent); | 342 | u32 parent = clk_get_rate(clk->parent); |
| @@ -420,7 +351,7 @@ static unsigned long _clk_firi_round_rate(struct clk *clk, unsigned long rate) | |||
| 420 | 351 | ||
| 421 | } | 352 | } |
| 422 | 353 | ||
| 423 | static int _clk_firi_set_rate(struct clk *clk, unsigned long rate) | 354 | static int firi_set_rate(struct clk *clk, unsigned long rate) |
| 424 | { | 355 | { |
| 425 | u32 reg, div, pre, post, parent = clk_get_rate(clk->parent); | 356 | u32 reg, div, pre, post, parent = clk_get_rate(clk->parent); |
| 426 | 357 | ||
| @@ -441,12 +372,12 @@ static int _clk_firi_set_rate(struct clk *clk, unsigned long rate) | |||
| 441 | return 0; | 372 | return 0; |
| 442 | } | 373 | } |
| 443 | 374 | ||
| 444 | static unsigned long _clk_mbx_get_rate(struct clk *clk) | 375 | static unsigned long mbx_get_rate(struct clk *clk) |
| 445 | { | 376 | { |
| 446 | return clk_get_rate(clk->parent) / 2; | 377 | return clk_get_rate(clk->parent) / 2; |
| 447 | } | 378 | } |
| 448 | 379 | ||
| 449 | static unsigned long _clk_mstick1_get_rate(struct clk *clk) | 380 | static unsigned long mstick1_get_rate(struct clk *clk) |
| 450 | { | 381 | { |
| 451 | unsigned long msti_pdf; | 382 | unsigned long msti_pdf; |
| 452 | 383 | ||
| @@ -455,7 +386,7 @@ static unsigned long _clk_mstick1_get_rate(struct clk *clk) | |||
| 455 | return clk_get_rate(clk->parent) / (msti_pdf + 1); | 386 | return clk_get_rate(clk->parent) / (msti_pdf + 1); |
| 456 | } | 387 | } |
| 457 | 388 | ||
| 458 | static unsigned long _clk_mstick2_get_rate(struct clk *clk) | 389 | static unsigned long mstick2_get_rate(struct clk *clk) |
| 459 | { | 390 | { |
| 460 | unsigned long msti_pdf; | 391 | unsigned long msti_pdf; |
| 461 | 392 | ||
| @@ -472,661 +403,185 @@ static unsigned long clk_ckih_get_rate(struct clk *clk) | |||
| 472 | } | 403 | } |
| 473 | 404 | ||
| 474 | static struct clk ckih_clk = { | 405 | static struct clk ckih_clk = { |
| 475 | .name = "ckih", | ||
| 476 | .get_rate = clk_ckih_get_rate, | 406 | .get_rate = clk_ckih_get_rate, |
| 477 | }; | 407 | }; |
| 478 | 408 | ||
| 479 | static unsigned long clk_ckil_get_rate(struct clk *clk) | ||
| 480 | { | ||
| 481 | return CKIL_CLK_FREQ; | ||
| 482 | } | ||
| 483 | |||
| 484 | static struct clk ckil_clk = { | ||
| 485 | .name = "ckil", | ||
| 486 | .get_rate = clk_ckil_get_rate, | ||
| 487 | }; | ||
| 488 | |||
| 489 | static struct clk mcu_pll_clk = { | 409 | static struct clk mcu_pll_clk = { |
| 490 | .name = "mcu_pll", | ||
| 491 | .parent = &ckih_clk, | 410 | .parent = &ckih_clk, |
| 492 | .set_rate = _clk_pll_set_rate, | 411 | .get_rate = mcu_pll_get_rate, |
| 493 | .get_rate = _clk_pll_get_rate, | ||
| 494 | }; | 412 | }; |
| 495 | 413 | ||
| 496 | static struct clk mcu_main_clk = { | 414 | static struct clk mcu_main_clk = { |
| 497 | .name = "mcu_main_clk", | ||
| 498 | .parent = &mcu_pll_clk, | 415 | .parent = &mcu_pll_clk, |
| 499 | .get_rate = _clk_mcu_main_get_rate, | 416 | .get_rate = mcu_main_get_rate, |
| 500 | }; | 417 | }; |
| 501 | 418 | ||
| 502 | static struct clk serial_pll_clk = { | 419 | static struct clk serial_pll_clk = { |
| 503 | .name = "serial_pll", | ||
| 504 | .parent = &ckih_clk, | 420 | .parent = &ckih_clk, |
| 505 | .set_rate = _clk_pll_set_rate, | 421 | .get_rate = serial_pll_get_rate, |
| 506 | .get_rate = _clk_pll_get_rate, | 422 | .enable = serial_pll_enable, |
| 507 | .enable = _clk_serial_pll_enable, | 423 | .disable = serial_pll_disable, |
| 508 | .disable = _clk_serial_pll_disable, | ||
| 509 | }; | 424 | }; |
| 510 | 425 | ||
| 511 | static struct clk usb_pll_clk = { | 426 | static struct clk usb_pll_clk = { |
| 512 | .name = "usb_pll", | ||
| 513 | .parent = &ckih_clk, | 427 | .parent = &ckih_clk, |
| 514 | .set_rate = _clk_pll_set_rate, | 428 | .get_rate = usb_pll_get_rate, |
| 515 | .get_rate = _clk_pll_get_rate, | 429 | .enable = usb_pll_enable, |
| 516 | .enable = _clk_usb_pll_enable, | 430 | .disable = usb_pll_disable, |
| 517 | .disable = _clk_usb_pll_disable, | ||
| 518 | }; | 431 | }; |
| 519 | 432 | ||
| 520 | static struct clk ahb_clk = { | 433 | static struct clk ahb_clk = { |
| 521 | .name = "ahb_clk", | ||
| 522 | .parent = &mcu_main_clk, | 434 | .parent = &mcu_main_clk, |
| 523 | .get_rate = _clk_hclk_get_rate, | 435 | .get_rate = ahb_get_rate, |
| 524 | }; | 436 | }; |
| 525 | 437 | ||
| 526 | static struct clk per_clk = { | 438 | #define DEFINE_CLOCK(name, i, er, es, gr, s, p) \ |
| 527 | .name = "per_clk", | 439 | static struct clk name = { \ |
| 528 | .parent = &usb_pll_clk, | 440 | .id = i, \ |
| 529 | .get_rate = _clk_per_get_rate, | 441 | .enable_reg = er, \ |
| 530 | }; | 442 | .enable_shift = es, \ |
| 531 | 443 | .get_rate = gr, \ | |
| 532 | static struct clk perclk_clk = { | 444 | .enable = cgr_enable, \ |
| 533 | .name = "perclk_clk", | 445 | .disable = cgr_disable, \ |
| 534 | .parent = &ipg_clk, | 446 | .secondary = s, \ |
| 535 | }; | 447 | .parent = p, \ |
| 536 | 448 | } | |
| 537 | static struct clk cspi_clk[] = { | ||
| 538 | { | ||
| 539 | .name = "cspi_clk", | ||
| 540 | .id = 0, | ||
| 541 | .parent = &ipg_clk, | ||
| 542 | .enable = _clk_enable, | ||
| 543 | .enable_reg = MXC_CCM_CGR2, | ||
| 544 | .enable_shift = MXC_CCM_CGR2_CSPI1_OFFSET, | ||
| 545 | .disable = _clk_disable,}, | ||
| 546 | { | ||
| 547 | .name = "cspi_clk", | ||
| 548 | .id = 1, | ||
| 549 | .parent = &ipg_clk, | ||
| 550 | .enable = _clk_enable, | ||
| 551 | .enable_reg = MXC_CCM_CGR2, | ||
| 552 | .enable_shift = MXC_CCM_CGR2_CSPI2_OFFSET, | ||
| 553 | .disable = _clk_disable,}, | ||
| 554 | { | ||
| 555 | .name = "cspi_clk", | ||
| 556 | .id = 2, | ||
| 557 | .parent = &ipg_clk, | ||
| 558 | .enable = _clk_enable, | ||
| 559 | .enable_reg = MXC_CCM_CGR0, | ||
| 560 | .enable_shift = MXC_CCM_CGR0_CSPI3_OFFSET, | ||
| 561 | .disable = _clk_disable,}, | ||
| 562 | }; | ||
| 563 | |||
| 564 | static struct clk ipg_clk = { | ||
| 565 | .name = "ipg_clk", | ||
| 566 | .parent = &ahb_clk, | ||
| 567 | .get_rate = _clk_ipg_get_rate, | ||
| 568 | }; | ||
| 569 | |||
| 570 | static struct clk emi_clk = { | ||
| 571 | .name = "emi_clk", | ||
| 572 | .parent = &ahb_clk, | ||
| 573 | .enable = _clk_enable, | ||
| 574 | .enable_reg = MXC_CCM_CGR2, | ||
| 575 | .enable_shift = MXC_CCM_CGR2_EMI_OFFSET, | ||
| 576 | .disable = _clk_emi_disable, | ||
| 577 | }; | ||
| 578 | |||
| 579 | static struct clk gpt_clk = { | ||
| 580 | .name = "gpt_clk", | ||
| 581 | .parent = &perclk_clk, | ||
| 582 | .enable = _clk_enable, | ||
| 583 | .enable_reg = MXC_CCM_CGR0, | ||
| 584 | .enable_shift = MXC_CCM_CGR0_GPT_OFFSET, | ||
| 585 | .disable = _clk_disable, | ||
| 586 | }; | ||
| 587 | |||
| 588 | static struct clk pwm_clk = { | ||
| 589 | .name = "pwm_clk", | ||
| 590 | .parent = &perclk_clk, | ||
| 591 | .enable = _clk_enable, | ||
| 592 | .enable_reg = MXC_CCM_CGR0, | ||
| 593 | .enable_shift = MXC_CCM_CGR1_PWM_OFFSET, | ||
| 594 | .disable = _clk_disable, | ||
| 595 | }; | ||
| 596 | |||
| 597 | static struct clk epit_clk[] = { | ||
| 598 | { | ||
| 599 | .name = "epit_clk", | ||
| 600 | .id = 0, | ||
| 601 | .parent = &perclk_clk, | ||
| 602 | .enable = _clk_enable, | ||
| 603 | .enable_reg = MXC_CCM_CGR0, | ||
| 604 | .enable_shift = MXC_CCM_CGR0_EPIT1_OFFSET, | ||
| 605 | .disable = _clk_disable,}, | ||
| 606 | { | ||
| 607 | .name = "epit_clk", | ||
| 608 | .id = 1, | ||
| 609 | .parent = &perclk_clk, | ||
| 610 | .enable = _clk_enable, | ||
| 611 | .enable_reg = MXC_CCM_CGR0, | ||
| 612 | .enable_shift = MXC_CCM_CGR0_EPIT2_OFFSET, | ||
| 613 | .disable = _clk_disable,}, | ||
| 614 | }; | ||
| 615 | |||
| 616 | static struct clk nfc_clk = { | ||
| 617 | .name = "nfc_clk", | ||
| 618 | .parent = &ahb_clk, | ||
| 619 | .get_rate = _clk_nfc_get_rate, | ||
| 620 | }; | ||
| 621 | |||
| 622 | static struct clk scc_clk = { | ||
| 623 | .name = "scc_clk", | ||
| 624 | .parent = &ipg_clk, | ||
| 625 | }; | ||
| 626 | |||
| 627 | static struct clk ipu_clk = { | ||
| 628 | .name = "ipu_clk", | ||
| 629 | .parent = &mcu_main_clk, | ||
| 630 | .get_rate = _clk_hsp_get_rate, | ||
| 631 | .enable = _clk_enable, | ||
| 632 | .enable_reg = MXC_CCM_CGR1, | ||
| 633 | .enable_shift = MXC_CCM_CGR1_IPU_OFFSET, | ||
| 634 | .disable = _clk_disable, | ||
| 635 | }; | ||
| 636 | |||
| 637 | static struct clk kpp_clk = { | ||
| 638 | .name = "kpp_clk", | ||
| 639 | .parent = &ipg_clk, | ||
| 640 | .enable = _clk_enable, | ||
| 641 | .enable_reg = MXC_CCM_CGR1, | ||
| 642 | .enable_shift = MXC_CCM_CGR1_KPP_OFFSET, | ||
| 643 | .disable = _clk_disable, | ||
| 644 | }; | ||
| 645 | |||
| 646 | static struct clk wdog_clk = { | ||
| 647 | .name = "wdog_clk", | ||
| 648 | .parent = &ipg_clk, | ||
| 649 | .enable = _clk_enable, | ||
| 650 | .enable_reg = MXC_CCM_CGR1, | ||
| 651 | .enable_shift = MXC_CCM_CGR1_WDOG_OFFSET, | ||
| 652 | .disable = _clk_disable, | ||
| 653 | }; | ||
| 654 | static struct clk rtc_clk = { | ||
| 655 | .name = "rtc_clk", | ||
| 656 | .parent = &ipg_clk, | ||
| 657 | .enable = _clk_enable, | ||
| 658 | .enable_reg = MXC_CCM_CGR1, | ||
| 659 | .enable_shift = MXC_CCM_CGR1_RTC_OFFSET, | ||
| 660 | .disable = _clk_disable, | ||
| 661 | }; | ||
| 662 | |||
| 663 | static struct clk usb_clk[] = { | ||
| 664 | { | ||
| 665 | .name = "usb_clk", | ||
| 666 | .parent = &usb_pll_clk, | ||
| 667 | .get_rate = _clk_usb_get_rate,}, | ||
| 668 | { | ||
| 669 | .name = "usb_ahb_clk", | ||
| 670 | .parent = &ahb_clk, | ||
| 671 | .enable = _clk_enable, | ||
| 672 | .enable_reg = MXC_CCM_CGR1, | ||
| 673 | .enable_shift = MXC_CCM_CGR1_USBOTG_OFFSET, | ||
| 674 | .disable = _clk_disable,}, | ||
| 675 | }; | ||
| 676 | |||
| 677 | static struct clk csi_clk = { | ||
| 678 | .name = "csi_clk", | ||
| 679 | .parent = &serial_pll_clk, | ||
| 680 | .get_rate = _clk_csi_get_rate, | ||
| 681 | .round_rate = _clk_csi_round_rate, | ||
| 682 | .set_rate = _clk_csi_set_rate, | ||
| 683 | .enable = _clk_enable, | ||
| 684 | .enable_reg = MXC_CCM_CGR1, | ||
| 685 | .enable_shift = MXC_CCM_CGR1_CSI_OFFSET, | ||
| 686 | .disable = _clk_disable, | ||
| 687 | }; | ||
| 688 | |||
| 689 | static struct clk uart_clk[] = { | ||
| 690 | { | ||
| 691 | .name = "uart_clk", | ||
| 692 | .id = 0, | ||
| 693 | .parent = &perclk_clk, | ||
| 694 | .enable = _clk_enable, | ||
| 695 | .enable_reg = MXC_CCM_CGR0, | ||
| 696 | .enable_shift = MXC_CCM_CGR0_UART1_OFFSET, | ||
| 697 | .disable = _clk_disable,}, | ||
| 698 | { | ||
| 699 | .name = "uart_clk", | ||
| 700 | .id = 1, | ||
| 701 | .parent = &perclk_clk, | ||
| 702 | .enable = _clk_enable, | ||
| 703 | .enable_reg = MXC_CCM_CGR0, | ||
| 704 | .enable_shift = MXC_CCM_CGR0_UART2_OFFSET, | ||
| 705 | .disable = _clk_disable,}, | ||
| 706 | { | ||
| 707 | .name = "uart_clk", | ||
| 708 | .id = 2, | ||
| 709 | .parent = &perclk_clk, | ||
| 710 | .enable = _clk_enable, | ||
| 711 | .enable_reg = MXC_CCM_CGR1, | ||
| 712 | .enable_shift = MXC_CCM_CGR1_UART3_OFFSET, | ||
| 713 | .disable = _clk_disable,}, | ||
| 714 | { | ||
| 715 | .name = "uart_clk", | ||
| 716 | .id = 3, | ||
| 717 | .parent = &perclk_clk, | ||
| 718 | .enable = _clk_enable, | ||
| 719 | .enable_reg = MXC_CCM_CGR1, | ||
| 720 | .enable_shift = MXC_CCM_CGR1_UART4_OFFSET, | ||
| 721 | .disable = _clk_disable,}, | ||
| 722 | { | ||
| 723 | .name = "uart_clk", | ||
| 724 | .id = 4, | ||
| 725 | .parent = &perclk_clk, | ||
| 726 | .enable = _clk_enable, | ||
| 727 | .enable_reg = MXC_CCM_CGR1, | ||
| 728 | .enable_shift = MXC_CCM_CGR1_UART5_OFFSET, | ||
| 729 | .disable = _clk_disable,}, | ||
| 730 | }; | ||
| 731 | |||
| 732 | static struct clk i2c_clk[] = { | ||
| 733 | { | ||
| 734 | .name = "i2c_clk", | ||
| 735 | .id = 0, | ||
| 736 | .parent = &perclk_clk, | ||
| 737 | .enable = _clk_enable, | ||
| 738 | .enable_reg = MXC_CCM_CGR0, | ||
| 739 | .enable_shift = MXC_CCM_CGR0_I2C1_OFFSET, | ||
| 740 | .disable = _clk_disable,}, | ||
| 741 | { | ||
| 742 | .name = "i2c_clk", | ||
| 743 | .id = 1, | ||
| 744 | .parent = &perclk_clk, | ||
| 745 | .enable = _clk_enable, | ||
| 746 | .enable_reg = MXC_CCM_CGR0, | ||
| 747 | .enable_shift = MXC_CCM_CGR0_I2C2_OFFSET, | ||
| 748 | .disable = _clk_disable,}, | ||
| 749 | { | ||
| 750 | .name = "i2c_clk", | ||
| 751 | .id = 2, | ||
| 752 | .parent = &perclk_clk, | ||
| 753 | .enable = _clk_enable, | ||
| 754 | .enable_reg = MXC_CCM_CGR0, | ||
| 755 | .enable_shift = MXC_CCM_CGR0_I2C3_OFFSET, | ||
| 756 | .disable = _clk_disable,}, | ||
| 757 | }; | ||
| 758 | |||
| 759 | static struct clk owire_clk = { | ||
| 760 | .name = "owire_clk", | ||
| 761 | .parent = &perclk_clk, | ||
| 762 | .enable_reg = MXC_CCM_CGR1, | ||
| 763 | .enable_shift = MXC_CCM_CGR1_OWIRE_OFFSET, | ||
| 764 | .enable = _clk_enable, | ||
| 765 | .disable = _clk_disable, | ||
| 766 | }; | ||
| 767 | |||
| 768 | static struct clk sdhc_clk[] = { | ||
| 769 | { | ||
| 770 | .name = "sdhc_clk", | ||
| 771 | .id = 0, | ||
| 772 | .parent = &perclk_clk, | ||
| 773 | .enable = _clk_enable, | ||
| 774 | .enable_reg = MXC_CCM_CGR0, | ||
| 775 | .enable_shift = MXC_CCM_CGR0_SD_MMC1_OFFSET, | ||
| 776 | .disable = _clk_disable,}, | ||
| 777 | { | ||
| 778 | .name = "sdhc_clk", | ||
| 779 | .id = 1, | ||
| 780 | .parent = &perclk_clk, | ||
| 781 | .enable = _clk_enable, | ||
| 782 | .enable_reg = MXC_CCM_CGR0, | ||
| 783 | .enable_shift = MXC_CCM_CGR0_SD_MMC2_OFFSET, | ||
| 784 | .disable = _clk_disable,}, | ||
| 785 | }; | ||
| 786 | |||
| 787 | static struct clk ssi_clk[] = { | ||
| 788 | { | ||
| 789 | .name = "ssi_clk", | ||
| 790 | .parent = &serial_pll_clk, | ||
| 791 | .get_rate = _clk_ssi1_get_rate, | ||
| 792 | .enable = _clk_enable, | ||
| 793 | .enable_reg = MXC_CCM_CGR0, | ||
| 794 | .enable_shift = MXC_CCM_CGR0_SSI1_OFFSET, | ||
| 795 | .disable = _clk_disable,}, | ||
| 796 | { | ||
| 797 | .name = "ssi_clk", | ||
| 798 | .id = 1, | ||
| 799 | .parent = &serial_pll_clk, | ||
| 800 | .get_rate = _clk_ssi2_get_rate, | ||
| 801 | .enable = _clk_enable, | ||
| 802 | .enable_reg = MXC_CCM_CGR2, | ||
| 803 | .enable_shift = MXC_CCM_CGR2_SSI2_OFFSET, | ||
| 804 | .disable = _clk_disable,}, | ||
| 805 | }; | ||
| 806 | |||
| 807 | static struct clk firi_clk = { | ||
| 808 | .name = "firi_clk", | ||
| 809 | .parent = &usb_pll_clk, | ||
| 810 | .round_rate = _clk_firi_round_rate, | ||
| 811 | .set_rate = _clk_firi_set_rate, | ||
| 812 | .get_rate = _clk_firi_get_rate, | ||
| 813 | .enable = _clk_enable, | ||
| 814 | .enable_reg = MXC_CCM_CGR2, | ||
| 815 | .enable_shift = MXC_CCM_CGR2_FIRI_OFFSET, | ||
| 816 | .disable = _clk_disable, | ||
| 817 | }; | ||
| 818 | |||
| 819 | static struct clk ata_clk = { | ||
| 820 | .name = "ata_clk", | ||
| 821 | .parent = &ipg_clk, | ||
| 822 | .enable = _clk_enable, | ||
| 823 | .enable_reg = MXC_CCM_CGR0, | ||
| 824 | .enable_shift = MXC_CCM_CGR0_ATA_OFFSET, | ||
| 825 | .disable = _clk_disable, | ||
| 826 | }; | ||
| 827 | |||
| 828 | static struct clk mbx_clk = { | ||
| 829 | .name = "mbx_clk", | ||
| 830 | .parent = &ahb_clk, | ||
| 831 | .enable = _clk_enable, | ||
| 832 | .enable_reg = MXC_CCM_CGR2, | ||
| 833 | .enable_shift = MXC_CCM_CGR2_GACC_OFFSET, | ||
| 834 | .get_rate = _clk_mbx_get_rate, | ||
| 835 | }; | ||
| 836 | |||
| 837 | static struct clk vpu_clk = { | ||
| 838 | .name = "vpu_clk", | ||
| 839 | .parent = &ahb_clk, | ||
| 840 | .enable = _clk_enable, | ||
| 841 | .enable_reg = MXC_CCM_CGR2, | ||
| 842 | .enable_shift = MXC_CCM_CGR2_GACC_OFFSET, | ||
| 843 | .get_rate = _clk_mbx_get_rate, | ||
| 844 | }; | ||
| 845 | |||
| 846 | static struct clk rtic_clk = { | ||
| 847 | .name = "rtic_clk", | ||
| 848 | .parent = &ahb_clk, | ||
| 849 | .enable = _clk_enable, | ||
| 850 | .enable_reg = MXC_CCM_CGR2, | ||
| 851 | .enable_shift = MXC_CCM_CGR2_RTIC_OFFSET, | ||
| 852 | .disable = _clk_disable, | ||
| 853 | }; | ||
| 854 | |||
| 855 | static struct clk rng_clk = { | ||
| 856 | .name = "rng_clk", | ||
| 857 | .parent = &ipg_clk, | ||
| 858 | .enable = _clk_enable, | ||
| 859 | .enable_reg = MXC_CCM_CGR0, | ||
| 860 | .enable_shift = MXC_CCM_CGR0_RNG_OFFSET, | ||
| 861 | .disable = _clk_disable, | ||
| 862 | }; | ||
| 863 | |||
| 864 | static struct clk sdma_clk[] = { | ||
| 865 | { | ||
| 866 | .name = "sdma_ahb_clk", | ||
| 867 | .parent = &ahb_clk, | ||
| 868 | .enable = _clk_enable, | ||
| 869 | .enable_reg = MXC_CCM_CGR0, | ||
| 870 | .enable_shift = MXC_CCM_CGR0_SDMA_OFFSET, | ||
| 871 | .disable = _clk_disable,}, | ||
| 872 | { | ||
| 873 | .name = "sdma_ipg_clk", | ||
| 874 | .parent = &ipg_clk,} | ||
| 875 | }; | ||
| 876 | |||
| 877 | static struct clk mpeg4_clk = { | ||
| 878 | .name = "mpeg4_clk", | ||
| 879 | .parent = &ahb_clk, | ||
| 880 | .enable = _clk_enable, | ||
| 881 | .enable_reg = MXC_CCM_CGR1, | ||
| 882 | .enable_shift = MXC_CCM_CGR1_HANTRO_OFFSET, | ||
| 883 | .disable = _clk_disable, | ||
| 884 | }; | ||
| 885 | |||
| 886 | static struct clk vl2cc_clk = { | ||
| 887 | .name = "vl2cc_clk", | ||
| 888 | .parent = &ahb_clk, | ||
| 889 | .enable = _clk_enable, | ||
| 890 | .enable_reg = MXC_CCM_CGR1, | ||
| 891 | .enable_shift = MXC_CCM_CGR1_HANTRO_OFFSET, | ||
| 892 | .disable = _clk_disable, | ||
| 893 | }; | ||
| 894 | |||
| 895 | static struct clk mstick_clk[] = { | ||
| 896 | { | ||
| 897 | .name = "mstick_clk", | ||
| 898 | .id = 0, | ||
| 899 | .parent = &usb_pll_clk, | ||
| 900 | .get_rate = _clk_mstick1_get_rate, | ||
| 901 | .enable = _clk_enable, | ||
| 902 | .enable_reg = MXC_CCM_CGR1, | ||
| 903 | .enable_shift = MXC_CCM_CGR1_MEMSTICK1_OFFSET, | ||
| 904 | .disable = _clk_disable,}, | ||
| 905 | { | ||
| 906 | .name = "mstick_clk", | ||
| 907 | .id = 1, | ||
| 908 | .parent = &usb_pll_clk, | ||
| 909 | .get_rate = _clk_mstick2_get_rate, | ||
| 910 | .enable = _clk_enable, | ||
| 911 | .enable_reg = MXC_CCM_CGR1, | ||
| 912 | .enable_shift = MXC_CCM_CGR1_MEMSTICK2_OFFSET, | ||
| 913 | .disable = _clk_disable,}, | ||
| 914 | }; | ||
| 915 | |||
| 916 | static struct clk iim_clk = { | ||
| 917 | .name = "iim_clk", | ||
| 918 | .parent = &ipg_clk, | ||
| 919 | .enable = _clk_enable, | ||
| 920 | .enable_reg = MXC_CCM_CGR0, | ||
| 921 | .enable_shift = MXC_CCM_CGR0_IIM_OFFSET, | ||
| 922 | .disable = _clk_disable, | ||
| 923 | }; | ||
| 924 | |||
| 925 | static unsigned long _clk_cko1_round_rate(struct clk *clk, unsigned long rate) | ||
| 926 | { | ||
| 927 | u32 div, parent = clk_get_rate(clk->parent); | ||
| 928 | |||
| 929 | div = parent / rate; | ||
| 930 | if (parent % rate) | ||
| 931 | div++; | ||
| 932 | |||
| 933 | if (div > 8) | ||
| 934 | div = 16; | ||
| 935 | else if (div > 4) | ||
| 936 | div = 8; | ||
| 937 | else if (div > 2) | ||
| 938 | div = 4; | ||
| 939 | |||
| 940 | return parent / div; | ||
| 941 | } | ||
| 942 | |||
| 943 | static int _clk_cko1_set_rate(struct clk *clk, unsigned long rate) | ||
| 944 | { | ||
| 945 | u32 reg, div, parent = clk_get_rate(clk->parent); | ||
| 946 | |||
| 947 | div = parent / rate; | ||
| 948 | |||
| 949 | if (div == 16) | ||
| 950 | div = 4; | ||
| 951 | else if (div == 8) | ||
| 952 | div = 3; | ||
| 953 | else if (div == 4) | ||
| 954 | div = 2; | ||
| 955 | else if (div == 2) | ||
| 956 | div = 1; | ||
| 957 | else if (div == 1) | ||
| 958 | div = 0; | ||
| 959 | else | ||
| 960 | return -EINVAL; | ||
| 961 | |||
| 962 | reg = __raw_readl(MXC_CCM_COSR) & ~MXC_CCM_COSR_CLKOUTDIV_MASK; | ||
| 963 | reg |= div << MXC_CCM_COSR_CLKOUTDIV_OFFSET; | ||
| 964 | __raw_writel(reg, MXC_CCM_COSR); | ||
| 965 | |||
| 966 | return 0; | ||
| 967 | } | ||
| 968 | |||
| 969 | static unsigned long _clk_cko1_get_rate(struct clk *clk) | ||
| 970 | { | ||
| 971 | u32 div; | ||
| 972 | |||
| 973 | div = __raw_readl(MXC_CCM_COSR) & MXC_CCM_COSR_CLKOUTDIV_MASK >> | ||
| 974 | MXC_CCM_COSR_CLKOUTDIV_OFFSET; | ||
| 975 | |||
| 976 | return clk_get_rate(clk->parent) / (1 << div); | ||
| 977 | } | ||
| 978 | |||
| 979 | static int _clk_cko1_set_parent(struct clk *clk, struct clk *parent) | ||
| 980 | { | ||
| 981 | u32 reg; | ||
| 982 | |||
| 983 | reg = __raw_readl(MXC_CCM_COSR) & ~MXC_CCM_COSR_CLKOSEL_MASK; | ||
| 984 | |||
| 985 | if (parent == &mcu_main_clk) | ||
| 986 | reg |= 0 << MXC_CCM_COSR_CLKOSEL_OFFSET; | ||
| 987 | else if (parent == &ipg_clk) | ||
| 988 | reg |= 1 << MXC_CCM_COSR_CLKOSEL_OFFSET; | ||
| 989 | else if (parent == &usb_pll_clk) | ||
| 990 | reg |= 2 << MXC_CCM_COSR_CLKOSEL_OFFSET; | ||
| 991 | else if (parent == mcu_main_clk.parent) | ||
| 992 | reg |= 3 << MXC_CCM_COSR_CLKOSEL_OFFSET; | ||
| 993 | else if (parent == &ahb_clk) | ||
| 994 | reg |= 5 << MXC_CCM_COSR_CLKOSEL_OFFSET; | ||
| 995 | else if (parent == &serial_pll_clk) | ||
| 996 | reg |= 7 << MXC_CCM_COSR_CLKOSEL_OFFSET; | ||
| 997 | else if (parent == &ckih_clk) | ||
| 998 | reg |= 8 << MXC_CCM_COSR_CLKOSEL_OFFSET; | ||
| 999 | else if (parent == &emi_clk) | ||
| 1000 | reg |= 9 << MXC_CCM_COSR_CLKOSEL_OFFSET; | ||
| 1001 | else if (parent == &ipu_clk) | ||
| 1002 | reg |= 0xA << MXC_CCM_COSR_CLKOSEL_OFFSET; | ||
| 1003 | else if (parent == &nfc_clk) | ||
| 1004 | reg |= 0xB << MXC_CCM_COSR_CLKOSEL_OFFSET; | ||
| 1005 | else if (parent == &uart_clk[0]) | ||
| 1006 | reg |= 0xC << MXC_CCM_COSR_CLKOSEL_OFFSET; | ||
| 1007 | else | ||
| 1008 | return -EINVAL; | ||
| 1009 | |||
| 1010 | __raw_writel(reg, MXC_CCM_COSR); | ||
| 1011 | |||
| 1012 | return 0; | ||
| 1013 | } | ||
| 1014 | |||
| 1015 | static int _clk_cko1_enable(struct clk *clk) | ||
| 1016 | { | ||
| 1017 | u32 reg; | ||
| 1018 | |||
| 1019 | reg = __raw_readl(MXC_CCM_COSR) | MXC_CCM_COSR_CLKOEN; | ||
| 1020 | __raw_writel(reg, MXC_CCM_COSR); | ||
| 1021 | 449 | ||
| 1022 | return 0; | 450 | #define DEFINE_CLOCK1(name, i, er, es, getsetround, s, p) \ |
| 1023 | } | 451 | static struct clk name = { \ |
| 452 | .id = i, \ | ||
| 453 | .enable_reg = er, \ | ||
| 454 | .enable_shift = es, \ | ||
| 455 | .get_rate = getsetround##_get_rate, \ | ||
| 456 | .set_rate = getsetround##_set_rate, \ | ||
| 457 | .round_rate = getsetround##_round_rate, \ | ||
| 458 | .enable = cgr_enable, \ | ||
| 459 | .disable = cgr_disable, \ | ||
| 460 | .secondary = s, \ | ||
| 461 | .parent = p, \ | ||
| 462 | } | ||
| 1024 | 463 | ||
| 1025 | static void _clk_cko1_disable(struct clk *clk) | 464 | DEFINE_CLOCK(perclk_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); |
| 465 | |||
| 466 | DEFINE_CLOCK(sdhc1_clk, 0, MXC_CCM_CGR0, 0, NULL, NULL, &perclk_clk); | ||
| 467 | DEFINE_CLOCK(sdhc2_clk, 1, MXC_CCM_CGR0, 2, NULL, NULL, &perclk_clk); | ||
| 468 | DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CGR0, 4, NULL, NULL, &perclk_clk); | ||
| 469 | DEFINE_CLOCK(epit1_clk, 0, MXC_CCM_CGR0, 6, NULL, NULL, &perclk_clk); | ||
| 470 | DEFINE_CLOCK(epit2_clk, 1, MXC_CCM_CGR0, 8, NULL, NULL, &perclk_clk); | ||
| 471 | DEFINE_CLOCK(iim_clk, 0, MXC_CCM_CGR0, 10, NULL, NULL, &ipg_clk); | ||
| 472 | DEFINE_CLOCK(ata_clk, 0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk); | ||
| 473 | DEFINE_CLOCK(sdma_clk1, 0, MXC_CCM_CGR0, 14, NULL, &sdma_clk1, &ahb_clk); | ||
| 474 | DEFINE_CLOCK(cspi3_clk, 2, MXC_CCM_CGR0, 16, NULL, NULL, &ipg_clk); | ||
| 475 | DEFINE_CLOCK(rng_clk, 0, MXC_CCM_CGR0, 18, NULL, NULL, &ipg_clk); | ||
| 476 | DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CGR0, 20, NULL, NULL, &perclk_clk); | ||
| 477 | DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CGR0, 22, NULL, NULL, &perclk_clk); | ||
| 478 | DEFINE_CLOCK(ssi1_clk, 0, MXC_CCM_CGR0, 24, ssi1_get_rate, NULL, &serial_pll_clk); | ||
| 479 | DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CGR0, 26, NULL, NULL, &perclk_clk); | ||
| 480 | DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CGR0, 28, NULL, NULL, &perclk_clk); | ||
| 481 | DEFINE_CLOCK(i2c3_clk, 2, MXC_CCM_CGR0, 30, NULL, NULL, &perclk_clk); | ||
| 482 | |||
| 483 | DEFINE_CLOCK(mpeg4_clk, 0, MXC_CCM_CGR1, 0, NULL, NULL, &ahb_clk); | ||
| 484 | DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1, 2, mstick1_get_rate, NULL, &usb_pll_clk); | ||
| 485 | DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1, 4, mstick2_get_rate, NULL, &usb_pll_clk); | ||
| 486 | DEFINE_CLOCK1(csi_clk, 0, MXC_CCM_CGR1, 6, csi, NULL, &ahb_clk); | ||
| 487 | DEFINE_CLOCK(rtc_clk, 0, MXC_CCM_CGR1, 8, NULL, NULL, &ipg_clk); | ||
| 488 | DEFINE_CLOCK(wdog_clk, 0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk); | ||
| 489 | DEFINE_CLOCK(pwm_clk, 0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk); | ||
| 490 | DEFINE_CLOCK(usb_clk2, 0, MXC_CCM_CGR1, 18, usb_get_rate, NULL, &ahb_clk); | ||
| 491 | DEFINE_CLOCK(kpp_clk, 0, MXC_CCM_CGR1, 20, NULL, NULL, &ipg_clk); | ||
| 492 | DEFINE_CLOCK(ipu_clk, 0, MXC_CCM_CGR1, 22, hsp_get_rate, NULL, &mcu_main_clk); | ||
| 493 | DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CGR1, 24, NULL, NULL, &perclk_clk); | ||
| 494 | DEFINE_CLOCK(uart4_clk, 3, MXC_CCM_CGR1, 26, NULL, NULL, &perclk_clk); | ||
| 495 | DEFINE_CLOCK(uart5_clk, 4, MXC_CCM_CGR1, 28, NULL, NULL, &perclk_clk); | ||
| 496 | DEFINE_CLOCK(owire_clk, 0, MXC_CCM_CGR1, 30, NULL, NULL, &perclk_clk); | ||
| 497 | |||
| 498 | DEFINE_CLOCK(ssi2_clk, 1, MXC_CCM_CGR2, 0, ssi2_get_rate, NULL, &serial_pll_clk); | ||
| 499 | DEFINE_CLOCK(cspi1_clk, 0, MXC_CCM_CGR2, 2, NULL, NULL, &ipg_clk); | ||
| 500 | DEFINE_CLOCK(cspi2_clk, 1, MXC_CCM_CGR2, 4, NULL, NULL, &ipg_clk); | ||
| 501 | DEFINE_CLOCK(mbx_clk, 0, MXC_CCM_CGR2, 6, mbx_get_rate, NULL, &ahb_clk); | ||
| 502 | DEFINE_CLOCK(emi_clk, 0, MXC_CCM_CGR2, 8, NULL, NULL, &ahb_clk); | ||
| 503 | DEFINE_CLOCK(rtic_clk, 0, MXC_CCM_CGR2, 10, NULL, NULL, &ahb_clk); | ||
| 504 | DEFINE_CLOCK1(firi_clk, 0, MXC_CCM_CGR2, 12, firi, NULL, &usb_pll_clk); | ||
| 505 | |||
| 506 | DEFINE_CLOCK(sdma_clk2, 0, NULL, 0, NULL, NULL, &ipg_clk); | ||
| 507 | DEFINE_CLOCK(usb_clk1, 0, NULL, 0, usb_get_rate, NULL, &usb_pll_clk); | ||
| 508 | DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk); | ||
| 509 | DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); | ||
| 510 | DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); | ||
| 511 | |||
| 512 | #define _REGISTER_CLOCK(d, n, c) \ | ||
| 513 | { \ | ||
| 514 | .dev_id = d, \ | ||
| 515 | .con_id = n, \ | ||
| 516 | .clk = &c, \ | ||
| 517 | }, | ||
| 518 | |||
| 519 | static struct clk_lookup lookups[] __initdata = { | ||
| 520 | _REGISTER_CLOCK(NULL, "emi", emi_clk) | ||
| 521 | _REGISTER_CLOCK(NULL, "cspi", cspi1_clk) | ||
| 522 | _REGISTER_CLOCK(NULL, "cspi", cspi2_clk) | ||
| 523 | _REGISTER_CLOCK(NULL, "cspi", cspi3_clk) | ||
| 524 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) | ||
| 525 | _REGISTER_CLOCK(NULL, "pwm", pwm_clk) | ||
| 526 | _REGISTER_CLOCK(NULL, "wdog", wdog_clk) | ||
| 527 | _REGISTER_CLOCK(NULL, "rtc", rtc_clk) | ||
| 528 | _REGISTER_CLOCK(NULL, "epit", epit1_clk) | ||
| 529 | _REGISTER_CLOCK(NULL, "epit", epit2_clk) | ||
| 530 | _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) | ||
| 531 | _REGISTER_CLOCK("ipu-core", NULL, ipu_clk) | ||
| 532 | _REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk) | ||
| 533 | _REGISTER_CLOCK(NULL, "kpp", kpp_clk) | ||
| 534 | _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1) | ||
| 535 | _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2) | ||
| 536 | _REGISTER_CLOCK("mx3-camera.0", "csi", csi_clk) | ||
| 537 | _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) | ||
| 538 | _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) | ||
| 539 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) | ||
| 540 | _REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk) | ||
| 541 | _REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk) | ||
| 542 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) | ||
| 543 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) | ||
| 544 | _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk) | ||
| 545 | _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk) | ||
| 546 | _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk) | ||
| 547 | _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk) | ||
| 548 | _REGISTER_CLOCK(NULL, "ssi", ssi1_clk) | ||
| 549 | _REGISTER_CLOCK(NULL, "ssi", ssi2_clk) | ||
| 550 | _REGISTER_CLOCK(NULL, "firi", firi_clk) | ||
| 551 | _REGISTER_CLOCK(NULL, "ata", ata_clk) | ||
| 552 | _REGISTER_CLOCK(NULL, "rtic", rtic_clk) | ||
| 553 | _REGISTER_CLOCK(NULL, "rng", rng_clk) | ||
| 554 | _REGISTER_CLOCK(NULL, "sdma_ahb", sdma_clk1) | ||
| 555 | _REGISTER_CLOCK(NULL, "sdma_ipg", sdma_clk2) | ||
| 556 | _REGISTER_CLOCK(NULL, "mstick", mstick1_clk) | ||
| 557 | _REGISTER_CLOCK(NULL, "mstick", mstick2_clk) | ||
| 558 | _REGISTER_CLOCK(NULL, "scc", scc_clk) | ||
| 559 | _REGISTER_CLOCK(NULL, "iim", iim_clk) | ||
| 560 | _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk) | ||
| 561 | _REGISTER_CLOCK(NULL, "mbx", mbx_clk) | ||
| 562 | }; | ||
| 563 | |||
| 564 | int __init mx31_clocks_init(unsigned long fref) | ||
| 1026 | { | 565 | { |
| 1027 | u32 reg; | 566 | u32 reg; |
| 567 | int i; | ||
| 1028 | 568 | ||
| 1029 | reg = __raw_readl(MXC_CCM_COSR) & ~MXC_CCM_COSR_CLKOEN; | 569 | mxc_set_cpu_type(MXC_CPU_MX31); |
| 1030 | __raw_writel(reg, MXC_CCM_COSR); | ||
| 1031 | } | ||
| 1032 | |||
| 1033 | static struct clk cko1_clk = { | ||
| 1034 | .name = "cko1_clk", | ||
| 1035 | .get_rate = _clk_cko1_get_rate, | ||
| 1036 | .set_rate = _clk_cko1_set_rate, | ||
| 1037 | .round_rate = _clk_cko1_round_rate, | ||
| 1038 | .set_parent = _clk_cko1_set_parent, | ||
| 1039 | .enable = _clk_cko1_enable, | ||
| 1040 | .disable = _clk_cko1_disable, | ||
| 1041 | }; | ||
| 1042 | |||
| 1043 | static struct clk *mxc_clks[] = { | ||
| 1044 | &ckih_clk, | ||
| 1045 | &ckil_clk, | ||
| 1046 | &mcu_pll_clk, | ||
| 1047 | &usb_pll_clk, | ||
| 1048 | &serial_pll_clk, | ||
| 1049 | &mcu_main_clk, | ||
| 1050 | &ahb_clk, | ||
| 1051 | &per_clk, | ||
| 1052 | &perclk_clk, | ||
| 1053 | &cko1_clk, | ||
| 1054 | &emi_clk, | ||
| 1055 | &cspi_clk[0], | ||
| 1056 | &cspi_clk[1], | ||
| 1057 | &cspi_clk[2], | ||
| 1058 | &ipg_clk, | ||
| 1059 | &gpt_clk, | ||
| 1060 | &pwm_clk, | ||
| 1061 | &wdog_clk, | ||
| 1062 | &rtc_clk, | ||
| 1063 | &epit_clk[0], | ||
| 1064 | &epit_clk[1], | ||
| 1065 | &nfc_clk, | ||
| 1066 | &ipu_clk, | ||
| 1067 | &kpp_clk, | ||
| 1068 | &usb_clk[0], | ||
| 1069 | &usb_clk[1], | ||
| 1070 | &csi_clk, | ||
| 1071 | &uart_clk[0], | ||
| 1072 | &uart_clk[1], | ||
| 1073 | &uart_clk[2], | ||
| 1074 | &uart_clk[3], | ||
| 1075 | &uart_clk[4], | ||
| 1076 | &i2c_clk[0], | ||
| 1077 | &i2c_clk[1], | ||
| 1078 | &i2c_clk[2], | ||
| 1079 | &owire_clk, | ||
| 1080 | &sdhc_clk[0], | ||
| 1081 | &sdhc_clk[1], | ||
| 1082 | &ssi_clk[0], | ||
| 1083 | &ssi_clk[1], | ||
| 1084 | &firi_clk, | ||
| 1085 | &ata_clk, | ||
| 1086 | &rtic_clk, | ||
| 1087 | &rng_clk, | ||
| 1088 | &sdma_clk[0], | ||
| 1089 | &sdma_clk[1], | ||
| 1090 | &mstick_clk[0], | ||
| 1091 | &mstick_clk[1], | ||
| 1092 | &scc_clk, | ||
| 1093 | &iim_clk, | ||
| 1094 | }; | ||
| 1095 | |||
| 1096 | int __init mxc_clocks_init(unsigned long fref) | ||
| 1097 | { | ||
| 1098 | u32 reg; | ||
| 1099 | struct clk **clkp; | ||
| 1100 | 570 | ||
| 1101 | ckih_rate = fref; | 571 | ckih_rate = fref; |
| 1102 | 572 | ||
| 1103 | for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) | 573 | for (i = 0; i < ARRAY_SIZE(lookups); i++) |
| 1104 | clk_register(*clkp); | 574 | clkdev_add(&lookups[i]); |
| 1105 | |||
| 1106 | if (cpu_is_mx31()) { | ||
| 1107 | clk_register(&mpeg4_clk); | ||
| 1108 | clk_register(&mbx_clk); | ||
| 1109 | } else { | ||
| 1110 | clk_register(&vpu_clk); | ||
| 1111 | clk_register(&vl2cc_clk); | ||
| 1112 | } | ||
| 1113 | 575 | ||
| 1114 | /* Turn off all possible clocks */ | 576 | /* Turn off all possible clocks */ |
| 1115 | __raw_writel(MXC_CCM_CGR0_GPT_MASK, MXC_CCM_CGR0); | 577 | __raw_writel((3 << 4), MXC_CCM_CGR0); |
| 1116 | __raw_writel(0, MXC_CCM_CGR1); | 578 | __raw_writel(0, MXC_CCM_CGR1); |
| 1117 | 579 | __raw_writel((3 << 8) | (3 << 14) | (3 << 16)| | |
| 1118 | __raw_writel(MXC_CCM_CGR2_EMI_MASK | | ||
| 1119 | MXC_CCM_CGR2_IPMUX1_MASK | | ||
| 1120 | MXC_CCM_CGR2_IPMUX2_MASK | | ||
| 1121 | MXC_CCM_CGR2_MXCCLKENSEL_MASK | /* for MX32 */ | ||
| 1122 | MXC_CCM_CGR2_CHIKCAMPEN_MASK | /* for MX32 */ | ||
| 1123 | MXC_CCM_CGR2_OVRVPUBUSY_MASK | /* for MX32 */ | ||
| 1124 | 1 << 27 | 1 << 28, /* Bit 27 and 28 are not defined for | 580 | 1 << 27 | 1 << 28, /* Bit 27 and 28 are not defined for |
| 1125 | MX32, but still required to be set */ | 581 | MX32, but still required to be set */ |
| 1126 | MXC_CCM_CGR2); | 582 | MXC_CCM_CGR2); |
| 1127 | 583 | ||
| 1128 | clk_disable(&cko1_clk); | 584 | usb_pll_disable(&usb_pll_clk); |
| 1129 | clk_disable(&usb_pll_clk); | ||
| 1130 | 585 | ||
| 1131 | pr_info("Clock input source is %ld\n", clk_get_rate(&ckih_clk)); | 586 | pr_info("Clock input source is %ld\n", clk_get_rate(&ckih_clk)); |
| 1132 | 587 | ||
| @@ -1143,6 +598,8 @@ int __init mxc_clocks_init(unsigned long fref) | |||
| 1143 | __raw_writel(reg, MXC_CCM_PMCR1); | 598 | __raw_writel(reg, MXC_CCM_PMCR1); |
| 1144 | } | 599 | } |
| 1145 | 600 | ||
| 601 | mxc_timer_init(&ipg_clk); | ||
| 602 | |||
| 1146 | return 0; | 603 | return 0; |
| 1147 | } | 604 | } |
| 1148 | 605 | ||
diff --git a/arch/arm/mach-mx3/crm_regs.h b/arch/arm/mach-mx3/crm_regs.h index 4a0e0ede23bb..adfa3627ad84 100644 --- a/arch/arm/mach-mx3/crm_regs.h +++ b/arch/arm/mach-mx3/crm_regs.h | |||
| @@ -91,47 +91,6 @@ | |||
| 91 | #define MXC_CCM_PDR0_MCU_PODF_OFFSET 0 | 91 | #define MXC_CCM_PDR0_MCU_PODF_OFFSET 0 |
| 92 | #define MXC_CCM_PDR0_MCU_PODF_MASK 0x7 | 92 | #define MXC_CCM_PDR0_MCU_PODF_MASK 0x7 |
| 93 | 93 | ||
| 94 | #define MXC_CCM_PDR0_HSP_DIV_1 (0x0 << 11) | ||
| 95 | #define MXC_CCM_PDR0_HSP_DIV_2 (0x1 << 11) | ||
| 96 | #define MXC_CCM_PDR0_HSP_DIV_3 (0x2 << 11) | ||
| 97 | #define MXC_CCM_PDR0_HSP_DIV_4 (0x3 << 11) | ||
| 98 | #define MXC_CCM_PDR0_HSP_DIV_5 (0x4 << 11) | ||
| 99 | #define MXC_CCM_PDR0_HSP_DIV_6 (0x5 << 11) | ||
| 100 | #define MXC_CCM_PDR0_HSP_DIV_7 (0x6 << 11) | ||
| 101 | #define MXC_CCM_PDR0_HSP_DIV_8 (0x7 << 11) | ||
| 102 | |||
| 103 | #define MXC_CCM_PDR0_IPG_DIV_1 (0x0 << 6) | ||
| 104 | #define MXC_CCM_PDR0_IPG_DIV_2 (0x1 << 6) | ||
| 105 | #define MXC_CCM_PDR0_IPG_DIV_3 (0x2 << 6) | ||
| 106 | #define MXC_CCM_PDR0_IPG_DIV_4 (0x3 << 6) | ||
| 107 | |||
| 108 | #define MXC_CCM_PDR0_MAX_DIV_1 (0x0 << 3) | ||
| 109 | #define MXC_CCM_PDR0_MAX_DIV_2 (0x1 << 3) | ||
| 110 | #define MXC_CCM_PDR0_MAX_DIV_3 (0x2 << 3) | ||
| 111 | #define MXC_CCM_PDR0_MAX_DIV_4 (0x3 << 3) | ||
| 112 | #define MXC_CCM_PDR0_MAX_DIV_5 (0x4 << 3) | ||
| 113 | #define MXC_CCM_PDR0_MAX_DIV_6 (0x5 << 3) | ||
| 114 | #define MXC_CCM_PDR0_MAX_DIV_7 (0x6 << 3) | ||
| 115 | #define MXC_CCM_PDR0_MAX_DIV_8 (0x7 << 3) | ||
| 116 | |||
| 117 | #define MXC_CCM_PDR0_NFC_DIV_1 (0x0 << 8) | ||
| 118 | #define MXC_CCM_PDR0_NFC_DIV_2 (0x1 << 8) | ||
| 119 | #define MXC_CCM_PDR0_NFC_DIV_3 (0x2 << 8) | ||
| 120 | #define MXC_CCM_PDR0_NFC_DIV_4 (0x3 << 8) | ||
| 121 | #define MXC_CCM_PDR0_NFC_DIV_5 (0x4 << 8) | ||
| 122 | #define MXC_CCM_PDR0_NFC_DIV_6 (0x5 << 8) | ||
| 123 | #define MXC_CCM_PDR0_NFC_DIV_7 (0x6 << 8) | ||
| 124 | #define MXC_CCM_PDR0_NFC_DIV_8 (0x7 << 8) | ||
| 125 | |||
| 126 | #define MXC_CCM_PDR0_MCU_DIV_1 0x0 | ||
| 127 | #define MXC_CCM_PDR0_MCU_DIV_2 0x1 | ||
| 128 | #define MXC_CCM_PDR0_MCU_DIV_3 0x2 | ||
| 129 | #define MXC_CCM_PDR0_MCU_DIV_4 0x3 | ||
| 130 | #define MXC_CCM_PDR0_MCU_DIV_5 0x4 | ||
| 131 | #define MXC_CCM_PDR0_MCU_DIV_6 0x5 | ||
| 132 | #define MXC_CCM_PDR0_MCU_DIV_7 0x6 | ||
| 133 | #define MXC_CCM_PDR0_MCU_DIV_8 0x7 | ||
| 134 | |||
| 135 | #define MXC_CCM_PDR1_USB_PRDF_OFFSET 30 | 94 | #define MXC_CCM_PDR1_USB_PRDF_OFFSET 30 |
| 136 | #define MXC_CCM_PDR1_USB_PRDF_MASK (0x3 << 30) | 95 | #define MXC_CCM_PDR1_USB_PRDF_MASK (0x3 << 30) |
| 137 | #define MXC_CCM_PDR1_USB_PODF_OFFSET 27 | 96 | #define MXC_CCM_PDR1_USB_PODF_OFFSET 27 |
| @@ -152,118 +111,6 @@ | |||
| 152 | /* Bit definitions for RCSR */ | 111 | /* Bit definitions for RCSR */ |
| 153 | #define MXC_CCM_RCSR_NF16B 0x80000000 | 112 | #define MXC_CCM_RCSR_NF16B 0x80000000 |
| 154 | 113 | ||
| 155 | /* Bit definitions for both MCU, USB and SR PLL control registers */ | ||
| 156 | #define MXC_CCM_PCTL_BRM 0x80000000 | ||
| 157 | #define MXC_CCM_PCTL_PD_OFFSET 26 | ||
| 158 | #define MXC_CCM_PCTL_PD_MASK (0xF << 26) | ||
| 159 | #define MXC_CCM_PCTL_MFD_OFFSET 16 | ||
| 160 | #define MXC_CCM_PCTL_MFD_MASK (0x3FF << 16) | ||
| 161 | #define MXC_CCM_PCTL_MFI_OFFSET 10 | ||
| 162 | #define MXC_CCM_PCTL_MFI_MASK (0xF << 10) | ||
| 163 | #define MXC_CCM_PCTL_MFN_OFFSET 0 | ||
| 164 | #define MXC_CCM_PCTL_MFN_MASK 0x3FF | ||
| 165 | |||
| 166 | #define MXC_CCM_CGR0_SD_MMC1_OFFSET 0 | ||
| 167 | #define MXC_CCM_CGR0_SD_MMC1_MASK (0x3 << 0) | ||
| 168 | #define MXC_CCM_CGR0_SD_MMC2_OFFSET 2 | ||
| 169 | #define MXC_CCM_CGR0_SD_MMC2_MASK (0x3 << 2) | ||
| 170 | #define MXC_CCM_CGR0_GPT_OFFSET 4 | ||
| 171 | #define MXC_CCM_CGR0_GPT_MASK (0x3 << 4) | ||
| 172 | #define MXC_CCM_CGR0_EPIT1_OFFSET 6 | ||
| 173 | #define MXC_CCM_CGR0_EPIT1_MASK (0x3 << 6) | ||
| 174 | #define MXC_CCM_CGR0_EPIT2_OFFSET 8 | ||
| 175 | #define MXC_CCM_CGR0_EPIT2_MASK (0x3 << 8) | ||
| 176 | #define MXC_CCM_CGR0_IIM_OFFSET 10 | ||
| 177 | #define MXC_CCM_CGR0_IIM_MASK (0x3 << 10) | ||
| 178 | #define MXC_CCM_CGR0_ATA_OFFSET 12 | ||
| 179 | #define MXC_CCM_CGR0_ATA_MASK (0x3 << 12) | ||
| 180 | #define MXC_CCM_CGR0_SDMA_OFFSET 14 | ||
| 181 | #define MXC_CCM_CGR0_SDMA_MASK (0x3 << 14) | ||
| 182 | #define MXC_CCM_CGR0_CSPI3_OFFSET 16 | ||
| 183 | #define MXC_CCM_CGR0_CSPI3_MASK (0x3 << 16) | ||
| 184 | #define MXC_CCM_CGR0_RNG_OFFSET 18 | ||
| 185 | #define MXC_CCM_CGR0_RNG_MASK (0x3 << 18) | ||
| 186 | #define MXC_CCM_CGR0_UART1_OFFSET 20 | ||
| 187 | #define MXC_CCM_CGR0_UART1_MASK (0x3 << 20) | ||
| 188 | #define MXC_CCM_CGR0_UART2_OFFSET 22 | ||
| 189 | #define MXC_CCM_CGR0_UART2_MASK (0x3 << 22) | ||
| 190 | #define MXC_CCM_CGR0_SSI1_OFFSET 24 | ||
| 191 | #define MXC_CCM_CGR0_SSI1_MASK (0x3 << 24) | ||
| 192 | #define MXC_CCM_CGR0_I2C1_OFFSET 26 | ||
| 193 | #define MXC_CCM_CGR0_I2C1_MASK (0x3 << 26) | ||
| 194 | #define MXC_CCM_CGR0_I2C2_OFFSET 28 | ||
| 195 | #define MXC_CCM_CGR0_I2C2_MASK (0x3 << 28) | ||
| 196 | #define MXC_CCM_CGR0_I2C3_OFFSET 30 | ||
| 197 | #define MXC_CCM_CGR0_I2C3_MASK (0x3 << 30) | ||
| 198 | |||
| 199 | #define MXC_CCM_CGR1_HANTRO_OFFSET 0 | ||
| 200 | #define MXC_CCM_CGR1_HANTRO_MASK (0x3 << 0) | ||
| 201 | #define MXC_CCM_CGR1_MEMSTICK1_OFFSET 2 | ||
| 202 | #define MXC_CCM_CGR1_MEMSTICK1_MASK (0x3 << 2) | ||
| 203 | #define MXC_CCM_CGR1_MEMSTICK2_OFFSET 4 | ||
| 204 | #define MXC_CCM_CGR1_MEMSTICK2_MASK (0x3 << 4) | ||
| 205 | #define MXC_CCM_CGR1_CSI_OFFSET 6 | ||
| 206 | #define MXC_CCM_CGR1_CSI_MASK (0x3 << 6) | ||
| 207 | #define MXC_CCM_CGR1_RTC_OFFSET 8 | ||
| 208 | #define MXC_CCM_CGR1_RTC_MASK (0x3 << 8) | ||
| 209 | #define MXC_CCM_CGR1_WDOG_OFFSET 10 | ||
| 210 | #define MXC_CCM_CGR1_WDOG_MASK (0x3 << 10) | ||
| 211 | #define MXC_CCM_CGR1_PWM_OFFSET 12 | ||
| 212 | #define MXC_CCM_CGR1_PWM_MASK (0x3 << 12) | ||
| 213 | #define MXC_CCM_CGR1_SIM_OFFSET 14 | ||
| 214 | #define MXC_CCM_CGR1_SIM_MASK (0x3 << 14) | ||
| 215 | #define MXC_CCM_CGR1_ECT_OFFSET 16 | ||
| 216 | #define MXC_CCM_CGR1_ECT_MASK (0x3 << 16) | ||
| 217 | #define MXC_CCM_CGR1_USBOTG_OFFSET 18 | ||
| 218 | #define MXC_CCM_CGR1_USBOTG_MASK (0x3 << 18) | ||
| 219 | #define MXC_CCM_CGR1_KPP_OFFSET 20 | ||
| 220 | #define MXC_CCM_CGR1_KPP_MASK (0x3 << 20) | ||
| 221 | #define MXC_CCM_CGR1_IPU_OFFSET 22 | ||
| 222 | #define MXC_CCM_CGR1_IPU_MASK (0x3 << 22) | ||
| 223 | #define MXC_CCM_CGR1_UART3_OFFSET 24 | ||
| 224 | #define MXC_CCM_CGR1_UART3_MASK (0x3 << 24) | ||
| 225 | #define MXC_CCM_CGR1_UART4_OFFSET 26 | ||
| 226 | #define MXC_CCM_CGR1_UART4_MASK (0x3 << 26) | ||
| 227 | #define MXC_CCM_CGR1_UART5_OFFSET 28 | ||
| 228 | #define MXC_CCM_CGR1_UART5_MASK (0x3 << 28) | ||
| 229 | #define MXC_CCM_CGR1_OWIRE_OFFSET 30 | ||
| 230 | #define MXC_CCM_CGR1_OWIRE_MASK (0x3 << 30) | ||
| 231 | |||
| 232 | #define MXC_CCM_CGR2_SSI2_OFFSET 0 | ||
| 233 | #define MXC_CCM_CGR2_SSI2_MASK (0x3 << 0) | ||
| 234 | #define MXC_CCM_CGR2_CSPI1_OFFSET 2 | ||
| 235 | #define MXC_CCM_CGR2_CSPI1_MASK (0x3 << 2) | ||
| 236 | #define MXC_CCM_CGR2_CSPI2_OFFSET 4 | ||
| 237 | #define MXC_CCM_CGR2_CSPI2_MASK (0x3 << 4) | ||
| 238 | #define MXC_CCM_CGR2_GACC_OFFSET 6 | ||
| 239 | #define MXC_CCM_CGR2_GACC_MASK (0x3 << 6) | ||
| 240 | #define MXC_CCM_CGR2_EMI_OFFSET 8 | ||
| 241 | #define MXC_CCM_CGR2_EMI_MASK (0x3 << 8) | ||
| 242 | #define MXC_CCM_CGR2_RTIC_OFFSET 10 | ||
| 243 | #define MXC_CCM_CGR2_RTIC_MASK (0x3 << 10) | ||
| 244 | #define MXC_CCM_CGR2_FIRI_OFFSET 12 | ||
| 245 | #define MXC_CCM_CGR2_FIRI_MASK (0x3 << 12) | ||
| 246 | #define MXC_CCM_CGR2_IPMUX1_OFFSET 14 | ||
| 247 | #define MXC_CCM_CGR2_IPMUX1_MASK (0x3 << 14) | ||
| 248 | #define MXC_CCM_CGR2_IPMUX2_OFFSET 16 | ||
| 249 | #define MXC_CCM_CGR2_IPMUX2_MASK (0x3 << 16) | ||
| 250 | |||
| 251 | /* These new CGR2 bits are added in MX32 */ | ||
| 252 | #define MXC_CCM_CGR2_APMSYSCLKSEL_OFFSET 18 | ||
| 253 | #define MXC_CCM_CGR2_APMSYSCLKSEL_MASK (0x3 << 18) | ||
| 254 | #define MXC_CCM_CGR2_APMSSICLKSEL_OFFSET 20 | ||
| 255 | #define MXC_CCM_CGR2_APMSSICLKSEL_MASK (0x3 << 20) | ||
| 256 | #define MXC_CCM_CGR2_APMPERCLKSEL_OFFSET 22 | ||
| 257 | #define MXC_CCM_CGR2_APMPERCLKSEL_MASK (0x3 << 22) | ||
| 258 | #define MXC_CCM_CGR2_MXCCLKENSEL_OFFSET 24 | ||
| 259 | #define MXC_CCM_CGR2_MXCCLKENSEL_MASK (0x1 << 24) | ||
| 260 | #define MXC_CCM_CGR2_CHIKCAMPEN_OFFSET 25 | ||
| 261 | #define MXC_CCM_CGR2_CHIKCAMPEN_MASK (0x1 << 25) | ||
| 262 | #define MXC_CCM_CGR2_OVRVPUBUSY_OFFSET 26 | ||
| 263 | #define MXC_CCM_CGR2_OVRVPUBUSY_MASK (0x1 << 26) | ||
| 264 | #define MXC_CCM_CGR2_APMENA_OFFSET 30 | ||
| 265 | #define MXC_CCM_CGR2_AOMENA_MASK (0x1 << 30) | ||
| 266 | |||
| 267 | /* | 114 | /* |
| 268 | * LTR0 register offsets | 115 | * LTR0 register offsets |
| 269 | */ | 116 | */ |
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index f8428800f286..380be0c9b213 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c | |||
| @@ -25,6 +25,8 @@ | |||
| 25 | #include <mach/irqs.h> | 25 | #include <mach/irqs.h> |
| 26 | #include <mach/imx-uart.h> | 26 | #include <mach/imx-uart.h> |
| 27 | 27 | ||
| 28 | #include "devices.h" | ||
| 29 | |||
| 28 | static struct resource uart0[] = { | 30 | static struct resource uart0[] = { |
| 29 | { | 31 | { |
| 30 | .start = UART1_BASE_ADDR, | 32 | .start = UART1_BASE_ADDR, |
| @@ -82,6 +84,7 @@ struct platform_device mxc_uart_device2 = { | |||
| 82 | .num_resources = ARRAY_SIZE(uart2), | 84 | .num_resources = ARRAY_SIZE(uart2), |
| 83 | }; | 85 | }; |
| 84 | 86 | ||
| 87 | #ifdef CONFIG_ARCH_MX31 | ||
| 85 | static struct resource uart3[] = { | 88 | static struct resource uart3[] = { |
| 86 | { | 89 | { |
| 87 | .start = UART4_BASE_ADDR, | 90 | .start = UART4_BASE_ADDR, |
| @@ -119,6 +122,7 @@ struct platform_device mxc_uart_device4 = { | |||
| 119 | .resource = uart4, | 122 | .resource = uart4, |
| 120 | .num_resources = ARRAY_SIZE(uart4), | 123 | .num_resources = ARRAY_SIZE(uart4), |
| 121 | }; | 124 | }; |
| 125 | #endif /* CONFIG_ARCH_MX31 */ | ||
| 122 | 126 | ||
| 123 | /* GPIO port description */ | 127 | /* GPIO port description */ |
| 124 | static struct mxc_gpio_port imx_gpio_ports[] = { | 128 | static struct mxc_gpio_port imx_gpio_ports[] = { |
| @@ -164,8 +168,8 @@ struct platform_device mxc_w1_master_device = { | |||
| 164 | 168 | ||
| 165 | static struct resource mxc_nand_resources[] = { | 169 | static struct resource mxc_nand_resources[] = { |
| 166 | { | 170 | { |
| 167 | .start = NFC_BASE_ADDR, | 171 | .start = 0, /* runtime dependent */ |
| 168 | .end = NFC_BASE_ADDR + 0xfff, | 172 | .end = 0, |
| 169 | .flags = IORESOURCE_MEM | 173 | .flags = IORESOURCE_MEM |
| 170 | }, { | 174 | }, { |
| 171 | .start = MXC_INT_NANDFC, | 175 | .start = MXC_INT_NANDFC, |
| @@ -180,3 +184,188 @@ struct platform_device mxc_nand_device = { | |||
| 180 | .num_resources = ARRAY_SIZE(mxc_nand_resources), | 184 | .num_resources = ARRAY_SIZE(mxc_nand_resources), |
| 181 | .resource = mxc_nand_resources, | 185 | .resource = mxc_nand_resources, |
| 182 | }; | 186 | }; |
| 187 | |||
| 188 | static struct resource mxc_i2c0_resources[] = { | ||
| 189 | { | ||
| 190 | .start = I2C_BASE_ADDR, | ||
| 191 | .end = I2C_BASE_ADDR + SZ_4K - 1, | ||
| 192 | .flags = IORESOURCE_MEM, | ||
| 193 | }, | ||
| 194 | { | ||
| 195 | .start = MXC_INT_I2C, | ||
| 196 | .end = MXC_INT_I2C, | ||
| 197 | .flags = IORESOURCE_IRQ, | ||
| 198 | }, | ||
| 199 | }; | ||
| 200 | |||
| 201 | struct platform_device mxc_i2c_device0 = { | ||
| 202 | .name = "imx-i2c", | ||
| 203 | .id = 0, | ||
| 204 | .num_resources = ARRAY_SIZE(mxc_i2c0_resources), | ||
| 205 | .resource = mxc_i2c0_resources, | ||
| 206 | }; | ||
| 207 | |||
| 208 | static struct resource mxc_i2c1_resources[] = { | ||
| 209 | { | ||
| 210 | .start = I2C2_BASE_ADDR, | ||
| 211 | .end = I2C2_BASE_ADDR + SZ_4K - 1, | ||
| 212 | .flags = IORESOURCE_MEM, | ||
| 213 | }, | ||
| 214 | { | ||
| 215 | .start = MXC_INT_I2C2, | ||
| 216 | .end = MXC_INT_I2C2, | ||
| 217 | .flags = IORESOURCE_IRQ, | ||
| 218 | }, | ||
| 219 | }; | ||
| 220 | |||
| 221 | struct platform_device mxc_i2c_device1 = { | ||
| 222 | .name = "imx-i2c", | ||
| 223 | .id = 1, | ||
| 224 | .num_resources = ARRAY_SIZE(mxc_i2c1_resources), | ||
| 225 | .resource = mxc_i2c1_resources, | ||
| 226 | }; | ||
| 227 | |||
| 228 | static struct resource mxc_i2c2_resources[] = { | ||
| 229 | { | ||
| 230 | .start = I2C3_BASE_ADDR, | ||
| 231 | .end = I2C3_BASE_ADDR + SZ_4K - 1, | ||
| 232 | .flags = IORESOURCE_MEM, | ||
| 233 | }, | ||
| 234 | { | ||
| 235 | .start = MXC_INT_I2C3, | ||
| 236 | .end = MXC_INT_I2C3, | ||
| 237 | .flags = IORESOURCE_IRQ, | ||
| 238 | }, | ||
| 239 | }; | ||
| 240 | |||
| 241 | struct platform_device mxc_i2c_device2 = { | ||
| 242 | .name = "imx-i2c", | ||
| 243 | .id = 2, | ||
| 244 | .num_resources = ARRAY_SIZE(mxc_i2c2_resources), | ||
| 245 | .resource = mxc_i2c2_resources, | ||
| 246 | }; | ||
| 247 | |||
| 248 | #ifdef CONFIG_ARCH_MX31 | ||
| 249 | static struct resource mxcsdhc0_resources[] = { | ||
| 250 | { | ||
| 251 | .start = MMC_SDHC1_BASE_ADDR, | ||
| 252 | .end = MMC_SDHC1_BASE_ADDR + SZ_16K - 1, | ||
| 253 | .flags = IORESOURCE_MEM, | ||
| 254 | }, { | ||
| 255 | .start = MXC_INT_MMC_SDHC1, | ||
| 256 | .end = MXC_INT_MMC_SDHC1, | ||
| 257 | .flags = IORESOURCE_IRQ, | ||
| 258 | }, | ||
| 259 | }; | ||
| 260 | |||
| 261 | static struct resource mxcsdhc1_resources[] = { | ||
| 262 | { | ||
| 263 | .start = MMC_SDHC2_BASE_ADDR, | ||
| 264 | .end = MMC_SDHC2_BASE_ADDR + SZ_16K - 1, | ||
| 265 | .flags = IORESOURCE_MEM, | ||
| 266 | }, { | ||
| 267 | .start = MXC_INT_MMC_SDHC2, | ||
| 268 | .end = MXC_INT_MMC_SDHC2, | ||
| 269 | .flags = IORESOURCE_IRQ, | ||
| 270 | }, | ||
| 271 | }; | ||
| 272 | |||
| 273 | struct platform_device mxcsdhc_device0 = { | ||
| 274 | .name = "mxc-mmc", | ||
| 275 | .id = 0, | ||
| 276 | .num_resources = ARRAY_SIZE(mxcsdhc0_resources), | ||
| 277 | .resource = mxcsdhc0_resources, | ||
| 278 | }; | ||
| 279 | |||
| 280 | struct platform_device mxcsdhc_device1 = { | ||
| 281 | .name = "mxc-mmc", | ||
| 282 | .id = 1, | ||
| 283 | .num_resources = ARRAY_SIZE(mxcsdhc1_resources), | ||
| 284 | .resource = mxcsdhc1_resources, | ||
| 285 | }; | ||
| 286 | #endif /* CONFIG_ARCH_MX31 */ | ||
| 287 | |||
| 288 | /* i.MX31 Image Processing Unit */ | ||
| 289 | |||
| 290 | /* The resource order is important! */ | ||
| 291 | static struct resource mx3_ipu_rsrc[] = { | ||
| 292 | { | ||
| 293 | .start = IPU_CTRL_BASE_ADDR, | ||
| 294 | .end = IPU_CTRL_BASE_ADDR + 0x5F, | ||
| 295 | .flags = IORESOURCE_MEM, | ||
| 296 | }, { | ||
| 297 | .start = IPU_CTRL_BASE_ADDR + 0x88, | ||
| 298 | .end = IPU_CTRL_BASE_ADDR + 0xB3, | ||
| 299 | .flags = IORESOURCE_MEM, | ||
| 300 | }, { | ||
| 301 | .start = MXC_INT_IPU_SYN, | ||
| 302 | .end = MXC_INT_IPU_SYN, | ||
| 303 | .flags = IORESOURCE_IRQ, | ||
| 304 | }, { | ||
| 305 | .start = MXC_INT_IPU_ERR, | ||
| 306 | .end = MXC_INT_IPU_ERR, | ||
| 307 | .flags = IORESOURCE_IRQ, | ||
| 308 | }, | ||
| 309 | }; | ||
| 310 | |||
| 311 | struct platform_device mx3_ipu = { | ||
| 312 | .name = "ipu-core", | ||
| 313 | .id = -1, | ||
| 314 | .num_resources = ARRAY_SIZE(mx3_ipu_rsrc), | ||
| 315 | .resource = mx3_ipu_rsrc, | ||
| 316 | }; | ||
| 317 | |||
| 318 | static struct resource fb_resources[] = { | ||
| 319 | { | ||
| 320 | .start = IPU_CTRL_BASE_ADDR + 0xB4, | ||
| 321 | .end = IPU_CTRL_BASE_ADDR + 0x1BF, | ||
| 322 | .flags = IORESOURCE_MEM, | ||
| 323 | }, | ||
| 324 | }; | ||
| 325 | |||
| 326 | struct platform_device mx3_fb = { | ||
| 327 | .name = "mx3_sdc_fb", | ||
| 328 | .id = -1, | ||
| 329 | .num_resources = ARRAY_SIZE(fb_resources), | ||
| 330 | .resource = fb_resources, | ||
| 331 | .dev = { | ||
| 332 | .coherent_dma_mask = 0xffffffff, | ||
| 333 | }, | ||
| 334 | }; | ||
| 335 | |||
| 336 | #ifdef CONFIG_ARCH_MX35 | ||
| 337 | static struct resource mxc_fec_resources[] = { | ||
| 338 | { | ||
| 339 | .start = MXC_FEC_BASE_ADDR, | ||
| 340 | .end = MXC_FEC_BASE_ADDR + 0xfff, | ||
| 341 | .flags = IORESOURCE_MEM | ||
| 342 | }, { | ||
| 343 | .start = MXC_INT_FEC, | ||
| 344 | .end = MXC_INT_FEC, | ||
| 345 | .flags = IORESOURCE_IRQ | ||
| 346 | }, | ||
| 347 | }; | ||
| 348 | |||
| 349 | struct platform_device mxc_fec_device = { | ||
| 350 | .name = "fec", | ||
| 351 | .id = 0, | ||
| 352 | .num_resources = ARRAY_SIZE(mxc_fec_resources), | ||
| 353 | .resource = mxc_fec_resources, | ||
| 354 | }; | ||
| 355 | #endif | ||
| 356 | |||
| 357 | static int mx3_devices_init(void) | ||
| 358 | { | ||
| 359 | if (cpu_is_mx31()) { | ||
| 360 | mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR; | ||
| 361 | mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff; | ||
| 362 | } | ||
| 363 | if (cpu_is_mx35()) { | ||
| 364 | mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; | ||
| 365 | mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff; | ||
| 366 | } | ||
| 367 | |||
| 368 | return 0; | ||
| 369 | } | ||
| 370 | |||
| 371 | subsys_initcall(mx3_devices_init); | ||
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h index 9949ef4e0694..88c04b296fab 100644 --- a/arch/arm/mach-mx3/devices.h +++ b/arch/arm/mach-mx3/devices.h | |||
| @@ -6,3 +6,11 @@ extern struct platform_device mxc_uart_device3; | |||
| 6 | extern struct platform_device mxc_uart_device4; | 6 | extern struct platform_device mxc_uart_device4; |
| 7 | extern struct platform_device mxc_w1_master_device; | 7 | extern struct platform_device mxc_w1_master_device; |
| 8 | extern struct platform_device mxc_nand_device; | 8 | extern struct platform_device mxc_nand_device; |
| 9 | extern struct platform_device mxc_i2c_device0; | ||
| 10 | extern struct platform_device mxc_i2c_device1; | ||
| 11 | extern struct platform_device mxc_i2c_device2; | ||
| 12 | extern struct platform_device mx3_ipu; | ||
| 13 | extern struct platform_device mx3_fb; | ||
| 14 | extern struct platform_device mxc_fec_device; | ||
| 15 | extern struct platform_device mxcsdhc_device0; | ||
| 16 | extern struct platform_device mxcsdhc_device1; | ||
diff --git a/arch/arm/mach-mx3/iomux.c b/arch/arm/mach-mx3/iomux.c index 7a5088b519a8..40ffc5a664d9 100644 --- a/arch/arm/mach-mx3/iomux.c +++ b/arch/arm/mach-mx3/iomux.c | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved. | 2 | * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved. |
| 3 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> | 3 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> |
| 4 | * Copyright (C) 2009 by Valentin Longchamp <valentin.longchamp@epfl.ch> | ||
| 4 | * | 5 | * |
| 5 | * This program is free software; you can redistribute it and/or | 6 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License | 7 | * modify it under the terms of the GNU General Public License |
| @@ -21,6 +22,7 @@ | |||
| 21 | #include <linux/spinlock.h> | 22 | #include <linux/spinlock.h> |
| 22 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 23 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
| 25 | #include <linux/kernel.h> | ||
| 24 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
| 25 | #include <mach/gpio.h> | 27 | #include <mach/gpio.h> |
| 26 | #include <mach/iomux-mx3.h> | 28 | #include <mach/iomux-mx3.h> |
| @@ -38,6 +40,8 @@ | |||
| 38 | static DEFINE_SPINLOCK(gpio_mux_lock); | 40 | static DEFINE_SPINLOCK(gpio_mux_lock); |
| 39 | 41 | ||
| 40 | #define IOMUX_REG_MASK (IOMUX_PADNUM_MASK & ~0x3) | 42 | #define IOMUX_REG_MASK (IOMUX_PADNUM_MASK & ~0x3) |
| 43 | |||
| 44 | unsigned long mxc_pin_alloc_map[NB_PORTS * 32 / BITS_PER_LONG]; | ||
| 41 | /* | 45 | /* |
| 42 | * set the mode for a IOMUX pin. | 46 | * set the mode for a IOMUX pin. |
| 43 | */ | 47 | */ |
| @@ -50,9 +54,6 @@ int mxc_iomux_mode(unsigned int pin_mode) | |||
| 50 | field = pin_mode & 0x3; | 54 | field = pin_mode & 0x3; |
| 51 | mode = (pin_mode & IOMUX_MODE_MASK) >> IOMUX_MODE_SHIFT; | 55 | mode = (pin_mode & IOMUX_MODE_MASK) >> IOMUX_MODE_SHIFT; |
| 52 | 56 | ||
| 53 | pr_debug("%s: reg offset = 0x%x field = %d mode = 0x%02x\n", | ||
| 54 | __func__, (pin_mode & IOMUX_REG_MASK), field, mode); | ||
| 55 | |||
| 56 | spin_lock(&gpio_mux_lock); | 57 | spin_lock(&gpio_mux_lock); |
| 57 | 58 | ||
| 58 | l = __raw_readl(reg); | 59 | l = __raw_readl(reg); |
| @@ -93,6 +94,86 @@ void mxc_iomux_set_pad(enum iomux_pins pin, u32 config) | |||
| 93 | EXPORT_SYMBOL(mxc_iomux_set_pad); | 94 | EXPORT_SYMBOL(mxc_iomux_set_pad); |
| 94 | 95 | ||
| 95 | /* | 96 | /* |
| 97 | * setups a single pin: | ||
| 98 | * - reserves the pin so that it is not claimed by another driver | ||
| 99 | * - setups the iomux according to the configuration | ||
| 100 | * - if the pin is configured as a GPIO, we claim it through kernel gpiolib | ||
| 101 | */ | ||
| 102 | int mxc_iomux_setup_pin(const unsigned int pin, const char *label) | ||
| 103 | { | ||
| 104 | unsigned pad = pin & IOMUX_PADNUM_MASK; | ||
| 105 | unsigned gpio; | ||
| 106 | |||
| 107 | if (pad >= (PIN_MAX + 1)) { | ||
| 108 | printk(KERN_ERR "mxc_iomux: Attempt to request nonexistant pin %u for \"%s\"\n", | ||
| 109 | pad, label ? label : "?"); | ||
| 110 | return -EINVAL; | ||
| 111 | } | ||
| 112 | |||
| 113 | if (test_and_set_bit(pad, mxc_pin_alloc_map)) { | ||
| 114 | printk(KERN_ERR "mxc_iomux: pin %u already used. Allocation for \"%s\" failed\n", | ||
| 115 | pad, label ? label : "?"); | ||
| 116 | return -EINVAL; | ||
| 117 | } | ||
| 118 | mxc_iomux_mode(pin); | ||
| 119 | |||
| 120 | /* if we have a gpio, we can allocate it */ | ||
| 121 | gpio = (pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT; | ||
| 122 | if (gpio < (GPIO_PORT_MAX + 1) * 32) | ||
| 123 | if (gpio_request(gpio, label)) | ||
| 124 | return -EINVAL; | ||
| 125 | |||
| 126 | return 0; | ||
| 127 | } | ||
| 128 | EXPORT_SYMBOL(mxc_iomux_setup_pin); | ||
| 129 | |||
| 130 | int mxc_iomux_setup_multiple_pins(unsigned int *pin_list, unsigned count, | ||
| 131 | const char *label) | ||
| 132 | { | ||
| 133 | unsigned int *p = pin_list; | ||
| 134 | int i; | ||
| 135 | int ret = -EINVAL; | ||
| 136 | |||
| 137 | for (i = 0; i < count; i++) { | ||
| 138 | if (mxc_iomux_setup_pin(*p, label)) | ||
| 139 | goto setup_error; | ||
| 140 | p++; | ||
| 141 | } | ||
| 142 | return 0; | ||
| 143 | |||
| 144 | setup_error: | ||
| 145 | mxc_iomux_release_multiple_pins(pin_list, i); | ||
| 146 | return ret; | ||
| 147 | } | ||
| 148 | EXPORT_SYMBOL(mxc_iomux_setup_multiple_pins); | ||
| 149 | |||
| 150 | void mxc_iomux_release_pin(const unsigned int pin) | ||
| 151 | { | ||
| 152 | unsigned pad = pin & IOMUX_PADNUM_MASK; | ||
| 153 | unsigned gpio; | ||
| 154 | |||
| 155 | if (pad < (PIN_MAX + 1)) | ||
| 156 | clear_bit(pad, mxc_pin_alloc_map); | ||
| 157 | |||
| 158 | gpio = (pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT; | ||
| 159 | if (gpio < (GPIO_PORT_MAX + 1) * 32) | ||
| 160 | gpio_free(gpio); | ||
| 161 | } | ||
| 162 | EXPORT_SYMBOL(mxc_iomux_release_pin); | ||
| 163 | |||
| 164 | void mxc_iomux_release_multiple_pins(unsigned int *pin_list, int count) | ||
| 165 | { | ||
| 166 | unsigned int *p = pin_list; | ||
| 167 | int i; | ||
| 168 | |||
| 169 | for (i = 0; i < count; i++) { | ||
| 170 | mxc_iomux_release_pin(*p); | ||
| 171 | p++; | ||
| 172 | } | ||
| 173 | } | ||
| 174 | EXPORT_SYMBOL(mxc_iomux_release_multiple_pins); | ||
| 175 | |||
| 176 | /* | ||
| 96 | * This function enables/disables the general purpose function for a particular | 177 | * This function enables/disables the general purpose function for a particular |
| 97 | * signal. | 178 | * signal. |
| 98 | */ | 179 | */ |
| @@ -111,4 +192,3 @@ void mxc_iomux_set_gpr(enum iomux_gp_func gp, bool en) | |||
| 111 | spin_unlock(&gpio_mux_lock); | 192 | spin_unlock(&gpio_mux_lock); |
| 112 | } | 193 | } |
| 113 | EXPORT_SYMBOL(mxc_iomux_set_gpr); | 194 | EXPORT_SYMBOL(mxc_iomux_set_gpr); |
| 114 | |||
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c index 0589b5cd33c7..9e1459cb4b74 100644 --- a/arch/arm/mach-mx3/mm.c +++ b/arch/arm/mach-mx3/mm.c | |||
| @@ -22,10 +22,14 @@ | |||
| 22 | 22 | ||
| 23 | #include <linux/mm.h> | 23 | #include <linux/mm.h> |
| 24 | #include <linux/init.h> | 24 | #include <linux/init.h> |
| 25 | #include <mach/hardware.h> | 25 | #include <linux/err.h> |
| 26 | |||
| 26 | #include <asm/pgtable.h> | 27 | #include <asm/pgtable.h> |
| 27 | #include <asm/mach/map.h> | 28 | #include <asm/mach/map.h> |
| 29 | #include <asm/hardware/cache-l2x0.h> | ||
| 30 | |||
| 28 | #include <mach/common.h> | 31 | #include <mach/common.h> |
| 32 | #include <mach/hardware.h> | ||
| 29 | 33 | ||
| 30 | /*! | 34 | /*! |
| 31 | * @file mm.c | 35 | * @file mm.c |
| @@ -50,6 +54,16 @@ static struct map_desc mxc_io_desc[] __initdata = { | |||
| 50 | .pfn = __phys_to_pfn(AVIC_BASE_ADDR), | 54 | .pfn = __phys_to_pfn(AVIC_BASE_ADDR), |
| 51 | .length = AVIC_SIZE, | 55 | .length = AVIC_SIZE, |
| 52 | .type = MT_DEVICE_NONSHARED | 56 | .type = MT_DEVICE_NONSHARED |
| 57 | }, { | ||
| 58 | .virtual = AIPS1_BASE_ADDR_VIRT, | ||
| 59 | .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), | ||
| 60 | .length = AIPS1_SIZE, | ||
| 61 | .type = MT_DEVICE_NONSHARED | ||
| 62 | }, { | ||
| 63 | .virtual = AIPS2_BASE_ADDR_VIRT, | ||
| 64 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), | ||
| 65 | .length = AIPS2_SIZE, | ||
| 66 | .type = MT_DEVICE_NONSHARED | ||
| 53 | }, | 67 | }, |
| 54 | }; | 68 | }; |
| 55 | 69 | ||
| @@ -62,3 +76,24 @@ void __init mxc_map_io(void) | |||
| 62 | { | 76 | { |
| 63 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | 77 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); |
| 64 | } | 78 | } |
| 79 | |||
| 80 | #ifdef CONFIG_CACHE_L2X0 | ||
| 81 | static int mxc_init_l2x0(void) | ||
| 82 | { | ||
| 83 | void __iomem *l2x0_base; | ||
| 84 | |||
| 85 | l2x0_base = ioremap(L2CC_BASE_ADDR, 4096); | ||
| 86 | if (IS_ERR(l2x0_base)) { | ||
| 87 | printk(KERN_ERR "remapping L2 cache area failed with %ld\n", | ||
| 88 | PTR_ERR(l2x0_base)); | ||
| 89 | return 0; | ||
| 90 | } | ||
| 91 | |||
| 92 | l2x0_init(l2x0_base, 0x00030024, 0x00000000); | ||
| 93 | |||
| 94 | return 0; | ||
| 95 | } | ||
| 96 | |||
| 97 | arch_initcall(mxc_init_l2x0); | ||
| 98 | #endif | ||
| 99 | |||
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c index f902a7c37c31..83e5e8e1276f 100644 --- a/arch/arm/mach-mx3/mx31ads.c +++ b/arch/arm/mach-mx3/mx31ads.c | |||
| @@ -22,6 +22,8 @@ | |||
| 22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
| 23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
| 24 | #include <linux/serial_8250.h> | 24 | #include <linux/serial_8250.h> |
| 25 | #include <linux/gpio.h> | ||
| 26 | #include <linux/i2c.h> | ||
| 25 | #include <linux/irq.h> | 27 | #include <linux/irq.h> |
| 26 | 28 | ||
| 27 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
| @@ -35,6 +37,12 @@ | |||
| 35 | #include <mach/imx-uart.h> | 37 | #include <mach/imx-uart.h> |
| 36 | #include <mach/iomux-mx3.h> | 38 | #include <mach/iomux-mx3.h> |
| 37 | 39 | ||
| 40 | #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 | ||
| 41 | #include <linux/mfd/wm8350/audio.h> | ||
| 42 | #include <linux/mfd/wm8350/core.h> | ||
| 43 | #include <linux/mfd/wm8350/pmic.h> | ||
| 44 | #endif | ||
| 45 | |||
| 38 | #include "devices.h" | 46 | #include "devices.h" |
| 39 | 47 | ||
| 40 | /*! | 48 | /*! |
| @@ -94,13 +102,16 @@ static struct imxuart_platform_data uart_pdata = { | |||
| 94 | .flags = IMXUART_HAVE_RTSCTS, | 102 | .flags = IMXUART_HAVE_RTSCTS, |
| 95 | }; | 103 | }; |
| 96 | 104 | ||
| 105 | static int uart_pins[] = { | ||
| 106 | MX31_PIN_CTS1__CTS1, | ||
| 107 | MX31_PIN_RTS1__RTS1, | ||
| 108 | MX31_PIN_TXD1__TXD1, | ||
| 109 | MX31_PIN_RXD1__RXD1 | ||
| 110 | }; | ||
| 111 | |||
| 97 | static inline void mxc_init_imx_uart(void) | 112 | static inline void mxc_init_imx_uart(void) |
| 98 | { | 113 | { |
| 99 | mxc_iomux_mode(MX31_PIN_CTS1__CTS1); | 114 | mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), "uart-0"); |
| 100 | mxc_iomux_mode(MX31_PIN_RTS1__RTS1); | ||
| 101 | mxc_iomux_mode(MX31_PIN_TXD1__TXD1); | ||
| 102 | mxc_iomux_mode(MX31_PIN_RXD1__RXD1); | ||
| 103 | |||
| 104 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 115 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
| 105 | } | 116 | } |
| 106 | #else /* !SERIAL_IMX */ | 117 | #else /* !SERIAL_IMX */ |
| @@ -176,7 +187,7 @@ static void __init mx31ads_init_expio(void) | |||
| 176 | /* | 187 | /* |
| 177 | * Configure INT line as GPIO input | 188 | * Configure INT line as GPIO input |
| 178 | */ | 189 | */ |
| 179 | mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO)); | 190 | mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO), "expio"); |
| 180 | 191 | ||
| 181 | /* disable the interrupt and clear the status */ | 192 | /* disable the interrupt and clear the status */ |
| 182 | __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG); | 193 | __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG); |
| @@ -191,26 +202,301 @@ static void __init mx31ads_init_expio(void) | |||
| 191 | set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler); | 202 | set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler); |
| 192 | } | 203 | } |
| 193 | 204 | ||
| 205 | #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 | ||
| 206 | /* This section defines setup for the Wolfson Microelectronics | ||
| 207 | * 1133-EV1 PMU/audio board. When other PMU boards are supported the | ||
| 208 | * regulator definitions may be shared with them, but for now they can | ||
| 209 | * only be used with this board so would generate warnings about | ||
| 210 | * unused statics and some of the configuration is specific to this | ||
| 211 | * module. | ||
| 212 | */ | ||
| 213 | |||
| 214 | /* CPU */ | ||
| 215 | static struct regulator_consumer_supply sw1a_consumers[] = { | ||
| 216 | { | ||
| 217 | .supply = "cpu_vcc", | ||
| 218 | } | ||
| 219 | }; | ||
| 220 | |||
| 221 | static struct regulator_init_data sw1a_data = { | ||
| 222 | .constraints = { | ||
| 223 | .name = "SW1A", | ||
| 224 | .min_uV = 1275000, | ||
| 225 | .max_uV = 1600000, | ||
| 226 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
| 227 | REGULATOR_CHANGE_MODE, | ||
| 228 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | ||
| 229 | REGULATOR_MODE_FAST, | ||
| 230 | .state_mem = { | ||
| 231 | .uV = 1400000, | ||
| 232 | .mode = REGULATOR_MODE_NORMAL, | ||
| 233 | .enabled = 1, | ||
| 234 | }, | ||
| 235 | .initial_state = PM_SUSPEND_MEM, | ||
| 236 | .always_on = 1, | ||
| 237 | .boot_on = 1, | ||
| 238 | }, | ||
| 239 | .num_consumer_supplies = ARRAY_SIZE(sw1a_consumers), | ||
| 240 | .consumer_supplies = sw1a_consumers, | ||
| 241 | }; | ||
| 242 | |||
| 243 | /* System IO - High */ | ||
| 244 | static struct regulator_init_data viohi_data = { | ||
| 245 | .constraints = { | ||
| 246 | .name = "VIOHO", | ||
| 247 | .min_uV = 2800000, | ||
| 248 | .max_uV = 2800000, | ||
| 249 | .state_mem = { | ||
| 250 | .uV = 2800000, | ||
| 251 | .mode = REGULATOR_MODE_NORMAL, | ||
| 252 | .enabled = 1, | ||
| 253 | }, | ||
| 254 | .initial_state = PM_SUSPEND_MEM, | ||
| 255 | .always_on = 1, | ||
| 256 | .boot_on = 1, | ||
| 257 | }, | ||
| 258 | }; | ||
| 259 | |||
| 260 | /* System IO - Low */ | ||
| 261 | static struct regulator_init_data violo_data = { | ||
| 262 | .constraints = { | ||
| 263 | .name = "VIOLO", | ||
| 264 | .min_uV = 1800000, | ||
| 265 | .max_uV = 1800000, | ||
| 266 | .state_mem = { | ||
| 267 | .uV = 1800000, | ||
| 268 | .mode = REGULATOR_MODE_NORMAL, | ||
| 269 | .enabled = 1, | ||
| 270 | }, | ||
| 271 | .initial_state = PM_SUSPEND_MEM, | ||
| 272 | .always_on = 1, | ||
| 273 | .boot_on = 1, | ||
| 274 | }, | ||
| 275 | }; | ||
| 276 | |||
| 277 | /* DDR RAM */ | ||
| 278 | static struct regulator_init_data sw2a_data = { | ||
| 279 | .constraints = { | ||
| 280 | .name = "SW2A", | ||
| 281 | .min_uV = 1800000, | ||
| 282 | .max_uV = 1800000, | ||
| 283 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 284 | .state_mem = { | ||
| 285 | .uV = 1800000, | ||
| 286 | .mode = REGULATOR_MODE_NORMAL, | ||
| 287 | .enabled = 1, | ||
| 288 | }, | ||
| 289 | .state_disk = { | ||
| 290 | .mode = REGULATOR_MODE_NORMAL, | ||
| 291 | .enabled = 0, | ||
| 292 | }, | ||
| 293 | .always_on = 1, | ||
| 294 | .boot_on = 1, | ||
| 295 | .initial_state = PM_SUSPEND_MEM, | ||
| 296 | }, | ||
| 297 | }; | ||
| 298 | |||
| 299 | static struct regulator_init_data ldo1_data = { | ||
| 300 | .constraints = { | ||
| 301 | .name = "VCAM/VMMC1/VMMC2", | ||
| 302 | .min_uV = 2800000, | ||
| 303 | .max_uV = 2800000, | ||
| 304 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 305 | .apply_uV = 1, | ||
| 306 | }, | ||
| 307 | }; | ||
| 308 | |||
| 309 | static struct regulator_consumer_supply ldo2_consumers[] = { | ||
| 310 | { | ||
| 311 | .supply = "AVDD", | ||
| 312 | }, | ||
| 313 | { | ||
| 314 | .supply = "HPVDD", | ||
| 315 | }, | ||
| 316 | }; | ||
| 317 | |||
| 318 | /* CODEC and SIM */ | ||
| 319 | static struct regulator_init_data ldo2_data = { | ||
| 320 | .constraints = { | ||
| 321 | .name = "VESIM/VSIM/AVDD", | ||
| 322 | .min_uV = 3300000, | ||
| 323 | .max_uV = 3300000, | ||
| 324 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 325 | .apply_uV = 1, | ||
| 326 | }, | ||
| 327 | .num_consumer_supplies = ARRAY_SIZE(ldo2_consumers), | ||
| 328 | .consumer_supplies = ldo2_consumers, | ||
| 329 | }; | ||
| 330 | |||
| 331 | /* General */ | ||
| 332 | static struct regulator_init_data vdig_data = { | ||
| 333 | .constraints = { | ||
| 334 | .name = "VDIG", | ||
| 335 | .min_uV = 1500000, | ||
| 336 | .max_uV = 1500000, | ||
| 337 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 338 | .apply_uV = 1, | ||
| 339 | .always_on = 1, | ||
| 340 | .boot_on = 1, | ||
| 341 | }, | ||
| 342 | }; | ||
| 343 | |||
| 344 | /* Tranceivers */ | ||
| 345 | static struct regulator_init_data ldo4_data = { | ||
| 346 | .constraints = { | ||
| 347 | .name = "VRF1/CVDD_2.775", | ||
| 348 | .min_uV = 2500000, | ||
| 349 | .max_uV = 2500000, | ||
| 350 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 351 | .apply_uV = 1, | ||
| 352 | .always_on = 1, | ||
| 353 | .boot_on = 1, | ||
| 354 | }, | ||
| 355 | }; | ||
| 356 | |||
| 357 | static struct wm8350_led_platform_data wm8350_led_data = { | ||
| 358 | .name = "wm8350:white", | ||
| 359 | .default_trigger = "heartbeat", | ||
| 360 | .max_uA = 27899, | ||
| 361 | }; | ||
| 362 | |||
| 363 | static struct wm8350_audio_platform_data imx32ads_wm8350_setup = { | ||
| 364 | .vmid_discharge_msecs = 1000, | ||
| 365 | .drain_msecs = 30, | ||
| 366 | .cap_discharge_msecs = 700, | ||
| 367 | .vmid_charge_msecs = 700, | ||
| 368 | .vmid_s_curve = WM8350_S_CURVE_SLOW, | ||
| 369 | .dis_out4 = WM8350_DISCHARGE_SLOW, | ||
| 370 | .dis_out3 = WM8350_DISCHARGE_SLOW, | ||
| 371 | .dis_out2 = WM8350_DISCHARGE_SLOW, | ||
| 372 | .dis_out1 = WM8350_DISCHARGE_SLOW, | ||
| 373 | .vroi_out4 = WM8350_TIE_OFF_500R, | ||
| 374 | .vroi_out3 = WM8350_TIE_OFF_500R, | ||
| 375 | .vroi_out2 = WM8350_TIE_OFF_500R, | ||
| 376 | .vroi_out1 = WM8350_TIE_OFF_500R, | ||
| 377 | .vroi_enable = 0, | ||
| 378 | .codec_current_on = WM8350_CODEC_ISEL_1_0, | ||
| 379 | .codec_current_standby = WM8350_CODEC_ISEL_0_5, | ||
| 380 | .codec_current_charge = WM8350_CODEC_ISEL_1_5, | ||
| 381 | }; | ||
| 382 | |||
| 383 | static int mx31_wm8350_init(struct wm8350 *wm8350) | ||
| 384 | { | ||
| 385 | int i; | ||
| 386 | |||
| 387 | wm8350_gpio_config(wm8350, 0, WM8350_GPIO_DIR_IN, | ||
| 388 | WM8350_GPIO0_PWR_ON_IN, WM8350_GPIO_ACTIVE_LOW, | ||
| 389 | WM8350_GPIO_PULL_UP, WM8350_GPIO_INVERT_OFF, | ||
| 390 | WM8350_GPIO_DEBOUNCE_ON); | ||
| 391 | |||
| 392 | wm8350_gpio_config(wm8350, 3, WM8350_GPIO_DIR_IN, | ||
| 393 | WM8350_GPIO3_PWR_OFF_IN, WM8350_GPIO_ACTIVE_HIGH, | ||
| 394 | WM8350_GPIO_PULL_DOWN, WM8350_GPIO_INVERT_OFF, | ||
| 395 | WM8350_GPIO_DEBOUNCE_ON); | ||
| 396 | |||
| 397 | wm8350_gpio_config(wm8350, 4, WM8350_GPIO_DIR_IN, | ||
| 398 | WM8350_GPIO4_MR_IN, WM8350_GPIO_ACTIVE_HIGH, | ||
| 399 | WM8350_GPIO_PULL_DOWN, WM8350_GPIO_INVERT_OFF, | ||
| 400 | WM8350_GPIO_DEBOUNCE_OFF); | ||
| 401 | |||
| 402 | wm8350_gpio_config(wm8350, 7, WM8350_GPIO_DIR_IN, | ||
| 403 | WM8350_GPIO7_HIBERNATE_IN, WM8350_GPIO_ACTIVE_HIGH, | ||
| 404 | WM8350_GPIO_PULL_DOWN, WM8350_GPIO_INVERT_OFF, | ||
| 405 | WM8350_GPIO_DEBOUNCE_OFF); | ||
| 406 | |||
| 407 | wm8350_gpio_config(wm8350, 6, WM8350_GPIO_DIR_OUT, | ||
| 408 | WM8350_GPIO6_SDOUT_OUT, WM8350_GPIO_ACTIVE_HIGH, | ||
| 409 | WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF, | ||
| 410 | WM8350_GPIO_DEBOUNCE_OFF); | ||
| 411 | |||
| 412 | wm8350_gpio_config(wm8350, 8, WM8350_GPIO_DIR_OUT, | ||
| 413 | WM8350_GPIO8_VCC_FAULT_OUT, WM8350_GPIO_ACTIVE_LOW, | ||
| 414 | WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF, | ||
| 415 | WM8350_GPIO_DEBOUNCE_OFF); | ||
| 416 | |||
| 417 | wm8350_gpio_config(wm8350, 9, WM8350_GPIO_DIR_OUT, | ||
| 418 | WM8350_GPIO9_BATT_FAULT_OUT, WM8350_GPIO_ACTIVE_LOW, | ||
| 419 | WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF, | ||
| 420 | WM8350_GPIO_DEBOUNCE_OFF); | ||
| 421 | |||
| 422 | /* Fix up for our own supplies. */ | ||
| 423 | for (i = 0; i < ARRAY_SIZE(ldo2_consumers); i++) | ||
| 424 | ldo2_consumers[i].dev = wm8350->dev; | ||
| 425 | |||
| 426 | wm8350_register_regulator(wm8350, WM8350_DCDC_1, &sw1a_data); | ||
| 427 | wm8350_register_regulator(wm8350, WM8350_DCDC_3, &viohi_data); | ||
| 428 | wm8350_register_regulator(wm8350, WM8350_DCDC_4, &violo_data); | ||
| 429 | wm8350_register_regulator(wm8350, WM8350_DCDC_6, &sw2a_data); | ||
| 430 | wm8350_register_regulator(wm8350, WM8350_LDO_1, &ldo1_data); | ||
| 431 | wm8350_register_regulator(wm8350, WM8350_LDO_2, &ldo2_data); | ||
| 432 | wm8350_register_regulator(wm8350, WM8350_LDO_3, &vdig_data); | ||
| 433 | wm8350_register_regulator(wm8350, WM8350_LDO_4, &ldo4_data); | ||
| 434 | |||
| 435 | /* LEDs */ | ||
| 436 | wm8350_dcdc_set_slot(wm8350, WM8350_DCDC_5, 1, 1, | ||
| 437 | WM8350_DC5_ERRACT_SHUTDOWN_CONV); | ||
| 438 | wm8350_isink_set_flash(wm8350, WM8350_ISINK_A, | ||
| 439 | WM8350_ISINK_FLASH_DISABLE, | ||
| 440 | WM8350_ISINK_FLASH_TRIG_BIT, | ||
| 441 | WM8350_ISINK_FLASH_DUR_32MS, | ||
| 442 | WM8350_ISINK_FLASH_ON_INSTANT, | ||
| 443 | WM8350_ISINK_FLASH_OFF_INSTANT, | ||
| 444 | WM8350_ISINK_FLASH_MODE_EN); | ||
| 445 | wm8350_dcdc25_set_mode(wm8350, WM8350_DCDC_5, | ||
| 446 | WM8350_ISINK_MODE_BOOST, | ||
| 447 | WM8350_ISINK_ILIM_NORMAL, | ||
| 448 | WM8350_DC5_RMP_20V, | ||
| 449 | WM8350_DC5_FBSRC_ISINKA); | ||
| 450 | wm8350_register_led(wm8350, 0, WM8350_DCDC_5, WM8350_ISINK_A, | ||
| 451 | &wm8350_led_data); | ||
| 452 | |||
| 453 | wm8350->codec.platform_data = &imx32ads_wm8350_setup; | ||
| 454 | |||
| 455 | return 0; | ||
| 456 | } | ||
| 457 | |||
| 458 | static struct wm8350_platform_data __initdata mx31_wm8350_pdata = { | ||
| 459 | .init = mx31_wm8350_init, | ||
| 460 | }; | ||
| 461 | #endif | ||
| 462 | |||
| 463 | #if defined(CONFIG_I2C_IMX) || defined(CONFIG_I2C_IMX_MODULE) | ||
| 464 | static struct i2c_board_info __initdata mx31ads_i2c1_devices[] = { | ||
| 465 | #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 | ||
| 466 | { | ||
| 467 | I2C_BOARD_INFO("wm8350", 0x1a), | ||
| 468 | .platform_data = &mx31_wm8350_pdata, | ||
| 469 | .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), | ||
| 470 | }, | ||
| 471 | #endif | ||
| 472 | }; | ||
| 473 | |||
| 474 | static void mxc_init_i2c(void) | ||
| 475 | { | ||
| 476 | i2c_register_board_info(1, mx31ads_i2c1_devices, | ||
| 477 | ARRAY_SIZE(mx31ads_i2c1_devices)); | ||
| 478 | |||
| 479 | mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MOSI, IOMUX_CONFIG_ALT1)); | ||
| 480 | mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MISO, IOMUX_CONFIG_ALT1)); | ||
| 481 | |||
| 482 | mxc_register_device(&mxc_i2c_device1, NULL); | ||
| 483 | } | ||
| 484 | #else | ||
| 485 | static void mxc_init_i2c(void) | ||
| 486 | { | ||
| 487 | } | ||
| 488 | #endif | ||
| 489 | |||
| 194 | /*! | 490 | /*! |
| 195 | * This structure defines static mappings for the i.MX31ADS board. | 491 | * This structure defines static mappings for the i.MX31ADS board. |
| 196 | */ | 492 | */ |
| 197 | static struct map_desc mx31ads_io_desc[] __initdata = { | 493 | static struct map_desc mx31ads_io_desc[] __initdata = { |
| 198 | { | 494 | { |
| 199 | .virtual = AIPS1_BASE_ADDR_VIRT, | ||
| 200 | .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), | ||
| 201 | .length = AIPS1_SIZE, | ||
| 202 | .type = MT_DEVICE_NONSHARED | ||
| 203 | }, { | ||
| 204 | .virtual = SPBA0_BASE_ADDR_VIRT, | 495 | .virtual = SPBA0_BASE_ADDR_VIRT, |
| 205 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | 496 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), |
| 206 | .length = SPBA0_SIZE, | 497 | .length = SPBA0_SIZE, |
| 207 | .type = MT_DEVICE_NONSHARED | 498 | .type = MT_DEVICE_NONSHARED |
| 208 | }, { | 499 | }, { |
| 209 | .virtual = AIPS2_BASE_ADDR_VIRT, | ||
| 210 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), | ||
| 211 | .length = AIPS2_SIZE, | ||
| 212 | .type = MT_DEVICE_NONSHARED | ||
| 213 | }, { | ||
| 214 | .virtual = CS4_BASE_ADDR_VIRT, | 500 | .virtual = CS4_BASE_ADDR_VIRT, |
| 215 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), | 501 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), |
| 216 | .length = CS4_SIZE / 2, | 502 | .length = CS4_SIZE / 2, |
| @@ -221,13 +507,13 @@ static struct map_desc mx31ads_io_desc[] __initdata = { | |||
| 221 | /*! | 507 | /*! |
| 222 | * Set up static virtual mappings. | 508 | * Set up static virtual mappings. |
| 223 | */ | 509 | */ |
| 224 | void __init mx31ads_map_io(void) | 510 | static void __init mx31ads_map_io(void) |
| 225 | { | 511 | { |
| 226 | mxc_map_io(); | 512 | mxc_map_io(); |
| 227 | iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc)); | 513 | iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc)); |
| 228 | } | 514 | } |
| 229 | 515 | ||
| 230 | void __init mx31ads_init_irq(void) | 516 | static void __init mx31ads_init_irq(void) |
| 231 | { | 517 | { |
| 232 | mxc_init_irq(); | 518 | mxc_init_irq(); |
| 233 | mx31ads_init_expio(); | 519 | mx31ads_init_expio(); |
| @@ -240,15 +526,15 @@ static void __init mxc_board_init(void) | |||
| 240 | { | 526 | { |
| 241 | mxc_init_extuart(); | 527 | mxc_init_extuart(); |
| 242 | mxc_init_imx_uart(); | 528 | mxc_init_imx_uart(); |
| 529 | mxc_init_i2c(); | ||
| 243 | } | 530 | } |
| 244 | 531 | ||
| 245 | static void __init mx31ads_timer_init(void) | 532 | static void __init mx31ads_timer_init(void) |
| 246 | { | 533 | { |
| 247 | mxc_clocks_init(26000000); | 534 | mx31_clocks_init(26000000); |
| 248 | mxc_timer_init("ipg_clk.0"); | ||
| 249 | } | 535 | } |
| 250 | 536 | ||
| 251 | struct sys_timer mx31ads_timer = { | 537 | static struct sys_timer mx31ads_timer = { |
| 252 | .init = mx31ads_timer_init, | 538 | .init = mx31ads_timer_init, |
| 253 | }; | 539 | }; |
| 254 | 540 | ||
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c index c43440070143..894d98cd9941 100644 --- a/arch/arm/mach-mx3/mx31lite.c +++ b/arch/arm/mach-mx3/mx31lite.c | |||
| @@ -42,21 +42,11 @@ | |||
| 42 | */ | 42 | */ |
| 43 | static struct map_desc mx31lite_io_desc[] __initdata = { | 43 | static struct map_desc mx31lite_io_desc[] __initdata = { |
| 44 | { | 44 | { |
| 45 | .virtual = AIPS1_BASE_ADDR_VIRT, | ||
| 46 | .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), | ||
| 47 | .length = AIPS1_SIZE, | ||
| 48 | .type = MT_DEVICE_NONSHARED | ||
| 49 | }, { | ||
| 50 | .virtual = SPBA0_BASE_ADDR_VIRT, | 45 | .virtual = SPBA0_BASE_ADDR_VIRT, |
| 51 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | 46 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), |
| 52 | .length = SPBA0_SIZE, | 47 | .length = SPBA0_SIZE, |
| 53 | .type = MT_DEVICE_NONSHARED | 48 | .type = MT_DEVICE_NONSHARED |
| 54 | }, { | 49 | }, { |
| 55 | .virtual = AIPS2_BASE_ADDR_VIRT, | ||
| 56 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), | ||
| 57 | .length = AIPS2_SIZE, | ||
| 58 | .type = MT_DEVICE_NONSHARED | ||
| 59 | }, { | ||
| 60 | .virtual = CS4_BASE_ADDR_VIRT, | 50 | .virtual = CS4_BASE_ADDR_VIRT, |
| 61 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), | 51 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), |
| 62 | .length = CS4_SIZE, | 52 | .length = CS4_SIZE, |
| @@ -82,8 +72,7 @@ static void __init mxc_board_init(void) | |||
| 82 | 72 | ||
| 83 | static void __init mx31lite_timer_init(void) | 73 | static void __init mx31lite_timer_init(void) |
| 84 | { | 74 | { |
| 85 | mxc_clocks_init(26000000); | 75 | mx31_clocks_init(26000000); |
| 86 | mxc_timer_init("ipg_clk.0"); | ||
| 87 | } | 76 | } |
| 88 | 77 | ||
| 89 | struct sys_timer mx31lite_timer = { | 78 | struct sys_timer mx31lite_timer = { |
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c new file mode 100644 index 000000000000..d080b4add79c --- /dev/null +++ b/arch/arm/mach-mx3/mx31moboard-devboard.c | |||
| @@ -0,0 +1,48 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, write to the Free Software | ||
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 17 | */ | ||
| 18 | |||
| 19 | #include <linux/types.h> | ||
| 20 | #include <linux/init.h> | ||
| 21 | |||
| 22 | #include <linux/platform_device.h> | ||
| 23 | |||
| 24 | #include <mach/hardware.h> | ||
| 25 | #include <mach/common.h> | ||
| 26 | #include <mach/imx-uart.h> | ||
| 27 | #include <mach/iomux-mx3.h> | ||
| 28 | |||
| 29 | #include "devices.h" | ||
| 30 | |||
| 31 | static struct imxuart_platform_data uart_pdata = { | ||
| 32 | .flags = IMXUART_HAVE_RTSCTS, | ||
| 33 | }; | ||
| 34 | |||
| 35 | static int mxc_uart1_pins[] = { | ||
| 36 | MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2, | ||
| 37 | MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2, | ||
| 38 | }; | ||
| 39 | |||
| 40 | /* | ||
| 41 | * system init for baseboard usage. Will be called by mx31moboard init. | ||
| 42 | */ | ||
| 43 | void __init mx31moboard_devboard_init(void) | ||
| 44 | { | ||
| 45 | printk(KERN_INFO "Initializing mx31devboard peripherals\n"); | ||
| 46 | mxc_iomux_setup_multiple_pins(mxc_uart1_pins, ARRAY_SIZE(mxc_uart1_pins), "uart1"); | ||
| 47 | mxc_register_device(&mxc_uart_device1, &uart_pdata); | ||
| 48 | } | ||
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c new file mode 100644 index 000000000000..9ef9566823fb --- /dev/null +++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c | |||
| @@ -0,0 +1,37 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, write to the Free Software | ||
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 17 | */ | ||
| 18 | |||
| 19 | #include <linux/types.h> | ||
| 20 | #include <linux/init.h> | ||
| 21 | |||
| 22 | #include <linux/platform_device.h> | ||
| 23 | |||
| 24 | #include <mach/hardware.h> | ||
| 25 | #include <mach/common.h> | ||
| 26 | #include <mach/imx-uart.h> | ||
| 27 | #include <mach/iomux-mx3.h> | ||
| 28 | |||
| 29 | #include "devices.h" | ||
| 30 | |||
| 31 | /* | ||
| 32 | * system init for baseboard usage. Will be called by mx31moboard init. | ||
| 33 | */ | ||
| 34 | void __init mx31moboard_marxbot_init(void) | ||
| 35 | { | ||
| 36 | printk(KERN_INFO "Initializing mx31marxbot peripherals\n"); | ||
| 37 | } | ||
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mx31moboard.c index c29098af7394..34c2a1b99d4f 100644 --- a/arch/arm/mach-mx3/mx31moboard.c +++ b/arch/arm/mach-mx3/mx31moboard.c | |||
| @@ -32,6 +32,7 @@ | |||
| 32 | #include <mach/common.h> | 32 | #include <mach/common.h> |
| 33 | #include <mach/imx-uart.h> | 33 | #include <mach/imx-uart.h> |
| 34 | #include <mach/iomux-mx3.h> | 34 | #include <mach/iomux-mx3.h> |
| 35 | #include <mach/board-mx31moboard.h> | ||
| 35 | 36 | ||
| 36 | #include "devices.h" | 37 | #include "devices.h" |
| 37 | 38 | ||
| @@ -63,6 +64,18 @@ static struct platform_device *devices[] __initdata = { | |||
| 63 | &mx31moboard_flash, | 64 | &mx31moboard_flash, |
| 64 | }; | 65 | }; |
| 65 | 66 | ||
| 67 | static int mxc_uart0_pins[] = { | ||
| 68 | MX31_PIN_CTS1__CTS1, MX31_PIN_RTS1__RTS1, | ||
| 69 | MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1, | ||
| 70 | }; | ||
| 71 | static int mxc_uart4_pins[] = { | ||
| 72 | MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, | ||
| 73 | MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, | ||
| 74 | }; | ||
| 75 | |||
| 76 | static int mx31moboard_baseboard; | ||
| 77 | core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); | ||
| 78 | |||
| 66 | /* | 79 | /* |
| 67 | * Board specific initialization. | 80 | * Board specific initialization. |
| 68 | */ | 81 | */ |
| @@ -70,58 +83,29 @@ static void __init mxc_board_init(void) | |||
| 70 | { | 83 | { |
| 71 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 84 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 72 | 85 | ||
| 73 | mxc_iomux_mode(MX31_PIN_CTS1__CTS1); | 86 | mxc_iomux_setup_multiple_pins(mxc_uart0_pins, ARRAY_SIZE(mxc_uart0_pins), "uart0"); |
| 74 | mxc_iomux_mode(MX31_PIN_RTS1__RTS1); | ||
| 75 | mxc_iomux_mode(MX31_PIN_TXD1__TXD1); | ||
| 76 | mxc_iomux_mode(MX31_PIN_RXD1__RXD1); | ||
| 77 | |||
| 78 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 87 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
| 79 | 88 | ||
| 80 | mxc_iomux_mode(MX31_PIN_CTS2__CTS2); | 89 | mxc_iomux_setup_multiple_pins(mxc_uart4_pins, ARRAY_SIZE(mxc_uart4_pins), "uart4"); |
| 81 | mxc_iomux_mode(MX31_PIN_RTS2__RTS2); | ||
| 82 | mxc_iomux_mode(MX31_PIN_TXD2__TXD2); | ||
| 83 | mxc_iomux_mode(MX31_PIN_RXD2__RXD2); | ||
| 84 | |||
| 85 | mxc_register_device(&mxc_uart_device1, &uart_pdata); | ||
| 86 | |||
| 87 | mxc_iomux_mode(MX31_PIN_PC_RST__CTS5); | ||
| 88 | mxc_iomux_mode(MX31_PIN_PC_VS2__RTS5); | ||
| 89 | mxc_iomux_mode(MX31_PIN_PC_BVD2__TXD5); | ||
| 90 | mxc_iomux_mode(MX31_PIN_PC_BVD1__RXD5); | ||
| 91 | |||
| 92 | mxc_register_device(&mxc_uart_device4, &uart_pdata); | 90 | mxc_register_device(&mxc_uart_device4, &uart_pdata); |
| 93 | } | ||
| 94 | 91 | ||
| 95 | /* | 92 | switch (mx31moboard_baseboard) { |
| 96 | * This structure defines static mappings for the mx31moboard. | 93 | case MX31NOBOARD: |
| 97 | */ | 94 | break; |
| 98 | static struct map_desc mx31moboard_io_desc[] __initdata = { | 95 | case MX31DEVBOARD: |
| 99 | { | 96 | mx31moboard_devboard_init(); |
| 100 | .virtual = AIPS1_BASE_ADDR_VIRT, | 97 | break; |
| 101 | .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), | 98 | case MX31MARXBOT: |
| 102 | .length = AIPS1_SIZE, | 99 | mx31moboard_marxbot_init(); |
| 103 | .type = MT_DEVICE_NONSHARED | 100 | break; |
| 104 | }, { | 101 | default: |
| 105 | .virtual = AIPS2_BASE_ADDR_VIRT, | 102 | printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", mx31moboard_baseboard); |
| 106 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), | 103 | } |
| 107 | .length = AIPS2_SIZE, | ||
| 108 | .type = MT_DEVICE_NONSHARED | ||
| 109 | }, | ||
| 110 | }; | ||
| 111 | |||
| 112 | /* | ||
| 113 | * Set up static virtual mappings. | ||
| 114 | */ | ||
| 115 | void __init mx31moboard_map_io(void) | ||
| 116 | { | ||
| 117 | mxc_map_io(); | ||
| 118 | iotable_init(mx31moboard_io_desc, ARRAY_SIZE(mx31moboard_io_desc)); | ||
| 119 | } | 104 | } |
| 120 | 105 | ||
| 121 | static void __init mx31moboard_timer_init(void) | 106 | static void __init mx31moboard_timer_init(void) |
| 122 | { | 107 | { |
| 123 | mxc_clocks_init(26000000); | 108 | mx31_clocks_init(26000000); |
| 124 | mxc_timer_init("ipg_clk.0"); | ||
| 125 | } | 109 | } |
| 126 | 110 | ||
| 127 | struct sys_timer mx31moboard_timer = { | 111 | struct sys_timer mx31moboard_timer = { |
| @@ -133,7 +117,7 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") | |||
| 133 | .phys_io = AIPS1_BASE_ADDR, | 117 | .phys_io = AIPS1_BASE_ADDR, |
| 134 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 118 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
| 135 | .boot_params = PHYS_OFFSET + 0x100, | 119 | .boot_params = PHYS_OFFSET + 0x100, |
| 136 | .map_io = mx31moboard_map_io, | 120 | .map_io = mxc_map_io, |
| 137 | .init_irq = mxc_init_irq, | 121 | .init_irq = mxc_init_irq, |
| 138 | .init_machine = mxc_board_init, | 122 | .init_machine = mxc_board_init, |
| 139 | .timer = &mx31moboard_timer, | 123 | .timer = &mx31moboard_timer, |
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mx31pdk.c index d464d068a4a6..bc63f1785691 100644 --- a/arch/arm/mach-mx3/mx31pdk.c +++ b/arch/arm/mach-mx3/mx31pdk.c | |||
| @@ -45,40 +45,17 @@ static struct imxuart_platform_data uart_pdata = { | |||
| 45 | .flags = IMXUART_HAVE_RTSCTS, | 45 | .flags = IMXUART_HAVE_RTSCTS, |
| 46 | }; | 46 | }; |
| 47 | 47 | ||
| 48 | static inline void mxc_init_imx_uart(void) | 48 | static int uart_pins[] = { |
| 49 | { | 49 | MX31_PIN_CTS1__CTS1, |
| 50 | mxc_iomux_mode(MX31_PIN_CTS1__CTS1); | 50 | MX31_PIN_RTS1__RTS1, |
| 51 | mxc_iomux_mode(MX31_PIN_RTS1__RTS1); | 51 | MX31_PIN_TXD1__TXD1, |
| 52 | mxc_iomux_mode(MX31_PIN_TXD1__TXD1); | 52 | MX31_PIN_RXD1__RXD1 |
| 53 | mxc_iomux_mode(MX31_PIN_RXD1__RXD1); | ||
| 54 | |||
| 55 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | ||
| 56 | } | ||
| 57 | |||
| 58 | /*! | ||
| 59 | * This structure defines static mappings for the i.MX31PDK board. | ||
| 60 | */ | ||
| 61 | static struct map_desc mx31pdk_io_desc[] __initdata = { | ||
| 62 | { | ||
| 63 | .virtual = AIPS1_BASE_ADDR_VIRT, | ||
| 64 | .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), | ||
| 65 | .length = AIPS1_SIZE, | ||
| 66 | .type = MT_DEVICE_NONSHARED | ||
| 67 | }, { | ||
| 68 | .virtual = AIPS2_BASE_ADDR_VIRT, | ||
| 69 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), | ||
| 70 | .length = AIPS2_SIZE, | ||
| 71 | .type = MT_DEVICE_NONSHARED | ||
| 72 | }, | ||
| 73 | }; | 53 | }; |
| 74 | 54 | ||
| 75 | /*! | 55 | static inline void mxc_init_imx_uart(void) |
| 76 | * Set up static virtual mappings. | ||
| 77 | */ | ||
| 78 | static void __init mx31pdk_map_io(void) | ||
| 79 | { | 56 | { |
| 80 | mxc_map_io(); | 57 | mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), "uart-0"); |
| 81 | iotable_init(mx31pdk_io_desc, ARRAY_SIZE(mx31pdk_io_desc)); | 58 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
| 82 | } | 59 | } |
| 83 | 60 | ||
| 84 | /*! | 61 | /*! |
| @@ -91,8 +68,7 @@ static void __init mxc_board_init(void) | |||
| 91 | 68 | ||
| 92 | static void __init mx31pdk_timer_init(void) | 69 | static void __init mx31pdk_timer_init(void) |
| 93 | { | 70 | { |
| 94 | mxc_clocks_init(26000000); | 71 | mx31_clocks_init(26000000); |
| 95 | mxc_timer_init("ipg_clk.0"); | ||
| 96 | } | 72 | } |
| 97 | 73 | ||
| 98 | static struct sys_timer mx31pdk_timer = { | 74 | static struct sys_timer mx31pdk_timer = { |
| @@ -108,7 +84,7 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") | |||
| 108 | .phys_io = AIPS1_BASE_ADDR, | 84 | .phys_io = AIPS1_BASE_ADDR, |
| 109 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 85 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
| 110 | .boot_params = PHYS_OFFSET + 0x100, | 86 | .boot_params = PHYS_OFFSET + 0x100, |
| 111 | .map_io = mx31pdk_map_io, | 87 | .map_io = mxc_map_io, |
| 112 | .init_irq = mxc_init_irq, | 88 | .init_irq = mxc_init_irq, |
| 113 | .init_machine = mxc_board_init, | 89 | .init_machine = mxc_board_init, |
| 114 | .timer = &mx31pdk_timer, | 90 | .timer = &mx31pdk_timer, |
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c index 8cea82587222..5fce022114de 100644 --- a/arch/arm/mach-mx3/pcm037.c +++ b/arch/arm/mach-mx3/pcm037.c | |||
| @@ -26,6 +26,8 @@ | |||
| 26 | #include <linux/gpio.h> | 26 | #include <linux/gpio.h> |
| 27 | #include <linux/smc911x.h> | 27 | #include <linux/smc911x.h> |
| 28 | #include <linux/interrupt.h> | 28 | #include <linux/interrupt.h> |
| 29 | #include <linux/i2c.h> | ||
| 30 | #include <linux/i2c/at24.h> | ||
| 29 | 31 | ||
| 30 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
| 31 | #include <asm/mach-types.h> | 33 | #include <asm/mach-types.h> |
| @@ -37,6 +39,10 @@ | |||
| 37 | #include <mach/iomux-mx3.h> | 39 | #include <mach/iomux-mx3.h> |
| 38 | #include <mach/board-pcm037.h> | 40 | #include <mach/board-pcm037.h> |
| 39 | #include <mach/mxc_nand.h> | 41 | #include <mach/mxc_nand.h> |
| 42 | #include <mach/mmc.h> | ||
| 43 | #ifdef CONFIG_I2C_IMX | ||
| 44 | #include <mach/i2c.h> | ||
| 45 | #endif | ||
| 40 | 46 | ||
| 41 | #include "devices.h" | 47 | #include "devices.h" |
| 42 | 48 | ||
| @@ -117,12 +123,90 @@ static struct mxc_nand_platform_data pcm037_nand_board_info = { | |||
| 117 | .hw_ecc = 1, | 123 | .hw_ecc = 1, |
| 118 | }; | 124 | }; |
| 119 | 125 | ||
| 126 | #ifdef CONFIG_I2C_IMX | ||
| 127 | static int i2c_1_pins[] = { | ||
| 128 | MX31_PIN_CSPI2_MOSI__SCL, | ||
| 129 | MX31_PIN_CSPI2_MISO__SDA, | ||
| 130 | }; | ||
| 131 | |||
| 132 | static int pcm037_i2c_1_init(struct device *dev) | ||
| 133 | { | ||
| 134 | return mxc_iomux_setup_multiple_pins(i2c_1_pins, ARRAY_SIZE(i2c_1_pins), | ||
| 135 | "i2c-1"); | ||
| 136 | } | ||
| 137 | |||
| 138 | static void pcm037_i2c_1_exit(struct device *dev) | ||
| 139 | { | ||
| 140 | mxc_iomux_release_multiple_pins(i2c_1_pins, ARRAY_SIZE(i2c_1_pins)); | ||
| 141 | } | ||
| 142 | |||
| 143 | static struct imxi2c_platform_data pcm037_i2c_1_data = { | ||
| 144 | .bitrate = 100000, | ||
| 145 | .init = pcm037_i2c_1_init, | ||
| 146 | .exit = pcm037_i2c_1_exit, | ||
| 147 | }; | ||
| 148 | |||
| 149 | static struct at24_platform_data board_eeprom = { | ||
| 150 | .byte_len = 4096, | ||
| 151 | .page_size = 32, | ||
| 152 | .flags = AT24_FLAG_ADDR16, | ||
| 153 | }; | ||
| 154 | |||
| 155 | static struct i2c_board_info pcm037_i2c_devices[] = { | ||
| 156 | { | ||
| 157 | I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ | ||
| 158 | .platform_data = &board_eeprom, | ||
| 159 | }, { | ||
| 160 | I2C_BOARD_INFO("rtc-pcf8563", 0x51), | ||
| 161 | .type = "pcf8563", | ||
| 162 | } | ||
| 163 | }; | ||
| 164 | #endif | ||
| 165 | |||
| 166 | static int sdhc1_pins[] = { | ||
| 167 | MX31_PIN_SD1_DATA3__SD1_DATA3, | ||
| 168 | MX31_PIN_SD1_DATA2__SD1_DATA2, | ||
| 169 | MX31_PIN_SD1_DATA1__SD1_DATA1, | ||
| 170 | MX31_PIN_SD1_DATA0__SD1_DATA0, | ||
| 171 | MX31_PIN_SD1_CLK__SD1_CLK, | ||
| 172 | MX31_PIN_SD1_CMD__SD1_CMD, | ||
| 173 | }; | ||
| 174 | |||
| 175 | static int pcm970_sdhc1_init(struct device *dev, irq_handler_t h, void *data) | ||
| 176 | { | ||
| 177 | return mxc_iomux_setup_multiple_pins(sdhc1_pins, ARRAY_SIZE(sdhc1_pins), | ||
| 178 | "sdhc-1"); | ||
| 179 | } | ||
| 180 | |||
| 181 | static void pcm970_sdhc1_exit(struct device *dev, void *data) | ||
| 182 | { | ||
| 183 | mxc_iomux_release_multiple_pins(sdhc1_pins, ARRAY_SIZE(sdhc1_pins)); | ||
| 184 | } | ||
| 185 | |||
| 186 | /* No card and rw detection at the moment */ | ||
| 187 | static struct imxmmc_platform_data sdhc_pdata = { | ||
| 188 | .init = pcm970_sdhc1_init, | ||
| 189 | .exit = pcm970_sdhc1_exit, | ||
| 190 | }; | ||
| 191 | |||
| 120 | static struct platform_device *devices[] __initdata = { | 192 | static struct platform_device *devices[] __initdata = { |
| 121 | &pcm037_flash, | 193 | &pcm037_flash, |
| 122 | &pcm037_eth, | 194 | &pcm037_eth, |
| 123 | &pcm037_sram_device, | 195 | &pcm037_sram_device, |
| 124 | }; | 196 | }; |
| 125 | 197 | ||
| 198 | static int uart0_pins[] = { | ||
| 199 | MX31_PIN_CTS1__CTS1, | ||
| 200 | MX31_PIN_RTS1__RTS1, | ||
| 201 | MX31_PIN_TXD1__TXD1, | ||
| 202 | MX31_PIN_RXD1__RXD1 | ||
| 203 | }; | ||
| 204 | |||
| 205 | static int uart2_pins[] = { | ||
| 206 | MX31_PIN_CSPI3_MOSI__RXD3, | ||
| 207 | MX31_PIN_CSPI3_MISO__TXD3 | ||
| 208 | }; | ||
| 209 | |||
| 126 | /* | 210 | /* |
| 127 | * Board specific initialization. | 211 | * Board specific initialization. |
| 128 | */ | 212 | */ |
| @@ -130,59 +214,33 @@ static void __init mxc_board_init(void) | |||
| 130 | { | 214 | { |
| 131 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 215 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 132 | 216 | ||
| 133 | mxc_iomux_mode(MX31_PIN_CTS1__CTS1); | 217 | mxc_iomux_setup_multiple_pins(uart0_pins, ARRAY_SIZE(uart0_pins), "uart-0"); |
| 134 | mxc_iomux_mode(MX31_PIN_RTS1__RTS1); | ||
| 135 | mxc_iomux_mode(MX31_PIN_TXD1__TXD1); | ||
| 136 | mxc_iomux_mode(MX31_PIN_RXD1__RXD1); | ||
| 137 | |||
| 138 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 218 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
| 139 | 219 | ||
| 140 | mxc_iomux_mode(MX31_PIN_CSPI3_MOSI__RXD3); | 220 | mxc_iomux_setup_multiple_pins(uart2_pins, ARRAY_SIZE(uart2_pins), "uart-2"); |
| 141 | mxc_iomux_mode(MX31_PIN_CSPI3_MISO__TXD3); | ||
| 142 | |||
| 143 | mxc_register_device(&mxc_uart_device2, &uart_pdata); | 221 | mxc_register_device(&mxc_uart_device2, &uart_pdata); |
| 144 | 222 | ||
| 145 | mxc_iomux_mode(MX31_PIN_BATT_LINE__OWIRE); | 223 | mxc_iomux_setup_pin(MX31_PIN_BATT_LINE__OWIRE, "batt-0wire"); |
| 146 | mxc_register_device(&mxc_w1_master_device, NULL); | 224 | mxc_register_device(&mxc_w1_master_device, NULL); |
| 147 | 225 | ||
| 148 | /* SMSC9215 IRQ pin */ | 226 | /* SMSC9215 IRQ pin */ |
| 149 | mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO)); | 227 | if (!mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO), |
| 150 | if (!gpio_request(MX31_PIN_GPIO3_1, "pcm037-eth")) | 228 | "pcm037-eth")) |
| 151 | gpio_direction_input(MX31_PIN_GPIO3_1); | 229 | gpio_direction_input(MX31_PIN_GPIO3_1); |
| 152 | 230 | ||
| 153 | mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); | 231 | #ifdef CONFIG_I2C_IMX |
| 154 | } | 232 | i2c_register_board_info(1, pcm037_i2c_devices, |
| 233 | ARRAY_SIZE(pcm037_i2c_devices)); | ||
| 155 | 234 | ||
| 156 | /* | 235 | mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data); |
| 157 | * This structure defines static mappings for the pcm037 board. | 236 | #endif |
| 158 | */ | 237 | mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); |
| 159 | static struct map_desc pcm037_io_desc[] __initdata = { | 238 | mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); |
| 160 | { | ||
| 161 | .virtual = AIPS1_BASE_ADDR_VIRT, | ||
| 162 | .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), | ||
| 163 | .length = AIPS1_SIZE, | ||
| 164 | .type = MT_DEVICE_NONSHARED | ||
| 165 | }, { | ||
| 166 | .virtual = AIPS2_BASE_ADDR_VIRT, | ||
| 167 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), | ||
| 168 | .length = AIPS2_SIZE, | ||
| 169 | .type = MT_DEVICE_NONSHARED | ||
| 170 | }, | ||
| 171 | }; | ||
| 172 | |||
| 173 | /* | ||
| 174 | * Set up static virtual mappings. | ||
| 175 | */ | ||
| 176 | void __init pcm037_map_io(void) | ||
| 177 | { | ||
| 178 | mxc_map_io(); | ||
| 179 | iotable_init(pcm037_io_desc, ARRAY_SIZE(pcm037_io_desc)); | ||
| 180 | } | 239 | } |
| 181 | 240 | ||
| 182 | static void __init pcm037_timer_init(void) | 241 | static void __init pcm037_timer_init(void) |
| 183 | { | 242 | { |
| 184 | mxc_clocks_init(26000000); | 243 | mx31_clocks_init(26000000); |
| 185 | mxc_timer_init("ipg_clk.0"); | ||
| 186 | } | 244 | } |
| 187 | 245 | ||
| 188 | struct sys_timer pcm037_timer = { | 246 | struct sys_timer pcm037_timer = { |
| @@ -194,7 +252,7 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037") | |||
| 194 | .phys_io = AIPS1_BASE_ADDR, | 252 | .phys_io = AIPS1_BASE_ADDR, |
| 195 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 253 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
| 196 | .boot_params = PHYS_OFFSET + 0x100, | 254 | .boot_params = PHYS_OFFSET + 0x100, |
| 197 | .map_io = pcm037_map_io, | 255 | .map_io = mxc_map_io, |
| 198 | .init_irq = mxc_init_irq, | 256 | .init_irq = mxc_init_irq, |
| 199 | .init_machine = mxc_board_init, | 257 | .init_machine = mxc_board_init, |
| 200 | .timer = &pcm037_timer, | 258 | .timer = &pcm037_timer, |
diff --git a/arch/arm/mach-mx3/qong.c b/arch/arm/mach-mx3/qong.c new file mode 100644 index 000000000000..6c4283cec6f4 --- /dev/null +++ b/arch/arm/mach-mx3/qong.c | |||
| @@ -0,0 +1,312 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com> | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, write to the Free Software | ||
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 17 | */ | ||
| 18 | |||
| 19 | #include <linux/types.h> | ||
| 20 | #include <linux/init.h> | ||
| 21 | #include <linux/kernel.h> | ||
| 22 | #include <linux/memory.h> | ||
| 23 | #include <linux/platform_device.h> | ||
| 24 | #include <linux/mtd/physmap.h> | ||
| 25 | #include <linux/mtd/nand.h> | ||
| 26 | #include <linux/gpio.h> | ||
| 27 | |||
| 28 | #include <mach/hardware.h> | ||
| 29 | #include <mach/irqs.h> | ||
| 30 | #include <asm/mach-types.h> | ||
| 31 | #include <asm/mach/arch.h> | ||
| 32 | #include <asm/mach/time.h> | ||
| 33 | #include <asm/mach/map.h> | ||
| 34 | #include <mach/common.h> | ||
| 35 | #include <asm/page.h> | ||
| 36 | #include <asm/setup.h> | ||
| 37 | #include <mach/board-qong.h> | ||
| 38 | #include <mach/imx-uart.h> | ||
| 39 | #include <mach/iomux-mx3.h> | ||
| 40 | #include "devices.h" | ||
| 41 | |||
| 42 | /* FPGA defines */ | ||
| 43 | #define QONG_FPGA_VERSION(major, minor, rev) \ | ||
| 44 | (((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF)) | ||
| 45 | |||
| 46 | #define QONG_FPGA_BASEADDR CS1_BASE_ADDR | ||
| 47 | #define QONG_FPGA_PERIPH_SIZE (1 << 24) | ||
| 48 | |||
| 49 | #define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR | ||
| 50 | #define QONG_FPGA_CTRL_SIZE 0x10 | ||
| 51 | /* FPGA control registers */ | ||
| 52 | #define QONG_FPGA_CTRL_VERSION 0x00 | ||
| 53 | |||
| 54 | #define QONG_DNET_ID 1 | ||
| 55 | #define QONG_DNET_BASEADDR \ | ||
| 56 | (QONG_FPGA_BASEADDR + QONG_DNET_ID * QONG_FPGA_PERIPH_SIZE) | ||
| 57 | #define QONG_DNET_SIZE 0x00001000 | ||
| 58 | |||
| 59 | #define QONG_FPGA_IRQ IOMUX_TO_IRQ(MX31_PIN_DTR_DCE1) | ||
| 60 | |||
| 61 | /* | ||
| 62 | * This file contains the board-specific initialization routines. | ||
| 63 | */ | ||
| 64 | |||
| 65 | static struct imxuart_platform_data uart_pdata = { | ||
| 66 | .flags = IMXUART_HAVE_RTSCTS, | ||
| 67 | }; | ||
| 68 | |||
| 69 | static int uart_pins[] = { | ||
| 70 | MX31_PIN_CTS1__CTS1, | ||
| 71 | MX31_PIN_RTS1__RTS1, | ||
| 72 | MX31_PIN_TXD1__TXD1, | ||
| 73 | MX31_PIN_RXD1__RXD1 | ||
| 74 | }; | ||
| 75 | |||
| 76 | static inline void mxc_init_imx_uart(void) | ||
| 77 | { | ||
| 78 | mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), | ||
| 79 | "uart-0"); | ||
| 80 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | ||
| 81 | } | ||
| 82 | |||
| 83 | static struct resource dnet_resources[] = { | ||
| 84 | [0] = { | ||
| 85 | .name = "dnet-memory", | ||
| 86 | .start = QONG_DNET_BASEADDR, | ||
| 87 | .end = QONG_DNET_BASEADDR + QONG_DNET_SIZE - 1, | ||
| 88 | .flags = IORESOURCE_MEM, | ||
| 89 | }, | ||
| 90 | [1] = { | ||
| 91 | .start = QONG_FPGA_IRQ, | ||
| 92 | .end = QONG_FPGA_IRQ, | ||
| 93 | .flags = IORESOURCE_IRQ, | ||
| 94 | }, | ||
| 95 | }; | ||
| 96 | |||
| 97 | static struct platform_device dnet_device = { | ||
| 98 | .name = "dnet", | ||
| 99 | .id = -1, | ||
| 100 | .num_resources = ARRAY_SIZE(dnet_resources), | ||
| 101 | .resource = dnet_resources, | ||
| 102 | }; | ||
| 103 | |||
| 104 | static int __init qong_init_dnet(void) | ||
| 105 | { | ||
| 106 | int ret; | ||
| 107 | |||
| 108 | ret = platform_device_register(&dnet_device); | ||
| 109 | return ret; | ||
| 110 | } | ||
| 111 | |||
| 112 | /* MTD NOR flash */ | ||
| 113 | |||
| 114 | static struct physmap_flash_data qong_flash_data = { | ||
| 115 | .width = 2, | ||
| 116 | }; | ||
| 117 | |||
| 118 | static struct resource qong_flash_resource = { | ||
| 119 | .start = CS0_BASE_ADDR, | ||
| 120 | .end = CS0_BASE_ADDR + QONG_NOR_SIZE - 1, | ||
| 121 | .flags = IORESOURCE_MEM, | ||
| 122 | }; | ||
| 123 | |||
| 124 | static struct platform_device qong_nor_mtd_device = { | ||
| 125 | .name = "physmap-flash", | ||
| 126 | .id = 0, | ||
| 127 | .dev = { | ||
| 128 | .platform_data = &qong_flash_data, | ||
| 129 | }, | ||
| 130 | .resource = &qong_flash_resource, | ||
| 131 | .num_resources = 1, | ||
| 132 | }; | ||
| 133 | |||
| 134 | static void qong_init_nor_mtd(void) | ||
| 135 | { | ||
| 136 | (void)platform_device_register(&qong_nor_mtd_device); | ||
| 137 | } | ||
| 138 | |||
| 139 | /* | ||
| 140 | * Hardware specific access to control-lines | ||
| 141 | */ | ||
| 142 | static void qong_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) | ||
| 143 | { | ||
| 144 | struct nand_chip *nand_chip = mtd->priv; | ||
| 145 | |||
| 146 | if (cmd == NAND_CMD_NONE) | ||
| 147 | return; | ||
| 148 | |||
| 149 | if (ctrl & NAND_CLE) | ||
| 150 | writeb(cmd, nand_chip->IO_ADDR_W + (1 << 24)); | ||
| 151 | else | ||
| 152 | writeb(cmd, nand_chip->IO_ADDR_W + (1 << 23)); | ||
| 153 | } | ||
| 154 | |||
| 155 | /* | ||
| 156 | * Read the Device Ready pin. | ||
| 157 | */ | ||
| 158 | static int qong_nand_device_ready(struct mtd_info *mtd) | ||
| 159 | { | ||
| 160 | return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_NFRB)); | ||
| 161 | } | ||
| 162 | |||
| 163 | static void qong_nand_select_chip(struct mtd_info *mtd, int chip) | ||
| 164 | { | ||
| 165 | if (chip >= 0) | ||
| 166 | gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 0); | ||
| 167 | else | ||
| 168 | gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 1); | ||
| 169 | } | ||
| 170 | |||
| 171 | static struct platform_nand_data qong_nand_data = { | ||
| 172 | .chip = { | ||
| 173 | .chip_delay = 20, | ||
| 174 | .options = 0, | ||
| 175 | }, | ||
| 176 | .ctrl = { | ||
| 177 | .cmd_ctrl = qong_nand_cmd_ctrl, | ||
| 178 | .dev_ready = qong_nand_device_ready, | ||
| 179 | .select_chip = qong_nand_select_chip, | ||
| 180 | } | ||
| 181 | }; | ||
| 182 | |||
| 183 | static struct resource qong_nand_resource = { | ||
| 184 | .start = CS3_BASE_ADDR, | ||
| 185 | .end = CS3_BASE_ADDR + SZ_32M - 1, | ||
| 186 | .flags = IORESOURCE_MEM, | ||
| 187 | }; | ||
| 188 | |||
| 189 | static struct platform_device qong_nand_device = { | ||
| 190 | .name = "gen_nand", | ||
| 191 | .id = -1, | ||
| 192 | .dev = { | ||
| 193 | .platform_data = &qong_nand_data, | ||
| 194 | }, | ||
| 195 | .num_resources = 1, | ||
| 196 | .resource = &qong_nand_resource, | ||
| 197 | }; | ||
| 198 | |||
| 199 | static void __init qong_init_nand_mtd(void) | ||
| 200 | { | ||
| 201 | /* init CS */ | ||
| 202 | __raw_writel(0x00004f00, CSCR_U(3)); | ||
| 203 | __raw_writel(0x20013b31, CSCR_L(3)); | ||
| 204 | __raw_writel(0x00020800, CSCR_A(3)); | ||
| 205 | mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true); | ||
| 206 | |||
| 207 | /* enable pin */ | ||
| 208 | mxc_iomux_mode(IOMUX_MODE(MX31_PIN_NFCE_B, IOMUX_CONFIG_GPIO)); | ||
| 209 | if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), "nand_enable")) | ||
| 210 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 0); | ||
| 211 | |||
| 212 | /* ready/busy pin */ | ||
| 213 | mxc_iomux_mode(IOMUX_MODE(MX31_PIN_NFRB, IOMUX_CONFIG_GPIO)); | ||
| 214 | if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFRB), "nand_rdy")) | ||
| 215 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_NFRB)); | ||
| 216 | |||
| 217 | /* write protect pin */ | ||
| 218 | mxc_iomux_mode(IOMUX_MODE(MX31_PIN_NFWP_B, IOMUX_CONFIG_GPIO)); | ||
| 219 | if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFWP_B), "nand_wp")) | ||
| 220 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_NFWP_B)); | ||
| 221 | |||
| 222 | platform_device_register(&qong_nand_device); | ||
| 223 | } | ||
| 224 | |||
| 225 | static void __init qong_init_fpga(void) | ||
| 226 | { | ||
| 227 | void __iomem *regs; | ||
| 228 | u32 fpga_ver; | ||
| 229 | |||
| 230 | regs = ioremap(QONG_FPGA_CTRL_BASEADDR, QONG_FPGA_CTRL_SIZE); | ||
| 231 | if (!regs) { | ||
| 232 | printk(KERN_ERR "%s: failed to map registers, aborting.\n", | ||
| 233 | __func__); | ||
| 234 | return; | ||
| 235 | } | ||
| 236 | |||
| 237 | fpga_ver = readl(regs + QONG_FPGA_CTRL_VERSION); | ||
| 238 | iounmap(regs); | ||
| 239 | printk(KERN_INFO "Qong FPGA version %d.%d.%d\n", | ||
| 240 | (fpga_ver & 0xF000) >> 12, | ||
| 241 | (fpga_ver & 0x0F00) >> 8, fpga_ver & 0x00FF); | ||
| 242 | if (fpga_ver < QONG_FPGA_VERSION(0, 8, 7)) { | ||
| 243 | printk(KERN_ERR "qong: Unexpected FPGA version, FPGA-based " | ||
| 244 | "devices won't be registered!\n"); | ||
| 245 | return; | ||
| 246 | } | ||
| 247 | |||
| 248 | /* register FPGA-based devices */ | ||
| 249 | qong_init_nand_mtd(); | ||
| 250 | qong_init_dnet(); | ||
| 251 | } | ||
| 252 | |||
| 253 | /* | ||
| 254 | * This structure defines the MX31 memory map. | ||
| 255 | */ | ||
| 256 | static struct map_desc qong_io_desc[] __initdata = { | ||
| 257 | { | ||
| 258 | .virtual = AIPS1_BASE_ADDR_VIRT, | ||
| 259 | .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), | ||
| 260 | .length = AIPS1_SIZE, | ||
| 261 | .type = MT_DEVICE_NONSHARED | ||
| 262 | }, { | ||
| 263 | .virtual = AIPS2_BASE_ADDR_VIRT, | ||
| 264 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), | ||
| 265 | .length = AIPS2_SIZE, | ||
| 266 | .type = MT_DEVICE_NONSHARED | ||
| 267 | } | ||
| 268 | }; | ||
| 269 | |||
| 270 | /* | ||
| 271 | * Set up static virtual mappings. | ||
| 272 | */ | ||
| 273 | static void __init qong_map_io(void) | ||
| 274 | { | ||
| 275 | mxc_map_io(); | ||
| 276 | iotable_init(qong_io_desc, ARRAY_SIZE(qong_io_desc)); | ||
| 277 | } | ||
| 278 | |||
| 279 | /* | ||
| 280 | * Board specific initialization. | ||
| 281 | */ | ||
| 282 | static void __init mxc_board_init(void) | ||
| 283 | { | ||
| 284 | mxc_init_imx_uart(); | ||
| 285 | qong_init_nor_mtd(); | ||
| 286 | qong_init_fpga(); | ||
| 287 | } | ||
| 288 | |||
| 289 | static void __init qong_timer_init(void) | ||
| 290 | { | ||
| 291 | mx31_clocks_init(26000000); | ||
| 292 | } | ||
| 293 | |||
| 294 | static struct sys_timer qong_timer = { | ||
| 295 | .init = qong_timer_init, | ||
| 296 | }; | ||
| 297 | |||
| 298 | /* | ||
| 299 | * The following uses standard kernel macros defined in arch.h in order to | ||
| 300 | * initialize __mach_desc_QONG data structure. | ||
| 301 | */ | ||
| 302 | |||
| 303 | MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") | ||
| 304 | /* Maintainer: DENX Software Engineering GmbH */ | ||
| 305 | .phys_io = AIPS1_BASE_ADDR, | ||
| 306 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | ||
| 307 | .boot_params = PHYS_OFFSET + 0x100, | ||
| 308 | .map_io = qong_map_io, | ||
| 309 | .init_irq = mxc_init_irq, | ||
| 310 | .init_machine = mxc_board_init, | ||
| 311 | .timer = &qong_timer, | ||
| 312 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index f6a13451d1fd..6031e179926b 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c | |||
| @@ -81,7 +81,7 @@ static inline void __init ldp_init_smc911x(void) | |||
| 81 | } | 81 | } |
| 82 | 82 | ||
| 83 | ldp_smc911x_resources[0].start = cs_mem_base + 0x0; | 83 | ldp_smc911x_resources[0].start = cs_mem_base + 0x0; |
| 84 | ldp_smc911x_resources[0].end = cs_mem_base + 0xf; | 84 | ldp_smc911x_resources[0].end = cs_mem_base + 0xff; |
| 85 | udelay(100); | 85 | udelay(100); |
| 86 | 86 | ||
| 87 | eth_gpio = LDP_SMC911X_GPIO; | 87 | eth_gpio = LDP_SMC911X_GPIO; |
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index ad721e0cbf7a..ce4d46a4a838 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
| @@ -565,7 +565,7 @@ u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val) | |||
| 565 | * | 565 | * |
| 566 | * Given a struct clk of a rate-selectable clksel clock, and a clock divisor, | 566 | * Given a struct clk of a rate-selectable clksel clock, and a clock divisor, |
| 567 | * find the corresponding register field value. The return register value is | 567 | * find the corresponding register field value. The return register value is |
| 568 | * the value before left-shifting. Returns 0xffffffff on error | 568 | * the value before left-shifting. Returns ~0 on error |
| 569 | */ | 569 | */ |
| 570 | u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) | 570 | u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) |
| 571 | { | 571 | { |
| @@ -577,7 +577,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) | |||
| 577 | 577 | ||
| 578 | clks = omap2_get_clksel_by_parent(clk, clk->parent); | 578 | clks = omap2_get_clksel_by_parent(clk, clk->parent); |
| 579 | if (clks == NULL) | 579 | if (clks == NULL) |
| 580 | return 0; | 580 | return ~0; |
| 581 | 581 | ||
| 582 | for (clkr = clks->rates; clkr->div; clkr++) { | 582 | for (clkr = clks->rates; clkr->div; clkr++) { |
| 583 | if ((clkr->flags & cpu_mask) && (clkr->div == div)) | 583 | if ((clkr->flags & cpu_mask) && (clkr->div == div)) |
| @@ -588,7 +588,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) | |||
| 588 | printk(KERN_ERR "clock: Could not find divisor %d for " | 588 | printk(KERN_ERR "clock: Could not find divisor %d for " |
| 589 | "clock %s parent %s\n", div, clk->name, | 589 | "clock %s parent %s\n", div, clk->name, |
| 590 | clk->parent->name); | 590 | clk->parent->name); |
| 591 | return 0; | 591 | return ~0; |
| 592 | } | 592 | } |
| 593 | 593 | ||
| 594 | return clkr->val; | 594 | return clkr->val; |
| @@ -708,7 +708,7 @@ static u32 omap2_clksel_get_src_field(void __iomem **src_addr, | |||
| 708 | return 0; | 708 | return 0; |
| 709 | 709 | ||
| 710 | for (clkr = clks->rates; clkr->div; clkr++) { | 710 | for (clkr = clks->rates; clkr->div; clkr++) { |
| 711 | if (clkr->flags & (cpu_mask | DEFAULT_RATE)) | 711 | if (clkr->flags & cpu_mask && clkr->flags & DEFAULT_RATE) |
| 712 | break; /* Found the default rate for this platform */ | 712 | break; /* Found the default rate for this platform */ |
| 713 | } | 713 | } |
| 714 | 714 | ||
| @@ -746,7 +746,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) | |||
| 746 | return -EINVAL; | 746 | return -EINVAL; |
| 747 | 747 | ||
| 748 | if (clk->usecount > 0) | 748 | if (clk->usecount > 0) |
| 749 | _omap2_clk_disable(clk); | 749 | omap2_clk_disable(clk); |
| 750 | 750 | ||
| 751 | /* Set new source value (previous dividers if any in effect) */ | 751 | /* Set new source value (previous dividers if any in effect) */ |
| 752 | reg_val = __raw_readl(src_addr) & ~field_mask; | 752 | reg_val = __raw_readl(src_addr) & ~field_mask; |
| @@ -759,11 +759,11 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) | |||
| 759 | wmb(); | 759 | wmb(); |
| 760 | } | 760 | } |
| 761 | 761 | ||
| 762 | if (clk->usecount > 0) | ||
| 763 | _omap2_clk_enable(clk); | ||
| 764 | |||
| 765 | clk->parent = new_parent; | 762 | clk->parent = new_parent; |
| 766 | 763 | ||
| 764 | if (clk->usecount > 0) | ||
| 765 | omap2_clk_enable(clk); | ||
| 766 | |||
| 767 | /* CLKSEL clocks follow their parents' rates, divided by a divisor */ | 767 | /* CLKSEL clocks follow their parents' rates, divided by a divisor */ |
| 768 | clk->rate = new_parent->rate; | 768 | clk->rate = new_parent->rate; |
| 769 | 769 | ||
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c index 0caae43301e5..e03f7b45cb0d 100644 --- a/arch/arm/mach-orion5x/irq.c +++ b/arch/arm/mach-orion5x/irq.c | |||
| @@ -44,7 +44,7 @@ void __init orion5x_init_irq(void) | |||
| 44 | * User can use set_type() if he wants to use edge types handlers. | 44 | * User can use set_type() if he wants to use edge types handlers. |
| 45 | */ | 45 | */ |
| 46 | for (i = IRQ_ORION5X_GPIO_START; i < NR_IRQS; i++) { | 46 | for (i = IRQ_ORION5X_GPIO_START; i < NR_IRQS; i++) { |
| 47 | set_irq_chip(i, &orion_gpio_irq_level_chip); | 47 | set_irq_chip(i, &orion_gpio_irq_chip); |
| 48 | set_irq_handler(i, handle_level_irq); | 48 | set_irq_handler(i, handle_level_irq); |
| 49 | irq_desc[i].status |= IRQ_LEVEL; | 49 | irq_desc[i].status |= IRQ_LEVEL; |
| 50 | set_irq_flags(i, IRQF_VALID); | 50 | set_irq_flags(i, IRQF_VALID); |
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 8eea7306f29b..d13282d773aa 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
| @@ -40,6 +40,9 @@ choice | |||
| 40 | config GUMSTIX_AM200EPD | 40 | config GUMSTIX_AM200EPD |
| 41 | bool "Enable AM200EPD board support" | 41 | bool "Enable AM200EPD board support" |
| 42 | 42 | ||
| 43 | config GUMSTIX_AM300EPD | ||
| 44 | bool "Enable AM300EPD board support" | ||
| 45 | |||
| 43 | endchoice | 46 | endchoice |
| 44 | 47 | ||
| 45 | config MACH_INTELMOTE2 | 48 | config MACH_INTELMOTE2 |
| @@ -254,6 +257,10 @@ config MACH_EM_X270 | |||
| 254 | bool "CompuLab EM-x270 platform" | 257 | bool "CompuLab EM-x270 platform" |
| 255 | select PXA27x | 258 | select PXA27x |
| 256 | 259 | ||
| 260 | config MACH_EXEDA | ||
| 261 | bool "CompuLab eXeda platform" | ||
| 262 | select PXA27x | ||
| 263 | |||
| 257 | config MACH_COLIBRI | 264 | config MACH_COLIBRI |
| 258 | bool "Toradex Colibri PX27x" | 265 | bool "Toradex Colibri PX27x" |
| 259 | select PXA27x | 266 | select PXA27x |
| @@ -295,8 +302,15 @@ config MACH_MAGICIAN | |||
| 295 | bool "Enable HTC Magician Support" | 302 | bool "Enable HTC Magician Support" |
| 296 | select PXA27x | 303 | select PXA27x |
| 297 | select IWMMXT | 304 | select IWMMXT |
| 305 | select PXA_SSP | ||
| 306 | select HAVE_PWM | ||
| 298 | select PXA_HAVE_BOARD_IRQS | 307 | select PXA_HAVE_BOARD_IRQS |
| 299 | 308 | ||
| 309 | config MACH_HIMALAYA | ||
| 310 | bool "HTC Himalaya Support" | ||
| 311 | select CPU_PXA26x | ||
| 312 | select FB_W100 | ||
| 313 | |||
| 300 | config MACH_MIOA701 | 314 | config MACH_MIOA701 |
| 301 | bool "Mitac Mio A701 Support" | 315 | bool "Mitac Mio A701 Support" |
| 302 | select PXA27x | 316 | select PXA27x |
| @@ -319,6 +333,16 @@ config ARCH_PXA_PALM | |||
| 319 | bool "PXA based Palm PDAs" | 333 | bool "PXA based Palm PDAs" |
| 320 | select HAVE_PWM | 334 | select HAVE_PWM |
| 321 | 335 | ||
| 336 | config MACH_PALMT5 | ||
| 337 | bool "Palm Tungsten|T5" | ||
| 338 | default y | ||
| 339 | depends on ARCH_PXA_PALM | ||
| 340 | select PXA27x | ||
| 341 | select IWMMXT | ||
| 342 | help | ||
| 343 | Say Y here if you intend to run this kernel on a Palm Tungsten|T5 | ||
| 344 | handheld computer. | ||
| 345 | |||
| 322 | config MACH_PALMTX | 346 | config MACH_PALMTX |
| 323 | bool "Palm T|X" | 347 | bool "Palm T|X" |
| 324 | default y | 348 | default y |
| @@ -339,6 +363,16 @@ config MACH_PALMZ72 | |||
| 339 | Say Y here if you intend to run this kernel on Palm Zire 72 | 363 | Say Y here if you intend to run this kernel on Palm Zire 72 |
| 340 | handheld computer. | 364 | handheld computer. |
| 341 | 365 | ||
| 366 | config MACH_PALMLD | ||
| 367 | bool "Palm LifeDrive" | ||
| 368 | default y | ||
| 369 | depends on ARCH_PXA_PALM | ||
| 370 | select PXA27x | ||
| 371 | select IWMMXT | ||
| 372 | help | ||
| 373 | Say Y here if you intend to run this kernel on a Palm LifeDrive | ||
| 374 | handheld computer. | ||
| 375 | |||
| 342 | config MACH_PCM990_BASEBOARD | 376 | config MACH_PCM990_BASEBOARD |
| 343 | bool "PHYTEC PCM-990 development board" | 377 | bool "PHYTEC PCM-990 development board" |
| 344 | select HAVE_PWM | 378 | select HAVE_PWM |
| @@ -359,6 +393,18 @@ config PCM990_DISPLAY_NONE | |||
| 359 | 393 | ||
| 360 | endchoice | 394 | endchoice |
| 361 | 395 | ||
| 396 | config MACH_CSB726 | ||
| 397 | bool "Enable Cogent CSB726 System On a Module" | ||
| 398 | select PXA27x | ||
| 399 | select IWMMXT | ||
| 400 | help | ||
| 401 | Say Y here if you intend to run this kernel on a Cogent | ||
| 402 | CSB726 System On Module. | ||
| 403 | |||
| 404 | config CSB726_CSB701 | ||
| 405 | bool "Enable supprot for CSB701 baseboard" | ||
| 406 | depends on MACH_CSB726 | ||
| 407 | |||
| 362 | config PXA_EZX | 408 | config PXA_EZX |
| 363 | bool "Motorola EZX Platform" | 409 | bool "Motorola EZX Platform" |
| 364 | select PXA27x | 410 | select PXA27x |
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 7b28bb561d63..8da8e63d048b 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile | |||
| @@ -28,6 +28,7 @@ obj-$(CONFIG_CPU_PXA930) += pxa930.o | |||
| 28 | # Specific board support | 28 | # Specific board support |
| 29 | obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o | 29 | obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o |
| 30 | obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o | 30 | obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o |
| 31 | obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o | ||
| 31 | obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o | 32 | obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o |
| 32 | obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o | 33 | obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o |
| 33 | obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o | 34 | obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o |
| @@ -45,6 +46,7 @@ obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o | |||
| 45 | obj-$(CONFIG_MACH_TOSA) += tosa.o | 46 | obj-$(CONFIG_MACH_TOSA) += tosa.o |
| 46 | obj-$(CONFIG_MACH_EM_X270) += em-x270.o | 47 | obj-$(CONFIG_MACH_EM_X270) += em-x270.o |
| 47 | obj-$(CONFIG_MACH_MAGICIAN) += magician.o | 48 | obj-$(CONFIG_MACH_MAGICIAN) += magician.o |
| 49 | obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o | ||
| 48 | obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o | 50 | obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o |
| 49 | obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o | 51 | obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o |
| 50 | obj-$(CONFIG_MACH_E330) += e330.o | 52 | obj-$(CONFIG_MACH_E330) += e330.o |
| @@ -53,7 +55,9 @@ obj-$(CONFIG_MACH_E740) += e740.o | |||
| 53 | obj-$(CONFIG_MACH_E750) += e750.o | 55 | obj-$(CONFIG_MACH_E750) += e750.o |
| 54 | obj-$(CONFIG_MACH_E400) += e400.o | 56 | obj-$(CONFIG_MACH_E400) += e400.o |
| 55 | obj-$(CONFIG_MACH_E800) += e800.o | 57 | obj-$(CONFIG_MACH_E800) += e800.o |
| 58 | obj-$(CONFIG_MACH_PALMT5) += palmt5.o | ||
| 56 | obj-$(CONFIG_MACH_PALMTX) += palmtx.o | 59 | obj-$(CONFIG_MACH_PALMTX) += palmtx.o |
| 60 | obj-$(CONFIG_MACH_PALMLD) += palmld.o | ||
| 57 | obj-$(CONFIG_MACH_PALMZ72) += palmz72.o | 61 | obj-$(CONFIG_MACH_PALMZ72) += palmz72.o |
| 58 | obj-$(CONFIG_ARCH_VIPER) += viper.o | 62 | obj-$(CONFIG_ARCH_VIPER) += viper.o |
| 59 | 63 | ||
| @@ -71,6 +75,8 @@ obj-$(CONFIG_MACH_CM_X300) += cm-x300.o | |||
| 71 | obj-$(CONFIG_PXA_EZX) += ezx.o | 75 | obj-$(CONFIG_PXA_EZX) += ezx.o |
| 72 | 76 | ||
| 73 | obj-$(CONFIG_MACH_INTELMOTE2) += imote2.o | 77 | obj-$(CONFIG_MACH_INTELMOTE2) += imote2.o |
| 78 | obj-$(CONFIG_MACH_CSB726) += csb726.o | ||
| 79 | obj-$(CONFIG_CSB726_CSB701) += csb701.o | ||
| 74 | 80 | ||
| 75 | # Support for blinky lights | 81 | # Support for blinky lights |
| 76 | led-y := leds.o | 82 | led-y := leds.o |
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c index 77ee80e5e47b..3499fada73ae 100644 --- a/arch/arm/mach-pxa/am200epd.c +++ b/arch/arm/mach-pxa/am200epd.c | |||
| @@ -30,8 +30,8 @@ | |||
| 30 | #include <linux/irq.h> | 30 | #include <linux/irq.h> |
| 31 | #include <linux/gpio.h> | 31 | #include <linux/gpio.h> |
| 32 | 32 | ||
| 33 | #include <mach/pxa25x.h> | ||
| 33 | #include <mach/gumstix.h> | 34 | #include <mach/gumstix.h> |
| 34 | #include <mach/mfp-pxa25x.h> | ||
| 35 | #include <mach/pxafb.h> | 35 | #include <mach/pxafb.h> |
| 36 | 36 | ||
| 37 | #include "generic.h" | 37 | #include "generic.h" |
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c new file mode 100644 index 000000000000..4bd10a17332e --- /dev/null +++ b/arch/arm/mach-pxa/am300epd.c | |||
| @@ -0,0 +1,295 @@ | |||
| 1 | /* | ||
| 2 | * am300epd.c -- Platform device for AM300 EPD kit | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008, Jaya Kumar | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file COPYING in the main directory of this archive for | ||
| 8 | * more details. | ||
| 9 | * | ||
| 10 | * This work was made possible by help and equipment support from E-Ink | ||
| 11 | * Corporation. http://support.eink.com/community | ||
| 12 | * | ||
| 13 | * This driver is written to be used with the Broadsheet display controller. | ||
| 14 | * on the AM300 EPD prototype kit/development kit with an E-Ink 800x600 | ||
| 15 | * Vizplex EPD on a Gumstix board using the Broadsheet interface board. | ||
| 16 | * | ||
| 17 | */ | ||
| 18 | |||
| 19 | #include <linux/module.h> | ||
| 20 | #include <linux/kernel.h> | ||
| 21 | #include <linux/errno.h> | ||
| 22 | #include <linux/string.h> | ||
| 23 | #include <linux/delay.h> | ||
| 24 | #include <linux/interrupt.h> | ||
| 25 | #include <linux/fb.h> | ||
| 26 | #include <linux/init.h> | ||
| 27 | #include <linux/platform_device.h> | ||
| 28 | #include <linux/irq.h> | ||
| 29 | #include <linux/gpio.h> | ||
| 30 | |||
| 31 | #include <mach/gumstix.h> | ||
| 32 | #include <mach/mfp-pxa25x.h> | ||
| 33 | #include <mach/pxafb.h> | ||
| 34 | |||
| 35 | #include "generic.h" | ||
| 36 | |||
| 37 | #include <video/broadsheetfb.h> | ||
| 38 | |||
| 39 | static unsigned int panel_type = 6; | ||
| 40 | static struct platform_device *am300_device; | ||
| 41 | static struct broadsheet_board am300_board; | ||
| 42 | |||
| 43 | static unsigned long am300_pin_config[] __initdata = { | ||
| 44 | GPIO16_GPIO, | ||
| 45 | GPIO17_GPIO, | ||
| 46 | GPIO32_GPIO, | ||
| 47 | GPIO48_GPIO, | ||
| 48 | GPIO49_GPIO, | ||
| 49 | GPIO51_GPIO, | ||
| 50 | GPIO74_GPIO, | ||
| 51 | GPIO75_GPIO, | ||
| 52 | GPIO76_GPIO, | ||
| 53 | GPIO77_GPIO, | ||
| 54 | |||
| 55 | /* this is the 16-bit hdb bus 58-73 */ | ||
| 56 | GPIO58_GPIO, | ||
| 57 | GPIO59_GPIO, | ||
| 58 | GPIO60_GPIO, | ||
| 59 | GPIO61_GPIO, | ||
| 60 | |||
| 61 | GPIO62_GPIO, | ||
| 62 | GPIO63_GPIO, | ||
| 63 | GPIO64_GPIO, | ||
| 64 | GPIO65_GPIO, | ||
| 65 | |||
| 66 | GPIO66_GPIO, | ||
| 67 | GPIO67_GPIO, | ||
| 68 | GPIO68_GPIO, | ||
| 69 | GPIO69_GPIO, | ||
| 70 | |||
| 71 | GPIO70_GPIO, | ||
| 72 | GPIO71_GPIO, | ||
| 73 | GPIO72_GPIO, | ||
| 74 | GPIO73_GPIO, | ||
| 75 | }; | ||
| 76 | |||
| 77 | /* register offsets for gpio control */ | ||
| 78 | #define PWR_GPIO_PIN 16 | ||
| 79 | #define CFG_GPIO_PIN 17 | ||
| 80 | #define RDY_GPIO_PIN 32 | ||
| 81 | #define DC_GPIO_PIN 48 | ||
| 82 | #define RST_GPIO_PIN 49 | ||
| 83 | #define LED_GPIO_PIN 51 | ||
| 84 | #define RD_GPIO_PIN 74 | ||
| 85 | #define WR_GPIO_PIN 75 | ||
| 86 | #define CS_GPIO_PIN 76 | ||
| 87 | #define IRQ_GPIO_PIN 77 | ||
| 88 | |||
| 89 | /* hdb bus */ | ||
| 90 | #define DB0_GPIO_PIN 58 | ||
| 91 | #define DB15_GPIO_PIN 73 | ||
| 92 | |||
| 93 | static int gpios[] = { PWR_GPIO_PIN, CFG_GPIO_PIN, RDY_GPIO_PIN, DC_GPIO_PIN, | ||
| 94 | RST_GPIO_PIN, RD_GPIO_PIN, WR_GPIO_PIN, CS_GPIO_PIN, | ||
| 95 | IRQ_GPIO_PIN, LED_GPIO_PIN }; | ||
| 96 | static char *gpio_names[] = { "PWR", "CFG", "RDY", "DC", "RST", "RD", "WR", | ||
| 97 | "CS", "IRQ", "LED" }; | ||
| 98 | |||
| 99 | static int am300_wait_event(struct broadsheetfb_par *par) | ||
| 100 | { | ||
| 101 | /* todo: improve err recovery */ | ||
| 102 | wait_event(par->waitq, gpio_get_value(RDY_GPIO_PIN)); | ||
| 103 | return 0; | ||
| 104 | } | ||
| 105 | |||
| 106 | static int am300_init_gpio_regs(struct broadsheetfb_par *par) | ||
| 107 | { | ||
| 108 | int i; | ||
| 109 | int err; | ||
| 110 | char dbname[8]; | ||
| 111 | |||
| 112 | for (i = 0; i < ARRAY_SIZE(gpios); i++) { | ||
| 113 | err = gpio_request(gpios[i], gpio_names[i]); | ||
| 114 | if (err) { | ||
| 115 | dev_err(&am300_device->dev, "failed requesting " | ||
| 116 | "gpio %s, err=%d\n", gpio_names[i], err); | ||
| 117 | goto err_req_gpio; | ||
| 118 | } | ||
| 119 | } | ||
| 120 | |||
| 121 | /* we also need to take care of the hdb bus */ | ||
| 122 | for (i = DB0_GPIO_PIN; i <= DB15_GPIO_PIN; i++) { | ||
| 123 | sprintf(dbname, "DB%d", i); | ||
| 124 | err = gpio_request(i, dbname); | ||
| 125 | if (err) { | ||
| 126 | dev_err(&am300_device->dev, "failed requesting " | ||
| 127 | "gpio %d, err=%d\n", i, err); | ||
| 128 | while (i >= DB0_GPIO_PIN) | ||
| 129 | gpio_free(i--); | ||
| 130 | i = ARRAY_SIZE(gpios) - 1; | ||
| 131 | goto err_req_gpio; | ||
| 132 | } | ||
| 133 | } | ||
| 134 | |||
| 135 | /* setup the outputs and init values */ | ||
| 136 | gpio_direction_output(PWR_GPIO_PIN, 0); | ||
| 137 | gpio_direction_output(CFG_GPIO_PIN, 1); | ||
| 138 | gpio_direction_output(DC_GPIO_PIN, 0); | ||
| 139 | gpio_direction_output(RD_GPIO_PIN, 1); | ||
| 140 | gpio_direction_output(WR_GPIO_PIN, 1); | ||
| 141 | gpio_direction_output(CS_GPIO_PIN, 1); | ||
| 142 | gpio_direction_output(RST_GPIO_PIN, 0); | ||
| 143 | |||
| 144 | /* setup the inputs */ | ||
| 145 | gpio_direction_input(RDY_GPIO_PIN); | ||
| 146 | gpio_direction_input(IRQ_GPIO_PIN); | ||
| 147 | |||
| 148 | /* start the hdb bus as an input */ | ||
| 149 | for (i = DB0_GPIO_PIN; i <= DB15_GPIO_PIN; i++) | ||
| 150 | gpio_direction_output(i, 0); | ||
| 151 | |||
| 152 | /* go into command mode */ | ||
| 153 | gpio_set_value(CFG_GPIO_PIN, 1); | ||
| 154 | gpio_set_value(RST_GPIO_PIN, 0); | ||
| 155 | msleep(10); | ||
| 156 | gpio_set_value(RST_GPIO_PIN, 1); | ||
| 157 | msleep(10); | ||
| 158 | am300_wait_event(par); | ||
| 159 | |||
| 160 | return 0; | ||
| 161 | |||
| 162 | err_req_gpio: | ||
| 163 | while (i > 0) | ||
| 164 | gpio_free(gpios[i--]); | ||
| 165 | |||
| 166 | return err; | ||
| 167 | } | ||
| 168 | |||
| 169 | static int am300_init_board(struct broadsheetfb_par *par) | ||
| 170 | { | ||
| 171 | return am300_init_gpio_regs(par); | ||
| 172 | } | ||
| 173 | |||
| 174 | static void am300_cleanup(struct broadsheetfb_par *par) | ||
| 175 | { | ||
| 176 | int i; | ||
| 177 | |||
| 178 | free_irq(IRQ_GPIO(RDY_GPIO_PIN), par); | ||
| 179 | |||
| 180 | for (i = 0; i < ARRAY_SIZE(gpios); i++) | ||
| 181 | gpio_free(gpios[i]); | ||
| 182 | |||
| 183 | for (i = DB0_GPIO_PIN; i <= DB15_GPIO_PIN; i++) | ||
| 184 | gpio_free(i); | ||
| 185 | |||
| 186 | } | ||
| 187 | |||
| 188 | static u16 am300_get_hdb(struct broadsheetfb_par *par) | ||
| 189 | { | ||
| 190 | u16 res = 0; | ||
| 191 | int i; | ||
| 192 | |||
| 193 | for (i = 0; i <= (DB15_GPIO_PIN - DB0_GPIO_PIN) ; i++) | ||
| 194 | res |= (gpio_get_value(DB0_GPIO_PIN + i)) ? (1 << i) : 0; | ||
| 195 | |||
| 196 | return res; | ||
| 197 | } | ||
| 198 | |||
| 199 | static void am300_set_hdb(struct broadsheetfb_par *par, u16 data) | ||
| 200 | { | ||
| 201 | int i; | ||
| 202 | |||
| 203 | for (i = 0; i <= (DB15_GPIO_PIN - DB0_GPIO_PIN) ; i++) | ||
| 204 | gpio_set_value(DB0_GPIO_PIN + i, (data >> i) & 0x01); | ||
| 205 | } | ||
| 206 | |||
| 207 | |||
| 208 | static void am300_set_ctl(struct broadsheetfb_par *par, unsigned char bit, | ||
| 209 | u8 state) | ||
| 210 | { | ||
| 211 | switch (bit) { | ||
| 212 | case BS_CS: | ||
| 213 | gpio_set_value(CS_GPIO_PIN, state); | ||
| 214 | break; | ||
| 215 | case BS_DC: | ||
| 216 | gpio_set_value(DC_GPIO_PIN, state); | ||
| 217 | break; | ||
| 218 | case BS_WR: | ||
| 219 | gpio_set_value(WR_GPIO_PIN, state); | ||
| 220 | break; | ||
| 221 | } | ||
| 222 | } | ||
| 223 | |||
| 224 | static int am300_get_panel_type(void) | ||
| 225 | { | ||
| 226 | return panel_type; | ||
| 227 | } | ||
| 228 | |||
| 229 | static irqreturn_t am300_handle_irq(int irq, void *dev_id) | ||
| 230 | { | ||
| 231 | struct broadsheetfb_par *par = dev_id; | ||
| 232 | |||
| 233 | wake_up(&par->waitq); | ||
| 234 | return IRQ_HANDLED; | ||
| 235 | } | ||
| 236 | |||
| 237 | static int am300_setup_irq(struct fb_info *info) | ||
| 238 | { | ||
| 239 | int ret; | ||
| 240 | struct broadsheetfb_par *par = info->par; | ||
| 241 | |||
| 242 | ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am300_handle_irq, | ||
| 243 | IRQF_DISABLED|IRQF_TRIGGER_RISING, | ||
| 244 | "AM300", par); | ||
| 245 | if (ret) | ||
| 246 | dev_err(&am300_device->dev, "request_irq failed: %d\n", ret); | ||
| 247 | |||
| 248 | return ret; | ||
| 249 | } | ||
| 250 | |||
| 251 | static struct broadsheet_board am300_board = { | ||
| 252 | .owner = THIS_MODULE, | ||
| 253 | .init = am300_init_board, | ||
| 254 | .cleanup = am300_cleanup, | ||
| 255 | .set_hdb = am300_set_hdb, | ||
| 256 | .get_hdb = am300_get_hdb, | ||
| 257 | .set_ctl = am300_set_ctl, | ||
| 258 | .wait_for_rdy = am300_wait_event, | ||
| 259 | .get_panel_type = am300_get_panel_type, | ||
| 260 | .setup_irq = am300_setup_irq, | ||
| 261 | }; | ||
| 262 | |||
| 263 | int __init am300_init(void) | ||
| 264 | { | ||
| 265 | int ret; | ||
| 266 | |||
| 267 | pxa2xx_mfp_config(ARRAY_AND_SIZE(am300_pin_config)); | ||
| 268 | |||
| 269 | /* request our platform independent driver */ | ||
| 270 | request_module("broadsheetfb"); | ||
| 271 | |||
| 272 | am300_device = platform_device_alloc("broadsheetfb", -1); | ||
| 273 | if (!am300_device) | ||
| 274 | return -ENOMEM; | ||
| 275 | |||
| 276 | /* the am300_board that will be seen by broadsheetfb is a copy */ | ||
| 277 | platform_device_add_data(am300_device, &am300_board, | ||
| 278 | sizeof(am300_board)); | ||
| 279 | |||
| 280 | ret = platform_device_add(am300_device); | ||
| 281 | |||
| 282 | if (ret) { | ||
| 283 | platform_device_put(am300_device); | ||
| 284 | return ret; | ||
| 285 | } | ||
| 286 | |||
| 287 | return 0; | ||
| 288 | } | ||
| 289 | |||
| 290 | module_param(panel_type, uint, 0); | ||
| 291 | MODULE_PARM_DESC(panel_type, "Select the panel type: 6, 8, 97"); | ||
| 292 | |||
| 293 | MODULE_DESCRIPTION("board driver for am300 epd kit"); | ||
| 294 | MODULE_AUTHOR("Jaya Kumar"); | ||
| 295 | MODULE_LICENSE("GPL"); | ||
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c index 83a4cdf08176..253fd76142d6 100644 --- a/arch/arm/mach-pxa/cm-x255.c +++ b/arch/arm/mach-pxa/cm-x255.c | |||
| @@ -22,10 +22,8 @@ | |||
| 22 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
| 23 | #include <asm/mach/map.h> | 23 | #include <asm/mach/map.h> |
| 24 | 24 | ||
| 25 | #include <mach/pxa2xx-regs.h> | 25 | #include <mach/pxa25x.h> |
| 26 | #include <mach/mfp-pxa25x.h> | ||
| 27 | #include <mach/pxa2xx_spi.h> | 26 | #include <mach/pxa2xx_spi.h> |
| 28 | #include <mach/bitfield.h> | ||
| 29 | 27 | ||
| 30 | #include "generic.h" | 28 | #include "generic.h" |
| 31 | 29 | ||
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c index df83b97f303f..34576ba5f5fd 100644 --- a/arch/arm/mach-pxa/cm-x270.c +++ b/arch/arm/mach-pxa/cm-x270.c | |||
| @@ -17,7 +17,7 @@ | |||
| 17 | #include <linux/rtc-v3020.h> | 17 | #include <linux/rtc-v3020.h> |
| 18 | #include <video/mbxfb.h> | 18 | #include <video/mbxfb.h> |
| 19 | 19 | ||
| 20 | #include <mach/mfp-pxa27x.h> | 20 | #include <mach/pxa27x.h> |
| 21 | #include <mach/ohci.h> | 21 | #include <mach/ohci.h> |
| 22 | #include <mach/mmc.h> | 22 | #include <mach/mmc.h> |
| 23 | 23 | ||
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c index 3156b25f6e9d..7873fa3d8fa4 100644 --- a/arch/arm/mach-pxa/cm-x2xx-pci.c +++ b/arch/arm/mach-pxa/cm-x2xx-pci.c | |||
| @@ -22,7 +22,6 @@ | |||
| 22 | #include <linux/gpio.h> | 22 | #include <linux/gpio.h> |
| 23 | 23 | ||
| 24 | #include <asm/mach/pci.h> | 24 | #include <asm/mach/pci.h> |
| 25 | #include <mach/pxa-regs.h> | ||
| 26 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
| 27 | 26 | ||
| 28 | #include <asm/hardware/it8152.h> | 27 | #include <asm/hardware/it8152.h> |
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index d99fd9e4d888..117b5435f8d5 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c | |||
| @@ -22,8 +22,6 @@ | |||
| 22 | #include <asm/mach/map.h> | 22 | #include <asm/mach/map.h> |
| 23 | 23 | ||
| 24 | #include <mach/pxa2xx-regs.h> | 24 | #include <mach/pxa2xx-regs.h> |
| 25 | #include <mach/mfp-pxa27x.h> | ||
| 26 | #include <mach/pxa-regs.h> | ||
| 27 | #include <mach/audio.h> | 25 | #include <mach/audio.h> |
| 28 | #include <mach/pxafb.h> | 26 | #include <mach/pxafb.h> |
| 29 | 27 | ||
| @@ -96,7 +94,7 @@ static struct resource cmx270_dm9000_resource[] = { | |||
| 96 | }; | 94 | }; |
| 97 | 95 | ||
| 98 | static struct dm9000_plat_data cmx270_dm9000_platdata = { | 96 | static struct dm9000_plat_data cmx270_dm9000_platdata = { |
| 99 | .flags = DM9000_PLATF_32BITONLY, | 97 | .flags = DM9000_PLATF_32BITONLY | DM9000_PLATF_NO_EEPROM, |
| 100 | }; | 98 | }; |
| 101 | 99 | ||
| 102 | static struct platform_device cmx2xx_dm9000_device = { | 100 | static struct platform_device cmx2xx_dm9000_device = { |
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index ff0c577cd1ac..a9f48b1cb54a 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c | |||
| @@ -28,9 +28,7 @@ | |||
| 28 | #include <asm/mach-types.h> | 28 | #include <asm/mach-types.h> |
| 29 | #include <asm/mach/arch.h> | 29 | #include <asm/mach/arch.h> |
| 30 | 30 | ||
| 31 | #include <mach/mfp-pxa300.h> | 31 | #include <mach/pxa300.h> |
| 32 | |||
| 33 | #include <mach/hardware.h> | ||
| 34 | #include <mach/pxafb.h> | 32 | #include <mach/pxafb.h> |
| 35 | #include <mach/mmc.h> | 33 | #include <mach/mmc.h> |
| 36 | #include <mach/ohci.h> | 34 | #include <mach/ohci.h> |
| @@ -162,7 +160,7 @@ static struct resource dm9000_resources[] = { | |||
| 162 | }; | 160 | }; |
| 163 | 161 | ||
| 164 | static struct dm9000_plat_data cm_x300_dm9000_platdata = { | 162 | static struct dm9000_plat_data cm_x300_dm9000_platdata = { |
| 165 | .flags = DM9000_PLATF_16BITONLY, | 163 | .flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM, |
| 166 | }; | 164 | }; |
| 167 | 165 | ||
| 168 | static struct platform_device dm9000_device = { | 166 | static struct platform_device dm9000_device = { |
diff --git a/arch/arm/mach-pxa/colibri.c b/arch/arm/mach-pxa/colibri.c index e8473624427e..26493ae2889e 100644 --- a/arch/arm/mach-pxa/colibri.c +++ b/arch/arm/mach-pxa/colibri.c | |||
| @@ -28,8 +28,8 @@ | |||
| 28 | #include <asm/mach/map.h> | 28 | #include <asm/mach/map.h> |
| 29 | #include <asm/mach/irq.h> | 29 | #include <asm/mach/irq.h> |
| 30 | #include <asm/mach/flash.h> | 30 | #include <asm/mach/flash.h> |
| 31 | #include <mach/pxa-regs.h> | 31 | |
| 32 | #include <mach/mfp-pxa27x.h> | 32 | #include <mach/pxa27x.h> |
| 33 | #include <mach/colibri.h> | 33 | #include <mach/colibri.h> |
| 34 | 34 | ||
| 35 | #include "generic.h" | 35 | #include "generic.h" |
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index a8d91b6c136b..3b89e5010fb3 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
| @@ -41,9 +41,7 @@ | |||
| 41 | #include <asm/mach/map.h> | 41 | #include <asm/mach/map.h> |
| 42 | #include <asm/mach/irq.h> | 42 | #include <asm/mach/irq.h> |
| 43 | 43 | ||
| 44 | #include <mach/pxa-regs.h> | 44 | #include <mach/pxa25x.h> |
| 45 | #include <mach/pxa2xx-regs.h> | ||
| 46 | #include <mach/mfp-pxa25x.h> | ||
| 47 | #include <mach/i2c.h> | 45 | #include <mach/i2c.h> |
| 48 | #include <mach/irda.h> | 46 | #include <mach/irda.h> |
| 49 | #include <mach/mmc.h> | 47 | #include <mach/mmc.h> |
diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c index 411607bc1fc2..d9b96319d498 100644 --- a/arch/arm/mach-pxa/corgi_lcd.c +++ b/arch/arm/mach-pxa/corgi_lcd.c | |||
| @@ -22,7 +22,6 @@ | |||
| 22 | #include <linux/string.h> | 22 | #include <linux/string.h> |
| 23 | #include <mach/corgi.h> | 23 | #include <mach/corgi.h> |
| 24 | #include <mach/hardware.h> | 24 | #include <mach/hardware.h> |
| 25 | #include <mach/pxa-regs.h> | ||
| 26 | #include <mach/sharpsl.h> | 25 | #include <mach/sharpsl.h> |
| 27 | #include <mach/spitz.h> | 26 | #include <mach/spitz.h> |
| 28 | #include <asm/hardware/scoop.h> | 27 | #include <asm/hardware/scoop.h> |
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index e35259032813..7f04b3a761d1 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c | |||
| @@ -24,7 +24,6 @@ | |||
| 24 | 24 | ||
| 25 | #include <mach/sharpsl.h> | 25 | #include <mach/sharpsl.h> |
| 26 | #include <mach/corgi.h> | 26 | #include <mach/corgi.h> |
| 27 | #include <mach/pxa-regs.h> | ||
| 28 | #include <mach/pxa2xx-regs.h> | 27 | #include <mach/pxa2xx-regs.h> |
| 29 | #include <mach/pxa2xx-gpio.h> | 28 | #include <mach/pxa2xx-gpio.h> |
| 30 | #include "sharpsl.h" | 29 | #include "sharpsl.h" |
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c index 8e2f2215c4ba..a5ee70735e04 100644 --- a/arch/arm/mach-pxa/corgi_ssp.c +++ b/arch/arm/mach-pxa/corgi_ssp.c | |||
| @@ -20,7 +20,6 @@ | |||
| 20 | #include <asm/mach-types.h> | 20 | #include <asm/mach-types.h> |
| 21 | 21 | ||
| 22 | #include <mach/ssp.h> | 22 | #include <mach/ssp.h> |
| 23 | #include <mach/pxa-regs.h> | ||
| 24 | #include <mach/pxa2xx-gpio.h> | 23 | #include <mach/pxa2xx-gpio.h> |
| 25 | #include <mach/regs-ssp.h> | 24 | #include <mach/regs-ssp.h> |
| 26 | #include "sharpsl.h" | 25 | #include "sharpsl.h" |
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c index 771dd4eac935..083a1d851d49 100644 --- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c +++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c | |||
| @@ -37,8 +37,6 @@ | |||
| 37 | #include <linux/init.h> | 37 | #include <linux/init.h> |
| 38 | #include <linux/cpufreq.h> | 38 | #include <linux/cpufreq.h> |
| 39 | 39 | ||
| 40 | #include <mach/hardware.h> | ||
| 41 | #include <mach/pxa-regs.h> | ||
| 42 | #include <mach/pxa2xx-regs.h> | 40 | #include <mach/pxa2xx-regs.h> |
| 43 | 41 | ||
| 44 | #ifdef DEBUG | 42 | #ifdef DEBUG |
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c index 968c8309ec37..67f34a8d8e60 100644 --- a/arch/arm/mach-pxa/cpufreq-pxa3xx.c +++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c | |||
| @@ -15,8 +15,6 @@ | |||
| 15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
| 16 | #include <linux/cpufreq.h> | 16 | #include <linux/cpufreq.h> |
| 17 | 17 | ||
| 18 | #include <mach/hardware.h> | ||
| 19 | #include <mach/pxa-regs.h> | ||
| 20 | #include <mach/pxa3xx-regs.h> | 18 | #include <mach/pxa3xx-regs.h> |
| 21 | 19 | ||
| 22 | #include "generic.h" | 20 | #include "generic.h" |
diff --git a/arch/arm/mach-pxa/csb701.c b/arch/arm/mach-pxa/csb701.c new file mode 100644 index 000000000000..4a2a2952c374 --- /dev/null +++ b/arch/arm/mach-pxa/csb701.c | |||
| @@ -0,0 +1,61 @@ | |||
| 1 | #include <linux/kernel.h> | ||
| 2 | #include <linux/module.h> | ||
| 3 | #include <linux/platform_device.h> | ||
| 4 | #include <linux/gpio_keys.h> | ||
| 5 | #include <linux/input.h> | ||
| 6 | #include <linux/leds.h> | ||
| 7 | |||
| 8 | static struct gpio_keys_button csb701_buttons[] = { | ||
| 9 | { | ||
| 10 | .code = 0x7, | ||
| 11 | .gpio = 1, | ||
| 12 | .active_low = 1, | ||
| 13 | .desc = "SW2", | ||
| 14 | .type = EV_SW, | ||
| 15 | .wakeup = 1, | ||
| 16 | }, | ||
| 17 | }; | ||
| 18 | |||
| 19 | static struct gpio_keys_platform_data csb701_gpio_keys_data = { | ||
| 20 | .buttons = csb701_buttons, | ||
| 21 | .nbuttons = ARRAY_SIZE(csb701_buttons), | ||
| 22 | }; | ||
| 23 | |||
| 24 | static struct gpio_led csb701_leds[] = { | ||
| 25 | { | ||
| 26 | .name = "csb701:yellow:heartbeat", | ||
| 27 | .default_trigger = "heartbeat", | ||
| 28 | .gpio = 11, | ||
| 29 | .active_low = 1, | ||
| 30 | }, | ||
| 31 | }; | ||
| 32 | |||
| 33 | static struct platform_device csb701_gpio_keys = { | ||
| 34 | .name = "gpio-keys", | ||
| 35 | .id = -1, | ||
| 36 | .dev.platform_data = &csb701_gpio_keys_data, | ||
| 37 | }; | ||
| 38 | |||
| 39 | static struct gpio_led_platform_data csb701_leds_gpio_data = { | ||
| 40 | .leds = csb701_leds, | ||
| 41 | .num_leds = ARRAY_SIZE(csb701_leds), | ||
| 42 | }; | ||
| 43 | |||
| 44 | static struct platform_device csb701_leds_gpio = { | ||
| 45 | .name = "leds-gpio", | ||
| 46 | .id = -1, | ||
| 47 | .dev.platform_data = &csb701_leds_gpio_data, | ||
| 48 | }; | ||
| 49 | |||
| 50 | static struct platform_device *devices[] __initdata = { | ||
| 51 | &csb701_gpio_keys, | ||
| 52 | &csb701_leds_gpio, | ||
| 53 | }; | ||
| 54 | |||
| 55 | static int __init csb701_init(void) | ||
| 56 | { | ||
| 57 | return platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 58 | } | ||
| 59 | |||
| 60 | module_init(csb701_init); | ||
| 61 | |||
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c new file mode 100644 index 000000000000..2b289f83a61a --- /dev/null +++ b/arch/arm/mach-pxa/csb726.c | |||
| @@ -0,0 +1,318 @@ | |||
| 1 | /* | ||
| 2 | * Support for Cogent CSB726 | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008 Dmitry Eremin-Solenikov | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/io.h> | ||
| 14 | #include <linux/gpio.h> | ||
| 15 | #include <linux/platform_device.h> | ||
| 16 | #include <linux/mtd/physmap.h> | ||
| 17 | #include <linux/mtd/partitions.h> | ||
| 18 | #include <linux/sm501.h> | ||
| 19 | |||
| 20 | #include <asm/mach-types.h> | ||
| 21 | #include <asm/mach/arch.h> | ||
| 22 | #include <mach/csb726.h> | ||
| 23 | #include <mach/mfp-pxa27x.h> | ||
| 24 | #include <mach/i2c.h> | ||
| 25 | #include <mach/mmc.h> | ||
| 26 | #include <mach/ohci.h> | ||
| 27 | #include <mach/pxa2xx-regs.h> | ||
| 28 | |||
| 29 | #include "generic.h" | ||
| 30 | #include "devices.h" | ||
| 31 | |||
| 32 | /* | ||
| 33 | * n/a: 2, 5, 6, 7, 8, 23, 24, 25, 26, 27, 87, 88, 89, | ||
| 34 | * nu: 58 -- 77, 90, 91, 93, 102, 105-108, 114-116, | ||
| 35 | * XXX: 21, | ||
| 36 | * XXX: 79 CS_3 for LAN9215 or PSKTSEL on R2, R3 | ||
| 37 | * XXX: 33 CS_5 for LAN9215 on R1 | ||
| 38 | */ | ||
| 39 | |||
| 40 | static unsigned long csb726_pin_config[] = { | ||
| 41 | GPIO78_nCS_2, /* EXP_CS */ | ||
| 42 | GPIO79_nCS_3, /* SMSC9215 */ | ||
| 43 | GPIO80_nCS_4, /* SM501 */ | ||
| 44 | |||
| 45 | GPIO52_GPIO, /* #SMSC9251 int */ | ||
| 46 | GPIO53_GPIO, /* SM501 int */ | ||
| 47 | |||
| 48 | GPIO1_GPIO, /* GPIO0 */ | ||
| 49 | GPIO11_GPIO, /* GPIO1 */ | ||
| 50 | GPIO9_GPIO, /* GPIO2 */ | ||
| 51 | GPIO10_GPIO, /* GPIO3 */ | ||
| 52 | GPIO16_PWM0_OUT, /* or GPIO4 */ | ||
| 53 | GPIO17_PWM1_OUT, /* or GPIO5 */ | ||
| 54 | GPIO94_GPIO, /* GPIO6 */ | ||
| 55 | GPIO95_GPIO, /* GPIO7 */ | ||
| 56 | GPIO96_GPIO, /* GPIO8 */ | ||
| 57 | GPIO97_GPIO, /* GPIO9 */ | ||
| 58 | GPIO15_GPIO, /* EXP_IRQ */ | ||
| 59 | GPIO18_RDY, /* EXP_WAIT */ | ||
| 60 | |||
| 61 | GPIO0_GPIO, /* PWR_INT */ | ||
| 62 | GPIO104_GPIO, /* PWR_OFF */ | ||
| 63 | |||
| 64 | GPIO12_GPIO, /* touch irq */ | ||
| 65 | |||
| 66 | GPIO13_SSP2_TXD, | ||
| 67 | GPIO14_SSP2_SFRM, | ||
| 68 | MFP_CFG_OUT(GPIO19, AF1, DRIVE_LOW),/* SSP2_SYSCLK */ | ||
| 69 | GPIO22_SSP2_SCLK, | ||
| 70 | |||
| 71 | GPIO81_SSP3_TXD, | ||
| 72 | GPIO82_SSP3_RXD, | ||
| 73 | GPIO83_SSP3_SFRM, | ||
| 74 | GPIO84_SSP3_SCLK, | ||
| 75 | |||
| 76 | GPIO20_GPIO, /* SDIO int */ | ||
| 77 | GPIO32_MMC_CLK, | ||
| 78 | GPIO92_MMC_DAT_0, | ||
| 79 | GPIO109_MMC_DAT_1, | ||
| 80 | GPIO110_MMC_DAT_2, | ||
| 81 | GPIO111_MMC_DAT_3, | ||
| 82 | GPIO112_MMC_CMD, | ||
| 83 | GPIO100_GPIO, /* SD CD */ | ||
| 84 | GPIO101_GPIO, /* SD WP */ | ||
| 85 | |||
| 86 | GPIO28_AC97_BITCLK, | ||
| 87 | GPIO29_AC97_SDATA_IN_0, | ||
| 88 | GPIO30_AC97_SDATA_OUT, | ||
| 89 | GPIO31_AC97_SYNC, | ||
| 90 | GPIO113_AC97_nRESET, | ||
| 91 | |||
| 92 | GPIO34_FFUART_RXD, | ||
| 93 | GPIO35_FFUART_CTS, | ||
| 94 | GPIO36_FFUART_DCD, | ||
| 95 | GPIO37_FFUART_DSR, | ||
| 96 | GPIO38_FFUART_RI, | ||
| 97 | GPIO39_FFUART_TXD, | ||
| 98 | GPIO40_FFUART_DTR, | ||
| 99 | GPIO41_FFUART_RTS, | ||
| 100 | |||
| 101 | GPIO42_BTUART_RXD, | ||
| 102 | GPIO43_BTUART_TXD, | ||
| 103 | GPIO44_BTUART_CTS, | ||
| 104 | GPIO45_BTUART_RTS, | ||
| 105 | |||
| 106 | GPIO46_STUART_RXD, | ||
| 107 | GPIO47_STUART_TXD, | ||
| 108 | |||
| 109 | GPIO48_nPOE, | ||
| 110 | GPIO49_nPWE, | ||
| 111 | GPIO50_nPIOR, | ||
| 112 | GPIO51_nPIOW, | ||
| 113 | GPIO54_nPCE_2, | ||
| 114 | GPIO55_nPREG, | ||
| 115 | GPIO56_nPWAIT, | ||
| 116 | GPIO57_nIOIS16, /* maybe unused */ | ||
| 117 | GPIO85_nPCE_1, | ||
| 118 | GPIO98_GPIO, /* CF IRQ */ | ||
| 119 | GPIO99_GPIO, /* CF CD */ | ||
| 120 | GPIO103_GPIO, /* Reset */ | ||
| 121 | |||
| 122 | GPIO117_I2C_SCL, | ||
| 123 | GPIO118_I2C_SDA, | ||
| 124 | }; | ||
| 125 | |||
| 126 | static struct pxamci_platform_data csb726_mci_data; | ||
| 127 | |||
| 128 | static int csb726_mci_init(struct device *dev, | ||
| 129 | irq_handler_t detect, void *data) | ||
| 130 | { | ||
| 131 | int err; | ||
| 132 | |||
| 133 | csb726_mci_data.detect_delay = msecs_to_jiffies(500); | ||
| 134 | |||
| 135 | err = gpio_request(CSB726_GPIO_MMC_DETECT, "MMC detect"); | ||
| 136 | if (err) | ||
| 137 | goto err_det_req; | ||
| 138 | |||
| 139 | err = gpio_direction_input(CSB726_GPIO_MMC_DETECT); | ||
| 140 | if (err) | ||
| 141 | goto err_det_dir; | ||
| 142 | |||
| 143 | err = gpio_request(CSB726_GPIO_MMC_RO, "MMC ro"); | ||
| 144 | if (err) | ||
| 145 | goto err_ro_req; | ||
| 146 | |||
| 147 | err = gpio_direction_input(CSB726_GPIO_MMC_RO); | ||
| 148 | if (err) | ||
| 149 | goto err_ro_dir; | ||
| 150 | |||
| 151 | err = request_irq(gpio_to_irq(CSB726_GPIO_MMC_DETECT), detect, | ||
| 152 | IRQF_DISABLED, "MMC card detect", data); | ||
| 153 | if (err) | ||
| 154 | goto err_irq; | ||
| 155 | |||
| 156 | return 0; | ||
| 157 | |||
| 158 | err_irq: | ||
| 159 | err_ro_dir: | ||
| 160 | gpio_free(CSB726_GPIO_MMC_RO); | ||
| 161 | err_ro_req: | ||
| 162 | err_det_dir: | ||
| 163 | gpio_free(CSB726_GPIO_MMC_DETECT); | ||
| 164 | err_det_req: | ||
| 165 | return err; | ||
| 166 | } | ||
| 167 | |||
| 168 | static int csb726_mci_get_ro(struct device *dev) | ||
| 169 | { | ||
| 170 | return gpio_get_value(CSB726_GPIO_MMC_RO); | ||
| 171 | } | ||
| 172 | |||
| 173 | static void csb726_mci_exit(struct device *dev, void *data) | ||
| 174 | { | ||
| 175 | free_irq(gpio_to_irq(CSB726_GPIO_MMC_DETECT), data); | ||
| 176 | gpio_free(CSB726_GPIO_MMC_RO); | ||
| 177 | gpio_free(CSB726_GPIO_MMC_DETECT); | ||
| 178 | } | ||
| 179 | |||
| 180 | static struct pxamci_platform_data csb726_mci = { | ||
| 181 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | ||
| 182 | .init = csb726_mci_init, | ||
| 183 | .get_ro = csb726_mci_get_ro, | ||
| 184 | /* FIXME setpower */ | ||
| 185 | .exit = csb726_mci_exit, | ||
| 186 | }; | ||
| 187 | |||
| 188 | static struct pxaohci_platform_data csb726_ohci_platform_data = { | ||
| 189 | .port_mode = PMM_NPS_MODE, | ||
| 190 | .flags = ENABLE_PORT1 | NO_OC_PROTECTION, | ||
| 191 | }; | ||
| 192 | |||
| 193 | static struct mtd_partition csb726_flash_partitions[] = { | ||
| 194 | { | ||
| 195 | .name = "Bootloader", | ||
| 196 | .offset = 0, | ||
| 197 | .size = CSB726_FLASH_uMON, | ||
| 198 | .mask_flags = MTD_WRITEABLE /* force read-only */ | ||
| 199 | }, | ||
| 200 | { | ||
| 201 | .name = "root", | ||
| 202 | .offset = MTDPART_OFS_APPEND, | ||
| 203 | .size = MTDPART_SIZ_FULL, | ||
| 204 | } | ||
| 205 | }; | ||
| 206 | |||
| 207 | static struct physmap_flash_data csb726_flash_data = { | ||
| 208 | .width = 2, | ||
| 209 | .parts = csb726_flash_partitions, | ||
| 210 | .nr_parts = ARRAY_SIZE(csb726_flash_partitions), | ||
| 211 | }; | ||
| 212 | |||
| 213 | static struct resource csb726_flash_resources[] = { | ||
| 214 | { | ||
| 215 | .start = PXA_CS0_PHYS, | ||
| 216 | .end = PXA_CS0_PHYS + CSB726_FLASH_SIZE - 1 , | ||
| 217 | .flags = IORESOURCE_MEM, | ||
| 218 | } | ||
| 219 | }; | ||
| 220 | |||
| 221 | static struct platform_device csb726_flash = { | ||
| 222 | .name = "physmap-flash", | ||
| 223 | .dev = { | ||
| 224 | .platform_data = &csb726_flash_data, | ||
| 225 | }, | ||
| 226 | .resource = csb726_flash_resources, | ||
| 227 | .num_resources = ARRAY_SIZE(csb726_flash_resources), | ||
| 228 | }; | ||
| 229 | |||
| 230 | static struct resource csb726_sm501_resources[] = { | ||
| 231 | { | ||
| 232 | .start = PXA_CS4_PHYS, | ||
| 233 | .end = PXA_CS4_PHYS + SZ_8M - 1, | ||
| 234 | .flags = IORESOURCE_MEM, | ||
| 235 | .name = "sm501-localmem", | ||
| 236 | }, | ||
| 237 | { | ||
| 238 | .start = PXA_CS4_PHYS + SZ_64M - SZ_2M, | ||
| 239 | .end = PXA_CS4_PHYS + SZ_64M - 1, | ||
| 240 | .flags = IORESOURCE_MEM, | ||
| 241 | .name = "sm501-regs", | ||
| 242 | }, | ||
| 243 | { | ||
| 244 | .start = CSB726_IRQ_SM501, | ||
| 245 | .end = CSB726_IRQ_SM501, | ||
| 246 | .flags = IORESOURCE_IRQ, | ||
| 247 | }, | ||
| 248 | }; | ||
| 249 | |||
| 250 | static struct sm501_initdata csb726_sm501_initdata = { | ||
| 251 | /* .devices = SM501_USE_USB_HOST, */ | ||
| 252 | .devices = SM501_USE_USB_HOST | SM501_USE_UART0 | SM501_USE_UART1, | ||
| 253 | }; | ||
| 254 | |||
| 255 | static struct sm501_platdata csb726_sm501_platdata = { | ||
| 256 | .init = &csb726_sm501_initdata, | ||
| 257 | }; | ||
| 258 | |||
| 259 | static struct platform_device csb726_sm501 = { | ||
| 260 | .name = "sm501", | ||
| 261 | .id = 0, | ||
| 262 | .num_resources = ARRAY_SIZE(csb726_sm501_resources), | ||
| 263 | .resource = csb726_sm501_resources, | ||
| 264 | .dev = { | ||
| 265 | .platform_data = &csb726_sm501_platdata, | ||
| 266 | }, | ||
| 267 | }; | ||
| 268 | |||
| 269 | static struct resource csb726_lan_resources[] = { | ||
| 270 | { | ||
| 271 | .start = PXA_CS3_PHYS, | ||
| 272 | .end = PXA_CS3_PHYS + SZ_64K - 1, | ||
| 273 | .flags = IORESOURCE_MEM, | ||
| 274 | }, | ||
| 275 | { | ||
| 276 | .start = CSB726_IRQ_LAN, | ||
| 277 | .end = CSB726_IRQ_LAN, | ||
| 278 | .flags = IORESOURCE_IRQ, | ||
| 279 | }, | ||
| 280 | }; | ||
| 281 | |||
| 282 | static struct platform_device csb726_lan = { | ||
| 283 | .name = "smc911x", | ||
| 284 | .id = -1, | ||
| 285 | .num_resources = ARRAY_SIZE(csb726_lan_resources), | ||
| 286 | .resource = csb726_lan_resources, | ||
| 287 | }; | ||
| 288 | |||
| 289 | static struct platform_device *devices[] __initdata = { | ||
| 290 | &csb726_flash, | ||
| 291 | &csb726_sm501, | ||
| 292 | &csb726_lan, | ||
| 293 | }; | ||
| 294 | |||
| 295 | static void __init csb726_init(void) | ||
| 296 | { | ||
| 297 | pxa2xx_mfp_config(ARRAY_AND_SIZE(csb726_pin_config)); | ||
| 298 | /* MSC1 = 0x7ffc3ffc; *//* LAN9215/EXP_CS */ | ||
| 299 | /* MSC2 = 0x06697ff4; *//* none/SM501 */ | ||
| 300 | MSC2 = (MSC2 & ~0xffff) | 0x7ff4; /* SM501 */ | ||
| 301 | |||
| 302 | pxa_set_i2c_info(NULL); | ||
| 303 | pxa27x_set_i2c_power_info(NULL); | ||
| 304 | pxa_set_mci_info(&csb726_mci); | ||
| 305 | pxa_set_ohci_info(&csb726_ohci_platform_data); | ||
| 306 | |||
| 307 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 308 | } | ||
| 309 | |||
| 310 | MACHINE_START(CSB726, "Cogent CSB726") | ||
| 311 | .phys_io = 0x40000000, | ||
| 312 | .boot_params = 0xa0000100, | ||
| 313 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 314 | .map_io = pxa_map_io, | ||
| 315 | .init_irq = pxa27x_init_irq, | ||
| 316 | .init_machine = csb726_init, | ||
| 317 | .timer = &pxa_timer, | ||
| 318 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index e16f8e3d58d3..d245e59c51b1 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c | |||
| @@ -4,7 +4,6 @@ | |||
| 4 | #include <linux/platform_device.h> | 4 | #include <linux/platform_device.h> |
| 5 | #include <linux/dma-mapping.h> | 5 | #include <linux/dma-mapping.h> |
| 6 | 6 | ||
| 7 | #include <mach/pxa-regs.h> | ||
| 8 | #include <mach/udc.h> | 7 | #include <mach/udc.h> |
| 9 | #include <mach/pxafb.h> | 8 | #include <mach/pxafb.h> |
| 10 | #include <mach/mmc.h> | 9 | #include <mach/mmc.h> |
diff --git a/arch/arm/mach-pxa/dma.c b/arch/arm/mach-pxa/dma.c index 7de17fc5d54b..01217e01f7d2 100644 --- a/arch/arm/mach-pxa/dma.c +++ b/arch/arm/mach-pxa/dma.c | |||
| @@ -23,8 +23,6 @@ | |||
| 23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
| 24 | #include <mach/dma.h> | 24 | #include <mach/dma.h> |
| 25 | 25 | ||
| 26 | #include <mach/pxa-regs.h> | ||
| 27 | |||
| 28 | struct dma_channel { | 26 | struct dma_channel { |
| 29 | char *name; | 27 | char *name; |
| 30 | pxa_dma_prio prio; | 28 | pxa_dma_prio prio; |
| @@ -113,7 +111,7 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id) | |||
| 113 | return IRQ_HANDLED; | 111 | return IRQ_HANDLED; |
| 114 | } | 112 | } |
| 115 | 113 | ||
| 116 | int __init pxa_init_dma(int num_ch) | 114 | int __init pxa_init_dma(int irq, int num_ch) |
| 117 | { | 115 | { |
| 118 | int i, ret; | 116 | int i, ret; |
| 119 | 117 | ||
| @@ -131,7 +129,7 @@ int __init pxa_init_dma(int num_ch) | |||
| 131 | dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW); | 129 | dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW); |
| 132 | } | 130 | } |
| 133 | 131 | ||
| 134 | ret = request_irq(IRQ_DMA, dma_irq_handler, IRQF_DISABLED, "DMA", NULL); | 132 | ret = request_irq(irq, dma_irq_handler, IRQF_DISABLED, "DMA", NULL); |
| 135 | if (ret) { | 133 | if (ret) { |
| 136 | printk (KERN_CRIT "Wow! Can't register IRQ for DMA\n"); | 134 | printk (KERN_CRIT "Wow! Can't register IRQ for DMA\n"); |
| 137 | kfree(dma_channels); | 135 | kfree(dma_channels); |
diff --git a/arch/arm/mach-pxa/e330.c b/arch/arm/mach-pxa/e330.c index 1bd7f740427c..74d3f8987c5c 100644 --- a/arch/arm/mach-pxa/e330.c +++ b/arch/arm/mach-pxa/e330.c | |||
| @@ -20,9 +20,7 @@ | |||
| 20 | #include <asm/mach/arch.h> | 20 | #include <asm/mach/arch.h> |
| 21 | #include <asm/mach-types.h> | 21 | #include <asm/mach-types.h> |
| 22 | 22 | ||
| 23 | #include <mach/mfp-pxa25x.h> | 23 | #include <mach/pxa25x.h> |
| 24 | #include <mach/hardware.h> | ||
| 25 | #include <mach/pxa-regs.h> | ||
| 26 | #include <mach/eseries-gpio.h> | 24 | #include <mach/eseries-gpio.h> |
| 27 | #include <mach/udc.h> | 25 | #include <mach/udc.h> |
| 28 | 26 | ||
diff --git a/arch/arm/mach-pxa/e350.c b/arch/arm/mach-pxa/e350.c index edcd9d5ce545..080036272131 100644 --- a/arch/arm/mach-pxa/e350.c +++ b/arch/arm/mach-pxa/e350.c | |||
| @@ -21,9 +21,7 @@ | |||
| 21 | #include <asm/mach-types.h> | 21 | #include <asm/mach-types.h> |
| 22 | 22 | ||
| 23 | #include <mach/irqs.h> | 23 | #include <mach/irqs.h> |
| 24 | #include <mach/mfp-pxa25x.h> | 24 | #include <mach/pxa25x.h> |
| 25 | #include <mach/pxa-regs.h> | ||
| 26 | #include <mach/hardware.h> | ||
| 27 | #include <mach/eseries-gpio.h> | 25 | #include <mach/eseries-gpio.h> |
| 28 | #include <mach/udc.h> | 26 | #include <mach/udc.h> |
| 29 | 27 | ||
diff --git a/arch/arm/mach-pxa/e400.c b/arch/arm/mach-pxa/e400.c index 77bb8e2c48c0..ed9c0c3f64a2 100644 --- a/arch/arm/mach-pxa/e400.c +++ b/arch/arm/mach-pxa/e400.c | |||
| @@ -22,9 +22,7 @@ | |||
| 22 | #include <asm/mach/arch.h> | 22 | #include <asm/mach/arch.h> |
| 23 | #include <asm/mach-types.h> | 23 | #include <asm/mach-types.h> |
| 24 | 24 | ||
| 25 | #include <mach/mfp-pxa25x.h> | 25 | #include <mach/pxa25x.h> |
| 26 | #include <mach/pxa-regs.h> | ||
| 27 | #include <mach/hardware.h> | ||
| 28 | #include <mach/eseries-gpio.h> | 26 | #include <mach/eseries-gpio.h> |
| 29 | #include <mach/pxafb.h> | 27 | #include <mach/pxafb.h> |
| 30 | #include <mach/udc.h> | 28 | #include <mach/udc.h> |
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c index 6d48e00f4f0b..e0c3aaf1ecb3 100644 --- a/arch/arm/mach-pxa/e740.c +++ b/arch/arm/mach-pxa/e740.c | |||
| @@ -24,9 +24,7 @@ | |||
| 24 | #include <asm/mach/arch.h> | 24 | #include <asm/mach/arch.h> |
| 25 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
| 26 | 26 | ||
| 27 | #include <mach/mfp-pxa25x.h> | 27 | #include <mach/pxa25x.h> |
| 28 | #include <mach/pxa-regs.h> | ||
| 29 | #include <mach/hardware.h> | ||
| 30 | #include <mach/eseries-gpio.h> | 28 | #include <mach/eseries-gpio.h> |
| 31 | #include <mach/udc.h> | 29 | #include <mach/udc.h> |
| 32 | #include <mach/irda.h> | 30 | #include <mach/irda.h> |
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c index be1ab8edb973..84b050f1a996 100644 --- a/arch/arm/mach-pxa/e750.c +++ b/arch/arm/mach-pxa/e750.c | |||
| @@ -23,9 +23,7 @@ | |||
| 23 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
| 24 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
| 25 | 25 | ||
| 26 | #include <mach/mfp-pxa25x.h> | 26 | #include <mach/pxa25x.h> |
| 27 | #include <mach/pxa-regs.h> | ||
| 28 | #include <mach/hardware.h> | ||
| 29 | #include <mach/eseries-gpio.h> | 27 | #include <mach/eseries-gpio.h> |
| 30 | #include <mach/udc.h> | 28 | #include <mach/udc.h> |
| 31 | #include <mach/irda.h> | 29 | #include <mach/irda.h> |
diff --git a/arch/arm/mach-pxa/e800.c b/arch/arm/mach-pxa/e800.c index cc9b1293e866..f8924f6ca544 100644 --- a/arch/arm/mach-pxa/e800.c +++ b/arch/arm/mach-pxa/e800.c | |||
| @@ -23,9 +23,7 @@ | |||
| 23 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
| 24 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
| 25 | 25 | ||
| 26 | #include <mach/mfp-pxa25x.h> | 26 | #include <mach/pxa25x.h> |
| 27 | #include <mach/pxa-regs.h> | ||
| 28 | #include <mach/hardware.h> | ||
| 29 | #include <mach/eseries-gpio.h> | 27 | #include <mach/eseries-gpio.h> |
| 30 | #include <mach/udc.h> | 28 | #include <mach/udc.h> |
| 31 | #include <mach/irqs.h> | 29 | #include <mach/irqs.h> |
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index f5ed8038ede5..920dfb8d36da 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c | |||
| @@ -11,40 +11,63 @@ | |||
| 11 | 11 | ||
| 12 | #include <linux/irq.h> | 12 | #include <linux/irq.h> |
| 13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/delay.h> | ||
| 14 | 15 | ||
| 15 | #include <linux/dm9000.h> | 16 | #include <linux/dm9000.h> |
| 16 | #include <linux/rtc-v3020.h> | 17 | #include <linux/rtc-v3020.h> |
| 17 | #include <linux/mtd/nand.h> | 18 | #include <linux/mtd/nand.h> |
| 18 | #include <linux/mtd/partitions.h> | 19 | #include <linux/mtd/partitions.h> |
| 20 | #include <linux/mtd/physmap.h> | ||
| 19 | #include <linux/input.h> | 21 | #include <linux/input.h> |
| 20 | #include <linux/gpio_keys.h> | 22 | #include <linux/gpio_keys.h> |
| 21 | #include <linux/gpio.h> | 23 | #include <linux/gpio.h> |
| 24 | #include <linux/mfd/da903x.h> | ||
| 25 | #include <linux/regulator/machine.h> | ||
| 26 | #include <linux/spi/spi.h> | ||
| 27 | #include <linux/spi/tdo24m.h> | ||
| 28 | #include <linux/power_supply.h> | ||
| 29 | #include <linux/apm-emulation.h> | ||
| 30 | |||
| 31 | #include <media/soc_camera.h> | ||
| 22 | 32 | ||
| 23 | #include <asm/mach-types.h> | 33 | #include <asm/mach-types.h> |
| 24 | #include <asm/mach/arch.h> | 34 | #include <asm/mach/arch.h> |
| 25 | 35 | ||
| 26 | #include <mach/mfp-pxa27x.h> | 36 | #include <mach/pxa27x.h> |
| 27 | #include <mach/pxa-regs.h> | ||
| 28 | #include <mach/pxa27x-udc.h> | 37 | #include <mach/pxa27x-udc.h> |
| 29 | #include <mach/audio.h> | 38 | #include <mach/audio.h> |
| 30 | #include <mach/pxafb.h> | 39 | #include <mach/pxafb.h> |
| 31 | #include <mach/ohci.h> | 40 | #include <mach/ohci.h> |
| 32 | #include <mach/mmc.h> | 41 | #include <mach/mmc.h> |
| 33 | #include <mach/pxa27x_keypad.h> | 42 | #include <mach/pxa27x_keypad.h> |
| 43 | #include <mach/i2c.h> | ||
| 44 | #include <mach/camera.h> | ||
| 45 | #include <mach/pxa2xx_spi.h> | ||
| 34 | 46 | ||
| 35 | #include "generic.h" | 47 | #include "generic.h" |
| 48 | #include "devices.h" | ||
| 36 | 49 | ||
| 37 | /* GPIO IRQ usage */ | 50 | /* EM-X270 specific GPIOs */ |
| 38 | #define GPIO41_ETHIRQ (41) | ||
| 39 | #define GPIO13_MMC_CD (13) | 51 | #define GPIO13_MMC_CD (13) |
| 52 | #define GPIO95_MMC_WP (95) | ||
| 53 | #define GPIO56_NAND_RB (56) | ||
| 54 | |||
| 55 | /* eXeda specific GPIOs */ | ||
| 56 | #define GPIO114_MMC_CD (114) | ||
| 57 | #define GPIO20_NAND_RB (20) | ||
| 58 | #define GPIO38_SD_PWEN (38) | ||
| 59 | |||
| 60 | /* common GPIOs */ | ||
| 61 | #define GPIO11_NAND_CS (11) | ||
| 62 | #define GPIO93_CAM_RESET (93) | ||
| 63 | #define GPIO41_ETHIRQ (41) | ||
| 40 | #define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ) | 64 | #define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ) |
| 41 | #define EM_X270_MMC_CD IRQ_GPIO(GPIO13_MMC_CD) | ||
| 42 | 65 | ||
| 43 | /* NAND control GPIOs */ | 66 | static int mmc_cd; |
| 44 | #define GPIO11_NAND_CS (11) | 67 | static int nand_rb; |
| 45 | #define GPIO56_NAND_RB (56) | 68 | static int dm9000_flags; |
| 46 | 69 | ||
| 47 | static unsigned long em_x270_pin_config[] = { | 70 | static unsigned long common_pin_config[] = { |
| 48 | /* AC'97 */ | 71 | /* AC'97 */ |
| 49 | GPIO28_AC97_BITCLK, | 72 | GPIO28_AC97_BITCLK, |
| 50 | GPIO29_AC97_SDATA_IN_0, | 73 | GPIO29_AC97_SDATA_IN_0, |
| @@ -150,21 +173,32 @@ static unsigned long em_x270_pin_config[] = { | |||
| 150 | GPIO18_RDY, | 173 | GPIO18_RDY, |
| 151 | 174 | ||
| 152 | /* GPIO */ | 175 | /* GPIO */ |
| 153 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, | 176 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, /* sleep/resume button */ |
| 154 | 177 | ||
| 155 | /* power controls */ | 178 | /* power controls */ |
| 156 | GPIO20_GPIO | MFP_LPM_DRIVE_LOW, /* GPRS_PWEN */ | 179 | GPIO20_GPIO | MFP_LPM_DRIVE_LOW, /* GPRS_PWEN */ |
| 180 | GPIO93_GPIO | MFP_LPM_DRIVE_LOW, /* Camera reset */ | ||
| 157 | GPIO115_GPIO | MFP_LPM_DRIVE_LOW, /* WLAN_PWEN */ | 181 | GPIO115_GPIO | MFP_LPM_DRIVE_LOW, /* WLAN_PWEN */ |
| 158 | 182 | ||
| 159 | /* NAND controls */ | 183 | /* NAND controls */ |
| 160 | GPIO11_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */ | 184 | GPIO11_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */ |
| 161 | GPIO56_GPIO, /* NAND Ready/Busy */ | ||
| 162 | 185 | ||
| 163 | /* interrupts */ | 186 | /* interrupts */ |
| 164 | GPIO13_GPIO, /* MMC card detect */ | ||
| 165 | GPIO41_GPIO, /* DM9000 interrupt */ | 187 | GPIO41_GPIO, /* DM9000 interrupt */ |
| 166 | }; | 188 | }; |
| 167 | 189 | ||
| 190 | static unsigned long em_x270_pin_config[] = { | ||
| 191 | GPIO13_GPIO, /* MMC card detect */ | ||
| 192 | GPIO56_GPIO, /* NAND Ready/Busy */ | ||
| 193 | GPIO95_GPIO, /* MMC Write protect */ | ||
| 194 | }; | ||
| 195 | |||
| 196 | static unsigned long exeda_pin_config[] = { | ||
| 197 | GPIO20_GPIO, /* NAND Ready/Busy */ | ||
| 198 | GPIO38_GPIO | MFP_LPM_DRIVE_LOW, /* SD slot power */ | ||
| 199 | GPIO114_GPIO, /* MMC card detect */ | ||
| 200 | }; | ||
| 201 | |||
| 168 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | 202 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
| 169 | static struct resource em_x270_dm9000_resource[] = { | 203 | static struct resource em_x270_dm9000_resource[] = { |
| 170 | [0] = { | 204 | [0] = { |
| @@ -185,7 +219,7 @@ static struct resource em_x270_dm9000_resource[] = { | |||
| 185 | }; | 219 | }; |
| 186 | 220 | ||
| 187 | static struct dm9000_plat_data em_x270_dm9000_platdata = { | 221 | static struct dm9000_plat_data em_x270_dm9000_platdata = { |
| 188 | .flags = DM9000_PLATF_32BITONLY, | 222 | .flags = DM9000_PLATF_NO_EEPROM, |
| 189 | }; | 223 | }; |
| 190 | 224 | ||
| 191 | static struct platform_device em_x270_dm9000 = { | 225 | static struct platform_device em_x270_dm9000 = { |
| @@ -200,6 +234,7 @@ static struct platform_device em_x270_dm9000 = { | |||
| 200 | 234 | ||
| 201 | static void __init em_x270_init_dm9000(void) | 235 | static void __init em_x270_init_dm9000(void) |
| 202 | { | 236 | { |
| 237 | em_x270_dm9000_platdata.flags |= dm9000_flags; | ||
| 203 | platform_device_register(&em_x270_dm9000); | 238 | platform_device_register(&em_x270_dm9000); |
| 204 | } | 239 | } |
| 205 | #else | 240 | #else |
| @@ -289,7 +324,7 @@ static int em_x270_nand_device_ready(struct mtd_info *mtd) | |||
| 289 | { | 324 | { |
| 290 | dsb(); | 325 | dsb(); |
| 291 | 326 | ||
| 292 | return gpio_get_value(GPIO56_NAND_RB); | 327 | return gpio_get_value(nand_rb); |
| 293 | } | 328 | } |
| 294 | 329 | ||
| 295 | static struct mtd_partition em_x270_partition_info[] = { | 330 | static struct mtd_partition em_x270_partition_info[] = { |
| @@ -354,14 +389,14 @@ static void __init em_x270_init_nand(void) | |||
| 354 | 389 | ||
| 355 | gpio_direction_output(GPIO11_NAND_CS, 1); | 390 | gpio_direction_output(GPIO11_NAND_CS, 1); |
| 356 | 391 | ||
| 357 | err = gpio_request(GPIO56_NAND_RB, "NAND R/B"); | 392 | err = gpio_request(nand_rb, "NAND R/B"); |
| 358 | if (err) { | 393 | if (err) { |
| 359 | pr_warning("EM-X270: failed to request NAND R/B gpio\n"); | 394 | pr_warning("EM-X270: failed to request NAND R/B gpio\n"); |
| 360 | gpio_free(GPIO11_NAND_CS); | 395 | gpio_free(GPIO11_NAND_CS); |
| 361 | return; | 396 | return; |
| 362 | } | 397 | } |
| 363 | 398 | ||
| 364 | gpio_direction_input(GPIO56_NAND_RB); | 399 | gpio_direction_input(nand_rb); |
| 365 | 400 | ||
| 366 | platform_device_register(&em_x270_nand); | 401 | platform_device_register(&em_x270_nand); |
| 367 | } | 402 | } |
| @@ -369,6 +404,61 @@ static void __init em_x270_init_nand(void) | |||
| 369 | static inline void em_x270_init_nand(void) {} | 404 | static inline void em_x270_init_nand(void) {} |
| 370 | #endif | 405 | #endif |
| 371 | 406 | ||
| 407 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) | ||
| 408 | static struct mtd_partition em_x270_nor_parts[] = { | ||
| 409 | { | ||
| 410 | .name = "Bootloader", | ||
| 411 | .offset = 0x00000000, | ||
| 412 | .size = 0x00050000, | ||
| 413 | .mask_flags = MTD_WRITEABLE /* force read-only */ | ||
| 414 | }, { | ||
| 415 | .name = "Environment", | ||
| 416 | .offset = 0x00050000, | ||
| 417 | .size = 0x00010000, | ||
| 418 | }, { | ||
| 419 | .name = "Reserved", | ||
| 420 | .offset = 0x00060000, | ||
| 421 | .size = 0x00050000, | ||
| 422 | .mask_flags = MTD_WRITEABLE /* force read-only */ | ||
| 423 | }, { | ||
| 424 | .name = "Splashscreen", | ||
| 425 | .offset = 0x000b0000, | ||
| 426 | .size = 0x00050000, | ||
| 427 | } | ||
| 428 | }; | ||
| 429 | |||
| 430 | static struct physmap_flash_data em_x270_nor_data[] = { | ||
| 431 | [0] = { | ||
| 432 | .width = 2, | ||
| 433 | .parts = em_x270_nor_parts, | ||
| 434 | .nr_parts = ARRAY_SIZE(em_x270_nor_parts), | ||
| 435 | }, | ||
| 436 | }; | ||
| 437 | |||
| 438 | static struct resource em_x270_nor_flash_resource = { | ||
| 439 | .start = PXA_CS0_PHYS, | ||
| 440 | .end = PXA_CS0_PHYS + SZ_1M - 1, | ||
| 441 | .flags = IORESOURCE_MEM, | ||
| 442 | }; | ||
| 443 | |||
| 444 | static struct platform_device em_x270_physmap_flash = { | ||
| 445 | .name = "physmap-flash", | ||
| 446 | .id = 0, | ||
| 447 | .num_resources = 1, | ||
| 448 | .resource = &em_x270_nor_flash_resource, | ||
| 449 | .dev = { | ||
| 450 | .platform_data = &em_x270_nor_data, | ||
| 451 | }, | ||
| 452 | }; | ||
| 453 | |||
| 454 | static void __init em_x270_init_nor(void) | ||
| 455 | { | ||
| 456 | platform_device_register(&em_x270_physmap_flash); | ||
| 457 | } | ||
| 458 | #else | ||
| 459 | static inline void em_x270_init_nor(void) {} | ||
| 460 | #endif | ||
| 461 | |||
| 372 | /* PXA27x OHCI controller setup */ | 462 | /* PXA27x OHCI controller setup */ |
| 373 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | 463 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
| 374 | static int em_x270_ohci_init(struct device *dev) | 464 | static int em_x270_ohci_init(struct device *dev) |
| @@ -395,40 +485,93 @@ static inline void em_x270_init_ohci(void) {} | |||
| 395 | 485 | ||
| 396 | /* MCI controller setup */ | 486 | /* MCI controller setup */ |
| 397 | #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) | 487 | #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) |
| 488 | static struct regulator *em_x270_sdio_ldo; | ||
| 489 | |||
| 398 | static int em_x270_mci_init(struct device *dev, | 490 | static int em_x270_mci_init(struct device *dev, |
| 399 | irq_handler_t em_x270_detect_int, | 491 | irq_handler_t em_x270_detect_int, |
| 400 | void *data) | 492 | void *data) |
| 401 | { | 493 | { |
| 402 | int err = request_irq(EM_X270_MMC_CD, em_x270_detect_int, | 494 | int err; |
| 403 | IRQF_DISABLED | IRQF_TRIGGER_FALLING, | 495 | |
| 496 | em_x270_sdio_ldo = regulator_get(dev, "vcc sdio"); | ||
| 497 | if (IS_ERR(em_x270_sdio_ldo)) { | ||
| 498 | dev_err(dev, "can't request SDIO power supply: %ld\n", | ||
| 499 | PTR_ERR(em_x270_sdio_ldo)); | ||
| 500 | return PTR_ERR(em_x270_sdio_ldo); | ||
| 501 | } | ||
| 502 | |||
| 503 | err = request_irq(gpio_to_irq(mmc_cd), em_x270_detect_int, | ||
| 504 | IRQF_DISABLED | IRQF_TRIGGER_RISING | | ||
| 505 | IRQF_TRIGGER_FALLING, | ||
| 404 | "MMC card detect", data); | 506 | "MMC card detect", data); |
| 405 | if (err) { | 507 | if (err) { |
| 406 | printk(KERN_ERR "%s: can't request MMC card detect IRQ: %d\n", | 508 | dev_err(dev, "can't request MMC card detect IRQ: %d\n", err); |
| 407 | __func__, err); | 509 | goto err_irq; |
| 408 | return err; | 510 | } |
| 511 | |||
| 512 | if (machine_is_em_x270()) { | ||
| 513 | err = gpio_request(GPIO95_MMC_WP, "MMC WP"); | ||
| 514 | if (err) { | ||
| 515 | dev_err(dev, "can't request MMC write protect: %d\n", | ||
| 516 | err); | ||
| 517 | goto err_gpio_wp; | ||
| 518 | } | ||
| 519 | gpio_direction_input(GPIO95_MMC_WP); | ||
| 520 | } else { | ||
| 521 | err = gpio_request(GPIO38_SD_PWEN, "sdio power"); | ||
| 522 | if (err) { | ||
| 523 | dev_err(dev, "can't request MMC power control : %d\n", | ||
| 524 | err); | ||
| 525 | goto err_gpio_wp; | ||
| 526 | } | ||
| 527 | gpio_direction_output(GPIO38_SD_PWEN, 1); | ||
| 409 | } | 528 | } |
| 410 | 529 | ||
| 411 | return 0; | 530 | return 0; |
| 531 | |||
| 532 | err_gpio_wp: | ||
| 533 | free_irq(gpio_to_irq(mmc_cd), data); | ||
| 534 | err_irq: | ||
| 535 | regulator_put(em_x270_sdio_ldo); | ||
| 536 | |||
| 537 | return err; | ||
| 412 | } | 538 | } |
| 413 | 539 | ||
| 414 | static void em_x270_mci_setpower(struct device *dev, unsigned int vdd) | 540 | static void em_x270_mci_setpower(struct device *dev, unsigned int vdd) |
| 415 | { | 541 | { |
| 416 | /* | 542 | struct pxamci_platform_data* p_d = dev->platform_data; |
| 417 | FIXME: current hardware implementation does not allow to | 543 | |
| 418 | enable/disable MMC power. This will be fixed in next HW releases, | 544 | if ((1 << vdd) & p_d->ocr_mask) { |
| 419 | and we'll need to add implmentation here. | 545 | int vdd_uV = (2000 + (vdd - __ffs(MMC_VDD_20_21)) * 100) * 1000; |
| 420 | */ | 546 | |
| 421 | return; | 547 | regulator_set_voltage(em_x270_sdio_ldo, vdd_uV, vdd_uV); |
| 548 | regulator_enable(em_x270_sdio_ldo); | ||
| 549 | } else { | ||
| 550 | regulator_disable(em_x270_sdio_ldo); | ||
| 551 | } | ||
| 422 | } | 552 | } |
| 423 | 553 | ||
| 424 | static void em_x270_mci_exit(struct device *dev, void *data) | 554 | static void em_x270_mci_exit(struct device *dev, void *data) |
| 425 | { | 555 | { |
| 426 | int irq = gpio_to_irq(GPIO13_MMC_CD); | 556 | free_irq(gpio_to_irq(mmc_cd), data); |
| 427 | free_irq(irq, data); | 557 | regulator_put(em_x270_sdio_ldo); |
| 558 | |||
| 559 | if (machine_is_em_x270()) | ||
| 560 | gpio_free(GPIO95_MMC_WP); | ||
| 561 | else | ||
| 562 | gpio_free(GPIO38_SD_PWEN); | ||
| 563 | } | ||
| 564 | |||
| 565 | static int em_x270_mci_get_ro(struct device *dev) | ||
| 566 | { | ||
| 567 | return gpio_get_value(GPIO95_MMC_WP); | ||
| 428 | } | 568 | } |
| 429 | 569 | ||
| 430 | static struct pxamci_platform_data em_x270_mci_platform_data = { | 570 | static struct pxamci_platform_data em_x270_mci_platform_data = { |
| 431 | .ocr_mask = MMC_VDD_28_29|MMC_VDD_29_30|MMC_VDD_30_31, | 571 | .ocr_mask = MMC_VDD_20_21|MMC_VDD_21_22|MMC_VDD_22_23| |
| 572 | MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27| | ||
| 573 | MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30| | ||
| 574 | MMC_VDD_30_31|MMC_VDD_31_32, | ||
| 432 | .init = em_x270_mci_init, | 575 | .init = em_x270_mci_init, |
| 433 | .setpower = em_x270_mci_setpower, | 576 | .setpower = em_x270_mci_setpower, |
| 434 | .exit = em_x270_mci_exit, | 577 | .exit = em_x270_mci_exit, |
| @@ -436,33 +579,53 @@ static struct pxamci_platform_data em_x270_mci_platform_data = { | |||
| 436 | 579 | ||
| 437 | static void __init em_x270_init_mmc(void) | 580 | static void __init em_x270_init_mmc(void) |
| 438 | { | 581 | { |
| 582 | if (machine_is_em_x270()) | ||
| 583 | em_x270_mci_platform_data.get_ro = em_x270_mci_get_ro; | ||
| 584 | |||
| 585 | em_x270_mci_platform_data.detect_delay = msecs_to_jiffies(250); | ||
| 439 | pxa_set_mci_info(&em_x270_mci_platform_data); | 586 | pxa_set_mci_info(&em_x270_mci_platform_data); |
| 440 | } | 587 | } |
| 441 | #else | 588 | #else |
| 442 | static inline void em_x270_init_mmc(void) {} | 589 | static inline void em_x270_init_mmc(void) {} |
| 443 | #endif | 590 | #endif |
| 444 | 591 | ||
| 445 | /* LCD 480x640 */ | 592 | /* LCD */ |
| 446 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) | 593 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
| 447 | static struct pxafb_mode_info em_x270_lcd_mode = { | 594 | static struct pxafb_mode_info em_x270_lcd_modes[] = { |
| 448 | .pixclock = 50000, | 595 | [0] = { |
| 449 | .bpp = 16, | 596 | .pixclock = 38250, |
| 450 | .xres = 480, | 597 | .bpp = 16, |
| 451 | .yres = 640, | 598 | .xres = 480, |
| 452 | .hsync_len = 8, | 599 | .yres = 640, |
| 453 | .vsync_len = 2, | 600 | .hsync_len = 8, |
| 454 | .left_margin = 8, | 601 | .vsync_len = 2, |
| 455 | .upper_margin = 0, | 602 | .left_margin = 8, |
| 456 | .right_margin = 24, | 603 | .upper_margin = 2, |
| 457 | .lower_margin = 4, | 604 | .right_margin = 24, |
| 458 | .cmap_greyscale = 0, | 605 | .lower_margin = 4, |
| 606 | .sync = 0, | ||
| 607 | }, | ||
| 608 | [1] = { | ||
| 609 | .pixclock = 153800, | ||
| 610 | .bpp = 16, | ||
| 611 | .xres = 240, | ||
| 612 | .yres = 320, | ||
| 613 | .hsync_len = 8, | ||
| 614 | .vsync_len = 2, | ||
| 615 | .left_margin = 8, | ||
| 616 | .upper_margin = 2, | ||
| 617 | .right_margin = 88, | ||
| 618 | .lower_margin = 2, | ||
| 619 | .sync = 0, | ||
| 620 | }, | ||
| 459 | }; | 621 | }; |
| 460 | 622 | ||
| 461 | static struct pxafb_mach_info em_x270_lcd = { | 623 | static struct pxafb_mach_info em_x270_lcd = { |
| 462 | .modes = &em_x270_lcd_mode, | 624 | .modes = em_x270_lcd_modes, |
| 463 | .num_modes = 1, | 625 | .num_modes = 2, |
| 464 | .lcd_conn = LCD_COLOR_TFT_16BPP, | 626 | .lcd_conn = LCD_COLOR_TFT_16BPP, |
| 465 | }; | 627 | }; |
| 628 | |||
| 466 | static void __init em_x270_init_lcd(void) | 629 | static void __init em_x270_init_lcd(void) |
| 467 | { | 630 | { |
| 468 | set_pxa_fb_info(&em_x270_lcd); | 631 | set_pxa_fb_info(&em_x270_lcd); |
| @@ -471,6 +634,40 @@ static void __init em_x270_init_lcd(void) | |||
| 471 | static inline void em_x270_init_lcd(void) {} | 634 | static inline void em_x270_init_lcd(void) {} |
| 472 | #endif | 635 | #endif |
| 473 | 636 | ||
| 637 | #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) | ||
| 638 | static struct pxa2xx_spi_master em_x270_spi_info = { | ||
| 639 | .num_chipselect = 1, | ||
| 640 | }; | ||
| 641 | |||
| 642 | static struct pxa2xx_spi_chip em_x270_tdo24m_chip = { | ||
| 643 | .rx_threshold = 1, | ||
| 644 | .tx_threshold = 1, | ||
| 645 | }; | ||
| 646 | |||
| 647 | static struct tdo24m_platform_data em_x270_tdo24m_pdata = { | ||
| 648 | .model = TDO35S, | ||
| 649 | }; | ||
| 650 | |||
| 651 | static struct spi_board_info em_x270_spi_devices[] __initdata = { | ||
| 652 | { | ||
| 653 | .modalias = "tdo24m", | ||
| 654 | .max_speed_hz = 1000000, | ||
| 655 | .bus_num = 1, | ||
| 656 | .chip_select = 0, | ||
| 657 | .controller_data = &em_x270_tdo24m_chip, | ||
| 658 | .platform_data = &em_x270_tdo24m_pdata, | ||
| 659 | }, | ||
| 660 | }; | ||
| 661 | |||
| 662 | static void __init em_x270_init_spi(void) | ||
| 663 | { | ||
| 664 | pxa2xx_set_spi_info(1, &em_x270_spi_info); | ||
| 665 | spi_register_board_info(ARRAY_AND_SIZE(em_x270_spi_devices)); | ||
| 666 | } | ||
| 667 | #else | ||
| 668 | static inline void em_x270_init_spi(void) {} | ||
| 669 | #endif | ||
| 670 | |||
| 474 | #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE) | 671 | #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE) |
| 475 | static void __init em_x270_init_ac97(void) | 672 | static void __init em_x270_init_ac97(void) |
| 476 | { | 673 | { |
| @@ -481,23 +678,76 @@ static inline void em_x270_init_ac97(void) {} | |||
| 481 | #endif | 678 | #endif |
| 482 | 679 | ||
| 483 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) | 680 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) |
| 484 | static unsigned int em_x270_matrix_keys[] = { | 681 | static unsigned int em_x270_module_matrix_keys[] = { |
| 485 | KEY(0, 0, KEY_A), KEY(1, 0, KEY_UP), KEY(2, 1, KEY_B), | 682 | KEY(0, 0, KEY_A), KEY(1, 0, KEY_UP), KEY(2, 1, KEY_B), |
| 486 | KEY(0, 2, KEY_LEFT), KEY(1, 1, KEY_ENTER), KEY(2, 0, KEY_RIGHT), | 683 | KEY(0, 2, KEY_LEFT), KEY(1, 1, KEY_ENTER), KEY(2, 0, KEY_RIGHT), |
| 487 | KEY(0, 1, KEY_C), KEY(1, 2, KEY_DOWN), KEY(2, 2, KEY_D), | 684 | KEY(0, 1, KEY_C), KEY(1, 2, KEY_DOWN), KEY(2, 2, KEY_D), |
| 488 | }; | 685 | }; |
| 489 | 686 | ||
| 490 | struct pxa27x_keypad_platform_data em_x270_keypad_info = { | 687 | struct pxa27x_keypad_platform_data em_x270_module_keypad_info = { |
| 491 | /* code map for the matrix keys */ | 688 | /* code map for the matrix keys */ |
| 492 | .matrix_key_rows = 3, | 689 | .matrix_key_rows = 3, |
| 493 | .matrix_key_cols = 3, | 690 | .matrix_key_cols = 3, |
| 494 | .matrix_key_map = em_x270_matrix_keys, | 691 | .matrix_key_map = em_x270_module_matrix_keys, |
| 495 | .matrix_key_map_size = ARRAY_SIZE(em_x270_matrix_keys), | 692 | .matrix_key_map_size = ARRAY_SIZE(em_x270_module_matrix_keys), |
| 693 | }; | ||
| 694 | |||
| 695 | static unsigned int em_x270_exeda_matrix_keys[] = { | ||
| 696 | KEY(0, 0, KEY_RIGHTSHIFT), KEY(0, 1, KEY_RIGHTCTRL), | ||
| 697 | KEY(0, 2, KEY_RIGHTALT), KEY(0, 3, KEY_SPACE), | ||
| 698 | KEY(0, 4, KEY_LEFTALT), KEY(0, 5, KEY_LEFTCTRL), | ||
| 699 | KEY(0, 6, KEY_ENTER), KEY(0, 7, KEY_SLASH), | ||
| 700 | |||
| 701 | KEY(1, 0, KEY_DOT), KEY(1, 1, KEY_M), | ||
| 702 | KEY(1, 2, KEY_N), KEY(1, 3, KEY_B), | ||
| 703 | KEY(1, 4, KEY_V), KEY(1, 5, KEY_C), | ||
| 704 | KEY(1, 6, KEY_X), KEY(1, 7, KEY_Z), | ||
| 705 | |||
| 706 | KEY(2, 0, KEY_LEFTSHIFT), KEY(2, 1, KEY_SEMICOLON), | ||
| 707 | KEY(2, 2, KEY_L), KEY(2, 3, KEY_K), | ||
| 708 | KEY(2, 4, KEY_J), KEY(2, 5, KEY_H), | ||
| 709 | KEY(2, 6, KEY_G), KEY(2, 7, KEY_F), | ||
| 710 | |||
| 711 | KEY(3, 0, KEY_D), KEY(3, 1, KEY_S), | ||
| 712 | KEY(3, 2, KEY_A), KEY(3, 3, KEY_TAB), | ||
| 713 | KEY(3, 4, KEY_BACKSPACE), KEY(3, 5, KEY_P), | ||
| 714 | KEY(3, 6, KEY_O), KEY(3, 7, KEY_I), | ||
| 715 | |||
| 716 | KEY(4, 0, KEY_U), KEY(4, 1, KEY_Y), | ||
| 717 | KEY(4, 2, KEY_T), KEY(4, 3, KEY_R), | ||
| 718 | KEY(4, 4, KEY_E), KEY(4, 5, KEY_W), | ||
| 719 | KEY(4, 6, KEY_Q), KEY(4, 7, KEY_MINUS), | ||
| 720 | |||
| 721 | KEY(5, 0, KEY_0), KEY(5, 1, KEY_9), | ||
| 722 | KEY(5, 2, KEY_8), KEY(5, 3, KEY_7), | ||
| 723 | KEY(5, 4, KEY_6), KEY(5, 5, KEY_5), | ||
| 724 | KEY(5, 6, KEY_4), KEY(5, 7, KEY_3), | ||
| 725 | |||
| 726 | KEY(6, 0, KEY_2), KEY(6, 1, KEY_1), | ||
| 727 | KEY(6, 2, KEY_ENTER), KEY(6, 3, KEY_END), | ||
| 728 | KEY(6, 4, KEY_DOWN), KEY(6, 5, KEY_UP), | ||
| 729 | KEY(6, 6, KEY_MENU), KEY(6, 7, KEY_F1), | ||
| 730 | |||
| 731 | KEY(7, 0, KEY_LEFT), KEY(7, 1, KEY_RIGHT), | ||
| 732 | KEY(7, 2, KEY_BACK), KEY(7, 3, KEY_HOME), | ||
| 733 | KEY(7, 4, 0), KEY(7, 5, 0), | ||
| 734 | KEY(7, 6, 0), KEY(7, 7, 0), | ||
| 735 | }; | ||
| 736 | |||
| 737 | struct pxa27x_keypad_platform_data em_x270_exeda_keypad_info = { | ||
| 738 | /* code map for the matrix keys */ | ||
| 739 | .matrix_key_rows = 8, | ||
| 740 | .matrix_key_cols = 8, | ||
| 741 | .matrix_key_map = em_x270_exeda_matrix_keys, | ||
| 742 | .matrix_key_map_size = ARRAY_SIZE(em_x270_exeda_matrix_keys), | ||
| 496 | }; | 743 | }; |
| 497 | 744 | ||
| 498 | static void __init em_x270_init_keypad(void) | 745 | static void __init em_x270_init_keypad(void) |
| 499 | { | 746 | { |
| 500 | pxa_set_keypad_info(&em_x270_keypad_info); | 747 | if (machine_is_em_x270()) |
| 748 | pxa_set_keypad_info(&em_x270_module_keypad_info); | ||
| 749 | else | ||
| 750 | pxa_set_keypad_info(&em_x270_exeda_keypad_info); | ||
| 501 | } | 751 | } |
| 502 | #else | 752 | #else |
| 503 | static inline void em_x270_init_keypad(void) {} | 753 | static inline void em_x270_init_keypad(void) {} |
| @@ -535,19 +785,264 @@ static void __init em_x270_init_gpio_keys(void) | |||
| 535 | static inline void em_x270_init_gpio_keys(void) {} | 785 | static inline void em_x270_init_gpio_keys(void) {} |
| 536 | #endif | 786 | #endif |
| 537 | 787 | ||
| 538 | static void __init em_x270_init(void) | 788 | /* Quick Capture Interface and sensor setup */ |
| 789 | #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE) | ||
| 790 | static struct regulator *em_x270_camera_ldo; | ||
| 791 | |||
| 792 | static int em_x270_sensor_init(struct device *dev) | ||
| 539 | { | 793 | { |
| 794 | int ret; | ||
| 795 | |||
| 796 | ret = gpio_request(GPIO93_CAM_RESET, "camera reset"); | ||
| 797 | if (ret) | ||
| 798 | return ret; | ||
| 799 | |||
| 800 | gpio_direction_output(GPIO93_CAM_RESET, 0); | ||
| 801 | |||
| 802 | em_x270_camera_ldo = regulator_get(NULL, "vcc cam"); | ||
| 803 | if (em_x270_camera_ldo == NULL) { | ||
| 804 | gpio_free(GPIO93_CAM_RESET); | ||
| 805 | return -ENODEV; | ||
| 806 | } | ||
| 807 | |||
| 808 | ret = regulator_enable(em_x270_camera_ldo); | ||
| 809 | if (ret) { | ||
| 810 | regulator_put(em_x270_camera_ldo); | ||
| 811 | gpio_free(GPIO93_CAM_RESET); | ||
| 812 | return ret; | ||
| 813 | } | ||
| 814 | |||
| 815 | gpio_set_value(GPIO93_CAM_RESET, 1); | ||
| 816 | |||
| 817 | return 0; | ||
| 818 | } | ||
| 819 | |||
| 820 | struct pxacamera_platform_data em_x270_camera_platform_data = { | ||
| 821 | .init = em_x270_sensor_init, | ||
| 822 | .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | | ||
| 823 | PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, | ||
| 824 | .mclk_10khz = 2600, | ||
| 825 | }; | ||
| 826 | |||
| 827 | static int em_x270_sensor_power(struct device *dev, int on) | ||
| 828 | { | ||
| 829 | int ret; | ||
| 830 | int is_on = regulator_is_enabled(em_x270_camera_ldo); | ||
| 831 | |||
| 832 | if (on == is_on) | ||
| 833 | return 0; | ||
| 834 | |||
| 835 | gpio_set_value(GPIO93_CAM_RESET, !on); | ||
| 836 | |||
| 837 | if (on) | ||
| 838 | ret = regulator_enable(em_x270_camera_ldo); | ||
| 839 | else | ||
| 840 | ret = regulator_disable(em_x270_camera_ldo); | ||
| 841 | |||
| 842 | if (ret) | ||
| 843 | return ret; | ||
| 844 | |||
| 845 | gpio_set_value(GPIO93_CAM_RESET, on); | ||
| 846 | |||
| 847 | return 0; | ||
| 848 | } | ||
| 849 | |||
| 850 | static struct soc_camera_link iclink = { | ||
| 851 | .bus_id = 0, | ||
| 852 | .power = em_x270_sensor_power, | ||
| 853 | }; | ||
| 854 | |||
| 855 | static struct i2c_board_info em_x270_i2c_cam_info[] = { | ||
| 856 | { | ||
| 857 | I2C_BOARD_INFO("mt9m111", 0x48), | ||
| 858 | .platform_data = &iclink, | ||
| 859 | }, | ||
| 860 | }; | ||
| 861 | |||
| 862 | static struct i2c_pxa_platform_data em_x270_i2c_info = { | ||
| 863 | .fast_mode = 1, | ||
| 864 | }; | ||
| 865 | |||
| 866 | static void __init em_x270_init_camera(void) | ||
| 867 | { | ||
| 868 | pxa_set_i2c_info(&em_x270_i2c_info); | ||
| 869 | i2c_register_board_info(0, ARRAY_AND_SIZE(em_x270_i2c_cam_info)); | ||
| 870 | pxa_set_camera_info(&em_x270_camera_platform_data); | ||
| 871 | } | ||
| 872 | #else | ||
| 873 | static inline void em_x270_init_camera(void) {} | ||
| 874 | #endif | ||
| 875 | |||
| 876 | /* DA9030 related initializations */ | ||
| 877 | #define REGULATOR_CONSUMER(_name, _dev, _supply) \ | ||
| 878 | static struct regulator_consumer_supply _name##_consumers[] = { \ | ||
| 879 | { \ | ||
| 880 | .dev = _dev, \ | ||
| 881 | .supply = _supply, \ | ||
| 882 | }, \ | ||
| 883 | } | ||
| 884 | |||
| 885 | REGULATOR_CONSUMER(ldo3, NULL, "vcc gps"); | ||
| 886 | REGULATOR_CONSUMER(ldo5, NULL, "vcc cam"); | ||
| 887 | REGULATOR_CONSUMER(ldo10, &pxa_device_mci.dev, "vcc sdio"); | ||
| 888 | REGULATOR_CONSUMER(ldo12, NULL, "vcc usb"); | ||
| 889 | REGULATOR_CONSUMER(ldo19, NULL, "vcc gprs"); | ||
| 890 | |||
| 891 | #define REGULATOR_INIT(_ldo, _min_uV, _max_uV, _ops_mask) \ | ||
| 892 | static struct regulator_init_data _ldo##_data = { \ | ||
| 893 | .constraints = { \ | ||
| 894 | .min_uV = _min_uV, \ | ||
| 895 | .max_uV = _max_uV, \ | ||
| 896 | .state_mem = { \ | ||
| 897 | .enabled = 0, \ | ||
| 898 | }, \ | ||
| 899 | .valid_ops_mask = _ops_mask, \ | ||
| 900 | }, \ | ||
| 901 | .num_consumer_supplies = ARRAY_SIZE(_ldo##_consumers), \ | ||
| 902 | .consumer_supplies = _ldo##_consumers, \ | ||
| 903 | }; | ||
| 904 | |||
| 905 | REGULATOR_INIT(ldo3, 3200000, 3200000, REGULATOR_CHANGE_STATUS); | ||
| 906 | REGULATOR_INIT(ldo5, 3000000, 3000000, REGULATOR_CHANGE_STATUS); | ||
| 907 | REGULATOR_INIT(ldo10, 2000000, 3200000, | ||
| 908 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE); | ||
| 909 | REGULATOR_INIT(ldo12, 3000000, 3000000, REGULATOR_CHANGE_STATUS); | ||
| 910 | REGULATOR_INIT(ldo19, 3200000, 3200000, REGULATOR_CHANGE_STATUS); | ||
| 911 | |||
| 912 | struct led_info em_x270_led_info = { | ||
| 913 | .name = "em-x270:orange", | ||
| 914 | .default_trigger = "battery-charging-or-full", | ||
| 915 | }; | ||
| 916 | |||
| 917 | struct power_supply_info em_x270_psy_info = { | ||
| 918 | .name = "LP555597P6H-FPS", | ||
| 919 | .technology = POWER_SUPPLY_TECHNOLOGY_LIPO, | ||
| 920 | .voltage_max_design = 4200000, | ||
| 921 | .voltage_min_design = 3000000, | ||
| 922 | .use_for_apm = 1, | ||
| 923 | }; | ||
| 924 | |||
| 925 | static void em_x270_battery_low(void) | ||
| 926 | { | ||
| 927 | apm_queue_event(APM_LOW_BATTERY); | ||
| 928 | } | ||
| 929 | |||
| 930 | static void em_x270_battery_critical(void) | ||
| 931 | { | ||
| 932 | apm_queue_event(APM_CRITICAL_SUSPEND); | ||
| 933 | } | ||
| 934 | |||
| 935 | struct da9030_battery_info em_x270_batterty_info = { | ||
| 936 | .battery_info = &em_x270_psy_info, | ||
| 937 | |||
| 938 | .charge_milliamp = 1000, | ||
| 939 | .charge_millivolt = 4200, | ||
| 940 | |||
| 941 | .vbat_low = 3600, | ||
| 942 | .vbat_crit = 3400, | ||
| 943 | .vbat_charge_start = 4100, | ||
| 944 | .vbat_charge_stop = 4200, | ||
| 945 | .vbat_charge_restart = 4000, | ||
| 946 | |||
| 947 | .vcharge_min = 3200, | ||
| 948 | .vcharge_max = 5500, | ||
| 949 | |||
| 950 | .tbat_low = 197, | ||
| 951 | .tbat_high = 78, | ||
| 952 | .tbat_restart = 100, | ||
| 953 | |||
| 954 | .batmon_interval = 0, | ||
| 955 | |||
| 956 | .battery_low = em_x270_battery_low, | ||
| 957 | .battery_critical = em_x270_battery_critical, | ||
| 958 | }; | ||
| 959 | |||
| 960 | #define DA9030_SUBDEV(_name, _id, _pdata) \ | ||
| 961 | { \ | ||
| 962 | .name = "da903x-" #_name, \ | ||
| 963 | .id = DA9030_ID_##_id, \ | ||
| 964 | .platform_data = _pdata, \ | ||
| 965 | } | ||
| 966 | |||
| 967 | #define DA9030_LDO(num) DA9030_SUBDEV(regulator, LDO##num, &ldo##num##_data) | ||
| 968 | |||
| 969 | struct da903x_subdev_info em_x270_da9030_subdevs[] = { | ||
| 970 | DA9030_LDO(3), | ||
| 971 | DA9030_LDO(5), | ||
| 972 | DA9030_LDO(10), | ||
| 973 | DA9030_LDO(12), | ||
| 974 | DA9030_LDO(19), | ||
| 975 | |||
| 976 | DA9030_SUBDEV(led, LED_PC, &em_x270_led_info), | ||
| 977 | DA9030_SUBDEV(backlight, WLED, &em_x270_led_info), | ||
| 978 | DA9030_SUBDEV(battery, BAT, &em_x270_batterty_info), | ||
| 979 | }; | ||
| 980 | |||
| 981 | static struct da903x_platform_data em_x270_da9030_info = { | ||
| 982 | .num_subdevs = ARRAY_SIZE(em_x270_da9030_subdevs), | ||
| 983 | .subdevs = em_x270_da9030_subdevs, | ||
| 984 | }; | ||
| 985 | |||
| 986 | static struct i2c_board_info em_x270_i2c_pmic_info = { | ||
| 987 | I2C_BOARD_INFO("da9030", 0x49), | ||
| 988 | .irq = IRQ_GPIO(0), | ||
| 989 | .platform_data = &em_x270_da9030_info, | ||
| 990 | }; | ||
| 991 | |||
| 992 | static struct i2c_pxa_platform_data em_x270_pwr_i2c_info = { | ||
| 993 | .use_pio = 1, | ||
| 994 | }; | ||
| 995 | |||
| 996 | static void __init em_x270_init_da9030(void) | ||
| 997 | { | ||
| 998 | pxa27x_set_i2c_power_info(&em_x270_pwr_i2c_info); | ||
| 999 | i2c_register_board_info(1, &em_x270_i2c_pmic_info, 1); | ||
| 1000 | } | ||
| 1001 | |||
| 1002 | static void __init em_x270_module_init(void) | ||
| 1003 | { | ||
| 1004 | pr_info("%s\n", __func__); | ||
| 540 | pxa2xx_mfp_config(ARRAY_AND_SIZE(em_x270_pin_config)); | 1005 | pxa2xx_mfp_config(ARRAY_AND_SIZE(em_x270_pin_config)); |
| 541 | 1006 | ||
| 1007 | mmc_cd = GPIO13_MMC_CD; | ||
| 1008 | nand_rb = GPIO56_NAND_RB; | ||
| 1009 | dm9000_flags = DM9000_PLATF_32BITONLY; | ||
| 1010 | } | ||
| 1011 | |||
| 1012 | static void __init em_x270_exeda_init(void) | ||
| 1013 | { | ||
| 1014 | pr_info("%s\n", __func__); | ||
| 1015 | pxa2xx_mfp_config(ARRAY_AND_SIZE(exeda_pin_config)); | ||
| 1016 | |||
| 1017 | mmc_cd = GPIO114_MMC_CD; | ||
| 1018 | nand_rb = GPIO20_NAND_RB; | ||
| 1019 | dm9000_flags = DM9000_PLATF_16BITONLY; | ||
| 1020 | } | ||
| 1021 | |||
| 1022 | static void __init em_x270_init(void) | ||
| 1023 | { | ||
| 1024 | pxa2xx_mfp_config(ARRAY_AND_SIZE(common_pin_config)); | ||
| 1025 | |||
| 1026 | if (machine_is_em_x270()) | ||
| 1027 | em_x270_module_init(); | ||
| 1028 | else if (machine_is_exeda()) | ||
| 1029 | em_x270_exeda_init(); | ||
| 1030 | else | ||
| 1031 | panic("Unsupported machine: %d\n", machine_arch_type); | ||
| 1032 | |||
| 1033 | em_x270_init_da9030(); | ||
| 542 | em_x270_init_dm9000(); | 1034 | em_x270_init_dm9000(); |
| 543 | em_x270_init_rtc(); | 1035 | em_x270_init_rtc(); |
| 544 | em_x270_init_nand(); | 1036 | em_x270_init_nand(); |
| 1037 | em_x270_init_nor(); | ||
| 545 | em_x270_init_lcd(); | 1038 | em_x270_init_lcd(); |
| 546 | em_x270_init_mmc(); | 1039 | em_x270_init_mmc(); |
| 547 | em_x270_init_ohci(); | 1040 | em_x270_init_ohci(); |
| 548 | em_x270_init_keypad(); | 1041 | em_x270_init_keypad(); |
| 549 | em_x270_init_gpio_keys(); | 1042 | em_x270_init_gpio_keys(); |
| 550 | em_x270_init_ac97(); | 1043 | em_x270_init_ac97(); |
| 1044 | em_x270_init_camera(); | ||
| 1045 | em_x270_init_spi(); | ||
| 551 | } | 1046 | } |
| 552 | 1047 | ||
| 553 | MACHINE_START(EM_X270, "Compulab EM-X270") | 1048 | MACHINE_START(EM_X270, "Compulab EM-X270") |
| @@ -559,3 +1054,13 @@ MACHINE_START(EM_X270, "Compulab EM-X270") | |||
| 559 | .timer = &pxa_timer, | 1054 | .timer = &pxa_timer, |
| 560 | .init_machine = em_x270_init, | 1055 | .init_machine = em_x270_init, |
| 561 | MACHINE_END | 1056 | MACHINE_END |
| 1057 | |||
| 1058 | MACHINE_START(EXEDA, "Compulab eXeda") | ||
| 1059 | .boot_params = 0xa0000100, | ||
| 1060 | .phys_io = 0x40000000, | ||
| 1061 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 1062 | .map_io = pxa_map_io, | ||
| 1063 | .init_irq = pxa27x_init_irq, | ||
| 1064 | .timer = &pxa_timer, | ||
| 1065 | .init_machine = em_x270_init, | ||
| 1066 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index dfce7d5b659e..c60dadf847a6 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c | |||
| @@ -20,8 +20,7 @@ | |||
| 20 | #include <asm/mach/arch.h> | 20 | #include <asm/mach/arch.h> |
| 21 | #include <asm/mach-types.h> | 21 | #include <asm/mach-types.h> |
| 22 | 22 | ||
| 23 | #include <mach/mfp-pxa25x.h> | 23 | #include <mach/pxa25x.h> |
| 24 | #include <mach/hardware.h> | ||
| 25 | #include <mach/eseries-gpio.h> | 24 | #include <mach/eseries-gpio.h> |
| 26 | #include <mach/udc.h> | 25 | #include <mach/udc.h> |
| 27 | #include <mach/irda.h> | 26 | #include <mach/irda.h> |
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c index df5f822f3b6c..92ba16e1b6fc 100644 --- a/arch/arm/mach-pxa/ezx.c +++ b/arch/arm/mach-pxa/ezx.c | |||
| @@ -19,18 +19,16 @@ | |||
| 19 | #include <linux/input.h> | 19 | #include <linux/input.h> |
| 20 | 20 | ||
| 21 | #include <asm/setup.h> | 21 | #include <asm/setup.h> |
| 22 | #include <asm/mach-types.h> | ||
| 23 | #include <asm/mach/arch.h> | ||
| 24 | |||
| 25 | #include <mach/pxa27x.h> | ||
| 22 | #include <mach/pxafb.h> | 26 | #include <mach/pxafb.h> |
| 23 | #include <mach/ohci.h> | 27 | #include <mach/ohci.h> |
| 24 | #include <mach/i2c.h> | 28 | #include <mach/i2c.h> |
| 25 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
| 26 | #include <mach/pxa27x_keypad.h> | 30 | #include <mach/pxa27x_keypad.h> |
| 27 | 31 | ||
| 28 | #include <mach/mfp-pxa27x.h> | ||
| 29 | #include <mach/pxa-regs.h> | ||
| 30 | #include <mach/pxa2xx-regs.h> | ||
| 31 | #include <asm/mach-types.h> | ||
| 32 | #include <asm/mach/arch.h> | ||
| 33 | |||
| 34 | #include "devices.h" | 32 | #include "devices.h" |
| 35 | #include "generic.h" | 33 | #include "generic.h" |
| 36 | 34 | ||
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 0ccc91c92c44..3126a35aa002 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c | |||
| @@ -26,8 +26,9 @@ | |||
| 26 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
| 27 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
| 28 | 28 | ||
| 29 | #include <mach/pxa-regs.h> | ||
| 30 | #include <mach/reset.h> | 29 | #include <mach/reset.h> |
| 30 | #include <mach/gpio.h> | ||
| 31 | #include <mach/pxa2xx-gpio.h> | ||
| 31 | 32 | ||
| 32 | #include "generic.h" | 33 | #include "generic.h" |
| 33 | 34 | ||
| @@ -127,3 +128,33 @@ void __init pxa_map_io(void) | |||
| 127 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); | 128 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); |
| 128 | get_clk_frequency_khz(1); | 129 | get_clk_frequency_khz(1); |
| 129 | } | 130 | } |
| 131 | |||
| 132 | /* | ||
| 133 | * Configure pins for GPIO or other functions | ||
| 134 | */ | ||
| 135 | int pxa_gpio_mode(int gpio_mode) | ||
| 136 | { | ||
| 137 | unsigned long flags; | ||
| 138 | int gpio = gpio_mode & GPIO_MD_MASK_NR; | ||
| 139 | int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8; | ||
| 140 | int gafr; | ||
| 141 | |||
| 142 | if (gpio > pxa_last_gpio) | ||
| 143 | return -EINVAL; | ||
| 144 | |||
| 145 | local_irq_save(flags); | ||
| 146 | if (gpio_mode & GPIO_DFLT_LOW) | ||
| 147 | GPCR(gpio) = GPIO_bit(gpio); | ||
| 148 | else if (gpio_mode & GPIO_DFLT_HIGH) | ||
| 149 | GPSR(gpio) = GPIO_bit(gpio); | ||
| 150 | if (gpio_mode & GPIO_MD_MASK_DIR) | ||
| 151 | GPDR(gpio) |= GPIO_bit(gpio); | ||
| 152 | else | ||
| 153 | GPDR(gpio) &= ~GPIO_bit(gpio); | ||
| 154 | gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2)); | ||
| 155 | GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2)); | ||
| 156 | local_irq_restore(flags); | ||
| 157 | |||
| 158 | return 0; | ||
| 159 | } | ||
| 160 | EXPORT_SYMBOL(pxa_gpio_mode); | ||
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index dc876a8e6668..3465268ca716 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h | |||
| @@ -9,20 +9,17 @@ | |||
| 9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
| 10 | */ | 10 | */ |
| 11 | 11 | ||
| 12 | typedef int (*set_wake_t)(unsigned int, unsigned int); | ||
| 13 | |||
| 14 | struct sys_timer; | 12 | struct sys_timer; |
| 15 | 13 | ||
| 16 | extern struct sys_timer pxa_timer; | 14 | extern struct sys_timer pxa_timer; |
| 17 | extern void __init pxa_init_irq(int irq_nr, set_wake_t fn); | 15 | extern void __init pxa_init_irq(int irq_nr, |
| 18 | extern void __init pxa_init_gpio(int gpio_nr, set_wake_t fn); | 16 | int (*set_wake)(unsigned int, unsigned int)); |
| 19 | extern void __init pxa25x_init_irq(void); | 17 | extern void __init pxa25x_init_irq(void); |
| 20 | extern void __init pxa27x_init_irq(void); | 18 | extern void __init pxa27x_init_irq(void); |
| 21 | extern void __init pxa3xx_init_irq(void); | 19 | extern void __init pxa3xx_init_irq(void); |
| 22 | extern void __init pxa_map_io(void); | 20 | extern void __init pxa_map_io(void); |
| 23 | 21 | ||
| 24 | extern unsigned int get_clk_frequency_khz(int info); | 22 | extern unsigned int get_clk_frequency_khz(int info); |
| 25 | extern int pxa_last_gpio; | ||
| 26 | 23 | ||
| 27 | #define SET_BANK(__nr,__start,__size) \ | 24 | #define SET_BANK(__nr,__start,__size) \ |
| 28 | mi->bank[__nr].start = (__start), \ | 25 | mi->bank[__nr].start = (__start), \ |
diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c index 5fec1e479cb3..7c2267036bf1 100644 --- a/arch/arm/mach-pxa/gpio.c +++ b/arch/arm/mach-pxa/gpio.c | |||
| @@ -13,22 +13,34 @@ | |||
| 13 | */ | 13 | */ |
| 14 | 14 | ||
| 15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/irq.h> | 16 | #include <linux/irq.h> |
| 18 | #include <linux/sysdev.h> | ||
| 19 | #include <linux/io.h> | 17 | #include <linux/io.h> |
| 18 | #include <linux/sysdev.h> | ||
| 19 | #include <linux/bootmem.h> | ||
| 20 | |||
| 21 | #include <mach/gpio.h> | ||
| 20 | 22 | ||
| 21 | #include <asm/gpio.h> | 23 | int pxa_last_gpio; |
| 22 | #include <mach/hardware.h> | ||
| 23 | #include <mach/pxa-regs.h> | ||
| 24 | #include <mach/pxa2xx-gpio.h> | ||
| 25 | 24 | ||
| 26 | #include "generic.h" | 25 | /* |
| 26 | * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with | ||
| 27 | * one set of registers. The register offsets are organized below: | ||
| 28 | * | ||
| 29 | * GPLR GPDR GPSR GPCR GRER GFER GEDR | ||
| 30 | * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048 | ||
| 31 | * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C | ||
| 32 | * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050 | ||
| 33 | * | ||
| 34 | * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148 | ||
| 35 | * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C | ||
| 36 | * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150 | ||
| 37 | * | ||
| 38 | * NOTE: | ||
| 39 | * BANK 3 is only available on PXA27x and later processors. | ||
| 40 | * BANK 4 and 5 are only available on PXA935 | ||
| 41 | */ | ||
| 27 | 42 | ||
| 28 | #define GPIO0_BASE ((void __iomem *)io_p2v(0x40E00000)) | 43 | #define GPIO_BANK(n) (GPIO_REGS_VIRT + BANK_OFF(n)) |
| 29 | #define GPIO1_BASE ((void __iomem *)io_p2v(0x40E00004)) | ||
| 30 | #define GPIO2_BASE ((void __iomem *)io_p2v(0x40E00008)) | ||
| 31 | #define GPIO3_BASE ((void __iomem *)io_p2v(0x40E00100)) | ||
| 32 | 44 | ||
| 33 | #define GPLR_OFFSET 0x00 | 45 | #define GPLR_OFFSET 0x00 |
| 34 | #define GPDR_OFFSET 0x0C | 46 | #define GPDR_OFFSET 0x0C |
| @@ -40,195 +52,138 @@ | |||
| 40 | 52 | ||
| 41 | struct pxa_gpio_chip { | 53 | struct pxa_gpio_chip { |
| 42 | struct gpio_chip chip; | 54 | struct gpio_chip chip; |
| 43 | void __iomem *regbase; | 55 | void __iomem *regbase; |
| 56 | char label[10]; | ||
| 57 | |||
| 58 | unsigned long irq_mask; | ||
| 59 | unsigned long irq_edge_rise; | ||
| 60 | unsigned long irq_edge_fall; | ||
| 61 | |||
| 62 | #ifdef CONFIG_PM | ||
| 63 | unsigned long saved_gplr; | ||
| 64 | unsigned long saved_gpdr; | ||
| 65 | unsigned long saved_grer; | ||
| 66 | unsigned long saved_gfer; | ||
| 67 | #endif | ||
| 44 | }; | 68 | }; |
| 45 | 69 | ||
| 46 | int pxa_last_gpio; | 70 | static DEFINE_SPINLOCK(gpio_lock); |
| 71 | static struct pxa_gpio_chip *pxa_gpio_chips; | ||
| 47 | 72 | ||
| 48 | #ifdef CONFIG_CPU_PXA26x | 73 | #define for_each_gpio_chip(i, c) \ |
| 49 | /* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted, | 74 | for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++) |
| 50 | * as well as their Alternate Function value being '1' for GPIO in GAFRx. | 75 | |
| 51 | */ | 76 | static inline void __iomem *gpio_chip_base(struct gpio_chip *c) |
| 52 | static int __gpio_is_inverted(unsigned gpio) | ||
| 53 | { | 77 | { |
| 54 | return cpu_is_pxa25x() && gpio > 85; | 78 | return container_of(c, struct pxa_gpio_chip, chip)->regbase; |
| 55 | } | 79 | } |
| 56 | #else | ||
| 57 | #define __gpio_is_inverted(gpio) (0) | ||
| 58 | #endif | ||
| 59 | 80 | ||
| 60 | /* | 81 | static inline struct pxa_gpio_chip *gpio_to_chip(unsigned gpio) |
| 61 | * Configure pins for GPIO or other functions | ||
| 62 | */ | ||
| 63 | int pxa_gpio_mode(int gpio_mode) | ||
| 64 | { | 82 | { |
| 65 | unsigned long flags; | 83 | return &pxa_gpio_chips[gpio_to_bank(gpio)]; |
| 66 | int gpio = gpio_mode & GPIO_MD_MASK_NR; | ||
| 67 | int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8; | ||
| 68 | int gafr; | ||
| 69 | |||
| 70 | if (gpio > pxa_last_gpio) | ||
| 71 | return -EINVAL; | ||
| 72 | |||
| 73 | local_irq_save(flags); | ||
| 74 | if (gpio_mode & GPIO_DFLT_LOW) | ||
| 75 | GPCR(gpio) = GPIO_bit(gpio); | ||
| 76 | else if (gpio_mode & GPIO_DFLT_HIGH) | ||
| 77 | GPSR(gpio) = GPIO_bit(gpio); | ||
| 78 | if (gpio_mode & GPIO_MD_MASK_DIR) | ||
| 79 | GPDR(gpio) |= GPIO_bit(gpio); | ||
| 80 | else | ||
| 81 | GPDR(gpio) &= ~GPIO_bit(gpio); | ||
| 82 | gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2)); | ||
| 83 | GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2)); | ||
| 84 | local_irq_restore(flags); | ||
| 85 | |||
| 86 | return 0; | ||
| 87 | } | 84 | } |
| 88 | EXPORT_SYMBOL(pxa_gpio_mode); | ||
| 89 | 85 | ||
| 90 | static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 86 | static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
| 91 | { | 87 | { |
| 92 | unsigned long flags; | 88 | void __iomem *base = gpio_chip_base(chip); |
| 93 | u32 mask = 1 << offset; | 89 | uint32_t value, mask = 1 << offset; |
| 94 | u32 value; | 90 | unsigned long flags; |
| 95 | struct pxa_gpio_chip *pxa; | 91 | |
| 96 | void __iomem *gpdr; | 92 | spin_lock_irqsave(&gpio_lock, flags); |
| 97 | 93 | ||
| 98 | pxa = container_of(chip, struct pxa_gpio_chip, chip); | 94 | value = __raw_readl(base + GPDR_OFFSET); |
| 99 | gpdr = pxa->regbase + GPDR_OFFSET; | ||
| 100 | local_irq_save(flags); | ||
| 101 | value = __raw_readl(gpdr); | ||
| 102 | if (__gpio_is_inverted(chip->base + offset)) | 95 | if (__gpio_is_inverted(chip->base + offset)) |
| 103 | value |= mask; | 96 | value |= mask; |
| 104 | else | 97 | else |
| 105 | value &= ~mask; | 98 | value &= ~mask; |
| 106 | __raw_writel(value, gpdr); | 99 | __raw_writel(value, base + GPDR_OFFSET); |
| 107 | local_irq_restore(flags); | ||
| 108 | 100 | ||
| 101 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
| 109 | return 0; | 102 | return 0; |
| 110 | } | 103 | } |
| 111 | 104 | ||
| 112 | static int pxa_gpio_direction_output(struct gpio_chip *chip, | 105 | static int pxa_gpio_direction_output(struct gpio_chip *chip, |
| 113 | unsigned offset, int value) | 106 | unsigned offset, int value) |
| 114 | { | 107 | { |
| 115 | unsigned long flags; | 108 | void __iomem *base = gpio_chip_base(chip); |
| 116 | u32 mask = 1 << offset; | 109 | uint32_t tmp, mask = 1 << offset; |
| 117 | u32 tmp; | 110 | unsigned long flags; |
| 118 | struct pxa_gpio_chip *pxa; | 111 | |
| 119 | void __iomem *gpdr; | 112 | __raw_writel(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET)); |
| 120 | 113 | ||
| 121 | pxa = container_of(chip, struct pxa_gpio_chip, chip); | 114 | spin_lock_irqsave(&gpio_lock, flags); |
| 122 | __raw_writel(mask, | 115 | |
| 123 | pxa->regbase + (value ? GPSR_OFFSET : GPCR_OFFSET)); | 116 | tmp = __raw_readl(base + GPDR_OFFSET); |
| 124 | gpdr = pxa->regbase + GPDR_OFFSET; | ||
| 125 | local_irq_save(flags); | ||
| 126 | tmp = __raw_readl(gpdr); | ||
| 127 | if (__gpio_is_inverted(chip->base + offset)) | 117 | if (__gpio_is_inverted(chip->base + offset)) |
| 128 | tmp &= ~mask; | 118 | tmp &= ~mask; |
| 129 | else | 119 | else |
| 130 | tmp |= mask; | 120 | tmp |= mask; |
| 131 | __raw_writel(tmp, gpdr); | 121 | __raw_writel(tmp, base + GPDR_OFFSET); |
| 132 | local_irq_restore(flags); | ||
| 133 | 122 | ||
| 123 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
| 134 | return 0; | 124 | return 0; |
| 135 | } | 125 | } |
| 136 | 126 | ||
| 137 | /* | ||
| 138 | * Return GPIO level | ||
| 139 | */ | ||
| 140 | static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset) | 127 | static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset) |
| 141 | { | 128 | { |
| 142 | u32 mask = 1 << offset; | 129 | return __raw_readl(gpio_chip_base(chip) + GPLR_OFFSET) & (1 << offset); |
| 143 | struct pxa_gpio_chip *pxa; | ||
| 144 | |||
| 145 | pxa = container_of(chip, struct pxa_gpio_chip, chip); | ||
| 146 | return __raw_readl(pxa->regbase + GPLR_OFFSET) & mask; | ||
| 147 | } | 130 | } |
| 148 | 131 | ||
| 149 | /* | ||
| 150 | * Set output GPIO level | ||
| 151 | */ | ||
| 152 | static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 132 | static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
| 153 | { | 133 | { |
| 154 | u32 mask = 1 << offset; | 134 | __raw_writel(1 << offset, gpio_chip_base(chip) + |
| 155 | struct pxa_gpio_chip *pxa; | 135 | (value ? GPSR_OFFSET : GPCR_OFFSET)); |
| 156 | |||
| 157 | pxa = container_of(chip, struct pxa_gpio_chip, chip); | ||
| 158 | |||
| 159 | if (value) | ||
| 160 | __raw_writel(mask, pxa->regbase + GPSR_OFFSET); | ||
| 161 | else | ||
| 162 | __raw_writel(mask, pxa->regbase + GPCR_OFFSET); | ||
| 163 | } | 136 | } |
| 164 | 137 | ||
| 165 | #define GPIO_CHIP(_n) \ | 138 | static int __init pxa_init_gpio_chip(int gpio_end) |
| 166 | [_n] = { \ | 139 | { |
| 167 | .regbase = GPIO##_n##_BASE, \ | 140 | int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1; |
| 168 | .chip = { \ | 141 | struct pxa_gpio_chip *chips; |
| 169 | .label = "gpio-" #_n, \ | 142 | |
| 170 | .direction_input = pxa_gpio_direction_input, \ | 143 | /* this is early, we have to use bootmem allocator, and we really |
| 171 | .direction_output = pxa_gpio_direction_output, \ | 144 | * want this to be allocated dynamically for different 'gpio_end' |
| 172 | .get = pxa_gpio_get, \ | 145 | */ |
| 173 | .set = pxa_gpio_set, \ | 146 | chips = alloc_bootmem_low(nbanks * sizeof(struct pxa_gpio_chip)); |
| 174 | .base = (_n) * 32, \ | 147 | if (chips == NULL) { |
| 175 | .ngpio = 32, \ | 148 | pr_err("%s: failed to allocate GPIO chips\n", __func__); |
| 176 | }, \ | 149 | return -ENOMEM; |
| 177 | } | 150 | } |
| 178 | 151 | ||
| 179 | static struct pxa_gpio_chip pxa_gpio_chip[] = { | 152 | for (i = 0, gpio = 0; i < nbanks; i++, gpio += 32) { |
| 180 | GPIO_CHIP(0), | 153 | struct gpio_chip *c = &chips[i].chip; |
| 181 | GPIO_CHIP(1), | ||
| 182 | GPIO_CHIP(2), | ||
| 183 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) | ||
| 184 | GPIO_CHIP(3), | ||
| 185 | #endif | ||
| 186 | }; | ||
| 187 | 154 | ||
| 188 | /* | 155 | sprintf(chips[i].label, "gpio-%d", i); |
| 189 | * PXA GPIO edge detection for IRQs: | 156 | chips[i].regbase = (void __iomem *)GPIO_BANK(i); |
| 190 | * IRQs are generated on Falling-Edge, Rising-Edge, or both. | ||
| 191 | * Use this instead of directly setting GRER/GFER. | ||
| 192 | */ | ||
| 193 | 157 | ||
| 194 | static unsigned long GPIO_IRQ_rising_edge[4]; | 158 | c->base = gpio; |
| 195 | static unsigned long GPIO_IRQ_falling_edge[4]; | 159 | c->label = chips[i].label; |
| 196 | static unsigned long GPIO_IRQ_mask[4]; | ||
| 197 | 160 | ||
| 198 | /* | 161 | c->direction_input = pxa_gpio_direction_input; |
| 199 | * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate | 162 | c->direction_output = pxa_gpio_direction_output; |
| 200 | * function of a GPIO, and GPDRx cannot be altered once configured. It | 163 | c->get = pxa_gpio_get; |
| 201 | * is attributed as "occupied" here (I know this terminology isn't | 164 | c->set = pxa_gpio_set; |
| 202 | * accurate, you are welcome to propose a better one :-) | ||
| 203 | */ | ||
| 204 | static int __gpio_is_occupied(unsigned gpio) | ||
| 205 | { | ||
| 206 | if (cpu_is_pxa27x() || cpu_is_pxa25x()) { | ||
| 207 | int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3; | ||
| 208 | int dir = GPDR(gpio) & GPIO_bit(gpio); | ||
| 209 | |||
| 210 | if (__gpio_is_inverted(gpio)) | ||
| 211 | return af != 1 || dir == 0; | ||
| 212 | else | ||
| 213 | return af != 0 || dir != 0; | ||
| 214 | } | ||
| 215 | 165 | ||
| 166 | /* number of GPIOs on last bank may be less than 32 */ | ||
| 167 | c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32; | ||
| 168 | gpiochip_add(c); | ||
| 169 | } | ||
| 170 | pxa_gpio_chips = chips; | ||
| 216 | return 0; | 171 | return 0; |
| 217 | } | 172 | } |
| 218 | 173 | ||
| 219 | static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) | 174 | static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) |
| 220 | { | 175 | { |
| 221 | int gpio, idx; | 176 | struct pxa_gpio_chip *c; |
| 177 | int gpio = irq_to_gpio(irq); | ||
| 178 | unsigned long gpdr, mask = GPIO_bit(gpio); | ||
| 222 | 179 | ||
| 223 | gpio = IRQ_TO_GPIO(irq); | 180 | c = gpio_to_chip(gpio); |
| 224 | idx = gpio >> 5; | ||
| 225 | 181 | ||
| 226 | if (type == IRQ_TYPE_PROBE) { | 182 | if (type == IRQ_TYPE_PROBE) { |
| 227 | /* Don't mess with enabled GPIOs using preconfigured edges or | 183 | /* Don't mess with enabled GPIOs using preconfigured edges or |
| 228 | * GPIOs set to alternate function or to output during probe | 184 | * GPIOs set to alternate function or to output during probe |
| 229 | */ | 185 | */ |
| 230 | if ((GPIO_IRQ_rising_edge[idx] & GPIO_bit(gpio)) || | 186 | if ((c->irq_edge_rise | c->irq_edge_fall) & GPIO_bit(gpio)) |
| 231 | (GPIO_IRQ_falling_edge[idx] & GPIO_bit(gpio))) | ||
| 232 | return 0; | 187 | return 0; |
| 233 | 188 | ||
| 234 | if (__gpio_is_occupied(gpio)) | 189 | if (__gpio_is_occupied(gpio)) |
| @@ -237,23 +192,25 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) | |||
| 237 | type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; | 192 | type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; |
| 238 | } | 193 | } |
| 239 | 194 | ||
| 195 | gpdr = __raw_readl(c->regbase + GPDR_OFFSET); | ||
| 196 | |||
| 240 | if (__gpio_is_inverted(gpio)) | 197 | if (__gpio_is_inverted(gpio)) |
| 241 | GPDR(gpio) |= GPIO_bit(gpio); | 198 | __raw_writel(gpdr | mask, c->regbase + GPDR_OFFSET); |
| 242 | else | 199 | else |
| 243 | GPDR(gpio) &= ~GPIO_bit(gpio); | 200 | __raw_writel(gpdr & ~mask, c->regbase + GPDR_OFFSET); |
| 244 | 201 | ||
| 245 | if (type & IRQ_TYPE_EDGE_RISING) | 202 | if (type & IRQ_TYPE_EDGE_RISING) |
| 246 | __set_bit(gpio, GPIO_IRQ_rising_edge); | 203 | c->irq_edge_rise |= mask; |
| 247 | else | 204 | else |
| 248 | __clear_bit(gpio, GPIO_IRQ_rising_edge); | 205 | c->irq_edge_rise &= ~mask; |
| 249 | 206 | ||
| 250 | if (type & IRQ_TYPE_EDGE_FALLING) | 207 | if (type & IRQ_TYPE_EDGE_FALLING) |
| 251 | __set_bit(gpio, GPIO_IRQ_falling_edge); | 208 | c->irq_edge_fall |= mask; |
| 252 | else | 209 | else |
| 253 | __clear_bit(gpio, GPIO_IRQ_falling_edge); | 210 | c->irq_edge_fall &= ~mask; |
| 254 | 211 | ||
| 255 | GRER(gpio) = GPIO_IRQ_rising_edge[idx] & GPIO_IRQ_mask[idx]; | 212 | __raw_writel(c->irq_edge_rise & c->irq_mask, c->regbase + GRER_OFFSET); |
| 256 | GFER(gpio) = GPIO_IRQ_falling_edge[idx] & GPIO_IRQ_mask[idx]; | 213 | __raw_writel(c->irq_edge_fall & c->irq_mask, c->regbase + GFER_OFFSET); |
| 257 | 214 | ||
| 258 | pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, irq, gpio, | 215 | pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, irq, gpio, |
| 259 | ((type & IRQ_TYPE_EDGE_RISING) ? " rising" : ""), | 216 | ((type & IRQ_TYPE_EDGE_RISING) ? " rising" : ""), |
| @@ -261,87 +218,62 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) | |||
| 261 | return 0; | 218 | return 0; |
| 262 | } | 219 | } |
| 263 | 220 | ||
| 264 | /* | ||
| 265 | * GPIO IRQs must be acknowledged. This is for GPIO 0 and 1. | ||
| 266 | */ | ||
| 267 | |||
| 268 | static void pxa_ack_low_gpio(unsigned int irq) | ||
| 269 | { | ||
| 270 | GEDR0 = (1 << (irq - IRQ_GPIO0)); | ||
| 271 | } | ||
| 272 | |||
| 273 | static void pxa_mask_low_gpio(unsigned int irq) | ||
| 274 | { | ||
| 275 | ICMR &= ~(1 << (irq - PXA_IRQ(0))); | ||
| 276 | } | ||
| 277 | |||
| 278 | static void pxa_unmask_low_gpio(unsigned int irq) | ||
| 279 | { | ||
| 280 | ICMR |= 1 << (irq - PXA_IRQ(0)); | ||
| 281 | } | ||
| 282 | |||
| 283 | static struct irq_chip pxa_low_gpio_chip = { | ||
| 284 | .name = "GPIO-l", | ||
| 285 | .ack = pxa_ack_low_gpio, | ||
| 286 | .mask = pxa_mask_low_gpio, | ||
| 287 | .unmask = pxa_unmask_low_gpio, | ||
| 288 | .set_type = pxa_gpio_irq_type, | ||
| 289 | }; | ||
| 290 | |||
| 291 | /* | ||
| 292 | * Demux handler for GPIO>=2 edge detect interrupts | ||
| 293 | */ | ||
| 294 | |||
| 295 | #define GEDR_BITS (sizeof(gedr) * BITS_PER_BYTE) | ||
| 296 | |||
| 297 | static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc) | 221 | static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc) |
| 298 | { | 222 | { |
| 299 | int loop, bit, n; | 223 | struct pxa_gpio_chip *c; |
| 300 | unsigned long gedr[4]; | 224 | int loop, gpio, gpio_base, n; |
| 225 | unsigned long gedr; | ||
| 301 | 226 | ||
| 302 | do { | 227 | do { |
| 303 | gedr[0] = GEDR0 & GPIO_IRQ_mask[0] & ~3; | ||
| 304 | gedr[1] = GEDR1 & GPIO_IRQ_mask[1]; | ||
| 305 | gedr[2] = GEDR2 & GPIO_IRQ_mask[2]; | ||
| 306 | gedr[3] = GEDR3 & GPIO_IRQ_mask[3]; | ||
| 307 | |||
| 308 | GEDR0 = gedr[0]; GEDR1 = gedr[1]; | ||
| 309 | GEDR2 = gedr[2]; GEDR3 = gedr[3]; | ||
| 310 | |||
| 311 | loop = 0; | 228 | loop = 0; |
| 312 | bit = find_first_bit(gedr, GEDR_BITS); | 229 | for_each_gpio_chip(gpio, c) { |
| 313 | while (bit < GEDR_BITS) { | 230 | gpio_base = c->chip.base; |
| 314 | loop = 1; | 231 | |
| 232 | gedr = __raw_readl(c->regbase + GEDR_OFFSET); | ||
| 233 | gedr = gedr & c->irq_mask; | ||
| 234 | __raw_writel(gedr, c->regbase + GEDR_OFFSET); | ||
| 315 | 235 | ||
| 316 | n = PXA_GPIO_IRQ_BASE + bit; | 236 | n = find_first_bit(&gedr, BITS_PER_LONG); |
| 317 | generic_handle_irq(n); | 237 | while (n < BITS_PER_LONG) { |
| 238 | loop = 1; | ||
| 318 | 239 | ||
| 319 | bit = find_next_bit(gedr, GEDR_BITS, bit + 1); | 240 | generic_handle_irq(gpio_to_irq(gpio_base + n)); |
| 241 | n = find_next_bit(&gedr, BITS_PER_LONG, n + 1); | ||
| 242 | } | ||
| 320 | } | 243 | } |
| 321 | } while (loop); | 244 | } while (loop); |
| 322 | } | 245 | } |
| 323 | 246 | ||
| 324 | static void pxa_ack_muxed_gpio(unsigned int irq) | 247 | static void pxa_ack_muxed_gpio(unsigned int irq) |
| 325 | { | 248 | { |
| 326 | int gpio = irq - IRQ_GPIO(2) + 2; | 249 | int gpio = irq_to_gpio(irq); |
| 327 | GEDR(gpio) = GPIO_bit(gpio); | 250 | struct pxa_gpio_chip *c = gpio_to_chip(gpio); |
| 251 | |||
| 252 | __raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET); | ||
| 328 | } | 253 | } |
| 329 | 254 | ||
| 330 | static void pxa_mask_muxed_gpio(unsigned int irq) | 255 | static void pxa_mask_muxed_gpio(unsigned int irq) |
| 331 | { | 256 | { |
| 332 | int gpio = irq - IRQ_GPIO(2) + 2; | 257 | int gpio = irq_to_gpio(irq); |
| 333 | __clear_bit(gpio, GPIO_IRQ_mask); | 258 | struct pxa_gpio_chip *c = gpio_to_chip(gpio); |
| 334 | GRER(gpio) &= ~GPIO_bit(gpio); | 259 | uint32_t grer, gfer; |
| 335 | GFER(gpio) &= ~GPIO_bit(gpio); | 260 | |
| 261 | c->irq_mask &= ~GPIO_bit(gpio); | ||
| 262 | |||
| 263 | grer = __raw_readl(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio); | ||
| 264 | gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio); | ||
| 265 | __raw_writel(grer, c->regbase + GRER_OFFSET); | ||
| 266 | __raw_writel(gfer, c->regbase + GFER_OFFSET); | ||
| 336 | } | 267 | } |
| 337 | 268 | ||
| 338 | static void pxa_unmask_muxed_gpio(unsigned int irq) | 269 | static void pxa_unmask_muxed_gpio(unsigned int irq) |
| 339 | { | 270 | { |
| 340 | int gpio = irq - IRQ_GPIO(2) + 2; | 271 | int gpio = irq_to_gpio(irq); |
| 341 | int idx = gpio >> 5; | 272 | struct pxa_gpio_chip *c = gpio_to_chip(gpio); |
| 342 | __set_bit(gpio, GPIO_IRQ_mask); | 273 | |
| 343 | GRER(gpio) = GPIO_IRQ_rising_edge[idx] & GPIO_IRQ_mask[idx]; | 274 | c->irq_mask |= GPIO_bit(gpio); |
| 344 | GFER(gpio) = GPIO_IRQ_falling_edge[idx] & GPIO_IRQ_mask[idx]; | 275 | __raw_writel(c->irq_edge_rise & c->irq_mask, c->regbase + GRER_OFFSET); |
| 276 | __raw_writel(c->irq_edge_fall & c->irq_mask, c->regbase + GFER_OFFSET); | ||
| 345 | } | 277 | } |
| 346 | 278 | ||
| 347 | static struct irq_chip pxa_muxed_gpio_chip = { | 279 | static struct irq_chip pxa_muxed_gpio_chip = { |
| @@ -352,85 +284,65 @@ static struct irq_chip pxa_muxed_gpio_chip = { | |||
| 352 | .set_type = pxa_gpio_irq_type, | 284 | .set_type = pxa_gpio_irq_type, |
| 353 | }; | 285 | }; |
| 354 | 286 | ||
| 355 | void __init pxa_init_gpio(int gpio_nr, set_wake_t fn) | 287 | void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn) |
| 356 | { | 288 | { |
| 357 | int irq, i, gpio; | 289 | struct pxa_gpio_chip *c; |
| 358 | 290 | int gpio, irq; | |
| 359 | pxa_last_gpio = gpio_nr - 1; | ||
| 360 | 291 | ||
| 361 | /* clear all GPIO edge detects */ | 292 | pxa_last_gpio = end; |
| 362 | for (i = 0; i < gpio_nr; i += 32) { | ||
| 363 | GFER(i) = 0; | ||
| 364 | GRER(i) = 0; | ||
| 365 | GEDR(i) = GEDR(i); | ||
| 366 | } | ||
| 367 | 293 | ||
| 368 | /* GPIO 0 and 1 must have their mask bit always set */ | 294 | /* Initialize GPIO chips */ |
| 369 | GPIO_IRQ_mask[0] = 3; | 295 | pxa_init_gpio_chip(end); |
| 370 | 296 | ||
| 371 | for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { | 297 | /* clear all GPIO edge detects */ |
| 372 | set_irq_chip(irq, &pxa_low_gpio_chip); | 298 | for_each_gpio_chip(gpio, c) { |
| 373 | set_irq_handler(irq, handle_edge_irq); | 299 | __raw_writel(0, c->regbase + GFER_OFFSET); |
| 374 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 300 | __raw_writel(0, c->regbase + GRER_OFFSET); |
| 301 | __raw_writel(~0,c->regbase + GEDR_OFFSET); | ||
| 375 | } | 302 | } |
| 376 | 303 | ||
| 377 | for (irq = IRQ_GPIO(2); irq < IRQ_GPIO(gpio_nr); irq++) { | 304 | for (irq = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) { |
| 378 | set_irq_chip(irq, &pxa_muxed_gpio_chip); | 305 | set_irq_chip(irq, &pxa_muxed_gpio_chip); |
| 379 | set_irq_handler(irq, handle_edge_irq); | 306 | set_irq_handler(irq, handle_edge_irq); |
| 380 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 307 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
| 381 | } | 308 | } |
| 382 | 309 | ||
| 383 | /* Install handler for GPIO>=2 edge detect interrupts */ | 310 | /* Install handler for GPIO>=2 edge detect interrupts */ |
| 384 | set_irq_chained_handler(IRQ_GPIO_2_x, pxa_gpio_demux_handler); | 311 | set_irq_chained_handler(mux_irq, pxa_gpio_demux_handler); |
| 385 | |||
| 386 | pxa_low_gpio_chip.set_wake = fn; | ||
| 387 | pxa_muxed_gpio_chip.set_wake = fn; | 312 | pxa_muxed_gpio_chip.set_wake = fn; |
| 388 | |||
| 389 | /* add a GPIO chip for each register bank. | ||
| 390 | * the last PXA25x register only contains 21 GPIOs | ||
| 391 | */ | ||
| 392 | for (gpio = 0, i = 0; gpio < gpio_nr; gpio += 32, i++) { | ||
| 393 | if (gpio + 32 > gpio_nr) | ||
| 394 | pxa_gpio_chip[i].chip.ngpio = gpio_nr - gpio; | ||
| 395 | gpiochip_add(&pxa_gpio_chip[i].chip); | ||
| 396 | } | ||
| 397 | } | 313 | } |
| 398 | 314 | ||
| 399 | #ifdef CONFIG_PM | 315 | #ifdef CONFIG_PM |
| 400 | |||
| 401 | static unsigned long saved_gplr[4]; | ||
| 402 | static unsigned long saved_gpdr[4]; | ||
| 403 | static unsigned long saved_grer[4]; | ||
| 404 | static unsigned long saved_gfer[4]; | ||
| 405 | |||
| 406 | static int pxa_gpio_suspend(struct sys_device *dev, pm_message_t state) | 316 | static int pxa_gpio_suspend(struct sys_device *dev, pm_message_t state) |
| 407 | { | 317 | { |
| 408 | int i, gpio; | 318 | struct pxa_gpio_chip *c; |
| 319 | int gpio; | ||
| 409 | 320 | ||
| 410 | for (gpio = 0, i = 0; gpio < pxa_last_gpio; gpio += 32, i++) { | 321 | for_each_gpio_chip(gpio, c) { |
| 411 | saved_gplr[i] = GPLR(gpio); | 322 | c->saved_gplr = __raw_readl(c->regbase + GPLR_OFFSET); |
| 412 | saved_gpdr[i] = GPDR(gpio); | 323 | c->saved_gpdr = __raw_readl(c->regbase + GPDR_OFFSET); |
| 413 | saved_grer[i] = GRER(gpio); | 324 | c->saved_grer = __raw_readl(c->regbase + GRER_OFFSET); |
| 414 | saved_gfer[i] = GFER(gpio); | 325 | c->saved_gfer = __raw_readl(c->regbase + GFER_OFFSET); |
| 415 | 326 | ||
| 416 | /* Clear GPIO transition detect bits */ | 327 | /* Clear GPIO transition detect bits */ |
| 417 | GEDR(gpio) = GEDR(gpio); | 328 | __raw_writel(0xffffffff, c->regbase + GEDR_OFFSET); |
| 418 | } | 329 | } |
| 419 | return 0; | 330 | return 0; |
| 420 | } | 331 | } |
| 421 | 332 | ||
| 422 | static int pxa_gpio_resume(struct sys_device *dev) | 333 | static int pxa_gpio_resume(struct sys_device *dev) |
| 423 | { | 334 | { |
| 424 | int i, gpio; | 335 | struct pxa_gpio_chip *c; |
| 336 | int gpio; | ||
| 425 | 337 | ||
| 426 | for (gpio = 0, i = 0; gpio < pxa_last_gpio; gpio += 32, i++) { | 338 | for_each_gpio_chip(gpio, c) { |
| 427 | /* restore level with set/clear */ | 339 | /* restore level with set/clear */ |
| 428 | GPSR(gpio) = saved_gplr[i]; | 340 | __raw_writel( c->saved_gplr, c->regbase + GPSR_OFFSET); |
| 429 | GPCR(gpio) = ~saved_gplr[i]; | 341 | __raw_writel(~c->saved_gplr, c->regbase + GPCR_OFFSET); |
| 430 | 342 | ||
| 431 | GRER(gpio) = saved_grer[i]; | 343 | __raw_writel(c->saved_grer, c->regbase + GRER_OFFSET); |
| 432 | GFER(gpio) = saved_gfer[i]; | 344 | __raw_writel(c->saved_gfer, c->regbase + GFER_OFFSET); |
| 433 | GPDR(gpio) = saved_gpdr[i]; | 345 | __raw_writel(c->saved_gpdr, c->regbase + GPDR_OFFSET); |
| 434 | } | 346 | } |
| 435 | return 0; | 347 | return 0; |
| 436 | } | 348 | } |
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c index e296ce11658c..ca9912ea78d9 100644 --- a/arch/arm/mach-pxa/gumstix.c +++ b/arch/arm/mach-pxa/gumstix.c | |||
| @@ -38,14 +38,12 @@ | |||
| 38 | #include <asm/mach/map.h> | 38 | #include <asm/mach/map.h> |
| 39 | #include <asm/mach/irq.h> | 39 | #include <asm/mach/irq.h> |
| 40 | #include <asm/mach/flash.h> | 40 | #include <asm/mach/flash.h> |
| 41 | |||
| 42 | #include <mach/pxa25x.h> | ||
| 41 | #include <mach/mmc.h> | 43 | #include <mach/mmc.h> |
| 42 | #include <mach/udc.h> | 44 | #include <mach/udc.h> |
| 43 | #include <mach/gumstix.h> | 45 | #include <mach/gumstix.h> |
| 44 | 46 | ||
| 45 | #include <mach/pxa-regs.h> | ||
| 46 | #include <mach/pxa2xx-regs.h> | ||
| 47 | #include <mach/mfp-pxa25x.h> | ||
| 48 | |||
| 49 | #include "generic.h" | 47 | #include "generic.h" |
| 50 | 48 | ||
| 51 | static struct resource flash_resource = { | 49 | static struct resource flash_resource = { |
| @@ -191,6 +189,11 @@ int __attribute__((weak)) am200_init(void) | |||
| 191 | return 0; | 189 | return 0; |
| 192 | } | 190 | } |
| 193 | 191 | ||
| 192 | int __attribute__((weak)) am300_init(void) | ||
| 193 | { | ||
| 194 | return 0; | ||
| 195 | } | ||
| 196 | |||
| 194 | static void __init carrier_board_init(void) | 197 | static void __init carrier_board_init(void) |
| 195 | { | 198 | { |
| 196 | /* | 199 | /* |
| @@ -198,6 +201,7 @@ static void __init carrier_board_init(void) | |||
| 198 | * they cannot be detected programatically | 201 | * they cannot be detected programatically |
| 199 | */ | 202 | */ |
| 200 | am200_init(); | 203 | am200_init(); |
| 204 | am300_init(); | ||
| 201 | } | 205 | } |
| 202 | 206 | ||
| 203 | static void __init gumstix_init(void) | 207 | static void __init gumstix_init(void) |
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c index da6e4422c0f3..6a197fb5c095 100644 --- a/arch/arm/mach-pxa/h5000.c +++ b/arch/arm/mach-pxa/h5000.c | |||
| @@ -24,14 +24,15 @@ | |||
| 24 | #include <linux/mtd/mtd.h> | 24 | #include <linux/mtd/mtd.h> |
| 25 | #include <linux/mtd/partitions.h> | 25 | #include <linux/mtd/partitions.h> |
| 26 | #include <linux/mtd/physmap.h> | 26 | #include <linux/mtd/physmap.h> |
| 27 | |||
| 27 | #include <asm/mach-types.h> | 28 | #include <asm/mach-types.h> |
| 28 | #include <asm/mach/arch.h> | 29 | #include <asm/mach/arch.h> |
| 29 | #include <asm/mach/map.h> | 30 | #include <asm/mach/map.h> |
| 31 | |||
| 32 | #include <mach/pxa25x.h> | ||
| 30 | #include <mach/h5000.h> | 33 | #include <mach/h5000.h> |
| 31 | #include <mach/pxa-regs.h> | ||
| 32 | #include <mach/pxa2xx-regs.h> | ||
| 33 | #include <mach/mfp-pxa25x.h> | ||
| 34 | #include <mach/udc.h> | 34 | #include <mach/udc.h> |
| 35 | |||
| 35 | #include "generic.h" | 36 | #include "generic.h" |
| 36 | 37 | ||
| 37 | /* | 38 | /* |
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c new file mode 100644 index 000000000000..cea99fe65b97 --- /dev/null +++ b/arch/arm/mach-pxa/himalaya.c | |||
| @@ -0,0 +1,166 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/himalaya.c | ||
| 3 | * | ||
| 4 | * Hardware definitions for the HTC Himalaya | ||
| 5 | * | ||
| 6 | * Based on 2.6.21-hh20's himalaya.c and himalaya_lcd.c | ||
| 7 | * | ||
| 8 | * Copyright (c) 2008 Zbynek Michl <Zbynek.Michl@seznam.cz> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/device.h> | ||
| 18 | #include <linux/fb.h> | ||
| 19 | #include <linux/platform_device.h> | ||
| 20 | |||
| 21 | #include <video/w100fb.h> | ||
| 22 | |||
| 23 | #include <asm/setup.h> | ||
| 24 | #include <asm/mach-types.h> | ||
| 25 | #include <asm/mach/arch.h> | ||
| 26 | |||
| 27 | #include <mach/mfp-pxa25x.h> | ||
| 28 | #include <mach/hardware.h> | ||
| 29 | |||
| 30 | #include "generic.h" | ||
| 31 | |||
| 32 | /* ---------------------- Himalaya LCD definitions -------------------- */ | ||
| 33 | |||
| 34 | static struct w100_gen_regs himalaya_lcd_regs = { | ||
| 35 | .lcd_format = 0x00000003, | ||
| 36 | .lcdd_cntl1 = 0x00000000, | ||
| 37 | .lcdd_cntl2 = 0x0003ffff, | ||
| 38 | .genlcd_cntl1 = 0x00fff003, | ||
| 39 | .genlcd_cntl2 = 0x00000003, | ||
| 40 | .genlcd_cntl3 = 0x000102aa, | ||
| 41 | }; | ||
| 42 | |||
| 43 | static struct w100_mode himalaya4_lcd_mode = { | ||
| 44 | .xres = 240, | ||
| 45 | .yres = 320, | ||
| 46 | .left_margin = 0, | ||
| 47 | .right_margin = 31, | ||
| 48 | .upper_margin = 15, | ||
| 49 | .lower_margin = 0, | ||
| 50 | .crtc_ss = 0x80150014, | ||
| 51 | .crtc_ls = 0xa0fb00f7, | ||
| 52 | .crtc_gs = 0xc0080007, | ||
| 53 | .crtc_vpos_gs = 0x00080007, | ||
| 54 | .crtc_rev = 0x0000000a, | ||
| 55 | .crtc_dclk = 0x81700030, | ||
| 56 | .crtc_gclk = 0x8015010f, | ||
| 57 | .crtc_goe = 0x00000000, | ||
| 58 | .pll_freq = 80, | ||
| 59 | .pixclk_divider = 15, | ||
| 60 | .pixclk_divider_rotated = 15, | ||
| 61 | .pixclk_src = CLK_SRC_PLL, | ||
| 62 | .sysclk_divider = 0, | ||
| 63 | .sysclk_src = CLK_SRC_PLL, | ||
| 64 | }; | ||
| 65 | |||
| 66 | static struct w100_mode himalaya6_lcd_mode = { | ||
| 67 | .xres = 240, | ||
| 68 | .yres = 320, | ||
| 69 | .left_margin = 9, | ||
| 70 | .right_margin = 8, | ||
| 71 | .upper_margin = 5, | ||
| 72 | .lower_margin = 4, | ||
| 73 | .crtc_ss = 0x80150014, | ||
| 74 | .crtc_ls = 0xa0fb00f7, | ||
| 75 | .crtc_gs = 0xc0080007, | ||
| 76 | .crtc_vpos_gs = 0x00080007, | ||
| 77 | .crtc_rev = 0x0000000a, | ||
| 78 | .crtc_dclk = 0xa1700030, | ||
| 79 | .crtc_gclk = 0x8015010f, | ||
| 80 | .crtc_goe = 0x00000000, | ||
| 81 | .pll_freq = 95, | ||
| 82 | .pixclk_divider = 0xb, | ||
| 83 | .pixclk_divider_rotated = 4, | ||
| 84 | .pixclk_src = CLK_SRC_PLL, | ||
| 85 | .sysclk_divider = 1, | ||
| 86 | .sysclk_src = CLK_SRC_PLL, | ||
| 87 | }; | ||
| 88 | |||
| 89 | static struct w100_gpio_regs himalaya_w100_gpio_info = { | ||
| 90 | .init_data1 = 0xffff0000, /* GPIO_DATA */ | ||
| 91 | .gpio_dir1 = 0x00000000, /* GPIO_CNTL1 */ | ||
| 92 | .gpio_oe1 = 0x003c0000, /* GPIO_CNTL2 */ | ||
| 93 | .init_data2 = 0x00000000, /* GPIO_DATA2 */ | ||
| 94 | .gpio_dir2 = 0x00000000, /* GPIO_CNTL3 */ | ||
| 95 | .gpio_oe2 = 0x00000000, /* GPIO_CNTL4 */ | ||
| 96 | }; | ||
| 97 | |||
| 98 | static struct w100fb_mach_info himalaya_fb_info = { | ||
| 99 | .num_modes = 1, | ||
| 100 | .regs = &himalaya_lcd_regs, | ||
| 101 | .gpio = &himalaya_w100_gpio_info, | ||
| 102 | .xtal_freq = 16000000, | ||
| 103 | }; | ||
| 104 | |||
| 105 | static struct resource himalaya_fb_resources[] = { | ||
| 106 | [0] = { | ||
| 107 | .start = 0x08000000, | ||
| 108 | .end = 0x08ffffff, | ||
| 109 | .flags = IORESOURCE_MEM, | ||
| 110 | }, | ||
| 111 | }; | ||
| 112 | |||
| 113 | static struct platform_device himalaya_fb_device = { | ||
| 114 | .name = "w100fb", | ||
| 115 | .id = -1, | ||
| 116 | .dev = { | ||
| 117 | .platform_data = &himalaya_fb_info, | ||
| 118 | }, | ||
| 119 | .num_resources = ARRAY_SIZE(himalaya_fb_resources), | ||
| 120 | .resource = himalaya_fb_resources, | ||
| 121 | }; | ||
| 122 | |||
| 123 | /* ----------------------------------------------------------------------- */ | ||
| 124 | |||
| 125 | static struct platform_device *devices[] __initdata = { | ||
| 126 | &himalaya_fb_device, | ||
| 127 | }; | ||
| 128 | |||
| 129 | static void __init himalaya_lcd_init(void) | ||
| 130 | { | ||
| 131 | int himalaya_boardid; | ||
| 132 | |||
| 133 | himalaya_boardid = 0x4; /* hardcoded (detection needs ASIC3 functions) */ | ||
| 134 | printk(KERN_INFO "himalaya LCD Driver init. boardid=%d\n", | ||
| 135 | himalaya_boardid); | ||
| 136 | |||
| 137 | switch (himalaya_boardid) { | ||
| 138 | case 0x4: | ||
| 139 | himalaya_fb_info.modelist = &himalaya4_lcd_mode; | ||
| 140 | break; | ||
| 141 | case 0x6: | ||
| 142 | himalaya_fb_info.modelist = &himalaya6_lcd_mode; | ||
| 143 | break; | ||
| 144 | default: | ||
| 145 | printk(KERN_INFO "himalaya lcd_init: unknown boardid=%d. Using 0x4\n", | ||
| 146 | himalaya_boardid); | ||
| 147 | himalaya_fb_info.modelist = &himalaya4_lcd_mode; | ||
| 148 | } | ||
| 149 | } | ||
| 150 | |||
| 151 | static void __init himalaya_init(void) | ||
| 152 | { | ||
| 153 | himalaya_lcd_init(); | ||
| 154 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 155 | } | ||
| 156 | |||
| 157 | |||
| 158 | MACHINE_START(HIMALAYA, "HTC Himalaya") | ||
| 159 | .phys_io = 0x40000000, | ||
| 160 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 161 | .boot_params = 0xa0000100, | ||
| 162 | .map_io = pxa_map_io, | ||
| 163 | .init_irq = pxa25x_init_irq, | ||
| 164 | .init_machine = himalaya_init, | ||
| 165 | .timer = &pxa_timer, | ||
| 166 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index 013b15baa034..b6243b59d9be 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c | |||
| @@ -31,8 +31,7 @@ | |||
| 31 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
| 32 | #include <asm/mach/map.h> | 32 | #include <asm/mach/map.h> |
| 33 | 33 | ||
| 34 | #include <mach/pxa-regs.h> | 34 | #include <mach/pxa25x.h> |
| 35 | #include <mach/mfp-pxa25x.h> | ||
| 36 | #include <mach/idp.h> | 35 | #include <mach/idp.h> |
| 37 | #include <mach/pxafb.h> | 36 | #include <mach/pxafb.h> |
| 38 | #include <mach/bitfield.h> | 37 | #include <mach/bitfield.h> |
diff --git a/arch/arm/mach-pxa/imote2.c b/arch/arm/mach-pxa/imote2.c index 364c5e271330..2121309b2474 100644 --- a/arch/arm/mach-pxa/imote2.c +++ b/arch/arm/mach-pxa/imote2.c | |||
| @@ -28,11 +28,8 @@ | |||
| 28 | #include <asm/mach/map.h> | 28 | #include <asm/mach/map.h> |
| 29 | #include <asm/mach/flash.h> | 29 | #include <asm/mach/flash.h> |
| 30 | 30 | ||
| 31 | #include <mach/pxa27x.h> | ||
| 31 | #include <mach/i2c.h> | 32 | #include <mach/i2c.h> |
| 32 | #include <mach/pxa-regs.h> | ||
| 33 | #include <mach/pxa2xx-regs.h> | ||
| 34 | #include <mach/mfp-pxa27x.h> | ||
| 35 | #include <mach/regs-ssp.h> | ||
| 36 | #include <mach/udc.h> | 33 | #include <mach/udc.h> |
| 37 | #include <mach/mmc.h> | 34 | #include <mach/mmc.h> |
| 38 | #include <mach/pxa2xx_spi.h> | 35 | #include <mach/pxa2xx_spi.h> |
diff --git a/arch/arm/mach-pxa/include/mach/csb726.h b/arch/arm/mach-pxa/include/mach/csb726.h new file mode 100644 index 000000000000..747ab1a71f2f --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/csb726.h | |||
| @@ -0,0 +1,26 @@ | |||
| 1 | /* | ||
| 2 | * Support for Cogent CSB726 | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008 Dmitry Baryshkov | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | #ifndef CSB726_H | ||
| 12 | #define CSB726_H | ||
| 13 | |||
| 14 | #define CSB726_GPIO_IRQ_LAN 52 | ||
| 15 | #define CSB726_GPIO_IRQ_SM501 53 | ||
| 16 | #define CSB726_GPIO_MMC_DETECT 100 | ||
| 17 | #define CSB726_GPIO_MMC_RO 101 | ||
| 18 | |||
| 19 | #define CSB726_FLASH_SIZE (64 * 1024 * 1024) | ||
| 20 | #define CSB726_FLASH_uMON (8 * 1024 * 1024) | ||
| 21 | |||
| 22 | #define CSB726_IRQ_LAN gpio_to_irq(CSB726_GPIO_IRQ_LAN) | ||
| 23 | #define CSB726_IRQ_SM501 gpio_to_irq(CSB726_GPIO_IRQ_SM501) | ||
| 24 | |||
| 25 | #endif | ||
| 26 | |||
diff --git a/arch/arm/mach-pxa/include/mach/dma.h b/arch/arm/mach-pxa/include/mach/dma.h index 7804637a6df3..b0812f59d3f8 100644 --- a/arch/arm/mach-pxa/include/mach/dma.h +++ b/arch/arm/mach-pxa/include/mach/dma.h | |||
| @@ -12,6 +12,62 @@ | |||
| 12 | #ifndef __ASM_ARCH_DMA_H | 12 | #ifndef __ASM_ARCH_DMA_H |
| 13 | #define __ASM_ARCH_DMA_H | 13 | #define __ASM_ARCH_DMA_H |
| 14 | 14 | ||
| 15 | #include <mach/hardware.h> | ||
| 16 | |||
| 17 | /* DMA Controller Registers Definitions */ | ||
| 18 | #define DMAC_REGS_VIRT io_p2v(0x40000000) | ||
| 19 | #define DMAC_REG(x) (*((volatile u32 *)(DMAC_REGS_VIRT + (x)))) | ||
| 20 | |||
| 21 | #define DCSR(n) DMAC_REG((n) << 2) | ||
| 22 | #define DALGN DMAC_REG(0x00a0) /* DMA Alignment Register */ | ||
| 23 | #define DINT DMAC_REG(0x00f0) /* DMA Interrupt Register */ | ||
| 24 | #define DDADR(n) DMAC_REG(0x0200 + ((n) << 4)) | ||
| 25 | #define DSADR(n) DMAC_REG(0x0204 + ((n) << 4)) | ||
| 26 | #define DTADR(n) DMAC_REG(0x0208 + ((n) << 4)) | ||
| 27 | #define DCMD(n) DMAC_REG(0x020c + ((n) << 4)) | ||
| 28 | #define DRCMR(n) DMAC_REG((((n) < 64) ? 0x0100 : 0x1100) + \ | ||
| 29 | (((n) & 0x3f) << 2)) | ||
| 30 | |||
| 31 | #define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ | ||
| 32 | #define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */ | ||
| 33 | #define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */ | ||
| 34 | #define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ | ||
| 35 | #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ | ||
| 36 | #define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */ | ||
| 37 | #define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ | ||
| 38 | #define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ | ||
| 39 | |||
| 40 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) | ||
| 41 | #define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */ | ||
| 42 | #define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ | ||
| 43 | #define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ | ||
| 44 | #define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */ | ||
| 45 | #define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */ | ||
| 46 | #define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */ | ||
| 47 | #define DCSR_EORINTR (1 << 9) /* The end of Receive */ | ||
| 48 | #endif | ||
| 49 | |||
| 50 | #define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */ | ||
| 51 | #define DRCMR_CHLNUM 0x1f /* mask for Channel Number (read / write) */ | ||
| 52 | |||
| 53 | #define DDADR_DESCADDR 0xfffffff0 /* Address of next descriptor (mask) */ | ||
| 54 | #define DDADR_STOP (1 << 0) /* Stop (read / write) */ | ||
| 55 | |||
| 56 | #define DCMD_INCSRCADDR (1 << 31) /* Source Address Increment Setting. */ | ||
| 57 | #define DCMD_INCTRGADDR (1 << 30) /* Target Address Increment Setting. */ | ||
| 58 | #define DCMD_FLOWSRC (1 << 29) /* Flow Control by the source. */ | ||
| 59 | #define DCMD_FLOWTRG (1 << 28) /* Flow Control by the target. */ | ||
| 60 | #define DCMD_STARTIRQEN (1 << 22) /* Start Interrupt Enable */ | ||
| 61 | #define DCMD_ENDIRQEN (1 << 21) /* End Interrupt Enable */ | ||
| 62 | #define DCMD_ENDIAN (1 << 18) /* Device Endian-ness. */ | ||
| 63 | #define DCMD_BURST8 (1 << 16) /* 8 byte burst */ | ||
| 64 | #define DCMD_BURST16 (2 << 16) /* 16 byte burst */ | ||
| 65 | #define DCMD_BURST32 (3 << 16) /* 32 byte burst */ | ||
| 66 | #define DCMD_WIDTH1 (1 << 14) /* 1 byte width */ | ||
| 67 | #define DCMD_WIDTH2 (2 << 14) /* 2 byte width (HalfWord) */ | ||
| 68 | #define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */ | ||
| 69 | #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ | ||
| 70 | |||
| 15 | /* | 71 | /* |
| 16 | * Descriptor structure for PXA's DMA engine | 72 | * Descriptor structure for PXA's DMA engine |
| 17 | * Note: this structure must always be aligned to a 16-byte boundary. | 73 | * Note: this structure must always be aligned to a 16-byte boundary. |
| @@ -34,7 +90,7 @@ typedef enum { | |||
| 34 | * DMA registration | 90 | * DMA registration |
| 35 | */ | 91 | */ |
| 36 | 92 | ||
| 37 | int __init pxa_init_dma(int num_ch); | 93 | int __init pxa_init_dma(int irq, int num_ch); |
| 38 | 94 | ||
| 39 | int pxa_request_dma (char *name, | 95 | int pxa_request_dma (char *name, |
| 40 | pxa_dma_prio prio, | 96 | pxa_dma_prio prio, |
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h index 2c538d8c362d..c72c89a2285e 100644 --- a/arch/arm/mach-pxa/include/mach/gpio.h +++ b/arch/arm/mach-pxa/include/mach/gpio.h | |||
| @@ -24,16 +24,87 @@ | |||
| 24 | #ifndef __ASM_ARCH_PXA_GPIO_H | 24 | #ifndef __ASM_ARCH_PXA_GPIO_H |
| 25 | #define __ASM_ARCH_PXA_GPIO_H | 25 | #define __ASM_ARCH_PXA_GPIO_H |
| 26 | 26 | ||
| 27 | #include <mach/pxa-regs.h> | 27 | #include <mach/irqs.h> |
| 28 | #include <asm/irq.h> | ||
| 29 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
| 30 | |||
| 31 | #include <asm-generic/gpio.h> | 29 | #include <asm-generic/gpio.h> |
| 32 | 30 | ||
| 31 | #define GPIO_REGS_VIRT io_p2v(0x40E00000) | ||
| 32 | |||
| 33 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) | ||
| 34 | #define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) | ||
| 35 | |||
| 36 | /* GPIO Pin Level Registers */ | ||
| 37 | #define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00) | ||
| 38 | #define GPLR1 GPIO_REG(BANK_OFF(1) + 0x00) | ||
| 39 | #define GPLR2 GPIO_REG(BANK_OFF(2) + 0x00) | ||
| 40 | #define GPLR3 GPIO_REG(BANK_OFF(3) + 0x00) | ||
| 41 | |||
| 42 | /* GPIO Pin Direction Registers */ | ||
| 43 | #define GPDR0 GPIO_REG(BANK_OFF(0) + 0x0c) | ||
| 44 | #define GPDR1 GPIO_REG(BANK_OFF(1) + 0x0c) | ||
| 45 | #define GPDR2 GPIO_REG(BANK_OFF(2) + 0x0c) | ||
| 46 | #define GPDR3 GPIO_REG(BANK_OFF(3) + 0x0c) | ||
| 47 | |||
| 48 | /* GPIO Pin Output Set Registers */ | ||
| 49 | #define GPSR0 GPIO_REG(BANK_OFF(0) + 0x18) | ||
| 50 | #define GPSR1 GPIO_REG(BANK_OFF(1) + 0x18) | ||
| 51 | #define GPSR2 GPIO_REG(BANK_OFF(2) + 0x18) | ||
| 52 | #define GPSR3 GPIO_REG(BANK_OFF(3) + 0x18) | ||
| 53 | |||
| 54 | /* GPIO Pin Output Clear Registers */ | ||
| 55 | #define GPCR0 GPIO_REG(BANK_OFF(0) + 0x24) | ||
| 56 | #define GPCR1 GPIO_REG(BANK_OFF(1) + 0x24) | ||
| 57 | #define GPCR2 GPIO_REG(BANK_OFF(2) + 0x24) | ||
| 58 | #define GPCR3 GPIO_REG(BANK_OFF(3) + 0x24) | ||
| 59 | |||
| 60 | /* GPIO Rising Edge Detect Registers */ | ||
| 61 | #define GRER0 GPIO_REG(BANK_OFF(0) + 0x30) | ||
| 62 | #define GRER1 GPIO_REG(BANK_OFF(1) + 0x30) | ||
| 63 | #define GRER2 GPIO_REG(BANK_OFF(2) + 0x30) | ||
| 64 | #define GRER3 GPIO_REG(BANK_OFF(3) + 0x30) | ||
| 65 | |||
| 66 | /* GPIO Falling Edge Detect Registers */ | ||
| 67 | #define GFER0 GPIO_REG(BANK_OFF(0) + 0x3c) | ||
| 68 | #define GFER1 GPIO_REG(BANK_OFF(1) + 0x3c) | ||
| 69 | #define GFER2 GPIO_REG(BANK_OFF(2) + 0x3c) | ||
| 70 | #define GFER3 GPIO_REG(BANK_OFF(3) + 0x3c) | ||
| 71 | |||
| 72 | /* GPIO Edge Detect Status Registers */ | ||
| 73 | #define GEDR0 GPIO_REG(BANK_OFF(0) + 0x48) | ||
| 74 | #define GEDR1 GPIO_REG(BANK_OFF(1) + 0x48) | ||
| 75 | #define GEDR2 GPIO_REG(BANK_OFF(2) + 0x48) | ||
| 76 | #define GEDR3 GPIO_REG(BANK_OFF(3) + 0x48) | ||
| 77 | |||
| 78 | /* GPIO Alternate Function Select Registers */ | ||
| 79 | #define GAFR0_L GPIO_REG(0x0054) | ||
| 80 | #define GAFR0_U GPIO_REG(0x0058) | ||
| 81 | #define GAFR1_L GPIO_REG(0x005C) | ||
| 82 | #define GAFR1_U GPIO_REG(0x0060) | ||
| 83 | #define GAFR2_L GPIO_REG(0x0064) | ||
| 84 | #define GAFR2_U GPIO_REG(0x0068) | ||
| 85 | #define GAFR3_L GPIO_REG(0x006C) | ||
| 86 | #define GAFR3_U GPIO_REG(0x0070) | ||
| 87 | |||
| 88 | /* More handy macros. The argument is a literal GPIO number. */ | ||
| 89 | |||
| 90 | #define GPIO_bit(x) (1 << ((x) & 0x1f)) | ||
| 91 | |||
| 92 | #define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00) | ||
| 93 | #define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c) | ||
| 94 | #define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18) | ||
| 95 | #define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24) | ||
| 96 | #define GRER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x30) | ||
| 97 | #define GFER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x3c) | ||
| 98 | #define GEDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x48) | ||
| 99 | #define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2)) | ||
| 100 | |||
| 33 | 101 | ||
| 34 | /* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85). | 102 | /* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85). |
| 35 | * Those cases currently cause holes in the GPIO number space. | 103 | * Those cases currently cause holes in the GPIO number space, the |
| 104 | * actual number of the last GPIO is recorded by 'pxa_last_gpio'. | ||
| 36 | */ | 105 | */ |
| 106 | extern int pxa_last_gpio; | ||
| 107 | |||
| 37 | #define NR_BUILTIN_GPIO 128 | 108 | #define NR_BUILTIN_GPIO 128 |
| 38 | 109 | ||
| 39 | static inline int gpio_get_value(unsigned gpio) | 110 | static inline int gpio_get_value(unsigned gpio) |
| @@ -56,10 +127,45 @@ static inline void gpio_set_value(unsigned gpio, int value) | |||
| 56 | } | 127 | } |
| 57 | } | 128 | } |
| 58 | 129 | ||
| 59 | #define gpio_cansleep __gpio_cansleep | 130 | #define gpio_cansleep __gpio_cansleep |
| 60 | 131 | #define gpio_to_bank(gpio) ((gpio) >> 5) | |
| 61 | #define gpio_to_irq(gpio) IRQ_GPIO(gpio) | 132 | #define gpio_to_irq(gpio) IRQ_GPIO(gpio) |
| 62 | #define irq_to_gpio(irq) IRQ_TO_GPIO(irq) | 133 | #define irq_to_gpio(irq) IRQ_TO_GPIO(irq) |
| 63 | 134 | ||
| 64 | 135 | ||
| 136 | #ifdef CONFIG_CPU_PXA26x | ||
| 137 | /* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted, | ||
| 138 | * as well as their Alternate Function value being '1' for GPIO in GAFRx. | ||
| 139 | */ | ||
| 140 | static inline int __gpio_is_inverted(unsigned gpio) | ||
| 141 | { | ||
| 142 | return cpu_is_pxa25x() && gpio > 85; | ||
| 143 | } | ||
| 144 | #else | ||
| 145 | static inline int __gpio_is_inverted(unsigned gpio) { return 0; } | ||
| 146 | #endif | ||
| 147 | |||
| 148 | /* | ||
| 149 | * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate | ||
| 150 | * function of a GPIO, and GPDRx cannot be altered once configured. It | ||
| 151 | * is attributed as "occupied" here (I know this terminology isn't | ||
| 152 | * accurate, you are welcome to propose a better one :-) | ||
| 153 | */ | ||
| 154 | static inline int __gpio_is_occupied(unsigned gpio) | ||
| 155 | { | ||
| 156 | if (cpu_is_pxa27x() || cpu_is_pxa25x()) { | ||
| 157 | int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3; | ||
| 158 | int dir = GPDR(gpio) & GPIO_bit(gpio); | ||
| 159 | |||
| 160 | if (__gpio_is_inverted(gpio)) | ||
| 161 | return af != 1 || dir == 0; | ||
| 162 | else | ||
| 163 | return af != 0 || dir != 0; | ||
| 164 | } else | ||
| 165 | return GPDR(gpio) & GPIO_bit(gpio); | ||
| 166 | } | ||
| 167 | |||
| 168 | typedef int (*set_wake_t)(unsigned int irq, unsigned int on); | ||
| 169 | |||
| 170 | extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn); | ||
| 65 | #endif | 171 | #endif |
diff --git a/arch/arm/mach-pxa/include/mach/gumstix.h b/arch/arm/mach-pxa/include/mach/gumstix.h index 099f54a41de4..06abd4160607 100644 --- a/arch/arm/mach-pxa/include/mach/gumstix.h +++ b/arch/arm/mach-pxa/include/mach/gumstix.h | |||
| @@ -97,4 +97,5 @@ has detected a cable insertion; driven low otherwise. */ | |||
| 97 | 97 | ||
| 98 | /* for expansion boards that can't be programatically detected */ | 98 | /* for expansion boards that can't be programatically detected */ |
| 99 | extern int am200_init(void); | 99 | extern int am200_init(void); |
| 100 | extern int am300_init(void); | ||
| 100 | 101 | ||
diff --git a/arch/arm/mach-pxa/include/mach/lubbock.h b/arch/arm/mach-pxa/include/mach/lubbock.h index 4cb24154a5a8..751b74811d0f 100644 --- a/arch/arm/mach-pxa/include/mach/lubbock.h +++ b/arch/arm/mach-pxa/include/mach/lubbock.h | |||
| @@ -25,7 +25,6 @@ | |||
| 25 | 25 | ||
| 26 | /* FPGA register virtual addresses */ | 26 | /* FPGA register virtual addresses */ |
| 27 | #define LUB_WHOAMI __LUB_REG(LUBBOCK_FPGA_PHYS + 0x000) | 27 | #define LUB_WHOAMI __LUB_REG(LUBBOCK_FPGA_PHYS + 0x000) |
| 28 | #define LUB_HEXLED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x010) | ||
| 29 | #define LUB_DISC_BLNK_LED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x040) | 28 | #define LUB_DISC_BLNK_LED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x040) |
| 30 | #define LUB_CONF_SWITCHES __LUB_REG(LUBBOCK_FPGA_PHYS + 0x050) | 29 | #define LUB_CONF_SWITCHES __LUB_REG(LUBBOCK_FPGA_PHYS + 0x050) |
| 31 | #define LUB_USER_SWITCHES __LUB_REG(LUBBOCK_FPGA_PHYS + 0x060) | 30 | #define LUB_USER_SWITCHES __LUB_REG(LUBBOCK_FPGA_PHYS + 0x060) |
diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h index 38d68d99f585..82a399f3f9f2 100644 --- a/arch/arm/mach-pxa/include/mach/magician.h +++ b/arch/arm/mach-pxa/include/mach/magician.h | |||
| @@ -69,7 +69,7 @@ | |||
| 69 | #define IRQ_MAGICIAN_SD (IRQ_BOARD_START + 0) | 69 | #define IRQ_MAGICIAN_SD (IRQ_BOARD_START + 0) |
| 70 | #define IRQ_MAGICIAN_EP (IRQ_BOARD_START + 1) | 70 | #define IRQ_MAGICIAN_EP (IRQ_BOARD_START + 1) |
| 71 | #define IRQ_MAGICIAN_BT (IRQ_BOARD_START + 2) | 71 | #define IRQ_MAGICIAN_BT (IRQ_BOARD_START + 2) |
| 72 | #define IRQ_MAGICIAN_AC (IRQ_BOARD_START + 3) | 72 | #define IRQ_MAGICIAN_VBUS (IRQ_BOARD_START + 3) |
| 73 | 73 | ||
| 74 | /* | 74 | /* |
| 75 | * CPLD EGPIOs | 75 | * CPLD EGPIOs |
diff --git a/arch/arm/mach-pxa/include/mach/mtd-xip.h b/arch/arm/mach-pxa/include/mach/mtd-xip.h index cfca8155be72..297387ec3618 100644 --- a/arch/arm/mach-pxa/include/mach/mtd-xip.h +++ b/arch/arm/mach-pxa/include/mach/mtd-xip.h | |||
| @@ -15,8 +15,8 @@ | |||
| 15 | #ifndef __ARCH_PXA_MTD_XIP_H__ | 15 | #ifndef __ARCH_PXA_MTD_XIP_H__ |
| 16 | #define __ARCH_PXA_MTD_XIP_H__ | 16 | #define __ARCH_PXA_MTD_XIP_H__ |
| 17 | 17 | ||
| 18 | #include <mach/hardware.h> | 18 | #include <mach/regs-ost.h> |
| 19 | #include <mach/pxa-regs.h> | 19 | #include <mach/regs-intc.h> |
| 20 | 20 | ||
| 21 | #define xip_irqpending() (ICIP & ICMR) | 21 | #define xip_irqpending() (ICIP & ICMR) |
| 22 | 22 | ||
diff --git a/arch/arm/mach-pxa/include/mach/palmld.h b/arch/arm/mach-pxa/include/mach/palmld.h new file mode 100644 index 000000000000..7c295a48d784 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/palmld.h | |||
| @@ -0,0 +1,109 @@ | |||
| 1 | /* | ||
| 2 | * GPIOs and interrupts for Palm LifeDrive Handheld Computer | ||
| 3 | * | ||
| 4 | * Authors: Alex Osborne <ato@meshy.org> | ||
| 5 | * Marek Vasut <marek.vasut@gmail.com> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef _INCLUDE_PALMLD_H_ | ||
| 14 | #define _INCLUDE_PALMLD_H_ | ||
| 15 | |||
| 16 | /** HERE ARE GPIOs **/ | ||
| 17 | |||
| 18 | /* GPIOs */ | ||
| 19 | #define GPIO_NR_PALMLD_GPIO_RESET 1 | ||
| 20 | #define GPIO_NR_PALMLD_POWER_DETECT 4 | ||
| 21 | #define GPIO_NR_PALMLD_HOTSYNC_BUTTON_N 10 | ||
| 22 | #define GPIO_NR_PALMLD_POWER_SWITCH 12 | ||
| 23 | #define GPIO_NR_PALMLD_EARPHONE_DETECT 13 | ||
| 24 | #define GPIO_NR_PALMLD_LOCK_SWITCH 15 | ||
| 25 | |||
| 26 | /* SD/MMC */ | ||
| 27 | #define GPIO_NR_PALMLD_SD_DETECT_N 14 | ||
| 28 | #define GPIO_NR_PALMLD_SD_POWER 114 | ||
| 29 | #define GPIO_NR_PALMLD_SD_READONLY 116 | ||
| 30 | |||
| 31 | /* TOUCHSCREEN */ | ||
| 32 | #define GPIO_NR_PALMLD_WM9712_IRQ 27 | ||
| 33 | |||
| 34 | /* IRDA */ | ||
| 35 | #define GPIO_NR_PALMLD_IR_DISABLE 108 | ||
| 36 | |||
| 37 | /* LCD/BACKLIGHT */ | ||
| 38 | #define GPIO_NR_PALMLD_BL_POWER 19 | ||
| 39 | #define GPIO_NR_PALMLD_LCD_POWER 96 | ||
| 40 | |||
| 41 | /* LCD BORDER */ | ||
| 42 | #define GPIO_NR_PALMLD_BORDER_SWITCH 21 | ||
| 43 | #define GPIO_NR_PALMLD_BORDER_SELECT 22 | ||
| 44 | |||
| 45 | /* BLUETOOTH */ | ||
| 46 | #define GPIO_NR_PALMLD_BT_POWER 17 | ||
| 47 | #define GPIO_NR_PALMLD_BT_RESET 83 | ||
| 48 | |||
| 49 | /* PCMCIA (WiFi) */ | ||
| 50 | #define GPIO_NR_PALMLD_PCMCIA_READY 38 | ||
| 51 | #define GPIO_NR_PALMLD_PCMCIA_POWER 36 | ||
| 52 | #define GPIO_NR_PALMLD_PCMCIA_RESET 81 | ||
| 53 | |||
| 54 | /* LEDs */ | ||
| 55 | #define GPIO_NR_PALMLD_LED_GREEN 52 | ||
| 56 | #define GPIO_NR_PALMLD_LED_AMBER 94 | ||
| 57 | |||
| 58 | /* IDE */ | ||
| 59 | #define GPIO_NR_PALMLD_IDE_IRQ 95 | ||
| 60 | #define GPIO_NR_PALMLD_IDE_RESET 98 | ||
| 61 | #define GPIO_NR_PALMLD_IDE_PWEN 115 | ||
| 62 | |||
| 63 | /* USB */ | ||
| 64 | #define GPIO_NR_PALMLD_USB_DETECT_N 3 | ||
| 65 | #define GPIO_NR_PALMLD_USB_READY 86 | ||
| 66 | #define GPIO_NR_PALMLD_USB_RESET 88 | ||
| 67 | #define GPIO_NR_PALMLD_USB_INT 106 | ||
| 68 | #define GPIO_NR_PALMLD_USB_POWER 118 | ||
| 69 | /* 20, 53 and 86 are usb related too */ | ||
| 70 | |||
| 71 | /* INTERRUPTS */ | ||
| 72 | #define IRQ_GPIO_PALMLD_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMLD_GPIO_RESET) | ||
| 73 | #define IRQ_GPIO_PALMLD_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMLD_SD_DETECT_N) | ||
| 74 | #define IRQ_GPIO_PALMLD_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMLD_WM9712_IRQ) | ||
| 75 | #define IRQ_GPIO_PALMLD_IDE_IRQ IRQ_GPIO(GPIO_NR_PALMLD_IDE_IRQ) | ||
| 76 | |||
| 77 | |||
| 78 | /** HERE ARE INIT VALUES **/ | ||
| 79 | |||
| 80 | /* IO mappings */ | ||
| 81 | #define PALMLD_USB_PHYS PXA_CS2_PHYS | ||
| 82 | #define PALMLD_USB_VIRT 0xf0000000 | ||
| 83 | #define PALMLD_USB_SIZE 0x00100000 | ||
| 84 | |||
| 85 | #define PALMLD_IDE_PHYS 0x20000000 | ||
| 86 | #define PALMLD_IDE_VIRT 0xf1000000 | ||
| 87 | #define PALMLD_IDE_SIZE 0x00100000 | ||
| 88 | |||
| 89 | #define PALMLD_PHYS_IO_START 0x40000000 | ||
| 90 | |||
| 91 | /* BATTERY */ | ||
| 92 | #define PALMLD_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */ | ||
| 93 | #define PALMLD_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */ | ||
| 94 | #define PALMLD_BAT_MAX_CURRENT 0 /* unknokn */ | ||
| 95 | #define PALMLD_BAT_MIN_CURRENT 0 /* unknown */ | ||
| 96 | #define PALMLD_BAT_MAX_CHARGE 1 /* unknown */ | ||
| 97 | #define PALMLD_BAT_MIN_CHARGE 1 /* unknown */ | ||
| 98 | #define PALMLD_MAX_LIFE_MINS 240 /* on-life in minutes */ | ||
| 99 | |||
| 100 | #define PALMLD_BAT_MEASURE_DELAY (HZ * 1) | ||
| 101 | |||
| 102 | /* BACKLIGHT */ | ||
| 103 | #define PALMLD_MAX_INTENSITY 0xFE | ||
| 104 | #define PALMLD_DEFAULT_INTENSITY 0x7E | ||
| 105 | #define PALMLD_LIMIT_MASK 0x7F | ||
| 106 | #define PALMLD_PRESCALER 0x3F | ||
| 107 | #define PALMLD_PERIOD_NS 3500 | ||
| 108 | |||
| 109 | #endif | ||
diff --git a/arch/arm/mach-pxa/include/mach/palmt5.h b/arch/arm/mach-pxa/include/mach/palmt5.h new file mode 100644 index 000000000000..94db2881f048 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/palmt5.h | |||
| @@ -0,0 +1,84 @@ | |||
| 1 | /* | ||
| 2 | * GPIOs and interrupts for Palm Tungsten|T5 Handheld Computer | ||
| 3 | * | ||
| 4 | * Authors: Ales Snuparek <snuparek@atlas.cz> | ||
| 5 | * Marek Vasut <marek.vasut@gmail.com> | ||
| 6 | * Justin Kendrick <twilightsentry@gmail.com> | ||
| 7 | * RichardT5 <richard_t5@users.sourceforge.net> | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef _INCLUDE_PALMT5_H_ | ||
| 16 | #define _INCLUDE_PALMT5_H_ | ||
| 17 | |||
| 18 | /** HERE ARE GPIOs **/ | ||
| 19 | |||
| 20 | /* GPIOs */ | ||
| 21 | #define GPIO_NR_PALMT5_GPIO_RESET 1 | ||
| 22 | |||
| 23 | #define GPIO_NR_PALMT5_POWER_DETECT 90 | ||
| 24 | #define GPIO_NR_PALMT5_HOTSYNC_BUTTON_N 10 | ||
| 25 | #define GPIO_NR_PALMT5_EARPHONE_DETECT 107 | ||
| 26 | |||
| 27 | /* SD/MMC */ | ||
| 28 | #define GPIO_NR_PALMT5_SD_DETECT_N 14 | ||
| 29 | #define GPIO_NR_PALMT5_SD_POWER 114 | ||
| 30 | #define GPIO_NR_PALMT5_SD_READONLY 115 | ||
| 31 | |||
| 32 | /* TOUCHSCREEN */ | ||
| 33 | #define GPIO_NR_PALMT5_WM9712_IRQ 27 | ||
| 34 | |||
| 35 | /* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ | ||
| 36 | #define GPIO_NR_PALMT5_IR_DISABLE 40 | ||
| 37 | |||
| 38 | /* USB */ | ||
| 39 | #define GPIO_NR_PALMT5_USB_DETECT_N 15 | ||
| 40 | #define GPIO_NR_PALMT5_USB_POWER 95 | ||
| 41 | #define GPIO_NR_PALMT5_USB_PULLUP 93 | ||
| 42 | |||
| 43 | /* LCD/BACKLIGHT */ | ||
| 44 | #define GPIO_NR_PALMT5_BL_POWER 84 | ||
| 45 | #define GPIO_NR_PALMT5_LCD_POWER 96 | ||
| 46 | |||
| 47 | /* BLUETOOTH */ | ||
| 48 | #define GPIO_NR_PALMT5_BT_POWER 17 | ||
| 49 | #define GPIO_NR_PALMT5_BT_RESET 83 | ||
| 50 | |||
| 51 | /* INTERRUPTS */ | ||
| 52 | #define IRQ_GPIO_PALMT5_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMT5_SD_DETECT_N) | ||
| 53 | #define IRQ_GPIO_PALMT5_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMT5_WM9712_IRQ) | ||
| 54 | #define IRQ_GPIO_PALMT5_USB_DETECT IRQ_GPIO(GPIO_NR_PALMT5_USB_DETECT) | ||
| 55 | #define IRQ_GPIO_PALMT5_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMT5_GPIO_RESET) | ||
| 56 | |||
| 57 | /** HERE ARE INIT VALUES **/ | ||
| 58 | |||
| 59 | /* Various addresses */ | ||
| 60 | #define PALMT5_PHYS_RAM_START 0xa0000000 | ||
| 61 | #define PALMT5_PHYS_IO_START 0x40000000 | ||
| 62 | |||
| 63 | /* TOUCHSCREEN */ | ||
| 64 | #define AC97_LINK_FRAME 21 | ||
| 65 | |||
| 66 | /* BATTERY */ | ||
| 67 | #define PALMT5_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ | ||
| 68 | #define PALMT5_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ | ||
| 69 | #define PALMT5_BAT_MAX_CURRENT 0 /* unknokn */ | ||
| 70 | #define PALMT5_BAT_MIN_CURRENT 0 /* unknown */ | ||
| 71 | #define PALMT5_BAT_MAX_CHARGE 1 /* unknown */ | ||
| 72 | #define PALMT5_BAT_MIN_CHARGE 1 /* unknown */ | ||
| 73 | #define PALMT5_MAX_LIFE_MINS 360 /* on-life in minutes */ | ||
| 74 | |||
| 75 | #define PALMT5_BAT_MEASURE_DELAY (HZ * 1) | ||
| 76 | |||
| 77 | /* BACKLIGHT */ | ||
| 78 | #define PALMT5_MAX_INTENSITY 0xFE | ||
| 79 | #define PALMT5_DEFAULT_INTENSITY 0x7E | ||
| 80 | #define PALMT5_LIMIT_MASK 0x7F | ||
| 81 | #define PALMT5_PRESCALER 0x3F | ||
| 82 | #define PALMT5_PERIOD_NS 3500 | ||
| 83 | |||
| 84 | #endif | ||
diff --git a/arch/arm/mach-pxa/include/mach/pm.h b/arch/arm/mach-pxa/include/mach/pm.h index 83342469acac..a6eeef8a075f 100644 --- a/arch/arm/mach-pxa/include/mach/pm.h +++ b/arch/arm/mach-pxa/include/mach/pm.h | |||
| @@ -27,3 +27,13 @@ extern void pxa27x_cpu_suspend(unsigned int); | |||
| 27 | extern void pxa_cpu_resume(void); | 27 | extern void pxa_cpu_resume(void); |
| 28 | 28 | ||
| 29 | extern int pxa_pm_enter(suspend_state_t state); | 29 | extern int pxa_pm_enter(suspend_state_t state); |
| 30 | |||
| 31 | /* NOTE: this is for PM debugging on Lubbock, it's really a big | ||
| 32 | * ugly, but let's keep the crap minimum here, instead of direct | ||
| 33 | * accessing the LUBBOCK CPLD registers in arch/arm/mach-pxa/pm.c | ||
| 34 | */ | ||
| 35 | #ifdef CONFIG_ARCH_LUBBOCK | ||
| 36 | extern void lubbock_set_hexled(uint32_t value); | ||
| 37 | #else | ||
| 38 | #define lubbock_set_hexled(x) | ||
| 39 | #endif | ||
diff --git a/arch/arm/mach-pxa/include/mach/pxa-regs.h b/arch/arm/mach-pxa/include/mach/pxa-regs.h deleted file mode 100644 index 31d615aa7723..000000000000 --- a/arch/arm/mach-pxa/include/mach/pxa-regs.h +++ /dev/null | |||
| @@ -1,263 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-pxa/include/mach/pxa-regs.h | ||
| 3 | * | ||
| 4 | * Author: Nicolas Pitre | ||
| 5 | * Created: Jun 15, 2001 | ||
| 6 | * Copyright: MontaVista Software Inc. | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __PXA_REGS_H | ||
| 14 | #define __PXA_REGS_H | ||
| 15 | |||
| 16 | #include <mach/hardware.h> | ||
| 17 | |||
| 18 | /* | ||
| 19 | * PXA Chip selects | ||
| 20 | */ | ||
| 21 | |||
| 22 | #define PXA_CS0_PHYS 0x00000000 | ||
| 23 | #define PXA_CS1_PHYS 0x04000000 | ||
| 24 | #define PXA_CS2_PHYS 0x08000000 | ||
| 25 | #define PXA_CS3_PHYS 0x0C000000 | ||
| 26 | #define PXA_CS4_PHYS 0x10000000 | ||
| 27 | #define PXA_CS5_PHYS 0x14000000 | ||
| 28 | |||
| 29 | |||
| 30 | /* | ||
| 31 | * Personal Computer Memory Card International Association (PCMCIA) sockets | ||
| 32 | */ | ||
| 33 | |||
| 34 | #define PCMCIAPrtSp 0x04000000 /* PCMCIA Partition Space [byte] */ | ||
| 35 | #define PCMCIASp (4*PCMCIAPrtSp) /* PCMCIA Space [byte] */ | ||
| 36 | #define PCMCIAIOSp PCMCIAPrtSp /* PCMCIA I/O Space [byte] */ | ||
| 37 | #define PCMCIAAttrSp PCMCIAPrtSp /* PCMCIA Attribute Space [byte] */ | ||
| 38 | #define PCMCIAMemSp PCMCIAPrtSp /* PCMCIA Memory Space [byte] */ | ||
| 39 | |||
| 40 | #define PCMCIA0Sp PCMCIASp /* PCMCIA 0 Space [byte] */ | ||
| 41 | #define PCMCIA0IOSp PCMCIAIOSp /* PCMCIA 0 I/O Space [byte] */ | ||
| 42 | #define PCMCIA0AttrSp PCMCIAAttrSp /* PCMCIA 0 Attribute Space [byte] */ | ||
| 43 | #define PCMCIA0MemSp PCMCIAMemSp /* PCMCIA 0 Memory Space [byte] */ | ||
| 44 | |||
| 45 | #define PCMCIA1Sp PCMCIASp /* PCMCIA 1 Space [byte] */ | ||
| 46 | #define PCMCIA1IOSp PCMCIAIOSp /* PCMCIA 1 I/O Space [byte] */ | ||
| 47 | #define PCMCIA1AttrSp PCMCIAAttrSp /* PCMCIA 1 Attribute Space [byte] */ | ||
| 48 | #define PCMCIA1MemSp PCMCIAMemSp /* PCMCIA 1 Memory Space [byte] */ | ||
| 49 | |||
| 50 | #define _PCMCIA(Nb) /* PCMCIA [0..1] */ \ | ||
| 51 | (0x20000000 + (Nb)*PCMCIASp) | ||
| 52 | #define _PCMCIAIO(Nb) _PCMCIA (Nb) /* PCMCIA I/O [0..1] */ | ||
| 53 | #define _PCMCIAAttr(Nb) /* PCMCIA Attribute [0..1] */ \ | ||
| 54 | (_PCMCIA (Nb) + 2*PCMCIAPrtSp) | ||
| 55 | #define _PCMCIAMem(Nb) /* PCMCIA Memory [0..1] */ \ | ||
| 56 | (_PCMCIA (Nb) + 3*PCMCIAPrtSp) | ||
| 57 | |||
| 58 | #define _PCMCIA0 _PCMCIA (0) /* PCMCIA 0 */ | ||
| 59 | #define _PCMCIA0IO _PCMCIAIO (0) /* PCMCIA 0 I/O */ | ||
| 60 | #define _PCMCIA0Attr _PCMCIAAttr (0) /* PCMCIA 0 Attribute */ | ||
| 61 | #define _PCMCIA0Mem _PCMCIAMem (0) /* PCMCIA 0 Memory */ | ||
| 62 | |||
| 63 | #define _PCMCIA1 _PCMCIA (1) /* PCMCIA 1 */ | ||
| 64 | #define _PCMCIA1IO _PCMCIAIO (1) /* PCMCIA 1 I/O */ | ||
| 65 | #define _PCMCIA1Attr _PCMCIAAttr (1) /* PCMCIA 1 Attribute */ | ||
| 66 | #define _PCMCIA1Mem _PCMCIAMem (1) /* PCMCIA 1 Memory */ | ||
| 67 | |||
| 68 | |||
| 69 | |||
| 70 | /* | ||
| 71 | * DMA Controller | ||
| 72 | */ | ||
| 73 | #define DCSR(x) __REG2(0x40000000, (x) << 2) | ||
| 74 | |||
| 75 | #define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ | ||
| 76 | #define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */ | ||
| 77 | #define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */ | ||
| 78 | #define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ | ||
| 79 | #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ | ||
| 80 | #define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */ | ||
| 81 | #define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ | ||
| 82 | #define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ | ||
| 83 | |||
| 84 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) | ||
| 85 | #define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */ | ||
| 86 | #define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ | ||
| 87 | #define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ | ||
| 88 | #define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */ | ||
| 89 | #define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */ | ||
| 90 | #define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */ | ||
| 91 | #define DCSR_EORINTR (1 << 9) /* The end of Receive */ | ||
| 92 | #endif | ||
| 93 | |||
| 94 | #define DALGN __REG(0x400000a0) /* DMA Alignment Register */ | ||
| 95 | #define DINT __REG(0x400000f0) /* DMA Interrupt Register */ | ||
| 96 | |||
| 97 | #define DRCMR(n) (*(((n) < 64) ? \ | ||
| 98 | &__REG2(0x40000100, ((n) & 0x3f) << 2) : \ | ||
| 99 | &__REG2(0x40001100, ((n) & 0x3f) << 2))) | ||
| 100 | |||
| 101 | #define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */ | ||
| 102 | #define DRCMR_CHLNUM 0x1f /* mask for Channel Number (read / write) */ | ||
| 103 | |||
| 104 | #define DDADR(x) __REG2(0x40000200, (x) << 4) | ||
| 105 | #define DSADR(x) __REG2(0x40000204, (x) << 4) | ||
| 106 | #define DTADR(x) __REG2(0x40000208, (x) << 4) | ||
| 107 | #define DCMD(x) __REG2(0x4000020c, (x) << 4) | ||
| 108 | |||
| 109 | #define DDADR_DESCADDR 0xfffffff0 /* Address of next descriptor (mask) */ | ||
| 110 | #define DDADR_STOP (1 << 0) /* Stop (read / write) */ | ||
| 111 | |||
| 112 | #define DCMD_INCSRCADDR (1 << 31) /* Source Address Increment Setting. */ | ||
| 113 | #define DCMD_INCTRGADDR (1 << 30) /* Target Address Increment Setting. */ | ||
| 114 | #define DCMD_FLOWSRC (1 << 29) /* Flow Control by the source. */ | ||
| 115 | #define DCMD_FLOWTRG (1 << 28) /* Flow Control by the target. */ | ||
| 116 | #define DCMD_STARTIRQEN (1 << 22) /* Start Interrupt Enable */ | ||
| 117 | #define DCMD_ENDIRQEN (1 << 21) /* End Interrupt Enable */ | ||
| 118 | #define DCMD_ENDIAN (1 << 18) /* Device Endian-ness. */ | ||
| 119 | #define DCMD_BURST8 (1 << 16) /* 8 byte burst */ | ||
| 120 | #define DCMD_BURST16 (2 << 16) /* 16 byte burst */ | ||
| 121 | #define DCMD_BURST32 (3 << 16) /* 32 byte burst */ | ||
| 122 | #define DCMD_WIDTH1 (1 << 14) /* 1 byte width */ | ||
| 123 | #define DCMD_WIDTH2 (2 << 14) /* 2 byte width (HalfWord) */ | ||
| 124 | #define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */ | ||
| 125 | #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ | ||
| 126 | |||
| 127 | /* | ||
| 128 | * Real Time Clock | ||
| 129 | */ | ||
| 130 | |||
| 131 | #define RCNR __REG(0x40900000) /* RTC Count Register */ | ||
| 132 | #define RTAR __REG(0x40900004) /* RTC Alarm Register */ | ||
| 133 | #define RTSR __REG(0x40900008) /* RTC Status Register */ | ||
| 134 | #define RTTR __REG(0x4090000C) /* RTC Timer Trim Register */ | ||
| 135 | #define PIAR __REG(0x40900038) /* Periodic Interrupt Alarm Register */ | ||
| 136 | |||
| 137 | #define RTSR_PICE (1 << 15) /* Periodic interrupt count enable */ | ||
| 138 | #define RTSR_PIALE (1 << 14) /* Periodic interrupt Alarm enable */ | ||
| 139 | #define RTSR_HZE (1 << 3) /* HZ interrupt enable */ | ||
| 140 | #define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */ | ||
| 141 | #define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ | ||
| 142 | #define RTSR_AL (1 << 0) /* RTC alarm detected */ | ||
| 143 | |||
| 144 | |||
| 145 | /* | ||
| 146 | * OS Timer & Match Registers | ||
| 147 | */ | ||
| 148 | |||
| 149 | #define OSMR0 __REG(0x40A00000) /* */ | ||
| 150 | #define OSMR1 __REG(0x40A00004) /* */ | ||
| 151 | #define OSMR2 __REG(0x40A00008) /* */ | ||
| 152 | #define OSMR3 __REG(0x40A0000C) /* */ | ||
| 153 | #define OSMR4 __REG(0x40A00080) /* */ | ||
| 154 | #define OSCR __REG(0x40A00010) /* OS Timer Counter Register */ | ||
| 155 | #define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register */ | ||
| 156 | #define OMCR4 __REG(0x40A000C0) /* */ | ||
| 157 | #define OSSR __REG(0x40A00014) /* OS Timer Status Register */ | ||
| 158 | #define OWER __REG(0x40A00018) /* OS Timer Watchdog Enable Register */ | ||
| 159 | #define OIER __REG(0x40A0001C) /* OS Timer Interrupt Enable Register */ | ||
| 160 | |||
| 161 | #define OSSR_M3 (1 << 3) /* Match status channel 3 */ | ||
| 162 | #define OSSR_M2 (1 << 2) /* Match status channel 2 */ | ||
| 163 | #define OSSR_M1 (1 << 1) /* Match status channel 1 */ | ||
| 164 | #define OSSR_M0 (1 << 0) /* Match status channel 0 */ | ||
| 165 | |||
| 166 | #define OWER_WME (1 << 0) /* Watchdog Match Enable */ | ||
| 167 | |||
| 168 | #define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */ | ||
| 169 | #define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */ | ||
| 170 | #define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */ | ||
| 171 | #define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */ | ||
| 172 | |||
| 173 | |||
| 174 | /* | ||
| 175 | * Interrupt Controller | ||
| 176 | */ | ||
| 177 | |||
| 178 | #define ICIP __REG(0x40D00000) /* Interrupt Controller IRQ Pending Register */ | ||
| 179 | #define ICMR __REG(0x40D00004) /* Interrupt Controller Mask Register */ | ||
| 180 | #define ICLR __REG(0x40D00008) /* Interrupt Controller Level Register */ | ||
| 181 | #define ICFP __REG(0x40D0000C) /* Interrupt Controller FIQ Pending Register */ | ||
| 182 | #define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */ | ||
| 183 | #define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */ | ||
| 184 | |||
| 185 | #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ | ||
| 186 | #define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */ | ||
| 187 | #define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */ | ||
| 188 | #define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */ | ||
| 189 | #define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */ | ||
| 190 | |||
| 191 | /* | ||
| 192 | * General Purpose I/O | ||
| 193 | */ | ||
| 194 | |||
| 195 | #define GPLR0 __REG(0x40E00000) /* GPIO Pin-Level Register GPIO<31:0> */ | ||
| 196 | #define GPLR1 __REG(0x40E00004) /* GPIO Pin-Level Register GPIO<63:32> */ | ||
| 197 | #define GPLR2 __REG(0x40E00008) /* GPIO Pin-Level Register GPIO<80:64> */ | ||
| 198 | |||
| 199 | #define GPDR0 __REG(0x40E0000C) /* GPIO Pin Direction Register GPIO<31:0> */ | ||
| 200 | #define GPDR1 __REG(0x40E00010) /* GPIO Pin Direction Register GPIO<63:32> */ | ||
| 201 | #define GPDR2 __REG(0x40E00014) /* GPIO Pin Direction Register GPIO<80:64> */ | ||
| 202 | |||
| 203 | #define GPSR0 __REG(0x40E00018) /* GPIO Pin Output Set Register GPIO<31:0> */ | ||
| 204 | #define GPSR1 __REG(0x40E0001C) /* GPIO Pin Output Set Register GPIO<63:32> */ | ||
| 205 | #define GPSR2 __REG(0x40E00020) /* GPIO Pin Output Set Register GPIO<80:64> */ | ||
| 206 | |||
| 207 | #define GPCR0 __REG(0x40E00024) /* GPIO Pin Output Clear Register GPIO<31:0> */ | ||
| 208 | #define GPCR1 __REG(0x40E00028) /* GPIO Pin Output Clear Register GPIO <63:32> */ | ||
| 209 | #define GPCR2 __REG(0x40E0002C) /* GPIO Pin Output Clear Register GPIO <80:64> */ | ||
| 210 | |||
| 211 | #define GRER0 __REG(0x40E00030) /* GPIO Rising-Edge Detect Register GPIO<31:0> */ | ||
| 212 | #define GRER1 __REG(0x40E00034) /* GPIO Rising-Edge Detect Register GPIO<63:32> */ | ||
| 213 | #define GRER2 __REG(0x40E00038) /* GPIO Rising-Edge Detect Register GPIO<80:64> */ | ||
| 214 | |||
| 215 | #define GFER0 __REG(0x40E0003C) /* GPIO Falling-Edge Detect Register GPIO<31:0> */ | ||
| 216 | #define GFER1 __REG(0x40E00040) /* GPIO Falling-Edge Detect Register GPIO<63:32> */ | ||
| 217 | #define GFER2 __REG(0x40E00044) /* GPIO Falling-Edge Detect Register GPIO<80:64> */ | ||
| 218 | |||
| 219 | #define GEDR0 __REG(0x40E00048) /* GPIO Edge Detect Status Register GPIO<31:0> */ | ||
| 220 | #define GEDR1 __REG(0x40E0004C) /* GPIO Edge Detect Status Register GPIO<63:32> */ | ||
| 221 | #define GEDR2 __REG(0x40E00050) /* GPIO Edge Detect Status Register GPIO<80:64> */ | ||
| 222 | |||
| 223 | #define GAFR0_L __REG(0x40E00054) /* GPIO Alternate Function Select Register GPIO<15:0> */ | ||
| 224 | #define GAFR0_U __REG(0x40E00058) /* GPIO Alternate Function Select Register GPIO<31:16> */ | ||
| 225 | #define GAFR1_L __REG(0x40E0005C) /* GPIO Alternate Function Select Register GPIO<47:32> */ | ||
| 226 | #define GAFR1_U __REG(0x40E00060) /* GPIO Alternate Function Select Register GPIO<63:48> */ | ||
| 227 | #define GAFR2_L __REG(0x40E00064) /* GPIO Alternate Function Select Register GPIO<79:64> */ | ||
| 228 | #define GAFR2_U __REG(0x40E00068) /* GPIO Alternate Function Select Register GPIO<95-80> */ | ||
| 229 | #define GAFR3_L __REG(0x40E0006C) /* GPIO Alternate Function Select Register GPIO<111:96> */ | ||
| 230 | #define GAFR3_U __REG(0x40E00070) /* GPIO Alternate Function Select Register GPIO<127:112> */ | ||
| 231 | |||
| 232 | #define GPLR3 __REG(0x40E00100) /* GPIO Pin-Level Register GPIO<127:96> */ | ||
| 233 | #define GPDR3 __REG(0x40E0010C) /* GPIO Pin Direction Register GPIO<127:96> */ | ||
| 234 | #define GPSR3 __REG(0x40E00118) /* GPIO Pin Output Set Register GPIO<127:96> */ | ||
| 235 | #define GPCR3 __REG(0x40E00124) /* GPIO Pin Output Clear Register GPIO<127:96> */ | ||
| 236 | #define GRER3 __REG(0x40E00130) /* GPIO Rising-Edge Detect Register GPIO<127:96> */ | ||
| 237 | #define GFER3 __REG(0x40E0013C) /* GPIO Falling-Edge Detect Register GPIO<127:96> */ | ||
| 238 | #define GEDR3 __REG(0x40E00148) /* GPIO Edge Detect Status Register GPIO<127:96> */ | ||
| 239 | |||
| 240 | /* More handy macros. The argument is a literal GPIO number. */ | ||
| 241 | |||
| 242 | #define GPIO_bit(x) (1 << ((x) & 0x1f)) | ||
| 243 | |||
| 244 | #define _GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3) | ||
| 245 | #define _GPDR(x) __REG2(0x40E0000C, ((x) & 0x60) >> 3) | ||
| 246 | #define _GPSR(x) __REG2(0x40E00018, ((x) & 0x60) >> 3) | ||
| 247 | #define _GPCR(x) __REG2(0x40E00024, ((x) & 0x60) >> 3) | ||
| 248 | #define _GRER(x) __REG2(0x40E00030, ((x) & 0x60) >> 3) | ||
| 249 | #define _GFER(x) __REG2(0x40E0003C, ((x) & 0x60) >> 3) | ||
| 250 | #define _GEDR(x) __REG2(0x40E00048, ((x) & 0x60) >> 3) | ||
| 251 | #define _GAFR(x) __REG2(0x40E00054, ((x) & 0x70) >> 2) | ||
| 252 | |||
| 253 | #define GPLR(x) (*((((x) & 0x7f) < 96) ? &_GPLR(x) : &GPLR3)) | ||
| 254 | #define GPDR(x) (*((((x) & 0x7f) < 96) ? &_GPDR(x) : &GPDR3)) | ||
| 255 | #define GPSR(x) (*((((x) & 0x7f) < 96) ? &_GPSR(x) : &GPSR3)) | ||
| 256 | #define GPCR(x) (*((((x) & 0x7f) < 96) ? &_GPCR(x) : &GPCR3)) | ||
| 257 | #define GRER(x) (*((((x) & 0x7f) < 96) ? &_GRER(x) : &GRER3)) | ||
| 258 | #define GFER(x) (*((((x) & 0x7f) < 96) ? &_GFER(x) : &GFER3)) | ||
| 259 | #define GEDR(x) (*((((x) & 0x7f) < 96) ? &_GEDR(x) : &GEDR3)) | ||
| 260 | #define GAFR(x) (*((((x) & 0x7f) < 96) ? &_GAFR(x) : \ | ||
| 261 | ((((x) & 0x7f) < 112) ? &GAFR3_L : &GAFR3_U))) | ||
| 262 | |||
| 263 | #endif | ||
diff --git a/arch/arm/mach-pxa/include/mach/pxa25x.h b/arch/arm/mach-pxa/include/mach/pxa25x.h new file mode 100644 index 000000000000..508c3ba1f4d0 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/pxa25x.h | |||
| @@ -0,0 +1,8 @@ | |||
| 1 | #ifndef __MACH_PXA25x_H | ||
| 2 | #define __MACH_PXA25x_H | ||
| 3 | |||
| 4 | #include <mach/hardware.h> | ||
| 5 | #include <mach/pxa2xx-regs.h> | ||
| 6 | #include <mach/mfp-pxa25x.h> | ||
| 7 | |||
| 8 | #endif /* __MACH_PXA25x_H */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h new file mode 100644 index 000000000000..6876e16c2970 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/pxa27x.h | |||
| @@ -0,0 +1,19 @@ | |||
| 1 | #ifndef __MACH_PXA27x_H | ||
| 2 | #define __MACH_PXA27x_H | ||
| 3 | |||
| 4 | #include <mach/hardware.h> | ||
| 5 | #include <mach/pxa2xx-regs.h> | ||
| 6 | #include <mach/mfp-pxa27x.h> | ||
| 7 | |||
| 8 | #define ARB_CNTRL __REG(0x48000048) /* Arbiter Control Register */ | ||
| 9 | |||
| 10 | #define ARB_DMA_SLV_PARK (1<<31) /* Be parked with DMA slave when idle */ | ||
| 11 | #define ARB_CI_PARK (1<<30) /* Be parked with Camera Interface when idle */ | ||
| 12 | #define ARB_EX_MEM_PARK (1<<29) /* Be parked with external MEMC when idle */ | ||
| 13 | #define ARB_INT_MEM_PARK (1<<28) /* Be parked with internal MEMC when idle */ | ||
| 14 | #define ARB_USB_PARK (1<<27) /* Be parked with USB when idle */ | ||
| 15 | #define ARB_LCD_PARK (1<<26) /* Be parked with LCD when idle */ | ||
| 16 | #define ARB_DMA_PARK (1<<25) /* Be parked with DMA when idle */ | ||
| 17 | #define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ | ||
| 18 | #define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ | ||
| 19 | #endif /* __MACH_PXA27x_H */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h b/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h index d83393e25273..1209c44aa6f1 100644 --- a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h +++ b/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h | |||
| @@ -3,6 +3,8 @@ | |||
| 3 | 3 | ||
| 4 | #warning Please use mfp-pxa2[57]x.h instead of pxa2xx-gpio.h | 4 | #warning Please use mfp-pxa2[57]x.h instead of pxa2xx-gpio.h |
| 5 | 5 | ||
| 6 | #include <mach/gpio.h> | ||
| 7 | |||
| 6 | /* GPIO alternate function assignments */ | 8 | /* GPIO alternate function assignments */ |
| 7 | 9 | ||
| 8 | #define GPIO1_RST 1 /* reset */ | 10 | #define GPIO1_RST 1 /* reset */ |
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h index 77102d695cc7..4fcddd9cab76 100644 --- a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h +++ b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h | |||
| @@ -14,6 +14,19 @@ | |||
| 14 | #ifndef __PXA2XX_REGS_H | 14 | #ifndef __PXA2XX_REGS_H |
| 15 | #define __PXA2XX_REGS_H | 15 | #define __PXA2XX_REGS_H |
| 16 | 16 | ||
| 17 | #include <mach/hardware.h> | ||
| 18 | |||
| 19 | /* | ||
| 20 | * PXA Chip selects | ||
| 21 | */ | ||
| 22 | |||
| 23 | #define PXA_CS0_PHYS 0x00000000 | ||
| 24 | #define PXA_CS1_PHYS 0x04000000 | ||
| 25 | #define PXA_CS2_PHYS 0x08000000 | ||
| 26 | #define PXA_CS3_PHYS 0x0C000000 | ||
| 27 | #define PXA_CS4_PHYS 0x10000000 | ||
| 28 | #define PXA_CS5_PHYS 0x14000000 | ||
| 29 | |||
| 17 | /* | 30 | /* |
| 18 | * Memory controller | 31 | * Memory controller |
| 19 | */ | 32 | */ |
| @@ -69,24 +82,6 @@ | |||
| 69 | #define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */ | 82 | #define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */ |
| 70 | #define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */ | 83 | #define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */ |
| 71 | 84 | ||
| 72 | |||
| 73 | #ifdef CONFIG_PXA27x | ||
| 74 | |||
| 75 | #define ARB_CNTRL __REG(0x48000048) /* Arbiter Control Register */ | ||
| 76 | |||
| 77 | #define ARB_DMA_SLV_PARK (1<<31) /* Be parked with DMA slave when idle */ | ||
| 78 | #define ARB_CI_PARK (1<<30) /* Be parked with Camera Interface when idle */ | ||
| 79 | #define ARB_EX_MEM_PARK (1<<29) /* Be parked with external MEMC when idle */ | ||
| 80 | #define ARB_INT_MEM_PARK (1<<28) /* Be parked with internal MEMC when idle */ | ||
| 81 | #define ARB_USB_PARK (1<<27) /* Be parked with USB when idle */ | ||
| 82 | #define ARB_LCD_PARK (1<<26) /* Be parked with LCD when idle */ | ||
| 83 | #define ARB_DMA_PARK (1<<25) /* Be parked with DMA when idle */ | ||
| 84 | #define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ | ||
| 85 | #define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ | ||
| 86 | |||
| 87 | #endif | ||
| 88 | |||
| 89 | |||
| 90 | /* | 85 | /* |
| 91 | * Power Manager | 86 | * Power Manager |
| 92 | */ | 87 | */ |
diff --git a/arch/arm/mach-pxa/include/mach/pxa300.h b/arch/arm/mach-pxa/include/mach/pxa300.h new file mode 100644 index 000000000000..2f33076c9e48 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/pxa300.h | |||
| @@ -0,0 +1,8 @@ | |||
| 1 | #ifndef __MACH_PXA300_H | ||
| 2 | #define __MACH_PXA300_H | ||
| 3 | |||
| 4 | #include <mach/hardware.h> | ||
| 5 | #include <mach/pxa3xx-regs.h> | ||
| 6 | #include <mach/mfp-pxa300.h> | ||
| 7 | |||
| 8 | #endif /* __MACH_PXA300_H */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/pxa320.h b/arch/arm/mach-pxa/include/mach/pxa320.h new file mode 100644 index 000000000000..cab78e903273 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/pxa320.h | |||
| @@ -0,0 +1,9 @@ | |||
| 1 | #ifndef __MACH_PXA320_H | ||
| 2 | #define __MACH_PXA320_H | ||
| 3 | |||
| 4 | #include <mach/hardware.h> | ||
| 5 | #include <mach/pxa3xx-regs.h> | ||
| 6 | #include <mach/mfp-pxa320.h> | ||
| 7 | |||
| 8 | #endif /* __MACH_PXA320_H */ | ||
| 9 | |||
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h index bcf3fb2c4b3a..7d1a059b3d43 100644 --- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h +++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h | |||
| @@ -13,6 +13,17 @@ | |||
| 13 | #ifndef __ASM_ARCH_PXA3XX_REGS_H | 13 | #ifndef __ASM_ARCH_PXA3XX_REGS_H |
| 14 | #define __ASM_ARCH_PXA3XX_REGS_H | 14 | #define __ASM_ARCH_PXA3XX_REGS_H |
| 15 | 15 | ||
| 16 | #include <mach/hardware.h> | ||
| 17 | |||
| 18 | /* | ||
| 19 | * Static Chip Selects | ||
| 20 | */ | ||
| 21 | |||
| 22 | #define PXA300_CS0_PHYS (0x00000000) /* PXA300/PXA310 _only_ */ | ||
| 23 | #define PXA300_CS1_PHYS (0x30000000) /* PXA300/PXA310 _only_ */ | ||
| 24 | #define PXA3xx_CS2_PHYS (0x10000000) | ||
| 25 | #define PXA3xx_CS3_PHYS (0x14000000) | ||
| 26 | |||
| 16 | /* | 27 | /* |
| 17 | * Oscillator Configuration Register (OSCC) | 28 | * Oscillator Configuration Register (OSCC) |
| 18 | */ | 29 | */ |
diff --git a/arch/arm/mach-pxa/include/mach/pxa930.h b/arch/arm/mach-pxa/include/mach/pxa930.h new file mode 100644 index 000000000000..d45f76a9b54d --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/pxa930.h | |||
| @@ -0,0 +1,8 @@ | |||
| 1 | #ifndef __MACH_PXA930_H | ||
| 2 | #define __MACH_PXA930_H | ||
| 3 | |||
| 4 | #include <mach/hardware.h> | ||
| 5 | #include <mach/pxa3xx-regs.h> | ||
| 6 | #include <mach/mfp-pxa930.h> | ||
| 7 | |||
| 8 | #endif /* __MACH_PXA930_H */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/regs-intc.h b/arch/arm/mach-pxa/include/mach/regs-intc.h new file mode 100644 index 000000000000..ad23e74b762f --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/regs-intc.h | |||
| @@ -0,0 +1,23 @@ | |||
| 1 | #ifndef __ASM_MACH_REGS_INTC_H | ||
| 2 | #define __ASM_MACH_REGS_INTC_H | ||
| 3 | |||
| 4 | #include <mach/hardware.h> | ||
| 5 | |||
| 6 | /* | ||
| 7 | * Interrupt Controller | ||
| 8 | */ | ||
| 9 | |||
| 10 | #define ICIP __REG(0x40D00000) /* Interrupt Controller IRQ Pending Register */ | ||
| 11 | #define ICMR __REG(0x40D00004) /* Interrupt Controller Mask Register */ | ||
| 12 | #define ICLR __REG(0x40D00008) /* Interrupt Controller Level Register */ | ||
| 13 | #define ICFP __REG(0x40D0000C) /* Interrupt Controller FIQ Pending Register */ | ||
| 14 | #define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */ | ||
| 15 | #define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */ | ||
| 16 | |||
| 17 | #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ | ||
| 18 | #define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */ | ||
| 19 | #define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */ | ||
| 20 | #define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */ | ||
| 21 | #define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */ | ||
| 22 | |||
| 23 | #endif /* __ASM_MACH_REGS_INTC_H */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/regs-ost.h b/arch/arm/mach-pxa/include/mach/regs-ost.h new file mode 100644 index 000000000000..a3e5f86ef67e --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/regs-ost.h | |||
| @@ -0,0 +1,34 @@ | |||
| 1 | #ifndef __ASM_MACH_REGS_OST_H | ||
| 2 | #define __ASM_MACH_REGS_OST_H | ||
| 3 | |||
| 4 | #include <mach/hardware.h> | ||
| 5 | |||
| 6 | /* | ||
| 7 | * OS Timer & Match Registers | ||
| 8 | */ | ||
| 9 | |||
| 10 | #define OSMR0 __REG(0x40A00000) /* */ | ||
| 11 | #define OSMR1 __REG(0x40A00004) /* */ | ||
| 12 | #define OSMR2 __REG(0x40A00008) /* */ | ||
| 13 | #define OSMR3 __REG(0x40A0000C) /* */ | ||
| 14 | #define OSMR4 __REG(0x40A00080) /* */ | ||
| 15 | #define OSCR __REG(0x40A00010) /* OS Timer Counter Register */ | ||
| 16 | #define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register */ | ||
| 17 | #define OMCR4 __REG(0x40A000C0) /* */ | ||
| 18 | #define OSSR __REG(0x40A00014) /* OS Timer Status Register */ | ||
| 19 | #define OWER __REG(0x40A00018) /* OS Timer Watchdog Enable Register */ | ||
| 20 | #define OIER __REG(0x40A0001C) /* OS Timer Interrupt Enable Register */ | ||
| 21 | |||
| 22 | #define OSSR_M3 (1 << 3) /* Match status channel 3 */ | ||
| 23 | #define OSSR_M2 (1 << 2) /* Match status channel 2 */ | ||
| 24 | #define OSSR_M1 (1 << 1) /* Match status channel 1 */ | ||
| 25 | #define OSSR_M0 (1 << 0) /* Match status channel 0 */ | ||
| 26 | |||
| 27 | #define OWER_WME (1 << 0) /* Watchdog Match Enable */ | ||
| 28 | |||
| 29 | #define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */ | ||
| 30 | #define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */ | ||
| 31 | #define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */ | ||
| 32 | #define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */ | ||
| 33 | |||
| 34 | #endif /* __ASM_MACH_REGS_OST_H */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/regs-rtc.h b/arch/arm/mach-pxa/include/mach/regs-rtc.h new file mode 100644 index 000000000000..f0e4a589bbe1 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/regs-rtc.h | |||
| @@ -0,0 +1,23 @@ | |||
| 1 | #ifndef __ASM_MACH_REGS_RTC_H | ||
| 2 | #define __ASM_MACH_REGS_RTC_H | ||
| 3 | |||
| 4 | #include <mach/hardware.h> | ||
| 5 | |||
| 6 | /* | ||
| 7 | * Real Time Clock | ||
| 8 | */ | ||
| 9 | |||
| 10 | #define RCNR __REG(0x40900000) /* RTC Count Register */ | ||
| 11 | #define RTAR __REG(0x40900004) /* RTC Alarm Register */ | ||
| 12 | #define RTSR __REG(0x40900008) /* RTC Status Register */ | ||
| 13 | #define RTTR __REG(0x4090000C) /* RTC Timer Trim Register */ | ||
| 14 | #define PIAR __REG(0x40900038) /* Periodic Interrupt Alarm Register */ | ||
| 15 | |||
| 16 | #define RTSR_PICE (1 << 15) /* Periodic interrupt count enable */ | ||
| 17 | #define RTSR_PIALE (1 << 14) /* Periodic interrupt Alarm enable */ | ||
| 18 | #define RTSR_HZE (1 << 3) /* HZ interrupt enable */ | ||
| 19 | #define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */ | ||
| 20 | #define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ | ||
| 21 | #define RTSR_AL (1 << 0) /* RTC alarm detected */ | ||
| 22 | |||
| 23 | #endif /* __ASM_MACH_REGS_RTC_H */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/regs-ssp.h b/arch/arm/mach-pxa/include/mach/regs-ssp.h index cf31986f6f05..8152be683881 100644 --- a/arch/arm/mach-pxa/include/mach/regs-ssp.h +++ b/arch/arm/mach-pxa/include/mach/regs-ssp.h | |||
| @@ -37,7 +37,6 @@ | |||
| 37 | #if defined(CONFIG_PXA25x) | 37 | #if defined(CONFIG_PXA25x) |
| 38 | #define SSCR0_SCR (0x0000ff00) /* Serial Clock Rate (mask) */ | 38 | #define SSCR0_SCR (0x0000ff00) /* Serial Clock Rate (mask) */ |
| 39 | #define SSCR0_SerClkDiv(x) ((((x) - 2)/2) << 8) /* Divisor [2..512] */ | 39 | #define SSCR0_SerClkDiv(x) ((((x) - 2)/2) << 8) /* Divisor [2..512] */ |
| 40 | |||
| 41 | #elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) | 40 | #elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) |
| 42 | #define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */ | 41 | #define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */ |
| 43 | #define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */ | 42 | #define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */ |
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h index 0f381e692999..0a587c4ec709 100644 --- a/arch/arm/mach-pxa/include/mach/system.h +++ b/arch/arm/mach-pxa/include/mach/system.h | |||
| @@ -13,7 +13,6 @@ | |||
| 13 | #include <asm/proc-fns.h> | 13 | #include <asm/proc-fns.h> |
| 14 | #include "hardware.h" | 14 | #include "hardware.h" |
| 15 | #include "pxa2xx-regs.h" | 15 | #include "pxa2xx-regs.h" |
| 16 | #include "pxa-regs.h" | ||
| 17 | 16 | ||
| 18 | static inline void arch_idle(void) | 17 | static inline void arch_idle(void) |
| 19 | { | 18 | { |
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h index f4b029c03957..5706cea95d11 100644 --- a/arch/arm/mach-pxa/include/mach/uncompress.h +++ b/arch/arm/mach-pxa/include/mach/uncompress.h | |||
| @@ -35,7 +35,8 @@ static inline void flush(void) | |||
| 35 | 35 | ||
| 36 | static inline void arch_decomp_setup(void) | 36 | static inline void arch_decomp_setup(void) |
| 37 | { | 37 | { |
| 38 | if (machine_is_littleton() || machine_is_intelmote2()) | 38 | if (machine_is_littleton() || machine_is_intelmote2() |
| 39 | || machine_is_csb726()) | ||
| 39 | UART = STUART; | 40 | UART = STUART; |
| 40 | } | 41 | } |
| 41 | 42 | ||
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index fa69c3a6a38e..f6e0300e4f64 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
| @@ -20,7 +20,8 @@ | |||
| 20 | #include <mach/hardware.h> | 20 | #include <mach/hardware.h> |
| 21 | #include <asm/irq.h> | 21 | #include <asm/irq.h> |
| 22 | #include <asm/mach/irq.h> | 22 | #include <asm/mach/irq.h> |
| 23 | #include <mach/pxa-regs.h> | 23 | #include <mach/gpio.h> |
| 24 | #include <mach/regs-intc.h> | ||
| 24 | 25 | ||
| 25 | #include "generic.h" | 26 | #include "generic.h" |
| 26 | 27 | ||
| @@ -51,6 +52,72 @@ static struct irq_chip pxa_internal_irq_chip = { | |||
| 51 | .unmask = pxa_unmask_irq, | 52 | .unmask = pxa_unmask_irq, |
| 52 | }; | 53 | }; |
| 53 | 54 | ||
| 55 | /* | ||
| 56 | * GPIO IRQs for GPIO 0 and 1 | ||
| 57 | */ | ||
| 58 | static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type) | ||
| 59 | { | ||
| 60 | int gpio = irq - IRQ_GPIO0; | ||
| 61 | |||
| 62 | if (__gpio_is_occupied(gpio)) { | ||
| 63 | pr_err("%s failed: GPIO is configured\n", __func__); | ||
| 64 | return -EINVAL; | ||
| 65 | } | ||
| 66 | |||
| 67 | if (type & IRQ_TYPE_EDGE_RISING) | ||
| 68 | GRER0 |= GPIO_bit(gpio); | ||
| 69 | else | ||
| 70 | GRER0 &= ~GPIO_bit(gpio); | ||
| 71 | |||
| 72 | if (type & IRQ_TYPE_EDGE_FALLING) | ||
| 73 | GFER0 |= GPIO_bit(gpio); | ||
| 74 | else | ||
| 75 | GFER0 &= ~GPIO_bit(gpio); | ||
| 76 | |||
| 77 | return 0; | ||
| 78 | } | ||
| 79 | |||
| 80 | static void pxa_ack_low_gpio(unsigned int irq) | ||
| 81 | { | ||
| 82 | GEDR0 = (1 << (irq - IRQ_GPIO0)); | ||
| 83 | } | ||
| 84 | |||
| 85 | static void pxa_mask_low_gpio(unsigned int irq) | ||
| 86 | { | ||
| 87 | ICMR &= ~(1 << (irq - PXA_IRQ(0))); | ||
| 88 | } | ||
| 89 | |||
| 90 | static void pxa_unmask_low_gpio(unsigned int irq) | ||
| 91 | { | ||
| 92 | ICMR |= 1 << (irq - PXA_IRQ(0)); | ||
| 93 | } | ||
| 94 | |||
| 95 | static struct irq_chip pxa_low_gpio_chip = { | ||
| 96 | .name = "GPIO-l", | ||
| 97 | .ack = pxa_ack_low_gpio, | ||
| 98 | .mask = pxa_mask_low_gpio, | ||
| 99 | .unmask = pxa_unmask_low_gpio, | ||
| 100 | .set_type = pxa_set_low_gpio_type, | ||
| 101 | }; | ||
| 102 | |||
| 103 | static void __init pxa_init_low_gpio_irq(set_wake_t fn) | ||
| 104 | { | ||
| 105 | int irq; | ||
| 106 | |||
| 107 | /* clear edge detection on GPIO 0 and 1 */ | ||
| 108 | GFER0 &= ~0x3; | ||
| 109 | GRER0 &= ~0x3; | ||
| 110 | GEDR0 = 0x3; | ||
| 111 | |||
| 112 | for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { | ||
| 113 | set_irq_chip(irq, &pxa_low_gpio_chip); | ||
| 114 | set_irq_handler(irq, handle_edge_irq); | ||
| 115 | set_irq_flags(irq, IRQF_VALID); | ||
| 116 | } | ||
| 117 | |||
| 118 | pxa_low_gpio_chip.set_wake = fn; | ||
| 119 | } | ||
| 120 | |||
| 54 | void __init pxa_init_irq(int irq_nr, set_wake_t fn) | 121 | void __init pxa_init_irq(int irq_nr, set_wake_t fn) |
| 55 | { | 122 | { |
| 56 | int irq; | 123 | int irq; |
| @@ -72,6 +139,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn) | |||
| 72 | } | 139 | } |
| 73 | 140 | ||
| 74 | pxa_internal_irq_chip.set_wake = fn; | 141 | pxa_internal_irq_chip.set_wake = fn; |
| 142 | pxa_init_low_gpio_irq(fn); | ||
| 75 | } | 143 | } |
| 76 | 144 | ||
| 77 | #ifdef CONFIG_PM | 145 | #ifdef CONFIG_PM |
diff --git a/arch/arm/mach-pxa/leds-idp.c b/arch/arm/mach-pxa/leds-idp.c index 18b20d469410..8b9c17142d5a 100644 --- a/arch/arm/mach-pxa/leds-idp.c +++ b/arch/arm/mach-pxa/leds-idp.c | |||
| @@ -18,7 +18,7 @@ | |||
| 18 | #include <asm/leds.h> | 18 | #include <asm/leds.h> |
| 19 | #include <asm/system.h> | 19 | #include <asm/system.h> |
| 20 | 20 | ||
| 21 | #include <mach/pxa-regs.h> | 21 | #include <mach/pxa25x.h> |
| 22 | #include <mach/idp.h> | 22 | #include <mach/idp.h> |
| 23 | 23 | ||
| 24 | #include "leds.h" | 24 | #include "leds.h" |
diff --git a/arch/arm/mach-pxa/leds-lubbock.c b/arch/arm/mach-pxa/leds-lubbock.c index 1a258029c33c..e26d5efe1969 100644 --- a/arch/arm/mach-pxa/leds-lubbock.c +++ b/arch/arm/mach-pxa/leds-lubbock.c | |||
| @@ -16,7 +16,7 @@ | |||
| 16 | #include <mach/hardware.h> | 16 | #include <mach/hardware.h> |
| 17 | #include <asm/leds.h> | 17 | #include <asm/leds.h> |
| 18 | #include <asm/system.h> | 18 | #include <asm/system.h> |
| 19 | #include <mach/pxa-regs.h> | 19 | #include <mach/pxa25x.h> |
| 20 | #include <mach/lubbock.h> | 20 | #include <mach/lubbock.h> |
| 21 | 21 | ||
| 22 | #include "leds.h" | 22 | #include "leds.h" |
diff --git a/arch/arm/mach-pxa/leds-mainstone.c b/arch/arm/mach-pxa/leds-mainstone.c index 95e06b849634..db4af5eee8b2 100644 --- a/arch/arm/mach-pxa/leds-mainstone.c +++ b/arch/arm/mach-pxa/leds-mainstone.c | |||
| @@ -16,7 +16,7 @@ | |||
| 16 | #include <asm/leds.h> | 16 | #include <asm/leds.h> |
| 17 | #include <asm/system.h> | 17 | #include <asm/system.h> |
| 18 | 18 | ||
| 19 | #include <mach/pxa-regs.h> | 19 | #include <mach/pxa27x.h> |
| 20 | #include <mach/mainstone.h> | 20 | #include <mach/mainstone.h> |
| 21 | 21 | ||
| 22 | #include "leds.h" | 22 | #include "leds.h" |
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index 31da7f3c06f6..e13f6a81c223 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c | |||
| @@ -39,8 +39,7 @@ | |||
| 39 | #include <asm/mach/map.h> | 39 | #include <asm/mach/map.h> |
| 40 | #include <asm/mach/irq.h> | 40 | #include <asm/mach/irq.h> |
| 41 | 41 | ||
| 42 | #include <mach/pxa-regs.h> | 42 | #include <mach/pxa300.h> |
| 43 | #include <mach/mfp-pxa300.h> | ||
| 44 | #include <mach/pxafb.h> | 43 | #include <mach/pxafb.h> |
| 45 | #include <mach/ssp.h> | 44 | #include <mach/ssp.h> |
| 46 | #include <mach/pxa2xx_spi.h> | 45 | #include <mach/pxa2xx_spi.h> |
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index de3f67daaacf..d64395f26a3e 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c | |||
| @@ -38,9 +38,8 @@ | |||
| 38 | #include <asm/mach/irq.h> | 38 | #include <asm/mach/irq.h> |
| 39 | #include <asm/mach/flash.h> | 39 | #include <asm/mach/flash.h> |
| 40 | 40 | ||
| 41 | #include <mach/pxa-regs.h> | 41 | #include <mach/pxa27x.h> |
| 42 | #include <mach/pxa2xx-regs.h> | 42 | #include <mach/gpio.h> |
| 43 | #include <mach/mfp-pxa27x.h> | ||
| 44 | #include <mach/lpd270.h> | 43 | #include <mach/lpd270.h> |
| 45 | #include <mach/audio.h> | 44 | #include <mach/audio.h> |
| 46 | #include <mach/pxafb.h> | 45 | #include <mach/pxafb.h> |
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index bff704354c1a..f04c8333dff7 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c | |||
| @@ -41,15 +41,15 @@ | |||
| 41 | 41 | ||
| 42 | #include <asm/hardware/sa1111.h> | 42 | #include <asm/hardware/sa1111.h> |
| 43 | 43 | ||
| 44 | #include <mach/pxa-regs.h> | 44 | #include <mach/pxa25x.h> |
| 45 | #include <mach/pxa2xx-regs.h> | 45 | #include <mach/gpio.h> |
| 46 | #include <mach/mfp-pxa25x.h> | ||
| 47 | #include <mach/audio.h> | 46 | #include <mach/audio.h> |
| 48 | #include <mach/lubbock.h> | 47 | #include <mach/lubbock.h> |
| 49 | #include <mach/udc.h> | 48 | #include <mach/udc.h> |
| 50 | #include <mach/irda.h> | 49 | #include <mach/irda.h> |
| 51 | #include <mach/pxafb.h> | 50 | #include <mach/pxafb.h> |
| 52 | #include <mach/mmc.h> | 51 | #include <mach/mmc.h> |
| 52 | #include <mach/pm.h> | ||
| 53 | 53 | ||
| 54 | #include "generic.h" | 54 | #include "generic.h" |
| 55 | #include "clock.h" | 55 | #include "clock.h" |
| @@ -113,8 +113,14 @@ static unsigned long lubbock_pin_config[] __initdata = { | |||
| 113 | GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, | 113 | GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, |
| 114 | }; | 114 | }; |
| 115 | 115 | ||
| 116 | #define LUB_HEXLED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x010) | ||
| 116 | #define LUB_MISC_WR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x080) | 117 | #define LUB_MISC_WR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x080) |
| 117 | 118 | ||
| 119 | void lubbock_set_hexled(uint32_t value) | ||
| 120 | { | ||
| 121 | LUB_HEXLED = value; | ||
| 122 | } | ||
| 123 | |||
| 118 | void lubbock_set_misc_wr(unsigned int mask, unsigned int set) | 124 | void lubbock_set_misc_wr(unsigned int mask, unsigned int set) |
| 119 | { | 125 | { |
| 120 | unsigned long flags; | 126 | unsigned long flags; |
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index 21b821e1a60d..d46b36746be2 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c | |||
| @@ -25,14 +25,14 @@ | |||
| 25 | #include <linux/mtd/physmap.h> | 25 | #include <linux/mtd/physmap.h> |
| 26 | #include <linux/pda_power.h> | 26 | #include <linux/pda_power.h> |
| 27 | #include <linux/pwm_backlight.h> | 27 | #include <linux/pwm_backlight.h> |
| 28 | #include <linux/usb/gpio_vbus.h> | ||
| 28 | 29 | ||
| 29 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
| 30 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
| 31 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
| 33 | |||
| 34 | #include <mach/pxa27x.h> | ||
| 32 | #include <mach/magician.h> | 35 | #include <mach/magician.h> |
| 33 | #include <mach/mfp-pxa27x.h> | ||
| 34 | #include <mach/pxa-regs.h> | ||
| 35 | #include <mach/pxa2xx-regs.h> | ||
| 36 | #include <mach/pxafb.h> | 36 | #include <mach/pxafb.h> |
| 37 | #include <mach/i2c.h> | 37 | #include <mach/i2c.h> |
| 38 | #include <mach/mmc.h> | 38 | #include <mach/mmc.h> |
| @@ -66,6 +66,11 @@ static unsigned long magician_pin_config[] __initdata = { | |||
| 66 | GPIO31_I2S_SYNC, | 66 | GPIO31_I2S_SYNC, |
| 67 | GPIO113_I2S_SYSCLK, | 67 | GPIO113_I2S_SYSCLK, |
| 68 | 68 | ||
| 69 | /* SSP 1 */ | ||
| 70 | GPIO23_SSP1_SCLK, | ||
| 71 | GPIO24_SSP1_SFRM, | ||
| 72 | GPIO25_SSP1_TXD, | ||
| 73 | |||
| 69 | /* SSP 2 */ | 74 | /* SSP 2 */ |
| 70 | GPIO19_SSP2_SCLK, | 75 | GPIO19_SSP2_SCLK, |
| 71 | GPIO14_SSP2_SFRM, | 76 | GPIO14_SSP2_SFRM, |
| @@ -148,22 +153,31 @@ static struct pxaficp_platform_data magician_ficp_info = { | |||
| 148 | * GPIO Keys | 153 | * GPIO Keys |
| 149 | */ | 154 | */ |
| 150 | 155 | ||
| 156 | #define INIT_KEY(_code, _gpio, _desc) \ | ||
| 157 | { \ | ||
| 158 | .code = KEY_##_code, \ | ||
| 159 | .gpio = _gpio, \ | ||
| 160 | .desc = _desc, \ | ||
| 161 | .type = EV_KEY, \ | ||
| 162 | .wakeup = 1, \ | ||
| 163 | } | ||
| 164 | |||
| 151 | static struct gpio_keys_button magician_button_table[] = { | 165 | static struct gpio_keys_button magician_button_table[] = { |
| 152 | {KEY_POWER, GPIO0_MAGICIAN_KEY_POWER, 0, "Power button"}, | 166 | INIT_KEY(POWER, GPIO0_MAGICIAN_KEY_POWER, "Power button"), |
| 153 | {KEY_ESC, GPIO37_MAGICIAN_KEY_HANGUP, 0, "Hangup button"}, | 167 | INIT_KEY(ESC, GPIO37_MAGICIAN_KEY_HANGUP, "Hangup button"), |
| 154 | {KEY_F10, GPIO38_MAGICIAN_KEY_CONTACTS, 0, "Contacts button"}, | 168 | INIT_KEY(F10, GPIO38_MAGICIAN_KEY_CONTACTS, "Contacts button"), |
| 155 | {KEY_CALENDAR, GPIO90_MAGICIAN_KEY_CALENDAR, 0, "Calendar button"}, | 169 | INIT_KEY(CALENDAR, GPIO90_MAGICIAN_KEY_CALENDAR, "Calendar button"), |
| 156 | {KEY_CAMERA, GPIO91_MAGICIAN_KEY_CAMERA, 0, "Camera button"}, | 170 | INIT_KEY(CAMERA, GPIO91_MAGICIAN_KEY_CAMERA, "Camera button"), |
| 157 | {KEY_UP, GPIO93_MAGICIAN_KEY_UP, 0, "Up button"}, | 171 | INIT_KEY(UP, GPIO93_MAGICIAN_KEY_UP, "Up button"), |
| 158 | {KEY_DOWN, GPIO94_MAGICIAN_KEY_DOWN, 0, "Down button"}, | 172 | INIT_KEY(DOWN, GPIO94_MAGICIAN_KEY_DOWN, "Down button"), |
| 159 | {KEY_LEFT, GPIO95_MAGICIAN_KEY_LEFT, 0, "Left button"}, | 173 | INIT_KEY(LEFT, GPIO95_MAGICIAN_KEY_LEFT, "Left button"), |
| 160 | {KEY_RIGHT, GPIO96_MAGICIAN_KEY_RIGHT, 0, "Right button"}, | 174 | INIT_KEY(RIGHT, GPIO96_MAGICIAN_KEY_RIGHT, "Right button"), |
| 161 | {KEY_KPENTER, GPIO97_MAGICIAN_KEY_ENTER, 0, "Action button"}, | 175 | INIT_KEY(KPENTER, GPIO97_MAGICIAN_KEY_ENTER, "Action button"), |
| 162 | {KEY_RECORD, GPIO98_MAGICIAN_KEY_RECORD, 0, "Record button"}, | 176 | INIT_KEY(RECORD, GPIO98_MAGICIAN_KEY_RECORD, "Record button"), |
| 163 | {KEY_VOLUMEUP, GPIO100_MAGICIAN_KEY_VOL_UP, 0, "Volume up"}, | 177 | INIT_KEY(VOLUMEUP, GPIO100_MAGICIAN_KEY_VOL_UP, "Volume up"), |
| 164 | {KEY_VOLUMEDOWN, GPIO101_MAGICIAN_KEY_VOL_DOWN, 0, "Volume down"}, | 178 | INIT_KEY(VOLUMEDOWN, GPIO101_MAGICIAN_KEY_VOL_DOWN, "Volume down"), |
| 165 | {KEY_PHONE, GPIO102_MAGICIAN_KEY_PHONE, 0, "Phone button"}, | 179 | INIT_KEY(PHONE, GPIO102_MAGICIAN_KEY_PHONE, "Phone button"), |
| 166 | {KEY_PLAY, GPIO99_MAGICIAN_HEADPHONE_IN, 0, "Headset button"}, | 180 | INIT_KEY(PLAY, GPIO99_MAGICIAN_HEADPHONE_IN, "Headset button"), |
| 167 | }; | 181 | }; |
| 168 | 182 | ||
| 169 | static struct gpio_keys_platform_data gpio_keys_data = { | 183 | static struct gpio_keys_platform_data gpio_keys_data = { |
| @@ -189,7 +203,7 @@ static struct platform_device gpio_keys = { | |||
| 189 | static struct resource egpio_resources[] = { | 203 | static struct resource egpio_resources[] = { |
| 190 | [0] = { | 204 | [0] = { |
| 191 | .start = PXA_CS3_PHYS, | 205 | .start = PXA_CS3_PHYS, |
| 192 | .end = PXA_CS3_PHYS + 0x20, | 206 | .end = PXA_CS3_PHYS + 0x20 - 1, |
| 193 | .flags = IORESOURCE_MEM, | 207 | .flags = IORESOURCE_MEM, |
| 194 | }, | 208 | }, |
| 195 | [1] = { | 209 | [1] = { |
| @@ -420,7 +434,7 @@ static struct gpio_led gpio_leds[] = { | |||
| 420 | }, | 434 | }, |
| 421 | { | 435 | { |
| 422 | .name = "magician::phone_bl", | 436 | .name = "magician::phone_bl", |
| 423 | .default_trigger = "none", | 437 | .default_trigger = "backlight", |
| 424 | .gpio = GPIO103_MAGICIAN_LED_KP, | 438 | .gpio = GPIO103_MAGICIAN_LED_KP, |
| 425 | }, | 439 | }, |
| 426 | }; | 440 | }; |
| @@ -468,8 +482,6 @@ static struct pasic3_led pasic3_leds[] = { | |||
| 468 | }, | 482 | }, |
| 469 | }; | 483 | }; |
| 470 | 484 | ||
| 471 | static struct platform_device pasic3; | ||
| 472 | |||
| 473 | static struct pasic3_leds_machinfo pasic3_leds_info = { | 485 | static struct pasic3_leds_machinfo pasic3_leds_info = { |
| 474 | .num_leds = ARRAY_SIZE(pasic3_leds), | 486 | .num_leds = ARRAY_SIZE(pasic3_leds), |
| 475 | .power_gpio = EGPIO_MAGICIAN_LED_POWER, | 487 | .power_gpio = EGPIO_MAGICIAN_LED_POWER, |
| @@ -511,6 +523,31 @@ static struct platform_device pasic3 = { | |||
| 511 | }; | 523 | }; |
| 512 | 524 | ||
| 513 | /* | 525 | /* |
| 526 | * USB "Transceiver" | ||
| 527 | */ | ||
| 528 | |||
| 529 | static struct resource gpio_vbus_resource = { | ||
| 530 | .flags = IORESOURCE_IRQ, | ||
| 531 | .start = IRQ_MAGICIAN_VBUS, | ||
| 532 | .end = IRQ_MAGICIAN_VBUS, | ||
| 533 | }; | ||
| 534 | |||
| 535 | static struct gpio_vbus_mach_info gpio_vbus_info = { | ||
| 536 | .gpio_pullup = GPIO27_MAGICIAN_USBC_PUEN, | ||
| 537 | .gpio_vbus = EGPIO_MAGICIAN_CABLE_STATE_USB, | ||
| 538 | }; | ||
| 539 | |||
| 540 | static struct platform_device gpio_vbus = { | ||
| 541 | .name = "gpio-vbus", | ||
| 542 | .id = -1, | ||
| 543 | .num_resources = 1, | ||
| 544 | .resource = &gpio_vbus_resource, | ||
| 545 | .dev = { | ||
| 546 | .platform_data = &gpio_vbus_info, | ||
| 547 | }, | ||
| 548 | }; | ||
| 549 | |||
| 550 | /* | ||
| 514 | * External power | 551 | * External power |
| 515 | */ | 552 | */ |
| 516 | 553 | ||
| @@ -586,15 +623,17 @@ static struct pda_power_pdata power_supply_info = { | |||
| 586 | static struct resource power_supply_resources[] = { | 623 | static struct resource power_supply_resources[] = { |
| 587 | [0] = { | 624 | [0] = { |
| 588 | .name = "ac", | 625 | .name = "ac", |
| 589 | .flags = IORESOURCE_IRQ, | 626 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | |
| 590 | .start = IRQ_MAGICIAN_AC, | 627 | IORESOURCE_IRQ_LOWEDGE, |
| 591 | .end = IRQ_MAGICIAN_AC, | 628 | .start = IRQ_MAGICIAN_VBUS, |
| 629 | .end = IRQ_MAGICIAN_VBUS, | ||
| 592 | }, | 630 | }, |
| 593 | [1] = { | 631 | [1] = { |
| 594 | .name = "usb", | 632 | .name = "usb", |
| 595 | .flags = IORESOURCE_IRQ, | 633 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | |
| 596 | .start = IRQ_MAGICIAN_AC, | 634 | IORESOURCE_IRQ_LOWEDGE, |
| 597 | .end = IRQ_MAGICIAN_AC, | 635 | .start = IRQ_MAGICIAN_VBUS, |
| 636 | .end = IRQ_MAGICIAN_VBUS, | ||
| 598 | }, | 637 | }, |
| 599 | }; | 638 | }; |
| 600 | 639 | ||
| @@ -688,11 +727,9 @@ static void magician_set_vpp(struct map_info *map, int vpp) | |||
| 688 | gpio_set_value(EGPIO_MAGICIAN_FLASH_VPP, vpp); | 727 | gpio_set_value(EGPIO_MAGICIAN_FLASH_VPP, vpp); |
| 689 | } | 728 | } |
| 690 | 729 | ||
| 691 | #define PXA_CS_SIZE 0x04000000 | ||
| 692 | |||
| 693 | static struct resource strataflash_resource = { | 730 | static struct resource strataflash_resource = { |
| 694 | .start = PXA_CS0_PHYS, | 731 | .start = PXA_CS0_PHYS, |
| 695 | .end = PXA_CS0_PHYS + PXA_CS_SIZE - 1, | 732 | .end = PXA_CS0_PHYS + SZ_64M - 1, |
| 696 | .flags = IORESOURCE_MEM, | 733 | .flags = IORESOURCE_MEM, |
| 697 | }; | 734 | }; |
| 698 | 735 | ||
| @@ -720,6 +757,7 @@ static struct platform_device *devices[] __initdata = { | |||
| 720 | &egpio, | 757 | &egpio, |
| 721 | &backlight, | 758 | &backlight, |
| 722 | &pasic3, | 759 | &pasic3, |
| 760 | &gpio_vbus, | ||
| 723 | &power_supply, | 761 | &power_supply, |
| 724 | &strataflash, | 762 | &strataflash, |
| 725 | &leds_gpio, | 763 | &leds_gpio, |
| @@ -743,6 +781,7 @@ static void __init magician_init(void) | |||
| 743 | gpio_direction_output(GPIO83_MAGICIAN_nIR_EN, 1); | 781 | gpio_direction_output(GPIO83_MAGICIAN_nIR_EN, 1); |
| 744 | pxa_set_ficp_info(&magician_ficp_info); | 782 | pxa_set_ficp_info(&magician_ficp_info); |
| 745 | } | 783 | } |
| 784 | pxa27x_set_i2c_power_info(NULL); | ||
| 746 | pxa_set_i2c_info(NULL); | 785 | pxa_set_i2c_info(NULL); |
| 747 | pxa_set_mci_info(&magician_mci_info); | 786 | pxa_set_mci_info(&magician_mci_info); |
| 748 | pxa_set_ohci_info(&magician_ohci_info); | 787 | pxa_set_ohci_info(&magician_ohci_info); |
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 5f224968043c..a6c8429e975f 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c | |||
| @@ -41,9 +41,8 @@ | |||
| 41 | #include <asm/mach/irq.h> | 41 | #include <asm/mach/irq.h> |
| 42 | #include <asm/mach/flash.h> | 42 | #include <asm/mach/flash.h> |
| 43 | 43 | ||
| 44 | #include <mach/pxa-regs.h> | 44 | #include <mach/pxa27x.h> |
| 45 | #include <mach/pxa2xx-regs.h> | 45 | #include <mach/gpio.h> |
| 46 | #include <mach/mfp-pxa27x.h> | ||
| 47 | #include <mach/mainstone.h> | 46 | #include <mach/mainstone.h> |
| 48 | #include <mach/audio.h> | 47 | #include <mach/audio.h> |
| 49 | #include <mach/pxafb.h> | 48 | #include <mach/pxafb.h> |
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c index 33626de8cbf6..7ffb91d64c39 100644 --- a/arch/arm/mach-pxa/mfp-pxa2xx.c +++ b/arch/arm/mach-pxa/mfp-pxa2xx.c | |||
| @@ -18,15 +18,12 @@ | |||
| 18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
| 19 | #include <linux/sysdev.h> | 19 | #include <linux/sysdev.h> |
| 20 | 20 | ||
| 21 | #include <mach/hardware.h> | 21 | #include <mach/gpio.h> |
| 22 | #include <mach/pxa-regs.h> | ||
| 23 | #include <mach/pxa2xx-regs.h> | 22 | #include <mach/pxa2xx-regs.h> |
| 24 | #include <mach/mfp-pxa2xx.h> | 23 | #include <mach/mfp-pxa2xx.h> |
| 25 | 24 | ||
| 26 | #include "generic.h" | 25 | #include "generic.h" |
| 27 | 26 | ||
| 28 | #define gpio_to_bank(gpio) ((gpio) >> 5) | ||
| 29 | |||
| 30 | #define PGSR(x) __REG2(0x40F00020, (x) << 2) | 27 | #define PGSR(x) __REG2(0x40F00020, (x) << 2) |
| 31 | #define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3) | 28 | #define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3) |
| 32 | #define GAFR_L(x) __GAFR(0, x) | 29 | #define GAFR_L(x) __GAFR(0, x) |
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index 2b427e015b6f..025772785d36 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c | |||
| @@ -36,13 +36,15 @@ | |||
| 36 | #include <linux/power_supply.h> | 36 | #include <linux/power_supply.h> |
| 37 | #include <linux/wm97xx_batt.h> | 37 | #include <linux/wm97xx_batt.h> |
| 38 | #include <linux/mtd/physmap.h> | 38 | #include <linux/mtd/physmap.h> |
| 39 | #include <linux/usb/gpio_vbus.h> | ||
| 39 | 40 | ||
| 40 | #include <asm/mach-types.h> | 41 | #include <asm/mach-types.h> |
| 41 | #include <asm/mach/arch.h> | 42 | #include <asm/mach/arch.h> |
| 42 | #include <mach/mfp-pxa27x.h> | 43 | |
| 44 | #include <mach/pxa27x.h> | ||
| 45 | #include <mach/regs-rtc.h> | ||
| 43 | #include <mach/pxa27x_keypad.h> | 46 | #include <mach/pxa27x_keypad.h> |
| 44 | #include <mach/pxafb.h> | 47 | #include <mach/pxafb.h> |
| 45 | #include <mach/pxa2xx-regs.h> | ||
| 46 | #include <mach/mmc.h> | 48 | #include <mach/mmc.h> |
| 47 | #include <mach/udc.h> | 49 | #include <mach/udc.h> |
| 48 | #include <mach/pxa27x-udc.h> | 50 | #include <mach/pxa27x-udc.h> |
| @@ -411,21 +413,6 @@ static void gsm_exit(void) | |||
| 411 | /* | 413 | /* |
| 412 | * USB UDC | 414 | * USB UDC |
| 413 | */ | 415 | */ |
| 414 | static void udc_power_command(int cmd) | ||
| 415 | { | ||
| 416 | switch (cmd) { | ||
| 417 | case PXA2XX_UDC_CMD_DISCONNECT: | ||
| 418 | gpio_set_value(GPIO22_USB_ENABLE, 0); | ||
| 419 | break; | ||
| 420 | case PXA2XX_UDC_CMD_CONNECT: | ||
| 421 | gpio_set_value(GPIO22_USB_ENABLE, 1); | ||
| 422 | break; | ||
| 423 | default: | ||
| 424 | printk(KERN_INFO "udc_control: unknown command (0x%x)!\n", cmd); | ||
| 425 | break; | ||
| 426 | } | ||
| 427 | } | ||
| 428 | |||
| 429 | static int is_usb_connected(void) | 416 | static int is_usb_connected(void) |
| 430 | { | 417 | { |
| 431 | return !gpio_get_value(GPIO13_nUSB_DETECT); | 418 | return !gpio_get_value(GPIO13_nUSB_DETECT); |
| @@ -433,24 +420,15 @@ static int is_usb_connected(void) | |||
| 433 | 420 | ||
| 434 | static struct pxa2xx_udc_mach_info mioa701_udc_info = { | 421 | static struct pxa2xx_udc_mach_info mioa701_udc_info = { |
| 435 | .udc_is_connected = is_usb_connected, | 422 | .udc_is_connected = is_usb_connected, |
| 436 | .udc_command = udc_power_command, | 423 | .gpio_pullup = GPIO22_USB_ENABLE, |
| 437 | }; | 424 | }; |
| 438 | 425 | ||
| 439 | struct gpio_ress udc_gpios[] = { | 426 | struct gpio_vbus_mach_info gpio_vbus_data = { |
| 440 | MIO_GPIO_OUT(GPIO22_USB_ENABLE, 0, "USB Vbus enable") | 427 | .gpio_vbus = GPIO13_nUSB_DETECT, |
| 428 | .gpio_vbus_inverted = 1, | ||
| 429 | .gpio_pullup = -1, | ||
| 441 | }; | 430 | }; |
| 442 | 431 | ||
| 443 | static int __init udc_init(void) | ||
| 444 | { | ||
| 445 | pxa_set_udc_info(&mioa701_udc_info); | ||
| 446 | return mio_gpio_request(ARRAY_AND_SIZE(udc_gpios)); | ||
| 447 | } | ||
| 448 | |||
| 449 | static void udc_exit(void) | ||
| 450 | { | ||
| 451 | mio_gpio_free(ARRAY_AND_SIZE(udc_gpios)); | ||
| 452 | } | ||
| 453 | |||
| 454 | /* | 432 | /* |
| 455 | * SDIO/MMC Card controller | 433 | * SDIO/MMC Card controller |
| 456 | */ | 434 | */ |
| @@ -789,6 +767,7 @@ MIO_SIMPLE_DEV(pxa2xx_ac97, "pxa2xx-ac97", NULL) | |||
| 789 | MIO_PARENT_DEV(mio_wm9713_codec, "wm9713-codec", &pxa2xx_ac97.dev, NULL) | 767 | MIO_PARENT_DEV(mio_wm9713_codec, "wm9713-codec", &pxa2xx_ac97.dev, NULL) |
| 790 | MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL) | 768 | MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL) |
| 791 | MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL) | 769 | MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL) |
| 770 | MIO_SIMPLE_DEV(gpio_vbus, "gpio-vbus", &gpio_vbus_data); | ||
| 792 | 771 | ||
| 793 | static struct platform_device *devices[] __initdata = { | 772 | static struct platform_device *devices[] __initdata = { |
| 794 | &mioa701_gpio_keys, | 773 | &mioa701_gpio_keys, |
| @@ -800,7 +779,8 @@ static struct platform_device *devices[] __initdata = { | |||
| 800 | &mioa701_sound, | 779 | &mioa701_sound, |
| 801 | &power_dev, | 780 | &power_dev, |
| 802 | &strataflash, | 781 | &strataflash, |
| 803 | &mioa701_board | 782 | &gpio_vbus, |
| 783 | &mioa701_board, | ||
| 804 | }; | 784 | }; |
| 805 | 785 | ||
| 806 | static void mioa701_machine_exit(void); | 786 | static void mioa701_machine_exit(void); |
| @@ -837,7 +817,7 @@ static void __init mioa701_machine_init(void) | |||
| 837 | pxa_set_mci_info(&mioa701_mci_info); | 817 | pxa_set_mci_info(&mioa701_mci_info); |
| 838 | pxa_set_keypad_info(&mioa701_keypad_info); | 818 | pxa_set_keypad_info(&mioa701_keypad_info); |
| 839 | wm97xx_bat_set_pdata(&mioa701_battery_data); | 819 | wm97xx_bat_set_pdata(&mioa701_battery_data); |
| 840 | udc_init(); | 820 | pxa_set_udc_info(&mioa701_udc_info); |
| 841 | pm_power_off = mioa701_poweroff; | 821 | pm_power_off = mioa701_poweroff; |
| 842 | arm_pm_restart = mioa701_restart; | 822 | arm_pm_restart = mioa701_restart; |
| 843 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 823 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| @@ -850,7 +830,6 @@ static void __init mioa701_machine_init(void) | |||
| 850 | 830 | ||
| 851 | static void mioa701_machine_exit(void) | 831 | static void mioa701_machine_exit(void) |
| 852 | { | 832 | { |
| 853 | udc_exit(); | ||
| 854 | bootstrap_exit(); | 833 | bootstrap_exit(); |
| 855 | gsm_exit(); | 834 | gsm_exit(); |
| 856 | } | 835 | } |
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c index 8a73814126b1..a65713ce019e 100644 --- a/arch/arm/mach-pxa/mp900.c +++ b/arch/arm/mach-pxa/mp900.c | |||
| @@ -19,10 +19,10 @@ | |||
| 19 | #include <linux/types.h> | 19 | #include <linux/types.h> |
| 20 | #include <linux/usb/isp116x.h> | 20 | #include <linux/usb/isp116x.h> |
| 21 | 21 | ||
| 22 | #include <mach/hardware.h> | ||
| 23 | #include <mach/pxa-regs.h> | ||
| 24 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
| 25 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
| 24 | |||
| 25 | #include <mach/pxa25x.h> | ||
| 26 | #include "generic.h" | 26 | #include "generic.h" |
| 27 | 27 | ||
| 28 | static void isp116x_pfm_delay(struct device *dev, int delay) | 28 | static void isp116x_pfm_delay(struct device *dev, int delay) |
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c new file mode 100644 index 000000000000..8587477a9bb7 --- /dev/null +++ b/arch/arm/mach-pxa/palmld.c | |||
| @@ -0,0 +1,565 @@ | |||
| 1 | /* | ||
| 2 | * Hardware definitions for Palm LifeDrive | ||
| 3 | * | ||
| 4 | * Author: Marek Vasut <marek.vasut@gmail.com> | ||
| 5 | * | ||
| 6 | * Based on work of: | ||
| 7 | * Alex Osborne <ato@meshy.org> | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | * | ||
| 13 | * (find more info at www.hackndev.com) | ||
| 14 | * | ||
| 15 | */ | ||
| 16 | |||
| 17 | #include <linux/platform_device.h> | ||
| 18 | #include <linux/delay.h> | ||
| 19 | #include <linux/irq.h> | ||
| 20 | #include <linux/gpio_keys.h> | ||
| 21 | #include <linux/input.h> | ||
| 22 | #include <linux/pda_power.h> | ||
| 23 | #include <linux/pwm_backlight.h> | ||
| 24 | #include <linux/gpio.h> | ||
| 25 | #include <linux/wm97xx_batt.h> | ||
| 26 | #include <linux/power_supply.h> | ||
| 27 | |||
| 28 | #include <asm/mach-types.h> | ||
| 29 | #include <asm/mach/arch.h> | ||
| 30 | #include <asm/mach/map.h> | ||
| 31 | |||
| 32 | #include <mach/pxa27x.h> | ||
| 33 | #include <mach/audio.h> | ||
| 34 | #include <mach/palmld.h> | ||
| 35 | #include <mach/mmc.h> | ||
| 36 | #include <mach/pxafb.h> | ||
| 37 | #include <mach/irda.h> | ||
| 38 | #include <mach/pxa27x_keypad.h> | ||
| 39 | #include <mach/palmasoc.h> | ||
| 40 | |||
| 41 | #include "generic.h" | ||
| 42 | #include "devices.h" | ||
| 43 | |||
| 44 | /****************************************************************************** | ||
| 45 | * Pin configuration | ||
| 46 | ******************************************************************************/ | ||
| 47 | static unsigned long palmld_pin_config[] __initdata = { | ||
| 48 | /* MMC */ | ||
| 49 | GPIO32_MMC_CLK, | ||
| 50 | GPIO92_MMC_DAT_0, | ||
| 51 | GPIO109_MMC_DAT_1, | ||
| 52 | GPIO110_MMC_DAT_2, | ||
| 53 | GPIO111_MMC_DAT_3, | ||
| 54 | GPIO112_MMC_CMD, | ||
| 55 | GPIO14_GPIO, /* SD detect */ | ||
| 56 | GPIO114_GPIO, /* SD power */ | ||
| 57 | GPIO116_GPIO, /* SD r/o switch */ | ||
| 58 | |||
| 59 | /* AC97 */ | ||
| 60 | GPIO28_AC97_BITCLK, | ||
| 61 | GPIO29_AC97_SDATA_IN_0, | ||
| 62 | GPIO30_AC97_SDATA_OUT, | ||
| 63 | GPIO31_AC97_SYNC, | ||
| 64 | |||
| 65 | /* IrDA */ | ||
| 66 | GPIO108_GPIO, /* ir disable */ | ||
| 67 | GPIO46_FICP_RXD, | ||
| 68 | GPIO47_FICP_TXD, | ||
| 69 | |||
| 70 | /* MATRIX KEYPAD */ | ||
| 71 | GPIO100_KP_MKIN_0, | ||
| 72 | GPIO101_KP_MKIN_1, | ||
| 73 | GPIO102_KP_MKIN_2, | ||
| 74 | GPIO97_KP_MKIN_3, | ||
| 75 | GPIO103_KP_MKOUT_0, | ||
| 76 | GPIO104_KP_MKOUT_1, | ||
| 77 | GPIO105_KP_MKOUT_2, | ||
| 78 | |||
| 79 | /* LCD */ | ||
| 80 | GPIO58_LCD_LDD_0, | ||
| 81 | GPIO59_LCD_LDD_1, | ||
| 82 | GPIO60_LCD_LDD_2, | ||
| 83 | GPIO61_LCD_LDD_3, | ||
| 84 | GPIO62_LCD_LDD_4, | ||
| 85 | GPIO63_LCD_LDD_5, | ||
| 86 | GPIO64_LCD_LDD_6, | ||
| 87 | GPIO65_LCD_LDD_7, | ||
| 88 | GPIO66_LCD_LDD_8, | ||
| 89 | GPIO67_LCD_LDD_9, | ||
| 90 | GPIO68_LCD_LDD_10, | ||
| 91 | GPIO69_LCD_LDD_11, | ||
| 92 | GPIO70_LCD_LDD_12, | ||
| 93 | GPIO71_LCD_LDD_13, | ||
| 94 | GPIO72_LCD_LDD_14, | ||
| 95 | GPIO73_LCD_LDD_15, | ||
| 96 | GPIO74_LCD_FCLK, | ||
| 97 | GPIO75_LCD_LCLK, | ||
| 98 | GPIO76_LCD_PCLK, | ||
| 99 | GPIO77_LCD_BIAS, | ||
| 100 | |||
| 101 | /* PWM */ | ||
| 102 | GPIO16_PWM0_OUT, | ||
| 103 | |||
| 104 | /* GPIO KEYS */ | ||
| 105 | GPIO10_GPIO, /* hotsync button */ | ||
| 106 | GPIO12_GPIO, /* power switch */ | ||
| 107 | GPIO15_GPIO, /* lock switch */ | ||
| 108 | |||
| 109 | /* LEDs */ | ||
| 110 | GPIO52_GPIO, /* green led */ | ||
| 111 | GPIO94_GPIO, /* orange led */ | ||
| 112 | |||
| 113 | /* PCMCIA */ | ||
| 114 | GPIO48_nPOE, | ||
| 115 | GPIO49_nPWE, | ||
| 116 | GPIO50_nPIOR, | ||
| 117 | GPIO51_nPIOW, | ||
| 118 | GPIO85_nPCE_1, | ||
| 119 | GPIO54_nPCE_2, | ||
| 120 | GPIO79_PSKTSEL, | ||
| 121 | GPIO55_nPREG, | ||
| 122 | GPIO56_nPWAIT, | ||
| 123 | GPIO57_nIOIS16, | ||
| 124 | GPIO36_GPIO, /* wifi power */ | ||
| 125 | GPIO38_GPIO, /* wifi ready */ | ||
| 126 | GPIO81_GPIO, /* wifi reset */ | ||
| 127 | |||
| 128 | /* HDD */ | ||
| 129 | GPIO95_GPIO, /* HDD irq */ | ||
| 130 | GPIO115_GPIO, /* HDD power */ | ||
| 131 | |||
| 132 | /* MISC */ | ||
| 133 | GPIO13_GPIO, /* earphone detect */ | ||
| 134 | }; | ||
| 135 | |||
| 136 | /****************************************************************************** | ||
| 137 | * SD/MMC card controller | ||
| 138 | ******************************************************************************/ | ||
| 139 | static int palmld_mci_init(struct device *dev, irq_handler_t palmld_detect_int, | ||
| 140 | void *data) | ||
| 141 | { | ||
| 142 | int err = 0; | ||
| 143 | |||
| 144 | /* Setup an interrupt for detecting card insert/remove events */ | ||
| 145 | err = gpio_request(GPIO_NR_PALMLD_SD_DETECT_N, "SD IRQ"); | ||
| 146 | if (err) | ||
| 147 | goto err; | ||
| 148 | err = gpio_direction_input(GPIO_NR_PALMLD_SD_DETECT_N); | ||
| 149 | if (err) | ||
| 150 | goto err2; | ||
| 151 | err = request_irq(gpio_to_irq(GPIO_NR_PALMLD_SD_DETECT_N), | ||
| 152 | palmld_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM | | ||
| 153 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, | ||
| 154 | "SD/MMC card detect", data); | ||
| 155 | if (err) { | ||
| 156 | printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n", | ||
| 157 | __func__); | ||
| 158 | goto err2; | ||
| 159 | } | ||
| 160 | |||
| 161 | err = gpio_request(GPIO_NR_PALMLD_SD_POWER, "SD_POWER"); | ||
| 162 | if (err) | ||
| 163 | goto err3; | ||
| 164 | err = gpio_direction_output(GPIO_NR_PALMLD_SD_POWER, 0); | ||
| 165 | if (err) | ||
| 166 | goto err4; | ||
| 167 | |||
| 168 | err = gpio_request(GPIO_NR_PALMLD_SD_READONLY, "SD_READONLY"); | ||
| 169 | if (err) | ||
| 170 | goto err4; | ||
| 171 | err = gpio_direction_input(GPIO_NR_PALMLD_SD_READONLY); | ||
| 172 | if (err) | ||
| 173 | goto err5; | ||
| 174 | |||
| 175 | printk(KERN_DEBUG "%s: irq registered\n", __func__); | ||
| 176 | |||
| 177 | return 0; | ||
| 178 | |||
| 179 | err5: | ||
| 180 | gpio_free(GPIO_NR_PALMLD_SD_READONLY); | ||
| 181 | err4: | ||
| 182 | gpio_free(GPIO_NR_PALMLD_SD_POWER); | ||
| 183 | err3: | ||
| 184 | free_irq(gpio_to_irq(GPIO_NR_PALMLD_SD_DETECT_N), data); | ||
| 185 | err2: | ||
| 186 | gpio_free(GPIO_NR_PALMLD_SD_DETECT_N); | ||
| 187 | err: | ||
| 188 | return err; | ||
| 189 | } | ||
| 190 | |||
| 191 | static void palmld_mci_exit(struct device *dev, void *data) | ||
| 192 | { | ||
| 193 | gpio_free(GPIO_NR_PALMLD_SD_READONLY); | ||
| 194 | gpio_free(GPIO_NR_PALMLD_SD_POWER); | ||
| 195 | free_irq(gpio_to_irq(GPIO_NR_PALMLD_SD_DETECT_N), data); | ||
| 196 | gpio_free(GPIO_NR_PALMLD_SD_DETECT_N); | ||
| 197 | } | ||
| 198 | |||
| 199 | static void palmld_mci_power(struct device *dev, unsigned int vdd) | ||
| 200 | { | ||
| 201 | struct pxamci_platform_data *p_d = dev->platform_data; | ||
| 202 | gpio_set_value(GPIO_NR_PALMLD_SD_POWER, p_d->ocr_mask & (1 << vdd)); | ||
| 203 | } | ||
| 204 | |||
| 205 | static int palmld_mci_get_ro(struct device *dev) | ||
| 206 | { | ||
| 207 | return gpio_get_value(GPIO_NR_PALMLD_SD_READONLY); | ||
| 208 | } | ||
| 209 | |||
| 210 | static struct pxamci_platform_data palmld_mci_platform_data = { | ||
| 211 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
| 212 | .setpower = palmld_mci_power, | ||
| 213 | .get_ro = palmld_mci_get_ro, | ||
| 214 | .init = palmld_mci_init, | ||
| 215 | .exit = palmld_mci_exit, | ||
| 216 | }; | ||
| 217 | |||
| 218 | /****************************************************************************** | ||
| 219 | * GPIO keyboard | ||
| 220 | ******************************************************************************/ | ||
| 221 | static unsigned int palmld_matrix_keys[] = { | ||
| 222 | KEY(0, 1, KEY_F2), | ||
| 223 | KEY(0, 2, KEY_UP), | ||
| 224 | |||
| 225 | KEY(1, 0, KEY_F3), | ||
| 226 | KEY(1, 1, KEY_F4), | ||
| 227 | KEY(1, 2, KEY_RIGHT), | ||
| 228 | |||
| 229 | KEY(2, 0, KEY_F1), | ||
| 230 | KEY(2, 1, KEY_F5), | ||
| 231 | KEY(2, 2, KEY_DOWN), | ||
| 232 | |||
| 233 | KEY(3, 0, KEY_F6), | ||
| 234 | KEY(3, 1, KEY_ENTER), | ||
| 235 | KEY(3, 2, KEY_LEFT), | ||
| 236 | }; | ||
| 237 | |||
| 238 | static struct pxa27x_keypad_platform_data palmld_keypad_platform_data = { | ||
| 239 | .matrix_key_rows = 4, | ||
| 240 | .matrix_key_cols = 3, | ||
| 241 | .matrix_key_map = palmld_matrix_keys, | ||
| 242 | .matrix_key_map_size = ARRAY_SIZE(palmld_matrix_keys), | ||
| 243 | |||
| 244 | .debounce_interval = 30, | ||
| 245 | }; | ||
| 246 | |||
| 247 | /****************************************************************************** | ||
| 248 | * GPIO keys | ||
| 249 | ******************************************************************************/ | ||
| 250 | static struct gpio_keys_button palmld_pxa_buttons[] = { | ||
| 251 | {KEY_F8, GPIO_NR_PALMLD_HOTSYNC_BUTTON_N, 1, "HotSync Button" }, | ||
| 252 | {KEY_F9, GPIO_NR_PALMLD_LOCK_SWITCH, 0, "Lock Switch" }, | ||
| 253 | {KEY_POWER, GPIO_NR_PALMLD_POWER_SWITCH, 0, "Power Switch" }, | ||
| 254 | }; | ||
| 255 | |||
| 256 | static struct gpio_keys_platform_data palmld_pxa_keys_data = { | ||
| 257 | .buttons = palmld_pxa_buttons, | ||
| 258 | .nbuttons = ARRAY_SIZE(palmld_pxa_buttons), | ||
| 259 | }; | ||
| 260 | |||
| 261 | static struct platform_device palmld_pxa_keys = { | ||
| 262 | .name = "gpio-keys", | ||
| 263 | .id = -1, | ||
| 264 | .dev = { | ||
| 265 | .platform_data = &palmld_pxa_keys_data, | ||
| 266 | }, | ||
| 267 | }; | ||
| 268 | |||
| 269 | /****************************************************************************** | ||
| 270 | * Backlight | ||
| 271 | ******************************************************************************/ | ||
| 272 | static int palmld_backlight_init(struct device *dev) | ||
| 273 | { | ||
| 274 | int ret; | ||
| 275 | |||
| 276 | ret = gpio_request(GPIO_NR_PALMLD_BL_POWER, "BL POWER"); | ||
| 277 | if (ret) | ||
| 278 | goto err; | ||
| 279 | ret = gpio_direction_output(GPIO_NR_PALMLD_BL_POWER, 0); | ||
| 280 | if (ret) | ||
| 281 | goto err2; | ||
| 282 | ret = gpio_request(GPIO_NR_PALMLD_LCD_POWER, "LCD POWER"); | ||
| 283 | if (ret) | ||
| 284 | goto err2; | ||
| 285 | ret = gpio_direction_output(GPIO_NR_PALMLD_LCD_POWER, 0); | ||
| 286 | if (ret) | ||
| 287 | goto err3; | ||
| 288 | |||
| 289 | return 0; | ||
| 290 | err3: | ||
| 291 | gpio_free(GPIO_NR_PALMLD_LCD_POWER); | ||
| 292 | err2: | ||
| 293 | gpio_free(GPIO_NR_PALMLD_BL_POWER); | ||
| 294 | err: | ||
| 295 | return ret; | ||
| 296 | } | ||
| 297 | |||
| 298 | static int palmld_backlight_notify(int brightness) | ||
| 299 | { | ||
| 300 | gpio_set_value(GPIO_NR_PALMLD_BL_POWER, brightness); | ||
| 301 | gpio_set_value(GPIO_NR_PALMLD_LCD_POWER, brightness); | ||
| 302 | return brightness; | ||
| 303 | } | ||
| 304 | |||
| 305 | static void palmld_backlight_exit(struct device *dev) | ||
| 306 | { | ||
| 307 | gpio_free(GPIO_NR_PALMLD_BL_POWER); | ||
| 308 | gpio_free(GPIO_NR_PALMLD_LCD_POWER); | ||
| 309 | } | ||
| 310 | |||
| 311 | static struct platform_pwm_backlight_data palmld_backlight_data = { | ||
| 312 | .pwm_id = 0, | ||
| 313 | .max_brightness = PALMLD_MAX_INTENSITY, | ||
| 314 | .dft_brightness = PALMLD_MAX_INTENSITY, | ||
| 315 | .pwm_period_ns = PALMLD_PERIOD_NS, | ||
| 316 | .init = palmld_backlight_init, | ||
| 317 | .notify = palmld_backlight_notify, | ||
| 318 | .exit = palmld_backlight_exit, | ||
| 319 | }; | ||
| 320 | |||
| 321 | static struct platform_device palmld_backlight = { | ||
| 322 | .name = "pwm-backlight", | ||
| 323 | .dev = { | ||
| 324 | .parent = &pxa27x_device_pwm0.dev, | ||
| 325 | .platform_data = &palmld_backlight_data, | ||
| 326 | }, | ||
| 327 | }; | ||
| 328 | |||
| 329 | /****************************************************************************** | ||
| 330 | * IrDA | ||
| 331 | ******************************************************************************/ | ||
| 332 | static int palmld_irda_startup(struct device *dev) | ||
| 333 | { | ||
| 334 | int err; | ||
| 335 | err = gpio_request(GPIO_NR_PALMLD_IR_DISABLE, "IR DISABLE"); | ||
| 336 | if (err) | ||
| 337 | goto err; | ||
| 338 | err = gpio_direction_output(GPIO_NR_PALMLD_IR_DISABLE, 1); | ||
| 339 | if (err) | ||
| 340 | gpio_free(GPIO_NR_PALMLD_IR_DISABLE); | ||
| 341 | err: | ||
| 342 | return err; | ||
| 343 | } | ||
| 344 | |||
| 345 | static void palmld_irda_shutdown(struct device *dev) | ||
| 346 | { | ||
| 347 | gpio_free(GPIO_NR_PALMLD_IR_DISABLE); | ||
| 348 | } | ||
| 349 | |||
| 350 | static void palmld_irda_transceiver_mode(struct device *dev, int mode) | ||
| 351 | { | ||
| 352 | gpio_set_value(GPIO_NR_PALMLD_IR_DISABLE, mode & IR_OFF); | ||
| 353 | pxa2xx_transceiver_mode(dev, mode); | ||
| 354 | } | ||
| 355 | |||
| 356 | static struct pxaficp_platform_data palmld_ficp_platform_data = { | ||
| 357 | .startup = palmld_irda_startup, | ||
| 358 | .shutdown = palmld_irda_shutdown, | ||
| 359 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, | ||
| 360 | .transceiver_mode = palmld_irda_transceiver_mode, | ||
| 361 | }; | ||
| 362 | |||
| 363 | /****************************************************************************** | ||
| 364 | * LEDs | ||
| 365 | ******************************************************************************/ | ||
| 366 | struct gpio_led gpio_leds[] = { | ||
| 367 | { | ||
| 368 | .name = "palmld:green:led", | ||
| 369 | .default_trigger = "none", | ||
| 370 | .gpio = GPIO_NR_PALMLD_LED_GREEN, | ||
| 371 | }, { | ||
| 372 | .name = "palmld:amber:led", | ||
| 373 | .default_trigger = "none", | ||
| 374 | .gpio = GPIO_NR_PALMLD_LED_AMBER, | ||
| 375 | }, | ||
| 376 | }; | ||
| 377 | |||
| 378 | static struct gpio_led_platform_data gpio_led_info = { | ||
| 379 | .leds = gpio_leds, | ||
| 380 | .num_leds = ARRAY_SIZE(gpio_leds), | ||
| 381 | }; | ||
| 382 | |||
| 383 | static struct platform_device palmld_leds = { | ||
| 384 | .name = "leds-gpio", | ||
| 385 | .id = -1, | ||
| 386 | .dev = { | ||
| 387 | .platform_data = &gpio_led_info, | ||
| 388 | } | ||
| 389 | }; | ||
| 390 | |||
| 391 | /****************************************************************************** | ||
| 392 | * Power supply | ||
| 393 | ******************************************************************************/ | ||
| 394 | static int power_supply_init(struct device *dev) | ||
| 395 | { | ||
| 396 | int ret; | ||
| 397 | |||
| 398 | ret = gpio_request(GPIO_NR_PALMLD_POWER_DETECT, "CABLE_STATE_AC"); | ||
| 399 | if (ret) | ||
| 400 | goto err1; | ||
| 401 | ret = gpio_direction_input(GPIO_NR_PALMLD_POWER_DETECT); | ||
| 402 | if (ret) | ||
| 403 | goto err2; | ||
| 404 | |||
| 405 | ret = gpio_request(GPIO_NR_PALMLD_USB_DETECT_N, "CABLE_STATE_USB"); | ||
| 406 | if (ret) | ||
| 407 | goto err2; | ||
| 408 | ret = gpio_direction_input(GPIO_NR_PALMLD_USB_DETECT_N); | ||
| 409 | if (ret) | ||
| 410 | goto err3; | ||
| 411 | |||
| 412 | return 0; | ||
| 413 | |||
| 414 | err3: | ||
| 415 | gpio_free(GPIO_NR_PALMLD_USB_DETECT_N); | ||
| 416 | err2: | ||
| 417 | gpio_free(GPIO_NR_PALMLD_POWER_DETECT); | ||
| 418 | err1: | ||
| 419 | return ret; | ||
| 420 | } | ||
| 421 | |||
| 422 | static int palmld_is_ac_online(void) | ||
| 423 | { | ||
| 424 | return gpio_get_value(GPIO_NR_PALMLD_POWER_DETECT); | ||
| 425 | } | ||
| 426 | |||
| 427 | static int palmld_is_usb_online(void) | ||
| 428 | { | ||
| 429 | return !gpio_get_value(GPIO_NR_PALMLD_USB_DETECT_N); | ||
| 430 | } | ||
| 431 | |||
| 432 | static void power_supply_exit(struct device *dev) | ||
| 433 | { | ||
| 434 | gpio_free(GPIO_NR_PALMLD_USB_DETECT_N); | ||
| 435 | gpio_free(GPIO_NR_PALMLD_POWER_DETECT); | ||
| 436 | } | ||
| 437 | |||
| 438 | static char *palmld_supplicants[] = { | ||
| 439 | "main-battery", | ||
| 440 | }; | ||
| 441 | |||
| 442 | static struct pda_power_pdata power_supply_info = { | ||
| 443 | .init = power_supply_init, | ||
| 444 | .is_ac_online = palmld_is_ac_online, | ||
| 445 | .is_usb_online = palmld_is_usb_online, | ||
| 446 | .exit = power_supply_exit, | ||
| 447 | .supplied_to = palmld_supplicants, | ||
| 448 | .num_supplicants = ARRAY_SIZE(palmld_supplicants), | ||
| 449 | }; | ||
| 450 | |||
| 451 | static struct platform_device power_supply = { | ||
| 452 | .name = "pda-power", | ||
| 453 | .id = -1, | ||
| 454 | .dev = { | ||
| 455 | .platform_data = &power_supply_info, | ||
| 456 | }, | ||
| 457 | }; | ||
| 458 | |||
| 459 | /****************************************************************************** | ||
| 460 | * WM97xx battery | ||
| 461 | ******************************************************************************/ | ||
| 462 | static struct wm97xx_batt_info wm97xx_batt_pdata = { | ||
| 463 | .batt_aux = WM97XX_AUX_ID3, | ||
| 464 | .temp_aux = WM97XX_AUX_ID2, | ||
| 465 | .charge_gpio = -1, | ||
| 466 | .max_voltage = PALMLD_BAT_MAX_VOLTAGE, | ||
| 467 | .min_voltage = PALMLD_BAT_MIN_VOLTAGE, | ||
| 468 | .batt_mult = 1000, | ||
| 469 | .batt_div = 414, | ||
| 470 | .temp_mult = 1, | ||
| 471 | .temp_div = 1, | ||
| 472 | .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO, | ||
| 473 | .batt_name = "main-batt", | ||
| 474 | }; | ||
| 475 | |||
| 476 | /****************************************************************************** | ||
| 477 | * aSoC audio | ||
| 478 | ******************************************************************************/ | ||
| 479 | static struct palm27x_asoc_info palm27x_asoc_pdata = { | ||
| 480 | .jack_gpio = GPIO_NR_PALMLD_EARPHONE_DETECT, | ||
| 481 | }; | ||
| 482 | |||
| 483 | /****************************************************************************** | ||
| 484 | * Framebuffer | ||
| 485 | ******************************************************************************/ | ||
| 486 | static struct pxafb_mode_info palmld_lcd_modes[] = { | ||
| 487 | { | ||
| 488 | .pixclock = 57692, | ||
| 489 | .xres = 320, | ||
| 490 | .yres = 480, | ||
| 491 | .bpp = 16, | ||
| 492 | |||
| 493 | .left_margin = 32, | ||
| 494 | .right_margin = 1, | ||
| 495 | .upper_margin = 7, | ||
| 496 | .lower_margin = 1, | ||
| 497 | |||
| 498 | .hsync_len = 4, | ||
| 499 | .vsync_len = 1, | ||
| 500 | }, | ||
| 501 | }; | ||
| 502 | |||
| 503 | static struct pxafb_mach_info palmld_lcd_screen = { | ||
| 504 | .modes = palmld_lcd_modes, | ||
| 505 | .num_modes = ARRAY_SIZE(palmld_lcd_modes), | ||
| 506 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | ||
| 507 | }; | ||
| 508 | |||
| 509 | /****************************************************************************** | ||
| 510 | * Machine init | ||
| 511 | ******************************************************************************/ | ||
| 512 | static struct platform_device *devices[] __initdata = { | ||
| 513 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | ||
| 514 | &palmld_pxa_keys, | ||
| 515 | #endif | ||
| 516 | &palmld_backlight, | ||
| 517 | &palmld_leds, | ||
| 518 | &power_supply, | ||
| 519 | }; | ||
| 520 | |||
| 521 | static struct map_desc palmld_io_desc[] __initdata = { | ||
| 522 | { | ||
| 523 | .virtual = PALMLD_IDE_VIRT, | ||
| 524 | .pfn = __phys_to_pfn(PALMLD_IDE_PHYS), | ||
| 525 | .length = PALMLD_IDE_SIZE, | ||
| 526 | .type = MT_DEVICE | ||
| 527 | }, | ||
| 528 | { | ||
| 529 | .virtual = PALMLD_USB_VIRT, | ||
| 530 | .pfn = __phys_to_pfn(PALMLD_USB_PHYS), | ||
| 531 | .length = PALMLD_USB_SIZE, | ||
| 532 | .type = MT_DEVICE | ||
| 533 | }, | ||
| 534 | }; | ||
| 535 | |||
| 536 | static void __init palmld_map_io(void) | ||
| 537 | { | ||
| 538 | pxa_map_io(); | ||
| 539 | iotable_init(palmld_io_desc, ARRAY_SIZE(palmld_io_desc)); | ||
| 540 | } | ||
| 541 | |||
| 542 | static void __init palmld_init(void) | ||
| 543 | { | ||
| 544 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmld_pin_config)); | ||
| 545 | |||
| 546 | set_pxa_fb_info(&palmld_lcd_screen); | ||
| 547 | pxa_set_mci_info(&palmld_mci_platform_data); | ||
| 548 | pxa_set_ac97_info(NULL); | ||
| 549 | pxa_set_ficp_info(&palmld_ficp_platform_data); | ||
| 550 | pxa_set_keypad_info(&palmld_keypad_platform_data); | ||
| 551 | wm97xx_bat_set_pdata(&wm97xx_batt_pdata); | ||
| 552 | palm27x_asoc_set_pdata(&palm27x_asoc_pdata); | ||
| 553 | |||
| 554 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 555 | } | ||
| 556 | |||
| 557 | MACHINE_START(PALMLD, "Palm LifeDrive") | ||
| 558 | .phys_io = PALMLD_PHYS_IO_START, | ||
| 559 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 560 | .boot_params = 0xa0000100, | ||
| 561 | .map_io = palmld_map_io, | ||
| 562 | .init_irq = pxa27x_init_irq, | ||
| 563 | .timer = &pxa_timer, | ||
| 564 | .init_machine = palmld_init | ||
| 565 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c new file mode 100644 index 000000000000..9521c7b33492 --- /dev/null +++ b/arch/arm/mach-pxa/palmt5.c | |||
| @@ -0,0 +1,496 @@ | |||
| 1 | /* | ||
| 2 | * Hardware definitions for Palm Tungsten|T5 | ||
| 3 | * | ||
| 4 | * Author: Marek Vasut <marek.vasut@gmail.com> | ||
| 5 | * | ||
| 6 | * Based on work of: | ||
| 7 | * Ales Snuparek <snuparek@atlas.cz> | ||
| 8 | * Justin Kendrick <twilightsentry@gmail.com> | ||
| 9 | * RichardT5 <richard_t5@users.sourceforge.net> | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | * | ||
| 15 | * (find more info at www.hackndev.com) | ||
| 16 | * | ||
| 17 | */ | ||
| 18 | |||
| 19 | #include <linux/platform_device.h> | ||
| 20 | #include <linux/delay.h> | ||
| 21 | #include <linux/irq.h> | ||
| 22 | #include <linux/gpio_keys.h> | ||
| 23 | #include <linux/input.h> | ||
| 24 | #include <linux/pda_power.h> | ||
| 25 | #include <linux/pwm_backlight.h> | ||
| 26 | #include <linux/gpio.h> | ||
| 27 | #include <linux/wm97xx_batt.h> | ||
| 28 | #include <linux/power_supply.h> | ||
| 29 | |||
| 30 | #include <asm/mach-types.h> | ||
| 31 | #include <asm/mach/arch.h> | ||
| 32 | #include <asm/mach/map.h> | ||
| 33 | |||
| 34 | #include <mach/pxa27x.h> | ||
| 35 | #include <mach/audio.h> | ||
| 36 | #include <mach/palmt5.h> | ||
| 37 | #include <mach/mmc.h> | ||
| 38 | #include <mach/pxafb.h> | ||
| 39 | #include <mach/irda.h> | ||
| 40 | #include <mach/pxa27x_keypad.h> | ||
| 41 | #include <mach/udc.h> | ||
| 42 | #include <mach/palmasoc.h> | ||
| 43 | |||
| 44 | #include "generic.h" | ||
| 45 | #include "devices.h" | ||
| 46 | |||
| 47 | /****************************************************************************** | ||
| 48 | * Pin configuration | ||
| 49 | ******************************************************************************/ | ||
| 50 | static unsigned long palmt5_pin_config[] __initdata = { | ||
| 51 | /* MMC */ | ||
| 52 | GPIO32_MMC_CLK, | ||
| 53 | GPIO92_MMC_DAT_0, | ||
| 54 | GPIO109_MMC_DAT_1, | ||
| 55 | GPIO110_MMC_DAT_2, | ||
| 56 | GPIO111_MMC_DAT_3, | ||
| 57 | GPIO112_MMC_CMD, | ||
| 58 | GPIO14_GPIO, /* SD detect */ | ||
| 59 | GPIO114_GPIO, /* SD power */ | ||
| 60 | GPIO115_GPIO, /* SD r/o switch */ | ||
| 61 | |||
| 62 | /* AC97 */ | ||
| 63 | GPIO28_AC97_BITCLK, | ||
| 64 | GPIO29_AC97_SDATA_IN_0, | ||
| 65 | GPIO30_AC97_SDATA_OUT, | ||
| 66 | GPIO31_AC97_SYNC, | ||
| 67 | |||
| 68 | /* IrDA */ | ||
| 69 | GPIO40_GPIO, /* ir disable */ | ||
| 70 | GPIO46_FICP_RXD, | ||
| 71 | GPIO47_FICP_TXD, | ||
| 72 | |||
| 73 | /* USB */ | ||
| 74 | GPIO15_GPIO, /* usb detect */ | ||
| 75 | GPIO95_GPIO, /* usb power */ | ||
| 76 | |||
| 77 | /* MATRIX KEYPAD */ | ||
| 78 | GPIO100_KP_MKIN_0, | ||
| 79 | GPIO101_KP_MKIN_1, | ||
| 80 | GPIO102_KP_MKIN_2, | ||
| 81 | GPIO97_KP_MKIN_3, | ||
| 82 | GPIO103_KP_MKOUT_0, | ||
| 83 | GPIO104_KP_MKOUT_1, | ||
| 84 | GPIO105_KP_MKOUT_2, | ||
| 85 | |||
| 86 | /* LCD */ | ||
| 87 | GPIO58_LCD_LDD_0, | ||
| 88 | GPIO59_LCD_LDD_1, | ||
| 89 | GPIO60_LCD_LDD_2, | ||
| 90 | GPIO61_LCD_LDD_3, | ||
| 91 | GPIO62_LCD_LDD_4, | ||
| 92 | GPIO63_LCD_LDD_5, | ||
| 93 | GPIO64_LCD_LDD_6, | ||
| 94 | GPIO65_LCD_LDD_7, | ||
| 95 | GPIO66_LCD_LDD_8, | ||
| 96 | GPIO67_LCD_LDD_9, | ||
| 97 | GPIO68_LCD_LDD_10, | ||
| 98 | GPIO69_LCD_LDD_11, | ||
| 99 | GPIO70_LCD_LDD_12, | ||
| 100 | GPIO71_LCD_LDD_13, | ||
| 101 | GPIO72_LCD_LDD_14, | ||
| 102 | GPIO73_LCD_LDD_15, | ||
| 103 | GPIO74_LCD_FCLK, | ||
| 104 | GPIO75_LCD_LCLK, | ||
| 105 | GPIO76_LCD_PCLK, | ||
| 106 | GPIO77_LCD_BIAS, | ||
| 107 | |||
| 108 | /* PWM */ | ||
| 109 | GPIO16_PWM0_OUT, | ||
| 110 | |||
| 111 | /* MISC */ | ||
| 112 | GPIO10_GPIO, /* hotsync button */ | ||
| 113 | GPIO90_GPIO, /* power detect */ | ||
| 114 | GPIO107_GPIO, /* earphone detect */ | ||
| 115 | }; | ||
| 116 | |||
| 117 | /****************************************************************************** | ||
| 118 | * SD/MMC card controller | ||
| 119 | ******************************************************************************/ | ||
| 120 | static int palmt5_mci_init(struct device *dev, irq_handler_t palmt5_detect_int, | ||
| 121 | void *data) | ||
| 122 | { | ||
| 123 | int err = 0; | ||
| 124 | |||
| 125 | /* Setup an interrupt for detecting card insert/remove events */ | ||
| 126 | err = gpio_request(GPIO_NR_PALMT5_SD_DETECT_N, "SD IRQ"); | ||
| 127 | if (err) | ||
| 128 | goto err; | ||
| 129 | err = gpio_direction_input(GPIO_NR_PALMT5_SD_DETECT_N); | ||
| 130 | if (err) | ||
| 131 | goto err2; | ||
| 132 | err = request_irq(gpio_to_irq(GPIO_NR_PALMT5_SD_DETECT_N), | ||
| 133 | palmt5_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM | | ||
| 134 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, | ||
| 135 | "SD/MMC card detect", data); | ||
| 136 | if (err) { | ||
| 137 | printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n", | ||
| 138 | __func__); | ||
| 139 | goto err2; | ||
| 140 | } | ||
| 141 | |||
| 142 | err = gpio_request(GPIO_NR_PALMT5_SD_POWER, "SD_POWER"); | ||
| 143 | if (err) | ||
| 144 | goto err3; | ||
| 145 | err = gpio_direction_output(GPIO_NR_PALMT5_SD_POWER, 0); | ||
| 146 | if (err) | ||
| 147 | goto err4; | ||
| 148 | |||
| 149 | err = gpio_request(GPIO_NR_PALMT5_SD_READONLY, "SD_READONLY"); | ||
| 150 | if (err) | ||
| 151 | goto err4; | ||
| 152 | err = gpio_direction_input(GPIO_NR_PALMT5_SD_READONLY); | ||
| 153 | if (err) | ||
| 154 | goto err5; | ||
| 155 | |||
| 156 | printk(KERN_DEBUG "%s: irq registered\n", __func__); | ||
| 157 | |||
| 158 | return 0; | ||
| 159 | |||
| 160 | err5: | ||
| 161 | gpio_free(GPIO_NR_PALMT5_SD_READONLY); | ||
| 162 | err4: | ||
| 163 | gpio_free(GPIO_NR_PALMT5_SD_POWER); | ||
| 164 | err3: | ||
| 165 | free_irq(gpio_to_irq(GPIO_NR_PALMT5_SD_DETECT_N), data); | ||
| 166 | err2: | ||
| 167 | gpio_free(GPIO_NR_PALMT5_SD_DETECT_N); | ||
| 168 | err: | ||
| 169 | return err; | ||
| 170 | } | ||
| 171 | |||
| 172 | static void palmt5_mci_exit(struct device *dev, void *data) | ||
| 173 | { | ||
| 174 | gpio_free(GPIO_NR_PALMT5_SD_READONLY); | ||
| 175 | gpio_free(GPIO_NR_PALMT5_SD_POWER); | ||
| 176 | free_irq(IRQ_GPIO_PALMT5_SD_DETECT_N, data); | ||
| 177 | gpio_free(GPIO_NR_PALMT5_SD_DETECT_N); | ||
| 178 | } | ||
| 179 | |||
| 180 | static void palmt5_mci_power(struct device *dev, unsigned int vdd) | ||
| 181 | { | ||
| 182 | struct pxamci_platform_data *p_d = dev->platform_data; | ||
| 183 | gpio_set_value(GPIO_NR_PALMT5_SD_POWER, p_d->ocr_mask & (1 << vdd)); | ||
| 184 | } | ||
| 185 | |||
| 186 | static int palmt5_mci_get_ro(struct device *dev) | ||
| 187 | { | ||
| 188 | return gpio_get_value(GPIO_NR_PALMT5_SD_READONLY); | ||
| 189 | } | ||
| 190 | |||
| 191 | static struct pxamci_platform_data palmt5_mci_platform_data = { | ||
| 192 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
| 193 | .setpower = palmt5_mci_power, | ||
| 194 | .get_ro = palmt5_mci_get_ro, | ||
| 195 | .init = palmt5_mci_init, | ||
| 196 | .exit = palmt5_mci_exit, | ||
| 197 | }; | ||
| 198 | |||
| 199 | /****************************************************************************** | ||
| 200 | * GPIO keyboard | ||
| 201 | ******************************************************************************/ | ||
| 202 | static unsigned int palmt5_matrix_keys[] = { | ||
| 203 | KEY(0, 0, KEY_POWER), | ||
| 204 | KEY(0, 1, KEY_F1), | ||
| 205 | KEY(0, 2, KEY_ENTER), | ||
| 206 | |||
| 207 | KEY(1, 0, KEY_F2), | ||
| 208 | KEY(1, 1, KEY_F3), | ||
| 209 | KEY(1, 2, KEY_F4), | ||
| 210 | |||
| 211 | KEY(2, 0, KEY_UP), | ||
| 212 | KEY(2, 2, KEY_DOWN), | ||
| 213 | |||
| 214 | KEY(3, 0, KEY_RIGHT), | ||
| 215 | KEY(3, 2, KEY_LEFT), | ||
| 216 | }; | ||
| 217 | |||
| 218 | static struct pxa27x_keypad_platform_data palmt5_keypad_platform_data = { | ||
| 219 | .matrix_key_rows = 4, | ||
| 220 | .matrix_key_cols = 3, | ||
| 221 | .matrix_key_map = palmt5_matrix_keys, | ||
| 222 | .matrix_key_map_size = ARRAY_SIZE(palmt5_matrix_keys), | ||
| 223 | |||
| 224 | .debounce_interval = 30, | ||
| 225 | }; | ||
| 226 | |||
| 227 | /****************************************************************************** | ||
| 228 | * GPIO keys | ||
| 229 | ******************************************************************************/ | ||
| 230 | static struct gpio_keys_button palmt5_pxa_buttons[] = { | ||
| 231 | {KEY_F8, GPIO_NR_PALMT5_HOTSYNC_BUTTON_N, 1, "HotSync Button" }, | ||
| 232 | }; | ||
| 233 | |||
| 234 | static struct gpio_keys_platform_data palmt5_pxa_keys_data = { | ||
| 235 | .buttons = palmt5_pxa_buttons, | ||
| 236 | .nbuttons = ARRAY_SIZE(palmt5_pxa_buttons), | ||
| 237 | }; | ||
| 238 | |||
| 239 | static struct platform_device palmt5_pxa_keys = { | ||
| 240 | .name = "gpio-keys", | ||
| 241 | .id = -1, | ||
| 242 | .dev = { | ||
| 243 | .platform_data = &palmt5_pxa_keys_data, | ||
| 244 | }, | ||
| 245 | }; | ||
| 246 | |||
| 247 | /****************************************************************************** | ||
| 248 | * Backlight | ||
| 249 | ******************************************************************************/ | ||
| 250 | static int palmt5_backlight_init(struct device *dev) | ||
| 251 | { | ||
| 252 | int ret; | ||
| 253 | |||
| 254 | ret = gpio_request(GPIO_NR_PALMT5_BL_POWER, "BL POWER"); | ||
| 255 | if (ret) | ||
| 256 | goto err; | ||
| 257 | ret = gpio_direction_output(GPIO_NR_PALMT5_BL_POWER, 0); | ||
| 258 | if (ret) | ||
| 259 | goto err2; | ||
| 260 | ret = gpio_request(GPIO_NR_PALMT5_LCD_POWER, "LCD POWER"); | ||
| 261 | if (ret) | ||
| 262 | goto err2; | ||
| 263 | ret = gpio_direction_output(GPIO_NR_PALMT5_LCD_POWER, 0); | ||
| 264 | if (ret) | ||
| 265 | goto err3; | ||
| 266 | |||
| 267 | return 0; | ||
| 268 | err3: | ||
| 269 | gpio_free(GPIO_NR_PALMT5_LCD_POWER); | ||
| 270 | err2: | ||
| 271 | gpio_free(GPIO_NR_PALMT5_BL_POWER); | ||
| 272 | err: | ||
| 273 | return ret; | ||
| 274 | } | ||
| 275 | |||
| 276 | static int palmt5_backlight_notify(int brightness) | ||
| 277 | { | ||
| 278 | gpio_set_value(GPIO_NR_PALMT5_BL_POWER, brightness); | ||
| 279 | gpio_set_value(GPIO_NR_PALMT5_LCD_POWER, brightness); | ||
| 280 | return brightness; | ||
| 281 | } | ||
| 282 | |||
| 283 | static void palmt5_backlight_exit(struct device *dev) | ||
| 284 | { | ||
| 285 | gpio_free(GPIO_NR_PALMT5_BL_POWER); | ||
| 286 | gpio_free(GPIO_NR_PALMT5_LCD_POWER); | ||
| 287 | } | ||
| 288 | |||
| 289 | static struct platform_pwm_backlight_data palmt5_backlight_data = { | ||
| 290 | .pwm_id = 0, | ||
| 291 | .max_brightness = PALMT5_MAX_INTENSITY, | ||
| 292 | .dft_brightness = PALMT5_MAX_INTENSITY, | ||
| 293 | .pwm_period_ns = PALMT5_PERIOD_NS, | ||
| 294 | .init = palmt5_backlight_init, | ||
| 295 | .notify = palmt5_backlight_notify, | ||
| 296 | .exit = palmt5_backlight_exit, | ||
| 297 | }; | ||
| 298 | |||
| 299 | static struct platform_device palmt5_backlight = { | ||
| 300 | .name = "pwm-backlight", | ||
| 301 | .dev = { | ||
| 302 | .parent = &pxa27x_device_pwm0.dev, | ||
| 303 | .platform_data = &palmt5_backlight_data, | ||
| 304 | }, | ||
| 305 | }; | ||
| 306 | |||
| 307 | /****************************************************************************** | ||
| 308 | * IrDA | ||
| 309 | ******************************************************************************/ | ||
| 310 | static int palmt5_irda_startup(struct device *dev) | ||
| 311 | { | ||
| 312 | int err; | ||
| 313 | err = gpio_request(GPIO_NR_PALMT5_IR_DISABLE, "IR DISABLE"); | ||
| 314 | if (err) | ||
| 315 | goto err; | ||
| 316 | err = gpio_direction_output(GPIO_NR_PALMT5_IR_DISABLE, 1); | ||
| 317 | if (err) | ||
| 318 | gpio_free(GPIO_NR_PALMT5_IR_DISABLE); | ||
| 319 | err: | ||
| 320 | return err; | ||
| 321 | } | ||
| 322 | |||
| 323 | static void palmt5_irda_shutdown(struct device *dev) | ||
| 324 | { | ||
| 325 | gpio_free(GPIO_NR_PALMT5_IR_DISABLE); | ||
| 326 | } | ||
| 327 | |||
| 328 | static void palmt5_irda_transceiver_mode(struct device *dev, int mode) | ||
| 329 | { | ||
| 330 | gpio_set_value(GPIO_NR_PALMT5_IR_DISABLE, mode & IR_OFF); | ||
| 331 | pxa2xx_transceiver_mode(dev, mode); | ||
| 332 | } | ||
| 333 | |||
| 334 | static struct pxaficp_platform_data palmt5_ficp_platform_data = { | ||
| 335 | .startup = palmt5_irda_startup, | ||
| 336 | .shutdown = palmt5_irda_shutdown, | ||
| 337 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, | ||
| 338 | .transceiver_mode = palmt5_irda_transceiver_mode, | ||
| 339 | }; | ||
| 340 | |||
| 341 | /****************************************************************************** | ||
| 342 | * UDC | ||
| 343 | ******************************************************************************/ | ||
| 344 | static struct pxa2xx_udc_mach_info palmt5_udc_info __initdata = { | ||
| 345 | .gpio_vbus = GPIO_NR_PALMT5_USB_DETECT_N, | ||
| 346 | .gpio_vbus_inverted = 1, | ||
| 347 | .gpio_pullup = GPIO_NR_PALMT5_USB_POWER, | ||
| 348 | .gpio_pullup_inverted = 0, | ||
| 349 | }; | ||
| 350 | |||
| 351 | /****************************************************************************** | ||
| 352 | * Power supply | ||
| 353 | ******************************************************************************/ | ||
| 354 | static int power_supply_init(struct device *dev) | ||
| 355 | { | ||
| 356 | int ret; | ||
| 357 | |||
| 358 | ret = gpio_request(GPIO_NR_PALMT5_POWER_DETECT, "CABLE_STATE_AC"); | ||
| 359 | if (ret) | ||
| 360 | goto err1; | ||
| 361 | ret = gpio_direction_input(GPIO_NR_PALMT5_POWER_DETECT); | ||
| 362 | if (ret) | ||
| 363 | goto err2; | ||
| 364 | |||
| 365 | return 0; | ||
| 366 | err2: | ||
| 367 | gpio_free(GPIO_NR_PALMT5_POWER_DETECT); | ||
| 368 | err1: | ||
| 369 | return ret; | ||
| 370 | } | ||
| 371 | |||
| 372 | static int palmt5_is_ac_online(void) | ||
| 373 | { | ||
| 374 | return gpio_get_value(GPIO_NR_PALMT5_POWER_DETECT); | ||
| 375 | } | ||
| 376 | |||
| 377 | static void power_supply_exit(struct device *dev) | ||
| 378 | { | ||
| 379 | gpio_free(GPIO_NR_PALMT5_POWER_DETECT); | ||
| 380 | } | ||
| 381 | |||
| 382 | static char *palmt5_supplicants[] = { | ||
| 383 | "main-battery", | ||
| 384 | }; | ||
| 385 | |||
| 386 | static struct pda_power_pdata power_supply_info = { | ||
| 387 | .init = power_supply_init, | ||
| 388 | .is_ac_online = palmt5_is_ac_online, | ||
| 389 | .exit = power_supply_exit, | ||
| 390 | .supplied_to = palmt5_supplicants, | ||
| 391 | .num_supplicants = ARRAY_SIZE(palmt5_supplicants), | ||
| 392 | }; | ||
| 393 | |||
| 394 | static struct platform_device power_supply = { | ||
| 395 | .name = "pda-power", | ||
| 396 | .id = -1, | ||
| 397 | .dev = { | ||
| 398 | .platform_data = &power_supply_info, | ||
| 399 | }, | ||
| 400 | }; | ||
| 401 | |||
| 402 | /****************************************************************************** | ||
| 403 | * WM97xx battery | ||
| 404 | ******************************************************************************/ | ||
| 405 | static struct wm97xx_batt_info wm97xx_batt_pdata = { | ||
| 406 | .batt_aux = WM97XX_AUX_ID3, | ||
| 407 | .temp_aux = WM97XX_AUX_ID2, | ||
| 408 | .charge_gpio = -1, | ||
| 409 | .max_voltage = PALMT5_BAT_MAX_VOLTAGE, | ||
| 410 | .min_voltage = PALMT5_BAT_MIN_VOLTAGE, | ||
| 411 | .batt_mult = 1000, | ||
| 412 | .batt_div = 414, | ||
| 413 | .temp_mult = 1, | ||
| 414 | .temp_div = 1, | ||
| 415 | .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO, | ||
| 416 | .batt_name = "main-batt", | ||
| 417 | }; | ||
| 418 | |||
| 419 | /****************************************************************************** | ||
| 420 | * aSoC audio | ||
| 421 | ******************************************************************************/ | ||
| 422 | static struct palm27x_asoc_info palm27x_asoc_pdata = { | ||
| 423 | .jack_gpio = GPIO_NR_PALMT5_EARPHONE_DETECT, | ||
| 424 | }; | ||
| 425 | |||
| 426 | /****************************************************************************** | ||
| 427 | * Framebuffer | ||
| 428 | ******************************************************************************/ | ||
| 429 | static struct pxafb_mode_info palmt5_lcd_modes[] = { | ||
| 430 | { | ||
| 431 | .pixclock = 57692, | ||
| 432 | .xres = 320, | ||
| 433 | .yres = 480, | ||
| 434 | .bpp = 16, | ||
| 435 | |||
| 436 | .left_margin = 32, | ||
| 437 | .right_margin = 1, | ||
| 438 | .upper_margin = 7, | ||
| 439 | .lower_margin = 1, | ||
| 440 | |||
| 441 | .hsync_len = 4, | ||
| 442 | .vsync_len = 1, | ||
| 443 | }, | ||
| 444 | }; | ||
| 445 | |||
| 446 | static struct pxafb_mach_info palmt5_lcd_screen = { | ||
| 447 | .modes = palmt5_lcd_modes, | ||
| 448 | .num_modes = ARRAY_SIZE(palmt5_lcd_modes), | ||
| 449 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | ||
| 450 | }; | ||
| 451 | |||
| 452 | /****************************************************************************** | ||
| 453 | * Machine init | ||
| 454 | ******************************************************************************/ | ||
| 455 | static struct platform_device *devices[] __initdata = { | ||
| 456 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | ||
| 457 | &palmt5_pxa_keys, | ||
| 458 | #endif | ||
| 459 | &palmt5_backlight, | ||
| 460 | &power_supply, | ||
| 461 | }; | ||
| 462 | |||
| 463 | /* setup udc GPIOs initial state */ | ||
| 464 | static void __init palmt5_udc_init(void) | ||
| 465 | { | ||
| 466 | if (!gpio_request(GPIO_NR_PALMT5_USB_POWER, "UDC Vbus")) { | ||
| 467 | gpio_direction_output(GPIO_NR_PALMT5_USB_POWER, 1); | ||
| 468 | gpio_free(GPIO_NR_PALMT5_USB_POWER); | ||
| 469 | } | ||
| 470 | } | ||
| 471 | |||
| 472 | static void __init palmt5_init(void) | ||
| 473 | { | ||
| 474 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmt5_pin_config)); | ||
| 475 | |||
| 476 | set_pxa_fb_info(&palmt5_lcd_screen); | ||
| 477 | pxa_set_mci_info(&palmt5_mci_platform_data); | ||
| 478 | palmt5_udc_init(); | ||
| 479 | pxa_set_udc_info(&palmt5_udc_info); | ||
| 480 | pxa_set_ac97_info(NULL); | ||
| 481 | pxa_set_ficp_info(&palmt5_ficp_platform_data); | ||
| 482 | pxa_set_keypad_info(&palmt5_keypad_platform_data); | ||
| 483 | wm97xx_bat_set_pdata(&wm97xx_batt_pdata); | ||
| 484 | palm27x_asoc_set_pdata(&palm27x_asoc_pdata); | ||
| 485 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 486 | } | ||
| 487 | |||
| 488 | MACHINE_START(PALMT5, "Palm Tungsten|T5") | ||
| 489 | .phys_io = PALMT5_PHYS_IO_START, | ||
| 490 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 491 | .boot_params = 0xa0000100, | ||
| 492 | .map_io = pxa_map_io, | ||
| 493 | .init_irq = pxa27x_init_irq, | ||
| 494 | .timer = &pxa_timer, | ||
| 495 | .init_machine = palmt5_init | ||
| 496 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index a9d94f5dbec4..b490c0924619 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c | |||
| @@ -32,12 +32,11 @@ | |||
| 32 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
| 33 | #include <asm/mach/map.h> | 33 | #include <asm/mach/map.h> |
| 34 | 34 | ||
| 35 | #include <mach/pxa27x.h> | ||
| 35 | #include <mach/audio.h> | 36 | #include <mach/audio.h> |
| 36 | #include <mach/palmtx.h> | 37 | #include <mach/palmtx.h> |
| 37 | #include <mach/mmc.h> | 38 | #include <mach/mmc.h> |
| 38 | #include <mach/pxafb.h> | 39 | #include <mach/pxafb.h> |
| 39 | #include <mach/pxa-regs.h> | ||
| 40 | #include <mach/mfp-pxa27x.h> | ||
| 41 | #include <mach/irda.h> | 40 | #include <mach/irda.h> |
| 42 | #include <mach/pxa27x_keypad.h> | 41 | #include <mach/pxa27x_keypad.h> |
| 43 | #include <mach/udc.h> | 42 | #include <mach/udc.h> |
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c index 2f730da3bba8..b88eb4dd2c84 100644 --- a/arch/arm/mach-pxa/palmz72.c +++ b/arch/arm/mach-pxa/palmz72.c | |||
| @@ -33,13 +33,11 @@ | |||
| 33 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
| 34 | #include <asm/mach/map.h> | 34 | #include <asm/mach/map.h> |
| 35 | 35 | ||
| 36 | #include <mach/pxa27x.h> | ||
| 36 | #include <mach/audio.h> | 37 | #include <mach/audio.h> |
| 37 | #include <mach/palmz72.h> | 38 | #include <mach/palmz72.h> |
| 38 | #include <mach/mmc.h> | 39 | #include <mach/mmc.h> |
| 39 | #include <mach/pxafb.h> | 40 | #include <mach/pxafb.h> |
| 40 | #include <mach/pxa-regs.h> | ||
| 41 | #include <mach/pxa2xx-regs.h> | ||
| 42 | #include <mach/mfp-pxa27x.h> | ||
| 43 | #include <mach/irda.h> | 41 | #include <mach/irda.h> |
| 44 | #include <mach/pxa27x_keypad.h> | 42 | #include <mach/pxa27x_keypad.h> |
| 45 | #include <mach/udc.h> | 43 | #include <mach/udc.h> |
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c index 36135a02fdc7..6abfa2979c61 100644 --- a/arch/arm/mach-pxa/pcm027.c +++ b/arch/arm/mach-pxa/pcm027.c | |||
| @@ -29,10 +29,7 @@ | |||
| 29 | 29 | ||
| 30 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
| 31 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
| 32 | #include <mach/hardware.h> | 32 | #include <mach/pxa27x.h> |
| 33 | #include <mach/pxa-regs.h> | ||
| 34 | #include <mach/mfp-pxa27x.h> | ||
| 35 | #include <mach/pxa2xx-regs.h> | ||
| 36 | #include <mach/pxa2xx_spi.h> | 33 | #include <mach/pxa2xx_spi.h> |
| 37 | #include <mach/pcm027.h> | 34 | #include <mach/pcm027.h> |
| 38 | #include "generic.h" | 35 | #include "generic.h" |
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index 34841c72815f..f46698e20c1f 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c | |||
| @@ -31,13 +31,12 @@ | |||
| 31 | #include <mach/i2c.h> | 31 | #include <mach/i2c.h> |
| 32 | #include <mach/camera.h> | 32 | #include <mach/camera.h> |
| 33 | #include <asm/mach/map.h> | 33 | #include <asm/mach/map.h> |
| 34 | #include <mach/pxa-regs.h> | 34 | #include <mach/pxa27x.h> |
| 35 | #include <mach/audio.h> | 35 | #include <mach/audio.h> |
| 36 | #include <mach/mmc.h> | 36 | #include <mach/mmc.h> |
| 37 | #include <mach/ohci.h> | 37 | #include <mach/ohci.h> |
| 38 | #include <mach/pcm990_baseboard.h> | 38 | #include <mach/pcm990_baseboard.h> |
| 39 | #include <mach/pxafb.h> | 39 | #include <mach/pxafb.h> |
| 40 | #include <mach/mfp-pxa27x.h> | ||
| 41 | 40 | ||
| 42 | #include "devices.h" | 41 | #include "devices.h" |
| 43 | #include "generic.h" | 42 | #include "generic.h" |
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index 164eb0bb6321..884b174c8ead 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c | |||
| @@ -14,15 +14,8 @@ | |||
| 14 | #include <linux/module.h> | 14 | #include <linux/module.h> |
| 15 | #include <linux/suspend.h> | 15 | #include <linux/suspend.h> |
| 16 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
| 17 | #include <linux/time.h> | ||
| 18 | 17 | ||
| 19 | #include <mach/hardware.h> | ||
| 20 | #include <asm/memory.h> | ||
| 21 | #include <asm/system.h> | ||
| 22 | #include <mach/pm.h> | 18 | #include <mach/pm.h> |
| 23 | #include <mach/pxa-regs.h> | ||
| 24 | #include <mach/lubbock.h> | ||
| 25 | #include <asm/mach/time.h> | ||
| 26 | 19 | ||
| 27 | struct pxa_cpu_pm_fns *pxa_cpu_pm_fns; | 20 | struct pxa_cpu_pm_fns *pxa_cpu_pm_fns; |
| 28 | static unsigned long *sleep_save; | 21 | static unsigned long *sleep_save; |
| @@ -57,9 +50,9 @@ int pxa_pm_enter(suspend_state_t state) | |||
| 57 | 50 | ||
| 58 | /* if invalid, display message and wait for a hardware reset */ | 51 | /* if invalid, display message and wait for a hardware reset */ |
| 59 | if (checksum != sleep_save_checksum) { | 52 | if (checksum != sleep_save_checksum) { |
| 60 | #ifdef CONFIG_ARCH_LUBBOCK | 53 | |
| 61 | LUB_HEXLED = 0xbadbadc5; | 54 | lubbock_set_hexled(0xbadbadc5); |
| 62 | #endif | 55 | |
| 63 | while (1) | 56 | while (1) |
| 64 | pxa_cpu_pm_fns->enter(state); | 57 | pxa_cpu_pm_fns->enter(state); |
| 65 | } | 58 | } |
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index f9093beba752..572ddec2b3e6 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c | |||
| @@ -36,9 +36,7 @@ | |||
| 36 | #include <asm/mach/map.h> | 36 | #include <asm/mach/map.h> |
| 37 | #include <asm/mach/irq.h> | 37 | #include <asm/mach/irq.h> |
| 38 | 38 | ||
| 39 | #include <mach/pxa-regs.h> | 39 | #include <mach/pxa25x.h> |
| 40 | #include <mach/pxa2xx-regs.h> | ||
| 41 | #include <mach/mfp-pxa25x.h> | ||
| 42 | #include <mach/mmc.h> | 40 | #include <mach/mmc.h> |
| 43 | #include <mach/udc.h> | 41 | #include <mach/udc.h> |
| 44 | #include <mach/i2c.h> | 42 | #include <mach/i2c.h> |
diff --git a/arch/arm/mach-pxa/pwm.c b/arch/arm/mach-pxa/pwm.c index 3ca7ffc6904b..fcdd374437a8 100644 --- a/arch/arm/mach-pxa/pwm.c +++ b/arch/arm/mach-pxa/pwm.c | |||
| @@ -20,7 +20,6 @@ | |||
| 20 | #include <linux/pwm.h> | 20 | #include <linux/pwm.h> |
| 21 | 21 | ||
| 22 | #include <asm/div64.h> | 22 | #include <asm/div64.h> |
| 23 | #include <mach/pxa-regs.h> | ||
| 24 | 23 | ||
| 25 | /* PWM registers and bits definitions */ | 24 | /* PWM registers and bits definitions */ |
| 26 | #define PWMCR (0x00) | 25 | #define PWMCR (0x00) |
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 6c57522e2469..77c2693cfeef 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
| @@ -25,9 +25,8 @@ | |||
| 25 | 25 | ||
| 26 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
| 27 | #include <mach/irqs.h> | 27 | #include <mach/irqs.h> |
| 28 | #include <mach/pxa-regs.h> | 28 | #include <mach/gpio.h> |
| 29 | #include <mach/pxa2xx-regs.h> | 29 | #include <mach/pxa25x.h> |
| 30 | #include <mach/mfp-pxa25x.h> | ||
| 31 | #include <mach/reset.h> | 30 | #include <mach/reset.h> |
| 32 | #include <mach/pm.h> | 31 | #include <mach/pm.h> |
| 33 | #include <mach/dma.h> | 32 | #include <mach/dma.h> |
| @@ -310,14 +309,14 @@ set_pwer: | |||
| 310 | void __init pxa25x_init_irq(void) | 309 | void __init pxa25x_init_irq(void) |
| 311 | { | 310 | { |
| 312 | pxa_init_irq(32, pxa25x_set_wake); | 311 | pxa_init_irq(32, pxa25x_set_wake); |
| 313 | pxa_init_gpio(85, pxa25x_set_wake); | 312 | pxa_init_gpio(IRQ_GPIO_2_x, 2, 84, pxa25x_set_wake); |
| 314 | } | 313 | } |
| 315 | 314 | ||
| 316 | #ifdef CONFIG_CPU_PXA26x | 315 | #ifdef CONFIG_CPU_PXA26x |
| 317 | void __init pxa26x_init_irq(void) | 316 | void __init pxa26x_init_irq(void) |
| 318 | { | 317 | { |
| 319 | pxa_init_irq(32, pxa25x_set_wake); | 318 | pxa_init_irq(32, pxa25x_set_wake); |
| 320 | pxa_init_gpio(90, pxa25x_set_wake); | 319 | pxa_init_gpio(IRQ_GPIO_2_x, 2, 89, pxa25x_set_wake); |
| 321 | } | 320 | } |
| 322 | #endif | 321 | #endif |
| 323 | 322 | ||
| @@ -355,7 +354,7 @@ static int __init pxa25x_init(void) | |||
| 355 | 354 | ||
| 356 | clks_register(pxa25x_clkregs, ARRAY_SIZE(pxa25x_clkregs)); | 355 | clks_register(pxa25x_clkregs, ARRAY_SIZE(pxa25x_clkregs)); |
| 357 | 356 | ||
| 358 | if ((ret = pxa_init_dma(16))) | 357 | if ((ret = pxa_init_dma(IRQ_DMA, 16))) |
| 359 | return ret; | 358 | return ret; |
| 360 | 359 | ||
| 361 | pxa25x_init_pm(); | 360 | pxa25x_init_pm(); |
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 411bec54fdc4..a425ec71e657 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
| @@ -21,9 +21,8 @@ | |||
| 21 | #include <mach/hardware.h> | 21 | #include <mach/hardware.h> |
| 22 | #include <asm/irq.h> | 22 | #include <asm/irq.h> |
| 23 | #include <mach/irqs.h> | 23 | #include <mach/irqs.h> |
| 24 | #include <mach/pxa-regs.h> | 24 | #include <mach/gpio.h> |
| 25 | #include <mach/pxa2xx-regs.h> | 25 | #include <mach/pxa27x.h> |
| 26 | #include <mach/mfp-pxa27x.h> | ||
| 27 | #include <mach/reset.h> | 26 | #include <mach/reset.h> |
| 28 | #include <mach/ohci.h> | 27 | #include <mach/ohci.h> |
| 29 | #include <mach/pm.h> | 28 | #include <mach/pm.h> |
| @@ -332,7 +331,7 @@ static int pxa27x_set_wake(unsigned int irq, unsigned int on) | |||
| 332 | void __init pxa27x_init_irq(void) | 331 | void __init pxa27x_init_irq(void) |
| 333 | { | 332 | { |
| 334 | pxa_init_irq(34, pxa27x_set_wake); | 333 | pxa_init_irq(34, pxa27x_set_wake); |
| 335 | pxa_init_gpio(121, pxa27x_set_wake); | 334 | pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake); |
| 336 | } | 335 | } |
| 337 | 336 | ||
| 338 | /* | 337 | /* |
| @@ -381,7 +380,7 @@ static int __init pxa27x_init(void) | |||
| 381 | 380 | ||
| 382 | clks_register(pxa27x_clkregs, ARRAY_SIZE(pxa27x_clkregs)); | 381 | clks_register(pxa27x_clkregs, ARRAY_SIZE(pxa27x_clkregs)); |
| 383 | 382 | ||
| 384 | if ((ret = pxa_init_dma(32))) | 383 | if ((ret = pxa_init_dma(IRQ_DMA, 32))) |
| 385 | return ret; | 384 | return ret; |
| 386 | 385 | ||
| 387 | pxa27x_init_pm(); | 386 | pxa27x_init_pm(); |
diff --git a/arch/arm/mach-pxa/pxa2xx.c b/arch/arm/mach-pxa/pxa2xx.c index 73d04d81c75a..2f3394f85917 100644 --- a/arch/arm/mach-pxa/pxa2xx.c +++ b/arch/arm/mach-pxa/pxa2xx.c | |||
| @@ -16,7 +16,6 @@ | |||
| 16 | 16 | ||
| 17 | #include <mach/hardware.h> | 17 | #include <mach/hardware.h> |
| 18 | #include <mach/pxa2xx-regs.h> | 18 | #include <mach/pxa2xx-regs.h> |
| 19 | #include <mach/mfp-pxa2xx.h> | ||
| 20 | #include <mach/mfp-pxa25x.h> | 19 | #include <mach/mfp-pxa25x.h> |
| 21 | #include <mach/reset.h> | 20 | #include <mach/reset.h> |
| 22 | #include <mach/irda.h> | 21 | #include <mach/irda.h> |
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c index 83fb609b6eb7..37bb12d13ca2 100644 --- a/arch/arm/mach-pxa/pxa300.c +++ b/arch/arm/mach-pxa/pxa300.c | |||
| @@ -17,9 +17,7 @@ | |||
| 17 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
| 18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
| 19 | 19 | ||
| 20 | #include <mach/hardware.h> | 20 | #include <mach/pxa300.h> |
| 21 | #include <mach/pxa3xx-regs.h> | ||
| 22 | #include <mach/mfp-pxa300.h> | ||
| 23 | 21 | ||
| 24 | #include "generic.h" | 22 | #include "generic.h" |
| 25 | #include "devices.h" | 23 | #include "devices.h" |
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c index 36f066196fa2..e708f4e0ecaf 100644 --- a/arch/arm/mach-pxa/pxa320.c +++ b/arch/arm/mach-pxa/pxa320.c | |||
| @@ -17,10 +17,7 @@ | |||
| 17 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
| 18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
| 19 | 19 | ||
| 20 | #include <mach/hardware.h> | 20 | #include <mach/pxa320.h> |
| 21 | #include <mach/mfp.h> | ||
| 22 | #include <mach/pxa3xx-regs.h> | ||
| 23 | #include <mach/mfp-pxa320.h> | ||
| 24 | 21 | ||
| 25 | #include "generic.h" | 22 | #include "generic.h" |
| 26 | #include "devices.h" | 23 | #include "devices.h" |
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 490893824e78..b02d4544dc95 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | #include <linux/sysdev.h> | 23 | #include <linux/sysdev.h> |
| 24 | 24 | ||
| 25 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
| 26 | #include <mach/gpio.h> | ||
| 26 | #include <mach/pxa3xx-regs.h> | 27 | #include <mach/pxa3xx-regs.h> |
| 27 | #include <mach/reset.h> | 28 | #include <mach/reset.h> |
| 28 | #include <mach/ohci.h> | 29 | #include <mach/ohci.h> |
| @@ -538,7 +539,7 @@ void __init pxa3xx_init_irq(void) | |||
| 538 | __asm__ __volatile__("mcr p15, 0, %0, c15, c1, 0\n": :"r"(value)); | 539 | __asm__ __volatile__("mcr p15, 0, %0, c15, c1, 0\n": :"r"(value)); |
| 539 | 540 | ||
| 540 | pxa_init_irq(56, pxa3xx_set_wake); | 541 | pxa_init_irq(56, pxa3xx_set_wake); |
| 541 | pxa_init_gpio(128, NULL); | 542 | pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL); |
| 542 | } | 543 | } |
| 543 | 544 | ||
| 544 | /* | 545 | /* |
| @@ -594,7 +595,7 @@ static int __init pxa3xx_init(void) | |||
| 594 | 595 | ||
| 595 | clks_register(pxa3xx_clkregs, ARRAY_SIZE(pxa3xx_clkregs)); | 596 | clks_register(pxa3xx_clkregs, ARRAY_SIZE(pxa3xx_clkregs)); |
| 596 | 597 | ||
| 597 | if ((ret = pxa_init_dma(32))) | 598 | if ((ret = pxa_init_dma(IRQ_DMA, 32))) |
| 598 | return ret; | 599 | return ret; |
| 599 | 600 | ||
| 600 | pxa3xx_init_pm(); | 601 | pxa3xx_init_pm(); |
diff --git a/arch/arm/mach-pxa/pxa930.c b/arch/arm/mach-pxa/pxa930.c index 13e6bfdfff60..f15dfa55f27f 100644 --- a/arch/arm/mach-pxa/pxa930.c +++ b/arch/arm/mach-pxa/pxa930.c | |||
| @@ -16,8 +16,7 @@ | |||
| 16 | #include <linux/irq.h> | 16 | #include <linux/irq.h> |
| 17 | #include <linux/dma-mapping.h> | 17 | #include <linux/dma-mapping.h> |
| 18 | 18 | ||
| 19 | #include <mach/hardware.h> | 19 | #include <mach/pxa930.h> |
| 20 | #include <mach/mfp-pxa930.h> | ||
| 21 | 20 | ||
| 22 | static struct pxa3xx_mfp_addr_map pxa930_mfp_addr_map[] __initdata = { | 21 | static struct pxa3xx_mfp_addr_map pxa930_mfp_addr_map[] __initdata = { |
| 23 | 22 | ||
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c index 00b2dc2a1074..867c95c09618 100644 --- a/arch/arm/mach-pxa/reset.c +++ b/arch/arm/mach-pxa/reset.c | |||
| @@ -10,7 +10,7 @@ | |||
| 10 | #include <linux/io.h> | 10 | #include <linux/io.h> |
| 11 | #include <asm/proc-fns.h> | 11 | #include <asm/proc-fns.h> |
| 12 | 12 | ||
| 13 | #include <mach/pxa-regs.h> | 13 | #include <mach/regs-ost.h> |
| 14 | #include <mach/reset.h> | 14 | #include <mach/reset.h> |
| 15 | 15 | ||
| 16 | unsigned int reset_status; | 16 | unsigned int reset_status; |
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index 5d02a7325586..ff8239991430 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c | |||
| @@ -25,11 +25,9 @@ | |||
| 25 | 25 | ||
| 26 | #include <asm/mach-types.h> | 26 | #include <asm/mach-types.h> |
| 27 | #include <asm/mach/arch.h> | 27 | #include <asm/mach/arch.h> |
| 28 | #include <mach/hardware.h> | 28 | |
| 29 | #include <mach/pxa3xx-regs.h> | 29 | #include <mach/pxa930.h> |
| 30 | #include <mach/mfp-pxa930.h> | ||
| 31 | #include <mach/i2c.h> | 30 | #include <mach/i2c.h> |
| 32 | #include <mach/regs-lcd.h> | ||
| 33 | #include <mach/pxafb.h> | 31 | #include <mach/pxafb.h> |
| 34 | 32 | ||
| 35 | #include "devices.h" | 33 | #include "devices.h" |
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index f0845c1b001c..16b4ec67e3b6 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c | |||
| @@ -25,7 +25,6 @@ | |||
| 25 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
| 26 | #include <asm/mach-types.h> | 26 | #include <asm/mach-types.h> |
| 27 | #include <mach/pm.h> | 27 | #include <mach/pm.h> |
| 28 | #include <mach/pxa-regs.h> | ||
| 29 | #include <mach/pxa2xx-gpio.h> | 28 | #include <mach/pxa2xx-gpio.h> |
| 30 | #include <mach/sharpsl.h> | 29 | #include <mach/sharpsl.h> |
| 31 | #include "sharpsl.h" | 30 | #include "sharpsl.h" |
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index a62c8375eb53..2ed95f369cfc 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S | |||
| @@ -15,7 +15,6 @@ | |||
| 15 | #include <asm/assembler.h> | 15 | #include <asm/assembler.h> |
| 16 | #include <mach/hardware.h> | 16 | #include <mach/hardware.h> |
| 17 | 17 | ||
| 18 | #include <mach/pxa-regs.h> | ||
| 19 | #include <mach/pxa2xx-regs.h> | 18 | #include <mach/pxa2xx-regs.h> |
| 20 | 19 | ||
| 21 | #define MDREFR_KDIV 0x200a4000 // all banks | 20 | #define MDREFR_KDIV 0x200a4000 // all banks |
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 6d447c9ce8ab..f697c492b2ab 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
| @@ -44,9 +44,7 @@ | |||
| 44 | #include <asm/mach/map.h> | 44 | #include <asm/mach/map.h> |
| 45 | #include <asm/mach/irq.h> | 45 | #include <asm/mach/irq.h> |
| 46 | 46 | ||
| 47 | #include <mach/pxa-regs.h> | 47 | #include <mach/pxa27x.h> |
| 48 | #include <mach/pxa2xx-regs.h> | ||
| 49 | #include <mach/mfp-pxa27x.h> | ||
| 50 | #include <mach/pxa27x-udc.h> | 48 | #include <mach/pxa27x-udc.h> |
| 51 | #include <mach/reset.h> | 49 | #include <mach/reset.h> |
| 52 | #include <mach/i2c.h> | 50 | #include <mach/i2c.h> |
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 072e77cfe5a3..2e4490562c9e 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c | |||
| @@ -24,7 +24,6 @@ | |||
| 24 | 24 | ||
| 25 | #include <mach/sharpsl.h> | 25 | #include <mach/sharpsl.h> |
| 26 | #include <mach/spitz.h> | 26 | #include <mach/spitz.h> |
| 27 | #include <mach/pxa-regs.h> | ||
| 28 | #include <mach/pxa2xx-regs.h> | 27 | #include <mach/pxa2xx-regs.h> |
| 29 | #include <mach/pxa2xx-gpio.h> | 28 | #include <mach/pxa2xx-gpio.h> |
| 30 | #include "sharpsl.h" | 29 | #include "sharpsl.h" |
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 6f42004db3ed..965e38c6bafe 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c | |||
| @@ -33,7 +33,6 @@ | |||
| 33 | #include <asm/irq.h> | 33 | #include <asm/irq.h> |
| 34 | #include <mach/hardware.h> | 34 | #include <mach/hardware.h> |
| 35 | #include <mach/ssp.h> | 35 | #include <mach/ssp.h> |
| 36 | #include <mach/pxa-regs.h> | ||
| 37 | #include <mach/regs-ssp.h> | 36 | #include <mach/regs-ssp.h> |
| 38 | 37 | ||
| 39 | #define TIMEOUT 100000 | 38 | #define TIMEOUT 100000 |
diff --git a/arch/arm/mach-pxa/standby.S b/arch/arm/mach-pxa/standby.S index f3821cfda72f..29f5f5c180b7 100644 --- a/arch/arm/mach-pxa/standby.S +++ b/arch/arm/mach-pxa/standby.S | |||
| @@ -13,7 +13,6 @@ | |||
| 13 | #include <asm/assembler.h> | 13 | #include <asm/assembler.h> |
| 14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
| 15 | 15 | ||
| 16 | #include <mach/pxa-regs.h> | ||
| 17 | #include <mach/pxa2xx-regs.h> | 16 | #include <mach/pxa2xx-regs.h> |
| 18 | 17 | ||
| 19 | .text | 18 | .text |
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c index 58ef08a5224b..b75353a2ec75 100644 --- a/arch/arm/mach-pxa/tavorevb.c +++ b/arch/arm/mach-pxa/tavorevb.c | |||
| @@ -22,9 +22,8 @@ | |||
| 22 | 22 | ||
| 23 | #include <asm/mach-types.h> | 23 | #include <asm/mach-types.h> |
| 24 | #include <asm/mach/arch.h> | 24 | #include <asm/mach/arch.h> |
| 25 | #include <mach/hardware.h> | 25 | |
| 26 | #include <mach/pxa3xx-regs.h> | 26 | #include <mach/pxa930.h> |
| 27 | #include <mach/mfp-pxa930.h> | ||
| 28 | #include <mach/pxafb.h> | 27 | #include <mach/pxafb.h> |
| 29 | #include <mach/pxa27x_keypad.h> | 28 | #include <mach/pxa27x_keypad.h> |
| 30 | 29 | ||
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index 95656a72268d..8eb3830fbb0b 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
| @@ -22,8 +22,7 @@ | |||
| 22 | #include <asm/div64.h> | 22 | #include <asm/div64.h> |
| 23 | #include <asm/mach/irq.h> | 23 | #include <asm/mach/irq.h> |
| 24 | #include <asm/mach/time.h> | 24 | #include <asm/mach/time.h> |
| 25 | #include <mach/hardware.h> | 25 | #include <mach/regs-ost.h> |
| 26 | #include <mach/pxa-regs.h> | ||
| 27 | 26 | ||
| 28 | /* | 27 | /* |
| 29 | * This is PXA's sched_clock implementation. This has a resolution | 28 | * This is PXA's sched_clock implementation. This has a resolution |
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 3332e5d0356c..66b13802c99d 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c | |||
| @@ -36,8 +36,8 @@ | |||
| 36 | 36 | ||
| 37 | #include <asm/setup.h> | 37 | #include <asm/setup.h> |
| 38 | #include <asm/mach-types.h> | 38 | #include <asm/mach-types.h> |
| 39 | #include <mach/pxa2xx-regs.h> | 39 | |
| 40 | #include <mach/mfp-pxa25x.h> | 40 | #include <mach/pxa25x.h> |
| 41 | #include <mach/reset.h> | 41 | #include <mach/reset.h> |
| 42 | #include <mach/irda.h> | 42 | #include <mach/irda.h> |
| 43 | #include <mach/i2c.h> | 43 | #include <mach/i2c.h> |
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index a72e3add743c..f79c9cb70ae4 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c | |||
| @@ -39,10 +39,7 @@ | |||
| 39 | #include <asm/mach/irq.h> | 39 | #include <asm/mach/irq.h> |
| 40 | #include <asm/mach/flash.h> | 40 | #include <asm/mach/flash.h> |
| 41 | 41 | ||
| 42 | #include <mach/hardware.h> | 42 | #include <mach/pxa27x.h> |
| 43 | #include <mach/pxa-regs.h> | ||
| 44 | #include <mach/pxa2xx-regs.h> | ||
| 45 | #include <mach/mfp-pxa27x.h> | ||
| 46 | #include <mach/pxa2xx_spi.h> | 43 | #include <mach/pxa2xx_spi.h> |
| 47 | #include <mach/trizeps4.h> | 44 | #include <mach/trizeps4.h> |
| 48 | #include <mach/audio.h> | 45 | #include <mach/audio.h> |
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index 4b3120dbc049..0e65344e9f53 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c | |||
| @@ -42,12 +42,9 @@ | |||
| 42 | #include <linux/mtd/partitions.h> | 42 | #include <linux/mtd/partitions.h> |
| 43 | #include <linux/mtd/physmap.h> | 43 | #include <linux/mtd/physmap.h> |
| 44 | 44 | ||
| 45 | #include <mach/pxa-regs.h> | 45 | #include <mach/pxa25x.h> |
| 46 | #include <mach/pxa2xx-regs.h> | ||
| 47 | #include <mach/bitfield.h> | ||
| 48 | #include <mach/audio.h> | 46 | #include <mach/audio.h> |
| 49 | #include <mach/pxafb.h> | 47 | #include <mach/pxafb.h> |
| 50 | #include <mach/mfp-pxa25x.h> | ||
| 51 | #include <mach/i2c.h> | 48 | #include <mach/i2c.h> |
| 52 | #include <mach/viper.h> | 49 | #include <mach/viper.h> |
| 53 | 50 | ||
| @@ -956,7 +953,7 @@ static struct map_desc viper_io_desc[] __initdata = { | |||
| 956 | }, | 953 | }, |
| 957 | { | 954 | { |
| 958 | .virtual = VIPER_PC104IO_BASE, | 955 | .virtual = VIPER_PC104IO_BASE, |
| 959 | .pfn = __phys_to_pfn(_PCMCIA1IO), | 956 | .pfn = __phys_to_pfn(0x30000000), |
| 960 | .length = 0x00800000, | 957 | .length = 0x00800000, |
| 961 | .type = MT_DEVICE, | 958 | .type = MT_DEVICE, |
| 962 | }, | 959 | }, |
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index 46538885a58a..c1f73205d078 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c | |||
| @@ -18,9 +18,9 @@ | |||
| 18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
| 19 | #include <linux/i2c.h> | 19 | #include <linux/i2c.h> |
| 20 | #include <linux/i2c/pca953x.h> | 20 | #include <linux/i2c/pca953x.h> |
| 21 | #include <linux/gpio.h> | ||
| 21 | 22 | ||
| 22 | #include <asm/gpio.h> | 23 | #include <mach/pxa300.h> |
| 23 | #include <mach/mfp-pxa300.h> | ||
| 24 | #include <mach/i2c.h> | 24 | #include <mach/i2c.h> |
| 25 | #include <mach/zylonite.h> | 25 | #include <mach/zylonite.h> |
| 26 | 26 | ||
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c index 28e4e623780b..4e1c488c6906 100644 --- a/arch/arm/mach-pxa/zylonite_pxa320.c +++ b/arch/arm/mach-pxa/zylonite_pxa320.c | |||
| @@ -18,7 +18,7 @@ | |||
| 18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
| 19 | #include <linux/gpio.h> | 19 | #include <linux/gpio.h> |
| 20 | 20 | ||
| 21 | #include <mach/mfp-pxa320.h> | 21 | #include <mach/pxa320.h> |
| 22 | #include <mach/zylonite.h> | 22 | #include <mach/zylonite.h> |
| 23 | 23 | ||
| 24 | #include "generic.h" | 24 | #include "generic.h" |
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig index ad911854eb4c..b6ec10627776 100644 --- a/arch/arm/mach-realview/Kconfig +++ b/arch/arm/mach-realview/Kconfig | |||
| @@ -35,6 +35,7 @@ config MACH_REALVIEW_PB11MP | |||
| 35 | bool "Support RealView/PB11MPCore platform" | 35 | bool "Support RealView/PB11MPCore platform" |
| 36 | select CPU_V6 | 36 | select CPU_V6 |
| 37 | select ARM_GIC | 37 | select ARM_GIC |
| 38 | select HAVE_PATA_PLATFORM | ||
| 38 | help | 39 | help |
| 39 | Include support for the ARM(R) RealView MPCore Platform Baseboard. | 40 | Include support for the ARM(R) RealView MPCore Platform Baseboard. |
| 40 | PB11MPCore is a platform with an on-board ARM11MPCore and has | 41 | PB11MPCore is a platform with an on-board ARM11MPCore and has |
| @@ -51,6 +52,7 @@ config MACH_REALVIEW_PBA8 | |||
| 51 | bool "Support RealView/PB-A8 platform" | 52 | bool "Support RealView/PB-A8 platform" |
| 52 | select CPU_V7 | 53 | select CPU_V7 |
| 53 | select ARM_GIC | 54 | select ARM_GIC |
| 55 | select HAVE_PATA_PLATFORM | ||
| 54 | help | 56 | help |
| 55 | Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard. | 57 | Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard. |
| 56 | PB-A8 is a platform with an on-board Cortex-A8 and has support for | 58 | PB-A8 is a platform with an on-board Cortex-A8 and has support for |
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index bd2aa4f16141..d6766685cfc7 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | #include <linux/clockchips.h> | 29 | #include <linux/clockchips.h> |
| 30 | #include <linux/io.h> | 30 | #include <linux/io.h> |
| 31 | #include <linux/smc911x.h> | 31 | #include <linux/smc911x.h> |
| 32 | #include <linux/ata_platform.h> | ||
| 32 | 33 | ||
| 33 | #include <asm/clkdev.h> | 34 | #include <asm/clkdev.h> |
| 34 | #include <asm/system.h> | 35 | #include <asm/system.h> |
| @@ -150,6 +151,44 @@ int realview_eth_register(const char *name, struct resource *res) | |||
| 150 | return platform_device_register(&realview_eth_device); | 151 | return platform_device_register(&realview_eth_device); |
| 151 | } | 152 | } |
| 152 | 153 | ||
| 154 | struct platform_device realview_usb_device = { | ||
| 155 | .name = "isp1760", | ||
| 156 | .num_resources = 2, | ||
| 157 | }; | ||
| 158 | |||
| 159 | int realview_usb_register(struct resource *res) | ||
| 160 | { | ||
| 161 | realview_usb_device.resource = res; | ||
| 162 | return platform_device_register(&realview_usb_device); | ||
| 163 | } | ||
| 164 | |||
| 165 | static struct pata_platform_info pata_platform_data = { | ||
| 166 | .ioport_shift = 1, | ||
| 167 | }; | ||
| 168 | |||
| 169 | static struct resource pata_resources[] = { | ||
| 170 | [0] = { | ||
| 171 | .start = REALVIEW_CF_BASE, | ||
| 172 | .end = REALVIEW_CF_BASE + 0xff, | ||
| 173 | .flags = IORESOURCE_MEM, | ||
| 174 | }, | ||
| 175 | [1] = { | ||
| 176 | .start = REALVIEW_CF_BASE + 0x100, | ||
| 177 | .end = REALVIEW_CF_BASE + SZ_4K - 1, | ||
| 178 | .flags = IORESOURCE_MEM, | ||
| 179 | }, | ||
| 180 | }; | ||
| 181 | |||
| 182 | struct platform_device realview_cf_device = { | ||
| 183 | .name = "pata_platform", | ||
| 184 | .id = -1, | ||
| 185 | .num_resources = ARRAY_SIZE(pata_resources), | ||
| 186 | .resource = pata_resources, | ||
| 187 | .dev = { | ||
| 188 | .platform_data = &pata_platform_data, | ||
| 189 | }, | ||
| 190 | }; | ||
| 191 | |||
| 153 | static struct resource realview_i2c_resource = { | 192 | static struct resource realview_i2c_resource = { |
| 154 | .start = REALVIEW_I2C_BASE, | 193 | .start = REALVIEW_I2C_BASE, |
| 155 | .end = REALVIEW_I2C_BASE + SZ_4K - 1, | 194 | .end = REALVIEW_I2C_BASE + SZ_4K - 1, |
| @@ -158,11 +197,25 @@ static struct resource realview_i2c_resource = { | |||
| 158 | 197 | ||
| 159 | struct platform_device realview_i2c_device = { | 198 | struct platform_device realview_i2c_device = { |
| 160 | .name = "versatile-i2c", | 199 | .name = "versatile-i2c", |
| 161 | .id = -1, | 200 | .id = 0, |
| 162 | .num_resources = 1, | 201 | .num_resources = 1, |
| 163 | .resource = &realview_i2c_resource, | 202 | .resource = &realview_i2c_resource, |
| 164 | }; | 203 | }; |
| 165 | 204 | ||
| 205 | static struct i2c_board_info realview_i2c_board_info[] = { | ||
| 206 | { | ||
| 207 | I2C_BOARD_INFO("rtc-ds1307", 0xd0 >> 1), | ||
| 208 | .type = "ds1338", | ||
| 209 | }, | ||
| 210 | }; | ||
| 211 | |||
| 212 | static int __init realview_i2c_init(void) | ||
| 213 | { | ||
| 214 | return i2c_register_board_info(0, realview_i2c_board_info, | ||
| 215 | ARRAY_SIZE(realview_i2c_board_info)); | ||
| 216 | } | ||
| 217 | arch_initcall(realview_i2c_init); | ||
| 218 | |||
| 166 | #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET) | 219 | #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET) |
| 167 | 220 | ||
| 168 | static unsigned int realview_mmc_status(struct device *dev) | 221 | static unsigned int realview_mmc_status(struct device *dev) |
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h index 44269b162d49..21c08637683b 100644 --- a/arch/arm/mach-realview/core.h +++ b/arch/arm/mach-realview/core.h | |||
| @@ -45,6 +45,7 @@ static struct amba_device name##_device = { \ | |||
| 45 | } | 45 | } |
| 46 | 46 | ||
| 47 | extern struct platform_device realview_flash_device; | 47 | extern struct platform_device realview_flash_device; |
| 48 | extern struct platform_device realview_cf_device; | ||
| 48 | extern struct platform_device realview_i2c_device; | 49 | extern struct platform_device realview_i2c_device; |
| 49 | extern struct mmc_platform_data realview_mmc0_plat_data; | 50 | extern struct mmc_platform_data realview_mmc0_plat_data; |
| 50 | extern struct mmc_platform_data realview_mmc1_plat_data; | 51 | extern struct mmc_platform_data realview_mmc1_plat_data; |
| @@ -62,5 +63,6 @@ extern void realview_leds_event(led_event_t ledevt); | |||
| 62 | extern void realview_timer_init(unsigned int timer_irq); | 63 | extern void realview_timer_init(unsigned int timer_irq); |
| 63 | extern int realview_flash_register(struct resource *res, u32 num); | 64 | extern int realview_flash_register(struct resource *res, u32 num); |
| 64 | extern int realview_eth_register(const char *name, struct resource *res); | 65 | extern int realview_eth_register(const char *name, struct resource *res); |
| 66 | extern int realview_usb_register(struct resource *res); | ||
| 65 | 67 | ||
| 66 | #endif | 68 | #endif |
diff --git a/arch/arm/mach-realview/include/mach/board-pba8.h b/arch/arm/mach-realview/include/mach/board-pba8.h index c8bed8f58bab..307f97b16e5b 100644 --- a/arch/arm/mach-realview/include/mach/board-pba8.h +++ b/arch/arm/mach-realview/include/mach/board-pba8.h | |||
| @@ -45,8 +45,6 @@ | |||
| 45 | #define REALVIEW_PBA8_DMC_BASE 0x100E0000 /* DMC configuration */ | 45 | #define REALVIEW_PBA8_DMC_BASE 0x100E0000 /* DMC configuration */ |
| 46 | #define REALVIEW_PBA8_SMC_BASE 0x100E1000 /* SMC configuration */ | 46 | #define REALVIEW_PBA8_SMC_BASE 0x100E1000 /* SMC configuration */ |
| 47 | #define REALVIEW_PBA8_CAN_BASE 0x100E2000 /* CAN bus */ | 47 | #define REALVIEW_PBA8_CAN_BASE 0x100E2000 /* CAN bus */ |
| 48 | #define REALVIEW_PBA8_CF_BASE 0x18000000 /* Compact flash */ | ||
| 49 | #define REALVIEW_PBA8_CF_MEM_BASE 0x18003000 /* SMC for Compact flash */ | ||
| 50 | #define REALVIEW_PBA8_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */ | 48 | #define REALVIEW_PBA8_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */ |
| 51 | #define REALVIEW_PBA8_FLASH0_BASE 0x40000000 | 49 | #define REALVIEW_PBA8_FLASH0_BASE 0x40000000 |
| 52 | #define REALVIEW_PBA8_FLASH0_SIZE SZ_64M | 50 | #define REALVIEW_PBA8_FLASH0_SIZE SZ_64M |
diff --git a/arch/arm/mach-realview/include/mach/platform.h b/arch/arm/mach-realview/include/mach/platform.h index 793a3a332712..c8f50835fed2 100644 --- a/arch/arm/mach-realview/include/mach/platform.h +++ b/arch/arm/mach-realview/include/mach/platform.h | |||
| @@ -204,6 +204,12 @@ | |||
| 204 | #define REALVIEW_LT_BASE 0x80000000 /* Logic Tile expansion */ | 204 | #define REALVIEW_LT_BASE 0x80000000 /* Logic Tile expansion */ |
| 205 | 205 | ||
| 206 | /* | 206 | /* |
| 207 | * CompactFlash | ||
| 208 | */ | ||
| 209 | #define REALVIEW_CF_BASE 0x18000000 /* CompactFlash */ | ||
| 210 | #define REALVIEW_CF_MEM_BASE 0x18003000 /* SMC for CompactFlash */ | ||
| 211 | |||
| 212 | /* | ||
| 207 | * Disk on Chip | 213 | * Disk on Chip |
| 208 | */ | 214 | */ |
| 209 | #define REALVIEW_DOC_BASE 0x2C000000 | 215 | #define REALVIEW_DOC_BASE 0x2C000000 |
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index bed39ed97613..c20fbef122b3 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c | |||
| @@ -264,6 +264,19 @@ static int eth_device_register(void) | |||
| 264 | return realview_eth_register(name, realview_eb_eth_resources); | 264 | return realview_eth_register(name, realview_eb_eth_resources); |
| 265 | } | 265 | } |
| 266 | 266 | ||
| 267 | static struct resource realview_eb_isp1761_resources[] = { | ||
| 268 | [0] = { | ||
| 269 | .start = REALVIEW_EB_USB_BASE, | ||
| 270 | .end = REALVIEW_EB_USB_BASE + SZ_128K - 1, | ||
| 271 | .flags = IORESOURCE_MEM, | ||
| 272 | }, | ||
| 273 | [1] = { | ||
| 274 | .start = IRQ_EB_USB, | ||
| 275 | .end = IRQ_EB_USB, | ||
| 276 | .flags = IORESOURCE_IRQ, | ||
| 277 | }, | ||
| 278 | }; | ||
| 279 | |||
| 267 | static void __init gic_init_irq(void) | 280 | static void __init gic_init_irq(void) |
| 268 | { | 281 | { |
| 269 | if (core_tile_eb11mp() || core_tile_a9mp()) { | 282 | if (core_tile_eb11mp() || core_tile_a9mp()) { |
| @@ -323,6 +336,8 @@ static void realview_eb11mp_fixup(void) | |||
| 323 | /* platform devices */ | 336 | /* platform devices */ |
| 324 | realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH; | 337 | realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH; |
| 325 | realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH; | 338 | realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH; |
| 339 | realview_eb_isp1761_resources[1].start = IRQ_EB11MP_USB; | ||
| 340 | realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB; | ||
| 326 | } | 341 | } |
| 327 | 342 | ||
| 328 | static void __init realview_eb_timer_init(void) | 343 | static void __init realview_eb_timer_init(void) |
| @@ -366,6 +381,7 @@ static void __init realview_eb_init(void) | |||
| 366 | realview_flash_register(&realview_eb_flash_resource, 1); | 381 | realview_flash_register(&realview_eb_flash_resource, 1); |
| 367 | platform_device_register(&realview_i2c_device); | 382 | platform_device_register(&realview_i2c_device); |
| 368 | eth_device_register(); | 383 | eth_device_register(); |
| 384 | realview_usb_register(realview_eb_isp1761_resources); | ||
| 369 | 385 | ||
| 370 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { | 386 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
| 371 | struct amba_device *d = amba_devs[i]; | 387 | struct amba_device *d = amba_devs[i]; |
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index 8f0683c22140..a64b84a7a3df 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c | |||
| @@ -222,6 +222,19 @@ static struct resource realview_pb1176_smsc911x_resources[] = { | |||
| 222 | }, | 222 | }, |
| 223 | }; | 223 | }; |
| 224 | 224 | ||
| 225 | static struct resource realview_pb1176_isp1761_resources[] = { | ||
| 226 | [0] = { | ||
| 227 | .start = REALVIEW_PB1176_USB_BASE, | ||
| 228 | .end = REALVIEW_PB1176_USB_BASE + SZ_128K - 1, | ||
| 229 | .flags = IORESOURCE_MEM, | ||
| 230 | }, | ||
| 231 | [1] = { | ||
| 232 | .start = IRQ_PB1176_USB, | ||
| 233 | .end = IRQ_PB1176_USB, | ||
| 234 | .flags = IORESOURCE_IRQ, | ||
| 235 | }, | ||
| 236 | }; | ||
| 237 | |||
| 225 | static void __init gic_init_irq(void) | 238 | static void __init gic_init_irq(void) |
| 226 | { | 239 | { |
| 227 | /* ARM1176 DevChip GIC, primary */ | 240 | /* ARM1176 DevChip GIC, primary */ |
| @@ -260,6 +273,8 @@ static void __init realview_pb1176_init(void) | |||
| 260 | 273 | ||
| 261 | realview_flash_register(&realview_pb1176_flash_resource, 1); | 274 | realview_flash_register(&realview_pb1176_flash_resource, 1); |
| 262 | realview_eth_register(NULL, realview_pb1176_smsc911x_resources); | 275 | realview_eth_register(NULL, realview_pb1176_smsc911x_resources); |
| 276 | platform_device_register(&realview_i2c_device); | ||
| 277 | realview_usb_register(realview_pb1176_isp1761_resources); | ||
| 263 | 278 | ||
| 264 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { | 279 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
| 265 | struct amba_device *d = amba_devs[i]; | 280 | struct amba_device *d = amba_devs[i]; |
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 3ebdb2dadd6f..ea1e60eca359 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c | |||
| @@ -230,31 +230,19 @@ static struct resource realview_pb11mp_smsc911x_resources[] = { | |||
| 230 | }, | 230 | }, |
| 231 | }; | 231 | }; |
| 232 | 232 | ||
| 233 | struct resource realview_pb11mp_cf_resources[] = { | 233 | static struct resource realview_pb11mp_isp1761_resources[] = { |
| 234 | [0] = { | 234 | [0] = { |
| 235 | .start = REALVIEW_PB11MP_CF_BASE, | 235 | .start = REALVIEW_PB11MP_USB_BASE, |
| 236 | .end = REALVIEW_PB11MP_CF_BASE + SZ_4K - 1, | 236 | .end = REALVIEW_PB11MP_USB_BASE + SZ_128K - 1, |
| 237 | .flags = IORESOURCE_MEM, | 237 | .flags = IORESOURCE_MEM, |
| 238 | }, | 238 | }, |
| 239 | [1] = { | 239 | [1] = { |
| 240 | .start = REALVIEW_PB11MP_CF_MEM_BASE, | 240 | .start = IRQ_TC11MP_USB, |
| 241 | .end = REALVIEW_PB11MP_CF_MEM_BASE + SZ_4K - 1, | 241 | .end = IRQ_TC11MP_USB, |
| 242 | .flags = IORESOURCE_MEM, | ||
| 243 | }, | ||
| 244 | [2] = { | ||
| 245 | .start = -1, /* FIXME: Find correct irq */ | ||
| 246 | .end = -1, | ||
| 247 | .flags = IORESOURCE_IRQ, | 242 | .flags = IORESOURCE_IRQ, |
| 248 | }, | 243 | }, |
| 249 | }; | 244 | }; |
| 250 | 245 | ||
| 251 | struct platform_device realview_pb11mp_cf_device = { | ||
| 252 | .name = "compactflash", | ||
| 253 | .id = 0, | ||
| 254 | .num_resources = ARRAY_SIZE(realview_pb11mp_cf_resources), | ||
| 255 | .resource = realview_pb11mp_cf_resources, | ||
| 256 | }; | ||
| 257 | |||
| 258 | static void __init gic_init_irq(void) | 246 | static void __init gic_init_irq(void) |
| 259 | { | 247 | { |
| 260 | unsigned int pldctrl; | 248 | unsigned int pldctrl; |
| @@ -308,7 +296,8 @@ static void __init realview_pb11mp_init(void) | |||
| 308 | ARRAY_SIZE(realview_pb11mp_flash_resource)); | 296 | ARRAY_SIZE(realview_pb11mp_flash_resource)); |
| 309 | realview_eth_register(NULL, realview_pb11mp_smsc911x_resources); | 297 | realview_eth_register(NULL, realview_pb11mp_smsc911x_resources); |
| 310 | platform_device_register(&realview_i2c_device); | 298 | platform_device_register(&realview_i2c_device); |
| 311 | platform_device_register(&realview_pb11mp_cf_device); | 299 | platform_device_register(&realview_cf_device); |
| 300 | realview_usb_register(realview_pb11mp_isp1761_resources); | ||
| 312 | 301 | ||
| 313 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { | 302 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
| 314 | struct amba_device *d = amba_devs[i]; | 303 | struct amba_device *d = amba_devs[i]; |
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index 34c94435d2d8..d6ac1eb86576 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c | |||
| @@ -221,31 +221,19 @@ static struct resource realview_pba8_smsc911x_resources[] = { | |||
| 221 | }, | 221 | }, |
| 222 | }; | 222 | }; |
| 223 | 223 | ||
| 224 | struct resource realview_pba8_cf_resources[] = { | 224 | static struct resource realview_pba8_isp1761_resources[] = { |
| 225 | [0] = { | 225 | [0] = { |
| 226 | .start = REALVIEW_PBA8_CF_BASE, | 226 | .start = REALVIEW_PBA8_USB_BASE, |
| 227 | .end = REALVIEW_PBA8_CF_BASE + SZ_4K - 1, | 227 | .end = REALVIEW_PBA8_USB_BASE + SZ_128K - 1, |
| 228 | .flags = IORESOURCE_MEM, | 228 | .flags = IORESOURCE_MEM, |
| 229 | }, | 229 | }, |
| 230 | [1] = { | 230 | [1] = { |
| 231 | .start = REALVIEW_PBA8_CF_MEM_BASE, | 231 | .start = IRQ_PBA8_USB, |
| 232 | .end = REALVIEW_PBA8_CF_MEM_BASE + SZ_4K - 1, | 232 | .end = IRQ_PBA8_USB, |
| 233 | .flags = IORESOURCE_MEM, | ||
| 234 | }, | ||
| 235 | [2] = { | ||
| 236 | .start = -1, /* FIXME: Find correct irq */ | ||
| 237 | .end = -1, | ||
| 238 | .flags = IORESOURCE_IRQ, | 233 | .flags = IORESOURCE_IRQ, |
| 239 | }, | 234 | }, |
| 240 | }; | 235 | }; |
| 241 | 236 | ||
| 242 | struct platform_device realview_pba8_cf_device = { | ||
| 243 | .name = "compactflash", | ||
| 244 | .id = 0, | ||
| 245 | .num_resources = ARRAY_SIZE(realview_pba8_cf_resources), | ||
| 246 | .resource = realview_pba8_cf_resources, | ||
| 247 | }; | ||
| 248 | |||
| 249 | static void __init gic_init_irq(void) | 237 | static void __init gic_init_irq(void) |
| 250 | { | 238 | { |
| 251 | /* ARM PB-A8 on-board GIC */ | 239 | /* ARM PB-A8 on-board GIC */ |
| @@ -276,7 +264,8 @@ static void __init realview_pba8_init(void) | |||
| 276 | ARRAY_SIZE(realview_pba8_flash_resource)); | 264 | ARRAY_SIZE(realview_pba8_flash_resource)); |
| 277 | realview_eth_register(NULL, realview_pba8_smsc911x_resources); | 265 | realview_eth_register(NULL, realview_pba8_smsc911x_resources); |
| 278 | platform_device_register(&realview_i2c_device); | 266 | platform_device_register(&realview_i2c_device); |
| 279 | platform_device_register(&realview_pba8_cf_device); | 267 | platform_device_register(&realview_cf_device); |
| 268 | realview_usb_register(realview_pba8_isp1761_resources); | ||
| 280 | 269 | ||
| 281 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { | 270 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
| 282 | struct amba_device *d = amba_devs[i]; | 271 | struct amba_device *d = amba_devs[i]; |
diff --git a/arch/arm/mach-rpc/dma.c b/arch/arm/mach-rpc/dma.c index 7958a30f8932..c47d974d52bd 100644 --- a/arch/arm/mach-rpc/dma.c +++ b/arch/arm/mach-rpc/dma.c | |||
| @@ -26,6 +26,16 @@ | |||
| 26 | #include <asm/mach/dma.h> | 26 | #include <asm/mach/dma.h> |
| 27 | #include <asm/hardware/iomd.h> | 27 | #include <asm/hardware/iomd.h> |
| 28 | 28 | ||
| 29 | struct iomd_dma { | ||
| 30 | struct dma_struct dma; | ||
| 31 | unsigned int state; | ||
| 32 | unsigned long base; /* Controller base address */ | ||
| 33 | int irq; /* Controller IRQ */ | ||
| 34 | struct scatterlist cur_sg; /* Current controller buffer */ | ||
| 35 | dma_addr_t dma_addr; | ||
| 36 | unsigned int dma_len; | ||
| 37 | }; | ||
| 38 | |||
| 29 | #if 0 | 39 | #if 0 |
| 30 | typedef enum { | 40 | typedef enum { |
| 31 | dma_size_8 = 1, | 41 | dma_size_8 = 1, |
| @@ -44,15 +54,15 @@ typedef enum { | |||
| 44 | #define CR (IOMD_IO0CR - IOMD_IO0CURA) | 54 | #define CR (IOMD_IO0CR - IOMD_IO0CURA) |
| 45 | #define ST (IOMD_IO0ST - IOMD_IO0CURA) | 55 | #define ST (IOMD_IO0ST - IOMD_IO0CURA) |
| 46 | 56 | ||
| 47 | static void iomd_get_next_sg(struct scatterlist *sg, dma_t *dma) | 57 | static void iomd_get_next_sg(struct scatterlist *sg, struct iomd_dma *idma) |
| 48 | { | 58 | { |
| 49 | unsigned long end, offset, flags = 0; | 59 | unsigned long end, offset, flags = 0; |
| 50 | 60 | ||
| 51 | if (dma->sg) { | 61 | if (idma->dma.sg) { |
| 52 | sg->dma_address = dma->sg->dma_address; | 62 | sg->dma_address = idma->dma_addr; |
| 53 | offset = sg->dma_address & ~PAGE_MASK; | 63 | offset = sg->dma_address & ~PAGE_MASK; |
| 54 | 64 | ||
| 55 | end = offset + dma->sg->length; | 65 | end = offset + idma->dma_len; |
| 56 | 66 | ||
| 57 | if (end > PAGE_SIZE) | 67 | if (end > PAGE_SIZE) |
| 58 | end = PAGE_SIZE; | 68 | end = PAGE_SIZE; |
| @@ -62,15 +72,17 @@ static void iomd_get_next_sg(struct scatterlist *sg, dma_t *dma) | |||
| 62 | 72 | ||
| 63 | sg->length = end - TRANSFER_SIZE; | 73 | sg->length = end - TRANSFER_SIZE; |
| 64 | 74 | ||
| 65 | dma->sg->length -= end - offset; | 75 | idma->dma_len -= end - offset; |
| 66 | dma->sg->dma_address += end - offset; | 76 | idma->dma_addr += end - offset; |
| 67 | 77 | ||
| 68 | if (dma->sg->length == 0) { | 78 | if (idma->dma_len == 0) { |
| 69 | if (dma->sgcount > 1) { | 79 | if (idma->dma.sgcount > 1) { |
| 70 | dma->sg++; | 80 | idma->dma.sg = sg_next(idma->dma.sg); |
| 71 | dma->sgcount--; | 81 | idma->dma_addr = idma->dma.sg->dma_address; |
| 82 | idma->dma_len = idma->dma.sg->length; | ||
| 83 | idma->dma.sgcount--; | ||
| 72 | } else { | 84 | } else { |
| 73 | dma->sg = NULL; | 85 | idma->dma.sg = NULL; |
| 74 | flags |= DMA_END_S; | 86 | flags |= DMA_END_S; |
| 75 | } | 87 | } |
| 76 | } | 88 | } |
| @@ -85,8 +97,8 @@ static void iomd_get_next_sg(struct scatterlist *sg, dma_t *dma) | |||
| 85 | 97 | ||
| 86 | static irqreturn_t iomd_dma_handle(int irq, void *dev_id) | 98 | static irqreturn_t iomd_dma_handle(int irq, void *dev_id) |
| 87 | { | 99 | { |
| 88 | dma_t *dma = (dma_t *)dev_id; | 100 | struct iomd_dma *idma = dev_id; |
| 89 | unsigned long base = dma->dma_base; | 101 | unsigned long base = idma->base; |
| 90 | 102 | ||
| 91 | do { | 103 | do { |
| 92 | unsigned int status; | 104 | unsigned int status; |
| @@ -95,93 +107,99 @@ static irqreturn_t iomd_dma_handle(int irq, void *dev_id) | |||
| 95 | if (!(status & DMA_ST_INT)) | 107 | if (!(status & DMA_ST_INT)) |
| 96 | return IRQ_HANDLED; | 108 | return IRQ_HANDLED; |
| 97 | 109 | ||
| 98 | if ((dma->state ^ status) & DMA_ST_AB) | 110 | if ((idma->state ^ status) & DMA_ST_AB) |
| 99 | iomd_get_next_sg(&dma->cur_sg, dma); | 111 | iomd_get_next_sg(&idma->cur_sg, idma); |
| 100 | 112 | ||
| 101 | switch (status & (DMA_ST_OFL | DMA_ST_AB)) { | 113 | switch (status & (DMA_ST_OFL | DMA_ST_AB)) { |
| 102 | case DMA_ST_OFL: /* OIA */ | 114 | case DMA_ST_OFL: /* OIA */ |
| 103 | case DMA_ST_AB: /* .IB */ | 115 | case DMA_ST_AB: /* .IB */ |
| 104 | iomd_writel(dma->cur_sg.dma_address, base + CURA); | 116 | iomd_writel(idma->cur_sg.dma_address, base + CURA); |
| 105 | iomd_writel(dma->cur_sg.length, base + ENDA); | 117 | iomd_writel(idma->cur_sg.length, base + ENDA); |
| 106 | dma->state = DMA_ST_AB; | 118 | idma->state = DMA_ST_AB; |
| 107 | break; | 119 | break; |
| 108 | 120 | ||
| 109 | case DMA_ST_OFL | DMA_ST_AB: /* OIB */ | 121 | case DMA_ST_OFL | DMA_ST_AB: /* OIB */ |
| 110 | case 0: /* .IA */ | 122 | case 0: /* .IA */ |
| 111 | iomd_writel(dma->cur_sg.dma_address, base + CURB); | 123 | iomd_writel(idma->cur_sg.dma_address, base + CURB); |
| 112 | iomd_writel(dma->cur_sg.length, base + ENDB); | 124 | iomd_writel(idma->cur_sg.length, base + ENDB); |
| 113 | dma->state = 0; | 125 | idma->state = 0; |
| 114 | break; | 126 | break; |
| 115 | } | 127 | } |
| 116 | 128 | ||
| 117 | if (status & DMA_ST_OFL && | 129 | if (status & DMA_ST_OFL && |
| 118 | dma->cur_sg.length == (DMA_END_S|DMA_END_L)) | 130 | idma->cur_sg.length == (DMA_END_S|DMA_END_L)) |
| 119 | break; | 131 | break; |
| 120 | } while (1); | 132 | } while (1); |
| 121 | 133 | ||
| 122 | dma->state = ~DMA_ST_AB; | 134 | idma->state = ~DMA_ST_AB; |
| 123 | disable_irq(irq); | 135 | disable_irq(irq); |
| 124 | 136 | ||
| 125 | return IRQ_HANDLED; | 137 | return IRQ_HANDLED; |
| 126 | } | 138 | } |
| 127 | 139 | ||
| 128 | static int iomd_request_dma(dmach_t channel, dma_t *dma) | 140 | static int iomd_request_dma(unsigned int chan, dma_t *dma) |
| 129 | { | 141 | { |
| 130 | return request_irq(dma->dma_irq, iomd_dma_handle, | 142 | struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); |
| 131 | IRQF_DISABLED, dma->device_id, dma); | 143 | |
| 144 | return request_irq(idma->irq, iomd_dma_handle, | ||
| 145 | IRQF_DISABLED, idma->dma.device_id, idma); | ||
| 132 | } | 146 | } |
| 133 | 147 | ||
| 134 | static void iomd_free_dma(dmach_t channel, dma_t *dma) | 148 | static void iomd_free_dma(unsigned int chan, dma_t *dma) |
| 135 | { | 149 | { |
| 136 | free_irq(dma->dma_irq, dma); | 150 | struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); |
| 151 | |||
| 152 | free_irq(idma->irq, idma); | ||
| 137 | } | 153 | } |
| 138 | 154 | ||
| 139 | static void iomd_enable_dma(dmach_t channel, dma_t *dma) | 155 | static void iomd_enable_dma(unsigned int chan, dma_t *dma) |
| 140 | { | 156 | { |
| 141 | unsigned long dma_base = dma->dma_base; | 157 | struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); |
| 158 | unsigned long dma_base = idma->base; | ||
| 142 | unsigned int ctrl = TRANSFER_SIZE | DMA_CR_E; | 159 | unsigned int ctrl = TRANSFER_SIZE | DMA_CR_E; |
| 143 | 160 | ||
| 144 | if (dma->invalid) { | 161 | if (idma->dma.invalid) { |
| 145 | dma->invalid = 0; | 162 | idma->dma.invalid = 0; |
| 146 | 163 | ||
| 147 | /* | 164 | /* |
| 148 | * Cope with ISA-style drivers which expect cache | 165 | * Cope with ISA-style drivers which expect cache |
| 149 | * coherence. | 166 | * coherence. |
| 150 | */ | 167 | */ |
| 151 | if (!dma->sg) { | 168 | if (!idma->dma.sg) { |
| 152 | dma->sg = &dma->buf; | 169 | idma->dma.sg = &idma->dma.buf; |
| 153 | dma->sgcount = 1; | 170 | idma->dma.sgcount = 1; |
| 154 | dma->buf.length = dma->count; | 171 | idma->dma.buf.length = idma->dma.count; |
| 155 | dma->buf.dma_address = dma_map_single(NULL, | 172 | idma->dma.buf.dma_address = dma_map_single(NULL, |
| 156 | dma->addr, dma->count, | 173 | idma->dma.addr, idma->dma.count, |
| 157 | dma->dma_mode == DMA_MODE_READ ? | 174 | idma->dma.dma_mode == DMA_MODE_READ ? |
| 158 | DMA_FROM_DEVICE : DMA_TO_DEVICE); | 175 | DMA_FROM_DEVICE : DMA_TO_DEVICE); |
| 159 | } | 176 | } |
| 160 | 177 | ||
| 161 | iomd_writeb(DMA_CR_C, dma_base + CR); | 178 | iomd_writeb(DMA_CR_C, dma_base + CR); |
| 162 | dma->state = DMA_ST_AB; | 179 | idma->state = DMA_ST_AB; |
| 163 | } | 180 | } |
| 164 | 181 | ||
| 165 | if (dma->dma_mode == DMA_MODE_READ) | 182 | if (idma->dma.dma_mode == DMA_MODE_READ) |
| 166 | ctrl |= DMA_CR_D; | 183 | ctrl |= DMA_CR_D; |
| 167 | 184 | ||
| 168 | iomd_writeb(ctrl, dma_base + CR); | 185 | iomd_writeb(ctrl, dma_base + CR); |
| 169 | enable_irq(dma->dma_irq); | 186 | enable_irq(idma->irq); |
| 170 | } | 187 | } |
| 171 | 188 | ||
| 172 | static void iomd_disable_dma(dmach_t channel, dma_t *dma) | 189 | static void iomd_disable_dma(unsigned int chan, dma_t *dma) |
| 173 | { | 190 | { |
| 174 | unsigned long dma_base = dma->dma_base; | 191 | struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); |
| 192 | unsigned long dma_base = idma->base; | ||
| 175 | unsigned long flags; | 193 | unsigned long flags; |
| 176 | 194 | ||
| 177 | local_irq_save(flags); | 195 | local_irq_save(flags); |
| 178 | if (dma->state != ~DMA_ST_AB) | 196 | if (idma->state != ~DMA_ST_AB) |
| 179 | disable_irq(dma->dma_irq); | 197 | disable_irq(idma->irq); |
| 180 | iomd_writeb(0, dma_base + CR); | 198 | iomd_writeb(0, dma_base + CR); |
| 181 | local_irq_restore(flags); | 199 | local_irq_restore(flags); |
| 182 | } | 200 | } |
| 183 | 201 | ||
| 184 | static int iomd_set_dma_speed(dmach_t channel, dma_t *dma, int cycle) | 202 | static int iomd_set_dma_speed(unsigned int chan, dma_t *dma, int cycle) |
| 185 | { | 203 | { |
| 186 | int tcr, speed; | 204 | int tcr, speed; |
| 187 | 205 | ||
| @@ -197,7 +215,7 @@ static int iomd_set_dma_speed(dmach_t channel, dma_t *dma, int cycle) | |||
| 197 | tcr = iomd_readb(IOMD_DMATCR); | 215 | tcr = iomd_readb(IOMD_DMATCR); |
| 198 | speed &= 3; | 216 | speed &= 3; |
| 199 | 217 | ||
| 200 | switch (channel) { | 218 | switch (chan) { |
| 201 | case DMA_0: | 219 | case DMA_0: |
| 202 | tcr = (tcr & ~0x03) | speed; | 220 | tcr = (tcr & ~0x03) | speed; |
| 203 | break; | 221 | break; |
| @@ -236,16 +254,22 @@ static struct fiq_handler fh = { | |||
| 236 | .name = "floppydma" | 254 | .name = "floppydma" |
| 237 | }; | 255 | }; |
| 238 | 256 | ||
| 239 | static void floppy_enable_dma(dmach_t channel, dma_t *dma) | 257 | struct floppy_dma { |
| 258 | struct dma_struct dma; | ||
| 259 | unsigned int fiq; | ||
| 260 | }; | ||
| 261 | |||
| 262 | static void floppy_enable_dma(unsigned int chan, dma_t *dma) | ||
| 240 | { | 263 | { |
| 264 | struct floppy_dma *fdma = container_of(dma, struct floppy_dma, dma); | ||
| 241 | void *fiqhandler_start; | 265 | void *fiqhandler_start; |
| 242 | unsigned int fiqhandler_length; | 266 | unsigned int fiqhandler_length; |
| 243 | struct pt_regs regs; | 267 | struct pt_regs regs; |
| 244 | 268 | ||
| 245 | if (dma->sg) | 269 | if (fdma->dma.sg) |
| 246 | BUG(); | 270 | BUG(); |
| 247 | 271 | ||
| 248 | if (dma->dma_mode == DMA_MODE_READ) { | 272 | if (fdma->dma.dma_mode == DMA_MODE_READ) { |
| 249 | extern unsigned char floppy_fiqin_start, floppy_fiqin_end; | 273 | extern unsigned char floppy_fiqin_start, floppy_fiqin_end; |
| 250 | fiqhandler_start = &floppy_fiqin_start; | 274 | fiqhandler_start = &floppy_fiqin_start; |
| 251 | fiqhandler_length = &floppy_fiqin_end - &floppy_fiqin_start; | 275 | fiqhandler_length = &floppy_fiqin_end - &floppy_fiqin_start; |
| @@ -255,8 +279,8 @@ static void floppy_enable_dma(dmach_t channel, dma_t *dma) | |||
| 255 | fiqhandler_length = &floppy_fiqout_end - &floppy_fiqout_start; | 279 | fiqhandler_length = &floppy_fiqout_end - &floppy_fiqout_start; |
| 256 | } | 280 | } |
| 257 | 281 | ||
| 258 | regs.ARM_r9 = dma->count; | 282 | regs.ARM_r9 = fdma->dma.count; |
| 259 | regs.ARM_r10 = (unsigned long)dma->addr; | 283 | regs.ARM_r10 = (unsigned long)fdma->dma.addr; |
| 260 | regs.ARM_fp = (unsigned long)FLOPPYDMA_BASE; | 284 | regs.ARM_fp = (unsigned long)FLOPPYDMA_BASE; |
| 261 | 285 | ||
| 262 | if (claim_fiq(&fh)) { | 286 | if (claim_fiq(&fh)) { |
| @@ -266,16 +290,17 @@ static void floppy_enable_dma(dmach_t channel, dma_t *dma) | |||
| 266 | 290 | ||
| 267 | set_fiq_handler(fiqhandler_start, fiqhandler_length); | 291 | set_fiq_handler(fiqhandler_start, fiqhandler_length); |
| 268 | set_fiq_regs(®s); | 292 | set_fiq_regs(®s); |
| 269 | enable_fiq(dma->dma_irq); | 293 | enable_fiq(fdma->fiq); |
| 270 | } | 294 | } |
| 271 | 295 | ||
| 272 | static void floppy_disable_dma(dmach_t channel, dma_t *dma) | 296 | static void floppy_disable_dma(unsigned int chan, dma_t *dma) |
| 273 | { | 297 | { |
| 274 | disable_fiq(dma->dma_irq); | 298 | struct floppy_dma *fdma = container_of(dma, struct floppy_dma, dma); |
| 299 | disable_fiq(fdma->fiq); | ||
| 275 | release_fiq(&fh); | 300 | release_fiq(&fh); |
| 276 | } | 301 | } |
| 277 | 302 | ||
| 278 | static int floppy_get_residue(dmach_t channel, dma_t *dma) | 303 | static int floppy_get_residue(unsigned int chan, dma_t *dma) |
| 279 | { | 304 | { |
| 280 | struct pt_regs regs; | 305 | struct pt_regs regs; |
| 281 | get_fiq_regs(®s); | 306 | get_fiq_regs(®s); |
| @@ -292,7 +317,7 @@ static struct dma_ops floppy_dma_ops = { | |||
| 292 | /* | 317 | /* |
| 293 | * This is virtual DMA - we don't need anything here. | 318 | * This is virtual DMA - we don't need anything here. |
| 294 | */ | 319 | */ |
| 295 | static void sound_enable_disable_dma(dmach_t channel, dma_t *dma) | 320 | static void sound_enable_disable_dma(unsigned int chan, dma_t *dma) |
| 296 | { | 321 | { |
| 297 | } | 322 | } |
| 298 | 323 | ||
| @@ -302,8 +327,24 @@ static struct dma_ops sound_dma_ops = { | |||
| 302 | .disable = sound_enable_disable_dma, | 327 | .disable = sound_enable_disable_dma, |
| 303 | }; | 328 | }; |
| 304 | 329 | ||
| 305 | void __init arch_dma_init(dma_t *dma) | 330 | static struct iomd_dma iomd_dma[6]; |
| 331 | |||
| 332 | static struct floppy_dma floppy_dma = { | ||
| 333 | .dma = { | ||
| 334 | .d_ops = &floppy_dma_ops, | ||
| 335 | }, | ||
| 336 | .fiq = FIQ_FLOPPYDATA, | ||
| 337 | }; | ||
| 338 | |||
| 339 | static dma_t sound_dma = { | ||
| 340 | .d_ops = &sound_dma_ops, | ||
| 341 | }; | ||
| 342 | |||
| 343 | static int __init rpc_dma_init(void) | ||
| 306 | { | 344 | { |
| 345 | unsigned int i; | ||
| 346 | int ret; | ||
| 347 | |||
| 307 | iomd_writeb(0, IOMD_IO0CR); | 348 | iomd_writeb(0, IOMD_IO0CR); |
| 308 | iomd_writeb(0, IOMD_IO1CR); | 349 | iomd_writeb(0, IOMD_IO1CR); |
| 309 | iomd_writeb(0, IOMD_IO2CR); | 350 | iomd_writeb(0, IOMD_IO2CR); |
| @@ -311,31 +352,39 @@ void __init arch_dma_init(dma_t *dma) | |||
| 311 | 352 | ||
| 312 | iomd_writeb(0xa0, IOMD_DMATCR); | 353 | iomd_writeb(0xa0, IOMD_DMATCR); |
| 313 | 354 | ||
| 314 | dma[DMA_0].dma_base = IOMD_IO0CURA; | ||
| 315 | dma[DMA_0].dma_irq = IRQ_DMA0; | ||
| 316 | dma[DMA_0].d_ops = &iomd_dma_ops; | ||
| 317 | dma[DMA_1].dma_base = IOMD_IO1CURA; | ||
| 318 | dma[DMA_1].dma_irq = IRQ_DMA1; | ||
| 319 | dma[DMA_1].d_ops = &iomd_dma_ops; | ||
| 320 | dma[DMA_2].dma_base = IOMD_IO2CURA; | ||
| 321 | dma[DMA_2].dma_irq = IRQ_DMA2; | ||
| 322 | dma[DMA_2].d_ops = &iomd_dma_ops; | ||
| 323 | dma[DMA_3].dma_base = IOMD_IO3CURA; | ||
| 324 | dma[DMA_3].dma_irq = IRQ_DMA3; | ||
| 325 | dma[DMA_3].d_ops = &iomd_dma_ops; | ||
| 326 | dma[DMA_S0].dma_base = IOMD_SD0CURA; | ||
| 327 | dma[DMA_S0].dma_irq = IRQ_DMAS0; | ||
| 328 | dma[DMA_S0].d_ops = &iomd_dma_ops; | ||
| 329 | dma[DMA_S1].dma_base = IOMD_SD1CURA; | ||
| 330 | dma[DMA_S1].dma_irq = IRQ_DMAS1; | ||
| 331 | dma[DMA_S1].d_ops = &iomd_dma_ops; | ||
| 332 | dma[DMA_VIRTUAL_FLOPPY].dma_irq = FIQ_FLOPPYDATA; | ||
| 333 | dma[DMA_VIRTUAL_FLOPPY].d_ops = &floppy_dma_ops; | ||
| 334 | dma[DMA_VIRTUAL_SOUND].d_ops = &sound_dma_ops; | ||
| 335 | |||
| 336 | /* | 355 | /* |
| 337 | * Setup DMA channels 2,3 to be for podules | 356 | * Setup DMA channels 2,3 to be for podules |
| 338 | * and channels 0,1 for internal devices | 357 | * and channels 0,1 for internal devices |
| 339 | */ | 358 | */ |
| 340 | iomd_writeb(DMA_EXT_IO3|DMA_EXT_IO2, IOMD_DMAEXT); | 359 | iomd_writeb(DMA_EXT_IO3|DMA_EXT_IO2, IOMD_DMAEXT); |
| 360 | |||
| 361 | iomd_dma[DMA_0].base = IOMD_IO0CURA; | ||
| 362 | iomd_dma[DMA_0].irq = IRQ_DMA0; | ||
| 363 | iomd_dma[DMA_1].base = IOMD_IO1CURA; | ||
| 364 | iomd_dma[DMA_1].irq = IRQ_DMA1; | ||
| 365 | iomd_dma[DMA_2].base = IOMD_IO2CURA; | ||
| 366 | iomd_dma[DMA_2].irq = IRQ_DMA2; | ||
| 367 | iomd_dma[DMA_3].base = IOMD_IO3CURA; | ||
| 368 | iomd_dma[DMA_3].irq = IRQ_DMA3; | ||
| 369 | iomd_dma[DMA_S0].base = IOMD_SD0CURA; | ||
| 370 | iomd_dma[DMA_S0].irq = IRQ_DMAS0; | ||
| 371 | iomd_dma[DMA_S1].base = IOMD_SD1CURA; | ||
| 372 | iomd_dma[DMA_S1].irq = IRQ_DMAS1; | ||
| 373 | |||
| 374 | for (i = DMA_0; i <= DMA_S1; i++) { | ||
| 375 | iomd_dma[i].dma.d_ops = &iomd_dma_ops; | ||
| 376 | |||
| 377 | ret = isa_dma_add(i, &iomd_dma[i].dma); | ||
| 378 | if (ret) | ||
| 379 | printk("IOMDDMA%u: unable to register: %d\n", i, ret); | ||
| 380 | } | ||
| 381 | |||
| 382 | ret = isa_dma_add(DMA_VIRTUAL_FLOPPY, &floppy_dma.dma); | ||
| 383 | if (ret) | ||
| 384 | printk("IOMDFLOPPY: unable to register: %d\n", ret); | ||
| 385 | ret = isa_dma_add(DMA_VIRTUAL_SOUND, &sound_dma); | ||
| 386 | if (ret) | ||
| 387 | printk("IOMDSOUND: unable to register: %d\n", ret); | ||
| 388 | return 0; | ||
| 341 | } | 389 | } |
| 390 | core_initcall(rpc_dma_init); | ||
diff --git a/arch/arm/mach-rpc/include/mach/isa-dma.h b/arch/arm/mach-rpc/include/mach/isa-dma.h index bad720548587..67bfc6719c34 100644 --- a/arch/arm/mach-rpc/include/mach/isa-dma.h +++ b/arch/arm/mach-rpc/include/mach/isa-dma.h | |||
| @@ -23,5 +23,7 @@ | |||
| 23 | 23 | ||
| 24 | #define DMA_FLOPPY DMA_VIRTUAL_FLOPPY | 24 | #define DMA_FLOPPY DMA_VIRTUAL_FLOPPY |
| 25 | 25 | ||
| 26 | #define IOMD_DMA_BOUNDARY (PAGE_SIZE - 1) | ||
| 27 | |||
| 26 | #endif /* _ASM_ARCH_DMA_H */ | 28 | #endif /* _ASM_ARCH_DMA_H */ |
| 27 | 29 | ||
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c index e88d417736af..c7fc01e9d1f6 100644 --- a/arch/arm/mach-rpc/riscpc.c +++ b/arch/arm/mach-rpc/riscpc.c | |||
| @@ -19,6 +19,7 @@ | |||
| 19 | #include <linux/serial_8250.h> | 19 | #include <linux/serial_8250.h> |
| 20 | #include <linux/ata_platform.h> | 20 | #include <linux/ata_platform.h> |
| 21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
| 22 | #include <linux/i2c.h> | ||
| 22 | 23 | ||
| 23 | #include <asm/elf.h> | 24 | #include <asm/elf.h> |
| 24 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
| @@ -201,8 +202,13 @@ static struct platform_device *devs[] __initdata = { | |||
| 201 | &pata_device, | 202 | &pata_device, |
| 202 | }; | 203 | }; |
| 203 | 204 | ||
| 205 | static struct i2c_board_info i2c_rtc = { | ||
| 206 | I2C_BOARD_INFO("pcf8583", 0x50) | ||
| 207 | }; | ||
| 208 | |||
| 204 | static int __init rpc_init(void) | 209 | static int __init rpc_init(void) |
| 205 | { | 210 | { |
| 211 | i2c_register_board_info(0, &i2c_rtc, 1); | ||
| 206 | return platform_add_devices(devs, ARRAY_SIZE(devs)); | 212 | return platform_add_devices(devs, ARRAY_SIZE(devs)); |
| 207 | } | 213 | } |
| 208 | 214 | ||
diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig index f99d9013905f..81ffff7ed498 100644 --- a/arch/arm/mach-sa1100/Kconfig +++ b/arch/arm/mach-sa1100/Kconfig | |||
| @@ -71,19 +71,9 @@ config SA1100_H3600 | |||
| 71 | <http://www.handhelds.org/Compaq/index.html#iPAQ_H3600> | 71 | <http://www.handhelds.org/Compaq/index.html#iPAQ_H3600> |
| 72 | <http://www.compaq.com/products/handhelds/pocketpc/> | 72 | <http://www.compaq.com/products/handhelds/pocketpc/> |
| 73 | 73 | ||
| 74 | config SA1100_H3800 | ||
| 75 | bool "Compaq iPAQ H3800" | ||
| 76 | help | ||
| 77 | Say Y here if you intend to run this kernel on the Compaq iPAQ H3800 | ||
| 78 | series handheld computer. Information about this machine and the | ||
| 79 | Linux port to this machine can be found at: | ||
| 80 | |||
| 81 | <http://www.handhelds.org/Compaq/index.html#iPAQ_H3800> | ||
| 82 | <http://www.compaq.com/products/handhelds/pocketpc/> | ||
| 83 | |||
| 84 | config SA1100_H3XXX | 74 | config SA1100_H3XXX |
| 85 | bool | 75 | bool |
| 86 | depends on SA1100_H3100 || SA1100_H3600 || SA1100_H3800 | 76 | depends on SA1100_H3100 || SA1100_H3600 |
| 87 | default y | 77 | default y |
| 88 | 78 | ||
| 89 | config SA1100_BADGE4 | 79 | config SA1100_BADGE4 |
| @@ -157,15 +147,6 @@ config SA1100_SSP | |||
| 157 | This isn't for audio support, but for attached sensors and | 147 | This isn't for audio support, but for attached sensors and |
| 158 | other devices, eg for BadgePAD 4 sensor support. | 148 | other devices, eg for BadgePAD 4 sensor support. |
| 159 | 149 | ||
| 160 | config H3600_SLEEVE | ||
| 161 | tristate "Compaq iPAQ Handheld sleeve support" | ||
| 162 | depends on SA1100_H3100 || SA1100_H3600 | ||
| 163 | help | ||
| 164 | Choose this option to enable support for extension packs (sleeves) | ||
| 165 | for the Compaq iPAQ H3XXX series of handheld computers. This option | ||
| 166 | is required for the CF, PCMCIA, Bluetooth and GSM/GPRS extension | ||
| 167 | packs. | ||
| 168 | |||
| 169 | endmenu | 150 | endmenu |
| 170 | 151 | ||
| 171 | endif | 152 | endif |
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c index af25a78d705d..0eb2f159578b 100644 --- a/arch/arm/mach-sa1100/h3600.c +++ b/arch/arm/mach-sa1100/h3600.c | |||
| @@ -42,19 +42,12 @@ | |||
| 42 | #include <asm/mach/serial_sa1100.h> | 42 | #include <asm/mach/serial_sa1100.h> |
| 43 | 43 | ||
| 44 | #include <mach/h3600.h> | 44 | #include <mach/h3600.h> |
| 45 | |||
| 46 | #if defined (CONFIG_SA1100_H3600) || defined (CONFIG_SA1100_H3100) | ||
| 47 | #include <mach/h3600_gpio.h> | 45 | #include <mach/h3600_gpio.h> |
| 48 | #endif | ||
| 49 | |||
| 50 | #ifdef CONFIG_SA1100_H3800 | ||
| 51 | #include <mach/h3600_asic.h> | ||
| 52 | #endif | ||
| 53 | 46 | ||
| 54 | #include "generic.h" | 47 | #include "generic.h" |
| 55 | 48 | ||
| 56 | struct ipaq_model_ops ipaq_model_ops; | 49 | void (*assign_h3600_egpio)(enum ipaq_egpio_type x, int level); |
| 57 | EXPORT_SYMBOL(ipaq_model_ops); | 50 | EXPORT_SYMBOL(assign_h3600_egpio); |
| 58 | 51 | ||
| 59 | static struct mtd_partition h3xxx_partitions[] = { | 52 | static struct mtd_partition h3xxx_partitions[] = { |
| 60 | { | 53 | { |
| @@ -63,41 +56,9 @@ static struct mtd_partition h3xxx_partitions[] = { | |||
| 63 | .offset = 0, | 56 | .offset = 0, |
| 64 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | 57 | .mask_flags = MTD_WRITEABLE, /* force read-only */ |
| 65 | }, { | 58 | }, { |
| 66 | #ifdef CONFIG_MTD_2PARTS_IPAQ | 59 | .name = "H3XXX rootfs", |
| 67 | .name = "H3XXX root jffs2", | ||
| 68 | .size = MTDPART_SIZ_FULL, | 60 | .size = MTDPART_SIZ_FULL, |
| 69 | .offset = 0x00040000, | 61 | .offset = 0x00040000, |
| 70 | #else | ||
| 71 | .name = "H3XXX kernel", | ||
| 72 | .size = 0x00080000, | ||
| 73 | .offset = 0x00040000, | ||
| 74 | }, { | ||
| 75 | .name = "H3XXX params", | ||
| 76 | .size = 0x00040000, | ||
| 77 | .offset = 0x000C0000, | ||
| 78 | }, { | ||
| 79 | #ifdef CONFIG_JFFS2_FS | ||
| 80 | .name = "H3XXX root jffs2", | ||
| 81 | .size = MTDPART_SIZ_FULL, | ||
| 82 | .offset = 0x00100000, | ||
| 83 | #else | ||
| 84 | .name = "H3XXX initrd", | ||
| 85 | .size = 0x00100000, | ||
| 86 | .offset = 0x00100000, | ||
| 87 | }, { | ||
| 88 | .name = "H3XXX root cramfs", | ||
| 89 | .size = 0x00300000, | ||
| 90 | .offset = 0x00200000, | ||
| 91 | }, { | ||
| 92 | .name = "H3XXX usr cramfs", | ||
| 93 | .size = 0x00800000, | ||
| 94 | .offset = 0x00500000, | ||
| 95 | }, { | ||
| 96 | .name = "H3XXX usr local", | ||
| 97 | .size = MTDPART_SIZ_FULL, | ||
| 98 | .offset = 0x00d00000, | ||
| 99 | #endif | ||
| 100 | #endif | ||
| 101 | } | 62 | } |
| 102 | }; | 63 | }; |
| 103 | 64 | ||
| @@ -131,11 +92,7 @@ static int h3600_irda_set_power(struct device *dev, unsigned int state) | |||
| 131 | 92 | ||
| 132 | static void h3600_irda_set_speed(struct device *dev, unsigned int speed) | 93 | static void h3600_irda_set_speed(struct device *dev, unsigned int speed) |
| 133 | { | 94 | { |
| 134 | if (speed < 4000000) { | 95 | assign_h3600_egpio(IPAQ_EGPIO_IR_FSEL, !(speed < 4000000)); |
| 135 | clr_h3600_egpio(IPAQ_EGPIO_IR_FSEL); | ||
| 136 | } else { | ||
| 137 | set_h3600_egpio(IPAQ_EGPIO_IR_FSEL); | ||
| 138 | } | ||
| 139 | } | 96 | } |
| 140 | 97 | ||
| 141 | static struct irda_platform_data h3600_irda_data = { | 98 | static struct irda_platform_data h3600_irda_data = { |
| @@ -266,12 +223,6 @@ static void __init h3xxx_map_io(void) | |||
| 266 | sa1100fb_lcd_power = h3xxx_lcd_power; | 223 | sa1100fb_lcd_power = h3xxx_lcd_power; |
| 267 | } | 224 | } |
| 268 | 225 | ||
| 269 | static __inline__ void do_blank(int setp) | ||
| 270 | { | ||
| 271 | if (ipaq_model_ops.blank_callback) | ||
| 272 | ipaq_model_ops.blank_callback(1-setp); | ||
| 273 | } | ||
| 274 | |||
| 275 | /************************* H3100 *************************/ | 226 | /************************* H3100 *************************/ |
| 276 | 227 | ||
| 277 | #ifdef CONFIG_SA1100_H3100 | 228 | #ifdef CONFIG_SA1100_H3100 |
| @@ -289,7 +240,6 @@ static void h3100_control_egpio(enum ipaq_egpio_type x, int setp) | |||
| 289 | case IPAQ_EGPIO_LCD_POWER: | 240 | case IPAQ_EGPIO_LCD_POWER: |
| 290 | egpio |= EGPIO_H3600_LCD_ON; | 241 | egpio |= EGPIO_H3600_LCD_ON; |
| 291 | gpio |= GPIO_H3100_LCD_3V_ON; | 242 | gpio |= GPIO_H3100_LCD_3V_ON; |
| 292 | do_blank(setp); | ||
| 293 | break; | 243 | break; |
| 294 | case IPAQ_EGPIO_LCD_ENABLE: | 244 | case IPAQ_EGPIO_LCD_ENABLE: |
| 295 | break; | 245 | break; |
| @@ -343,25 +293,6 @@ static void h3100_control_egpio(enum ipaq_egpio_type x, int setp) | |||
| 343 | } | 293 | } |
| 344 | } | 294 | } |
| 345 | 295 | ||
| 346 | static unsigned long h3100_read_egpio(void) | ||
| 347 | { | ||
| 348 | return h3100_egpio; | ||
| 349 | } | ||
| 350 | |||
| 351 | static int h3100_pm_callback(int req) | ||
| 352 | { | ||
| 353 | if (ipaq_model_ops.pm_callback_aux) | ||
| 354 | return ipaq_model_ops.pm_callback_aux(req); | ||
| 355 | return 0; | ||
| 356 | } | ||
| 357 | |||
| 358 | static struct ipaq_model_ops h3100_model_ops __initdata = { | ||
| 359 | .generic_name = "3100", | ||
| 360 | .control = h3100_control_egpio, | ||
| 361 | .read = h3100_read_egpio, | ||
| 362 | .pm_callback = h3100_pm_callback | ||
| 363 | }; | ||
| 364 | |||
| 365 | #define H3100_DIRECT_EGPIO (GPIO_H3100_BT_ON \ | 296 | #define H3100_DIRECT_EGPIO (GPIO_H3100_BT_ON \ |
| 366 | | GPIO_H3100_GPIO3 \ | 297 | | GPIO_H3100_GPIO3 \ |
| 367 | | GPIO_H3100_QMUTE \ | 298 | | GPIO_H3100_QMUTE \ |
| @@ -387,7 +318,7 @@ static void __init h3100_map_io(void) | |||
| 387 | GAFR &= ~H3100_DIRECT_EGPIO; | 318 | GAFR &= ~H3100_DIRECT_EGPIO; |
| 388 | 319 | ||
| 389 | H3100_EGPIO = h3100_egpio; | 320 | H3100_EGPIO = h3100_egpio; |
| 390 | ipaq_model_ops = h3100_model_ops; | 321 | assign_h3600_egpio = h3100_control_egpio; |
| 391 | } | 322 | } |
| 392 | 323 | ||
| 393 | MACHINE_START(H3100, "Compaq iPAQ H3100") | 324 | MACHINE_START(H3100, "Compaq iPAQ H3100") |
| @@ -420,7 +351,6 @@ static void h3600_control_egpio(enum ipaq_egpio_type x, int setp) | |||
| 420 | EGPIO_H3600_LCD_PCI | | 351 | EGPIO_H3600_LCD_PCI | |
| 421 | EGPIO_H3600_LCD_5V_ON | | 352 | EGPIO_H3600_LCD_5V_ON | |
| 422 | EGPIO_H3600_LVDD_ON; | 353 | EGPIO_H3600_LVDD_ON; |
| 423 | do_blank(setp); | ||
| 424 | break; | 354 | break; |
| 425 | case IPAQ_EGPIO_LCD_ENABLE: | 355 | case IPAQ_EGPIO_LCD_ENABLE: |
| 426 | break; | 356 | break; |
| @@ -471,25 +401,6 @@ static void h3600_control_egpio(enum ipaq_egpio_type x, int setp) | |||
| 471 | } | 401 | } |
| 472 | } | 402 | } |
| 473 | 403 | ||
| 474 | static unsigned long h3600_read_egpio(void) | ||
| 475 | { | ||
| 476 | return h3600_egpio; | ||
| 477 | } | ||
| 478 | |||
| 479 | static int h3600_pm_callback(int req) | ||
| 480 | { | ||
| 481 | if (ipaq_model_ops.pm_callback_aux) | ||
| 482 | return ipaq_model_ops.pm_callback_aux(req); | ||
| 483 | return 0; | ||
| 484 | } | ||
| 485 | |||
| 486 | static struct ipaq_model_ops h3600_model_ops __initdata = { | ||
| 487 | .generic_name = "3600", | ||
| 488 | .control = h3600_control_egpio, | ||
| 489 | .read = h3600_read_egpio, | ||
| 490 | .pm_callback = h3600_pm_callback | ||
| 491 | }; | ||
| 492 | |||
| 493 | static void __init h3600_map_io(void) | 404 | static void __init h3600_map_io(void) |
| 494 | { | 405 | { |
| 495 | h3xxx_map_io(); | 406 | h3xxx_map_io(); |
| @@ -504,7 +415,7 @@ static void __init h3600_map_io(void) | |||
| 504 | GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; | 415 | GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; |
| 505 | 416 | ||
| 506 | H3600_EGPIO = h3600_egpio; /* Maintains across sleep? */ | 417 | H3600_EGPIO = h3600_egpio; /* Maintains across sleep? */ |
| 507 | ipaq_model_ops = h3600_model_ops; | 418 | assign_h3600_egpio = h3600_control_egpio; |
| 508 | } | 419 | } |
| 509 | 420 | ||
| 510 | MACHINE_START(H3600, "Compaq iPAQ H3600") | 421 | MACHINE_START(H3600, "Compaq iPAQ H3600") |
| @@ -519,388 +430,3 @@ MACHINE_END | |||
| 519 | 430 | ||
| 520 | #endif /* CONFIG_SA1100_H3600 */ | 431 | #endif /* CONFIG_SA1100_H3600 */ |
| 521 | 432 | ||
| 522 | #ifdef CONFIG_SA1100_H3800 | ||
| 523 | |||
| 524 | #define SET_ASIC1(x) \ | ||
| 525 | do {if (setp) { H3800_ASIC1_GPIO_OUT |= (x); } else { H3800_ASIC1_GPIO_OUT &= ~(x); }} while(0) | ||
| 526 | |||
| 527 | #define SET_ASIC2(x) \ | ||
| 528 | do {if (setp) { H3800_ASIC2_GPIOPIOD |= (x); } else { H3800_ASIC2_GPIOPIOD &= ~(x); }} while(0) | ||
| 529 | |||
| 530 | #define CLEAR_ASIC1(x) \ | ||
| 531 | do {if (setp) { H3800_ASIC1_GPIO_OUT &= ~(x); } else { H3800_ASIC1_GPIO_OUT |= (x); }} while(0) | ||
| 532 | |||
| 533 | #define CLEAR_ASIC2(x) \ | ||
| 534 | do {if (setp) { H3800_ASIC2_GPIOPIOD &= ~(x); } else { H3800_ASIC2_GPIOPIOD |= (x); }} while(0) | ||
| 535 | |||
| 536 | |||
| 537 | /* | ||
| 538 | On screen enable, we get | ||
| 539 | |||
| 540 | h3800_video_power_on(1) | ||
| 541 | LCD controller starts | ||
| 542 | h3800_video_lcd_enable(1) | ||
| 543 | |||
| 544 | On screen disable, we get | ||
| 545 | |||
| 546 | h3800_video_lcd_enable(0) | ||
| 547 | LCD controller stops | ||
| 548 | h3800_video_power_on(0) | ||
| 549 | */ | ||
| 550 | |||
| 551 | |||
| 552 | static void h3800_video_power_on(int setp) | ||
| 553 | { | ||
| 554 | if (setp) { | ||
| 555 | H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_ON; | ||
| 556 | msleep(30); | ||
| 557 | H3800_ASIC1_GPIO_OUT |= GPIO1_VGL_ON; | ||
| 558 | msleep(5); | ||
| 559 | H3800_ASIC1_GPIO_OUT |= GPIO1_VGH_ON; | ||
| 560 | msleep(50); | ||
| 561 | H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_5V_ON; | ||
| 562 | msleep(5); | ||
| 563 | } else { | ||
| 564 | msleep(5); | ||
| 565 | H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_5V_ON; | ||
| 566 | msleep(50); | ||
| 567 | H3800_ASIC1_GPIO_OUT &= ~GPIO1_VGL_ON; | ||
| 568 | msleep(5); | ||
| 569 | H3800_ASIC1_GPIO_OUT &= ~GPIO1_VGH_ON; | ||
| 570 | msleep(100); | ||
| 571 | H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_ON; | ||
| 572 | } | ||
| 573 | } | ||
| 574 | |||
| 575 | static void h3800_video_lcd_enable(int setp) | ||
| 576 | { | ||
| 577 | if (setp) { | ||
| 578 | msleep(17); // Wait one from before turning on | ||
| 579 | H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_PCI; | ||
| 580 | } else { | ||
| 581 | H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_PCI; | ||
| 582 | msleep(30); // Wait before turning off | ||
| 583 | } | ||
| 584 | } | ||
| 585 | |||
| 586 | |||
| 587 | static void h3800_control_egpio(enum ipaq_egpio_type x, int setp) | ||
| 588 | { | ||
| 589 | switch (x) { | ||
| 590 | case IPAQ_EGPIO_LCD_POWER: | ||
| 591 | h3800_video_power_on(setp); | ||
| 592 | break; | ||
| 593 | case IPAQ_EGPIO_LCD_ENABLE: | ||
| 594 | h3800_video_lcd_enable(setp); | ||
| 595 | break; | ||
| 596 | case IPAQ_EGPIO_CODEC_NRESET: | ||
| 597 | case IPAQ_EGPIO_AUDIO_ON: | ||
| 598 | case IPAQ_EGPIO_QMUTE: | ||
| 599 | printk("%s: error - should not be called\n", __func__); | ||
| 600 | break; | ||
| 601 | case IPAQ_EGPIO_OPT_NVRAM_ON: | ||
| 602 | SET_ASIC2(GPIO2_OPT_ON_NVRAM); | ||
| 603 | break; | ||
| 604 | case IPAQ_EGPIO_OPT_ON: | ||
| 605 | SET_ASIC2(GPIO2_OPT_ON); | ||
| 606 | break; | ||
| 607 | case IPAQ_EGPIO_CARD_RESET: | ||
| 608 | SET_ASIC2(GPIO2_OPT_PCM_RESET); | ||
| 609 | break; | ||
| 610 | case IPAQ_EGPIO_OPT_RESET: | ||
| 611 | SET_ASIC2(GPIO2_OPT_RESET); | ||
| 612 | break; | ||
| 613 | case IPAQ_EGPIO_IR_ON: | ||
| 614 | CLEAR_ASIC1(GPIO1_IR_ON_N); | ||
| 615 | break; | ||
| 616 | case IPAQ_EGPIO_IR_FSEL: | ||
| 617 | break; | ||
| 618 | case IPAQ_EGPIO_RS232_ON: | ||
| 619 | SET_ASIC1(GPIO1_RS232_ON); | ||
| 620 | break; | ||
| 621 | case IPAQ_EGPIO_VPP_ON: | ||
| 622 | H3800_ASIC2_FlashWP_VPP_ON = setp; | ||
| 623 | break; | ||
| 624 | } | ||
| 625 | } | ||
| 626 | |||
| 627 | static unsigned long h3800_read_egpio(void) | ||
| 628 | { | ||
| 629 | return H3800_ASIC1_GPIO_OUT | (H3800_ASIC2_GPIOPIOD << 16); | ||
| 630 | } | ||
| 631 | |||
| 632 | /* We need to fix ASIC2 GPIO over suspend/resume. At the moment, | ||
| 633 | it doesn't appear that ASIC1 GPIO has the same problem */ | ||
| 634 | |||
| 635 | static int h3800_pm_callback(int req) | ||
| 636 | { | ||
| 637 | static u16 asic1_data; | ||
| 638 | static u16 asic2_data; | ||
| 639 | int result = 0; | ||
| 640 | |||
| 641 | printk("%s %d\n", __func__, req); | ||
| 642 | |||
| 643 | switch (req) { | ||
| 644 | case PM_RESUME: | ||
| 645 | MSC2 = (MSC2 & 0x0000ffff) | 0xE4510000; /* Set MSC2 correctly */ | ||
| 646 | |||
| 647 | H3800_ASIC2_GPIOPIOD = asic2_data; | ||
| 648 | H3800_ASIC2_GPIODIR = GPIO2_PEN_IRQ | ||
| 649 | | GPIO2_SD_DETECT | ||
| 650 | | GPIO2_EAR_IN_N | ||
| 651 | | GPIO2_USB_DETECT_N | ||
| 652 | | GPIO2_SD_CON_SLT; | ||
| 653 | |||
| 654 | H3800_ASIC1_GPIO_OUT = asic1_data; | ||
| 655 | |||
| 656 | if (ipaq_model_ops.pm_callback_aux) | ||
| 657 | result = ipaq_model_ops.pm_callback_aux(req); | ||
| 658 | break; | ||
| 659 | |||
| 660 | case PM_SUSPEND: | ||
| 661 | if (ipaq_model_ops.pm_callback_aux && | ||
| 662 | ((result = ipaq_model_ops.pm_callback_aux(req)) != 0)) | ||
| 663 | return result; | ||
| 664 | |||
| 665 | asic1_data = H3800_ASIC1_GPIO_OUT; | ||
| 666 | asic2_data = H3800_ASIC2_GPIOPIOD; | ||
| 667 | break; | ||
| 668 | default: | ||
| 669 | printk("%s: unrecognized PM callback\n", __func__); | ||
| 670 | break; | ||
| 671 | } | ||
| 672 | return result; | ||
| 673 | } | ||
| 674 | |||
| 675 | static struct ipaq_model_ops h3800_model_ops __initdata = { | ||
| 676 | .generic_name = "3800", | ||
| 677 | .control = h3800_control_egpio, | ||
| 678 | .read = h3800_read_egpio, | ||
| 679 | .pm_callback = h3800_pm_callback | ||
| 680 | }; | ||
| 681 | |||
| 682 | #define MAX_ASIC_ISR_LOOPS 20 | ||
| 683 | |||
| 684 | /* The order of these is important - see #include <mach/irqs.h> */ | ||
| 685 | static u32 kpio_irq_mask[] = { | ||
| 686 | KPIO_KEY_ALL, | ||
| 687 | KPIO_SPI_INT, | ||
| 688 | KPIO_OWM_INT, | ||
| 689 | KPIO_ADC_INT, | ||
| 690 | KPIO_UART_0_INT, | ||
| 691 | KPIO_UART_1_INT, | ||
| 692 | KPIO_TIMER_0_INT, | ||
| 693 | KPIO_TIMER_1_INT, | ||
| 694 | KPIO_TIMER_2_INT | ||
| 695 | }; | ||
| 696 | |||
| 697 | static u32 gpio_irq_mask[] = { | ||
| 698 | GPIO2_PEN_IRQ, | ||
| 699 | GPIO2_SD_DETECT, | ||
| 700 | GPIO2_EAR_IN_N, | ||
| 701 | GPIO2_USB_DETECT_N, | ||
| 702 | GPIO2_SD_CON_SLT, | ||
| 703 | }; | ||
| 704 | |||
| 705 | static void h3800_IRQ_demux(unsigned int irq, struct irq_desc *desc) | ||
| 706 | { | ||
| 707 | int i; | ||
| 708 | |||
| 709 | if (0) printk("%s: interrupt received\n", __func__); | ||
| 710 | |||
| 711 | desc->chip->ack(irq); | ||
| 712 | |||
| 713 | for (i = 0; i < MAX_ASIC_ISR_LOOPS && (GPLR & GPIO_H3800_ASIC); i++) { | ||
| 714 | u32 irq; | ||
| 715 | int j; | ||
| 716 | |||
| 717 | /* KPIO */ | ||
| 718 | irq = H3800_ASIC2_KPIINTFLAG; | ||
| 719 | if (0) printk("%s KPIO 0x%08X\n", __func__, irq); | ||
| 720 | for (j = 0; j < H3800_KPIO_IRQ_COUNT; j++) | ||
| 721 | if (irq & kpio_irq_mask[j]) | ||
| 722 | handle_edge_irq(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j); | ||
| 723 | |||
| 724 | /* GPIO2 */ | ||
| 725 | irq = H3800_ASIC2_GPIINTFLAG; | ||
| 726 | if (0) printk("%s GPIO 0x%08X\n", __func__, irq); | ||
| 727 | for (j = 0; j < H3800_GPIO_IRQ_COUNT; j++) | ||
| 728 | if (irq & gpio_irq_mask[j]) | ||
| 729 | handle_edge_irq(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j); | ||
| 730 | } | ||
| 731 | |||
| 732 | if (i >= MAX_ASIC_ISR_LOOPS) | ||
| 733 | printk("%s: interrupt processing overrun\n", __func__); | ||
| 734 | |||
| 735 | /* For level-based interrupts */ | ||
| 736 | desc->chip->unmask(irq); | ||
| 737 | |||
| 738 | } | ||
| 739 | |||
| 740 | static struct irqaction h3800_irq = { | ||
| 741 | .name = "h3800_asic", | ||
| 742 | .handler = h3800_IRQ_demux, | ||
| 743 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | ||
| 744 | }; | ||
| 745 | |||
| 746 | u32 kpio_int_shadow = 0; | ||
| 747 | |||
| 748 | |||
| 749 | /* mask_ack <- IRQ is first serviced. | ||
| 750 | mask <- IRQ is disabled. | ||
| 751 | unmask <- IRQ is enabled | ||
| 752 | |||
| 753 | The INTCLR registers are poorly documented. I believe that writing | ||
| 754 | a "1" to the register clears the specific interrupt, but the documentation | ||
| 755 | indicates writing a "0" clears the interrupt. In any case, they shouldn't | ||
| 756 | be read (that's the INTFLAG register) | ||
| 757 | */ | ||
| 758 | |||
| 759 | static void h3800_mask_ack_kpio_irq(unsigned int irq) | ||
| 760 | { | ||
| 761 | u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START]; | ||
| 762 | kpio_int_shadow &= ~mask; | ||
| 763 | H3800_ASIC2_KPIINTSTAT = kpio_int_shadow; | ||
| 764 | H3800_ASIC2_KPIINTCLR = mask; | ||
| 765 | } | ||
| 766 | |||
| 767 | static void h3800_mask_kpio_irq(unsigned int irq) | ||
| 768 | { | ||
| 769 | u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START]; | ||
| 770 | kpio_int_shadow &= ~mask; | ||
| 771 | H3800_ASIC2_KPIINTSTAT = kpio_int_shadow; | ||
| 772 | } | ||
| 773 | |||
| 774 | static void h3800_unmask_kpio_irq(unsigned int irq) | ||
| 775 | { | ||
| 776 | u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START]; | ||
| 777 | kpio_int_shadow |= mask; | ||
| 778 | H3800_ASIC2_KPIINTSTAT = kpio_int_shadow; | ||
| 779 | } | ||
| 780 | |||
| 781 | static void h3800_mask_ack_gpio_irq(unsigned int irq) | ||
| 782 | { | ||
| 783 | u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START]; | ||
| 784 | H3800_ASIC2_GPIINTSTAT &= ~mask; | ||
| 785 | H3800_ASIC2_GPIINTCLR = mask; | ||
| 786 | } | ||
| 787 | |||
| 788 | static void h3800_mask_gpio_irq(unsigned int irq) | ||
| 789 | { | ||
| 790 | u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START]; | ||
| 791 | H3800_ASIC2_GPIINTSTAT &= ~mask; | ||
| 792 | } | ||
| 793 | |||
| 794 | static void h3800_unmask_gpio_irq(unsigned int irq) | ||
| 795 | { | ||
| 796 | u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START]; | ||
| 797 | H3800_ASIC2_GPIINTSTAT |= mask; | ||
| 798 | } | ||
| 799 | |||
| 800 | static void __init h3800_init_irq(void) | ||
| 801 | { | ||
| 802 | int i; | ||
| 803 | |||
| 804 | /* Initialize standard IRQs */ | ||
| 805 | sa1100_init_irq(); | ||
| 806 | |||
| 807 | /* Disable all IRQs and set up clock */ | ||
| 808 | H3800_ASIC2_KPIINTSTAT = 0; /* Disable all interrupts */ | ||
| 809 | H3800_ASIC2_GPIINTSTAT = 0; | ||
| 810 | |||
| 811 | H3800_ASIC2_KPIINTCLR = 0; /* Clear all KPIO interrupts */ | ||
| 812 | H3800_ASIC2_GPIINTCLR = 0; /* Clear all GPIO interrupts */ | ||
| 813 | |||
| 814 | // H3800_ASIC2_KPIINTCLR = 0xffff; /* Clear all KPIO interrupts */ | ||
| 815 | // H3800_ASIC2_GPIINTCLR = 0xffff; /* Clear all GPIO interrupts */ | ||
| 816 | |||
| 817 | H3800_ASIC2_CLOCK_Enable |= ASIC2_CLOCK_EX0; /* 32 kHZ crystal on */ | ||
| 818 | H3800_ASIC2_INTR_ClockPrescale |= ASIC2_INTCPS_SET; | ||
| 819 | H3800_ASIC2_INTR_ClockPrescale = ASIC2_INTCPS_CPS(0x0e) | ASIC2_INTCPS_SET; | ||
| 820 | H3800_ASIC2_INTR_TimerSet = 1; | ||
| 821 | |||
| 822 | #if 0 | ||
| 823 | for (i = 0; i < H3800_KPIO_IRQ_COUNT; i++) { | ||
| 824 | int irq = i + H3800_KPIO_IRQ_START; | ||
| 825 | irq_desc[irq].valid = 1; | ||
| 826 | irq_desc[irq].probe_ok = 1; | ||
| 827 | set_irq_chip(irq, &h3800_kpio_irqchip); | ||
| 828 | } | ||
| 829 | |||
| 830 | for (i = 0; i < H3800_GPIO_IRQ_COUNT; i++) { | ||
| 831 | int irq = i + H3800_GPIO_IRQ_START; | ||
| 832 | irq_desc[irq].valid = 1; | ||
| 833 | irq_desc[irq].probe_ok = 1; | ||
| 834 | set_irq_chip(irq, &h3800_gpio_irqchip); | ||
| 835 | } | ||
| 836 | #endif | ||
| 837 | set_irq_type(IRQ_GPIO_H3800_ASIC, IRQ_TYPE_EDGE_RISING); | ||
| 838 | set_irq_chained_handler(IRQ_GPIO_H3800_ASIC, h3800_IRQ_demux); | ||
| 839 | } | ||
| 840 | |||
| 841 | |||
| 842 | #define ASIC1_OUTPUTS 0x7fff /* First 15 bits are used */ | ||
| 843 | |||
| 844 | static void __init h3800_map_io(void) | ||
| 845 | { | ||
| 846 | h3xxx_map_io(); | ||
| 847 | |||
| 848 | /* Add wakeup on AC plug/unplug */ | ||
| 849 | PWER |= PWER_GPIO12; | ||
| 850 | |||
| 851 | /* Initialize h3800-specific values here */ | ||
| 852 | GPCR = 0x0fffffff; /* All outputs are set low by default */ | ||
| 853 | GAFR = GPIO_H3800_CLK_OUT | | ||
| 854 | GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 | | ||
| 855 | GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; | ||
| 856 | GPDR = GPIO_H3800_CLK_OUT | | ||
| 857 | GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK | | ||
| 858 | GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA | | ||
| 859 | GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 | | ||
| 860 | GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; | ||
| 861 | TUCR = TUCR_3_6864MHz; /* Seems to be used only for the Bluetooth UART */ | ||
| 862 | |||
| 863 | /* Fix the memory bus */ | ||
| 864 | MSC2 = (MSC2 & 0x0000ffff) | 0xE4510000; | ||
| 865 | |||
| 866 | /* Set up ASIC #1 */ | ||
| 867 | H3800_ASIC1_GPIO_DIR = ASIC1_OUTPUTS; /* All outputs */ | ||
| 868 | H3800_ASIC1_GPIO_MASK = ASIC1_OUTPUTS; /* No interrupts */ | ||
| 869 | H3800_ASIC1_GPIO_SLEEP_MASK = ASIC1_OUTPUTS; | ||
| 870 | H3800_ASIC1_GPIO_SLEEP_DIR = ASIC1_OUTPUTS; | ||
| 871 | H3800_ASIC1_GPIO_SLEEP_OUT = GPIO1_EAR_ON_N; | ||
| 872 | H3800_ASIC1_GPIO_BATT_FAULT_DIR = ASIC1_OUTPUTS; | ||
| 873 | H3800_ASIC1_GPIO_BATT_FAULT_OUT = GPIO1_EAR_ON_N; | ||
| 874 | |||
| 875 | H3800_ASIC1_GPIO_OUT = GPIO1_IR_ON_N | ||
| 876 | | GPIO1_RS232_ON | ||
| 877 | | GPIO1_EAR_ON_N; | ||
| 878 | |||
| 879 | /* Set up ASIC #2 */ | ||
| 880 | H3800_ASIC2_GPIOPIOD = GPIO2_IN_Y1_N | GPIO2_IN_X1_N; | ||
| 881 | H3800_ASIC2_GPOBFSTAT = GPIO2_IN_Y1_N | GPIO2_IN_X1_N; | ||
| 882 | |||
| 883 | H3800_ASIC2_GPIODIR = GPIO2_PEN_IRQ | ||
| 884 | | GPIO2_SD_DETECT | ||
| 885 | | GPIO2_EAR_IN_N | ||
| 886 | | GPIO2_USB_DETECT_N | ||
| 887 | | GPIO2_SD_CON_SLT; | ||
| 888 | |||
| 889 | /* TODO : Set sleep states & battery fault states */ | ||
| 890 | |||
| 891 | /* Clear VPP Enable */ | ||
| 892 | H3800_ASIC2_FlashWP_VPP_ON = 0; | ||
| 893 | ipaq_model_ops = h3800_model_ops; | ||
| 894 | } | ||
| 895 | |||
| 896 | MACHINE_START(H3800, "Compaq iPAQ H3800") | ||
| 897 | .phys_io = 0x80000000, | ||
| 898 | .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, | ||
| 899 | .boot_params = 0xc0000100, | ||
| 900 | .map_io = h3800_map_io, | ||
| 901 | .init_irq = h3800_init_irq, | ||
| 902 | .timer = &sa1100_timer, | ||
| 903 | .init_machine = h3xxx_mach_init, | ||
| 904 | MACHINE_END | ||
| 905 | |||
| 906 | #endif /* CONFIG_SA1100_H3800 */ | ||
diff --git a/arch/arm/mach-sa1100/include/mach/h3600.h b/arch/arm/mach-sa1100/include/mach/h3600.h index 9cc47fddb335..2827faa47421 100644 --- a/arch/arm/mach-sa1100/include/mach/h3600.h +++ b/arch/arm/mach-sa1100/include/mach/h3600.h | |||
| @@ -29,7 +29,7 @@ typedef int __bitwise pm_request_t; | |||
| 29 | #define PM_RESUME ((__force pm_request_t) 2) /* enter D0 */ | 29 | #define PM_RESUME ((__force pm_request_t) 2) /* enter D0 */ |
| 30 | 30 | ||
| 31 | /* generalized support for H3xxx series Compaq Pocket PC's */ | 31 | /* generalized support for H3xxx series Compaq Pocket PC's */ |
| 32 | #define machine_is_h3xxx() (machine_is_h3100() || machine_is_h3600() || machine_is_h3800()) | 32 | #define machine_is_h3xxx() (machine_is_h3100() || machine_is_h3600()) |
| 33 | 33 | ||
| 34 | /* Physical memory regions corresponding to chip selects */ | 34 | /* Physical memory regions corresponding to chip selects */ |
| 35 | #define H3600_EGPIO_PHYS (SA1100_CS5_PHYS + 0x01000000) | 35 | #define H3600_EGPIO_PHYS (SA1100_CS5_PHYS + 0x01000000) |
| @@ -93,76 +93,7 @@ enum ipaq_egpio_type { | |||
| 93 | IPAQ_EGPIO_LCD_ENABLE, /* Enable/disable LCD controller */ | 93 | IPAQ_EGPIO_LCD_ENABLE, /* Enable/disable LCD controller */ |
| 94 | }; | 94 | }; |
| 95 | 95 | ||
| 96 | struct ipaq_model_ops { | 96 | extern void (*assign_h3600_egpio)(enum ipaq_egpio_type x, int level); |
| 97 | const char *generic_name; | ||
| 98 | void (*control)(enum ipaq_egpio_type, int); | ||
| 99 | unsigned long (*read)(void); | ||
| 100 | void (*blank_callback)(int blank); | ||
| 101 | int (*pm_callback)(int req); /* Primary model callback */ | ||
| 102 | int (*pm_callback_aux)(int req); /* Secondary callback (used by HAL modules) */ | ||
| 103 | }; | ||
| 104 | |||
| 105 | extern struct ipaq_model_ops ipaq_model_ops; | ||
| 106 | |||
| 107 | static __inline__ const char * h3600_generic_name(void) | ||
| 108 | { | ||
| 109 | return ipaq_model_ops.generic_name; | ||
| 110 | } | ||
| 111 | |||
| 112 | static __inline__ void assign_h3600_egpio(enum ipaq_egpio_type x, int level) | ||
| 113 | { | ||
| 114 | if (ipaq_model_ops.control) | ||
| 115 | ipaq_model_ops.control(x,level); | ||
| 116 | } | ||
| 117 | |||
| 118 | static __inline__ void clr_h3600_egpio(enum ipaq_egpio_type x) | ||
| 119 | { | ||
| 120 | if (ipaq_model_ops.control) | ||
| 121 | ipaq_model_ops.control(x,0); | ||
| 122 | } | ||
| 123 | |||
| 124 | static __inline__ void set_h3600_egpio(enum ipaq_egpio_type x) | ||
| 125 | { | ||
| 126 | if (ipaq_model_ops.control) | ||
| 127 | ipaq_model_ops.control(x,1); | ||
| 128 | } | ||
| 129 | |||
| 130 | static __inline__ unsigned long read_h3600_egpio(void) | ||
| 131 | { | ||
| 132 | if (ipaq_model_ops.read) | ||
| 133 | return ipaq_model_ops.read(); | ||
| 134 | return 0; | ||
| 135 | } | ||
| 136 | |||
| 137 | static __inline__ int h3600_register_blank_callback(void (*f)(int)) | ||
| 138 | { | ||
| 139 | ipaq_model_ops.blank_callback = f; | ||
| 140 | return 0; | ||
| 141 | } | ||
| 142 | |||
| 143 | static __inline__ void h3600_unregister_blank_callback(void (*f)(int)) | ||
| 144 | { | ||
| 145 | ipaq_model_ops.blank_callback = NULL; | ||
| 146 | } | ||
| 147 | |||
| 148 | |||
| 149 | static __inline__ int h3600_register_pm_callback(int (*f)(int)) | ||
| 150 | { | ||
| 151 | ipaq_model_ops.pm_callback_aux = f; | ||
| 152 | return 0; | ||
| 153 | } | ||
| 154 | |||
| 155 | static __inline__ void h3600_unregister_pm_callback(int (*f)(int)) | ||
| 156 | { | ||
| 157 | ipaq_model_ops.pm_callback_aux = NULL; | ||
| 158 | } | ||
| 159 | |||
| 160 | static __inline__ int h3600_power_management(int req) | ||
| 161 | { | ||
| 162 | if (ipaq_model_ops.pm_callback) | ||
| 163 | return ipaq_model_ops.pm_callback(req); | ||
| 164 | return 0; | ||
| 165 | } | ||
| 166 | 97 | ||
| 167 | #endif /* ASSEMBLY */ | 98 | #endif /* ASSEMBLY */ |
| 168 | 99 | ||
diff --git a/arch/arm/mach-sa1100/include/mach/h3600_gpio.h b/arch/arm/mach-sa1100/include/mach/h3600_gpio.h index 62b0b7879685..a36ca76d018b 100644 --- a/arch/arm/mach-sa1100/include/mach/h3600_gpio.h +++ b/arch/arm/mach-sa1100/include/mach/h3600_gpio.h | |||
| @@ -48,22 +48,11 @@ | |||
| 48 | #define GPIO_H3600_OPT_LOCK GPIO_GPIO (22) | 48 | #define GPIO_H3600_OPT_LOCK GPIO_GPIO (22) |
| 49 | #define GPIO_H3600_OPT_DET GPIO_GPIO (27) | 49 | #define GPIO_H3600_OPT_DET GPIO_GPIO (27) |
| 50 | 50 | ||
| 51 | /* H3800 specific pins */ | ||
| 52 | #define GPIO_H3800_AC_IN GPIO_GPIO (12) | ||
| 53 | #define GPIO_H3800_COM_DSR GPIO_GPIO (13) | ||
| 54 | #define GPIO_H3800_MMC_INT GPIO_GPIO (18) | ||
| 55 | #define GPIO_H3800_NOPT_IND GPIO_GPIO (20) /* Almost exactly the same as GPIO_H3600_OPT_DET */ | ||
| 56 | #define GPIO_H3800_OPT_BAT_FAULT GPIO_GPIO (22) | ||
| 57 | #define GPIO_H3800_CLK_OUT GPIO_GPIO (27) | ||
| 58 | |||
| 59 | /****************************************************/ | 51 | /****************************************************/ |
| 60 | 52 | ||
| 61 | #define IRQ_GPIO_H3600_ACTION_BUTTON IRQ_GPIO18 | 53 | #define IRQ_GPIO_H3600_ACTION_BUTTON IRQ_GPIO18 |
| 62 | #define IRQ_GPIO_H3600_OPT_DET IRQ_GPIO27 | 54 | #define IRQ_GPIO_H3600_OPT_DET IRQ_GPIO27 |
| 63 | 55 | ||
| 64 | #define IRQ_GPIO_H3800_MMC_INT IRQ_GPIO18 | ||
| 65 | #define IRQ_GPIO_H3800_NOPT_IND IRQ_GPIO20 /* almost same as OPT_DET */ | ||
| 66 | |||
| 67 | /* H3100 / 3600 EGPIO pins */ | 56 | /* H3100 / 3600 EGPIO pins */ |
| 68 | #define EGPIO_H3600_VPP_ON (1 << 0) | 57 | #define EGPIO_H3600_VPP_ON (1 << 0) |
| 69 | #define EGPIO_H3600_CARD_RESET (1 << 1) /* reset the attached pcmcia/compactflash card. active high. */ | 58 | #define EGPIO_H3600_CARD_RESET (1 << 1) /* reset the attached pcmcia/compactflash card. active high. */ |
| @@ -84,457 +73,5 @@ | |||
| 84 | #define EGPIO_H3600_LCD_5V_ON (1 << 14) /* enable 5V to LCD. active high. */ | 73 | #define EGPIO_H3600_LCD_5V_ON (1 << 14) /* enable 5V to LCD. active high. */ |
| 85 | #define EGPIO_H3600_LVDD_ON (1 << 15) /* enable 9V and -6.5V to LCD. */ | 74 | #define EGPIO_H3600_LVDD_ON (1 << 15) /* enable 9V and -6.5V to LCD. */ |
| 86 | 75 | ||
| 87 | /********************* H3800, ASIC #2 ********************/ | ||
| 88 | |||
| 89 | #define _H3800_ASIC2_Base (H3600_EGPIO_VIRT) | ||
| 90 | #define H3800_ASIC2_OFFSET(s,x,y) \ | ||
| 91 | (*((volatile s *) (_H3800_ASIC2_Base + _H3800_ASIC2_ ## x ## _Base + _H3800_ASIC2_ ## x ## _ ## y))) | ||
| 92 | #define H3800_ASIC2_NOFFSET(s,x,n,y) \ | ||
| 93 | (*((volatile s *) (_H3800_ASIC2_Base + _H3800_ASIC2_ ## x ## _ ## n ## _Base + _H3800_ASIC2_ ## x ## _ ## y))) | ||
| 94 | |||
| 95 | #define _H3800_ASIC2_GPIO_Base 0x0000 | ||
| 96 | #define _H3800_ASIC2_GPIO_Direction 0x0000 /* R/W, 16 bits 1:input, 0:output */ | ||
| 97 | #define _H3800_ASIC2_GPIO_InterruptType 0x0004 /* R/W, 12 bits 1:edge, 0:level */ | ||
| 98 | #define _H3800_ASIC2_GPIO_InterruptEdgeType 0x0008 /* R/W, 12 bits 1:rising, 0:falling */ | ||
| 99 | #define _H3800_ASIC2_GPIO_InterruptLevelType 0x000C /* R/W, 12 bits 1:high, 0:low */ | ||
| 100 | #define _H3800_ASIC2_GPIO_InterruptClear 0x0010 /* W, 12 bits */ | ||
| 101 | #define _H3800_ASIC2_GPIO_InterruptFlag 0x0010 /* R, 12 bits - reads int status */ | ||
| 102 | #define _H3800_ASIC2_GPIO_Data 0x0014 /* R/W, 16 bits */ | ||
| 103 | #define _H3800_ASIC2_GPIO_BattFaultOut 0x0018 /* R/W, 16 bit - sets level on batt fault */ | ||
| 104 | #define _H3800_ASIC2_GPIO_InterruptEnable 0x001c /* R/W, 12 bits 1:enable interrupt */ | ||
| 105 | #define _H3800_ASIC2_GPIO_Alternate 0x003c /* R/W, 12+1 bits - set alternate functions */ | ||
| 106 | |||
| 107 | #define H3800_ASIC2_GPIO_Direction H3800_ASIC2_OFFSET( u16, GPIO, Direction ) | ||
| 108 | #define H3800_ASIC2_GPIO_InterruptType H3800_ASIC2_OFFSET( u16, GPIO, InterruptType ) | ||
| 109 | #define H3800_ASIC2_GPIO_InterruptEdgeType H3800_ASIC2_OFFSET( u16, GPIO, InterruptEdgeType ) | ||
| 110 | #define H3800_ASIC2_GPIO_InterruptLevelType H3800_ASIC2_OFFSET( u16, GPIO, InterruptLevelType ) | ||
| 111 | #define H3800_ASIC2_GPIO_InterruptClear H3800_ASIC2_OFFSET( u16, GPIO, InterruptClear ) | ||
| 112 | #define H3800_ASIC2_GPIO_InterruptFlag H3800_ASIC2_OFFSET( u16, GPIO, InterruptFlag ) | ||
| 113 | #define H3800_ASIC2_GPIO_Data H3800_ASIC2_OFFSET( u16, GPIO, Data ) | ||
| 114 | #define H3800_ASIC2_GPIO_BattFaultOut H3800_ASIC2_OFFSET( u16, GPIO, BattFaultOut ) | ||
| 115 | #define H3800_ASIC2_GPIO_InterruptEnable H3800_ASIC2_OFFSET( u16, GPIO, InterruptEnable ) | ||
| 116 | #define H3800_ASIC2_GPIO_Alternate H3800_ASIC2_OFFSET( u16, GPIO, Alternate ) | ||
| 117 | |||
| 118 | #define GPIO_H3800_ASIC2_IN_Y1_N (1 << 0) /* Output: Touchscreen Y1 */ | ||
| 119 | #define GPIO_H3800_ASIC2_IN_X0 (1 << 1) /* Output: Touchscreen X0 */ | ||
| 120 | #define GPIO_H3800_ASIC2_IN_Y0 (1 << 2) /* Output: Touchscreen Y0 */ | ||
| 121 | #define GPIO_H3800_ASIC2_IN_X1_N (1 << 3) /* Output: Touchscreen X1 */ | ||
| 122 | #define GPIO_H3800_ASIC2_BT_RST (1 << 4) /* Output: Bluetooth reset */ | ||
| 123 | #define GPIO_H3800_ASIC2_PEN_IRQ (1 << 5) /* Input : Pen down */ | ||
| 124 | #define GPIO_H3800_ASIC2_SD_DETECT (1 << 6) /* Input : SD detect */ | ||
| 125 | #define GPIO_H3800_ASIC2_EAR_IN_N (1 << 7) /* Input : Audio jack plug inserted */ | ||
| 126 | #define GPIO_H3800_ASIC2_OPT_PCM_RESET (1 << 8) /* Output: */ | ||
| 127 | #define GPIO_H3800_ASIC2_OPT_RESET (1 << 9) /* Output: */ | ||
| 128 | #define GPIO_H3800_ASIC2_USB_DETECT_N (1 << 10) /* Input : */ | ||
| 129 | #define GPIO_H3800_ASIC2_SD_CON_SLT (1 << 11) /* Input : */ | ||
| 130 | |||
| 131 | #define _H3800_ASIC2_KPIO_Base 0x0200 | ||
| 132 | #define _H3800_ASIC2_KPIO_Direction 0x0000 /* R/W, 12 bits 1:input, 0:output */ | ||
| 133 | #define _H3800_ASIC2_KPIO_InterruptType 0x0004 /* R/W, 12 bits 1:edge, 0:level */ | ||
| 134 | #define _H3800_ASIC2_KPIO_InterruptEdgeType 0x0008 /* R/W, 12 bits 1:rising, 0:falling */ | ||
| 135 | #define _H3800_ASIC2_KPIO_InterruptLevelType 0x000C /* R/W, 12 bits 1:high, 0:low */ | ||
| 136 | #define _H3800_ASIC2_KPIO_InterruptClear 0x0010 /* W, 20 bits - 8 special */ | ||
| 137 | #define _H3800_ASIC2_KPIO_InterruptFlag 0x0010 /* R, 20 bits - 8 special - reads int status */ | ||
| 138 | #define _H3800_ASIC2_KPIO_Data 0x0014 /* R/W, 16 bits */ | ||
| 139 | #define _H3800_ASIC2_KPIO_BattFaultOut 0x0018 /* R/W, 16 bit - sets level on batt fault */ | ||
| 140 | #define _H3800_ASIC2_KPIO_InterruptEnable 0x001c /* R/W, 20 bits - 8 special */ | ||
| 141 | #define _H3800_ASIC2_KPIO_Alternate 0x003c /* R/W, 6 bits */ | ||
| 142 | |||
| 143 | #define H3800_ASIC2_KPIO_Direction H3800_ASIC2_OFFSET( u16, KPIO, Direction ) | ||
| 144 | #define H3800_ASIC2_KPIO_InterruptType H3800_ASIC2_OFFSET( u16, KPIO, InterruptType ) | ||
| 145 | #define H3800_ASIC2_KPIO_InterruptEdgeType H3800_ASIC2_OFFSET( u16, KPIO, InterruptEdgeType ) | ||
| 146 | #define H3800_ASIC2_KPIO_InterruptLevelType H3800_ASIC2_OFFSET( u16, KPIO, InterruptLevelType ) | ||
| 147 | #define H3800_ASIC2_KPIO_InterruptClear H3800_ASIC2_OFFSET( u32, KPIO, InterruptClear ) | ||
| 148 | #define H3800_ASIC2_KPIO_InterruptFlag H3800_ASIC2_OFFSET( u32, KPIO, InterruptFlag ) | ||
| 149 | #define H3800_ASIC2_KPIO_Data H3800_ASIC2_OFFSET( u16, KPIO, Data ) | ||
| 150 | #define H3800_ASIC2_KPIO_BattFaultOut H3800_ASIC2_OFFSET( u16, KPIO, BattFaultOut ) | ||
| 151 | #define H3800_ASIC2_KPIO_InterruptEnable H3800_ASIC2_OFFSET( u32, KPIO, InterruptEnable ) | ||
| 152 | #define H3800_ASIC2_KPIO_Alternate H3800_ASIC2_OFFSET( u16, KPIO, Alternate ) | ||
| 153 | |||
| 154 | #define H3800_ASIC2_KPIO_SPI_INT ( 1 << 16 ) | ||
| 155 | #define H3800_ASIC2_KPIO_OWM_INT ( 1 << 17 ) | ||
| 156 | #define H3800_ASIC2_KPIO_ADC_INT ( 1 << 18 ) | ||
| 157 | #define H3800_ASIC2_KPIO_UART_0_INT ( 1 << 19 ) | ||
| 158 | #define H3800_ASIC2_KPIO_UART_1_INT ( 1 << 20 ) | ||
| 159 | #define H3800_ASIC2_KPIO_TIMER_0_INT ( 1 << 21 ) | ||
| 160 | #define H3800_ASIC2_KPIO_TIMER_1_INT ( 1 << 22 ) | ||
| 161 | #define H3800_ASIC2_KPIO_TIMER_2_INT ( 1 << 23 ) | ||
| 162 | |||
| 163 | #define KPIO_H3800_ASIC2_RECORD_BTN_N (1 << 0) /* Record button */ | ||
| 164 | #define KPIO_H3800_ASIC2_KEY_5W1_N (1 << 1) /* Keypad */ | ||
| 165 | #define KPIO_H3800_ASIC2_KEY_5W2_N (1 << 2) /* */ | ||
| 166 | #define KPIO_H3800_ASIC2_KEY_5W3_N (1 << 3) /* */ | ||
| 167 | #define KPIO_H3800_ASIC2_KEY_5W4_N (1 << 4) /* */ | ||
| 168 | #define KPIO_H3800_ASIC2_KEY_5W5_N (1 << 5) /* */ | ||
| 169 | #define KPIO_H3800_ASIC2_KEY_LEFT_N (1 << 6) /* */ | ||
| 170 | #define KPIO_H3800_ASIC2_KEY_RIGHT_N (1 << 7) /* */ | ||
| 171 | #define KPIO_H3800_ASIC2_KEY_AP1_N (1 << 8) /* Old "Calendar" */ | ||
| 172 | #define KPIO_H3800_ASIC2_KEY_AP2_N (1 << 9) /* Old "Schedule" */ | ||
| 173 | #define KPIO_H3800_ASIC2_KEY_AP3_N (1 << 10) /* Old "Q" */ | ||
| 174 | #define KPIO_H3800_ASIC2_KEY_AP4_N (1 << 11) /* Old "Undo" */ | ||
| 175 | |||
| 176 | /* Alternate KPIO functions (set by default) */ | ||
| 177 | #define KPIO_ALT_H3800_ASIC2_KEY_5W1_N (1 << 1) /* Action key */ | ||
| 178 | #define KPIO_ALT_H3800_ASIC2_KEY_5W2_N (1 << 2) /* J1 of keypad input */ | ||
| 179 | #define KPIO_ALT_H3800_ASIC2_KEY_5W3_N (1 << 3) /* J2 of keypad input */ | ||
| 180 | #define KPIO_ALT_H3800_ASIC2_KEY_5W4_N (1 << 4) /* J3 of keypad input */ | ||
| 181 | #define KPIO_ALT_H3800_ASIC2_KEY_5W5_N (1 << 5) /* J4 of keypad input */ | ||
| 182 | |||
| 183 | #define _H3800_ASIC2_SPI_Base 0x0400 | ||
| 184 | #define _H3800_ASIC2_SPI_Control 0x0000 /* R/W 8 bits */ | ||
| 185 | #define _H3800_ASIC2_SPI_Data 0x0004 /* R/W 8 bits */ | ||
| 186 | #define _H3800_ASIC2_SPI_ChipSelectDisabled 0x0008 /* W 8 bits */ | ||
| 187 | |||
| 188 | #define H3800_ASIC2_SPI_Control H3800_ASIC2_OFFSET( u8, SPI, Control ) | ||
| 189 | #define H3800_ASIC2_SPI_Data H3800_ASIC2_OFFSET( u8, SPI, Data ) | ||
| 190 | #define H3800_ASIC2_SPI_ChipSelectDisabled H3800_ASIC2_OFFSET( u8, SPI, ChipSelectDisabled ) | ||
| 191 | |||
| 192 | #define _H3800_ASIC2_PWM_0_Base 0x0600 | ||
| 193 | #define _H3800_ASIC2_PWM_1_Base 0x0700 | ||
| 194 | #define _H3800_ASIC2_PWM_TimeBase 0x0000 /* R/W 6 bits */ | ||
| 195 | #define _H3800_ASIC2_PWM_PeriodTime 0x0004 /* R/W 12 bits */ | ||
| 196 | #define _H3800_ASIC2_PWM_DutyTime 0x0008 /* R/W 12 bits */ | ||
| 197 | |||
| 198 | #define H3800_ASIC2_PWM_0_TimeBase H3800_ASIC2_NOFFSET( u8, PWM, 0, TimeBase ) | ||
| 199 | #define H3800_ASIC2_PWM_0_PeriodTime H3800_ASIC2_NOFFSET( u16, PWM, 0, PeriodTime ) | ||
| 200 | #define H3800_ASIC2_PWM_0_DutyTime H3800_ASIC2_NOFFSET( u16, PWM, 0, DutyTime ) | ||
| 201 | |||
| 202 | #define H3800_ASIC2_PWM_1_TimeBase H3800_ASIC2_NOFFSET( u8, PWM, 1, TimeBase ) | ||
| 203 | #define H3800_ASIC2_PWM_1_PeriodTime H3800_ASIC2_NOFFSET( u16, PWM, 1, PeriodTime ) | ||
| 204 | #define H3800_ASIC2_PWM_1_DutyTime H3800_ASIC2_NOFFSET( u16, PWM, 1, DutyTime ) | ||
| 205 | |||
| 206 | #define H3800_ASIC2_PWM_TIMEBASE_MASK 0xf /* Low 4 bits sets time base, max = 8 */ | ||
| 207 | #define H3800_ASIC2_PWM_TIMEBASE_ENABLE ( 1 << 4 ) /* Enable clock */ | ||
| 208 | #define H3800_ASIC2_PWM_TIMEBASE_CLEAR ( 1 << 5 ) /* Clear the PWM */ | ||
| 209 | |||
| 210 | #define _H3800_ASIC2_LED_0_Base 0x0800 | ||
| 211 | #define _H3800_ASIC2_LED_1_Base 0x0880 | ||
| 212 | #define _H3800_ASIC2_LED_2_Base 0x0900 | ||
| 213 | #define _H3800_ASIC2_LED_TimeBase 0x0000 /* R/W 7 bits */ | ||
| 214 | #define _H3800_ASIC2_LED_PeriodTime 0x0004 /* R/W 12 bits */ | ||
| 215 | #define _H3800_ASIC2_LED_DutyTime 0x0008 /* R/W 12 bits */ | ||
| 216 | #define _H3800_ASIC2_LED_AutoStopCount 0x000c /* R/W 16 bits */ | ||
| 217 | |||
| 218 | #define H3800_ASIC2_LED_0_TimeBase H3800_ASIC2_NOFFSET( u8, LED, 0, TimeBase ) | ||
| 219 | #define H3800_ASIC2_LED_0_PeriodTime H3800_ASIC2_NOFFSET( u16, LED, 0, PeriodTime ) | ||
| 220 | #define H3800_ASIC2_LED_0_DutyTime H3800_ASIC2_NOFFSET( u16, LED, 0, DutyTime ) | ||
| 221 | #define H3800_ASIC2_LED_0_AutoStopClock H3800_ASIC2_NOFFSET( u16, LED, 0, AutoStopClock ) | ||
| 222 | |||
| 223 | #define H3800_ASIC2_LED_1_TimeBase H3800_ASIC2_NOFFSET( u8, LED, 1, TimeBase ) | ||
| 224 | #define H3800_ASIC2_LED_1_PeriodTime H3800_ASIC2_NOFFSET( u16, LED, 1, PeriodTime ) | ||
| 225 | #define H3800_ASIC2_LED_1_DutyTime H3800_ASIC2_NOFFSET( u16, LED, 1, DutyTime ) | ||
| 226 | #define H3800_ASIC2_LED_1_AutoStopClock H3800_ASIC2_NOFFSET( u16, LED, 1, AutoStopClock ) | ||
| 227 | |||
| 228 | #define H3800_ASIC2_LED_2_TimeBase H3800_ASIC2_NOFFSET( u8, LED, 2, TimeBase ) | ||
| 229 | #define H3800_ASIC2_LED_2_PeriodTime H3800_ASIC2_NOFFSET( u16, LED, 2, PeriodTime ) | ||
| 230 | #define H3800_ASIC2_LED_2_DutyTime H3800_ASIC2_NOFFSET( u16, LED, 2, DutyTime ) | ||
| 231 | #define H3800_ASIC2_LED_2_AutoStopClock H3800_ASIC2_NOFFSET( u16, LED, 2, AutoStopClock ) | ||
| 232 | |||
| 233 | #define H3800_ASIC2_LED_TIMEBASE_MASK 0x0f /* Low 4 bits sets time base, max = 13 */ | ||
| 234 | #define H3800_ASIC2_LED_TIMEBASE_BLINK ( 1 << 4 ) /* Enable blinking */ | ||
| 235 | #define H3800_ASIC2_LED_TIMEBASE_AUTOSTOP ( 1 << 5 ) | ||
| 236 | #define H3800_ASIC2_LED_TIMEBASE_ALWAYS ( 1 << 6 ) /* Enable blink always */ | ||
| 237 | |||
| 238 | #define _H3800_ASIC2_UART_0_Base 0x0A00 | ||
| 239 | #define _H3800_ASIC2_UART_1_Base 0x0C00 | ||
| 240 | #define _H3800_ASIC2_UART_Receive 0x0000 /* R 8 bits */ | ||
| 241 | #define _H3800_ASIC2_UART_Transmit 0x0000 /* W 8 bits */ | ||
| 242 | #define _H3800_ASIC2_UART_IntEnable 0x0004 /* R/W 8 bits */ | ||
| 243 | #define _H3800_ASIC2_UART_IntVerify 0x0008 /* R/W 8 bits */ | ||
| 244 | #define _H3800_ASIC2_UART_FIFOControl 0x000c /* R/W 8 bits */ | ||
| 245 | #define _H3800_ASIC2_UART_LineControl 0x0010 /* R/W 8 bits */ | ||
| 246 | #define _H3800_ASIC2_UART_ModemStatus 0x0014 /* R/W 8 bits */ | ||
| 247 | #define _H3800_ASIC2_UART_LineStatus 0x0018 /* R/W 8 bits */ | ||
| 248 | #define _H3800_ASIC2_UART_ScratchPad 0x001c /* R/W 8 bits */ | ||
| 249 | #define _H3800_ASIC2_UART_DivisorLatchL 0x0020 /* R/W 8 bits */ | ||
| 250 | #define _H3800_ASIC2_UART_DivisorLatchH 0x0024 /* R/W 8 bits */ | ||
| 251 | |||
| 252 | #define H3800_ASIC2_UART_0_Receive H3800_ASIC2_NOFFSET( u8, UART, 0, Receive ) | ||
| 253 | #define H3800_ASIC2_UART_0_Transmit H3800_ASIC2_NOFFSET( u8, UART, 0, Transmit ) | ||
| 254 | #define H3800_ASIC2_UART_0_IntEnable H3800_ASIC2_NOFFSET( u8, UART, 0, IntEnable ) | ||
| 255 | #define H3800_ASIC2_UART_0_IntVerify H3800_ASIC2_NOFFSET( u8, UART, 0, IntVerify ) | ||
| 256 | #define H3800_ASIC2_UART_0_FIFOControl H3800_ASIC2_NOFFSET( u8, UART, 0, FIFOControl ) | ||
| 257 | #define H3800_ASIC2_UART_0_LineControl H3800_ASIC2_NOFFSET( u8, UART, 0, LineControl ) | ||
| 258 | #define H3800_ASIC2_UART_0_ModemStatus H3800_ASIC2_NOFFSET( u8, UART, 0, ModemStatus ) | ||
| 259 | #define H3800_ASIC2_UART_0_LineStatus H3800_ASIC2_NOFFSET( u8, UART, 0, LineStatus ) | ||
| 260 | #define H3800_ASIC2_UART_0_ScratchPad H3800_ASIC2_NOFFSET( u8, UART, 0, ScratchPad ) | ||
| 261 | #define H3800_ASIC2_UART_0_DivisorLatchL H3800_ASIC2_NOFFSET( u8, UART, 0, DivisorLatchL ) | ||
| 262 | #define H3800_ASIC2_UART_0_DivisorLatchH H3800_ASIC2_NOFFSET( u8, UART, 0, DivisorLatchH ) | ||
| 263 | |||
| 264 | #define H3800_ASIC2_UART_1_Receive H3800_ASIC2_NOFFSET( u8, UART, 1, Receive ) | ||
| 265 | #define H3800_ASIC2_UART_1_Transmit H3800_ASIC2_NOFFSET( u8, UART, 1, Transmit ) | ||
| 266 | #define H3800_ASIC2_UART_1_IntEnable H3800_ASIC2_NOFFSET( u8, UART, 1, IntEnable ) | ||
| 267 | #define H3800_ASIC2_UART_1_IntVerify H3800_ASIC2_NOFFSET( u8, UART, 1, IntVerify ) | ||
| 268 | #define H3800_ASIC2_UART_1_FIFOControl H3800_ASIC2_NOFFSET( u8, UART, 1, FIFOControl ) | ||
| 269 | #define H3800_ASIC2_UART_1_LineControl H3800_ASIC2_NOFFSET( u8, UART, 1, LineControl ) | ||
| 270 | #define H3800_ASIC2_UART_1_ModemStatus H3800_ASIC2_NOFFSET( u8, UART, 1, ModemStatus ) | ||
| 271 | #define H3800_ASIC2_UART_1_LineStatus H3800_ASIC2_NOFFSET( u8, UART, 1, LineStatus ) | ||
| 272 | #define H3800_ASIC2_UART_1_ScratchPad H3800_ASIC2_NOFFSET( u8, UART, 1, ScratchPad ) | ||
| 273 | #define H3800_ASIC2_UART_1_DivisorLatchL H3800_ASIC2_NOFFSET( u8, UART, 1, DivisorLatchL ) | ||
| 274 | #define H3800_ASIC2_UART_1_DivisorLatchH H3800_ASIC2_NOFFSET( u8, UART, 1, DivisorLatchH ) | ||
| 275 | |||
| 276 | #define _H3800_ASIC2_TIMER_Base 0x0E00 | ||
| 277 | #define _H3800_ASIC2_TIMER_Command 0x0000 /* R/W 8 bits */ | ||
| 278 | |||
| 279 | #define H3800_ASIC2_TIMER_Command H3800_ASIC2_OFFSET( u8, Timer, Command ) | ||
| 280 | |||
| 281 | #define H3800_ASIC2_TIMER_GAT_0 ( 1 << 0 ) /* Gate enable, counter 0 */ | ||
| 282 | #define H3800_ASIC2_TIMER_GAT_1 ( 1 << 1 ) /* Gate enable, counter 1 */ | ||
| 283 | #define H3800_ASIC2_TIMER_GAT_2 ( 1 << 2 ) /* Gate enable, counter 2 */ | ||
| 284 | #define H3800_ASIC2_TIMER_CLK_0 ( 1 << 3 ) /* Clock enable, counter 0 */ | ||
| 285 | #define H3800_ASIC2_TIMER_CLK_1 ( 1 << 4 ) /* Clock enable, counter 1 */ | ||
| 286 | #define H3800_ASIC2_TIMER_CLK_2 ( 1 << 5 ) /* Clock enable, counter 2 */ | ||
| 287 | #define H3800_ASIC2_TIMER_MODE_0 ( 1 << 6 ) /* Mode 0 enable, counter 0 */ | ||
| 288 | #define H3800_ASIC2_TIMER_MODE_1 ( 1 << 7 ) /* Mode 0 enable, counter 1 */ | ||
| 289 | |||
| 290 | #define _H3800_ASIC2_CLOCK_Base 0x1000 | ||
| 291 | #define _H3800_ASIC2_CLOCK_Enable 0x0000 /* R/W 18 bits */ | ||
| 292 | |||
| 293 | #define H3800_ASIC2_CLOCK_Enable H3800_ASIC2_OFFSET( u32, CLOCK, Enable ) | ||
| 294 | |||
| 295 | #define H3800_ASIC2_CLOCK_AUDIO_1 0x0001 /* Enable 4.1 MHz clock for 8Khz and 4khz sample rate */ | ||
| 296 | #define H3800_ASIC2_CLOCK_AUDIO_2 0x0002 /* Enable 12.3 MHz clock for 48Khz and 32khz sample rate */ | ||
| 297 | #define H3800_ASIC2_CLOCK_AUDIO_3 0x0004 /* Enable 5.6 MHz clock for 11 kHZ sample rate */ | ||
| 298 | #define H3800_ASIC2_CLOCK_AUDIO_4 0x0008 /* Enable 11.289 MHz clock for 44 and 22 kHz sample rate */ | ||
| 299 | #define H3800_ASIC2_CLOCK_ADC ( 1 << 4 ) /* 1.024 MHz clock to ADC */ | ||
| 300 | #define H3800_ASIC2_CLOCK_SPI ( 1 << 5 ) /* 4.096 MHz clock to SPI */ | ||
| 301 | #define H3800_ASIC2_CLOCK_OWM ( 1 << 6 ) /* 4.096 MHz clock to OWM */ | ||
| 302 | #define H3800_ASIC2_CLOCK_PWM ( 1 << 7 ) /* 2.048 MHz clock to PWM */ | ||
| 303 | #define H3800_ASIC2_CLOCK_UART_1 ( 1 << 8 ) /* 24.576 MHz clock to UART1 (turn off bit 16) */ | ||
| 304 | #define H3800_ASIC2_CLOCK_UART_0 ( 1 << 9 ) /* 24.576 MHz clock to UART0 (turn off bit 17) */ | ||
| 305 | #define H3800_ASIC2_CLOCK_SD_1 ( 1 << 10 ) /* 16.934 MHz to SD */ | ||
| 306 | #define H3800_ASIC2_CLOCK_SD_2 ( 2 << 10 ) /* 24.576 MHz to SD */ | ||
| 307 | #define H3800_ASIC2_CLOCK_SD_3 ( 3 << 10 ) /* 33.869 MHz to SD */ | ||
| 308 | #define H3800_ASIC2_CLOCK_SD_4 ( 4 << 10 ) /* 49.152 MHz to SD */ | ||
| 309 | #define H3800_ASIC2_CLOCK_EX0 ( 1 << 13 ) /* Enable 32.768 kHz crystal */ | ||
| 310 | #define H3800_ASIC2_CLOCK_EX1 ( 1 << 14 ) /* Enable 24.576 MHz crystal */ | ||
| 311 | #define H3800_ASIC2_CLOCK_EX2 ( 1 << 15 ) /* Enable 33.869 MHz crystal */ | ||
| 312 | #define H3800_ASIC2_CLOCK_SLOW_UART_1 ( 1 << 16 ) /* Enable 3.686 MHz to UART1 (turn off bit 8) */ | ||
| 313 | #define H3800_ASIC2_CLOCK_SLOW_UART_0 ( 1 << 17 ) /* Enable 3.686 MHz to UART0 (turn off bit 9) */ | ||
| 314 | |||
| 315 | #define _H3800_ASIC2_ADC_Base 0x1200 | ||
| 316 | #define _H3800_ASIC2_ADC_Multiplexer 0x0000 /* R/W 4 bits - low 3 bits set channel */ | ||
| 317 | #define _H3800_ASIC2_ADC_ControlStatus 0x0004 /* R/W 8 bits */ | ||
| 318 | #define _H3800_ASIC2_ADC_Data 0x0008 /* R 10 bits */ | ||
| 319 | |||
| 320 | #define H3800_ASIC2_ADC_Multiplexer H3800_ASIC2_OFFSET( u8, ADC, Multiplexer ) | ||
| 321 | #define H3800_ASIC2_ADC_ControlStatus H3800_ASIC2_OFFSET( u8, ADC, ControlStatus ) | ||
| 322 | #define H3800_ASIC2_ADC_Data H3800_ASIC2_OFFSET( u16, ADC, Data ) | ||
| 323 | |||
| 324 | #define H3600_ASIC2_ADC_MUX_CHANNEL_MASK 0x07 /* Low 3 bits sets channel. max = 4 */ | ||
| 325 | #define H3600_ASIC2_ADC_MUX_CLKEN ( 1 << 3 ) /* Enable clock */ | ||
| 326 | |||
| 327 | #define H3600_ASIC2_ADC_CSR_ADPS_MASK 0x0f /* Low 4 bits sets prescale, max = 8 */ | ||
| 328 | #define H3600_ASIC2_ADC_CSR_FREE_RUN ( 1 << 4 ) | ||
| 329 | #define H3600_ASIC2_ADC_CSR_INT_ENABLE ( 1 << 5 ) | ||
| 330 | #define H3600_ASIC2_ADC_CSR_START ( 1 << 6 ) /* Set to start conversion. Goes to 0 when done */ | ||
| 331 | #define H3600_ASIC2_ADC_CSR_ENABLE ( 1 << 7 ) /* 1:power up ADC, 0:power down */ | ||
| 332 | |||
| 333 | |||
| 334 | #define _H3800_ASIC2_INTR_Base 0x1600 | ||
| 335 | #define _H3800_ASIC2_INTR_MaskAndFlag 0x0000 /* R/(W) 8bits */ | ||
| 336 | #define _H3800_ASIC2_INTR_ClockPrescale 0x0004 /* R/(W) 5bits */ | ||
| 337 | #define _H3800_ASIC2_INTR_TimerSet 0x0008 /* R/(W) 8bits */ | ||
| 338 | |||
| 339 | #define H3800_ASIC2_INTR_MaskAndFlag H3800_ASIC2_OFFSET( u8, INTR, MaskAndFlag ) | ||
| 340 | #define H3800_ASIC2_INTR_ClockPrescale H3800_ASIC2_OFFSET( u8, INTR, ClockPrescale ) | ||
| 341 | #define H3800_ASIC2_INTR_TimerSet H3800_ASIC2_OFFSET( u8, INTR, TimerSet ) | ||
| 342 | |||
| 343 | #define H3800_ASIC2_INTR_GLOBAL_MASK ( 1 << 0 ) /* Global interrupt mask */ | ||
| 344 | #define H3800_ASIC2_INTR_POWER_ON_RESET ( 1 << 1 ) /* 01: Power on reset (bits 1 & 2 ) */ | ||
| 345 | #define H3800_ASIC2_INTR_EXTERNAL_RESET ( 2 << 1 ) /* 10: External reset (bits 1 & 2 ) */ | ||
| 346 | #define H3800_ASIC2_INTR_MASK_UART_0 ( 1 << 4 ) | ||
| 347 | #define H3800_ASIC2_INTR_MASK_UART_1 ( 1 << 5 ) | ||
| 348 | #define H3800_ASIC2_INTR_MASK_TIMER ( 1 << 6 ) | ||
| 349 | #define H3800_ASIC2_INTR_MASK_OWM ( 1 << 7 ) | ||
| 350 | |||
| 351 | #define H3800_ASIC2_INTR_CLOCK_PRESCALE 0x0f /* 4 bits, max 14 */ | ||
| 352 | #define H3800_ASIC2_INTR_SET ( 1 << 4 ) /* Time base enable */ | ||
| 353 | |||
| 354 | |||
| 355 | #define _H3800_ASIC2_OWM_Base 0x1800 | ||
| 356 | #define _H3800_ASIC2_OWM_Command 0x0000 /* R/W 4 bits command register */ | ||
| 357 | #define _H3800_ASIC2_OWM_Data 0x0004 /* R/W 8 bits, transmit / receive buffer */ | ||
| 358 | #define _H3800_ASIC2_OWM_Interrupt 0x0008 /* R/W Command register */ | ||
| 359 | #define _H3800_ASIC2_OWM_InterruptEnable 0x000c /* R/W Command register */ | ||
| 360 | #define _H3800_ASIC2_OWM_ClockDivisor 0x0010 /* R/W 5 bits of divisor and pre-scale */ | ||
| 361 | |||
| 362 | #define H3800_ASIC2_OWM_Command H3800_ASIC2_OFFSET( u8, OWM, Command ) | ||
| 363 | #define H3800_ASIC2_OWM_Data H3800_ASIC2_OFFSET( u8, OWM, Data ) | ||
| 364 | #define H3800_ASIC2_OWM_Interrupt H3800_ASIC2_OFFSET( u8, OWM, Interrupt ) | ||
| 365 | #define H3800_ASIC2_OWM_InterruptEnable H3800_ASIC2_OFFSET( u8, OWM, InterruptEnable ) | ||
| 366 | #define H3800_ASIC2_OWM_ClockDivisor H3800_ASIC2_OFFSET( u8, OWM, ClockDivisor ) | ||
| 367 | |||
| 368 | #define H3800_ASIC2_OWM_CMD_ONE_WIRE_RESET ( 1 << 0 ) /* Set to force reset on 1-wire bus */ | ||
| 369 | #define H3800_ASIC2_OWM_CMD_SRA ( 1 << 1 ) /* Set to switch to Search ROM accelerator mode */ | ||
| 370 | #define H3800_ASIC2_OWM_CMD_DQ_OUTPUT ( 1 << 2 ) /* Write only - forces bus low */ | ||
| 371 | #define H3800_ASIC2_OWM_CMD_DQ_INPUT ( 1 << 3 ) /* Read only - reflects state of bus */ | ||
| 372 | |||
| 373 | #define H3800_ASIC2_OWM_INT_PD ( 1 << 0 ) /* Presence detect */ | ||
| 374 | #define H3800_ASIC2_OWM_INT_PDR ( 1 << 1 ) /* Presence detect result */ | ||
| 375 | #define H3800_ASIC2_OWM_INT_TBE ( 1 << 2 ) /* Transmit buffer empty */ | ||
| 376 | #define H3800_ASIC2_OWM_INT_TEMT ( 1 << 3 ) /* Transmit shift register empty */ | ||
| 377 | #define H3800_ASIC2_OWM_INT_RBF ( 1 << 4 ) /* Receive buffer full */ | ||
| 378 | |||
| 379 | #define H3800_ASIC2_OWM_INTEN_EPD ( 1 << 0 ) /* Enable receive buffer full interrupt */ | ||
| 380 | #define H3800_ASIC2_OWM_INTEN_IAS ( 1 << 1 ) /* Enable transmit shift register empty interrupt */ | ||
| 381 | #define H3800_ASIC2_OWM_INTEN_ETBE ( 1 << 2 ) /* Enable transmit buffer empty interrupt */ | ||
| 382 | #define H3800_ASIC2_OWM_INTEN_ETMT ( 1 << 3 ) /* INTR active state */ | ||
| 383 | #define H3800_ASIC2_OWM_INTEN_ERBF ( 1 << 4 ) /* Enable presence detect interrupt */ | ||
| 384 | |||
| 385 | #define _H3800_ASIC2_FlashCtl_Base 0x1A00 | ||
| 386 | |||
| 387 | /****************************************************/ | ||
| 388 | /* H3800, ASIC #1 | ||
| 389 | * This ASIC is accesed through ASIC #2, and | ||
| 390 | * mapped into the 1c00 - 1f00 region | ||
| 391 | */ | ||
| 392 | |||
| 393 | #define H3800_ASIC1_OFFSET(s,x,y) \ | ||
| 394 | (*((volatile s *) (_H3800_ASIC2_Base + _H3800_ASIC1_ ## x ## _Base + (_H3800_ASIC1_ ## x ## _ ## y << 1)))) | ||
| 395 | |||
| 396 | #define _H3800_ASIC1_MMC_Base 0x1c00 | ||
| 397 | |||
| 398 | #define _H3800_ASIC1_MMC_StartStopClock 0x00 /* R/W 8bit */ | ||
| 399 | #define _H3800_ASIC1_MMC_Status 0x02 /* R See below, default 0x0040 */ | ||
| 400 | #define _H3800_ASIC1_MMC_ClockRate 0x04 /* R/W 8bit, low 3 bits are clock divisor */ | ||
| 401 | #define _H3800_ASIC1_MMC_SPIRegister 0x08 /* R/W 8bit, see below */ | ||
| 402 | #define _H3800_ASIC1_MMC_CmdDataCont 0x0a /* R/W 8bit, write to start MMC adapter */ | ||
| 403 | #define _H3800_ASIC1_MMC_ResponseTimeout 0x0c /* R/W 8bit, clocks before response timeout */ | ||
| 404 | #define _H3800_ASIC1_MMC_ReadTimeout 0x0e /* R/W 16bit, clocks before received data timeout */ | ||
| 405 | #define _H3800_ASIC1_MMC_BlockLength 0x10 /* R/W 10bit */ | ||
| 406 | #define _H3800_ASIC1_MMC_NumOfBlocks 0x12 /* R/W 16bit, in block mode, number of blocks */ | ||
| 407 | #define _H3800_ASIC1_MMC_InterruptMask 0x1a /* R/W 8bit */ | ||
| 408 | #define _H3800_ASIC1_MMC_CommandNumber 0x1c /* R/W 6 bits */ | ||
| 409 | #define _H3800_ASIC1_MMC_ArgumentH 0x1e /* R/W 16 bits */ | ||
| 410 | #define _H3800_ASIC1_MMC_ArgumentL 0x20 /* R/W 16 bits */ | ||
| 411 | #define _H3800_ASIC1_MMC_ResFifo 0x22 /* R 8 x 16 bits - contains response FIFO */ | ||
| 412 | #define _H3800_ASIC1_MMC_BufferPartFull 0x28 /* R/W 8 bits */ | ||
| 413 | |||
| 414 | #define H3800_ASIC1_MMC_StartStopClock H3800_ASIC1_OFFSET( u8, MMC, StartStopClock ) | ||
| 415 | #define H3800_ASIC1_MMC_Status H3800_ASIC1_OFFSET( u16, MMC, Status ) | ||
| 416 | #define H3800_ASIC1_MMC_ClockRate H3800_ASIC1_OFFSET( u8, MMC, ClockRate ) | ||
| 417 | #define H3800_ASIC1_MMC_SPIRegister H3800_ASIC1_OFFSET( u8, MMC, SPIRegister ) | ||
| 418 | #define H3800_ASIC1_MMC_CmdDataCont H3800_ASIC1_OFFSET( u8, MMC, CmdDataCont ) | ||
| 419 | #define H3800_ASIC1_MMC_ResponseTimeout H3800_ASIC1_OFFSET( u8, MMC, ResponseTimeout ) | ||
| 420 | #define H3800_ASIC1_MMC_ReadTimeout H3800_ASIC1_OFFSET( u16, MMC, ReadTimeout ) | ||
| 421 | #define H3800_ASIC1_MMC_BlockLength H3800_ASIC1_OFFSET( u16, MMC, BlockLength ) | ||
| 422 | #define H3800_ASIC1_MMC_NumOfBlocks H3800_ASIC1_OFFSET( u16, MMC, NumOfBlocks ) | ||
| 423 | #define H3800_ASIC1_MMC_InterruptMask H3800_ASIC1_OFFSET( u8, MMC, InterruptMask ) | ||
| 424 | #define H3800_ASIC1_MMC_CommandNumber H3800_ASIC1_OFFSET( u8, MMC, CommandNumber ) | ||
| 425 | #define H3800_ASIC1_MMC_ArgumentH H3800_ASIC1_OFFSET( u16, MMC, ArgumentH ) | ||
| 426 | #define H3800_ASIC1_MMC_ArgumentL H3800_ASIC1_OFFSET( u16, MMC, ArgumentL ) | ||
| 427 | #define H3800_ASIC1_MMC_ResFifo H3800_ASIC1_OFFSET( u16, MMC, ResFifo ) | ||
| 428 | #define H3800_ASIC1_MMC_BufferPartFull H3800_ASIC1_OFFSET( u8, MMC, BufferPartFull ) | ||
| 429 | |||
| 430 | #define H3800_ASIC1_MMC_STOP_CLOCK (1 << 0) /* Write to "StartStopClock" register */ | ||
| 431 | #define H3800_ASIC1_MMC_START_CLOCK (1 << 1) | ||
| 432 | |||
| 433 | #define H3800_ASIC1_MMC_STATUS_READ_TIMEOUT (1 << 0) | ||
| 434 | #define H3800_ASIC1_MMC_STATUS_RESPONSE_TIMEOUT (1 << 1) | ||
| 435 | #define H3800_ASIC1_MMC_STATUS_CRC_WRITE_ERROR (1 << 2) | ||
| 436 | #define H3800_ASIC1_MMC_STATUS_CRC_READ_ERROR (1 << 3) | ||
| 437 | #define H3800_ASIC1_MMC_STATUS_SPI_READ_ERROR (1 << 4) /* SPI data token error received */ | ||
| 438 | #define H3800_ASIC1_MMC_STATUS_CRC_RESPONSE_ERROR (1 << 5) | ||
| 439 | #define H3800_ASIC1_MMC_STATUS_FIFO_EMPTY (1 << 6) | ||
| 440 | #define H3800_ASIC1_MMC_STATUS_FIFO_FULL (1 << 7) | ||
| 441 | #define H3800_ASIC1_MMC_STATUS_CLOCK_ENABLE (1 << 8) /* MultiMediaCard clock stopped */ | ||
| 442 | #define H3800_ASIC1_MMC_STATUS_DATA_TRANSFER_DONE (1 << 11) /* Write operation, indicates transfer finished */ | ||
| 443 | #define H3800_ASIC1_MMC_STATUS_END_PROGRAM (1 << 12) /* End write and read operations */ | ||
| 444 | #define H3800_ASIC1_MMC_STATUS_END_COMMAND_RESPONSE (1 << 13) /* End command response */ | ||
| 445 | |||
| 446 | #define H3800_ASIC1_MMC_SPI_REG_SPI_ENABLE (1 << 0) /* Enables SPI mode */ | ||
| 447 | #define H3800_ASIC1_MMC_SPI_REG_CRC_ON (1 << 1) /* 1:turn on CRC */ | ||
| 448 | #define H3800_ASIC1_MMC_SPI_REG_SPI_CS_ENABLE (1 << 2) /* 1:turn on SPI CS */ | ||
| 449 | #define H3800_ASIC1_MMC_SPI_REG_CS_ADDRESS_MASK 0x38 /* Bits 3,4,5 are the SPI CS relative address */ | ||
| 450 | |||
| 451 | #define H3800_ASIC1_MMC_CMD_DATA_CONT_FORMAT_NO_RESPONSE 0x00 | ||
| 452 | #define H3800_ASIC1_MMC_CMD_DATA_CONT_FORMAT_R1 0x01 | ||
| 453 | #define H3800_ASIC1_MMC_CMD_DATA_CONT_FORMAT_R2 0x02 | ||
| 454 | #define H3800_ASIC1_MMC_CMD_DATA_CONT_FORMAT_R3 0x03 | ||
| 455 | #define H3800_ASIC1_MMC_CMD_DATA_CONT_DATA_ENABLE (1 << 2) /* This command contains a data transfer */ | ||
| 456 | #define H3800_ASIC1_MMC_CMD_DATA_CONT_WRITE (1 << 3) /* This data transfer is a write */ | ||
| 457 | #define H3800_ASIC1_MMC_CMD_DATA_CONT_STREAM_MODE (1 << 4) /* This data transfer is in stream mode */ | ||
| 458 | #define H3800_ASIC1_MMC_CMD_DATA_CONT_BUSY_BIT (1 << 5) /* Busy signal expected after current cmd */ | ||
| 459 | #define H3800_ASIC1_MMC_CMD_DATA_CONT_INITIALIZE (1 << 6) /* Enables the 80 bits for initializing card */ | ||
| 460 | |||
| 461 | #define H3800_ASIC1_MMC_INT_MASK_DATA_TRANSFER_DONE (1 << 0) | ||
| 462 | #define H3800_ASIC1_MMC_INT_MASK_PROGRAM_DONE (1 << 1) | ||
| 463 | #define H3800_ASIC1_MMC_INT_MASK_END_COMMAND_RESPONSE (1 << 2) | ||
| 464 | #define H3800_ASIC1_MMC_INT_MASK_BUFFER_READY (1 << 3) | ||
| 465 | |||
| 466 | #define H3800_ASIC1_MMC_BUFFER_PART_FULL (1 << 0) | ||
| 467 | |||
| 468 | /********* GPIO **********/ | ||
| 469 | |||
| 470 | #define _H3800_ASIC1_GPIO_Base 0x1e00 | ||
| 471 | |||
| 472 | #define _H3800_ASIC1_GPIO_Mask 0x30 /* R/W 0:don't mask, 1:mask interrupt */ | ||
| 473 | #define _H3800_ASIC1_GPIO_Direction 0x32 /* R/W 0:input, 1:output */ | ||
| 474 | #define _H3800_ASIC1_GPIO_Out 0x34 /* R/W 0:output low, 1:output high */ | ||
| 475 | #define _H3800_ASIC1_GPIO_TriggerType 0x36 /* R/W 0:level, 1:edge */ | ||
| 476 | #define _H3800_ASIC1_GPIO_EdgeTrigger 0x38 /* R/W 0:falling, 1:rising */ | ||
| 477 | #define _H3800_ASIC1_GPIO_LevelTrigger 0x3A /* R/W 0:low, 1:high level detect */ | ||
| 478 | #define _H3800_ASIC1_GPIO_LevelStatus 0x3C /* R/W 0:none, 1:detect */ | ||
| 479 | #define _H3800_ASIC1_GPIO_EdgeStatus 0x3E /* R/W 0:none, 1:detect */ | ||
| 480 | #define _H3800_ASIC1_GPIO_State 0x40 /* R See masks below (default 0) */ | ||
| 481 | #define _H3800_ASIC1_GPIO_Reset 0x42 /* R/W See masks below (default 0x04) */ | ||
| 482 | #define _H3800_ASIC1_GPIO_SleepMask 0x44 /* R/W 0:don't mask, 1:mask trigger in sleep mode */ | ||
| 483 | #define _H3800_ASIC1_GPIO_SleepDir 0x46 /* R/W direction 0:input, 1:output in sleep mode */ | ||
| 484 | #define _H3800_ASIC1_GPIO_SleepOut 0x48 /* R/W level 0:low, 1:high in sleep mode */ | ||
| 485 | #define _H3800_ASIC1_GPIO_Status 0x4A /* R Pin status */ | ||
| 486 | #define _H3800_ASIC1_GPIO_BattFaultDir 0x4C /* R/W direction 0:input, 1:output in batt_fault */ | ||
| 487 | #define _H3800_ASIC1_GPIO_BattFaultOut 0x4E /* R/W level 0:low, 1:high in batt_fault */ | ||
| 488 | |||
| 489 | #define H3800_ASIC1_GPIO_Mask H3800_ASIC1_OFFSET( u16, GPIO, Mask ) | ||
| 490 | #define H3800_ASIC1_GPIO_Direction H3800_ASIC1_OFFSET( u16, GPIO, Direction ) | ||
| 491 | #define H3800_ASIC1_GPIO_Out H3800_ASIC1_OFFSET( u16, GPIO, Out ) | ||
| 492 | #define H3800_ASIC1_GPIO_TriggerType H3800_ASIC1_OFFSET( u16, GPIO, TriggerType ) | ||
| 493 | #define H3800_ASIC1_GPIO_EdgeTrigger H3800_ASIC1_OFFSET( u16, GPIO, EdgeTrigger ) | ||
| 494 | #define H3800_ASIC1_GPIO_LevelTrigger H3800_ASIC1_OFFSET( u16, GPIO, LevelTrigger ) | ||
| 495 | #define H3800_ASIC1_GPIO_LevelStatus H3800_ASIC1_OFFSET( u16, GPIO, LevelStatus ) | ||
| 496 | #define H3800_ASIC1_GPIO_EdgeStatus H3800_ASIC1_OFFSET( u16, GPIO, EdgeStatus ) | ||
| 497 | #define H3800_ASIC1_GPIO_State H3800_ASIC1_OFFSET( u8, GPIO, State ) | ||
| 498 | #define H3800_ASIC1_GPIO_Reset H3800_ASIC1_OFFSET( u8, GPIO, Reset ) | ||
| 499 | #define H3800_ASIC1_GPIO_SleepMask H3800_ASIC1_OFFSET( u16, GPIO, SleepMask ) | ||
| 500 | #define H3800_ASIC1_GPIO_SleepDir H3800_ASIC1_OFFSET( u16, GPIO, SleepDir ) | ||
| 501 | #define H3800_ASIC1_GPIO_SleepOut H3800_ASIC1_OFFSET( u16, GPIO, SleepOut ) | ||
| 502 | #define H3800_ASIC1_GPIO_Status H3800_ASIC1_OFFSET( u16, GPIO, Status ) | ||
| 503 | #define H3800_ASIC1_GPIO_BattFaultDir H3800_ASIC1_OFFSET( u16, GPIO, BattFaultDir ) | ||
| 504 | #define H3800_ASIC1_GPIO_BattFaultOut H3800_ASIC1_OFFSET( u16, GPIO, BattFaultOut ) | ||
| 505 | |||
| 506 | #define H3800_ASIC1_GPIO_STATE_MASK (1 << 0) | ||
| 507 | #define H3800_ASIC1_GPIO_STATE_DIRECTION (1 << 1) | ||
| 508 | #define H3800_ASIC1_GPIO_STATE_OUT (1 << 2) | ||
| 509 | #define H3800_ASIC1_GPIO_STATE_TRIGGER_TYPE (1 << 3) | ||
| 510 | #define H3800_ASIC1_GPIO_STATE_EDGE_TRIGGER (1 << 4) | ||
| 511 | #define H3800_ASIC1_GPIO_STATE_LEVEL_TRIGGER (1 << 5) | ||
| 512 | |||
| 513 | #define H3800_ASIC1_GPIO_RESET_SOFTWARE (1 << 0) | ||
| 514 | #define H3800_ASIC1_GPIO_RESET_AUTO_SLEEP (1 << 1) | ||
| 515 | #define H3800_ASIC1_GPIO_RESET_FIRST_PWR_ON (1 << 2) | ||
| 516 | |||
| 517 | /* These are all outputs */ | ||
| 518 | #define GPIO_H3800_ASIC1_IR_ON_N (1 << 0) /* Apply power to the IR Module */ | ||
| 519 | #define GPIO_H3800_ASIC1_SD_PWR_ON (1 << 1) /* Secure Digital power on */ | ||
| 520 | #define GPIO_H3800_ASIC1_RS232_ON (1 << 2) /* Turn on power to the RS232 chip ? */ | ||
| 521 | #define GPIO_H3800_ASIC1_PULSE_GEN (1 << 3) /* Goes to speaker / earphone */ | ||
| 522 | #define GPIO_H3800_ASIC1_CH_TIMER (1 << 4) /* */ | ||
| 523 | #define GPIO_H3800_ASIC1_LCD_5V_ON (1 << 5) /* Enables LCD_5V */ | ||
| 524 | #define GPIO_H3800_ASIC1_LCD_ON (1 << 6) /* Enables LCD_3V */ | ||
| 525 | #define GPIO_H3800_ASIC1_LCD_PCI (1 << 7) /* Connects to PDWN on LCD controller */ | ||
| 526 | #define GPIO_H3800_ASIC1_VGH_ON (1 << 8) /* Drives VGH on the LCD (+9??) */ | ||
| 527 | #define GPIO_H3800_ASIC1_VGL_ON (1 << 9) /* Drivers VGL on the LCD (-6??) */ | ||
| 528 | #define GPIO_H3800_ASIC1_FL_PWR_ON (1 << 10) /* Frontlight power on */ | ||
| 529 | #define GPIO_H3800_ASIC1_BT_PWR_ON (1 << 11) /* Bluetooth power on */ | ||
| 530 | #define GPIO_H3800_ASIC1_SPK_ON (1 << 12) /* */ | ||
| 531 | #define GPIO_H3800_ASIC1_EAR_ON_N (1 << 13) /* */ | ||
| 532 | #define GPIO_H3800_ASIC1_AUD_PWR_ON (1 << 14) /* */ | ||
| 533 | |||
| 534 | /* Write enable for the flash */ | ||
| 535 | |||
| 536 | #define _H3800_ASIC1_FlashWP_Base 0x1F00 | ||
| 537 | #define _H3800_ASIC1_FlashWP_VPP_ON 0x00 /* R 1: write, 0: protect */ | ||
| 538 | #define H3800_ASIC1_FlashWP_VPP_ON H3800_ASIC1_OFFSET( u8, FlashWP, VPP_ON ) | ||
| 539 | 76 | ||
| 540 | #endif /* _INCLUDE_H3600_GPIO_H_ */ | 77 | #endif /* _INCLUDE_H3600_GPIO_H_ */ |
diff --git a/arch/arm/mach-sa1100/include/mach/irqs.h b/arch/arm/mach-sa1100/include/mach/irqs.h index 0cb36609b3ac..ae81f80b0cf9 100644 --- a/arch/arm/mach-sa1100/include/mach/irqs.h +++ b/arch/arm/mach-sa1100/include/mach/irqs.h | |||
| @@ -153,8 +153,6 @@ | |||
| 153 | */ | 153 | */ |
| 154 | #ifdef CONFIG_SA1111 | 154 | #ifdef CONFIG_SA1111 |
| 155 | #define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) | 155 | #define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) |
| 156 | #elif defined(CONFIG_SA1100_H3800) | ||
| 157 | #define NR_IRQS (IRQ_BOARD_END) | ||
| 158 | #elif defined(CONFIG_SHARP_LOCOMO) | 156 | #elif defined(CONFIG_SHARP_LOCOMO) |
| 159 | #define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) | 157 | #define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) |
| 160 | #else | 158 | #else |
| @@ -175,23 +173,3 @@ | |||
| 175 | #define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2) | 173 | #define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2) |
| 176 | #define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3) | 174 | #define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3) |
| 177 | 175 | ||
| 178 | /* H3800-specific IRQs (CONFIG_SA1100_H3800) */ | ||
| 179 | #define H3800_KPIO_IRQ_START (IRQ_BOARD_START) | ||
| 180 | #define IRQ_H3800_KEY (IRQ_BOARD_START + 0) | ||
| 181 | #define IRQ_H3800_SPI (IRQ_BOARD_START + 1) | ||
| 182 | #define IRQ_H3800_OWM (IRQ_BOARD_START + 2) | ||
| 183 | #define IRQ_H3800_ADC (IRQ_BOARD_START + 3) | ||
| 184 | #define IRQ_H3800_UART_0 (IRQ_BOARD_START + 4) | ||
| 185 | #define IRQ_H3800_UART_1 (IRQ_BOARD_START + 5) | ||
| 186 | #define IRQ_H3800_TIMER_0 (IRQ_BOARD_START + 6) | ||
| 187 | #define IRQ_H3800_TIMER_1 (IRQ_BOARD_START + 7) | ||
| 188 | #define IRQ_H3800_TIMER_2 (IRQ_BOARD_START + 8) | ||
| 189 | #define H3800_KPIO_IRQ_COUNT 9 | ||
| 190 | |||
| 191 | #define H3800_GPIO_IRQ_START (IRQ_BOARD_START + 9) | ||
| 192 | #define IRQ_H3800_PEN (IRQ_BOARD_START + 9) | ||
| 193 | #define IRQ_H3800_SD_DETECT (IRQ_BOARD_START + 10) | ||
| 194 | #define IRQ_H3800_EAR_IN (IRQ_BOARD_START + 11) | ||
| 195 | #define IRQ_H3800_USB_DETECT (IRQ_BOARD_START + 12) | ||
| 196 | #define IRQ_H3800_SD_CON_SLT (IRQ_BOARD_START + 13) | ||
| 197 | #define H3800_GPIO_IRQ_COUNT 5 | ||
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c index 81848aa96424..fd776bb666cd 100644 --- a/arch/arm/mach-sa1100/jornada720.c +++ b/arch/arm/mach-sa1100/jornada720.c | |||
| @@ -226,12 +226,22 @@ static struct platform_device jornada_ssp_device = { | |||
| 226 | .id = -1, | 226 | .id = -1, |
| 227 | }; | 227 | }; |
| 228 | 228 | ||
| 229 | static struct platform_device jornada_kbd_device = { | ||
| 230 | .name = "jornada720_kbd", | ||
| 231 | .id = -1, | ||
| 232 | }; | ||
| 233 | |||
| 234 | static struct platform_device jornada_ts_device = { | ||
| 235 | .name = "jornada_ts", | ||
| 236 | .id = -1, | ||
| 237 | }; | ||
| 238 | |||
| 229 | static struct platform_device *devices[] __initdata = { | 239 | static struct platform_device *devices[] __initdata = { |
| 230 | &sa1111_device, | 240 | &sa1111_device, |
| 231 | #ifdef CONFIG_SA1100_JORNADA720_SSP | ||
| 232 | &jornada_ssp_device, | 241 | &jornada_ssp_device, |
| 233 | #endif | ||
| 234 | &s1d13xxxfb_device, | 242 | &s1d13xxxfb_device, |
| 243 | &jornada_kbd_device, | ||
| 244 | &jornada_ts_device, | ||
| 235 | }; | 245 | }; |
| 236 | 246 | ||
| 237 | static int __init jornada720_init(void) | 247 | static int __init jornada720_init(void) |
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index a23fd3d0163a..4f3a26512599 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c | |||
| @@ -16,12 +16,28 @@ | |||
| 16 | #include <asm/leds.h> | 16 | #include <asm/leds.h> |
| 17 | #include <asm/param.h> | 17 | #include <asm/param.h> |
| 18 | 18 | ||
| 19 | #include <mach/hardware.h> | ||
| 20 | |||
| 21 | #include <asm/mach/map.h> | 19 | #include <asm/mach/map.h> |
| 22 | #include <asm/mach/arch.h> | 20 | #include <asm/mach/arch.h> |
| 23 | #include <asm/mach/time.h> | 21 | #include <asm/mach/time.h> |
| 24 | 22 | ||
| 23 | #define IO_BASE 0xe0000000 | ||
| 24 | #define IO_SIZE 0x08000000 | ||
| 25 | #define IO_START 0x40000000 | ||
| 26 | #define ROMCARD_SIZE 0x08000000 | ||
| 27 | #define ROMCARD_START 0x10000000 | ||
| 28 | |||
| 29 | void arch_reset(char mode) | ||
| 30 | { | ||
| 31 | short temp; | ||
| 32 | local_irq_disable(); | ||
| 33 | /* Reset the Machine via pc[3] of the sequoia chipset */ | ||
| 34 | outw(0x09,0x24); | ||
| 35 | temp=inw(0x26); | ||
| 36 | temp = temp | (1<<3) | (1<<10); | ||
| 37 | outw(0x09,0x24); | ||
| 38 | outw(temp,0x26); | ||
| 39 | } | ||
| 40 | |||
| 25 | static struct plat_serial8250_port serial_platform_data[] = { | 41 | static struct plat_serial8250_port serial_platform_data[] = { |
| 26 | { | 42 | { |
| 27 | .iobase = 0x3f8, | 43 | .iobase = 0x3f8, |
| @@ -50,14 +66,38 @@ static struct platform_device serial_device = { | |||
| 50 | }, | 66 | }, |
| 51 | }; | 67 | }; |
| 52 | 68 | ||
| 69 | static struct resource rtc_resources[] = { | ||
| 70 | [0] = { | ||
| 71 | .start = 0x70, | ||
| 72 | .end = 0x73, | ||
| 73 | .flags = IORESOURCE_IO, | ||
| 74 | }, | ||
| 75 | [1] = { | ||
| 76 | .start = IRQ_ISA_RTC_ALARM, | ||
| 77 | .end = IRQ_ISA_RTC_ALARM, | ||
| 78 | .flags = IORESOURCE_IRQ, | ||
| 79 | } | ||
| 80 | }; | ||
| 81 | |||
| 82 | static struct platform_device rtc_device = { | ||
| 83 | .name = "rtc_cmos", | ||
| 84 | .id = -1, | ||
| 85 | .resource = rtc_resources, | ||
| 86 | .num_resources = ARRAY_SIZE(rtc_resources), | ||
| 87 | }; | ||
| 88 | |||
| 53 | static int __init shark_init(void) | 89 | static int __init shark_init(void) |
| 54 | { | 90 | { |
| 55 | int ret; | 91 | int ret; |
| 56 | 92 | ||
| 57 | if (machine_is_shark()) | 93 | if (machine_is_shark()) |
| 94 | { | ||
| 95 | ret = platform_device_register(&rtc_device); | ||
| 96 | if (ret) printk(KERN_ERR "Unable to register RTC device: %d\n", ret); | ||
| 58 | ret = platform_device_register(&serial_device); | 97 | ret = platform_device_register(&serial_device); |
| 59 | 98 | if (ret) printk(KERN_ERR "Unable to register Serial device: %d\n", ret); | |
| 60 | return ret; | 99 | } |
| 100 | return 0; | ||
| 61 | } | 101 | } |
| 62 | 102 | ||
| 63 | arch_initcall(shark_init); | 103 | arch_initcall(shark_init); |
diff --git a/arch/arm/mach-shark/dma.c b/arch/arm/mach-shark/dma.c index 6774b8d5d13d..10b5b8b3272a 100644 --- a/arch/arm/mach-shark/dma.c +++ b/arch/arm/mach-shark/dma.c | |||
| @@ -13,9 +13,11 @@ | |||
| 13 | #include <asm/dma.h> | 13 | #include <asm/dma.h> |
| 14 | #include <asm/mach/dma.h> | 14 | #include <asm/mach/dma.h> |
| 15 | 15 | ||
| 16 | void __init arch_dma_init(dma_t *dma) | 16 | static int __init shark_dma_init(void) |
| 17 | { | 17 | { |
| 18 | #ifdef CONFIG_ISA_DMA | 18 | #ifdef CONFIG_ISA_DMA |
| 19 | isa_init_dma(dma); | 19 | isa_init_dma(); |
| 20 | #endif | 20 | #endif |
| 21 | return 0; | ||
| 21 | } | 22 | } |
| 23 | core_initcall(shark_dma_init); | ||
diff --git a/arch/arm/mach-shark/include/mach/debug-macro.S b/arch/arm/mach-shark/include/mach/debug-macro.S index 0836cb78b29a..f97a7626bd58 100644 --- a/arch/arm/mach-shark/include/mach/debug-macro.S +++ b/arch/arm/mach-shark/include/mach/debug-macro.S | |||
| @@ -27,5 +27,3 @@ | |||
| 27 | bne 1001b | 27 | bne 1001b |
| 28 | .endm | 28 | .endm |
| 29 | 29 | ||
| 30 | .macro waituart,rd,rx | ||
| 31 | .endm | ||
diff --git a/arch/arm/mach-shark/include/mach/framebuffer.h b/arch/arm/mach-shark/include/mach/framebuffer.h new file mode 100644 index 000000000000..84a5bf6e5ba3 --- /dev/null +++ b/arch/arm/mach-shark/include/mach/framebuffer.h | |||
| @@ -0,0 +1,16 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-shark/include/mach/framebuffer.h | ||
| 3 | * | ||
| 4 | * by Alexander Schulz | ||
| 5 | * | ||
| 6 | */ | ||
| 7 | |||
| 8 | #ifndef __ASM_ARCH_FRAMEBUFFER_H | ||
| 9 | #define __ASM_ARCH_FRAMEBUFFER_H | ||
| 10 | |||
| 11 | /* defines for the Framebuffer */ | ||
| 12 | #define FB_START 0x06000000 | ||
| 13 | #define FB_SIZE 0x01000000 | ||
| 14 | |||
| 15 | #endif | ||
| 16 | |||
diff --git a/arch/arm/mach-shark/include/mach/hardware.h b/arch/arm/mach-shark/include/mach/hardware.h index 01bf76099ce5..94d84b27a0cb 100644 --- a/arch/arm/mach-shark/include/mach/hardware.h +++ b/arch/arm/mach-shark/include/mach/hardware.h | |||
| @@ -10,35 +10,8 @@ | |||
| 10 | #ifndef __ASM_ARCH_HARDWARE_H | 10 | #ifndef __ASM_ARCH_HARDWARE_H |
| 11 | #define __ASM_ARCH_HARDWARE_H | 11 | #define __ASM_ARCH_HARDWARE_H |
| 12 | 12 | ||
| 13 | #ifndef __ASSEMBLY__ | ||
| 14 | |||
| 15 | /* | ||
| 16 | * Mapping areas | ||
| 17 | */ | ||
| 18 | #define IO_BASE 0xe0000000 | ||
| 19 | |||
| 20 | #else | ||
| 21 | |||
| 22 | #define IO_BASE 0 | ||
| 23 | |||
| 24 | #endif | ||
| 25 | |||
| 26 | #define IO_SIZE 0x08000000 | ||
| 27 | #define IO_START 0x40000000 | ||
| 28 | #define ROMCARD_SIZE 0x08000000 | ||
| 29 | #define ROMCARD_START 0x10000000 | ||
| 30 | |||
| 31 | |||
| 32 | /* defines for the Framebuffer */ | ||
| 33 | #define FB_START 0x06000000 | ||
| 34 | #define FB_SIZE 0x01000000 | ||
| 35 | |||
| 36 | #define UNCACHEABLE_ADDR 0xdf010000 | 13 | #define UNCACHEABLE_ADDR 0xdf010000 |
| 37 | 14 | ||
| 38 | #define SEQUOIA_LED_GREEN (1<<6) | ||
| 39 | #define SEQUOIA_LED_AMBER (1<<5) | ||
| 40 | #define SEQUOIA_LED_BACK (1<<7) | ||
| 41 | |||
| 42 | #define pcibios_assign_all_busses() 1 | 15 | #define pcibios_assign_all_busses() 1 |
| 43 | 16 | ||
| 44 | #define PCIBIOS_MIN_IO 0x6000 | 17 | #define PCIBIOS_MIN_IO 0x6000 |
diff --git a/arch/arm/mach-shark/include/mach/io.h b/arch/arm/mach-shark/include/mach/io.h index c5cee829fc87..9ccbcecc430b 100644 --- a/arch/arm/mach-shark/include/mach/io.h +++ b/arch/arm/mach-shark/include/mach/io.h | |||
| @@ -11,10 +11,10 @@ | |||
| 11 | #ifndef __ASM_ARM_ARCH_IO_H | 11 | #ifndef __ASM_ARM_ARCH_IO_H |
| 12 | #define __ASM_ARM_ARCH_IO_H | 12 | #define __ASM_ARM_ARCH_IO_H |
| 13 | 13 | ||
| 14 | #define PCIO_BASE 0xe0000000 | 14 | #define IO_SPACE_LIMIT 0xffffffff |
| 15 | #define IO_SPACE_LIMIT 0xffffffff | ||
| 16 | 15 | ||
| 17 | #define __io(a) ((void __iomem *)(PCIO_BASE + (a))) | 16 | #define __io(a) ((void __iomem *)(0xe0000000 + (a))) |
| 18 | #define __mem_pci(addr) (addr) | 17 | |
| 18 | #define __mem_pci(addr) (addr) | ||
| 19 | 19 | ||
| 20 | #endif | 20 | #endif |
diff --git a/arch/arm/mach-shark/include/mach/irqs.h b/arch/arm/mach-shark/include/mach/irqs.h index 0586acd7cdd5..c8e8a4e1f61a 100644 --- a/arch/arm/mach-shark/include/mach/irqs.h +++ b/arch/arm/mach-shark/include/mach/irqs.h | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | #define NR_IRQS 16 | 7 | #define NR_IRQS 16 |
| 8 | 8 | ||
| 9 | #define IRQ_ISA_KEYBOARD 1 | 9 | #define IRQ_ISA_KEYBOARD 1 |
| 10 | #define RTC_IRQ 8 | 10 | #define IRQ_ISA_RTC_ALARM 8 |
| 11 | #define I8042_KBD_IRQ 1 | 11 | #define I8042_KBD_IRQ 1 |
| 12 | #define I8042_AUX_IRQ 12 | 12 | #define I8042_AUX_IRQ 12 |
| 13 | #define IRQ_HARDDISK 14 | 13 | #define IRQ_HARDDISK 14 |
diff --git a/arch/arm/mach-shark/include/mach/isa-dma.h b/arch/arm/mach-shark/include/mach/isa-dma.h index 864298ff3927..96c43b8f8dda 100644 --- a/arch/arm/mach-shark/include/mach/isa-dma.h +++ b/arch/arm/mach-shark/include/mach/isa-dma.h | |||
| @@ -6,10 +6,6 @@ | |||
| 6 | #ifndef __ASM_ARCH_DMA_H | 6 | #ifndef __ASM_ARCH_DMA_H |
| 7 | #define __ASM_ARCH_DMA_H | 7 | #define __ASM_ARCH_DMA_H |
| 8 | 8 | ||
| 9 | /* Use only the lowest 4MB, nothing else works. | ||
| 10 | * The rest is not DMAable. See dev / .properties | ||
| 11 | * in OpenFirmware. | ||
| 12 | */ | ||
| 13 | #define MAX_DMA_CHANNELS 8 | 9 | #define MAX_DMA_CHANNELS 8 |
| 14 | #define DMA_ISA_CASCADE 4 | 10 | #define DMA_ISA_CASCADE 4 |
| 15 | 11 | ||
diff --git a/arch/arm/mach-shark/include/mach/memory.h b/arch/arm/mach-shark/include/mach/memory.h index c5ab038925d6..3053e5b7f168 100644 --- a/arch/arm/mach-shark/include/mach/memory.h +++ b/arch/arm/mach-shark/include/mach/memory.h | |||
| @@ -23,6 +23,7 @@ static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsig | |||
| 23 | { | 23 | { |
| 24 | if (node != 0) return; | 24 | if (node != 0) return; |
| 25 | /* Only the first 4 MB (=1024 Pages) are usable for DMA */ | 25 | /* Only the first 4 MB (=1024 Pages) are usable for DMA */ |
| 26 | /* See dev / -> .properties in OpenFirmware. */ | ||
| 26 | zone_size[1] = zone_size[0] - 1024; | 27 | zone_size[1] = zone_size[0] - 1024; |
| 27 | zone_size[0] = 1024; | 28 | zone_size[0] = 1024; |
| 28 | zhole_size[1] = zhole_size[0]; | 29 | zhole_size[1] = zhole_size[0]; |
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h index e45bd734a03e..0752ca29971a 100644 --- a/arch/arm/mach-shark/include/mach/system.h +++ b/arch/arm/mach-shark/include/mach/system.h | |||
| @@ -6,20 +6,8 @@ | |||
| 6 | #ifndef __ASM_ARCH_SYSTEM_H | 6 | #ifndef __ASM_ARCH_SYSTEM_H |
| 7 | #define __ASM_ARCH_SYSTEM_H | 7 | #define __ASM_ARCH_SYSTEM_H |
| 8 | 8 | ||
| 9 | #include <linux/io.h> | 9 | /* Found in arch/mach-shark/core.c */ |
| 10 | 10 | extern void arch_reset(char mode); | |
| 11 | static void arch_reset(char mode) | ||
| 12 | { | ||
| 13 | short temp; | ||
| 14 | local_irq_disable(); | ||
| 15 | /* Reset the Machine via pc[3] of the sequoia chipset */ | ||
| 16 | outw(0x09,0x24); | ||
| 17 | temp=inw(0x26); | ||
| 18 | temp = temp | (1<<3) | (1<<10); | ||
| 19 | outw(0x09,0x24); | ||
| 20 | outw(temp,0x26); | ||
| 21 | |||
| 22 | } | ||
| 23 | 11 | ||
| 24 | static inline void arch_idle(void) | 12 | static inline void arch_idle(void) |
| 25 | { | 13 | { |
diff --git a/arch/arm/mach-shark/include/mach/uncompress.h b/arch/arm/mach-shark/include/mach/uncompress.h index 3725e1633418..22ccab4c3c5e 100644 --- a/arch/arm/mach-shark/include/mach/uncompress.h +++ b/arch/arm/mach-shark/include/mach/uncompress.h | |||
| @@ -11,7 +11,7 @@ | |||
| 11 | 11 | ||
| 12 | static inline void putc(int c) | 12 | static inline void putc(int c) |
| 13 | { | 13 | { |
| 14 | int t; | 14 | volatile int t; |
| 15 | 15 | ||
| 16 | SERIAL_BASE[0] = c; | 16 | SERIAL_BASE[0] = c; |
| 17 | t=0x10000; | 17 | t=0x10000; |
diff --git a/arch/arm/mach-shark/leds.c b/arch/arm/mach-shark/leds.c index 8bd8d6bb4d92..c9e32de4adf9 100644 --- a/arch/arm/mach-shark/leds.c +++ b/arch/arm/mach-shark/leds.c | |||
| @@ -22,12 +22,16 @@ | |||
| 22 | #include <linux/ioport.h> | 22 | #include <linux/ioport.h> |
| 23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 24 | 24 | ||
| 25 | #include <mach/hardware.h> | ||
| 26 | #include <asm/leds.h> | 25 | #include <asm/leds.h> |
| 27 | #include <asm/system.h> | 26 | #include <asm/system.h> |
| 28 | 27 | ||
| 29 | #define LED_STATE_ENABLED 1 | 28 | #define LED_STATE_ENABLED 1 |
| 30 | #define LED_STATE_CLAIMED 2 | 29 | #define LED_STATE_CLAIMED 2 |
| 30 | |||
| 31 | #define SEQUOIA_LED_GREEN (1<<6) | ||
| 32 | #define SEQUOIA_LED_AMBER (1<<5) | ||
| 33 | #define SEQUOIA_LED_BACK (1<<7) | ||
| 34 | |||
| 31 | static char led_state; | 35 | static char led_state; |
| 32 | static short hw_led_state; | 36 | static short hw_led_state; |
| 33 | static short saved_state; | 37 | static short saved_state; |
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 1c43494f5c42..565776680d8c 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
| @@ -335,11 +335,25 @@ static struct resource versatile_i2c_resource = { | |||
| 335 | 335 | ||
| 336 | static struct platform_device versatile_i2c_device = { | 336 | static struct platform_device versatile_i2c_device = { |
| 337 | .name = "versatile-i2c", | 337 | .name = "versatile-i2c", |
| 338 | .id = -1, | 338 | .id = 0, |
| 339 | .num_resources = 1, | 339 | .num_resources = 1, |
| 340 | .resource = &versatile_i2c_resource, | 340 | .resource = &versatile_i2c_resource, |
| 341 | }; | 341 | }; |
| 342 | 342 | ||
| 343 | static struct i2c_board_info versatile_i2c_board_info[] = { | ||
| 344 | { | ||
| 345 | I2C_BOARD_INFO("rtc-ds1307", 0xd0 >> 1), | ||
| 346 | .type = "ds1338", | ||
| 347 | }, | ||
| 348 | }; | ||
| 349 | |||
| 350 | static int __init versatile_i2c_init(void) | ||
| 351 | { | ||
| 352 | return i2c_register_board_info(0, versatile_i2c_board_info, | ||
| 353 | ARRAY_SIZE(versatile_i2c_board_info)); | ||
| 354 | } | ||
| 355 | arch_initcall(versatile_i2c_init); | ||
| 356 | |||
| 343 | #define VERSATILE_SYSMCI (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_MCI_OFFSET) | 357 | #define VERSATILE_SYSMCI (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_MCI_OFFSET) |
| 344 | 358 | ||
| 345 | unsigned int mmc_status(struct device *dev) | 359 | unsigned int mmc_status(struct device *dev) |
diff --git a/arch/arm/mach-w90x900/cpu.h b/arch/arm/mach-w90x900/cpu.h index 40ff40845df0..de29ddcb9459 100644 --- a/arch/arm/mach-w90x900/cpu.h +++ b/arch/arm/mach-w90x900/cpu.h | |||
| @@ -43,35 +43,16 @@ extern void w90p910_init_io(struct map_desc *mach_desc, int size); | |||
| 43 | extern void w90p910_init_uarts(struct w90x900_uartcfg *cfg, int no); | 43 | extern void w90p910_init_uarts(struct w90x900_uartcfg *cfg, int no); |
| 44 | extern void w90p910_init_clocks(int xtal); | 44 | extern void w90p910_init_clocks(int xtal); |
| 45 | extern void w90p910_map_io(struct map_desc *mach_desc, int size); | 45 | extern void w90p910_map_io(struct map_desc *mach_desc, int size); |
| 46 | extern struct platform_device w90p910_serial_device; | ||
| 46 | extern struct sys_timer w90x900_timer; | 47 | extern struct sys_timer w90x900_timer; |
| 47 | 48 | ||
| 48 | #define W90X900_RES(name) \ | 49 | #define W90X900_8250PORT(name) \ |
| 49 | struct resource w90x900_##name##_resource[] = { \ | 50 | { \ |
| 50 | [0] = { \ | 51 | .membase = name##_BA, \ |
| 51 | .start = name##_PA, \ | 52 | .mapbase = name##_PA, \ |
| 52 | .end = name##_PA + 0x0ff, \ | 53 | .irq = IRQ_##name, \ |
| 53 | .flags = IORESOURCE_MEM, \ | 54 | .uartclk = 11313600, \ |
| 54 | }, \ | 55 | .regshift = 2, \ |
| 55 | [1] = { \ | 56 | .iotype = UPIO_MEM, \ |
| 56 | .start = IRQ_##name, \ | 57 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \ |
| 57 | .end = IRQ_##name, \ | ||
| 58 | .flags = IORESOURCE_IRQ, \ | ||
| 59 | } \ | ||
| 60 | } | ||
| 61 | |||
| 62 | #define W90X900_DEVICE(devname, regname, devid, platdevname) \ | ||
| 63 | struct platform_device w90x900_##devname = { \ | ||
| 64 | .name = platdevname, \ | ||
| 65 | .id = devid, \ | ||
| 66 | .num_resources = ARRAY_SIZE(w90x900_##regname##_resource), \ | ||
| 67 | .resource = w90x900_##regname##_resource, \ | ||
| 68 | } | ||
| 69 | |||
| 70 | #define W90X900_UARTCFG(port, flag, uc, ulc, ufc) \ | ||
| 71 | { \ | ||
| 72 | .hwport = port, \ | ||
| 73 | .flags = flag, \ | ||
| 74 | .ucon = uc, \ | ||
| 75 | .ulcon = ulc, \ | ||
| 76 | .ufcon = ufc, \ | ||
| 77 | } | 58 | } |
diff --git a/arch/arm/mach-w90x900/mach-w90p910evb.c b/arch/arm/mach-w90x900/mach-w90p910evb.c index 9ebc93f48530..726ff6798a56 100644 --- a/arch/arm/mach-w90x900/mach-w90p910evb.c +++ b/arch/arm/mach-w90x900/mach-w90p910evb.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include <linux/timer.h> | 22 | #include <linux/timer.h> |
| 23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
| 24 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
| 25 | #include <linux/mtd/physmap.h> | ||
| 25 | 26 | ||
| 26 | #include <asm/mach/arch.h> | 27 | #include <asm/mach/arch.h> |
| 27 | #include <asm/mach/map.h> | 28 | #include <asm/mach/map.h> |
| @@ -32,28 +33,67 @@ | |||
| 32 | #include <mach/map.h> | 33 | #include <mach/map.h> |
| 33 | 34 | ||
| 34 | #include "cpu.h" | 35 | #include "cpu.h" |
| 36 | /*w90p910 evb norflash driver data */ | ||
| 35 | 37 | ||
| 36 | static struct map_desc w90p910_iodesc[] __initdata = { | 38 | #define W90P910_FLASH_BASE 0xA0000000 |
| 39 | #define W90P910_FLASH_SIZE 0x400000 | ||
| 40 | |||
| 41 | static struct mtd_partition w90p910_flash_partitions[] = { | ||
| 42 | { | ||
| 43 | .name = "NOR Partition 1 for kernel (960K)", | ||
| 44 | .size = 0xF0000, | ||
| 45 | .offset = 0x10000, | ||
| 46 | }, | ||
| 47 | { | ||
| 48 | .name = "NOR Partition 2 for image (1M)", | ||
| 49 | .size = 0x100000, | ||
| 50 | .offset = 0x100000, | ||
| 51 | }, | ||
| 52 | { | ||
| 53 | .name = "NOR Partition 3 for user (2M)", | ||
| 54 | .size = 0x200000, | ||
| 55 | .offset = 0x00200000, | ||
| 56 | } | ||
| 37 | }; | 57 | }; |
| 38 | 58 | ||
| 39 | static struct w90x900_uartcfg w90p910_uartcfgs[] = { | 59 | static struct physmap_flash_data w90p910_flash_data = { |
| 40 | W90X900_UARTCFG(0, 0, 0, 0, 0), | 60 | .width = 2, |
| 41 | W90X900_UARTCFG(1, 0, 0, 0, 0), | 61 | .parts = w90p910_flash_partitions, |
| 42 | W90X900_UARTCFG(2, 0, 0, 0, 0), | 62 | .nr_parts = ARRAY_SIZE(w90p910_flash_partitions), |
| 43 | W90X900_UARTCFG(3, 0, 0, 0, 0), | 63 | }; |
| 44 | W90X900_UARTCFG(4, 0, 0, 0, 0), | 64 | |
| 65 | static struct resource w90p910_flash_resources[] = { | ||
| 66 | { | ||
| 67 | .start = W90P910_FLASH_BASE, | ||
| 68 | .end = W90P910_FLASH_BASE + W90P910_FLASH_SIZE - 1, | ||
| 69 | .flags = IORESOURCE_MEM, | ||
| 70 | } | ||
| 71 | }; | ||
| 72 | |||
| 73 | static struct platform_device w90p910_flash_device = { | ||
| 74 | .name = "physmap-flash", | ||
| 75 | .id = 0, | ||
| 76 | .dev = { | ||
| 77 | .platform_data = &w90p910_flash_data, | ||
| 78 | }, | ||
| 79 | .resource = w90p910_flash_resources, | ||
| 80 | .num_resources = ARRAY_SIZE(w90p910_flash_resources), | ||
| 81 | }; | ||
| 82 | |||
| 83 | static struct map_desc w90p910_iodesc[] __initdata = { | ||
| 45 | }; | 84 | }; |
| 46 | 85 | ||
| 47 | /*Here should be your evb resourse,such as LCD*/ | 86 | /*Here should be your evb resourse,such as LCD*/ |
| 48 | 87 | ||
| 49 | static struct platform_device *w90p910evb_dev[] __initdata = { | 88 | static struct platform_device *w90p910evb_dev[] __initdata = { |
| 89 | &w90p910_serial_device, | ||
| 90 | &w90p910_flash_device, | ||
| 50 | }; | 91 | }; |
| 51 | 92 | ||
| 52 | static void __init w90p910evb_map_io(void) | 93 | static void __init w90p910evb_map_io(void) |
| 53 | { | 94 | { |
| 54 | w90p910_map_io(w90p910_iodesc, ARRAY_SIZE(w90p910_iodesc)); | 95 | w90p910_map_io(w90p910_iodesc, ARRAY_SIZE(w90p910_iodesc)); |
| 55 | w90p910_init_clocks(0); | 96 | w90p910_init_clocks(0); |
| 56 | w90p910_init_uarts(w90p910_uartcfgs, ARRAY_SIZE(w90p910_uartcfgs)); | ||
| 57 | } | 97 | } |
| 58 | 98 | ||
| 59 | static void __init w90p910evb_init(void) | 99 | static void __init w90p910evb_init(void) |
diff --git a/arch/arm/mach-w90x900/w90p910.c b/arch/arm/mach-w90x900/w90p910.c index aa783bc94310..2bcbaa681b99 100644 --- a/arch/arm/mach-w90x900/w90p910.c +++ b/arch/arm/mach-w90x900/w90p910.c | |||
| @@ -25,6 +25,7 @@ | |||
| 25 | #include <linux/init.h> | 25 | #include <linux/init.h> |
| 26 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
| 27 | #include <linux/io.h> | 27 | #include <linux/io.h> |
| 28 | #include <linux/serial_8250.h> | ||
| 28 | 29 | ||
| 29 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
| 30 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
| @@ -36,12 +37,6 @@ | |||
| 36 | 37 | ||
| 37 | #include "cpu.h" | 38 | #include "cpu.h" |
| 38 | 39 | ||
| 39 | /*W90P910 has five uarts*/ | ||
| 40 | |||
| 41 | #define MAX_UART_COUNT 5 | ||
| 42 | static int uart_count; | ||
| 43 | static struct platform_device *uart_devs[MAX_UART_COUNT-1]; | ||
| 44 | |||
| 45 | /* Initial IO mappings */ | 40 | /* Initial IO mappings */ |
| 46 | 41 | ||
| 47 | static struct map_desc w90p910_iodesc[] __initdata = { | 42 | static struct map_desc w90p910_iodesc[] __initdata = { |
| @@ -53,48 +48,19 @@ static struct map_desc w90p910_iodesc[] __initdata = { | |||
| 53 | /*IODESC_ENT(LCD),*/ | 48 | /*IODESC_ENT(LCD),*/ |
| 54 | }; | 49 | }; |
| 55 | 50 | ||
| 56 | /*Init the dev resource*/ | 51 | /* Initial serial platform data */ |
| 57 | |||
| 58 | static W90X900_RES(UART0); | ||
| 59 | static W90X900_RES(UART1); | ||
| 60 | static W90X900_RES(UART2); | ||
| 61 | static W90X900_RES(UART3); | ||
| 62 | static W90X900_RES(UART4); | ||
| 63 | static W90X900_DEVICE(uart0, UART0, 0, "w90x900-uart"); | ||
| 64 | static W90X900_DEVICE(uart1, UART1, 1, "w90x900-uart"); | ||
| 65 | static W90X900_DEVICE(uart2, UART2, 2, "w90x900-uart"); | ||
| 66 | static W90X900_DEVICE(uart3, UART3, 3, "w90x900-uart"); | ||
| 67 | static W90X900_DEVICE(uart4, UART4, 4, "w90x900-uart"); | ||
| 68 | |||
| 69 | static struct platform_device *uart_devices[] __initdata = { | ||
| 70 | &w90x900_uart0, | ||
| 71 | &w90x900_uart1, | ||
| 72 | &w90x900_uart2, | ||
| 73 | &w90x900_uart3, | ||
| 74 | &w90x900_uart4 | ||
| 75 | }; | ||
| 76 | 52 | ||
| 77 | /*Init W90P910 uart device*/ | 53 | struct plat_serial8250_port w90p910_uart_data[] = { |
| 54 | W90X900_8250PORT(UART0), | ||
| 55 | }; | ||
| 78 | 56 | ||
| 79 | void __init w90p910_init_uarts(struct w90x900_uartcfg *cfg, int no) | 57 | struct platform_device w90p910_serial_device = { |
| 80 | { | 58 | .name = "serial8250", |
| 81 | struct platform_device *platdev; | 59 | .id = PLAT8250_DEV_PLATFORM, |
| 82 | int uart, uartdev; | 60 | .dev = { |
| 83 | 61 | .platform_data = w90p910_uart_data, | |
| 84 | /*By min() to judge count of uart be used indeed*/ | 62 | }, |
| 85 | 63 | }; | |
| 86 | uartdev = ARRAY_SIZE(uart_devices); | ||
| 87 | no = min(uartdev, no); | ||
| 88 | |||
| 89 | for (uart = 0; uart < no; uart++, cfg++) { | ||
| 90 | if (cfg->hwport != uart) | ||
| 91 | printk(KERN_ERR "w90x900_uartcfg[%d] error\n", uart); | ||
| 92 | platdev = uart_devices[cfg->hwport]; | ||
| 93 | uart_devs[uart] = platdev; | ||
| 94 | platdev->dev.platform_data = cfg; | ||
| 95 | } | ||
| 96 | uart_count = uart; | ||
| 97 | } | ||
| 98 | 64 | ||
| 99 | /*Init W90P910 evb io*/ | 65 | /*Init W90P910 evb io*/ |
| 100 | 66 | ||
| @@ -122,13 +88,6 @@ static int __init w90p910_init_cpu(void) | |||
| 122 | 88 | ||
| 123 | static int __init w90x900_arch_init(void) | 89 | static int __init w90x900_arch_init(void) |
| 124 | { | 90 | { |
| 125 | int ret; | 91 | return w90p910_init_cpu(); |
| 126 | |||
| 127 | ret = w90p910_init_cpu(); | ||
| 128 | if (ret != 0) | ||
| 129 | return ret; | ||
| 130 | |||
| 131 | return platform_add_devices(uart_devs, uart_count); | ||
| 132 | |||
| 133 | } | 92 | } |
| 134 | arch_initcall(w90x900_arch_init); | 93 | arch_initcall(w90x900_arch_init); |
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index d490f3773c01..0d8581f11211 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
| @@ -704,7 +704,8 @@ config CACHE_FEROCEON_L2_WRITETHROUGH | |||
| 704 | 704 | ||
| 705 | config CACHE_L2X0 | 705 | config CACHE_L2X0 |
| 706 | bool "Enable the L2x0 outer cache controller" | 706 | bool "Enable the L2x0 outer cache controller" |
| 707 | depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || REALVIEW_EB_A9MP | 707 | depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ |
| 708 | REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 | ||
| 708 | default y | 709 | default y |
| 709 | select OUTER_CACHE | 710 | select OUTER_CACHE |
| 710 | help | 711 | help |
diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S index 8a7f65ba14b7..94077fbd96b7 100644 --- a/arch/arm/mm/abort-ev6.S +++ b/arch/arm/mm/abort-ev6.S | |||
| @@ -23,7 +23,8 @@ ENTRY(v6_early_abort) | |||
| 23 | #ifdef CONFIG_CPU_32v6K | 23 | #ifdef CONFIG_CPU_32v6K |
| 24 | clrex | 24 | clrex |
| 25 | #else | 25 | #else |
| 26 | strex r0, r1, [sp] @ Clear the exclusive monitor | 26 | sub r1, sp, #4 @ Get unused stack location |
| 27 | strex r0, r1, [r1] @ Clear the exclusive monitor | ||
| 27 | #endif | 28 | #endif |
| 28 | mrc p15, 0, r1, c5, c0, 0 @ get FSR | 29 | mrc p15, 0, r1, c5, c0, 0 @ get FSR |
| 29 | mrc p15, 0, r0, c6, c0, 0 @ get FAR | 30 | mrc p15, 0, r0, c6, c0, 0 @ get FAR |
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 9b36c5cb5e9f..8c6fc5a6237e 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
| @@ -243,6 +243,10 @@ static struct mem_type mem_types[] = { | |||
| 243 | .prot_sect = PMD_TYPE_SECT, | 243 | .prot_sect = PMD_TYPE_SECT, |
| 244 | .domain = DOMAIN_KERNEL, | 244 | .domain = DOMAIN_KERNEL, |
| 245 | }, | 245 | }, |
| 246 | [MT_MEMORY_NONCACHED] = { | ||
| 247 | .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, | ||
| 248 | .domain = DOMAIN_KERNEL, | ||
| 249 | }, | ||
| 246 | }; | 250 | }; |
| 247 | 251 | ||
| 248 | const struct mem_type *get_mem_type(unsigned int type) | 252 | const struct mem_type *get_mem_type(unsigned int type) |
| @@ -406,9 +410,28 @@ static void __init build_mem_type_table(void) | |||
| 406 | kern_pgprot |= L_PTE_SHARED; | 410 | kern_pgprot |= L_PTE_SHARED; |
| 407 | vecs_pgprot |= L_PTE_SHARED; | 411 | vecs_pgprot |= L_PTE_SHARED; |
| 408 | mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; | 412 | mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; |
| 413 | mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S; | ||
| 409 | #endif | 414 | #endif |
| 410 | } | 415 | } |
| 411 | 416 | ||
| 417 | /* | ||
| 418 | * Non-cacheable Normal - intended for memory areas that must | ||
| 419 | * not cause dirty cache line writebacks when used | ||
| 420 | */ | ||
| 421 | if (cpu_arch >= CPU_ARCH_ARMv6) { | ||
| 422 | if (cpu_arch >= CPU_ARCH_ARMv7 && (cr & CR_TRE)) { | ||
| 423 | /* Non-cacheable Normal is XCB = 001 */ | ||
| 424 | mem_types[MT_MEMORY_NONCACHED].prot_sect |= | ||
| 425 | PMD_SECT_BUFFERED; | ||
| 426 | } else { | ||
| 427 | /* For both ARMv6 and non-TEX-remapping ARMv7 */ | ||
| 428 | mem_types[MT_MEMORY_NONCACHED].prot_sect |= | ||
| 429 | PMD_SECT_TEX(1); | ||
| 430 | } | ||
| 431 | } else { | ||
| 432 | mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_BUFFERABLE; | ||
| 433 | } | ||
| 434 | |||
| 412 | for (i = 0; i < 16; i++) { | 435 | for (i = 0; i < 16; i++) { |
| 413 | unsigned long v = pgprot_val(protection_map[i]); | 436 | unsigned long v = pgprot_val(protection_map[i]); |
| 414 | protection_map[i] = __pgprot(v | user_pgprot); | 437 | protection_map[i] = __pgprot(v | user_pgprot); |
| @@ -693,7 +716,8 @@ static void __init sanity_check_meminfo(void) | |||
| 693 | * Check whether this memory bank would entirely overlap | 716 | * Check whether this memory bank would entirely overlap |
| 694 | * the vmalloc area. | 717 | * the vmalloc area. |
| 695 | */ | 718 | */ |
| 696 | if (__va(bank->start) >= VMALLOC_MIN) { | 719 | if (__va(bank->start) >= VMALLOC_MIN || |
| 720 | __va(bank->start) < PAGE_OFFSET) { | ||
| 697 | printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx " | 721 | printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx " |
| 698 | "(vmalloc region overlap).\n", | 722 | "(vmalloc region overlap).\n", |
| 699 | bank->start, bank->start + bank->size - 1); | 723 | bank->start, bank->start + bank->size - 1); |
diff --git a/arch/arm/oprofile/backtrace.c b/arch/arm/oprofile/backtrace.c index cefc21c2eee4..d805a52b5032 100644 --- a/arch/arm/oprofile/backtrace.c +++ b/arch/arm/oprofile/backtrace.c | |||
| @@ -18,15 +18,14 @@ | |||
| 18 | #include <linux/mm.h> | 18 | #include <linux/mm.h> |
| 19 | #include <linux/uaccess.h> | 19 | #include <linux/uaccess.h> |
| 20 | #include <asm/ptrace.h> | 20 | #include <asm/ptrace.h> |
| 21 | 21 | #include <asm/stacktrace.h> | |
| 22 | #include "../kernel/stacktrace.h" | ||
| 23 | 22 | ||
| 24 | static int report_trace(struct stackframe *frame, void *d) | 23 | static int report_trace(struct stackframe *frame, void *d) |
| 25 | { | 24 | { |
| 26 | unsigned int *depth = d; | 25 | unsigned int *depth = d; |
| 27 | 26 | ||
| 28 | if (*depth) { | 27 | if (*depth) { |
| 29 | oprofile_add_trace(frame->lr); | 28 | oprofile_add_trace(frame->pc); |
| 30 | (*depth)--; | 29 | (*depth)--; |
| 31 | } | 30 | } |
| 32 | 31 | ||
| @@ -70,9 +69,12 @@ void arm_backtrace(struct pt_regs * const regs, unsigned int depth) | |||
| 70 | struct frame_tail *tail = ((struct frame_tail *) regs->ARM_fp) - 1; | 69 | struct frame_tail *tail = ((struct frame_tail *) regs->ARM_fp) - 1; |
| 71 | 70 | ||
| 72 | if (!user_mode(regs)) { | 71 | if (!user_mode(regs)) { |
| 73 | unsigned long base = ((unsigned long)regs) & ~(THREAD_SIZE - 1); | 72 | struct stackframe frame; |
| 74 | walk_stackframe(regs->ARM_fp, base, base + THREAD_SIZE, | 73 | frame.fp = regs->ARM_fp; |
| 75 | report_trace, &depth); | 74 | frame.sp = regs->ARM_sp; |
| 75 | frame.lr = regs->ARM_lr; | ||
| 76 | frame.pc = regs->ARM_pc; | ||
| 77 | walk_stackframe(&frame, report_trace, &depth); | ||
| 76 | return; | 78 | return; |
| 77 | } | 79 | } |
| 78 | 80 | ||
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index 9cc2b16fdf79..17d0e9906d5f 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig | |||
| @@ -3,7 +3,7 @@ if ARCH_MXC | |||
| 3 | menu "Freescale MXC Implementations" | 3 | menu "Freescale MXC Implementations" |
| 4 | 4 | ||
| 5 | choice | 5 | choice |
| 6 | prompt "MXC/iMX Base Type" | 6 | prompt "Freescale CPU family:" |
| 7 | default ARCH_MX3 | 7 | default ARCH_MX3 |
| 8 | 8 | ||
| 9 | config ARCH_MX1 | 9 | config ARCH_MX1 |
| @@ -15,12 +15,14 @@ config ARCH_MX1 | |||
| 15 | config ARCH_MX2 | 15 | config ARCH_MX2 |
| 16 | bool "MX2-based" | 16 | bool "MX2-based" |
| 17 | select CPU_ARM926T | 17 | select CPU_ARM926T |
| 18 | select COMMON_CLKDEV | ||
| 18 | help | 19 | help |
| 19 | This enables support for systems based on the Freescale i.MX2 family | 20 | This enables support for systems based on the Freescale i.MX2 family |
| 20 | 21 | ||
| 21 | config ARCH_MX3 | 22 | config ARCH_MX3 |
| 22 | bool "MX3-based" | 23 | bool "MX3-based" |
| 23 | select CPU_V6 | 24 | select CPU_V6 |
| 25 | select COMMON_CLKDEV | ||
| 24 | help | 26 | help |
| 25 | This enables support for systems based on the Freescale i.MX3 family | 27 | This enables support for systems based on the Freescale i.MX3 family |
| 26 | 28 | ||
| @@ -43,4 +45,10 @@ config MXC_IRQ_PRIOR | |||
| 43 | requirements for timing. | 45 | requirements for timing. |
| 44 | Say N here, unless you have a specialized requirement. | 46 | Say N here, unless you have a specialized requirement. |
| 45 | 47 | ||
| 48 | config MXC_PWM | ||
| 49 | tristate "Enable PWM driver" | ||
| 50 | depends on ARCH_MXC | ||
| 51 | help | ||
| 52 | Enable support for the i.MX PWM controller(s). | ||
| 53 | |||
| 46 | endif | 54 | endif |
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index db74a929179d..564fd4ebf38a 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile | |||
| @@ -3,7 +3,8 @@ | |||
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | # Common support | 5 | # Common support |
| 6 | obj-y := irq.o clock.o gpio.o time.o devices.o | 6 | obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o |
| 7 | 7 | ||
| 8 | obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o | 8 | obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o |
| 9 | obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o | 9 | obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o |
| 10 | obj-$(CONFIG_MXC_PWM) += pwm.o | ||
diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c index 0a38f0b396eb..92e13566cd4f 100644 --- a/arch/arm/plat-mxc/clock.c +++ b/arch/arm/plat-mxc/clock.c | |||
| @@ -48,6 +48,11 @@ static DEFINE_MUTEX(clocks_mutex); | |||
| 48 | *-------------------------------------------------------------------------*/ | 48 | *-------------------------------------------------------------------------*/ |
| 49 | 49 | ||
| 50 | /* | 50 | /* |
| 51 | * All the code inside #ifndef CONFIG_COMMON_CLKDEV can be removed once all | ||
| 52 | * MXC architectures have switched to using clkdev. | ||
| 53 | */ | ||
| 54 | #ifndef CONFIG_COMMON_CLKDEV | ||
| 55 | /* | ||
| 51 | * Retrieve a clock by name. | 56 | * Retrieve a clock by name. |
| 52 | * | 57 | * |
| 53 | * Note that we first try to use device id on the bus | 58 | * Note that we first try to use device id on the bus |
| @@ -110,6 +115,7 @@ found: | |||
| 110 | return clk; | 115 | return clk; |
| 111 | } | 116 | } |
| 112 | EXPORT_SYMBOL(clk_get); | 117 | EXPORT_SYMBOL(clk_get); |
| 118 | #endif | ||
| 113 | 119 | ||
| 114 | static void __clk_disable(struct clk *clk) | 120 | static void __clk_disable(struct clk *clk) |
| 115 | { | 121 | { |
| @@ -187,6 +193,7 @@ unsigned long clk_get_rate(struct clk *clk) | |||
| 187 | } | 193 | } |
| 188 | EXPORT_SYMBOL(clk_get_rate); | 194 | EXPORT_SYMBOL(clk_get_rate); |
| 189 | 195 | ||
| 196 | #ifndef CONFIG_COMMON_CLKDEV | ||
| 190 | /* Decrement the clock's module reference count */ | 197 | /* Decrement the clock's module reference count */ |
| 191 | void clk_put(struct clk *clk) | 198 | void clk_put(struct clk *clk) |
| 192 | { | 199 | { |
| @@ -194,6 +201,7 @@ void clk_put(struct clk *clk) | |||
| 194 | module_put(clk->owner); | 201 | module_put(clk->owner); |
| 195 | } | 202 | } |
| 196 | EXPORT_SYMBOL(clk_put); | 203 | EXPORT_SYMBOL(clk_put); |
| 204 | #endif | ||
| 197 | 205 | ||
| 198 | /* Round the requested clock rate to the nearest supported | 206 | /* Round the requested clock rate to the nearest supported |
| 199 | * rate that is less than or equal to the requested rate. | 207 | * rate that is less than or equal to the requested rate. |
| @@ -257,6 +265,7 @@ struct clk *clk_get_parent(struct clk *clk) | |||
| 257 | } | 265 | } |
| 258 | EXPORT_SYMBOL(clk_get_parent); | 266 | EXPORT_SYMBOL(clk_get_parent); |
| 259 | 267 | ||
| 268 | #ifndef CONFIG_COMMON_CLKDEV | ||
| 260 | /* | 269 | /* |
| 261 | * Add a new clock to the clock tree. | 270 | * Add a new clock to the clock tree. |
| 262 | */ | 271 | */ |
| @@ -327,4 +336,49 @@ static int __init mxc_setup_proc_entry(void) | |||
| 327 | } | 336 | } |
| 328 | 337 | ||
| 329 | late_initcall(mxc_setup_proc_entry); | 338 | late_initcall(mxc_setup_proc_entry); |
| 339 | #endif /* CONFIG_PROC_FS */ | ||
| 340 | #endif | ||
| 341 | |||
| 342 | /* | ||
| 343 | * Get the resulting clock rate from a PLL register value and the input | ||
| 344 | * frequency. PLLs with this register layout can at least be found on | ||
| 345 | * MX1, MX21, MX27 and MX31 | ||
| 346 | * | ||
| 347 | * mfi + mfn / (mfd + 1) | ||
| 348 | * f = 2 * f_ref * -------------------- | ||
| 349 | * pd + 1 | ||
| 350 | */ | ||
| 351 | unsigned long mxc_decode_pll(unsigned int reg_val, u32 freq) | ||
| 352 | { | ||
| 353 | long long ll; | ||
| 354 | int mfn_abs; | ||
| 355 | unsigned int mfi, mfn, mfd, pd; | ||
| 356 | |||
| 357 | mfi = (reg_val >> 10) & 0xf; | ||
| 358 | mfn = reg_val & 0x3ff; | ||
| 359 | mfd = (reg_val >> 16) & 0x3ff; | ||
| 360 | pd = (reg_val >> 26) & 0xf; | ||
| 361 | |||
| 362 | mfi = mfi <= 5 ? 5 : mfi; | ||
| 363 | |||
| 364 | mfn_abs = mfn; | ||
| 365 | |||
| 366 | #if !defined CONFIG_ARCH_MX1 && !defined CONFIG_ARCH_MX21 | ||
| 367 | if (mfn >= 0x200) { | ||
| 368 | mfn |= 0xFFFFFE00; | ||
| 369 | mfn_abs = -mfn; | ||
| 370 | } | ||
| 330 | #endif | 371 | #endif |
| 372 | |||
| 373 | freq *= 2; | ||
| 374 | freq /= pd + 1; | ||
| 375 | |||
| 376 | ll = (unsigned long long)freq * mfn_abs; | ||
| 377 | |||
| 378 | do_div(ll, mfd + 1); | ||
| 379 | if (mfn < 0) | ||
| 380 | ll = -ll; | ||
| 381 | ll = (freq * mfi) + ll; | ||
| 382 | |||
| 383 | return ll; | ||
| 384 | } | ||
diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/plat-mxc/cpu.c new file mode 100644 index 000000000000..386e0d52cf58 --- /dev/null +++ b/arch/arm/plat-mxc/cpu.c | |||
| @@ -0,0 +1,11 @@ | |||
| 1 | |||
| 2 | #include <linux/module.h> | ||
| 3 | |||
| 4 | unsigned int __mxc_cpu_type; | ||
| 5 | EXPORT_SYMBOL(__mxc_cpu_type); | ||
| 6 | |||
| 7 | void mxc_set_cpu_type(unsigned int type) | ||
| 8 | { | ||
| 9 | __mxc_cpu_type = type; | ||
| 10 | } | ||
| 11 | |||
diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c index c66748267c45..56f2fb5cc456 100644 --- a/arch/arm/plat-mxc/devices.c +++ b/arch/arm/plat-mxc/devices.c | |||
| @@ -19,6 +19,7 @@ | |||
| 19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
| 20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
| 21 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
| 22 | #include <mach/common.h> | ||
| 22 | 23 | ||
| 23 | int __init mxc_register_device(struct platform_device *pdev, void *data) | 24 | int __init mxc_register_device(struct platform_device *pdev, void *data) |
| 24 | { | 25 | { |
diff --git a/arch/arm/plat-mxc/dma-mx1-mx2.c b/arch/arm/plat-mxc/dma-mx1-mx2.c index 2905ec758758..e364a5ed10f1 100644 --- a/arch/arm/plat-mxc/dma-mx1-mx2.c +++ b/arch/arm/plat-mxc/dma-mx1-mx2.c | |||
| @@ -113,7 +113,7 @@ struct imx_dma_channel { | |||
| 113 | void (*err_handler) (int, void *, int errcode); | 113 | void (*err_handler) (int, void *, int errcode); |
| 114 | void (*prog_handler) (int, void *, struct scatterlist *); | 114 | void (*prog_handler) (int, void *, struct scatterlist *); |
| 115 | void *data; | 115 | void *data; |
| 116 | unsigned int dma_mode; | 116 | unsigned int dma_mode; |
| 117 | struct scatterlist *sg; | 117 | struct scatterlist *sg; |
| 118 | unsigned int resbytes; | 118 | unsigned int resbytes; |
| 119 | int dma_num; | 119 | int dma_num; |
| @@ -802,7 +802,7 @@ static int __init imx_dma_init(void) | |||
| 802 | int ret = 0; | 802 | int ret = 0; |
| 803 | int i; | 803 | int i; |
| 804 | 804 | ||
| 805 | dma_clk = clk_get(NULL, "dma_clk"); | 805 | dma_clk = clk_get(NULL, "dma"); |
| 806 | clk_enable(dma_clk); | 806 | clk_enable(dma_clk); |
| 807 | 807 | ||
| 808 | /* reset DMA module */ | 808 | /* reset DMA module */ |
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index ccbd94adc668..c6483bad8a26 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c | |||
| @@ -200,8 +200,8 @@ static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
| 200 | static int mxc_gpio_direction_output(struct gpio_chip *chip, | 200 | static int mxc_gpio_direction_output(struct gpio_chip *chip, |
| 201 | unsigned offset, int value) | 201 | unsigned offset, int value) |
| 202 | { | 202 | { |
| 203 | _set_gpio_direction(chip, offset, 1); | ||
| 204 | mxc_gpio_set(chip, offset, value); | 203 | mxc_gpio_set(chip, offset, value); |
| 204 | _set_gpio_direction(chip, offset, 1); | ||
| 205 | return 0; | 205 | return 0; |
| 206 | } | 206 | } |
| 207 | 207 | ||
diff --git a/arch/arm/plat-mxc/include/mach/board-mx27ads.h b/arch/arm/plat-mxc/include/mach/board-mx27ads.h index 8f34a05afc87..1cac9d1135cd 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx27ads.h +++ b/arch/arm/plat-mxc/include/mach/board-mx27ads.h | |||
| @@ -48,7 +48,8 @@ | |||
| 48 | * Base address of PBC controller, CS4 | 48 | * Base address of PBC controller, CS4 |
| 49 | */ | 49 | */ |
| 50 | #define PBC_BASE_ADDRESS 0xEB000000 | 50 | #define PBC_BASE_ADDRESS 0xEB000000 |
| 51 | #define PBC_REG_ADDR(offset) (PBC_BASE_ADDRESS + (offset)) | 51 | #define PBC_REG_ADDR(offset) (void __force __iomem *) \ |
| 52 | (PBC_BASE_ADDRESS + (offset)) | ||
| 52 | 53 | ||
| 53 | /* | 54 | /* |
| 54 | * PBC Interupt name definitions | 55 | * PBC Interupt name definitions |
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31ads.h b/arch/arm/plat-mxc/include/mach/board-mx31ads.h index 451d510d08c3..318c72ada13d 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31ads.h +++ b/arch/arm/plat-mxc/include/mach/board-mx31ads.h | |||
| @@ -11,6 +11,8 @@ | |||
| 11 | #ifndef __ASM_ARCH_MXC_BOARD_MX31ADS_H__ | 11 | #ifndef __ASM_ARCH_MXC_BOARD_MX31ADS_H__ |
| 12 | #define __ASM_ARCH_MXC_BOARD_MX31ADS_H__ | 12 | #define __ASM_ARCH_MXC_BOARD_MX31ADS_H__ |
| 13 | 13 | ||
| 14 | #include <mach/hardware.h> | ||
| 15 | |||
| 14 | /* Base address of PBC controller */ | 16 | /* Base address of PBC controller */ |
| 15 | #define PBC_BASE_ADDRESS IO_ADDRESS(CS4_BASE_ADDR) | 17 | #define PBC_BASE_ADDRESS IO_ADDRESS(CS4_BASE_ADDR) |
| 16 | /* Offsets for the PBC Controller register */ | 18 | /* Offsets for the PBC Controller register */ |
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h new file mode 100644 index 000000000000..f8aef1babb75 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h | |||
| @@ -0,0 +1,45 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License | ||
| 6 | * as published by the Free Software Foundation; either version 2 | ||
| 7 | * of the License, or (at your option) any later version. | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program; if not, write to the Free Software | ||
| 15 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
| 16 | * MA 02110-1301, USA. | ||
| 17 | */ | ||
| 18 | |||
| 19 | #ifndef __ASM_ARCH_MXC_BOARD_MX31MOBOARD_H__ | ||
| 20 | #define __ASM_ARCH_MXC_BOARD_MX31MOBOARD_H__ | ||
| 21 | |||
| 22 | /* mandatory for CONFIG_LL_DEBUG */ | ||
| 23 | |||
| 24 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR | ||
| 25 | #define MXC_LL_UART_VADDR (AIPI_BASE_ADDR_VIRT + 0x0A000) | ||
| 26 | |||
| 27 | #ifndef __ASSEMBLY__ | ||
| 28 | |||
| 29 | enum mx31moboard_boards { | ||
| 30 | MX31NOBOARD = 0, | ||
| 31 | MX31DEVBOARD = 1, | ||
| 32 | MX31MARXBOT = 2, | ||
| 33 | }; | ||
| 34 | |||
| 35 | /* | ||
| 36 | * This CPU module needs a baseboard to work. After basic initializing | ||
| 37 | * its own devices, it calls baseboard's init function. | ||
| 38 | */ | ||
| 39 | |||
| 40 | extern void mx31moboard_devboard_init(void); | ||
| 41 | extern void mx31moboard_marxbot_init(void); | ||
| 42 | |||
| 43 | #endif | ||
| 44 | |||
| 45 | #endif /* __ASM_ARCH_MXC_BOARD_MX31MOBOARD_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/board-qong.h b/arch/arm/plat-mxc/include/mach/board-qong.h new file mode 100644 index 000000000000..4ff762dd45cf --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/board-qong.h | |||
| @@ -0,0 +1,22 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com> | ||
| 3 | */ | ||
| 4 | |||
| 5 | /* | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __ASM_ARCH_MXC_BOARD_QONG_H__ | ||
| 12 | #define __ASM_ARCH_MXC_BOARD_QONG_H__ | ||
| 13 | |||
| 14 | /* mandatory for CONFIG_LL_DEBUG */ | ||
| 15 | |||
| 16 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR | ||
| 17 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) | ||
| 18 | |||
| 19 | /* NOR FLASH */ | ||
| 20 | #define QONG_NOR_SIZE (128*1024*1024) | ||
| 21 | |||
| 22 | #endif /* __ASM_ARCH_MXC_BOARD_QONG_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/clkdev.h b/arch/arm/plat-mxc/include/mach/clkdev.h new file mode 100644 index 000000000000..04b37a89801c --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/clkdev.h | |||
| @@ -0,0 +1,7 @@ | |||
| 1 | #ifndef __ASM_MACH_CLKDEV_H | ||
| 2 | #define __ASM_MACH_CLKDEV_H | ||
| 3 | |||
| 4 | #define __clk_get(clk) ({ 1; }) | ||
| 5 | #define __clk_put(clk) do { } while (0) | ||
| 6 | |||
| 7 | #endif | ||
diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h index d21f78e78819..43a82d0c534d 100644 --- a/arch/arm/plat-mxc/include/mach/clock.h +++ b/arch/arm/plat-mxc/include/mach/clock.h | |||
| @@ -26,9 +26,13 @@ | |||
| 26 | struct module; | 26 | struct module; |
| 27 | 27 | ||
| 28 | struct clk { | 28 | struct clk { |
| 29 | #ifndef CONFIG_COMMON_CLKDEV | ||
| 30 | /* As soon as i.MX1 and i.MX31 switched to clkdev, this | ||
| 31 | * block can go away */ | ||
| 29 | struct list_head node; | 32 | struct list_head node; |
| 30 | struct module *owner; | 33 | struct module *owner; |
| 31 | const char *name; | 34 | const char *name; |
| 35 | #endif | ||
| 32 | int id; | 36 | int id; |
| 33 | /* Source clock this clk depends on */ | 37 | /* Source clock this clk depends on */ |
| 34 | struct clk *parent; | 38 | struct clk *parent; |
| @@ -63,5 +67,7 @@ struct clk { | |||
| 63 | int clk_register(struct clk *clk); | 67 | int clk_register(struct clk *clk); |
| 64 | void clk_unregister(struct clk *clk); | 68 | void clk_unregister(struct clk *clk); |
| 65 | 69 | ||
| 70 | unsigned long mxc_decode_pll(unsigned int pll, u32 f_ref); | ||
| 71 | |||
| 66 | #endif /* __ASSEMBLY__ */ | 72 | #endif /* __ASSEMBLY__ */ |
| 67 | #endif /* __ASM_ARCH_MXC_CLOCK_H__ */ | 73 | #endif /* __ASM_ARCH_MXC_CLOCK_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 6350287a59b9..b2f9b72644db 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h | |||
| @@ -12,12 +12,18 @@ | |||
| 12 | #define __ASM_ARCH_MXC_COMMON_H__ | 12 | #define __ASM_ARCH_MXC_COMMON_H__ |
| 13 | 13 | ||
| 14 | struct platform_device; | 14 | struct platform_device; |
| 15 | struct clk; | ||
| 15 | 16 | ||
| 16 | extern void mxc_map_io(void); | 17 | extern void mxc_map_io(void); |
| 17 | extern void mxc_init_irq(void); | 18 | extern void mxc_init_irq(void); |
| 18 | extern void mxc_timer_init(const char *clk_timer); | 19 | extern void mxc_timer_init(struct clk *timer_clk); |
| 19 | extern int mxc_clocks_init(unsigned long fref); | 20 | extern int mx1_clocks_init(unsigned long fref); |
| 21 | extern int mx21_clocks_init(unsigned long lref, unsigned long fref); | ||
| 22 | extern int mx27_clocks_init(unsigned long fref); | ||
| 23 | extern int mx31_clocks_init(unsigned long fref); | ||
| 24 | extern int mx35_clocks_init(void); | ||
| 20 | extern int mxc_register_gpios(void); | 25 | extern int mxc_register_gpios(void); |
| 21 | extern int mxc_register_device(struct platform_device *pdev, void *data); | 26 | extern int mxc_register_device(struct platform_device *pdev, void *data); |
| 27 | extern void mxc_set_cpu_type(unsigned int type); | ||
| 22 | 28 | ||
| 23 | #endif | 29 | #endif |
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index 602768b427e2..4f773148bc20 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S | |||
| @@ -31,6 +31,9 @@ | |||
| 31 | #ifdef CONFIG_MACH_MX31_3DS | 31 | #ifdef CONFIG_MACH_MX31_3DS |
| 32 | #include <mach/board-mx31pdk.h> | 32 | #include <mach/board-mx31pdk.h> |
| 33 | #endif | 33 | #endif |
| 34 | #ifdef CONFIG_MACH_QONG | ||
| 35 | #include <mach/board-qong.h> | ||
| 36 | #endif | ||
| 34 | .macro addruart,rx | 37 | .macro addruart,rx |
| 35 | mrc p15, 0, \rx, c1, c0 | 38 | mrc p15, 0, \rx, c1, c0 |
| 36 | tst \rx, #1 @ MMU enabled? | 39 | tst \rx, #1 @ MMU enabled? |
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index a612d8bb73c8..42e4ee37ca1f 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h | |||
| @@ -23,10 +23,16 @@ | |||
| 23 | #include <asm/sizes.h> | 23 | #include <asm/sizes.h> |
| 24 | 24 | ||
| 25 | #ifdef CONFIG_ARCH_MX3 | 25 | #ifdef CONFIG_ARCH_MX3 |
| 26 | # include <mach/mx31.h> | 26 | #include <mach/mx3x.h> |
| 27 | #include <mach/mx31.h> | ||
| 28 | #include <mach/mx35.h> | ||
| 27 | #endif | 29 | #endif |
| 28 | 30 | ||
| 29 | #ifdef CONFIG_ARCH_MX2 | 31 | #ifdef CONFIG_ARCH_MX2 |
| 32 | # include <mach/mx2x.h> | ||
| 33 | # ifdef CONFIG_MACH_MX21 | ||
| 34 | # include <mach/mx21.h> | ||
| 35 | # endif | ||
| 30 | # ifdef CONFIG_MACH_MX27 | 36 | # ifdef CONFIG_MACH_MX27 |
| 31 | # include <mach/mx27.h> | 37 | # include <mach/mx27.h> |
| 32 | # endif | 38 | # endif |
diff --git a/arch/arm/mach-imx/include/mach/imxfb.h b/arch/arm/plat-mxc/include/mach/imxfb.h index 870d0d939616..762a7b0430e2 100644 --- a/arch/arm/mach-imx/include/mach/imxfb.h +++ b/arch/arm/plat-mxc/include/mach/imxfb.h | |||
| @@ -76,6 +76,9 @@ struct imx_fb_platform_data { | |||
| 76 | u_char * fixed_screen_cpu; | 76 | u_char * fixed_screen_cpu; |
| 77 | dma_addr_t fixed_screen_dma; | 77 | dma_addr_t fixed_screen_dma; |
| 78 | 78 | ||
| 79 | int (*init)(struct platform_device*); | ||
| 80 | int (*exit)(struct platform_device*); | ||
| 81 | |||
| 79 | void (*lcd_power)(int); | 82 | void (*lcd_power)(int); |
| 80 | void (*backlight_power)(int); | 83 | void (*backlight_power)(int); |
| 81 | }; | 84 | }; |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h deleted file mode 100644 index 95a383be628e..000000000000 --- a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h +++ /dev/null | |||
| @@ -1,416 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License | ||
| 6 | * as published by the Free Software Foundation; either version 2 | ||
| 7 | * of the License, or (at your option) any later version. | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program; if not, write to the Free Software | ||
| 15 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
| 16 | * MA 02110-1301, USA. | ||
| 17 | */ | ||
| 18 | |||
| 19 | #ifndef _MXC_GPIO_MX1_MX2_H | ||
| 20 | #define _MXC_GPIO_MX1_MX2_H | ||
| 21 | |||
| 22 | #include <linux/io.h> | ||
| 23 | |||
| 24 | /* | ||
| 25 | * GPIO Module and I/O Multiplexer | ||
| 26 | * x = 0..3 for reg_A, reg_B, reg_C, reg_D | ||
| 27 | */ | ||
| 28 | #define VA_GPIO_BASE IO_ADDRESS(GPIO_BASE_ADDR) | ||
| 29 | #define MXC_DDIR(x) (0x00 + ((x) << 8)) | ||
| 30 | #define MXC_OCR1(x) (0x04 + ((x) << 8)) | ||
| 31 | #define MXC_OCR2(x) (0x08 + ((x) << 8)) | ||
| 32 | #define MXC_ICONFA1(x) (0x0c + ((x) << 8)) | ||
| 33 | #define MXC_ICONFA2(x) (0x10 + ((x) << 8)) | ||
| 34 | #define MXC_ICONFB1(x) (0x14 + ((x) << 8)) | ||
| 35 | #define MXC_ICONFB2(x) (0x18 + ((x) << 8)) | ||
| 36 | #define MXC_DR(x) (0x1c + ((x) << 8)) | ||
| 37 | #define MXC_GIUS(x) (0x20 + ((x) << 8)) | ||
| 38 | #define MXC_SSR(x) (0x24 + ((x) << 8)) | ||
| 39 | #define MXC_ICR1(x) (0x28 + ((x) << 8)) | ||
| 40 | #define MXC_ICR2(x) (0x2c + ((x) << 8)) | ||
| 41 | #define MXC_IMR(x) (0x30 + ((x) << 8)) | ||
| 42 | #define MXC_ISR(x) (0x34 + ((x) << 8)) | ||
| 43 | #define MXC_GPR(x) (0x38 + ((x) << 8)) | ||
| 44 | #define MXC_SWR(x) (0x3c + ((x) << 8)) | ||
| 45 | #define MXC_PUEN(x) (0x40 + ((x) << 8)) | ||
| 46 | |||
| 47 | #ifdef CONFIG_ARCH_MX1 | ||
| 48 | # define GPIO_PORT_MAX 3 | ||
| 49 | #endif | ||
| 50 | #ifdef CONFIG_ARCH_MX2 | ||
| 51 | # define GPIO_PORT_MAX 5 | ||
| 52 | #endif | ||
| 53 | |||
| 54 | #ifndef GPIO_PORT_MAX | ||
| 55 | # error "GPIO config port count unknown!" | ||
| 56 | #endif | ||
| 57 | |||
| 58 | #define GPIO_PIN_MASK 0x1f | ||
| 59 | |||
| 60 | #define GPIO_PORT_SHIFT 5 | ||
| 61 | #define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT) | ||
| 62 | |||
| 63 | #define GPIO_PORTA (0 << GPIO_PORT_SHIFT) | ||
| 64 | #define GPIO_PORTB (1 << GPIO_PORT_SHIFT) | ||
| 65 | #define GPIO_PORTC (2 << GPIO_PORT_SHIFT) | ||
| 66 | #define GPIO_PORTD (3 << GPIO_PORT_SHIFT) | ||
| 67 | #define GPIO_PORTE (4 << GPIO_PORT_SHIFT) | ||
| 68 | #define GPIO_PORTF (5 << GPIO_PORT_SHIFT) | ||
| 69 | |||
| 70 | #define GPIO_OUT (1 << 8) | ||
| 71 | #define GPIO_IN (0 << 8) | ||
| 72 | #define GPIO_PUEN (1 << 9) | ||
| 73 | |||
| 74 | #define GPIO_PF (1 << 10) | ||
| 75 | #define GPIO_AF (1 << 11) | ||
| 76 | |||
| 77 | #define GPIO_OCR_SHIFT 12 | ||
| 78 | #define GPIO_OCR_MASK (3 << GPIO_OCR_SHIFT) | ||
| 79 | #define GPIO_AIN (0 << GPIO_OCR_SHIFT) | ||
| 80 | #define GPIO_BIN (1 << GPIO_OCR_SHIFT) | ||
| 81 | #define GPIO_CIN (2 << GPIO_OCR_SHIFT) | ||
| 82 | #define GPIO_GPIO (3 << GPIO_OCR_SHIFT) | ||
| 83 | |||
| 84 | #define GPIO_AOUT_SHIFT 14 | ||
| 85 | #define GPIO_AOUT_MASK (3 << GPIO_AOUT_SHIFT) | ||
| 86 | #define GPIO_AOUT (0 << GPIO_AOUT_SHIFT) | ||
| 87 | #define GPIO_AOUT_ISR (1 << GPIO_AOUT_SHIFT) | ||
| 88 | #define GPIO_AOUT_0 (2 << GPIO_AOUT_SHIFT) | ||
| 89 | #define GPIO_AOUT_1 (3 << GPIO_AOUT_SHIFT) | ||
| 90 | |||
| 91 | #define GPIO_BOUT_SHIFT 16 | ||
| 92 | #define GPIO_BOUT_MASK (3 << GPIO_BOUT_SHIFT) | ||
| 93 | #define GPIO_BOUT (0 << GPIO_BOUT_SHIFT) | ||
| 94 | #define GPIO_BOUT_ISR (1 << GPIO_BOUT_SHIFT) | ||
| 95 | #define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT) | ||
| 96 | #define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT) | ||
| 97 | |||
| 98 | extern void mxc_gpio_mode(int gpio_mode); | ||
| 99 | extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, | ||
| 100 | const char *label); | ||
| 101 | extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count); | ||
| 102 | |||
| 103 | /*-------------------------------------------------------------------------*/ | ||
| 104 | |||
| 105 | /* assignements for GPIO alternate/primary functions */ | ||
| 106 | |||
| 107 | /* FIXME: This list is not completed. The correct directions are | ||
| 108 | * missing on some (many) pins | ||
| 109 | */ | ||
| 110 | #ifdef CONFIG_ARCH_MX1 | ||
| 111 | #define PA0_AIN_SPI2_CLK (GPIO_PORTA | GPIO_OUT | 0) | ||
| 112 | #define PA0_AF_ETMTRACESYNC (GPIO_PORTA | GPIO_AF | 0) | ||
| 113 | #define PA1_AOUT_SPI2_RXD (GPIO_PORTA | GPIO_IN | 1) | ||
| 114 | #define PA1_PF_TIN (GPIO_PORTA | GPIO_PF | 1) | ||
| 115 | #define PA2_PF_PWM0 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 2) | ||
| 116 | #define PA3_PF_CSI_MCLK (GPIO_PORTA | GPIO_PF | 3) | ||
| 117 | #define PA4_PF_CSI_D0 (GPIO_PORTA | GPIO_PF | 4) | ||
| 118 | #define PA5_PF_CSI_D1 (GPIO_PORTA | GPIO_PF | 5) | ||
| 119 | #define PA6_PF_CSI_D2 (GPIO_PORTA | GPIO_PF | 6) | ||
| 120 | #define PA7_PF_CSI_D3 (GPIO_PORTA | GPIO_PF | 7) | ||
| 121 | #define PA8_PF_CSI_D4 (GPIO_PORTA | GPIO_PF | 8) | ||
| 122 | #define PA9_PF_CSI_D5 (GPIO_PORTA | GPIO_PF | 9) | ||
| 123 | #define PA10_PF_CSI_D6 (GPIO_PORTA | GPIO_PF | 10) | ||
| 124 | #define PA11_PF_CSI_D7 (GPIO_PORTA | GPIO_PF | 11) | ||
| 125 | #define PA12_PF_CSI_VSYNC (GPIO_PORTA | GPIO_PF | 12) | ||
| 126 | #define PA13_PF_CSI_HSYNC (GPIO_PORTA | GPIO_PF | 13) | ||
| 127 | #define PA14_PF_CSI_PIXCLK (GPIO_PORTA | GPIO_PF | 14) | ||
| 128 | #define PA15_PF_I2C_SDA (GPIO_PORTA | GPIO_OUT | GPIO_PF | 15) | ||
| 129 | #define PA16_PF_I2C_SCL (GPIO_PORTA | GPIO_OUT | GPIO_PF | 16) | ||
| 130 | #define PA17_AF_ETMTRACEPKT4 (GPIO_PORTA | GPIO_AF | 17) | ||
| 131 | #define PA17_AIN_SPI2_SS (GPIO_PORTA | GPIO_OUT | 17) | ||
| 132 | #define PA18_AF_ETMTRACEPKT5 (GPIO_PORTA | GPIO_AF | 18) | ||
| 133 | #define PA19_AF_ETMTRACEPKT6 (GPIO_PORTA | GPIO_AF | 19) | ||
| 134 | #define PA20_AF_ETMTRACEPKT7 (GPIO_PORTA | GPIO_AF | 20) | ||
| 135 | #define PA21_PF_A0 (GPIO_PORTA | GPIO_PF | 21) | ||
| 136 | #define PA22_PF_CS4 (GPIO_PORTA | GPIO_PF | 22) | ||
| 137 | #define PA23_PF_CS5 (GPIO_PORTA | GPIO_PF | 23) | ||
| 138 | #define PA24_PF_A16 (GPIO_PORTA | GPIO_PF | 24) | ||
| 139 | #define PA24_AF_ETMTRACEPKT0 (GPIO_PORTA | GPIO_AF | 24) | ||
| 140 | #define PA25_PF_A17 (GPIO_PORTA | GPIO_PF | 25) | ||
| 141 | #define PA25_AF_ETMTRACEPKT1 (GPIO_PORTA | GPIO_AF | 25) | ||
| 142 | #define PA26_PF_A18 (GPIO_PORTA | GPIO_PF | 26) | ||
| 143 | #define PA26_AF_ETMTRACEPKT2 (GPIO_PORTA | GPIO_AF | 26) | ||
| 144 | #define PA27_PF_A19 (GPIO_PORTA | GPIO_PF | 27) | ||
| 145 | #define PA27_AF_ETMTRACEPKT3 (GPIO_PORTA | GPIO_AF | 27) | ||
| 146 | #define PA28_PF_A20 (GPIO_PORTA | GPIO_PF | 28) | ||
| 147 | #define PA28_AF_ETMPIPESTAT0 (GPIO_PORTA | GPIO_AF | 28) | ||
| 148 | #define PA29_PF_A21 (GPIO_PORTA | GPIO_PF | 29) | ||
| 149 | #define PA29_AF_ETMPIPESTAT1 (GPIO_PORTA | GPIO_AF | 29) | ||
| 150 | #define PA30_PF_A22 (GPIO_PORTA | GPIO_PF | 30) | ||
| 151 | #define PA30_AF_ETMPIPESTAT2 (GPIO_PORTA | GPIO_AF | 30) | ||
| 152 | #define PA31_PF_A23 (GPIO_PORTA | GPIO_PF | 31) | ||
| 153 | #define PA31_AF_ETMTRACECLK (GPIO_PORTA | GPIO_AF | 31) | ||
| 154 | #define PB8_PF_SD_DAT0 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8) | ||
| 155 | #define PB8_AF_MS_PIO (GPIO_PORTB | GPIO_AF | 8) | ||
| 156 | #define PB9_PF_SD_DAT1 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9) | ||
| 157 | #define PB9_AF_MS_PI1 (GPIO_PORTB | GPIO_AF | 9) | ||
| 158 | #define PB10_PF_SD_DAT2 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10) | ||
| 159 | #define PB10_AF_MS_SCLKI (GPIO_PORTB | GPIO_AF | 10) | ||
| 160 | #define PB11_PF_SD_DAT3 (GPIO_PORTB | GPIO_PF | 11) | ||
| 161 | #define PB11_AF_MS_SDIO (GPIO_PORTB | GPIO_AF | 11) | ||
| 162 | #define PB12_PF_SD_CLK (GPIO_PORTB | GPIO_PF | 12) | ||
| 163 | #define PB12_AF_MS_SCLK0 (GPIO_PORTB | GPIO_AF | 12) | ||
| 164 | #define PB13_PF_SD_CMD (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13) | ||
| 165 | #define PB13_AF_MS_BS (GPIO_PORTB | GPIO_AF | 13) | ||
| 166 | #define PB14_AF_SSI_RXFS (GPIO_PORTB | GPIO_AF | 14) | ||
| 167 | #define PB15_AF_SSI_RXCLK (GPIO_PORTB | GPIO_AF | 15) | ||
| 168 | #define PB16_AF_SSI_RXDAT (GPIO_PORTB | GPIO_IN | GPIO_AF | 16) | ||
| 169 | #define PB17_AF_SSI_TXDAT (GPIO_PORTB | GPIO_OUT | GPIO_AF | 17) | ||
| 170 | #define PB18_AF_SSI_TXFS (GPIO_PORTB | GPIO_AF | 18) | ||
| 171 | #define PB19_AF_SSI_TXCLK (GPIO_PORTB | GPIO_AF | 19) | ||
| 172 | #define PB20_PF_USBD_AFE (GPIO_PORTB | GPIO_PF | 20) | ||
| 173 | #define PB21_PF_USBD_OE (GPIO_PORTB | GPIO_PF | 21) | ||
| 174 | #define PB22_PFUSBD_RCV (GPIO_PORTB | GPIO_PF | 22) | ||
| 175 | #define PB23_PF_USBD_SUSPND (GPIO_PORTB | GPIO_PF | 23) | ||
| 176 | #define PB24_PF_USBD_VP (GPIO_PORTB | GPIO_PF | 24) | ||
| 177 | #define PB25_PF_USBD_VM (GPIO_PORTB | GPIO_PF | 25) | ||
| 178 | #define PB26_PF_USBD_VPO (GPIO_PORTB | GPIO_PF | 26) | ||
| 179 | #define PB27_PF_USBD_VMO (GPIO_PORTB | GPIO_PF | 27) | ||
| 180 | #define PB28_PF_UART2_CTS (GPIO_PORTB | GPIO_OUT | GPIO_PF | 28) | ||
| 181 | #define PB29_PF_UART2_RTS (GPIO_PORTB | GPIO_IN | GPIO_PF | 29) | ||
| 182 | #define PB30_PF_UART2_TXD (GPIO_PORTB | GPIO_OUT | GPIO_PF | 30) | ||
| 183 | #define PB31_PF_UART2_RXD (GPIO_PORTB | GPIO_IN | GPIO_PF | 31) | ||
| 184 | #define PC3_PF_SSI_RXFS (GPIO_PORTC | GPIO_PF | 3) | ||
| 185 | #define PC4_PF_SSI_RXCLK (GPIO_PORTC | GPIO_PF | 4) | ||
| 186 | #define PC5_PF_SSI_RXDAT (GPIO_PORTC | GPIO_IN | GPIO_PF | 5) | ||
| 187 | #define PC6_PF_SSI_TXDAT (GPIO_PORTC | GPIO_OUT | GPIO_PF | 6) | ||
| 188 | #define PC7_PF_SSI_TXFS (GPIO_PORTC | GPIO_PF | 7) | ||
| 189 | #define PC8_PF_SSI_TXCLK (GPIO_PORTC | GPIO_PF | 8) | ||
| 190 | #define PC9_PF_UART1_CTS (GPIO_PORTC | GPIO_OUT | GPIO_PF | 9) | ||
| 191 | #define PC10_PF_UART1_RTS (GPIO_PORTC | GPIO_IN | GPIO_PF | 10) | ||
| 192 | #define PC11_PF_UART1_TXD (GPIO_PORTC | GPIO_OUT | GPIO_PF | 11) | ||
| 193 | #define PC12_PF_UART1_RXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 12) | ||
| 194 | #define PC13_PF_SPI1_SPI_RDY (GPIO_PORTC | GPIO_PF | 13) | ||
| 195 | #define PC14_PF_SPI1_SCLK (GPIO_PORTC | GPIO_PF | 14) | ||
| 196 | #define PC15_PF_SPI1_SS (GPIO_PORTC | GPIO_PF | 15) | ||
| 197 | #define PC16_PF_SPI1_MISO (GPIO_PORTC | GPIO_PF | 16) | ||
| 198 | #define PC17_PF_SPI1_MOSI (GPIO_PORTC | GPIO_PF | 17) | ||
| 199 | #define PC24_BIN_UART3_RI (GPIO_PORTC | GPIO_OUT | GPIO_BIN | 24) | ||
| 200 | #define PC25_BIN_UART3_DSR (GPIO_PORTC | GPIO_OUT | GPIO_BIN | 25) | ||
| 201 | #define PC26_AOUT_UART3_DTR (GPIO_PORTC | GPIO_IN | 26) | ||
| 202 | #define PC27_BIN_UART3_DCD (GPIO_PORTC | GPIO_OUT | GPIO_BIN | 27) | ||
| 203 | #define PC28_BIN_UART3_CTS (GPIO_PORTC | GPIO_OUT | GPIO_BIN | 28) | ||
| 204 | #define PC29_AOUT_UART3_RTS (GPIO_PORTC | GPIO_IN | 29) | ||
| 205 | #define PC30_BIN_UART3_TX (GPIO_PORTC | GPIO_BIN | 30) | ||
| 206 | #define PC31_AOUT_UART3_RX (GPIO_PORTC | GPIO_IN | 31) | ||
| 207 | #define PD6_PF_LSCLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 6) | ||
| 208 | #define PD7_PF_REV (GPIO_PORTD | GPIO_PF | 7) | ||
| 209 | #define PD7_AF_UART2_DTR (GPIO_PORTD | GPIO_IN | GPIO_AF | 7) | ||
| 210 | #define PD7_AIN_SPI2_SCLK (GPIO_PORTD | GPIO_AIN | 7) | ||
| 211 | #define PD8_PF_CLS (GPIO_PORTD | GPIO_PF | 8) | ||
| 212 | #define PD8_AF_UART2_DCD (GPIO_PORTD | GPIO_OUT | GPIO_AF | 8) | ||
| 213 | #define PD8_AIN_SPI2_SS (GPIO_PORTD | GPIO_AIN | 8) | ||
| 214 | #define PD9_PF_PS (GPIO_PORTD | GPIO_PF | 9) | ||
| 215 | #define PD9_AF_UART2_RI (GPIO_PORTD | GPIO_OUT | GPIO_AF | 9) | ||
| 216 | #define PD9_AOUT_SPI2_RXD (GPIO_PORTD | GPIO_IN | 9) | ||
| 217 | #define PD10_PF_SPL_SPR (GPIO_PORTD | GPIO_OUT | GPIO_PF | 10) | ||
| 218 | #define PD10_AF_UART2_DSR (GPIO_PORTD | GPIO_OUT | GPIO_AF | 10) | ||
| 219 | #define PD10_AIN_SPI2_TXD (GPIO_PORTD | GPIO_OUT | 10) | ||
| 220 | #define PD11_PF_CONTRAST (GPIO_PORTD | GPIO_OUT | GPIO_PF | 11) | ||
| 221 | #define PD12_PF_ACD_OE (GPIO_PORTD | GPIO_OUT | GPIO_PF | 12) | ||
| 222 | #define PD13_PF_LP_HSYNC (GPIO_PORTD | GPIO_OUT | GPIO_PF | 13) | ||
| 223 | #define PD14_PF_FLM_VSYNC (GPIO_PORTD | GPIO_OUT | GPIO_PF | 14) | ||
| 224 | #define PD15_PF_LD0 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 15) | ||
| 225 | #define PD16_PF_LD1 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 16) | ||
| 226 | #define PD17_PF_LD2 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 17) | ||
| 227 | #define PD18_PF_LD3 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 18) | ||
| 228 | #define PD19_PF_LD4 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 19) | ||
| 229 | #define PD20_PF_LD5 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 20) | ||
| 230 | #define PD21_PF_LD6 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 21) | ||
| 231 | #define PD22_PF_LD7 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 22) | ||
| 232 | #define PD23_PF_LD8 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 23) | ||
| 233 | #define PD24_PF_LD9 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 24) | ||
| 234 | #define PD25_PF_LD10 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 25) | ||
| 235 | #define PD26_PF_LD11 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 26) | ||
| 236 | #define PD27_PF_LD12 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 27) | ||
| 237 | #define PD28_PF_LD13 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 28) | ||
| 238 | #define PD29_PF_LD14 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 29) | ||
| 239 | #define PD30_PF_LD15 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 30) | ||
| 240 | #define PD31_PF_TMR2OUT (GPIO_PORTD | GPIO_PF | 31) | ||
| 241 | #define PD31_BIN_SPI2_TXD (GPIO_PORTD | GPIO_BIN | 31) | ||
| 242 | #endif | ||
| 243 | |||
| 244 | #ifdef CONFIG_ARCH_MX2 | ||
| 245 | #define PA0_PF_USBH2_CLK (GPIO_PORTA | GPIO_PF | 0) | ||
| 246 | #define PA1_PF_USBH2_DIR (GPIO_PORTA | GPIO_PF | 1) | ||
| 247 | #define PA2_PF_USBH2_DATA7 (GPIO_PORTA | GPIO_PF | 2) | ||
| 248 | #define PA3_PF_USBH2_NXT (GPIO_PORTA | GPIO_PF | 3) | ||
| 249 | #define PA4_PF_USBH2_STP (GPIO_PORTA | GPIO_PF | 4) | ||
| 250 | #define PA5_PF_LSCLK (GPIO_PORTA | GPIO_OUT | GPIO_PF | 5) | ||
| 251 | #define PA6_PF_LD0 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 6) | ||
| 252 | #define PA7_PF_LD1 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 7) | ||
| 253 | #define PA8_PF_LD2 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 8) | ||
| 254 | #define PA9_PF_LD3 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 9) | ||
| 255 | #define PA10_PF_LD4 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 10) | ||
| 256 | #define PA11_PF_LD5 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 11) | ||
| 257 | #define PA12_PF_LD6 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 12) | ||
| 258 | #define PA13_PF_LD7 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 13) | ||
| 259 | #define PA14_PF_LD8 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 14) | ||
| 260 | #define PA15_PF_LD9 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 15) | ||
| 261 | #define PA16_PF_LD10 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 16) | ||
| 262 | #define PA17_PF_LD11 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 17) | ||
| 263 | #define PA18_PF_LD12 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 18) | ||
| 264 | #define PA19_PF_LD13 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 19) | ||
| 265 | #define PA20_PF_LD14 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 20) | ||
| 266 | #define PA21_PF_LD15 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 21) | ||
| 267 | #define PA22_PF_LD16 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 22) | ||
| 268 | #define PA23_PF_LD17 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 23) | ||
| 269 | #define PA24_PF_REV (GPIO_PORTA | GPIO_OUT | GPIO_PF | 24) | ||
| 270 | #define PA25_PF_CLS (GPIO_PORTA | GPIO_OUT | GPIO_PF | 25) | ||
| 271 | #define PA26_PF_PS (GPIO_PORTA | GPIO_OUT | GPIO_PF | 26) | ||
| 272 | #define PA27_PF_SPL_SPR (GPIO_PORTA | GPIO_OUT | GPIO_PF | 27) | ||
| 273 | #define PA28_PF_HSYNC (GPIO_PORTA | GPIO_OUT | GPIO_PF | 28) | ||
| 274 | #define PA29_PF_VSYNC (GPIO_PORTA | GPIO_OUT | GPIO_PF | 29) | ||
| 275 | #define PA30_PF_CONTRAST (GPIO_PORTA | GPIO_OUT | GPIO_PF | 30) | ||
| 276 | #define PA31_PF_OE_ACD (GPIO_PORTA | GPIO_OUT | GPIO_PF | 31) | ||
| 277 | #define PB4_PF_SD2_D0 (GPIO_PORTB | GPIO_PF | 4) | ||
| 278 | #define PB5_PF_SD2_D1 (GPIO_PORTB | GPIO_PF | 5) | ||
| 279 | #define PB6_PF_SD2_D2 (GPIO_PORTB | GPIO_PF | 6) | ||
| 280 | #define PB7_PF_SD2_D3 (GPIO_PORTB | GPIO_PF | 7) | ||
| 281 | #define PB8_PF_SD2_CMD (GPIO_PORTB | GPIO_PF | 8) | ||
| 282 | #define PB9_PF_SD2_CLK (GPIO_PORTB | GPIO_PF | 9) | ||
| 283 | #define PB10_PF_CSI_D0 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 10) | ||
| 284 | #define PB10_AF_UART6_TXD (GPIO_PORTB | GPIO_OUT | GPIO_AF | 10) | ||
| 285 | #define PB11_PF_CSI_D1 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 11) | ||
| 286 | #define PB11_AF_UART6_RXD (GPIO_PORTB | GPIO_IN | GPIO_AF | 11) | ||
| 287 | #define PB12_PF_CSI_D2 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 12) | ||
| 288 | #define PB12_AF_UART6_CTS (GPIO_PORTB | GPIO_OUT | GPIO_AF | 12) | ||
| 289 | #define PB13_PF_CSI_D3 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 13) | ||
| 290 | #define PB13_AF_UART6_RTS (GPIO_PORTB | GPIO_IN | GPIO_AF | 13) | ||
| 291 | #define PB14_PF_CSI_D4 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 14) | ||
| 292 | #define PB15_PF_CSI_MCLK (GPIO_PORTB | GPIO_OUT | GPIO_PF | 15) | ||
| 293 | #define PB16_PF_CSI_PIXCLK (GPIO_PORTB | GPIO_OUT | GPIO_PF | 16) | ||
| 294 | #define PB17_PF_CSI_D5 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 17) | ||
| 295 | #define PB18_PF_CSI_D6 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 18) | ||
| 296 | #define PB18_AF_UART5_TXD (GPIO_PORTB | GPIO_OUT | GPIO_AF | 18) | ||
| 297 | #define PB19_PF_CSI_D7 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 19) | ||
| 298 | #define PB19_AF_UART5_RXD (GPIO_PORTB | GPIO_IN | GPIO_AF | 19) | ||
| 299 | #define PB20_PF_CSI_VSYNC (GPIO_PORTB | GPIO_OUT | GPIO_PF | 20) | ||
| 300 | #define PB20_AF_UART5_CTS (GPIO_PORTB | GPIO_OUT | GPIO_AF | 20) | ||
| 301 | #define PB21_PF_CSI_HSYNC (GPIO_PORTB | GPIO_OUT | GPIO_PF | 21) | ||
| 302 | #define PB21_AF_UART5_RTS (GPIO_PORTB | GPIO_IN | GPIO_AF | 21) | ||
| 303 | #define PB22_PF_USBH1_SUSP (GPIO_PORTB | GPIO_PF | 22) | ||
| 304 | #define PB23_PF_USB_PWR (GPIO_PORTB | GPIO_PF | 23) | ||
| 305 | #define PB24_PF_USB_OC_B (GPIO_PORTB | GPIO_PF | 24) | ||
| 306 | #define PB25_PF_USBH1_RCV (GPIO_PORTB | GPIO_PF | 25) | ||
| 307 | #define PB26_PF_USBH1_FS (GPIO_PORTB | GPIO_PF | 26) | ||
| 308 | #define PB27_PF_USBH1_OE_B (GPIO_PORTB | GPIO_PF | 27) | ||
| 309 | #define PB28_PF_USBH1_TXDM (GPIO_PORTB | GPIO_PF | 28) | ||
| 310 | #define PB29_PF_USBH1_TXDP (GPIO_PORTB | GPIO_PF | 29) | ||
| 311 | #define PB30_PF_USBH1_RXDM (GPIO_PORTB | GPIO_PF | 30) | ||
| 312 | #define PB31_PF_USBH1_RXDP (GPIO_PORTB | GPIO_PF | 31) | ||
| 313 | #define PB26_AF_UART4_RTS (GPIO_PORTB | GPIO_IN | GPIO_PF | 26) | ||
| 314 | #define PB28_AF_UART4_TXD (GPIO_PORTB | GPIO_OUT | GPIO_AF | 28) | ||
| 315 | #define PB29_AF_UART4_CTS (GPIO_PORTB | GPIO_OUT | GPIO_AF | 29) | ||
| 316 | #define PB31_AF_UART4_RXD (GPIO_PORTB | GPIO_IN | GPIO_AF | 31) | ||
| 317 | #define PC5_PF_I2C2_SDA (GPIO_PORTC | GPIO_IN | GPIO_PF | 5) | ||
| 318 | #define PC6_PF_I2C2_SCL (GPIO_PORTC | GPIO_IN | GPIO_PF | 6) | ||
| 319 | #define PC7_PF_USBOTG_DATA5 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 7) | ||
| 320 | #define PC8_PF_USBOTG_DATA6 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 8) | ||
| 321 | #define PC9_PF_USBOTG_DATA0 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 9) | ||
| 322 | #define PC10_PF_USBOTG_DATA2 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 10) | ||
| 323 | #define PC11_PF_USBOTG_DATA1 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 11) | ||
| 324 | #define PC12_PF_USBOTG_DATA4 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 12) | ||
| 325 | #define PC13_PF_USBOTG_DATA3 (GPIO_PORTC | GPIO_OUT | GPIO_PF | 13) | ||
| 326 | #define PC16_PF_SSI4_FS (GPIO_PORTC | GPIO_IN | GPIO_PF | 16) | ||
| 327 | #define PC17_PF_SSI4_RXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 17) | ||
| 328 | #define PC18_PF_SSI4_TXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 18) | ||
| 329 | #define PC19_PF_SSI4_CLK (GPIO_PORTC | GPIO_IN | GPIO_PF | 19) | ||
| 330 | #define PC20_PF_SSI1_FS (GPIO_PORTC | GPIO_IN | GPIO_PF | 20) | ||
| 331 | #define PC21_PF_SSI1_RXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 21) | ||
| 332 | #define PC22_PF_SSI1_TXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 22) | ||
| 333 | #define PC23_PF_SSI1_CLK (GPIO_PORTC | GPIO_IN | GPIO_PF | 23) | ||
| 334 | #define PC24_PF_SSI2_FS (GPIO_PORTC | GPIO_IN | GPIO_PF | 24) | ||
| 335 | #define PC25_PF_SSI2_RXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 25) | ||
| 336 | #define PC26_PF_SSI2_TXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 26) | ||
| 337 | #define PC27_PF_SSI2_CLK (GPIO_PORTC | GPIO_IN | GPIO_PF | 27) | ||
| 338 | #define PC28_PF_SSI3_FS (GPIO_PORTC | GPIO_IN | GPIO_PF | 28) | ||
| 339 | #define PC29_PF_SSI3_RXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 29) | ||
| 340 | #define PC30_PF_SSI3_TXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 30) | ||
| 341 | #define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_IN | GPIO_PF | 31) | ||
| 342 | #define PD0_AIN_FEC_TXD0 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 0) | ||
| 343 | #define PD1_AIN_FEC_TXD1 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 1) | ||
| 344 | #define PD2_AIN_FEC_TXD2 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 2) | ||
| 345 | #define PD3_AIN_FEC_TXD3 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 3) | ||
| 346 | #define PD4_AOUT_FEC_RX_ER (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 4) | ||
| 347 | #define PD5_AOUT_FEC_RXD1 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 5) | ||
| 348 | #define PD6_AOUT_FEC_RXD2 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 6) | ||
| 349 | #define PD7_AOUT_FEC_RXD3 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 7) | ||
| 350 | #define PD8_AF_FEC_MDIO (GPIO_PORTD | GPIO_IN | GPIO_AF | 8) | ||
| 351 | #define PD9_AIN_FEC_MDC (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 9) | ||
| 352 | #define PD10_AOUT_FEC_CRS (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 10) | ||
| 353 | #define PD11_AOUT_FEC_TX_CLK (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 11) | ||
| 354 | #define PD12_AOUT_FEC_RXD0 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 12) | ||
| 355 | #define PD13_AOUT_FEC_RX_DV (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 13) | ||
| 356 | #define PD14_AOUT_FEC_CLR (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 14) | ||
| 357 | #define PD15_AOUT_FEC_COL (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 15) | ||
| 358 | #define PD16_AIN_FEC_TX_ER (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 16) | ||
| 359 | #define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_OUT | GPIO_PF | 17) | ||
| 360 | #define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 18) | ||
| 361 | #define PD19_AF_USBH2_DATA4 (GPIO_PORTD | GPIO_AF | 19) | ||
| 362 | #define PD20_AF_USBH2_DATA3 (GPIO_PORTD | GPIO_AF | 20) | ||
| 363 | #define PD21_AF_USBH2_DATA6 (GPIO_PORTD | GPIO_AF | 21) | ||
| 364 | #define PD22_AF_USBH2_DATA0 (GPIO_PORTD | GPIO_AF | 22) | ||
| 365 | #define PD23_AF_USBH2_DATA2 (GPIO_PORTD | GPIO_AF | 23) | ||
| 366 | #define PD24_AF_USBH2_DATA1 (GPIO_PORTD | GPIO_AF | 24) | ||
| 367 | #define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_OUT | GPIO_PF | 25) | ||
| 368 | #define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 26) | ||
| 369 | #define PD26_AF_USBH2_DATA5 (GPIO_PORTD | GPIO_AF | 26) | ||
| 370 | #define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 27) | ||
| 371 | #define PD28_PF_CSPI1_SS0 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 28) | ||
| 372 | #define PD29_PF_CSPI1_SCLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 29) | ||
| 373 | #define PD30_PF_CSPI1_MISO (GPIO_PORTD | GPIO_IN | GPIO_PF | 30) | ||
| 374 | #define PD31_PF_CSPI1_MOSI (GPIO_PORTD | GPIO_OUT | GPIO_PF | 31) | ||
| 375 | #define PF23_AIN_FEC_TX_EN (GPIO_PORTF | GPIO_OUT | GPIO_AIN | 23) | ||
| 376 | #define PE0_PF_USBOTG_NXT (GPIO_PORTE | GPIO_OUT | GPIO_PF | 0) | ||
| 377 | #define PE1_PF_USBOTG_STP (GPIO_PORTE | GPIO_OUT | GPIO_PF | 1) | ||
| 378 | #define PE2_PF_USBOTG_DIR (GPIO_PORTE | GPIO_OUT | GPIO_PF | 2) | ||
| 379 | #define PE3_PF_UART2_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 3) | ||
| 380 | #define PE4_PF_UART2_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 4) | ||
| 381 | #define PE6_PF_UART2_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 6) | ||
| 382 | #define PE7_PF_UART2_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 7) | ||
| 383 | #define PE8_PF_UART3_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 8) | ||
| 384 | #define PE9_PF_UART3_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 9) | ||
| 385 | #define PE10_PF_UART3_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 10) | ||
| 386 | #define PE11_PF_UART3_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 11) | ||
| 387 | #define PE12_PF_UART1_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 12) | ||
| 388 | #define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 13) | ||
| 389 | #define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 14) | ||
| 390 | #define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 15) | ||
| 391 | #define PE16_AF_RTCK (GPIO_PORTE | GPIO_OUT | GPIO_AF | 16) | ||
| 392 | #define PE16_PF_RTCK (GPIO_PORTE | GPIO_OUT | GPIO_PF | 16) | ||
| 393 | #define PE18_PF_SDHC1_D0 (GPIO_PORTE | GPIO_PF | 18) | ||
| 394 | #define PE18_AF_CSPI3_MISO (GPIO_PORTE | GPIO_IN | GPIO_AF | 18) | ||
| 395 | #define PE19_PF_SDHC1_D1 (GPIO_PORTE | GPIO_PF | 19) | ||
| 396 | #define PE20_PF_SDHC1_D2 (GPIO_PORTE | GPIO_PF | 20) | ||
| 397 | #define PE21_PF_SDHC1_D3 (GPIO_PORTE | GPIO_PF | 21) | ||
| 398 | #define PE21_AF_CSPI3_SS (GPIO_PORTE | GPIO_OUT | GPIO_AF | 21) | ||
| 399 | #define PE22_PF_SDHC1_CMD (GPIO_PORTE | GPIO_PF | 22) | ||
| 400 | #define PE22_AF_CSPI3_MOSI (GPIO_PORTE | GPIO_OUT | GPIO_AF | 22) | ||
| 401 | #define PE22_PF_SDHC1_CLK (GPIO_PORTE | GPIO_PF | 23) | ||
| 402 | #define PE23_AF_CSPI3_SCLK (GPIO_PORTE | GPIO_OUT | GPIO_AF | 23) | ||
| 403 | #define PE24_PF_USBOTG_CLK (GPIO_PORTE | GPIO_OUT | GPIO_PF | 24) | ||
| 404 | #define PE25_PF_USBOTG_DATA7 (GPIO_PORTE | GPIO_OUT | GPIO_PF | 25) | ||
| 405 | #endif | ||
| 406 | |||
| 407 | /* decode irq number to use with IMR(x), ISR(x) and friends */ | ||
| 408 | #define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5) | ||
| 409 | |||
| 410 | #define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x) | ||
| 411 | #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) | ||
| 412 | #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) | ||
| 413 | #define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x) | ||
| 414 | #define IRQ_GPIOE(x) (IRQ_GPIOD(32) + x) | ||
| 415 | |||
| 416 | #endif /* _MXC_GPIO_MX1_MX2_H */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1.h b/arch/arm/plat-mxc/include/mach/iomux-mx1.h new file mode 100644 index 000000000000..bf23305c19cc --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/iomux-mx1.h | |||
| @@ -0,0 +1,166 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License | ||
| 6 | * as published by the Free Software Foundation; either version 2 | ||
| 7 | * of the License, or (at your option) any later version. | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program; if not, write to the Free Software | ||
| 15 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
| 16 | * MA 02110-1301, USA. | ||
| 17 | */ | ||
| 18 | |||
| 19 | #ifndef _MXC_IOMUX_MX1_H | ||
| 20 | #define _MXC_IOMUX_MX1_H | ||
| 21 | |||
| 22 | #ifndef GPIO_PORTA | ||
| 23 | #error Please include mach/iomux.h | ||
| 24 | #endif | ||
| 25 | |||
| 26 | /* FIXME: This list is not completed. The correct directions are | ||
| 27 | * missing on some (many) pins | ||
| 28 | */ | ||
| 29 | |||
| 30 | |||
| 31 | /* Primary GPIO pin functions */ | ||
| 32 | |||
| 33 | #define PA0_AIN_SPI2_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0) | ||
| 34 | #define PA0_AF_ETMTRACESYNC (GPIO_PORTA | GPIO_AF | 0) | ||
| 35 | #define PA1_AOUT_SPI2_RXD (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 1) | ||
| 36 | #define PA1_PF_TIN (GPIO_PORTA | GPIO_PF | 1) | ||
| 37 | #define PA2_PF_PWM0 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 2) | ||
| 38 | #define PA3_PF_CSI_MCLK (GPIO_PORTA | GPIO_PF | 3) | ||
| 39 | #define PA4_PF_CSI_D0 (GPIO_PORTA | GPIO_PF | 4) | ||
| 40 | #define PA5_PF_CSI_D1 (GPIO_PORTA | GPIO_PF | 5) | ||
| 41 | #define PA6_PF_CSI_D2 (GPIO_PORTA | GPIO_PF | 6) | ||
| 42 | #define PA7_PF_CSI_D3 (GPIO_PORTA | GPIO_PF | 7) | ||
| 43 | #define PA8_PF_CSI_D4 (GPIO_PORTA | GPIO_PF | 8) | ||
| 44 | #define PA9_PF_CSI_D5 (GPIO_PORTA | GPIO_PF | 9) | ||
| 45 | #define PA10_PF_CSI_D6 (GPIO_PORTA | GPIO_PF | 10) | ||
| 46 | #define PA11_PF_CSI_D7 (GPIO_PORTA | GPIO_PF | 11) | ||
| 47 | #define PA12_PF_CSI_VSYNC (GPIO_PORTA | GPIO_PF | 12) | ||
| 48 | #define PA13_PF_CSI_HSYNC (GPIO_PORTA | GPIO_PF | 13) | ||
| 49 | #define PA14_PF_CSI_PIXCLK (GPIO_PORTA | GPIO_PF | 14) | ||
| 50 | #define PA15_PF_I2C_SDA (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15) | ||
| 51 | #define PA16_PF_I2C_SCL (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16) | ||
| 52 | #define PA17_AF_ETMTRACEPKT4 (GPIO_PORTA | GPIO_AF | 17) | ||
| 53 | #define PA17_AIN_SPI2_SS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17) | ||
| 54 | #define PA18_AF_ETMTRACEPKT5 (GPIO_PORTA | GPIO_AF | 18) | ||
| 55 | #define PA19_AF_ETMTRACEPKT6 (GPIO_PORTA | GPIO_AF | 19) | ||
| 56 | #define PA20_AF_ETMTRACEPKT7 (GPIO_PORTA | GPIO_AF | 20) | ||
| 57 | #define PA21_PF_A0 (GPIO_PORTA | GPIO_PF | 21) | ||
| 58 | #define PA22_PF_CS4 (GPIO_PORTA | GPIO_PF | 22) | ||
| 59 | #define PA23_PF_CS5 (GPIO_PORTA | GPIO_PF | 23) | ||
| 60 | #define PA24_PF_A16 (GPIO_PORTA | GPIO_PF | 24) | ||
| 61 | #define PA24_AF_ETMTRACEPKT0 (GPIO_PORTA | GPIO_AF | 24) | ||
| 62 | #define PA25_PF_A17 (GPIO_PORTA | GPIO_PF | 25) | ||
| 63 | #define PA25_AF_ETMTRACEPKT1 (GPIO_PORTA | GPIO_AF | 25) | ||
| 64 | #define PA26_PF_A18 (GPIO_PORTA | GPIO_PF | 26) | ||
| 65 | #define PA26_AF_ETMTRACEPKT2 (GPIO_PORTA | GPIO_AF | 26) | ||
| 66 | #define PA27_PF_A19 (GPIO_PORTA | GPIO_PF | 27) | ||
| 67 | #define PA27_AF_ETMTRACEPKT3 (GPIO_PORTA | GPIO_AF | 27) | ||
| 68 | #define PA28_PF_A20 (GPIO_PORTA | GPIO_PF | 28) | ||
| 69 | #define PA28_AF_ETMPIPESTAT0 (GPIO_PORTA | GPIO_AF | 28) | ||
| 70 | #define PA29_PF_A21 (GPIO_PORTA | GPIO_PF | 29) | ||
| 71 | #define PA29_AF_ETMPIPESTAT1 (GPIO_PORTA | GPIO_AF | 29) | ||
| 72 | #define PA30_PF_A22 (GPIO_PORTA | GPIO_PF | 30) | ||
| 73 | #define PA30_AF_ETMPIPESTAT2 (GPIO_PORTA | GPIO_AF | 30) | ||
| 74 | #define PA31_PF_A23 (GPIO_PORTA | GPIO_PF | 31) | ||
| 75 | #define PA31_AF_ETMTRACECLK (GPIO_PORTA | GPIO_AF | 31) | ||
| 76 | #define PB8_PF_SD_DAT0 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8) | ||
| 77 | #define PB8_AF_MS_PIO (GPIO_PORTB | GPIO_AF | 8) | ||
| 78 | #define PB9_PF_SD_DAT1 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9) | ||
| 79 | #define PB9_AF_MS_PI1 (GPIO_PORTB | GPIO_AF | 9) | ||
| 80 | #define PB10_PF_SD_DAT2 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10) | ||
| 81 | #define PB10_AF_MS_SCLKI (GPIO_PORTB | GPIO_AF | 10) | ||
| 82 | #define PB11_PF_SD_DAT3 (GPIO_PORTB | GPIO_PF | 11) | ||
| 83 | #define PB11_AF_MS_SDIO (GPIO_PORTB | GPIO_AF | 11) | ||
| 84 | #define PB12_PF_SD_CLK (GPIO_PORTB | GPIO_PF | 12) | ||
| 85 | #define PB12_AF_MS_SCLK0 (GPIO_PORTB | GPIO_AF | 12) | ||
| 86 | #define PB13_PF_SD_CMD (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13) | ||
| 87 | #define PB13_AF_MS_BS (GPIO_PORTB | GPIO_AF | 13) | ||
| 88 | #define PB14_AF_SSI_RXFS (GPIO_PORTB | GPIO_AF | 14) | ||
| 89 | #define PB15_AF_SSI_RXCLK (GPIO_PORTB | GPIO_AF | 15) | ||
| 90 | #define PB16_AF_SSI_RXDAT (GPIO_PORTB | GPIO_AF | GPIO_IN | 16) | ||
| 91 | #define PB17_AF_SSI_TXDAT (GPIO_PORTB | GPIO_AF | GPIO_OUT | 17) | ||
| 92 | #define PB18_AF_SSI_TXFS (GPIO_PORTB | GPIO_AF | 18) | ||
| 93 | #define PB19_AF_SSI_TXCLK (GPIO_PORTB | GPIO_AF | 19) | ||
| 94 | #define PB20_PF_USBD_AFE (GPIO_PORTB | GPIO_PF | 20) | ||
| 95 | #define PB21_PF_USBD_OE (GPIO_PORTB | GPIO_PF | 21) | ||
| 96 | #define PB22_PF_USBD_RCV (GPIO_PORTB | GPIO_PF | 22) | ||
| 97 | #define PB23_PF_USBD_SUSPND (GPIO_PORTB | GPIO_PF | 23) | ||
| 98 | #define PB24_PF_USBD_VP (GPIO_PORTB | GPIO_PF | 24) | ||
| 99 | #define PB25_PF_USBD_VM (GPIO_PORTB | GPIO_PF | 25) | ||
| 100 | #define PB26_PF_USBD_VPO (GPIO_PORTB | GPIO_PF | 26) | ||
| 101 | #define PB27_PF_USBD_VMO (GPIO_PORTB | GPIO_PF | 27) | ||
| 102 | #define PB28_PF_UART2_CTS (GPIO_PORTB | GPIO_PF | GPIO_OUT | 28) | ||
| 103 | #define PB29_PF_UART2_RTS (GPIO_PORTB | GPIO_PF | GPIO_IN | 29) | ||
| 104 | #define PB30_PF_UART2_TXD (GPIO_PORTB | GPIO_PF | GPIO_OUT | 30) | ||
| 105 | #define PB31_PF_UART2_RXD (GPIO_PORTB | GPIO_PF | GPIO_IN | 31) | ||
| 106 | #define PC3_PF_SSI_RXFS (GPIO_PORTC | GPIO_PF | 3) | ||
| 107 | #define PC4_PF_SSI_RXCLK (GPIO_PORTC | GPIO_PF | 4) | ||
| 108 | #define PC5_PF_SSI_RXDAT (GPIO_PORTC | GPIO_PF | GPIO_IN | 5) | ||
| 109 | #define PC6_PF_SSI_TXDAT (GPIO_PORTC | GPIO_PF | GPIO_OUT | 6) | ||
| 110 | #define PC7_PF_SSI_TXFS (GPIO_PORTC | GPIO_PF | 7) | ||
| 111 | #define PC8_PF_SSI_TXCLK (GPIO_PORTC | GPIO_PF | 8) | ||
| 112 | #define PC9_PF_UART1_CTS (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9) | ||
| 113 | #define PC10_PF_UART1_RTS (GPIO_PORTC | GPIO_PF | GPIO_IN | 10) | ||
| 114 | #define PC11_PF_UART1_TXD (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11) | ||
| 115 | #define PC12_PF_UART1_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 12) | ||
| 116 | #define PC13_PF_SPI1_SPI_RDY (GPIO_PORTC | GPIO_PF | 13) | ||
| 117 | #define PC14_PF_SPI1_SCLK (GPIO_PORTC | GPIO_PF | 14) | ||
| 118 | #define PC15_PF_SPI1_SS (GPIO_PORTC | GPIO_PF | 15) | ||
| 119 | #define PC16_PF_SPI1_MISO (GPIO_PORTC | GPIO_PF | 16) | ||
| 120 | #define PC17_PF_SPI1_MOSI (GPIO_PORTC | GPIO_PF | 17) | ||
| 121 | #define PC24_BIN_UART3_RI (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 24) | ||
| 122 | #define PC25_BIN_UART3_DSR (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 25) | ||
| 123 | #define PC26_AOUT_UART3_DTR (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 26) | ||
| 124 | #define PC27_BIN_UART3_DCD (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 27) | ||
| 125 | #define PC28_BIN_UART3_CTS (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 28) | ||
| 126 | #define PC29_AOUT_UART3_RTS (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 29) | ||
| 127 | #define PC30_BIN_UART3_TX (GPIO_PORTC | GPIO_BIN | 30) | ||
| 128 | #define PC31_AOUT_UART3_RX (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 31) | ||
| 129 | #define PD6_PF_LSCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 6) | ||
| 130 | #define PD7_PF_REV (GPIO_PORTD | GPIO_PF | 7) | ||
| 131 | #define PD7_AF_UART2_DTR (GPIO_PORTD | GPIO_AF | GPIO_IN | 7) | ||
| 132 | #define PD7_AIN_SPI2_SCLK (GPIO_PORTD | GPIO_AIN | 7) | ||
| 133 | #define PD8_PF_CLS (GPIO_PORTD | GPIO_PF | 8) | ||
| 134 | #define PD8_AF_UART2_DCD (GPIO_PORTD | GPIO_AF | GPIO_OUT | 8) | ||
| 135 | #define PD8_AIN_SPI2_SS (GPIO_PORTD | GPIO_AIN | 8) | ||
| 136 | #define PD9_PF_PS (GPIO_PORTD | GPIO_PF | 9) | ||
| 137 | #define PD9_AF_UART2_RI (GPIO_PORTD | GPIO_AF | GPIO_OUT | 9) | ||
| 138 | #define PD9_AOUT_SPI2_RXD (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 9) | ||
| 139 | #define PD10_PF_SPL_SPR (GPIO_PORTD | GPIO_PF | GPIO_OUT | 10) | ||
| 140 | #define PD10_AF_UART2_DSR (GPIO_PORTD | GPIO_AF | GPIO_OUT | 10) | ||
| 141 | #define PD10_AIN_SPI2_TXD (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 10) | ||
| 142 | #define PD11_PF_CONTRAST (GPIO_PORTD | GPIO_PF | GPIO_OUT | 11) | ||
| 143 | #define PD12_PF_ACD_OE (GPIO_PORTD | GPIO_PF | GPIO_OUT | 12) | ||
| 144 | #define PD13_PF_LP_HSYNC (GPIO_PORTD | GPIO_PF | GPIO_OUT | 13) | ||
| 145 | #define PD14_PF_FLM_VSYNC (GPIO_PORTD | GPIO_PF | GPIO_OUT | 14) | ||
| 146 | #define PD15_PF_LD0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 15) | ||
| 147 | #define PD16_PF_LD1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 16) | ||
| 148 | #define PD17_PF_LD2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) | ||
| 149 | #define PD18_PF_LD3 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) | ||
| 150 | #define PD19_PF_LD4 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19) | ||
| 151 | #define PD20_PF_LD5 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20) | ||
| 152 | #define PD21_PF_LD6 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21) | ||
| 153 | #define PD22_PF_LD7 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22) | ||
| 154 | #define PD23_PF_LD8 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 23) | ||
| 155 | #define PD24_PF_LD9 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24) | ||
| 156 | #define PD25_PF_LD10 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) | ||
| 157 | #define PD26_PF_LD11 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) | ||
| 158 | #define PD27_PF_LD12 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) | ||
| 159 | #define PD28_PF_LD13 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28) | ||
| 160 | #define PD29_PF_LD14 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29) | ||
| 161 | #define PD30_PF_LD15 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 30) | ||
| 162 | #define PD31_PF_TMR2OUT (GPIO_PORTD | GPIO_PF | 31) | ||
| 163 | #define PD31_BIN_SPI2_TXD (GPIO_PORTD | GPIO_BIN | 31) | ||
| 164 | |||
| 165 | |||
| 166 | #endif | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx21.h b/arch/arm/plat-mxc/include/mach/iomux-mx21.h new file mode 100644 index 000000000000..63aaa972e275 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/iomux-mx21.h | |||
| @@ -0,0 +1,126 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License | ||
| 6 | * as published by the Free Software Foundation; either version 2 | ||
| 7 | * of the License, or (at your option) any later version. | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program; if not, write to the Free Software | ||
| 15 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
| 16 | * MA 02110-1301, USA. | ||
| 17 | */ | ||
| 18 | |||
| 19 | #ifndef _MXC_IOMUX_MX21_H | ||
| 20 | #define _MXC_IOMUX_MX21_H | ||
| 21 | |||
| 22 | #ifndef GPIO_PORTA | ||
| 23 | #error Please include mach/iomux.h | ||
| 24 | #endif | ||
| 25 | |||
| 26 | |||
| 27 | /* Primary GPIO pin functions */ | ||
| 28 | |||
| 29 | #define PB22_PF_USBH1_BYP (GPIO_PORTB | GPIO_PF | 22) | ||
| 30 | #define PB25_PF_USBH1_ON (GPIO_PORTB | GPIO_PF | 25) | ||
| 31 | #define PC5_PF_USBOTG_SDA (GPIO_PORTC | GPIO_PF | 5) | ||
| 32 | #define PC6_PF_USBOTG_SCL (GPIO_PORTC | GPIO_PF | 6) | ||
| 33 | #define PC7_PF_USBOTG_ON (GPIO_PORTC | GPIO_PF | 7) | ||
| 34 | #define PC8_PF_USBOTG_FS (GPIO_PORTC | GPIO_PF | 8) | ||
| 35 | #define PC9_PF_USBOTG_OE (GPIO_PORTC | GPIO_PF | 9) | ||
| 36 | #define PC10_PF_USBOTG_TXDM (GPIO_PORTC | GPIO_PF | 10) | ||
| 37 | #define PC11_PF_USBOTG_TXDP (GPIO_PORTC | GPIO_PF | 11) | ||
| 38 | #define PC12_PF_USBOTG_RXDM (GPIO_PORTC | GPIO_PF | 12) | ||
| 39 | #define PC13_PF_USBOTG_RXDP (GPIO_PORTC | GPIO_PF | 13) | ||
| 40 | #define PC16_PF_SAP_FS (GPIO_PORTC | GPIO_PF | 16) | ||
| 41 | #define PC17_PF_SAP_RXD (GPIO_PORTC | GPIO_PF | 17) | ||
| 42 | #define PC18_PF_SAP_TXD (GPIO_PORTC | GPIO_PF | 18) | ||
| 43 | #define PC19_PF_SAP_CLK (GPIO_PORTC | GPIO_PF | 19) | ||
| 44 | #define PE0_PF_TEST_WB2 (GPIO_PORTE | GPIO_PF | 0) | ||
| 45 | #define PE1_PF_TEST_WB1 (GPIO_PORTE | GPIO_PF | 1) | ||
| 46 | #define PE2_PF_TEST_WB0 (GPIO_PORTE | GPIO_PF | 2) | ||
| 47 | #define PF1_PF_NFCE (GPIO_PORTF | GPIO_PF | 1) | ||
| 48 | #define PF3_PF_NFCLE (GPIO_PORTF | GPIO_PF | 3) | ||
| 49 | #define PF7_PF_NFIO0 (GPIO_PORTF | GPIO_PF | 7) | ||
| 50 | #define PF8_PF_NFIO1 (GPIO_PORTF | GPIO_PF | 8) | ||
| 51 | #define PF9_PF_NFIO2 (GPIO_PORTF | GPIO_PF | 9) | ||
| 52 | #define PF10_PF_NFIO3 (GPIO_PORTF | GPIO_PF | 10) | ||
| 53 | #define PF11_PF_NFIO4 (GPIO_PORTF | GPIO_PF | 11) | ||
| 54 | #define PF12_PF_NFIO5 (GPIO_PORTF | GPIO_PF | 12) | ||
| 55 | #define PF13_PF_NFIO6 (GPIO_PORTF | GPIO_PF | 13) | ||
| 56 | #define PF14_PF_NFIO7 (GPIO_PORTF | GPIO_PF | 14) | ||
| 57 | #define PF16_PF_RES (GPIO_PORTF | GPIO_PF | 16) | ||
| 58 | |||
| 59 | /* Alternate GPIO pin functions */ | ||
| 60 | |||
| 61 | #define PA5_AF_BMI_CLK_CS (GPIO_PORTA | GPIO_AF | 5) | ||
| 62 | #define PA6_AF_BMI_D0 (GPIO_PORTA | GPIO_AF | 6) | ||
| 63 | #define PA7_AF_BMI_D1 (GPIO_PORTA | GPIO_AF | 7) | ||
| 64 | #define PA8_AF_BMI_D2 (GPIO_PORTA | GPIO_AF | 8) | ||
| 65 | #define PA9_AF_BMI_D3 (GPIO_PORTA | GPIO_AF | 9) | ||
| 66 | #define PA10_AF_BMI_D4 (GPIO_PORTA | GPIO_AF | 10) | ||
| 67 | #define PA11_AF_BMI_D5 (GPIO_PORTA | GPIO_AF | 11) | ||
| 68 | #define PA12_AF_BMI_D6 (GPIO_PORTA | GPIO_AF | 12) | ||
| 69 | #define PA13_AF_BMI_D7 (GPIO_PORTA | GPIO_AF | 13) | ||
| 70 | #define PA14_AF_BMI_D8 (GPIO_PORTA | GPIO_AF | 14) | ||
| 71 | #define PA15_AF_BMI_D9 (GPIO_PORTA | GPIO_AF | 15) | ||
| 72 | #define PA16_AF_BMI_D10 (GPIO_PORTA | GPIO_AF | 16) | ||
| 73 | #define PA17_AF_BMI_D11 (GPIO_PORTA | GPIO_AF | 17) | ||
| 74 | #define PA18_AF_BMI_D12 (GPIO_PORTA | GPIO_AF | 18) | ||
| 75 | #define PA19_AF_BMI_D13 (GPIO_PORTA | GPIO_AF | 19) | ||
| 76 | #define PA20_AF_BMI_D14 (GPIO_PORTA | GPIO_AF | 20) | ||
| 77 | #define PA21_AF_BMI_D15 (GPIO_PORTA | GPIO_AF | 21) | ||
| 78 | #define PA22_AF_BMI_READ_REQ (GPIO_PORTA | GPIO_AF | 22) | ||
| 79 | #define PA23_AF_BMI_WRITE (GPIO_PORTA | GPIO_AF | 23) | ||
| 80 | #define PA29_AF_BMI_RX_FULL (GPIO_PORTA | GPIO_AF | 29) | ||
| 81 | #define PA30_AF_BMI_READ (GPIO_PORTA | GPIO_AF | 30) | ||
| 82 | |||
| 83 | /* AIN GPIO pin functions */ | ||
| 84 | |||
| 85 | #define PC14_AIN_SYS_CLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14) | ||
| 86 | #define PD21_AIN_USBH2_FS (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 21) | ||
| 87 | #define PD22_AIN_USBH2_OE (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 22) | ||
| 88 | #define PD23_AIN_USBH2_TXDM (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 23) | ||
| 89 | #define PD24_AIN_USBH2_TXDP (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 24) | ||
| 90 | #define PE8_AIN_IR_TXD (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 8) | ||
| 91 | #define PF0_AIN_PC_RST (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 0) | ||
| 92 | #define PF1_AIN_PC_CE1 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 1) | ||
| 93 | #define PF2_AIN_PC_CE2 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 2) | ||
| 94 | #define PF3_AIN_PC_POE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 3) | ||
| 95 | #define PF4_AIN_PC_OE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 4) | ||
| 96 | #define PF5_AIN_PC_RW (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 5) | ||
| 97 | |||
| 98 | /* BIN GPIO pin functions */ | ||
| 99 | |||
| 100 | #define PC14_BIN_SYS_CLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14) | ||
| 101 | #define PD27_BIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_BIN | GPIO_OUT | 27) | ||
| 102 | |||
| 103 | /* CIN GPIO pin functions */ | ||
| 104 | |||
| 105 | #define PB26_CIN_USBH1_RXDAT (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 26) | ||
| 106 | |||
| 107 | /* AOUT GPIO pin functions */ | ||
| 108 | |||
| 109 | #define PA29_AOUT_BMI_WAIT (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 29) | ||
| 110 | #define PD19_AOUT_USBH2_RXDM (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 19) | ||
| 111 | #define PD20_AOUT_USBH2_RXDP (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 20) | ||
| 112 | #define PD25_AOUT_EXT_DMAREQ (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 25) | ||
| 113 | #define PD26_AOUT_USBOTG_RXDAT (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 26) | ||
| 114 | #define PE9_AOUT_IR_RXD (GPIO_PORTE | GPIO_AOUT | GPIO_IN | 9) | ||
| 115 | #define PF6_AOUT_PC_BVD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 6) | ||
| 116 | #define PF7_AOUT_PC_BVD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 7) | ||
| 117 | #define PF8_AOUT_PC_VS2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 8) | ||
| 118 | #define PF9_AOUT_PC_VS1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 9) | ||
| 119 | #define PF10_AOUT_PC_WP (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 10) | ||
| 120 | #define PF11_AOUT_PC_READY (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 11) | ||
| 121 | #define PF12_AOUT_PC_WAIT (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 12) | ||
| 122 | #define PF13_AOUT_PC_CD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 13) | ||
| 123 | #define PF14_AOUT_PC_CD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 14) | ||
| 124 | |||
| 125 | |||
| 126 | #endif | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx27.h b/arch/arm/plat-mxc/include/mach/iomux-mx27.h new file mode 100644 index 000000000000..5ac158b70f61 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/iomux-mx27.h | |||
| @@ -0,0 +1,207 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> | ||
| 3 | * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or | ||
| 6 | * modify it under the terms of the GNU General Public License | ||
| 7 | * as published by the Free Software Foundation; either version 2 | ||
| 8 | * of the License, or (at your option) any later version. | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, write to the Free Software | ||
| 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
| 17 | * MA 02110-1301, USA. | ||
| 18 | */ | ||
| 19 | |||
| 20 | #ifndef _MXC_IOMUX_MX27_H | ||
| 21 | #define _MXC_IOMUX_MX27_H | ||
| 22 | |||
| 23 | #ifndef GPIO_PORTA | ||
| 24 | #error Please include mach/iomux.h | ||
| 25 | #endif | ||
| 26 | |||
| 27 | |||
| 28 | /* Primary GPIO pin functions */ | ||
| 29 | |||
| 30 | #define PA0_PF_USBH2_CLK (GPIO_PORTA | GPIO_PF | 0) | ||
| 31 | #define PA1_PF_USBH2_DIR (GPIO_PORTA | GPIO_PF | 1) | ||
| 32 | #define PA2_PF_USBH2_DATA7 (GPIO_PORTA | GPIO_PF | 2) | ||
| 33 | #define PA3_PF_USBH2_NXT (GPIO_PORTA | GPIO_PF | 3) | ||
| 34 | #define PA4_PF_USBH2_STP (GPIO_PORTA | GPIO_PF | 4) | ||
| 35 | #define PB22_PF_USBH1_SUSP (GPIO_PORTB | GPIO_PF | 22) | ||
| 36 | #define PB25_PF_USBH1_RCV (GPIO_PORTB | GPIO_PF | 25) | ||
| 37 | #define PC5_PF_I2C2_SDA (GPIO_PORTC | GPIO_PF | GPIO_IN | 5) | ||
| 38 | #define PC6_PF_I2C2_SCL (GPIO_PORTC | GPIO_PF | GPIO_IN | 6) | ||
| 39 | #define PC7_PF_USBOTG_DATA5 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 7) | ||
| 40 | #define PC8_PF_USBOTG_DATA6 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 8) | ||
| 41 | #define PC9_PF_USBOTG_DATA0 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9) | ||
| 42 | #define PC10_PF_USBOTG_DATA2 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 10) | ||
| 43 | #define PC11_PF_USBOTG_DATA1 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11) | ||
| 44 | #define PC12_PF_USBOTG_DATA4 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 12) | ||
| 45 | #define PC13_PF_USBOTG_DATA3 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 13) | ||
| 46 | #define PC16_PF_SSI4_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 16) | ||
| 47 | #define PC17_PF_SSI4_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 17) | ||
| 48 | #define PC18_PF_SSI4_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 18) | ||
| 49 | #define PC19_PF_SSI4_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 19) | ||
| 50 | #define PC25_AF_GPT5_TIN (GPIO_PORTC | GPIO_AF | 25) | ||
| 51 | #define PC27_AF_GPT4_TIN (GPIO_PORTC | GPIO_AF | 27) | ||
| 52 | #define PD0_PF_SD3_CMD (GPIO_PORTD | GPIO_PF | 0) | ||
| 53 | #define PD1_PF_SD3_CLK (GPIO_PORTD | GPIO_PF | 1) | ||
| 54 | #define PD2_PF_ATA_DATA0 (GPIO_PORTD | GPIO_PF | 2) | ||
| 55 | #define PD3_PF_ATA_DATA1 (GPIO_PORTD | GPIO_PF | 3) | ||
| 56 | #define PD4_PF_ATA_DATA2 (GPIO_PORTD | GPIO_PF | 4) | ||
| 57 | #define PD5_PF_ATA_DATA3 (GPIO_PORTD | GPIO_PF | 5) | ||
| 58 | #define PD6_PF_ATA_DATA4 (GPIO_PORTD | GPIO_PF | 6) | ||
| 59 | #define PD7_PF_ATA_DATA5 (GPIO_PORTD | GPIO_PF | 7) | ||
| 60 | #define PD8_PF_ATA_DATA6 (GPIO_PORTD | GPIO_PF | 8) | ||
| 61 | #define PD9_PF_ATA_DATA7 (GPIO_PORTD | GPIO_PF | 9) | ||
| 62 | #define PD10_PF_ATA_DATA8 (GPIO_PORTD | GPIO_PF | 10) | ||
| 63 | #define PD11_PF_ATA_DATA9 (GPIO_PORTD | GPIO_PF | 11) | ||
| 64 | #define PD12_PF_ATA_DATA10 (GPIO_PORTD | GPIO_PF | 12) | ||
| 65 | #define PD13_PF_ATA_DATA11 (GPIO_PORTD | GPIO_PF | 13) | ||
| 66 | #define PD14_PF_ATA_DATA12 (GPIO_PORTD | GPIO_PF | 14) | ||
| 67 | #define PD15_PF_ATA_DATA13 (GPIO_PORTD | GPIO_PF | 15) | ||
| 68 | #define PD16_PF_ATA_DATA14 (GPIO_PORTD | GPIO_PF | 16) | ||
| 69 | #define PE0_PF_USBOTG_NXT (GPIO_PORTE | GPIO_PF | GPIO_OUT | 0) | ||
| 70 | #define PE1_PF_USBOTG_STP (GPIO_PORTE | GPIO_PF | GPIO_OUT | 1) | ||
| 71 | #define PE2_PF_USBOTG_DIR (GPIO_PORTE | GPIO_PF | GPIO_OUT | 2) | ||
| 72 | #define PE24_PF_USBOTG_CLK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 24) | ||
| 73 | #define PE25_PF_USBOTG_DATA7 (GPIO_PORTE | GPIO_PF | GPIO_OUT | 25) | ||
| 74 | #define PF1_PF_NFCLE (GPIO_PORTF | GPIO_PF | 1) | ||
| 75 | #define PF3_PF_NFCE (GPIO_PORTF | GPIO_PF | 3) | ||
| 76 | #define PF7_PF_PC_POE (GPIO_PORTF | GPIO_PF | 7) | ||
| 77 | #define PF8_PF_PC_RW (GPIO_PORTF | GPIO_PF | 8) | ||
| 78 | #define PF9_PF_PC_IOIS16 (GPIO_PORTF | GPIO_PF | 9) | ||
| 79 | #define PF10_PF_PC_RST (GPIO_PORTF | GPIO_PF | 10) | ||
| 80 | #define PF11_PF_PC_BVD2 (GPIO_PORTF | GPIO_PF | 11) | ||
| 81 | #define PF12_PF_PC_BVD1 (GPIO_PORTF | GPIO_PF | 12) | ||
| 82 | #define PF13_PF_PC_VS2 (GPIO_PORTF | GPIO_PF | 13) | ||
| 83 | #define PF14_PF_PC_VS1 (GPIO_PORTF | GPIO_PF | 14) | ||
| 84 | #define PF16_PF_PC_PWRON (GPIO_PORTF | GPIO_PF | 16) | ||
| 85 | #define PF17_PF_PC_READY (GPIO_PORTF | GPIO_PF | 17) | ||
| 86 | #define PF18_PF_PC_WAIT (GPIO_PORTF | GPIO_PF | 18) | ||
| 87 | #define PF19_PF_PC_CD2 (GPIO_PORTF | GPIO_PF | 19) | ||
| 88 | #define PF20_PF_PC_CD1 (GPIO_PORTF | GPIO_PF | 20) | ||
| 89 | #define PF23_PF_ATA_DATA15 (GPIO_PORTF | GPIO_PF | 23) | ||
| 90 | |||
| 91 | /* Alternate GPIO pin functions */ | ||
| 92 | |||
| 93 | #define PB4_AF_MSHC_DATA0 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 4) | ||
| 94 | #define PB5_AF_MSHC_DATA1 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 5) | ||
| 95 | #define PB6_AF_MSHC_DATA2 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 6) | ||
| 96 | #define PB7_AF_MSHC_DATA4 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 7) | ||
| 97 | #define PB8_AF_MSHC_BS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 8) | ||
| 98 | #define PB9_AF_MSHC_SCLK (GPIO_PORTB | GPIO_AF | GPIO_OUT | 9) | ||
| 99 | #define PB10_AF_UART6_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 10) | ||
| 100 | #define PB11_AF_UART6_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 11) | ||
| 101 | #define PB12_AF_UART6_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 12) | ||
| 102 | #define PB13_AF_UART6_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 13) | ||
| 103 | #define PB18_AF_UART5_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 18) | ||
| 104 | #define PB19_AF_UART5_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 19) | ||
| 105 | #define PB20_AF_UART5_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 20) | ||
| 106 | #define PB21_AF_UART5_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 21) | ||
| 107 | #define PC8_AF_FEC_MDIO (GPIO_PORTC | GPIO_AF | GPIO_IN | 8) | ||
| 108 | #define PC24_AF_GPT5_TOUT (GPIO_PORTC | GPIO_AF | 24) | ||
| 109 | #define PC26_AF_GPT4_TOUT (GPIO_PORTC | GPIO_AF | 26) | ||
| 110 | #define PD1_AF_ETMTRACE_PKT15 (GPIO_PORTD | GPIO_AF | 1) | ||
| 111 | #define PD6_AF_ETMTRACE_PKT14 (GPIO_PORTD | GPIO_AF | 6) | ||
| 112 | #define PD7_AF_ETMTRACE_PKT13 (GPIO_PORTD | GPIO_AF | 7) | ||
| 113 | #define PD9_AF_ETMTRACE_PKT12 (GPIO_PORTD | GPIO_AF | 9) | ||
| 114 | #define PD2_AF_SD3_D0 (GPIO_PORTD | GPIO_AF | 2) | ||
| 115 | #define PD3_AF_SD3_D1 (GPIO_PORTD | GPIO_AF | 3) | ||
| 116 | #define PD4_AF_SD3_D2 (GPIO_PORTD | GPIO_AF | 4) | ||
| 117 | #define PD5_AF_SD3_D3 (GPIO_PORTD | GPIO_AF | 5) | ||
| 118 | #define PD8_AF_FEC_MDIO (GPIO_PORTD | GPIO_AF | GPIO_IN | 8) | ||
| 119 | #define PD10_AF_ETMTRACE_PKT11 (GPIO_PORTD | GPIO_AF | 10) | ||
| 120 | #define PD11_AF_ETMTRACE_PKT10 (GPIO_PORTD | GPIO_AF | 11) | ||
| 121 | #define PD12_AF_ETMTRACE_PKT9 (GPIO_PORTD | GPIO_AF | 12) | ||
| 122 | #define PD13_AF_ETMTRACE_PKT8 (GPIO_PORTD | GPIO_AF | 13) | ||
| 123 | #define PD14_AF_ETMTRACE_PKT7 (GPIO_PORTD | GPIO_AF | 14) | ||
| 124 | #define PD15_AF_ETMTRACE_PKT6 (GPIO_PORTD | GPIO_AF | 15) | ||
| 125 | #define PD16_AF_ETMTRACE_PKT5 (GPIO_PORTD | GPIO_AF | 16) | ||
| 126 | #define PF1_AF_ETMTRACE_PKT0 (GPIO_PORTF | GPIO_AF | 1) | ||
| 127 | #define PF3_AF_ETMTRACE_PKT2 (GPIO_PORTF | GPIO_AF | 3) | ||
| 128 | #define PF5_AF_ETMPIPESTAT11 (GPIO_PORTF | GPIO_AF | 5) | ||
| 129 | #define PF7_AF_ATA_BUFFER_EN (GPIO_PORTF | GPIO_AF | 7) | ||
| 130 | #define PF8_AF_ATA_IORDY (GPIO_PORTF | GPIO_AF | 8) | ||
| 131 | #define PF9_AF_ATA_INTRQ (GPIO_PORTF | GPIO_AF | 9) | ||
| 132 | #define PF10_AF_ATA_RESET (GPIO_PORTF | GPIO_AF | 10) | ||
| 133 | #define PF11_AF_ATA_DMACK (GPIO_PORTF | GPIO_AF | 11) | ||
| 134 | #define PF12_AF_ATA_DMAREQ (GPIO_PORTF | GPIO_AF | 12) | ||
| 135 | #define PF13_AF_ATA_DA0 (GPIO_PORTF | GPIO_AF | 13) | ||
| 136 | #define PF14_AF_ATA_DA1 (GPIO_PORTF | GPIO_AF | 14) | ||
| 137 | #define PF15_AF_ETMTRACE_SYNC (GPIO_PORTF | GPIO_AF | 15) | ||
| 138 | #define PF16_AF_ATA_DA2 (GPIO_PORTF | GPIO_AF | 16) | ||
| 139 | #define PF17_AF_ATA_CS0 (GPIO_PORTF | GPIO_AF | 17) | ||
| 140 | #define PF18_AF_ATA_CS1 (GPIO_PORTF | GPIO_AF | 18) | ||
| 141 | #define PF19_AF_ATA_DIOW (GPIO_PORTF | GPIO_AF | 19) | ||
| 142 | #define PF20_AF_ATA_DIOR (GPIO_PORTF | GPIO_AF | 20) | ||
| 143 | #define PF22_AF_ETMTRACE_CLK (GPIO_PORTF | GPIO_AF | 22) | ||
| 144 | #define PF23_AF_ETMTRACE_PKT4 (GPIO_PORTF | GPIO_AF | 23) | ||
| 145 | |||
| 146 | /* AIN GPIO pin functions */ | ||
| 147 | |||
| 148 | #define PC14_AIN_SSI1_MCLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14) | ||
| 149 | #define PC15_AIN_GPT6_TOUT (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 15) | ||
| 150 | #define PD0_AIN_FEC_TXD0 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 0) | ||
| 151 | #define PD1_AIN_FEC_TXD1 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 1) | ||
| 152 | #define PD2_AIN_FEC_TXD2 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 2) | ||
| 153 | #define PD3_AIN_FEC_TXD3 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 3) | ||
| 154 | #define PD9_AIN_FEC_MDC (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 9) | ||
| 155 | #define PD16_AIN_FEC_TX_ER (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 16) | ||
| 156 | #define PD27_AIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 27) | ||
| 157 | #define PF23_AIN_FEC_TX_EN (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 23) | ||
| 158 | |||
| 159 | /* BIN GPIO pin functions */ | ||
| 160 | |||
| 161 | #define PC14_BIN_SSI2_MCLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14) | ||
| 162 | |||
| 163 | /* CIN GPIO pin functions */ | ||
| 164 | |||
| 165 | #define PD2_CIN_SLCDC1_DAT0 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 2) | ||
| 166 | #define PD3_CIN_SLCDC1_DAT1 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 3) | ||
| 167 | #define PD4_CIN_SLCDC1_DAT2 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 4) | ||
| 168 | #define PD5_CIN_SLCDC1_DAT3 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 5) | ||
| 169 | #define PD6_CIN_SLCDC1_DAT4 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 6) | ||
| 170 | #define PD7_CIN_SLCDC1_DAT5 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 7) | ||
| 171 | #define PD8_CIN_SLCDC1_DAT6 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 8) | ||
| 172 | #define PD9_CIN_SLCDC1_DAT7 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 9) | ||
| 173 | #define PD10_CIN_SLCDC1_DAT8 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 10) | ||
| 174 | #define PD11_CIN_SLCDC1_DAT9 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 11) | ||
| 175 | #define PD12_CIN_SLCDC1_DAT10 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 12) | ||
| 176 | #define PD13_CIN_SLCDC1_DAT11 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 13) | ||
| 177 | #define PD14_CIN_SLCDC1_DAT12 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 14) | ||
| 178 | #define PD15_CIN_SLCDC1_DAT13 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 15) | ||
| 179 | #define PD16_CIN_SLCDC1_DAT14 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 16) | ||
| 180 | #define PD23_CIN_SLCDC1_DAT15 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 23) | ||
| 181 | #define PF27_CIN_EXT_DMA_GRANT (GPIO_PORTF | GPIO_CIN | GPIO_OUT | 27) | ||
| 182 | /* LCDC_TESTx on PBxx omitted, because it's not clear what they do */ | ||
| 183 | |||
| 184 | /* AOUT GPIO pin functions */ | ||
| 185 | |||
| 186 | #define PC14_AOUT_GPT6_TIN (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 14) | ||
| 187 | #define PD4_AOUT_FEC_RX_ER (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 4) | ||
| 188 | #define PD5_AOUT_FEC_RXD1 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 5) | ||
| 189 | #define PD6_AOUT_FEC_RXD2 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 6) | ||
| 190 | #define PD7_AOUT_FEC_RXD3 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 7) | ||
| 191 | #define PD10_AOUT_FEC_CRS (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 10) | ||
| 192 | #define PD11_AOUT_FEC_TX_CLK (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 11) | ||
| 193 | #define PD12_AOUT_FEC_RXD0 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 12) | ||
| 194 | #define PD13_AOUT_FEC_RX_DV (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 13) | ||
| 195 | #define PD14_AOUT_FEC_RX_CLK (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 14) | ||
| 196 | #define PD15_AOUT_FEC_COL (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 15) | ||
| 197 | |||
| 198 | #define PC17_BOUT_PC_IOIS16 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 17) | ||
| 199 | #define PC18_BOUT_PC_BVD2 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 18) | ||
| 200 | #define PC19_BOUT_PC_BVD1 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 19) | ||
| 201 | #define PC28_BOUT_PC_BVD2 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 28) | ||
| 202 | #define PC29_BOUT_PC_VS1 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 29) | ||
| 203 | #define PC30_BOUT_PC_READY (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 30) | ||
| 204 | #define PC31_BOUT_PC_WAIT (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 31) | ||
| 205 | |||
| 206 | |||
| 207 | #endif /* _MXC_GPIO_MX1_MX2_H */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h new file mode 100644 index 000000000000..fb5ae638e79f --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h | |||
| @@ -0,0 +1,237 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> | ||
| 3 | * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or | ||
| 6 | * modify it under the terms of the GNU General Public License | ||
| 7 | * as published by the Free Software Foundation; either version 2 | ||
| 8 | * of the License, or (at your option) any later version. | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, write to the Free Software | ||
| 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
| 17 | * MA 02110-1301, USA. | ||
| 18 | */ | ||
| 19 | |||
| 20 | #ifndef _MXC_IOMUX_MX2x_H | ||
| 21 | #define _MXC_IOMUX_MX2x_H | ||
| 22 | |||
| 23 | #ifndef GPIO_PORTA | ||
| 24 | #error Please include mach/iomux.h | ||
| 25 | #endif | ||
| 26 | |||
| 27 | |||
| 28 | /* Primary GPIO pin functions */ | ||
| 29 | |||
| 30 | #define PA5_PF_LSCLK (GPIO_PORTA | GPIO_PF | GPIO_OUT | 5) | ||
| 31 | #define PA6_PF_LD0 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 6) | ||
| 32 | #define PA7_PF_LD1 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 7) | ||
| 33 | #define PA8_PF_LD2 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 8) | ||
| 34 | #define PA9_PF_LD3 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 9) | ||
| 35 | #define PA10_PF_LD4 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 10) | ||
| 36 | #define PA11_PF_LD5 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 11) | ||
| 37 | #define PA12_PF_LD6 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 12) | ||
| 38 | #define PA13_PF_LD7 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 13) | ||
| 39 | #define PA14_PF_LD8 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 14) | ||
| 40 | #define PA15_PF_LD9 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15) | ||
| 41 | #define PA16_PF_LD10 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16) | ||
| 42 | #define PA17_PF_LD11 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 17) | ||
| 43 | #define PA18_PF_LD12 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 18) | ||
| 44 | #define PA19_PF_LD13 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 19) | ||
| 45 | #define PA20_PF_LD14 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 20) | ||
| 46 | #define PA21_PF_LD15 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 21) | ||
| 47 | #define PA22_PF_LD16 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 22) | ||
| 48 | #define PA23_PF_LD17 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 23) | ||
| 49 | #define PA24_PF_REV (GPIO_PORTA | GPIO_PF | GPIO_OUT | 24) | ||
| 50 | #define PA25_PF_CLS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 25) | ||
| 51 | #define PA26_PF_PS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 26) | ||
| 52 | #define PA27_PF_SPL_SPR (GPIO_PORTA | GPIO_PF | GPIO_OUT | 27) | ||
| 53 | #define PA28_PF_HSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 28) | ||
| 54 | #define PA29_PF_VSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 29) | ||
| 55 | #define PA30_PF_CONTRAST (GPIO_PORTA | GPIO_PF | GPIO_OUT | 30) | ||
| 56 | #define PA31_PF_OE_ACD (GPIO_PORTA | GPIO_PF | GPIO_OUT | 31) | ||
| 57 | #define PB4_PF_SD2_D0 (GPIO_PORTB | GPIO_PF | 4) | ||
| 58 | #define PB5_PF_SD2_D1 (GPIO_PORTB | GPIO_PF | 5) | ||
| 59 | #define PB6_PF_SD2_D2 (GPIO_PORTB | GPIO_PF | 6) | ||
| 60 | #define PB7_PF_SD2_D3 (GPIO_PORTB | GPIO_PF | 7) | ||
| 61 | #define PB8_PF_SD2_CMD (GPIO_PORTB | GPIO_PF | 8) | ||
| 62 | #define PB9_PF_SD2_CLK (GPIO_PORTB | GPIO_PF | 9) | ||
| 63 | #define PB10_PF_CSI_D0 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 10) | ||
| 64 | #define PB11_PF_CSI_D1 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 11) | ||
| 65 | #define PB12_PF_CSI_D2 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 12) | ||
| 66 | #define PB13_PF_CSI_D3 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 13) | ||
| 67 | #define PB14_PF_CSI_D4 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 14) | ||
| 68 | #define PB15_PF_CSI_MCLK (GPIO_PORTB | GPIO_PF | GPIO_OUT | 15) | ||
| 69 | #define PB16_PF_CSI_PIXCLK (GPIO_PORTB | GPIO_PF | GPIO_OUT | 16) | ||
| 70 | #define PB17_PF_CSI_D5 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 17) | ||
| 71 | #define PB18_PF_CSI_D6 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 18) | ||
| 72 | #define PB19_PF_CSI_D7 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 19) | ||
| 73 | #define PB20_PF_CSI_VSYNC (GPIO_PORTB | GPIO_PF | GPIO_OUT | 20) | ||
| 74 | #define PB21_PF_CSI_HSYNC (GPIO_PORTB | GPIO_PF | GPIO_OUT | 21) | ||
| 75 | #define PB23_PF_USB_PWR (GPIO_PORTB | GPIO_PF | 23) | ||
| 76 | #define PB24_PF_USB_OC (GPIO_PORTB | GPIO_PF | 24) | ||
| 77 | #define PB26_PF_USBH1_FS (GPIO_PORTB | GPIO_PF | 26) | ||
| 78 | #define PB27_PF_USBH1_OE (GPIO_PORTB | GPIO_PF | 27) | ||
| 79 | #define PB28_PF_USBH1_TXDM (GPIO_PORTB | GPIO_PF | 28) | ||
| 80 | #define PB29_PF_USBH1_TXDP (GPIO_PORTB | GPIO_PF | 29) | ||
| 81 | #define PB30_PF_USBH1_RXDM (GPIO_PORTB | GPIO_PF | 30) | ||
| 82 | #define PB31_PF_USBH1_RXDP (GPIO_PORTB | GPIO_PF | 31) | ||
| 83 | #define PC14_PF_TOUT (GPIO_PORTC | GPIO_PF | 14) | ||
| 84 | #define PC15_PF_TIN (GPIO_PORTC | GPIO_PF | 15) | ||
| 85 | #define PC20_PF_SSI1_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 20) | ||
| 86 | #define PC21_PF_SSI1_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 21) | ||
| 87 | #define PC22_PF_SSI1_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 22) | ||
| 88 | #define PC23_PF_SSI1_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 23) | ||
| 89 | #define PC24_PF_SSI2_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 24) | ||
| 90 | #define PC25_PF_SSI2_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 25) | ||
| 91 | #define PC26_PF_SSI2_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 26) | ||
| 92 | #define PC27_PF_SSI2_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 27) | ||
| 93 | #define PC28_PF_SSI3_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 28) | ||
| 94 | #define PC29_PF_SSI3_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 29) | ||
| 95 | #define PC30_PF_SSI3_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 30) | ||
| 96 | #define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31) | ||
| 97 | #define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) | ||
| 98 | #define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) | ||
| 99 | #define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | 19) | ||
| 100 | #define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | 20) | ||
| 101 | #define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | 21) | ||
| 102 | #define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | 22) | ||
| 103 | #define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | 23) | ||
| 104 | #define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | 24) | ||
| 105 | #define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) | ||
| 106 | #define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) | ||
| 107 | #define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) | ||
| 108 | #define PD28_PF_CSPI1_SS0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28) | ||
| 109 | #define PD29_PF_CSPI1_SCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29) | ||
| 110 | #define PD30_PF_CSPI1_MISO (GPIO_PORTD | GPIO_PF | GPIO_IN | 30) | ||
| 111 | #define PD31_PF_CSPI1_MOSI (GPIO_PORTD | GPIO_PF | GPIO_OUT | 31) | ||
| 112 | #define PE3_PF_UART2_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 3) | ||
| 113 | #define PE4_PF_UART2_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 4) | ||
| 114 | #define PE5_PF_PWMO (GPIO_PORTE | GPIO_PF | 5) | ||
| 115 | #define PE6_PF_UART2_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 6) | ||
| 116 | #define PE7_PF_UART2_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 7) | ||
| 117 | #define PE8_PF_UART3_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 8) | ||
| 118 | #define PE9_PF_UART3_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 9) | ||
| 119 | #define PE10_PF_UART3_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 10) | ||
| 120 | #define PE11_PF_UART3_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 11) | ||
| 121 | #define PE12_PF_UART1_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 12) | ||
| 122 | #define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 13) | ||
| 123 | #define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 14) | ||
| 124 | #define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 15) | ||
| 125 | #define PE16_PF_RTCK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 16) | ||
| 126 | #define PE17_PF_RESET_OUT (GPIO_PORTE | GPIO_PF | 17) | ||
| 127 | #define PE18_PF_SD1_D0 (GPIO_PORTE | GPIO_PF | 18) | ||
| 128 | #define PE19_PF_SD1_D1 (GPIO_PORTE | GPIO_PF | 19) | ||
| 129 | #define PE20_PF_SD1_D2 (GPIO_PORTE | GPIO_PF | 20) | ||
| 130 | #define PE21_PF_SD1_D3 (GPIO_PORTE | GPIO_PF | 21) | ||
| 131 | #define PE22_PF_SD1_CMD (GPIO_PORTE | GPIO_PF | 22) | ||
| 132 | #define PE23_PF_SD1_CLK (GPIO_PORTE | GPIO_PF | 23) | ||
| 133 | #define PF0_PF_NRFB (GPIO_PORTF | GPIO_PF | 0) | ||
| 134 | #define PF2_PF_NFWP (GPIO_PORTF | GPIO_PF | 2) | ||
| 135 | #define PF4_PF_NFALE (GPIO_PORTF | GPIO_PF | 4) | ||
| 136 | #define PF5_PF_NFRE (GPIO_PORTF | GPIO_PF | 5) | ||
| 137 | #define PF6_PF_NFWE (GPIO_PORTF | GPIO_PF | 6) | ||
| 138 | #define PF15_PF_CLKO (GPIO_PORTF | GPIO_PF | 15) | ||
| 139 | #define PF21_PF_CS4 (GPIO_PORTF | GPIO_PF | 21) | ||
| 140 | #define PF22_PF_CS5 (GPIO_PORTF | GPIO_PF | 22) | ||
| 141 | |||
| 142 | /* Alternate GPIO pin functions */ | ||
| 143 | |||
| 144 | #define PB26_AF_UART4_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 26) | ||
| 145 | #define PB28_AF_UART4_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 28) | ||
| 146 | #define PB29_AF_UART4_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 29) | ||
| 147 | #define PB31_AF_UART4_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 31) | ||
| 148 | #define PC28_AF_SLCDC2_D0 (GPIO_PORTC | GPIO_AF | 28) | ||
| 149 | #define PC29_AF_SLCDC2_RS (GPIO_PORTC | GPIO_AF | 29) | ||
| 150 | #define PC30_AF_SLCDC2_CS (GPIO_PORTC | GPIO_AF | 30) | ||
| 151 | #define PC31_AF_SLCDC2_CLK (GPIO_PORTC | GPIO_AF | 31) | ||
| 152 | #define PD19_AF_USBH2_DATA4 (GPIO_PORTD | GPIO_AF | 19) | ||
| 153 | #define PD20_AF_USBH2_DATA3 (GPIO_PORTD | GPIO_AF | 20) | ||
| 154 | #define PD21_AF_USBH2_DATA6 (GPIO_PORTD | GPIO_AF | 21) | ||
| 155 | #define PD22_AF_USBH2_DATA0 (GPIO_PORTD | GPIO_AF | 22) | ||
| 156 | #define PD23_AF_USBH2_DATA2 (GPIO_PORTD | GPIO_AF | 23) | ||
| 157 | #define PD24_AF_USBH2_DATA1 (GPIO_PORTD | GPIO_AF | 24) | ||
| 158 | #define PD26_AF_USBH2_DATA5 (GPIO_PORTD | GPIO_AF | 26) | ||
| 159 | #define PE0_AF_KP_COL6 (GPIO_PORTE | GPIO_AF | 0) | ||
| 160 | #define PE1_AF_KP_ROW6 (GPIO_PORTE | GPIO_AF | 1) | ||
| 161 | #define PE2_AF_KP_ROW7 (GPIO_PORTE | GPIO_AF | 2) | ||
| 162 | #define PE3_AF_KP_COL7 (GPIO_PORTE | GPIO_AF | 3) | ||
| 163 | #define PE4_AF_KP_ROW7 (GPIO_PORTE | GPIO_AF | 4) | ||
| 164 | #define PE6_AF_KP_COL6 (GPIO_PORTE | GPIO_AF | 6) | ||
| 165 | #define PE7_AF_KP_ROW6 (GPIO_PORTE | GPIO_AF | 7) | ||
| 166 | #define PE16_AF_OWIRE (GPIO_PORTE | GPIO_AF | 16) | ||
| 167 | #define PE18_AF_CSPI3_MISO (GPIO_PORTE | GPIO_AF | GPIO_IN | 18) | ||
| 168 | #define PE21_AF_CSPI3_SS (GPIO_PORTE | GPIO_AF | GPIO_OUT | 21) | ||
| 169 | #define PE22_AF_CSPI3_MOSI (GPIO_PORTE | GPIO_AF | GPIO_OUT | 22) | ||
| 170 | #define PE23_AF_CSPI3_SCLK (GPIO_PORTE | GPIO_AF | GPIO_OUT | 23) | ||
| 171 | |||
| 172 | /* AIN GPIO pin functions */ | ||
| 173 | |||
| 174 | #define PA6_AIN_SLCDC1_DAT0 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 6) | ||
| 175 | #define PA7_AIN_SLCDC1_DAT1 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 7) | ||
| 176 | #define PA8_AIN_SLCDC1_DAT2 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 8) | ||
| 177 | #define PA0_AIN_SLCDC1_DAT3 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0) | ||
| 178 | #define PA11_AIN_SLCDC1_DAT5 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 11) | ||
| 179 | #define PA13_AIN_SLCDC1_DAT7 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 13) | ||
| 180 | #define PA15_AIN_SLCDC1_DAT9 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 15) | ||
| 181 | #define PA17_AIN_SLCDC1_DAT11 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17) | ||
| 182 | #define PA19_AIN_SLCDC1_DAT13 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 19) | ||
| 183 | #define PA21_AIN_SLCDC1_DAT15 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 21) | ||
| 184 | #define PA22_AIN_EXT_DMAGRANT (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 22) | ||
| 185 | #define PA24_AIN_SLCDC1_D0 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 24) | ||
| 186 | #define PA25_AIN_SLCDC1_RS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 25) | ||
| 187 | #define PA26_AIN_SLCDC1_CS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 26) | ||
| 188 | #define PA27_AIN_SLCDC1_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 27) | ||
| 189 | #define PB6_AIN_SLCDC1_D0 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 6) | ||
| 190 | #define PB7_AIN_SLCDC1_RS (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 7) | ||
| 191 | #define PB8_AIN_SLCDC1_CS (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 8) | ||
| 192 | #define PB9_AIN_SLCDC1_CLK (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 9) | ||
| 193 | #define PB25_AIN_SLCDC1_DAT0 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 25) | ||
| 194 | #define PB26_AIN_SLCDC1_DAT1 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 26) | ||
| 195 | #define PB27_AIN_SLCDC1_DAT2 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 27) | ||
| 196 | #define PB28_AIN_SLCDC1_DAT3 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 28) | ||
| 197 | #define PB29_AIN_SLCDC1_DAT4 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 29) | ||
| 198 | #define PB30_AIN_SLCDC1_DAT5 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 30) | ||
| 199 | #define PB31_AIN_SLCDC1_DAT6 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 31) | ||
| 200 | #define PC5_AIN_SLCDC1_DAT7 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 5) | ||
| 201 | #define PC6_AIN_SLCDC1_DAT8 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 6) | ||
| 202 | #define PC7_AIN_SLCDC1_DAT9 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 7) | ||
| 203 | #define PC8_AIN_SLCDC1_DAT10 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 8) | ||
| 204 | #define PC9_AIN_SLCDC1_DAT11 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 9) | ||
| 205 | #define PC10_AIN_SLCDC1_DAT12 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 10) | ||
| 206 | #define PC11_AIN_SLCDC1_DAT13 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 11) | ||
| 207 | #define PC12_AIN_SLCDC1_DAT14 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 12) | ||
| 208 | #define PC13_AIN_SLCDC1_DAT15 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 13) | ||
| 209 | #define PE5_AIN_PC_SPKOUT (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 5) | ||
| 210 | |||
| 211 | /* BIN GPIO pin functions */ | ||
| 212 | |||
| 213 | #define PE5_BIN_TOUT2 (GPIO_PORTE | GPIO_BIN | GPIO_OUT | 5) | ||
| 214 | |||
| 215 | /* CIN GPIO pin functions */ | ||
| 216 | |||
| 217 | #define PA14_CIN_SLCDC1_DAT0 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 14) | ||
| 218 | #define PA15_CIN_SLCDC1_DAT1 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 15) | ||
| 219 | #define PA16_CIN_SLCDC1_DAT2 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 16) | ||
| 220 | #define PA17_CIN_SLCDC1_DAT3 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 17) | ||
| 221 | #define PA18_CIN_SLCDC1_DAT4 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 18) | ||
| 222 | #define PA19_CIN_SLCDC1_DAT5 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 19) | ||
| 223 | #define PA20_CIN_SLCDC1_DAT6 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 20) | ||
| 224 | #define PA21_CIN_SLCDC1_DAT7 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 21) | ||
| 225 | #define PB30_CIN_UART4_CTS (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 30) | ||
| 226 | #define PE5_CIN_TOUT3 (GPIO_PORTE | GPIO_CIN | GPIO_OUT | 5) | ||
| 227 | |||
| 228 | /* AOUT GPIO pin functions */ | ||
| 229 | |||
| 230 | #define PB29_AOUT_UART4_RXD (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 29) | ||
| 231 | #define PB31_AOUT_UART4_RTS (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 31) | ||
| 232 | #define PC8_AOUT_USBOTG_TXR_INT (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 8) | ||
| 233 | #define PC15_AOUT_WKGD (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 15) | ||
| 234 | #define PF21_AOUT_DTACK (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 21) | ||
| 235 | |||
| 236 | |||
| 237 | #endif | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h index c9198c0aea18..ab838cfe94f9 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h | |||
| @@ -92,7 +92,7 @@ enum iomux_gp_func { | |||
| 92 | MUX_EXTDMAREQ2_MBX_SEL = 1 << 15, | 92 | MUX_EXTDMAREQ2_MBX_SEL = 1 << 15, |
| 93 | MUX_TAMPER_DETECT_EN = 1 << 16, | 93 | MUX_TAMPER_DETECT_EN = 1 << 16, |
| 94 | MUX_PGP_USB_4WIRE = 1 << 17, | 94 | MUX_PGP_USB_4WIRE = 1 << 17, |
| 95 | MUX_PGB_USB_COMMON = 1 << 18, | 95 | MUX_PGP_USB_COMMON = 1 << 18, |
| 96 | MUX_SDHC_MEMSTICK1 = 1 << 19, | 96 | MUX_SDHC_MEMSTICK1 = 1 << 19, |
| 97 | MUX_SDHC_MEMSTICK2 = 1 << 20, | 97 | MUX_SDHC_MEMSTICK2 = 1 << 20, |
| 98 | MUX_PGP_SPLL_BYP = 1 << 21, | 98 | MUX_PGP_SPLL_BYP = 1 << 21, |
| @@ -109,21 +109,44 @@ enum iomux_gp_func { | |||
| 109 | }; | 109 | }; |
| 110 | 110 | ||
| 111 | /* | 111 | /* |
| 112 | * This function enables/disables the general purpose function for a particular | 112 | * setups a single pin: |
| 113 | * signal. | 113 | * - reserves the pin so that it is not claimed by another driver |
| 114 | * - setups the iomux according to the configuration | ||
| 115 | * - if the pin is configured as a GPIO, we claim it throug kernel gpiolib | ||
| 116 | */ | ||
| 117 | int mxc_iomux_setup_pin(const unsigned int pin, const char *label); | ||
| 118 | /* | ||
| 119 | * setups mutliple pins | ||
| 120 | * convenient way to call the above function with tables | ||
| 114 | */ | 121 | */ |
| 115 | void iomux_config_gpr(enum iomux_gp_func , bool); | 122 | int mxc_iomux_setup_multiple_pins(unsigned int *pin_list, unsigned count, |
| 123 | const char *label); | ||
| 116 | 124 | ||
| 117 | /* | 125 | /* |
| 118 | * set the mode for a IOMUX pin. | 126 | * releases a single pin: |
| 127 | * - make it available for a future use by another driver | ||
| 128 | * - frees the GPIO if the pin was configured as GPIO | ||
| 129 | * - DOES NOT reconfigure the IOMUX in its reset state | ||
| 119 | */ | 130 | */ |
| 120 | int mxc_iomux_mode(unsigned int); | 131 | void mxc_iomux_release_pin(const unsigned int pin); |
| 132 | /* | ||
| 133 | * releases multiple pins | ||
| 134 | * convenvient way to call the above function with tables | ||
| 135 | */ | ||
| 136 | void mxc_iomux_release_multiple_pins(unsigned int *pin_list, int count); | ||
| 121 | 137 | ||
| 122 | /* | 138 | /* |
| 123 | * This function enables/disables the general purpose function for a particular | 139 | * This function enables/disables the general purpose function for a particular |
| 124 | * signal. | 140 | * signal. |
| 125 | */ | 141 | */ |
| 126 | void mxc_iomux_set_gpr(enum iomux_gp_func, bool); | 142 | void mxc_iomux_set_gpr(enum iomux_gp_func, bool en); |
| 143 | |||
| 144 | /* | ||
| 145 | * This function only configures the iomux hardware. | ||
| 146 | * It is called by the setup functions and should not be called directly anymore. | ||
| 147 | * It is here visible for backward compatibility | ||
| 148 | */ | ||
| 149 | int mxc_iomux_mode(unsigned int pin_mode); | ||
| 127 | 150 | ||
| 128 | #define IOMUX_PADNUM_MASK 0x1ff | 151 | #define IOMUX_PADNUM_MASK 0x1ff |
| 129 | #define IOMUX_GPIONUM_SHIFT 9 | 152 | #define IOMUX_GPIONUM_SHIFT 9 |
| @@ -144,6 +167,11 @@ void mxc_iomux_set_gpr(enum iomux_gp_func, bool); | |||
| 144 | MXC_GPIO_IRQ_START) | 167 | MXC_GPIO_IRQ_START) |
| 145 | 168 | ||
| 146 | /* | 169 | /* |
| 170 | * The number of gpio devices among the pads | ||
| 171 | */ | ||
| 172 | #define GPIO_PORT_MAX 3 | ||
| 173 | |||
| 174 | /* | ||
| 147 | * This enumeration is constructed based on the Section | 175 | * This enumeration is constructed based on the Section |
| 148 | * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated | 176 | * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated |
| 149 | * value is constructed based on the rules described above. | 177 | * value is constructed based on the rules described above. |
| @@ -480,6 +508,9 @@ enum iomux_pins { | |||
| 480 | MX31_PIN_CAPTURE = IOMUX_PIN( 7, 327), | 508 | MX31_PIN_CAPTURE = IOMUX_PIN( 7, 327), |
| 481 | }; | 509 | }; |
| 482 | 510 | ||
| 511 | #define PIN_MAX 327 | ||
| 512 | #define NB_PORTS 12 /* NB_PINS/32, we chose 32 pins per "PORT" */ | ||
| 513 | |||
| 483 | /* | 514 | /* |
| 484 | * Convenience values for use with mxc_iomux_mode() | 515 | * Convenience values for use with mxc_iomux_mode() |
| 485 | * | 516 | * |
| @@ -507,7 +538,9 @@ enum iomux_pins { | |||
| 507 | #define MX31_PIN_CSPI1_SS1__SS1 IOMUX_MODE(MX31_PIN_CSPI1_SS1, IOMUX_CONFIG_FUNC) | 538 | #define MX31_PIN_CSPI1_SS1__SS1 IOMUX_MODE(MX31_PIN_CSPI1_SS1, IOMUX_CONFIG_FUNC) |
| 508 | #define MX31_PIN_CSPI1_SS2__SS2 IOMUX_MODE(MX31_PIN_CSPI1_SS2, IOMUX_CONFIG_FUNC) | 539 | #define MX31_PIN_CSPI1_SS2__SS2 IOMUX_MODE(MX31_PIN_CSPI1_SS2, IOMUX_CONFIG_FUNC) |
| 509 | #define MX31_PIN_CSPI2_MOSI__MOSI IOMUX_MODE(MX31_PIN_CSPI2_MOSI, IOMUX_CONFIG_FUNC) | 540 | #define MX31_PIN_CSPI2_MOSI__MOSI IOMUX_MODE(MX31_PIN_CSPI2_MOSI, IOMUX_CONFIG_FUNC) |
| 541 | #define MX31_PIN_CSPI2_MOSI__SCL IOMUX_MODE(MX31_PIN_CSPI2_MOSI, IOMUX_CONFIG_ALT1) | ||
| 510 | #define MX31_PIN_CSPI2_MISO__MISO IOMUX_MODE(MX31_PIN_CSPI2_MISO, IOMUX_CONFIG_FUNC) | 542 | #define MX31_PIN_CSPI2_MISO__MISO IOMUX_MODE(MX31_PIN_CSPI2_MISO, IOMUX_CONFIG_FUNC) |
| 543 | #define MX31_PIN_CSPI2_MISO__SDA IOMUX_MODE(MX31_PIN_CSPI2_MISO, IOMUX_CONFIG_ALT1) | ||
| 511 | #define MX31_PIN_CSPI2_SCLK__SCLK IOMUX_MODE(MX31_PIN_CSPI2_SCLK, IOMUX_CONFIG_FUNC) | 544 | #define MX31_PIN_CSPI2_SCLK__SCLK IOMUX_MODE(MX31_PIN_CSPI2_SCLK, IOMUX_CONFIG_FUNC) |
| 512 | #define MX31_PIN_CSPI2_SPI_RDY__SPI_RDY IOMUX_MODE(MX31_PIN_CSPI2_SPI_RDY, IOMUX_CONFIG_FUNC) | 545 | #define MX31_PIN_CSPI2_SPI_RDY__SPI_RDY IOMUX_MODE(MX31_PIN_CSPI2_SPI_RDY, IOMUX_CONFIG_FUNC) |
| 513 | #define MX31_PIN_CSPI2_SS0__SS0 IOMUX_MODE(MX31_PIN_CSPI2_SS0, IOMUX_CONFIG_FUNC) | 546 | #define MX31_PIN_CSPI2_SS0__SS0 IOMUX_MODE(MX31_PIN_CSPI2_SS0, IOMUX_CONFIG_FUNC) |
| @@ -525,6 +558,33 @@ enum iomux_pins { | |||
| 525 | #define MX31_PIN_SD1_DATA0__SD1_DATA0 IOMUX_MODE(MX31_PIN_SD1_DATA0, IOMUX_CONFIG_FUNC) | 558 | #define MX31_PIN_SD1_DATA0__SD1_DATA0 IOMUX_MODE(MX31_PIN_SD1_DATA0, IOMUX_CONFIG_FUNC) |
| 526 | #define MX31_PIN_SD1_CLK__SD1_CLK IOMUX_MODE(MX31_PIN_SD1_CLK, IOMUX_CONFIG_FUNC) | 559 | #define MX31_PIN_SD1_CLK__SD1_CLK IOMUX_MODE(MX31_PIN_SD1_CLK, IOMUX_CONFIG_FUNC) |
| 527 | #define MX31_PIN_SD1_CMD__SD1_CMD IOMUX_MODE(MX31_PIN_SD1_CMD, IOMUX_CONFIG_FUNC) | 560 | #define MX31_PIN_SD1_CMD__SD1_CMD IOMUX_MODE(MX31_PIN_SD1_CMD, IOMUX_CONFIG_FUNC) |
| 561 | #define MX31_PIN_LD0__LD0 IOMUX_MODE(MX31_PIN_LD0, IOMUX_CONFIG_FUNC) | ||
| 562 | #define MX31_PIN_LD1__LD1 IOMUX_MODE(MX31_PIN_LD1, IOMUX_CONFIG_FUNC) | ||
| 563 | #define MX31_PIN_LD2__LD2 IOMUX_MODE(MX31_PIN_LD2, IOMUX_CONFIG_FUNC) | ||
| 564 | #define MX31_PIN_LD3__LD3 IOMUX_MODE(MX31_PIN_LD3, IOMUX_CONFIG_FUNC) | ||
| 565 | #define MX31_PIN_LD4__LD4 IOMUX_MODE(MX31_PIN_LD4, IOMUX_CONFIG_FUNC) | ||
| 566 | #define MX31_PIN_LD5__LD5 IOMUX_MODE(MX31_PIN_LD5, IOMUX_CONFIG_FUNC) | ||
| 567 | #define MX31_PIN_LD6__LD6 IOMUX_MODE(MX31_PIN_LD6, IOMUX_CONFIG_FUNC) | ||
| 568 | #define MX31_PIN_LD7__LD7 IOMUX_MODE(MX31_PIN_LD7, IOMUX_CONFIG_FUNC) | ||
| 569 | #define MX31_PIN_LD8__LD8 IOMUX_MODE(MX31_PIN_LD8, IOMUX_CONFIG_FUNC) | ||
| 570 | #define MX31_PIN_LD9__LD9 IOMUX_MODE(MX31_PIN_LD9, IOMUX_CONFIG_FUNC) | ||
| 571 | #define MX31_PIN_LD10__LD10 IOMUX_MODE(MX31_PIN_LD10, IOMUX_CONFIG_FUNC) | ||
| 572 | #define MX31_PIN_LD11__LD11 IOMUX_MODE(MX31_PIN_LD11, IOMUX_CONFIG_FUNC) | ||
| 573 | #define MX31_PIN_LD12__LD12 IOMUX_MODE(MX31_PIN_LD12, IOMUX_CONFIG_FUNC) | ||
| 574 | #define MX31_PIN_LD13__LD13 IOMUX_MODE(MX31_PIN_LD13, IOMUX_CONFIG_FUNC) | ||
| 575 | #define MX31_PIN_LD14__LD14 IOMUX_MODE(MX31_PIN_LD14, IOMUX_CONFIG_FUNC) | ||
| 576 | #define MX31_PIN_LD15__LD15 IOMUX_MODE(MX31_PIN_LD15, IOMUX_CONFIG_FUNC) | ||
| 577 | #define MX31_PIN_LD16__LD16 IOMUX_MODE(MX31_PIN_LD16, IOMUX_CONFIG_FUNC) | ||
| 578 | #define MX31_PIN_LD17__LD17 IOMUX_MODE(MX31_PIN_LD17, IOMUX_CONFIG_FUNC) | ||
| 579 | #define MX31_PIN_VSYNC3__VSYNC3 IOMUX_MODE(MX31_PIN_VSYNC3, IOMUX_CONFIG_FUNC) | ||
| 580 | #define MX31_PIN_HSYNC__HSYNC IOMUX_MODE(MX31_PIN_HSYNC, IOMUX_CONFIG_FUNC) | ||
| 581 | #define MX31_PIN_FPSHIFT__FPSHIFT IOMUX_MODE(MX31_PIN_FPSHIFT, IOMUX_CONFIG_FUNC) | ||
| 582 | #define MX31_PIN_DRDY0__DRDY0 IOMUX_MODE(MX31_PIN_DRDY0, IOMUX_CONFIG_FUNC) | ||
| 583 | #define MX31_PIN_D3_REV__D3_REV IOMUX_MODE(MX31_PIN_D3_REV, IOMUX_CONFIG_FUNC) | ||
| 584 | #define MX31_PIN_CONTRAST__CONTRAST IOMUX_MODE(MX31_PIN_CONTRAST, IOMUX_CONFIG_FUNC) | ||
| 585 | #define MX31_PIN_D3_SPL__D3_SPL IOMUX_MODE(MX31_PIN_D3_SPL, IOMUX_CONFIG_FUNC) | ||
| 586 | #define MX31_PIN_D3_CLS__D3_CLS IOMUX_MODE(MX31_PIN_D3_CLS, IOMUX_CONFIG_FUNC) | ||
| 587 | #define MX31_PIN_LCS0__GPI03_23 IOMUX_MODE(MX31_PIN_LCS0, IOMUX_CONFIG_GPIO) | ||
| 528 | 588 | ||
| 529 | /*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0 | 589 | /*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0 |
| 530 | * cspi1_ss1*/ | 590 | * cspi1_ss1*/ |
diff --git a/arch/arm/plat-mxc/include/mach/iomux.h b/arch/arm/plat-mxc/include/mach/iomux.h new file mode 100644 index 000000000000..171f8adc1109 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/iomux.h | |||
| @@ -0,0 +1,127 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> | ||
| 3 | * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or | ||
| 6 | * modify it under the terms of the GNU General Public License | ||
| 7 | * as published by the Free Software Foundation; either version 2 | ||
| 8 | * of the License, or (at your option) any later version. | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, write to the Free Software | ||
| 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
| 17 | * MA 02110-1301, USA. | ||
| 18 | */ | ||
| 19 | |||
| 20 | #ifndef _MXC_IOMUX_H | ||
| 21 | #define _MXC_IOMUX_H | ||
| 22 | |||
| 23 | /* | ||
| 24 | * GPIO Module and I/O Multiplexer | ||
| 25 | * x = 0..3 for reg_A, reg_B, reg_C, reg_D | ||
| 26 | */ | ||
| 27 | #define VA_GPIO_BASE IO_ADDRESS(GPIO_BASE_ADDR) | ||
| 28 | #define MXC_DDIR(x) (0x00 + ((x) << 8)) | ||
| 29 | #define MXC_OCR1(x) (0x04 + ((x) << 8)) | ||
| 30 | #define MXC_OCR2(x) (0x08 + ((x) << 8)) | ||
| 31 | #define MXC_ICONFA1(x) (0x0c + ((x) << 8)) | ||
| 32 | #define MXC_ICONFA2(x) (0x10 + ((x) << 8)) | ||
| 33 | #define MXC_ICONFB1(x) (0x14 + ((x) << 8)) | ||
| 34 | #define MXC_ICONFB2(x) (0x18 + ((x) << 8)) | ||
| 35 | #define MXC_DR(x) (0x1c + ((x) << 8)) | ||
| 36 | #define MXC_GIUS(x) (0x20 + ((x) << 8)) | ||
| 37 | #define MXC_SSR(x) (0x24 + ((x) << 8)) | ||
| 38 | #define MXC_ICR1(x) (0x28 + ((x) << 8)) | ||
| 39 | #define MXC_ICR2(x) (0x2c + ((x) << 8)) | ||
| 40 | #define MXC_IMR(x) (0x30 + ((x) << 8)) | ||
| 41 | #define MXC_ISR(x) (0x34 + ((x) << 8)) | ||
| 42 | #define MXC_GPR(x) (0x38 + ((x) << 8)) | ||
| 43 | #define MXC_SWR(x) (0x3c + ((x) << 8)) | ||
| 44 | #define MXC_PUEN(x) (0x40 + ((x) << 8)) | ||
| 45 | |||
| 46 | #ifdef CONFIG_ARCH_MX1 | ||
| 47 | # define GPIO_PORT_MAX 3 | ||
| 48 | #endif | ||
| 49 | #ifdef CONFIG_ARCH_MX2 | ||
| 50 | # define GPIO_PORT_MAX 5 | ||
| 51 | #endif | ||
| 52 | |||
| 53 | #ifndef GPIO_PORT_MAX | ||
| 54 | # error "GPIO config port count unknown!" | ||
| 55 | #endif | ||
| 56 | |||
| 57 | #define GPIO_PIN_MASK 0x1f | ||
| 58 | |||
| 59 | #define GPIO_PORT_SHIFT 5 | ||
| 60 | #define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT) | ||
| 61 | |||
| 62 | #define GPIO_PORTA (0 << GPIO_PORT_SHIFT) | ||
| 63 | #define GPIO_PORTB (1 << GPIO_PORT_SHIFT) | ||
| 64 | #define GPIO_PORTC (2 << GPIO_PORT_SHIFT) | ||
| 65 | #define GPIO_PORTD (3 << GPIO_PORT_SHIFT) | ||
| 66 | #define GPIO_PORTE (4 << GPIO_PORT_SHIFT) | ||
| 67 | #define GPIO_PORTF (5 << GPIO_PORT_SHIFT) | ||
| 68 | |||
| 69 | #define GPIO_OUT (1 << 8) | ||
| 70 | #define GPIO_IN (0 << 8) | ||
| 71 | #define GPIO_PUEN (1 << 9) | ||
| 72 | |||
| 73 | #define GPIO_PF (1 << 10) | ||
| 74 | #define GPIO_AF (1 << 11) | ||
| 75 | |||
| 76 | #define GPIO_OCR_SHIFT 12 | ||
| 77 | #define GPIO_OCR_MASK (3 << GPIO_OCR_SHIFT) | ||
| 78 | #define GPIO_AIN (0 << GPIO_OCR_SHIFT) | ||
| 79 | #define GPIO_BIN (1 << GPIO_OCR_SHIFT) | ||
| 80 | #define GPIO_CIN (2 << GPIO_OCR_SHIFT) | ||
| 81 | #define GPIO_GPIO (3 << GPIO_OCR_SHIFT) | ||
| 82 | |||
| 83 | #define GPIO_AOUT_SHIFT 14 | ||
| 84 | #define GPIO_AOUT_MASK (3 << GPIO_AOUT_SHIFT) | ||
| 85 | #define GPIO_AOUT (0 << GPIO_AOUT_SHIFT) | ||
| 86 | #define GPIO_AOUT_ISR (1 << GPIO_AOUT_SHIFT) | ||
| 87 | #define GPIO_AOUT_0 (2 << GPIO_AOUT_SHIFT) | ||
| 88 | #define GPIO_AOUT_1 (3 << GPIO_AOUT_SHIFT) | ||
| 89 | |||
| 90 | #define GPIO_BOUT_SHIFT 16 | ||
| 91 | #define GPIO_BOUT_MASK (3 << GPIO_BOUT_SHIFT) | ||
| 92 | #define GPIO_BOUT (0 << GPIO_BOUT_SHIFT) | ||
| 93 | #define GPIO_BOUT_ISR (1 << GPIO_BOUT_SHIFT) | ||
| 94 | #define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT) | ||
| 95 | #define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT) | ||
| 96 | |||
| 97 | |||
| 98 | #ifdef CONFIG_ARCH_MX1 | ||
| 99 | #include <mach/iomux-mx1.h> | ||
| 100 | #endif | ||
| 101 | #ifdef CONFIG_ARCH_MX2 | ||
| 102 | #include <mach/iomux-mx2x.h> | ||
| 103 | #ifdef CONFIG_MACH_MX21 | ||
| 104 | #include <mach/iomux-mx21.h> | ||
| 105 | #endif | ||
| 106 | #ifdef CONFIG_MACH_MX27 | ||
| 107 | #include <mach/iomux-mx27.h> | ||
| 108 | #endif | ||
| 109 | #endif | ||
| 110 | |||
| 111 | |||
| 112 | /* decode irq number to use with IMR(x), ISR(x) and friends */ | ||
| 113 | #define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5) | ||
| 114 | |||
| 115 | #define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x) | ||
| 116 | #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) | ||
| 117 | #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) | ||
| 118 | #define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x) | ||
| 119 | #define IRQ_GPIOE(x) (IRQ_GPIOD(32) + x) | ||
| 120 | |||
| 121 | |||
| 122 | extern void mxc_gpio_mode(int gpio_mode); | ||
| 123 | extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, | ||
| 124 | const char *label); | ||
| 125 | extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count); | ||
| 126 | |||
| 127 | #endif | ||
diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h index 0b808399097f..e0783e619580 100644 --- a/arch/arm/plat-mxc/include/mach/memory.h +++ b/arch/arm/plat-mxc/include/mach/memory.h | |||
| @@ -14,7 +14,12 @@ | |||
| 14 | #if defined CONFIG_ARCH_MX1 | 14 | #if defined CONFIG_ARCH_MX1 |
| 15 | #define PHYS_OFFSET UL(0x08000000) | 15 | #define PHYS_OFFSET UL(0x08000000) |
| 16 | #elif defined CONFIG_ARCH_MX2 | 16 | #elif defined CONFIG_ARCH_MX2 |
| 17 | #ifdef CONFIG_MACH_MX21 | ||
| 18 | #define PHYS_OFFSET UL(0xC0000000) | ||
| 19 | #endif | ||
| 20 | #ifdef CONFIG_MACH_MX27 | ||
| 17 | #define PHYS_OFFSET UL(0xA0000000) | 21 | #define PHYS_OFFSET UL(0xA0000000) |
| 22 | #endif | ||
| 18 | #elif defined CONFIG_ARCH_MX3 | 23 | #elif defined CONFIG_ARCH_MX3 |
| 19 | #define PHYS_OFFSET UL(0x80000000) | 24 | #define PHYS_OFFSET UL(0x80000000) |
| 20 | #endif | 25 | #endif |
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h new file mode 100644 index 000000000000..e8c4cf56c24e --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/mx21.h | |||
| @@ -0,0 +1,78 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
| 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | ||
| 4 | * Copyright 2009 Holger Schurig, hs4233@mail.mn-solutions.de | ||
| 5 | * | ||
| 6 | * This contains i.MX21-specific hardware definitions. For those | ||
| 7 | * hardware pieces that are common between i.MX21 and i.MX27, have a | ||
| 8 | * look at mx2x.h. | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or | ||
| 11 | * modify it under the terms of the GNU General Public License | ||
| 12 | * as published by the Free Software Foundation; either version 2 | ||
| 13 | * of the License, or (at your option) any later version. | ||
| 14 | * This program is distributed in the hope that it will be useful, | ||
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 17 | * GNU General Public License for more details. | ||
| 18 | * | ||
| 19 | * You should have received a copy of the GNU General Public License | ||
| 20 | * along with this program; if not, write to the Free Software | ||
| 21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
| 22 | * MA 02110-1301, USA. | ||
| 23 | */ | ||
| 24 | |||
| 25 | #ifndef __ASM_ARCH_MXC_MX21_H__ | ||
| 26 | #define __ASM_ARCH_MXC_MX21_H__ | ||
| 27 | |||
| 28 | #ifndef __ASM_ARCH_MXC_HARDWARE_H__ | ||
| 29 | #error "Do not include directly." | ||
| 30 | #endif | ||
| 31 | |||
| 32 | |||
| 33 | /* Memory regions and CS */ | ||
| 34 | #define SDRAM_BASE_ADDR 0xC0000000 | ||
| 35 | #define CSD1_BASE_ADDR 0xC4000000 | ||
| 36 | |||
| 37 | #define CS0_BASE_ADDR 0xC8000000 | ||
| 38 | #define CS1_BASE_ADDR 0xCC000000 | ||
| 39 | #define CS2_BASE_ADDR 0xD0000000 | ||
| 40 | #define CS3_BASE_ADDR 0xD1000000 | ||
| 41 | #define CS4_BASE_ADDR 0xD2000000 | ||
| 42 | #define CS5_BASE_ADDR 0xDD000000 | ||
| 43 | #define PCMCIA_MEM_BASE_ADDR 0xD4000000 | ||
| 44 | |||
| 45 | /* NAND, SDRAM, WEIM etc controllers */ | ||
| 46 | #define X_MEMC_BASE_ADDR 0xDF000000 | ||
| 47 | #define X_MEMC_BASE_ADDR_VIRT 0xF4200000 | ||
| 48 | #define X_MEMC_SIZE SZ_256K | ||
| 49 | |||
| 50 | #define SDRAMC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x0000) | ||
| 51 | #define EIM_BASE_ADDR (X_MEMC_BASE_ADDR + 0x1000) | ||
| 52 | #define PCMCIA_CTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x2000) | ||
| 53 | #define NFC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x3000) | ||
| 54 | |||
| 55 | #define IRAM_BASE_ADDR 0xFFFFE800 /* internal ram */ | ||
| 56 | |||
| 57 | /* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */ | ||
| 58 | #define ARCH_NR_GPIOS (6*32 + 16) | ||
| 59 | |||
| 60 | /* fixed interrupt numbers */ | ||
| 61 | #define MXC_INT_USBCTRL 58 | ||
| 62 | #define MXC_INT_USBCTRL 58 | ||
| 63 | #define MXC_INT_USBMNP 57 | ||
| 64 | #define MXC_INT_USBFUNC 56 | ||
| 65 | #define MXC_INT_USBHOST 55 | ||
| 66 | #define MXC_INT_USBDMA 54 | ||
| 67 | #define MXC_INT_USBWKUP 53 | ||
| 68 | #define MXC_INT_EMMADEC 50 | ||
| 69 | #define MXC_INT_EMMAENC 49 | ||
| 70 | #define MXC_INT_BMI 30 | ||
| 71 | #define MXC_INT_FIRI 9 | ||
| 72 | |||
| 73 | /* fixed DMA request numbers */ | ||
| 74 | #define DMA_REQ_BMI_RX 29 | ||
| 75 | #define DMA_REQ_BMI_TX 28 | ||
| 76 | #define DMA_REQ_FIRI_RX 4 | ||
| 77 | |||
| 78 | #endif /* __ASM_ARCH_MXC_MX21_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index 0313be720552..6e93f2c0b7bb 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h | |||
| @@ -2,6 +2,10 @@ | |||
| 2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | 2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. |
| 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de |
| 4 | * | 4 | * |
| 5 | * This contains i.MX27-specific hardware definitions. For those | ||
| 6 | * hardware pieces that are common between i.MX21 and i.MX27, have a | ||
| 7 | * look at mx2x.h. | ||
| 8 | * | ||
| 5 | * This program is free software; you can redistribute it and/or | 9 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License | 10 | * modify it under the terms of the GNU General Public License |
| 7 | * as published by the Free Software Foundation; either version 2 | 11 | * as published by the Free Software Foundation; either version 2 |
| @@ -27,35 +31,6 @@ | |||
| 27 | /* IRAM */ | 31 | /* IRAM */ |
| 28 | #define IRAM_BASE_ADDR 0xFFFF4C00 /* internal ram */ | 32 | #define IRAM_BASE_ADDR 0xFFFF4C00 /* internal ram */ |
| 29 | 33 | ||
| 30 | /* Register offests */ | ||
| 31 | #define AIPI_BASE_ADDR 0x10000000 | ||
| 32 | #define AIPI_BASE_ADDR_VIRT 0xF4000000 | ||
| 33 | #define AIPI_SIZE SZ_1M | ||
| 34 | |||
| 35 | #define DMA_BASE_ADDR (AIPI_BASE_ADDR + 0x01000) | ||
| 36 | #define WDOG_BASE_ADDR (AIPI_BASE_ADDR + 0x02000) | ||
| 37 | #define GPT1_BASE_ADDR (AIPI_BASE_ADDR + 0x03000) | ||
| 38 | #define GPT2_BASE_ADDR (AIPI_BASE_ADDR + 0x04000) | ||
| 39 | #define GPT3_BASE_ADDR (AIPI_BASE_ADDR + 0x05000) | ||
| 40 | #define PWM_BASE_ADDR (AIPI_BASE_ADDR + 0x06000) | ||
| 41 | #define RTC_BASE_ADDR (AIPI_BASE_ADDR + 0x07000) | ||
| 42 | #define KPP_BASE_ADDR (AIPI_BASE_ADDR + 0x08000) | ||
| 43 | #define OWIRE_BASE_ADDR (AIPI_BASE_ADDR + 0x09000) | ||
| 44 | #define UART1_BASE_ADDR (AIPI_BASE_ADDR + 0x0A000) | ||
| 45 | #define UART2_BASE_ADDR (AIPI_BASE_ADDR + 0x0B000) | ||
| 46 | #define UART3_BASE_ADDR (AIPI_BASE_ADDR + 0x0C000) | ||
| 47 | #define UART4_BASE_ADDR (AIPI_BASE_ADDR + 0x0D000) | ||
| 48 | #define CSPI1_BASE_ADDR (AIPI_BASE_ADDR + 0x0E000) | ||
| 49 | #define CSPI2_BASE_ADDR (AIPI_BASE_ADDR + 0x0F000) | ||
| 50 | #define SSI1_BASE_ADDR (AIPI_BASE_ADDR + 0x10000) | ||
| 51 | #define SSI2_BASE_ADDR (AIPI_BASE_ADDR + 0x11000) | ||
| 52 | #define I2C_BASE_ADDR (AIPI_BASE_ADDR + 0x12000) | ||
| 53 | #define SDHC1_BASE_ADDR (AIPI_BASE_ADDR + 0x13000) | ||
| 54 | #define SDHC2_BASE_ADDR (AIPI_BASE_ADDR + 0x14000) | ||
| 55 | #define GPIO_BASE_ADDR (AIPI_BASE_ADDR + 0x15000) | ||
| 56 | #define AUDMUX_BASE_ADDR (AIPI_BASE_ADDR + 0x16000) | ||
| 57 | |||
| 58 | #define CSPI3_BASE_ADDR (AIPI_BASE_ADDR + 0x17000) | ||
| 59 | #define MSHC_BASE_ADDR (AIPI_BASE_ADDR + 0x18000) | 34 | #define MSHC_BASE_ADDR (AIPI_BASE_ADDR + 0x18000) |
| 60 | #define GPT5_BASE_ADDR (AIPI_BASE_ADDR + 0x19000) | 35 | #define GPT5_BASE_ADDR (AIPI_BASE_ADDR + 0x19000) |
| 61 | #define GPT4_BASE_ADDR (AIPI_BASE_ADDR + 0x1A000) | 36 | #define GPT4_BASE_ADDR (AIPI_BASE_ADDR + 0x1A000) |
| @@ -64,55 +39,24 @@ | |||
| 64 | #define I2C2_BASE_ADDR (AIPI_BASE_ADDR + 0x1D000) | 39 | #define I2C2_BASE_ADDR (AIPI_BASE_ADDR + 0x1D000) |
| 65 | #define SDHC3_BASE_ADDR (AIPI_BASE_ADDR + 0x1E000) | 40 | #define SDHC3_BASE_ADDR (AIPI_BASE_ADDR + 0x1E000) |
| 66 | #define GPT6_BASE_ADDR (AIPI_BASE_ADDR + 0x1F000) | 41 | #define GPT6_BASE_ADDR (AIPI_BASE_ADDR + 0x1F000) |
| 67 | |||
| 68 | #define LCDC_BASE_ADDR (AIPI_BASE_ADDR + 0x21000) | ||
| 69 | #define SLCDC_BASE_ADDR (AIPI_BASE_ADDR + 0x22000) | ||
| 70 | #define VPU_BASE_ADDR (AIPI_BASE_ADDR + 0x23000) | 42 | #define VPU_BASE_ADDR (AIPI_BASE_ADDR + 0x23000) |
| 71 | #define USBOTG_BASE_ADDR (AIPI_BASE_ADDR + 0x24000) | ||
| 72 | /* for mx27*/ | ||
| 73 | #define OTG_BASE_ADDR USBOTG_BASE_ADDR | 43 | #define OTG_BASE_ADDR USBOTG_BASE_ADDR |
| 74 | #define SAHARA_BASE_ADDR (AIPI_BASE_ADDR + 0x25000) | 44 | #define SAHARA_BASE_ADDR (AIPI_BASE_ADDR + 0x25000) |
| 75 | #define EMMA_PP_BASE_ADDR (AIPI_BASE_ADDR + 0x26000) | ||
| 76 | #define EMMA_PRP_BASE_ADDR (AIPI_BASE_ADDR + 0x26400) | ||
| 77 | #define CCM_BASE_ADDR (AIPI_BASE_ADDR + 0x27000) | ||
| 78 | #define SYSCTRL_BASE_ADDR (AIPI_BASE_ADDR + 0x27800) | ||
| 79 | #define IIM_BASE_ADDR (AIPI_BASE_ADDR + 0x28000) | 45 | #define IIM_BASE_ADDR (AIPI_BASE_ADDR + 0x28000) |
| 80 | |||
| 81 | #define RTIC_BASE_ADDR (AIPI_BASE_ADDR + 0x2A000) | 46 | #define RTIC_BASE_ADDR (AIPI_BASE_ADDR + 0x2A000) |
| 82 | #define FEC_BASE_ADDR (AIPI_BASE_ADDR + 0x2B000) | 47 | #define FEC_BASE_ADDR (AIPI_BASE_ADDR + 0x2B000) |
| 83 | #define SCC_BASE_ADDR (AIPI_BASE_ADDR + 0x2C000) | 48 | #define SCC_BASE_ADDR (AIPI_BASE_ADDR + 0x2C000) |
| 84 | #define ETB_BASE_ADDR (AIPI_BASE_ADDR + 0x3B000) | 49 | #define ETB_BASE_ADDR (AIPI_BASE_ADDR + 0x3B000) |
| 85 | #define ETB_RAM_BASE_ADDR (AIPI_BASE_ADDR + 0x3C000) | 50 | #define ETB_RAM_BASE_ADDR (AIPI_BASE_ADDR + 0x3C000) |
| 86 | 51 | ||
| 87 | #define JAM_BASE_ADDR (AIPI_BASE_ADDR + 0x3E000) | 52 | /* ROM patch */ |
| 88 | #define MAX_BASE_ADDR (AIPI_BASE_ADDR + 0x3F000) | ||
| 89 | |||
| 90 | /* ROMP and AVIC */ | ||
| 91 | #define ROMP_BASE_ADDR 0x10041000 | 53 | #define ROMP_BASE_ADDR 0x10041000 |
| 92 | 54 | ||
| 93 | #define AVIC_BASE_ADDR 0x10040000 | ||
| 94 | |||
| 95 | #define SAHB1_BASE_ADDR 0x80000000 | ||
| 96 | #define SAHB1_BASE_ADDR_VIRT 0xF4100000 | ||
| 97 | #define SAHB1_SIZE SZ_1M | ||
| 98 | |||
| 99 | #define CSI_BASE_ADDR (SAHB1_BASE_ADDR + 0x0000) | ||
| 100 | #define ATA_BASE_ADDR (SAHB1_BASE_ADDR + 0x1000) | 55 | #define ATA_BASE_ADDR (SAHB1_BASE_ADDR + 0x1000) |
| 101 | 56 | ||
| 102 | /* NAND, SDRAM, WEIM, M3IF, EMI controllers */ | ||
| 103 | #define X_MEMC_BASE_ADDR 0xD8000000 | ||
| 104 | #define X_MEMC_BASE_ADDR_VIRT 0xF4200000 | ||
| 105 | #define X_MEMC_SIZE SZ_1M | ||
| 106 | |||
| 107 | #define NFC_BASE_ADDR (X_MEMC_BASE_ADDR) | ||
| 108 | #define SDRAMC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x1000) | ||
| 109 | #define WEIM_BASE_ADDR (X_MEMC_BASE_ADDR + 0x2000) | ||
| 110 | #define M3IF_BASE_ADDR (X_MEMC_BASE_ADDR + 0x3000) | ||
| 111 | #define PCMCIA_CTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x4000) | ||
| 112 | |||
| 113 | /* Memory regions and CS */ | 57 | /* Memory regions and CS */ |
| 114 | #define SDRAM_BASE_ADDR 0xA0000000 | 58 | #define SDRAM_BASE_ADDR 0xA0000000 |
| 115 | #define CSD1_BASE_ADDR 0xB0000000 | 59 | #define CSD1_BASE_ADDR 0xB0000000 |
| 116 | 60 | ||
| 117 | #define CS0_BASE_ADDR 0xC0000000 | 61 | #define CS0_BASE_ADDR 0xC0000000 |
| 118 | #define CS1_BASE_ADDR 0xC8000000 | 62 | #define CS1_BASE_ADDR 0xC8000000 |
| @@ -122,44 +66,20 @@ | |||
| 122 | #define CS5_BASE_ADDR 0xD6000000 | 66 | #define CS5_BASE_ADDR 0xD6000000 |
| 123 | #define PCMCIA_MEM_BASE_ADDR 0xDC000000 | 67 | #define PCMCIA_MEM_BASE_ADDR 0xDC000000 |
| 124 | 68 | ||
| 125 | /* | 69 | /* NAND, SDRAM, WEIM, M3IF, EMI controllers */ |
| 126 | * This macro defines the physical to virtual address mapping for all the | 70 | #define X_MEMC_BASE_ADDR 0xD8000000 |
| 127 | * peripheral modules. It is used by passing in the physical address as x | 71 | #define X_MEMC_BASE_ADDR_VIRT 0xF4200000 |
| 128 | * and returning the virtual address. If the physical address is not mapped, | 72 | #define X_MEMC_SIZE SZ_1M |
| 129 | * it returns 0xDEADBEEF | ||
| 130 | */ | ||
| 131 | #define IO_ADDRESS(x) \ | ||
| 132 | (void __iomem *) \ | ||
| 133 | (((x >= AIPI_BASE_ADDR) && (x < (AIPI_BASE_ADDR + AIPI_SIZE))) ? \ | ||
| 134 | AIPI_IO_ADDRESS(x) : \ | ||
| 135 | ((x >= SAHB1_BASE_ADDR) && (x < (SAHB1_BASE_ADDR + SAHB1_SIZE))) ? \ | ||
| 136 | SAHB1_IO_ADDRESS(x) : \ | ||
| 137 | ((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? \ | ||
| 138 | X_MEMC_IO_ADDRESS(x) : 0xDEADBEEF) | ||
| 139 | |||
| 140 | /* define the address mapping macros: in physical address order */ | ||
| 141 | #define AIPI_IO_ADDRESS(x) \ | ||
| 142 | (((x) - AIPI_BASE_ADDR) + AIPI_BASE_ADDR_VIRT) | ||
| 143 | |||
| 144 | #define AVIC_IO_ADDRESS(x) AIPI_IO_ADDRESS(x) | ||
| 145 | |||
| 146 | #define SAHB1_IO_ADDRESS(x) \ | ||
| 147 | (((x) - SAHB1_BASE_ADDR) + SAHB1_BASE_ADDR_VIRT) | ||
| 148 | |||
| 149 | #define CS4_IO_ADDRESS(x) \ | ||
| 150 | (((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT) | ||
| 151 | |||
| 152 | #define X_MEMC_IO_ADDRESS(x) \ | ||
| 153 | (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) | ||
| 154 | 73 | ||
| 155 | #define PCMCIA_IO_ADDRESS(x) \ | 74 | #define NFC_BASE_ADDR (X_MEMC_BASE_ADDR) |
| 156 | (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) | 75 | #define SDRAMC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x1000) |
| 76 | #define WEIM_BASE_ADDR (X_MEMC_BASE_ADDR + 0x2000) | ||
| 77 | #define M3IF_BASE_ADDR (X_MEMC_BASE_ADDR + 0x3000) | ||
| 78 | #define PCMCIA_CTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x4000) | ||
| 157 | 79 | ||
| 158 | /* fixed interrput numbers */ | 80 | /* fixed interrupt numbers */ |
| 159 | #define MXC_INT_CCM 63 | 81 | #define MXC_INT_CCM 63 |
| 160 | #define MXC_INT_IIM 62 | 82 | #define MXC_INT_IIM 62 |
| 161 | #define MXC_INT_LCDC 61 | ||
| 162 | #define MXC_INT_SLCDC 60 | ||
| 163 | #define MXC_INT_SAHARA 59 | 83 | #define MXC_INT_SAHARA 59 |
| 164 | #define MXC_INT_SCC_SCM 58 | 84 | #define MXC_INT_SCC_SCM 58 |
| 165 | #define MXC_INT_SCC_SMN 57 | 85 | #define MXC_INT_SCC_SMN 57 |
| @@ -167,54 +87,12 @@ | |||
| 167 | #define MXC_INT_USB2 55 | 87 | #define MXC_INT_USB2 55 |
| 168 | #define MXC_INT_USB1 54 | 88 | #define MXC_INT_USB1 54 |
| 169 | #define MXC_INT_VPU 53 | 89 | #define MXC_INT_VPU 53 |
| 170 | #define MXC_INT_EMMAPP 52 | ||
| 171 | #define MXC_INT_EMMAPRP 51 | ||
| 172 | #define MXC_INT_FEC 50 | 90 | #define MXC_INT_FEC 50 |
| 173 | #define MXC_INT_UART5 49 | 91 | #define MXC_INT_UART5 49 |
| 174 | #define MXC_INT_UART6 48 | 92 | #define MXC_INT_UART6 48 |
| 175 | #define MXC_INT_DMACH15 47 | ||
| 176 | #define MXC_INT_DMACH14 46 | ||
| 177 | #define MXC_INT_DMACH13 45 | ||
| 178 | #define MXC_INT_DMACH12 44 | ||
| 179 | #define MXC_INT_DMACH11 43 | ||
| 180 | #define MXC_INT_DMACH10 42 | ||
| 181 | #define MXC_INT_DMACH9 41 | ||
| 182 | #define MXC_INT_DMACH8 40 | ||
| 183 | #define MXC_INT_DMACH7 39 | ||
| 184 | #define MXC_INT_DMACH6 38 | ||
| 185 | #define MXC_INT_DMACH5 37 | ||
| 186 | #define MXC_INT_DMACH4 36 | ||
| 187 | #define MXC_INT_DMACH3 35 | ||
| 188 | #define MXC_INT_DMACH2 34 | ||
| 189 | #define MXC_INT_DMACH1 33 | ||
| 190 | #define MXC_INT_DMACH0 32 | ||
| 191 | #define MXC_INT_CSI 31 | ||
| 192 | #define MXC_INT_ATA 30 | 93 | #define MXC_INT_ATA 30 |
| 193 | #define MXC_INT_NANDFC 29 | ||
| 194 | #define MXC_INT_PCMCIA 28 | ||
| 195 | #define MXC_INT_WDOG 27 | ||
| 196 | #define MXC_INT_GPT1 26 | ||
| 197 | #define MXC_INT_GPT2 25 | ||
| 198 | #define MXC_INT_GPT3 24 | ||
| 199 | #define MXC_INT_GPT INT_GPT1 | ||
| 200 | #define MXC_INT_PWM 23 | ||
| 201 | #define MXC_INT_RTC 22 | ||
| 202 | #define MXC_INT_KPP 21 | ||
| 203 | #define MXC_INT_UART1 20 | ||
| 204 | #define MXC_INT_UART2 19 | ||
| 205 | #define MXC_INT_UART3 18 | ||
| 206 | #define MXC_INT_UART4 17 | ||
| 207 | #define MXC_INT_CSPI1 16 | ||
| 208 | #define MXC_INT_CSPI2 15 | ||
| 209 | #define MXC_INT_SSI1 14 | ||
| 210 | #define MXC_INT_SSI2 13 | ||
| 211 | #define MXC_INT_I2C 12 | ||
| 212 | #define MXC_INT_SDHC1 11 | ||
| 213 | #define MXC_INT_SDHC2 10 | ||
| 214 | #define MXC_INT_SDHC3 9 | 94 | #define MXC_INT_SDHC3 9 |
| 215 | #define MXC_INT_GPIO 8 | ||
| 216 | #define MXC_INT_SDHC 7 | 95 | #define MXC_INT_SDHC 7 |
| 217 | #define MXC_INT_CSPI3 6 | ||
| 218 | #define MXC_INT_RTIC 5 | 96 | #define MXC_INT_RTIC 5 |
| 219 | #define MXC_INT_GPT4 4 | 97 | #define MXC_INT_GPT4 4 |
| 220 | #define MXC_INT_GPT5 3 | 98 | #define MXC_INT_GPT5 3 |
| @@ -228,36 +106,9 @@ | |||
| 228 | #define DMA_REQ_UART6_TX 34 | 106 | #define DMA_REQ_UART6_TX 34 |
| 229 | #define DMA_REQ_UART5_RX 33 | 107 | #define DMA_REQ_UART5_RX 33 |
| 230 | #define DMA_REQ_UART5_TX 32 | 108 | #define DMA_REQ_UART5_TX 32 |
| 231 | #define DMA_REQ_CSI_RX 31 | ||
| 232 | #define DMA_REQ_CSI_STAT 30 | ||
| 233 | #define DMA_REQ_ATA_RCV 29 | 109 | #define DMA_REQ_ATA_RCV 29 |
| 234 | #define DMA_REQ_ATA_TX 28 | 110 | #define DMA_REQ_ATA_TX 28 |
| 235 | #define DMA_REQ_UART1_TX 27 | ||
| 236 | #define DMA_REQ_UART1_RX 26 | ||
| 237 | #define DMA_REQ_UART2_TX 25 | ||
| 238 | #define DMA_REQ_UART2_RX 24 | ||
| 239 | #define DMA_REQ_UART3_TX 23 | ||
| 240 | #define DMA_REQ_UART3_RX 22 | ||
| 241 | #define DMA_REQ_UART4_TX 21 | ||
| 242 | #define DMA_REQ_UART4_RX 20 | ||
| 243 | #define DMA_REQ_CSPI1_TX 19 | ||
| 244 | #define DMA_REQ_CSPI1_RX 18 | ||
| 245 | #define DMA_REQ_CSPI2_TX 17 | ||
| 246 | #define DMA_REQ_CSPI2_RX 16 | ||
| 247 | #define DMA_REQ_SSI1_TX1 15 | ||
| 248 | #define DMA_REQ_SSI1_RX1 14 | ||
| 249 | #define DMA_REQ_SSI1_TX0 13 | ||
| 250 | #define DMA_REQ_SSI1_RX0 12 | ||
| 251 | #define DMA_REQ_SSI2_TX1 11 | ||
| 252 | #define DMA_REQ_SSI2_RX1 10 | ||
| 253 | #define DMA_REQ_SSI2_TX0 9 | ||
| 254 | #define DMA_REQ_SSI2_RX0 8 | ||
| 255 | #define DMA_REQ_SDHC1 7 | ||
| 256 | #define DMA_REQ_SDHC2 6 | ||
| 257 | #define DMA_REQ_MSHC 4 | 111 | #define DMA_REQ_MSHC 4 |
| 258 | #define DMA_REQ_EXT 3 | ||
| 259 | #define DMA_REQ_CSPI3_TX 2 | ||
| 260 | #define DMA_REQ_CSPI3_RX 1 | ||
| 261 | 112 | ||
| 262 | /* silicon revisions specific to i.MX27 */ | 113 | /* silicon revisions specific to i.MX27 */ |
| 263 | #define CHIP_REV_1_0 0x00 | 114 | #define CHIP_REV_1_0 0x00 |
| @@ -267,25 +118,8 @@ | |||
| 267 | extern int mx27_revision(void); | 118 | extern int mx27_revision(void); |
| 268 | #endif | 119 | #endif |
| 269 | 120 | ||
| 270 | /* gpio and gpio based interrupt handling */ | ||
| 271 | #define GPIO_DR 0x1C | ||
| 272 | #define GPIO_GDIR 0x00 | ||
| 273 | #define GPIO_PSR 0x24 | ||
| 274 | #define GPIO_ICR1 0x28 | ||
| 275 | #define GPIO_ICR2 0x2C | ||
| 276 | #define GPIO_IMR 0x30 | ||
| 277 | #define GPIO_ISR 0x34 | ||
| 278 | #define GPIO_INT_LOW_LEV 0x3 | ||
| 279 | #define GPIO_INT_HIGH_LEV 0x2 | ||
| 280 | #define GPIO_INT_RISE_EDGE 0x0 | ||
| 281 | #define GPIO_INT_FALL_EDGE 0x1 | ||
| 282 | #define GPIO_INT_NONE 0x4 | ||
| 283 | |||
| 284 | /* Mandatory defines used globally */ | 121 | /* Mandatory defines used globally */ |
| 285 | 122 | ||
| 286 | /* this is an i.MX27 CPU */ | ||
| 287 | #define cpu_is_mx27() (1) | ||
| 288 | |||
| 289 | /* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */ | 123 | /* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */ |
| 290 | #define ARCH_NR_GPIOS (192 + 16) | 124 | #define ARCH_NR_GPIOS (192 + 16) |
| 291 | 125 | ||
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h new file mode 100644 index 000000000000..fc40d3ab8c5b --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/mx2x.h | |||
| @@ -0,0 +1,200 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
| 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | ||
| 4 | * | ||
| 5 | * This contains hardware definitions that are common between i.MX21 and | ||
| 6 | * i.MX27. | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or | ||
| 9 | * modify it under the terms of the GNU General Public License | ||
| 10 | * as published by the Free Software Foundation; either version 2 | ||
| 11 | * of the License, or (at your option) any later version. | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
| 20 | * MA 02110-1301, USA. | ||
| 21 | */ | ||
| 22 | |||
| 23 | #ifndef __ASM_ARCH_MXC_MX2x_H__ | ||
| 24 | #define __ASM_ARCH_MXC_MX2x_H__ | ||
| 25 | |||
| 26 | #ifndef __ASM_ARCH_MXC_HARDWARE_H__ | ||
| 27 | #error "Do not include directly." | ||
| 28 | #endif | ||
| 29 | |||
| 30 | /* The following addresses are common between i.MX21 and i.MX27 */ | ||
| 31 | |||
| 32 | /* Register offests */ | ||
| 33 | #define AIPI_BASE_ADDR 0x10000000 | ||
| 34 | #define AIPI_BASE_ADDR_VIRT 0xF4000000 | ||
| 35 | #define AIPI_SIZE SZ_1M | ||
| 36 | |||
| 37 | #define DMA_BASE_ADDR (AIPI_BASE_ADDR + 0x01000) | ||
| 38 | #define WDOG_BASE_ADDR (AIPI_BASE_ADDR + 0x02000) | ||
| 39 | #define GPT1_BASE_ADDR (AIPI_BASE_ADDR + 0x03000) | ||
| 40 | #define GPT2_BASE_ADDR (AIPI_BASE_ADDR + 0x04000) | ||
| 41 | #define GPT3_BASE_ADDR (AIPI_BASE_ADDR + 0x05000) | ||
| 42 | #define PWM_BASE_ADDR (AIPI_BASE_ADDR + 0x06000) | ||
| 43 | #define RTC_BASE_ADDR (AIPI_BASE_ADDR + 0x07000) | ||
| 44 | #define KPP_BASE_ADDR (AIPI_BASE_ADDR + 0x08000) | ||
| 45 | #define OWIRE_BASE_ADDR (AIPI_BASE_ADDR + 0x09000) | ||
| 46 | #define UART1_BASE_ADDR (AIPI_BASE_ADDR + 0x0A000) | ||
| 47 | #define UART2_BASE_ADDR (AIPI_BASE_ADDR + 0x0B000) | ||
| 48 | #define UART3_BASE_ADDR (AIPI_BASE_ADDR + 0x0C000) | ||
| 49 | #define UART4_BASE_ADDR (AIPI_BASE_ADDR + 0x0D000) | ||
| 50 | #define CSPI1_BASE_ADDR (AIPI_BASE_ADDR + 0x0E000) | ||
| 51 | #define CSPI2_BASE_ADDR (AIPI_BASE_ADDR + 0x0F000) | ||
| 52 | #define SSI1_BASE_ADDR (AIPI_BASE_ADDR + 0x10000) | ||
| 53 | #define SSI2_BASE_ADDR (AIPI_BASE_ADDR + 0x11000) | ||
| 54 | #define I2C_BASE_ADDR (AIPI_BASE_ADDR + 0x12000) | ||
| 55 | #define SDHC1_BASE_ADDR (AIPI_BASE_ADDR + 0x13000) | ||
| 56 | #define SDHC2_BASE_ADDR (AIPI_BASE_ADDR + 0x14000) | ||
| 57 | #define GPIO_BASE_ADDR (AIPI_BASE_ADDR + 0x15000) | ||
| 58 | #define AUDMUX_BASE_ADDR (AIPI_BASE_ADDR + 0x16000) | ||
| 59 | #define CSPI3_BASE_ADDR (AIPI_BASE_ADDR + 0x17000) | ||
| 60 | #define LCDC_BASE_ADDR (AIPI_BASE_ADDR + 0x21000) | ||
| 61 | #define SLCDC_BASE_ADDR (AIPI_BASE_ADDR + 0x22000) | ||
| 62 | #define USBOTG_BASE_ADDR (AIPI_BASE_ADDR + 0x24000) | ||
| 63 | #define EMMA_PP_BASE_ADDR (AIPI_BASE_ADDR + 0x26000) | ||
| 64 | #define EMMA_PRP_BASE_ADDR (AIPI_BASE_ADDR + 0x26400) | ||
| 65 | #define CCM_BASE_ADDR (AIPI_BASE_ADDR + 0x27000) | ||
| 66 | #define SYSCTRL_BASE_ADDR (AIPI_BASE_ADDR + 0x27800) | ||
| 67 | #define JAM_BASE_ADDR (AIPI_BASE_ADDR + 0x3E000) | ||
| 68 | #define MAX_BASE_ADDR (AIPI_BASE_ADDR + 0x3F000) | ||
| 69 | |||
| 70 | #define AVIC_BASE_ADDR 0x10040000 | ||
| 71 | |||
| 72 | #define SAHB1_BASE_ADDR 0x80000000 | ||
| 73 | #define SAHB1_BASE_ADDR_VIRT 0xF4100000 | ||
| 74 | #define SAHB1_SIZE SZ_1M | ||
| 75 | |||
| 76 | #define CSI_BASE_ADDR (SAHB1_BASE_ADDR + 0x0000) | ||
| 77 | |||
| 78 | /* | ||
| 79 | * This macro defines the physical to virtual address mapping for all the | ||
| 80 | * peripheral modules. It is used by passing in the physical address as x | ||
| 81 | * and returning the virtual address. If the physical address is not mapped, | ||
| 82 | * it returns 0xDEADBEEF | ||
| 83 | */ | ||
| 84 | #define IO_ADDRESS(x) \ | ||
| 85 | (void __force __iomem *) \ | ||
| 86 | (((x >= AIPI_BASE_ADDR) && (x < (AIPI_BASE_ADDR + AIPI_SIZE))) ? \ | ||
| 87 | AIPI_IO_ADDRESS(x) : \ | ||
| 88 | ((x >= SAHB1_BASE_ADDR) && (x < (SAHB1_BASE_ADDR + SAHB1_SIZE))) ? \ | ||
| 89 | SAHB1_IO_ADDRESS(x) : \ | ||
| 90 | ((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? \ | ||
| 91 | X_MEMC_IO_ADDRESS(x) : 0xDEADBEEF) | ||
| 92 | |||
| 93 | /* define the address mapping macros: in physical address order */ | ||
| 94 | #define AIPI_IO_ADDRESS(x) \ | ||
| 95 | (((x) - AIPI_BASE_ADDR) + AIPI_BASE_ADDR_VIRT) | ||
| 96 | |||
| 97 | #define AVIC_IO_ADDRESS(x) AIPI_IO_ADDRESS(x) | ||
| 98 | |||
| 99 | #define SAHB1_IO_ADDRESS(x) \ | ||
| 100 | (((x) - SAHB1_BASE_ADDR) + SAHB1_BASE_ADDR_VIRT) | ||
| 101 | |||
| 102 | #define CS4_IO_ADDRESS(x) \ | ||
| 103 | (((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT) | ||
| 104 | |||
| 105 | #define X_MEMC_IO_ADDRESS(x) \ | ||
| 106 | (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) | ||
| 107 | |||
| 108 | #define PCMCIA_IO_ADDRESS(x) \ | ||
| 109 | (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) | ||
| 110 | |||
| 111 | /* fixed interrupt numbers */ | ||
| 112 | #define MXC_INT_LCDC 61 | ||
| 113 | #define MXC_INT_SLCDC 60 | ||
| 114 | #define MXC_INT_EMMAPP 52 | ||
| 115 | #define MXC_INT_EMMAPRP 51 | ||
| 116 | #define MXC_INT_DMACH15 47 | ||
| 117 | #define MXC_INT_DMACH14 46 | ||
| 118 | #define MXC_INT_DMACH13 45 | ||
| 119 | #define MXC_INT_DMACH12 44 | ||
| 120 | #define MXC_INT_DMACH11 43 | ||
| 121 | #define MXC_INT_DMACH10 42 | ||
| 122 | #define MXC_INT_DMACH9 41 | ||
| 123 | #define MXC_INT_DMACH8 40 | ||
| 124 | #define MXC_INT_DMACH7 39 | ||
| 125 | #define MXC_INT_DMACH6 38 | ||
| 126 | #define MXC_INT_DMACH5 37 | ||
| 127 | #define MXC_INT_DMACH4 36 | ||
| 128 | #define MXC_INT_DMACH3 35 | ||
| 129 | #define MXC_INT_DMACH2 34 | ||
| 130 | #define MXC_INT_DMACH1 33 | ||
| 131 | #define MXC_INT_DMACH0 32 | ||
| 132 | #define MXC_INT_CSI 31 | ||
| 133 | #define MXC_INT_NANDFC 29 | ||
| 134 | #define MXC_INT_PCMCIA 28 | ||
| 135 | #define MXC_INT_WDOG 27 | ||
| 136 | #define MXC_INT_GPT1 26 | ||
| 137 | #define MXC_INT_GPT2 25 | ||
| 138 | #define MXC_INT_GPT3 24 | ||
| 139 | #define MXC_INT_GPT INT_GPT1 | ||
| 140 | #define MXC_INT_PWM 23 | ||
| 141 | #define MXC_INT_RTC 22 | ||
| 142 | #define MXC_INT_KPP 21 | ||
| 143 | #define MXC_INT_UART1 20 | ||
| 144 | #define MXC_INT_UART2 19 | ||
| 145 | #define MXC_INT_UART3 18 | ||
| 146 | #define MXC_INT_UART4 17 | ||
| 147 | #define MXC_INT_CSPI1 16 | ||
| 148 | #define MXC_INT_CSPI2 15 | ||
| 149 | #define MXC_INT_SSI1 14 | ||
| 150 | #define MXC_INT_SSI2 13 | ||
| 151 | #define MXC_INT_I2C 12 | ||
| 152 | #define MXC_INT_SDHC1 11 | ||
| 153 | #define MXC_INT_SDHC2 10 | ||
| 154 | #define MXC_INT_GPIO 8 | ||
| 155 | #define MXC_INT_CSPI3 6 | ||
| 156 | |||
| 157 | /* gpio and gpio based interrupt handling */ | ||
| 158 | #define GPIO_DR 0x1C | ||
| 159 | #define GPIO_GDIR 0x00 | ||
| 160 | #define GPIO_PSR 0x24 | ||
| 161 | #define GPIO_ICR1 0x28 | ||
| 162 | #define GPIO_ICR2 0x2C | ||
| 163 | #define GPIO_IMR 0x30 | ||
| 164 | #define GPIO_ISR 0x34 | ||
| 165 | #define GPIO_INT_LOW_LEV 0x3 | ||
| 166 | #define GPIO_INT_HIGH_LEV 0x2 | ||
| 167 | #define GPIO_INT_RISE_EDGE 0x0 | ||
| 168 | #define GPIO_INT_FALL_EDGE 0x1 | ||
| 169 | #define GPIO_INT_NONE 0x4 | ||
| 170 | |||
| 171 | /* fixed DMA request numbers */ | ||
| 172 | #define DMA_REQ_CSI_RX 31 | ||
| 173 | #define DMA_REQ_CSI_STAT 30 | ||
| 174 | #define DMA_REQ_UART1_TX 27 | ||
| 175 | #define DMA_REQ_UART1_RX 26 | ||
| 176 | #define DMA_REQ_UART2_TX 25 | ||
| 177 | #define DMA_REQ_UART2_RX 24 | ||
| 178 | #define DMA_REQ_UART3_TX 23 | ||
| 179 | #define DMA_REQ_UART3_RX 22 | ||
| 180 | #define DMA_REQ_UART4_TX 21 | ||
| 181 | #define DMA_REQ_UART4_RX 20 | ||
| 182 | #define DMA_REQ_CSPI1_TX 19 | ||
| 183 | #define DMA_REQ_CSPI1_RX 18 | ||
| 184 | #define DMA_REQ_CSPI2_TX 17 | ||
| 185 | #define DMA_REQ_CSPI2_RX 16 | ||
| 186 | #define DMA_REQ_SSI1_TX1 15 | ||
| 187 | #define DMA_REQ_SSI1_RX1 14 | ||
| 188 | #define DMA_REQ_SSI1_TX0 13 | ||
| 189 | #define DMA_REQ_SSI1_RX0 12 | ||
| 190 | #define DMA_REQ_SSI2_TX1 11 | ||
| 191 | #define DMA_REQ_SSI2_RX1 10 | ||
| 192 | #define DMA_REQ_SSI2_TX0 9 | ||
| 193 | #define DMA_REQ_SSI2_RX0 8 | ||
| 194 | #define DMA_REQ_SDHC1 7 | ||
| 195 | #define DMA_REQ_SDHC2 6 | ||
| 196 | #define DMA_REQ_EXT 3 | ||
| 197 | #define DMA_REQ_CSPI3_TX 2 | ||
| 198 | #define DMA_REQ_CSPI3_RX 1 | ||
| 199 | |||
| 200 | #endif /* __ASM_ARCH_MXC_MX2x_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index de026654b00e..0b06941b6139 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h | |||
| @@ -1,360 +1,45 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
| 3 | */ | ||
| 4 | |||
| 5 | /* | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __ASM_ARCH_MXC_MX31_H__ | ||
| 12 | #define __ASM_ARCH_MXC_MX31_H__ | ||
| 13 | |||
| 14 | #ifndef __ASM_ARCH_MXC_HARDWARE_H__ | ||
| 15 | #error "Do not include directly." | ||
| 16 | #endif | ||
| 17 | |||
| 18 | /* | ||
| 19 | * MX31 memory map: | ||
| 20 | * | ||
| 21 | * Virt Phys Size What | ||
| 22 | * --------------------------------------------------------------------------- | ||
| 23 | * F8000000 1FFC0000 16K IRAM | ||
| 24 | * F9000000 30000000 256M L2CC | ||
| 25 | * FC000000 43F00000 1M AIPS 1 | ||
| 26 | * FC100000 50000000 1M SPBA | ||
| 27 | * FC200000 53F00000 1M AIPS 2 | ||
| 28 | * FC500000 60000000 128M ROMPATCH | ||
| 29 | * FC400000 68000000 128M AVIC | ||
| 30 | * 70000000 256M IPU (MAX M2) | ||
| 31 | * 80000000 256M CSD0 SDRAM/DDR | ||
| 32 | * 90000000 256M CSD1 SDRAM/DDR | ||
| 33 | * A0000000 128M CS0 Flash | ||
| 34 | * A8000000 128M CS1 Flash | ||
| 35 | * B0000000 32M CS2 | ||
| 36 | * B2000000 32M CS3 | ||
| 37 | * F4000000 B4000000 32M CS4 | ||
| 38 | * B6000000 32M CS5 | ||
| 39 | * FC320000 B8000000 64K NAND, SDRAM, WEIM, M3IF, EMI controllers | ||
| 40 | * C0000000 64M PCMCIA/CF | ||
| 41 | */ | ||
| 42 | |||
| 43 | #define CS0_BASE_ADDR 0xA0000000 | ||
| 44 | #define CS1_BASE_ADDR 0xA8000000 | ||
| 45 | #define CS2_BASE_ADDR 0xB0000000 | ||
| 46 | #define CS3_BASE_ADDR 0xB2000000 | ||
| 47 | |||
| 48 | #define CS4_BASE_ADDR 0xB4000000 | ||
| 49 | #define CS4_BASE_ADDR_VIRT 0xF4000000 | ||
| 50 | #define CS4_SIZE SZ_32M | ||
| 51 | |||
| 52 | #define CS5_BASE_ADDR 0xB6000000 | ||
| 53 | #define PCMCIA_MEM_BASE_ADDR 0xBC000000 | ||
| 54 | |||
| 55 | /* | ||
| 56 | * IRAM | 2 | * IRAM |
| 57 | */ | 3 | */ |
| 58 | #define IRAM_BASE_ADDR 0x1FFC0000 /* internal ram */ | 4 | #define MX31_IRAM_BASE_ADDR 0x1FFC0000 /* internal ram */ |
| 59 | #define IRAM_BASE_ADDR_VIRT 0xF8000000 | 5 | #define MX31_IRAM_SIZE SZ_16K |
| 60 | #define IRAM_SIZE SZ_16K | ||
| 61 | |||
| 62 | /* | ||
| 63 | * L2CC | ||
| 64 | */ | ||
| 65 | #define L2CC_BASE_ADDR 0x30000000 | ||
| 66 | #define L2CC_BASE_ADDR_VIRT 0xF9000000 | ||
| 67 | #define L2CC_SIZE SZ_1M | ||
| 68 | |||
| 69 | /* | ||
| 70 | * AIPS 1 | ||
| 71 | */ | ||
| 72 | #define AIPS1_BASE_ADDR 0x43F00000 | ||
| 73 | #define AIPS1_BASE_ADDR_VIRT 0xFC000000 | ||
| 74 | #define AIPS1_SIZE SZ_1M | ||
| 75 | 6 | ||
| 76 | #define MAX_BASE_ADDR (AIPS1_BASE_ADDR + 0x00004000) | ||
| 77 | #define EVTMON_BASE_ADDR (AIPS1_BASE_ADDR + 0x00008000) | ||
| 78 | #define CLKCTL_BASE_ADDR (AIPS1_BASE_ADDR + 0x0000C000) | ||
| 79 | #define ETB_SLOT4_BASE_ADDR (AIPS1_BASE_ADDR + 0x00010000) | ||
| 80 | #define ETB_SLOT5_BASE_ADDR (AIPS1_BASE_ADDR + 0x00014000) | ||
| 81 | #define ECT_CTIO_BASE_ADDR (AIPS1_BASE_ADDR + 0x00018000) | ||
| 82 | #define I2C_BASE_ADDR (AIPS1_BASE_ADDR + 0x00080000) | ||
| 83 | #define I2C3_BASE_ADDR (AIPS1_BASE_ADDR + 0x00084000) | ||
| 84 | #define OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) | 7 | #define OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) |
| 85 | #define ATA_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000) | 8 | #define ATA_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000) |
| 86 | #define UART1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00090000) | ||
| 87 | #define UART2_BASE_ADDR (AIPS1_BASE_ADDR + 0x00094000) | ||
| 88 | #define I2C2_BASE_ADDR (AIPS1_BASE_ADDR + 0x00098000) | ||
| 89 | #define OWIRE_BASE_ADDR (AIPS1_BASE_ADDR + 0x0009C000) | ||
| 90 | #define SSI1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A0000) | ||
| 91 | #define CSPI1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A4000) | ||
| 92 | #define KPP_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A8000) | ||
| 93 | #define IOMUXC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000AC000) | ||
| 94 | #define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000) | 9 | #define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000) |
| 95 | #define UART5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000) | 10 | #define UART5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000) |
| 96 | #define ECT_IP1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B8000) | ||
| 97 | #define ECT_IP2_BASE_ADDR (AIPS1_BASE_ADDR + 0x000BC000) | ||
| 98 | |||
| 99 | /* | ||
| 100 | * SPBA global module enabled #0 | ||
| 101 | */ | ||
| 102 | #define SPBA0_BASE_ADDR 0x50000000 | ||
| 103 | #define SPBA0_BASE_ADDR_VIRT 0xFC100000 | ||
| 104 | #define SPBA0_SIZE SZ_1M | ||
| 105 | 11 | ||
| 106 | #define MMC_SDHC1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00004000) | 12 | #define MMC_SDHC1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00004000) |
| 107 | #define MMC_SDHC2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00008000) | 13 | #define MMC_SDHC2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00008000) |
| 108 | #define UART3_BASE_ADDR (SPBA0_BASE_ADDR + 0x0000C000) | ||
| 109 | #define CSPI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00010000) | ||
| 110 | #define SSI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00014000) | ||
| 111 | #define SIM1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00018000) | 14 | #define SIM1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00018000) |
| 112 | #define IIM_BASE_ADDR (SPBA0_BASE_ADDR + 0x0001C000) | 15 | #define IIM_BASE_ADDR (SPBA0_BASE_ADDR + 0x0001C000) |
| 113 | #define ATA_DMA_BASE_ADDR (SPBA0_BASE_ADDR + 0x00020000) | ||
| 114 | #define MSHC1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00024000) | ||
| 115 | #define MSHC2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00024000) | ||
| 116 | #define SPBA_CTRL_BASE_ADDR (SPBA0_BASE_ADDR + 0x0003C000) | ||
| 117 | 16 | ||
| 118 | /* | ||
| 119 | * AIPS 2 | ||
| 120 | */ | ||
| 121 | #define AIPS2_BASE_ADDR 0x53F00000 | ||
| 122 | #define AIPS2_BASE_ADDR_VIRT 0xFC200000 | ||
| 123 | #define AIPS2_SIZE SZ_1M | ||
| 124 | #define CCM_BASE_ADDR (AIPS2_BASE_ADDR + 0x00080000) | ||
| 125 | #define CSPI3_BASE_ADDR (AIPS2_BASE_ADDR + 0x00084000) | 17 | #define CSPI3_BASE_ADDR (AIPS2_BASE_ADDR + 0x00084000) |
| 126 | #define FIRI_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008C000) | 18 | #define FIRI_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008C000) |
| 127 | #define GPT1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00090000) | ||
| 128 | #define EPIT1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00094000) | ||
| 129 | #define EPIT2_BASE_ADDR (AIPS2_BASE_ADDR + 0x00098000) | ||
| 130 | #define GPIO3_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A4000) | ||
| 131 | #define SCC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AC000) | ||
| 132 | #define SCM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AE000) | 19 | #define SCM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AE000) |
| 133 | #define SMN_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AF000) | 20 | #define SMN_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AF000) |
| 134 | #define RNGA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B0000) | ||
| 135 | #define IPU_CTRL_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C0000) | ||
| 136 | #define AUDMUX_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C4000) | ||
| 137 | #define MPEG4_ENC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C8000) | 21 | #define MPEG4_ENC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C8000) |
| 138 | #define GPIO1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000CC000) | ||
| 139 | #define GPIO2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D0000) | ||
| 140 | #define SDMA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D4000) | ||
| 141 | #define RTC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) | ||
| 142 | #define WDOG_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DC000) | ||
| 143 | #define PWM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E0000) | ||
| 144 | #define RTIC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000EC000) | ||
| 145 | |||
| 146 | /* | ||
| 147 | * ROMP and AVIC | ||
| 148 | */ | ||
| 149 | #define ROMP_BASE_ADDR 0x60000000 | ||
| 150 | #define ROMP_BASE_ADDR_VIRT 0xFC500000 | ||
| 151 | #define ROMP_SIZE SZ_1M | ||
| 152 | |||
| 153 | #define AVIC_BASE_ADDR 0x68000000 | ||
| 154 | #define AVIC_BASE_ADDR_VIRT 0xFC400000 | ||
| 155 | #define AVIC_SIZE SZ_1M | ||
| 156 | |||
| 157 | /* | ||
| 158 | * NAND, SDRAM, WEIM, M3IF, EMI controllers | ||
| 159 | */ | ||
| 160 | #define X_MEMC_BASE_ADDR 0xB8000000 | ||
| 161 | #define X_MEMC_BASE_ADDR_VIRT 0xFC320000 | ||
| 162 | #define X_MEMC_SIZE SZ_64K | ||
| 163 | 22 | ||
| 164 | #define NFC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x0000) | 23 | #define MX31_NFC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x0000) |
| 165 | #define ESDCTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x1000) | ||
| 166 | #define WEIM_BASE_ADDR (X_MEMC_BASE_ADDR + 0x2000) | ||
| 167 | #define M3IF_BASE_ADDR (X_MEMC_BASE_ADDR + 0x3000) | ||
| 168 | #define EMI_CTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x4000) | ||
| 169 | #define PCMCIA_CTL_BASE_ADDR EMI_CTL_BASE_ADDR | ||
| 170 | 24 | ||
| 171 | /* | ||
| 172 | * Memory regions and CS | ||
| 173 | */ | ||
| 174 | #define IPU_MEM_BASE_ADDR 0x70000000 | ||
| 175 | #define CSD0_BASE_ADDR 0x80000000 | ||
| 176 | #define CSD1_BASE_ADDR 0x90000000 | ||
| 177 | #define CS0_BASE_ADDR 0xA0000000 | ||
| 178 | #define CS1_BASE_ADDR 0xA8000000 | ||
| 179 | #define CS2_BASE_ADDR 0xB0000000 | ||
| 180 | #define CS3_BASE_ADDR 0xB2000000 | ||
| 181 | |||
| 182 | #define CS4_BASE_ADDR 0xB4000000 | ||
| 183 | #define CS4_BASE_ADDR_VIRT 0xF4000000 | ||
| 184 | #define CS4_SIZE SZ_32M | ||
| 185 | |||
| 186 | #define CS5_BASE_ADDR 0xB6000000 | ||
| 187 | #define PCMCIA_MEM_BASE_ADDR 0xBC000000 | ||
| 188 | |||
| 189 | /*! | ||
| 190 | * This macro defines the physical to virtual address mapping for all the | ||
| 191 | * peripheral modules. It is used by passing in the physical address as x | ||
| 192 | * and returning the virtual address. If the physical address is not mapped, | ||
| 193 | * it returns 0xDEADBEEF | ||
| 194 | */ | ||
| 195 | #define IO_ADDRESS(x) \ | ||
| 196 | (void __iomem *) \ | ||
| 197 | (((x >= IRAM_BASE_ADDR) && (x < (IRAM_BASE_ADDR + IRAM_SIZE))) ? IRAM_IO_ADDRESS(x):\ | ||
| 198 | ((x >= L2CC_BASE_ADDR) && (x < (L2CC_BASE_ADDR + L2CC_SIZE))) ? L2CC_IO_ADDRESS(x):\ | ||
| 199 | ((x >= AIPS1_BASE_ADDR) && (x < (AIPS1_BASE_ADDR + AIPS1_SIZE))) ? AIPS1_IO_ADDRESS(x):\ | ||
| 200 | ((x >= SPBA0_BASE_ADDR) && (x < (SPBA0_BASE_ADDR + SPBA0_SIZE))) ? SPBA0_IO_ADDRESS(x):\ | ||
| 201 | ((x >= AIPS2_BASE_ADDR) && (x < (AIPS2_BASE_ADDR + AIPS2_SIZE))) ? AIPS2_IO_ADDRESS(x):\ | ||
| 202 | ((x >= ROMP_BASE_ADDR) && (x < (ROMP_BASE_ADDR + ROMP_SIZE))) ? ROMP_IO_ADDRESS(x):\ | ||
| 203 | ((x >= AVIC_BASE_ADDR) && (x < (AVIC_BASE_ADDR + AVIC_SIZE))) ? AVIC_IO_ADDRESS(x):\ | ||
| 204 | ((x >= CS4_BASE_ADDR) && (x < (CS4_BASE_ADDR + CS4_SIZE))) ? CS4_IO_ADDRESS(x):\ | ||
| 205 | ((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? X_MEMC_IO_ADDRESS(x):\ | ||
| 206 | 0xDEADBEEF) | ||
| 207 | |||
| 208 | /* | ||
| 209 | * define the address mapping macros: in physical address order | ||
| 210 | */ | ||
| 211 | |||
| 212 | #define IRAM_IO_ADDRESS(x) \ | ||
| 213 | (((x) - IRAM_BASE_ADDR) + IRAM_BASE_ADDR_VIRT) | ||
| 214 | |||
| 215 | #define L2CC_IO_ADDRESS(x) \ | ||
| 216 | (((x) - L2CC_BASE_ADDR) + L2CC_BASE_ADDR_VIRT) | ||
| 217 | |||
| 218 | #define AIPS1_IO_ADDRESS(x) \ | ||
| 219 | (((x) - AIPS1_BASE_ADDR) + AIPS1_BASE_ADDR_VIRT) | ||
| 220 | |||
| 221 | #define SPBA0_IO_ADDRESS(x) \ | ||
| 222 | (((x) - SPBA0_BASE_ADDR) + SPBA0_BASE_ADDR_VIRT) | ||
| 223 | |||
| 224 | #define AIPS2_IO_ADDRESS(x) \ | ||
| 225 | (((x) - AIPS2_BASE_ADDR) + AIPS2_BASE_ADDR_VIRT) | ||
| 226 | |||
| 227 | #define ROMP_IO_ADDRESS(x) \ | ||
| 228 | (((x) - ROMP_BASE_ADDR) + ROMP_BASE_ADDR_VIRT) | ||
| 229 | |||
| 230 | #define AVIC_IO_ADDRESS(x) \ | ||
| 231 | (((x) - AVIC_BASE_ADDR) + AVIC_BASE_ADDR_VIRT) | ||
| 232 | |||
| 233 | #define CS4_IO_ADDRESS(x) \ | ||
| 234 | (((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT) | ||
| 235 | |||
| 236 | #define X_MEMC_IO_ADDRESS(x) \ | ||
| 237 | (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) | ||
| 238 | |||
| 239 | #define PCMCIA_IO_ADDRESS(x) \ | ||
| 240 | (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) | ||
| 241 | |||
| 242 | /* | ||
| 243 | * Interrupt numbers | ||
| 244 | */ | ||
| 245 | #define MXC_INT_PEN_ADS7843 0 | ||
| 246 | #define MXC_INT_RESV1 1 | ||
| 247 | #define MXC_INT_CS8900A 2 | ||
| 248 | #define MXC_INT_I2C3 3 | ||
| 249 | #define MXC_INT_I2C2 4 | ||
| 250 | #define MXC_INT_MPEG4_ENCODER 5 | 25 | #define MXC_INT_MPEG4_ENCODER 5 |
| 251 | #define MXC_INT_RTIC 6 | ||
| 252 | #define MXC_INT_FIRI 7 | 26 | #define MXC_INT_FIRI 7 |
| 253 | #define MXC_INT_MMC_SDHC2 8 | 27 | #define MX31_INT_MMC_SDHC2 8 |
| 254 | #define MXC_INT_MMC_SDHC1 9 | 28 | #define MXC_INT_MMC_SDHC1 9 |
| 255 | #define MXC_INT_I2C 10 | 29 | #define MX31_INT_SSI2 11 |
| 256 | #define MXC_INT_SSI2 11 | 30 | #define MX31_INT_SSI1 12 |
| 257 | #define MXC_INT_SSI1 12 | ||
| 258 | #define MXC_INT_CSPI2 13 | ||
| 259 | #define MXC_INT_CSPI1 14 | ||
| 260 | #define MXC_INT_ATA 15 | ||
| 261 | #define MXC_INT_MBX 16 | 31 | #define MXC_INT_MBX 16 |
| 262 | #define MXC_INT_CSPI3 17 | 32 | #define MXC_INT_CSPI3 17 |
| 263 | #define MXC_INT_UART3 18 | ||
| 264 | #define MXC_INT_IIM 19 | ||
| 265 | #define MXC_INT_SIM2 20 | 33 | #define MXC_INT_SIM2 20 |
| 266 | #define MXC_INT_SIM1 21 | 34 | #define MXC_INT_SIM1 21 |
| 267 | #define MXC_INT_RNGA 22 | 35 | #define MXC_INT_CCM_DVFS 31 |
| 268 | #define MXC_INT_EVTMON 23 | ||
| 269 | #define MXC_INT_KPP 24 | ||
| 270 | #define MXC_INT_RTC 25 | ||
| 271 | #define MXC_INT_PWM 26 | ||
| 272 | #define MXC_INT_EPIT2 27 | ||
| 273 | #define MXC_INT_EPIT1 28 | ||
| 274 | #define MXC_INT_GPT 29 | ||
| 275 | #define MXC_INT_RESV30 30 | ||
| 276 | #define MXC_INT_RESV31 31 | ||
| 277 | #define MXC_INT_UART2 32 | ||
| 278 | #define MXC_INT_NANDFC 33 | ||
| 279 | #define MXC_INT_SDMA 34 | ||
| 280 | #define MXC_INT_USB1 35 | 36 | #define MXC_INT_USB1 35 |
| 281 | #define MXC_INT_USB2 36 | 37 | #define MXC_INT_USB2 36 |
| 282 | #define MXC_INT_USB3 37 | 38 | #define MXC_INT_USB3 37 |
| 283 | #define MXC_INT_USB4 38 | 39 | #define MXC_INT_USB4 38 |
| 284 | #define MXC_INT_MSHC1 39 | ||
| 285 | #define MXC_INT_MSHC2 40 | 40 | #define MXC_INT_MSHC2 40 |
| 286 | #define MXC_INT_IPU_ERR 41 | ||
| 287 | #define MXC_INT_IPU_SYN 42 | ||
| 288 | #define MXC_INT_RESV43 43 | ||
| 289 | #define MXC_INT_RESV44 44 | ||
| 290 | #define MXC_INT_UART1 45 | ||
| 291 | #define MXC_INT_UART4 46 | 41 | #define MXC_INT_UART4 46 |
| 292 | #define MXC_INT_UART5 47 | 42 | #define MXC_INT_UART5 47 |
| 293 | #define MXC_INT_ECT 48 | ||
| 294 | #define MXC_INT_SCC_SCM 49 | ||
| 295 | #define MXC_INT_SCC_SMN 50 | ||
| 296 | #define MXC_INT_GPIO2 51 | ||
| 297 | #define MXC_INT_GPIO1 52 | ||
| 298 | #define MXC_INT_CCM 53 | 43 | #define MXC_INT_CCM 53 |
| 299 | #define MXC_INT_PCMCIA 54 | 44 | #define MXC_INT_PCMCIA 54 |
| 300 | #define MXC_INT_WDOG 55 | ||
| 301 | #define MXC_INT_GPIO3 56 | ||
| 302 | #define MXC_INT_RESV57 57 | ||
| 303 | #define MXC_INT_EXT_POWER 58 | ||
| 304 | #define MXC_INT_EXT_TEMPER 59 | ||
| 305 | #define MXC_INT_EXT_SENSOR60 60 | ||
| 306 | #define MXC_INT_EXT_SENSOR61 61 | ||
| 307 | #define MXC_INT_EXT_WDOG 62 | ||
| 308 | #define MXC_INT_EXT_TV 63 | ||
| 309 | |||
| 310 | #define PROD_SIGNATURE 0x1 /* For MX31 */ | ||
| 311 | |||
| 312 | /* silicon revisions specific to i.MX31 */ | ||
| 313 | #define CHIP_REV_1_0 0x10 | ||
| 314 | #define CHIP_REV_1_1 0x11 | ||
| 315 | #define CHIP_REV_1_2 0x12 | ||
| 316 | #define CHIP_REV_1_3 0x13 | ||
| 317 | #define CHIP_REV_2_0 0x20 | ||
| 318 | #define CHIP_REV_2_1 0x21 | ||
| 319 | #define CHIP_REV_2_2 0x22 | ||
| 320 | #define CHIP_REV_2_3 0x23 | ||
| 321 | #define CHIP_REV_3_0 0x30 | ||
| 322 | #define CHIP_REV_3_1 0x31 | ||
| 323 | #define CHIP_REV_3_2 0x32 | ||
| 324 | |||
| 325 | #define SYSTEM_REV_MIN CHIP_REV_1_0 | ||
| 326 | #define SYSTEM_REV_NUM 3 | ||
| 327 | |||
| 328 | /* gpio and gpio based interrupt handling */ | ||
| 329 | #define GPIO_DR 0x00 | ||
| 330 | #define GPIO_GDIR 0x04 | ||
| 331 | #define GPIO_PSR 0x08 | ||
| 332 | #define GPIO_ICR1 0x0C | ||
| 333 | #define GPIO_ICR2 0x10 | ||
| 334 | #define GPIO_IMR 0x14 | ||
| 335 | #define GPIO_ISR 0x18 | ||
| 336 | #define GPIO_INT_LOW_LEV 0x0 | ||
| 337 | #define GPIO_INT_HIGH_LEV 0x1 | ||
| 338 | #define GPIO_INT_RISE_EDGE 0x2 | ||
| 339 | #define GPIO_INT_FALL_EDGE 0x3 | ||
| 340 | #define GPIO_INT_NONE 0x4 | ||
| 341 | |||
| 342 | /* Mandatory defines used globally */ | ||
| 343 | |||
| 344 | /* this CPU supports up to 96 GPIOs */ | ||
| 345 | #define ARCH_NR_GPIOS 96 | ||
| 346 | |||
| 347 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) | ||
| 348 | |||
| 349 | /* this is a i.MX31 CPU */ | ||
| 350 | #define cpu_is_mx31() (1) | ||
| 351 | |||
| 352 | extern unsigned int system_rev; | ||
| 353 | |||
| 354 | static inline int mx31_revision(void) | ||
| 355 | { | ||
| 356 | return system_rev; | ||
| 357 | } | ||
| 358 | #endif | ||
| 359 | 45 | ||
| 360 | #endif /* __ASM_ARCH_MXC_MX31_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h new file mode 100644 index 000000000000..6465fefb42e3 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/mx35.h | |||
| @@ -0,0 +1,29 @@ | |||
| 1 | /* | ||
| 2 | * IRAM | ||
| 3 | */ | ||
| 4 | #define MX35_IRAM_BASE_ADDR 0x10000000 /* internal ram */ | ||
| 5 | #define MX35_IRAM_SIZE SZ_128K | ||
| 6 | |||
| 7 | #define MXC_FEC_BASE_ADDR 0x50038000 | ||
| 8 | #define MX35_NFC_BASE_ADDR 0xBB000000 | ||
| 9 | |||
| 10 | /* | ||
| 11 | * Interrupt numbers | ||
| 12 | */ | ||
| 13 | #define MXC_INT_OWIRE 2 | ||
| 14 | #define MX35_INT_MMC_SDHC1 7 | ||
| 15 | #define MXC_INT_MMC_SDHC2 8 | ||
| 16 | #define MXC_INT_MMC_SDHC3 9 | ||
| 17 | #define MX35_INT_SSI1 11 | ||
| 18 | #define MX35_INT_SSI2 12 | ||
| 19 | #define MXC_INT_GPU2D 16 | ||
| 20 | #define MXC_INT_ASRC 17 | ||
| 21 | #define MXC_INT_USBHS 35 | ||
| 22 | #define MXC_INT_USBOTG 37 | ||
| 23 | #define MXC_INT_ESAI 40 | ||
| 24 | #define MXC_INT_CAN1 43 | ||
| 25 | #define MXC_INT_CAN2 44 | ||
| 26 | #define MXC_INT_MLB 46 | ||
| 27 | #define MXC_INT_SPDIF 47 | ||
| 28 | #define MXC_INT_FEC 57 | ||
| 29 | |||
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h new file mode 100644 index 000000000000..3878c6085d5c --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/mx3x.h | |||
| @@ -0,0 +1,290 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
| 3 | */ | ||
| 4 | |||
| 5 | /* | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __ASM_ARCH_MXC_MX31_H__ | ||
| 12 | #define __ASM_ARCH_MXC_MX31_H__ | ||
| 13 | |||
| 14 | #ifndef __ASM_ARCH_MXC_HARDWARE_H__ | ||
| 15 | #error "Do not include directly." | ||
| 16 | #endif | ||
| 17 | |||
| 18 | /* | ||
| 19 | * MX31 memory map: | ||
| 20 | * | ||
| 21 | * Virt Phys Size What | ||
| 22 | * --------------------------------------------------------------------------- | ||
| 23 | * FC000000 43F00000 1M AIPS 1 | ||
| 24 | * FC100000 50000000 1M SPBA | ||
| 25 | * FC200000 53F00000 1M AIPS 2 | ||
| 26 | * FC500000 60000000 128M ROMPATCH | ||
| 27 | * FC400000 68000000 128M AVIC | ||
| 28 | * 70000000 256M IPU (MAX M2) | ||
| 29 | * 80000000 256M CSD0 SDRAM/DDR | ||
| 30 | * 90000000 256M CSD1 SDRAM/DDR | ||
| 31 | * A0000000 128M CS0 Flash | ||
| 32 | * A8000000 128M CS1 Flash | ||
| 33 | * B0000000 32M CS2 | ||
| 34 | * B2000000 32M CS3 | ||
| 35 | * F4000000 B4000000 32M CS4 | ||
| 36 | * B6000000 32M CS5 | ||
| 37 | * FC320000 B8000000 64K NAND, SDRAM, WEIM, M3IF, EMI controllers | ||
| 38 | * C0000000 64M PCMCIA/CF | ||
| 39 | */ | ||
| 40 | |||
| 41 | #define CS0_BASE_ADDR 0xA0000000 | ||
| 42 | #define CS1_BASE_ADDR 0xA8000000 | ||
| 43 | #define CS2_BASE_ADDR 0xB0000000 | ||
| 44 | #define CS3_BASE_ADDR 0xB2000000 | ||
| 45 | |||
| 46 | #define CS4_BASE_ADDR 0xB4000000 | ||
| 47 | #define CS4_BASE_ADDR_VIRT 0xF4000000 | ||
| 48 | #define CS4_SIZE SZ_32M | ||
| 49 | |||
| 50 | #define CS5_BASE_ADDR 0xB6000000 | ||
| 51 | #define PCMCIA_MEM_BASE_ADDR 0xBC000000 | ||
| 52 | |||
| 53 | /* | ||
| 54 | * L2CC | ||
| 55 | */ | ||
| 56 | #define L2CC_BASE_ADDR 0x30000000 | ||
| 57 | #define L2CC_SIZE SZ_1M | ||
| 58 | |||
| 59 | /* | ||
| 60 | * AIPS 1 | ||
| 61 | */ | ||
| 62 | #define AIPS1_BASE_ADDR 0x43F00000 | ||
| 63 | #define AIPS1_BASE_ADDR_VIRT 0xFC000000 | ||
| 64 | #define AIPS1_SIZE SZ_1M | ||
| 65 | |||
| 66 | #define MAX_BASE_ADDR (AIPS1_BASE_ADDR + 0x00004000) | ||
| 67 | #define EVTMON_BASE_ADDR (AIPS1_BASE_ADDR + 0x00008000) | ||
| 68 | #define CLKCTL_BASE_ADDR (AIPS1_BASE_ADDR + 0x0000C000) | ||
| 69 | #define ETB_SLOT4_BASE_ADDR (AIPS1_BASE_ADDR + 0x00010000) | ||
| 70 | #define ETB_SLOT5_BASE_ADDR (AIPS1_BASE_ADDR + 0x00014000) | ||
| 71 | #define ECT_CTIO_BASE_ADDR (AIPS1_BASE_ADDR + 0x00018000) | ||
| 72 | #define I2C_BASE_ADDR (AIPS1_BASE_ADDR + 0x00080000) | ||
| 73 | #define I2C3_BASE_ADDR (AIPS1_BASE_ADDR + 0x00084000) | ||
| 74 | #define UART1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00090000) | ||
| 75 | #define UART2_BASE_ADDR (AIPS1_BASE_ADDR + 0x00094000) | ||
| 76 | #define I2C2_BASE_ADDR (AIPS1_BASE_ADDR + 0x00098000) | ||
| 77 | #define OWIRE_BASE_ADDR (AIPS1_BASE_ADDR + 0x0009C000) | ||
| 78 | #define SSI1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A0000) | ||
| 79 | #define CSPI1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A4000) | ||
| 80 | #define KPP_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A8000) | ||
| 81 | #define IOMUXC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000AC000) | ||
| 82 | #define ECT_IP1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B8000) | ||
| 83 | #define ECT_IP2_BASE_ADDR (AIPS1_BASE_ADDR + 0x000BC000) | ||
| 84 | |||
| 85 | /* | ||
| 86 | * SPBA global module enabled #0 | ||
| 87 | */ | ||
| 88 | #define SPBA0_BASE_ADDR 0x50000000 | ||
| 89 | #define SPBA0_BASE_ADDR_VIRT 0xFC100000 | ||
| 90 | #define SPBA0_SIZE SZ_1M | ||
| 91 | |||
| 92 | #define UART3_BASE_ADDR (SPBA0_BASE_ADDR + 0x0000C000) | ||
| 93 | #define CSPI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00010000) | ||
| 94 | #define SSI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00014000) | ||
| 95 | #define ATA_DMA_BASE_ADDR (SPBA0_BASE_ADDR + 0x00020000) | ||
| 96 | #define MSHC1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00024000) | ||
| 97 | #define SPBA_CTRL_BASE_ADDR (SPBA0_BASE_ADDR + 0x0003C000) | ||
| 98 | |||
| 99 | /* | ||
| 100 | * AIPS 2 | ||
| 101 | */ | ||
| 102 | #define AIPS2_BASE_ADDR 0x53F00000 | ||
| 103 | #define AIPS2_BASE_ADDR_VIRT 0xFC200000 | ||
| 104 | #define AIPS2_SIZE SZ_1M | ||
| 105 | #define CCM_BASE_ADDR (AIPS2_BASE_ADDR + 0x00080000) | ||
| 106 | #define GPT1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00090000) | ||
| 107 | #define EPIT1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00094000) | ||
| 108 | #define EPIT2_BASE_ADDR (AIPS2_BASE_ADDR + 0x00098000) | ||
| 109 | #define GPIO3_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A4000) | ||
| 110 | #define SCC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AC000) | ||
| 111 | #define RNGA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B0000) | ||
| 112 | #define IPU_CTRL_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C0000) | ||
| 113 | #define AUDMUX_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C4000) | ||
| 114 | #define GPIO1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000CC000) | ||
| 115 | #define GPIO2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D0000) | ||
| 116 | #define SDMA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D4000) | ||
| 117 | #define RTC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) | ||
| 118 | #define WDOG_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DC000) | ||
| 119 | #define PWM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E0000) | ||
| 120 | #define RTIC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000EC000) | ||
| 121 | |||
| 122 | /* | ||
| 123 | * ROMP and AVIC | ||
| 124 | */ | ||
| 125 | #define ROMP_BASE_ADDR 0x60000000 | ||
| 126 | #define ROMP_BASE_ADDR_VIRT 0xFC500000 | ||
| 127 | #define ROMP_SIZE SZ_1M | ||
| 128 | |||
| 129 | #define AVIC_BASE_ADDR 0x68000000 | ||
| 130 | #define AVIC_BASE_ADDR_VIRT 0xFC400000 | ||
| 131 | #define AVIC_SIZE SZ_1M | ||
| 132 | |||
| 133 | /* | ||
| 134 | * NAND, SDRAM, WEIM, M3IF, EMI controllers | ||
| 135 | */ | ||
| 136 | #define X_MEMC_BASE_ADDR 0xB8000000 | ||
| 137 | #define X_MEMC_BASE_ADDR_VIRT 0xFC320000 | ||
| 138 | #define X_MEMC_SIZE SZ_64K | ||
| 139 | |||
| 140 | #define ESDCTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x1000) | ||
| 141 | #define WEIM_BASE_ADDR (X_MEMC_BASE_ADDR + 0x2000) | ||
| 142 | #define M3IF_BASE_ADDR (X_MEMC_BASE_ADDR + 0x3000) | ||
| 143 | #define EMI_CTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x4000) | ||
| 144 | #define PCMCIA_CTL_BASE_ADDR EMI_CTL_BASE_ADDR | ||
| 145 | |||
| 146 | /* | ||
| 147 | * Memory regions and CS | ||
| 148 | */ | ||
| 149 | #define IPU_MEM_BASE_ADDR 0x70000000 | ||
| 150 | #define CSD0_BASE_ADDR 0x80000000 | ||
| 151 | #define CSD1_BASE_ADDR 0x90000000 | ||
| 152 | |||
| 153 | /*! | ||
| 154 | * This macro defines the physical to virtual address mapping for all the | ||
| 155 | * peripheral modules. It is used by passing in the physical address as x | ||
| 156 | * and returning the virtual address. If the physical address is not mapped, | ||
| 157 | * it returns 0xDEADBEEF | ||
| 158 | */ | ||
| 159 | #define IO_ADDRESS(x) \ | ||
| 160 | (void __force __iomem *) \ | ||
| 161 | (((x >= AIPS1_BASE_ADDR) && (x < (AIPS1_BASE_ADDR + AIPS1_SIZE))) ? AIPS1_IO_ADDRESS(x):\ | ||
| 162 | ((x >= SPBA0_BASE_ADDR) && (x < (SPBA0_BASE_ADDR + SPBA0_SIZE))) ? SPBA0_IO_ADDRESS(x):\ | ||
| 163 | ((x >= AIPS2_BASE_ADDR) && (x < (AIPS2_BASE_ADDR + AIPS2_SIZE))) ? AIPS2_IO_ADDRESS(x):\ | ||
| 164 | ((x >= ROMP_BASE_ADDR) && (x < (ROMP_BASE_ADDR + ROMP_SIZE))) ? ROMP_IO_ADDRESS(x):\ | ||
| 165 | ((x >= AVIC_BASE_ADDR) && (x < (AVIC_BASE_ADDR + AVIC_SIZE))) ? AVIC_IO_ADDRESS(x):\ | ||
| 166 | ((x >= CS4_BASE_ADDR) && (x < (CS4_BASE_ADDR + CS4_SIZE))) ? CS4_IO_ADDRESS(x):\ | ||
| 167 | ((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? X_MEMC_IO_ADDRESS(x):\ | ||
| 168 | 0xDEADBEEF) | ||
| 169 | |||
| 170 | /* | ||
| 171 | * define the address mapping macros: in physical address order | ||
| 172 | */ | ||
| 173 | #define L2CC_IO_ADDRESS(x) \ | ||
| 174 | (((x) - L2CC_BASE_ADDR) + L2CC_BASE_ADDR_VIRT) | ||
| 175 | |||
| 176 | #define AIPS1_IO_ADDRESS(x) \ | ||
| 177 | (((x) - AIPS1_BASE_ADDR) + AIPS1_BASE_ADDR_VIRT) | ||
| 178 | |||
| 179 | #define SPBA0_IO_ADDRESS(x) \ | ||
| 180 | (((x) - SPBA0_BASE_ADDR) + SPBA0_BASE_ADDR_VIRT) | ||
| 181 | |||
| 182 | #define AIPS2_IO_ADDRESS(x) \ | ||
| 183 | (((x) - AIPS2_BASE_ADDR) + AIPS2_BASE_ADDR_VIRT) | ||
| 184 | |||
| 185 | #define ROMP_IO_ADDRESS(x) \ | ||
| 186 | (((x) - ROMP_BASE_ADDR) + ROMP_BASE_ADDR_VIRT) | ||
| 187 | |||
| 188 | #define AVIC_IO_ADDRESS(x) \ | ||
| 189 | (((x) - AVIC_BASE_ADDR) + AVIC_BASE_ADDR_VIRT) | ||
| 190 | |||
| 191 | #define CS4_IO_ADDRESS(x) \ | ||
| 192 | (((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT) | ||
| 193 | |||
| 194 | #define X_MEMC_IO_ADDRESS(x) \ | ||
| 195 | (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) | ||
| 196 | |||
| 197 | #define PCMCIA_IO_ADDRESS(x) \ | ||
| 198 | (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) | ||
| 199 | |||
| 200 | /* | ||
| 201 | * Interrupt numbers | ||
| 202 | */ | ||
| 203 | #define MXC_INT_I2C3 3 | ||
| 204 | #define MXC_INT_I2C2 4 | ||
| 205 | #define MXC_INT_RTIC 6 | ||
| 206 | #define MXC_INT_I2C 10 | ||
| 207 | #define MXC_INT_CSPI2 13 | ||
| 208 | #define MXC_INT_CSPI1 14 | ||
| 209 | #define MXC_INT_ATA 15 | ||
| 210 | #define MXC_INT_UART3 18 | ||
| 211 | #define MXC_INT_IIM 19 | ||
| 212 | #define MXC_INT_RNGA 22 | ||
| 213 | #define MXC_INT_EVTMON 23 | ||
| 214 | #define MXC_INT_KPP 24 | ||
| 215 | #define MXC_INT_RTC 25 | ||
| 216 | #define MXC_INT_PWM 26 | ||
| 217 | #define MXC_INT_EPIT2 27 | ||
| 218 | #define MXC_INT_EPIT1 28 | ||
| 219 | #define MXC_INT_GPT 29 | ||
| 220 | #define MXC_INT_POWER_FAIL 30 | ||
| 221 | #define MXC_INT_UART2 32 | ||
| 222 | #define MXC_INT_NANDFC 33 | ||
| 223 | #define MXC_INT_SDMA 34 | ||
| 224 | #define MXC_INT_MSHC1 39 | ||
| 225 | #define MXC_INT_IPU_ERR 41 | ||
| 226 | #define MXC_INT_IPU_SYN 42 | ||
| 227 | #define MXC_INT_UART1 45 | ||
| 228 | #define MXC_INT_ECT 48 | ||
| 229 | #define MXC_INT_SCC_SCM 49 | ||
| 230 | #define MXC_INT_SCC_SMN 50 | ||
| 231 | #define MXC_INT_GPIO2 51 | ||
| 232 | #define MXC_INT_GPIO1 52 | ||
| 233 | #define MXC_INT_WDOG 55 | ||
| 234 | #define MXC_INT_GPIO3 56 | ||
| 235 | #define MXC_INT_EXT_POWER 58 | ||
| 236 | #define MXC_INT_EXT_TEMPER 59 | ||
| 237 | #define MXC_INT_EXT_SENSOR60 60 | ||
| 238 | #define MXC_INT_EXT_SENSOR61 61 | ||
| 239 | #define MXC_INT_EXT_WDOG 62 | ||
| 240 | #define MXC_INT_EXT_TV 63 | ||
| 241 | |||
| 242 | #define PROD_SIGNATURE 0x1 /* For MX31 */ | ||
| 243 | |||
| 244 | /* silicon revisions specific to i.MX31 */ | ||
| 245 | #define CHIP_REV_1_0 0x10 | ||
| 246 | #define CHIP_REV_1_1 0x11 | ||
| 247 | #define CHIP_REV_1_2 0x12 | ||
| 248 | #define CHIP_REV_1_3 0x13 | ||
| 249 | #define CHIP_REV_2_0 0x20 | ||
| 250 | #define CHIP_REV_2_1 0x21 | ||
| 251 | #define CHIP_REV_2_2 0x22 | ||
| 252 | #define CHIP_REV_2_3 0x23 | ||
| 253 | #define CHIP_REV_3_0 0x30 | ||
| 254 | #define CHIP_REV_3_1 0x31 | ||
| 255 | #define CHIP_REV_3_2 0x32 | ||
| 256 | |||
| 257 | #define SYSTEM_REV_MIN CHIP_REV_1_0 | ||
| 258 | #define SYSTEM_REV_NUM 3 | ||
| 259 | |||
| 260 | /* gpio and gpio based interrupt handling */ | ||
| 261 | #define GPIO_DR 0x00 | ||
| 262 | #define GPIO_GDIR 0x04 | ||
| 263 | #define GPIO_PSR 0x08 | ||
| 264 | #define GPIO_ICR1 0x0C | ||
| 265 | #define GPIO_ICR2 0x10 | ||
| 266 | #define GPIO_IMR 0x14 | ||
| 267 | #define GPIO_ISR 0x18 | ||
| 268 | #define GPIO_INT_LOW_LEV 0x0 | ||
| 269 | #define GPIO_INT_HIGH_LEV 0x1 | ||
| 270 | #define GPIO_INT_RISE_EDGE 0x2 | ||
| 271 | #define GPIO_INT_FALL_EDGE 0x3 | ||
| 272 | #define GPIO_INT_NONE 0x4 | ||
| 273 | |||
| 274 | /* Mandatory defines used globally */ | ||
| 275 | |||
| 276 | /* this CPU supports up to 96 GPIOs */ | ||
| 277 | #define ARCH_NR_GPIOS 96 | ||
| 278 | |||
| 279 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) | ||
| 280 | |||
| 281 | extern unsigned int system_rev; | ||
| 282 | |||
| 283 | static inline int mx31_revision(void) | ||
| 284 | { | ||
| 285 | return system_rev; | ||
| 286 | } | ||
| 287 | #endif | ||
| 288 | |||
| 289 | #endif /* __ASM_ARCH_MXC_MX31_H__ */ | ||
| 290 | |||
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index f6caab062131..5fa2a07f4eaf 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h | |||
| @@ -24,13 +24,74 @@ | |||
| 24 | #error "Do not include directly." | 24 | #error "Do not include directly." |
| 25 | #endif | 25 | #endif |
| 26 | 26 | ||
| 27 | /* clean up all things that are not used */ | 27 | #define MXC_CPU_MX1 1 |
| 28 | #ifndef CONFIG_ARCH_MX3 | 28 | #define MXC_CPU_MX21 21 |
| 29 | # define cpu_is_mx31() (0) | 29 | #define MXC_CPU_MX27 27 |
| 30 | #define MXC_CPU_MX31 31 | ||
| 31 | #define MXC_CPU_MX35 35 | ||
| 32 | |||
| 33 | #ifndef __ASSEMBLY__ | ||
| 34 | extern unsigned int __mxc_cpu_type; | ||
| 35 | #endif | ||
| 36 | |||
| 37 | #ifdef CONFIG_ARCH_MX1 | ||
| 38 | # ifdef mxc_cpu_type | ||
| 39 | # undef mxc_cpu_type | ||
| 40 | # define mxc_cpu_type __mxc_cpu_type | ||
| 41 | # else | ||
| 42 | # define mxc_cpu_type MXC_CPU_MX1 | ||
| 43 | # endif | ||
| 44 | # define cpu_is_mx1() (mxc_cpu_type == MXC_CPU_MX1) | ||
| 45 | #else | ||
| 46 | # define cpu_is_mx1() (0) | ||
| 47 | #endif | ||
| 48 | |||
| 49 | #ifdef CONFIG_MACH_MX21 | ||
| 50 | # ifdef mxc_cpu_type | ||
| 51 | # undef mxc_cpu_type | ||
| 52 | # define mxc_cpu_type __mxc_cpu_type | ||
| 53 | # else | ||
| 54 | # define mxc_cpu_type MXC_CPU_MX21 | ||
| 55 | # endif | ||
| 56 | # define cpu_is_mx21() (mxc_cpu_type == MXC_CPU_MX21) | ||
| 57 | #else | ||
| 58 | # define cpu_is_mx21() (0) | ||
| 30 | #endif | 59 | #endif |
| 31 | 60 | ||
| 32 | #ifndef CONFIG_MACH_MX27 | 61 | #ifdef CONFIG_MACH_MX27 |
| 33 | # define cpu_is_mx27() (0) | 62 | # ifdef mxc_cpu_type |
| 63 | # undef mxc_cpu_type | ||
| 64 | # define mxc_cpu_type __mxc_cpu_type | ||
| 65 | # else | ||
| 66 | # define mxc_cpu_type MXC_CPU_MX27 | ||
| 67 | # endif | ||
| 68 | # define cpu_is_mx27() (mxc_cpu_type == MXC_CPU_MX27) | ||
| 69 | #else | ||
| 70 | # define cpu_is_mx27() (0) | ||
| 71 | #endif | ||
| 72 | |||
| 73 | #ifdef CONFIG_ARCH_MX31 | ||
| 74 | # ifdef mxc_cpu_type | ||
| 75 | # undef mxc_cpu_type | ||
| 76 | # define mxc_cpu_type __mxc_cpu_type | ||
| 77 | # else | ||
| 78 | # define mxc_cpu_type MXC_CPU_MX31 | ||
| 79 | # endif | ||
| 80 | # define cpu_is_mx31() (mxc_cpu_type == MXC_CPU_MX31) | ||
| 81 | #else | ||
| 82 | # define cpu_is_mx31() (0) | ||
| 83 | #endif | ||
| 84 | |||
| 85 | #ifdef CONFIG_ARCH_MX35 | ||
| 86 | # ifdef mxc_cpu_type | ||
| 87 | # undef mxc_cpu_type | ||
| 88 | # define mxc_cpu_type __mxc_cpu_type | ||
| 89 | # else | ||
| 90 | # define mxc_cpu_type MXC_CPU_MX35 | ||
| 91 | # endif | ||
| 92 | # define cpu_is_mx35() (mxc_cpu_type == MXC_CPU_MX35) | ||
| 93 | #else | ||
| 94 | # define cpu_is_mx35() (0) | ||
| 34 | #endif | 95 | #endif |
| 35 | 96 | ||
| 36 | #if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) | 97 | #if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) |
| @@ -39,4 +100,7 @@ | |||
| 39 | #define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8) | 100 | #define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8) |
| 40 | #endif | 101 | #endif |
| 41 | 102 | ||
| 103 | #define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35()) | ||
| 104 | #define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27()) | ||
| 105 | |||
| 42 | #endif /* __ASM_ARCH_MXC_H__ */ | 106 | #endif /* __ASM_ARCH_MXC_H__ */ |
diff --git a/arch/arm/plat-mxc/iomux-mx1-mx2.c b/arch/arm/plat-mxc/iomux-mx1-mx2.c index df6f18395686..a37163ce280b 100644 --- a/arch/arm/plat-mxc/iomux-mx1-mx2.c +++ b/arch/arm/plat-mxc/iomux-mx1-mx2.c | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | 32 | ||
| 33 | #include <mach/hardware.h> | 33 | #include <mach/hardware.h> |
| 34 | #include <asm/mach/map.h> | 34 | #include <asm/mach/map.h> |
| 35 | #include <mach/iomux-mx1-mx2.h> | 35 | #include <mach/iomux.h> |
| 36 | 36 | ||
| 37 | void mxc_gpio_mode(int gpio_mode) | 37 | void mxc_gpio_mode(int gpio_mode) |
| 38 | { | 38 | { |
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c new file mode 100644 index 000000000000..9bffbc507cc2 --- /dev/null +++ b/arch/arm/plat-mxc/pwm.c | |||
| @@ -0,0 +1,300 @@ | |||
| 1 | /* | ||
| 2 | * simple driver for PWM (Pulse Width Modulator) controller | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License version 2 as | ||
| 6 | * published by the Free Software Foundation. | ||
| 7 | * | ||
| 8 | * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com> | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/module.h> | ||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/platform_device.h> | ||
| 14 | #include <linux/err.h> | ||
| 15 | #include <linux/clk.h> | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/pwm.h> | ||
| 18 | |||
| 19 | #if defined CONFIG_ARCH_MX1 || defined CONFIG_ARCH_MX21 | ||
| 20 | #define PWM_VER_1 | ||
| 21 | |||
| 22 | #define PWMCR 0x00 /* PWM Control Register */ | ||
| 23 | #define PWMSR 0x04 /* PWM Sample Register */ | ||
| 24 | #define PWMPR 0x08 /* PWM Period Register */ | ||
| 25 | #define PWMCNR 0x0C /* PWM Counter Register */ | ||
| 26 | |||
| 27 | #define PWMCR_HCTR (1 << 18) /* Halfword FIFO Data Swapping */ | ||
| 28 | #define PWMCR_BCTR (1 << 17) /* Byte FIFO Data Swapping */ | ||
| 29 | #define PWMCR_SWR (1 << 16) /* Software Reset */ | ||
| 30 | #define PWMCR_CLKSRC_PERCLK (0 << 15) /* PERCLK Clock Source */ | ||
| 31 | #define PWMCR_CLKSRC_CLK32 (1 << 15) /* 32KHz Clock Source */ | ||
| 32 | #define PWMCR_PRESCALER(x) (((x - 1) & 0x7F) << 8) /* PRESCALER */ | ||
| 33 | #define PWMCR_IRQ (1 << 7) /* Interrupt Request */ | ||
| 34 | #define PWMCR_IRQEN (1 << 6) /* Interrupt Request Enable */ | ||
| 35 | #define PWMCR_FIFOAV (1 << 5) /* FIFO Available */ | ||
| 36 | #define PWMCR_EN (1 << 4) /* Enables/Disables the PWM */ | ||
| 37 | #define PWMCR_REPEAT(x) (((x) & 0x03) << 2) /* Sample Repeats */ | ||
| 38 | #define PWMCR_DIV(x) (((x) & 0x03) << 0) /* Clock divider 2/4/8/16 */ | ||
| 39 | |||
| 40 | #define MAX_DIV (128 * 16) | ||
| 41 | #endif | ||
| 42 | |||
| 43 | #if defined CONFIG_MACH_MX27 || defined CONFIG_ARCH_MX31 | ||
| 44 | #define PWM_VER_2 | ||
| 45 | |||
| 46 | #define PWMCR 0x00 /* PWM Control Register */ | ||
| 47 | #define PWMSR 0x04 /* PWM Status Register */ | ||
| 48 | #define PWMIR 0x08 /* PWM Interrupt Register */ | ||
| 49 | #define PWMSAR 0x0C /* PWM Sample Register */ | ||
| 50 | #define PWMPR 0x10 /* PWM Period Register */ | ||
| 51 | #define PWMCNR 0x14 /* PWM Counter Register */ | ||
| 52 | |||
| 53 | #define PWMCR_EN (1 << 0) /* Enables/Disables the PWM */ | ||
| 54 | #define PWMCR_REPEAT(x) (((x) & 0x03) << 1) /* Sample Repeats */ | ||
| 55 | #define PWMCR_SWR (1 << 3) /* Software Reset */ | ||
| 56 | #define PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)/* PRESCALER */ | ||
| 57 | #define PWMCR_CLKSRC(x) (((x) & 0x3) << 16) | ||
| 58 | #define PWMCR_CLKSRC_OFF (0 << 16) | ||
| 59 | #define PWMCR_CLKSRC_IPG (1 << 16) | ||
| 60 | #define PWMCR_CLKSRC_IPG_HIGH (2 << 16) | ||
| 61 | #define PWMCR_CLKSRC_CLK32 (3 << 16) | ||
| 62 | #define PWMCR_POUTC | ||
| 63 | #define PWMCR_HCTR (1 << 20) /* Halfword FIFO Data Swapping */ | ||
| 64 | #define PWMCR_BCTR (1 << 21) /* Byte FIFO Data Swapping */ | ||
| 65 | #define PWMCR_DBGEN (1 << 22) /* Debug Mode */ | ||
| 66 | #define PWMCR_WAITEN (1 << 23) /* Wait Mode */ | ||
| 67 | #define PWMCR_DOZEN (1 << 24) /* Doze Mode */ | ||
| 68 | #define PWMCR_STOPEN (1 << 25) /* Stop Mode */ | ||
| 69 | #define PWMCR_FWM(x) (((x) & 0x3) << 26) /* FIFO Water Mark */ | ||
| 70 | |||
| 71 | #define MAX_DIV 4096 | ||
| 72 | #endif | ||
| 73 | |||
| 74 | #define PWMS_SAMPLE(x) ((x) & 0xFFFF) /* Contains a two-sample word */ | ||
| 75 | #define PWMP_PERIOD(x) ((x) & 0xFFFF) /* Represents the PWM's period */ | ||
| 76 | #define PWMC_COUNTER(x) ((x) & 0xFFFF) /* Represents the current count value */ | ||
| 77 | |||
| 78 | struct pwm_device { | ||
| 79 | struct list_head node; | ||
| 80 | struct platform_device *pdev; | ||
| 81 | |||
| 82 | const char *label; | ||
| 83 | struct clk *clk; | ||
| 84 | |||
| 85 | int clk_enabled; | ||
| 86 | void __iomem *mmio_base; | ||
| 87 | |||
| 88 | unsigned int use_count; | ||
| 89 | unsigned int pwm_id; | ||
| 90 | }; | ||
| 91 | |||
| 92 | int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) | ||
| 93 | { | ||
| 94 | unsigned long long c; | ||
| 95 | unsigned long period_cycles, duty_cycles, prescale; | ||
| 96 | |||
| 97 | if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) | ||
| 98 | return -EINVAL; | ||
| 99 | |||
| 100 | c = clk_get_rate(pwm->clk); | ||
| 101 | c = c * period_ns; | ||
| 102 | do_div(c, 1000000000); | ||
| 103 | period_cycles = c; | ||
| 104 | |||
| 105 | prescale = period_cycles / 0x10000 + 1; | ||
| 106 | |||
| 107 | period_cycles /= prescale; | ||
| 108 | c = (unsigned long long)period_cycles * duty_ns; | ||
| 109 | do_div(c, period_ns); | ||
| 110 | duty_cycles = c; | ||
| 111 | |||
| 112 | #ifdef PWM_VER_2 | ||
| 113 | writel(duty_cycles, pwm->mmio_base + PWMSAR); | ||
| 114 | writel(period_cycles, pwm->mmio_base + PWMPR); | ||
| 115 | writel(PWMCR_PRESCALER(prescale - 1) | PWMCR_CLKSRC_IPG_HIGH | PWMCR_EN, | ||
| 116 | pwm->mmio_base + PWMCR); | ||
| 117 | #elif defined PWM_VER_1 | ||
| 118 | #error PWM not yet working on MX1 / MX21 | ||
| 119 | #endif | ||
| 120 | |||
| 121 | return 0; | ||
| 122 | } | ||
| 123 | EXPORT_SYMBOL(pwm_config); | ||
| 124 | |||
| 125 | int pwm_enable(struct pwm_device *pwm) | ||
| 126 | { | ||
| 127 | int rc = 0; | ||
| 128 | |||
| 129 | if (!pwm->clk_enabled) { | ||
| 130 | rc = clk_enable(pwm->clk); | ||
| 131 | if (!rc) | ||
| 132 | pwm->clk_enabled = 1; | ||
| 133 | } | ||
| 134 | return rc; | ||
| 135 | } | ||
| 136 | EXPORT_SYMBOL(pwm_enable); | ||
| 137 | |||
| 138 | void pwm_disable(struct pwm_device *pwm) | ||
| 139 | { | ||
| 140 | if (pwm->clk_enabled) { | ||
| 141 | clk_disable(pwm->clk); | ||
| 142 | pwm->clk_enabled = 0; | ||
| 143 | } | ||
| 144 | } | ||
| 145 | EXPORT_SYMBOL(pwm_disable); | ||
| 146 | |||
| 147 | static DEFINE_MUTEX(pwm_lock); | ||
| 148 | static LIST_HEAD(pwm_list); | ||
| 149 | |||
| 150 | struct pwm_device *pwm_request(int pwm_id, const char *label) | ||
| 151 | { | ||
| 152 | struct pwm_device *pwm; | ||
| 153 | int found = 0; | ||
| 154 | |||
| 155 | mutex_lock(&pwm_lock); | ||
| 156 | |||
| 157 | list_for_each_entry(pwm, &pwm_list, node) { | ||
| 158 | if (pwm->pwm_id == pwm_id) { | ||
| 159 | found = 1; | ||
| 160 | break; | ||
| 161 | } | ||
| 162 | } | ||
| 163 | |||
| 164 | if (found) { | ||
| 165 | if (pwm->use_count == 0) { | ||
| 166 | pwm->use_count++; | ||
| 167 | pwm->label = label; | ||
| 168 | } else | ||
| 169 | pwm = ERR_PTR(-EBUSY); | ||
| 170 | } else | ||
| 171 | pwm = ERR_PTR(-ENOENT); | ||
| 172 | |||
| 173 | mutex_unlock(&pwm_lock); | ||
| 174 | return pwm; | ||
| 175 | } | ||
| 176 | EXPORT_SYMBOL(pwm_request); | ||
| 177 | |||
| 178 | void pwm_free(struct pwm_device *pwm) | ||
| 179 | { | ||
| 180 | mutex_lock(&pwm_lock); | ||
| 181 | |||
| 182 | if (pwm->use_count) { | ||
| 183 | pwm->use_count--; | ||
| 184 | pwm->label = NULL; | ||
| 185 | } else | ||
| 186 | pr_warning("PWM device already freed\n"); | ||
| 187 | |||
| 188 | mutex_unlock(&pwm_lock); | ||
| 189 | } | ||
| 190 | EXPORT_SYMBOL(pwm_free); | ||
| 191 | |||
| 192 | static int __devinit mxc_pwm_probe(struct platform_device *pdev) | ||
| 193 | { | ||
| 194 | struct pwm_device *pwm; | ||
| 195 | struct resource *r; | ||
| 196 | int ret = 0; | ||
| 197 | |||
| 198 | pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL); | ||
| 199 | if (pwm == NULL) { | ||
| 200 | dev_err(&pdev->dev, "failed to allocate memory\n"); | ||
| 201 | return -ENOMEM; | ||
| 202 | } | ||
| 203 | |||
| 204 | pwm->clk = clk_get(&pdev->dev, "pwm"); | ||
| 205 | |||
| 206 | if (IS_ERR(pwm->clk)) { | ||
| 207 | ret = PTR_ERR(pwm->clk); | ||
| 208 | goto err_free; | ||
| 209 | } | ||
| 210 | |||
| 211 | pwm->clk_enabled = 0; | ||
| 212 | |||
| 213 | pwm->use_count = 0; | ||
| 214 | pwm->pwm_id = pdev->id; | ||
| 215 | pwm->pdev = pdev; | ||
| 216 | |||
| 217 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 218 | if (r == NULL) { | ||
| 219 | dev_err(&pdev->dev, "no memory resource defined\n"); | ||
| 220 | ret = -ENODEV; | ||
| 221 | goto err_free_clk; | ||
| 222 | } | ||
| 223 | |||
| 224 | r = request_mem_region(r->start, r->end - r->start + 1, pdev->name); | ||
| 225 | if (r == NULL) { | ||
| 226 | dev_err(&pdev->dev, "failed to request memory resource\n"); | ||
| 227 | ret = -EBUSY; | ||
| 228 | goto err_free_clk; | ||
| 229 | } | ||
| 230 | |||
| 231 | pwm->mmio_base = ioremap(r->start, r->end - r->start + 1); | ||
| 232 | if (pwm->mmio_base == NULL) { | ||
| 233 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); | ||
| 234 | ret = -ENODEV; | ||
| 235 | goto err_free_mem; | ||
| 236 | } | ||
| 237 | |||
| 238 | mutex_lock(&pwm_lock); | ||
| 239 | list_add_tail(&pwm->node, &pwm_list); | ||
| 240 | mutex_unlock(&pwm_lock); | ||
| 241 | |||
| 242 | platform_set_drvdata(pdev, pwm); | ||
| 243 | return 0; | ||
| 244 | |||
| 245 | err_free_mem: | ||
| 246 | release_mem_region(r->start, r->end - r->start + 1); | ||
| 247 | err_free_clk: | ||
| 248 | clk_put(pwm->clk); | ||
| 249 | err_free: | ||
| 250 | kfree(pwm); | ||
| 251 | return ret; | ||
| 252 | } | ||
| 253 | |||
| 254 | static int __devexit mxc_pwm_remove(struct platform_device *pdev) | ||
| 255 | { | ||
| 256 | struct pwm_device *pwm; | ||
| 257 | struct resource *r; | ||
| 258 | |||
| 259 | pwm = platform_get_drvdata(pdev); | ||
| 260 | if (pwm == NULL) | ||
| 261 | return -ENODEV; | ||
| 262 | |||
| 263 | mutex_lock(&pwm_lock); | ||
| 264 | list_del(&pwm->node); | ||
| 265 | mutex_unlock(&pwm_lock); | ||
| 266 | |||
| 267 | iounmap(pwm->mmio_base); | ||
| 268 | |||
| 269 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 270 | release_mem_region(r->start, r->end - r->start + 1); | ||
| 271 | |||
| 272 | clk_put(pwm->clk); | ||
| 273 | |||
| 274 | kfree(pwm); | ||
| 275 | return 0; | ||
| 276 | } | ||
| 277 | |||
| 278 | static struct platform_driver mxc_pwm_driver = { | ||
| 279 | .driver = { | ||
| 280 | .name = "mxc_pwm", | ||
| 281 | }, | ||
| 282 | .probe = mxc_pwm_probe, | ||
| 283 | .remove = __devexit_p(mxc_pwm_remove), | ||
| 284 | }; | ||
| 285 | |||
| 286 | static int __init mxc_pwm_init(void) | ||
| 287 | { | ||
| 288 | return platform_driver_register(&mxc_pwm_driver); | ||
| 289 | } | ||
| 290 | arch_initcall(mxc_pwm_init); | ||
| 291 | |||
| 292 | static void __exit mxc_pwm_exit(void) | ||
| 293 | { | ||
| 294 | platform_driver_unregister(&mxc_pwm_driver); | ||
| 295 | } | ||
| 296 | module_exit(mxc_pwm_exit); | ||
| 297 | |||
| 298 | MODULE_LICENSE("GPL v2"); | ||
| 299 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); | ||
| 300 | |||
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c index 758a1293bcfa..ef1b3cd85bd3 100644 --- a/arch/arm/plat-mxc/time.c +++ b/arch/arm/plat-mxc/time.c | |||
| @@ -34,9 +34,6 @@ | |||
| 34 | static struct clock_event_device clockevent_mxc; | 34 | static struct clock_event_device clockevent_mxc; |
| 35 | static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; | 35 | static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; |
| 36 | 36 | ||
| 37 | /* clock source for the timer */ | ||
| 38 | static struct clk *timer_clk; | ||
| 39 | |||
| 40 | /* clock source */ | 37 | /* clock source */ |
| 41 | 38 | ||
| 42 | static cycle_t mxc_get_cycles(void) | 39 | static cycle_t mxc_get_cycles(void) |
| @@ -53,13 +50,11 @@ static struct clocksource clocksource_mxc = { | |||
| 53 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 50 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| 54 | }; | 51 | }; |
| 55 | 52 | ||
| 56 | static int __init mxc_clocksource_init(void) | 53 | static int __init mxc_clocksource_init(struct clk *timer_clk) |
| 57 | { | 54 | { |
| 58 | unsigned int clock; | 55 | unsigned int c = clk_get_rate(timer_clk); |
| 59 | |||
| 60 | clock = clk_get_rate(timer_clk); | ||
| 61 | 56 | ||
| 62 | clocksource_mxc.mult = clocksource_hz2mult(clock, | 57 | clocksource_mxc.mult = clocksource_hz2mult(c, |
| 63 | clocksource_mxc.shift); | 58 | clocksource_mxc.shift); |
| 64 | clocksource_register(&clocksource_mxc); | 59 | clocksource_register(&clocksource_mxc); |
| 65 | 60 | ||
| @@ -177,13 +172,11 @@ static struct clock_event_device clockevent_mxc = { | |||
| 177 | .rating = 200, | 172 | .rating = 200, |
| 178 | }; | 173 | }; |
| 179 | 174 | ||
| 180 | static int __init mxc_clockevent_init(void) | 175 | static int __init mxc_clockevent_init(struct clk *timer_clk) |
| 181 | { | 176 | { |
| 182 | unsigned int clock; | 177 | unsigned int c = clk_get_rate(timer_clk); |
| 183 | |||
| 184 | clock = clk_get_rate(timer_clk); | ||
| 185 | 178 | ||
| 186 | clockevent_mxc.mult = div_sc(clock, NSEC_PER_SEC, | 179 | clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC, |
| 187 | clockevent_mxc.shift); | 180 | clockevent_mxc.shift); |
| 188 | clockevent_mxc.max_delta_ns = | 181 | clockevent_mxc.max_delta_ns = |
| 189 | clockevent_delta2ns(0xfffffffe, &clockevent_mxc); | 182 | clockevent_delta2ns(0xfffffffe, &clockevent_mxc); |
| @@ -197,14 +190,8 @@ static int __init mxc_clockevent_init(void) | |||
| 197 | return 0; | 190 | return 0; |
| 198 | } | 191 | } |
| 199 | 192 | ||
| 200 | void __init mxc_timer_init(const char *clk_timer) | 193 | void __init mxc_timer_init(struct clk *timer_clk) |
| 201 | { | 194 | { |
| 202 | timer_clk = clk_get(NULL, clk_timer); | ||
| 203 | if (!timer_clk) { | ||
| 204 | printk(KERN_ERR"Cannot determine timer clock. Giving up.\n"); | ||
| 205 | return; | ||
| 206 | } | ||
| 207 | |||
| 208 | clk_enable(timer_clk); | 195 | clk_enable(timer_clk); |
| 209 | 196 | ||
| 210 | /* | 197 | /* |
| @@ -219,10 +206,9 @@ void __init mxc_timer_init(const char *clk_timer) | |||
| 219 | TIMER_BASE + MXC_TCTL); | 206 | TIMER_BASE + MXC_TCTL); |
| 220 | 207 | ||
| 221 | /* init and register the timer to the framework */ | 208 | /* init and register the timer to the framework */ |
| 222 | mxc_clocksource_init(); | 209 | mxc_clocksource_init(timer_clk); |
| 223 | mxc_clockevent_init(); | 210 | mxc_clockevent_init(timer_clk); |
| 224 | 211 | ||
| 225 | /* Make irqs happen */ | 212 | /* Make irqs happen */ |
| 226 | setup_irq(TIMER_INTERRUPT, &mxc_timer_irq); | 213 | setup_irq(TIMER_INTERRUPT, &mxc_timer_irq); |
| 227 | } | 214 | } |
| 228 | |||
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c index 967186425ca1..0d12c2164766 100644 --- a/arch/arm/plat-orion/gpio.c +++ b/arch/arm/plat-orion/gpio.c | |||
| @@ -265,51 +265,36 @@ EXPORT_SYMBOL(orion_gpio_set_blink); | |||
| 265 | * polarity LEVEL mask | 265 | * polarity LEVEL mask |
| 266 | * | 266 | * |
| 267 | ****************************************************************************/ | 267 | ****************************************************************************/ |
| 268 | static void gpio_irq_edge_ack(u32 irq) | ||
| 269 | { | ||
| 270 | int pin = irq_to_gpio(irq); | ||
| 271 | |||
| 272 | writel(~(1 << (pin & 31)), GPIO_EDGE_CAUSE(pin)); | ||
| 273 | } | ||
| 274 | |||
| 275 | static void gpio_irq_edge_mask(u32 irq) | ||
| 276 | { | ||
| 277 | int pin = irq_to_gpio(irq); | ||
| 278 | u32 u; | ||
| 279 | |||
| 280 | u = readl(GPIO_EDGE_MASK(pin)); | ||
| 281 | u &= ~(1 << (pin & 31)); | ||
| 282 | writel(u, GPIO_EDGE_MASK(pin)); | ||
| 283 | } | ||
| 284 | 268 | ||
| 285 | static void gpio_irq_edge_unmask(u32 irq) | 269 | static void gpio_irq_ack(u32 irq) |
| 286 | { | 270 | { |
| 287 | int pin = irq_to_gpio(irq); | 271 | int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK; |
| 288 | u32 u; | 272 | if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { |
| 289 | 273 | int pin = irq_to_gpio(irq); | |
| 290 | u = readl(GPIO_EDGE_MASK(pin)); | 274 | writel(~(1 << (pin & 31)), GPIO_EDGE_CAUSE(pin)); |
| 291 | u |= 1 << (pin & 31); | 275 | } |
| 292 | writel(u, GPIO_EDGE_MASK(pin)); | ||
| 293 | } | 276 | } |
| 294 | 277 | ||
| 295 | static void gpio_irq_level_mask(u32 irq) | 278 | static void gpio_irq_mask(u32 irq) |
| 296 | { | 279 | { |
| 297 | int pin = irq_to_gpio(irq); | 280 | int pin = irq_to_gpio(irq); |
| 298 | u32 u; | 281 | int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK; |
| 299 | 282 | u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ? | |
| 300 | u = readl(GPIO_LEVEL_MASK(pin)); | 283 | GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin); |
| 284 | u32 u = readl(reg); | ||
| 301 | u &= ~(1 << (pin & 31)); | 285 | u &= ~(1 << (pin & 31)); |
| 302 | writel(u, GPIO_LEVEL_MASK(pin)); | 286 | writel(u, reg); |
| 303 | } | 287 | } |
| 304 | 288 | ||
| 305 | static void gpio_irq_level_unmask(u32 irq) | 289 | static void gpio_irq_unmask(u32 irq) |
| 306 | { | 290 | { |
| 307 | int pin = irq_to_gpio(irq); | 291 | int pin = irq_to_gpio(irq); |
| 308 | u32 u; | 292 | int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK; |
| 309 | 293 | u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ? | |
| 310 | u = readl(GPIO_LEVEL_MASK(pin)); | 294 | GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin); |
| 295 | u32 u = readl(reg); | ||
| 311 | u |= 1 << (pin & 31); | 296 | u |= 1 << (pin & 31); |
| 312 | writel(u, GPIO_LEVEL_MASK(pin)); | 297 | writel(u, reg); |
| 313 | } | 298 | } |
| 314 | 299 | ||
| 315 | static int gpio_irq_set_type(u32 irq, u32 type) | 300 | static int gpio_irq_set_type(u32 irq, u32 type) |
| @@ -331,9 +316,9 @@ static int gpio_irq_set_type(u32 irq, u32 type) | |||
| 331 | * Set edge/level type. | 316 | * Set edge/level type. |
| 332 | */ | 317 | */ |
| 333 | if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { | 318 | if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { |
| 334 | desc->chip = &orion_gpio_irq_edge_chip; | 319 | desc->handle_irq = handle_edge_irq; |
| 335 | } else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { | 320 | } else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { |
| 336 | desc->chip = &orion_gpio_irq_level_chip; | 321 | desc->handle_irq = handle_level_irq; |
| 337 | } else { | 322 | } else { |
| 338 | printk(KERN_ERR "failed to set irq=%d (type=%d)\n", irq, type); | 323 | printk(KERN_ERR "failed to set irq=%d (type=%d)\n", irq, type); |
| 339 | return -EINVAL; | 324 | return -EINVAL; |
| @@ -371,19 +356,11 @@ static int gpio_irq_set_type(u32 irq, u32 type) | |||
| 371 | return 0; | 356 | return 0; |
| 372 | } | 357 | } |
| 373 | 358 | ||
| 374 | struct irq_chip orion_gpio_irq_edge_chip = { | 359 | struct irq_chip orion_gpio_irq_chip = { |
| 375 | .name = "orion_gpio_irq_edge", | 360 | .name = "orion_gpio", |
| 376 | .ack = gpio_irq_edge_ack, | 361 | .ack = gpio_irq_ack, |
| 377 | .mask = gpio_irq_edge_mask, | 362 | .mask = gpio_irq_mask, |
| 378 | .unmask = gpio_irq_edge_unmask, | 363 | .unmask = gpio_irq_unmask, |
| 379 | .set_type = gpio_irq_set_type, | ||
| 380 | }; | ||
| 381 | |||
| 382 | struct irq_chip orion_gpio_irq_level_chip = { | ||
| 383 | .name = "orion_gpio_irq_level", | ||
| 384 | .mask = gpio_irq_level_mask, | ||
| 385 | .mask_ack = gpio_irq_level_mask, | ||
| 386 | .unmask = gpio_irq_level_unmask, | ||
| 387 | .set_type = gpio_irq_set_type, | 364 | .set_type = gpio_irq_set_type, |
| 388 | }; | 365 | }; |
| 389 | 366 | ||
diff --git a/arch/arm/plat-orion/include/plat/gpio.h b/arch/arm/plat-orion/include/plat/gpio.h index 54deaf274b52..ec743e82c876 100644 --- a/arch/arm/plat-orion/include/plat/gpio.h +++ b/arch/arm/plat-orion/include/plat/gpio.h | |||
| @@ -31,8 +31,7 @@ void orion_gpio_set_blink(unsigned pin, int blink); | |||
| 31 | /* | 31 | /* |
| 32 | * GPIO interrupt handling. | 32 | * GPIO interrupt handling. |
| 33 | */ | 33 | */ |
| 34 | extern struct irq_chip orion_gpio_irq_edge_chip; | 34 | extern struct irq_chip orion_gpio_irq_chip; |
| 35 | extern struct irq_chip orion_gpio_irq_level_chip; | ||
| 36 | void orion_gpio_irq_handler(int irqoff); | 35 | void orion_gpio_irq_handler(int irqoff); |
| 37 | 36 | ||
| 38 | 37 | ||
diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-s3c/include/plat/uncompress.h index 6061de87f225..dc66a477f62e 100644 --- a/arch/arm/plat-s3c/include/plat/uncompress.h +++ b/arch/arm/plat-s3c/include/plat/uncompress.h | |||
| @@ -90,7 +90,10 @@ static inline void flush(void) | |||
| 90 | { | 90 | { |
| 91 | } | 91 | } |
| 92 | 92 | ||
| 93 | #define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0) | 93 | #define __raw_writel(d, ad) \ |
| 94 | do { \ | ||
| 95 | *((volatile unsigned int __force *)(ad)) = (d); \ | ||
| 96 | } while (0) | ||
| 94 | 97 | ||
| 95 | /* CONFIG_S3C_BOOT_WATCHDOG | 98 | /* CONFIG_S3C_BOOT_WATCHDOG |
| 96 | * | 99 | * |
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c index 1f7cc0067f5c..ebb305ce7689 100644 --- a/arch/arm/plat-s3c64xx/irq-eint.c +++ b/arch/arm/plat-s3c64xx/irq-eint.c | |||
| @@ -55,7 +55,7 @@ static void s3c_irq_eint_unmask(unsigned int irq) | |||
| 55 | u32 mask; | 55 | u32 mask; |
| 56 | 56 | ||
| 57 | mask = __raw_readl(S3C64XX_EINT0MASK); | 57 | mask = __raw_readl(S3C64XX_EINT0MASK); |
| 58 | mask |= eint_irq_to_bit(irq); | 58 | mask &= ~eint_irq_to_bit(irq); |
| 59 | __raw_writel(mask, S3C64XX_EINT0MASK); | 59 | __raw_writel(mask, S3C64XX_EINT0MASK); |
| 60 | } | 60 | } |
| 61 | 61 | ||
diff --git a/arch/arm/vfp/vfp.h b/arch/arm/vfp/vfp.h index 8de86e4feada..c8c98dd44ad4 100644 --- a/arch/arm/vfp/vfp.h +++ b/arch/arm/vfp/vfp.h | |||
| @@ -377,6 +377,4 @@ struct op { | |||
| 377 | u32 flags; | 377 | u32 flags; |
| 378 | }; | 378 | }; |
| 379 | 379 | ||
| 380 | #if defined(CONFIG_SMP) || defined(CONFIG_PM) | ||
| 381 | extern void vfp_save_state(void *location, u32 fpexc); | 380 | extern void vfp_save_state(void *location, u32 fpexc); |
| 382 | #endif | ||
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index c92a08bd6a86..a5a4e57763c3 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S | |||
| @@ -172,7 +172,6 @@ process_exception: | |||
| 172 | @ retry the faulted instruction | 172 | @ retry the faulted instruction |
| 173 | ENDPROC(vfp_support_entry) | 173 | ENDPROC(vfp_support_entry) |
| 174 | 174 | ||
| 175 | #if defined(CONFIG_SMP) || defined(CONFIG_PM) | ||
| 176 | ENTRY(vfp_save_state) | 175 | ENTRY(vfp_save_state) |
| 177 | @ Save the current VFP state | 176 | @ Save the current VFP state |
| 178 | @ r0 - save location | 177 | @ r0 - save location |
| @@ -190,7 +189,6 @@ ENTRY(vfp_save_state) | |||
| 190 | stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2 | 189 | stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2 |
| 191 | mov pc, lr | 190 | mov pc, lr |
| 192 | ENDPROC(vfp_save_state) | 191 | ENDPROC(vfp_save_state) |
| 193 | #endif | ||
| 194 | 192 | ||
| 195 | last_VFP_context_address: | 193 | last_VFP_context_address: |
| 196 | .word last_VFP_context | 194 | .word last_VFP_context |
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 9f476a1be2ca..75457b30d813 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
| @@ -377,6 +377,55 @@ static void vfp_pm_init(void) | |||
| 377 | static inline void vfp_pm_init(void) { } | 377 | static inline void vfp_pm_init(void) { } |
| 378 | #endif /* CONFIG_PM */ | 378 | #endif /* CONFIG_PM */ |
| 379 | 379 | ||
| 380 | /* | ||
| 381 | * Synchronise the hardware VFP state of a thread other than current with the | ||
| 382 | * saved one. This function is used by the ptrace mechanism. | ||
| 383 | */ | ||
| 384 | #ifdef CONFIG_SMP | ||
| 385 | void vfp_sync_state(struct thread_info *thread) | ||
| 386 | { | ||
| 387 | /* | ||
| 388 | * On SMP systems, the VFP state is automatically saved at every | ||
| 389 | * context switch. We mark the thread VFP state as belonging to a | ||
| 390 | * non-existent CPU so that the saved one will be reloaded when | ||
| 391 | * needed. | ||
| 392 | */ | ||
| 393 | thread->vfpstate.hard.cpu = NR_CPUS; | ||
| 394 | } | ||
| 395 | #else | ||
| 396 | void vfp_sync_state(struct thread_info *thread) | ||
| 397 | { | ||
| 398 | unsigned int cpu = get_cpu(); | ||
| 399 | u32 fpexc = fmrx(FPEXC); | ||
| 400 | |||
| 401 | /* | ||
| 402 | * If VFP is enabled, the previous state was already saved and | ||
| 403 | * last_VFP_context updated. | ||
| 404 | */ | ||
| 405 | if (fpexc & FPEXC_EN) | ||
| 406 | goto out; | ||
| 407 | |||
| 408 | if (!last_VFP_context[cpu]) | ||
| 409 | goto out; | ||
| 410 | |||
| 411 | /* | ||
| 412 | * Save the last VFP state on this CPU. | ||
| 413 | */ | ||
| 414 | fmxr(FPEXC, fpexc | FPEXC_EN); | ||
| 415 | vfp_save_state(last_VFP_context[cpu], fpexc); | ||
| 416 | fmxr(FPEXC, fpexc); | ||
| 417 | |||
| 418 | /* | ||
| 419 | * Set the context to NULL to force a reload the next time the thread | ||
| 420 | * uses the VFP. | ||
| 421 | */ | ||
| 422 | last_VFP_context[cpu] = NULL; | ||
| 423 | |||
| 424 | out: | ||
| 425 | put_cpu(); | ||
| 426 | } | ||
| 427 | #endif | ||
| 428 | |||
| 380 | #include <linux/smp.h> | 429 | #include <linux/smp.h> |
| 381 | 430 | ||
| 382 | /* | 431 | /* |
| @@ -427,6 +476,18 @@ static int __init vfp_init(void) | |||
| 427 | * in place; report VFP support to userspace. | 476 | * in place; report VFP support to userspace. |
| 428 | */ | 477 | */ |
| 429 | elf_hwcap |= HWCAP_VFP; | 478 | elf_hwcap |= HWCAP_VFP; |
| 479 | #ifdef CONFIG_VFPv3 | ||
| 480 | if (VFP_arch >= 3) { | ||
| 481 | elf_hwcap |= HWCAP_VFPv3; | ||
| 482 | |||
| 483 | /* | ||
| 484 | * Check for VFPv3 D16. CPUs in this configuration | ||
| 485 | * only have 16 x 64bit registers. | ||
| 486 | */ | ||
| 487 | if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1) | ||
| 488 | elf_hwcap |= HWCAP_VFPv3D16; | ||
| 489 | } | ||
| 490 | #endif | ||
| 430 | #ifdef CONFIG_NEON | 491 | #ifdef CONFIG_NEON |
| 431 | /* | 492 | /* |
| 432 | * Check for the presence of the Advanced SIMD | 493 | * Check for the presence of the Advanced SIMD |
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h index aafaf7a78886..cff8e84f78f2 100644 --- a/arch/avr32/mach-at32ap/include/mach/board.h +++ b/arch/avr32/mach-at32ap/include/mach/board.h | |||
| @@ -116,6 +116,7 @@ struct atmel_nand_data { | |||
| 116 | int enable_pin; /* chip enable */ | 116 | int enable_pin; /* chip enable */ |
| 117 | int det_pin; /* card detect */ | 117 | int det_pin; /* card detect */ |
| 118 | int rdy_pin; /* ready/busy */ | 118 | int rdy_pin; /* ready/busy */ |
| 119 | u8 rdy_pin_active_low; /* rdy_pin value is inverted */ | ||
| 119 | u8 ale; /* address line number connected to ALE */ | 120 | u8 ale; /* address line number connected to ALE */ |
| 120 | u8 cle; /* address line number connected to CLE */ | 121 | u8 cle; /* address line number connected to CLE */ |
| 121 | u8 bus_width_16; /* buswidth is 16 bit */ | 122 | u8 bus_width_16; /* buswidth is 16 bit */ |
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index 8f1f97d56e1e..0c1f86e3e44a 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig | |||
| @@ -1129,6 +1129,7 @@ endchoice | |||
| 1129 | 1129 | ||
| 1130 | config PM_WAKEUP_BY_GPIO | 1130 | config PM_WAKEUP_BY_GPIO |
| 1131 | bool "Allow Wakeup from Standby by GPIO" | 1131 | bool "Allow Wakeup from Standby by GPIO" |
| 1132 | depends on PM && !BF54x | ||
| 1132 | 1133 | ||
| 1133 | config PM_WAKEUP_GPIO_NUMBER | 1134 | config PM_WAKEUP_GPIO_NUMBER |
| 1134 | int "GPIO number" | 1135 | int "GPIO number" |
| @@ -1168,6 +1169,12 @@ config PM_BFIN_WAKE_GP | |||
| 1168 | default n | 1169 | default n |
| 1169 | help | 1170 | help |
| 1170 | Enable General-Purpose Wake-Up (Voltage Regulator Power-Up) | 1171 | Enable General-Purpose Wake-Up (Voltage Regulator Power-Up) |
| 1172 | (all processors, except ADSP-BF549). This option sets | ||
| 1173 | the general-purpose wake-up enable (GPWE) control bit to enable | ||
| 1174 | wake-up upon detection of an active low signal on the /GPW (PH7) pin. | ||
| 1175 | On ADSP-BF549 this option enables the the same functionality on the | ||
| 1176 | /MRXON pin also PH7. | ||
| 1177 | |||
| 1171 | endmenu | 1178 | endmenu |
| 1172 | 1179 | ||
| 1173 | menu "CPU Frequency scaling" | 1180 | menu "CPU Frequency scaling" |
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug index 5f981d9ca625..79e7e63ab709 100644 --- a/arch/blackfin/Kconfig.debug +++ b/arch/blackfin/Kconfig.debug | |||
| @@ -21,12 +21,6 @@ config DEBUG_STACK_USAGE | |||
| 21 | config HAVE_ARCH_KGDB | 21 | config HAVE_ARCH_KGDB |
| 22 | def_bool y | 22 | def_bool y |
| 23 | 23 | ||
| 24 | config KGDB_TESTCASE | ||
| 25 | tristate "KGDB: for test case in expect" | ||
| 26 | default n | ||
| 27 | help | ||
| 28 | This is a kgdb test case for automated testing. | ||
| 29 | |||
| 30 | config DEBUG_VERBOSE | 24 | config DEBUG_VERBOSE |
| 31 | bool "Verbose fault messages" | 25 | bool "Verbose fault messages" |
| 32 | default y | 26 | default y |
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig index 4fdb9e04759f..281f4b60e603 100644 --- a/arch/blackfin/configs/BF518F-EZBRD_defconfig +++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.28-rc2 | 3 | # Linux kernel version: 2.6.28 |
| 4 | # Fri Jan 9 17:58:41 2009 | 4 | # Fri Feb 20 10:01:44 2009 |
| 5 | # | 5 | # |
| 6 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
| 7 | # CONFIG_FPU is not set | 7 | # CONFIG_FPU is not set |
| @@ -133,10 +133,15 @@ CONFIG_BF518=y | |||
| 133 | # CONFIG_BF538 is not set | 133 | # CONFIG_BF538 is not set |
| 134 | # CONFIG_BF539 is not set | 134 | # CONFIG_BF539 is not set |
| 135 | # CONFIG_BF542 is not set | 135 | # CONFIG_BF542 is not set |
| 136 | # CONFIG_BF542M is not set | ||
| 136 | # CONFIG_BF544 is not set | 137 | # CONFIG_BF544 is not set |
| 138 | # CONFIG_BF544M is not set | ||
| 137 | # CONFIG_BF547 is not set | 139 | # CONFIG_BF547 is not set |
| 140 | # CONFIG_BF547M is not set | ||
| 138 | # CONFIG_BF548 is not set | 141 | # CONFIG_BF548 is not set |
| 142 | # CONFIG_BF548M is not set | ||
| 139 | # CONFIG_BF549 is not set | 143 | # CONFIG_BF549 is not set |
| 144 | # CONFIG_BF549M is not set | ||
| 140 | # CONFIG_BF561 is not set | 145 | # CONFIG_BF561 is not set |
| 141 | CONFIG_BF_REV_MIN=0 | 146 | CONFIG_BF_REV_MIN=0 |
| 142 | CONFIG_BF_REV_MAX=2 | 147 | CONFIG_BF_REV_MAX=2 |
| @@ -426,7 +431,17 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 426 | # CONFIG_TIPC is not set | 431 | # CONFIG_TIPC is not set |
| 427 | # CONFIG_ATM is not set | 432 | # CONFIG_ATM is not set |
| 428 | # CONFIG_BRIDGE is not set | 433 | # CONFIG_BRIDGE is not set |
| 429 | # CONFIG_NET_DSA is not set | 434 | CONFIG_NET_DSA=y |
| 435 | # CONFIG_NET_DSA_TAG_DSA is not set | ||
| 436 | # CONFIG_NET_DSA_TAG_EDSA is not set | ||
| 437 | # CONFIG_NET_DSA_TAG_TRAILER is not set | ||
| 438 | CONFIG_NET_DSA_TAG_STPID=y | ||
| 439 | # CONFIG_NET_DSA_MV88E6XXX is not set | ||
| 440 | # CONFIG_NET_DSA_MV88E6060 is not set | ||
| 441 | # CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set | ||
| 442 | # CONFIG_NET_DSA_MV88E6131 is not set | ||
| 443 | # CONFIG_NET_DSA_MV88E6123_61_65 is not set | ||
| 444 | CONFIG_NET_DSA_KSZ8893M=y | ||
| 430 | # CONFIG_VLAN_8021Q is not set | 445 | # CONFIG_VLAN_8021Q is not set |
| 431 | # CONFIG_DECNET is not set | 446 | # CONFIG_DECNET is not set |
| 432 | # CONFIG_LLC2 is not set | 447 | # CONFIG_LLC2 is not set |
| @@ -529,6 +544,8 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y | |||
| 529 | # | 544 | # |
| 530 | # Self-contained MTD device drivers | 545 | # Self-contained MTD device drivers |
| 531 | # | 546 | # |
| 547 | # CONFIG_MTD_DATAFLASH is not set | ||
| 548 | # CONFIG_MTD_M25P80 is not set | ||
| 532 | # CONFIG_MTD_SLRAM is not set | 549 | # CONFIG_MTD_SLRAM is not set |
| 533 | # CONFIG_MTD_PHRAM is not set | 550 | # CONFIG_MTD_PHRAM is not set |
| 534 | # CONFIG_MTD_MTDRAM is not set | 551 | # CONFIG_MTD_MTDRAM is not set |
| @@ -561,7 +578,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 | |||
| 561 | # CONFIG_BLK_DEV_HD is not set | 578 | # CONFIG_BLK_DEV_HD is not set |
| 562 | CONFIG_MISC_DEVICES=y | 579 | CONFIG_MISC_DEVICES=y |
| 563 | # CONFIG_EEPROM_93CX6 is not set | 580 | # CONFIG_EEPROM_93CX6 is not set |
| 581 | # CONFIG_ICS932S401 is not set | ||
| 564 | # CONFIG_ENCLOSURE_SERVICES is not set | 582 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 583 | # CONFIG_C2PORT is not set | ||
| 565 | CONFIG_HAVE_IDE=y | 584 | CONFIG_HAVE_IDE=y |
| 566 | # CONFIG_IDE is not set | 585 | # CONFIG_IDE is not set |
| 567 | 586 | ||
| @@ -607,6 +626,7 @@ CONFIG_BFIN_RX_DESC_NUM=20 | |||
| 607 | # CONFIG_SMC91X is not set | 626 | # CONFIG_SMC91X is not set |
| 608 | # CONFIG_SMSC911X is not set | 627 | # CONFIG_SMSC911X is not set |
| 609 | # CONFIG_DM9000 is not set | 628 | # CONFIG_DM9000 is not set |
| 629 | # CONFIG_ENC28J60 is not set | ||
| 610 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | 630 | # CONFIG_IBM_NEW_EMAC_ZMII is not set |
| 611 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 631 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
| 612 | # CONFIG_IBM_NEW_EMAC_TAH is not set | 632 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
| @@ -764,7 +784,23 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | |||
| 764 | # CONFIG_I2C_DEBUG_ALGO is not set | 784 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 765 | # CONFIG_I2C_DEBUG_BUS is not set | 785 | # CONFIG_I2C_DEBUG_BUS is not set |
| 766 | # CONFIG_I2C_DEBUG_CHIP is not set | 786 | # CONFIG_I2C_DEBUG_CHIP is not set |
| 767 | # CONFIG_SPI is not set | 787 | CONFIG_SPI=y |
| 788 | # CONFIG_SPI_DEBUG is not set | ||
| 789 | CONFIG_SPI_MASTER=y | ||
| 790 | |||
| 791 | # | ||
| 792 | # SPI Master Controller Drivers | ||
| 793 | # | ||
| 794 | CONFIG_SPI_BFIN=y | ||
| 795 | # CONFIG_SPI_BFIN_LOCK is not set | ||
| 796 | # CONFIG_SPI_BITBANG is not set | ||
| 797 | |||
| 798 | # | ||
| 799 | # SPI Protocol Masters | ||
| 800 | # | ||
| 801 | # CONFIG_SPI_AT25 is not set | ||
| 802 | # CONFIG_SPI_SPIDEV is not set | ||
| 803 | # CONFIG_SPI_TLE62X0 is not set | ||
| 768 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 804 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
| 769 | # CONFIG_GPIOLIB is not set | 805 | # CONFIG_GPIOLIB is not set |
| 770 | # CONFIG_W1 is not set | 806 | # CONFIG_W1 is not set |
| @@ -788,8 +824,10 @@ CONFIG_BFIN_WDT=y | |||
| 788 | # CONFIG_MFD_SM501 is not set | 824 | # CONFIG_MFD_SM501 is not set |
| 789 | # CONFIG_HTC_PASIC3 is not set | 825 | # CONFIG_HTC_PASIC3 is not set |
| 790 | # CONFIG_MFD_TMIO is not set | 826 | # CONFIG_MFD_TMIO is not set |
| 827 | # CONFIG_PMIC_DA903X is not set | ||
| 791 | # CONFIG_MFD_WM8400 is not set | 828 | # CONFIG_MFD_WM8400 is not set |
| 792 | # CONFIG_MFD_WM8350_I2C is not set | 829 | # CONFIG_MFD_WM8350_I2C is not set |
| 830 | # CONFIG_REGULATOR is not set | ||
| 793 | 831 | ||
| 794 | # | 832 | # |
| 795 | # Multimedia devices | 833 | # Multimedia devices |
| @@ -861,10 +899,18 @@ CONFIG_RTC_INTF_DEV=y | |||
| 861 | # CONFIG_RTC_DRV_M41T80 is not set | 899 | # CONFIG_RTC_DRV_M41T80 is not set |
| 862 | # CONFIG_RTC_DRV_S35390A is not set | 900 | # CONFIG_RTC_DRV_S35390A is not set |
| 863 | # CONFIG_RTC_DRV_FM3130 is not set | 901 | # CONFIG_RTC_DRV_FM3130 is not set |
| 902 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 864 | 903 | ||
| 865 | # | 904 | # |
| 866 | # SPI RTC drivers | 905 | # SPI RTC drivers |
| 867 | # | 906 | # |
| 907 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 908 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 909 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 910 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 911 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 912 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 913 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 868 | 914 | ||
| 869 | # | 915 | # |
| 870 | # Platform RTC drivers | 916 | # Platform RTC drivers |
| @@ -1062,12 +1108,20 @@ CONFIG_DEBUG_INFO=y | |||
| 1062 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 1108 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 1063 | # CONFIG_FAULT_INJECTION is not set | 1109 | # CONFIG_FAULT_INJECTION is not set |
| 1064 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 1110 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| 1111 | |||
| 1112 | # | ||
| 1113 | # Tracers | ||
| 1114 | # | ||
| 1115 | # CONFIG_SCHED_TRACER is not set | ||
| 1116 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 1117 | # CONFIG_BOOT_TRACER is not set | ||
| 1065 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | 1118 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set |
| 1066 | # CONFIG_SAMPLES is not set | 1119 | # CONFIG_SAMPLES is not set |
| 1067 | CONFIG_HAVE_ARCH_KGDB=y | 1120 | CONFIG_HAVE_ARCH_KGDB=y |
| 1068 | # CONFIG_KGDB is not set | 1121 | # CONFIG_KGDB is not set |
| 1069 | # CONFIG_DEBUG_STACKOVERFLOW is not set | 1122 | # CONFIG_DEBUG_STACKOVERFLOW is not set |
| 1070 | # CONFIG_DEBUG_STACK_USAGE is not set | 1123 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1124 | # CONFIG_KGDB_TESTCASE is not set | ||
| 1071 | CONFIG_DEBUG_VERBOSE=y | 1125 | CONFIG_DEBUG_VERBOSE=y |
| 1072 | CONFIG_DEBUG_MMRS=y | 1126 | CONFIG_DEBUG_MMRS=y |
| 1073 | # CONFIG_DEBUG_HWERR is not set | 1127 | # CONFIG_DEBUG_HWERR is not set |
| @@ -1100,6 +1154,7 @@ CONFIG_CRYPTO=y | |||
| 1100 | # | 1154 | # |
| 1101 | # CONFIG_CRYPTO_FIPS is not set | 1155 | # CONFIG_CRYPTO_FIPS is not set |
| 1102 | # CONFIG_CRYPTO_MANAGER is not set | 1156 | # CONFIG_CRYPTO_MANAGER is not set |
| 1157 | # CONFIG_CRYPTO_MANAGER2 is not set | ||
| 1103 | # CONFIG_CRYPTO_GF128MUL is not set | 1158 | # CONFIG_CRYPTO_GF128MUL is not set |
| 1104 | # CONFIG_CRYPTO_NULL is not set | 1159 | # CONFIG_CRYPTO_NULL is not set |
| 1105 | # CONFIG_CRYPTO_CRYPTD is not set | 1160 | # CONFIG_CRYPTO_CRYPTD is not set |
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig index 833128b39724..a50050f17706 100644 --- a/arch/blackfin/configs/BF527-EZKIT_defconfig +++ b/arch/blackfin/configs/BF527-EZKIT_defconfig | |||
| @@ -327,8 +327,8 @@ CONFIG_BFIN_ICACHE=y | |||
| 327 | CONFIG_BFIN_DCACHE=y | 327 | CONFIG_BFIN_DCACHE=y |
| 328 | # CONFIG_BFIN_DCACHE_BANKA is not set | 328 | # CONFIG_BFIN_DCACHE_BANKA is not set |
| 329 | # CONFIG_BFIN_ICACHE_LOCK is not set | 329 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 330 | # CONFIG_BFIN_WB is not set | 330 | CONFIG_BFIN_WB=y |
| 331 | CONFIG_BFIN_WT=y | 331 | # CONFIG_BFIN_WT is not set |
| 332 | # CONFIG_MPU is not set | 332 | # CONFIG_MPU is not set |
| 333 | 333 | ||
| 334 | # | 334 | # |
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig index 334c94b51c40..0a2a00d63887 100644 --- a/arch/blackfin/configs/BF533-EZKIT_defconfig +++ b/arch/blackfin/configs/BF533-EZKIT_defconfig | |||
| @@ -290,8 +290,8 @@ CONFIG_BFIN_ICACHE=y | |||
| 290 | CONFIG_BFIN_DCACHE=y | 290 | CONFIG_BFIN_DCACHE=y |
| 291 | # CONFIG_BFIN_DCACHE_BANKA is not set | 291 | # CONFIG_BFIN_DCACHE_BANKA is not set |
| 292 | # CONFIG_BFIN_ICACHE_LOCK is not set | 292 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 293 | # CONFIG_BFIN_WB is not set | 293 | CONFIG_BFIN_WB=y |
| 294 | CONFIG_BFIN_WT=y | 294 | # CONFIG_BFIN_WT is not set |
| 295 | # CONFIG_MPU is not set | 295 | # CONFIG_MPU is not set |
| 296 | 296 | ||
| 297 | # | 297 | # |
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig index 9d733436e300..eb027587a355 100644 --- a/arch/blackfin/configs/BF533-STAMP_defconfig +++ b/arch/blackfin/configs/BF533-STAMP_defconfig | |||
| @@ -290,8 +290,8 @@ CONFIG_BFIN_ICACHE=y | |||
| 290 | CONFIG_BFIN_DCACHE=y | 290 | CONFIG_BFIN_DCACHE=y |
| 291 | # CONFIG_BFIN_DCACHE_BANKA is not set | 291 | # CONFIG_BFIN_DCACHE_BANKA is not set |
| 292 | # CONFIG_BFIN_ICACHE_LOCK is not set | 292 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 293 | # CONFIG_BFIN_WB is not set | 293 | CONFIG_BFIN_WB=y |
| 294 | CONFIG_BFIN_WT=y | 294 | # CONFIG_BFIN_WT is not set |
| 295 | # CONFIG_MPU is not set | 295 | # CONFIG_MPU is not set |
| 296 | 296 | ||
| 297 | # | 297 | # |
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig index 4fb4108d3103..9e62b9f40eb1 100644 --- a/arch/blackfin/configs/BF537-STAMP_defconfig +++ b/arch/blackfin/configs/BF537-STAMP_defconfig | |||
| @@ -298,8 +298,8 @@ CONFIG_BFIN_ICACHE=y | |||
| 298 | CONFIG_BFIN_DCACHE=y | 298 | CONFIG_BFIN_DCACHE=y |
| 299 | # CONFIG_BFIN_DCACHE_BANKA is not set | 299 | # CONFIG_BFIN_DCACHE_BANKA is not set |
| 300 | # CONFIG_BFIN_ICACHE_LOCK is not set | 300 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 301 | # CONFIG_BFIN_WB is not set | 301 | CONFIG_BFIN_WB=y |
| 302 | CONFIG_BFIN_WT=y | 302 | # CONFIG_BFIN_WT is not set |
| 303 | # CONFIG_MPU is not set | 303 | # CONFIG_MPU is not set |
| 304 | 304 | ||
| 305 | # | 305 | # |
| @@ -568,15 +568,7 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | |||
| 568 | # CONFIG_MTD_DOC2000 is not set | 568 | # CONFIG_MTD_DOC2000 is not set |
| 569 | # CONFIG_MTD_DOC2001 is not set | 569 | # CONFIG_MTD_DOC2001 is not set |
| 570 | # CONFIG_MTD_DOC2001PLUS is not set | 570 | # CONFIG_MTD_DOC2001PLUS is not set |
| 571 | CONFIG_MTD_NAND=m | 571 | # CONFIG_MTD_NAND is not set |
| 572 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
| 573 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
| 574 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
| 575 | # CONFIG_MTD_NAND_BFIN is not set | ||
| 576 | CONFIG_MTD_NAND_IDS=m | ||
| 577 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
| 578 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
| 579 | CONFIG_MTD_NAND_PLATFORM=m | ||
| 580 | # CONFIG_MTD_ONENAND is not set | 572 | # CONFIG_MTD_ONENAND is not set |
| 581 | 573 | ||
| 582 | # | 574 | # |
diff --git a/arch/blackfin/configs/BF538-EZKIT_defconfig b/arch/blackfin/configs/BF538-EZKIT_defconfig index cb32f5624a1b..dd6ad6be1c87 100644 --- a/arch/blackfin/configs/BF538-EZKIT_defconfig +++ b/arch/blackfin/configs/BF538-EZKIT_defconfig | |||
| @@ -306,8 +306,8 @@ CONFIG_BFIN_ICACHE=y | |||
| 306 | CONFIG_BFIN_DCACHE=y | 306 | CONFIG_BFIN_DCACHE=y |
| 307 | # CONFIG_BFIN_DCACHE_BANKA is not set | 307 | # CONFIG_BFIN_DCACHE_BANKA is not set |
| 308 | # CONFIG_BFIN_ICACHE_LOCK is not set | 308 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 309 | # CONFIG_BFIN_WB is not set | 309 | CONFIG_BFIN_WB=y |
| 310 | CONFIG_BFIN_WT=y | 310 | # CONFIG_BFIN_WT is not set |
| 311 | # CONFIG_MPU is not set | 311 | # CONFIG_MPU is not set |
| 312 | 312 | ||
| 313 | # | 313 | # |
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig index 0f8697618aa5..6bc2fb1b2a70 100644 --- a/arch/blackfin/configs/BF548-EZKIT_defconfig +++ b/arch/blackfin/configs/BF548-EZKIT_defconfig | |||
| @@ -361,8 +361,8 @@ CONFIG_BFIN_ICACHE=y | |||
| 361 | CONFIG_BFIN_DCACHE=y | 361 | CONFIG_BFIN_DCACHE=y |
| 362 | # CONFIG_BFIN_DCACHE_BANKA is not set | 362 | # CONFIG_BFIN_DCACHE_BANKA is not set |
| 363 | # CONFIG_BFIN_ICACHE_LOCK is not set | 363 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 364 | # CONFIG_BFIN_WB is not set | 364 | CONFIG_BFIN_WB=y |
| 365 | CONFIG_BFIN_WT=y | 365 | # CONFIG_BFIN_WT is not set |
| 366 | # CONFIG_BFIN_L2_CACHEABLE is not set | 366 | # CONFIG_BFIN_L2_CACHEABLE is not set |
| 367 | # CONFIG_MPU is not set | 367 | # CONFIG_MPU is not set |
| 368 | 368 | ||
| @@ -680,7 +680,7 @@ CONFIG_SCSI=y | |||
| 680 | CONFIG_SCSI_DMA=y | 680 | CONFIG_SCSI_DMA=y |
| 681 | # CONFIG_SCSI_TGT is not set | 681 | # CONFIG_SCSI_TGT is not set |
| 682 | # CONFIG_SCSI_NETLINK is not set | 682 | # CONFIG_SCSI_NETLINK is not set |
| 683 | CONFIG_SCSI_PROC_FS=y | 683 | # CONFIG_SCSI_PROC_FS is not set |
| 684 | 684 | ||
| 685 | # | 685 | # |
| 686 | # SCSI support type (disk, tape, CD-ROM) | 686 | # SCSI support type (disk, tape, CD-ROM) |
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig index 042c7adfccfa..69714fb3e608 100644 --- a/arch/blackfin/configs/BF561-EZKIT_defconfig +++ b/arch/blackfin/configs/BF561-EZKIT_defconfig | |||
| @@ -329,8 +329,8 @@ CONFIG_BFIN_ICACHE=y | |||
| 329 | CONFIG_BFIN_DCACHE=y | 329 | CONFIG_BFIN_DCACHE=y |
| 330 | # CONFIG_BFIN_DCACHE_BANKA is not set | 330 | # CONFIG_BFIN_DCACHE_BANKA is not set |
| 331 | # CONFIG_BFIN_ICACHE_LOCK is not set | 331 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 332 | # CONFIG_BFIN_WB is not set | 332 | CONFIG_BFIN_WB=y |
| 333 | CONFIG_BFIN_WT=y | 333 | # CONFIG_BFIN_WT is not set |
| 334 | # CONFIG_BFIN_L2_CACHEABLE is not set | 334 | # CONFIG_BFIN_L2_CACHEABLE is not set |
| 335 | # CONFIG_MPU is not set | 335 | # CONFIG_MPU is not set |
| 336 | 336 | ||
diff --git a/arch/blackfin/configs/BlackStamp_defconfig b/arch/blackfin/configs/BlackStamp_defconfig index 3a20e281d23c..017c6ea071b5 100644 --- a/arch/blackfin/configs/BlackStamp_defconfig +++ b/arch/blackfin/configs/BlackStamp_defconfig | |||
| @@ -288,8 +288,8 @@ CONFIG_BFIN_ICACHE=y | |||
| 288 | CONFIG_BFIN_DCACHE=y | 288 | CONFIG_BFIN_DCACHE=y |
| 289 | # CONFIG_BFIN_DCACHE_BANKA is not set | 289 | # CONFIG_BFIN_DCACHE_BANKA is not set |
| 290 | # CONFIG_BFIN_ICACHE_LOCK is not set | 290 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 291 | # CONFIG_BFIN_WB is not set | 291 | CONFIG_BFIN_WB=y |
| 292 | CONFIG_BFIN_WT=y | 292 | # CONFIG_BFIN_WT is not set |
| 293 | # CONFIG_MPU is not set | 293 | # CONFIG_MPU is not set |
| 294 | 294 | ||
| 295 | # | 295 | # |
diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig index 865ed85a5760..d880ef786770 100644 --- a/arch/blackfin/configs/CM-BF527_defconfig +++ b/arch/blackfin/configs/CM-BF527_defconfig | |||
| @@ -332,8 +332,8 @@ CONFIG_BFIN_ICACHE=y | |||
| 332 | CONFIG_BFIN_DCACHE=y | 332 | CONFIG_BFIN_DCACHE=y |
| 333 | # CONFIG_BFIN_DCACHE_BANKA is not set | 333 | # CONFIG_BFIN_DCACHE_BANKA is not set |
| 334 | # CONFIG_BFIN_ICACHE_LOCK is not set | 334 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 335 | # CONFIG_BFIN_WB is not set | 335 | CONFIG_BFIN_WB=y |
| 336 | CONFIG_BFIN_WT=y | 336 | # CONFIG_BFIN_WT is not set |
| 337 | # CONFIG_MPU is not set | 337 | # CONFIG_MPU is not set |
| 338 | 338 | ||
| 339 | # | 339 | # |
diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig index efe9741b1f14..f410430b4e3d 100644 --- a/arch/blackfin/configs/CM-BF548_defconfig +++ b/arch/blackfin/configs/CM-BF548_defconfig | |||
| @@ -336,8 +336,8 @@ CONFIG_BFIN_ICACHE=y | |||
| 336 | CONFIG_BFIN_DCACHE=y | 336 | CONFIG_BFIN_DCACHE=y |
| 337 | # CONFIG_BFIN_DCACHE_BANKA is not set | 337 | # CONFIG_BFIN_DCACHE_BANKA is not set |
| 338 | # CONFIG_BFIN_ICACHE_LOCK is not set | 338 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 339 | # CONFIG_BFIN_WB is not set | 339 | CONFIG_BFIN_WB=y |
| 340 | CONFIG_BFIN_WT=y | 340 | # CONFIG_BFIN_WT is not set |
| 341 | CONFIG_L1_MAX_PIECE=16 | 341 | CONFIG_L1_MAX_PIECE=16 |
| 342 | # CONFIG_MPU is not set | 342 | # CONFIG_MPU is not set |
| 343 | 343 | ||
| @@ -595,7 +595,7 @@ CONFIG_SCSI=y | |||
| 595 | CONFIG_SCSI_DMA=y | 595 | CONFIG_SCSI_DMA=y |
| 596 | # CONFIG_SCSI_TGT is not set | 596 | # CONFIG_SCSI_TGT is not set |
| 597 | # CONFIG_SCSI_NETLINK is not set | 597 | # CONFIG_SCSI_NETLINK is not set |
| 598 | CONFIG_SCSI_PROC_FS=y | 598 | # CONFIG_SCSI_PROC_FS is not set |
| 599 | 599 | ||
| 600 | # | 600 | # |
| 601 | # SCSI support type (disk, tape, CD-ROM) | 601 | # SCSI support type (disk, tape, CD-ROM) |
diff --git a/arch/blackfin/configs/IP0X_defconfig b/arch/blackfin/configs/IP0X_defconfig index eae83b5de92f..7db93874c987 100644 --- a/arch/blackfin/configs/IP0X_defconfig +++ b/arch/blackfin/configs/IP0X_defconfig | |||
| @@ -612,7 +612,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | |||
| 612 | CONFIG_SCSI=y | 612 | CONFIG_SCSI=y |
| 613 | # CONFIG_SCSI_TGT is not set | 613 | # CONFIG_SCSI_TGT is not set |
| 614 | # CONFIG_SCSI_NETLINK is not set | 614 | # CONFIG_SCSI_NETLINK is not set |
| 615 | CONFIG_SCSI_PROC_FS=y | 615 | # CONFIG_SCSI_PROC_FS is not set |
| 616 | 616 | ||
| 617 | # | 617 | # |
| 618 | # SCSI support type (disk, tape, CD-ROM) | 618 | # SCSI support type (disk, tape, CD-ROM) |
diff --git a/arch/blackfin/configs/SRV1_defconfig b/arch/blackfin/configs/SRV1_defconfig index fa580affc9d6..a46529c6ade3 100644 --- a/arch/blackfin/configs/SRV1_defconfig +++ b/arch/blackfin/configs/SRV1_defconfig | |||
| @@ -282,8 +282,8 @@ CONFIG_BFIN_ICACHE=y | |||
| 282 | CONFIG_BFIN_DCACHE=y | 282 | CONFIG_BFIN_DCACHE=y |
| 283 | # CONFIG_BFIN_DCACHE_BANKA is not set | 283 | # CONFIG_BFIN_DCACHE_BANKA is not set |
| 284 | # CONFIG_BFIN_ICACHE_LOCK is not set | 284 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 285 | # CONFIG_BFIN_WB is not set | 285 | CONFIG_BFIN_WB=y |
| 286 | CONFIG_BFIN_WT=y | 286 | # CONFIG_BFIN_WT is not set |
| 287 | CONFIG_L1_MAX_PIECE=16 | 287 | CONFIG_L1_MAX_PIECE=16 |
| 288 | 288 | ||
| 289 | # | 289 | # |
diff --git a/arch/blackfin/include/asm/Kbuild b/arch/blackfin/include/asm/Kbuild index 606ecfdcc962..09c31418cc08 100644 --- a/arch/blackfin/include/asm/Kbuild +++ b/arch/blackfin/include/asm/Kbuild | |||
| @@ -1,3 +1,4 @@ | |||
| 1 | include include/asm-generic/Kbuild.asm | 1 | include include/asm-generic/Kbuild.asm |
| 2 | 2 | ||
| 3 | unifdef-y += bfin_sport.h | ||
| 3 | unifdef-y += fixed_code.h | 4 | unifdef-y += fixed_code.h |
diff --git a/arch/blackfin/include/asm/bfin_sport.h b/arch/blackfin/include/asm/bfin_sport.h index fe88a2c19213..65a651db5b07 100644 --- a/arch/blackfin/include/asm/bfin_sport.h +++ b/arch/blackfin/include/asm/bfin_sport.h | |||
| @@ -1,30 +1,9 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * File: include/asm-blackfin/bfin_sport.h | 2 | * bfin_sport.h - userspace header for bfin sport driver |
| 3 | * Based on: | ||
| 4 | * Author: Roy Huang (roy.huang@analog.com) | ||
| 5 | * | 3 | * |
| 6 | * Created: Thu Aug. 24 2006 | 4 | * Copyright 2004-2008 Analog Devices Inc. |
| 7 | * Description: | ||
| 8 | * | 5 | * |
| 9 | * Modified: | 6 | * Licensed under the GPL-2 or later. |
| 10 | * Copyright 2004-2006 Analog Devices Inc. | ||
| 11 | * | ||
| 12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | ||
| 13 | * | ||
| 14 | * This program is free software; you can redistribute it and/or modify | ||
| 15 | * it under the terms of the GNU General Public License as published by | ||
| 16 | * the Free Software Foundation; either version 2 of the License, or | ||
| 17 | * (at your option) any later version. | ||
| 18 | * | ||
| 19 | * This program is distributed in the hope that it will be useful, | ||
| 20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 22 | * GNU General Public License for more details. | ||
| 23 | * | ||
| 24 | * You should have received a copy of the GNU General Public License | ||
| 25 | * along with this program; if not, see the file COPYING, or write | ||
| 26 | * to the Free Software Foundation, Inc., | ||
| 27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 28 | */ | 7 | */ |
| 29 | 8 | ||
| 30 | #ifndef __BFIN_SPORT_H__ | 9 | #ifndef __BFIN_SPORT_H__ |
| @@ -42,11 +21,10 @@ | |||
| 42 | #define NORM_FORMAT 0x0 | 21 | #define NORM_FORMAT 0x0 |
| 43 | #define ALAW_FORMAT 0x2 | 22 | #define ALAW_FORMAT 0x2 |
| 44 | #define ULAW_FORMAT 0x3 | 23 | #define ULAW_FORMAT 0x3 |
| 45 | struct sport_register; | ||
| 46 | 24 | ||
| 47 | /* Function driver which use sport must initialize the structure */ | 25 | /* Function driver which use sport must initialize the structure */ |
| 48 | struct sport_config { | 26 | struct sport_config { |
| 49 | /*TDM (multichannels), I2S or other mode */ | 27 | /* TDM (multichannels), I2S or other mode */ |
| 50 | unsigned int mode:3; | 28 | unsigned int mode:3; |
| 51 | 29 | ||
| 52 | /* if TDM mode is selected, channels must be set */ | 30 | /* if TDM mode is selected, channels must be set */ |
| @@ -72,12 +50,18 @@ struct sport_config { | |||
| 72 | int serial_clk; | 50 | int serial_clk; |
| 73 | int fsync_clk; | 51 | int fsync_clk; |
| 74 | 52 | ||
| 75 | unsigned int data_format:2; /*Normal, u-law or a-law */ | 53 | unsigned int data_format:2; /* Normal, u-law or a-law */ |
| 76 | 54 | ||
| 77 | int word_len; /* How length of the word in bits, 3-32 bits */ | 55 | int word_len; /* How length of the word in bits, 3-32 bits */ |
| 78 | int dma_enabled; | 56 | int dma_enabled; |
| 79 | }; | 57 | }; |
| 80 | 58 | ||
| 59 | /* Userspace interface */ | ||
| 60 | #define SPORT_IOC_MAGIC 'P' | ||
| 61 | #define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config) | ||
| 62 | |||
| 63 | #ifdef __KERNEL__ | ||
| 64 | |||
| 81 | struct sport_register { | 65 | struct sport_register { |
| 82 | unsigned short tcr1; | 66 | unsigned short tcr1; |
| 83 | unsigned short reserved0; | 67 | unsigned short reserved0; |
| @@ -117,9 +101,6 @@ struct sport_register { | |||
| 117 | unsigned long mrcs3; | 101 | unsigned long mrcs3; |
| 118 | }; | 102 | }; |
| 119 | 103 | ||
| 120 | #define SPORT_IOC_MAGIC 'P' | ||
| 121 | #define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config) | ||
| 122 | |||
| 123 | struct sport_dev { | 104 | struct sport_dev { |
| 124 | struct cdev cdev; /* Char device structure */ | 105 | struct cdev cdev; /* Char device structure */ |
| 125 | 106 | ||
| @@ -149,6 +130,8 @@ struct sport_dev { | |||
| 149 | struct sport_config config; | 130 | struct sport_config config; |
| 150 | }; | 131 | }; |
| 151 | 132 | ||
| 133 | #endif | ||
| 134 | |||
| 152 | #define SPORT_TCR1 0 | 135 | #define SPORT_TCR1 0 |
| 153 | #define SPORT_TCR2 1 | 136 | #define SPORT_TCR2 1 |
| 154 | #define SPORT_TCLKDIV 2 | 137 | #define SPORT_TCLKDIV 2 |
| @@ -169,4 +152,4 @@ struct sport_dev { | |||
| 169 | #define SPORT_MRCS2 22 | 152 | #define SPORT_MRCS2 22 |
| 170 | #define SPORT_MRCS3 23 | 153 | #define SPORT_MRCS3 23 |
| 171 | 154 | ||
| 172 | #endif /*__BFIN_SPORT_H__*/ | 155 | #endif |
diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h index 76f53d8b9a0d..343b56361ec9 100644 --- a/arch/blackfin/include/asm/ipipe.h +++ b/arch/blackfin/include/asm/ipipe.h | |||
| @@ -35,9 +35,9 @@ | |||
| 35 | #include <asm/atomic.h> | 35 | #include <asm/atomic.h> |
| 36 | #include <asm/traps.h> | 36 | #include <asm/traps.h> |
| 37 | 37 | ||
| 38 | #define IPIPE_ARCH_STRING "1.8-00" | 38 | #define IPIPE_ARCH_STRING "1.9-00" |
| 39 | #define IPIPE_MAJOR_NUMBER 1 | 39 | #define IPIPE_MAJOR_NUMBER 1 |
| 40 | #define IPIPE_MINOR_NUMBER 8 | 40 | #define IPIPE_MINOR_NUMBER 9 |
| 41 | #define IPIPE_PATCH_NUMBER 0 | 41 | #define IPIPE_PATCH_NUMBER 0 |
| 42 | 42 | ||
| 43 | #ifdef CONFIG_SMP | 43 | #ifdef CONFIG_SMP |
| @@ -83,9 +83,9 @@ struct ipipe_sysinfo { | |||
| 83 | "%2 = CYCLES2\n" \ | 83 | "%2 = CYCLES2\n" \ |
| 84 | "CC = %2 == %0\n" \ | 84 | "CC = %2 == %0\n" \ |
| 85 | "if ! CC jump 1b\n" \ | 85 | "if ! CC jump 1b\n" \ |
| 86 | : "=r" (((unsigned long *)&t)[1]), \ | 86 | : "=d,a" (((unsigned long *)&t)[1]), \ |
| 87 | "=r" (((unsigned long *)&t)[0]), \ | 87 | "=d,a" (((unsigned long *)&t)[0]), \ |
| 88 | "=r" (__cy2) \ | 88 | "=d,a" (__cy2) \ |
| 89 | : /*no input*/ : "CC"); \ | 89 | : /*no input*/ : "CC"); \ |
| 90 | t; \ | 90 | t; \ |
| 91 | }) | 91 | }) |
| @@ -118,35 +118,40 @@ void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, | |||
| 118 | 118 | ||
| 119 | #define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq)) | 119 | #define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq)) |
| 120 | 120 | ||
| 121 | #define __ipipe_lock_root() \ | 121 | static inline int __ipipe_check_tickdev(const char *devname) |
| 122 | set_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags) | 122 | { |
| 123 | return 1; | ||
| 124 | } | ||
| 123 | 125 | ||
| 124 | #define __ipipe_unlock_root() \ | 126 | static inline void __ipipe_lock_root(void) |
| 125 | clear_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags) | 127 | { |
| 128 | set_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)); | ||
| 129 | } | ||
| 130 | |||
| 131 | static inline void __ipipe_unlock_root(void) | ||
| 132 | { | ||
| 133 | clear_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)); | ||
| 134 | } | ||
| 126 | 135 | ||
| 127 | void __ipipe_enable_pipeline(void); | 136 | void __ipipe_enable_pipeline(void); |
| 128 | 137 | ||
| 129 | #define __ipipe_hook_critical_ipi(ipd) do { } while (0) | 138 | #define __ipipe_hook_critical_ipi(ipd) do { } while (0) |
| 130 | 139 | ||
| 131 | #define __ipipe_sync_pipeline(syncmask) \ | 140 | #define __ipipe_sync_pipeline ___ipipe_sync_pipeline |
| 132 | do { \ | 141 | void ___ipipe_sync_pipeline(unsigned long syncmask); |
| 133 | struct ipipe_domain *ipd = ipipe_current_domain; \ | ||
| 134 | if (likely(ipd != ipipe_root_domain || !test_bit(IPIPE_ROOTLOCK_FLAG, &ipd->flags))) \ | ||
| 135 | __ipipe_sync_stage(syncmask); \ | ||
| 136 | } while (0) | ||
| 137 | 142 | ||
| 138 | void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs); | 143 | void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs); |
| 139 | 144 | ||
| 140 | int __ipipe_get_irq_priority(unsigned irq); | 145 | int __ipipe_get_irq_priority(unsigned irq); |
| 141 | 146 | ||
| 142 | int __ipipe_get_irqthread_priority(unsigned irq); | ||
| 143 | |||
| 144 | void __ipipe_stall_root_raw(void); | 147 | void __ipipe_stall_root_raw(void); |
| 145 | 148 | ||
| 146 | void __ipipe_unstall_root_raw(void); | 149 | void __ipipe_unstall_root_raw(void); |
| 147 | 150 | ||
| 148 | void __ipipe_serial_debug(const char *fmt, ...); | 151 | void __ipipe_serial_debug(const char *fmt, ...); |
| 149 | 152 | ||
| 153 | asmlinkage void __ipipe_call_irqtail(unsigned long addr); | ||
| 154 | |||
| 150 | DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs); | 155 | DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs); |
| 151 | 156 | ||
| 152 | extern unsigned long __ipipe_core_clock; | 157 | extern unsigned long __ipipe_core_clock; |
| @@ -162,42 +167,25 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul) | |||
| 162 | 167 | ||
| 163 | #define __ipipe_run_irqtail() /* Must be a macro */ \ | 168 | #define __ipipe_run_irqtail() /* Must be a macro */ \ |
| 164 | do { \ | 169 | do { \ |
| 165 | asmlinkage void __ipipe_call_irqtail(void); \ | ||
| 166 | unsigned long __pending; \ | 170 | unsigned long __pending; \ |
| 167 | CSYNC(); \ | 171 | CSYNC(); \ |
| 168 | __pending = bfin_read_IPEND(); \ | 172 | __pending = bfin_read_IPEND(); \ |
| 169 | if (__pending & 0x8000) { \ | 173 | if (__pending & 0x8000) { \ |
| 170 | __pending &= ~0x8010; \ | 174 | __pending &= ~0x8010; \ |
| 171 | if (__pending && (__pending & (__pending - 1)) == 0) \ | 175 | if (__pending && (__pending & (__pending - 1)) == 0) \ |
| 172 | __ipipe_call_irqtail(); \ | 176 | __ipipe_call_irqtail(__ipipe_irq_tail_hook); \ |
| 173 | } \ | 177 | } \ |
| 174 | } while (0) | 178 | } while (0) |
| 175 | 179 | ||
| 176 | #define __ipipe_run_isr(ipd, irq) \ | 180 | #define __ipipe_run_isr(ipd, irq) \ |
| 177 | do { \ | 181 | do { \ |
| 178 | if (ipd == ipipe_root_domain) { \ | 182 | if (ipd == ipipe_root_domain) { \ |
| 179 | /* \ | 183 | local_irq_enable_hw(); \ |
| 180 | * Note: the I-pipe implements a threaded interrupt model on \ | 184 | if (ipipe_virtual_irq_p(irq)) \ |
| 181 | * this arch for Linux external IRQs. The interrupt handler we \ | ||
| 182 | * call here only wakes up the associated IRQ thread. \ | ||
| 183 | */ \ | ||
| 184 | if (ipipe_virtual_irq_p(irq)) { \ | ||
| 185 | /* No irqtail here; virtual interrupts have no effect \ | ||
| 186 | on IPEND so there is no need for processing \ | ||
| 187 | deferral. */ \ | ||
| 188 | local_irq_enable_nohead(ipd); \ | ||
| 189 | ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \ | 185 | ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \ |
| 190 | local_irq_disable_nohead(ipd); \ | 186 | else \ |
| 191 | } else \ | ||
| 192 | /* \ | ||
| 193 | * No need to run the irqtail here either; \ | ||
| 194 | * we can't be preempted by hw IRQs, so \ | ||
| 195 | * non-Linux IRQs cannot stack over the short \ | ||
| 196 | * thread wakeup code. Which in turn means \ | ||
| 197 | * that no irqtail condition could be pending \ | ||
| 198 | * for domains above Linux in the pipeline. \ | ||
| 199 | */ \ | ||
| 200 | ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \ | 187 | ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \ |
| 188 | local_irq_disable_hw(); \ | ||
| 201 | } else { \ | 189 | } else { \ |
| 202 | __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \ | 190 | __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \ |
| 203 | local_irq_enable_nohead(ipd); \ | 191 | local_irq_enable_nohead(ipd); \ |
| @@ -217,42 +205,24 @@ void ipipe_init_irq_threads(void); | |||
| 217 | 205 | ||
| 218 | int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); | 206 | int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); |
| 219 | 207 | ||
| 220 | #define IS_SYSIRQ(irq) ((irq) > IRQ_CORETMR && (irq) <= SYS_IRQS) | 208 | #ifdef CONFIG_GENERIC_CLOCKEVENTS |
| 221 | #define IS_GPIOIRQ(irq) ((irq) >= GPIO_IRQ_BASE && (irq) < NR_IRQS) | 209 | #define IRQ_SYSTMR IRQ_CORETMR |
| 222 | 210 | #define IRQ_PRIOTMR IRQ_CORETMR | |
| 211 | #else | ||
| 223 | #define IRQ_SYSTMR IRQ_TIMER0 | 212 | #define IRQ_SYSTMR IRQ_TIMER0 |
| 224 | #define IRQ_PRIOTMR CONFIG_IRQ_TIMER0 | 213 | #define IRQ_PRIOTMR CONFIG_IRQ_TIMER0 |
| 214 | #endif | ||
| 225 | 215 | ||
| 226 | #if defined(CONFIG_BF531) || defined(CONFIG_BF532) || defined(CONFIG_BF533) | 216 | #ifdef CONFIG_BF561 |
| 227 | #define PRIO_GPIODEMUX(irq) CONFIG_PFA | ||
| 228 | #elif defined(CONFIG_BF534) || defined(CONFIG_BF536) || defined(CONFIG_BF537) | ||
| 229 | #define PRIO_GPIODEMUX(irq) CONFIG_IRQ_PROG_INTA | ||
| 230 | #elif defined(CONFIG_BF52x) | ||
| 231 | #define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PORTF_INTA ? CONFIG_IRQ_PORTF_INTA : \ | ||
| 232 | (irq) == IRQ_PORTG_INTA ? CONFIG_IRQ_PORTG_INTA : \ | ||
| 233 | (irq) == IRQ_PORTH_INTA ? CONFIG_IRQ_PORTH_INTA : \ | ||
| 234 | -1) | ||
| 235 | #elif defined(CONFIG_BF561) | ||
| 236 | #define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PROG0_INTA ? CONFIG_IRQ_PROG0_INTA : \ | ||
| 237 | (irq) == IRQ_PROG1_INTA ? CONFIG_IRQ_PROG1_INTA : \ | ||
| 238 | (irq) == IRQ_PROG2_INTA ? CONFIG_IRQ_PROG2_INTA : \ | ||
| 239 | -1) | ||
| 240 | #define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val) | 217 | #define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val) |
| 241 | #define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val) | 218 | #define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val) |
| 242 | #define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val) | 219 | #define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val) |
| 243 | #define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS() | 220 | #define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS() |
| 244 | #elif defined(CONFIG_BF54x) | 221 | #elif defined(CONFIG_BF54x) |
| 245 | #define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PINT0 ? CONFIG_IRQ_PINT0 : \ | ||
| 246 | (irq) == IRQ_PINT1 ? CONFIG_IRQ_PINT1 : \ | ||
| 247 | (irq) == IRQ_PINT2 ? CONFIG_IRQ_PINT2 : \ | ||
| 248 | (irq) == IRQ_PINT3 ? CONFIG_IRQ_PINT3 : \ | ||
| 249 | -1) | ||
| 250 | #define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val) | 222 | #define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val) |
| 251 | #define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val) | 223 | #define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val) |
| 252 | #define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val) | 224 | #define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val) |
| 253 | #define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val) | 225 | #define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val) |
| 254 | #else | ||
| 255 | # error "no PRIO_GPIODEMUX() for this part" | ||
| 256 | #endif | 226 | #endif |
| 257 | 227 | ||
| 258 | #define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0) | 228 | #define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0) |
| @@ -275,4 +245,6 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); | |||
| 275 | 245 | ||
| 276 | #endif /* !CONFIG_IPIPE */ | 246 | #endif /* !CONFIG_IPIPE */ |
| 277 | 247 | ||
| 248 | #define ipipe_update_tick_evtdev(evtdev) do { } while (0) | ||
| 249 | |||
| 278 | #endif /* !__ASM_BLACKFIN_IPIPE_H */ | 250 | #endif /* !__ASM_BLACKFIN_IPIPE_H */ |
diff --git a/arch/blackfin/include/asm/ipipe_base.h b/arch/blackfin/include/asm/ipipe_base.h index cb1025aeabcf..3e8acbd1a3be 100644 --- a/arch/blackfin/include/asm/ipipe_base.h +++ b/arch/blackfin/include/asm/ipipe_base.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* -*- linux-c -*- | 1 | /* -*- linux-c -*- |
| 2 | * include/asm-blackfin/_baseipipe.h | 2 | * include/asm-blackfin/ipipe_base.h |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2007 Philippe Gerum. | 4 | * Copyright (C) 2007 Philippe Gerum. |
| 5 | * | 5 | * |
| @@ -27,8 +27,9 @@ | |||
| 27 | #define IPIPE_NR_XIRQS NR_IRQS | 27 | #define IPIPE_NR_XIRQS NR_IRQS |
| 28 | #define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */ | 28 | #define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */ |
| 29 | 29 | ||
| 30 | /* Blackfin-specific, global domain flags */ | 30 | /* Blackfin-specific, per-cpu pipeline status */ |
| 31 | #define IPIPE_ROOTLOCK_FLAG 1 /* Lock pipeline for root */ | 31 | #define IPIPE_SYNCDEFER_FLAG 15 |
| 32 | #define IPIPE_SYNCDEFER_MASK (1L << IPIPE_SYNCDEFER_MASK) | ||
| 32 | 33 | ||
| 33 | /* Blackfin traps -- i.e. exception vector numbers */ | 34 | /* Blackfin traps -- i.e. exception vector numbers */ |
| 34 | #define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */ | 35 | #define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */ |
| @@ -48,11 +49,6 @@ | |||
| 48 | 49 | ||
| 49 | #ifndef __ASSEMBLY__ | 50 | #ifndef __ASSEMBLY__ |
| 50 | 51 | ||
| 51 | #include <linux/bitops.h> | ||
| 52 | |||
| 53 | extern int test_bit(int nr, const void *addr); | ||
| 54 | |||
| 55 | |||
| 56 | extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ | 52 | extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ |
| 57 | 53 | ||
| 58 | static inline void __ipipe_stall_root(void) | 54 | static inline void __ipipe_stall_root(void) |
diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h index 3d977909ce7d..7645e85a5f6f 100644 --- a/arch/blackfin/include/asm/irq.h +++ b/arch/blackfin/include/asm/irq.h | |||
| @@ -61,20 +61,38 @@ void __ipipe_restore_root(unsigned long flags); | |||
| 61 | #define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags)) | 61 | #define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags)) |
| 62 | #define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x) | 62 | #define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x) |
| 63 | 63 | ||
| 64 | #define local_save_flags(x) \ | 64 | #define local_save_flags(x) \ |
| 65 | do { \ | 65 | do { \ |
| 66 | (x) = __ipipe_test_root() ? \ | 66 | (x) = __ipipe_test_root() ? \ |
| 67 | __all_masked_irq_flags : bfin_irq_flags; \ | 67 | __all_masked_irq_flags : bfin_irq_flags; \ |
| 68 | barrier(); \ | ||
| 68 | } while (0) | 69 | } while (0) |
| 69 | 70 | ||
| 70 | #define local_irq_save(x) \ | 71 | #define local_irq_save(x) \ |
| 71 | do { \ | 72 | do { \ |
| 72 | (x) = __ipipe_test_and_stall_root(); \ | 73 | (x) = __ipipe_test_and_stall_root() ? \ |
| 74 | __all_masked_irq_flags : bfin_irq_flags; \ | ||
| 75 | barrier(); \ | ||
| 76 | } while (0) | ||
| 77 | |||
| 78 | static inline void local_irq_restore(unsigned long x) | ||
| 79 | { | ||
| 80 | barrier(); | ||
| 81 | __ipipe_restore_root(x == __all_masked_irq_flags); | ||
| 82 | } | ||
| 83 | |||
| 84 | #define local_irq_disable() \ | ||
| 85 | do { \ | ||
| 86 | __ipipe_stall_root(); \ | ||
| 87 | barrier(); \ | ||
| 73 | } while (0) | 88 | } while (0) |
| 74 | 89 | ||
| 75 | #define local_irq_restore(x) __ipipe_restore_root(x) | 90 | static inline void local_irq_enable(void) |
| 76 | #define local_irq_disable() __ipipe_stall_root() | 91 | { |
| 77 | #define local_irq_enable() __ipipe_unstall_root() | 92 | barrier(); |
| 93 | __ipipe_unstall_root(); | ||
| 94 | } | ||
| 95 | |||
| 78 | #define irqs_disabled() __ipipe_test_root() | 96 | #define irqs_disabled() __ipipe_test_root() |
| 79 | 97 | ||
| 80 | #define local_save_flags_hw(x) \ | 98 | #define local_save_flags_hw(x) \ |
diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h index e721ce55956c..2920087516f2 100644 --- a/arch/blackfin/include/asm/thread_info.h +++ b/arch/blackfin/include/asm/thread_info.h | |||
| @@ -122,6 +122,7 @@ static inline struct thread_info *current_thread_info(void) | |||
| 122 | #define TIF_MEMDIE 4 | 122 | #define TIF_MEMDIE 4 |
| 123 | #define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ | 123 | #define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ |
| 124 | #define TIF_FREEZE 6 /* is freezing for suspend */ | 124 | #define TIF_FREEZE 6 /* is freezing for suspend */ |
| 125 | #define TIF_IRQ_SYNC 7 /* sync pipeline stage */ | ||
| 125 | 126 | ||
| 126 | /* as above, but as bit values */ | 127 | /* as above, but as bit values */ |
| 127 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) | 128 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) |
| @@ -130,6 +131,7 @@ static inline struct thread_info *current_thread_info(void) | |||
| 130 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) | 131 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) |
| 131 | #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) | 132 | #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) |
| 132 | #define _TIF_FREEZE (1<<TIF_FREEZE) | 133 | #define _TIF_FREEZE (1<<TIF_FREEZE) |
| 134 | #define _TIF_IRQ_SYNC (1<<TIF_IRQ_SYNC) | ||
| 133 | 135 | ||
| 134 | #define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ | 136 | #define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ |
| 135 | 137 | ||
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile index 4a92a86824b7..fd4d4328a0f2 100644 --- a/arch/blackfin/kernel/Makefile +++ b/arch/blackfin/kernel/Makefile | |||
| @@ -15,13 +15,15 @@ else | |||
| 15 | obj-y += time.o | 15 | obj-y += time.o |
| 16 | endif | 16 | endif |
| 17 | 17 | ||
| 18 | CFLAGS_kgdb_test.o := -mlong-calls -O0 | ||
| 19 | |||
| 20 | obj-$(CONFIG_IPIPE) += ipipe.o | 18 | obj-$(CONFIG_IPIPE) += ipipe.o |
| 21 | obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o | 19 | obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o |
| 22 | obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o | 20 | obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o |
| 23 | obj-$(CONFIG_CPLB_INFO) += cplbinfo.o | 21 | obj-$(CONFIG_CPLB_INFO) += cplbinfo.o |
| 24 | obj-$(CONFIG_MODULES) += module.o | 22 | obj-$(CONFIG_MODULES) += module.o |
| 25 | obj-$(CONFIG_KGDB) += kgdb.o | 23 | obj-$(CONFIG_KGDB) += kgdb.o |
| 26 | obj-$(CONFIG_KGDB_TESTCASE) += kgdb_test.o | 24 | obj-$(CONFIG_KGDB_TESTS) += kgdb_test.o |
| 27 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | 25 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o |
| 26 | |||
| 27 | # the kgdb test puts code into L2 and without linker | ||
| 28 | # relaxation, we need to force long calls to/from it | ||
| 29 | CFLAGS_kgdb_test.o := -mlong-calls -O0 | ||
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c index 0e28f7595733..d6c067782e63 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c | |||
| @@ -53,9 +53,13 @@ void __init generate_cplb_tables_cpu(unsigned int cpu) | |||
| 53 | 53 | ||
| 54 | i_d = i_i = 0; | 54 | i_d = i_i = 0; |
| 55 | 55 | ||
| 56 | #ifdef CONFIG_DEBUG_HUNT_FOR_ZERO | ||
| 56 | /* Set up the zero page. */ | 57 | /* Set up the zero page. */ |
| 57 | d_tbl[i_d].addr = 0; | 58 | d_tbl[i_d].addr = 0; |
| 58 | d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; | 59 | d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; |
| 60 | i_tbl[i_i].addr = 0; | ||
| 61 | i_tbl[i_i++].data = SDRAM_OOPS | PAGE_SIZE_1KB; | ||
| 62 | #endif | ||
| 59 | 63 | ||
| 60 | /* Cover kernel memory with 4M pages. */ | 64 | /* Cover kernel memory with 4M pages. */ |
| 61 | addr = 0; | 65 | addr = 0; |
diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c index 339be5a3ae6a..a5de8d45424c 100644 --- a/arch/blackfin/kernel/ipipe.c +++ b/arch/blackfin/kernel/ipipe.c | |||
| @@ -35,14 +35,8 @@ | |||
| 35 | #include <asm/atomic.h> | 35 | #include <asm/atomic.h> |
| 36 | #include <asm/io.h> | 36 | #include <asm/io.h> |
| 37 | 37 | ||
| 38 | static int create_irq_threads; | ||
| 39 | |||
| 40 | DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs); | 38 | DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs); |
| 41 | 39 | ||
| 42 | static DEFINE_PER_CPU(unsigned long, pending_irqthread_mask); | ||
| 43 | |||
| 44 | static DEFINE_PER_CPU(int [IVG13 + 1], pending_irq_count); | ||
| 45 | |||
| 46 | asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs); | 40 | asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs); |
| 47 | 41 | ||
| 48 | static void __ipipe_no_irqtail(void); | 42 | static void __ipipe_no_irqtail(void); |
| @@ -93,6 +87,7 @@ void __ipipe_enable_pipeline(void) | |||
| 93 | */ | 87 | */ |
| 94 | void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) | 88 | void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) |
| 95 | { | 89 | { |
| 90 | struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr(); | ||
| 96 | struct ipipe_domain *this_domain, *next_domain; | 91 | struct ipipe_domain *this_domain, *next_domain; |
| 97 | struct list_head *head, *pos; | 92 | struct list_head *head, *pos; |
| 98 | int m_ack, s = -1; | 93 | int m_ack, s = -1; |
| @@ -104,7 +99,6 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) | |||
| 104 | * interrupt. | 99 | * interrupt. |
| 105 | */ | 100 | */ |
| 106 | m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR); | 101 | m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR); |
| 107 | |||
| 108 | this_domain = ipipe_current_domain; | 102 | this_domain = ipipe_current_domain; |
| 109 | 103 | ||
| 110 | if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control))) | 104 | if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control))) |
| @@ -114,49 +108,28 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) | |||
| 114 | next_domain = list_entry(head, struct ipipe_domain, p_link); | 108 | next_domain = list_entry(head, struct ipipe_domain, p_link); |
| 115 | if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) { | 109 | if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) { |
| 116 | if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) | 110 | if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) |
| 117 | next_domain->irqs[irq].acknowledge(irq, irq_desc + irq); | 111 | next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq)); |
| 118 | if (test_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)) | 112 | if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status)) |
| 119 | s = __test_and_set_bit(IPIPE_STALL_FLAG, | 113 | s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status); |
| 120 | &ipipe_root_cpudom_var(status)); | ||
| 121 | __ipipe_dispatch_wired(next_domain, irq); | 114 | __ipipe_dispatch_wired(next_domain, irq); |
| 122 | goto finalize; | 115 | goto out; |
| 123 | return; | ||
| 124 | } | 116 | } |
| 125 | } | 117 | } |
| 126 | 118 | ||
| 127 | /* Ack the interrupt. */ | 119 | /* Ack the interrupt. */ |
| 128 | 120 | ||
| 129 | pos = head; | 121 | pos = head; |
| 130 | |||
| 131 | while (pos != &__ipipe_pipeline) { | 122 | while (pos != &__ipipe_pipeline) { |
| 132 | next_domain = list_entry(pos, struct ipipe_domain, p_link); | 123 | next_domain = list_entry(pos, struct ipipe_domain, p_link); |
| 133 | /* | ||
| 134 | * For each domain handling the incoming IRQ, mark it | ||
| 135 | * as pending in its log. | ||
| 136 | */ | ||
| 137 | if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) { | 124 | if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) { |
| 138 | /* | ||
| 139 | * Domains that handle this IRQ are polled for | ||
| 140 | * acknowledging it by decreasing priority | ||
| 141 | * order. The interrupt must be made pending | ||
| 142 | * _first_ in the domain's status flags before | ||
| 143 | * the PIC is unlocked. | ||
| 144 | */ | ||
| 145 | __ipipe_set_irq_pending(next_domain, irq); | 125 | __ipipe_set_irq_pending(next_domain, irq); |
| 146 | |||
| 147 | if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) { | 126 | if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) { |
| 148 | next_domain->irqs[irq].acknowledge(irq, irq_desc + irq); | 127 | next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq)); |
| 149 | m_ack = 1; | 128 | m_ack = 1; |
| 150 | } | 129 | } |
| 151 | } | 130 | } |
| 152 | |||
| 153 | /* | ||
| 154 | * If the domain does not want the IRQ to be passed | ||
| 155 | * down the interrupt pipe, exit the loop now. | ||
| 156 | */ | ||
| 157 | if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control)) | 131 | if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control)) |
| 158 | break; | 132 | break; |
| 159 | |||
| 160 | pos = next_domain->p_link.next; | 133 | pos = next_domain->p_link.next; |
| 161 | } | 134 | } |
| 162 | 135 | ||
| @@ -166,18 +139,24 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) | |||
| 166 | * immediately to the current domain if the interrupt has been | 139 | * immediately to the current domain if the interrupt has been |
| 167 | * marked as 'sticky'. This search does not go beyond the | 140 | * marked as 'sticky'. This search does not go beyond the |
| 168 | * current domain in the pipeline. We also enforce the | 141 | * current domain in the pipeline. We also enforce the |
| 169 | * additional root stage lock (blackfin-specific). */ | 142 | * additional root stage lock (blackfin-specific). |
| 143 | */ | ||
| 144 | if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status)) | ||
| 145 | s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status); | ||
| 170 | 146 | ||
| 171 | if (test_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)) | 147 | /* |
| 172 | s = __test_and_set_bit(IPIPE_STALL_FLAG, | 148 | * If the interrupt preempted the head domain, then do not |
| 173 | &ipipe_root_cpudom_var(status)); | 149 | * even try to walk the pipeline, unless an interrupt is |
| 174 | finalize: | 150 | * pending for it. |
| 151 | */ | ||
| 152 | if (test_bit(IPIPE_AHEAD_FLAG, &this_domain->flags) && | ||
| 153 | ipipe_head_cpudom_var(irqpend_himask) == 0) | ||
| 154 | goto out; | ||
| 175 | 155 | ||
| 176 | __ipipe_walk_pipeline(head); | 156 | __ipipe_walk_pipeline(head); |
| 177 | 157 | out: | |
| 178 | if (!s) | 158 | if (!s) |
| 179 | __clear_bit(IPIPE_STALL_FLAG, | 159 | __clear_bit(IPIPE_STALL_FLAG, &p->status); |
| 180 | &ipipe_root_cpudom_var(status)); | ||
| 181 | } | 160 | } |
| 182 | 161 | ||
| 183 | int __ipipe_check_root(void) | 162 | int __ipipe_check_root(void) |
| @@ -187,7 +166,7 @@ int __ipipe_check_root(void) | |||
| 187 | 166 | ||
| 188 | void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq) | 167 | void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq) |
| 189 | { | 168 | { |
| 190 | struct irq_desc *desc = irq_desc + irq; | 169 | struct irq_desc *desc = irq_to_desc(irq); |
| 191 | int prio = desc->ic_prio; | 170 | int prio = desc->ic_prio; |
| 192 | 171 | ||
| 193 | desc->depth = 0; | 172 | desc->depth = 0; |
| @@ -199,7 +178,7 @@ EXPORT_SYMBOL(__ipipe_enable_irqdesc); | |||
| 199 | 178 | ||
| 200 | void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq) | 179 | void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq) |
| 201 | { | 180 | { |
| 202 | struct irq_desc *desc = irq_desc + irq; | 181 | struct irq_desc *desc = irq_to_desc(irq); |
| 203 | int prio = desc->ic_prio; | 182 | int prio = desc->ic_prio; |
| 204 | 183 | ||
| 205 | if (ipd != &ipipe_root && | 184 | if (ipd != &ipipe_root && |
| @@ -236,15 +215,18 @@ int __ipipe_syscall_root(struct pt_regs *regs) | |||
| 236 | { | 215 | { |
| 237 | unsigned long flags; | 216 | unsigned long flags; |
| 238 | 217 | ||
| 239 | /* We need to run the IRQ tail hook whenever we don't | 218 | /* |
| 219 | * We need to run the IRQ tail hook whenever we don't | ||
| 240 | * propagate a syscall to higher domains, because we know that | 220 | * propagate a syscall to higher domains, because we know that |
| 241 | * important operations might be pending there (e.g. Xenomai | 221 | * important operations might be pending there (e.g. Xenomai |
| 242 | * deferred rescheduling). */ | 222 | * deferred rescheduling). |
| 223 | */ | ||
| 243 | 224 | ||
| 244 | if (!__ipipe_syscall_watched_p(current, regs->orig_p0)) { | 225 | if (regs->orig_p0 < NR_syscalls) { |
| 245 | void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook; | 226 | void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook; |
| 246 | hook(); | 227 | hook(); |
| 247 | return 0; | 228 | if ((current->flags & PF_EVNOTIFY) == 0) |
| 229 | return 0; | ||
| 248 | } | 230 | } |
| 249 | 231 | ||
| 250 | /* | 232 | /* |
| @@ -312,112 +294,46 @@ int ipipe_trigger_irq(unsigned irq) | |||
| 312 | { | 294 | { |
| 313 | unsigned long flags; | 295 | unsigned long flags; |
| 314 | 296 | ||
| 297 | #ifdef CONFIG_IPIPE_DEBUG | ||
| 315 | if (irq >= IPIPE_NR_IRQS || | 298 | if (irq >= IPIPE_NR_IRQS || |
| 316 | (ipipe_virtual_irq_p(irq) | 299 | (ipipe_virtual_irq_p(irq) |
| 317 | && !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map))) | 300 | && !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map))) |
| 318 | return -EINVAL; | 301 | return -EINVAL; |
| 302 | #endif | ||
| 319 | 303 | ||
| 320 | local_irq_save_hw(flags); | 304 | local_irq_save_hw(flags); |
| 321 | |||
| 322 | __ipipe_handle_irq(irq, NULL); | 305 | __ipipe_handle_irq(irq, NULL); |
| 323 | |||
| 324 | local_irq_restore_hw(flags); | 306 | local_irq_restore_hw(flags); |
| 325 | 307 | ||
| 326 | return 1; | 308 | return 1; |
| 327 | } | 309 | } |
| 328 | 310 | ||
| 329 | /* Move Linux IRQ to threads. */ | 311 | asmlinkage void __ipipe_sync_root(void) |
| 330 | |||
| 331 | static int do_irqd(void *__desc) | ||
| 332 | { | 312 | { |
| 333 | struct irq_desc *desc = __desc; | 313 | unsigned long flags; |
| 334 | unsigned irq = desc - irq_desc; | ||
| 335 | int thrprio = desc->thr_prio; | ||
| 336 | int thrmask = 1 << thrprio; | ||
| 337 | int cpu = smp_processor_id(); | ||
| 338 | cpumask_t cpumask; | ||
| 339 | |||
| 340 | sigfillset(¤t->blocked); | ||
| 341 | current->flags |= PF_NOFREEZE; | ||
| 342 | cpumask = cpumask_of_cpu(cpu); | ||
| 343 | set_cpus_allowed(current, cpumask); | ||
| 344 | ipipe_setscheduler_root(current, SCHED_FIFO, 50 + thrprio); | ||
| 345 | |||
| 346 | while (!kthread_should_stop()) { | ||
| 347 | local_irq_disable(); | ||
| 348 | if (!(desc->status & IRQ_SCHEDULED)) { | ||
| 349 | set_current_state(TASK_INTERRUPTIBLE); | ||
| 350 | resched: | ||
| 351 | local_irq_enable(); | ||
| 352 | schedule(); | ||
| 353 | local_irq_disable(); | ||
| 354 | } | ||
| 355 | __set_current_state(TASK_RUNNING); | ||
| 356 | /* | ||
| 357 | * If higher priority interrupt servers are ready to | ||
| 358 | * run, reschedule immediately. We need this for the | ||
| 359 | * GPIO demux IRQ handler to unmask the interrupt line | ||
| 360 | * _last_, after all GPIO IRQs have run. | ||
| 361 | */ | ||
| 362 | if (per_cpu(pending_irqthread_mask, cpu) & ~(thrmask|(thrmask-1))) | ||
| 363 | goto resched; | ||
| 364 | if (--per_cpu(pending_irq_count[thrprio], cpu) == 0) | ||
| 365 | per_cpu(pending_irqthread_mask, cpu) &= ~thrmask; | ||
| 366 | desc->status &= ~IRQ_SCHEDULED; | ||
| 367 | desc->thr_handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); | ||
| 368 | local_irq_enable(); | ||
| 369 | } | ||
| 370 | __set_current_state(TASK_RUNNING); | ||
| 371 | return 0; | ||
| 372 | } | ||
| 373 | 314 | ||
| 374 | static void kick_irqd(unsigned irq, void *cookie) | 315 | BUG_ON(irqs_disabled()); |
| 375 | { | ||
| 376 | struct irq_desc *desc = irq_desc + irq; | ||
| 377 | int thrprio = desc->thr_prio; | ||
| 378 | int thrmask = 1 << thrprio; | ||
| 379 | int cpu = smp_processor_id(); | ||
| 380 | |||
| 381 | if (!(desc->status & IRQ_SCHEDULED)) { | ||
| 382 | desc->status |= IRQ_SCHEDULED; | ||
| 383 | per_cpu(pending_irqthread_mask, cpu) |= thrmask; | ||
| 384 | ++per_cpu(pending_irq_count[thrprio], cpu); | ||
| 385 | wake_up_process(desc->thread); | ||
| 386 | } | ||
| 387 | } | ||
| 388 | 316 | ||
| 389 | int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc) | 317 | local_irq_save_hw(flags); |
| 390 | { | ||
| 391 | if (desc->thread || !create_irq_threads) | ||
| 392 | return 0; | ||
| 393 | |||
| 394 | desc->thread = kthread_create(do_irqd, desc, "IRQ %d", irq); | ||
| 395 | if (desc->thread == NULL) { | ||
| 396 | printk(KERN_ERR "irqd: could not create IRQ thread %d!\n", irq); | ||
| 397 | return -ENOMEM; | ||
| 398 | } | ||
| 399 | 318 | ||
| 400 | wake_up_process(desc->thread); | 319 | clear_thread_flag(TIF_IRQ_SYNC); |
| 401 | 320 | ||
| 402 | desc->thr_handler = ipipe_root_domain->irqs[irq].handler; | 321 | if (ipipe_root_cpudom_var(irqpend_himask) != 0) |
| 403 | ipipe_root_domain->irqs[irq].handler = &kick_irqd; | 322 | __ipipe_sync_pipeline(IPIPE_IRQMASK_ANY); |
| 404 | 323 | ||
| 405 | return 0; | 324 | local_irq_restore_hw(flags); |
| 406 | } | 325 | } |
| 407 | 326 | ||
| 408 | void __init ipipe_init_irq_threads(void) | 327 | void ___ipipe_sync_pipeline(unsigned long syncmask) |
| 409 | { | 328 | { |
| 410 | unsigned irq; | 329 | struct ipipe_domain *ipd = ipipe_current_domain; |
| 411 | struct irq_desc *desc; | ||
| 412 | |||
| 413 | create_irq_threads = 1; | ||
| 414 | 330 | ||
| 415 | for (irq = 0; irq < NR_IRQS; irq++) { | 331 | if (ipd == ipipe_root_domain) { |
| 416 | desc = irq_desc + irq; | 332 | if (test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status))) |
| 417 | if (desc->action != NULL || | 333 | return; |
| 418 | (desc->status & IRQ_NOREQUEST) != 0) | ||
| 419 | ipipe_start_irq_thread(irq, desc); | ||
| 420 | } | 334 | } |
| 335 | |||
| 336 | __ipipe_sync_stage(syncmask); | ||
| 421 | } | 337 | } |
| 422 | 338 | ||
| 423 | EXPORT_SYMBOL(show_stack); | 339 | EXPORT_SYMBOL(show_stack); |
diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c index 75724eee6494..7fd126564846 100644 --- a/arch/blackfin/kernel/irqchip.c +++ b/arch/blackfin/kernel/irqchip.c | |||
| @@ -144,11 +144,15 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs) | |||
| 144 | #endif | 144 | #endif |
| 145 | generic_handle_irq(irq); | 145 | generic_handle_irq(irq); |
| 146 | 146 | ||
| 147 | #ifndef CONFIG_IPIPE /* Useless and bugous over the I-pipe: IRQs are threaded. */ | 147 | #ifndef CONFIG_IPIPE |
| 148 | /* If we're the only interrupt running (ignoring IRQ15 which is for | 148 | /* |
| 149 | syscalls), lower our priority to IRQ14 so that softirqs run at | 149 | * If we're the only interrupt running (ignoring IRQ15 which |
| 150 | that level. If there's another, lower-level interrupt, irq_exit | 150 | * is for syscalls), lower our priority to IRQ14 so that |
| 151 | will defer softirqs to that. */ | 151 | * softirqs run at that level. If there's another, |
| 152 | * lower-level interrupt, irq_exit will defer softirqs to | ||
| 153 | * that. If the interrupt pipeline is enabled, we are already | ||
| 154 | * running at IRQ14 priority, so we don't need this code. | ||
| 155 | */ | ||
| 152 | CSYNC(); | 156 | CSYNC(); |
| 153 | pending = bfin_read_IPEND() & ~0x8000; | 157 | pending = bfin_read_IPEND() & ~0x8000; |
| 154 | other_ints = pending & (pending - 1); | 158 | other_ints = pending & (pending - 1); |
diff --git a/arch/blackfin/kernel/kgdb_test.c b/arch/blackfin/kernel/kgdb_test.c index 3dba9c17304a..dbcf3e45cb0b 100644 --- a/arch/blackfin/kernel/kgdb_test.c +++ b/arch/blackfin/kernel/kgdb_test.c | |||
| @@ -20,6 +20,7 @@ | |||
| 20 | static char cmdline[256]; | 20 | static char cmdline[256]; |
| 21 | static unsigned long len; | 21 | static unsigned long len; |
| 22 | 22 | ||
| 23 | #ifndef CONFIG_SMP | ||
| 23 | static int num1 __attribute__((l1_data)); | 24 | static int num1 __attribute__((l1_data)); |
| 24 | 25 | ||
| 25 | void kgdb_l1_test(void) __attribute__((l1_text)); | 26 | void kgdb_l1_test(void) __attribute__((l1_text)); |
| @@ -32,6 +33,8 @@ void kgdb_l1_test(void) | |||
| 32 | printk(KERN_ALERT "L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1); | 33 | printk(KERN_ALERT "L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1); |
| 33 | return ; | 34 | return ; |
| 34 | } | 35 | } |
| 36 | #endif | ||
| 37 | |||
| 35 | #if L2_LENGTH | 38 | #if L2_LENGTH |
| 36 | 39 | ||
| 37 | static int num2 __attribute__((l2)); | 40 | static int num2 __attribute__((l2)); |
| @@ -59,10 +62,12 @@ int kgdb_test(char *name, int len, int count, int z) | |||
| 59 | static int test_proc_output(char *buf) | 62 | static int test_proc_output(char *buf) |
| 60 | { | 63 | { |
| 61 | kgdb_test("hello world!", 12, 0x55, 0x10); | 64 | kgdb_test("hello world!", 12, 0x55, 0x10); |
| 65 | #ifndef CONFIG_SMP | ||
| 62 | kgdb_l1_test(); | 66 | kgdb_l1_test(); |
| 63 | #if L2_LENGTH | 67 | #endif |
| 68 | #if L2_LENGTH | ||
| 64 | kgdb_l2_test(); | 69 | kgdb_l2_test(); |
| 65 | #endif | 70 | #endif |
| 66 | 71 | ||
| 67 | return 0; | 72 | return 0; |
| 68 | } | 73 | } |
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c index 594e325b40e4..d76618db50df 100644 --- a/arch/blackfin/kernel/ptrace.c +++ b/arch/blackfin/kernel/ptrace.c | |||
| @@ -45,6 +45,7 @@ | |||
| 45 | #include <asm/asm-offsets.h> | 45 | #include <asm/asm-offsets.h> |
| 46 | #include <asm/dma.h> | 46 | #include <asm/dma.h> |
| 47 | #include <asm/fixed_code.h> | 47 | #include <asm/fixed_code.h> |
| 48 | #include <asm/cacheflush.h> | ||
| 48 | #include <asm/mem_map.h> | 49 | #include <asm/mem_map.h> |
| 49 | 50 | ||
| 50 | #define TEXT_OFFSET 0 | 51 | #define TEXT_OFFSET 0 |
| @@ -240,7 +241,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 240 | 241 | ||
| 241 | } else if (addr >= FIXED_CODE_START | 242 | } else if (addr >= FIXED_CODE_START |
| 242 | && addr + sizeof(tmp) <= FIXED_CODE_END) { | 243 | && addr + sizeof(tmp) <= FIXED_CODE_END) { |
| 243 | memcpy(&tmp, (const void *)(addr), sizeof(tmp)); | 244 | copy_from_user_page(0, 0, 0, &tmp, (const void *)(addr), sizeof(tmp)); |
| 244 | copied = sizeof(tmp); | 245 | copied = sizeof(tmp); |
| 245 | 246 | ||
| 246 | } else | 247 | } else |
| @@ -320,7 +321,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 320 | 321 | ||
| 321 | } else if (addr >= FIXED_CODE_START | 322 | } else if (addr >= FIXED_CODE_START |
| 322 | && addr + sizeof(data) <= FIXED_CODE_END) { | 323 | && addr + sizeof(data) <= FIXED_CODE_END) { |
| 323 | memcpy((void *)(addr), &data, sizeof(data)); | 324 | copy_to_user_page(0, 0, 0, (void *)(addr), &data, sizeof(data)); |
| 324 | copied = sizeof(data); | 325 | copied = sizeof(data); |
| 325 | 326 | ||
| 326 | } else | 327 | } else |
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index e5c116230800..a58687bdee6a 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c | |||
| @@ -889,6 +889,10 @@ void __init setup_arch(char **cmdline_p) | |||
| 889 | CPU, bfin_revid()); | 889 | CPU, bfin_revid()); |
| 890 | } | 890 | } |
| 891 | 891 | ||
| 892 | /* We can't run on BF548-0.1 due to ANOMALY 05000448 */ | ||
| 893 | if (bfin_cpuid() == 0x27de && bfin_revid() == 1) | ||
| 894 | panic("You can't run on this processor due to 05000448\n"); | ||
| 895 | |||
| 892 | printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); | 896 | printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); |
| 893 | 897 | ||
| 894 | printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", | 898 | printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", |
| @@ -1141,12 +1145,12 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
| 1141 | icache_size = 0; | 1145 | icache_size = 0; |
| 1142 | 1146 | ||
| 1143 | seq_printf(m, "cache size\t: %d KB(L1 icache) " | 1147 | seq_printf(m, "cache size\t: %d KB(L1 icache) " |
| 1144 | "%d KB(L1 dcache-%s) %d KB(L2 cache)\n", | 1148 | "%d KB(L1 dcache%s) %d KB(L2 cache)\n", |
| 1145 | icache_size, dcache_size, | 1149 | icache_size, dcache_size, |
| 1146 | #if defined CONFIG_BFIN_WB | 1150 | #if defined CONFIG_BFIN_WB |
| 1147 | "wb" | 1151 | "-wb" |
| 1148 | #elif defined CONFIG_BFIN_WT | 1152 | #elif defined CONFIG_BFIN_WT |
| 1149 | "wt" | 1153 | "-wt" |
| 1150 | #endif | 1154 | #endif |
| 1151 | "", 0); | 1155 | "", 0); |
| 1152 | 1156 | ||
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c index 172b4c588467..1bbacfbd4c5d 100644 --- a/arch/blackfin/kernel/time.c +++ b/arch/blackfin/kernel/time.c | |||
| @@ -134,7 +134,10 @@ irqreturn_t timer_interrupt(int irq, void *dummy) | |||
| 134 | 134 | ||
| 135 | write_seqlock(&xtime_lock); | 135 | write_seqlock(&xtime_lock); |
| 136 | #if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE) | 136 | #if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE) |
| 137 | /* FIXME: Here TIMIL0 is not set when IPIPE enabled, why? */ | 137 | /* |
| 138 | * TIMIL0 is latched in __ipipe_grab_irq() when the I-Pipe is | ||
| 139 | * enabled. | ||
| 140 | */ | ||
| 138 | if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) { | 141 | if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) { |
| 139 | #endif | 142 | #endif |
| 140 | do_timer(1); | 143 | do_timer(1); |
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c index 0e175342112e..41f2eacfef20 100644 --- a/arch/blackfin/mach-bf518/boards/ezbrd.c +++ b/arch/blackfin/mach-bf518/boards/ezbrd.c | |||
| @@ -113,7 +113,6 @@ static struct platform_device bfin_mac_device = { | |||
| 113 | .name = "bfin_mac", | 113 | .name = "bfin_mac", |
| 114 | .dev.platform_data = &bfin_mii_bus, | 114 | .dev.platform_data = &bfin_mii_bus, |
| 115 | }; | 115 | }; |
| 116 | #endif | ||
| 117 | 116 | ||
| 118 | #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) | 117 | #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) |
| 119 | static struct dsa_platform_data ksz8893m_switch_data = { | 118 | static struct dsa_platform_data ksz8893m_switch_data = { |
| @@ -132,6 +131,7 @@ static struct platform_device ksz8893m_switch_device = { | |||
| 132 | .dev.platform_data = &ksz8893m_switch_data, | 131 | .dev.platform_data = &ksz8893m_switch_data, |
| 133 | }; | 132 | }; |
| 134 | #endif | 133 | #endif |
| 134 | #endif | ||
| 135 | 135 | ||
| 136 | #if defined(CONFIG_MTD_M25P80) \ | 136 | #if defined(CONFIG_MTD_M25P80) \ |
| 137 | || defined(CONFIG_MTD_M25P80_MODULE) | 137 | || defined(CONFIG_MTD_M25P80_MODULE) |
| @@ -171,6 +171,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = { | |||
| 171 | }; | 171 | }; |
| 172 | #endif | 172 | #endif |
| 173 | 173 | ||
| 174 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | ||
| 174 | #if defined(CONFIG_NET_DSA_KSZ8893M) \ | 175 | #if defined(CONFIG_NET_DSA_KSZ8893M) \ |
| 175 | || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) | 176 | || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) |
| 176 | /* SPI SWITCH CHIP */ | 177 | /* SPI SWITCH CHIP */ |
| @@ -179,10 +180,11 @@ static struct bfin5xx_spi_chip spi_switch_info = { | |||
| 179 | .bits_per_word = 8, | 180 | .bits_per_word = 8, |
| 180 | }; | 181 | }; |
| 181 | #endif | 182 | #endif |
| 183 | #endif | ||
| 182 | 184 | ||
| 183 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 185 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 184 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 186 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
| 185 | .enable_dma = 1, | 187 | .enable_dma = 0, |
| 186 | .bits_per_word = 8, | 188 | .bits_per_word = 8, |
| 187 | }; | 189 | }; |
| 188 | #endif | 190 | #endif |
| @@ -259,6 +261,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 259 | }, | 261 | }, |
| 260 | #endif | 262 | #endif |
| 261 | 263 | ||
| 264 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | ||
| 262 | #if defined(CONFIG_NET_DSA_KSZ8893M) \ | 265 | #if defined(CONFIG_NET_DSA_KSZ8893M) \ |
| 263 | || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) | 266 | || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) |
| 264 | { | 267 | { |
| @@ -271,24 +274,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 271 | .mode = SPI_MODE_3, | 274 | .mode = SPI_MODE_3, |
| 272 | }, | 275 | }, |
| 273 | #endif | 276 | #endif |
| 277 | #endif | ||
| 274 | 278 | ||
| 275 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 279 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 276 | { | 280 | { |
| 277 | .modalias = "spi_mmc_dummy", | 281 | .modalias = "mmc_spi", |
| 278 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 282 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| 279 | .bus_num = 0, | 283 | .bus_num = 0, |
| 280 | .chip_select = 0, | 284 | .chip_select = 5, |
| 281 | .platform_data = NULL, | 285 | .controller_data = &mmc_spi_chip_info, |
| 282 | .controller_data = &spi_mmc_chip_info, | ||
| 283 | .mode = SPI_MODE_3, | ||
| 284 | }, | ||
| 285 | { | ||
| 286 | .modalias = "spi_mmc", | ||
| 287 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
| 288 | .bus_num = 0, | ||
| 289 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | ||
| 290 | .platform_data = NULL, | ||
| 291 | .controller_data = &spi_mmc_chip_info, | ||
| 292 | .mode = SPI_MODE_3, | 286 | .mode = SPI_MODE_3, |
| 293 | }, | 287 | }, |
| 294 | #endif | 288 | #endif |
| @@ -630,11 +624,10 @@ static struct platform_device *stamp_devices[] __initdata = { | |||
| 630 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 624 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
| 631 | &bfin_mii_bus, | 625 | &bfin_mii_bus, |
| 632 | &bfin_mac_device, | 626 | &bfin_mac_device, |
| 633 | #endif | ||
| 634 | |||
| 635 | #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) | 627 | #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) |
| 636 | &ksz8893m_switch_device, | 628 | &ksz8893m_switch_device, |
| 637 | #endif | 629 | #endif |
| 630 | #endif | ||
| 638 | 631 | ||
| 639 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | 632 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 640 | &bfin_spi0_device, | 633 | &bfin_spi0_device, |
diff --git a/arch/blackfin/mach-bf518/include/mach/anomaly.h b/arch/blackfin/mach-bf518/include/mach/anomaly.h index e5b4bef0edae..c847bb101076 100644 --- a/arch/blackfin/mach-bf518/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf518/include/mach/anomaly.h | |||
| @@ -2,12 +2,12 @@ | |||
| 2 | * File: include/asm-blackfin/mach-bf518/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf518/anomaly.h |
| 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 4 | * | 4 | * |
| 5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | /* This file shoule be up to date with: | 9 | /* This file shoule be up to date with: |
| 10 | * - ???? | 10 | * - Revision B, 02/03/2009; ADSP-BF512/BF514/BF516/BF518 Blackfin Processor Anomaly List |
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| 13 | #ifndef _MACH_ANOMALY_H_ | 13 | #ifndef _MACH_ANOMALY_H_ |
| @@ -19,6 +19,8 @@ | |||
| 19 | #define ANOMALY_05000122 (1) | 19 | #define ANOMALY_05000122 (1) |
| 20 | /* False Hardware Error from an Access in the Shadow of a Conditional Branch */ | 20 | /* False Hardware Error from an Access in the Shadow of a Conditional Branch */ |
| 21 | #define ANOMALY_05000245 (1) | 21 | #define ANOMALY_05000245 (1) |
| 22 | /* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */ | ||
| 23 | #define ANOMALY_05000254 (1) | ||
| 22 | /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ | 24 | /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ |
| 23 | #define ANOMALY_05000265 (1) | 25 | #define ANOMALY_05000265 (1) |
| 24 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ | 26 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ |
| @@ -53,6 +55,12 @@ | |||
| 53 | #define ANOMALY_05000443 (1) | 55 | #define ANOMALY_05000443 (1) |
| 54 | /* Incorrect L1 Instruction Bank B Memory Map Location */ | 56 | /* Incorrect L1 Instruction Bank B Memory Map Location */ |
| 55 | #define ANOMALY_05000444 (1) | 57 | #define ANOMALY_05000444 (1) |
| 58 | /* Incorrect Default Hysteresis Setting for RESET, NMI, and BMODE Signals */ | ||
| 59 | #define ANOMALY_05000452 (1) | ||
| 60 | /* PWM_TRIPB Signal Not Available on PG10 */ | ||
| 61 | #define ANOMALY_05000453 (1) | ||
| 62 | /* PPI_FS3 is Driven One Half Cycle Later Than PPI Data */ | ||
| 63 | #define ANOMALY_05000455 (1) | ||
| 56 | 64 | ||
| 57 | /* Anomalies that don't exist on this proc */ | 65 | /* Anomalies that don't exist on this proc */ |
| 58 | #define ANOMALY_05000125 (0) | 66 | #define ANOMALY_05000125 (0) |
| @@ -65,15 +73,20 @@ | |||
| 65 | #define ANOMALY_05000263 (0) | 73 | #define ANOMALY_05000263 (0) |
| 66 | #define ANOMALY_05000266 (0) | 74 | #define ANOMALY_05000266 (0) |
| 67 | #define ANOMALY_05000273 (0) | 75 | #define ANOMALY_05000273 (0) |
| 76 | #define ANOMALY_05000278 (0) | ||
| 68 | #define ANOMALY_05000285 (0) | 77 | #define ANOMALY_05000285 (0) |
| 78 | #define ANOMALY_05000305 (0) | ||
| 69 | #define ANOMALY_05000307 (0) | 79 | #define ANOMALY_05000307 (0) |
| 70 | #define ANOMALY_05000311 (0) | 80 | #define ANOMALY_05000311 (0) |
| 71 | #define ANOMALY_05000312 (0) | 81 | #define ANOMALY_05000312 (0) |
| 72 | #define ANOMALY_05000323 (0) | 82 | #define ANOMALY_05000323 (0) |
| 73 | #define ANOMALY_05000353 (0) | 83 | #define ANOMALY_05000353 (0) |
| 74 | #define ANOMALY_05000363 (0) | 84 | #define ANOMALY_05000363 (0) |
| 85 | #define ANOMALY_05000380 (0) | ||
| 75 | #define ANOMALY_05000386 (0) | 86 | #define ANOMALY_05000386 (0) |
| 76 | #define ANOMALY_05000412 (0) | 87 | #define ANOMALY_05000412 (0) |
| 77 | #define ANOMALY_05000432 (0) | 88 | #define ANOMALY_05000432 (0) |
| 89 | #define ANOMALY_05000447 (0) | ||
| 90 | #define ANOMALY_05000448 (0) | ||
| 78 | 91 | ||
| 79 | #endif | 92 | #endif |
diff --git a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h index b50a63b975a2..e21c1c3e4ec7 100644 --- a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h | |||
| @@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 144 | CH_UART0_TX, | 144 | CH_UART0_TX, |
| 145 | CH_UART0_RX, | 145 | CH_UART0_RX, |
| 146 | #endif | 146 | #endif |
| 147 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 147 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 148 | CONFIG_UART0_CTS_PIN, | 148 | CONFIG_UART0_CTS_PIN, |
| 149 | CONFIG_UART0_RTS_PIN, | 149 | CONFIG_UART0_RTS_PIN, |
| 150 | #endif | 150 | #endif |
| @@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 158 | CH_UART1_TX, | 158 | CH_UART1_TX, |
| 159 | CH_UART1_RX, | 159 | CH_UART1_RX, |
| 160 | #endif | 160 | #endif |
| 161 | #ifdef CONFIG_BFIN_UART1_CTSRTS | 161 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 162 | CONFIG_UART1_CTS_PIN, | 162 | CONFIG_UART1_CTS_PIN, |
| 163 | CONFIG_UART1_RTS_PIN, | 163 | CONFIG_UART1_RTS_PIN, |
| 164 | #endif | 164 | #endif |
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c index 856c097b5317..48e69eecdba4 100644 --- a/arch/blackfin/mach-bf527/boards/cm_bf527.c +++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c | |||
| @@ -487,9 +487,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |||
| 487 | }; | 487 | }; |
| 488 | #endif | 488 | #endif |
| 489 | 489 | ||
| 490 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 490 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 491 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 491 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
| 492 | .enable_dma = 1, | 492 | .enable_dma = 0, |
| 493 | .bits_per_word = 8, | 493 | .bits_per_word = 8, |
| 494 | }; | 494 | }; |
| 495 | #endif | 495 | #endif |
| @@ -585,23 +585,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 585 | .controller_data = &ad9960_spi_chip_info, | 585 | .controller_data = &ad9960_spi_chip_info, |
| 586 | }, | 586 | }, |
| 587 | #endif | 587 | #endif |
| 588 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 588 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 589 | { | 589 | { |
| 590 | .modalias = "spi_mmc_dummy", | 590 | .modalias = "mmc_spi", |
| 591 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 591 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
| 592 | .bus_num = 0, | ||
| 593 | .chip_select = 0, | ||
| 594 | .platform_data = NULL, | ||
| 595 | .controller_data = &spi_mmc_chip_info, | ||
| 596 | .mode = SPI_MODE_3, | ||
| 597 | }, | ||
| 598 | { | ||
| 599 | .modalias = "spi_mmc", | ||
| 600 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
| 601 | .bus_num = 0, | 592 | .bus_num = 0, |
| 602 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 593 | .chip_select = 5, |
| 603 | .platform_data = NULL, | 594 | .controller_data = &mmc_spi_chip_info, |
| 604 | .controller_data = &spi_mmc_chip_info, | ||
| 605 | .mode = SPI_MODE_3, | 595 | .mode = SPI_MODE_3, |
| 606 | }, | 596 | }, |
| 607 | #endif | 597 | #endif |
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c index 83606fcdde27..7fe480e4ebe8 100644 --- a/arch/blackfin/mach-bf527/boards/ezbrd.c +++ b/arch/blackfin/mach-bf527/boards/ezbrd.c | |||
| @@ -256,9 +256,9 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = { | |||
| 256 | }; | 256 | }; |
| 257 | #endif | 257 | #endif |
| 258 | 258 | ||
| 259 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 259 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 260 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 260 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
| 261 | .enable_dma = 1, | 261 | .enable_dma = 0, |
| 262 | .bits_per_word = 8, | 262 | .bits_per_word = 8, |
| 263 | }; | 263 | }; |
| 264 | #endif | 264 | #endif |
| @@ -366,23 +366,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 366 | }, | 366 | }, |
| 367 | #endif | 367 | #endif |
| 368 | 368 | ||
| 369 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 369 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 370 | { | 370 | { |
| 371 | .modalias = "spi_mmc_dummy", | 371 | .modalias = "mmc_spi", |
| 372 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 372 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| 373 | .bus_num = 0, | 373 | .bus_num = 0, |
| 374 | .chip_select = 0, | 374 | .chip_select = 5, |
| 375 | .platform_data = NULL, | 375 | .controller_data = &mmc_spi_chip_info, |
| 376 | .controller_data = &spi_mmc_chip_info, | ||
| 377 | .mode = SPI_MODE_3, | ||
| 378 | }, | ||
| 379 | { | ||
| 380 | .modalias = "spi_mmc", | ||
| 381 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
| 382 | .bus_num = 0, | ||
| 383 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | ||
| 384 | .platform_data = NULL, | ||
| 385 | .controller_data = &spi_mmc_chip_info, | ||
| 386 | .mode = SPI_MODE_3, | 376 | .mode = SPI_MODE_3, |
| 387 | }, | 377 | }, |
| 388 | #endif | 378 | #endif |
diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h index 035e8d835058..df6808d8a6ef 100644 --- a/arch/blackfin/mach-bf527/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf527/include/mach/anomaly.h | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * File: include/asm-blackfin/mach-bf527/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf527/anomaly.h |
| 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 4 | * | 4 | * |
| 5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| @@ -167,12 +167,16 @@ | |||
| 167 | #define ANOMALY_05000263 (0) | 167 | #define ANOMALY_05000263 (0) |
| 168 | #define ANOMALY_05000266 (0) | 168 | #define ANOMALY_05000266 (0) |
| 169 | #define ANOMALY_05000273 (0) | 169 | #define ANOMALY_05000273 (0) |
| 170 | #define ANOMALY_05000278 (0) | ||
| 170 | #define ANOMALY_05000285 (0) | 171 | #define ANOMALY_05000285 (0) |
| 172 | #define ANOMALY_05000305 (0) | ||
| 171 | #define ANOMALY_05000307 (0) | 173 | #define ANOMALY_05000307 (0) |
| 172 | #define ANOMALY_05000311 (0) | 174 | #define ANOMALY_05000311 (0) |
| 173 | #define ANOMALY_05000312 (0) | 175 | #define ANOMALY_05000312 (0) |
| 174 | #define ANOMALY_05000323 (0) | 176 | #define ANOMALY_05000323 (0) |
| 175 | #define ANOMALY_05000363 (0) | 177 | #define ANOMALY_05000363 (0) |
| 176 | #define ANOMALY_05000412 (0) | 178 | #define ANOMALY_05000412 (0) |
| 179 | #define ANOMALY_05000447 (0) | ||
| 180 | #define ANOMALY_05000448 (0) | ||
| 177 | 181 | ||
| 178 | #endif | 182 | #endif |
diff --git a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h index 75722d6008b0..e8c41fd842b5 100644 --- a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h | |||
| @@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 144 | CH_UART0_TX, | 144 | CH_UART0_TX, |
| 145 | CH_UART0_RX, | 145 | CH_UART0_RX, |
| 146 | #endif | 146 | #endif |
| 147 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 147 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 148 | CONFIG_UART0_CTS_PIN, | 148 | CONFIG_UART0_CTS_PIN, |
| 149 | CONFIG_UART0_RTS_PIN, | 149 | CONFIG_UART0_RTS_PIN, |
| 150 | #endif | 150 | #endif |
| @@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 158 | CH_UART1_TX, | 158 | CH_UART1_TX, |
| 159 | CH_UART1_RX, | 159 | CH_UART1_RX, |
| 160 | #endif | 160 | #endif |
| 161 | #ifdef CONFIG_BFIN_UART1_CTSRTS | 161 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 162 | CONFIG_UART1_CTS_PIN, | 162 | CONFIG_UART1_CTS_PIN, |
| 163 | CONFIG_UART1_RTS_PIN, | 163 | CONFIG_UART1_RTS_PIN, |
| 164 | #endif | 164 | #endif |
diff --git a/arch/blackfin/mach-bf533/boards/Kconfig b/arch/blackfin/mach-bf533/boards/Kconfig index 308c98dc5aba..8d8b3e7321e6 100644 --- a/arch/blackfin/mach-bf533/boards/Kconfig +++ b/arch/blackfin/mach-bf533/boards/Kconfig | |||
| @@ -38,9 +38,4 @@ config BFIN532_IP0X | |||
| 38 | help | 38 | help |
| 39 | Core support for IP04/IP04 open hardware IP-PBX. | 39 | Core support for IP04/IP04 open hardware IP-PBX. |
| 40 | 40 | ||
| 41 | config GENERIC_BF533_BOARD | ||
| 42 | bool "Generic" | ||
| 43 | help | ||
| 44 | Generic or Custom board support. | ||
| 45 | |||
| 46 | endchoice | 41 | endchoice |
diff --git a/arch/blackfin/mach-bf533/boards/Makefile b/arch/blackfin/mach-bf533/boards/Makefile index 9afbe72b484f..ff1e832f80d2 100644 --- a/arch/blackfin/mach-bf533/boards/Makefile +++ b/arch/blackfin/mach-bf533/boards/Makefile | |||
| @@ -2,7 +2,6 @@ | |||
| 2 | # arch/blackfin/mach-bf533/boards/Makefile | 2 | # arch/blackfin/mach-bf533/boards/Makefile |
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | obj-$(CONFIG_GENERIC_BF533_BOARD) += generic_board.o | ||
| 6 | obj-$(CONFIG_BFIN533_STAMP) += stamp.o | 5 | obj-$(CONFIG_BFIN533_STAMP) += stamp.o |
| 7 | obj-$(CONFIG_BFIN532_IP0X) += ip0x.o | 6 | obj-$(CONFIG_BFIN532_IP0X) += ip0x.o |
| 8 | obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o | 7 | obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o |
diff --git a/arch/blackfin/mach-bf533/boards/blackstamp.c b/arch/blackfin/mach-bf533/boards/blackstamp.c index 015c18f85e7f..0765872a8ada 100644 --- a/arch/blackfin/mach-bf533/boards/blackstamp.c +++ b/arch/blackfin/mach-bf533/boards/blackstamp.c | |||
| @@ -101,9 +101,9 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 101 | }; | 101 | }; |
| 102 | #endif | 102 | #endif |
| 103 | 103 | ||
| 104 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 104 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 105 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 105 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
| 106 | .enable_dma = 1, | 106 | .enable_dma = 0, |
| 107 | .bits_per_word = 8, | 107 | .bits_per_word = 8, |
| 108 | }; | 108 | }; |
| 109 | #endif | 109 | #endif |
| @@ -129,23 +129,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 129 | }, | 129 | }, |
| 130 | #endif | 130 | #endif |
| 131 | 131 | ||
| 132 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 132 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 133 | { | ||
| 134 | .modalias = "spi_mmc_dummy", | ||
| 135 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | ||
| 136 | .bus_num = 0, | ||
| 137 | .chip_select = 0, | ||
| 138 | .platform_data = NULL, | ||
| 139 | .controller_data = &spi_mmc_chip_info, | ||
| 140 | .mode = SPI_MODE_3, | ||
| 141 | }, | ||
| 142 | { | 133 | { |
| 143 | .modalias = "spi_mmc", | 134 | .modalias = "mmc_spi", |
| 144 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | 135 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
| 145 | .bus_num = 0, | 136 | .bus_num = 0, |
| 146 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 137 | .chip_select = 5, |
| 147 | .platform_data = NULL, | 138 | .controller_data = &mmc_spi_chip_info, |
| 148 | .controller_data = &spi_mmc_chip_info, | ||
| 149 | .mode = SPI_MODE_3, | 139 | .mode = SPI_MODE_3, |
| 150 | }, | 140 | }, |
| 151 | #endif | 141 | #endif |
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c index e7061c7e8c42..e8974878d8c2 100644 --- a/arch/blackfin/mach-bf533/boards/cm_bf533.c +++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c | |||
| @@ -96,9 +96,9 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |||
| 96 | }; | 96 | }; |
| 97 | #endif | 97 | #endif |
| 98 | 98 | ||
| 99 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 99 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 100 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 100 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
| 101 | .enable_dma = 1, | 101 | .enable_dma = 0, |
| 102 | .bits_per_word = 8, | 102 | .bits_per_word = 8, |
| 103 | }; | 103 | }; |
| 104 | #endif | 104 | #endif |
| @@ -138,23 +138,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 138 | }, | 138 | }, |
| 139 | #endif | 139 | #endif |
| 140 | 140 | ||
| 141 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 141 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 142 | { | ||
| 143 | .modalias = "spi_mmc_dummy", | ||
| 144 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
| 145 | .bus_num = 0, | ||
| 146 | .chip_select = 0, | ||
| 147 | .platform_data = NULL, | ||
| 148 | .controller_data = &spi_mmc_chip_info, | ||
| 149 | .mode = SPI_MODE_3, | ||
| 150 | }, | ||
| 151 | { | 142 | { |
| 152 | .modalias = "spi_mmc", | 143 | .modalias = "mmc_spi", |
| 153 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 144 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| 154 | .bus_num = 0, | 145 | .bus_num = 0, |
| 155 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 146 | .chip_select = 5, |
| 156 | .platform_data = NULL, | 147 | .controller_data = &mmc_spi_chip_info, |
| 157 | .controller_data = &spi_mmc_chip_info, | ||
| 158 | .mode = SPI_MODE_3, | 148 | .mode = SPI_MODE_3, |
| 159 | }, | 149 | }, |
| 160 | #endif | 150 | #endif |
diff --git a/arch/blackfin/mach-bf533/boards/generic_board.c b/arch/blackfin/mach-bf533/boards/generic_board.c deleted file mode 100644 index 986eeec53b1f..000000000000 --- a/arch/blackfin/mach-bf533/boards/generic_board.c +++ /dev/null | |||
| @@ -1,126 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * File: arch/blackfin/mach-bf533/generic_board.c | ||
| 3 | * Based on: arch/blackfin/mach-bf533/ezkit.c | ||
| 4 | * Author: Aidan Williams <aidan@nicta.com.au> | ||
| 5 | * | ||
| 6 | * Created: 2005 | ||
| 7 | * Description: | ||
| 8 | * | ||
| 9 | * Modified: | ||
| 10 | * Copyright 2005 National ICT Australia (NICTA) | ||
| 11 | * Copyright 2004-2006 Analog Devices Inc. | ||
| 12 | * | ||
| 13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | ||
| 14 | * | ||
| 15 | * This program is free software; you can redistribute it and/or modify | ||
| 16 | * it under the terms of the GNU General Public License as published by | ||
| 17 | * the Free Software Foundation; either version 2 of the License, or | ||
| 18 | * (at your option) any later version. | ||
| 19 | * | ||
| 20 | * This program is distributed in the hope that it will be useful, | ||
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 23 | * GNU General Public License for more details. | ||
| 24 | * | ||
| 25 | * You should have received a copy of the GNU General Public License | ||
| 26 | * along with this program; if not, see the file COPYING, or write | ||
| 27 | * to the Free Software Foundation, Inc., | ||
| 28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 29 | */ | ||
| 30 | |||
| 31 | #include <linux/device.h> | ||
| 32 | #include <linux/platform_device.h> | ||
| 33 | #include <linux/irq.h> | ||
| 34 | |||
| 35 | /* | ||
| 36 | * Name the Board for the /proc/cpuinfo | ||
| 37 | */ | ||
| 38 | const char bfin_board_name[] = "UNKNOWN BOARD"; | ||
| 39 | |||
| 40 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | ||
| 41 | static struct platform_device rtc_device = { | ||
| 42 | .name = "rtc-bfin", | ||
| 43 | .id = -1, | ||
| 44 | }; | ||
| 45 | #endif | ||
| 46 | |||
| 47 | /* | ||
| 48 | * Driver needs to know address, irq and flag pin. | ||
| 49 | */ | ||
| 50 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
| 51 | static struct resource smc91x_resources[] = { | ||
| 52 | { | ||
| 53 | .start = 0x20300300, | ||
| 54 | .end = 0x20300300 + 16, | ||
| 55 | .flags = IORESOURCE_MEM, | ||
| 56 | }, { | ||
| 57 | .start = IRQ_PROG_INTB, | ||
| 58 | .end = IRQ_PROG_INTB, | ||
| 59 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
| 60 | }, { | ||
| 61 | .start = IRQ_PF7, | ||
| 62 | .end = IRQ_PF7, | ||
| 63 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
| 64 | }, | ||
| 65 | }; | ||
| 66 | |||
| 67 | static struct platform_device smc91x_device = { | ||
| 68 | .name = "smc91x", | ||
| 69 | .id = 0, | ||
| 70 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
| 71 | .resource = smc91x_resources, | ||
| 72 | }; | ||
| 73 | #endif | ||
| 74 | |||
| 75 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
| 76 | #ifdef CONFIG_BFIN_SIR0 | ||
| 77 | static struct resource bfin_sir0_resources[] = { | ||
| 78 | { | ||
| 79 | .start = 0xFFC00400, | ||
| 80 | .end = 0xFFC004FF, | ||
| 81 | .flags = IORESOURCE_MEM, | ||
| 82 | }, | ||
| 83 | { | ||
| 84 | .start = IRQ_UART0_RX, | ||
| 85 | .end = IRQ_UART0_RX+1, | ||
| 86 | .flags = IORESOURCE_IRQ, | ||
| 87 | }, | ||
| 88 | { | ||
| 89 | .start = CH_UART0_RX, | ||
| 90 | .end = CH_UART0_RX+1, | ||
| 91 | .flags = IORESOURCE_DMA, | ||
| 92 | }, | ||
| 93 | }; | ||
| 94 | |||
| 95 | static struct platform_device bfin_sir0_device = { | ||
| 96 | .name = "bfin_sir", | ||
| 97 | .id = 0, | ||
| 98 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), | ||
| 99 | .resource = bfin_sir0_resources, | ||
| 100 | }; | ||
| 101 | #endif | ||
| 102 | #endif | ||
| 103 | |||
| 104 | static struct platform_device *generic_board_devices[] __initdata = { | ||
| 105 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | ||
| 106 | &rtc_device, | ||
| 107 | #endif | ||
| 108 | |||
| 109 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
| 110 | &smc91x_device, | ||
| 111 | #endif | ||
| 112 | |||
| 113 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
| 114 | #ifdef CONFIG_BFIN_SIR0 | ||
| 115 | &bfin_sir0_device, | ||
| 116 | #endif | ||
| 117 | #endif | ||
| 118 | }; | ||
| 119 | |||
| 120 | static int __init generic_board_init(void) | ||
| 121 | { | ||
| 122 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | ||
| 123 | return platform_add_devices(generic_board_devices, ARRAY_SIZE(generic_board_devices)); | ||
| 124 | } | ||
| 125 | |||
| 126 | arch_initcall(generic_board_init); | ||
diff --git a/arch/blackfin/mach-bf533/boards/ip0x.c b/arch/blackfin/mach-bf533/boards/ip0x.c index e30b1b7d1442..f19b63378b12 100644 --- a/arch/blackfin/mach-bf533/boards/ip0x.c +++ b/arch/blackfin/mach-bf533/boards/ip0x.c | |||
| @@ -127,8 +127,8 @@ static struct platform_device dm9000_device2 = { | |||
| 127 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | 127 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 128 | /* all SPI peripherals info goes here */ | 128 | /* all SPI peripherals info goes here */ |
| 129 | 129 | ||
| 130 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 130 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 131 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 131 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
| 132 | /* | 132 | /* |
| 133 | * CPOL (Clock Polarity) | 133 | * CPOL (Clock Polarity) |
| 134 | * 0 - Active high SCK | 134 | * 0 - Active high SCK |
| @@ -152,14 +152,13 @@ static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |||
| 152 | /* Notice: for blackfin, the speed_hz is the value of register | 152 | /* Notice: for blackfin, the speed_hz is the value of register |
| 153 | * SPI_BAUD, not the real baudrate */ | 153 | * SPI_BAUD, not the real baudrate */ |
| 154 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | 154 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
| 155 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 155 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 156 | { | 156 | { |
| 157 | .modalias = "spi_mmc", | 157 | .modalias = "mmc_spi", |
| 158 | .max_speed_hz = 2, | 158 | .max_speed_hz = 2, |
| 159 | .bus_num = 1, | 159 | .bus_num = 1, |
| 160 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 160 | .chip_select = 5, |
| 161 | .platform_data = NULL, | 161 | .controller_data = &mmc_spi_chip_info, |
| 162 | .controller_data = &spi_mmc_chip_info, | ||
| 163 | }, | 162 | }, |
| 164 | #endif | 163 | #endif |
| 165 | }; | 164 | }; |
diff --git a/arch/blackfin/mach-bf533/include/mach/anomaly.h b/arch/blackfin/mach-bf533/include/mach/anomaly.h index 0d3a03429fb9..1cf893e2e55b 100644 --- a/arch/blackfin/mach-bf533/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf533/include/mach/anomaly.h | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * File: include/asm-blackfin/mach-bf533/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf533/anomaly.h |
| 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 4 | * | 4 | * |
| 5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| @@ -160,7 +160,7 @@ | |||
| 160 | #define ANOMALY_05000301 (__SILICON_REVISION__ < 6) | 160 | #define ANOMALY_05000301 (__SILICON_REVISION__ < 6) |
| 161 | /* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ | 161 | /* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ |
| 162 | #define ANOMALY_05000302 (__SILICON_REVISION__ < 5) | 162 | #define ANOMALY_05000302 (__SILICON_REVISION__ < 5) |
| 163 | /* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ | 163 | /* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */ |
| 164 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 5) | 164 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 5) |
| 165 | /* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */ | 165 | /* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */ |
| 166 | #define ANOMALY_05000306 (__SILICON_REVISION__ < 5) | 166 | #define ANOMALY_05000306 (__SILICON_REVISION__ < 5) |
| @@ -278,9 +278,12 @@ | |||
| 278 | #define ANOMALY_05000266 (0) | 278 | #define ANOMALY_05000266 (0) |
| 279 | #define ANOMALY_05000323 (0) | 279 | #define ANOMALY_05000323 (0) |
| 280 | #define ANOMALY_05000353 (1) | 280 | #define ANOMALY_05000353 (1) |
| 281 | #define ANOMALY_05000380 (0) | ||
| 281 | #define ANOMALY_05000386 (1) | 282 | #define ANOMALY_05000386 (1) |
| 282 | #define ANOMALY_05000412 (0) | 283 | #define ANOMALY_05000412 (0) |
| 283 | #define ANOMALY_05000432 (0) | 284 | #define ANOMALY_05000432 (0) |
| 284 | #define ANOMALY_05000435 (0) | 285 | #define ANOMALY_05000435 (0) |
| 286 | #define ANOMALY_05000447 (0) | ||
| 287 | #define ANOMALY_05000448 (0) | ||
| 285 | 288 | ||
| 286 | #endif | 289 | #endif |
diff --git a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h index f3d9e495230c..5f517f53b0fd 100644 --- a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h | |||
| @@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 134 | CH_UART_TX, | 134 | CH_UART_TX, |
| 135 | CH_UART_RX, | 135 | CH_UART_RX, |
| 136 | #endif | 136 | #endif |
| 137 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 137 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 138 | CONFIG_UART0_CTS_PIN, | 138 | CONFIG_UART0_CTS_PIN, |
| 139 | CONFIG_UART0_RTS_PIN, | 139 | CONFIG_UART0_RTS_PIN, |
| 140 | #endif | 140 | #endif |
diff --git a/arch/blackfin/mach-bf537/boards/Kconfig b/arch/blackfin/mach-bf537/boards/Kconfig index 42a57b0acb29..77c59da87e85 100644 --- a/arch/blackfin/mach-bf537/boards/Kconfig +++ b/arch/blackfin/mach-bf537/boards/Kconfig | |||
| @@ -33,9 +33,4 @@ config CAMSIG_MINOTAUR | |||
| 33 | help | 33 | help |
| 34 | Board supply package for CSP Minotaur | 34 | Board supply package for CSP Minotaur |
| 35 | 35 | ||
| 36 | config GENERIC_BF537_BOARD | ||
| 37 | bool "Generic" | ||
| 38 | help | ||
| 39 | Generic or Custom board support. | ||
| 40 | |||
| 41 | endchoice | 36 | endchoice |
diff --git a/arch/blackfin/mach-bf537/boards/Makefile b/arch/blackfin/mach-bf537/boards/Makefile index 7168cc14afd8..68b98a7af6a6 100644 --- a/arch/blackfin/mach-bf537/boards/Makefile +++ b/arch/blackfin/mach-bf537/boards/Makefile | |||
| @@ -2,7 +2,6 @@ | |||
| 2 | # arch/blackfin/mach-bf537/boards/Makefile | 2 | # arch/blackfin/mach-bf537/boards/Makefile |
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o | ||
| 6 | obj-$(CONFIG_BFIN537_STAMP) += stamp.o | 5 | obj-$(CONFIG_BFIN537_STAMP) += stamp.o |
| 7 | obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o | 6 | obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o |
| 8 | obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o | 7 | obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o |
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c index 9cd8fb2a30d3..41c75b9bfac0 100644 --- a/arch/blackfin/mach-bf537/boards/cm_bf537.c +++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c | |||
| @@ -108,9 +108,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |||
| 108 | }; | 108 | }; |
| 109 | #endif | 109 | #endif |
| 110 | 110 | ||
| 111 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 111 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 112 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 112 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
| 113 | .enable_dma = 1, | 113 | .enable_dma = 0, |
| 114 | .bits_per_word = 8, | 114 | .bits_per_word = 8, |
| 115 | }; | 115 | }; |
| 116 | #endif | 116 | #endif |
| @@ -160,23 +160,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 160 | }, | 160 | }, |
| 161 | #endif | 161 | #endif |
| 162 | 162 | ||
| 163 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 163 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 164 | { | ||
| 165 | .modalias = "spi_mmc_dummy", | ||
| 166 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
| 167 | .bus_num = 0, | ||
| 168 | .chip_select = 7, | ||
| 169 | .platform_data = NULL, | ||
| 170 | .controller_data = &spi_mmc_chip_info, | ||
| 171 | .mode = SPI_MODE_3, | ||
| 172 | }, | ||
| 173 | { | 164 | { |
| 174 | .modalias = "spi_mmc", | 165 | .modalias = "mmc_spi", |
| 175 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 166 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
| 176 | .bus_num = 0, | 167 | .bus_num = 0, |
| 177 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 168 | .chip_select = 1, |
| 178 | .platform_data = NULL, | 169 | .controller_data = &mmc_spi_chip_info, |
| 179 | .controller_data = &spi_mmc_chip_info, | ||
| 180 | .mode = SPI_MODE_3, | 170 | .mode = SPI_MODE_3, |
| 181 | }, | 171 | }, |
| 182 | #endif | 172 | #endif |
diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c deleted file mode 100644 index da710fdc4569..000000000000 --- a/arch/blackfin/mach-bf537/boards/generic_board.c +++ /dev/null | |||
| @@ -1,745 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * File: arch/blackfin/mach-bf537/boards/generic_board.c | ||
| 3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | ||
| 4 | * Author: Aidan Williams <aidan@nicta.com.au> | ||
| 5 | * | ||
| 6 | * Created: | ||
| 7 | * Description: | ||
| 8 | * | ||
| 9 | * Modified: | ||
| 10 | * Copyright 2005 National ICT Australia (NICTA) | ||
| 11 | * Copyright 2004-2008 Analog Devices Inc. | ||
| 12 | * | ||
| 13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | ||
| 14 | * | ||
| 15 | * This program is free software; you can redistribute it and/or modify | ||
| 16 | * it under the terms of the GNU General Public License as published by | ||
| 17 | * the Free Software Foundation; either version 2 of the License, or | ||
| 18 | * (at your option) any later version. | ||
| 19 | * | ||
| 20 | * This program is distributed in the hope that it will be useful, | ||
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 23 | * GNU General Public License for more details. | ||
| 24 | * | ||
| 25 | * You should have received a copy of the GNU General Public License | ||
| 26 | * along with this program; if not, see the file COPYING, or write | ||
| 27 | * to the Free Software Foundation, Inc., | ||
| 28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 29 | */ | ||
| 30 | |||
| 31 | #include <linux/device.h> | ||
| 32 | #include <linux/etherdevice.h> | ||
| 33 | #include <linux/platform_device.h> | ||
| 34 | #include <linux/mtd/mtd.h> | ||
| 35 | #include <linux/mtd/partitions.h> | ||
| 36 | #include <linux/spi/spi.h> | ||
| 37 | #include <linux/spi/flash.h> | ||
| 38 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
| 39 | #include <linux/usb/isp1362.h> | ||
| 40 | #endif | ||
| 41 | #include <linux/irq.h> | ||
| 42 | #include <linux/interrupt.h> | ||
| 43 | #include <linux/usb/sl811.h> | ||
| 44 | #include <asm/dma.h> | ||
| 45 | #include <asm/bfin5xx_spi.h> | ||
| 46 | #include <asm/reboot.h> | ||
| 47 | #include <asm/portmux.h> | ||
| 48 | #include <linux/spi/ad7877.h> | ||
| 49 | |||
| 50 | /* | ||
| 51 | * Name the Board for the /proc/cpuinfo | ||
| 52 | */ | ||
| 53 | const char bfin_board_name[] = "UNKNOWN BOARD"; | ||
| 54 | |||
| 55 | /* | ||
| 56 | * Driver needs to know address, irq and flag pin. | ||
| 57 | */ | ||
| 58 | |||
| 59 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) | ||
| 60 | #include <linux/usb/isp1760.h> | ||
| 61 | static struct resource bfin_isp1760_resources[] = { | ||
| 62 | [0] = { | ||
| 63 | .start = 0x203C0000, | ||
| 64 | .end = 0x203C0000 + 0x000fffff, | ||
| 65 | .flags = IORESOURCE_MEM, | ||
| 66 | }, | ||
| 67 | [1] = { | ||
| 68 | .start = IRQ_PF7, | ||
| 69 | .end = IRQ_PF7, | ||
| 70 | .flags = IORESOURCE_IRQ, | ||
| 71 | }, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static struct isp1760_platform_data isp1760_priv = { | ||
| 75 | .is_isp1761 = 0, | ||
| 76 | .port1_disable = 0, | ||
| 77 | .bus_width_16 = 1, | ||
| 78 | .port1_otg = 0, | ||
| 79 | .analog_oc = 0, | ||
| 80 | .dack_polarity_high = 0, | ||
| 81 | .dreq_polarity_high = 0, | ||
| 82 | }; | ||
| 83 | |||
| 84 | static struct platform_device bfin_isp1760_device = { | ||
| 85 | .name = "isp1760-hcd", | ||
| 86 | .id = 0, | ||
| 87 | .dev = { | ||
| 88 | .platform_data = &isp1760_priv, | ||
| 89 | }, | ||
| 90 | .num_resources = ARRAY_SIZE(bfin_isp1760_resources), | ||
| 91 | .resource = bfin_isp1760_resources, | ||
| 92 | }; | ||
| 93 | #endif | ||
| 94 | |||
| 95 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | ||
| 96 | static struct resource bfin_pcmcia_cf_resources[] = { | ||
| 97 | { | ||
| 98 | .start = 0x20310000, /* IO PORT */ | ||
| 99 | .end = 0x20312000, | ||
| 100 | .flags = IORESOURCE_MEM, | ||
| 101 | }, { | ||
| 102 | .start = 0x20311000, /* Attribute Memory */ | ||
| 103 | .end = 0x20311FFF, | ||
| 104 | .flags = IORESOURCE_MEM, | ||
| 105 | }, { | ||
| 106 | .start = IRQ_PF4, | ||
| 107 | .end = IRQ_PF4, | ||
| 108 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | ||
| 109 | }, { | ||
| 110 | .start = 6, /* Card Detect PF6 */ | ||
| 111 | .end = 6, | ||
| 112 | .flags = IORESOURCE_IRQ, | ||
| 113 | }, | ||
| 114 | }; | ||
| 115 | |||
| 116 | static struct platform_device bfin_pcmcia_cf_device = { | ||
| 117 | .name = "bfin_cf_pcmcia", | ||
| 118 | .id = -1, | ||
| 119 | .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), | ||
| 120 | .resource = bfin_pcmcia_cf_resources, | ||
| 121 | }; | ||
| 122 | #endif | ||
| 123 | |||
| 124 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | ||
| 125 | static struct platform_device rtc_device = { | ||
| 126 | .name = "rtc-bfin", | ||
| 127 | .id = -1, | ||
| 128 | }; | ||
| 129 | #endif | ||
| 130 | |||
| 131 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
| 132 | static struct resource smc91x_resources[] = { | ||
| 133 | { | ||
| 134 | .name = "smc91x-regs", | ||
| 135 | .start = 0x20300300, | ||
| 136 | .end = 0x20300300 + 16, | ||
| 137 | .flags = IORESOURCE_MEM, | ||
| 138 | }, { | ||
| 139 | |||
| 140 | .start = IRQ_PF7, | ||
| 141 | .end = IRQ_PF7, | ||
| 142 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
| 143 | }, | ||
| 144 | }; | ||
| 145 | static struct platform_device smc91x_device = { | ||
| 146 | .name = "smc91x", | ||
| 147 | .id = 0, | ||
| 148 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
| 149 | .resource = smc91x_resources, | ||
| 150 | }; | ||
| 151 | #endif | ||
| 152 | |||
| 153 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | ||
| 154 | static struct resource dm9000_resources[] = { | ||
| 155 | [0] = { | ||
| 156 | .start = 0x203FB800, | ||
| 157 | .end = 0x203FB800 + 1, | ||
| 158 | .flags = IORESOURCE_MEM, | ||
| 159 | }, | ||
| 160 | [1] = { | ||
| 161 | .start = 0x203FB800 + 4, | ||
| 162 | .end = 0x203FB800 + 5, | ||
| 163 | .flags = IORESOURCE_MEM, | ||
| 164 | }, | ||
| 165 | [2] = { | ||
| 166 | .start = IRQ_PF9, | ||
| 167 | .end = IRQ_PF9, | ||
| 168 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), | ||
| 169 | }, | ||
| 170 | }; | ||
| 171 | |||
| 172 | static struct platform_device dm9000_device = { | ||
| 173 | .name = "dm9000", | ||
| 174 | .id = -1, | ||
| 175 | .num_resources = ARRAY_SIZE(dm9000_resources), | ||
| 176 | .resource = dm9000_resources, | ||
| 177 | }; | ||
| 178 | #endif | ||
| 179 | |||
| 180 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | ||
| 181 | static struct resource sl811_hcd_resources[] = { | ||
| 182 | { | ||
| 183 | .start = 0x20340000, | ||
| 184 | .end = 0x20340000, | ||
| 185 | .flags = IORESOURCE_MEM, | ||
| 186 | }, { | ||
| 187 | .start = 0x20340004, | ||
| 188 | .end = 0x20340004, | ||
| 189 | .flags = IORESOURCE_MEM, | ||
| 190 | }, { | ||
| 191 | .start = CONFIG_USB_SL811_BFIN_IRQ, | ||
| 192 | .end = CONFIG_USB_SL811_BFIN_IRQ, | ||
| 193 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
| 194 | }, | ||
| 195 | }; | ||
| 196 | |||
| 197 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | ||
| 198 | void sl811_port_power(struct device *dev, int is_on) | ||
| 199 | { | ||
| 200 | gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); | ||
| 201 | gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on); | ||
| 202 | |||
| 203 | } | ||
| 204 | #endif | ||
| 205 | |||
| 206 | static struct sl811_platform_data sl811_priv = { | ||
| 207 | .potpg = 10, | ||
| 208 | .power = 250, /* == 500mA */ | ||
| 209 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | ||
| 210 | .port_power = &sl811_port_power, | ||
| 211 | #endif | ||
| 212 | }; | ||
| 213 | |||
| 214 | static struct platform_device sl811_hcd_device = { | ||
| 215 | .name = "sl811-hcd", | ||
| 216 | .id = 0, | ||
| 217 | .dev = { | ||
| 218 | .platform_data = &sl811_priv, | ||
| 219 | }, | ||
| 220 | .num_resources = ARRAY_SIZE(sl811_hcd_resources), | ||
| 221 | .resource = sl811_hcd_resources, | ||
| 222 | }; | ||
| 223 | #endif | ||
| 224 | |||
| 225 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
| 226 | static struct resource isp1362_hcd_resources[] = { | ||
| 227 | { | ||
| 228 | .start = 0x20360000, | ||
| 229 | .end = 0x20360000, | ||
| 230 | .flags = IORESOURCE_MEM, | ||
| 231 | }, { | ||
| 232 | .start = 0x20360004, | ||
| 233 | .end = 0x20360004, | ||
| 234 | .flags = IORESOURCE_MEM, | ||
| 235 | }, { | ||
| 236 | .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | ||
| 237 | .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | ||
| 238 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
| 239 | }, | ||
| 240 | }; | ||
| 241 | |||
| 242 | static struct isp1362_platform_data isp1362_priv = { | ||
| 243 | .sel15Kres = 1, | ||
| 244 | .clknotstop = 0, | ||
| 245 | .oc_enable = 0, | ||
| 246 | .int_act_high = 0, | ||
| 247 | .int_edge_triggered = 0, | ||
| 248 | .remote_wakeup_connected = 0, | ||
| 249 | .no_power_switching = 1, | ||
| 250 | .power_switching_mode = 0, | ||
| 251 | }; | ||
| 252 | |||
| 253 | static struct platform_device isp1362_hcd_device = { | ||
| 254 | .name = "isp1362-hcd", | ||
| 255 | .id = 0, | ||
| 256 | .dev = { | ||
| 257 | .platform_data = &isp1362_priv, | ||
| 258 | }, | ||
| 259 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | ||
| 260 | .resource = isp1362_hcd_resources, | ||
| 261 | }; | ||
| 262 | #endif | ||
| 263 | |||
| 264 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | ||
| 265 | static struct platform_device bfin_mii_bus = { | ||
| 266 | .name = "bfin_mii_bus", | ||
| 267 | }; | ||
| 268 | |||
| 269 | static struct platform_device bfin_mac_device = { | ||
| 270 | .name = "bfin_mac", | ||
| 271 | .dev.platform_data = &bfin_mii_bus, | ||
| 272 | }; | ||
| 273 | #endif | ||
| 274 | |||
| 275 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | ||
| 276 | static struct resource net2272_bfin_resources[] = { | ||
| 277 | { | ||
| 278 | .start = 0x20300000, | ||
| 279 | .end = 0x20300000 + 0x100, | ||
| 280 | .flags = IORESOURCE_MEM, | ||
| 281 | }, { | ||
| 282 | .start = IRQ_PF7, | ||
| 283 | .end = IRQ_PF7, | ||
| 284 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
| 285 | }, | ||
| 286 | }; | ||
| 287 | |||
| 288 | static struct platform_device net2272_bfin_device = { | ||
| 289 | .name = "net2272", | ||
| 290 | .id = -1, | ||
| 291 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | ||
| 292 | .resource = net2272_bfin_resources, | ||
| 293 | }; | ||
| 294 | #endif | ||
| 295 | |||
| 296 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | ||
| 297 | /* all SPI peripherals info goes here */ | ||
| 298 | |||
| 299 | #if defined(CONFIG_MTD_M25P80) \ | ||
| 300 | || defined(CONFIG_MTD_M25P80_MODULE) | ||
| 301 | static struct mtd_partition bfin_spi_flash_partitions[] = { | ||
| 302 | { | ||
| 303 | .name = "bootloader(spi)", | ||
| 304 | .size = 0x00020000, | ||
| 305 | .offset = 0, | ||
| 306 | .mask_flags = MTD_CAP_ROM | ||
| 307 | }, { | ||
| 308 | .name = "linux kernel(spi)", | ||
| 309 | .size = 0xe0000, | ||
| 310 | .offset = 0x20000 | ||
| 311 | }, { | ||
| 312 | .name = "file system(spi)", | ||
| 313 | .size = 0x700000, | ||
| 314 | .offset = 0x00100000, | ||
| 315 | } | ||
| 316 | }; | ||
| 317 | |||
| 318 | static struct flash_platform_data bfin_spi_flash_data = { | ||
| 319 | .name = "m25p80", | ||
| 320 | .parts = bfin_spi_flash_partitions, | ||
| 321 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | ||
| 322 | .type = "m25p64", | ||
| 323 | }; | ||
| 324 | |||
| 325 | /* SPI flash chip (m25p64) */ | ||
| 326 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | ||
| 327 | .enable_dma = 0, /* use dma transfer with this chip*/ | ||
| 328 | .bits_per_word = 8, | ||
| 329 | }; | ||
| 330 | #endif | ||
| 331 | |||
| 332 | #if defined(CONFIG_SPI_ADC_BF533) \ | ||
| 333 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | ||
| 334 | /* SPI ADC chip */ | ||
| 335 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
| 336 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
| 337 | .bits_per_word = 16, | ||
| 338 | }; | ||
| 339 | #endif | ||
| 340 | |||
| 341 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | ||
| 342 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | ||
| 343 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
| 344 | .enable_dma = 0, | ||
| 345 | .bits_per_word = 16, | ||
| 346 | }; | ||
| 347 | #endif | ||
| 348 | |||
| 349 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | ||
| 350 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | ||
| 351 | .enable_dma = 0, | ||
| 352 | .bits_per_word = 16, | ||
| 353 | }; | ||
| 354 | #endif | ||
| 355 | |||
| 356 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | ||
| 357 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | ||
| 358 | .enable_dma = 1, | ||
| 359 | .bits_per_word = 8, | ||
| 360 | }; | ||
| 361 | #endif | ||
| 362 | |||
| 363 | #if defined(CONFIG_PBX) | ||
| 364 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | ||
| 365 | .ctl_reg = 0x4, /* send zero */ | ||
| 366 | .enable_dma = 0, | ||
| 367 | .bits_per_word = 8, | ||
| 368 | .cs_change_per_word = 1, | ||
| 369 | }; | ||
| 370 | #endif | ||
| 371 | |||
| 372 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | ||
| 373 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | ||
| 374 | .enable_dma = 0, | ||
| 375 | .bits_per_word = 16, | ||
| 376 | }; | ||
| 377 | |||
| 378 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | ||
| 379 | .model = 7877, | ||
| 380 | .vref_delay_usecs = 50, /* internal, no capacitor */ | ||
| 381 | .x_plate_ohms = 419, | ||
| 382 | .y_plate_ohms = 486, | ||
| 383 | .pressure_max = 1000, | ||
| 384 | .pressure_min = 0, | ||
| 385 | .stopacq_polarity = 1, | ||
| 386 | .first_conversion_delay = 3, | ||
| 387 | .acquisition_time = 1, | ||
| 388 | .averaging = 1, | ||
| 389 | .pen_down_acc_interval = 1, | ||
| 390 | }; | ||
| 391 | #endif | ||
| 392 | |||
| 393 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | ||
| 394 | #if defined(CONFIG_MTD_M25P80) \ | ||
| 395 | || defined(CONFIG_MTD_M25P80_MODULE) | ||
| 396 | { | ||
| 397 | /* the modalias must be the same as spi device driver name */ | ||
| 398 | .modalias = "m25p80", /* Name of spi_driver for this device */ | ||
| 399 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
| 400 | .bus_num = 0, /* Framework bus number */ | ||
| 401 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ | ||
| 402 | .platform_data = &bfin_spi_flash_data, | ||
| 403 | .controller_data = &spi_flash_chip_info, | ||
| 404 | .mode = SPI_MODE_3, | ||
| 405 | }, | ||
| 406 | #endif | ||
| 407 | |||
| 408 | #if defined(CONFIG_SPI_ADC_BF533) \ | ||
| 409 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | ||
| 410 | { | ||
| 411 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
| 412 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
| 413 | .bus_num = 0, /* Framework bus number */ | ||
| 414 | .chip_select = 1, /* Framework chip select. */ | ||
| 415 | .platform_data = NULL, /* No spi_driver specific config */ | ||
| 416 | .controller_data = &spi_adc_chip_info, | ||
| 417 | }, | ||
| 418 | #endif | ||
| 419 | |||
| 420 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | ||
| 421 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | ||
| 422 | { | ||
| 423 | .modalias = "ad1836-spi", | ||
| 424 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | ||
| 425 | .bus_num = 0, | ||
| 426 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, | ||
| 427 | .controller_data = &ad1836_spi_chip_info, | ||
| 428 | }, | ||
| 429 | #endif | ||
| 430 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | ||
| 431 | { | ||
| 432 | .modalias = "ad9960-spi", | ||
| 433 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ | ||
| 434 | .bus_num = 0, | ||
| 435 | .chip_select = 1, | ||
| 436 | .controller_data = &ad9960_spi_chip_info, | ||
| 437 | }, | ||
| 438 | #endif | ||
| 439 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | ||
| 440 | { | ||
| 441 | .modalias = "spi_mmc_dummy", | ||
| 442 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
| 443 | .bus_num = 0, | ||
| 444 | .chip_select = 0, | ||
| 445 | .platform_data = NULL, | ||
| 446 | .controller_data = &spi_mmc_chip_info, | ||
| 447 | .mode = SPI_MODE_3, | ||
| 448 | }, | ||
| 449 | { | ||
| 450 | .modalias = "spi_mmc", | ||
| 451 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
| 452 | .bus_num = 0, | ||
| 453 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | ||
| 454 | .platform_data = NULL, | ||
| 455 | .controller_data = &spi_mmc_chip_info, | ||
| 456 | .mode = SPI_MODE_3, | ||
| 457 | }, | ||
| 458 | #endif | ||
| 459 | #if defined(CONFIG_PBX) | ||
| 460 | { | ||
| 461 | .modalias = "fxs-spi", | ||
| 462 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | ||
| 463 | .bus_num = 0, | ||
| 464 | .chip_select = 8 - CONFIG_J11_JUMPER, | ||
| 465 | .controller_data = &spi_si3xxx_chip_info, | ||
| 466 | .mode = SPI_MODE_3, | ||
| 467 | }, | ||
| 468 | { | ||
| 469 | .modalias = "fxo-spi", | ||
| 470 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | ||
| 471 | .bus_num = 0, | ||
| 472 | .chip_select = 8 - CONFIG_J19_JUMPER, | ||
| 473 | .controller_data = &spi_si3xxx_chip_info, | ||
| 474 | .mode = SPI_MODE_3, | ||
| 475 | }, | ||
| 476 | #endif | ||
| 477 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | ||
| 478 | { | ||
| 479 | .modalias = "ad7877", | ||
| 480 | .platform_data = &bfin_ad7877_ts_info, | ||
| 481 | .irq = IRQ_PF6, | ||
| 482 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | ||
| 483 | .bus_num = 0, | ||
| 484 | .chip_select = 1, | ||
| 485 | .controller_data = &spi_ad7877_chip_info, | ||
| 486 | }, | ||
| 487 | #endif | ||
| 488 | }; | ||
| 489 | |||
| 490 | /* SPI controller data */ | ||
| 491 | static struct bfin5xx_spi_master bfin_spi0_info = { | ||
| 492 | .num_chipselect = 8, | ||
| 493 | .enable_dma = 1, /* master has the ability to do dma transfer */ | ||
| 494 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, | ||
| 495 | }; | ||
| 496 | |||
| 497 | /* SPI (0) */ | ||
| 498 | static struct resource bfin_spi0_resource[] = { | ||
| 499 | [0] = { | ||
| 500 | .start = SPI0_REGBASE, | ||
| 501 | .end = SPI0_REGBASE + 0xFF, | ||
| 502 | .flags = IORESOURCE_MEM, | ||
| 503 | }, | ||
| 504 | [1] = { | ||
| 505 | .start = CH_SPI, | ||
| 506 | .end = CH_SPI, | ||
| 507 | .flags = IORESOURCE_IRQ, | ||
| 508 | }, | ||
| 509 | }; | ||
| 510 | |||
| 511 | static struct platform_device bfin_spi0_device = { | ||
| 512 | .name = "bfin-spi", | ||
| 513 | .id = 0, /* Bus number */ | ||
| 514 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | ||
| 515 | .resource = bfin_spi0_resource, | ||
| 516 | .dev = { | ||
| 517 | .platform_data = &bfin_spi0_info, /* Passed to driver */ | ||
| 518 | }, | ||
| 519 | }; | ||
| 520 | #endif /* spi master and devices */ | ||
| 521 | |||
| 522 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | ||
| 523 | static struct platform_device bfin_fb_device = { | ||
| 524 | .name = "bf537-lq035", | ||
| 525 | }; | ||
| 526 | #endif | ||
| 527 | |||
| 528 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) | ||
| 529 | static struct platform_device bfin_fb_adv7393_device = { | ||
| 530 | .name = "bfin-adv7393", | ||
| 531 | }; | ||
| 532 | #endif | ||
| 533 | |||
| 534 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | ||
| 535 | static struct resource bfin_uart_resources[] = { | ||
| 536 | { | ||
| 537 | .start = 0xFFC00400, | ||
| 538 | .end = 0xFFC004FF, | ||
| 539 | .flags = IORESOURCE_MEM, | ||
| 540 | }, { | ||
| 541 | .start = 0xFFC02000, | ||
| 542 | .end = 0xFFC020FF, | ||
| 543 | .flags = IORESOURCE_MEM, | ||
| 544 | }, | ||
| 545 | }; | ||
| 546 | |||
| 547 | static struct platform_device bfin_uart_device = { | ||
| 548 | .name = "bfin-uart", | ||
| 549 | .id = 1, | ||
| 550 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | ||
| 551 | .resource = bfin_uart_resources, | ||
| 552 | }; | ||
| 553 | #endif | ||
| 554 | |||
| 555 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
| 556 | #ifdef CONFIG_BFIN_SIR0 | ||
| 557 | static struct resource bfin_sir0_resources[] = { | ||
| 558 | { | ||
| 559 | .start = 0xFFC00400, | ||
| 560 | .end = 0xFFC004FF, | ||
| 561 | .flags = IORESOURCE_MEM, | ||
| 562 | }, | ||
| 563 | { | ||
| 564 | .start = IRQ_UART0_RX, | ||
| 565 | .end = IRQ_UART0_RX+1, | ||
| 566 | .flags = IORESOURCE_IRQ, | ||
| 567 | }, | ||
| 568 | { | ||
| 569 | .start = CH_UART0_RX, | ||
| 570 | .end = CH_UART0_RX+1, | ||
| 571 | .flags = IORESOURCE_DMA, | ||
| 572 | }, | ||
| 573 | }; | ||
| 574 | |||
| 575 | static struct platform_device bfin_sir0_device = { | ||
| 576 | .name = "bfin_sir", | ||
| 577 | .id = 0, | ||
| 578 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), | ||
| 579 | .resource = bfin_sir0_resources, | ||
| 580 | }; | ||
| 581 | #endif | ||
| 582 | #ifdef CONFIG_BFIN_SIR1 | ||
| 583 | static struct resource bfin_sir1_resources[] = { | ||
| 584 | { | ||
| 585 | .start = 0xFFC02000, | ||
| 586 | .end = 0xFFC020FF, | ||
| 587 | .flags = IORESOURCE_MEM, | ||
| 588 | }, | ||
| 589 | { | ||
| 590 | .start = IRQ_UART1_RX, | ||
| 591 | .end = IRQ_UART1_RX+1, | ||
| 592 | .flags = IORESOURCE_IRQ, | ||
| 593 | }, | ||
| 594 | { | ||
| 595 | .start = CH_UART1_RX, | ||
| 596 | .end = CH_UART1_RX+1, | ||
| 597 | .flags = IORESOURCE_DMA, | ||
| 598 | }, | ||
| 599 | }; | ||
| 600 | |||
| 601 | static struct platform_device bfin_sir1_device = { | ||
| 602 | .name = "bfin_sir", | ||
| 603 | .id = 1, | ||
| 604 | .num_resources = ARRAY_SIZE(bfin_sir1_resources), | ||
| 605 | .resource = bfin_sir1_resources, | ||
| 606 | }; | ||
| 607 | #endif | ||
| 608 | #endif | ||
| 609 | |||
| 610 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | ||
| 611 | static struct resource bfin_twi0_resource[] = { | ||
| 612 | [0] = { | ||
| 613 | .start = TWI0_REGBASE, | ||
| 614 | .end = TWI0_REGBASE + 0xFF, | ||
| 615 | .flags = IORESOURCE_MEM, | ||
| 616 | }, | ||
| 617 | [1] = { | ||
| 618 | .start = IRQ_TWI, | ||
| 619 | .end = IRQ_TWI, | ||
| 620 | .flags = IORESOURCE_IRQ, | ||
| 621 | }, | ||
| 622 | }; | ||
| 623 | |||
| 624 | static struct platform_device i2c_bfin_twi_device = { | ||
| 625 | .name = "i2c-bfin-twi", | ||
| 626 | .id = 0, | ||
| 627 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), | ||
| 628 | .resource = bfin_twi0_resource, | ||
| 629 | }; | ||
| 630 | #endif | ||
| 631 | |||
| 632 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | ||
| 633 | static struct platform_device bfin_sport0_uart_device = { | ||
| 634 | .name = "bfin-sport-uart", | ||
| 635 | .id = 0, | ||
| 636 | }; | ||
| 637 | |||
| 638 | static struct platform_device bfin_sport1_uart_device = { | ||
| 639 | .name = "bfin-sport-uart", | ||
| 640 | .id = 1, | ||
| 641 | }; | ||
| 642 | #endif | ||
| 643 | |||
| 644 | static struct platform_device *stamp_devices[] __initdata = { | ||
| 645 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | ||
| 646 | &bfin_pcmcia_cf_device, | ||
| 647 | #endif | ||
| 648 | |||
| 649 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | ||
| 650 | &rtc_device, | ||
| 651 | #endif | ||
| 652 | |||
| 653 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | ||
| 654 | &sl811_hcd_device, | ||
| 655 | #endif | ||
| 656 | |||
| 657 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
| 658 | &isp1362_hcd_device, | ||
| 659 | #endif | ||
| 660 | |||
| 661 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
| 662 | &smc91x_device, | ||
| 663 | #endif | ||
| 664 | |||
| 665 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | ||
| 666 | &dm9000_device, | ||
| 667 | #endif | ||
| 668 | |||
| 669 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | ||
| 670 | &bfin_mii_bus, | ||
| 671 | &bfin_mac_device, | ||
| 672 | #endif | ||
| 673 | |||
| 674 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | ||
| 675 | &net2272_bfin_device, | ||
| 676 | #endif | ||
| 677 | |||
| 678 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) | ||
| 679 | &bfin_isp1760_device, | ||
| 680 | #endif | ||
| 681 | |||
| 682 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | ||
| 683 | &bfin_spi0_device, | ||
| 684 | #endif | ||
| 685 | |||
| 686 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | ||
| 687 | &bfin_fb_device, | ||
| 688 | #endif | ||
| 689 | |||
| 690 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) | ||
| 691 | &bfin_fb_adv7393_device, | ||
| 692 | #endif | ||
| 693 | |||
| 694 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | ||
| 695 | &bfin_uart_device, | ||
| 696 | #endif | ||
| 697 | |||
| 698 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
| 699 | #ifdef CONFIG_BFIN_SIR0 | ||
| 700 | &bfin_sir0_device, | ||
| 701 | #endif | ||
| 702 | #ifdef CONFIG_BFIN_SIR1 | ||
| 703 | &bfin_sir1_device, | ||
| 704 | #endif | ||
| 705 | #endif | ||
| 706 | |||
| 707 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | ||
| 708 | &i2c_bfin_twi_device, | ||
| 709 | #endif | ||
| 710 | |||
| 711 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | ||
| 712 | &bfin_sport0_uart_device, | ||
| 713 | &bfin_sport1_uart_device, | ||
| 714 | #endif | ||
| 715 | }; | ||
| 716 | |||
| 717 | static int __init generic_init(void) | ||
| 718 | { | ||
| 719 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | ||
| 720 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | ||
| 721 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | ||
| 722 | spi_register_board_info(bfin_spi_board_info, | ||
| 723 | ARRAY_SIZE(bfin_spi_board_info)); | ||
| 724 | #endif | ||
| 725 | |||
| 726 | return 0; | ||
| 727 | } | ||
| 728 | |||
| 729 | arch_initcall(generic_init); | ||
| 730 | |||
| 731 | void native_machine_restart(char *cmd) | ||
| 732 | { | ||
| 733 | /* workaround reboot hang when booting from SPI */ | ||
| 734 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | ||
| 735 | bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); | ||
| 736 | } | ||
| 737 | |||
| 738 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | ||
| 739 | void bfin_get_ether_addr(char *addr) | ||
| 740 | { | ||
| 741 | random_ether_addr(addr); | ||
| 742 | printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__); | ||
| 743 | } | ||
| 744 | EXPORT_SYMBOL(bfin_get_ether_addr); | ||
| 745 | #endif | ||
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c index db7d3a385e4b..3c159819e555 100644 --- a/arch/blackfin/mach-bf537/boards/minotaur.c +++ b/arch/blackfin/mach-bf537/boards/minotaur.c | |||
| @@ -134,9 +134,9 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 134 | }; | 134 | }; |
| 135 | #endif | 135 | #endif |
| 136 | 136 | ||
| 137 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 137 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 138 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 138 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
| 139 | .enable_dma = 1, | 139 | .enable_dma = 0, |
| 140 | .bits_per_word = 8, | 140 | .bits_per_word = 8, |
| 141 | }; | 141 | }; |
| 142 | #endif | 142 | #endif |
| @@ -156,23 +156,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 156 | }, | 156 | }, |
| 157 | #endif | 157 | #endif |
| 158 | 158 | ||
| 159 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 159 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 160 | { | 160 | { |
| 161 | .modalias = "spi_mmc_dummy", | 161 | .modalias = "mmc_spi", |
| 162 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | 162 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
| 163 | .bus_num = 0, | 163 | .bus_num = 0, |
| 164 | .chip_select = 0, | 164 | .chip_select = 5, |
| 165 | .platform_data = NULL, | 165 | .controller_data = &mmc_spi_chip_info, |
| 166 | .controller_data = &spi_mmc_chip_info, | ||
| 167 | .mode = SPI_MODE_3, | ||
| 168 | }, | ||
| 169 | { | ||
| 170 | .modalias = "spi_mmc", | ||
| 171 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | ||
| 172 | .bus_num = 0, | ||
| 173 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | ||
| 174 | .platform_data = NULL, | ||
| 175 | .controller_data = &spi_mmc_chip_info, | ||
| 176 | .mode = SPI_MODE_3, | 166 | .mode = SPI_MODE_3, |
| 177 | }, | 167 | }, |
| 178 | #endif | 168 | #endif |
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c index 590eb3a139b7..4e1de1e53f89 100644 --- a/arch/blackfin/mach-bf537/boards/pnav10.c +++ b/arch/blackfin/mach-bf537/boards/pnav10.c | |||
| @@ -289,9 +289,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |||
| 289 | }; | 289 | }; |
| 290 | #endif | 290 | #endif |
| 291 | 291 | ||
| 292 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 292 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 293 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 293 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
| 294 | .enable_dma = 1, | 294 | .enable_dma = 0, |
| 295 | .bits_per_word = 8, | 295 | .bits_per_word = 8, |
| 296 | }; | 296 | }; |
| 297 | #endif | 297 | #endif |
| @@ -364,23 +364,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 364 | .controller_data = &ad9960_spi_chip_info, | 364 | .controller_data = &ad9960_spi_chip_info, |
| 365 | }, | 365 | }, |
| 366 | #endif | 366 | #endif |
| 367 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 367 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 368 | { | ||
| 369 | .modalias = "spi_mmc_dummy", | ||
| 370 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
| 371 | .bus_num = 0, | ||
| 372 | .chip_select = 7, | ||
| 373 | .platform_data = NULL, | ||
| 374 | .controller_data = &spi_mmc_chip_info, | ||
| 375 | .mode = SPI_MODE_3, | ||
| 376 | }, | ||
| 377 | { | 368 | { |
| 378 | .modalias = "spi_mmc", | 369 | .modalias = "mmc_spi", |
| 379 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 370 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| 380 | .bus_num = 0, | 371 | .bus_num = 0, |
| 381 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 372 | .chip_select = 5, |
| 382 | .platform_data = NULL, | 373 | .controller_data = &mmc_spi_chip_info, |
| 383 | .controller_data = &spi_mmc_chip_info, | ||
| 384 | .mode = SPI_MODE_3, | 374 | .mode = SPI_MODE_3, |
| 385 | }, | 375 | }, |
| 386 | #endif | 376 | #endif |
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c index 3f4f203a06ec..53ad10f3cd76 100644 --- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c +++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c | |||
| @@ -108,9 +108,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |||
| 108 | }; | 108 | }; |
| 109 | #endif | 109 | #endif |
| 110 | 110 | ||
| 111 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 111 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 112 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 112 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
| 113 | .enable_dma = 1, | 113 | .enable_dma = 0, |
| 114 | .bits_per_word = 8, | 114 | .bits_per_word = 8, |
| 115 | }; | 115 | }; |
| 116 | #endif | 116 | #endif |
| @@ -160,23 +160,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 160 | }, | 160 | }, |
| 161 | #endif | 161 | #endif |
| 162 | 162 | ||
| 163 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 163 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 164 | { | ||
| 165 | .modalias = "spi_mmc_dummy", | ||
| 166 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
| 167 | .bus_num = 0, | ||
| 168 | .chip_select = 7, | ||
| 169 | .platform_data = NULL, | ||
| 170 | .controller_data = &spi_mmc_chip_info, | ||
| 171 | .mode = SPI_MODE_3, | ||
| 172 | }, | ||
| 173 | { | 164 | { |
| 174 | .modalias = "spi_mmc", | 165 | .modalias = "mmc_spi", |
| 175 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 166 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| 176 | .bus_num = 0, | 167 | .bus_num = 0, |
| 177 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 168 | .chip_select = 5, |
| 178 | .platform_data = NULL, | 169 | .controller_data = &mmc_spi_chip_info, |
| 179 | .controller_data = &spi_mmc_chip_info, | ||
| 180 | .mode = SPI_MODE_3, | 170 | .mode = SPI_MODE_3, |
| 181 | }, | 171 | }, |
| 182 | #endif | 172 | #endif |
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h index 9cb39121d1cb..1bfd80c26c90 100644 --- a/arch/blackfin/mach-bf537/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * File: include/asm-blackfin/mach-bf537/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf537/anomaly.h |
| 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 4 | * | 4 | * |
| 5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| @@ -110,7 +110,7 @@ | |||
| 110 | #define ANOMALY_05000301 (1) | 110 | #define ANOMALY_05000301 (1) |
| 111 | /* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */ | 111 | /* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */ |
| 112 | #define ANOMALY_05000304 (__SILICON_REVISION__ < 3) | 112 | #define ANOMALY_05000304 (__SILICON_REVISION__ < 3) |
| 113 | /* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ | 113 | /* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */ |
| 114 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 3) | 114 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 3) |
| 115 | /* SCKELOW Bit Does Not Maintain State Through Hibernate */ | 115 | /* SCKELOW Bit Does Not Maintain State Through Hibernate */ |
| 116 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 3) | 116 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 3) |
| @@ -168,9 +168,12 @@ | |||
| 168 | #define ANOMALY_05000323 (0) | 168 | #define ANOMALY_05000323 (0) |
| 169 | #define ANOMALY_05000353 (1) | 169 | #define ANOMALY_05000353 (1) |
| 170 | #define ANOMALY_05000363 (0) | 170 | #define ANOMALY_05000363 (0) |
| 171 | #define ANOMALY_05000380 (0) | ||
| 171 | #define ANOMALY_05000386 (1) | 172 | #define ANOMALY_05000386 (1) |
| 172 | #define ANOMALY_05000412 (0) | 173 | #define ANOMALY_05000412 (0) |
| 173 | #define ANOMALY_05000432 (0) | 174 | #define ANOMALY_05000432 (0) |
| 174 | #define ANOMALY_05000435 (0) | 175 | #define ANOMALY_05000435 (0) |
| 176 | #define ANOMALY_05000447 (0) | ||
| 177 | #define ANOMALY_05000448 (0) | ||
| 175 | 178 | ||
| 176 | #endif | 179 | #endif |
diff --git a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h index b3f87e1d16a2..9e34700844a2 100644 --- a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h | |||
| @@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 144 | CH_UART0_TX, | 144 | CH_UART0_TX, |
| 145 | CH_UART0_RX, | 145 | CH_UART0_RX, |
| 146 | #endif | 146 | #endif |
| 147 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 147 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 148 | CONFIG_UART0_CTS_PIN, | 148 | CONFIG_UART0_CTS_PIN, |
| 149 | CONFIG_UART0_RTS_PIN, | 149 | CONFIG_UART0_RTS_PIN, |
| 150 | #endif | 150 | #endif |
| @@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 158 | CH_UART1_TX, | 158 | CH_UART1_TX, |
| 159 | CH_UART1_RX, | 159 | CH_UART1_RX, |
| 160 | #endif | 160 | #endif |
| 161 | #ifdef CONFIG_BFIN_UART1_CTSRTS | 161 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 162 | CONFIG_UART1_CTS_PIN, | 162 | CONFIG_UART1_CTS_PIN, |
| 163 | CONFIG_UART1_RTS_PIN, | 163 | CONFIG_UART1_RTS_PIN, |
| 164 | #endif | 164 | #endif |
diff --git a/arch/blackfin/mach-bf538/include/mach/anomaly.h b/arch/blackfin/mach-bf538/include/mach/anomaly.h index e130b4f8a05d..3a5699827363 100644 --- a/arch/blackfin/mach-bf538/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf538/include/mach/anomaly.h | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * File: include/asm-blackfin/mach-bf538/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf538/anomaly.h |
| 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 4 | * | 4 | * |
| 5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| @@ -120,13 +120,17 @@ | |||
| 120 | #define ANOMALY_05000198 (0) | 120 | #define ANOMALY_05000198 (0) |
| 121 | #define ANOMALY_05000230 (0) | 121 | #define ANOMALY_05000230 (0) |
| 122 | #define ANOMALY_05000263 (0) | 122 | #define ANOMALY_05000263 (0) |
| 123 | #define ANOMALY_05000305 (0) | ||
| 123 | #define ANOMALY_05000311 (0) | 124 | #define ANOMALY_05000311 (0) |
| 124 | #define ANOMALY_05000323 (0) | 125 | #define ANOMALY_05000323 (0) |
| 125 | #define ANOMALY_05000353 (1) | 126 | #define ANOMALY_05000353 (1) |
| 126 | #define ANOMALY_05000363 (0) | 127 | #define ANOMALY_05000363 (0) |
| 128 | #define ANOMALY_05000380 (0) | ||
| 127 | #define ANOMALY_05000386 (1) | 129 | #define ANOMALY_05000386 (1) |
| 128 | #define ANOMALY_05000412 (0) | 130 | #define ANOMALY_05000412 (0) |
| 129 | #define ANOMALY_05000432 (0) | 131 | #define ANOMALY_05000432 (0) |
| 130 | #define ANOMALY_05000435 (0) | 132 | #define ANOMALY_05000435 (0) |
| 133 | #define ANOMALY_05000447 (0) | ||
| 134 | #define ANOMALY_05000448 (0) | ||
| 131 | 135 | ||
| 132 | #endif | 136 | #endif |
diff --git a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h index 40503b6b89a3..3c2811ebecdd 100644 --- a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h | |||
| @@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 144 | CH_UART0_TX, | 144 | CH_UART0_TX, |
| 145 | CH_UART0_RX, | 145 | CH_UART0_RX, |
| 146 | #endif | 146 | #endif |
| 147 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 147 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 148 | CONFIG_UART0_CTS_PIN, | 148 | CONFIG_UART0_CTS_PIN, |
| 149 | CONFIG_UART0_RTS_PIN, | 149 | CONFIG_UART0_RTS_PIN, |
| 150 | #endif | 150 | #endif |
| @@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 158 | CH_UART1_TX, | 158 | CH_UART1_TX, |
| 159 | CH_UART1_RX, | 159 | CH_UART1_RX, |
| 160 | #endif | 160 | #endif |
| 161 | #ifdef CONFIG_BFIN_UART1_CTSRTS | 161 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 162 | CONFIG_UART1_CTS_PIN, | 162 | CONFIG_UART1_CTS_PIN, |
| 163 | CONFIG_UART1_RTS_PIN, | 163 | CONFIG_UART1_RTS_PIN, |
| 164 | #endif | 164 | #endif |
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h index 23d03c52f4b4..882e40ccf0d1 100644 --- a/arch/blackfin/mach-bf548/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h | |||
| @@ -2,12 +2,12 @@ | |||
| 2 | * File: include/asm-blackfin/mach-bf548/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf548/anomaly.h |
| 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 4 | * | 4 | * |
| 5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | /* This file shoule be up to date with: | 9 | /* This file shoule be up to date with: |
| 10 | * - Revision G, 08/07/2008; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List | 10 | * - Revision H, 01/16/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List |
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| 13 | #ifndef _MACH_ANOMALY_H_ | 13 | #ifndef _MACH_ANOMALY_H_ |
| @@ -91,8 +91,6 @@ | |||
| 91 | #define ANOMALY_05000371 (__SILICON_REVISION__ < 2) | 91 | #define ANOMALY_05000371 (__SILICON_REVISION__ < 2) |
| 92 | /* USB DP/DM Data Pins May Lose State When Entering Hibernate */ | 92 | /* USB DP/DM Data Pins May Lose State When Entering Hibernate */ |
| 93 | #define ANOMALY_05000372 (__SILICON_REVISION__ < 1) | 93 | #define ANOMALY_05000372 (__SILICON_REVISION__ < 1) |
| 94 | /* Mobile DDR Operation Not Functional */ | ||
| 95 | #define ANOMALY_05000377 (1) | ||
| 96 | /* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */ | 94 | /* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */ |
| 97 | #define ANOMALY_05000378 (__SILICON_REVISION__ < 2) | 95 | #define ANOMALY_05000378 (__SILICON_REVISION__ < 2) |
| 98 | /* 16-Bit NAND FLASH Boot Mode Is Not Functional */ | 96 | /* 16-Bit NAND FLASH Boot Mode Is Not Functional */ |
| @@ -157,8 +155,22 @@ | |||
| 157 | #define ANOMALY_05000429 (__SILICON_REVISION__ < 2) | 155 | #define ANOMALY_05000429 (__SILICON_REVISION__ < 2) |
| 158 | /* Software System Reset Corrupts PLL_LOCKCNT Register */ | 156 | /* Software System Reset Corrupts PLL_LOCKCNT Register */ |
| 159 | #define ANOMALY_05000430 (__SILICON_REVISION__ >= 2) | 157 | #define ANOMALY_05000430 (__SILICON_REVISION__ >= 2) |
| 158 | /* Incorrect Use of Stack in Lockbox Firmware During Authentication */ | ||
| 159 | #define ANOMALY_05000431 (__SILICON_REVISION__ < 3) | ||
| 160 | /* OTP Write Accesses Not Supported */ | ||
| 161 | #define ANOMALY_05000442 (__SILICON_REVISION__ < 1) | ||
| 160 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ | 162 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ |
| 161 | #define ANOMALY_05000443 (1) | 163 | #define ANOMALY_05000443 (1) |
| 164 | /* CDMAPRIO and L2DMAPRIO Bits in the SYSCR Register Are Not Functional */ | ||
| 165 | #define ANOMALY_05000446 (1) | ||
| 166 | /* UART IrDA Receiver Fails on Extended Bit Pulses */ | ||
| 167 | #define ANOMALY_05000447 (1) | ||
| 168 | /* DDR Clock Duty Cycle Spec Violation (tCH, tCL) */ | ||
| 169 | #define ANOMALY_05000448 (__SILICON_REVISION__ == 1) | ||
| 170 | /* Reduced Timing Margins on DDR Output Setup and Hold (tDS and tDH) */ | ||
| 171 | #define ANOMALY_05000449 (__SILICON_REVISION__ == 1) | ||
| 172 | /* USB DMA Mode 1 Short Packet Data Corruption */ | ||
| 173 | #define ANOMALY_05000450 (1 | ||
| 162 | 174 | ||
| 163 | /* Anomalies that don't exist on this proc */ | 175 | /* Anomalies that don't exist on this proc */ |
| 164 | #define ANOMALY_05000125 (0) | 176 | #define ANOMALY_05000125 (0) |
| @@ -171,6 +183,8 @@ | |||
| 171 | #define ANOMALY_05000263 (0) | 183 | #define ANOMALY_05000263 (0) |
| 172 | #define ANOMALY_05000266 (0) | 184 | #define ANOMALY_05000266 (0) |
| 173 | #define ANOMALY_05000273 (0) | 185 | #define ANOMALY_05000273 (0) |
| 186 | #define ANOMALY_05000278 (0) | ||
| 187 | #define ANOMALY_05000305 (0) | ||
| 174 | #define ANOMALY_05000307 (0) | 188 | #define ANOMALY_05000307 (0) |
| 175 | #define ANOMALY_05000311 (0) | 189 | #define ANOMALY_05000311 (0) |
| 176 | #define ANOMALY_05000323 (0) | 190 | #define ANOMALY_05000323 (0) |
diff --git a/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h index e4cf35e7ab9f..c05e79cba257 100644 --- a/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h | |||
| @@ -63,7 +63,7 @@ | |||
| 63 | #define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v) | 63 | #define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v) |
| 64 | #define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF) | 64 | #define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF) |
| 65 | 65 | ||
| 66 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) | 66 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART2_CTSRTS) |
| 67 | # define CONFIG_SERIAL_BFIN_CTSRTS | 67 | # define CONFIG_SERIAL_BFIN_CTSRTS |
| 68 | 68 | ||
| 69 | # ifndef CONFIG_UART0_CTS_PIN | 69 | # ifndef CONFIG_UART0_CTS_PIN |
| @@ -74,12 +74,12 @@ | |||
| 74 | # define CONFIG_UART0_RTS_PIN -1 | 74 | # define CONFIG_UART0_RTS_PIN -1 |
| 75 | # endif | 75 | # endif |
| 76 | 76 | ||
| 77 | # ifndef CONFIG_UART1_CTS_PIN | 77 | # ifndef CONFIG_UART2_CTS_PIN |
| 78 | # define CONFIG_UART1_CTS_PIN -1 | 78 | # define CONFIG_UART2_CTS_PIN -1 |
| 79 | # endif | 79 | # endif |
| 80 | 80 | ||
| 81 | # ifndef CONFIG_UART1_RTS_PIN | 81 | # ifndef CONFIG_UART2_RTS_PIN |
| 82 | # define CONFIG_UART1_RTS_PIN -1 | 82 | # define CONFIG_UART2_RTS_PIN -1 |
| 83 | # endif | 83 | # endif |
| 84 | #endif | 84 | #endif |
| 85 | 85 | ||
| @@ -130,7 +130,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 130 | CH_UART0_TX, | 130 | CH_UART0_TX, |
| 131 | CH_UART0_RX, | 131 | CH_UART0_RX, |
| 132 | #endif | 132 | #endif |
| 133 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 133 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 134 | CONFIG_UART0_CTS_PIN, | 134 | CONFIG_UART0_CTS_PIN, |
| 135 | CONFIG_UART0_RTS_PIN, | 135 | CONFIG_UART0_RTS_PIN, |
| 136 | #endif | 136 | #endif |
| @@ -144,6 +144,10 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 144 | CH_UART1_TX, | 144 | CH_UART1_TX, |
| 145 | CH_UART1_RX, | 145 | CH_UART1_RX, |
| 146 | #endif | 146 | #endif |
| 147 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | ||
| 148 | 0, | ||
| 149 | 0, | ||
| 150 | #endif | ||
| 147 | }, | 151 | }, |
| 148 | #endif | 152 | #endif |
| 149 | #ifdef CONFIG_SERIAL_BFIN_UART2 | 153 | #ifdef CONFIG_SERIAL_BFIN_UART2 |
| @@ -154,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 154 | CH_UART2_TX, | 158 | CH_UART2_TX, |
| 155 | CH_UART2_RX, | 159 | CH_UART2_RX, |
| 156 | #endif | 160 | #endif |
| 157 | #ifdef CONFIG_BFIN_UART2_CTSRTS | 161 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 158 | CONFIG_UART2_CTS_PIN, | 162 | CONFIG_UART2_CTS_PIN, |
| 159 | CONFIG_UART2_RTS_PIN, | 163 | CONFIG_UART2_RTS_PIN, |
| 160 | #endif | 164 | #endif |
| @@ -168,6 +172,10 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 168 | CH_UART3_TX, | 172 | CH_UART3_TX, |
| 169 | CH_UART3_RX, | 173 | CH_UART3_RX, |
| 170 | #endif | 174 | #endif |
| 175 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | ||
| 176 | 0, | ||
| 177 | 0, | ||
| 178 | #endif | ||
| 171 | }, | 179 | }, |
| 172 | #endif | 180 | #endif |
| 173 | }; | 181 | }; |
diff --git a/arch/blackfin/mach-bf548/include/mach/irq.h b/arch/blackfin/mach-bf548/include/mach/irq.h index 60299a71e090..f194625f6821 100644 --- a/arch/blackfin/mach-bf548/include/mach/irq.h +++ b/arch/blackfin/mach-bf548/include/mach/irq.h | |||
| @@ -123,8 +123,8 @@ Events (highest priority) EMU 0 | |||
| 123 | #define IRQ_MXVR_ERROR BFIN_IRQ(51) /* MXVR Status (Error) Interrupt */ | 123 | #define IRQ_MXVR_ERROR BFIN_IRQ(51) /* MXVR Status (Error) Interrupt */ |
| 124 | #define IRQ_MXVR_MSG BFIN_IRQ(52) /* MXVR Message Interrupt */ | 124 | #define IRQ_MXVR_MSG BFIN_IRQ(52) /* MXVR Message Interrupt */ |
| 125 | #define IRQ_MXVR_PKT BFIN_IRQ(53) /* MXVR Packet Interrupt */ | 125 | #define IRQ_MXVR_PKT BFIN_IRQ(53) /* MXVR Packet Interrupt */ |
| 126 | #define IRQ_EPP1_ERROR BFIN_IRQ(54) /* EPPI1 Error Interrupt */ | 126 | #define IRQ_EPPI1_ERROR BFIN_IRQ(54) /* EPPI1 Error Interrupt */ |
| 127 | #define IRQ_EPP2_ERROR BFIN_IRQ(55) /* EPPI2 Error Interrupt */ | 127 | #define IRQ_EPPI2_ERROR BFIN_IRQ(55) /* EPPI2 Error Interrupt */ |
| 128 | #define IRQ_UART3_ERROR BFIN_IRQ(56) /* UART3 Status (Error) Interrupt */ | 128 | #define IRQ_UART3_ERROR BFIN_IRQ(56) /* UART3 Status (Error) Interrupt */ |
| 129 | #define IRQ_HOST_ERROR BFIN_IRQ(57) /* HOST Status (Error) Interrupt */ | 129 | #define IRQ_HOST_ERROR BFIN_IRQ(57) /* HOST Status (Error) Interrupt */ |
| 130 | #define IRQ_PIXC_ERROR BFIN_IRQ(59) /* PIXC Status (Error) Interrupt */ | 130 | #define IRQ_PIXC_ERROR BFIN_IRQ(59) /* PIXC Status (Error) Interrupt */ |
| @@ -361,8 +361,8 @@ Events (highest priority) EMU 0 | |||
| 361 | #define IRQ_UART2_ERR IRQ_UART2_ERROR | 361 | #define IRQ_UART2_ERR IRQ_UART2_ERROR |
| 362 | #define IRQ_CAN0_ERR IRQ_CAN0_ERROR | 362 | #define IRQ_CAN0_ERR IRQ_CAN0_ERROR |
| 363 | #define IRQ_MXVR_ERR IRQ_MXVR_ERROR | 363 | #define IRQ_MXVR_ERR IRQ_MXVR_ERROR |
| 364 | #define IRQ_EPP1_ERR IRQ_EPP1_ERROR | 364 | #define IRQ_EPPI1_ERR IRQ_EPPI1_ERROR |
| 365 | #define IRQ_EPP2_ERR IRQ_EPP2_ERROR | 365 | #define IRQ_EPPI2_ERR IRQ_EPPI2_ERROR |
| 366 | #define IRQ_UART3_ERR IRQ_UART3_ERROR | 366 | #define IRQ_UART3_ERR IRQ_UART3_ERROR |
| 367 | #define IRQ_HOST_ERR IRQ_HOST_ERROR | 367 | #define IRQ_HOST_ERR IRQ_HOST_ERROR |
| 368 | #define IRQ_PIXC_ERR IRQ_PIXC_ERROR | 368 | #define IRQ_PIXC_ERR IRQ_PIXC_ERROR |
diff --git a/arch/blackfin/mach-bf561/boards/Kconfig b/arch/blackfin/mach-bf561/boards/Kconfig index e41a67b1fb53..e4bc6d7c5a6a 100644 --- a/arch/blackfin/mach-bf561/boards/Kconfig +++ b/arch/blackfin/mach-bf561/boards/Kconfig | |||
| @@ -19,9 +19,4 @@ config BFIN561_BLUETECHNIX_CM | |||
| 19 | help | 19 | help |
| 20 | CM-BF561 support for EVAL- and DEV-Board. | 20 | CM-BF561 support for EVAL- and DEV-Board. |
| 21 | 21 | ||
| 22 | config GENERIC_BF561_BOARD | ||
| 23 | bool "Generic" | ||
| 24 | help | ||
| 25 | Generic or Custom board support. | ||
| 26 | |||
| 27 | endchoice | 22 | endchoice |
diff --git a/arch/blackfin/mach-bf561/boards/Makefile b/arch/blackfin/mach-bf561/boards/Makefile index 04add010b568..3a152559e957 100644 --- a/arch/blackfin/mach-bf561/boards/Makefile +++ b/arch/blackfin/mach-bf561/boards/Makefile | |||
| @@ -2,7 +2,6 @@ | |||
| 2 | # arch/blackfin/mach-bf561/boards/Makefile | 2 | # arch/blackfin/mach-bf561/boards/Makefile |
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | obj-$(CONFIG_GENERIC_BF561_BOARD) += generic_board.o | ||
| 6 | obj-$(CONFIG_BFIN561_BLUETECHNIX_CM) += cm_bf561.o | 5 | obj-$(CONFIG_BFIN561_BLUETECHNIX_CM) += cm_bf561.o |
| 7 | obj-$(CONFIG_BFIN561_EZKIT) += ezkit.o | 6 | obj-$(CONFIG_BFIN561_EZKIT) += ezkit.o |
| 8 | obj-$(CONFIG_BFIN561_TEPLA) += tepla.o | 7 | obj-$(CONFIG_BFIN561_TEPLA) += tepla.o |
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c index 6880d1ebfe60..f623c6b0719f 100644 --- a/arch/blackfin/mach-bf561/boards/cm_bf561.c +++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c | |||
| @@ -105,9 +105,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |||
| 105 | }; | 105 | }; |
| 106 | #endif | 106 | #endif |
| 107 | 107 | ||
| 108 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 108 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 109 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 109 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
| 110 | .enable_dma = 1, | 110 | .enable_dma = 0, |
| 111 | .bits_per_word = 8, | 111 | .bits_per_word = 8, |
| 112 | }; | 112 | }; |
| 113 | #endif | 113 | #endif |
| @@ -155,14 +155,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 155 | .controller_data = &ad9960_spi_chip_info, | 155 | .controller_data = &ad9960_spi_chip_info, |
| 156 | }, | 156 | }, |
| 157 | #endif | 157 | #endif |
| 158 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 158 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 159 | { | 159 | { |
| 160 | .modalias = "spi_mmc", | 160 | .modalias = "mmc_spi", |
| 161 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 161 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| 162 | .bus_num = 0, | 162 | .bus_num = 0, |
| 163 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 163 | .chip_select = 5, |
| 164 | .platform_data = NULL, | 164 | .controller_data = &mmc_spi_chip_info, |
| 165 | .controller_data = &spi_mmc_chip_info, | ||
| 166 | .mode = SPI_MODE_3, | 165 | .mode = SPI_MODE_3, |
| 167 | }, | 166 | }, |
| 168 | #endif | 167 | #endif |
diff --git a/arch/blackfin/mach-bf561/boards/generic_board.c b/arch/blackfin/mach-bf561/boards/generic_board.c deleted file mode 100644 index 0ba366a0e696..000000000000 --- a/arch/blackfin/mach-bf561/boards/generic_board.c +++ /dev/null | |||
| @@ -1,113 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * File: arch/blackfin/mach-bf561/generic_board.c | ||
| 3 | * Based on: arch/blackfin/mach-bf533/ezkit.c | ||
| 4 | * Author: Aidan Williams <aidan@nicta.com.au> | ||
| 5 | * | ||
| 6 | * Created: | ||
| 7 | * Description: | ||
| 8 | * | ||
| 9 | * Modified: | ||
| 10 | * Copyright 2005 National ICT Australia (NICTA) | ||
| 11 | * Copyright 2004-2006 Analog Devices Inc. | ||
| 12 | * | ||
| 13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | ||
| 14 | * | ||
| 15 | * This program is free software; you can redistribute it and/or modify | ||
| 16 | * it under the terms of the GNU General Public License as published by | ||
| 17 | * the Free Software Foundation; either version 2 of the License, or | ||
| 18 | * (at your option) any later version. | ||
| 19 | * | ||
| 20 | * This program is distributed in the hope that it will be useful, | ||
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 23 | * GNU General Public License for more details. | ||
| 24 | * | ||
| 25 | * You should have received a copy of the GNU General Public License | ||
| 26 | * along with this program; if not, see the file COPYING, or write | ||
| 27 | * to the Free Software Foundation, Inc., | ||
| 28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 29 | */ | ||
| 30 | |||
| 31 | #include <linux/device.h> | ||
| 32 | #include <linux/platform_device.h> | ||
| 33 | #include <linux/irq.h> | ||
| 34 | |||
| 35 | const char bfin_board_name[] = "UNKNOWN BOARD"; | ||
| 36 | |||
| 37 | /* | ||
| 38 | * Driver needs to know address, irq and flag pin. | ||
| 39 | */ | ||
| 40 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
| 41 | static struct resource smc91x_resources[] = { | ||
| 42 | { | ||
| 43 | .start = 0x2C010300, | ||
| 44 | .end = 0x2C010300 + 16, | ||
| 45 | .flags = IORESOURCE_MEM, | ||
| 46 | }, { | ||
| 47 | .start = IRQ_PROG_INTB, | ||
| 48 | .end = IRQ_PROG_INTB, | ||
| 49 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
| 50 | }, { | ||
| 51 | .start = IRQ_PF9, | ||
| 52 | .end = IRQ_PF9, | ||
| 53 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
| 54 | }, | ||
| 55 | }; | ||
| 56 | |||
| 57 | static struct platform_device smc91x_device = { | ||
| 58 | .name = "smc91x", | ||
| 59 | .id = 0, | ||
| 60 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
| 61 | .resource = smc91x_resources, | ||
| 62 | }; | ||
| 63 | #endif | ||
| 64 | |||
| 65 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
| 66 | #ifdef CONFIG_BFIN_SIR0 | ||
| 67 | static struct resource bfin_sir0_resources[] = { | ||
| 68 | { | ||
| 69 | .start = 0xFFC00400, | ||
| 70 | .end = 0xFFC004FF, | ||
| 71 | .flags = IORESOURCE_MEM, | ||
| 72 | }, | ||
| 73 | { | ||
| 74 | .start = IRQ_UART0_RX, | ||
| 75 | .end = IRQ_UART0_RX+1, | ||
| 76 | .flags = IORESOURCE_IRQ, | ||
| 77 | }, | ||
| 78 | { | ||
| 79 | .start = CH_UART0_RX, | ||
| 80 | .end = CH_UART0_RX+1, | ||
| 81 | .flags = IORESOURCE_DMA, | ||
| 82 | }, | ||
| 83 | }; | ||
| 84 | |||
| 85 | static struct platform_device bfin_sir0_device = { | ||
| 86 | .name = "bfin_sir", | ||
| 87 | .id = 0, | ||
| 88 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), | ||
| 89 | .resource = bfin_sir0_resources, | ||
| 90 | }; | ||
| 91 | #endif | ||
| 92 | #endif | ||
| 93 | |||
| 94 | static struct platform_device *generic_board_devices[] __initdata = { | ||
| 95 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
| 96 | &smc91x_device, | ||
| 97 | #endif | ||
| 98 | |||
| 99 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
| 100 | #ifdef CONFIG_BFIN_SIR0 | ||
| 101 | &bfin_sir0_device, | ||
| 102 | #endif | ||
| 103 | #endif | ||
| 104 | }; | ||
| 105 | |||
| 106 | static int __init generic_board_init(void) | ||
| 107 | { | ||
| 108 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | ||
| 109 | return platform_add_devices(generic_board_devices, | ||
| 110 | ARRAY_SIZE(generic_board_devices)); | ||
| 111 | } | ||
| 112 | |||
| 113 | arch_initcall(generic_board_init); | ||
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h index 1a9e17562821..d0b0b3506440 100644 --- a/arch/blackfin/mach-bf561/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * File: include/asm-blackfin/mach-bf561/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf561/anomaly.h |
| 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 4 | * | 4 | * |
| 5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| @@ -224,7 +224,7 @@ | |||
| 224 | #define ANOMALY_05000301 (1) | 224 | #define ANOMALY_05000301 (1) |
| 225 | /* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ | 225 | /* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ |
| 226 | #define ANOMALY_05000302 (1) | 226 | #define ANOMALY_05000302 (1) |
| 227 | /* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ | 227 | /* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */ |
| 228 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 5) | 228 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 5) |
| 229 | /* SCKELOW Bit Does Not Maintain State Through Hibernate */ | 229 | /* SCKELOW Bit Does Not Maintain State Through Hibernate */ |
| 230 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 5) | 230 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 5) |
| @@ -283,8 +283,11 @@ | |||
| 283 | #define ANOMALY_05000273 (0) | 283 | #define ANOMALY_05000273 (0) |
| 284 | #define ANOMALY_05000311 (0) | 284 | #define ANOMALY_05000311 (0) |
| 285 | #define ANOMALY_05000353 (1) | 285 | #define ANOMALY_05000353 (1) |
| 286 | #define ANOMALY_05000380 (0) | ||
| 286 | #define ANOMALY_05000386 (1) | 287 | #define ANOMALY_05000386 (1) |
| 287 | #define ANOMALY_05000432 (0) | 288 | #define ANOMALY_05000432 (0) |
| 288 | #define ANOMALY_05000435 (0) | 289 | #define ANOMALY_05000435 (0) |
| 290 | #define ANOMALY_05000447 (0) | ||
| 291 | #define ANOMALY_05000448 (0) | ||
| 289 | 292 | ||
| 290 | #endif | 293 | #endif |
diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h index 043bfcf26c52..ca8c5f645209 100644 --- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h | |||
| @@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
| 134 | CH_UART_TX, | 134 | CH_UART_TX, |
| 135 | CH_UART_RX, | 135 | CH_UART_RX, |
| 136 | #endif | 136 | #endif |
| 137 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 137 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 138 | CONFIG_UART0_CTS_PIN, | 138 | CONFIG_UART0_CTS_PIN, |
| 139 | CONFIG_UART0_RTS_PIN, | 139 | CONFIG_UART0_RTS_PIN, |
| 140 | #endif | 140 | #endif |
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c index 98133b968f7b..80d39b2f9db2 100644 --- a/arch/blackfin/mach-common/arch_checks.c +++ b/arch/blackfin/mach-common/arch_checks.c | |||
| @@ -62,3 +62,12 @@ | |||
| 62 | #if (CONFIG_BOOT_LOAD & 0x3) | 62 | #if (CONFIG_BOOT_LOAD & 0x3) |
| 63 | # error "The kernel load address must be 4 byte aligned" | 63 | # error "The kernel load address must be 4 byte aligned" |
| 64 | #endif | 64 | #endif |
| 65 | |||
| 66 | /* The entire kernel must be able to make a 24bit pcrel call to start of L1 */ | ||
| 67 | #if ((0xffffffff - L1_CODE_START + 1) + CONFIG_BOOT_LOAD) > 0x1000000 | ||
| 68 | # error "The kernel load address is too high; keep it below 10meg for safety" | ||
| 69 | #endif | ||
| 70 | |||
| 71 | #if ANOMALY_05000448 | ||
| 72 | # error You are using a part with anomaly 05000448, this issue causes random memory read/write failures - that means random crashes. | ||
| 73 | #endif | ||
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S index 3c98dacbf289..aa0648c6a9fe 100644 --- a/arch/blackfin/mach-common/cache.S +++ b/arch/blackfin/mach-common/cache.S | |||
| @@ -66,11 +66,33 @@ | |||
| 66 | 66 | ||
| 67 | /* Invalidate all instruction cache lines assocoiated with this memory area */ | 67 | /* Invalidate all instruction cache lines assocoiated with this memory area */ |
| 68 | ENTRY(_blackfin_icache_flush_range) | 68 | ENTRY(_blackfin_icache_flush_range) |
| 69 | /* | ||
| 70 | * Walkaround to avoid loading wrong instruction after invalidating icache | ||
| 71 | * and following sequence is met. | ||
| 72 | * | ||
| 73 | * 1) One instruction address is cached in the instruction cache. | ||
| 74 | * 2) This instruction in SDRAM is changed. | ||
| 75 | * 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range(). | ||
| 76 | * 4) This instruction is executed again, but the old one is loaded. | ||
| 77 | */ | ||
| 78 | P0 = R0; | ||
| 79 | IFLUSH[P0]; | ||
| 69 | do_flush IFLUSH, , nop | 80 | do_flush IFLUSH, , nop |
| 70 | ENDPROC(_blackfin_icache_flush_range) | 81 | ENDPROC(_blackfin_icache_flush_range) |
| 71 | 82 | ||
| 72 | /* Flush all cache lines assocoiated with this area of memory. */ | 83 | /* Flush all cache lines assocoiated with this area of memory. */ |
| 73 | ENTRY(_blackfin_icache_dcache_flush_range) | 84 | ENTRY(_blackfin_icache_dcache_flush_range) |
| 85 | /* | ||
| 86 | * Walkaround to avoid loading wrong instruction after invalidating icache | ||
| 87 | * and following sequence is met. | ||
| 88 | * | ||
| 89 | * 1) One instruction address is cached in the instruction cache. | ||
| 90 | * 2) This instruction in SDRAM is changed. | ||
| 91 | * 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range(). | ||
| 92 | * 4) This instruction is executed again, but the old one is loaded. | ||
| 93 | */ | ||
| 94 | P0 = R0; | ||
| 95 | IFLUSH[P0]; | ||
| 74 | do_flush FLUSH, IFLUSH | 96 | do_flush FLUSH, IFLUSH |
| 75 | ENDPROC(_blackfin_icache_dcache_flush_range) | 97 | ENDPROC(_blackfin_icache_dcache_flush_range) |
| 76 | 98 | ||
diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c index 9dddb6f8cc85..35393651359b 100644 --- a/arch/blackfin/mach-common/clocks-init.c +++ b/arch/blackfin/mach-common/clocks-init.c | |||
| @@ -17,7 +17,7 @@ | |||
| 17 | #define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */ | 17 | #define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */ |
| 18 | #define PLL_CTL_VAL \ | 18 | #define PLL_CTL_VAL \ |
| 19 | (((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \ | 19 | (((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \ |
| 20 | (PLL_BYPASS << 8) | (ANOMALY_05000265 ? 0x8000 : 0)) | 20 | (PLL_BYPASS << 8) | (ANOMALY_05000305 ? 0 : 0x8000)) |
| 21 | 21 | ||
| 22 | __attribute__((l1_text)) | 22 | __attribute__((l1_text)) |
| 23 | static void do_sync(void) | 23 | static void do_sync(void) |
diff --git a/arch/blackfin/mach-common/dpmc_modes.S b/arch/blackfin/mach-common/dpmc_modes.S index 4da50bcd9300..8009a512fb11 100644 --- a/arch/blackfin/mach-common/dpmc_modes.S +++ b/arch/blackfin/mach-common/dpmc_modes.S | |||
| @@ -376,10 +376,22 @@ ENTRY(_do_hibernate) | |||
| 376 | #endif | 376 | #endif |
| 377 | 377 | ||
| 378 | #ifdef PINT0_ASSIGN | 378 | #ifdef PINT0_ASSIGN |
| 379 | PM_SYS_PUSH(PINT0_MASK_SET) | ||
| 380 | PM_SYS_PUSH(PINT1_MASK_SET) | ||
| 381 | PM_SYS_PUSH(PINT2_MASK_SET) | ||
| 382 | PM_SYS_PUSH(PINT3_MASK_SET) | ||
| 379 | PM_SYS_PUSH(PINT0_ASSIGN) | 383 | PM_SYS_PUSH(PINT0_ASSIGN) |
| 380 | PM_SYS_PUSH(PINT1_ASSIGN) | 384 | PM_SYS_PUSH(PINT1_ASSIGN) |
| 381 | PM_SYS_PUSH(PINT2_ASSIGN) | 385 | PM_SYS_PUSH(PINT2_ASSIGN) |
| 382 | PM_SYS_PUSH(PINT3_ASSIGN) | 386 | PM_SYS_PUSH(PINT3_ASSIGN) |
| 387 | PM_SYS_PUSH(PINT0_INVERT_SET) | ||
| 388 | PM_SYS_PUSH(PINT1_INVERT_SET) | ||
| 389 | PM_SYS_PUSH(PINT2_INVERT_SET) | ||
| 390 | PM_SYS_PUSH(PINT3_INVERT_SET) | ||
| 391 | PM_SYS_PUSH(PINT0_EDGE_SET) | ||
| 392 | PM_SYS_PUSH(PINT1_EDGE_SET) | ||
| 393 | PM_SYS_PUSH(PINT2_EDGE_SET) | ||
| 394 | PM_SYS_PUSH(PINT3_EDGE_SET) | ||
| 383 | #endif | 395 | #endif |
| 384 | 396 | ||
| 385 | PM_SYS_PUSH(EBIU_AMBCTL0) | 397 | PM_SYS_PUSH(EBIU_AMBCTL0) |
| @@ -714,10 +726,22 @@ ENTRY(_do_hibernate) | |||
| 714 | PM_SYS_POP(EBIU_AMBCTL0) | 726 | PM_SYS_POP(EBIU_AMBCTL0) |
| 715 | 727 | ||
| 716 | #ifdef PINT0_ASSIGN | 728 | #ifdef PINT0_ASSIGN |
| 729 | PM_SYS_POP(PINT3_EDGE_SET) | ||
| 730 | PM_SYS_POP(PINT2_EDGE_SET) | ||
| 731 | PM_SYS_POP(PINT1_EDGE_SET) | ||
| 732 | PM_SYS_POP(PINT0_EDGE_SET) | ||
| 733 | PM_SYS_POP(PINT3_INVERT_SET) | ||
| 734 | PM_SYS_POP(PINT2_INVERT_SET) | ||
| 735 | PM_SYS_POP(PINT1_INVERT_SET) | ||
| 736 | PM_SYS_POP(PINT0_INVERT_SET) | ||
| 717 | PM_SYS_POP(PINT3_ASSIGN) | 737 | PM_SYS_POP(PINT3_ASSIGN) |
| 718 | PM_SYS_POP(PINT2_ASSIGN) | 738 | PM_SYS_POP(PINT2_ASSIGN) |
| 719 | PM_SYS_POP(PINT1_ASSIGN) | 739 | PM_SYS_POP(PINT1_ASSIGN) |
| 720 | PM_SYS_POP(PINT0_ASSIGN) | 740 | PM_SYS_POP(PINT0_ASSIGN) |
| 741 | PM_SYS_POP(PINT3_MASK_SET) | ||
| 742 | PM_SYS_POP(PINT2_MASK_SET) | ||
| 743 | PM_SYS_POP(PINT1_MASK_SET) | ||
| 744 | PM_SYS_POP(PINT0_MASK_SET) | ||
| 721 | #endif | 745 | #endif |
| 722 | 746 | ||
| 723 | #ifdef SICA_IWR1 | 747 | #ifdef SICA_IWR1 |
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S index 88de053bbe8e..21e65a339a22 100644 --- a/arch/blackfin/mach-common/entry.S +++ b/arch/blackfin/mach-common/entry.S | |||
| @@ -600,6 +600,19 @@ ENTRY(_system_call) | |||
| 600 | p2 = [p2]; | 600 | p2 = [p2]; |
| 601 | 601 | ||
| 602 | [p2+(TASK_THREAD+THREAD_KSP)] = sp; | 602 | [p2+(TASK_THREAD+THREAD_KSP)] = sp; |
| 603 | #ifdef CONFIG_IPIPE | ||
| 604 | r0 = sp; | ||
| 605 | SP += -12; | ||
| 606 | call ___ipipe_syscall_root; | ||
| 607 | SP += 12; | ||
| 608 | cc = r0 == 1; | ||
| 609 | if cc jump .Lsyscall_really_exit; | ||
| 610 | cc = r0 == -1; | ||
| 611 | if cc jump .Lresume_userspace; | ||
| 612 | r3 = [sp + PT_R3]; | ||
| 613 | r4 = [sp + PT_R4]; | ||
| 614 | p0 = [sp + PT_ORIG_P0]; | ||
| 615 | #endif /* CONFIG_IPIPE */ | ||
| 603 | 616 | ||
| 604 | /* Check the System Call */ | 617 | /* Check the System Call */ |
| 605 | r7 = __NR_syscall; | 618 | r7 = __NR_syscall; |
| @@ -654,6 +667,17 @@ ENTRY(_system_call) | |||
| 654 | r7 = r7 & r4; | 667 | r7 = r7 & r4; |
| 655 | 668 | ||
| 656 | .Lsyscall_resched: | 669 | .Lsyscall_resched: |
| 670 | #ifdef CONFIG_IPIPE | ||
| 671 | cc = BITTST(r7, TIF_IRQ_SYNC); | ||
| 672 | if !cc jump .Lsyscall_no_irqsync; | ||
| 673 | [--sp] = reti; | ||
| 674 | r0 = [sp++]; | ||
| 675 | SP += -12; | ||
| 676 | call ___ipipe_sync_root; | ||
| 677 | SP += 12; | ||
| 678 | jump .Lresume_userspace_1; | ||
| 679 | .Lsyscall_no_irqsync: | ||
| 680 | #endif | ||
| 657 | cc = BITTST(r7, TIF_NEED_RESCHED); | 681 | cc = BITTST(r7, TIF_NEED_RESCHED); |
| 658 | if !cc jump .Lsyscall_sigpending; | 682 | if !cc jump .Lsyscall_sigpending; |
| 659 | 683 | ||
| @@ -685,6 +709,10 @@ ENTRY(_system_call) | |||
| 685 | .Lsyscall_really_exit: | 709 | .Lsyscall_really_exit: |
| 686 | r5 = [sp + PT_RESERVED]; | 710 | r5 = [sp + PT_RESERVED]; |
| 687 | rets = r5; | 711 | rets = r5; |
| 712 | #ifdef CONFIG_IPIPE | ||
| 713 | [--sp] = reti; | ||
| 714 | r5 = [sp++]; | ||
| 715 | #endif /* CONFIG_IPIPE */ | ||
| 688 | rts; | 716 | rts; |
| 689 | ENDPROC(_system_call) | 717 | ENDPROC(_system_call) |
| 690 | 718 | ||
| @@ -771,6 +799,15 @@ _new_old_task: | |||
| 771 | ENDPROC(_resume) | 799 | ENDPROC(_resume) |
| 772 | 800 | ||
| 773 | ENTRY(_ret_from_exception) | 801 | ENTRY(_ret_from_exception) |
| 802 | #ifdef CONFIG_IPIPE | ||
| 803 | [--sp] = rets; | ||
| 804 | SP += -12; | ||
| 805 | call ___ipipe_check_root | ||
| 806 | SP += 12 | ||
| 807 | rets = [sp++]; | ||
| 808 | cc = r0 == 0; | ||
| 809 | if cc jump 4f; /* not on behalf of Linux, get out */ | ||
| 810 | #endif /* CONFIG_IPIPE */ | ||
| 774 | p2.l = lo(IPEND); | 811 | p2.l = lo(IPEND); |
| 775 | p2.h = hi(IPEND); | 812 | p2.h = hi(IPEND); |
| 776 | 813 | ||
| @@ -827,6 +864,28 @@ ENTRY(_ret_from_exception) | |||
| 827 | rts; | 864 | rts; |
| 828 | ENDPROC(_ret_from_exception) | 865 | ENDPROC(_ret_from_exception) |
| 829 | 866 | ||
| 867 | #ifdef CONFIG_IPIPE | ||
| 868 | |||
| 869 | _sync_root_irqs: | ||
| 870 | [--sp] = reti; /* Reenable interrupts */ | ||
| 871 | r0 = [sp++]; | ||
| 872 | jump.l ___ipipe_sync_root | ||
| 873 | |||
| 874 | _resume_kernel_from_int: | ||
| 875 | r0.l = _sync_root_irqs | ||
| 876 | r0.h = _sync_root_irqs | ||
| 877 | [--sp] = rets; | ||
| 878 | [--sp] = ( r7:4, p5:3 ); | ||
| 879 | SP += -12; | ||
| 880 | call ___ipipe_call_irqtail | ||
| 881 | SP += 12; | ||
| 882 | ( r7:4, p5:3 ) = [sp++]; | ||
| 883 | rets = [sp++]; | ||
| 884 | rts | ||
| 885 | #else | ||
| 886 | #define _resume_kernel_from_int 2f | ||
| 887 | #endif | ||
| 888 | |||
| 830 | ENTRY(_return_from_int) | 889 | ENTRY(_return_from_int) |
| 831 | /* If someone else already raised IRQ 15, do nothing. */ | 890 | /* If someone else already raised IRQ 15, do nothing. */ |
| 832 | csync; | 891 | csync; |
| @@ -848,7 +907,7 @@ ENTRY(_return_from_int) | |||
| 848 | r1 = r0 - r1; | 907 | r1 = r0 - r1; |
| 849 | r2 = r0 & r1; | 908 | r2 = r0 & r1; |
| 850 | cc = r2 == 0; | 909 | cc = r2 == 0; |
| 851 | if !cc jump 2f; | 910 | if !cc jump _resume_kernel_from_int; |
| 852 | 911 | ||
| 853 | /* Lower the interrupt level to 15. */ | 912 | /* Lower the interrupt level to 15. */ |
| 854 | p0.l = lo(EVT15); | 913 | p0.l = lo(EVT15); |
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S index 43c4eb9acb65..0069c2dd4625 100644 --- a/arch/blackfin/mach-common/interrupt.S +++ b/arch/blackfin/mach-common/interrupt.S | |||
| @@ -235,6 +235,7 @@ ENDPROC(_evt_system_call) | |||
| 235 | 235 | ||
| 236 | #ifdef CONFIG_IPIPE | 236 | #ifdef CONFIG_IPIPE |
| 237 | ENTRY(___ipipe_call_irqtail) | 237 | ENTRY(___ipipe_call_irqtail) |
| 238 | p0 = r0; | ||
| 238 | r0.l = 1f; | 239 | r0.l = 1f; |
| 239 | r0.h = 1f; | 240 | r0.h = 1f; |
| 240 | reti = r0; | 241 | reti = r0; |
| @@ -242,9 +243,6 @@ ENTRY(___ipipe_call_irqtail) | |||
| 242 | 1: | 243 | 1: |
| 243 | [--sp] = rets; | 244 | [--sp] = rets; |
| 244 | [--sp] = ( r7:4, p5:3 ); | 245 | [--sp] = ( r7:4, p5:3 ); |
| 245 | p0.l = ___ipipe_irq_tail_hook; | ||
| 246 | p0.h = ___ipipe_irq_tail_hook; | ||
| 247 | p0 = [p0]; | ||
| 248 | sp += -12; | 246 | sp += -12; |
| 249 | call (p0); | 247 | call (p0); |
| 250 | sp += 12; | 248 | sp += 12; |
| @@ -259,7 +257,7 @@ ENTRY(___ipipe_call_irqtail) | |||
| 259 | p0.h = hi(EVT14); | 257 | p0.h = hi(EVT14); |
| 260 | [p0] = r0; | 258 | [p0] = r0; |
| 261 | csync; | 259 | csync; |
| 262 | r0 = 0x401f; | 260 | r0 = 0x401f (z); |
| 263 | sti r0; | 261 | sti r0; |
| 264 | raise 14; | 262 | raise 14; |
| 265 | [--sp] = reti; /* IRQs on. */ | 263 | [--sp] = reti; /* IRQs on. */ |
| @@ -277,11 +275,7 @@ ENTRY(___ipipe_call_irqtail) | |||
| 277 | p0.h = _bfin_irq_flags; | 275 | p0.h = _bfin_irq_flags; |
| 278 | r0 = [p0]; | 276 | r0 = [p0]; |
| 279 | sti r0; | 277 | sti r0; |
| 280 | #if 0 /* FIXME: this actually raises scheduling latencies */ | ||
| 281 | /* Reenable interrupts */ | ||
| 282 | [--sp] = reti; | ||
| 283 | r0 = [sp++]; | ||
| 284 | #endif | ||
| 285 | rts; | 278 | rts; |
| 286 | ENDPROC(___ipipe_call_irqtail) | 279 | ENDPROC(___ipipe_call_irqtail) |
| 280 | |||
| 287 | #endif /* CONFIG_IPIPE */ | 281 | #endif /* CONFIG_IPIPE */ |
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 202494568c6c..a7d7b2dd4059 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c | |||
| @@ -161,11 +161,15 @@ static void bfin_core_unmask_irq(unsigned int irq) | |||
| 161 | 161 | ||
| 162 | static void bfin_internal_mask_irq(unsigned int irq) | 162 | static void bfin_internal_mask_irq(unsigned int irq) |
| 163 | { | 163 | { |
| 164 | unsigned long flags; | ||
| 165 | |||
| 164 | #ifdef CONFIG_BF53x | 166 | #ifdef CONFIG_BF53x |
| 167 | local_irq_save_hw(flags); | ||
| 165 | bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() & | 168 | bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() & |
| 166 | ~(1 << SIC_SYSIRQ(irq))); | 169 | ~(1 << SIC_SYSIRQ(irq))); |
| 167 | #else | 170 | #else |
| 168 | unsigned mask_bank, mask_bit; | 171 | unsigned mask_bank, mask_bit; |
| 172 | local_irq_save_hw(flags); | ||
| 169 | mask_bank = SIC_SYSIRQ(irq) / 32; | 173 | mask_bank = SIC_SYSIRQ(irq) / 32; |
| 170 | mask_bit = SIC_SYSIRQ(irq) % 32; | 174 | mask_bit = SIC_SYSIRQ(irq) % 32; |
| 171 | bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) & | 175 | bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) & |
| @@ -175,15 +179,20 @@ static void bfin_internal_mask_irq(unsigned int irq) | |||
| 175 | ~(1 << mask_bit)); | 179 | ~(1 << mask_bit)); |
| 176 | #endif | 180 | #endif |
| 177 | #endif | 181 | #endif |
| 182 | local_irq_restore_hw(flags); | ||
| 178 | } | 183 | } |
| 179 | 184 | ||
| 180 | static void bfin_internal_unmask_irq(unsigned int irq) | 185 | static void bfin_internal_unmask_irq(unsigned int irq) |
| 181 | { | 186 | { |
| 187 | unsigned long flags; | ||
| 188 | |||
| 182 | #ifdef CONFIG_BF53x | 189 | #ifdef CONFIG_BF53x |
| 190 | local_irq_save_hw(flags); | ||
| 183 | bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() | | 191 | bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() | |
| 184 | (1 << SIC_SYSIRQ(irq))); | 192 | (1 << SIC_SYSIRQ(irq))); |
| 185 | #else | 193 | #else |
| 186 | unsigned mask_bank, mask_bit; | 194 | unsigned mask_bank, mask_bit; |
| 195 | local_irq_save_hw(flags); | ||
| 187 | mask_bank = SIC_SYSIRQ(irq) / 32; | 196 | mask_bank = SIC_SYSIRQ(irq) / 32; |
| 188 | mask_bit = SIC_SYSIRQ(irq) % 32; | 197 | mask_bit = SIC_SYSIRQ(irq) % 32; |
| 189 | bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) | | 198 | bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) | |
| @@ -193,6 +202,7 @@ static void bfin_internal_unmask_irq(unsigned int irq) | |||
| 193 | (1 << mask_bit)); | 202 | (1 << mask_bit)); |
| 194 | #endif | 203 | #endif |
| 195 | #endif | 204 | #endif |
| 205 | local_irq_restore_hw(flags); | ||
| 196 | } | 206 | } |
| 197 | 207 | ||
| 198 | #ifdef CONFIG_PM | 208 | #ifdef CONFIG_PM |
| @@ -390,7 +400,7 @@ static void bfin_demux_error_irq(unsigned int int_err_irq, | |||
| 390 | static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle) | 400 | static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle) |
| 391 | { | 401 | { |
| 392 | #ifdef CONFIG_IPIPE | 402 | #ifdef CONFIG_IPIPE |
| 393 | _set_irq_handler(irq, handle_edge_irq); | 403 | _set_irq_handler(irq, handle_level_irq); |
| 394 | #else | 404 | #else |
| 395 | struct irq_desc *desc = irq_desc + irq; | 405 | struct irq_desc *desc = irq_desc + irq; |
| 396 | /* May not call generic set_irq_handler() due to spinlock | 406 | /* May not call generic set_irq_handler() due to spinlock |
| @@ -1055,13 +1065,18 @@ int __init init_arch_irq(void) | |||
| 1055 | #endif | 1065 | #endif |
| 1056 | default: | 1066 | default: |
| 1057 | #ifdef CONFIG_IPIPE | 1067 | #ifdef CONFIG_IPIPE |
| 1058 | /* | 1068 | /* |
| 1059 | * We want internal interrupt sources to be masked, because | 1069 | * We want internal interrupt sources to be |
| 1060 | * ISRs may trigger interrupts recursively (e.g. DMA), but | 1070 | * masked, because ISRs may trigger interrupts |
| 1061 | * interrupts are _not_ masked at CPU level. So let's handle | 1071 | * recursively (e.g. DMA), but interrupts are |
| 1062 | * them as level interrupts. | 1072 | * _not_ masked at CPU level. So let's handle |
| 1063 | */ | 1073 | * most of them as level interrupts, except |
| 1064 | set_irq_handler(irq, handle_level_irq); | 1074 | * the timer interrupt which is special. |
| 1075 | */ | ||
| 1076 | if (irq == IRQ_SYSTMR || irq == IRQ_CORETMR) | ||
| 1077 | set_irq_handler(irq, handle_simple_irq); | ||
| 1078 | else | ||
| 1079 | set_irq_handler(irq, handle_level_irq); | ||
| 1065 | #else /* !CONFIG_IPIPE */ | 1080 | #else /* !CONFIG_IPIPE */ |
| 1066 | set_irq_handler(irq, handle_simple_irq); | 1081 | set_irq_handler(irq, handle_simple_irq); |
| 1067 | #endif /* !CONFIG_IPIPE */ | 1082 | #endif /* !CONFIG_IPIPE */ |
| @@ -1123,9 +1138,8 @@ int __init init_arch_irq(void) | |||
| 1123 | 1138 | ||
| 1124 | #ifdef CONFIG_IPIPE | 1139 | #ifdef CONFIG_IPIPE |
| 1125 | for (irq = 0; irq < NR_IRQS; irq++) { | 1140 | for (irq = 0; irq < NR_IRQS; irq++) { |
| 1126 | struct irq_desc *desc = irq_desc + irq; | 1141 | struct irq_desc *desc = irq_to_desc(irq); |
| 1127 | desc->ic_prio = __ipipe_get_irq_priority(irq); | 1142 | desc->ic_prio = __ipipe_get_irq_priority(irq); |
| 1128 | desc->thr_prio = __ipipe_get_irqthread_priority(irq); | ||
| 1129 | } | 1143 | } |
| 1130 | #endif /* CONFIG_IPIPE */ | 1144 | #endif /* CONFIG_IPIPE */ |
| 1131 | 1145 | ||
| @@ -1208,76 +1222,21 @@ int __ipipe_get_irq_priority(unsigned irq) | |||
| 1208 | return IVG15; | 1222 | return IVG15; |
| 1209 | } | 1223 | } |
| 1210 | 1224 | ||
| 1211 | int __ipipe_get_irqthread_priority(unsigned irq) | ||
| 1212 | { | ||
| 1213 | int ient, prio; | ||
| 1214 | int demux_irq; | ||
| 1215 | |||
| 1216 | /* The returned priority value is rescaled to [0..IVG13+1] | ||
| 1217 | * with 0 being the lowest effective priority level. */ | ||
| 1218 | |||
| 1219 | if (irq <= IRQ_CORETMR) | ||
| 1220 | return IVG13 - irq + 1; | ||
| 1221 | |||
| 1222 | /* GPIO IRQs are given the priority of the demux | ||
| 1223 | * interrupt. */ | ||
| 1224 | if (IS_GPIOIRQ(irq)) { | ||
| 1225 | #if defined(CONFIG_BF54x) | ||
| 1226 | u32 bank = PINT_2_BANK(irq2pint_lut[irq - SYS_IRQS]); | ||
| 1227 | demux_irq = (bank == 0 ? IRQ_PINT0 : | ||
| 1228 | bank == 1 ? IRQ_PINT1 : | ||
| 1229 | bank == 2 ? IRQ_PINT2 : | ||
| 1230 | IRQ_PINT3); | ||
| 1231 | #elif defined(CONFIG_BF561) | ||
| 1232 | demux_irq = (irq >= IRQ_PF32 ? IRQ_PROG2_INTA : | ||
| 1233 | irq >= IRQ_PF16 ? IRQ_PROG1_INTA : | ||
| 1234 | IRQ_PROG0_INTA); | ||
| 1235 | #elif defined(CONFIG_BF52x) | ||
| 1236 | demux_irq = (irq >= IRQ_PH0 ? IRQ_PORTH_INTA : | ||
| 1237 | irq >= IRQ_PG0 ? IRQ_PORTG_INTA : | ||
| 1238 | IRQ_PORTF_INTA); | ||
| 1239 | #else | ||
| 1240 | demux_irq = irq; | ||
| 1241 | #endif | ||
| 1242 | return IVG13 - PRIO_GPIODEMUX(demux_irq) + 1; | ||
| 1243 | } | ||
| 1244 | |||
| 1245 | /* The GPIO demux interrupt is given a lower priority | ||
| 1246 | * than the GPIO IRQs, so that its threaded handler | ||
| 1247 | * unmasks the interrupt line after the decoded IRQs | ||
| 1248 | * have been processed. */ | ||
| 1249 | prio = PRIO_GPIODEMUX(irq); | ||
| 1250 | /* demux irq? */ | ||
| 1251 | if (prio != -1) | ||
| 1252 | return IVG13 - prio; | ||
| 1253 | |||
| 1254 | for (ient = 0; ient < NR_PERI_INTS; ient++) { | ||
| 1255 | struct ivgx *ivg = ivg_table + ient; | ||
| 1256 | if (ivg->irqno == irq) { | ||
| 1257 | for (prio = 0; prio <= IVG13-IVG7; prio++) { | ||
| 1258 | if (ivg7_13[prio].ifirst <= ivg && | ||
| 1259 | ivg7_13[prio].istop > ivg) | ||
| 1260 | return IVG7 - prio; | ||
| 1261 | } | ||
| 1262 | } | ||
| 1263 | } | ||
| 1264 | |||
| 1265 | return 0; | ||
| 1266 | } | ||
| 1267 | |||
| 1268 | /* Hw interrupts are disabled on entry (check SAVE_CONTEXT). */ | 1225 | /* Hw interrupts are disabled on entry (check SAVE_CONTEXT). */ |
| 1269 | #ifdef CONFIG_DO_IRQ_L1 | 1226 | #ifdef CONFIG_DO_IRQ_L1 |
| 1270 | __attribute__((l1_text)) | 1227 | __attribute__((l1_text)) |
| 1271 | #endif | 1228 | #endif |
| 1272 | asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) | 1229 | asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) |
| 1273 | { | 1230 | { |
| 1231 | struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr(); | ||
| 1232 | struct ipipe_domain *this_domain = ipipe_current_domain; | ||
| 1274 | struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop; | 1233 | struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop; |
| 1275 | struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst; | 1234 | struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst; |
| 1276 | int irq; | 1235 | int irq, s; |
| 1277 | 1236 | ||
| 1278 | if (likely(vec == EVT_IVTMR_P)) { | 1237 | if (likely(vec == EVT_IVTMR_P)) { |
| 1279 | irq = IRQ_CORETMR; | 1238 | irq = IRQ_CORETMR; |
| 1280 | goto handle_irq; | 1239 | goto core_tick; |
| 1281 | } | 1240 | } |
| 1282 | 1241 | ||
| 1283 | SSYNC(); | 1242 | SSYNC(); |
| @@ -1319,24 +1278,39 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) | |||
| 1319 | irq = ivg->irqno; | 1278 | irq = ivg->irqno; |
| 1320 | 1279 | ||
| 1321 | if (irq == IRQ_SYSTMR) { | 1280 | if (irq == IRQ_SYSTMR) { |
| 1281 | #ifdef CONFIG_GENERIC_CLOCKEVENTS | ||
| 1282 | core_tick: | ||
| 1283 | #else | ||
| 1322 | bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */ | 1284 | bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */ |
| 1285 | #endif | ||
| 1323 | /* This is basically what we need from the register frame. */ | 1286 | /* This is basically what we need from the register frame. */ |
| 1324 | __raw_get_cpu_var(__ipipe_tick_regs).ipend = regs->ipend; | 1287 | __raw_get_cpu_var(__ipipe_tick_regs).ipend = regs->ipend; |
| 1325 | __raw_get_cpu_var(__ipipe_tick_regs).pc = regs->pc; | 1288 | __raw_get_cpu_var(__ipipe_tick_regs).pc = regs->pc; |
| 1326 | if (!ipipe_root_domain_p) | 1289 | if (this_domain != ipipe_root_domain) |
| 1327 | __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10; | ||
| 1328 | else | ||
| 1329 | __raw_get_cpu_var(__ipipe_tick_regs).ipend &= ~0x10; | 1290 | __raw_get_cpu_var(__ipipe_tick_regs).ipend &= ~0x10; |
| 1291 | else | ||
| 1292 | __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10; | ||
| 1330 | } | 1293 | } |
| 1331 | 1294 | ||
| 1332 | handle_irq: | 1295 | #ifndef CONFIG_GENERIC_CLOCKEVENTS |
| 1296 | core_tick: | ||
| 1297 | #endif | ||
| 1298 | if (this_domain == ipipe_root_domain) { | ||
| 1299 | s = __test_and_set_bit(IPIPE_SYNCDEFER_FLAG, &p->status); | ||
| 1300 | barrier(); | ||
| 1301 | } | ||
| 1333 | 1302 | ||
| 1334 | ipipe_trace_irq_entry(irq); | 1303 | ipipe_trace_irq_entry(irq); |
| 1335 | __ipipe_handle_irq(irq, regs); | 1304 | __ipipe_handle_irq(irq, regs); |
| 1336 | ipipe_trace_irq_exit(irq); | 1305 | ipipe_trace_irq_exit(irq); |
| 1337 | 1306 | ||
| 1338 | if (ipipe_root_domain_p) | 1307 | if (this_domain == ipipe_root_domain) { |
| 1339 | return !test_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status)); | 1308 | set_thread_flag(TIF_IRQ_SYNC); |
| 1309 | if (!s) { | ||
| 1310 | __clear_bit(IPIPE_SYNCDEFER_FLAG, &p->status); | ||
| 1311 | return !test_bit(IPIPE_STALL_FLAG, &p->status); | ||
| 1312 | } | ||
| 1313 | } | ||
| 1340 | 1314 | ||
| 1341 | return 0; | 1315 | return 0; |
| 1342 | } | 1316 | } |
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c index 77c992847094..93eab6146079 100644 --- a/arch/blackfin/mach-common/smp.c +++ b/arch/blackfin/mach-common/smp.c | |||
| @@ -158,10 +158,14 @@ static irqreturn_t ipi_handler(int irq, void *dev_instance) | |||
| 158 | kfree(msg); | 158 | kfree(msg); |
| 159 | break; | 159 | break; |
| 160 | case BFIN_IPI_CALL_FUNC: | 160 | case BFIN_IPI_CALL_FUNC: |
| 161 | spin_unlock(&msg_queue->lock); | ||
| 161 | ipi_call_function(cpu, msg); | 162 | ipi_call_function(cpu, msg); |
| 163 | spin_lock(&msg_queue->lock); | ||
| 162 | break; | 164 | break; |
| 163 | case BFIN_IPI_CPU_STOP: | 165 | case BFIN_IPI_CPU_STOP: |
| 166 | spin_unlock(&msg_queue->lock); | ||
| 164 | ipi_cpu_stop(cpu); | 167 | ipi_cpu_stop(cpu); |
| 168 | spin_lock(&msg_queue->lock); | ||
| 165 | kfree(msg); | 169 | kfree(msg); |
| 166 | break; | 170 | break; |
| 167 | default: | 171 | default: |
| @@ -457,7 +461,7 @@ void smp_icache_flush_range_others(unsigned long start, unsigned long end) | |||
| 457 | smp_flush_data.start = start; | 461 | smp_flush_data.start = start; |
| 458 | smp_flush_data.end = end; | 462 | smp_flush_data.end = end; |
| 459 | 463 | ||
| 460 | if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 1)) | 464 | if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 0)) |
| 461 | printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n"); | 465 | printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n"); |
| 462 | } | 466 | } |
| 463 | EXPORT_SYMBOL_GPL(smp_icache_flush_range_others); | 467 | EXPORT_SYMBOL_GPL(smp_icache_flush_range_others); |
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c index d0532b72bba5..9c3629b9a689 100644 --- a/arch/blackfin/mm/init.c +++ b/arch/blackfin/mm/init.c | |||
| @@ -104,7 +104,7 @@ void __init paging_init(void) | |||
| 104 | } | 104 | } |
| 105 | } | 105 | } |
| 106 | 106 | ||
| 107 | asmlinkage void init_pda(void) | 107 | asmlinkage void __init init_pda(void) |
| 108 | { | 108 | { |
| 109 | unsigned int cpu = raw_smp_processor_id(); | 109 | unsigned int cpu = raw_smp_processor_id(); |
| 110 | 110 | ||
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 6183aeccecf1..153e727a6e8e 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig | |||
| @@ -221,7 +221,11 @@ config IA64_HP_SIM | |||
| 221 | 221 | ||
| 222 | config IA64_XEN_GUEST | 222 | config IA64_XEN_GUEST |
| 223 | bool "Xen guest" | 223 | bool "Xen guest" |
| 224 | select SWIOTLB | ||
| 224 | depends on XEN | 225 | depends on XEN |
| 226 | help | ||
| 227 | Build a kernel that runs on Xen guest domain. At this moment only | ||
| 228 | 16KB page size in supported. | ||
| 225 | 229 | ||
| 226 | endchoice | 230 | endchoice |
| 227 | 231 | ||
| @@ -479,8 +483,7 @@ config HOLES_IN_ZONE | |||
| 479 | default y if VIRTUAL_MEM_MAP | 483 | default y if VIRTUAL_MEM_MAP |
| 480 | 484 | ||
| 481 | config HAVE_ARCH_EARLY_PFN_TO_NID | 485 | config HAVE_ARCH_EARLY_PFN_TO_NID |
| 482 | def_bool y | 486 | def_bool NUMA && SPARSEMEM |
| 483 | depends on NEED_MULTIPLE_NODES | ||
| 484 | 487 | ||
| 485 | config HAVE_ARCH_NODEDATA_EXTENSION | 488 | config HAVE_ARCH_NODEDATA_EXTENSION |
| 486 | def_bool y | 489 | def_bool y |
| @@ -635,6 +638,17 @@ config DMAR | |||
| 635 | and include PCI device scope covered by these DMA | 638 | and include PCI device scope covered by these DMA |
| 636 | remapping devices. | 639 | remapping devices. |
| 637 | 640 | ||
| 641 | config DMAR_DEFAULT_ON | ||
| 642 | def_bool y | ||
| 643 | prompt "Enable DMA Remapping Devices by default" | ||
| 644 | depends on DMAR | ||
| 645 | help | ||
| 646 | Selecting this option will enable a DMAR device at boot time if | ||
| 647 | one is found. If this option is not selected, DMAR support can | ||
| 648 | be enabled by passing intel_iommu=on to the kernel. It is | ||
| 649 | recommended you say N here while the DMAR code remains | ||
| 650 | experimental. | ||
| 651 | |||
| 638 | endmenu | 652 | endmenu |
| 639 | 653 | ||
| 640 | endif | 654 | endif |
diff --git a/arch/ia64/configs/xen_domu_defconfig b/arch/ia64/configs/xen_domu_defconfig new file mode 100644 index 000000000000..0bb0714dc19d --- /dev/null +++ b/arch/ia64/configs/xen_domu_defconfig | |||
| @@ -0,0 +1,1601 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.29-rc1 | ||
| 4 | # Fri Jan 16 11:49:59 2009 | ||
| 5 | # | ||
| 6 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 7 | |||
| 8 | # | ||
| 9 | # General setup | ||
| 10 | # | ||
| 11 | CONFIG_EXPERIMENTAL=y | ||
| 12 | CONFIG_LOCK_KERNEL=y | ||
| 13 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 14 | CONFIG_LOCALVERSION="" | ||
| 15 | CONFIG_LOCALVERSION_AUTO=y | ||
| 16 | CONFIG_SWAP=y | ||
| 17 | CONFIG_SYSVIPC=y | ||
| 18 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 19 | CONFIG_POSIX_MQUEUE=y | ||
| 20 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 21 | # CONFIG_TASKSTATS is not set | ||
| 22 | # CONFIG_AUDIT is not set | ||
| 23 | CONFIG_IKCONFIG=y | ||
| 24 | CONFIG_IKCONFIG_PROC=y | ||
| 25 | CONFIG_LOG_BUF_SHIFT=20 | ||
| 26 | CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y | ||
| 27 | # CONFIG_GROUP_SCHED is not set | ||
| 28 | |||
| 29 | # | ||
| 30 | # Control Group support | ||
| 31 | # | ||
| 32 | # CONFIG_CGROUPS is not set | ||
| 33 | CONFIG_SYSFS_DEPRECATED=y | ||
| 34 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 35 | # CONFIG_RELAY is not set | ||
| 36 | CONFIG_NAMESPACES=y | ||
| 37 | # CONFIG_UTS_NS is not set | ||
| 38 | # CONFIG_IPC_NS is not set | ||
| 39 | # CONFIG_USER_NS is not set | ||
| 40 | # CONFIG_PID_NS is not set | ||
| 41 | CONFIG_BLK_DEV_INITRD=y | ||
| 42 | CONFIG_INITRAMFS_SOURCE="" | ||
| 43 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 44 | CONFIG_SYSCTL=y | ||
| 45 | # CONFIG_EMBEDDED is not set | ||
| 46 | CONFIG_SYSCTL_SYSCALL=y | ||
| 47 | CONFIG_KALLSYMS=y | ||
| 48 | CONFIG_KALLSYMS_ALL=y | ||
| 49 | CONFIG_KALLSYMS_STRIP_GENERATED=y | ||
| 50 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 51 | CONFIG_HOTPLUG=y | ||
| 52 | CONFIG_PRINTK=y | ||
| 53 | CONFIG_BUG=y | ||
| 54 | CONFIG_ELF_CORE=y | ||
| 55 | CONFIG_COMPAT_BRK=y | ||
| 56 | CONFIG_BASE_FULL=y | ||
| 57 | CONFIG_FUTEX=y | ||
| 58 | CONFIG_ANON_INODES=y | ||
| 59 | CONFIG_EPOLL=y | ||
| 60 | CONFIG_SIGNALFD=y | ||
| 61 | CONFIG_TIMERFD=y | ||
| 62 | CONFIG_EVENTFD=y | ||
| 63 | CONFIG_SHMEM=y | ||
| 64 | CONFIG_AIO=y | ||
| 65 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 66 | CONFIG_PCI_QUIRKS=y | ||
| 67 | CONFIG_SLUB_DEBUG=y | ||
| 68 | # CONFIG_SLAB is not set | ||
| 69 | CONFIG_SLUB=y | ||
| 70 | # CONFIG_SLOB is not set | ||
| 71 | # CONFIG_PROFILING is not set | ||
| 72 | CONFIG_HAVE_OPROFILE=y | ||
| 73 | # CONFIG_KPROBES is not set | ||
| 74 | CONFIG_HAVE_KPROBES=y | ||
| 75 | CONFIG_HAVE_KRETPROBES=y | ||
| 76 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
| 77 | CONFIG_HAVE_DMA_ATTRS=y | ||
| 78 | CONFIG_USE_GENERIC_SMP_HELPERS=y | ||
| 79 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
| 80 | CONFIG_SLABINFO=y | ||
| 81 | CONFIG_RT_MUTEXES=y | ||
| 82 | CONFIG_BASE_SMALL=0 | ||
| 83 | CONFIG_MODULES=y | ||
| 84 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 85 | CONFIG_MODULE_UNLOAD=y | ||
| 86 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 87 | CONFIG_MODVERSIONS=y | ||
| 88 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
| 89 | CONFIG_STOP_MACHINE=y | ||
| 90 | CONFIG_BLOCK=y | ||
| 91 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 92 | # CONFIG_BLK_DEV_BSG is not set | ||
| 93 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 94 | |||
| 95 | # | ||
| 96 | # IO Schedulers | ||
| 97 | # | ||
| 98 | CONFIG_IOSCHED_NOOP=y | ||
| 99 | CONFIG_IOSCHED_AS=y | ||
| 100 | CONFIG_IOSCHED_DEADLINE=y | ||
| 101 | CONFIG_IOSCHED_CFQ=y | ||
| 102 | CONFIG_DEFAULT_AS=y | ||
| 103 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 104 | # CONFIG_DEFAULT_CFQ is not set | ||
| 105 | # CONFIG_DEFAULT_NOOP is not set | ||
| 106 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 107 | CONFIG_CLASSIC_RCU=y | ||
| 108 | # CONFIG_TREE_RCU is not set | ||
| 109 | # CONFIG_PREEMPT_RCU is not set | ||
| 110 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 111 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 112 | CONFIG_FREEZER=y | ||
| 113 | |||
| 114 | # | ||
| 115 | # Processor type and features | ||
| 116 | # | ||
| 117 | CONFIG_IA64=y | ||
| 118 | CONFIG_64BIT=y | ||
| 119 | CONFIG_ZONE_DMA=y | ||
| 120 | CONFIG_QUICKLIST=y | ||
| 121 | CONFIG_MMU=y | ||
| 122 | CONFIG_SWIOTLB=y | ||
| 123 | CONFIG_IOMMU_HELPER=y | ||
| 124 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
| 125 | CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y | ||
| 126 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
| 127 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 128 | CONFIG_GENERIC_TIME=y | ||
| 129 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
| 130 | CONFIG_HAVE_SETUP_PER_CPU_AREA=y | ||
| 131 | CONFIG_DMI=y | ||
| 132 | CONFIG_EFI=y | ||
| 133 | CONFIG_GENERIC_IOMAP=y | ||
| 134 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | ||
| 135 | CONFIG_AUDIT_ARCH=y | ||
| 136 | CONFIG_PARAVIRT_GUEST=y | ||
| 137 | CONFIG_PARAVIRT=y | ||
| 138 | CONFIG_XEN=y | ||
| 139 | CONFIG_XEN_XENCOMM=y | ||
| 140 | CONFIG_NO_IDLE_HZ=y | ||
| 141 | # CONFIG_IA64_GENERIC is not set | ||
| 142 | # CONFIG_IA64_DIG is not set | ||
| 143 | # CONFIG_IA64_DIG_VTD is not set | ||
| 144 | # CONFIG_IA64_HP_ZX1 is not set | ||
| 145 | # CONFIG_IA64_HP_ZX1_SWIOTLB is not set | ||
| 146 | # CONFIG_IA64_SGI_SN2 is not set | ||
| 147 | # CONFIG_IA64_SGI_UV is not set | ||
| 148 | # CONFIG_IA64_HP_SIM is not set | ||
| 149 | CONFIG_IA64_XEN_GUEST=y | ||
| 150 | # CONFIG_ITANIUM is not set | ||
| 151 | CONFIG_MCKINLEY=y | ||
| 152 | # CONFIG_IA64_PAGE_SIZE_4KB is not set | ||
| 153 | # CONFIG_IA64_PAGE_SIZE_8KB is not set | ||
| 154 | CONFIG_IA64_PAGE_SIZE_16KB=y | ||
| 155 | # CONFIG_IA64_PAGE_SIZE_64KB is not set | ||
| 156 | CONFIG_PGTABLE_3=y | ||
| 157 | # CONFIG_PGTABLE_4 is not set | ||
| 158 | CONFIG_HZ=250 | ||
| 159 | # CONFIG_HZ_100 is not set | ||
| 160 | CONFIG_HZ_250=y | ||
| 161 | # CONFIG_HZ_300 is not set | ||
| 162 | # CONFIG_HZ_1000 is not set | ||
| 163 | # CONFIG_SCHED_HRTICK is not set | ||
| 164 | CONFIG_IA64_L1_CACHE_SHIFT=7 | ||
| 165 | CONFIG_IA64_CYCLONE=y | ||
| 166 | CONFIG_IOSAPIC=y | ||
| 167 | CONFIG_FORCE_MAX_ZONEORDER=17 | ||
| 168 | # CONFIG_VIRT_CPU_ACCOUNTING is not set | ||
| 169 | CONFIG_SMP=y | ||
| 170 | CONFIG_NR_CPUS=16 | ||
| 171 | CONFIG_HOTPLUG_CPU=y | ||
| 172 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
| 173 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
| 174 | # CONFIG_SCHED_SMT is not set | ||
| 175 | CONFIG_PERMIT_BSP_REMOVE=y | ||
| 176 | CONFIG_FORCE_CPEI_RETARGET=y | ||
| 177 | CONFIG_PREEMPT_NONE=y | ||
| 178 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 179 | # CONFIG_PREEMPT is not set | ||
| 180 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 181 | CONFIG_FLATMEM_MANUAL=y | ||
| 182 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 183 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 184 | CONFIG_FLATMEM=y | ||
| 185 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 186 | CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y | ||
| 187 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 188 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 189 | CONFIG_MIGRATION=y | ||
| 190 | CONFIG_PHYS_ADDR_T_64BIT=y | ||
| 191 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 192 | CONFIG_BOUNCE=y | ||
| 193 | CONFIG_NR_QUICK=1 | ||
| 194 | CONFIG_VIRT_TO_BUS=y | ||
| 195 | CONFIG_UNEVICTABLE_LRU=y | ||
| 196 | CONFIG_ARCH_SELECT_MEMORY_MODEL=y | ||
| 197 | CONFIG_ARCH_DISCONTIGMEM_ENABLE=y | ||
| 198 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
| 199 | CONFIG_ARCH_SPARSEMEM_ENABLE=y | ||
| 200 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
| 201 | CONFIG_VIRTUAL_MEM_MAP=y | ||
| 202 | CONFIG_HOLES_IN_ZONE=y | ||
| 203 | # CONFIG_IA32_SUPPORT is not set | ||
| 204 | # CONFIG_COMPAT_FOR_U64_ALIGNMENT is not set | ||
| 205 | CONFIG_IA64_MCA_RECOVERY=y | ||
| 206 | CONFIG_PERFMON=y | ||
| 207 | CONFIG_IA64_PALINFO=y | ||
| 208 | # CONFIG_IA64_MC_ERR_INJECT is not set | ||
| 209 | # CONFIG_IA64_ESI is not set | ||
| 210 | # CONFIG_IA64_HP_AML_NFW is not set | ||
| 211 | CONFIG_KEXEC=y | ||
| 212 | # CONFIG_CRASH_DUMP is not set | ||
| 213 | |||
| 214 | # | ||
| 215 | # Firmware Drivers | ||
| 216 | # | ||
| 217 | # CONFIG_FIRMWARE_MEMMAP is not set | ||
| 218 | CONFIG_EFI_VARS=y | ||
| 219 | CONFIG_EFI_PCDP=y | ||
| 220 | CONFIG_DMIID=y | ||
| 221 | CONFIG_BINFMT_ELF=y | ||
| 222 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 223 | # CONFIG_HAVE_AOUT is not set | ||
| 224 | CONFIG_BINFMT_MISC=m | ||
| 225 | |||
| 226 | # | ||
| 227 | # Power management and ACPI options | ||
| 228 | # | ||
| 229 | CONFIG_PM=y | ||
| 230 | # CONFIG_PM_DEBUG is not set | ||
| 231 | CONFIG_PM_SLEEP=y | ||
| 232 | CONFIG_SUSPEND=y | ||
| 233 | CONFIG_SUSPEND_FREEZER=y | ||
| 234 | CONFIG_ACPI=y | ||
| 235 | CONFIG_ACPI_SLEEP=y | ||
| 236 | CONFIG_ACPI_PROCFS=y | ||
| 237 | CONFIG_ACPI_PROCFS_POWER=y | ||
| 238 | CONFIG_ACPI_SYSFS_POWER=y | ||
| 239 | CONFIG_ACPI_PROC_EVENT=y | ||
| 240 | CONFIG_ACPI_BUTTON=m | ||
| 241 | CONFIG_ACPI_FAN=m | ||
| 242 | # CONFIG_ACPI_DOCK is not set | ||
| 243 | CONFIG_ACPI_PROCESSOR=m | ||
| 244 | CONFIG_ACPI_HOTPLUG_CPU=y | ||
| 245 | CONFIG_ACPI_THERMAL=m | ||
| 246 | # CONFIG_ACPI_CUSTOM_DSDT is not set | ||
| 247 | CONFIG_ACPI_BLACKLIST_YEAR=0 | ||
| 248 | # CONFIG_ACPI_DEBUG is not set | ||
| 249 | # CONFIG_ACPI_PCI_SLOT is not set | ||
| 250 | CONFIG_ACPI_SYSTEM=y | ||
| 251 | CONFIG_ACPI_CONTAINER=m | ||
| 252 | |||
| 253 | # | ||
| 254 | # CPU Frequency scaling | ||
| 255 | # | ||
| 256 | # CONFIG_CPU_FREQ is not set | ||
| 257 | |||
| 258 | # | ||
| 259 | # Bus options (PCI, PCMCIA) | ||
| 260 | # | ||
| 261 | CONFIG_PCI=y | ||
| 262 | CONFIG_PCI_DOMAINS=y | ||
| 263 | CONFIG_PCI_SYSCALL=y | ||
| 264 | # CONFIG_PCIEPORTBUS is not set | ||
| 265 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
| 266 | # CONFIG_PCI_MSI is not set | ||
| 267 | CONFIG_PCI_LEGACY=y | ||
| 268 | # CONFIG_PCI_DEBUG is not set | ||
| 269 | # CONFIG_PCI_STUB is not set | ||
| 270 | CONFIG_HOTPLUG_PCI=m | ||
| 271 | # CONFIG_HOTPLUG_PCI_FAKE is not set | ||
| 272 | CONFIG_HOTPLUG_PCI_ACPI=m | ||
| 273 | # CONFIG_HOTPLUG_PCI_ACPI_IBM is not set | ||
| 274 | # CONFIG_HOTPLUG_PCI_CPCI is not set | ||
| 275 | # CONFIG_HOTPLUG_PCI_SHPC is not set | ||
| 276 | # CONFIG_PCCARD is not set | ||
| 277 | CONFIG_NET=y | ||
| 278 | |||
| 279 | # | ||
| 280 | # Networking options | ||
| 281 | # | ||
| 282 | # CONFIG_NET_NS is not set | ||
| 283 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 284 | CONFIG_PACKET=y | ||
| 285 | # CONFIG_PACKET_MMAP is not set | ||
| 286 | CONFIG_UNIX=y | ||
| 287 | CONFIG_XFRM=y | ||
| 288 | # CONFIG_XFRM_USER is not set | ||
| 289 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 290 | # CONFIG_XFRM_MIGRATE is not set | ||
| 291 | # CONFIG_XFRM_STATISTICS is not set | ||
| 292 | # CONFIG_NET_KEY is not set | ||
| 293 | CONFIG_INET=y | ||
| 294 | CONFIG_IP_MULTICAST=y | ||
| 295 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 296 | CONFIG_IP_FIB_HASH=y | ||
| 297 | # CONFIG_IP_PNP is not set | ||
| 298 | # CONFIG_NET_IPIP is not set | ||
| 299 | # CONFIG_NET_IPGRE is not set | ||
| 300 | # CONFIG_IP_MROUTE is not set | ||
| 301 | CONFIG_ARPD=y | ||
| 302 | CONFIG_SYN_COOKIES=y | ||
| 303 | # CONFIG_INET_AH is not set | ||
| 304 | # CONFIG_INET_ESP is not set | ||
| 305 | # CONFIG_INET_IPCOMP is not set | ||
| 306 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 307 | # CONFIG_INET_TUNNEL is not set | ||
| 308 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 309 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 310 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 311 | # CONFIG_INET_LRO is not set | ||
| 312 | CONFIG_INET_DIAG=y | ||
| 313 | CONFIG_INET_TCP_DIAG=y | ||
| 314 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 315 | CONFIG_TCP_CONG_CUBIC=y | ||
| 316 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 317 | # CONFIG_TCP_MD5SIG is not set | ||
| 318 | # CONFIG_IPV6 is not set | ||
| 319 | # CONFIG_NETWORK_SECMARK is not set | ||
| 320 | # CONFIG_NETFILTER is not set | ||
| 321 | # CONFIG_IP_DCCP is not set | ||
| 322 | # CONFIG_IP_SCTP is not set | ||
| 323 | # CONFIG_TIPC is not set | ||
| 324 | # CONFIG_ATM is not set | ||
| 325 | # CONFIG_BRIDGE is not set | ||
| 326 | # CONFIG_NET_DSA is not set | ||
| 327 | # CONFIG_VLAN_8021Q is not set | ||
| 328 | # CONFIG_DECNET is not set | ||
| 329 | # CONFIG_LLC2 is not set | ||
| 330 | # CONFIG_IPX is not set | ||
| 331 | # CONFIG_ATALK is not set | ||
| 332 | # CONFIG_X25 is not set | ||
| 333 | # CONFIG_LAPB is not set | ||
| 334 | # CONFIG_ECONET is not set | ||
| 335 | # CONFIG_WAN_ROUTER is not set | ||
| 336 | # CONFIG_NET_SCHED is not set | ||
| 337 | # CONFIG_DCB is not set | ||
| 338 | |||
| 339 | # | ||
| 340 | # Network testing | ||
| 341 | # | ||
| 342 | # CONFIG_NET_PKTGEN is not set | ||
| 343 | # CONFIG_HAMRADIO is not set | ||
| 344 | # CONFIG_CAN is not set | ||
| 345 | # CONFIG_IRDA is not set | ||
| 346 | # CONFIG_BT is not set | ||
| 347 | # CONFIG_AF_RXRPC is not set | ||
| 348 | # CONFIG_PHONET is not set | ||
| 349 | # CONFIG_WIRELESS is not set | ||
| 350 | # CONFIG_WIMAX is not set | ||
| 351 | # CONFIG_RFKILL is not set | ||
| 352 | # CONFIG_NET_9P is not set | ||
| 353 | |||
| 354 | # | ||
| 355 | # Device Drivers | ||
| 356 | # | ||
| 357 | |||
| 358 | # | ||
| 359 | # Generic Driver Options | ||
| 360 | # | ||
| 361 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 362 | CONFIG_STANDALONE=y | ||
| 363 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 364 | CONFIG_FW_LOADER=y | ||
| 365 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 366 | CONFIG_EXTRA_FIRMWARE="" | ||
| 367 | # CONFIG_DEBUG_DRIVER is not set | ||
| 368 | # CONFIG_DEBUG_DEVRES is not set | ||
| 369 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 370 | # CONFIG_CONNECTOR is not set | ||
| 371 | # CONFIG_MTD is not set | ||
| 372 | # CONFIG_PARPORT is not set | ||
| 373 | CONFIG_PNP=y | ||
| 374 | CONFIG_PNP_DEBUG_MESSAGES=y | ||
| 375 | |||
| 376 | # | ||
| 377 | # Protocols | ||
| 378 | # | ||
| 379 | CONFIG_PNPACPI=y | ||
| 380 | CONFIG_BLK_DEV=y | ||
| 381 | # CONFIG_BLK_CPQ_DA is not set | ||
| 382 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
| 383 | # CONFIG_BLK_DEV_DAC960 is not set | ||
| 384 | # CONFIG_BLK_DEV_UMEM is not set | ||
| 385 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 386 | CONFIG_BLK_DEV_LOOP=m | ||
| 387 | CONFIG_BLK_DEV_CRYPTOLOOP=m | ||
| 388 | CONFIG_BLK_DEV_NBD=m | ||
| 389 | # CONFIG_BLK_DEV_SX8 is not set | ||
| 390 | # CONFIG_BLK_DEV_UB is not set | ||
| 391 | CONFIG_BLK_DEV_RAM=y | ||
| 392 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 393 | CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
| 394 | # CONFIG_BLK_DEV_XIP is not set | ||
| 395 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 396 | # CONFIG_ATA_OVER_ETH is not set | ||
| 397 | CONFIG_XEN_BLKDEV_FRONTEND=y | ||
| 398 | # CONFIG_BLK_DEV_HD is not set | ||
| 399 | CONFIG_MISC_DEVICES=y | ||
| 400 | # CONFIG_PHANTOM is not set | ||
| 401 | # CONFIG_EEPROM_93CX6 is not set | ||
| 402 | # CONFIG_SGI_IOC4 is not set | ||
| 403 | # CONFIG_TIFM_CORE is not set | ||
| 404 | # CONFIG_ICS932S401 is not set | ||
| 405 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 406 | # CONFIG_HP_ILO is not set | ||
| 407 | # CONFIG_C2PORT is not set | ||
| 408 | CONFIG_HAVE_IDE=y | ||
| 409 | CONFIG_IDE=y | ||
| 410 | |||
| 411 | # | ||
| 412 | # Please see Documentation/ide/ide.txt for help/info on IDE drives | ||
| 413 | # | ||
| 414 | CONFIG_IDE_TIMINGS=y | ||
| 415 | CONFIG_IDE_ATAPI=y | ||
| 416 | # CONFIG_BLK_DEV_IDE_SATA is not set | ||
| 417 | CONFIG_IDE_GD=y | ||
| 418 | CONFIG_IDE_GD_ATA=y | ||
| 419 | # CONFIG_IDE_GD_ATAPI is not set | ||
| 420 | CONFIG_BLK_DEV_IDECD=y | ||
| 421 | CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y | ||
| 422 | # CONFIG_BLK_DEV_IDETAPE is not set | ||
| 423 | # CONFIG_BLK_DEV_IDEACPI is not set | ||
| 424 | # CONFIG_IDE_TASK_IOCTL is not set | ||
| 425 | CONFIG_IDE_PROC_FS=y | ||
| 426 | |||
| 427 | # | ||
| 428 | # IDE chipset support/bugfixes | ||
| 429 | # | ||
| 430 | # CONFIG_IDE_GENERIC is not set | ||
| 431 | # CONFIG_BLK_DEV_PLATFORM is not set | ||
| 432 | # CONFIG_BLK_DEV_IDEPNP is not set | ||
| 433 | CONFIG_BLK_DEV_IDEDMA_SFF=y | ||
| 434 | |||
| 435 | # | ||
| 436 | # PCI IDE chipsets support | ||
| 437 | # | ||
| 438 | CONFIG_BLK_DEV_IDEPCI=y | ||
| 439 | CONFIG_IDEPCI_PCIBUS_ORDER=y | ||
| 440 | # CONFIG_BLK_DEV_OFFBOARD is not set | ||
| 441 | CONFIG_BLK_DEV_GENERIC=y | ||
| 442 | # CONFIG_BLK_DEV_OPTI621 is not set | ||
| 443 | CONFIG_BLK_DEV_IDEDMA_PCI=y | ||
| 444 | # CONFIG_BLK_DEV_AEC62XX is not set | ||
| 445 | # CONFIG_BLK_DEV_ALI15X3 is not set | ||
| 446 | # CONFIG_BLK_DEV_AMD74XX is not set | ||
| 447 | CONFIG_BLK_DEV_CMD64X=y | ||
| 448 | # CONFIG_BLK_DEV_TRIFLEX is not set | ||
| 449 | # CONFIG_BLK_DEV_CS5520 is not set | ||
| 450 | # CONFIG_BLK_DEV_CS5530 is not set | ||
| 451 | # CONFIG_BLK_DEV_HPT366 is not set | ||
| 452 | # CONFIG_BLK_DEV_JMICRON is not set | ||
| 453 | # CONFIG_BLK_DEV_SC1200 is not set | ||
| 454 | CONFIG_BLK_DEV_PIIX=y | ||
| 455 | # CONFIG_BLK_DEV_IT8172 is not set | ||
| 456 | # CONFIG_BLK_DEV_IT8213 is not set | ||
| 457 | # CONFIG_BLK_DEV_IT821X is not set | ||
| 458 | # CONFIG_BLK_DEV_NS87415 is not set | ||
| 459 | # CONFIG_BLK_DEV_PDC202XX_OLD is not set | ||
| 460 | # CONFIG_BLK_DEV_PDC202XX_NEW is not set | ||
| 461 | # CONFIG_BLK_DEV_SVWKS is not set | ||
| 462 | # CONFIG_BLK_DEV_SIIMAGE is not set | ||
| 463 | # CONFIG_BLK_DEV_SLC90E66 is not set | ||
| 464 | # CONFIG_BLK_DEV_TRM290 is not set | ||
| 465 | # CONFIG_BLK_DEV_VIA82CXXX is not set | ||
| 466 | # CONFIG_BLK_DEV_TC86C001 is not set | ||
| 467 | CONFIG_BLK_DEV_IDEDMA=y | ||
| 468 | |||
| 469 | # | ||
| 470 | # SCSI device support | ||
| 471 | # | ||
| 472 | # CONFIG_RAID_ATTRS is not set | ||
| 473 | CONFIG_SCSI=y | ||
| 474 | CONFIG_SCSI_DMA=y | ||
| 475 | # CONFIG_SCSI_TGT is not set | ||
| 476 | CONFIG_SCSI_NETLINK=y | ||
| 477 | CONFIG_SCSI_PROC_FS=y | ||
| 478 | |||
| 479 | # | ||
| 480 | # SCSI support type (disk, tape, CD-ROM) | ||
| 481 | # | ||
| 482 | CONFIG_BLK_DEV_SD=y | ||
| 483 | CONFIG_CHR_DEV_ST=m | ||
| 484 | # CONFIG_CHR_DEV_OSST is not set | ||
| 485 | CONFIG_BLK_DEV_SR=m | ||
| 486 | # CONFIG_BLK_DEV_SR_VENDOR is not set | ||
| 487 | CONFIG_CHR_DEV_SG=m | ||
| 488 | # CONFIG_CHR_DEV_SCH is not set | ||
| 489 | |||
| 490 | # | ||
| 491 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 492 | # | ||
| 493 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 494 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 495 | # CONFIG_SCSI_LOGGING is not set | ||
| 496 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 497 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 498 | |||
| 499 | # | ||
| 500 | # SCSI Transports | ||
| 501 | # | ||
| 502 | CONFIG_SCSI_SPI_ATTRS=y | ||
| 503 | CONFIG_SCSI_FC_ATTRS=y | ||
| 504 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 505 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 506 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 507 | CONFIG_SCSI_LOWLEVEL=y | ||
| 508 | # CONFIG_ISCSI_TCP is not set | ||
| 509 | # CONFIG_SCSI_CXGB3_ISCSI is not set | ||
| 510 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
| 511 | # CONFIG_SCSI_3W_9XXX is not set | ||
| 512 | # CONFIG_SCSI_ACARD is not set | ||
| 513 | # CONFIG_SCSI_AACRAID is not set | ||
| 514 | # CONFIG_SCSI_AIC7XXX is not set | ||
| 515 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
| 516 | # CONFIG_SCSI_AIC79XX is not set | ||
| 517 | # CONFIG_SCSI_AIC94XX is not set | ||
| 518 | # CONFIG_SCSI_DPT_I2O is not set | ||
| 519 | # CONFIG_SCSI_ADVANSYS is not set | ||
| 520 | # CONFIG_SCSI_ARCMSR is not set | ||
| 521 | # CONFIG_MEGARAID_NEWGEN is not set | ||
| 522 | # CONFIG_MEGARAID_LEGACY is not set | ||
| 523 | # CONFIG_MEGARAID_SAS is not set | ||
| 524 | # CONFIG_SCSI_HPTIOP is not set | ||
| 525 | # CONFIG_LIBFC is not set | ||
| 526 | # CONFIG_FCOE is not set | ||
| 527 | # CONFIG_SCSI_DMX3191D is not set | ||
| 528 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
| 529 | # CONFIG_SCSI_IPS is not set | ||
| 530 | # CONFIG_SCSI_INITIO is not set | ||
| 531 | # CONFIG_SCSI_INIA100 is not set | ||
| 532 | # CONFIG_SCSI_MVSAS is not set | ||
| 533 | # CONFIG_SCSI_STEX is not set | ||
| 534 | CONFIG_SCSI_SYM53C8XX_2=y | ||
| 535 | CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 | ||
| 536 | CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 | ||
| 537 | CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 | ||
| 538 | CONFIG_SCSI_SYM53C8XX_MMIO=y | ||
| 539 | CONFIG_SCSI_QLOGIC_1280=y | ||
| 540 | # CONFIG_SCSI_QLA_FC is not set | ||
| 541 | # CONFIG_SCSI_QLA_ISCSI is not set | ||
| 542 | # CONFIG_SCSI_LPFC is not set | ||
| 543 | # CONFIG_SCSI_DC395x is not set | ||
| 544 | # CONFIG_SCSI_DC390T is not set | ||
| 545 | # CONFIG_SCSI_DEBUG is not set | ||
| 546 | # CONFIG_SCSI_SRP is not set | ||
| 547 | # CONFIG_SCSI_DH is not set | ||
| 548 | # CONFIG_ATA is not set | ||
| 549 | CONFIG_MD=y | ||
| 550 | CONFIG_BLK_DEV_MD=m | ||
| 551 | CONFIG_MD_LINEAR=m | ||
| 552 | CONFIG_MD_RAID0=m | ||
| 553 | CONFIG_MD_RAID1=m | ||
| 554 | # CONFIG_MD_RAID10 is not set | ||
| 555 | # CONFIG_MD_RAID456 is not set | ||
| 556 | CONFIG_MD_MULTIPATH=m | ||
| 557 | # CONFIG_MD_FAULTY is not set | ||
| 558 | CONFIG_BLK_DEV_DM=m | ||
| 559 | # CONFIG_DM_DEBUG is not set | ||
| 560 | CONFIG_DM_CRYPT=m | ||
| 561 | CONFIG_DM_SNAPSHOT=m | ||
| 562 | CONFIG_DM_MIRROR=m | ||
| 563 | CONFIG_DM_ZERO=m | ||
| 564 | # CONFIG_DM_MULTIPATH is not set | ||
| 565 | # CONFIG_DM_DELAY is not set | ||
| 566 | # CONFIG_DM_UEVENT is not set | ||
| 567 | CONFIG_FUSION=y | ||
| 568 | CONFIG_FUSION_SPI=y | ||
| 569 | CONFIG_FUSION_FC=y | ||
| 570 | # CONFIG_FUSION_SAS is not set | ||
| 571 | CONFIG_FUSION_MAX_SGE=128 | ||
| 572 | CONFIG_FUSION_CTL=y | ||
| 573 | # CONFIG_FUSION_LOGGING is not set | ||
| 574 | |||
| 575 | # | ||
| 576 | # IEEE 1394 (FireWire) support | ||
| 577 | # | ||
| 578 | |||
| 579 | # | ||
| 580 | # Enable only one of the two stacks, unless you know what you are doing | ||
| 581 | # | ||
| 582 | # CONFIG_FIREWIRE is not set | ||
| 583 | # CONFIG_IEEE1394 is not set | ||
| 584 | # CONFIG_I2O is not set | ||
| 585 | CONFIG_NETDEVICES=y | ||
| 586 | CONFIG_DUMMY=m | ||
| 587 | # CONFIG_BONDING is not set | ||
| 588 | # CONFIG_MACVLAN is not set | ||
| 589 | # CONFIG_EQUALIZER is not set | ||
| 590 | # CONFIG_TUN is not set | ||
| 591 | # CONFIG_VETH is not set | ||
| 592 | # CONFIG_NET_SB1000 is not set | ||
| 593 | # CONFIG_ARCNET is not set | ||
| 594 | CONFIG_PHYLIB=y | ||
| 595 | |||
| 596 | # | ||
| 597 | # MII PHY device drivers | ||
| 598 | # | ||
| 599 | # CONFIG_MARVELL_PHY is not set | ||
| 600 | # CONFIG_DAVICOM_PHY is not set | ||
| 601 | # CONFIG_QSEMI_PHY is not set | ||
| 602 | # CONFIG_LXT_PHY is not set | ||
| 603 | # CONFIG_CICADA_PHY is not set | ||
| 604 | # CONFIG_VITESSE_PHY is not set | ||
| 605 | # CONFIG_SMSC_PHY is not set | ||
| 606 | # CONFIG_BROADCOM_PHY is not set | ||
| 607 | # CONFIG_ICPLUS_PHY is not set | ||
| 608 | # CONFIG_REALTEK_PHY is not set | ||
| 609 | # CONFIG_NATIONAL_PHY is not set | ||
| 610 | # CONFIG_STE10XP is not set | ||
| 611 | # CONFIG_LSI_ET1011C_PHY is not set | ||
| 612 | # CONFIG_FIXED_PHY is not set | ||
| 613 | # CONFIG_MDIO_BITBANG is not set | ||
| 614 | CONFIG_NET_ETHERNET=y | ||
| 615 | CONFIG_MII=m | ||
| 616 | # CONFIG_HAPPYMEAL is not set | ||
| 617 | # CONFIG_SUNGEM is not set | ||
| 618 | # CONFIG_CASSINI is not set | ||
| 619 | # CONFIG_NET_VENDOR_3COM is not set | ||
| 620 | CONFIG_NET_TULIP=y | ||
| 621 | # CONFIG_DE2104X is not set | ||
| 622 | CONFIG_TULIP=m | ||
| 623 | # CONFIG_TULIP_MWI is not set | ||
| 624 | # CONFIG_TULIP_MMIO is not set | ||
| 625 | # CONFIG_TULIP_NAPI is not set | ||
| 626 | # CONFIG_DE4X5 is not set | ||
| 627 | # CONFIG_WINBOND_840 is not set | ||
| 628 | # CONFIG_DM9102 is not set | ||
| 629 | # CONFIG_ULI526X is not set | ||
| 630 | # CONFIG_HP100 is not set | ||
| 631 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 632 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 633 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 634 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 635 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 636 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 637 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 638 | CONFIG_NET_PCI=y | ||
| 639 | # CONFIG_PCNET32 is not set | ||
| 640 | # CONFIG_AMD8111_ETH is not set | ||
| 641 | # CONFIG_ADAPTEC_STARFIRE is not set | ||
| 642 | # CONFIG_B44 is not set | ||
| 643 | # CONFIG_FORCEDETH is not set | ||
| 644 | CONFIG_E100=m | ||
| 645 | # CONFIG_FEALNX is not set | ||
| 646 | # CONFIG_NATSEMI is not set | ||
| 647 | # CONFIG_NE2K_PCI is not set | ||
| 648 | # CONFIG_8139CP is not set | ||
| 649 | # CONFIG_8139TOO is not set | ||
| 650 | # CONFIG_R6040 is not set | ||
| 651 | # CONFIG_SIS900 is not set | ||
| 652 | # CONFIG_EPIC100 is not set | ||
| 653 | # CONFIG_SMSC9420 is not set | ||
| 654 | # CONFIG_SUNDANCE is not set | ||
| 655 | # CONFIG_TLAN is not set | ||
| 656 | # CONFIG_VIA_RHINE is not set | ||
| 657 | # CONFIG_SC92031 is not set | ||
| 658 | # CONFIG_ATL2 is not set | ||
| 659 | CONFIG_NETDEV_1000=y | ||
| 660 | # CONFIG_ACENIC is not set | ||
| 661 | # CONFIG_DL2K is not set | ||
| 662 | CONFIG_E1000=y | ||
| 663 | # CONFIG_E1000E is not set | ||
| 664 | # CONFIG_IP1000 is not set | ||
| 665 | # CONFIG_IGB is not set | ||
| 666 | # CONFIG_NS83820 is not set | ||
| 667 | # CONFIG_HAMACHI is not set | ||
| 668 | # CONFIG_YELLOWFIN is not set | ||
| 669 | # CONFIG_R8169 is not set | ||
| 670 | # CONFIG_SIS190 is not set | ||
| 671 | # CONFIG_SKGE is not set | ||
| 672 | # CONFIG_SKY2 is not set | ||
| 673 | # CONFIG_VIA_VELOCITY is not set | ||
| 674 | CONFIG_TIGON3=y | ||
| 675 | # CONFIG_BNX2 is not set | ||
| 676 | # CONFIG_QLA3XXX is not set | ||
| 677 | # CONFIG_ATL1 is not set | ||
| 678 | # CONFIG_ATL1E is not set | ||
| 679 | # CONFIG_JME is not set | ||
| 680 | CONFIG_NETDEV_10000=y | ||
| 681 | # CONFIG_CHELSIO_T1 is not set | ||
| 682 | CONFIG_CHELSIO_T3_DEPENDS=y | ||
| 683 | # CONFIG_CHELSIO_T3 is not set | ||
| 684 | # CONFIG_ENIC is not set | ||
| 685 | # CONFIG_IXGBE is not set | ||
| 686 | # CONFIG_IXGB is not set | ||
| 687 | # CONFIG_S2IO is not set | ||
| 688 | # CONFIG_MYRI10GE is not set | ||
| 689 | # CONFIG_NETXEN_NIC is not set | ||
| 690 | # CONFIG_NIU is not set | ||
| 691 | # CONFIG_MLX4_EN is not set | ||
| 692 | # CONFIG_MLX4_CORE is not set | ||
| 693 | # CONFIG_TEHUTI is not set | ||
| 694 | # CONFIG_BNX2X is not set | ||
| 695 | # CONFIG_QLGE is not set | ||
| 696 | # CONFIG_SFC is not set | ||
| 697 | # CONFIG_TR is not set | ||
| 698 | |||
| 699 | # | ||
| 700 | # Wireless LAN | ||
| 701 | # | ||
| 702 | # CONFIG_WLAN_PRE80211 is not set | ||
| 703 | # CONFIG_WLAN_80211 is not set | ||
| 704 | # CONFIG_IWLWIFI_LEDS is not set | ||
| 705 | |||
| 706 | # | ||
| 707 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 708 | # | ||
| 709 | |||
| 710 | # | ||
| 711 | # USB Network Adapters | ||
| 712 | # | ||
| 713 | # CONFIG_USB_CATC is not set | ||
| 714 | # CONFIG_USB_KAWETH is not set | ||
| 715 | # CONFIG_USB_PEGASUS is not set | ||
| 716 | # CONFIG_USB_RTL8150 is not set | ||
| 717 | # CONFIG_USB_USBNET is not set | ||
| 718 | # CONFIG_WAN is not set | ||
| 719 | CONFIG_XEN_NETDEV_FRONTEND=y | ||
| 720 | # CONFIG_FDDI is not set | ||
| 721 | # CONFIG_HIPPI is not set | ||
| 722 | # CONFIG_PPP is not set | ||
| 723 | # CONFIG_SLIP is not set | ||
| 724 | # CONFIG_NET_FC is not set | ||
| 725 | CONFIG_NETCONSOLE=y | ||
| 726 | # CONFIG_NETCONSOLE_DYNAMIC is not set | ||
| 727 | CONFIG_NETPOLL=y | ||
| 728 | # CONFIG_NETPOLL_TRAP is not set | ||
| 729 | CONFIG_NET_POLL_CONTROLLER=y | ||
| 730 | # CONFIG_ISDN is not set | ||
| 731 | # CONFIG_PHONE is not set | ||
| 732 | |||
| 733 | # | ||
| 734 | # Input device support | ||
| 735 | # | ||
| 736 | CONFIG_INPUT=y | ||
| 737 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 738 | # CONFIG_INPUT_POLLDEV is not set | ||
| 739 | |||
| 740 | # | ||
| 741 | # Userland interfaces | ||
| 742 | # | ||
| 743 | CONFIG_INPUT_MOUSEDEV=y | ||
| 744 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
| 745 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 746 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 747 | # CONFIG_INPUT_JOYDEV is not set | ||
| 748 | # CONFIG_INPUT_EVDEV is not set | ||
| 749 | # CONFIG_INPUT_EVBUG is not set | ||
| 750 | |||
| 751 | # | ||
| 752 | # Input Device Drivers | ||
| 753 | # | ||
| 754 | CONFIG_INPUT_KEYBOARD=y | ||
| 755 | CONFIG_KEYBOARD_ATKBD=y | ||
| 756 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 757 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 758 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 759 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 760 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 761 | CONFIG_INPUT_MOUSE=y | ||
| 762 | CONFIG_MOUSE_PS2=y | ||
| 763 | CONFIG_MOUSE_PS2_ALPS=y | ||
| 764 | CONFIG_MOUSE_PS2_LOGIPS2PP=y | ||
| 765 | CONFIG_MOUSE_PS2_SYNAPTICS=y | ||
| 766 | CONFIG_MOUSE_PS2_LIFEBOOK=y | ||
| 767 | CONFIG_MOUSE_PS2_TRACKPOINT=y | ||
| 768 | # CONFIG_MOUSE_PS2_ELANTECH is not set | ||
| 769 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | ||
| 770 | # CONFIG_MOUSE_SERIAL is not set | ||
| 771 | # CONFIG_MOUSE_APPLETOUCH is not set | ||
| 772 | # CONFIG_MOUSE_BCM5974 is not set | ||
| 773 | # CONFIG_MOUSE_VSXXXAA is not set | ||
| 774 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 775 | # CONFIG_INPUT_TABLET is not set | ||
| 776 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 777 | # CONFIG_INPUT_MISC is not set | ||
| 778 | |||
| 779 | # | ||
| 780 | # Hardware I/O ports | ||
| 781 | # | ||
| 782 | CONFIG_SERIO=y | ||
| 783 | CONFIG_SERIO_I8042=y | ||
| 784 | # CONFIG_SERIO_SERPORT is not set | ||
| 785 | # CONFIG_SERIO_PCIPS2 is not set | ||
| 786 | CONFIG_SERIO_LIBPS2=y | ||
| 787 | # CONFIG_SERIO_RAW is not set | ||
| 788 | CONFIG_GAMEPORT=m | ||
| 789 | # CONFIG_GAMEPORT_NS558 is not set | ||
| 790 | # CONFIG_GAMEPORT_L4 is not set | ||
| 791 | # CONFIG_GAMEPORT_EMU10K1 is not set | ||
| 792 | # CONFIG_GAMEPORT_FM801 is not set | ||
| 793 | |||
| 794 | # | ||
| 795 | # Character devices | ||
| 796 | # | ||
| 797 | CONFIG_VT=y | ||
| 798 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 799 | CONFIG_VT_CONSOLE=y | ||
| 800 | CONFIG_HW_CONSOLE=y | ||
| 801 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 802 | CONFIG_DEVKMEM=y | ||
| 803 | CONFIG_SERIAL_NONSTANDARD=y | ||
| 804 | # CONFIG_COMPUTONE is not set | ||
| 805 | # CONFIG_ROCKETPORT is not set | ||
| 806 | # CONFIG_CYCLADES is not set | ||
| 807 | # CONFIG_DIGIEPCA is not set | ||
| 808 | # CONFIG_MOXA_INTELLIO is not set | ||
| 809 | # CONFIG_MOXA_SMARTIO is not set | ||
| 810 | # CONFIG_ISI is not set | ||
| 811 | # CONFIG_SYNCLINKMP is not set | ||
| 812 | # CONFIG_SYNCLINK_GT is not set | ||
| 813 | # CONFIG_N_HDLC is not set | ||
| 814 | # CONFIG_RISCOM8 is not set | ||
| 815 | # CONFIG_SPECIALIX is not set | ||
| 816 | # CONFIG_SX is not set | ||
| 817 | # CONFIG_RIO is not set | ||
| 818 | # CONFIG_STALDRV is not set | ||
| 819 | # CONFIG_NOZOMI is not set | ||
| 820 | |||
| 821 | # | ||
| 822 | # Serial drivers | ||
| 823 | # | ||
| 824 | CONFIG_SERIAL_8250=y | ||
| 825 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 826 | CONFIG_SERIAL_8250_PCI=y | ||
| 827 | CONFIG_SERIAL_8250_PNP=y | ||
| 828 | CONFIG_SERIAL_8250_NR_UARTS=6 | ||
| 829 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 830 | CONFIG_SERIAL_8250_EXTENDED=y | ||
| 831 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
| 832 | # CONFIG_SERIAL_8250_DETECT_IRQ is not set | ||
| 833 | # CONFIG_SERIAL_8250_RSA is not set | ||
| 834 | |||
| 835 | # | ||
| 836 | # Non-8250 serial port support | ||
| 837 | # | ||
| 838 | CONFIG_SERIAL_CORE=y | ||
| 839 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 840 | # CONFIG_SERIAL_JSM is not set | ||
| 841 | CONFIG_UNIX98_PTYS=y | ||
| 842 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 843 | CONFIG_LEGACY_PTYS=y | ||
| 844 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 845 | CONFIG_HVC_DRIVER=y | ||
| 846 | CONFIG_HVC_IRQ=y | ||
| 847 | CONFIG_HVC_XEN=y | ||
| 848 | # CONFIG_IPMI_HANDLER is not set | ||
| 849 | # CONFIG_HW_RANDOM is not set | ||
| 850 | CONFIG_EFI_RTC=y | ||
| 851 | # CONFIG_R3964 is not set | ||
| 852 | # CONFIG_APPLICOM is not set | ||
| 853 | CONFIG_RAW_DRIVER=m | ||
| 854 | CONFIG_MAX_RAW_DEVS=256 | ||
| 855 | CONFIG_HPET=y | ||
| 856 | CONFIG_HPET_MMAP=y | ||
| 857 | # CONFIG_HANGCHECK_TIMER is not set | ||
| 858 | # CONFIG_TCG_TPM is not set | ||
| 859 | CONFIG_DEVPORT=y | ||
| 860 | CONFIG_I2C=m | ||
| 861 | CONFIG_I2C_BOARDINFO=y | ||
| 862 | # CONFIG_I2C_CHARDEV is not set | ||
| 863 | CONFIG_I2C_HELPER_AUTO=y | ||
| 864 | CONFIG_I2C_ALGOBIT=m | ||
| 865 | |||
| 866 | # | ||
| 867 | # I2C Hardware Bus support | ||
| 868 | # | ||
| 869 | |||
| 870 | # | ||
| 871 | # PC SMBus host controller drivers | ||
| 872 | # | ||
| 873 | # CONFIG_I2C_ALI1535 is not set | ||
| 874 | # CONFIG_I2C_ALI1563 is not set | ||
| 875 | # CONFIG_I2C_ALI15X3 is not set | ||
| 876 | # CONFIG_I2C_AMD756 is not set | ||
| 877 | # CONFIG_I2C_AMD8111 is not set | ||
| 878 | # CONFIG_I2C_I801 is not set | ||
| 879 | # CONFIG_I2C_ISCH is not set | ||
| 880 | # CONFIG_I2C_PIIX4 is not set | ||
| 881 | # CONFIG_I2C_NFORCE2 is not set | ||
| 882 | # CONFIG_I2C_SIS5595 is not set | ||
| 883 | # CONFIG_I2C_SIS630 is not set | ||
| 884 | # CONFIG_I2C_SIS96X is not set | ||
| 885 | # CONFIG_I2C_VIA is not set | ||
| 886 | # CONFIG_I2C_VIAPRO is not set | ||
| 887 | |||
| 888 | # | ||
| 889 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 890 | # | ||
| 891 | # CONFIG_I2C_OCORES is not set | ||
| 892 | # CONFIG_I2C_SIMTEC is not set | ||
| 893 | |||
| 894 | # | ||
| 895 | # External I2C/SMBus adapter drivers | ||
| 896 | # | ||
| 897 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 898 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 899 | # CONFIG_I2C_TINY_USB is not set | ||
| 900 | |||
| 901 | # | ||
| 902 | # Graphics adapter I2C/DDC channel drivers | ||
| 903 | # | ||
| 904 | # CONFIG_I2C_VOODOO3 is not set | ||
| 905 | |||
| 906 | # | ||
| 907 | # Other I2C/SMBus bus drivers | ||
| 908 | # | ||
| 909 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 910 | # CONFIG_I2C_STUB is not set | ||
| 911 | |||
| 912 | # | ||
| 913 | # Miscellaneous I2C Chip support | ||
| 914 | # | ||
| 915 | # CONFIG_DS1682 is not set | ||
| 916 | # CONFIG_AT24 is not set | ||
| 917 | # CONFIG_SENSORS_EEPROM is not set | ||
| 918 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 919 | # CONFIG_PCF8575 is not set | ||
| 920 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 921 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 922 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 923 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 924 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 925 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 926 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 927 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 928 | # CONFIG_SPI is not set | ||
| 929 | # CONFIG_W1 is not set | ||
| 930 | CONFIG_POWER_SUPPLY=y | ||
| 931 | # CONFIG_POWER_SUPPLY_DEBUG is not set | ||
| 932 | # CONFIG_PDA_POWER is not set | ||
| 933 | # CONFIG_BATTERY_DS2760 is not set | ||
| 934 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 935 | CONFIG_HWMON=y | ||
| 936 | # CONFIG_HWMON_VID is not set | ||
| 937 | # CONFIG_SENSORS_AD7414 is not set | ||
| 938 | # CONFIG_SENSORS_AD7418 is not set | ||
| 939 | # CONFIG_SENSORS_ADM1021 is not set | ||
| 940 | # CONFIG_SENSORS_ADM1025 is not set | ||
| 941 | # CONFIG_SENSORS_ADM1026 is not set | ||
| 942 | # CONFIG_SENSORS_ADM1029 is not set | ||
| 943 | # CONFIG_SENSORS_ADM1031 is not set | ||
| 944 | # CONFIG_SENSORS_ADM9240 is not set | ||
| 945 | # CONFIG_SENSORS_ADT7462 is not set | ||
| 946 | # CONFIG_SENSORS_ADT7470 is not set | ||
| 947 | # CONFIG_SENSORS_ADT7473 is not set | ||
| 948 | # CONFIG_SENSORS_ATXP1 is not set | ||
| 949 | # CONFIG_SENSORS_DS1621 is not set | ||
| 950 | # CONFIG_SENSORS_I5K_AMB is not set | ||
| 951 | # CONFIG_SENSORS_F71805F is not set | ||
| 952 | # CONFIG_SENSORS_F71882FG is not set | ||
| 953 | # CONFIG_SENSORS_F75375S is not set | ||
| 954 | # CONFIG_SENSORS_GL518SM is not set | ||
| 955 | # CONFIG_SENSORS_GL520SM is not set | ||
| 956 | # CONFIG_SENSORS_IT87 is not set | ||
| 957 | # CONFIG_SENSORS_LM63 is not set | ||
| 958 | # CONFIG_SENSORS_LM75 is not set | ||
| 959 | # CONFIG_SENSORS_LM77 is not set | ||
| 960 | # CONFIG_SENSORS_LM78 is not set | ||
| 961 | # CONFIG_SENSORS_LM80 is not set | ||
| 962 | # CONFIG_SENSORS_LM83 is not set | ||
| 963 | # CONFIG_SENSORS_LM85 is not set | ||
| 964 | # CONFIG_SENSORS_LM87 is not set | ||
| 965 | # CONFIG_SENSORS_LM90 is not set | ||
| 966 | # CONFIG_SENSORS_LM92 is not set | ||
| 967 | # CONFIG_SENSORS_LM93 is not set | ||
| 968 | # CONFIG_SENSORS_LTC4245 is not set | ||
| 969 | # CONFIG_SENSORS_MAX1619 is not set | ||
| 970 | # CONFIG_SENSORS_MAX6650 is not set | ||
| 971 | # CONFIG_SENSORS_PC87360 is not set | ||
| 972 | # CONFIG_SENSORS_PC87427 is not set | ||
| 973 | # CONFIG_SENSORS_SIS5595 is not set | ||
| 974 | # CONFIG_SENSORS_DME1737 is not set | ||
| 975 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
| 976 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
| 977 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
| 978 | # CONFIG_SENSORS_ADS7828 is not set | ||
| 979 | # CONFIG_SENSORS_THMC50 is not set | ||
| 980 | # CONFIG_SENSORS_VIA686A is not set | ||
| 981 | # CONFIG_SENSORS_VT1211 is not set | ||
| 982 | # CONFIG_SENSORS_VT8231 is not set | ||
| 983 | # CONFIG_SENSORS_W83781D is not set | ||
| 984 | # CONFIG_SENSORS_W83791D is not set | ||
| 985 | # CONFIG_SENSORS_W83792D is not set | ||
| 986 | # CONFIG_SENSORS_W83793 is not set | ||
| 987 | # CONFIG_SENSORS_W83L785TS is not set | ||
| 988 | # CONFIG_SENSORS_W83L786NG is not set | ||
| 989 | # CONFIG_SENSORS_W83627HF is not set | ||
| 990 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 991 | # CONFIG_SENSORS_LIS3LV02D is not set | ||
| 992 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 993 | CONFIG_THERMAL=m | ||
| 994 | # CONFIG_THERMAL_HWMON is not set | ||
| 995 | # CONFIG_WATCHDOG is not set | ||
| 996 | CONFIG_SSB_POSSIBLE=y | ||
| 997 | |||
| 998 | # | ||
| 999 | # Sonics Silicon Backplane | ||
| 1000 | # | ||
| 1001 | # CONFIG_SSB is not set | ||
| 1002 | |||
| 1003 | # | ||
| 1004 | # Multifunction device drivers | ||
| 1005 | # | ||
| 1006 | # CONFIG_MFD_CORE is not set | ||
| 1007 | # CONFIG_MFD_SM501 is not set | ||
| 1008 | # CONFIG_HTC_PASIC3 is not set | ||
| 1009 | # CONFIG_MFD_TMIO is not set | ||
| 1010 | # CONFIG_MFD_WM8400 is not set | ||
| 1011 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 1012 | # CONFIG_MFD_PCF50633 is not set | ||
| 1013 | # CONFIG_REGULATOR is not set | ||
| 1014 | |||
| 1015 | # | ||
| 1016 | # Multimedia devices | ||
| 1017 | # | ||
| 1018 | |||
| 1019 | # | ||
| 1020 | # Multimedia core support | ||
| 1021 | # | ||
| 1022 | # CONFIG_VIDEO_DEV is not set | ||
| 1023 | # CONFIG_DVB_CORE is not set | ||
| 1024 | # CONFIG_VIDEO_MEDIA is not set | ||
| 1025 | |||
| 1026 | # | ||
| 1027 | # Multimedia drivers | ||
| 1028 | # | ||
| 1029 | CONFIG_DAB=y | ||
| 1030 | # CONFIG_USB_DABUSB is not set | ||
| 1031 | |||
| 1032 | # | ||
| 1033 | # Graphics support | ||
| 1034 | # | ||
| 1035 | CONFIG_AGP=m | ||
| 1036 | CONFIG_DRM=m | ||
| 1037 | CONFIG_DRM_TDFX=m | ||
| 1038 | CONFIG_DRM_R128=m | ||
| 1039 | CONFIG_DRM_RADEON=m | ||
| 1040 | CONFIG_DRM_MGA=m | ||
| 1041 | CONFIG_DRM_SIS=m | ||
| 1042 | # CONFIG_DRM_VIA is not set | ||
| 1043 | # CONFIG_DRM_SAVAGE is not set | ||
| 1044 | # CONFIG_VGASTATE is not set | ||
| 1045 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 1046 | # CONFIG_FB is not set | ||
| 1047 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 1048 | |||
| 1049 | # | ||
| 1050 | # Display device support | ||
| 1051 | # | ||
| 1052 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 1053 | |||
| 1054 | # | ||
| 1055 | # Console display driver support | ||
| 1056 | # | ||
| 1057 | CONFIG_VGA_CONSOLE=y | ||
| 1058 | # CONFIG_VGACON_SOFT_SCROLLBACK is not set | ||
| 1059 | CONFIG_DUMMY_CONSOLE=y | ||
| 1060 | # CONFIG_SOUND is not set | ||
| 1061 | CONFIG_HID_SUPPORT=y | ||
| 1062 | CONFIG_HID=y | ||
| 1063 | # CONFIG_HID_DEBUG is not set | ||
| 1064 | # CONFIG_HIDRAW is not set | ||
| 1065 | |||
| 1066 | # | ||
| 1067 | # USB Input Devices | ||
| 1068 | # | ||
| 1069 | CONFIG_USB_HID=y | ||
| 1070 | # CONFIG_HID_PID is not set | ||
| 1071 | # CONFIG_USB_HIDDEV is not set | ||
| 1072 | |||
| 1073 | # | ||
| 1074 | # Special HID drivers | ||
| 1075 | # | ||
| 1076 | CONFIG_HID_COMPAT=y | ||
| 1077 | CONFIG_HID_A4TECH=y | ||
| 1078 | CONFIG_HID_APPLE=y | ||
| 1079 | CONFIG_HID_BELKIN=y | ||
| 1080 | CONFIG_HID_CHERRY=y | ||
| 1081 | CONFIG_HID_CHICONY=y | ||
| 1082 | CONFIG_HID_CYPRESS=y | ||
| 1083 | CONFIG_HID_EZKEY=y | ||
| 1084 | CONFIG_HID_GYRATION=y | ||
| 1085 | CONFIG_HID_LOGITECH=y | ||
| 1086 | # CONFIG_LOGITECH_FF is not set | ||
| 1087 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
| 1088 | CONFIG_HID_MICROSOFT=y | ||
| 1089 | CONFIG_HID_MONTEREY=y | ||
| 1090 | CONFIG_HID_NTRIG=y | ||
| 1091 | CONFIG_HID_PANTHERLORD=y | ||
| 1092 | # CONFIG_PANTHERLORD_FF is not set | ||
| 1093 | CONFIG_HID_PETALYNX=y | ||
| 1094 | CONFIG_HID_SAMSUNG=y | ||
| 1095 | CONFIG_HID_SONY=y | ||
| 1096 | CONFIG_HID_SUNPLUS=y | ||
| 1097 | # CONFIG_GREENASIA_FF is not set | ||
| 1098 | CONFIG_HID_TOPSEED=y | ||
| 1099 | # CONFIG_THRUSTMASTER_FF is not set | ||
| 1100 | # CONFIG_ZEROPLUS_FF is not set | ||
| 1101 | CONFIG_USB_SUPPORT=y | ||
| 1102 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 1103 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 1104 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 1105 | CONFIG_USB=y | ||
| 1106 | # CONFIG_USB_DEBUG is not set | ||
| 1107 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
| 1108 | |||
| 1109 | # | ||
| 1110 | # Miscellaneous USB options | ||
| 1111 | # | ||
| 1112 | CONFIG_USB_DEVICEFS=y | ||
| 1113 | CONFIG_USB_DEVICE_CLASS=y | ||
| 1114 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 1115 | # CONFIG_USB_SUSPEND is not set | ||
| 1116 | # CONFIG_USB_OTG is not set | ||
| 1117 | # CONFIG_USB_MON is not set | ||
| 1118 | # CONFIG_USB_WUSB is not set | ||
| 1119 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 1120 | |||
| 1121 | # | ||
| 1122 | # USB Host Controller Drivers | ||
| 1123 | # | ||
| 1124 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1125 | CONFIG_USB_EHCI_HCD=m | ||
| 1126 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
| 1127 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
| 1128 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1129 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 1130 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1131 | CONFIG_USB_OHCI_HCD=m | ||
| 1132 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
| 1133 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
| 1134 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
| 1135 | CONFIG_USB_UHCI_HCD=y | ||
| 1136 | # CONFIG_USB_SL811_HCD is not set | ||
| 1137 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 1138 | # CONFIG_USB_WHCI_HCD is not set | ||
| 1139 | # CONFIG_USB_HWA_HCD is not set | ||
| 1140 | |||
| 1141 | # | ||
| 1142 | # USB Device Class drivers | ||
| 1143 | # | ||
| 1144 | # CONFIG_USB_ACM is not set | ||
| 1145 | # CONFIG_USB_PRINTER is not set | ||
| 1146 | # CONFIG_USB_WDM is not set | ||
| 1147 | # CONFIG_USB_TMC is not set | ||
| 1148 | |||
| 1149 | # | ||
| 1150 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | ||
| 1151 | # | ||
| 1152 | |||
| 1153 | # | ||
| 1154 | # see USB_STORAGE Help for more information | ||
| 1155 | # | ||
| 1156 | CONFIG_USB_STORAGE=m | ||
| 1157 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 1158 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 1159 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 1160 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 1161 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 1162 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 1163 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 1164 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 1165 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 1166 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 1167 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 1168 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 1169 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1170 | |||
| 1171 | # | ||
| 1172 | # USB Imaging devices | ||
| 1173 | # | ||
| 1174 | # CONFIG_USB_MDC800 is not set | ||
| 1175 | # CONFIG_USB_MICROTEK is not set | ||
| 1176 | |||
| 1177 | # | ||
| 1178 | # USB port drivers | ||
| 1179 | # | ||
| 1180 | # CONFIG_USB_SERIAL is not set | ||
| 1181 | |||
| 1182 | # | ||
| 1183 | # USB Miscellaneous drivers | ||
| 1184 | # | ||
| 1185 | # CONFIG_USB_EMI62 is not set | ||
| 1186 | # CONFIG_USB_EMI26 is not set | ||
| 1187 | # CONFIG_USB_ADUTUX is not set | ||
| 1188 | # CONFIG_USB_SEVSEG is not set | ||
| 1189 | # CONFIG_USB_RIO500 is not set | ||
| 1190 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1191 | # CONFIG_USB_LCD is not set | ||
| 1192 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1193 | # CONFIG_USB_LED is not set | ||
| 1194 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1195 | # CONFIG_USB_CYTHERM is not set | ||
| 1196 | # CONFIG_USB_PHIDGET is not set | ||
| 1197 | # CONFIG_USB_IDMOUSE is not set | ||
| 1198 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1199 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1200 | # CONFIG_USB_SISUSBVGA is not set | ||
| 1201 | # CONFIG_USB_LD is not set | ||
| 1202 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1203 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1204 | # CONFIG_USB_TEST is not set | ||
| 1205 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1206 | # CONFIG_USB_VST is not set | ||
| 1207 | # CONFIG_USB_GADGET is not set | ||
| 1208 | |||
| 1209 | # | ||
| 1210 | # OTG and related infrastructure | ||
| 1211 | # | ||
| 1212 | # CONFIG_UWB is not set | ||
| 1213 | # CONFIG_MMC is not set | ||
| 1214 | # CONFIG_MEMSTICK is not set | ||
| 1215 | # CONFIG_NEW_LEDS is not set | ||
| 1216 | # CONFIG_ACCESSIBILITY is not set | ||
| 1217 | # CONFIG_INFINIBAND is not set | ||
| 1218 | # CONFIG_RTC_CLASS is not set | ||
| 1219 | # CONFIG_DMADEVICES is not set | ||
| 1220 | # CONFIG_UIO is not set | ||
| 1221 | CONFIG_XEN_BALLOON=y | ||
| 1222 | CONFIG_XEN_SCRUB_PAGES=y | ||
| 1223 | CONFIG_XENFS=y | ||
| 1224 | CONFIG_XEN_COMPAT_XENFS=y | ||
| 1225 | # CONFIG_STAGING is not set | ||
| 1226 | # CONFIG_MSPEC is not set | ||
| 1227 | |||
| 1228 | # | ||
| 1229 | # File systems | ||
| 1230 | # | ||
| 1231 | CONFIG_EXT2_FS=y | ||
| 1232 | CONFIG_EXT2_FS_XATTR=y | ||
| 1233 | CONFIG_EXT2_FS_POSIX_ACL=y | ||
| 1234 | CONFIG_EXT2_FS_SECURITY=y | ||
| 1235 | # CONFIG_EXT2_FS_XIP is not set | ||
| 1236 | CONFIG_EXT3_FS=y | ||
| 1237 | CONFIG_EXT3_FS_XATTR=y | ||
| 1238 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
| 1239 | CONFIG_EXT3_FS_SECURITY=y | ||
| 1240 | # CONFIG_EXT4_FS is not set | ||
| 1241 | CONFIG_JBD=y | ||
| 1242 | CONFIG_FS_MBCACHE=y | ||
| 1243 | CONFIG_REISERFS_FS=y | ||
| 1244 | # CONFIG_REISERFS_CHECK is not set | ||
| 1245 | # CONFIG_REISERFS_PROC_INFO is not set | ||
| 1246 | CONFIG_REISERFS_FS_XATTR=y | ||
| 1247 | CONFIG_REISERFS_FS_POSIX_ACL=y | ||
| 1248 | CONFIG_REISERFS_FS_SECURITY=y | ||
| 1249 | # CONFIG_JFS_FS is not set | ||
| 1250 | CONFIG_FS_POSIX_ACL=y | ||
| 1251 | CONFIG_FILE_LOCKING=y | ||
| 1252 | CONFIG_XFS_FS=y | ||
| 1253 | # CONFIG_XFS_QUOTA is not set | ||
| 1254 | # CONFIG_XFS_POSIX_ACL is not set | ||
| 1255 | # CONFIG_XFS_RT is not set | ||
| 1256 | # CONFIG_XFS_DEBUG is not set | ||
| 1257 | # CONFIG_GFS2_FS is not set | ||
| 1258 | # CONFIG_OCFS2_FS is not set | ||
| 1259 | # CONFIG_BTRFS_FS is not set | ||
| 1260 | CONFIG_DNOTIFY=y | ||
| 1261 | CONFIG_INOTIFY=y | ||
| 1262 | CONFIG_INOTIFY_USER=y | ||
| 1263 | # CONFIG_QUOTA is not set | ||
| 1264 | CONFIG_AUTOFS_FS=y | ||
| 1265 | CONFIG_AUTOFS4_FS=y | ||
| 1266 | # CONFIG_FUSE_FS is not set | ||
| 1267 | |||
| 1268 | # | ||
| 1269 | # CD-ROM/DVD Filesystems | ||
| 1270 | # | ||
| 1271 | CONFIG_ISO9660_FS=m | ||
| 1272 | CONFIG_JOLIET=y | ||
| 1273 | # CONFIG_ZISOFS is not set | ||
| 1274 | CONFIG_UDF_FS=m | ||
| 1275 | CONFIG_UDF_NLS=y | ||
| 1276 | |||
| 1277 | # | ||
| 1278 | # DOS/FAT/NT Filesystems | ||
| 1279 | # | ||
| 1280 | CONFIG_FAT_FS=y | ||
| 1281 | # CONFIG_MSDOS_FS is not set | ||
| 1282 | CONFIG_VFAT_FS=y | ||
| 1283 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1284 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1285 | CONFIG_NTFS_FS=m | ||
| 1286 | # CONFIG_NTFS_DEBUG is not set | ||
| 1287 | # CONFIG_NTFS_RW is not set | ||
| 1288 | |||
| 1289 | # | ||
| 1290 | # Pseudo filesystems | ||
| 1291 | # | ||
| 1292 | CONFIG_PROC_FS=y | ||
| 1293 | CONFIG_PROC_KCORE=y | ||
| 1294 | CONFIG_PROC_SYSCTL=y | ||
| 1295 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 1296 | CONFIG_SYSFS=y | ||
| 1297 | CONFIG_TMPFS=y | ||
| 1298 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1299 | CONFIG_HUGETLBFS=y | ||
| 1300 | CONFIG_HUGETLB_PAGE=y | ||
| 1301 | # CONFIG_CONFIGFS_FS is not set | ||
| 1302 | CONFIG_MISC_FILESYSTEMS=y | ||
| 1303 | # CONFIG_ADFS_FS is not set | ||
| 1304 | # CONFIG_AFFS_FS is not set | ||
| 1305 | # CONFIG_HFS_FS is not set | ||
| 1306 | # CONFIG_HFSPLUS_FS is not set | ||
| 1307 | # CONFIG_BEFS_FS is not set | ||
| 1308 | # CONFIG_BFS_FS is not set | ||
| 1309 | # CONFIG_EFS_FS is not set | ||
| 1310 | # CONFIG_CRAMFS is not set | ||
| 1311 | # CONFIG_SQUASHFS is not set | ||
| 1312 | # CONFIG_VXFS_FS is not set | ||
| 1313 | # CONFIG_MINIX_FS is not set | ||
| 1314 | # CONFIG_OMFS_FS is not set | ||
| 1315 | # CONFIG_HPFS_FS is not set | ||
| 1316 | # CONFIG_QNX4FS_FS is not set | ||
| 1317 | # CONFIG_ROMFS_FS is not set | ||
| 1318 | # CONFIG_SYSV_FS is not set | ||
| 1319 | # CONFIG_UFS_FS is not set | ||
| 1320 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1321 | CONFIG_NFS_FS=m | ||
| 1322 | CONFIG_NFS_V3=y | ||
| 1323 | # CONFIG_NFS_V3_ACL is not set | ||
| 1324 | CONFIG_NFS_V4=y | ||
| 1325 | CONFIG_NFSD=m | ||
| 1326 | CONFIG_NFSD_V3=y | ||
| 1327 | # CONFIG_NFSD_V3_ACL is not set | ||
| 1328 | CONFIG_NFSD_V4=y | ||
| 1329 | CONFIG_LOCKD=m | ||
| 1330 | CONFIG_LOCKD_V4=y | ||
| 1331 | CONFIG_EXPORTFS=m | ||
| 1332 | CONFIG_NFS_COMMON=y | ||
| 1333 | CONFIG_SUNRPC=m | ||
| 1334 | CONFIG_SUNRPC_GSS=m | ||
| 1335 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
| 1336 | CONFIG_RPCSEC_GSS_KRB5=m | ||
| 1337 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1338 | CONFIG_SMB_FS=m | ||
| 1339 | CONFIG_SMB_NLS_DEFAULT=y | ||
| 1340 | CONFIG_SMB_NLS_REMOTE="cp437" | ||
| 1341 | CONFIG_CIFS=m | ||
| 1342 | # CONFIG_CIFS_STATS is not set | ||
| 1343 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
| 1344 | # CONFIG_CIFS_XATTR is not set | ||
| 1345 | # CONFIG_CIFS_DEBUG2 is not set | ||
| 1346 | # CONFIG_CIFS_EXPERIMENTAL is not set | ||
| 1347 | # CONFIG_NCP_FS is not set | ||
| 1348 | # CONFIG_CODA_FS is not set | ||
| 1349 | # CONFIG_AFS_FS is not set | ||
| 1350 | |||
| 1351 | # | ||
| 1352 | # Partition Types | ||
| 1353 | # | ||
| 1354 | CONFIG_PARTITION_ADVANCED=y | ||
| 1355 | # CONFIG_ACORN_PARTITION is not set | ||
| 1356 | # CONFIG_OSF_PARTITION is not set | ||
| 1357 | # CONFIG_AMIGA_PARTITION is not set | ||
| 1358 | # CONFIG_ATARI_PARTITION is not set | ||
| 1359 | # CONFIG_MAC_PARTITION is not set | ||
| 1360 | CONFIG_MSDOS_PARTITION=y | ||
| 1361 | # CONFIG_BSD_DISKLABEL is not set | ||
| 1362 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 1363 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 1364 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 1365 | # CONFIG_LDM_PARTITION is not set | ||
| 1366 | CONFIG_SGI_PARTITION=y | ||
| 1367 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 1368 | # CONFIG_SUN_PARTITION is not set | ||
| 1369 | # CONFIG_KARMA_PARTITION is not set | ||
| 1370 | CONFIG_EFI_PARTITION=y | ||
| 1371 | # CONFIG_SYSV68_PARTITION is not set | ||
| 1372 | CONFIG_NLS=y | ||
| 1373 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1374 | CONFIG_NLS_CODEPAGE_437=y | ||
| 1375 | CONFIG_NLS_CODEPAGE_737=m | ||
| 1376 | CONFIG_NLS_CODEPAGE_775=m | ||
| 1377 | CONFIG_NLS_CODEPAGE_850=m | ||
| 1378 | CONFIG_NLS_CODEPAGE_852=m | ||
| 1379 | CONFIG_NLS_CODEPAGE_855=m | ||
| 1380 | CONFIG_NLS_CODEPAGE_857=m | ||
| 1381 | CONFIG_NLS_CODEPAGE_860=m | ||
| 1382 | CONFIG_NLS_CODEPAGE_861=m | ||
| 1383 | CONFIG_NLS_CODEPAGE_862=m | ||
| 1384 | CONFIG_NLS_CODEPAGE_863=m | ||
| 1385 | CONFIG_NLS_CODEPAGE_864=m | ||
| 1386 | CONFIG_NLS_CODEPAGE_865=m | ||
| 1387 | CONFIG_NLS_CODEPAGE_866=m | ||
| 1388 | CONFIG_NLS_CODEPAGE_869=m | ||
| 1389 | CONFIG_NLS_CODEPAGE_936=m | ||
| 1390 | CONFIG_NLS_CODEPAGE_950=m | ||
| 1391 | CONFIG_NLS_CODEPAGE_932=m | ||
| 1392 | CONFIG_NLS_CODEPAGE_949=m | ||
| 1393 | CONFIG_NLS_CODEPAGE_874=m | ||
| 1394 | CONFIG_NLS_ISO8859_8=m | ||
| 1395 | CONFIG_NLS_CODEPAGE_1250=m | ||
| 1396 | CONFIG_NLS_CODEPAGE_1251=m | ||
| 1397 | # CONFIG_NLS_ASCII is not set | ||
| 1398 | CONFIG_NLS_ISO8859_1=y | ||
| 1399 | CONFIG_NLS_ISO8859_2=m | ||
| 1400 | CONFIG_NLS_ISO8859_3=m | ||
| 1401 | CONFIG_NLS_ISO8859_4=m | ||
| 1402 | CONFIG_NLS_ISO8859_5=m | ||
| 1403 | CONFIG_NLS_ISO8859_6=m | ||
| 1404 | CONFIG_NLS_ISO8859_7=m | ||
| 1405 | CONFIG_NLS_ISO8859_9=m | ||
| 1406 | CONFIG_NLS_ISO8859_13=m | ||
| 1407 | CONFIG_NLS_ISO8859_14=m | ||
| 1408 | CONFIG_NLS_ISO8859_15=m | ||
| 1409 | CONFIG_NLS_KOI8_R=m | ||
| 1410 | CONFIG_NLS_KOI8_U=m | ||
| 1411 | CONFIG_NLS_UTF8=m | ||
| 1412 | # CONFIG_DLM is not set | ||
| 1413 | |||
| 1414 | # | ||
| 1415 | # Kernel hacking | ||
| 1416 | # | ||
| 1417 | # CONFIG_PRINTK_TIME is not set | ||
| 1418 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1419 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1420 | CONFIG_FRAME_WARN=2048 | ||
| 1421 | CONFIG_MAGIC_SYSRQ=y | ||
| 1422 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1423 | # CONFIG_DEBUG_FS is not set | ||
| 1424 | # CONFIG_HEADERS_CHECK is not set | ||
| 1425 | CONFIG_DEBUG_KERNEL=y | ||
| 1426 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1427 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1428 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1429 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1430 | CONFIG_SCHED_DEBUG=y | ||
| 1431 | # CONFIG_SCHEDSTATS is not set | ||
| 1432 | # CONFIG_TIMER_STATS is not set | ||
| 1433 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1434 | # CONFIG_SLUB_DEBUG_ON is not set | ||
| 1435 | # CONFIG_SLUB_STATS is not set | ||
| 1436 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1437 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1438 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1439 | CONFIG_DEBUG_MUTEXES=y | ||
| 1440 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1441 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1442 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1443 | # CONFIG_DEBUG_INFO is not set | ||
| 1444 | # CONFIG_DEBUG_VM is not set | ||
| 1445 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1446 | CONFIG_DEBUG_MEMORY_INIT=y | ||
| 1447 | # CONFIG_DEBUG_LIST is not set | ||
| 1448 | # CONFIG_DEBUG_SG is not set | ||
| 1449 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1450 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1451 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1452 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1453 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1454 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1455 | # CONFIG_FAULT_INJECTION is not set | ||
| 1456 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1457 | |||
| 1458 | # | ||
| 1459 | # Tracers | ||
| 1460 | # | ||
| 1461 | # CONFIG_SCHED_TRACER is not set | ||
| 1462 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 1463 | # CONFIG_BOOT_TRACER is not set | ||
| 1464 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
| 1465 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
| 1466 | # CONFIG_SAMPLES is not set | ||
| 1467 | CONFIG_IA64_GRANULE_16MB=y | ||
| 1468 | # CONFIG_IA64_GRANULE_64MB is not set | ||
| 1469 | # CONFIG_IA64_PRINT_HAZARDS is not set | ||
| 1470 | # CONFIG_DISABLE_VHPT is not set | ||
| 1471 | # CONFIG_IA64_DEBUG_CMPXCHG is not set | ||
| 1472 | # CONFIG_IA64_DEBUG_IRQ is not set | ||
| 1473 | |||
| 1474 | # | ||
| 1475 | # Security options | ||
| 1476 | # | ||
| 1477 | # CONFIG_KEYS is not set | ||
| 1478 | # CONFIG_SECURITY is not set | ||
| 1479 | # CONFIG_SECURITYFS is not set | ||
| 1480 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1481 | CONFIG_CRYPTO=y | ||
| 1482 | |||
| 1483 | # | ||
| 1484 | # Crypto core or helper | ||
| 1485 | # | ||
| 1486 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1487 | CONFIG_CRYPTO_ALGAPI=y | ||
| 1488 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 1489 | CONFIG_CRYPTO_AEAD2=y | ||
| 1490 | CONFIG_CRYPTO_BLKCIPHER=m | ||
| 1491 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 1492 | CONFIG_CRYPTO_HASH=y | ||
| 1493 | CONFIG_CRYPTO_HASH2=y | ||
| 1494 | CONFIG_CRYPTO_RNG2=y | ||
| 1495 | CONFIG_CRYPTO_MANAGER=m | ||
| 1496 | CONFIG_CRYPTO_MANAGER2=y | ||
| 1497 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1498 | # CONFIG_CRYPTO_NULL is not set | ||
| 1499 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1500 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1501 | # CONFIG_CRYPTO_TEST is not set | ||
| 1502 | |||
| 1503 | # | ||
| 1504 | # Authenticated Encryption with Associated Data | ||
| 1505 | # | ||
| 1506 | # CONFIG_CRYPTO_CCM is not set | ||
| 1507 | # CONFIG_CRYPTO_GCM is not set | ||
| 1508 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1509 | |||
| 1510 | # | ||
| 1511 | # Block modes | ||
| 1512 | # | ||
| 1513 | CONFIG_CRYPTO_CBC=m | ||
| 1514 | # CONFIG_CRYPTO_CTR is not set | ||
| 1515 | # CONFIG_CRYPTO_CTS is not set | ||
| 1516 | CONFIG_CRYPTO_ECB=m | ||
| 1517 | # CONFIG_CRYPTO_LRW is not set | ||
| 1518 | CONFIG_CRYPTO_PCBC=m | ||
| 1519 | # CONFIG_CRYPTO_XTS is not set | ||
| 1520 | |||
| 1521 | # | ||
| 1522 | # Hash modes | ||
| 1523 | # | ||
| 1524 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1525 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1526 | |||
| 1527 | # | ||
| 1528 | # Digest | ||
| 1529 | # | ||
| 1530 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1531 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1532 | CONFIG_CRYPTO_MD5=y | ||
| 1533 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1534 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1535 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1536 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1537 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1538 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1539 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1540 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1541 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1542 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1543 | |||
| 1544 | # | ||
| 1545 | # Ciphers | ||
| 1546 | # | ||
| 1547 | # CONFIG_CRYPTO_AES is not set | ||
| 1548 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1549 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1550 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1551 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1552 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1553 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1554 | CONFIG_CRYPTO_DES=m | ||
| 1555 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1556 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1557 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1558 | # CONFIG_CRYPTO_SEED is not set | ||
| 1559 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1560 | # CONFIG_CRYPTO_TEA is not set | ||
| 1561 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1562 | |||
| 1563 | # | ||
| 1564 | # Compression | ||
| 1565 | # | ||
| 1566 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1567 | # CONFIG_CRYPTO_LZO is not set | ||
| 1568 | |||
| 1569 | # | ||
| 1570 | # Random Number Generation | ||
| 1571 | # | ||
| 1572 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1573 | CONFIG_CRYPTO_HW=y | ||
| 1574 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
| 1575 | CONFIG_HAVE_KVM=y | ||
| 1576 | CONFIG_VIRTUALIZATION=y | ||
| 1577 | # CONFIG_KVM is not set | ||
| 1578 | # CONFIG_VIRTIO_PCI is not set | ||
| 1579 | # CONFIG_VIRTIO_BALLOON is not set | ||
| 1580 | |||
| 1581 | # | ||
| 1582 | # Library routines | ||
| 1583 | # | ||
| 1584 | CONFIG_BITREVERSE=y | ||
| 1585 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1586 | # CONFIG_CRC_CCITT is not set | ||
| 1587 | # CONFIG_CRC16 is not set | ||
| 1588 | # CONFIG_CRC_T10DIF is not set | ||
| 1589 | CONFIG_CRC_ITU_T=m | ||
| 1590 | CONFIG_CRC32=y | ||
| 1591 | # CONFIG_CRC7 is not set | ||
| 1592 | # CONFIG_LIBCRC32C is not set | ||
| 1593 | CONFIG_PLIST=y | ||
| 1594 | CONFIG_HAS_IOMEM=y | ||
| 1595 | CONFIG_HAS_IOPORT=y | ||
| 1596 | CONFIG_HAS_DMA=y | ||
| 1597 | CONFIG_GENERIC_HARDIRQS=y | ||
| 1598 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 1599 | CONFIG_GENERIC_PENDING_IRQ=y | ||
| 1600 | CONFIG_IRQ_PER_CPU=y | ||
| 1601 | # CONFIG_IOMMU_API is not set | ||
diff --git a/arch/ia64/include/asm/kvm.h b/arch/ia64/include/asm/kvm.h index 68aa6da807c1..bfa86b6af7cd 100644 --- a/arch/ia64/include/asm/kvm.h +++ b/arch/ia64/include/asm/kvm.h | |||
| @@ -25,6 +25,10 @@ | |||
| 25 | 25 | ||
| 26 | #include <linux/ioctl.h> | 26 | #include <linux/ioctl.h> |
| 27 | 27 | ||
| 28 | /* Select x86 specific features in <linux/kvm.h> */ | ||
| 29 | #define __KVM_HAVE_IOAPIC | ||
| 30 | #define __KVM_HAVE_DEVICE_ASSIGNMENT | ||
| 31 | |||
| 28 | /* Architectural interrupt line count. */ | 32 | /* Architectural interrupt line count. */ |
| 29 | #define KVM_NR_INTERRUPTS 256 | 33 | #define KVM_NR_INTERRUPTS 256 |
| 30 | 34 | ||
diff --git a/arch/ia64/include/asm/mmzone.h b/arch/ia64/include/asm/mmzone.h index 34efe88eb849..f2ca32069b3f 100644 --- a/arch/ia64/include/asm/mmzone.h +++ b/arch/ia64/include/asm/mmzone.h | |||
| @@ -31,10 +31,6 @@ static inline int pfn_to_nid(unsigned long pfn) | |||
| 31 | #endif | 31 | #endif |
| 32 | } | 32 | } |
| 33 | 33 | ||
| 34 | #ifdef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID | ||
| 35 | extern int early_pfn_to_nid(unsigned long pfn); | ||
| 36 | #endif | ||
| 37 | |||
| 38 | #ifdef CONFIG_IA64_DIG /* DIG systems are small */ | 34 | #ifdef CONFIG_IA64_DIG /* DIG systems are small */ |
| 39 | # define MAX_PHYSNODE_ID 8 | 35 | # define MAX_PHYSNODE_ID 8 |
| 40 | # define NR_NODE_MEMBLKS (MAX_NUMNODES * 8) | 36 | # define NR_NODE_MEMBLKS (MAX_NUMNODES * 8) |
diff --git a/arch/ia64/include/asm/sn/bte.h b/arch/ia64/include/asm/sn/bte.h index 5efecf06c9a4..96798d2da7c2 100644 --- a/arch/ia64/include/asm/sn/bte.h +++ b/arch/ia64/include/asm/sn/bte.h | |||
| @@ -39,7 +39,7 @@ | |||
| 39 | /* BTE status register only supports 16 bits for length field */ | 39 | /* BTE status register only supports 16 bits for length field */ |
| 40 | #define BTE_LEN_BITS (16) | 40 | #define BTE_LEN_BITS (16) |
| 41 | #define BTE_LEN_MASK ((1 << BTE_LEN_BITS) - 1) | 41 | #define BTE_LEN_MASK ((1 << BTE_LEN_BITS) - 1) |
| 42 | #define BTE_MAX_XFER ((1 << BTE_LEN_BITS) * L1_CACHE_BYTES) | 42 | #define BTE_MAX_XFER (BTE_LEN_MASK << L1_CACHE_SHIFT) |
| 43 | 43 | ||
| 44 | 44 | ||
| 45 | /* Define hardware */ | 45 | /* Define hardware */ |
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c index 5cfd3d91001a..e13125058bed 100644 --- a/arch/ia64/kernel/iosapic.c +++ b/arch/ia64/kernel/iosapic.c | |||
| @@ -507,7 +507,7 @@ static int iosapic_find_sharable_irq(unsigned long trigger, unsigned long pol) | |||
| 507 | if (trigger == IOSAPIC_EDGE) | 507 | if (trigger == IOSAPIC_EDGE) |
| 508 | return -EINVAL; | 508 | return -EINVAL; |
| 509 | 509 | ||
| 510 | for (i = 0; i <= NR_IRQS; i++) { | 510 | for (i = 0; i < NR_IRQS; i++) { |
| 511 | info = &iosapic_intr_info[i]; | 511 | info = &iosapic_intr_info[i]; |
| 512 | if (info->trigger == trigger && info->polarity == pol && | 512 | if (info->trigger == trigger && info->polarity == pol && |
| 513 | (info->dmode == IOSAPIC_FIXED || | 513 | (info->dmode == IOSAPIC_FIXED || |
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c index 11463994a7d5..52290547c85b 100644 --- a/arch/ia64/kernel/smpboot.c +++ b/arch/ia64/kernel/smpboot.c | |||
| @@ -736,14 +736,15 @@ int __cpu_disable(void) | |||
| 736 | return -EBUSY; | 736 | return -EBUSY; |
| 737 | } | 737 | } |
| 738 | 738 | ||
| 739 | cpu_clear(cpu, cpu_online_map); | ||
| 740 | |||
| 739 | if (migrate_platform_irqs(cpu)) { | 741 | if (migrate_platform_irqs(cpu)) { |
| 740 | cpu_set(cpu, cpu_online_map); | 742 | cpu_set(cpu, cpu_online_map); |
| 741 | return (-EBUSY); | 743 | return -EBUSY; |
| 742 | } | 744 | } |
| 743 | 745 | ||
| 744 | remove_siblinginfo(cpu); | 746 | remove_siblinginfo(cpu); |
| 745 | fixup_irqs(); | 747 | fixup_irqs(); |
| 746 | cpu_clear(cpu, cpu_online_map); | ||
| 747 | local_flush_tlb_all(); | 748 | local_flush_tlb_all(); |
| 748 | cpu_clear(cpu, cpu_callin_map); | 749 | cpu_clear(cpu, cpu_callin_map); |
| 749 | return 0; | 750 | return 0; |
diff --git a/arch/ia64/kernel/unwind.c b/arch/ia64/kernel/unwind.c index 67810b77d998..b6c0e63a0bf6 100644 --- a/arch/ia64/kernel/unwind.c +++ b/arch/ia64/kernel/unwind.c | |||
| @@ -2149,7 +2149,7 @@ unw_remove_unwind_table (void *handle) | |||
| 2149 | 2149 | ||
| 2150 | /* next, remove hash table entries for this table */ | 2150 | /* next, remove hash table entries for this table */ |
| 2151 | 2151 | ||
| 2152 | for (index = 0; index <= UNW_HASH_SIZE; ++index) { | 2152 | for (index = 0; index < UNW_HASH_SIZE; ++index) { |
| 2153 | tmp = unw.cache + unw.hash[index]; | 2153 | tmp = unw.cache + unw.hash[index]; |
| 2154 | if (unw.hash[index] >= UNW_CACHE_SIZE | 2154 | if (unw.hash[index] >= UNW_CACHE_SIZE |
| 2155 | || tmp->ip < table->start || tmp->ip >= table->end) | 2155 | || tmp->ip < table->start || tmp->ip >= table->end) |
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c index 4e586f6110aa..28f982045f29 100644 --- a/arch/ia64/kvm/kvm-ia64.c +++ b/arch/ia64/kvm/kvm-ia64.c | |||
| @@ -1337,6 +1337,10 @@ static void kvm_release_vm_pages(struct kvm *kvm) | |||
| 1337 | } | 1337 | } |
| 1338 | } | 1338 | } |
| 1339 | 1339 | ||
| 1340 | void kvm_arch_sync_events(struct kvm *kvm) | ||
| 1341 | { | ||
| 1342 | } | ||
| 1343 | |||
| 1340 | void kvm_arch_destroy_vm(struct kvm *kvm) | 1344 | void kvm_arch_destroy_vm(struct kvm *kvm) |
| 1341 | { | 1345 | { |
| 1342 | kvm_iommu_unmap_guest(kvm); | 1346 | kvm_iommu_unmap_guest(kvm); |
diff --git a/arch/ia64/kvm/process.c b/arch/ia64/kvm/process.c index 552d07724207..230eae482f32 100644 --- a/arch/ia64/kvm/process.c +++ b/arch/ia64/kvm/process.c | |||
| @@ -455,13 +455,18 @@ fpswa_ret_t vmm_fp_emulate(int fp_fault, void *bundle, unsigned long *ipsr, | |||
| 455 | if (!vmm_fpswa_interface) | 455 | if (!vmm_fpswa_interface) |
| 456 | return (fpswa_ret_t) {-1, 0, 0, 0}; | 456 | return (fpswa_ret_t) {-1, 0, 0, 0}; |
| 457 | 457 | ||
| 458 | /* | ||
| 459 | * Just let fpswa driver to use hardware fp registers. | ||
| 460 | * No fp register is valid in memory. | ||
| 461 | */ | ||
| 462 | memset(&fp_state, 0, sizeof(fp_state_t)); | 458 | memset(&fp_state, 0, sizeof(fp_state_t)); |
| 463 | 459 | ||
| 464 | /* | 460 | /* |
| 461 | * compute fp_state. only FP registers f6 - f11 are used by the | ||
| 462 | * vmm, so set those bits in the mask and set the low volatile | ||
| 463 | * pointer to point to these registers. | ||
| 464 | */ | ||
| 465 | fp_state.bitmask_low64 = 0xfc0; /* bit6..bit11 */ | ||
| 466 | |||
| 467 | fp_state.fp_state_low_volatile = (fp_state_low_volatile_t *) ®s->f6; | ||
| 468 | |||
| 469 | /* | ||
| 465 | * unsigned long (*EFI_FPSWA) ( | 470 | * unsigned long (*EFI_FPSWA) ( |
| 466 | * unsigned long trap_type, | 471 | * unsigned long trap_type, |
| 467 | * void *Bundle, | 472 | * void *Bundle, |
| @@ -545,10 +550,6 @@ void reflect_interruption(u64 ifa, u64 isr, u64 iim, | |||
| 545 | status = vmm_handle_fpu_swa(0, regs, isr); | 550 | status = vmm_handle_fpu_swa(0, regs, isr); |
| 546 | if (!status) | 551 | if (!status) |
| 547 | return ; | 552 | return ; |
| 548 | else if (-EAGAIN == status) { | ||
| 549 | vcpu_decrement_iip(vcpu); | ||
| 550 | return ; | ||
| 551 | } | ||
| 552 | break; | 553 | break; |
| 553 | } | 554 | } |
| 554 | 555 | ||
diff --git a/arch/ia64/mm/numa.c b/arch/ia64/mm/numa.c index b73bf1838e57..3efea7d0a351 100644 --- a/arch/ia64/mm/numa.c +++ b/arch/ia64/mm/numa.c | |||
| @@ -58,7 +58,7 @@ paddr_to_nid(unsigned long paddr) | |||
| 58 | * SPARSEMEM to allocate the SPARSEMEM sectionmap on the NUMA node where | 58 | * SPARSEMEM to allocate the SPARSEMEM sectionmap on the NUMA node where |
| 59 | * the section resides. | 59 | * the section resides. |
| 60 | */ | 60 | */ |
| 61 | int early_pfn_to_nid(unsigned long pfn) | 61 | int __meminit __early_pfn_to_nid(unsigned long pfn) |
| 62 | { | 62 | { |
| 63 | int i, section = pfn >> PFN_SECTION_SHIFT, ssec, esec; | 63 | int i, section = pfn >> PFN_SECTION_SHIFT, ssec, esec; |
| 64 | 64 | ||
| @@ -70,7 +70,7 @@ int early_pfn_to_nid(unsigned long pfn) | |||
| 70 | return node_memblk[i].nid; | 70 | return node_memblk[i].nid; |
| 71 | } | 71 | } |
| 72 | 72 | ||
| 73 | return 0; | 73 | return -1; |
| 74 | } | 74 | } |
| 75 | 75 | ||
| 76 | #ifdef CONFIG_MEMORY_HOTPLUG | 76 | #ifdef CONFIG_MEMORY_HOTPLUG |
diff --git a/arch/ia64/sn/kernel/bte.c b/arch/ia64/sn/kernel/bte.c index 9456d4034024..c6d6b62db66c 100644 --- a/arch/ia64/sn/kernel/bte.c +++ b/arch/ia64/sn/kernel/bte.c | |||
| @@ -97,9 +97,10 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification) | |||
| 97 | return BTE_SUCCESS; | 97 | return BTE_SUCCESS; |
| 98 | } | 98 | } |
| 99 | 99 | ||
| 100 | BUG_ON((len & L1_CACHE_MASK) || | 100 | BUG_ON(len & L1_CACHE_MASK); |
| 101 | (src & L1_CACHE_MASK) || (dest & L1_CACHE_MASK)); | 101 | BUG_ON(src & L1_CACHE_MASK); |
| 102 | BUG_ON(!(len < ((BTE_LEN_MASK + 1) << L1_CACHE_SHIFT))); | 102 | BUG_ON(dest & L1_CACHE_MASK); |
| 103 | BUG_ON(len > BTE_MAX_XFER); | ||
| 103 | 104 | ||
| 104 | /* | 105 | /* |
| 105 | * Start with interface corresponding to cpu number | 106 | * Start with interface corresponding to cpu number |
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c index e626e50a938a..060df4aa9916 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c | |||
| @@ -135,11 +135,10 @@ pcibr_dmatrans_direct64(struct pcidev_info * info, u64 paddr, | |||
| 135 | if (SN_DMA_ADDRTYPE(dma_flags) == SN_DMA_ADDR_PHYS) | 135 | if (SN_DMA_ADDRTYPE(dma_flags) == SN_DMA_ADDR_PHYS) |
| 136 | pci_addr = IS_PIC_SOFT(pcibus_info) ? | 136 | pci_addr = IS_PIC_SOFT(pcibus_info) ? |
| 137 | PHYS_TO_DMA(paddr) : | 137 | PHYS_TO_DMA(paddr) : |
| 138 | PHYS_TO_TIODMA(paddr) | dma_attributes; | 138 | PHYS_TO_TIODMA(paddr); |
| 139 | else | 139 | else |
| 140 | pci_addr = IS_PIC_SOFT(pcibus_info) ? | 140 | pci_addr = paddr; |
| 141 | paddr : | 141 | pci_addr |= dma_attributes; |
| 142 | paddr | dma_attributes; | ||
| 143 | 142 | ||
| 144 | /* Handle Bus mode */ | 143 | /* Handle Bus mode */ |
| 145 | if (IS_PCIX(pcibus_info)) | 144 | if (IS_PCIX(pcibus_info)) |
diff --git a/arch/ia64/xen/Kconfig b/arch/ia64/xen/Kconfig index f1683a20275b..515e0826803a 100644 --- a/arch/ia64/xen/Kconfig +++ b/arch/ia64/xen/Kconfig | |||
| @@ -8,8 +8,7 @@ config XEN | |||
| 8 | depends on PARAVIRT && MCKINLEY && IA64_PAGE_SIZE_16KB && EXPERIMENTAL | 8 | depends on PARAVIRT && MCKINLEY && IA64_PAGE_SIZE_16KB && EXPERIMENTAL |
| 9 | select XEN_XENCOMM | 9 | select XEN_XENCOMM |
| 10 | select NO_IDLE_HZ | 10 | select NO_IDLE_HZ |
| 11 | 11 | # followings are required to save/restore. | |
| 12 | # those are required to save/restore. | ||
| 13 | select ARCH_SUSPEND_POSSIBLE | 12 | select ARCH_SUSPEND_POSSIBLE |
| 14 | select SUSPEND | 13 | select SUSPEND |
| 15 | select PM_SLEEP | 14 | select PM_SLEEP |
diff --git a/arch/ia64/xen/xen_pv_ops.c b/arch/ia64/xen/xen_pv_ops.c index 04cd12350455..936cff3c96e0 100644 --- a/arch/ia64/xen/xen_pv_ops.c +++ b/arch/ia64/xen/xen_pv_ops.c | |||
| @@ -153,7 +153,7 @@ xen_post_smp_prepare_boot_cpu(void) | |||
| 153 | xen_setup_vcpu_info_placement(); | 153 | xen_setup_vcpu_info_placement(); |
| 154 | } | 154 | } |
| 155 | 155 | ||
| 156 | static const struct pv_init_ops xen_init_ops __initdata = { | 156 | static const struct pv_init_ops xen_init_ops __initconst = { |
| 157 | .banner = xen_banner, | 157 | .banner = xen_banner, |
| 158 | 158 | ||
| 159 | .reserve_memory = xen_reserve_memory, | 159 | .reserve_memory = xen_reserve_memory, |
| @@ -337,7 +337,7 @@ xen_iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val) | |||
| 337 | HYPERVISOR_physdev_op(PHYSDEVOP_apic_write, &apic_op); | 337 | HYPERVISOR_physdev_op(PHYSDEVOP_apic_write, &apic_op); |
| 338 | } | 338 | } |
| 339 | 339 | ||
| 340 | static const struct pv_iosapic_ops xen_iosapic_ops __initdata = { | 340 | static const struct pv_iosapic_ops xen_iosapic_ops __initconst = { |
| 341 | .pcat_compat_init = xen_pcat_compat_init, | 341 | .pcat_compat_init = xen_pcat_compat_init, |
| 342 | .__get_irq_chip = xen_iosapic_get_irq_chip, | 342 | .__get_irq_chip = xen_iosapic_get_irq_chip, |
| 343 | 343 | ||
diff --git a/arch/m68k/atari/ataints.c b/arch/m68k/atari/ataints.c index dba4afabb444..39478dd08e67 100644 --- a/arch/m68k/atari/ataints.c +++ b/arch/m68k/atari/ataints.c | |||
| @@ -187,8 +187,8 @@ __asm__ (__ALIGN_STR "\n" \ | |||
| 187 | " jbra ret_from_interrupt\n" \ | 187 | " jbra ret_from_interrupt\n" \ |
| 188 | : : "i" (&kstat_cpu(0).irqs[n+8]), "i" (&irq_handler[n+8]), \ | 188 | : : "i" (&kstat_cpu(0).irqs[n+8]), "i" (&irq_handler[n+8]), \ |
| 189 | "n" (PT_OFF_SR), "n" (n), \ | 189 | "n" (PT_OFF_SR), "n" (n), \ |
| 190 | "i" (n & 8 ? (n & 16 ? &tt_mfp.int_mk_a : &mfp.int_mk_a) \ | 190 | "i" (n & 8 ? (n & 16 ? &tt_mfp.int_mk_a : &st_mfp.int_mk_a) \ |
| 191 | : (n & 16 ? &tt_mfp.int_mk_b : &mfp.int_mk_b)), \ | 191 | : (n & 16 ? &tt_mfp.int_mk_b : &st_mfp.int_mk_b)), \ |
| 192 | "m" (preempt_count()), "di" (HARDIRQ_OFFSET) \ | 192 | "m" (preempt_count()), "di" (HARDIRQ_OFFSET) \ |
| 193 | ); \ | 193 | ); \ |
| 194 | for (;;); /* fake noreturn */ \ | 194 | for (;;); /* fake noreturn */ \ |
| @@ -366,14 +366,14 @@ void __init atari_init_IRQ(void) | |||
| 366 | /* Initialize the MFP(s) */ | 366 | /* Initialize the MFP(s) */ |
| 367 | 367 | ||
| 368 | #ifdef ATARI_USE_SOFTWARE_EOI | 368 | #ifdef ATARI_USE_SOFTWARE_EOI |
| 369 | mfp.vec_adr = 0x48; /* Software EOI-Mode */ | 369 | st_mfp.vec_adr = 0x48; /* Software EOI-Mode */ |
| 370 | #else | 370 | #else |
| 371 | mfp.vec_adr = 0x40; /* Automatic EOI-Mode */ | 371 | st_mfp.vec_adr = 0x40; /* Automatic EOI-Mode */ |
| 372 | #endif | 372 | #endif |
| 373 | mfp.int_en_a = 0x00; /* turn off MFP-Ints */ | 373 | st_mfp.int_en_a = 0x00; /* turn off MFP-Ints */ |
| 374 | mfp.int_en_b = 0x00; | 374 | st_mfp.int_en_b = 0x00; |
| 375 | mfp.int_mk_a = 0xff; /* no Masking */ | 375 | st_mfp.int_mk_a = 0xff; /* no Masking */ |
| 376 | mfp.int_mk_b = 0xff; | 376 | st_mfp.int_mk_b = 0xff; |
| 377 | 377 | ||
| 378 | if (ATARIHW_PRESENT(TT_MFP)) { | 378 | if (ATARIHW_PRESENT(TT_MFP)) { |
| 379 | #ifdef ATARI_USE_SOFTWARE_EOI | 379 | #ifdef ATARI_USE_SOFTWARE_EOI |
diff --git a/arch/m68k/atari/atakeyb.c b/arch/m68k/atari/atakeyb.c index a5f33c059979..4add96d13b19 100644 --- a/arch/m68k/atari/atakeyb.c +++ b/arch/m68k/atari/atakeyb.c | |||
| @@ -609,10 +609,10 @@ int atari_keyb_init(void) | |||
| 609 | ACIA_RHTID : 0); | 609 | ACIA_RHTID : 0); |
| 610 | 610 | ||
| 611 | /* make sure the interrupt line is up */ | 611 | /* make sure the interrupt line is up */ |
| 612 | } while ((mfp.par_dt_reg & 0x10) == 0); | 612 | } while ((st_mfp.par_dt_reg & 0x10) == 0); |
| 613 | 613 | ||
| 614 | /* enable ACIA Interrupts */ | 614 | /* enable ACIA Interrupts */ |
| 615 | mfp.active_edge &= ~0x10; | 615 | st_mfp.active_edge &= ~0x10; |
| 616 | atari_turnon_irq(IRQ_MFP_ACIA); | 616 | atari_turnon_irq(IRQ_MFP_ACIA); |
| 617 | 617 | ||
| 618 | ikbd_self_test = 1; | 618 | ikbd_self_test = 1; |
diff --git a/arch/m68k/atari/config.c b/arch/m68k/atari/config.c index 49c28cdbea5c..ae2d96e5d618 100644 --- a/arch/m68k/atari/config.c +++ b/arch/m68k/atari/config.c | |||
| @@ -258,7 +258,7 @@ void __init config_atari(void) | |||
| 258 | printk("STND_SHIFTER "); | 258 | printk("STND_SHIFTER "); |
| 259 | } | 259 | } |
| 260 | } | 260 | } |
| 261 | if (hwreg_present(&mfp.par_dt_reg)) { | 261 | if (hwreg_present(&st_mfp.par_dt_reg)) { |
| 262 | ATARIHW_SET(ST_MFP); | 262 | ATARIHW_SET(ST_MFP); |
| 263 | printk("ST_MFP "); | 263 | printk("ST_MFP "); |
| 264 | } | 264 | } |
diff --git a/arch/m68k/atari/debug.c b/arch/m68k/atari/debug.c index 702b15ccfab7..28efdc33c1ae 100644 --- a/arch/m68k/atari/debug.c +++ b/arch/m68k/atari/debug.c | |||
| @@ -34,9 +34,9 @@ static struct console atari_console_driver = { | |||
| 34 | 34 | ||
| 35 | static inline void ata_mfp_out(char c) | 35 | static inline void ata_mfp_out(char c) |
| 36 | { | 36 | { |
| 37 | while (!(mfp.trn_stat & 0x80)) /* wait for tx buf empty */ | 37 | while (!(st_mfp.trn_stat & 0x80)) /* wait for tx buf empty */ |
| 38 | barrier(); | 38 | barrier(); |
| 39 | mfp.usart_dta = c; | 39 | st_mfp.usart_dta = c; |
| 40 | } | 40 | } |
| 41 | 41 | ||
| 42 | static void atari_mfp_console_write(struct console *co, const char *str, | 42 | static void atari_mfp_console_write(struct console *co, const char *str, |
| @@ -91,7 +91,7 @@ static int ata_par_out(char c) | |||
| 91 | /* This a some-seconds timeout in case no printer is connected */ | 91 | /* This a some-seconds timeout in case no printer is connected */ |
| 92 | unsigned long i = loops_per_jiffy > 1 ? loops_per_jiffy : 10000000/HZ; | 92 | unsigned long i = loops_per_jiffy > 1 ? loops_per_jiffy : 10000000/HZ; |
| 93 | 93 | ||
| 94 | while ((mfp.par_dt_reg & 1) && --i) /* wait for BUSY == L */ | 94 | while ((st_mfp.par_dt_reg & 1) && --i) /* wait for BUSY == L */ |
| 95 | ; | 95 | ; |
| 96 | if (!i) | 96 | if (!i) |
| 97 | return 0; | 97 | return 0; |
| @@ -131,9 +131,9 @@ static void atari_par_console_write(struct console *co, const char *str, | |||
| 131 | #if 0 | 131 | #if 0 |
| 132 | int atari_mfp_console_wait_key(struct console *co) | 132 | int atari_mfp_console_wait_key(struct console *co) |
| 133 | { | 133 | { |
| 134 | while (!(mfp.rcv_stat & 0x80)) /* wait for rx buf filled */ | 134 | while (!(st_mfp.rcv_stat & 0x80)) /* wait for rx buf filled */ |
| 135 | barrier(); | 135 | barrier(); |
| 136 | return mfp.usart_dta; | 136 | return st_mfp.usart_dta; |
| 137 | } | 137 | } |
| 138 | 138 | ||
| 139 | int atari_scc_console_wait_key(struct console *co) | 139 | int atari_scc_console_wait_key(struct console *co) |
| @@ -175,12 +175,12 @@ static void __init atari_init_mfp_port(int cflag) | |||
| 175 | baud = B9600; /* use default 9600bps for non-implemented rates */ | 175 | baud = B9600; /* use default 9600bps for non-implemented rates */ |
| 176 | baud -= B1200; /* baud_table[] starts at 1200bps */ | 176 | baud -= B1200; /* baud_table[] starts at 1200bps */ |
| 177 | 177 | ||
| 178 | mfp.trn_stat &= ~0x01; /* disable TX */ | 178 | st_mfp.trn_stat &= ~0x01; /* disable TX */ |
| 179 | mfp.usart_ctr = parity | csize | 0x88; /* 1:16 clk mode, 1 stop bit */ | 179 | st_mfp.usart_ctr = parity | csize | 0x88; /* 1:16 clk mode, 1 stop bit */ |
| 180 | mfp.tim_ct_cd &= 0x70; /* stop timer D */ | 180 | st_mfp.tim_ct_cd &= 0x70; /* stop timer D */ |
| 181 | mfp.tim_dt_d = baud_table[baud]; | 181 | st_mfp.tim_dt_d = baud_table[baud]; |
| 182 | mfp.tim_ct_cd |= 0x01; /* start timer D, 1:4 */ | 182 | st_mfp.tim_ct_cd |= 0x01; /* start timer D, 1:4 */ |
| 183 | mfp.trn_stat |= 0x01; /* enable TX */ | 183 | st_mfp.trn_stat |= 0x01; /* enable TX */ |
| 184 | } | 184 | } |
| 185 | 185 | ||
| 186 | #define SCC_WRITE(reg, val) \ | 186 | #define SCC_WRITE(reg, val) \ |
diff --git a/arch/m68k/atari/time.c b/arch/m68k/atari/time.c index d076ff8d1b39..a0531f34c617 100644 --- a/arch/m68k/atari/time.c +++ b/arch/m68k/atari/time.c | |||
| @@ -27,9 +27,9 @@ void __init | |||
| 27 | atari_sched_init(irq_handler_t timer_routine) | 27 | atari_sched_init(irq_handler_t timer_routine) |
| 28 | { | 28 | { |
| 29 | /* set Timer C data Register */ | 29 | /* set Timer C data Register */ |
| 30 | mfp.tim_dt_c = INT_TICKS; | 30 | st_mfp.tim_dt_c = INT_TICKS; |
| 31 | /* start timer C, div = 1:100 */ | 31 | /* start timer C, div = 1:100 */ |
| 32 | mfp.tim_ct_cd = (mfp.tim_ct_cd & 15) | 0x60; | 32 | st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 15) | 0x60; |
| 33 | /* install interrupt service routine for MFP Timer C */ | 33 | /* install interrupt service routine for MFP Timer C */ |
| 34 | if (request_irq(IRQ_MFP_TIMC, timer_routine, IRQ_TYPE_SLOW, | 34 | if (request_irq(IRQ_MFP_TIMC, timer_routine, IRQ_TYPE_SLOW, |
| 35 | "timer", timer_routine)) | 35 | "timer", timer_routine)) |
| @@ -46,11 +46,11 @@ unsigned long atari_gettimeoffset (void) | |||
| 46 | unsigned long ticks, offset = 0; | 46 | unsigned long ticks, offset = 0; |
| 47 | 47 | ||
| 48 | /* read MFP timer C current value */ | 48 | /* read MFP timer C current value */ |
| 49 | ticks = mfp.tim_dt_c; | 49 | ticks = st_mfp.tim_dt_c; |
| 50 | /* The probability of underflow is less than 2% */ | 50 | /* The probability of underflow is less than 2% */ |
| 51 | if (ticks > INT_TICKS - INT_TICKS / 50) | 51 | if (ticks > INT_TICKS - INT_TICKS / 50) |
| 52 | /* Check for pending timer interrupt */ | 52 | /* Check for pending timer interrupt */ |
| 53 | if (mfp.int_pn_b & (1 << 5)) | 53 | if (st_mfp.int_pn_b & (1 << 5)) |
| 54 | offset = TICK_SIZE; | 54 | offset = TICK_SIZE; |
| 55 | 55 | ||
| 56 | ticks = INT_TICKS - ticks; | 56 | ticks = INT_TICKS - ticks; |
diff --git a/arch/m68k/include/asm/atarihw.h b/arch/m68k/include/asm/atarihw.h index 1412b4ab202f..a714e1aa072a 100644 --- a/arch/m68k/include/asm/atarihw.h +++ b/arch/m68k/include/asm/atarihw.h | |||
| @@ -113,7 +113,7 @@ extern struct atari_hw_present atari_hw_present; | |||
| 113 | * of nops on various machines. Somebody claimed that the tstb takes 600 ns. | 113 | * of nops on various machines. Somebody claimed that the tstb takes 600 ns. |
| 114 | */ | 114 | */ |
| 115 | #define MFPDELAY() \ | 115 | #define MFPDELAY() \ |
| 116 | __asm__ __volatile__ ( "tstb %0" : : "m" (mfp.par_dt_reg) : "cc" ); | 116 | __asm__ __volatile__ ( "tstb %0" : : "m" (st_mfp.par_dt_reg) : "cc" ); |
| 117 | 117 | ||
| 118 | /* Do cache push/invalidate for DMA read/write. This function obeys the | 118 | /* Do cache push/invalidate for DMA read/write. This function obeys the |
| 119 | * snooping on some machines (Medusa) and processors: The Medusa itself can | 119 | * snooping on some machines (Medusa) and processors: The Medusa itself can |
| @@ -565,7 +565,7 @@ struct MFP | |||
| 565 | u_char char_dummy23; | 565 | u_char char_dummy23; |
| 566 | u_char usart_dta; | 566 | u_char usart_dta; |
| 567 | }; | 567 | }; |
| 568 | # define mfp ((*(volatile struct MFP*)MFP_BAS)) | 568 | # define st_mfp ((*(volatile struct MFP*)MFP_BAS)) |
| 569 | 569 | ||
| 570 | /* TT's second MFP */ | 570 | /* TT's second MFP */ |
| 571 | 571 | ||
diff --git a/arch/m68k/include/asm/atariints.h b/arch/m68k/include/asm/atariints.h index 5748e99f4e26..f597892e43a0 100644 --- a/arch/m68k/include/asm/atariints.h +++ b/arch/m68k/include/asm/atariints.h | |||
| @@ -113,7 +113,7 @@ static inline int get_mfp_bit( unsigned irq, int type ) | |||
| 113 | { unsigned char mask, *reg; | 113 | { unsigned char mask, *reg; |
| 114 | 114 | ||
| 115 | mask = 1 << (irq & 7); | 115 | mask = 1 << (irq & 7); |
| 116 | reg = (unsigned char *)&mfp.int_en_a + type*4 + | 116 | reg = (unsigned char *)&st_mfp.int_en_a + type*4 + |
| 117 | ((irq & 8) >> 2) + (((irq-8) & 16) << 3); | 117 | ((irq & 8) >> 2) + (((irq-8) & 16) << 3); |
| 118 | return( *reg & mask ); | 118 | return( *reg & mask ); |
| 119 | } | 119 | } |
| @@ -123,7 +123,7 @@ static inline void set_mfp_bit( unsigned irq, int type ) | |||
| 123 | { unsigned char mask, *reg; | 123 | { unsigned char mask, *reg; |
| 124 | 124 | ||
| 125 | mask = 1 << (irq & 7); | 125 | mask = 1 << (irq & 7); |
| 126 | reg = (unsigned char *)&mfp.int_en_a + type*4 + | 126 | reg = (unsigned char *)&st_mfp.int_en_a + type*4 + |
| 127 | ((irq & 8) >> 2) + (((irq-8) & 16) << 3); | 127 | ((irq & 8) >> 2) + (((irq-8) & 16) << 3); |
| 128 | __asm__ __volatile__ ( "orb %0,%1" | 128 | __asm__ __volatile__ ( "orb %0,%1" |
| 129 | : : "di" (mask), "m" (*reg) : "memory" ); | 129 | : : "di" (mask), "m" (*reg) : "memory" ); |
| @@ -134,7 +134,7 @@ static inline void clear_mfp_bit( unsigned irq, int type ) | |||
| 134 | { unsigned char mask, *reg; | 134 | { unsigned char mask, *reg; |
| 135 | 135 | ||
| 136 | mask = ~(1 << (irq & 7)); | 136 | mask = ~(1 << (irq & 7)); |
| 137 | reg = (unsigned char *)&mfp.int_en_a + type*4 + | 137 | reg = (unsigned char *)&st_mfp.int_en_a + type*4 + |
| 138 | ((irq & 8) >> 2) + (((irq-8) & 16) << 3); | 138 | ((irq & 8) >> 2) + (((irq-8) & 16) << 3); |
| 139 | if (type == MFP_PENDING || type == MFP_SERVICE) | 139 | if (type == MFP_PENDING || type == MFP_SERVICE) |
| 140 | __asm__ __volatile__ ( "moveb %0,%1" | 140 | __asm__ __volatile__ ( "moveb %0,%1" |
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c index d01a5d2b7557..db902540bf2c 100644 --- a/arch/m68knommu/platform/5206e/config.c +++ b/arch/m68knommu/platform/5206e/config.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #include <asm/coldfire.h> | 17 | #include <asm/coldfire.h> |
| 18 | #include <asm/mcfsim.h> | 18 | #include <asm/mcfsim.h> |
| 19 | #include <asm/mcfdma.h> | 19 | #include <asm/mcfdma.h> |
| 20 | #include <asm/mcfuart.h> | ||
| 20 | 21 | ||
| 21 | /***************************************************************************/ | 22 | /***************************************************************************/ |
| 22 | 23 | ||
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c index dfdb5c2ed8e6..44baeb225dc7 100644 --- a/arch/m68knommu/platform/528x/config.c +++ b/arch/m68knommu/platform/528x/config.c | |||
| @@ -24,7 +24,6 @@ | |||
| 24 | #include <asm/coldfire.h> | 24 | #include <asm/coldfire.h> |
| 25 | #include <asm/mcfsim.h> | 25 | #include <asm/mcfsim.h> |
| 26 | #include <asm/mcfuart.h> | 26 | #include <asm/mcfuart.h> |
| 27 | #include <asm/mcfqspi.h> | ||
| 28 | 27 | ||
| 29 | #ifdef CONFIG_MTD_PARTITIONS | 28 | #ifdef CONFIG_MTD_PARTITIONS |
| 30 | #include <linux/mtd/partitions.h> | 29 | #include <linux/mtd/partitions.h> |
| @@ -33,233 +32,6 @@ | |||
| 33 | /***************************************************************************/ | 32 | /***************************************************************************/ |
| 34 | 33 | ||
| 35 | void coldfire_reset(void); | 34 | void coldfire_reset(void); |
| 36 | static void coldfire_qspi_cs_control(u8 cs, u8 command); | ||
| 37 | |||
| 38 | /***************************************************************************/ | ||
| 39 | |||
| 40 | #if defined(CONFIG_SPI) | ||
| 41 | |||
| 42 | #if defined(CONFIG_WILDFIRE) | ||
| 43 | #define SPI_NUM_CHIPSELECTS 0x02 | ||
| 44 | #define SPI_PAR_VAL 0x07 /* Enable DIN, DOUT, CLK */ | ||
| 45 | #define SPI_CS_MASK 0x18 | ||
| 46 | |||
| 47 | #define FLASH_BLOCKSIZE (1024*64) | ||
| 48 | #define FLASH_NUMBLOCKS 16 | ||
| 49 | #define FLASH_TYPE "m25p80" | ||
| 50 | |||
| 51 | #define M25P80_CS 0 | ||
| 52 | #define MMC_CS 1 | ||
| 53 | |||
| 54 | #ifdef CONFIG_MTD_PARTITIONS | ||
| 55 | static struct mtd_partition stm25p_partitions[] = { | ||
| 56 | /* sflash */ | ||
| 57 | [0] = { | ||
| 58 | .name = "stm25p80", | ||
| 59 | .offset = 0x00000000, | ||
| 60 | .size = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS, | ||
| 61 | .mask_flags = 0 | ||
| 62 | } | ||
| 63 | }; | ||
| 64 | |||
| 65 | #endif | ||
| 66 | |||
| 67 | #elif defined(CONFIG_WILDFIREMOD) | ||
| 68 | |||
| 69 | #define SPI_NUM_CHIPSELECTS 0x08 | ||
| 70 | #define SPI_PAR_VAL 0x07 /* Enable DIN, DOUT, CLK */ | ||
| 71 | #define SPI_CS_MASK 0x78 | ||
| 72 | |||
| 73 | #define FLASH_BLOCKSIZE (1024*64) | ||
| 74 | #define FLASH_NUMBLOCKS 64 | ||
| 75 | #define FLASH_TYPE "m25p32" | ||
| 76 | /* Reserve 1M for the kernel parition */ | ||
| 77 | #define FLASH_KERNEL_SIZE (1024 * 1024) | ||
| 78 | |||
| 79 | #define M25P80_CS 5 | ||
| 80 | #define MMC_CS 6 | ||
| 81 | |||
| 82 | #ifdef CONFIG_MTD_PARTITIONS | ||
| 83 | static struct mtd_partition stm25p_partitions[] = { | ||
| 84 | /* sflash */ | ||
| 85 | [0] = { | ||
| 86 | .name = "kernel", | ||
| 87 | .offset = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS - FLASH_KERNEL_SIZE, | ||
| 88 | .size = FLASH_KERNEL_SIZE, | ||
| 89 | .mask_flags = 0 | ||
| 90 | }, | ||
| 91 | [1] = { | ||
| 92 | .name = "image", | ||
| 93 | .offset = 0x00000000, | ||
| 94 | .size = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS - FLASH_KERNEL_SIZE, | ||
| 95 | .mask_flags = 0 | ||
| 96 | }, | ||
| 97 | [2] = { | ||
| 98 | .name = "all", | ||
| 99 | .offset = 0x00000000, | ||
| 100 | .size = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS, | ||
| 101 | .mask_flags = 0 | ||
| 102 | } | ||
| 103 | }; | ||
| 104 | #endif | ||
| 105 | |||
| 106 | #else | ||
| 107 | #define SPI_NUM_CHIPSELECTS 0x04 | ||
| 108 | #define SPI_PAR_VAL 0x7F /* Enable DIN, DOUT, CLK, CS0 - CS4 */ | ||
| 109 | #endif | ||
| 110 | |||
| 111 | #ifdef MMC_CS | ||
| 112 | static struct coldfire_spi_chip flash_chip_info = { | ||
| 113 | .mode = SPI_MODE_0, | ||
| 114 | .bits_per_word = 16, | ||
| 115 | .del_cs_to_clk = 17, | ||
| 116 | .del_after_trans = 1, | ||
| 117 | .void_write_data = 0 | ||
| 118 | }; | ||
| 119 | |||
| 120 | static struct coldfire_spi_chip mmc_chip_info = { | ||
| 121 | .mode = SPI_MODE_0, | ||
| 122 | .bits_per_word = 16, | ||
| 123 | .del_cs_to_clk = 17, | ||
| 124 | .del_after_trans = 1, | ||
| 125 | .void_write_data = 0xFFFF | ||
| 126 | }; | ||
| 127 | #endif | ||
| 128 | |||
| 129 | #ifdef M25P80_CS | ||
| 130 | static struct flash_platform_data stm25p80_platform_data = { | ||
| 131 | .name = "ST M25P80 SPI Flash chip", | ||
| 132 | #ifdef CONFIG_MTD_PARTITIONS | ||
| 133 | .parts = stm25p_partitions, | ||
| 134 | .nr_parts = sizeof(stm25p_partitions) / sizeof(*stm25p_partitions), | ||
| 135 | #endif | ||
| 136 | .type = FLASH_TYPE | ||
| 137 | }; | ||
| 138 | #endif | ||
| 139 | |||
| 140 | static struct spi_board_info spi_board_info[] __initdata = { | ||
| 141 | #ifdef M25P80_CS | ||
| 142 | { | ||
| 143 | .modalias = "m25p80", | ||
| 144 | .max_speed_hz = 16000000, | ||
| 145 | .bus_num = 1, | ||
| 146 | .chip_select = M25P80_CS, | ||
| 147 | .platform_data = &stm25p80_platform_data, | ||
| 148 | .controller_data = &flash_chip_info | ||
| 149 | }, | ||
| 150 | #endif | ||
| 151 | #ifdef MMC_CS | ||
| 152 | { | ||
| 153 | .modalias = "mmc_spi", | ||
| 154 | .max_speed_hz = 16000000, | ||
| 155 | .bus_num = 1, | ||
| 156 | .chip_select = MMC_CS, | ||
| 157 | .controller_data = &mmc_chip_info | ||
| 158 | } | ||
| 159 | #endif | ||
| 160 | }; | ||
| 161 | |||
| 162 | static struct coldfire_spi_master coldfire_master_info = { | ||
| 163 | .bus_num = 1, | ||
| 164 | .num_chipselect = SPI_NUM_CHIPSELECTS, | ||
| 165 | .irq_source = MCF5282_QSPI_IRQ_SOURCE, | ||
| 166 | .irq_vector = MCF5282_QSPI_IRQ_VECTOR, | ||
| 167 | .irq_mask = ((0x01 << MCF5282_QSPI_IRQ_SOURCE) | 0x01), | ||
| 168 | .irq_lp = 0x2B, /* Level 5 and Priority 3 */ | ||
| 169 | .par_val = SPI_PAR_VAL, | ||
| 170 | .cs_control = coldfire_qspi_cs_control, | ||
| 171 | }; | ||
| 172 | |||
| 173 | static struct resource coldfire_spi_resources[] = { | ||
| 174 | [0] = { | ||
| 175 | .name = "qspi-par", | ||
| 176 | .start = MCF5282_QSPI_PAR, | ||
| 177 | .end = MCF5282_QSPI_PAR, | ||
| 178 | .flags = IORESOURCE_MEM | ||
| 179 | }, | ||
| 180 | |||
| 181 | [1] = { | ||
| 182 | .name = "qspi-module", | ||
| 183 | .start = MCF5282_QSPI_QMR, | ||
| 184 | .end = MCF5282_QSPI_QMR + 0x18, | ||
| 185 | .flags = IORESOURCE_MEM | ||
| 186 | }, | ||
| 187 | |||
| 188 | [2] = { | ||
| 189 | .name = "qspi-int-level", | ||
| 190 | .start = MCF5282_INTC0 + MCFINTC_ICR0 + MCF5282_QSPI_IRQ_SOURCE, | ||
| 191 | .end = MCF5282_INTC0 + MCFINTC_ICR0 + MCF5282_QSPI_IRQ_SOURCE, | ||
| 192 | .flags = IORESOURCE_MEM | ||
| 193 | }, | ||
| 194 | |||
| 195 | [3] = { | ||
| 196 | .name = "qspi-int-mask", | ||
| 197 | .start = MCF5282_INTC0 + MCFINTC_IMRL, | ||
| 198 | .end = MCF5282_INTC0 + MCFINTC_IMRL, | ||
| 199 | .flags = IORESOURCE_MEM | ||
| 200 | } | ||
| 201 | }; | ||
| 202 | |||
| 203 | static struct platform_device coldfire_spi = { | ||
| 204 | .name = "spi_coldfire", | ||
| 205 | .id = -1, | ||
| 206 | .resource = coldfire_spi_resources, | ||
| 207 | .num_resources = ARRAY_SIZE(coldfire_spi_resources), | ||
| 208 | .dev = { | ||
| 209 | .platform_data = &coldfire_master_info, | ||
| 210 | } | ||
| 211 | }; | ||
| 212 | |||
| 213 | static void coldfire_qspi_cs_control(u8 cs, u8 command) | ||
| 214 | { | ||
| 215 | u8 cs_bit = ((0x01 << cs) << 3) & SPI_CS_MASK; | ||
| 216 | |||
| 217 | #if defined(CONFIG_WILDFIRE) | ||
| 218 | u8 cs_mask = ~(((0x01 << cs) << 3) & SPI_CS_MASK); | ||
| 219 | #endif | ||
| 220 | #if defined(CONFIG_WILDFIREMOD) | ||
| 221 | u8 cs_mask = (cs << 3) & SPI_CS_MASK; | ||
| 222 | #endif | ||
| 223 | |||
| 224 | /* | ||
| 225 | * Don't do anything if the chip select is not | ||
| 226 | * one of the port qs pins. | ||
| 227 | */ | ||
| 228 | if (command & QSPI_CS_INIT) { | ||
| 229 | #if defined(CONFIG_WILDFIRE) | ||
| 230 | MCF5282_GPIO_DDRQS |= cs_bit; | ||
| 231 | MCF5282_GPIO_PQSPAR &= ~cs_bit; | ||
| 232 | #endif | ||
| 233 | |||
| 234 | #if defined(CONFIG_WILDFIREMOD) | ||
| 235 | MCF5282_GPIO_DDRQS |= SPI_CS_MASK; | ||
| 236 | MCF5282_GPIO_PQSPAR &= ~SPI_CS_MASK; | ||
| 237 | #endif | ||
| 238 | } | ||
| 239 | |||
| 240 | if (command & QSPI_CS_ASSERT) { | ||
| 241 | MCF5282_GPIO_PORTQS &= ~SPI_CS_MASK; | ||
| 242 | MCF5282_GPIO_PORTQS |= cs_mask; | ||
| 243 | } else if (command & QSPI_CS_DROP) { | ||
| 244 | MCF5282_GPIO_PORTQS |= SPI_CS_MASK; | ||
| 245 | } | ||
| 246 | } | ||
| 247 | |||
| 248 | static int __init spi_dev_init(void) | ||
| 249 | { | ||
| 250 | int retval; | ||
| 251 | |||
| 252 | retval = platform_device_register(&coldfire_spi); | ||
| 253 | if (retval < 0) | ||
| 254 | return retval; | ||
| 255 | |||
| 256 | if (ARRAY_SIZE(spi_board_info)) | ||
| 257 | retval = spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); | ||
| 258 | |||
| 259 | return retval; | ||
| 260 | } | ||
| 261 | |||
| 262 | #endif /* CONFIG_SPI */ | ||
| 263 | 35 | ||
| 264 | /***************************************************************************/ | 36 | /***************************************************************************/ |
| 265 | 37 | ||
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 600eef3f3ac7..e61465a18c7e 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
| @@ -603,7 +603,7 @@ config CAVIUM_OCTEON_SIMULATOR | |||
| 603 | select SYS_SUPPORTS_64BIT_KERNEL | 603 | select SYS_SUPPORTS_64BIT_KERNEL |
| 604 | select SYS_SUPPORTS_BIG_ENDIAN | 604 | select SYS_SUPPORTS_BIG_ENDIAN |
| 605 | select SYS_SUPPORTS_HIGHMEM | 605 | select SYS_SUPPORTS_HIGHMEM |
| 606 | select CPU_CAVIUM_OCTEON | 606 | select SYS_HAS_CPU_CAVIUM_OCTEON |
| 607 | help | 607 | help |
| 608 | The Octeon simulator is software performance model of the Cavium | 608 | The Octeon simulator is software performance model of the Cavium |
| 609 | Octeon Processor. It supports simulating Octeon processors on x86 | 609 | Octeon Processor. It supports simulating Octeon processors on x86 |
| @@ -618,7 +618,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD | |||
| 618 | select SYS_SUPPORTS_BIG_ENDIAN | 618 | select SYS_SUPPORTS_BIG_ENDIAN |
| 619 | select SYS_SUPPORTS_HIGHMEM | 619 | select SYS_SUPPORTS_HIGHMEM |
| 620 | select SYS_HAS_EARLY_PRINTK | 620 | select SYS_HAS_EARLY_PRINTK |
| 621 | select CPU_CAVIUM_OCTEON | 621 | select SYS_HAS_CPU_CAVIUM_OCTEON |
| 622 | select SWAP_IO_SPACE | 622 | select SWAP_IO_SPACE |
| 623 | help | 623 | help |
| 624 | This option supports all of the Octeon reference boards from Cavium | 624 | This option supports all of the Octeon reference boards from Cavium |
| @@ -1234,6 +1234,7 @@ config CPU_SB1 | |||
| 1234 | 1234 | ||
| 1235 | config CPU_CAVIUM_OCTEON | 1235 | config CPU_CAVIUM_OCTEON |
| 1236 | bool "Cavium Octeon processor" | 1236 | bool "Cavium Octeon processor" |
| 1237 | depends on SYS_HAS_CPU_CAVIUM_OCTEON | ||
| 1237 | select IRQ_CPU | 1238 | select IRQ_CPU |
| 1238 | select IRQ_CPU_OCTEON | 1239 | select IRQ_CPU_OCTEON |
| 1239 | select CPU_HAS_PREFETCH | 1240 | select CPU_HAS_PREFETCH |
| @@ -1314,6 +1315,9 @@ config SYS_HAS_CPU_RM9000 | |||
| 1314 | config SYS_HAS_CPU_SB1 | 1315 | config SYS_HAS_CPU_SB1 |
| 1315 | bool | 1316 | bool |
| 1316 | 1317 | ||
| 1318 | config SYS_HAS_CPU_CAVIUM_OCTEON | ||
| 1319 | bool | ||
| 1320 | |||
| 1317 | # | 1321 | # |
| 1318 | # CPU may reorder R->R, R->W, W->R, W->W | 1322 | # CPU may reorder R->R, R->W, W->R, W->W |
| 1319 | # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC | 1323 | # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC |
| @@ -1387,6 +1391,7 @@ config 32BIT | |||
| 1387 | config 64BIT | 1391 | config 64BIT |
| 1388 | bool "64-bit kernel" | 1392 | bool "64-bit kernel" |
| 1389 | depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL | 1393 | depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL |
| 1394 | select HAVE_SYSCALL_WRAPPERS | ||
| 1390 | help | 1395 | help |
| 1391 | Select this option if you want to build a 64-bit kernel. | 1396 | Select this option if you want to build a 64-bit kernel. |
| 1392 | 1397 | ||
diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c index 6fd441d16af5..f58d4ffb8945 100644 --- a/arch/mips/alchemy/common/time.c +++ b/arch/mips/alchemy/common/time.c | |||
| @@ -118,7 +118,7 @@ void __init plat_time_init(void) | |||
| 118 | * setup counter 1 (RTC) to tick at full speed | 118 | * setup counter 1 (RTC) to tick at full speed |
| 119 | */ | 119 | */ |
| 120 | t = 0xffffff; | 120 | t = 0xffffff; |
| 121 | while ((au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S) && t--) | 121 | while ((au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S) && --t) |
| 122 | asm volatile ("nop"); | 122 | asm volatile ("nop"); |
| 123 | if (!t) | 123 | if (!t) |
| 124 | goto cntr_err; | 124 | goto cntr_err; |
| @@ -127,7 +127,7 @@ void __init plat_time_init(void) | |||
| 127 | au_sync(); | 127 | au_sync(); |
| 128 | 128 | ||
| 129 | t = 0xffffff; | 129 | t = 0xffffff; |
| 130 | while ((au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S) && t--) | 130 | while ((au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S) && --t) |
| 131 | asm volatile ("nop"); | 131 | asm volatile ("nop"); |
| 132 | if (!t) | 132 | if (!t) |
| 133 | goto cntr_err; | 133 | goto cntr_err; |
| @@ -135,7 +135,7 @@ void __init plat_time_init(void) | |||
| 135 | au_sync(); | 135 | au_sync(); |
| 136 | 136 | ||
| 137 | t = 0xffffff; | 137 | t = 0xffffff; |
| 138 | while ((au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S) && t--) | 138 | while ((au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S) && --t) |
| 139 | asm volatile ("nop"); | 139 | asm volatile ("nop"); |
| 140 | if (!t) | 140 | if (!t) |
| 141 | goto cntr_err; | 141 | goto cntr_err; |
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h index ac5d541368e9..6c5b40905dd6 100644 --- a/arch/mips/include/asm/compat.h +++ b/arch/mips/include/asm/compat.h | |||
| @@ -3,6 +3,8 @@ | |||
| 3 | /* | 3 | /* |
| 4 | * Architecture specific compatibility types | 4 | * Architecture specific compatibility types |
| 5 | */ | 5 | */ |
| 6 | #include <linux/seccomp.h> | ||
| 7 | #include <linux/thread_info.h> | ||
| 6 | #include <linux/types.h> | 8 | #include <linux/types.h> |
| 7 | #include <asm/page.h> | 9 | #include <asm/page.h> |
| 8 | #include <asm/ptrace.h> | 10 | #include <asm/ptrace.h> |
| @@ -218,4 +220,9 @@ struct compat_shmid64_ds { | |||
| 218 | compat_ulong_t __unused2; | 220 | compat_ulong_t __unused2; |
| 219 | }; | 221 | }; |
| 220 | 222 | ||
| 223 | static inline int is_compat_task(void) | ||
| 224 | { | ||
| 225 | return test_thread_flag(TIF_32BIT); | ||
| 226 | } | ||
| 227 | |||
| 221 | #endif /* _ASM_COMPAT_H */ | 228 | #endif /* _ASM_COMPAT_H */ |
diff --git a/arch/mips/include/asm/seccomp.h b/arch/mips/include/asm/seccomp.h index 36ed44070256..a6772e9507f5 100644 --- a/arch/mips/include/asm/seccomp.h +++ b/arch/mips/include/asm/seccomp.h | |||
| @@ -1,6 +1,5 @@ | |||
| 1 | #ifndef __ASM_SECCOMP_H | 1 | #ifndef __ASM_SECCOMP_H |
| 2 | 2 | ||
| 3 | #include <linux/thread_info.h> | ||
| 4 | #include <linux/unistd.h> | 3 | #include <linux/unistd.h> |
| 5 | 4 | ||
| 6 | #define __NR_seccomp_read __NR_read | 5 | #define __NR_seccomp_read __NR_read |
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index a0ff2b66e22b..4b4007b3083a 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c | |||
| @@ -111,7 +111,6 @@ int show_interrupts(struct seq_file *p, void *v) | |||
| 111 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | 111 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
| 112 | #endif | 112 | #endif |
| 113 | seq_printf(p, " %14s", irq_desc[i].chip->name); | 113 | seq_printf(p, " %14s", irq_desc[i].chip->name); |
| 114 | seq_printf(p, "-%-8s", irq_desc[i].name); | ||
| 115 | seq_printf(p, " %s", action->name); | 114 | seq_printf(p, " %s", action->name); |
| 116 | 115 | ||
| 117 | for (action=action->next; action; action = action->next) | 116 | for (action=action->next; action; action = action->next) |
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index aa2c55e3b55f..2f8452b404c7 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c | |||
| @@ -32,6 +32,7 @@ | |||
| 32 | #include <linux/module.h> | 32 | #include <linux/module.h> |
| 33 | #include <linux/binfmts.h> | 33 | #include <linux/binfmts.h> |
| 34 | #include <linux/security.h> | 34 | #include <linux/security.h> |
| 35 | #include <linux/syscalls.h> | ||
| 35 | #include <linux/compat.h> | 36 | #include <linux/compat.h> |
| 36 | #include <linux/vfs.h> | 37 | #include <linux/vfs.h> |
| 37 | #include <linux/ipc.h> | 38 | #include <linux/ipc.h> |
| @@ -63,9 +64,9 @@ | |||
| 63 | #define merge_64(r1, r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL)) | 64 | #define merge_64(r1, r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL)) |
| 64 | #endif | 65 | #endif |
| 65 | 66 | ||
| 66 | asmlinkage unsigned long | 67 | SYSCALL_DEFINE6(32_mmap2, unsigned long, addr, unsigned long, len, |
| 67 | sys32_mmap2(unsigned long addr, unsigned long len, unsigned long prot, | 68 | unsigned long, prot, unsigned long, flags, unsigned long, fd, |
| 68 | unsigned long flags, unsigned long fd, unsigned long pgoff) | 69 | unsigned long, pgoff) |
| 69 | { | 70 | { |
| 70 | struct file * file = NULL; | 71 | struct file * file = NULL; |
| 71 | unsigned long error; | 72 | unsigned long error; |
| @@ -121,21 +122,21 @@ struct rlimit32 { | |||
| 121 | int rlim_max; | 122 | int rlim_max; |
| 122 | }; | 123 | }; |
| 123 | 124 | ||
| 124 | asmlinkage long sys32_truncate64(const char __user * path, | 125 | SYSCALL_DEFINE4(32_truncate64, const char __user *, path, |
| 125 | unsigned long __dummy, int a2, int a3) | 126 | unsigned long, __dummy, unsigned long, a2, unsigned long, a3) |
| 126 | { | 127 | { |
| 127 | return sys_truncate(path, merge_64(a2, a3)); | 128 | return sys_truncate(path, merge_64(a2, a3)); |
| 128 | } | 129 | } |
| 129 | 130 | ||
| 130 | asmlinkage long sys32_ftruncate64(unsigned int fd, unsigned long __dummy, | 131 | SYSCALL_DEFINE4(32_ftruncate64, unsigned long, fd, unsigned long, __dummy, |
| 131 | int a2, int a3) | 132 | unsigned long, a2, unsigned long, a3) |
| 132 | { | 133 | { |
| 133 | return sys_ftruncate(fd, merge_64(a2, a3)); | 134 | return sys_ftruncate(fd, merge_64(a2, a3)); |
| 134 | } | 135 | } |
| 135 | 136 | ||
| 136 | asmlinkage int sys32_llseek(unsigned int fd, unsigned int offset_high, | 137 | SYSCALL_DEFINE5(32_llseek, unsigned long, fd, unsigned long, offset_high, |
| 137 | unsigned int offset_low, loff_t __user * result, | 138 | unsigned long, offset_low, loff_t __user *, result, |
| 138 | unsigned int origin) | 139 | unsigned long, origin) |
| 139 | { | 140 | { |
| 140 | return sys_llseek(fd, offset_high, offset_low, result, origin); | 141 | return sys_llseek(fd, offset_high, offset_low, result, origin); |
| 141 | } | 142 | } |
| @@ -144,20 +145,20 @@ asmlinkage int sys32_llseek(unsigned int fd, unsigned int offset_high, | |||
| 144 | lseek back to original location. They fail just like lseek does on | 145 | lseek back to original location. They fail just like lseek does on |
| 145 | non-seekable files. */ | 146 | non-seekable files. */ |
| 146 | 147 | ||
| 147 | asmlinkage ssize_t sys32_pread(unsigned int fd, char __user * buf, | 148 | SYSCALL_DEFINE6(32_pread, unsigned long, fd, char __user *, buf, size_t, count, |
| 148 | size_t count, u32 unused, u64 a4, u64 a5) | 149 | unsigned long, unused, unsigned long, a4, unsigned long, a5) |
| 149 | { | 150 | { |
| 150 | return sys_pread64(fd, buf, count, merge_64(a4, a5)); | 151 | return sys_pread64(fd, buf, count, merge_64(a4, a5)); |
| 151 | } | 152 | } |
| 152 | 153 | ||
| 153 | asmlinkage ssize_t sys32_pwrite(unsigned int fd, const char __user * buf, | 154 | SYSCALL_DEFINE6(32_pwrite, unsigned int, fd, const char __user *, buf, |
| 154 | size_t count, u32 unused, u64 a4, u64 a5) | 155 | size_t, count, u32, unused, u64, a4, u64, a5) |
| 155 | { | 156 | { |
| 156 | return sys_pwrite64(fd, buf, count, merge_64(a4, a5)); | 157 | return sys_pwrite64(fd, buf, count, merge_64(a4, a5)); |
| 157 | } | 158 | } |
| 158 | 159 | ||
| 159 | asmlinkage int sys32_sched_rr_get_interval(compat_pid_t pid, | 160 | SYSCALL_DEFINE2(32_sched_rr_get_interval, compat_pid_t, pid, |
| 160 | struct compat_timespec __user *interval) | 161 | struct compat_timespec __user *, interval) |
| 161 | { | 162 | { |
| 162 | struct timespec t; | 163 | struct timespec t; |
| 163 | int ret; | 164 | int ret; |
| @@ -174,8 +175,8 @@ asmlinkage int sys32_sched_rr_get_interval(compat_pid_t pid, | |||
| 174 | 175 | ||
| 175 | #ifdef CONFIG_SYSVIPC | 176 | #ifdef CONFIG_SYSVIPC |
| 176 | 177 | ||
| 177 | asmlinkage long | 178 | SYSCALL_DEFINE6(32_ipc, u32, call, long, first, long, second, long, third, |
| 178 | sys32_ipc(u32 call, int first, int second, int third, u32 ptr, u32 fifth) | 179 | unsigned long, ptr, unsigned long, fifth) |
| 179 | { | 180 | { |
| 180 | int version, err; | 181 | int version, err; |
| 181 | 182 | ||
| @@ -233,8 +234,8 @@ sys32_ipc(u32 call, int first, int second, int third, u32 ptr, u32 fifth) | |||
| 233 | 234 | ||
| 234 | #else | 235 | #else |
| 235 | 236 | ||
| 236 | asmlinkage long | 237 | SYSCALL_DEFINE6(32_ipc, u32, call, int, first, int, second, int, third, |
| 237 | sys32_ipc(u32 call, int first, int second, int third, u32 ptr, u32 fifth) | 238 | u32, ptr, u32 fifth) |
| 238 | { | 239 | { |
| 239 | return -ENOSYS; | 240 | return -ENOSYS; |
| 240 | } | 241 | } |
| @@ -242,7 +243,7 @@ sys32_ipc(u32 call, int first, int second, int third, u32 ptr, u32 fifth) | |||
| 242 | #endif /* CONFIG_SYSVIPC */ | 243 | #endif /* CONFIG_SYSVIPC */ |
| 243 | 244 | ||
| 244 | #ifdef CONFIG_MIPS32_N32 | 245 | #ifdef CONFIG_MIPS32_N32 |
| 245 | asmlinkage long sysn32_semctl(int semid, int semnum, int cmd, u32 arg) | 246 | SYSCALL_DEFINE4(n32_semctl, int, semid, int, semnum, int, cmd, u32, arg) |
| 246 | { | 247 | { |
| 247 | /* compat_sys_semctl expects a pointer to union semun */ | 248 | /* compat_sys_semctl expects a pointer to union semun */ |
| 248 | u32 __user *uptr = compat_alloc_user_space(sizeof(u32)); | 249 | u32 __user *uptr = compat_alloc_user_space(sizeof(u32)); |
| @@ -251,13 +252,14 @@ asmlinkage long sysn32_semctl(int semid, int semnum, int cmd, u32 arg) | |||
| 251 | return compat_sys_semctl(semid, semnum, cmd, uptr); | 252 | return compat_sys_semctl(semid, semnum, cmd, uptr); |
| 252 | } | 253 | } |
| 253 | 254 | ||
| 254 | asmlinkage long sysn32_msgsnd(int msqid, u32 msgp, unsigned msgsz, int msgflg) | 255 | SYSCALL_DEFINE4(n32_msgsnd, int, msqid, u32, msgp, unsigned int, msgsz, |
| 256 | int, msgflg) | ||
| 255 | { | 257 | { |
| 256 | return compat_sys_msgsnd(msqid, msgsz, msgflg, compat_ptr(msgp)); | 258 | return compat_sys_msgsnd(msqid, msgsz, msgflg, compat_ptr(msgp)); |
| 257 | } | 259 | } |
| 258 | 260 | ||
| 259 | asmlinkage long sysn32_msgrcv(int msqid, u32 msgp, size_t msgsz, int msgtyp, | 261 | SYSCALL_DEFINE5(n32_msgrcv, int, msqid, u32, msgp, size_t, msgsz, |
| 260 | int msgflg) | 262 | int, msgtyp, int, msgflg) |
| 261 | { | 263 | { |
| 262 | return compat_sys_msgrcv(msqid, msgsz, msgtyp, msgflg, IPC_64, | 264 | return compat_sys_msgrcv(msqid, msgsz, msgtyp, msgflg, IPC_64, |
| 263 | compat_ptr(msgp)); | 265 | compat_ptr(msgp)); |
| @@ -277,7 +279,7 @@ struct sysctl_args32 | |||
| 277 | 279 | ||
| 278 | #ifdef CONFIG_SYSCTL_SYSCALL | 280 | #ifdef CONFIG_SYSCTL_SYSCALL |
| 279 | 281 | ||
| 280 | asmlinkage long sys32_sysctl(struct sysctl_args32 __user *args) | 282 | SYSCALL_DEFINE1(32_sysctl, struct sysctl_args32 __user *, args) |
| 281 | { | 283 | { |
| 282 | struct sysctl_args32 tmp; | 284 | struct sysctl_args32 tmp; |
| 283 | int error; | 285 | int error; |
| @@ -316,9 +318,16 @@ asmlinkage long sys32_sysctl(struct sysctl_args32 __user *args) | |||
| 316 | return error; | 318 | return error; |
| 317 | } | 319 | } |
| 318 | 320 | ||
| 321 | #else | ||
| 322 | |||
| 323 | SYSCALL_DEFINE1(32_sysctl, struct sysctl_args32 __user *, args) | ||
| 324 | { | ||
| 325 | return -ENOSYS; | ||
| 326 | } | ||
| 327 | |||
| 319 | #endif /* CONFIG_SYSCTL_SYSCALL */ | 328 | #endif /* CONFIG_SYSCTL_SYSCALL */ |
| 320 | 329 | ||
| 321 | asmlinkage long sys32_newuname(struct new_utsname __user * name) | 330 | SYSCALL_DEFINE1(32_newuname, struct new_utsname __user *, name) |
| 322 | { | 331 | { |
| 323 | int ret = 0; | 332 | int ret = 0; |
| 324 | 333 | ||
| @@ -334,7 +343,7 @@ asmlinkage long sys32_newuname(struct new_utsname __user * name) | |||
| 334 | return ret; | 343 | return ret; |
| 335 | } | 344 | } |
| 336 | 345 | ||
| 337 | asmlinkage int sys32_personality(unsigned long personality) | 346 | SYSCALL_DEFINE1(32_personality, unsigned long, personality) |
| 338 | { | 347 | { |
| 339 | int ret; | 348 | int ret; |
| 340 | personality &= 0xffffffff; | 349 | personality &= 0xffffffff; |
| @@ -357,7 +366,7 @@ struct ustat32 { | |||
| 357 | 366 | ||
| 358 | extern asmlinkage long sys_ustat(dev_t dev, struct ustat __user * ubuf); | 367 | extern asmlinkage long sys_ustat(dev_t dev, struct ustat __user * ubuf); |
| 359 | 368 | ||
| 360 | asmlinkage int sys32_ustat(dev_t dev, struct ustat32 __user * ubuf32) | 369 | SYSCALL_DEFINE2(32_ustat, dev_t, dev, struct ustat32 __user *, ubuf32) |
| 361 | { | 370 | { |
| 362 | int err; | 371 | int err; |
| 363 | struct ustat tmp; | 372 | struct ustat tmp; |
| @@ -381,8 +390,8 @@ out: | |||
| 381 | return err; | 390 | return err; |
| 382 | } | 391 | } |
| 383 | 392 | ||
| 384 | asmlinkage int sys32_sendfile(int out_fd, int in_fd, compat_off_t __user *offset, | 393 | SYSCALL_DEFINE4(32_sendfile, long, out_fd, long, in_fd, |
| 385 | s32 count) | 394 | compat_off_t __user *, offset, s32, count) |
| 386 | { | 395 | { |
| 387 | mm_segment_t old_fs = get_fs(); | 396 | mm_segment_t old_fs = get_fs(); |
| 388 | int ret; | 397 | int ret; |
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index 51d1ba415b90..9ab70c3b5be6 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S | |||
| @@ -399,7 +399,7 @@ einval: li v0, -ENOSYS | |||
| 399 | sys sys_swapon 2 | 399 | sys sys_swapon 2 |
| 400 | sys sys_reboot 3 | 400 | sys sys_reboot 3 |
| 401 | sys sys_old_readdir 3 | 401 | sys sys_old_readdir 3 |
| 402 | sys old_mmap 6 /* 4090 */ | 402 | sys sys_mips_mmap 6 /* 4090 */ |
| 403 | sys sys_munmap 2 | 403 | sys sys_munmap 2 |
| 404 | sys sys_truncate 2 | 404 | sys sys_truncate 2 |
| 405 | sys sys_ftruncate 2 | 405 | sys sys_ftruncate 2 |
| @@ -519,7 +519,7 @@ einval: li v0, -ENOSYS | |||
| 519 | sys sys_sendfile 4 | 519 | sys sys_sendfile 4 |
| 520 | sys sys_ni_syscall 0 | 520 | sys sys_ni_syscall 0 |
| 521 | sys sys_ni_syscall 0 | 521 | sys sys_ni_syscall 0 |
| 522 | sys sys_mmap2 6 /* 4210 */ | 522 | sys sys_mips_mmap2 6 /* 4210 */ |
| 523 | sys sys_truncate64 4 | 523 | sys sys_truncate64 4 |
| 524 | sys sys_ftruncate64 4 | 524 | sys sys_ftruncate64 4 |
| 525 | sys sys_stat64 2 | 525 | sys sys_stat64 2 |
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index a9e171618994..9b4698667154 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S | |||
| @@ -207,7 +207,7 @@ sys_call_table: | |||
| 207 | PTR sys_newlstat | 207 | PTR sys_newlstat |
| 208 | PTR sys_poll | 208 | PTR sys_poll |
| 209 | PTR sys_lseek | 209 | PTR sys_lseek |
| 210 | PTR old_mmap | 210 | PTR sys_mips_mmap |
| 211 | PTR sys_mprotect /* 5010 */ | 211 | PTR sys_mprotect /* 5010 */ |
| 212 | PTR sys_munmap | 212 | PTR sys_munmap |
| 213 | PTR sys_brk | 213 | PTR sys_brk |
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index 30f3b6317a83..7438e92f8a01 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S | |||
| @@ -129,12 +129,12 @@ EXPORT(sysn32_call_table) | |||
| 129 | PTR sys_newlstat | 129 | PTR sys_newlstat |
| 130 | PTR sys_poll | 130 | PTR sys_poll |
| 131 | PTR sys_lseek | 131 | PTR sys_lseek |
| 132 | PTR old_mmap | 132 | PTR sys_mips_mmap |
| 133 | PTR sys_mprotect /* 6010 */ | 133 | PTR sys_mprotect /* 6010 */ |
| 134 | PTR sys_munmap | 134 | PTR sys_munmap |
| 135 | PTR sys_brk | 135 | PTR sys_brk |
| 136 | PTR sys32_rt_sigaction | 136 | PTR sys_32_rt_sigaction |
| 137 | PTR sys32_rt_sigprocmask | 137 | PTR sys_32_rt_sigprocmask |
| 138 | PTR compat_sys_ioctl /* 6015 */ | 138 | PTR compat_sys_ioctl /* 6015 */ |
| 139 | PTR sys_pread64 | 139 | PTR sys_pread64 |
| 140 | PTR sys_pwrite64 | 140 | PTR sys_pwrite64 |
| @@ -159,7 +159,7 @@ EXPORT(sysn32_call_table) | |||
| 159 | PTR compat_sys_setitimer | 159 | PTR compat_sys_setitimer |
| 160 | PTR sys_alarm | 160 | PTR sys_alarm |
| 161 | PTR sys_getpid | 161 | PTR sys_getpid |
| 162 | PTR sys32_sendfile | 162 | PTR sys_32_sendfile |
| 163 | PTR sys_socket /* 6040 */ | 163 | PTR sys_socket /* 6040 */ |
| 164 | PTR sys_connect | 164 | PTR sys_connect |
| 165 | PTR sys_accept | 165 | PTR sys_accept |
| @@ -181,14 +181,14 @@ EXPORT(sysn32_call_table) | |||
| 181 | PTR sys_exit | 181 | PTR sys_exit |
| 182 | PTR compat_sys_wait4 | 182 | PTR compat_sys_wait4 |
| 183 | PTR sys_kill /* 6060 */ | 183 | PTR sys_kill /* 6060 */ |
| 184 | PTR sys32_newuname | 184 | PTR sys_32_newuname |
| 185 | PTR sys_semget | 185 | PTR sys_semget |
| 186 | PTR sys_semop | 186 | PTR sys_semop |
| 187 | PTR sysn32_semctl | 187 | PTR sys_n32_semctl |
| 188 | PTR sys_shmdt /* 6065 */ | 188 | PTR sys_shmdt /* 6065 */ |
| 189 | PTR sys_msgget | 189 | PTR sys_msgget |
| 190 | PTR sysn32_msgsnd | 190 | PTR sys_n32_msgsnd |
| 191 | PTR sysn32_msgrcv | 191 | PTR sys_n32_msgrcv |
| 192 | PTR compat_sys_msgctl | 192 | PTR compat_sys_msgctl |
| 193 | PTR compat_sys_fcntl /* 6070 */ | 193 | PTR compat_sys_fcntl /* 6070 */ |
| 194 | PTR sys_flock | 194 | PTR sys_flock |
| @@ -245,15 +245,15 @@ EXPORT(sysn32_call_table) | |||
| 245 | PTR sys_getsid | 245 | PTR sys_getsid |
| 246 | PTR sys_capget | 246 | PTR sys_capget |
| 247 | PTR sys_capset | 247 | PTR sys_capset |
| 248 | PTR sys32_rt_sigpending /* 6125 */ | 248 | PTR sys_32_rt_sigpending /* 6125 */ |
| 249 | PTR compat_sys_rt_sigtimedwait | 249 | PTR compat_sys_rt_sigtimedwait |
| 250 | PTR sys32_rt_sigqueueinfo | 250 | PTR sys_32_rt_sigqueueinfo |
| 251 | PTR sysn32_rt_sigsuspend | 251 | PTR sysn32_rt_sigsuspend |
| 252 | PTR sys32_sigaltstack | 252 | PTR sys32_sigaltstack |
| 253 | PTR compat_sys_utime /* 6130 */ | 253 | PTR compat_sys_utime /* 6130 */ |
| 254 | PTR sys_mknod | 254 | PTR sys_mknod |
| 255 | PTR sys32_personality | 255 | PTR sys_32_personality |
| 256 | PTR sys32_ustat | 256 | PTR sys_32_ustat |
| 257 | PTR compat_sys_statfs | 257 | PTR compat_sys_statfs |
| 258 | PTR compat_sys_fstatfs /* 6135 */ | 258 | PTR compat_sys_fstatfs /* 6135 */ |
| 259 | PTR sys_sysfs | 259 | PTR sys_sysfs |
| @@ -265,14 +265,14 @@ EXPORT(sysn32_call_table) | |||
| 265 | PTR sys_sched_getscheduler | 265 | PTR sys_sched_getscheduler |
| 266 | PTR sys_sched_get_priority_max | 266 | PTR sys_sched_get_priority_max |
| 267 | PTR sys_sched_get_priority_min | 267 | PTR sys_sched_get_priority_min |
| 268 | PTR sys32_sched_rr_get_interval /* 6145 */ | 268 | PTR sys_32_sched_rr_get_interval /* 6145 */ |
| 269 | PTR sys_mlock | 269 | PTR sys_mlock |
| 270 | PTR sys_munlock | 270 | PTR sys_munlock |
| 271 | PTR sys_mlockall | 271 | PTR sys_mlockall |
| 272 | PTR sys_munlockall | 272 | PTR sys_munlockall |
| 273 | PTR sys_vhangup /* 6150 */ | 273 | PTR sys_vhangup /* 6150 */ |
| 274 | PTR sys_pivot_root | 274 | PTR sys_pivot_root |
| 275 | PTR sys32_sysctl | 275 | PTR sys_32_sysctl |
| 276 | PTR sys_prctl | 276 | PTR sys_prctl |
| 277 | PTR compat_sys_adjtimex | 277 | PTR compat_sys_adjtimex |
| 278 | PTR compat_sys_setrlimit /* 6155 */ | 278 | PTR compat_sys_setrlimit /* 6155 */ |
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index fefef4af8595..b0fef4ff9827 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S | |||
| @@ -265,12 +265,12 @@ sys_call_table: | |||
| 265 | PTR sys_olduname | 265 | PTR sys_olduname |
| 266 | PTR sys_umask /* 4060 */ | 266 | PTR sys_umask /* 4060 */ |
| 267 | PTR sys_chroot | 267 | PTR sys_chroot |
| 268 | PTR sys32_ustat | 268 | PTR sys_32_ustat |
| 269 | PTR sys_dup2 | 269 | PTR sys_dup2 |
| 270 | PTR sys_getppid | 270 | PTR sys_getppid |
| 271 | PTR sys_getpgrp /* 4065 */ | 271 | PTR sys_getpgrp /* 4065 */ |
| 272 | PTR sys_setsid | 272 | PTR sys_setsid |
| 273 | PTR sys32_sigaction | 273 | PTR sys_32_sigaction |
| 274 | PTR sys_sgetmask | 274 | PTR sys_sgetmask |
| 275 | PTR sys_ssetmask | 275 | PTR sys_ssetmask |
| 276 | PTR sys_setreuid /* 4070 */ | 276 | PTR sys_setreuid /* 4070 */ |
| @@ -293,7 +293,7 @@ sys_call_table: | |||
| 293 | PTR sys_swapon | 293 | PTR sys_swapon |
| 294 | PTR sys_reboot | 294 | PTR sys_reboot |
| 295 | PTR compat_sys_old_readdir | 295 | PTR compat_sys_old_readdir |
| 296 | PTR old_mmap /* 4090 */ | 296 | PTR sys_mips_mmap /* 4090 */ |
| 297 | PTR sys_munmap | 297 | PTR sys_munmap |
| 298 | PTR sys_truncate | 298 | PTR sys_truncate |
| 299 | PTR sys_ftruncate | 299 | PTR sys_ftruncate |
| @@ -320,12 +320,12 @@ sys_call_table: | |||
| 320 | PTR compat_sys_wait4 | 320 | PTR compat_sys_wait4 |
| 321 | PTR sys_swapoff /* 4115 */ | 321 | PTR sys_swapoff /* 4115 */ |
| 322 | PTR compat_sys_sysinfo | 322 | PTR compat_sys_sysinfo |
| 323 | PTR sys32_ipc | 323 | PTR sys_32_ipc |
| 324 | PTR sys_fsync | 324 | PTR sys_fsync |
| 325 | PTR sys32_sigreturn | 325 | PTR sys32_sigreturn |
| 326 | PTR sys32_clone /* 4120 */ | 326 | PTR sys32_clone /* 4120 */ |
| 327 | PTR sys_setdomainname | 327 | PTR sys_setdomainname |
| 328 | PTR sys32_newuname | 328 | PTR sys_32_newuname |
| 329 | PTR sys_ni_syscall /* sys_modify_ldt */ | 329 | PTR sys_ni_syscall /* sys_modify_ldt */ |
| 330 | PTR compat_sys_adjtimex | 330 | PTR compat_sys_adjtimex |
| 331 | PTR sys_mprotect /* 4125 */ | 331 | PTR sys_mprotect /* 4125 */ |
| @@ -339,11 +339,11 @@ sys_call_table: | |||
| 339 | PTR sys_fchdir | 339 | PTR sys_fchdir |
| 340 | PTR sys_bdflush | 340 | PTR sys_bdflush |
| 341 | PTR sys_sysfs /* 4135 */ | 341 | PTR sys_sysfs /* 4135 */ |
| 342 | PTR sys32_personality | 342 | PTR sys_32_personality |
| 343 | PTR sys_ni_syscall /* for afs_syscall */ | 343 | PTR sys_ni_syscall /* for afs_syscall */ |
| 344 | PTR sys_setfsuid | 344 | PTR sys_setfsuid |
| 345 | PTR sys_setfsgid | 345 | PTR sys_setfsgid |
| 346 | PTR sys32_llseek /* 4140 */ | 346 | PTR sys_32_llseek /* 4140 */ |
| 347 | PTR compat_sys_getdents | 347 | PTR compat_sys_getdents |
| 348 | PTR compat_sys_select | 348 | PTR compat_sys_select |
| 349 | PTR sys_flock | 349 | PTR sys_flock |
| @@ -356,7 +356,7 @@ sys_call_table: | |||
| 356 | PTR sys_ni_syscall /* 4150 */ | 356 | PTR sys_ni_syscall /* 4150 */ |
| 357 | PTR sys_getsid | 357 | PTR sys_getsid |
| 358 | PTR sys_fdatasync | 358 | PTR sys_fdatasync |
| 359 | PTR sys32_sysctl | 359 | PTR sys_32_sysctl |
| 360 | PTR sys_mlock | 360 | PTR sys_mlock |
| 361 | PTR sys_munlock /* 4155 */ | 361 | PTR sys_munlock /* 4155 */ |
| 362 | PTR sys_mlockall | 362 | PTR sys_mlockall |
| @@ -368,7 +368,7 @@ sys_call_table: | |||
| 368 | PTR sys_sched_yield | 368 | PTR sys_sched_yield |
| 369 | PTR sys_sched_get_priority_max | 369 | PTR sys_sched_get_priority_max |
| 370 | PTR sys_sched_get_priority_min | 370 | PTR sys_sched_get_priority_min |
| 371 | PTR sys32_sched_rr_get_interval /* 4165 */ | 371 | PTR sys_32_sched_rr_get_interval /* 4165 */ |
| 372 | PTR compat_sys_nanosleep | 372 | PTR compat_sys_nanosleep |
| 373 | PTR sys_mremap | 373 | PTR sys_mremap |
| 374 | PTR sys_accept | 374 | PTR sys_accept |
| @@ -397,25 +397,25 @@ sys_call_table: | |||
| 397 | PTR sys_getresgid | 397 | PTR sys_getresgid |
| 398 | PTR sys_prctl | 398 | PTR sys_prctl |
| 399 | PTR sys32_rt_sigreturn | 399 | PTR sys32_rt_sigreturn |
| 400 | PTR sys32_rt_sigaction | 400 | PTR sys_32_rt_sigaction |
| 401 | PTR sys32_rt_sigprocmask /* 4195 */ | 401 | PTR sys_32_rt_sigprocmask /* 4195 */ |
| 402 | PTR sys32_rt_sigpending | 402 | PTR sys_32_rt_sigpending |
| 403 | PTR compat_sys_rt_sigtimedwait | 403 | PTR compat_sys_rt_sigtimedwait |
| 404 | PTR sys32_rt_sigqueueinfo | 404 | PTR sys_32_rt_sigqueueinfo |
| 405 | PTR sys32_rt_sigsuspend | 405 | PTR sys32_rt_sigsuspend |
| 406 | PTR sys32_pread /* 4200 */ | 406 | PTR sys_32_pread /* 4200 */ |
| 407 | PTR sys32_pwrite | 407 | PTR sys_32_pwrite |
| 408 | PTR sys_chown | 408 | PTR sys_chown |
| 409 | PTR sys_getcwd | 409 | PTR sys_getcwd |
| 410 | PTR sys_capget | 410 | PTR sys_capget |
| 411 | PTR sys_capset /* 4205 */ | 411 | PTR sys_capset /* 4205 */ |
| 412 | PTR sys32_sigaltstack | 412 | PTR sys32_sigaltstack |
| 413 | PTR sys32_sendfile | 413 | PTR sys_32_sendfile |
| 414 | PTR sys_ni_syscall | 414 | PTR sys_ni_syscall |
| 415 | PTR sys_ni_syscall | 415 | PTR sys_ni_syscall |
| 416 | PTR sys32_mmap2 /* 4210 */ | 416 | PTR sys_mips_mmap2 /* 4210 */ |
| 417 | PTR sys32_truncate64 | 417 | PTR sys_32_truncate64 |
| 418 | PTR sys32_ftruncate64 | 418 | PTR sys_32_ftruncate64 |
| 419 | PTR sys_newstat | 419 | PTR sys_newstat |
| 420 | PTR sys_newlstat | 420 | PTR sys_newlstat |
| 421 | PTR sys_newfstat /* 4215 */ | 421 | PTR sys_newfstat /* 4215 */ |
| @@ -481,7 +481,7 @@ sys_call_table: | |||
| 481 | PTR compat_sys_mq_notify /* 4275 */ | 481 | PTR compat_sys_mq_notify /* 4275 */ |
| 482 | PTR compat_sys_mq_getsetattr | 482 | PTR compat_sys_mq_getsetattr |
| 483 | PTR sys_ni_syscall /* sys_vserver */ | 483 | PTR sys_ni_syscall /* sys_vserver */ |
| 484 | PTR sys32_waitid | 484 | PTR sys_32_waitid |
| 485 | PTR sys_ni_syscall /* available, was setaltroot */ | 485 | PTR sys_ni_syscall /* available, was setaltroot */ |
| 486 | PTR sys_add_key /* 4280 */ | 486 | PTR sys_add_key /* 4280 */ |
| 487 | PTR sys_request_key | 487 | PTR sys_request_key |
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c index a4e106c56ab5..830c5ef9932b 100644 --- a/arch/mips/kernel/signal.c +++ b/arch/mips/kernel/signal.c | |||
| @@ -19,6 +19,7 @@ | |||
| 19 | #include <linux/ptrace.h> | 19 | #include <linux/ptrace.h> |
| 20 | #include <linux/unistd.h> | 20 | #include <linux/unistd.h> |
| 21 | #include <linux/compiler.h> | 21 | #include <linux/compiler.h> |
| 22 | #include <linux/syscalls.h> | ||
| 22 | #include <linux/uaccess.h> | 23 | #include <linux/uaccess.h> |
| 23 | 24 | ||
| 24 | #include <asm/abi.h> | 25 | #include <asm/abi.h> |
| @@ -338,8 +339,8 @@ asmlinkage int sys_rt_sigsuspend(nabi_no_regargs struct pt_regs regs) | |||
| 338 | } | 339 | } |
| 339 | 340 | ||
| 340 | #ifdef CONFIG_TRAD_SIGNALS | 341 | #ifdef CONFIG_TRAD_SIGNALS |
| 341 | asmlinkage int sys_sigaction(int sig, const struct sigaction __user *act, | 342 | SYSCALL_DEFINE3(sigaction, int, sig, const struct sigaction __user *, act, |
| 342 | struct sigaction __user *oact) | 343 | struct sigaction __user *, oact) |
| 343 | { | 344 | { |
| 344 | struct k_sigaction new_ka, old_ka; | 345 | struct k_sigaction new_ka, old_ka; |
| 345 | int ret; | 346 | int ret; |
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index 652709b353ad..2e74075ac0ca 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c | |||
| @@ -349,8 +349,8 @@ asmlinkage int sys32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs) | |||
| 349 | return -ERESTARTNOHAND; | 349 | return -ERESTARTNOHAND; |
| 350 | } | 350 | } |
| 351 | 351 | ||
| 352 | asmlinkage int sys32_sigaction(int sig, const struct sigaction32 __user *act, | 352 | SYSCALL_DEFINE3(32_sigaction, long, sig, const struct sigaction32 __user *, act, |
| 353 | struct sigaction32 __user *oact) | 353 | struct sigaction32 __user *, oact) |
| 354 | { | 354 | { |
| 355 | struct k_sigaction new_ka, old_ka; | 355 | struct k_sigaction new_ka, old_ka; |
| 356 | int ret; | 356 | int ret; |
| @@ -704,9 +704,9 @@ struct mips_abi mips_abi_32 = { | |||
| 704 | .restart = __NR_O32_restart_syscall | 704 | .restart = __NR_O32_restart_syscall |
| 705 | }; | 705 | }; |
| 706 | 706 | ||
| 707 | asmlinkage int sys32_rt_sigaction(int sig, const struct sigaction32 __user *act, | 707 | SYSCALL_DEFINE4(32_rt_sigaction, int, sig, |
| 708 | struct sigaction32 __user *oact, | 708 | const struct sigaction32 __user *, act, |
| 709 | unsigned int sigsetsize) | 709 | struct sigaction32 __user *, oact, unsigned int, sigsetsize) |
| 710 | { | 710 | { |
| 711 | struct k_sigaction new_sa, old_sa; | 711 | struct k_sigaction new_sa, old_sa; |
| 712 | int ret = -EINVAL; | 712 | int ret = -EINVAL; |
| @@ -748,8 +748,8 @@ out: | |||
| 748 | return ret; | 748 | return ret; |
| 749 | } | 749 | } |
| 750 | 750 | ||
| 751 | asmlinkage int sys32_rt_sigprocmask(int how, compat_sigset_t __user *set, | 751 | SYSCALL_DEFINE4(32_rt_sigprocmask, int, how, compat_sigset_t __user *, set, |
| 752 | compat_sigset_t __user *oset, unsigned int sigsetsize) | 752 | compat_sigset_t __user *, oset, unsigned int, sigsetsize) |
| 753 | { | 753 | { |
| 754 | sigset_t old_set, new_set; | 754 | sigset_t old_set, new_set; |
| 755 | int ret; | 755 | int ret; |
| @@ -770,8 +770,8 @@ asmlinkage int sys32_rt_sigprocmask(int how, compat_sigset_t __user *set, | |||
| 770 | return ret; | 770 | return ret; |
| 771 | } | 771 | } |
| 772 | 772 | ||
| 773 | asmlinkage int sys32_rt_sigpending(compat_sigset_t __user *uset, | 773 | SYSCALL_DEFINE2(32_rt_sigpending, compat_sigset_t __user *, uset, |
| 774 | unsigned int sigsetsize) | 774 | unsigned int, sigsetsize) |
| 775 | { | 775 | { |
| 776 | int ret; | 776 | int ret; |
| 777 | sigset_t set; | 777 | sigset_t set; |
| @@ -787,7 +787,8 @@ asmlinkage int sys32_rt_sigpending(compat_sigset_t __user *uset, | |||
| 787 | return ret; | 787 | return ret; |
| 788 | } | 788 | } |
| 789 | 789 | ||
| 790 | asmlinkage int sys32_rt_sigqueueinfo(int pid, int sig, compat_siginfo_t __user *uinfo) | 790 | SYSCALL_DEFINE3(32_rt_sigqueueinfo, int, pid, int, sig, |
| 791 | compat_siginfo_t __user *, uinfo) | ||
| 791 | { | 792 | { |
| 792 | siginfo_t info; | 793 | siginfo_t info; |
| 793 | int ret; | 794 | int ret; |
| @@ -802,10 +803,9 @@ asmlinkage int sys32_rt_sigqueueinfo(int pid, int sig, compat_siginfo_t __user * | |||
| 802 | return ret; | 803 | return ret; |
| 803 | } | 804 | } |
| 804 | 805 | ||
| 805 | asmlinkage long | 806 | SYSCALL_DEFINE5(32_waitid, int, which, compat_pid_t, pid, |
| 806 | sys32_waitid(int which, compat_pid_t pid, | 807 | compat_siginfo_t __user *, uinfo, int, options, |
| 807 | compat_siginfo_t __user *uinfo, int options, | 808 | struct compat_rusage __user *, uru) |
| 808 | struct compat_rusage __user *uru) | ||
| 809 | { | 809 | { |
| 810 | siginfo_t info; | 810 | siginfo_t info; |
| 811 | struct rusage ru; | 811 | struct rusage ru; |
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c index 37970d9b2186..8cf384644040 100644 --- a/arch/mips/kernel/syscall.c +++ b/arch/mips/kernel/syscall.c | |||
| @@ -152,9 +152,9 @@ out: | |||
| 152 | return error; | 152 | return error; |
| 153 | } | 153 | } |
| 154 | 154 | ||
| 155 | asmlinkage unsigned long | 155 | SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len, |
| 156 | old_mmap(unsigned long addr, unsigned long len, int prot, | 156 | unsigned long, prot, unsigned long, flags, unsigned long, |
| 157 | int flags, int fd, off_t offset) | 157 | fd, off_t, offset) |
| 158 | { | 158 | { |
| 159 | unsigned long result; | 159 | unsigned long result; |
| 160 | 160 | ||
| @@ -168,9 +168,9 @@ out: | |||
| 168 | return result; | 168 | return result; |
| 169 | } | 169 | } |
| 170 | 170 | ||
| 171 | asmlinkage unsigned long | 171 | SYSCALL_DEFINE6(mips_mmap2, unsigned long, addr, unsigned long, len, |
| 172 | sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot, | 172 | unsigned long, prot, unsigned long, flags, unsigned long, fd, |
| 173 | unsigned long flags, unsigned long fd, unsigned long pgoff) | 173 | unsigned long, pgoff) |
| 174 | { | 174 | { |
| 175 | if (pgoff & (~PAGE_MASK >> 12)) | 175 | if (pgoff & (~PAGE_MASK >> 12)) |
| 176 | return -EINVAL; | 176 | return -EINVAL; |
| @@ -240,7 +240,7 @@ out: | |||
| 240 | /* | 240 | /* |
| 241 | * Compacrapability ... | 241 | * Compacrapability ... |
| 242 | */ | 242 | */ |
| 243 | asmlinkage int sys_uname(struct old_utsname __user * name) | 243 | SYSCALL_DEFINE1(uname, struct old_utsname __user *, name) |
| 244 | { | 244 | { |
| 245 | if (name && !copy_to_user(name, utsname(), sizeof (*name))) | 245 | if (name && !copy_to_user(name, utsname(), sizeof (*name))) |
| 246 | return 0; | 246 | return 0; |
| @@ -250,7 +250,7 @@ asmlinkage int sys_uname(struct old_utsname __user * name) | |||
| 250 | /* | 250 | /* |
| 251 | * Compacrapability ... | 251 | * Compacrapability ... |
| 252 | */ | 252 | */ |
| 253 | asmlinkage int sys_olduname(struct oldold_utsname __user * name) | 253 | SYSCALL_DEFINE1(olduname, struct oldold_utsname __user *, name) |
| 254 | { | 254 | { |
| 255 | int error; | 255 | int error; |
| 256 | 256 | ||
| @@ -279,7 +279,7 @@ asmlinkage int sys_olduname(struct oldold_utsname __user * name) | |||
| 279 | return error; | 279 | return error; |
| 280 | } | 280 | } |
| 281 | 281 | ||
| 282 | asmlinkage int sys_set_thread_area(unsigned long addr) | 282 | SYSCALL_DEFINE1(set_thread_area, unsigned long, addr) |
| 283 | { | 283 | { |
| 284 | struct thread_info *ti = task_thread_info(current); | 284 | struct thread_info *ti = task_thread_info(current); |
| 285 | 285 | ||
| @@ -290,7 +290,7 @@ asmlinkage int sys_set_thread_area(unsigned long addr) | |||
| 290 | return 0; | 290 | return 0; |
| 291 | } | 291 | } |
| 292 | 292 | ||
| 293 | asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3) | 293 | asmlinkage int _sys_sysmips(long cmd, long arg1, long arg2, long arg3) |
| 294 | { | 294 | { |
| 295 | switch (cmd) { | 295 | switch (cmd) { |
| 296 | case MIPS_ATOMIC_SET: | 296 | case MIPS_ATOMIC_SET: |
| @@ -325,8 +325,8 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3) | |||
| 325 | * | 325 | * |
| 326 | * This is really horribly ugly. | 326 | * This is really horribly ugly. |
| 327 | */ | 327 | */ |
| 328 | asmlinkage int sys_ipc(unsigned int call, int first, int second, | 328 | SYSCALL_DEFINE6(ipc, unsigned int, call, int, first, int, second, |
| 329 | unsigned long third, void __user *ptr, long fifth) | 329 | unsigned long, third, void __user *, ptr, long, fifth) |
| 330 | { | 330 | { |
| 331 | int version, ret; | 331 | int version, ret; |
| 332 | 332 | ||
| @@ -411,7 +411,7 @@ asmlinkage int sys_ipc(unsigned int call, int first, int second, | |||
| 411 | /* | 411 | /* |
| 412 | * No implemented yet ... | 412 | * No implemented yet ... |
| 413 | */ | 413 | */ |
| 414 | asmlinkage int sys_cachectl(char *addr, int nbytes, int op) | 414 | SYSCALL_DEFINE3(cachectl, char *, addr, int, nbytes, int, op) |
| 415 | { | 415 | { |
| 416 | return -ENOSYS; | 416 | return -ENOSYS; |
| 417 | } | 417 | } |
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c index 98ad0a82c29e..694d51f523d1 100644 --- a/arch/mips/mm/cache.c +++ b/arch/mips/mm/cache.c | |||
| @@ -13,6 +13,7 @@ | |||
| 13 | #include <linux/linkage.h> | 13 | #include <linux/linkage.h> |
| 14 | #include <linux/module.h> | 14 | #include <linux/module.h> |
| 15 | #include <linux/sched.h> | 15 | #include <linux/sched.h> |
| 16 | #include <linux/syscalls.h> | ||
| 16 | #include <linux/mm.h> | 17 | #include <linux/mm.h> |
| 17 | 18 | ||
| 18 | #include <asm/cacheflush.h> | 19 | #include <asm/cacheflush.h> |
| @@ -58,8 +59,8 @@ EXPORT_SYMBOL(_dma_cache_wback_inv); | |||
| 58 | * We could optimize the case where the cache argument is not BCACHE but | 59 | * We could optimize the case where the cache argument is not BCACHE but |
| 59 | * that seems very atypical use ... | 60 | * that seems very atypical use ... |
| 60 | */ | 61 | */ |
| 61 | asmlinkage int sys_cacheflush(unsigned long addr, | 62 | SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes, |
| 62 | unsigned long bytes, unsigned int cache) | 63 | unsigned int, cache) |
| 63 | { | 64 | { |
| 64 | if (bytes == 0) | 65 | if (bytes == 0) |
| 65 | return 0; | 66 | return 0; |
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig index 9a9f43358879..41d16822e616 100644 --- a/arch/mn10300/Kconfig +++ b/arch/mn10300/Kconfig | |||
| @@ -7,6 +7,7 @@ mainmenu "Linux Kernel Configuration" | |||
| 7 | 7 | ||
| 8 | config MN10300 | 8 | config MN10300 |
| 9 | def_bool y | 9 | def_bool y |
| 10 | select HAVE_OPROFILE | ||
| 10 | 11 | ||
| 11 | config AM33 | 12 | config AM33 |
| 12 | def_bool y | 13 | def_bool y |
diff --git a/arch/mn10300/unit-asb2305/pci.c b/arch/mn10300/unit-asb2305/pci.c index 1a86425fec42..07dbbcda3b2e 100644 --- a/arch/mn10300/unit-asb2305/pci.c +++ b/arch/mn10300/unit-asb2305/pci.c | |||
| @@ -173,7 +173,7 @@ static int pci_ampci_write_config_byte(struct pci_bus *bus, unsigned int devfn, | |||
| 173 | BRIDGEREGB(where) = value; | 173 | BRIDGEREGB(where) = value; |
| 174 | } else { | 174 | } else { |
| 175 | if (bus->number == 0 && | 175 | if (bus->number == 0 && |
| 176 | (devfn == PCI_DEVFN(2, 0) && devfn == PCI_DEVFN(3, 0)) | 176 | (devfn == PCI_DEVFN(2, 0) || devfn == PCI_DEVFN(3, 0)) |
| 177 | ) | 177 | ) |
| 178 | __pcidebug("<= %02x", bus, devfn, where, value); | 178 | __pcidebug("<= %02x", bus, devfn, where, value); |
| 179 | CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where); | 179 | CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where); |
diff --git a/arch/powerpc/include/asm/compat.h b/arch/powerpc/include/asm/compat.h index d811a8cd7b58..4774c2f92232 100644 --- a/arch/powerpc/include/asm/compat.h +++ b/arch/powerpc/include/asm/compat.h | |||
| @@ -210,5 +210,10 @@ struct compat_shmid64_ds { | |||
| 210 | compat_ulong_t __unused6; | 210 | compat_ulong_t __unused6; |
| 211 | }; | 211 | }; |
| 212 | 212 | ||
| 213 | static inline int is_compat_task(void) | ||
| 214 | { | ||
| 215 | return test_thread_flag(TIF_32BIT); | ||
| 216 | } | ||
| 217 | |||
| 213 | #endif /* __KERNEL__ */ | 218 | #endif /* __KERNEL__ */ |
| 214 | #endif /* _ASM_POWERPC_COMPAT_H */ | 219 | #endif /* _ASM_POWERPC_COMPAT_H */ |
diff --git a/arch/powerpc/include/asm/pgtable-4k.h b/arch/powerpc/include/asm/pgtable-4k.h index 6b18ba9d2d85..1dbca4e7de67 100644 --- a/arch/powerpc/include/asm/pgtable-4k.h +++ b/arch/powerpc/include/asm/pgtable-4k.h | |||
| @@ -60,7 +60,7 @@ | |||
| 60 | /* It should be preserving the high 48 bits and then specifically */ | 60 | /* It should be preserving the high 48 bits and then specifically */ |
| 61 | /* preserving _PAGE_SECONDARY | _PAGE_GROUP_IX */ | 61 | /* preserving _PAGE_SECONDARY | _PAGE_GROUP_IX */ |
| 62 | #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ | 62 | #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ |
| 63 | _PAGE_HPTEFLAGS) | 63 | _PAGE_HPTEFLAGS | _PAGE_SPECIAL) |
| 64 | 64 | ||
| 65 | /* Bits to mask out from a PMD to get to the PTE page */ | 65 | /* Bits to mask out from a PMD to get to the PTE page */ |
| 66 | #define PMD_MASKED_BITS 0 | 66 | #define PMD_MASKED_BITS 0 |
diff --git a/arch/powerpc/include/asm/pgtable-64k.h b/arch/powerpc/include/asm/pgtable-64k.h index 07b0d8f09cb6..7389003349a6 100644 --- a/arch/powerpc/include/asm/pgtable-64k.h +++ b/arch/powerpc/include/asm/pgtable-64k.h | |||
| @@ -114,7 +114,7 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd) | |||
| 114 | * pgprot changes | 114 | * pgprot changes |
| 115 | */ | 115 | */ |
| 116 | #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \ | 116 | #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \ |
| 117 | _PAGE_ACCESSED) | 117 | _PAGE_ACCESSED | _PAGE_SPECIAL) |
| 118 | 118 | ||
| 119 | /* Bits to mask out from a PMD to get to the PTE page */ | 119 | /* Bits to mask out from a PMD to get to the PTE page */ |
| 120 | #define PMD_MASKED_BITS 0x1ff | 120 | #define PMD_MASKED_BITS 0x1ff |
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h index f69a4d977729..820b5f0a35ce 100644 --- a/arch/powerpc/include/asm/pgtable-ppc32.h +++ b/arch/powerpc/include/asm/pgtable-ppc32.h | |||
| @@ -429,7 +429,8 @@ extern int icache_44x_need_flush; | |||
| 429 | #define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE() | 429 | #define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE() |
| 430 | #endif | 430 | #endif |
| 431 | 431 | ||
| 432 | #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) | 432 | #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ |
| 433 | _PAGE_SPECIAL) | ||
| 433 | 434 | ||
| 434 | 435 | ||
| 435 | #define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \ | 436 | #define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \ |
diff --git a/arch/powerpc/include/asm/seccomp.h b/arch/powerpc/include/asm/seccomp.h index 853765eb1f65..00c1d9133cfe 100644 --- a/arch/powerpc/include/asm/seccomp.h +++ b/arch/powerpc/include/asm/seccomp.h | |||
| @@ -1,10 +1,6 @@ | |||
| 1 | #ifndef _ASM_POWERPC_SECCOMP_H | 1 | #ifndef _ASM_POWERPC_SECCOMP_H |
| 2 | #define _ASM_POWERPC_SECCOMP_H | 2 | #define _ASM_POWERPC_SECCOMP_H |
| 3 | 3 | ||
| 4 | #ifdef __KERNEL__ | ||
| 5 | #include <linux/thread_info.h> | ||
| 6 | #endif | ||
| 7 | |||
| 8 | #include <linux/unistd.h> | 4 | #include <linux/unistd.h> |
| 9 | 5 | ||
| 10 | #define __NR_seccomp_read __NR_read | 6 | #define __NR_seccomp_read __NR_read |
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c index 5af4e9b2dbe2..73cb6a3229ae 100644 --- a/arch/powerpc/kernel/align.c +++ b/arch/powerpc/kernel/align.c | |||
| @@ -367,27 +367,24 @@ static int emulate_multiple(struct pt_regs *regs, unsigned char __user *addr, | |||
| 367 | static int emulate_fp_pair(unsigned char __user *addr, unsigned int reg, | 367 | static int emulate_fp_pair(unsigned char __user *addr, unsigned int reg, |
| 368 | unsigned int flags) | 368 | unsigned int flags) |
| 369 | { | 369 | { |
| 370 | char *ptr = (char *) ¤t->thread.TS_FPR(reg); | 370 | char *ptr0 = (char *) ¤t->thread.TS_FPR(reg); |
| 371 | int i, ret; | 371 | char *ptr1 = (char *) ¤t->thread.TS_FPR(reg+1); |
| 372 | int i, ret, sw = 0; | ||
| 372 | 373 | ||
| 373 | if (!(flags & F)) | 374 | if (!(flags & F)) |
| 374 | return 0; | 375 | return 0; |
| 375 | if (reg & 1) | 376 | if (reg & 1) |
| 376 | return 0; /* invalid form: FRS/FRT must be even */ | 377 | return 0; /* invalid form: FRS/FRT must be even */ |
| 377 | if (!(flags & SW)) { | 378 | if (flags & SW) |
| 378 | /* not byte-swapped - easy */ | 379 | sw = 7; |
| 379 | if (!(flags & ST)) | 380 | ret = 0; |
| 380 | ret = __copy_from_user(ptr, addr, 16); | 381 | for (i = 0; i < 8; ++i) { |
| 381 | else | 382 | if (!(flags & ST)) { |
| 382 | ret = __copy_to_user(addr, ptr, 16); | 383 | ret |= __get_user(ptr0[i^sw], addr + i); |
| 383 | } else { | 384 | ret |= __get_user(ptr1[i^sw], addr + i + 8); |
| 384 | /* each FPR value is byte-swapped separately */ | 385 | } else { |
| 385 | ret = 0; | 386 | ret |= __put_user(ptr0[i^sw], addr + i); |
| 386 | for (i = 0; i < 16; ++i) { | 387 | ret |= __put_user(ptr1[i^sw], addr + i + 8); |
| 387 | if (!(flags & ST)) | ||
| 388 | ret |= __get_user(ptr[i^7], addr + i); | ||
| 389 | else | ||
| 390 | ret |= __put_user(ptr[i^7], addr + i); | ||
| 391 | } | 388 | } |
| 392 | } | 389 | } |
| 393 | if (ret) | 390 | if (ret) |
| @@ -646,11 +643,16 @@ static int emulate_vsx(unsigned char __user *addr, unsigned int reg, | |||
| 646 | unsigned int areg, struct pt_regs *regs, | 643 | unsigned int areg, struct pt_regs *regs, |
| 647 | unsigned int flags, unsigned int length) | 644 | unsigned int flags, unsigned int length) |
| 648 | { | 645 | { |
| 649 | char *ptr = (char *) ¤t->thread.TS_FPR(reg); | 646 | char *ptr; |
| 650 | int ret = 0; | 647 | int ret = 0; |
| 651 | 648 | ||
| 652 | flush_vsx_to_thread(current); | 649 | flush_vsx_to_thread(current); |
| 653 | 650 | ||
| 651 | if (reg < 32) | ||
| 652 | ptr = (char *) ¤t->thread.TS_FPR(reg); | ||
| 653 | else | ||
| 654 | ptr = (char *) ¤t->thread.vr[reg - 32]; | ||
| 655 | |||
| 654 | if (flags & ST) | 656 | if (flags & ST) |
| 655 | ret = __copy_to_user(addr, ptr, length); | 657 | ret = __copy_to_user(addr, ptr, length); |
| 656 | else { | 658 | else { |
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c index 2822c8ccfaaf..5f81256287f5 100644 --- a/arch/powerpc/kvm/powerpc.c +++ b/arch/powerpc/kvm/powerpc.c | |||
| @@ -125,6 +125,10 @@ static void kvmppc_free_vcpus(struct kvm *kvm) | |||
| 125 | } | 125 | } |
| 126 | } | 126 | } |
| 127 | 127 | ||
| 128 | void kvm_arch_sync_events(struct kvm *kvm) | ||
| 129 | { | ||
| 130 | } | ||
| 131 | |||
| 128 | void kvm_arch_destroy_vm(struct kvm *kvm) | 132 | void kvm_arch_destroy_vm(struct kvm *kvm) |
| 129 | { | 133 | { |
| 130 | kvmppc_free_vcpus(kvm); | 134 | kvmppc_free_vcpus(kvm); |
diff --git a/arch/powerpc/lib/copyuser_64.S b/arch/powerpc/lib/copyuser_64.S index 70693a5c12a1..693b14a778fa 100644 --- a/arch/powerpc/lib/copyuser_64.S +++ b/arch/powerpc/lib/copyuser_64.S | |||
| @@ -62,18 +62,19 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD) | |||
| 62 | 72: std r8,8(r3) | 62 | 72: std r8,8(r3) |
| 63 | beq+ 3f | 63 | beq+ 3f |
| 64 | addi r3,r3,16 | 64 | addi r3,r3,16 |
| 65 | 23: ld r9,8(r4) | ||
| 66 | .Ldo_tail: | 65 | .Ldo_tail: |
| 67 | bf cr7*4+1,1f | 66 | bf cr7*4+1,1f |
| 68 | rotldi r9,r9,32 | 67 | 23: lwz r9,8(r4) |
| 68 | addi r4,r4,4 | ||
| 69 | 73: stw r9,0(r3) | 69 | 73: stw r9,0(r3) |
| 70 | addi r3,r3,4 | 70 | addi r3,r3,4 |
| 71 | 1: bf cr7*4+2,2f | 71 | 1: bf cr7*4+2,2f |
| 72 | rotldi r9,r9,16 | 72 | 44: lhz r9,8(r4) |
| 73 | addi r4,r4,2 | ||
| 73 | 74: sth r9,0(r3) | 74 | 74: sth r9,0(r3) |
| 74 | addi r3,r3,2 | 75 | addi r3,r3,2 |
| 75 | 2: bf cr7*4+3,3f | 76 | 2: bf cr7*4+3,3f |
| 76 | rotldi r9,r9,8 | 77 | 45: lbz r9,8(r4) |
| 77 | 75: stb r9,0(r3) | 78 | 75: stb r9,0(r3) |
| 78 | 3: li r3,0 | 79 | 3: li r3,0 |
| 79 | blr | 80 | blr |
| @@ -141,11 +142,24 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD) | |||
| 141 | 6: cmpwi cr1,r5,8 | 142 | 6: cmpwi cr1,r5,8 |
| 142 | addi r3,r3,32 | 143 | addi r3,r3,32 |
| 143 | sld r9,r9,r10 | 144 | sld r9,r9,r10 |
| 144 | ble cr1,.Ldo_tail | 145 | ble cr1,7f |
| 145 | 34: ld r0,8(r4) | 146 | 34: ld r0,8(r4) |
| 146 | srd r7,r0,r11 | 147 | srd r7,r0,r11 |
| 147 | or r9,r7,r9 | 148 | or r9,r7,r9 |
| 148 | b .Ldo_tail | 149 | 7: |
| 150 | bf cr7*4+1,1f | ||
| 151 | rotldi r9,r9,32 | ||
| 152 | 94: stw r9,0(r3) | ||
| 153 | addi r3,r3,4 | ||
| 154 | 1: bf cr7*4+2,2f | ||
| 155 | rotldi r9,r9,16 | ||
| 156 | 95: sth r9,0(r3) | ||
| 157 | addi r3,r3,2 | ||
| 158 | 2: bf cr7*4+3,3f | ||
| 159 | rotldi r9,r9,8 | ||
| 160 | 96: stb r9,0(r3) | ||
| 161 | 3: li r3,0 | ||
| 162 | blr | ||
| 149 | 163 | ||
| 150 | .Ldst_unaligned: | 164 | .Ldst_unaligned: |
| 151 | PPC_MTOCRF 0x01,r6 /* put #bytes to 8B bdry into cr7 */ | 165 | PPC_MTOCRF 0x01,r6 /* put #bytes to 8B bdry into cr7 */ |
| @@ -218,7 +232,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD) | |||
| 218 | 121: | 232 | 121: |
| 219 | 132: | 233 | 132: |
| 220 | addi r3,r3,8 | 234 | addi r3,r3,8 |
| 221 | 123: | ||
| 222 | 134: | 235 | 134: |
| 223 | 135: | 236 | 135: |
| 224 | 138: | 237 | 138: |
| @@ -226,6 +239,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD) | |||
| 226 | 140: | 239 | 140: |
| 227 | 141: | 240 | 141: |
| 228 | 142: | 241 | 142: |
| 242 | 123: | ||
| 243 | 144: | ||
| 244 | 145: | ||
| 229 | 245 | ||
| 230 | /* | 246 | /* |
| 231 | * here we have had a fault on a load and r3 points to the first | 247 | * here we have had a fault on a load and r3 points to the first |
| @@ -309,6 +325,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD) | |||
| 309 | 187: | 325 | 187: |
| 310 | 188: | 326 | 188: |
| 311 | 189: | 327 | 189: |
| 328 | 194: | ||
| 329 | 195: | ||
| 330 | 196: | ||
| 312 | 1: | 331 | 1: |
| 313 | ld r6,-24(r1) | 332 | ld r6,-24(r1) |
| 314 | ld r5,-8(r1) | 333 | ld r5,-8(r1) |
| @@ -329,7 +348,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD) | |||
| 329 | .llong 72b,172b | 348 | .llong 72b,172b |
| 330 | .llong 23b,123b | 349 | .llong 23b,123b |
| 331 | .llong 73b,173b | 350 | .llong 73b,173b |
| 351 | .llong 44b,144b | ||
| 332 | .llong 74b,174b | 352 | .llong 74b,174b |
| 353 | .llong 45b,145b | ||
| 333 | .llong 75b,175b | 354 | .llong 75b,175b |
| 334 | .llong 24b,124b | 355 | .llong 24b,124b |
| 335 | .llong 25b,125b | 356 | .llong 25b,125b |
| @@ -347,6 +368,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD) | |||
| 347 | .llong 79b,179b | 368 | .llong 79b,179b |
| 348 | .llong 80b,180b | 369 | .llong 80b,180b |
| 349 | .llong 34b,134b | 370 | .llong 34b,134b |
| 371 | .llong 94b,194b | ||
| 372 | .llong 95b,195b | ||
| 373 | .llong 96b,196b | ||
| 350 | .llong 35b,135b | 374 | .llong 35b,135b |
| 351 | .llong 81b,181b | 375 | .llong 81b,181b |
| 352 | .llong 36b,136b | 376 | .llong 36b,136b |
diff --git a/arch/powerpc/lib/memcpy_64.S b/arch/powerpc/lib/memcpy_64.S index fe2d34e5332d..e178922b2c21 100644 --- a/arch/powerpc/lib/memcpy_64.S +++ b/arch/powerpc/lib/memcpy_64.S | |||
| @@ -53,18 +53,19 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD) | |||
| 53 | 3: std r8,8(r3) | 53 | 3: std r8,8(r3) |
| 54 | beq 3f | 54 | beq 3f |
| 55 | addi r3,r3,16 | 55 | addi r3,r3,16 |
| 56 | ld r9,8(r4) | ||
| 57 | .Ldo_tail: | 56 | .Ldo_tail: |
| 58 | bf cr7*4+1,1f | 57 | bf cr7*4+1,1f |
| 59 | rotldi r9,r9,32 | 58 | lwz r9,8(r4) |
| 59 | addi r4,r4,4 | ||
| 60 | stw r9,0(r3) | 60 | stw r9,0(r3) |
| 61 | addi r3,r3,4 | 61 | addi r3,r3,4 |
| 62 | 1: bf cr7*4+2,2f | 62 | 1: bf cr7*4+2,2f |
| 63 | rotldi r9,r9,16 | 63 | lhz r9,8(r4) |
| 64 | addi r4,r4,2 | ||
| 64 | sth r9,0(r3) | 65 | sth r9,0(r3) |
| 65 | addi r3,r3,2 | 66 | addi r3,r3,2 |
| 66 | 2: bf cr7*4+3,3f | 67 | 2: bf cr7*4+3,3f |
| 67 | rotldi r9,r9,8 | 68 | lbz r9,8(r4) |
| 68 | stb r9,0(r3) | 69 | stb r9,0(r3) |
| 69 | 3: ld r3,48(r1) /* return dest pointer */ | 70 | 3: ld r3,48(r1) /* return dest pointer */ |
| 70 | blr | 71 | blr |
| @@ -133,11 +134,24 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD) | |||
| 133 | cmpwi cr1,r5,8 | 134 | cmpwi cr1,r5,8 |
| 134 | addi r3,r3,32 | 135 | addi r3,r3,32 |
| 135 | sld r9,r9,r10 | 136 | sld r9,r9,r10 |
| 136 | ble cr1,.Ldo_tail | 137 | ble cr1,6f |
| 137 | ld r0,8(r4) | 138 | ld r0,8(r4) |
| 138 | srd r7,r0,r11 | 139 | srd r7,r0,r11 |
| 139 | or r9,r7,r9 | 140 | or r9,r7,r9 |
| 140 | b .Ldo_tail | 141 | 6: |
| 142 | bf cr7*4+1,1f | ||
| 143 | rotldi r9,r9,32 | ||
| 144 | stw r9,0(r3) | ||
| 145 | addi r3,r3,4 | ||
| 146 | 1: bf cr7*4+2,2f | ||
| 147 | rotldi r9,r9,16 | ||
| 148 | sth r9,0(r3) | ||
| 149 | addi r3,r3,2 | ||
| 150 | 2: bf cr7*4+3,3f | ||
| 151 | rotldi r9,r9,8 | ||
| 152 | stb r9,0(r3) | ||
| 153 | 3: ld r3,48(r1) /* return dest pointer */ | ||
| 154 | blr | ||
| 141 | 155 | ||
| 142 | .Ldst_unaligned: | 156 | .Ldst_unaligned: |
| 143 | PPC_MTOCRF 0x01,r6 # put #bytes to 8B bdry into cr7 | 157 | PPC_MTOCRF 0x01,r6 # put #bytes to 8B bdry into cr7 |
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index 7393bd76d698..5ac08b8ab654 100644 --- a/arch/powerpc/mm/numa.c +++ b/arch/powerpc/mm/numa.c | |||
| @@ -19,6 +19,7 @@ | |||
| 19 | #include <linux/notifier.h> | 19 | #include <linux/notifier.h> |
| 20 | #include <linux/lmb.h> | 20 | #include <linux/lmb.h> |
| 21 | #include <linux/of.h> | 21 | #include <linux/of.h> |
| 22 | #include <linux/pfn.h> | ||
| 22 | #include <asm/sparsemem.h> | 23 | #include <asm/sparsemem.h> |
| 23 | #include <asm/prom.h> | 24 | #include <asm/prom.h> |
| 24 | #include <asm/system.h> | 25 | #include <asm/system.h> |
| @@ -882,7 +883,7 @@ static void mark_reserved_regions_for_nid(int nid) | |||
| 882 | unsigned long physbase = lmb.reserved.region[i].base; | 883 | unsigned long physbase = lmb.reserved.region[i].base; |
| 883 | unsigned long size = lmb.reserved.region[i].size; | 884 | unsigned long size = lmb.reserved.region[i].size; |
| 884 | unsigned long start_pfn = physbase >> PAGE_SHIFT; | 885 | unsigned long start_pfn = physbase >> PAGE_SHIFT; |
| 885 | unsigned long end_pfn = ((physbase + size) >> PAGE_SHIFT); | 886 | unsigned long end_pfn = PFN_UP(physbase + size); |
| 886 | struct node_active_region node_ar; | 887 | struct node_active_region node_ar; |
| 887 | unsigned long node_end_pfn = node->node_start_pfn + | 888 | unsigned long node_end_pfn = node->node_start_pfn + |
| 888 | node->node_spanned_pages; | 889 | node->node_spanned_pages; |
| @@ -908,7 +909,7 @@ static void mark_reserved_regions_for_nid(int nid) | |||
| 908 | */ | 909 | */ |
| 909 | if (end_pfn > node_ar.end_pfn) | 910 | if (end_pfn > node_ar.end_pfn) |
| 910 | reserve_size = (node_ar.end_pfn << PAGE_SHIFT) | 911 | reserve_size = (node_ar.end_pfn << PAGE_SHIFT) |
| 911 | - (start_pfn << PAGE_SHIFT); | 912 | - physbase; |
| 912 | /* | 913 | /* |
| 913 | * Only worry about *this* node, others may not | 914 | * Only worry about *this* node, others may not |
| 914 | * yet have valid NODE_DATA(). | 915 | * yet have valid NODE_DATA(). |
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c index fb371f5ce132..d6b772ba3b8f 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc610.c +++ b/arch/powerpc/platforms/86xx/gef_sbc610.c | |||
| @@ -142,6 +142,10 @@ static void __init gef_sbc610_nec_fixup(struct pci_dev *pdev) | |||
| 142 | { | 142 | { |
| 143 | unsigned int val; | 143 | unsigned int val; |
| 144 | 144 | ||
| 145 | /* Do not do the fixup on other platforms! */ | ||
| 146 | if (!machine_is(gef_sbc610)) | ||
| 147 | return; | ||
| 148 | |||
| 145 | printk(KERN_INFO "Running NEC uPD720101 Fixup\n"); | 149 | printk(KERN_INFO "Running NEC uPD720101 Fixup\n"); |
| 146 | 150 | ||
| 147 | /* Ensure ports 1, 2, 3, 4 & 5 are enabled */ | 151 | /* Ensure ports 1, 2, 3, 4 & 5 are enabled */ |
diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c index 67de6bf3db3d..d281cc0bca71 100644 --- a/arch/powerpc/platforms/ps3/mm.c +++ b/arch/powerpc/platforms/ps3/mm.c | |||
| @@ -328,7 +328,7 @@ static int __init ps3_mm_add_memory(void) | |||
| 328 | return result; | 328 | return result; |
| 329 | } | 329 | } |
| 330 | 330 | ||
| 331 | core_initcall(ps3_mm_add_memory); | 331 | device_initcall(ps3_mm_add_memory); |
| 332 | 332 | ||
| 333 | /*============================================================================*/ | 333 | /*============================================================================*/ |
| 334 | /* dma routines */ | 334 | /* dma routines */ |
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index 77fae5f64f2e..5558d932b4d5 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c | |||
| @@ -204,6 +204,23 @@ static int __init ppc4xx_setup_one_pci_PMM(struct pci_controller *hose, | |||
| 204 | { | 204 | { |
| 205 | u32 ma, pcila, pciha; | 205 | u32 ma, pcila, pciha; |
| 206 | 206 | ||
| 207 | /* Hack warning ! The "old" PCI 2.x cell only let us configure the low | ||
| 208 | * 32-bit of incoming PLB addresses. The top 4 bits of the 36-bit | ||
| 209 | * address are actually hard wired to a value that appears to depend | ||
| 210 | * on the specific SoC. For example, it's 0 on 440EP and 1 on 440EPx. | ||
| 211 | * | ||
| 212 | * The trick here is we just crop those top bits and ignore them when | ||
| 213 | * programming the chip. That means the device-tree has to be right | ||
| 214 | * for the specific part used (we don't print a warning if it's wrong | ||
| 215 | * but on the other hand, you'll crash quickly enough), but at least | ||
| 216 | * this code should work whatever the hard coded value is | ||
| 217 | */ | ||
| 218 | plb_addr &= 0xffffffffull; | ||
| 219 | |||
| 220 | /* Note: Due to the above hack, the test below doesn't actually test | ||
| 221 | * if you address is above 4G, but it tests that address and | ||
| 222 | * (address + size) are both contained in the same 4G | ||
| 223 | */ | ||
| 207 | if ((plb_addr + size) > 0xffffffffull || !is_power_of_2(size) || | 224 | if ((plb_addr + size) > 0xffffffffull || !is_power_of_2(size) || |
| 208 | size < 0x1000 || (plb_addr & (size - 1)) != 0) { | 225 | size < 0x1000 || (plb_addr & (size - 1)) != 0) { |
| 209 | printk(KERN_WARNING "%s: Resource out of range\n", | 226 | printk(KERN_WARNING "%s: Resource out of range\n", |
diff --git a/arch/s390/crypto/aes_s390.c b/arch/s390/crypto/aes_s390.c index c42cd898f68b..6118890c946d 100644 --- a/arch/s390/crypto/aes_s390.c +++ b/arch/s390/crypto/aes_s390.c | |||
| @@ -556,7 +556,7 @@ static void __exit aes_s390_fini(void) | |||
| 556 | module_init(aes_s390_init); | 556 | module_init(aes_s390_init); |
| 557 | module_exit(aes_s390_fini); | 557 | module_exit(aes_s390_fini); |
| 558 | 558 | ||
| 559 | MODULE_ALIAS("aes"); | 559 | MODULE_ALIAS("aes-all"); |
| 560 | 560 | ||
| 561 | MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm"); | 561 | MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm"); |
| 562 | MODULE_LICENSE("GPL"); | 562 | MODULE_LICENSE("GPL"); |
diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h index 521726430afa..95b0f7db3c69 100644 --- a/arch/s390/include/asm/cputime.h +++ b/arch/s390/include/asm/cputime.h | |||
| @@ -145,7 +145,7 @@ cputime_to_timeval(const cputime_t cputime, struct timeval *value) | |||
| 145 | value->tv_usec = rp.subreg.even / 4096; | 145 | value->tv_usec = rp.subreg.even / 4096; |
| 146 | value->tv_sec = rp.subreg.odd; | 146 | value->tv_sec = rp.subreg.odd; |
| 147 | #else | 147 | #else |
| 148 | value->tv_usec = cputime % 4096000000ULL; | 148 | value->tv_usec = (cputime % 4096000000ULL) / 4096; |
| 149 | value->tv_sec = cputime / 4096000000ULL; | 149 | value->tv_sec = cputime / 4096000000ULL; |
| 150 | #endif | 150 | #endif |
| 151 | } | 151 | } |
diff --git a/arch/s390/include/asm/setup.h b/arch/s390/include/asm/setup.h index 2bd9faeb3919..e8bd6ac22c99 100644 --- a/arch/s390/include/asm/setup.h +++ b/arch/s390/include/asm/setup.h | |||
| @@ -43,6 +43,8 @@ struct mem_chunk { | |||
| 43 | 43 | ||
| 44 | extern struct mem_chunk memory_chunk[]; | 44 | extern struct mem_chunk memory_chunk[]; |
| 45 | extern unsigned long real_memory_size; | 45 | extern unsigned long real_memory_size; |
| 46 | extern int memory_end_set; | ||
| 47 | extern unsigned long memory_end; | ||
| 46 | 48 | ||
| 47 | void detect_memory_layout(struct mem_chunk chunk[]); | 49 | void detect_memory_layout(struct mem_chunk chunk[]); |
| 48 | 50 | ||
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c index d825f4950e4e..c5cfb6185eac 100644 --- a/arch/s390/kernel/setup.c +++ b/arch/s390/kernel/setup.c | |||
| @@ -82,7 +82,9 @@ char elf_platform[ELF_PLATFORM_SIZE]; | |||
| 82 | 82 | ||
| 83 | struct mem_chunk __initdata memory_chunk[MEMORY_CHUNKS]; | 83 | struct mem_chunk __initdata memory_chunk[MEMORY_CHUNKS]; |
| 84 | volatile int __cpu_logical_map[NR_CPUS]; /* logical cpu to cpu address */ | 84 | volatile int __cpu_logical_map[NR_CPUS]; /* logical cpu to cpu address */ |
| 85 | static unsigned long __initdata memory_end; | 85 | |
| 86 | int __initdata memory_end_set; | ||
| 87 | unsigned long __initdata memory_end; | ||
| 86 | 88 | ||
| 87 | /* | 89 | /* |
| 88 | * This is set up by the setup-routine at boot-time | 90 | * This is set up by the setup-routine at boot-time |
| @@ -281,6 +283,7 @@ void (*pm_power_off)(void) = machine_power_off; | |||
| 281 | static int __init early_parse_mem(char *p) | 283 | static int __init early_parse_mem(char *p) |
| 282 | { | 284 | { |
| 283 | memory_end = memparse(p, &p); | 285 | memory_end = memparse(p, &p); |
| 286 | memory_end_set = 1; | ||
| 284 | return 0; | 287 | return 0; |
| 285 | } | 288 | } |
| 286 | early_param("mem", early_parse_mem); | 289 | early_param("mem", early_parse_mem); |
| @@ -508,8 +511,10 @@ static void __init setup_memory_end(void) | |||
| 508 | int i; | 511 | int i; |
| 509 | 512 | ||
| 510 | #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE) | 513 | #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE) |
| 511 | if (ipl_info.type == IPL_TYPE_FCP_DUMP) | 514 | if (ipl_info.type == IPL_TYPE_FCP_DUMP) { |
| 512 | memory_end = ZFCPDUMP_HSA_SIZE; | 515 | memory_end = ZFCPDUMP_HSA_SIZE; |
| 516 | memory_end_set = 1; | ||
| 517 | } | ||
| 513 | #endif | 518 | #endif |
| 514 | memory_size = 0; | 519 | memory_size = 0; |
| 515 | memory_end &= PAGE_MASK; | 520 | memory_end &= PAGE_MASK; |
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c index be8497186b96..0d33893e1e89 100644 --- a/arch/s390/kvm/kvm-s390.c +++ b/arch/s390/kvm/kvm-s390.c | |||
| @@ -212,6 +212,10 @@ static void kvm_free_vcpus(struct kvm *kvm) | |||
| 212 | } | 212 | } |
| 213 | } | 213 | } |
| 214 | 214 | ||
| 215 | void kvm_arch_sync_events(struct kvm *kvm) | ||
| 216 | { | ||
| 217 | } | ||
| 218 | |||
| 215 | void kvm_arch_destroy_vm(struct kvm *kvm) | 219 | void kvm_arch_destroy_vm(struct kvm *kvm) |
| 216 | { | 220 | { |
| 217 | kvm_free_vcpus(kvm); | 221 | kvm_free_vcpus(kvm); |
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c index 7c35787d29b4..15b6d450fbf0 100644 --- a/arch/sh/boards/board-ap325rxa.c +++ b/arch/sh/boards/board-ap325rxa.c | |||
| @@ -22,7 +22,7 @@ | |||
| 22 | #include <linux/gpio.h> | 22 | #include <linux/gpio.h> |
| 23 | #include <linux/spi/spi.h> | 23 | #include <linux/spi/spi.h> |
| 24 | #include <linux/spi/spi_gpio.h> | 24 | #include <linux/spi/spi_gpio.h> |
| 25 | #include <media/ov772x.h> | 25 | #include <media/soc_camera.h> |
| 26 | #include <media/soc_camera_platform.h> | 26 | #include <media/soc_camera_platform.h> |
| 27 | #include <media/sh_mobile_ceu.h> | 27 | #include <media/sh_mobile_ceu.h> |
| 28 | #include <video/sh_mobile_lcdc.h> | 28 | #include <video/sh_mobile_lcdc.h> |
| @@ -224,7 +224,6 @@ static void camera_power(int val) | |||
| 224 | } | 224 | } |
| 225 | 225 | ||
| 226 | #ifdef CONFIG_I2C | 226 | #ifdef CONFIG_I2C |
| 227 | /* support for the old ncm03j camera */ | ||
| 228 | static unsigned char camera_ncm03j_magic[] = | 227 | static unsigned char camera_ncm03j_magic[] = |
| 229 | { | 228 | { |
| 230 | 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8, | 229 | 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8, |
| @@ -245,23 +244,6 @@ static unsigned char camera_ncm03j_magic[] = | |||
| 245 | 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F, | 244 | 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F, |
| 246 | }; | 245 | }; |
| 247 | 246 | ||
| 248 | static int camera_probe(void) | ||
| 249 | { | ||
| 250 | struct i2c_adapter *a = i2c_get_adapter(0); | ||
| 251 | struct i2c_msg msg; | ||
| 252 | int ret; | ||
| 253 | |||
| 254 | camera_power(1); | ||
| 255 | msg.addr = 0x6e; | ||
| 256 | msg.buf = camera_ncm03j_magic; | ||
| 257 | msg.len = 2; | ||
| 258 | msg.flags = 0; | ||
| 259 | ret = i2c_transfer(a, &msg, 1); | ||
| 260 | camera_power(0); | ||
| 261 | |||
| 262 | return ret; | ||
| 263 | } | ||
| 264 | |||
| 265 | static int camera_set_capture(struct soc_camera_platform_info *info, | 247 | static int camera_set_capture(struct soc_camera_platform_info *info, |
| 266 | int enable) | 248 | int enable) |
| 267 | { | 249 | { |
| @@ -313,35 +295,8 @@ static struct platform_device camera_device = { | |||
| 313 | .platform_data = &camera_info, | 295 | .platform_data = &camera_info, |
| 314 | }, | 296 | }, |
| 315 | }; | 297 | }; |
| 316 | |||
| 317 | static int __init camera_setup(void) | ||
| 318 | { | ||
| 319 | if (camera_probe() > 0) | ||
| 320 | platform_device_register(&camera_device); | ||
| 321 | |||
| 322 | return 0; | ||
| 323 | } | ||
| 324 | late_initcall(camera_setup); | ||
| 325 | |||
| 326 | #endif /* CONFIG_I2C */ | 298 | #endif /* CONFIG_I2C */ |
| 327 | 299 | ||
| 328 | static int ov7725_power(struct device *dev, int mode) | ||
| 329 | { | ||
| 330 | camera_power(0); | ||
| 331 | if (mode) | ||
| 332 | camera_power(1); | ||
| 333 | |||
| 334 | return 0; | ||
| 335 | } | ||
| 336 | |||
| 337 | static struct ov772x_camera_info ov7725_info = { | ||
| 338 | .buswidth = SOCAM_DATAWIDTH_8, | ||
| 339 | .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP, | ||
| 340 | .link = { | ||
| 341 | .power = ov7725_power, | ||
| 342 | }, | ||
| 343 | }; | ||
| 344 | |||
| 345 | static struct sh_mobile_ceu_info sh_mobile_ceu_info = { | 300 | static struct sh_mobile_ceu_info sh_mobile_ceu_info = { |
| 346 | .flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | | 301 | .flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | |
| 347 | SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, | 302 | SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, |
| @@ -392,6 +347,9 @@ static struct platform_device *ap325rxa_devices[] __initdata = { | |||
| 392 | &ap325rxa_nor_flash_device, | 347 | &ap325rxa_nor_flash_device, |
| 393 | &lcdc_device, | 348 | &lcdc_device, |
| 394 | &ceu_device, | 349 | &ceu_device, |
| 350 | #ifdef CONFIG_I2C | ||
| 351 | &camera_device, | ||
| 352 | #endif | ||
| 395 | &nand_flash_device, | 353 | &nand_flash_device, |
| 396 | &sdcard_cn3_device, | 354 | &sdcard_cn3_device, |
| 397 | }; | 355 | }; |
| @@ -400,10 +358,6 @@ static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = { | |||
| 400 | { | 358 | { |
| 401 | I2C_BOARD_INFO("pcf8563", 0x51), | 359 | I2C_BOARD_INFO("pcf8563", 0x51), |
| 402 | }, | 360 | }, |
| 403 | { | ||
| 404 | I2C_BOARD_INFO("ov772x", 0x21), | ||
| 405 | .platform_data = &ov7725_info, | ||
| 406 | }, | ||
| 407 | }; | 361 | }; |
| 408 | 362 | ||
| 409 | static struct spi_board_info ap325rxa_spi_devices[] = { | 363 | static struct spi_board_info ap325rxa_spi_devices[] = { |
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c index 020a96fe961a..4a5e59732334 100644 --- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c | |||
| @@ -18,8 +18,8 @@ | |||
| 18 | #include <asm/freq.h> | 18 | #include <asm/freq.h> |
| 19 | #include <asm/io.h> | 19 | #include <asm/io.h> |
| 20 | 20 | ||
| 21 | const static int pll1rate[]={1,2,3,4,6,8}; | 21 | static const int pll1rate[]={1,2,3,4,6,8}; |
| 22 | const static int pfc_divisors[]={1,2,3,4,6,8,12}; | 22 | static const int pfc_divisors[]={1,2,3,4,6,8,12}; |
| 23 | #define ifc_divisors pfc_divisors | 23 | #define ifc_divisors pfc_divisors |
| 24 | 24 | ||
| 25 | #if (CONFIG_SH_CLK_MD == 0) | 25 | #if (CONFIG_SH_CLK_MD == 0) |
diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h index f260b58f5ce9..0e706257918f 100644 --- a/arch/sparc/include/asm/compat.h +++ b/arch/sparc/include/asm/compat.h | |||
| @@ -240,4 +240,9 @@ struct compat_shmid64_ds { | |||
| 240 | unsigned int __unused2; | 240 | unsigned int __unused2; |
| 241 | }; | 241 | }; |
| 242 | 242 | ||
| 243 | static inline int is_compat_task(void) | ||
| 244 | { | ||
| 245 | return test_thread_flag(TIF_32BIT); | ||
| 246 | } | ||
| 247 | |||
| 243 | #endif /* _ASM_SPARC64_COMPAT_H */ | 248 | #endif /* _ASM_SPARC64_COMPAT_H */ |
diff --git a/arch/sparc/include/asm/seccomp.h b/arch/sparc/include/asm/seccomp.h index 7fcd9968192b..adca1bce41d4 100644 --- a/arch/sparc/include/asm/seccomp.h +++ b/arch/sparc/include/asm/seccomp.h | |||
| @@ -1,11 +1,5 @@ | |||
| 1 | #ifndef _ASM_SECCOMP_H | 1 | #ifndef _ASM_SECCOMP_H |
| 2 | 2 | ||
| 3 | #include <linux/thread_info.h> /* already defines TIF_32BIT */ | ||
| 4 | |||
| 5 | #ifndef TIF_32BIT | ||
| 6 | #error "unexpected TIF_32BIT on sparc64" | ||
| 7 | #endif | ||
| 8 | |||
| 9 | #include <linux/unistd.h> | 3 | #include <linux/unistd.h> |
| 10 | 4 | ||
| 11 | #define __NR_seccomp_read __NR_read | 5 | #define __NR_seccomp_read __NR_read |
diff --git a/arch/sparc/kernel/chmc.c b/arch/sparc/kernel/chmc.c index 3b9f4d6e14a9..e1a9598e2a4d 100644 --- a/arch/sparc/kernel/chmc.c +++ b/arch/sparc/kernel/chmc.c | |||
| @@ -306,6 +306,7 @@ static int jbusmc_print_dimm(int syndrome_code, | |||
| 306 | buf[1] = '?'; | 306 | buf[1] = '?'; |
| 307 | buf[2] = '?'; | 307 | buf[2] = '?'; |
| 308 | buf[3] = '\0'; | 308 | buf[3] = '\0'; |
| 309 | return 0; | ||
| 309 | } | 310 | } |
| 310 | p = dp->controller; | 311 | p = dp->controller; |
| 311 | prop = &p->layout; | 312 | prop = &p->layout; |
diff --git a/arch/um/drivers/vde_user.c b/arch/um/drivers/vde_user.c index 56533db25343..c5c43253e6ce 100644 --- a/arch/um/drivers/vde_user.c +++ b/arch/um/drivers/vde_user.c | |||
| @@ -78,7 +78,7 @@ void vde_init_libstuff(struct vde_data *vpri, struct vde_init *init) | |||
| 78 | { | 78 | { |
| 79 | struct vde_open_args *args; | 79 | struct vde_open_args *args; |
| 80 | 80 | ||
| 81 | vpri->args = kmalloc(sizeof(struct vde_open_args), UM_GFP_KERNEL); | 81 | vpri->args = uml_kmalloc(sizeof(struct vde_open_args), UM_GFP_KERNEL); |
| 82 | if (vpri->args == NULL) { | 82 | if (vpri->args == NULL) { |
| 83 | printk(UM_KERN_ERR "vde_init_libstuff - vde_open_args " | 83 | printk(UM_KERN_ERR "vde_init_libstuff - vde_open_args " |
| 84 | "allocation failed"); | 84 | "allocation failed"); |
| @@ -91,8 +91,8 @@ void vde_init_libstuff(struct vde_data *vpri, struct vde_init *init) | |||
| 91 | args->group = init->group; | 91 | args->group = init->group; |
| 92 | args->mode = init->mode ? init->mode : 0700; | 92 | args->mode = init->mode ? init->mode : 0700; |
| 93 | 93 | ||
| 94 | args->port ? printk(UM_KERN_INFO "port %d", args->port) : | 94 | args->port ? printk("port %d", args->port) : |
| 95 | printk(UM_KERN_INFO "undefined port"); | 95 | printk("undefined port"); |
| 96 | } | 96 | } |
| 97 | 97 | ||
| 98 | int vde_user_read(void *conn, void *buf, int len) | 98 | int vde_user_read(void *conn, void *buf, int len) |
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 9c39095b33fc..bc2fbadff9f9 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
| @@ -1803,7 +1803,7 @@ config DMAR | |||
| 1803 | remapping devices. | 1803 | remapping devices. |
| 1804 | 1804 | ||
| 1805 | config DMAR_DEFAULT_ON | 1805 | config DMAR_DEFAULT_ON |
| 1806 | def_bool n | 1806 | def_bool y |
| 1807 | prompt "Enable DMA Remapping Devices by default" | 1807 | prompt "Enable DMA Remapping Devices by default" |
| 1808 | depends on DMAR | 1808 | depends on DMAR |
| 1809 | help | 1809 | help |
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug index 10d6cc3fd052..e1983fa025d2 100644 --- a/arch/x86/Kconfig.debug +++ b/arch/x86/Kconfig.debug | |||
| @@ -174,28 +174,8 @@ config IOMMU_LEAK | |||
| 174 | Add a simple leak tracer to the IOMMU code. This is useful when you | 174 | Add a simple leak tracer to the IOMMU code. This is useful when you |
| 175 | are debugging a buggy device driver that leaks IOMMU mappings. | 175 | are debugging a buggy device driver that leaks IOMMU mappings. |
| 176 | 176 | ||
| 177 | config MMIOTRACE | 177 | config HAVE_MMIOTRACE_SUPPORT |
| 178 | bool "Memory mapped IO tracing" | 178 | def_bool y |
| 179 | depends on DEBUG_KERNEL && PCI | ||
| 180 | select TRACING | ||
| 181 | help | ||
| 182 | Mmiotrace traces Memory Mapped I/O access and is meant for | ||
| 183 | debugging and reverse engineering. It is called from the ioremap | ||
| 184 | implementation and works via page faults. Tracing is disabled by | ||
| 185 | default and can be enabled at run-time. | ||
| 186 | |||
| 187 | See Documentation/tracers/mmiotrace.txt. | ||
| 188 | If you are not helping to develop drivers, say N. | ||
| 189 | |||
| 190 | config MMIOTRACE_TEST | ||
| 191 | tristate "Test module for mmiotrace" | ||
| 192 | depends on MMIOTRACE && m | ||
| 193 | help | ||
| 194 | This is a dumb module for testing mmiotrace. It is very dangerous | ||
| 195 | as it will write garbage to IO memory starting at a given address. | ||
| 196 | However, it should be safe to use on e.g. unused portion of VRAM. | ||
| 197 | |||
| 198 | Say N, unless you absolutely know what you are doing. | ||
| 199 | 179 | ||
| 200 | # | 180 | # |
| 201 | # IO delay types: | 181 | # IO delay types: |
diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h index ca5ffb2856b6..edc90f23e708 100644 --- a/arch/x86/include/asm/efi.h +++ b/arch/x86/include/asm/efi.h | |||
| @@ -37,8 +37,6 @@ extern unsigned long asmlinkage efi_call_phys(void *, ...); | |||
| 37 | 37 | ||
| 38 | #else /* !CONFIG_X86_32 */ | 38 | #else /* !CONFIG_X86_32 */ |
| 39 | 39 | ||
| 40 | #define MAX_EFI_IO_PAGES 100 | ||
| 41 | |||
| 42 | extern u64 efi_call0(void *fp); | 40 | extern u64 efi_call0(void *fp); |
| 43 | extern u64 efi_call1(void *fp, u64 arg1); | 41 | extern u64 efi_call1(void *fp, u64 arg1); |
| 44 | extern u64 efi_call2(void *fp, u64 arg1, u64 arg2); | 42 | extern u64 efi_call2(void *fp, u64 arg1, u64 arg2); |
diff --git a/arch/x86/include/asm/fixmap_64.h b/arch/x86/include/asm/fixmap_64.h index 00a30ab9b1a5..8be740977db8 100644 --- a/arch/x86/include/asm/fixmap_64.h +++ b/arch/x86/include/asm/fixmap_64.h | |||
| @@ -16,7 +16,6 @@ | |||
| 16 | #include <asm/apicdef.h> | 16 | #include <asm/apicdef.h> |
| 17 | #include <asm/page.h> | 17 | #include <asm/page.h> |
| 18 | #include <asm/vsyscall.h> | 18 | #include <asm/vsyscall.h> |
| 19 | #include <asm/efi.h> | ||
| 20 | 19 | ||
| 21 | /* | 20 | /* |
| 22 | * Here we define all the compile-time 'special' virtual | 21 | * Here we define all the compile-time 'special' virtual |
| @@ -43,9 +42,6 @@ enum fixed_addresses { | |||
| 43 | FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */ | 42 | FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */ |
| 44 | FIX_IO_APIC_BASE_0, | 43 | FIX_IO_APIC_BASE_0, |
| 45 | FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1, | 44 | FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1, |
| 46 | FIX_EFI_IO_MAP_LAST_PAGE, | ||
| 47 | FIX_EFI_IO_MAP_FIRST_PAGE = FIX_EFI_IO_MAP_LAST_PAGE | ||
| 48 | + MAX_EFI_IO_PAGES - 1, | ||
| 49 | #ifdef CONFIG_PARAVIRT | 45 | #ifdef CONFIG_PARAVIRT |
| 50 | FIX_PARAVIRT_BOOTMAP, | 46 | FIX_PARAVIRT_BOOTMAP, |
| 51 | #endif | 47 | #endif |
diff --git a/arch/x86/include/asm/i387.h b/arch/x86/include/asm/i387.h index 48f0004db8c9..71c9e5183982 100644 --- a/arch/x86/include/asm/i387.h +++ b/arch/x86/include/asm/i387.h | |||
| @@ -172,7 +172,13 @@ static inline void __save_init_fpu(struct task_struct *tsk) | |||
| 172 | 172 | ||
| 173 | #else /* CONFIG_X86_32 */ | 173 | #else /* CONFIG_X86_32 */ |
| 174 | 174 | ||
| 175 | extern void finit(void); | 175 | #ifdef CONFIG_MATH_EMULATION |
| 176 | extern void finit_task(struct task_struct *tsk); | ||
| 177 | #else | ||
| 178 | static inline void finit_task(struct task_struct *tsk) | ||
| 179 | { | ||
| 180 | } | ||
| 181 | #endif | ||
| 176 | 182 | ||
| 177 | static inline void tolerant_fwait(void) | 183 | static inline void tolerant_fwait(void) |
| 178 | { | 184 | { |
diff --git a/arch/x86/include/asm/iomap.h b/arch/x86/include/asm/iomap.h index c1f06289b14b..86af26091d6c 100644 --- a/arch/x86/include/asm/iomap.h +++ b/arch/x86/include/asm/iomap.h | |||
| @@ -23,6 +23,9 @@ | |||
| 23 | #include <asm/pgtable.h> | 23 | #include <asm/pgtable.h> |
| 24 | #include <asm/tlbflush.h> | 24 | #include <asm/tlbflush.h> |
| 25 | 25 | ||
| 26 | int | ||
| 27 | is_io_mapping_possible(resource_size_t base, unsigned long size); | ||
| 28 | |||
| 26 | void * | 29 | void * |
| 27 | iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot); | 30 | iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot); |
| 28 | 31 | ||
diff --git a/arch/x86/include/asm/kvm.h b/arch/x86/include/asm/kvm.h index d2e3bf3608af..886c9402ec45 100644 --- a/arch/x86/include/asm/kvm.h +++ b/arch/x86/include/asm/kvm.h | |||
| @@ -9,6 +9,13 @@ | |||
| 9 | #include <linux/types.h> | 9 | #include <linux/types.h> |
| 10 | #include <linux/ioctl.h> | 10 | #include <linux/ioctl.h> |
| 11 | 11 | ||
| 12 | /* Select x86 specific features in <linux/kvm.h> */ | ||
| 13 | #define __KVM_HAVE_PIT | ||
| 14 | #define __KVM_HAVE_IOAPIC | ||
| 15 | #define __KVM_HAVE_DEVICE_ASSIGNMENT | ||
| 16 | #define __KVM_HAVE_MSI | ||
| 17 | #define __KVM_HAVE_USER_NMI | ||
| 18 | |||
| 12 | /* Architectural interrupt line count. */ | 19 | /* Architectural interrupt line count. */ |
| 13 | #define KVM_NR_INTERRUPTS 256 | 20 | #define KVM_NR_INTERRUPTS 256 |
| 14 | 21 | ||
diff --git a/arch/x86/include/asm/mmzone_32.h b/arch/x86/include/asm/mmzone_32.h index 07f1af494ca5..105fb90a0635 100644 --- a/arch/x86/include/asm/mmzone_32.h +++ b/arch/x86/include/asm/mmzone_32.h | |||
| @@ -32,8 +32,6 @@ static inline void get_memcfg_numa(void) | |||
| 32 | get_memcfg_numa_flat(); | 32 | get_memcfg_numa_flat(); |
| 33 | } | 33 | } |
| 34 | 34 | ||
| 35 | extern int early_pfn_to_nid(unsigned long pfn); | ||
| 36 | |||
| 37 | extern void resume_map_numa_kva(pgd_t *pgd); | 35 | extern void resume_map_numa_kva(pgd_t *pgd); |
| 38 | 36 | ||
| 39 | #else /* !CONFIG_NUMA */ | 37 | #else /* !CONFIG_NUMA */ |
diff --git a/arch/x86/include/asm/mmzone_64.h b/arch/x86/include/asm/mmzone_64.h index a5b3817d4b9e..a29f48c2a322 100644 --- a/arch/x86/include/asm/mmzone_64.h +++ b/arch/x86/include/asm/mmzone_64.h | |||
| @@ -40,8 +40,6 @@ static inline __attribute__((pure)) int phys_to_nid(unsigned long addr) | |||
| 40 | #define node_end_pfn(nid) (NODE_DATA(nid)->node_start_pfn + \ | 40 | #define node_end_pfn(nid) (NODE_DATA(nid)->node_start_pfn + \ |
| 41 | NODE_DATA(nid)->node_spanned_pages) | 41 | NODE_DATA(nid)->node_spanned_pages) |
| 42 | 42 | ||
| 43 | extern int early_pfn_to_nid(unsigned long pfn); | ||
| 44 | |||
| 45 | #ifdef CONFIG_NUMA_EMU | 43 | #ifdef CONFIG_NUMA_EMU |
| 46 | #define FAKE_NODE_MIN_SIZE (64 * 1024 * 1024) | 44 | #define FAKE_NODE_MIN_SIZE (64 * 1024 * 1024) |
| 47 | #define FAKE_NODE_MIN_HASH_MASK (~(FAKE_NODE_MIN_SIZE - 1UL)) | 45 | #define FAKE_NODE_MIN_HASH_MASK (~(FAKE_NODE_MIN_SIZE - 1UL)) |
diff --git a/arch/x86/include/asm/page.h b/arch/x86/include/asm/page.h index e9873a2e8695..776579119a00 100644 --- a/arch/x86/include/asm/page.h +++ b/arch/x86/include/asm/page.h | |||
| @@ -57,7 +57,6 @@ typedef struct { pgdval_t pgd; } pgd_t; | |||
| 57 | typedef struct { pgprotval_t pgprot; } pgprot_t; | 57 | typedef struct { pgprotval_t pgprot; } pgprot_t; |
| 58 | 58 | ||
| 59 | extern int page_is_ram(unsigned long pagenr); | 59 | extern int page_is_ram(unsigned long pagenr); |
| 60 | extern int pagerange_is_ram(unsigned long start, unsigned long end); | ||
| 61 | extern int devmem_is_allowed(unsigned long pagenr); | 60 | extern int devmem_is_allowed(unsigned long pagenr); |
| 62 | extern void map_devmem(unsigned long pfn, unsigned long size, | 61 | extern void map_devmem(unsigned long pfn, unsigned long size, |
| 63 | pgprot_t vma_prot); | 62 | pgprot_t vma_prot); |
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h index c09a14127584..e299287e8e33 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h | |||
| @@ -1352,14 +1352,7 @@ static inline void arch_leave_lazy_cpu_mode(void) | |||
| 1352 | PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave); | 1352 | PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave); |
| 1353 | } | 1353 | } |
| 1354 | 1354 | ||
| 1355 | static inline void arch_flush_lazy_cpu_mode(void) | 1355 | void arch_flush_lazy_cpu_mode(void); |
| 1356 | { | ||
| 1357 | if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) { | ||
| 1358 | arch_leave_lazy_cpu_mode(); | ||
| 1359 | arch_enter_lazy_cpu_mode(); | ||
| 1360 | } | ||
| 1361 | } | ||
| 1362 | |||
| 1363 | 1356 | ||
| 1364 | #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE | 1357 | #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE |
| 1365 | static inline void arch_enter_lazy_mmu_mode(void) | 1358 | static inline void arch_enter_lazy_mmu_mode(void) |
| @@ -1372,13 +1365,7 @@ static inline void arch_leave_lazy_mmu_mode(void) | |||
| 1372 | PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave); | 1365 | PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave); |
| 1373 | } | 1366 | } |
| 1374 | 1367 | ||
| 1375 | static inline void arch_flush_lazy_mmu_mode(void) | 1368 | void arch_flush_lazy_mmu_mode(void); |
| 1376 | { | ||
| 1377 | if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) { | ||
| 1378 | arch_leave_lazy_mmu_mode(); | ||
| 1379 | arch_enter_lazy_mmu_mode(); | ||
| 1380 | } | ||
| 1381 | } | ||
| 1382 | 1369 | ||
| 1383 | static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, | 1370 | static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, |
| 1384 | unsigned long phys, pgprot_t flags) | 1371 | unsigned long phys, pgprot_t flags) |
diff --git a/arch/x86/include/asm/seccomp_32.h b/arch/x86/include/asm/seccomp_32.h index a6ad87b352c4..b811d6f5780c 100644 --- a/arch/x86/include/asm/seccomp_32.h +++ b/arch/x86/include/asm/seccomp_32.h | |||
| @@ -1,12 +1,6 @@ | |||
| 1 | #ifndef _ASM_X86_SECCOMP_32_H | 1 | #ifndef _ASM_X86_SECCOMP_32_H |
| 2 | #define _ASM_X86_SECCOMP_32_H | 2 | #define _ASM_X86_SECCOMP_32_H |
| 3 | 3 | ||
| 4 | #include <linux/thread_info.h> | ||
| 5 | |||
| 6 | #ifdef TIF_32BIT | ||
| 7 | #error "unexpected TIF_32BIT on i386" | ||
| 8 | #endif | ||
| 9 | |||
| 10 | #include <linux/unistd.h> | 4 | #include <linux/unistd.h> |
| 11 | 5 | ||
| 12 | #define __NR_seccomp_read __NR_read | 6 | #define __NR_seccomp_read __NR_read |
diff --git a/arch/x86/include/asm/seccomp_64.h b/arch/x86/include/asm/seccomp_64.h index 4171bb794e9e..84ec1bd161a5 100644 --- a/arch/x86/include/asm/seccomp_64.h +++ b/arch/x86/include/asm/seccomp_64.h | |||
| @@ -1,14 +1,6 @@ | |||
| 1 | #ifndef _ASM_X86_SECCOMP_64_H | 1 | #ifndef _ASM_X86_SECCOMP_64_H |
| 2 | #define _ASM_X86_SECCOMP_64_H | 2 | #define _ASM_X86_SECCOMP_64_H |
| 3 | 3 | ||
| 4 | #include <linux/thread_info.h> | ||
| 5 | |||
| 6 | #ifdef TIF_32BIT | ||
| 7 | #error "unexpected TIF_32BIT on x86_64" | ||
| 8 | #else | ||
| 9 | #define TIF_32BIT TIF_IA32 | ||
| 10 | #endif | ||
| 11 | |||
| 12 | #include <linux/unistd.h> | 4 | #include <linux/unistd.h> |
| 13 | #include <asm/ia32_unistd.h> | 5 | #include <asm/ia32_unistd.h> |
| 14 | 6 | ||
diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S index bcc293423a70..96258d9dc974 100644 --- a/arch/x86/kernel/acpi/wakeup_64.S +++ b/arch/x86/kernel/acpi/wakeup_64.S | |||
| @@ -13,7 +13,6 @@ | |||
| 13 | * Hooray, we are in Long 64-bit mode (but still running in low memory) | 13 | * Hooray, we are in Long 64-bit mode (but still running in low memory) |
| 14 | */ | 14 | */ |
| 15 | ENTRY(wakeup_long64) | 15 | ENTRY(wakeup_long64) |
| 16 | wakeup_long64: | ||
| 17 | movq saved_magic, %rax | 16 | movq saved_magic, %rax |
| 18 | movq $0x123456789abcdef0, %rdx | 17 | movq $0x123456789abcdef0, %rdx |
| 19 | cmpq %rdx, %rax | 18 | cmpq %rdx, %rax |
| @@ -34,16 +33,12 @@ wakeup_long64: | |||
| 34 | 33 | ||
| 35 | movq saved_rip, %rax | 34 | movq saved_rip, %rax |
| 36 | jmp *%rax | 35 | jmp *%rax |
| 36 | ENDPROC(wakeup_long64) | ||
| 37 | 37 | ||
| 38 | bogus_64_magic: | 38 | bogus_64_magic: |
| 39 | jmp bogus_64_magic | 39 | jmp bogus_64_magic |
| 40 | 40 | ||
| 41 | .align 2 | 41 | ENTRY(do_suspend_lowlevel) |
| 42 | .p2align 4,,15 | ||
| 43 | .globl do_suspend_lowlevel | ||
| 44 | .type do_suspend_lowlevel,@function | ||
| 45 | do_suspend_lowlevel: | ||
| 46 | .LFB5: | ||
| 47 | subq $8, %rsp | 42 | subq $8, %rsp |
| 48 | xorl %eax, %eax | 43 | xorl %eax, %eax |
| 49 | call save_processor_state | 44 | call save_processor_state |
| @@ -67,7 +62,7 @@ do_suspend_lowlevel: | |||
| 67 | pushfq | 62 | pushfq |
| 68 | popq pt_regs_flags(%rax) | 63 | popq pt_regs_flags(%rax) |
| 69 | 64 | ||
| 70 | movq $.L97, saved_rip(%rip) | 65 | movq $resume_point, saved_rip(%rip) |
| 71 | 66 | ||
| 72 | movq %rsp, saved_rsp | 67 | movq %rsp, saved_rsp |
| 73 | movq %rbp, saved_rbp | 68 | movq %rbp, saved_rbp |
| @@ -78,14 +73,12 @@ do_suspend_lowlevel: | |||
| 78 | addq $8, %rsp | 73 | addq $8, %rsp |
| 79 | movl $3, %edi | 74 | movl $3, %edi |
| 80 | xorl %eax, %eax | 75 | xorl %eax, %eax |
| 81 | jmp acpi_enter_sleep_state | 76 | call acpi_enter_sleep_state |
| 82 | .L97: | 77 | /* in case something went wrong, restore the machine status and go on */ |
| 83 | .p2align 4,,7 | 78 | jmp resume_point |
| 84 | .L99: | ||
| 85 | .align 4 | ||
| 86 | movl $24, %eax | ||
| 87 | movw %ax, %ds | ||
| 88 | 79 | ||
| 80 | .align 4 | ||
| 81 | resume_point: | ||
| 89 | /* We don't restore %rax, it must be 0 anyway */ | 82 | /* We don't restore %rax, it must be 0 anyway */ |
| 90 | movq $saved_context, %rax | 83 | movq $saved_context, %rax |
| 91 | movq saved_context_cr4(%rax), %rbx | 84 | movq saved_context_cr4(%rax), %rbx |
| @@ -117,12 +110,9 @@ do_suspend_lowlevel: | |||
| 117 | xorl %eax, %eax | 110 | xorl %eax, %eax |
| 118 | addq $8, %rsp | 111 | addq $8, %rsp |
| 119 | jmp restore_processor_state | 112 | jmp restore_processor_state |
| 120 | .LFE5: | 113 | ENDPROC(do_suspend_lowlevel) |
| 121 | .Lfe5: | 114 | |
| 122 | .size do_suspend_lowlevel, .Lfe5-do_suspend_lowlevel | ||
| 123 | |||
| 124 | .data | 115 | .data |
| 125 | ALIGN | ||
| 126 | ENTRY(saved_rbp) .quad 0 | 116 | ENTRY(saved_rbp) .quad 0 |
| 127 | ENTRY(saved_rsi) .quad 0 | 117 | ENTRY(saved_rsi) .quad 0 |
| 128 | ENTRY(saved_rdi) .quad 0 | 118 | ENTRY(saved_rdi) .quad 0 |
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c index 115449f869ee..570f36e44e59 100644 --- a/arch/x86/kernel/apic.c +++ b/arch/x86/kernel/apic.c | |||
| @@ -862,7 +862,7 @@ void clear_local_APIC(void) | |||
| 862 | } | 862 | } |
| 863 | 863 | ||
| 864 | /* lets not touch this if we didn't frob it */ | 864 | /* lets not touch this if we didn't frob it */ |
| 865 | #if defined(CONFIG_X86_MCE_P4THERMAL) || defined(X86_MCE_INTEL) | 865 | #if defined(CONFIG_X86_MCE_P4THERMAL) || defined(CONFIG_X86_MCE_INTEL) |
| 866 | if (maxlvt >= 5) { | 866 | if (maxlvt >= 5) { |
| 867 | v = apic_read(APIC_LVTTHMR); | 867 | v = apic_read(APIC_LVTTHMR); |
| 868 | apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED); | 868 | apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED); |
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c index 98807bb095ad..266ec6c18b6c 100644 --- a/arch/x86/kernel/apm_32.c +++ b/arch/x86/kernel/apm_32.c | |||
| @@ -1192,6 +1192,7 @@ static int suspend(int vetoable) | |||
| 1192 | device_suspend(PMSG_SUSPEND); | 1192 | device_suspend(PMSG_SUSPEND); |
| 1193 | local_irq_disable(); | 1193 | local_irq_disable(); |
| 1194 | device_power_down(PMSG_SUSPEND); | 1194 | device_power_down(PMSG_SUSPEND); |
| 1195 | sysdev_suspend(PMSG_SUSPEND); | ||
| 1195 | 1196 | ||
| 1196 | local_irq_enable(); | 1197 | local_irq_enable(); |
| 1197 | 1198 | ||
| @@ -1208,6 +1209,7 @@ static int suspend(int vetoable) | |||
| 1208 | if (err != APM_SUCCESS) | 1209 | if (err != APM_SUCCESS) |
| 1209 | apm_error("suspend", err); | 1210 | apm_error("suspend", err); |
| 1210 | err = (err == APM_SUCCESS) ? 0 : -EIO; | 1211 | err = (err == APM_SUCCESS) ? 0 : -EIO; |
| 1212 | sysdev_resume(); | ||
| 1211 | device_power_up(PMSG_RESUME); | 1213 | device_power_up(PMSG_RESUME); |
| 1212 | local_irq_enable(); | 1214 | local_irq_enable(); |
| 1213 | device_resume(PMSG_RESUME); | 1215 | device_resume(PMSG_RESUME); |
| @@ -1228,6 +1230,7 @@ static void standby(void) | |||
| 1228 | 1230 | ||
| 1229 | local_irq_disable(); | 1231 | local_irq_disable(); |
| 1230 | device_power_down(PMSG_SUSPEND); | 1232 | device_power_down(PMSG_SUSPEND); |
| 1233 | sysdev_suspend(PMSG_SUSPEND); | ||
| 1231 | local_irq_enable(); | 1234 | local_irq_enable(); |
| 1232 | 1235 | ||
| 1233 | err = set_system_power_state(APM_STATE_STANDBY); | 1236 | err = set_system_power_state(APM_STATE_STANDBY); |
| @@ -1235,6 +1238,7 @@ static void standby(void) | |||
| 1235 | apm_error("standby", err); | 1238 | apm_error("standby", err); |
| 1236 | 1239 | ||
| 1237 | local_irq_disable(); | 1240 | local_irq_disable(); |
| 1241 | sysdev_resume(); | ||
| 1238 | device_power_up(PMSG_RESUME); | 1242 | device_power_up(PMSG_RESUME); |
| 1239 | local_irq_enable(); | 1243 | local_irq_enable(); |
| 1240 | } | 1244 | } |
diff --git a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c index b585e04cbc9e..3178c3acd97e 100644 --- a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c +++ b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c | |||
| @@ -277,7 +277,6 @@ static struct cpufreq_driver p4clockmod_driver = { | |||
| 277 | .name = "p4-clockmod", | 277 | .name = "p4-clockmod", |
| 278 | .owner = THIS_MODULE, | 278 | .owner = THIS_MODULE, |
| 279 | .attr = p4clockmod_attr, | 279 | .attr = p4clockmod_attr, |
| 280 | .hide_interface = 1, | ||
| 281 | }; | 280 | }; |
| 282 | 281 | ||
| 283 | 282 | ||
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c index fb039cd345d8..6428aa17b40e 100644 --- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c +++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c | |||
| @@ -1157,8 +1157,7 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol) | |||
| 1157 | data->cpu = pol->cpu; | 1157 | data->cpu = pol->cpu; |
| 1158 | data->currpstate = HW_PSTATE_INVALID; | 1158 | data->currpstate = HW_PSTATE_INVALID; |
| 1159 | 1159 | ||
| 1160 | rc = powernow_k8_cpu_init_acpi(data); | 1160 | if (powernow_k8_cpu_init_acpi(data)) { |
| 1161 | if (rc) { | ||
| 1162 | /* | 1161 | /* |
| 1163 | * Use the PSB BIOS structure. This is only availabe on | 1162 | * Use the PSB BIOS structure. This is only availabe on |
| 1164 | * an UP version, and is deprecated by AMD. | 1163 | * an UP version, and is deprecated by AMD. |
| @@ -1176,17 +1175,20 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol) | |||
| 1176 | "ACPI maintainers and complain to your BIOS " | 1175 | "ACPI maintainers and complain to your BIOS " |
| 1177 | "vendor.\n"); | 1176 | "vendor.\n"); |
| 1178 | #endif | 1177 | #endif |
| 1179 | goto err_out; | 1178 | kfree(data); |
| 1179 | return -ENODEV; | ||
| 1180 | } | 1180 | } |
| 1181 | if (pol->cpu != 0) { | 1181 | if (pol->cpu != 0) { |
| 1182 | printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for " | 1182 | printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for " |
| 1183 | "CPU other than CPU0. Complain to your BIOS " | 1183 | "CPU other than CPU0. Complain to your BIOS " |
| 1184 | "vendor.\n"); | 1184 | "vendor.\n"); |
| 1185 | goto err_out; | 1185 | kfree(data); |
| 1186 | return -ENODEV; | ||
| 1186 | } | 1187 | } |
| 1187 | rc = find_psb_table(data); | 1188 | rc = find_psb_table(data); |
| 1188 | if (rc) { | 1189 | if (rc) { |
| 1189 | goto err_out; | 1190 | kfree(data); |
| 1191 | return -ENODEV; | ||
| 1190 | } | 1192 | } |
| 1191 | /* Take a crude guess here. | 1193 | /* Take a crude guess here. |
| 1192 | * That guess was in microseconds, so multiply with 1000 */ | 1194 | * That guess was in microseconds, so multiply with 1000 */ |
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c index 1c838032fd37..fe79985ce0f2 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_64.c | |||
| @@ -295,11 +295,11 @@ void do_machine_check(struct pt_regs * regs, long error_code) | |||
| 295 | * If we know that the error was in user space, send a | 295 | * If we know that the error was in user space, send a |
| 296 | * SIGBUS. Otherwise, panic if tolerance is low. | 296 | * SIGBUS. Otherwise, panic if tolerance is low. |
| 297 | * | 297 | * |
| 298 | * do_exit() takes an awful lot of locks and has a slight | 298 | * force_sig() takes an awful lot of locks and has a slight |
| 299 | * risk of deadlocking. | 299 | * risk of deadlocking. |
| 300 | */ | 300 | */ |
| 301 | if (user_space) { | 301 | if (user_space) { |
| 302 | do_exit(SIGBUS); | 302 | force_sig(SIGBUS, current); |
| 303 | } else if (panic_on_oops || tolerant < 2) { | 303 | } else if (panic_on_oops || tolerant < 2) { |
| 304 | mce_panic("Uncorrected machine check", | 304 | mce_panic("Uncorrected machine check", |
| 305 | &panicm, mcestart); | 305 | &panicm, mcestart); |
| @@ -490,7 +490,7 @@ static void __cpuinit mce_cpu_quirks(struct cpuinfo_x86 *c) | |||
| 490 | 490 | ||
| 491 | } | 491 | } |
| 492 | 492 | ||
| 493 | static void __cpuinit mce_cpu_features(struct cpuinfo_x86 *c) | 493 | static void mce_cpu_features(struct cpuinfo_x86 *c) |
| 494 | { | 494 | { |
| 495 | switch (c->x86_vendor) { | 495 | switch (c->x86_vendor) { |
| 496 | case X86_VENDOR_INTEL: | 496 | case X86_VENDOR_INTEL: |
| @@ -734,6 +734,7 @@ __setup("mce=", mcheck_enable); | |||
| 734 | static int mce_resume(struct sys_device *dev) | 734 | static int mce_resume(struct sys_device *dev) |
| 735 | { | 735 | { |
| 736 | mce_init(NULL); | 736 | mce_init(NULL); |
| 737 | mce_cpu_features(¤t_cpu_data); | ||
| 737 | return 0; | 738 | return 0; |
| 738 | } | 739 | } |
| 739 | 740 | ||
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c index 8ae8c4ff094d..f2ee0ae29bd6 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c | |||
| @@ -121,7 +121,7 @@ static long threshold_restart_bank(void *_tr) | |||
| 121 | } | 121 | } |
| 122 | 122 | ||
| 123 | /* cpu init entry point, called from mce.c with preempt off */ | 123 | /* cpu init entry point, called from mce.c with preempt off */ |
| 124 | void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c) | 124 | void mce_amd_feature_init(struct cpuinfo_x86 *c) |
| 125 | { | 125 | { |
| 126 | unsigned int bank, block; | 126 | unsigned int bank, block; |
| 127 | unsigned int cpu = smp_processor_id(); | 127 | unsigned int cpu = smp_processor_id(); |
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c index 4b48f251fd39..f44c36624360 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c | |||
| @@ -30,7 +30,7 @@ asmlinkage void smp_thermal_interrupt(void) | |||
| 30 | irq_exit(); | 30 | irq_exit(); |
| 31 | } | 31 | } |
| 32 | 32 | ||
| 33 | static void __cpuinit intel_init_thermal(struct cpuinfo_x86 *c) | 33 | static void intel_init_thermal(struct cpuinfo_x86 *c) |
| 34 | { | 34 | { |
| 35 | u32 l, h; | 35 | u32 l, h; |
| 36 | int tm2 = 0; | 36 | int tm2 = 0; |
| @@ -84,7 +84,7 @@ static void __cpuinit intel_init_thermal(struct cpuinfo_x86 *c) | |||
| 84 | return; | 84 | return; |
| 85 | } | 85 | } |
| 86 | 86 | ||
| 87 | void __cpuinit mce_intel_feature_init(struct cpuinfo_x86 *c) | 87 | void mce_intel_feature_init(struct cpuinfo_x86 *c) |
| 88 | { | 88 | { |
| 89 | intel_init_thermal(c); | 89 | intel_init_thermal(c); |
| 90 | } | 90 | } |
diff --git a/arch/x86/kernel/ds.c b/arch/x86/kernel/ds.c index 169a120587be..87b67e3a765a 100644 --- a/arch/x86/kernel/ds.c +++ b/arch/x86/kernel/ds.c | |||
| @@ -729,7 +729,7 @@ struct pebs_tracer *ds_request_pebs(struct task_struct *task, | |||
| 729 | 729 | ||
| 730 | spin_unlock_irqrestore(&ds_lock, irq); | 730 | spin_unlock_irqrestore(&ds_lock, irq); |
| 731 | 731 | ||
| 732 | ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts); | 732 | ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_pebs); |
| 733 | ds_resume_pebs(tracer); | 733 | ds_resume_pebs(tracer); |
| 734 | 734 | ||
| 735 | return tracer; | 735 | return tracer; |
| @@ -1029,5 +1029,4 @@ void ds_copy_thread(struct task_struct *tsk, struct task_struct *father) | |||
| 1029 | 1029 | ||
| 1030 | void ds_exit_thread(struct task_struct *tsk) | 1030 | void ds_exit_thread(struct task_struct *tsk) |
| 1031 | { | 1031 | { |
| 1032 | WARN_ON(tsk->thread.ds_ctx); | ||
| 1033 | } | 1032 | } |
diff --git a/arch/x86/kernel/efi.c b/arch/x86/kernel/efi.c index 1119d247fe11..eb1ef3b67dd5 100644 --- a/arch/x86/kernel/efi.c +++ b/arch/x86/kernel/efi.c | |||
| @@ -467,7 +467,7 @@ void __init efi_enter_virtual_mode(void) | |||
| 467 | efi_memory_desc_t *md; | 467 | efi_memory_desc_t *md; |
| 468 | efi_status_t status; | 468 | efi_status_t status; |
| 469 | unsigned long size; | 469 | unsigned long size; |
| 470 | u64 end, systab, addr, npages; | 470 | u64 end, systab, addr, npages, end_pfn; |
| 471 | void *p, *va; | 471 | void *p, *va; |
| 472 | 472 | ||
| 473 | efi.systab = NULL; | 473 | efi.systab = NULL; |
| @@ -479,7 +479,10 @@ void __init efi_enter_virtual_mode(void) | |||
| 479 | size = md->num_pages << EFI_PAGE_SHIFT; | 479 | size = md->num_pages << EFI_PAGE_SHIFT; |
| 480 | end = md->phys_addr + size; | 480 | end = md->phys_addr + size; |
| 481 | 481 | ||
| 482 | if (PFN_UP(end) <= max_low_pfn_mapped) | 482 | end_pfn = PFN_UP(end); |
| 483 | if (end_pfn <= max_low_pfn_mapped | ||
| 484 | || (end_pfn > (1UL << (32 - PAGE_SHIFT)) | ||
| 485 | && end_pfn <= max_pfn_mapped)) | ||
| 483 | va = __va(md->phys_addr); | 486 | va = __va(md->phys_addr); |
| 484 | else | 487 | else |
| 485 | va = efi_ioremap(md->phys_addr, size); | 488 | va = efi_ioremap(md->phys_addr, size); |
diff --git a/arch/x86/kernel/efi_64.c b/arch/x86/kernel/efi_64.c index 652c5287215f..cb783b92c50c 100644 --- a/arch/x86/kernel/efi_64.c +++ b/arch/x86/kernel/efi_64.c | |||
| @@ -99,24 +99,11 @@ void __init efi_call_phys_epilog(void) | |||
| 99 | 99 | ||
| 100 | void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size) | 100 | void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size) |
| 101 | { | 101 | { |
| 102 | static unsigned pages_mapped __initdata; | 102 | unsigned long last_map_pfn; |
| 103 | unsigned i, pages; | ||
| 104 | unsigned long offset; | ||
| 105 | 103 | ||
| 106 | pages = PFN_UP(phys_addr + size) - PFN_DOWN(phys_addr); | 104 | last_map_pfn = init_memory_mapping(phys_addr, phys_addr + size); |
| 107 | offset = phys_addr & ~PAGE_MASK; | 105 | if ((last_map_pfn << PAGE_SHIFT) < phys_addr + size) |
| 108 | phys_addr &= PAGE_MASK; | ||
| 109 | |||
| 110 | if (pages_mapped + pages > MAX_EFI_IO_PAGES) | ||
| 111 | return NULL; | 106 | return NULL; |
| 112 | 107 | ||
| 113 | for (i = 0; i < pages; i++) { | 108 | return (void __iomem *)__va(phys_addr); |
| 114 | __set_fixmap(FIX_EFI_IO_MAP_FIRST_PAGE - pages_mapped, | ||
| 115 | phys_addr, PAGE_KERNEL); | ||
| 116 | phys_addr += PAGE_SIZE; | ||
| 117 | pages_mapped++; | ||
| 118 | } | ||
| 119 | |||
| 120 | return (void __iomem *)__fix_to_virt(FIX_EFI_IO_MAP_FIRST_PAGE - \ | ||
| 121 | (pages_mapped - pages)) + offset; | ||
| 122 | } | 109 | } |
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c index 388254f69a2a..a00545fe5cdd 100644 --- a/arch/x86/kernel/hpet.c +++ b/arch/x86/kernel/hpet.c | |||
| @@ -269,6 +269,8 @@ static void hpet_set_mode(enum clock_event_mode mode, | |||
| 269 | now = hpet_readl(HPET_COUNTER); | 269 | now = hpet_readl(HPET_COUNTER); |
| 270 | cmp = now + (unsigned long) delta; | 270 | cmp = now + (unsigned long) delta; |
| 271 | cfg = hpet_readl(HPET_Tn_CFG(timer)); | 271 | cfg = hpet_readl(HPET_Tn_CFG(timer)); |
| 272 | /* Make sure we use edge triggered interrupts */ | ||
| 273 | cfg &= ~HPET_TN_LEVEL; | ||
| 272 | cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC | | 274 | cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC | |
| 273 | HPET_TN_SETVAL | HPET_TN_32BIT; | 275 | HPET_TN_SETVAL | HPET_TN_32BIT; |
| 274 | hpet_writel(cfg, HPET_Tn_CFG(timer)); | 276 | hpet_writel(cfg, HPET_Tn_CFG(timer)); |
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c index b0f61f0dcd0a..f2f8540a7f3d 100644 --- a/arch/x86/kernel/i387.c +++ b/arch/x86/kernel/i387.c | |||
| @@ -136,7 +136,7 @@ int init_fpu(struct task_struct *tsk) | |||
| 136 | #ifdef CONFIG_X86_32 | 136 | #ifdef CONFIG_X86_32 |
| 137 | if (!HAVE_HWFP) { | 137 | if (!HAVE_HWFP) { |
| 138 | memset(tsk->thread.xstate, 0, xstate_size); | 138 | memset(tsk->thread.xstate, 0, xstate_size); |
| 139 | finit(); | 139 | finit_task(tsk); |
| 140 | set_stopped_child_used_math(tsk); | 140 | set_stopped_child_used_math(tsk); |
| 141 | return 0; | 141 | return 0; |
| 142 | } | 142 | } |
diff --git a/arch/x86/kernel/olpc.c b/arch/x86/kernel/olpc.c index 7a13fac63a1f..4006c522adc7 100644 --- a/arch/x86/kernel/olpc.c +++ b/arch/x86/kernel/olpc.c | |||
| @@ -203,7 +203,7 @@ static void __init platform_detect(void) | |||
| 203 | static void __init platform_detect(void) | 203 | static void __init platform_detect(void) |
| 204 | { | 204 | { |
| 205 | /* stopgap until OFW support is added to the kernel */ | 205 | /* stopgap until OFW support is added to the kernel */ |
| 206 | olpc_platform_info.boardrev = 0xc2; | 206 | olpc_platform_info.boardrev = olpc_board(0xc2); |
| 207 | } | 207 | } |
| 208 | #endif | 208 | #endif |
| 209 | 209 | ||
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index e4c8fb608873..c6520a4e85d4 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c | |||
| @@ -268,6 +268,32 @@ enum paravirt_lazy_mode paravirt_get_lazy_mode(void) | |||
| 268 | return __get_cpu_var(paravirt_lazy_mode); | 268 | return __get_cpu_var(paravirt_lazy_mode); |
| 269 | } | 269 | } |
| 270 | 270 | ||
| 271 | void arch_flush_lazy_mmu_mode(void) | ||
| 272 | { | ||
| 273 | preempt_disable(); | ||
| 274 | |||
| 275 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) { | ||
| 276 | WARN_ON(preempt_count() == 1); | ||
| 277 | arch_leave_lazy_mmu_mode(); | ||
| 278 | arch_enter_lazy_mmu_mode(); | ||
| 279 | } | ||
| 280 | |||
| 281 | preempt_enable(); | ||
| 282 | } | ||
| 283 | |||
| 284 | void arch_flush_lazy_cpu_mode(void) | ||
| 285 | { | ||
| 286 | preempt_disable(); | ||
| 287 | |||
| 288 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { | ||
| 289 | WARN_ON(preempt_count() == 1); | ||
| 290 | arch_leave_lazy_cpu_mode(); | ||
| 291 | arch_enter_lazy_cpu_mode(); | ||
| 292 | } | ||
| 293 | |||
| 294 | preempt_enable(); | ||
| 295 | } | ||
| 296 | |||
| 271 | struct pv_info pv_info = { | 297 | struct pv_info pv_info = { |
| 272 | .name = "bare hardware", | 298 | .name = "bare hardware", |
| 273 | .paravirt_enabled = 0, | 299 | .paravirt_enabled = 0, |
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c index a546f55c77b4..bd4da2af08ae 100644 --- a/arch/x86/kernel/process_32.c +++ b/arch/x86/kernel/process_32.c | |||
| @@ -104,9 +104,6 @@ void cpu_idle(void) | |||
| 104 | check_pgt_cache(); | 104 | check_pgt_cache(); |
| 105 | rmb(); | 105 | rmb(); |
| 106 | 106 | ||
| 107 | if (rcu_pending(cpu)) | ||
| 108 | rcu_check_callbacks(cpu, 0); | ||
| 109 | |||
| 110 | if (cpu_is_offline(cpu)) | 107 | if (cpu_is_offline(cpu)) |
| 111 | play_dead(); | 108 | play_dead(); |
| 112 | 109 | ||
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c index 0a5df5f82fb9..06ca07f6ad86 100644 --- a/arch/x86/kernel/ptrace.c +++ b/arch/x86/kernel/ptrace.c | |||
| @@ -810,12 +810,16 @@ static void ptrace_bts_untrace(struct task_struct *child) | |||
| 810 | 810 | ||
| 811 | static void ptrace_bts_detach(struct task_struct *child) | 811 | static void ptrace_bts_detach(struct task_struct *child) |
| 812 | { | 812 | { |
| 813 | if (unlikely(child->bts)) { | 813 | /* |
| 814 | ds_release_bts(child->bts); | 814 | * Ptrace_detach() races with ptrace_untrace() in case |
| 815 | child->bts = NULL; | 815 | * the child dies and is reaped by another thread. |
| 816 | 816 | * | |
| 817 | ptrace_bts_free_buffer(child); | 817 | * We only do the memory accounting at this point and |
| 818 | } | 818 | * leave the buffer deallocation and the bts tracer |
| 819 | * release to ptrace_bts_untrace() which will be called | ||
| 820 | * later on with tasklist_lock held. | ||
| 821 | */ | ||
| 822 | release_locked_buffer(child->bts_buffer, child->bts_size); | ||
| 819 | } | 823 | } |
| 820 | #else | 824 | #else |
| 821 | static inline void ptrace_bts_fork(struct task_struct *tsk) {} | 825 | static inline void ptrace_bts_fork(struct task_struct *tsk) {} |
| @@ -1384,7 +1388,7 @@ void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, | |||
| 1384 | #ifdef CONFIG_X86_32 | 1388 | #ifdef CONFIG_X86_32 |
| 1385 | # define IS_IA32 1 | 1389 | # define IS_IA32 1 |
| 1386 | #elif defined CONFIG_IA32_EMULATION | 1390 | #elif defined CONFIG_IA32_EMULATION |
| 1387 | # define IS_IA32 test_thread_flag(TIF_IA32) | 1391 | # define IS_IA32 is_compat_task() |
| 1388 | #else | 1392 | #else |
| 1389 | # define IS_IA32 0 | 1393 | # define IS_IA32 0 |
| 1390 | #endif | 1394 | #endif |
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index 2b46eb41643b..4526b3a75ed2 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c | |||
| @@ -217,6 +217,14 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = { | |||
| 217 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), | 217 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), |
| 218 | }, | 218 | }, |
| 219 | }, | 219 | }, |
| 220 | { /* Handle problems with rebooting on Dell XPS710 */ | ||
| 221 | .callback = set_bios_reboot, | ||
| 222 | .ident = "Dell XPS710", | ||
| 223 | .matches = { | ||
| 224 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | ||
| 225 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"), | ||
| 226 | }, | ||
| 227 | }, | ||
| 220 | { } | 228 | { } |
| 221 | }; | 229 | }; |
| 222 | 230 | ||
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index c461f6d69074..6a8811a69324 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c | |||
| @@ -770,6 +770,9 @@ void __init setup_arch(char **cmdline_p) | |||
| 770 | 770 | ||
| 771 | finish_e820_parsing(); | 771 | finish_e820_parsing(); |
| 772 | 772 | ||
| 773 | if (efi_enabled) | ||
| 774 | efi_init(); | ||
| 775 | |||
| 773 | dmi_scan_machine(); | 776 | dmi_scan_machine(); |
| 774 | 777 | ||
| 775 | dmi_check_system(bad_bios_dmi_table); | 778 | dmi_check_system(bad_bios_dmi_table); |
| @@ -789,8 +792,6 @@ void __init setup_arch(char **cmdline_p) | |||
| 789 | insert_resource(&iomem_resource, &data_resource); | 792 | insert_resource(&iomem_resource, &data_resource); |
| 790 | insert_resource(&iomem_resource, &bss_resource); | 793 | insert_resource(&iomem_resource, &bss_resource); |
| 791 | 794 | ||
| 792 | if (efi_enabled) | ||
| 793 | efi_init(); | ||
| 794 | 795 | ||
| 795 | #ifdef CONFIG_X86_32 | 796 | #ifdef CONFIG_X86_32 |
| 796 | if (ppro_with_ram_bug()) { | 797 | if (ppro_with_ram_bug()) { |
diff --git a/arch/x86/kernel/time_64.c b/arch/x86/kernel/time_64.c index e6e695acd725..241ec3923f61 100644 --- a/arch/x86/kernel/time_64.c +++ b/arch/x86/kernel/time_64.c | |||
| @@ -115,7 +115,7 @@ unsigned long __init calibrate_cpu(void) | |||
| 115 | 115 | ||
| 116 | static struct irqaction irq0 = { | 116 | static struct irqaction irq0 = { |
| 117 | .handler = timer_interrupt, | 117 | .handler = timer_interrupt, |
| 118 | .flags = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING, | 118 | .flags = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING | IRQF_TIMER, |
| 119 | .mask = CPU_MASK_NONE, | 119 | .mask = CPU_MASK_NONE, |
| 120 | .name = "timer" | 120 | .name = "timer" |
| 121 | }; | 121 | }; |
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 7932338d7cb3..a9e7548e1790 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c | |||
| @@ -99,6 +99,12 @@ static inline void preempt_conditional_sti(struct pt_regs *regs) | |||
| 99 | local_irq_enable(); | 99 | local_irq_enable(); |
| 100 | } | 100 | } |
| 101 | 101 | ||
| 102 | static inline void conditional_cli(struct pt_regs *regs) | ||
| 103 | { | ||
| 104 | if (regs->flags & X86_EFLAGS_IF) | ||
| 105 | local_irq_disable(); | ||
| 106 | } | ||
| 107 | |||
| 102 | static inline void preempt_conditional_cli(struct pt_regs *regs) | 108 | static inline void preempt_conditional_cli(struct pt_regs *regs) |
| 103 | { | 109 | { |
| 104 | if (regs->flags & X86_EFLAGS_IF) | 110 | if (regs->flags & X86_EFLAGS_IF) |
| @@ -626,8 +632,10 @@ clear_dr7: | |||
| 626 | 632 | ||
| 627 | #ifdef CONFIG_X86_32 | 633 | #ifdef CONFIG_X86_32 |
| 628 | debug_vm86: | 634 | debug_vm86: |
| 635 | /* reenable preemption: handle_vm86_trap() might sleep */ | ||
| 636 | dec_preempt_count(); | ||
| 629 | handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1); | 637 | handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1); |
| 630 | preempt_conditional_cli(regs); | 638 | conditional_cli(regs); |
| 631 | return; | 639 | return; |
| 632 | #endif | 640 | #endif |
| 633 | 641 | ||
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c index c4c1f9e09402..e5b088fffa40 100644 --- a/arch/x86/kernel/vmiclock_32.c +++ b/arch/x86/kernel/vmiclock_32.c | |||
| @@ -202,7 +202,7 @@ static irqreturn_t vmi_timer_interrupt(int irq, void *dev_id) | |||
| 202 | static struct irqaction vmi_clock_action = { | 202 | static struct irqaction vmi_clock_action = { |
| 203 | .name = "vmi-timer", | 203 | .name = "vmi-timer", |
| 204 | .handler = vmi_timer_interrupt, | 204 | .handler = vmi_timer_interrupt, |
| 205 | .flags = IRQF_DISABLED | IRQF_NOBALANCING, | 205 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER, |
| 206 | .mask = CPU_MASK_ALL, | 206 | .mask = CPU_MASK_ALL, |
| 207 | }; | 207 | }; |
| 208 | 208 | ||
| @@ -283,10 +283,13 @@ void __devinit vmi_time_ap_init(void) | |||
| 283 | #endif | 283 | #endif |
| 284 | 284 | ||
| 285 | /** vmi clocksource */ | 285 | /** vmi clocksource */ |
| 286 | static struct clocksource clocksource_vmi; | ||
| 286 | 287 | ||
| 287 | static cycle_t read_real_cycles(void) | 288 | static cycle_t read_real_cycles(void) |
| 288 | { | 289 | { |
| 289 | return vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL); | 290 | cycle_t ret = (cycle_t)vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL); |
| 291 | return ret >= clocksource_vmi.cycle_last ? | ||
| 292 | ret : clocksource_vmi.cycle_last; | ||
| 290 | } | 293 | } |
| 291 | 294 | ||
| 292 | static struct clocksource clocksource_vmi = { | 295 | static struct clocksource clocksource_vmi = { |
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c index e665d1c623ca..72bd275a9b5c 100644 --- a/arch/x86/kvm/i8254.c +++ b/arch/x86/kvm/i8254.c | |||
| @@ -207,7 +207,7 @@ static int __pit_timer_fn(struct kvm_kpit_state *ps) | |||
| 207 | hrtimer_add_expires_ns(&pt->timer, pt->period); | 207 | hrtimer_add_expires_ns(&pt->timer, pt->period); |
| 208 | pt->scheduled = hrtimer_get_expires_ns(&pt->timer); | 208 | pt->scheduled = hrtimer_get_expires_ns(&pt->timer); |
| 209 | if (pt->period) | 209 | if (pt->period) |
| 210 | ps->channels[0].count_load_time = hrtimer_get_expires(&pt->timer); | 210 | ps->channels[0].count_load_time = ktime_get(); |
| 211 | 211 | ||
| 212 | return (pt->period == 0 ? 0 : 1); | 212 | return (pt->period == 0 ? 0 : 1); |
| 213 | } | 213 | } |
diff --git a/arch/x86/kvm/irq.c b/arch/x86/kvm/irq.c index c019b8edcdb7..cf17ed52f6fb 100644 --- a/arch/x86/kvm/irq.c +++ b/arch/x86/kvm/irq.c | |||
| @@ -87,13 +87,6 @@ void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu) | |||
| 87 | } | 87 | } |
| 88 | EXPORT_SYMBOL_GPL(kvm_inject_pending_timer_irqs); | 88 | EXPORT_SYMBOL_GPL(kvm_inject_pending_timer_irqs); |
| 89 | 89 | ||
| 90 | void kvm_timer_intr_post(struct kvm_vcpu *vcpu, int vec) | ||
| 91 | { | ||
| 92 | kvm_apic_timer_intr_post(vcpu, vec); | ||
| 93 | /* TODO: PIT, RTC etc. */ | ||
| 94 | } | ||
| 95 | EXPORT_SYMBOL_GPL(kvm_timer_intr_post); | ||
| 96 | |||
| 97 | void __kvm_migrate_timers(struct kvm_vcpu *vcpu) | 90 | void __kvm_migrate_timers(struct kvm_vcpu *vcpu) |
| 98 | { | 91 | { |
| 99 | __kvm_migrate_apic_timer(vcpu); | 92 | __kvm_migrate_apic_timer(vcpu); |
diff --git a/arch/x86/kvm/irq.h b/arch/x86/kvm/irq.h index 2bf32a03ceec..82579ee538d0 100644 --- a/arch/x86/kvm/irq.h +++ b/arch/x86/kvm/irq.h | |||
| @@ -89,7 +89,6 @@ static inline int irqchip_in_kernel(struct kvm *kvm) | |||
| 89 | 89 | ||
| 90 | void kvm_pic_reset(struct kvm_kpic_state *s); | 90 | void kvm_pic_reset(struct kvm_kpic_state *s); |
| 91 | 91 | ||
| 92 | void kvm_timer_intr_post(struct kvm_vcpu *vcpu, int vec); | ||
| 93 | void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu); | 92 | void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu); |
| 94 | void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu); | 93 | void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu); |
| 95 | void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu); | 94 | void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu); |
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index afac68c0815c..f0b67f2cdd69 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c | |||
| @@ -35,6 +35,12 @@ | |||
| 35 | #include "kvm_cache_regs.h" | 35 | #include "kvm_cache_regs.h" |
| 36 | #include "irq.h" | 36 | #include "irq.h" |
| 37 | 37 | ||
| 38 | #ifndef CONFIG_X86_64 | ||
| 39 | #define mod_64(x, y) ((x) - (y) * div64_u64(x, y)) | ||
| 40 | #else | ||
| 41 | #define mod_64(x, y) ((x) % (y)) | ||
| 42 | #endif | ||
| 43 | |||
| 38 | #define PRId64 "d" | 44 | #define PRId64 "d" |
| 39 | #define PRIx64 "llx" | 45 | #define PRIx64 "llx" |
| 40 | #define PRIu64 "u" | 46 | #define PRIu64 "u" |
| @@ -511,52 +517,22 @@ static void apic_send_ipi(struct kvm_lapic *apic) | |||
| 511 | 517 | ||
| 512 | static u32 apic_get_tmcct(struct kvm_lapic *apic) | 518 | static u32 apic_get_tmcct(struct kvm_lapic *apic) |
| 513 | { | 519 | { |
| 514 | u64 counter_passed; | 520 | ktime_t remaining; |
| 515 | ktime_t passed, now; | 521 | s64 ns; |
| 516 | u32 tmcct; | 522 | u32 tmcct; |
| 517 | 523 | ||
| 518 | ASSERT(apic != NULL); | 524 | ASSERT(apic != NULL); |
| 519 | 525 | ||
| 520 | now = apic->timer.dev.base->get_time(); | ||
| 521 | tmcct = apic_get_reg(apic, APIC_TMICT); | ||
| 522 | |||
| 523 | /* if initial count is 0, current count should also be 0 */ | 526 | /* if initial count is 0, current count should also be 0 */ |
| 524 | if (tmcct == 0) | 527 | if (apic_get_reg(apic, APIC_TMICT) == 0) |
| 525 | return 0; | 528 | return 0; |
| 526 | 529 | ||
| 527 | if (unlikely(ktime_to_ns(now) <= | 530 | remaining = hrtimer_expires_remaining(&apic->timer.dev); |
| 528 | ktime_to_ns(apic->timer.last_update))) { | 531 | if (ktime_to_ns(remaining) < 0) |
| 529 | /* Wrap around */ | 532 | remaining = ktime_set(0, 0); |
| 530 | passed = ktime_add(( { | 533 | |
| 531 | (ktime_t) { | 534 | ns = mod_64(ktime_to_ns(remaining), apic->timer.period); |
| 532 | .tv64 = KTIME_MAX - | 535 | tmcct = div64_u64(ns, (APIC_BUS_CYCLE_NS * apic->timer.divide_count)); |
| 533 | (apic->timer.last_update).tv64}; } | ||
| 534 | ), now); | ||
| 535 | apic_debug("time elapsed\n"); | ||
| 536 | } else | ||
| 537 | passed = ktime_sub(now, apic->timer.last_update); | ||
| 538 | |||
| 539 | counter_passed = div64_u64(ktime_to_ns(passed), | ||
| 540 | (APIC_BUS_CYCLE_NS * apic->timer.divide_count)); | ||
| 541 | |||
| 542 | if (counter_passed > tmcct) { | ||
| 543 | if (unlikely(!apic_lvtt_period(apic))) { | ||
| 544 | /* one-shot timers stick at 0 until reset */ | ||
| 545 | tmcct = 0; | ||
| 546 | } else { | ||
| 547 | /* | ||
| 548 | * periodic timers reset to APIC_TMICT when they | ||
| 549 | * hit 0. The while loop simulates this happening N | ||
| 550 | * times. (counter_passed %= tmcct) would also work, | ||
| 551 | * but might be slower or not work on 32-bit?? | ||
| 552 | */ | ||
| 553 | while (counter_passed > tmcct) | ||
| 554 | counter_passed -= tmcct; | ||
| 555 | tmcct -= counter_passed; | ||
| 556 | } | ||
| 557 | } else { | ||
| 558 | tmcct -= counter_passed; | ||
| 559 | } | ||
| 560 | 536 | ||
| 561 | return tmcct; | 537 | return tmcct; |
| 562 | } | 538 | } |
| @@ -653,8 +629,6 @@ static void start_apic_timer(struct kvm_lapic *apic) | |||
| 653 | { | 629 | { |
| 654 | ktime_t now = apic->timer.dev.base->get_time(); | 630 | ktime_t now = apic->timer.dev.base->get_time(); |
| 655 | 631 | ||
| 656 | apic->timer.last_update = now; | ||
| 657 | |||
| 658 | apic->timer.period = apic_get_reg(apic, APIC_TMICT) * | 632 | apic->timer.period = apic_get_reg(apic, APIC_TMICT) * |
| 659 | APIC_BUS_CYCLE_NS * apic->timer.divide_count; | 633 | APIC_BUS_CYCLE_NS * apic->timer.divide_count; |
| 660 | atomic_set(&apic->timer.pending, 0); | 634 | atomic_set(&apic->timer.pending, 0); |
| @@ -1110,16 +1084,6 @@ void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu) | |||
| 1110 | } | 1084 | } |
| 1111 | } | 1085 | } |
| 1112 | 1086 | ||
| 1113 | void kvm_apic_timer_intr_post(struct kvm_vcpu *vcpu, int vec) | ||
| 1114 | { | ||
| 1115 | struct kvm_lapic *apic = vcpu->arch.apic; | ||
| 1116 | |||
| 1117 | if (apic && apic_lvt_vector(apic, APIC_LVTT) == vec) | ||
| 1118 | apic->timer.last_update = ktime_add_ns( | ||
| 1119 | apic->timer.last_update, | ||
| 1120 | apic->timer.period); | ||
| 1121 | } | ||
| 1122 | |||
| 1123 | int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu) | 1087 | int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu) |
| 1124 | { | 1088 | { |
| 1125 | int vector = kvm_apic_has_interrupt(vcpu); | 1089 | int vector = kvm_apic_has_interrupt(vcpu); |
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h index 81858881287e..45ab6ee71209 100644 --- a/arch/x86/kvm/lapic.h +++ b/arch/x86/kvm/lapic.h | |||
| @@ -12,7 +12,6 @@ struct kvm_lapic { | |||
| 12 | atomic_t pending; | 12 | atomic_t pending; |
| 13 | s64 period; /* unit: ns */ | 13 | s64 period; /* unit: ns */ |
| 14 | u32 divide_count; | 14 | u32 divide_count; |
| 15 | ktime_t last_update; | ||
| 16 | struct hrtimer dev; | 15 | struct hrtimer dev; |
| 17 | } timer; | 16 | } timer; |
| 18 | struct kvm_vcpu *vcpu; | 17 | struct kvm_vcpu *vcpu; |
| @@ -42,7 +41,6 @@ void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data); | |||
| 42 | void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu); | 41 | void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu); |
| 43 | int kvm_lapic_enabled(struct kvm_vcpu *vcpu); | 42 | int kvm_lapic_enabled(struct kvm_vcpu *vcpu); |
| 44 | int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu); | 43 | int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu); |
| 45 | void kvm_apic_timer_intr_post(struct kvm_vcpu *vcpu, int vec); | ||
| 46 | 44 | ||
| 47 | void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr); | 45 | void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr); |
| 48 | void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu); | 46 | void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu); |
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index 83f11c7474a1..2d4477c71473 100644 --- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c | |||
| @@ -1698,8 +1698,13 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, | |||
| 1698 | if (largepage) | 1698 | if (largepage) |
| 1699 | spte |= PT_PAGE_SIZE_MASK; | 1699 | spte |= PT_PAGE_SIZE_MASK; |
| 1700 | if (mt_mask) { | 1700 | if (mt_mask) { |
| 1701 | mt_mask = get_memory_type(vcpu, gfn) << | 1701 | if (!kvm_is_mmio_pfn(pfn)) { |
| 1702 | kvm_x86_ops->get_mt_mask_shift(); | 1702 | mt_mask = get_memory_type(vcpu, gfn) << |
| 1703 | kvm_x86_ops->get_mt_mask_shift(); | ||
| 1704 | mt_mask |= VMX_EPT_IGMT_BIT; | ||
| 1705 | } else | ||
| 1706 | mt_mask = MTRR_TYPE_UNCACHABLE << | ||
| 1707 | kvm_x86_ops->get_mt_mask_shift(); | ||
| 1703 | spte |= mt_mask; | 1708 | spte |= mt_mask; |
| 1704 | } | 1709 | } |
| 1705 | 1710 | ||
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 1452851ae258..a9e769e4e251 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c | |||
| @@ -1600,7 +1600,6 @@ static void svm_intr_assist(struct kvm_vcpu *vcpu) | |||
| 1600 | /* Okay, we can deliver the interrupt: grab it and update PIC state. */ | 1600 | /* Okay, we can deliver the interrupt: grab it and update PIC state. */ |
| 1601 | intr_vector = kvm_cpu_get_interrupt(vcpu); | 1601 | intr_vector = kvm_cpu_get_interrupt(vcpu); |
| 1602 | svm_inject_irq(svm, intr_vector); | 1602 | svm_inject_irq(svm, intr_vector); |
| 1603 | kvm_timer_intr_post(vcpu, intr_vector); | ||
| 1604 | out: | 1603 | out: |
| 1605 | update_cr8_intercept(vcpu); | 1604 | update_cr8_intercept(vcpu); |
| 1606 | } | 1605 | } |
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 6259d7467648..7611af576829 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c | |||
| @@ -903,6 +903,7 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata) | |||
| 903 | data = vmcs_readl(GUEST_SYSENTER_ESP); | 903 | data = vmcs_readl(GUEST_SYSENTER_ESP); |
| 904 | break; | 904 | break; |
| 905 | default: | 905 | default: |
| 906 | vmx_load_host_state(to_vmx(vcpu)); | ||
| 906 | msr = find_msr_entry(to_vmx(vcpu), msr_index); | 907 | msr = find_msr_entry(to_vmx(vcpu), msr_index); |
| 907 | if (msr) { | 908 | if (msr) { |
| 908 | data = msr->data; | 909 | data = msr->data; |
| @@ -3285,7 +3286,6 @@ static void vmx_intr_assist(struct kvm_vcpu *vcpu) | |||
| 3285 | } | 3286 | } |
| 3286 | if (vcpu->arch.interrupt.pending) { | 3287 | if (vcpu->arch.interrupt.pending) { |
| 3287 | vmx_inject_irq(vcpu, vcpu->arch.interrupt.nr); | 3288 | vmx_inject_irq(vcpu, vcpu->arch.interrupt.nr); |
| 3288 | kvm_timer_intr_post(vcpu, vcpu->arch.interrupt.nr); | ||
| 3289 | if (kvm_cpu_has_interrupt(vcpu)) | 3289 | if (kvm_cpu_has_interrupt(vcpu)) |
| 3290 | enable_irq_window(vcpu); | 3290 | enable_irq_window(vcpu); |
| 3291 | } | 3291 | } |
| @@ -3687,8 +3687,7 @@ static int __init vmx_init(void) | |||
| 3687 | if (vm_need_ept()) { | 3687 | if (vm_need_ept()) { |
| 3688 | bypass_guest_pf = 0; | 3688 | bypass_guest_pf = 0; |
| 3689 | kvm_mmu_set_base_ptes(VMX_EPT_READABLE_MASK | | 3689 | kvm_mmu_set_base_ptes(VMX_EPT_READABLE_MASK | |
| 3690 | VMX_EPT_WRITABLE_MASK | | 3690 | VMX_EPT_WRITABLE_MASK); |
| 3691 | VMX_EPT_IGMT_BIT); | ||
| 3692 | kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull, | 3691 | kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull, |
| 3693 | VMX_EPT_EXECUTABLE_MASK, | 3692 | VMX_EPT_EXECUTABLE_MASK, |
| 3694 | VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT); | 3693 | VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT); |
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index cc17546a2406..758b7a155ae9 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c | |||
| @@ -967,7 +967,6 @@ int kvm_dev_ioctl_check_extension(long ext) | |||
| 967 | case KVM_CAP_MMU_SHADOW_CACHE_CONTROL: | 967 | case KVM_CAP_MMU_SHADOW_CACHE_CONTROL: |
| 968 | case KVM_CAP_SET_TSS_ADDR: | 968 | case KVM_CAP_SET_TSS_ADDR: |
| 969 | case KVM_CAP_EXT_CPUID: | 969 | case KVM_CAP_EXT_CPUID: |
| 970 | case KVM_CAP_CLOCKSOURCE: | ||
| 971 | case KVM_CAP_PIT: | 970 | case KVM_CAP_PIT: |
| 972 | case KVM_CAP_NOP_IO_DELAY: | 971 | case KVM_CAP_NOP_IO_DELAY: |
| 973 | case KVM_CAP_MP_STATE: | 972 | case KVM_CAP_MP_STATE: |
| @@ -992,6 +991,9 @@ int kvm_dev_ioctl_check_extension(long ext) | |||
| 992 | case KVM_CAP_IOMMU: | 991 | case KVM_CAP_IOMMU: |
| 993 | r = iommu_found(); | 992 | r = iommu_found(); |
| 994 | break; | 993 | break; |
| 994 | case KVM_CAP_CLOCKSOURCE: | ||
| 995 | r = boot_cpu_has(X86_FEATURE_CONSTANT_TSC); | ||
| 996 | break; | ||
| 995 | default: | 997 | default: |
| 996 | r = 0; | 998 | r = 0; |
| 997 | break; | 999 | break; |
| @@ -4127,9 +4129,13 @@ static void kvm_free_vcpus(struct kvm *kvm) | |||
| 4127 | 4129 | ||
| 4128 | } | 4130 | } |
| 4129 | 4131 | ||
| 4130 | void kvm_arch_destroy_vm(struct kvm *kvm) | 4132 | void kvm_arch_sync_events(struct kvm *kvm) |
| 4131 | { | 4133 | { |
| 4132 | kvm_free_all_assigned_devices(kvm); | 4134 | kvm_free_all_assigned_devices(kvm); |
| 4135 | } | ||
| 4136 | |||
| 4137 | void kvm_arch_destroy_vm(struct kvm *kvm) | ||
| 4138 | { | ||
| 4133 | kvm_iommu_unmap_guest(kvm); | 4139 | kvm_iommu_unmap_guest(kvm); |
| 4134 | kvm_free_pit(kvm); | 4140 | kvm_free_pit(kvm); |
| 4135 | kfree(kvm->arch.vpic); | 4141 | kfree(kvm->arch.vpic); |
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c index 92f1c6f3e19d..960a8d9c049c 100644 --- a/arch/x86/lguest/boot.c +++ b/arch/x86/lguest/boot.c | |||
| @@ -343,6 +343,11 @@ static void lguest_cpuid(unsigned int *ax, unsigned int *bx, | |||
| 343 | * flush_tlb_user() for both user and kernel mappings unless | 343 | * flush_tlb_user() for both user and kernel mappings unless |
| 344 | * the Page Global Enable (PGE) feature bit is set. */ | 344 | * the Page Global Enable (PGE) feature bit is set. */ |
| 345 | *dx |= 0x00002000; | 345 | *dx |= 0x00002000; |
| 346 | /* We also lie, and say we're family id 5. 6 or greater | ||
| 347 | * leads to a rdmsr in early_init_intel which we can't handle. | ||
| 348 | * Family ID is returned as bits 8-12 in ax. */ | ||
| 349 | *ax &= 0xFFFFF0FF; | ||
| 350 | *ax |= 0x00000500; | ||
| 346 | break; | 351 | break; |
| 347 | case 0x80000000: | 352 | case 0x80000000: |
| 348 | /* Futureproof this a little: if they ask how much extended | 353 | /* Futureproof this a little: if they ask how much extended |
| @@ -589,19 +594,21 @@ static void __init lguest_init_IRQ(void) | |||
| 589 | /* Some systems map "vectors" to interrupts weirdly. Lguest has | 594 | /* Some systems map "vectors" to interrupts weirdly. Lguest has |
| 590 | * a straightforward 1 to 1 mapping, so force that here. */ | 595 | * a straightforward 1 to 1 mapping, so force that here. */ |
| 591 | __get_cpu_var(vector_irq)[vector] = i; | 596 | __get_cpu_var(vector_irq)[vector] = i; |
| 592 | if (vector != SYSCALL_VECTOR) { | 597 | if (vector != SYSCALL_VECTOR) |
| 593 | set_intr_gate(vector, | 598 | set_intr_gate(vector, interrupt[i]); |
| 594 | interrupt[vector-FIRST_EXTERNAL_VECTOR]); | ||
| 595 | set_irq_chip_and_handler_name(i, &lguest_irq_controller, | ||
| 596 | handle_level_irq, | ||
| 597 | "level"); | ||
| 598 | } | ||
| 599 | } | 599 | } |
| 600 | /* This call is required to set up for 4k stacks, where we have | 600 | /* This call is required to set up for 4k stacks, where we have |
| 601 | * separate stacks for hard and soft interrupts. */ | 601 | * separate stacks for hard and soft interrupts. */ |
| 602 | irq_ctx_init(smp_processor_id()); | 602 | irq_ctx_init(smp_processor_id()); |
| 603 | } | 603 | } |
| 604 | 604 | ||
| 605 | void lguest_setup_irq(unsigned int irq) | ||
| 606 | { | ||
| 607 | irq_to_desc_alloc_cpu(irq, 0); | ||
| 608 | set_irq_chip_and_handler_name(irq, &lguest_irq_controller, | ||
| 609 | handle_level_irq, "level"); | ||
| 610 | } | ||
| 611 | |||
| 605 | /* | 612 | /* |
| 606 | * Time. | 613 | * Time. |
| 607 | * | 614 | * |
diff --git a/arch/x86/mach-default/setup.c b/arch/x86/mach-default/setup.c index a265a7c63190..50b591871128 100644 --- a/arch/x86/mach-default/setup.c +++ b/arch/x86/mach-default/setup.c | |||
| @@ -96,7 +96,7 @@ void __init trap_init_hook(void) | |||
| 96 | 96 | ||
| 97 | static struct irqaction irq0 = { | 97 | static struct irqaction irq0 = { |
| 98 | .handler = timer_interrupt, | 98 | .handler = timer_interrupt, |
| 99 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL, | 99 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER, |
| 100 | .mask = CPU_MASK_NONE, | 100 | .mask = CPU_MASK_NONE, |
| 101 | .name = "timer" | 101 | .name = "timer" |
| 102 | }; | 102 | }; |
diff --git a/arch/x86/mach-voyager/setup.c b/arch/x86/mach-voyager/setup.c index d914a7996a66..8e5118371f0f 100644 --- a/arch/x86/mach-voyager/setup.c +++ b/arch/x86/mach-voyager/setup.c | |||
| @@ -56,7 +56,7 @@ void __init trap_init_hook(void) | |||
| 56 | 56 | ||
| 57 | static struct irqaction irq0 = { | 57 | static struct irqaction irq0 = { |
| 58 | .handler = timer_interrupt, | 58 | .handler = timer_interrupt, |
| 59 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL, | 59 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER, |
| 60 | .mask = CPU_MASK_NONE, | 60 | .mask = CPU_MASK_NONE, |
| 61 | .name = "timer" | 61 | .name = "timer" |
| 62 | }; | 62 | }; |
diff --git a/arch/x86/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c index 7ffcdeec4631..b9cc84a2a4fc 100644 --- a/arch/x86/mach-voyager/voyager_smp.c +++ b/arch/x86/mach-voyager/voyager_smp.c | |||
| @@ -65,7 +65,7 @@ static volatile unsigned long smp_invalidate_needed; | |||
| 65 | 65 | ||
| 66 | /* Bitmask of CPUs present in the system - exported by i386_syms.c, used | 66 | /* Bitmask of CPUs present in the system - exported by i386_syms.c, used |
| 67 | * by scheduler but indexed physically */ | 67 | * by scheduler but indexed physically */ |
| 68 | cpumask_t phys_cpu_present_map = CPU_MASK_NONE; | 68 | static cpumask_t voyager_phys_cpu_present_map = CPU_MASK_NONE; |
| 69 | 69 | ||
| 70 | /* The internal functions */ | 70 | /* The internal functions */ |
| 71 | static void send_CPI(__u32 cpuset, __u8 cpi); | 71 | static void send_CPI(__u32 cpuset, __u8 cpi); |
| @@ -366,19 +366,19 @@ void __init find_smp_config(void) | |||
| 366 | /* set up everything for just this CPU, we can alter | 366 | /* set up everything for just this CPU, we can alter |
| 367 | * this as we start the other CPUs later */ | 367 | * this as we start the other CPUs later */ |
| 368 | /* now get the CPU disposition from the extended CMOS */ | 368 | /* now get the CPU disposition from the extended CMOS */ |
| 369 | cpus_addr(phys_cpu_present_map)[0] = | 369 | cpus_addr(voyager_phys_cpu_present_map)[0] = |
| 370 | voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK); | 370 | voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK); |
| 371 | cpus_addr(phys_cpu_present_map)[0] |= | 371 | cpus_addr(voyager_phys_cpu_present_map)[0] |= |
| 372 | voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8; | 372 | voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8; |
| 373 | cpus_addr(phys_cpu_present_map)[0] |= | 373 | cpus_addr(voyager_phys_cpu_present_map)[0] |= |
| 374 | voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + | 374 | voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + |
| 375 | 2) << 16; | 375 | 2) << 16; |
| 376 | cpus_addr(phys_cpu_present_map)[0] |= | 376 | cpus_addr(voyager_phys_cpu_present_map)[0] |= |
| 377 | voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + | 377 | voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + |
| 378 | 3) << 24; | 378 | 3) << 24; |
| 379 | init_cpu_possible(&phys_cpu_present_map); | 379 | init_cpu_possible(&voyager_phys_cpu_present_map); |
| 380 | printk("VOYAGER SMP: phys_cpu_present_map = 0x%lx\n", | 380 | printk("VOYAGER SMP: voyager_phys_cpu_present_map = 0x%lx\n", |
| 381 | cpus_addr(phys_cpu_present_map)[0]); | 381 | cpus_addr(voyager_phys_cpu_present_map)[0]); |
| 382 | /* Here we set up the VIC to enable SMP */ | 382 | /* Here we set up the VIC to enable SMP */ |
| 383 | /* enable the CPIs by writing the base vector to their register */ | 383 | /* enable the CPIs by writing the base vector to their register */ |
| 384 | outb(VIC_DEFAULT_CPI_BASE, VIC_CPI_BASE_REGISTER); | 384 | outb(VIC_DEFAULT_CPI_BASE, VIC_CPI_BASE_REGISTER); |
| @@ -628,15 +628,15 @@ void __init smp_boot_cpus(void) | |||
| 628 | /* now that the cat has probed the Voyager System Bus, sanity | 628 | /* now that the cat has probed the Voyager System Bus, sanity |
| 629 | * check the cpu map */ | 629 | * check the cpu map */ |
| 630 | if (((voyager_quad_processors | voyager_extended_vic_processors) | 630 | if (((voyager_quad_processors | voyager_extended_vic_processors) |
| 631 | & cpus_addr(phys_cpu_present_map)[0]) != | 631 | & cpus_addr(voyager_phys_cpu_present_map)[0]) != |
| 632 | cpus_addr(phys_cpu_present_map)[0]) { | 632 | cpus_addr(voyager_phys_cpu_present_map)[0]) { |
| 633 | /* should panic */ | 633 | /* should panic */ |
| 634 | printk("\n\n***WARNING*** " | 634 | printk("\n\n***WARNING*** " |
| 635 | "Sanity check of CPU present map FAILED\n"); | 635 | "Sanity check of CPU present map FAILED\n"); |
| 636 | } | 636 | } |
| 637 | } else if (voyager_level == 4) | 637 | } else if (voyager_level == 4) |
| 638 | voyager_extended_vic_processors = | 638 | voyager_extended_vic_processors = |
| 639 | cpus_addr(phys_cpu_present_map)[0]; | 639 | cpus_addr(voyager_phys_cpu_present_map)[0]; |
| 640 | 640 | ||
| 641 | /* this sets up the idle task to run on the current cpu */ | 641 | /* this sets up the idle task to run on the current cpu */ |
| 642 | voyager_extended_cpus = 1; | 642 | voyager_extended_cpus = 1; |
| @@ -670,7 +670,7 @@ void __init smp_boot_cpus(void) | |||
| 670 | /* loop over all the extended VIC CPUs and boot them. The | 670 | /* loop over all the extended VIC CPUs and boot them. The |
| 671 | * Quad CPUs must be bootstrapped by their extended VIC cpu */ | 671 | * Quad CPUs must be bootstrapped by their extended VIC cpu */ |
| 672 | for (i = 0; i < nr_cpu_ids; i++) { | 672 | for (i = 0; i < nr_cpu_ids; i++) { |
| 673 | if (i == boot_cpu_id || !cpu_isset(i, phys_cpu_present_map)) | 673 | if (i == boot_cpu_id || !cpu_isset(i, voyager_phys_cpu_present_map)) |
| 674 | continue; | 674 | continue; |
| 675 | do_boot_cpu(i); | 675 | do_boot_cpu(i); |
| 676 | /* This udelay seems to be needed for the Quad boots | 676 | /* This udelay seems to be needed for the Quad boots |
diff --git a/arch/x86/math-emu/fpu_aux.c b/arch/x86/math-emu/fpu_aux.c index 491e737ce547..aa0987088774 100644 --- a/arch/x86/math-emu/fpu_aux.c +++ b/arch/x86/math-emu/fpu_aux.c | |||
| @@ -30,20 +30,29 @@ static void fclex(void) | |||
| 30 | } | 30 | } |
| 31 | 31 | ||
| 32 | /* Needs to be externally visible */ | 32 | /* Needs to be externally visible */ |
| 33 | void finit(void) | 33 | void finit_task(struct task_struct *tsk) |
| 34 | { | 34 | { |
| 35 | control_word = 0x037f; | 35 | struct i387_soft_struct *soft = &tsk->thread.xstate->soft; |
| 36 | partial_status = 0; | 36 | struct address *oaddr, *iaddr; |
| 37 | top = 0; /* We don't keep top in the status word internally. */ | 37 | soft->cwd = 0x037f; |
| 38 | fpu_tag_word = 0xffff; | 38 | soft->swd = 0; |
| 39 | soft->ftop = 0; /* We don't keep top in the status word internally. */ | ||
| 40 | soft->twd = 0xffff; | ||
| 39 | /* The behaviour is different from that detailed in | 41 | /* The behaviour is different from that detailed in |
| 40 | Section 15.1.6 of the Intel manual */ | 42 | Section 15.1.6 of the Intel manual */ |
| 41 | operand_address.offset = 0; | 43 | oaddr = (struct address *)&soft->foo; |
| 42 | operand_address.selector = 0; | 44 | oaddr->offset = 0; |
| 43 | instruction_address.offset = 0; | 45 | oaddr->selector = 0; |
| 44 | instruction_address.selector = 0; | 46 | iaddr = (struct address *)&soft->fip; |
| 45 | instruction_address.opcode = 0; | 47 | iaddr->offset = 0; |
| 46 | no_ip_update = 1; | 48 | iaddr->selector = 0; |
| 49 | iaddr->opcode = 0; | ||
| 50 | soft->no_update = 1; | ||
| 51 | } | ||
| 52 | |||
| 53 | void finit(void) | ||
| 54 | { | ||
| 55 | finit_task(current); | ||
| 47 | } | 56 | } |
| 48 | 57 | ||
| 49 | /* | 58 | /* |
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index e6d36b490250..b1352250096e 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c | |||
| @@ -714,6 +714,8 @@ unsigned long __init_refok init_memory_mapping(unsigned long start, | |||
| 714 | pos = start_pfn << PAGE_SHIFT; | 714 | pos = start_pfn << PAGE_SHIFT; |
| 715 | end_pfn = ((pos + (PMD_SIZE - 1)) >> PMD_SHIFT) | 715 | end_pfn = ((pos + (PMD_SIZE - 1)) >> PMD_SHIFT) |
| 716 | << (PMD_SHIFT - PAGE_SHIFT); | 716 | << (PMD_SHIFT - PAGE_SHIFT); |
| 717 | if (end_pfn > (end >> PAGE_SHIFT)) | ||
| 718 | end_pfn = end >> PAGE_SHIFT; | ||
| 717 | if (start_pfn < end_pfn) { | 719 | if (start_pfn < end_pfn) { |
| 718 | nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0); | 720 | nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0); |
| 719 | pos = end_pfn << PAGE_SHIFT; | 721 | pos = end_pfn << PAGE_SHIFT; |
diff --git a/arch/x86/mm/iomap_32.c b/arch/x86/mm/iomap_32.c index ca53224fc56c..04102d42ff42 100644 --- a/arch/x86/mm/iomap_32.c +++ b/arch/x86/mm/iomap_32.c | |||
| @@ -20,6 +20,17 @@ | |||
| 20 | #include <asm/pat.h> | 20 | #include <asm/pat.h> |
| 21 | #include <linux/module.h> | 21 | #include <linux/module.h> |
| 22 | 22 | ||
| 23 | int is_io_mapping_possible(resource_size_t base, unsigned long size) | ||
| 24 | { | ||
| 25 | #ifndef CONFIG_X86_PAE | ||
| 26 | /* There is no way to map greater than 1 << 32 address without PAE */ | ||
| 27 | if (base + size > 0x100000000ULL) | ||
| 28 | return 0; | ||
| 29 | #endif | ||
| 30 | return 1; | ||
| 31 | } | ||
| 32 | EXPORT_SYMBOL_GPL(is_io_mapping_possible); | ||
| 33 | |||
| 23 | /* Map 'pfn' using fixed map 'type' and protections 'prot' | 34 | /* Map 'pfn' using fixed map 'type' and protections 'prot' |
| 24 | */ | 35 | */ |
| 25 | void * | 36 | void * |
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c index af750ab973b6..f45d5e29a72e 100644 --- a/arch/x86/mm/ioremap.c +++ b/arch/x86/mm/ioremap.c | |||
| @@ -134,25 +134,6 @@ int page_is_ram(unsigned long pagenr) | |||
| 134 | return 0; | 134 | return 0; |
| 135 | } | 135 | } |
| 136 | 136 | ||
| 137 | int pagerange_is_ram(unsigned long start, unsigned long end) | ||
| 138 | { | ||
| 139 | int ram_page = 0, not_rampage = 0; | ||
| 140 | unsigned long page_nr; | ||
| 141 | |||
| 142 | for (page_nr = (start >> PAGE_SHIFT); page_nr < (end >> PAGE_SHIFT); | ||
| 143 | ++page_nr) { | ||
| 144 | if (page_is_ram(page_nr)) | ||
| 145 | ram_page = 1; | ||
| 146 | else | ||
| 147 | not_rampage = 1; | ||
| 148 | |||
| 149 | if (ram_page == not_rampage) | ||
| 150 | return -1; | ||
| 151 | } | ||
| 152 | |||
| 153 | return ram_page; | ||
| 154 | } | ||
| 155 | |||
| 156 | /* | 137 | /* |
| 157 | * Fix up the linear direct mapping of the kernel to avoid cache attribute | 138 | * Fix up the linear direct mapping of the kernel to avoid cache attribute |
| 158 | * conflicts. | 139 | * conflicts. |
diff --git a/arch/x86/mm/kmmio.c b/arch/x86/mm/kmmio.c index 93d82038af4b..6a518dd08a36 100644 --- a/arch/x86/mm/kmmio.c +++ b/arch/x86/mm/kmmio.c | |||
| @@ -32,11 +32,14 @@ struct kmmio_fault_page { | |||
| 32 | struct list_head list; | 32 | struct list_head list; |
| 33 | struct kmmio_fault_page *release_next; | 33 | struct kmmio_fault_page *release_next; |
| 34 | unsigned long page; /* location of the fault page */ | 34 | unsigned long page; /* location of the fault page */ |
| 35 | bool old_presence; /* page presence prior to arming */ | ||
| 36 | bool armed; | ||
| 35 | 37 | ||
| 36 | /* | 38 | /* |
| 37 | * Number of times this page has been registered as a part | 39 | * Number of times this page has been registered as a part |
| 38 | * of a probe. If zero, page is disarmed and this may be freed. | 40 | * of a probe. If zero, page is disarmed and this may be freed. |
| 39 | * Used only by writers (RCU). | 41 | * Used only by writers (RCU) and post_kmmio_handler(). |
| 42 | * Protected by kmmio_lock, when linked into kmmio_page_table. | ||
| 40 | */ | 43 | */ |
| 41 | int count; | 44 | int count; |
| 42 | }; | 45 | }; |
| @@ -105,57 +108,85 @@ static struct kmmio_fault_page *get_kmmio_fault_page(unsigned long page) | |||
| 105 | return NULL; | 108 | return NULL; |
| 106 | } | 109 | } |
| 107 | 110 | ||
| 108 | static void set_page_present(unsigned long addr, bool present, | 111 | static void set_pmd_presence(pmd_t *pmd, bool present, bool *old) |
| 109 | unsigned int *pglevel) | 112 | { |
| 113 | pmdval_t v = pmd_val(*pmd); | ||
| 114 | *old = !!(v & _PAGE_PRESENT); | ||
| 115 | v &= ~_PAGE_PRESENT; | ||
| 116 | if (present) | ||
| 117 | v |= _PAGE_PRESENT; | ||
| 118 | set_pmd(pmd, __pmd(v)); | ||
| 119 | } | ||
| 120 | |||
| 121 | static void set_pte_presence(pte_t *pte, bool present, bool *old) | ||
| 122 | { | ||
| 123 | pteval_t v = pte_val(*pte); | ||
| 124 | *old = !!(v & _PAGE_PRESENT); | ||
| 125 | v &= ~_PAGE_PRESENT; | ||
| 126 | if (present) | ||
| 127 | v |= _PAGE_PRESENT; | ||
| 128 | set_pte_atomic(pte, __pte(v)); | ||
| 129 | } | ||
| 130 | |||
| 131 | static int set_page_presence(unsigned long addr, bool present, bool *old) | ||
| 110 | { | 132 | { |
| 111 | pteval_t pteval; | ||
| 112 | pmdval_t pmdval; | ||
| 113 | unsigned int level; | 133 | unsigned int level; |
| 114 | pmd_t *pmd; | ||
| 115 | pte_t *pte = lookup_address(addr, &level); | 134 | pte_t *pte = lookup_address(addr, &level); |
| 116 | 135 | ||
| 117 | if (!pte) { | 136 | if (!pte) { |
| 118 | pr_err("kmmio: no pte for page 0x%08lx\n", addr); | 137 | pr_err("kmmio: no pte for page 0x%08lx\n", addr); |
| 119 | return; | 138 | return -1; |
| 120 | } | 139 | } |
| 121 | 140 | ||
| 122 | if (pglevel) | ||
| 123 | *pglevel = level; | ||
| 124 | |||
| 125 | switch (level) { | 141 | switch (level) { |
| 126 | case PG_LEVEL_2M: | 142 | case PG_LEVEL_2M: |
| 127 | pmd = (pmd_t *)pte; | 143 | set_pmd_presence((pmd_t *)pte, present, old); |
| 128 | pmdval = pmd_val(*pmd) & ~_PAGE_PRESENT; | ||
| 129 | if (present) | ||
| 130 | pmdval |= _PAGE_PRESENT; | ||
| 131 | set_pmd(pmd, __pmd(pmdval)); | ||
| 132 | break; | 144 | break; |
| 133 | |||
| 134 | case PG_LEVEL_4K: | 145 | case PG_LEVEL_4K: |
| 135 | pteval = pte_val(*pte) & ~_PAGE_PRESENT; | 146 | set_pte_presence(pte, present, old); |
| 136 | if (present) | ||
| 137 | pteval |= _PAGE_PRESENT; | ||
| 138 | set_pte_atomic(pte, __pte(pteval)); | ||
| 139 | break; | 147 | break; |
| 140 | |||
| 141 | default: | 148 | default: |
| 142 | pr_err("kmmio: unexpected page level 0x%x.\n", level); | 149 | pr_err("kmmio: unexpected page level 0x%x.\n", level); |
| 143 | return; | 150 | return -1; |
| 144 | } | 151 | } |
| 145 | 152 | ||
| 146 | __flush_tlb_one(addr); | 153 | __flush_tlb_one(addr); |
| 154 | return 0; | ||
| 147 | } | 155 | } |
| 148 | 156 | ||
| 149 | /** Mark the given page as not present. Access to it will trigger a fault. */ | 157 | /* |
| 150 | static void arm_kmmio_fault_page(unsigned long page, unsigned int *pglevel) | 158 | * Mark the given page as not present. Access to it will trigger a fault. |
| 159 | * | ||
| 160 | * Struct kmmio_fault_page is protected by RCU and kmmio_lock, but the | ||
| 161 | * protection is ignored here. RCU read lock is assumed held, so the struct | ||
| 162 | * will not disappear unexpectedly. Furthermore, the caller must guarantee, | ||
| 163 | * that double arming the same virtual address (page) cannot occur. | ||
| 164 | * | ||
| 165 | * Double disarming on the other hand is allowed, and may occur when a fault | ||
| 166 | * and mmiotrace shutdown happen simultaneously. | ||
| 167 | */ | ||
| 168 | static int arm_kmmio_fault_page(struct kmmio_fault_page *f) | ||
| 151 | { | 169 | { |
| 152 | set_page_present(page & PAGE_MASK, false, pglevel); | 170 | int ret; |
| 171 | WARN_ONCE(f->armed, KERN_ERR "kmmio page already armed.\n"); | ||
| 172 | if (f->armed) { | ||
| 173 | pr_warning("kmmio double-arm: page 0x%08lx, ref %d, old %d\n", | ||
| 174 | f->page, f->count, f->old_presence); | ||
| 175 | } | ||
| 176 | ret = set_page_presence(f->page, false, &f->old_presence); | ||
| 177 | WARN_ONCE(ret < 0, KERN_ERR "kmmio arming 0x%08lx failed.\n", f->page); | ||
| 178 | f->armed = true; | ||
| 179 | return ret; | ||
| 153 | } | 180 | } |
| 154 | 181 | ||
| 155 | /** Mark the given page as present. */ | 182 | /** Restore the given page to saved presence state. */ |
| 156 | static void disarm_kmmio_fault_page(unsigned long page, unsigned int *pglevel) | 183 | static void disarm_kmmio_fault_page(struct kmmio_fault_page *f) |
| 157 | { | 184 | { |
| 158 | set_page_present(page & PAGE_MASK, true, pglevel); | 185 | bool tmp; |
| 186 | int ret = set_page_presence(f->page, f->old_presence, &tmp); | ||
| 187 | WARN_ONCE(ret < 0, | ||
| 188 | KERN_ERR "kmmio disarming 0x%08lx failed.\n", f->page); | ||
| 189 | f->armed = false; | ||
| 159 | } | 190 | } |
| 160 | 191 | ||
| 161 | /* | 192 | /* |
| @@ -202,28 +233,32 @@ int kmmio_handler(struct pt_regs *regs, unsigned long addr) | |||
| 202 | 233 | ||
| 203 | ctx = &get_cpu_var(kmmio_ctx); | 234 | ctx = &get_cpu_var(kmmio_ctx); |
| 204 | if (ctx->active) { | 235 | if (ctx->active) { |
| 205 | disarm_kmmio_fault_page(faultpage->page, NULL); | ||
| 206 | if (addr == ctx->addr) { | 236 | if (addr == ctx->addr) { |
| 207 | /* | 237 | /* |
| 208 | * On SMP we sometimes get recursive probe hits on the | 238 | * A second fault on the same page means some other |
| 209 | * same address. Context is already saved, fall out. | 239 | * condition needs handling by do_page_fault(), the |
| 240 | * page really not being present is the most common. | ||
| 210 | */ | 241 | */ |
| 211 | pr_debug("kmmio: duplicate probe hit on CPU %d, for " | 242 | pr_debug("kmmio: secondary hit for 0x%08lx CPU %d.\n", |
| 212 | "address 0x%08lx.\n", | 243 | addr, smp_processor_id()); |
| 213 | smp_processor_id(), addr); | 244 | |
| 214 | ret = 1; | 245 | if (!faultpage->old_presence) |
| 215 | goto no_kmmio_ctx; | 246 | pr_info("kmmio: unexpected secondary hit for " |
| 216 | } | 247 | "address 0x%08lx on CPU %d.\n", addr, |
| 217 | /* | 248 | smp_processor_id()); |
| 218 | * Prevent overwriting already in-flight context. | 249 | } else { |
| 219 | * This should not happen, let's hope disarming at least | 250 | /* |
| 220 | * prevents a panic. | 251 | * Prevent overwriting already in-flight context. |
| 221 | */ | 252 | * This should not happen, let's hope disarming at |
| 222 | pr_emerg("kmmio: recursive probe hit on CPU %d, " | 253 | * least prevents a panic. |
| 254 | */ | ||
| 255 | pr_emerg("kmmio: recursive probe hit on CPU %d, " | ||
| 223 | "for address 0x%08lx. Ignoring.\n", | 256 | "for address 0x%08lx. Ignoring.\n", |
| 224 | smp_processor_id(), addr); | 257 | smp_processor_id(), addr); |
| 225 | pr_emerg("kmmio: previous hit was at 0x%08lx.\n", | 258 | pr_emerg("kmmio: previous hit was at 0x%08lx.\n", |
| 226 | ctx->addr); | 259 | ctx->addr); |
| 260 | disarm_kmmio_fault_page(faultpage); | ||
| 261 | } | ||
| 227 | goto no_kmmio_ctx; | 262 | goto no_kmmio_ctx; |
| 228 | } | 263 | } |
| 229 | ctx->active++; | 264 | ctx->active++; |
| @@ -244,7 +279,7 @@ int kmmio_handler(struct pt_regs *regs, unsigned long addr) | |||
| 244 | regs->flags &= ~X86_EFLAGS_IF; | 279 | regs->flags &= ~X86_EFLAGS_IF; |
| 245 | 280 | ||
| 246 | /* Now we set present bit in PTE and single step. */ | 281 | /* Now we set present bit in PTE and single step. */ |
| 247 | disarm_kmmio_fault_page(ctx->fpage->page, NULL); | 282 | disarm_kmmio_fault_page(ctx->fpage); |
| 248 | 283 | ||
| 249 | /* | 284 | /* |
| 250 | * If another cpu accesses the same page while we are stepping, | 285 | * If another cpu accesses the same page while we are stepping, |
| @@ -275,7 +310,7 @@ static int post_kmmio_handler(unsigned long condition, struct pt_regs *regs) | |||
| 275 | struct kmmio_context *ctx = &get_cpu_var(kmmio_ctx); | 310 | struct kmmio_context *ctx = &get_cpu_var(kmmio_ctx); |
| 276 | 311 | ||
| 277 | if (!ctx->active) { | 312 | if (!ctx->active) { |
| 278 | pr_debug("kmmio: spurious debug trap on CPU %d.\n", | 313 | pr_warning("kmmio: spurious debug trap on CPU %d.\n", |
| 279 | smp_processor_id()); | 314 | smp_processor_id()); |
| 280 | goto out; | 315 | goto out; |
| 281 | } | 316 | } |
| @@ -283,7 +318,11 @@ static int post_kmmio_handler(unsigned long condition, struct pt_regs *regs) | |||
| 283 | if (ctx->probe && ctx->probe->post_handler) | 318 | if (ctx->probe && ctx->probe->post_handler) |
| 284 | ctx->probe->post_handler(ctx->probe, condition, regs); | 319 | ctx->probe->post_handler(ctx->probe, condition, regs); |
| 285 | 320 | ||
| 286 | arm_kmmio_fault_page(ctx->fpage->page, NULL); | 321 | /* Prevent racing against release_kmmio_fault_page(). */ |
| 322 | spin_lock(&kmmio_lock); | ||
| 323 | if (ctx->fpage->count) | ||
| 324 | arm_kmmio_fault_page(ctx->fpage); | ||
| 325 | spin_unlock(&kmmio_lock); | ||
| 287 | 326 | ||
| 288 | regs->flags &= ~X86_EFLAGS_TF; | 327 | regs->flags &= ~X86_EFLAGS_TF; |
| 289 | regs->flags |= ctx->saved_flags; | 328 | regs->flags |= ctx->saved_flags; |
| @@ -315,20 +354,24 @@ static int add_kmmio_fault_page(unsigned long page) | |||
| 315 | f = get_kmmio_fault_page(page); | 354 | f = get_kmmio_fault_page(page); |
| 316 | if (f) { | 355 | if (f) { |
| 317 | if (!f->count) | 356 | if (!f->count) |
| 318 | arm_kmmio_fault_page(f->page, NULL); | 357 | arm_kmmio_fault_page(f); |
| 319 | f->count++; | 358 | f->count++; |
| 320 | return 0; | 359 | return 0; |
| 321 | } | 360 | } |
| 322 | 361 | ||
| 323 | f = kmalloc(sizeof(*f), GFP_ATOMIC); | 362 | f = kzalloc(sizeof(*f), GFP_ATOMIC); |
| 324 | if (!f) | 363 | if (!f) |
| 325 | return -1; | 364 | return -1; |
| 326 | 365 | ||
| 327 | f->count = 1; | 366 | f->count = 1; |
| 328 | f->page = page; | 367 | f->page = page; |
| 329 | list_add_rcu(&f->list, kmmio_page_list(f->page)); | ||
| 330 | 368 | ||
| 331 | arm_kmmio_fault_page(f->page, NULL); | 369 | if (arm_kmmio_fault_page(f)) { |
| 370 | kfree(f); | ||
| 371 | return -1; | ||
| 372 | } | ||
| 373 | |||
| 374 | list_add_rcu(&f->list, kmmio_page_list(f->page)); | ||
| 332 | 375 | ||
| 333 | return 0; | 376 | return 0; |
| 334 | } | 377 | } |
| @@ -347,7 +390,7 @@ static void release_kmmio_fault_page(unsigned long page, | |||
| 347 | f->count--; | 390 | f->count--; |
| 348 | BUG_ON(f->count < 0); | 391 | BUG_ON(f->count < 0); |
| 349 | if (!f->count) { | 392 | if (!f->count) { |
| 350 | disarm_kmmio_fault_page(f->page, NULL); | 393 | disarm_kmmio_fault_page(f); |
| 351 | f->release_next = *release_list; | 394 | f->release_next = *release_list; |
| 352 | *release_list = f; | 395 | *release_list = f; |
| 353 | } | 396 | } |
| @@ -408,23 +451,24 @@ static void rcu_free_kmmio_fault_pages(struct rcu_head *head) | |||
| 408 | 451 | ||
| 409 | static void remove_kmmio_fault_pages(struct rcu_head *head) | 452 | static void remove_kmmio_fault_pages(struct rcu_head *head) |
| 410 | { | 453 | { |
| 411 | struct kmmio_delayed_release *dr = container_of( | 454 | struct kmmio_delayed_release *dr = |
| 412 | head, | 455 | container_of(head, struct kmmio_delayed_release, rcu); |
| 413 | struct kmmio_delayed_release, | ||
| 414 | rcu); | ||
| 415 | struct kmmio_fault_page *p = dr->release_list; | 456 | struct kmmio_fault_page *p = dr->release_list; |
| 416 | struct kmmio_fault_page **prevp = &dr->release_list; | 457 | struct kmmio_fault_page **prevp = &dr->release_list; |
| 417 | unsigned long flags; | 458 | unsigned long flags; |
| 459 | |||
| 418 | spin_lock_irqsave(&kmmio_lock, flags); | 460 | spin_lock_irqsave(&kmmio_lock, flags); |
| 419 | while (p) { | 461 | while (p) { |
| 420 | if (!p->count) | 462 | if (!p->count) { |
| 421 | list_del_rcu(&p->list); | 463 | list_del_rcu(&p->list); |
| 422 | else | 464 | prevp = &p->release_next; |
| 465 | } else { | ||
| 423 | *prevp = p->release_next; | 466 | *prevp = p->release_next; |
| 424 | prevp = &p->release_next; | 467 | } |
| 425 | p = p->release_next; | 468 | p = p->release_next; |
| 426 | } | 469 | } |
| 427 | spin_unlock_irqrestore(&kmmio_lock, flags); | 470 | spin_unlock_irqrestore(&kmmio_lock, flags); |
| 471 | |||
| 428 | /* This is the real RCU destroy call. */ | 472 | /* This is the real RCU destroy call. */ |
| 429 | call_rcu(&dr->rcu, rcu_free_kmmio_fault_pages); | 473 | call_rcu(&dr->rcu, rcu_free_kmmio_fault_pages); |
| 430 | } | 474 | } |
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c index 71a14f89f89e..f3516da035d1 100644 --- a/arch/x86/mm/numa_64.c +++ b/arch/x86/mm/numa_64.c | |||
| @@ -145,7 +145,7 @@ int __init compute_hash_shift(struct bootnode *nodes, int numnodes, | |||
| 145 | return shift; | 145 | return shift; |
| 146 | } | 146 | } |
| 147 | 147 | ||
| 148 | int early_pfn_to_nid(unsigned long pfn) | 148 | int __meminit __early_pfn_to_nid(unsigned long pfn) |
| 149 | { | 149 | { |
| 150 | return phys_to_nid(pfn << PAGE_SHIFT); | 150 | return phys_to_nid(pfn << PAGE_SHIFT); |
| 151 | } | 151 | } |
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index 84ba74820ad6..7be47d1a97e4 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c | |||
| @@ -508,18 +508,13 @@ static int split_large_page(pte_t *kpte, unsigned long address) | |||
| 508 | #endif | 508 | #endif |
| 509 | 509 | ||
| 510 | /* | 510 | /* |
| 511 | * Install the new, split up pagetable. Important details here: | 511 | * Install the new, split up pagetable. |
| 512 | * | 512 | * |
| 513 | * On Intel the NX bit of all levels must be cleared to make a | 513 | * We use the standard kernel pagetable protections for the new |
| 514 | * page executable. See section 4.13.2 of Intel 64 and IA-32 | 514 | * pagetable protections, the actual ptes set above control the |
| 515 | * Architectures Software Developer's Manual). | 515 | * primary protection behavior: |
| 516 | * | ||
| 517 | * Mark the entry present. The current mapping might be | ||
| 518 | * set to not present, which we preserved above. | ||
| 519 | */ | 516 | */ |
| 520 | ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte))); | 517 | __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); |
| 521 | pgprot_val(ref_prot) |= _PAGE_PRESENT; | ||
| 522 | __set_pmd_pte(kpte, address, mk_pte(base, ref_prot)); | ||
| 523 | base = NULL; | 518 | base = NULL; |
| 524 | 519 | ||
| 525 | out_unlock: | 520 | out_unlock: |
| @@ -575,7 +570,6 @@ static int __change_page_attr(struct cpa_data *cpa, int primary) | |||
| 575 | address = cpa->vaddr[cpa->curpage]; | 570 | address = cpa->vaddr[cpa->curpage]; |
| 576 | else | 571 | else |
| 577 | address = *cpa->vaddr; | 572 | address = *cpa->vaddr; |
| 578 | |||
| 579 | repeat: | 573 | repeat: |
| 580 | kpte = lookup_address(address, &level); | 574 | kpte = lookup_address(address, &level); |
| 581 | if (!kpte) | 575 | if (!kpte) |
| @@ -812,6 +806,13 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages, | |||
| 812 | 806 | ||
| 813 | vm_unmap_aliases(); | 807 | vm_unmap_aliases(); |
| 814 | 808 | ||
| 809 | /* | ||
| 810 | * If we're called with lazy mmu updates enabled, the | ||
| 811 | * in-memory pte state may be stale. Flush pending updates to | ||
| 812 | * bring them up to date. | ||
| 813 | */ | ||
| 814 | arch_flush_lazy_mmu_mode(); | ||
| 815 | |||
| 815 | cpa.vaddr = addr; | 816 | cpa.vaddr = addr; |
| 816 | cpa.numpages = numpages; | 817 | cpa.numpages = numpages; |
| 817 | cpa.mask_set = mask_set; | 818 | cpa.mask_set = mask_set; |
| @@ -854,6 +855,13 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages, | |||
| 854 | } else | 855 | } else |
| 855 | cpa_flush_all(cache); | 856 | cpa_flush_all(cache); |
| 856 | 857 | ||
| 858 | /* | ||
| 859 | * If we've been called with lazy mmu updates enabled, then | ||
| 860 | * make sure that everything gets flushed out before we | ||
| 861 | * return. | ||
| 862 | */ | ||
| 863 | arch_flush_lazy_mmu_mode(); | ||
| 864 | |||
| 857 | out: | 865 | out: |
| 858 | return ret; | 866 | return ret; |
| 859 | } | 867 | } |
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c index 7b61036427df..e0ab173b6974 100644 --- a/arch/x86/mm/pat.c +++ b/arch/x86/mm/pat.c | |||
| @@ -11,6 +11,7 @@ | |||
| 11 | #include <linux/bootmem.h> | 11 | #include <linux/bootmem.h> |
| 12 | #include <linux/debugfs.h> | 12 | #include <linux/debugfs.h> |
| 13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
| 14 | #include <linux/module.h> | ||
| 14 | #include <linux/gfp.h> | 15 | #include <linux/gfp.h> |
| 15 | #include <linux/mm.h> | 16 | #include <linux/mm.h> |
| 16 | #include <linux/fs.h> | 17 | #include <linux/fs.h> |
| @@ -211,6 +212,33 @@ chk_conflict(struct memtype *new, struct memtype *entry, unsigned long *type) | |||
| 211 | static struct memtype *cached_entry; | 212 | static struct memtype *cached_entry; |
| 212 | static u64 cached_start; | 213 | static u64 cached_start; |
| 213 | 214 | ||
| 215 | static int pat_pagerange_is_ram(unsigned long start, unsigned long end) | ||
| 216 | { | ||
| 217 | int ram_page = 0, not_rampage = 0; | ||
| 218 | unsigned long page_nr; | ||
| 219 | |||
| 220 | for (page_nr = (start >> PAGE_SHIFT); page_nr < (end >> PAGE_SHIFT); | ||
| 221 | ++page_nr) { | ||
| 222 | /* | ||
| 223 | * For legacy reasons, physical address range in the legacy ISA | ||
| 224 | * region is tracked as non-RAM. This will allow users of | ||
| 225 | * /dev/mem to map portions of legacy ISA region, even when | ||
| 226 | * some of those portions are listed(or not even listed) with | ||
| 227 | * different e820 types(RAM/reserved/..) | ||
| 228 | */ | ||
| 229 | if (page_nr >= (ISA_END_ADDRESS >> PAGE_SHIFT) && | ||
| 230 | page_is_ram(page_nr)) | ||
| 231 | ram_page = 1; | ||
| 232 | else | ||
| 233 | not_rampage = 1; | ||
| 234 | |||
| 235 | if (ram_page == not_rampage) | ||
| 236 | return -1; | ||
| 237 | } | ||
| 238 | |||
| 239 | return ram_page; | ||
| 240 | } | ||
| 241 | |||
| 214 | /* | 242 | /* |
| 215 | * For RAM pages, mark the pages as non WB memory type using | 243 | * For RAM pages, mark the pages as non WB memory type using |
| 216 | * PageNonWB (PG_arch_1). We allow only one set_memory_uc() or | 244 | * PageNonWB (PG_arch_1). We allow only one set_memory_uc() or |
| @@ -336,20 +364,12 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type, | |||
| 336 | if (new_type) | 364 | if (new_type) |
| 337 | *new_type = actual_type; | 365 | *new_type = actual_type; |
| 338 | 366 | ||
| 339 | /* | 367 | is_range_ram = pat_pagerange_is_ram(start, end); |
| 340 | * For legacy reasons, some parts of the physical address range in the | 368 | if (is_range_ram == 1) |
| 341 | * legacy 1MB region is treated as non-RAM (even when listed as RAM in | 369 | return reserve_ram_pages_type(start, end, req_type, |
| 342 | * the e820 tables). So we will track the memory attributes of this | 370 | new_type); |
| 343 | * legacy 1MB region using the linear memtype_list always. | 371 | else if (is_range_ram < 0) |
| 344 | */ | 372 | return -EINVAL; |
| 345 | if (end >= ISA_END_ADDRESS) { | ||
| 346 | is_range_ram = pagerange_is_ram(start, end); | ||
| 347 | if (is_range_ram == 1) | ||
| 348 | return reserve_ram_pages_type(start, end, req_type, | ||
| 349 | new_type); | ||
| 350 | else if (is_range_ram < 0) | ||
| 351 | return -EINVAL; | ||
| 352 | } | ||
| 353 | 373 | ||
| 354 | new = kmalloc(sizeof(struct memtype), GFP_KERNEL); | 374 | new = kmalloc(sizeof(struct memtype), GFP_KERNEL); |
| 355 | if (!new) | 375 | if (!new) |
| @@ -446,19 +466,11 @@ int free_memtype(u64 start, u64 end) | |||
| 446 | if (is_ISA_range(start, end - 1)) | 466 | if (is_ISA_range(start, end - 1)) |
| 447 | return 0; | 467 | return 0; |
| 448 | 468 | ||
| 449 | /* | 469 | is_range_ram = pat_pagerange_is_ram(start, end); |
| 450 | * For legacy reasons, some parts of the physical address range in the | 470 | if (is_range_ram == 1) |
| 451 | * legacy 1MB region is treated as non-RAM (even when listed as RAM in | 471 | return free_ram_pages_type(start, end); |
| 452 | * the e820 tables). So we will track the memory attributes of this | 472 | else if (is_range_ram < 0) |
| 453 | * legacy 1MB region using the linear memtype_list always. | 473 | return -EINVAL; |
| 454 | */ | ||
| 455 | if (end >= ISA_END_ADDRESS) { | ||
| 456 | is_range_ram = pagerange_is_ram(start, end); | ||
| 457 | if (is_range_ram == 1) | ||
| 458 | return free_ram_pages_type(start, end); | ||
| 459 | else if (is_range_ram < 0) | ||
| 460 | return -EINVAL; | ||
| 461 | } | ||
| 462 | 474 | ||
| 463 | spin_lock(&memtype_lock); | 475 | spin_lock(&memtype_lock); |
| 464 | list_for_each_entry(entry, &memtype_list, nd) { | 476 | list_for_each_entry(entry, &memtype_list, nd) { |
| @@ -626,17 +638,13 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot, | |||
| 626 | unsigned long flags; | 638 | unsigned long flags; |
| 627 | unsigned long want_flags = (pgprot_val(*vma_prot) & _PAGE_CACHE_MASK); | 639 | unsigned long want_flags = (pgprot_val(*vma_prot) & _PAGE_CACHE_MASK); |
| 628 | 640 | ||
| 629 | is_ram = pagerange_is_ram(paddr, paddr + size); | 641 | is_ram = pat_pagerange_is_ram(paddr, paddr + size); |
| 630 | 642 | ||
| 631 | if (is_ram != 0) { | 643 | /* |
| 632 | /* | 644 | * reserve_pfn_range() doesn't support RAM pages. |
| 633 | * For mapping RAM pages, drivers need to call | 645 | */ |
| 634 | * set_memory_[uc|wc|wb] directly, for reserve and free, before | 646 | if (is_ram != 0) |
| 635 | * setting up the PTE. | 647 | return -EINVAL; |
| 636 | */ | ||
| 637 | WARN_ON_ONCE(1); | ||
| 638 | return 0; | ||
| 639 | } | ||
| 640 | 648 | ||
| 641 | ret = reserve_memtype(paddr, paddr + size, want_flags, &flags); | 649 | ret = reserve_memtype(paddr, paddr + size, want_flags, &flags); |
| 642 | if (ret) | 650 | if (ret) |
| @@ -693,7 +701,7 @@ static void free_pfn_range(u64 paddr, unsigned long size) | |||
| 693 | { | 701 | { |
| 694 | int is_ram; | 702 | int is_ram; |
| 695 | 703 | ||
| 696 | is_ram = pagerange_is_ram(paddr, paddr + size); | 704 | is_ram = pat_pagerange_is_ram(paddr, paddr + size); |
| 697 | if (is_ram == 0) | 705 | if (is_ram == 0) |
| 698 | free_memtype(paddr, paddr + size); | 706 | free_memtype(paddr, paddr + size); |
| 699 | } | 707 | } |
| @@ -861,6 +869,7 @@ pgprot_t pgprot_writecombine(pgprot_t prot) | |||
| 861 | else | 869 | else |
| 862 | return pgprot_noncached(prot); | 870 | return pgprot_noncached(prot); |
| 863 | } | 871 | } |
| 872 | EXPORT_SYMBOL_GPL(pgprot_writecombine); | ||
| 864 | 873 | ||
| 865 | #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT) | 874 | #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT) |
| 866 | 875 | ||
diff --git a/arch/x86/mm/testmmiotrace.c b/arch/x86/mm/testmmiotrace.c index ab50a8d7402c..427fd1b56df5 100644 --- a/arch/x86/mm/testmmiotrace.c +++ b/arch/x86/mm/testmmiotrace.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Written by Pekka Paalanen, 2008 <pq@iki.fi> | 2 | * Written by Pekka Paalanen, 2008-2009 <pq@iki.fi> |
| 3 | */ | 3 | */ |
| 4 | #include <linux/module.h> | 4 | #include <linux/module.h> |
| 5 | #include <linux/io.h> | 5 | #include <linux/io.h> |
| @@ -9,35 +9,74 @@ | |||
| 9 | 9 | ||
| 10 | static unsigned long mmio_address; | 10 | static unsigned long mmio_address; |
| 11 | module_param(mmio_address, ulong, 0); | 11 | module_param(mmio_address, ulong, 0); |
| 12 | MODULE_PARM_DESC(mmio_address, "Start address of the mapping of 16 kB."); | 12 | MODULE_PARM_DESC(mmio_address, " Start address of the mapping of 16 kB " |
| 13 | "(or 8 MB if read_far is non-zero)."); | ||
| 14 | |||
| 15 | static unsigned long read_far = 0x400100; | ||
| 16 | module_param(read_far, ulong, 0); | ||
| 17 | MODULE_PARM_DESC(read_far, " Offset of a 32-bit read within 8 MB " | ||
| 18 | "(default: 0x400100)."); | ||
| 19 | |||
| 20 | static unsigned v16(unsigned i) | ||
| 21 | { | ||
| 22 | return i * 12 + 7; | ||
| 23 | } | ||
| 24 | |||
| 25 | static unsigned v32(unsigned i) | ||
| 26 | { | ||
| 27 | return i * 212371 + 13; | ||
| 28 | } | ||
| 13 | 29 | ||
| 14 | static void do_write_test(void __iomem *p) | 30 | static void do_write_test(void __iomem *p) |
| 15 | { | 31 | { |
| 16 | unsigned int i; | 32 | unsigned int i; |
| 33 | pr_info(MODULE_NAME ": write test.\n"); | ||
| 17 | mmiotrace_printk("Write test.\n"); | 34 | mmiotrace_printk("Write test.\n"); |
| 35 | |||
| 18 | for (i = 0; i < 256; i++) | 36 | for (i = 0; i < 256; i++) |
| 19 | iowrite8(i, p + i); | 37 | iowrite8(i, p + i); |
| 38 | |||
| 20 | for (i = 1024; i < (5 * 1024); i += 2) | 39 | for (i = 1024; i < (5 * 1024); i += 2) |
| 21 | iowrite16(i * 12 + 7, p + i); | 40 | iowrite16(v16(i), p + i); |
| 41 | |||
| 22 | for (i = (5 * 1024); i < (16 * 1024); i += 4) | 42 | for (i = (5 * 1024); i < (16 * 1024); i += 4) |
| 23 | iowrite32(i * 212371 + 13, p + i); | 43 | iowrite32(v32(i), p + i); |
| 24 | } | 44 | } |
| 25 | 45 | ||
| 26 | static void do_read_test(void __iomem *p) | 46 | static void do_read_test(void __iomem *p) |
| 27 | { | 47 | { |
| 28 | unsigned int i; | 48 | unsigned int i; |
| 49 | unsigned errs[3] = { 0 }; | ||
| 50 | pr_info(MODULE_NAME ": read test.\n"); | ||
| 29 | mmiotrace_printk("Read test.\n"); | 51 | mmiotrace_printk("Read test.\n"); |
| 52 | |||
| 30 | for (i = 0; i < 256; i++) | 53 | for (i = 0; i < 256; i++) |
| 31 | ioread8(p + i); | 54 | if (ioread8(p + i) != i) |
| 55 | ++errs[0]; | ||
| 56 | |||
| 32 | for (i = 1024; i < (5 * 1024); i += 2) | 57 | for (i = 1024; i < (5 * 1024); i += 2) |
| 33 | ioread16(p + i); | 58 | if (ioread16(p + i) != v16(i)) |
| 59 | ++errs[1]; | ||
| 60 | |||
| 34 | for (i = (5 * 1024); i < (16 * 1024); i += 4) | 61 | for (i = (5 * 1024); i < (16 * 1024); i += 4) |
| 35 | ioread32(p + i); | 62 | if (ioread32(p + i) != v32(i)) |
| 63 | ++errs[2]; | ||
| 64 | |||
| 65 | mmiotrace_printk("Read errors: 8-bit %d, 16-bit %d, 32-bit %d.\n", | ||
| 66 | errs[0], errs[1], errs[2]); | ||
| 36 | } | 67 | } |
| 37 | 68 | ||
| 38 | static void do_test(void) | 69 | static void do_read_far_test(void __iomem *p) |
| 39 | { | 70 | { |
| 40 | void __iomem *p = ioremap_nocache(mmio_address, 0x4000); | 71 | pr_info(MODULE_NAME ": read far test.\n"); |
| 72 | mmiotrace_printk("Read far test.\n"); | ||
| 73 | |||
| 74 | ioread32(p + read_far); | ||
| 75 | } | ||
| 76 | |||
| 77 | static void do_test(unsigned long size) | ||
| 78 | { | ||
| 79 | void __iomem *p = ioremap_nocache(mmio_address, size); | ||
| 41 | if (!p) { | 80 | if (!p) { |
| 42 | pr_err(MODULE_NAME ": could not ioremap, aborting.\n"); | 81 | pr_err(MODULE_NAME ": could not ioremap, aborting.\n"); |
| 43 | return; | 82 | return; |
| @@ -45,11 +84,15 @@ static void do_test(void) | |||
| 45 | mmiotrace_printk("ioremap returned %p.\n", p); | 84 | mmiotrace_printk("ioremap returned %p.\n", p); |
| 46 | do_write_test(p); | 85 | do_write_test(p); |
| 47 | do_read_test(p); | 86 | do_read_test(p); |
| 87 | if (read_far && read_far < size - 4) | ||
| 88 | do_read_far_test(p); | ||
| 48 | iounmap(p); | 89 | iounmap(p); |
| 49 | } | 90 | } |
| 50 | 91 | ||
| 51 | static int __init init(void) | 92 | static int __init init(void) |
| 52 | { | 93 | { |
| 94 | unsigned long size = (read_far) ? (8 << 20) : (16 << 10); | ||
| 95 | |||
| 53 | if (mmio_address == 0) { | 96 | if (mmio_address == 0) { |
| 54 | pr_err(MODULE_NAME ": you have to use the module argument " | 97 | pr_err(MODULE_NAME ": you have to use the module argument " |
| 55 | "mmio_address.\n"); | 98 | "mmio_address.\n"); |
| @@ -58,10 +101,11 @@ static int __init init(void) | |||
| 58 | return -ENXIO; | 101 | return -ENXIO; |
| 59 | } | 102 | } |
| 60 | 103 | ||
| 61 | pr_warning(MODULE_NAME ": WARNING: mapping 16 kB @ 0x%08lx " | 104 | pr_warning(MODULE_NAME ": WARNING: mapping %lu kB @ 0x%08lx in PCI " |
| 62 | "in PCI address space, and writing " | 105 | "address space, and writing 16 kB of rubbish in there.\n", |
| 63 | "rubbish in there.\n", mmio_address); | 106 | size >> 10, mmio_address); |
| 64 | do_test(); | 107 | do_test(size); |
| 108 | pr_info(MODULE_NAME ": All done.\n"); | ||
| 65 | return 0; | 109 | return 0; |
| 66 | } | 110 | } |
| 67 | 111 | ||
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c index e9f80c744cf3..10131fbdaada 100644 --- a/arch/x86/oprofile/op_model_ppro.c +++ b/arch/x86/oprofile/op_model_ppro.c | |||
| @@ -78,8 +78,18 @@ static void ppro_setup_ctrs(struct op_msrs const * const msrs) | |||
| 78 | if (cpu_has_arch_perfmon) { | 78 | if (cpu_has_arch_perfmon) { |
| 79 | union cpuid10_eax eax; | 79 | union cpuid10_eax eax; |
| 80 | eax.full = cpuid_eax(0xa); | 80 | eax.full = cpuid_eax(0xa); |
| 81 | if (counter_width < eax.split.bit_width) | 81 | |
| 82 | counter_width = eax.split.bit_width; | 82 | /* |
| 83 | * For Core2 (family 6, model 15), don't reset the | ||
| 84 | * counter width: | ||
| 85 | */ | ||
| 86 | if (!(eax.split.version_id == 0 && | ||
| 87 | current_cpu_data.x86 == 6 && | ||
| 88 | current_cpu_data.x86_model == 15)) { | ||
| 89 | |||
| 90 | if (counter_width < eax.split.bit_width) | ||
| 91 | counter_width = eax.split.bit_width; | ||
| 92 | } | ||
| 83 | } | 93 | } |
| 84 | 94 | ||
| 85 | /* clear all counters */ | 95 | /* clear all counters */ |
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index bea215230b20..b58e96338149 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c | |||
| @@ -1672,6 +1672,9 @@ asmlinkage void __init xen_start_kernel(void) | |||
| 1672 | possible map and a non-dummy shared_info. */ | 1672 | possible map and a non-dummy shared_info. */ |
| 1673 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; | 1673 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
| 1674 | 1674 | ||
| 1675 | local_irq_disable(); | ||
| 1676 | early_boot_irqs_off(); | ||
| 1677 | |||
| 1675 | xen_raw_console_write("mapping kernel into physical memory\n"); | 1678 | xen_raw_console_write("mapping kernel into physical memory\n"); |
| 1676 | pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages); | 1679 | pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages); |
| 1677 | 1680 | ||
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 6c873dceb177..981200830432 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig | |||
| @@ -103,9 +103,6 @@ config MATH_EMULATION | |||
| 103 | help | 103 | help |
| 104 | Can we use information of configuration file? | 104 | Can we use information of configuration file? |
| 105 | 105 | ||
| 106 | config HIGHMEM | ||
| 107 | bool "High memory support" | ||
| 108 | |||
| 109 | endmenu | 106 | endmenu |
| 110 | 107 | ||
| 111 | menu "Platform options" | 108 | menu "Platform options" |
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c index 9606d2bd1dd9..4ec1633c2941 100644 --- a/arch/xtensa/kernel/setup.c +++ b/arch/xtensa/kernel/setup.c | |||
| @@ -44,6 +44,8 @@ | |||
| 44 | #include <asm/setup.h> | 44 | #include <asm/setup.h> |
| 45 | #include <asm/param.h> | 45 | #include <asm/param.h> |
| 46 | 46 | ||
| 47 | #include <platform/hardware.h> | ||
| 48 | |||
| 47 | #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) | 49 | #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) |
| 48 | struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16}; | 50 | struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16}; |
| 49 | #endif | 51 | #endif |
diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c index c7a021d9f696..c44f830b6c7a 100644 --- a/arch/xtensa/kernel/traps.c +++ b/arch/xtensa/kernel/traps.c | |||
| @@ -30,6 +30,7 @@ | |||
| 30 | #include <linux/stringify.h> | 30 | #include <linux/stringify.h> |
| 31 | #include <linux/kallsyms.h> | 31 | #include <linux/kallsyms.h> |
| 32 | #include <linux/delay.h> | 32 | #include <linux/delay.h> |
| 33 | #include <linux/hardirq.h> | ||
| 33 | 34 | ||
| 34 | #include <asm/ptrace.h> | 35 | #include <asm/ptrace.h> |
| 35 | #include <asm/timex.h> | 36 | #include <asm/timex.h> |
diff --git a/arch/xtensa/mm/fault.c b/arch/xtensa/mm/fault.c index 33f366be323f..bdd860d93f72 100644 --- a/arch/xtensa/mm/fault.c +++ b/arch/xtensa/mm/fault.c | |||
| @@ -14,6 +14,7 @@ | |||
| 14 | 14 | ||
| 15 | #include <linux/mm.h> | 15 | #include <linux/mm.h> |
| 16 | #include <linux/module.h> | 16 | #include <linux/module.h> |
| 17 | #include <linux/hardirq.h> | ||
| 17 | #include <asm/mmu_context.h> | 18 | #include <asm/mmu_context.h> |
| 18 | #include <asm/cacheflush.h> | 19 | #include <asm/cacheflush.h> |
| 19 | #include <asm/hardirq.h> | 20 | #include <asm/hardirq.h> |
diff --git a/arch/xtensa/platforms/iss/console.c b/arch/xtensa/platforms/iss/console.c index efed8897bef3..25d46c84eb08 100644 --- a/arch/xtensa/platforms/iss/console.c +++ b/arch/xtensa/platforms/iss/console.c | |||
| @@ -140,16 +140,14 @@ static void rs_poll(unsigned long priv) | |||
| 140 | } | 140 | } |
| 141 | 141 | ||
| 142 | 142 | ||
| 143 | static void rs_put_char(struct tty_struct *tty, unsigned char ch) | 143 | static int rs_put_char(struct tty_struct *tty, unsigned char ch) |
| 144 | { | 144 | { |
| 145 | char buf[2]; | 145 | char buf[2]; |
| 146 | 146 | ||
| 147 | if (!tty) | ||
| 148 | return; | ||
| 149 | |||
| 150 | buf[0] = ch; | 147 | buf[0] = ch; |
| 151 | buf[1] = '\0'; /* Is this NULL necessary? */ | 148 | buf[1] = '\0'; /* Is this NULL necessary? */ |
| 152 | __simc (SYS_write, 1, (unsigned long) buf, 1, 0, 0); | 149 | __simc (SYS_write, 1, (unsigned long) buf, 1, 0, 0); |
| 150 | return 1; | ||
| 153 | } | 151 | } |
| 154 | 152 | ||
| 155 | static void rs_flush_chars(struct tty_struct *tty) | 153 | static void rs_flush_chars(struct tty_struct *tty) |