190 files changed, 1500 insertions, 6115 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7275009686e6..9adc278a22ab 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -294,6 +294,8 @@ config ARCH_AT91
        bool "Atmel AT91"
        select ARCH_REQUIRE_GPIOLIB
        select HAVE_CLK
+        select CLKDEV_LOOKUP
+        select ARM_PATCH_PHYS_VIRT if MMU
        help
          This enables support for systems based on the Atmel AT91RM9200,
          AT91SAM9 and AT91CAP9 processors.
@@ -730,16 +732,6 @@ config ARCH_S5P64X0
          Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
          SMDK6450.
-config ARCH_S5P6442
-        bool "Samsung S5P6442"
-        select CPU_V6
-        select GENERIC_GPIO
-        select HAVE_CLK
-        select ARCH_USES_GETTIMEOFFSET
-        select HAVE_S3C2410_WATCHDOG if WATCHDOG
-        help
-          Samsung S5P6442 CPU based systems
 config ARCH_S5PC100
        bool "Samsung S5PC100"
        select GENERIC_GPIO
@@ -991,8 +983,6 @@ endif
 source "arch/arm/mach-s5p64x0/Kconfig"
-source "arch/arm/mach-s5p6442/Kconfig"
 source "arch/arm/mach-s5pc100/Kconfig"
 source "arch/arm/mach-s5pv210/Kconfig"
@@ -1399,7 +1389,6 @@ config NR_CPUS
 config HOTPLUG_CPU
        bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
        depends on SMP && HOTPLUG && EXPERIMENTAL
-        depends on !ARCH_MSM
        help
          Say Y here to experiment with turning CPUs off and on.  CPUs
          can be controlled through /sys/devices/system/cpu.
@@ -1420,7 +1409,7 @@ source kernel/Kconfig.preempt
 config HZ
        int
        default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
-                ARCH_S5P6442 || ARCH_S5PV210 || ARCH_EXYNOS4
+                ARCH_S5PV210 || ARCH_EXYNOS4
        default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
        default AT91_TIMER_HZ if ARCH_AT91
        default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
@@ -1516,6 +1505,9 @@ config ARCH_SPARSEMEM_DEFAULT
 config ARCH_SELECT_MEMORY_MODEL
        def_bool ARCH_SPARSEMEM_ENABLE
+config HAVE_ARCH_PFN_VALID
+        def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
 config HIGHMEM
        bool "High Memory Support"
        depends on MMU
@@ -1683,6 +1675,13 @@ endmenu
 menu "Boot options"
+config USE_OF
+        bool "Flattened Device Tree support"
+        select OF
+        select OF_EARLY_FLATTREE
+        help
+          Include support for flattened device tree machine descriptions.
 # Compressed boot loader in ROM.  Yes, we really want to ask about
 # TEXT and BSS so we preserve their values in the config files.
 config ZBOOT_ROM_TEXT
@@ -2021,7 +2020,7 @@ menu "Power management options"
 source "kernel/power/Kconfig"
 config ARCH_SUSPEND_POSSIBLE
-        depends on !ARCH_S5P64X0 && !ARCH_S5P6442 && !ARCH_S5PC100
+        depends on !ARCH_S5P64X0 && !ARCH_S5PC100
        depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
                CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
        def_bool y
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 25750bcb3397..f5b2b390c8f2 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -176,7 +176,6 @@ machine-$(CONFIG_ARCH_S3C2410)		:= s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c24
 machine-$(CONFIG_ARCH_S3C24A0)          := s3c24a0
 machine-$(CONFIG_ARCH_S3C64XX)          := s3c64xx
 machine-$(CONFIG_ARCH_S5P64X0)          := s5p64x0
-machine-$(CONFIG_ARCH_S5P6442)          := s5p6442
 machine-$(CONFIG_ARCH_S5PC100)          := s5pc100
 machine-$(CONFIG_ARCH_S5PV210)          := s5pv210
 machine-$(CONFIG_ARCH_EXYNOS4)          := exynos4
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index ea5ee4d067f3..4b71766fb21d 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -7,7 +7,7 @@ config ARM_VIC
 config ARM_VIC_NR
        int
        default 4 if ARCH_S5PV210
-        default 3 if ARCH_S5P6442 || ARCH_S5PC100
+        default 3 if ARCH_S5PC100
        default 2
        depends on ARM_VIC
        help
diff --git a/arch/arm/configs/at572d940hfek_defconfig b/arch/arm/configs/at572d940hfek_defconfig
deleted file mode 100644
index 1b1158ae8f82..000000000000
--- a/arch/arm/configs/at572d940hfek_defconfig
+++ /dev/null
@@ -1,358 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOCALVERSION="-AT572D940HF"
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_XACCT=y
-CONFIG_TASK_IO_ACCOUNTING=y
-CONFIG_AUDIT=y
-CONFIG_CGROUPS=y
-CONFIG_CGROUP_CPUACCT=y
-CONFIG_CGROUP_SCHED=y
-CONFIG_RT_GROUP_SCHED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_RELAY=y
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-CONFIG_KPROBES=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT572D940HF=y
-CONFIG_MACH_AT572D940HFEB=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_CMDLINE="mem=48M console=ttyS0 initrd=0x21100000,3145728 root=/dev/ram0 rw ip=172.16.1.181"
-CONFIG_KEXEC=y
-CONFIG_FPE_NWFPE=y
-CONFIG_FPE_NWFPE_XP=y
-CONFIG_NET=y
-CONFIG_PACKET=m
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_NET_PKTGEN=m
-CONFIG_NET_TCPPROBE=m
-CONFIG_CAN=m
-CONFIG_CAN_RAW=m
-CONFIG_CAN_BCM=m
-CONFIG_CAN_VCAN=m
-CONFIG_CAN_DEBUG_DEVICES=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_CONNECTOR=m
-CONFIG_MTD=m
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=1
-CONFIG_MTD_CONCAT=m
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=m
-CONFIG_MTD_BLOCK=m
-CONFIG_MTD_BLOCK_RO=m
-CONFIG_FTL=m
-CONFIG_NFTL=m
-CONFIG_NFTL_RW=y
-CONFIG_INFTL=m
-CONFIG_RFD_FTL=m
-CONFIG_SSFDC=m
-CONFIG_MTD_OOPS=m
-CONFIG_MTD_CFI=m
-CONFIG_MTD_JEDECPROBE=m
-CONFIG_MTD_CFI_INTELEXT=m
-CONFIG_MTD_CFI_AMDSTD=m
-CONFIG_MTD_CFI_STAA=m
-CONFIG_MTD_ROM=m
-CONFIG_MTD_ABSENT=m
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_PHYSMAP=m
-CONFIG_MTD_PLATRAM=m
-CONFIG_MTD_DATAFLASH=m
-CONFIG_MTD_M25P80=m
-CONFIG_MTD_SLRAM=m
-CONFIG_MTD_PHRAM=m
-CONFIG_MTD_MTDRAM=m
-CONFIG_MTD_BLOCK2MTD=m
-CONFIG_MTD_NAND=m
-CONFIG_MTD_NAND_VERIFY_WRITE=y
-CONFIG_MTD_NAND_DISKONCHIP=m
-CONFIG_MTD_NAND_NANDSIM=m
-CONFIG_MTD_NAND_PLATFORM=m
-CONFIG_MTD_ALAUDA=m
-CONFIG_MTD_UBI=m
-CONFIG_MTD_UBI_GLUEBI=m
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_CRYPTOLOOP=m
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=65536
-CONFIG_ATMEL_TCLIB=y
-CONFIG_ATMEL_SSC=m
-CONFIG_SENSORS_TSL2550=m
-CONFIG_DS1682=m
-CONFIG_RAID_ATTRS=m
-CONFIG_SCSI=m
-CONFIG_SCSI_TGT=m
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=m
-CONFIG_CHR_DEV_SCH=m
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_SCSI_ISCSI_ATTRS=m
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=m
-CONFIG_BONDING=m
-CONFIG_MACVLAN=m
-CONFIG_EQUALIZER=m
-CONFIG_TUN=m
-CONFIG_VETH=m
-CONFIG_PHYLIB=y
-CONFIG_MARVELL_PHY=m
-CONFIG_DAVICOM_PHY=m
-CONFIG_QSEMI_PHY=m
-CONFIG_LXT_PHY=m
-CONFIG_CICADA_PHY=m
-CONFIG_VITESSE_PHY=m
-CONFIG_SMSC_PHY=m
-CONFIG_BROADCOM_PHY=m
-CONFIG_ICPLUS_PHY=m
-CONFIG_MDIO_BITBANG=m
-CONFIG_NET_ETHERNET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_USB_ZD1201=m
-CONFIG_HOSTAP=m
-CONFIG_HOSTAP_FIRMWARE=y
-CONFIG_HOSTAP_FIRMWARE_NVRAM=y
-CONFIG_USB_CATC=m
-CONFIG_USB_KAWETH=m
-CONFIG_USB_PEGASUS=m
-CONFIG_USB_RTL8150=m
-CONFIG_USB_USBNET=m
-CONFIG_USB_NET_DM9601=m
-CONFIG_USB_NET_GL620A=m
-CONFIG_USB_NET_PLUSB=m
-CONFIG_USB_NET_MCS7830=m
-CONFIG_USB_NET_RNDIS_HOST=m
-CONFIG_USB_ALI_M5632=y
-CONFIG_USB_AN2720=y
-CONFIG_USB_EPSON2888=y
-CONFIG_USB_KC2190=y
-# CONFIG_USB_NET_ZAURUS is not set
-CONFIG_INPUT_MOUSEDEV=m
-CONFIG_INPUT_EVDEV=m
-CONFIG_INPUT_EVBUG=m
-CONFIG_KEYBOARD_LKKBD=m
-CONFIG_KEYBOARD_GPIO=m
-CONFIG_KEYBOARD_NEWTON=m
-CONFIG_KEYBOARD_STOWAWAY=m
-CONFIG_KEYBOARD_SUNKBD=m
-CONFIG_KEYBOARD_XTKBD=m
-CONFIG_MOUSE_PS2=m
-CONFIG_MOUSE_SERIAL=m
-CONFIG_MOUSE_APPLETOUCH=m
-CONFIG_MOUSE_VSXXXAA=m
-CONFIG_MOUSE_GPIO=m
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=m
-CONFIG_SERIO_SERPORT=m
-CONFIG_SERIO_RAW=m
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_SERIAL_NONSTANDARD=y
-CONFIG_N_HDLC=m
-CONFIG_SPECIALIX=m
-CONFIG_STALDRV=y
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_IPMI_HANDLER=m
-CONFIG_IPMI_DEVICE_INTERFACE=m
-CONFIG_IPMI_SI=m
-CONFIG_IPMI_WATCHDOG=m
-CONFIG_IPMI_POWEROFF=m
-CONFIG_HW_RANDOM=y
-CONFIG_R3964=m
-CONFIG_RAW_DRIVER=m
-CONFIG_TCG_TPM=m
-CONFIG_TCG_NSC=m
-CONFIG_TCG_ATMEL=m
-CONFIG_I2C=m
-CONFIG_I2C_CHARDEV=m
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-CONFIG_SPI_BITBANG=m
-CONFIG_SPI_SPIDEV=m
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_SEQUENCER=m
-CONFIG_SND_SEQ_DUMMY=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_PCM_OSS_PLUGINS is not set
-CONFIG_SND_SEQUENCER_OSS=y
-CONFIG_SND_DYNAMIC_MINORS=y
-# CONFIG_SND_VERBOSE_PROCFS is not set
-CONFIG_SND_DUMMY=m
-CONFIG_SND_VIRMIDI=m
-CONFIG_SND_USB_AUDIO=m
-CONFIG_SND_USB_CAIAQ=m
-CONFIG_SND_USB_CAIAQ_INPUT=y
-CONFIG_HID=m
-CONFIG_HIDRAW=y
-CONFIG_USB_HID=m
-CONFIG_USB_HIDDEV=y
-CONFIG_USB_KBD=m
-CONFIG_USB_MOUSE=m
-CONFIG_HID_A4TECH=m
-CONFIG_HID_APPLE=m
-CONFIG_HID_BELKIN=m
-CONFIG_HID_CHERRY=m
-CONFIG_HID_CHICONY=m
-CONFIG_HID_CYPRESS=m
-CONFIG_HID_EZKEY=m
-CONFIG_HID_GYRATION=m
-CONFIG_HID_LOGITECH=m
-CONFIG_HID_MICROSOFT=m
-CONFIG_HID_MONTEREY=m
-CONFIG_HID_PANTHERLORD=m
-CONFIG_HID_PETALYNX=m
-CONFIG_HID_SAMSUNG=m
-CONFIG_HID_SONY=m
-CONFIG_HID_SUNPLUS=m
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_DYNAMIC_MINORS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=m
-CONFIG_USB_STORAGE_DATAFAB=m
-CONFIG_USB_STORAGE_FREECOM=m
-CONFIG_USB_STORAGE_ISD200=m
-CONFIG_USB_STORAGE_USBAT=m
-CONFIG_USB_STORAGE_SDDR09=m
-CONFIG_USB_STORAGE_SDDR55=m
-CONFIG_USB_STORAGE_JUMPSHOT=m
-CONFIG_USB_STORAGE_ALAUDA=m
-CONFIG_USB_STORAGE_KARMA=m
-CONFIG_USB_LIBUSUAL=y
-CONFIG_USB_SERIAL=m
-CONFIG_USB_EZUSB=y
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_PL2303=m
-CONFIG_USB_SERIAL_SPCP8X5=m
-CONFIG_USB_SERIAL_DEBUG=m
-CONFIG_USB_EMI62=m
-CONFIG_USB_EMI26=m
-CONFIG_USB_ADUTUX=m
-CONFIG_USB_TEST=m
-CONFIG_USB_GADGET=m
-CONFIG_USB_GADGET_DEBUG_FILES=y
-CONFIG_USB_GADGET_DEBUG_FS=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_FILE_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_MIDI_GADGET=m
-CONFIG_MMC=y
-CONFIG_SDIO_UART=m
-CONFIG_MMC_AT91=m
-CONFIG_MMC_SPI=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=m
-CONFIG_LEDS_GPIO=m
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=m
-CONFIG_LEDS_TRIGGER_HEARTBEAT=m
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_INTF_DEV_UIE_EMUL=y
-CONFIG_RTC_DRV_DS1307=m
-CONFIG_RTC_DRV_DS1305=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD_DEBUG=y
-CONFIG_REISERFS_FS=m
-CONFIG_REISERFS_CHECK=y
-CONFIG_REISERFS_PROC_INFO=y
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-CONFIG_INOTIFY=y
-CONFIG_FUSE_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_NTFS_FS=m
-CONFIG_NTFS_RW=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_JFFS2_FS=m
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_CMODE_FAVOURLZO=y
-CONFIG_CRAMFS=m
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3_ACL=y
-CONFIG_NFSD_V4=y
-CONFIG_CIFS=m
-CONFIG_CIFS_WEAK_PW_HASH=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAC_PARTITION=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_MINIX_SUBPARTITION=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_UNIXWARE_DISKLABEL=y
-CONFIG_LDM_PARTITION=y
-CONFIG_LDM_DEBUG=y
-CONFIG_SGI_PARTITION=y
-CONFIG_SUN_PARTITION=y
-CONFIG_NLS_DEFAULT="cp437"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=m
-CONFIG_DLM=m
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_UNUSED_SYMBOLS=y
-CONFIG_DEBUG_FS=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_GF128MUL=m
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_MD5=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=m
-CONFIG_CRC16=m
diff --git a/arch/arm/configs/at91sam9261ek_defconfig b/arch/arm/configs/at91sam9261_defconfig
index b46025b66b64..ade6b2f23116 100644
--- a/arch/arm/configs/at91sam9261ek_defconfig
+++ b/arch/arm/configs/at91sam9261_defconfig
@@ -1,9 +1,13 @@
 CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZMA=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
+CONFIG_NAMESPACES=y
+CONFIG_EMBEDDED=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
@@ -15,18 +19,27 @@ CONFIG_ARCH_AT91SAM9261=y
 CONFIG_MACH_AT91SAM9261EK=y
 CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
 # CONFIG_ARM_THUMB is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
-CONFIG_FPE_NWFPE=y
+CONFIG_AUTO_ZRELADDR=y
+CONFIG_VFP=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
 CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
+CONFIG_CFG80211=y
+CONFIG_LIB80211=y
+CONFIG_MAC80211=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
 CONFIG_MTD_PARTITIONS=y
@@ -34,8 +47,12 @@ CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_GLUEBI=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_MISC_DEVICES=y
+CONFIG_ATMEL_TCLIB=y
 CONFIG_ATMEL_SSC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
@@ -45,12 +62,27 @@ CONFIG_NET_ETHERNET=y
 CONFIG_DM9000=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
+CONFIG_USB_ZD1201=m
+CONFIG_RTL8187=m
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_LIBERTAS_SPI=m
+CONFIG_RT2X00=m
+CONFIG_RT2500USB=m
+CONFIG_RT73USB=m
+CONFIG_ZD1211RW=m
+CONFIG_INPUT_POLLDEV=m
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=240
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320
+CONFIG_INPUT_EVDEV=y
 # CONFIG_KEYBOARD_ATKBD is not set
 CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_ADS7846=y
+CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
 CONFIG_SERIAL_ATMEL=y
 CONFIG_SERIAL_ATMEL_CONSOLE=y
 CONFIG_HW_RANDOM=y
@@ -65,31 +97,62 @@ CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_AT91SAM9X_WATCHDOG=y
 CONFIG_FB=y
 CONFIG_FB_ATMEL=y
-# CONFIG_VGA_CONSOLE is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_ATMEL_LCDC=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_LOGO=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SEQUENCER=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+CONFIG_SND_AT73C213=y
+CONFIG_SND_USB_AUDIO=m
 # CONFIG_USB_HID is not set
 CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DEBUG=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
 CONFIG_USB_GADGETFS=m
 CONFIG_USB_FILE_STORAGE=m
 CONFIG_USB_G_SERIAL=m
 CONFIG_MMC=y
 CONFIG_MMC_AT91=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_GPIO=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_EXT2_FS=y
+CONFIG_MSDOS_FS=y
-CONFIG_INOTIFY=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
-CONFIG_CRAMFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_LZO=y
+CONFIG_SQUASHFS_XZ=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_ROOT_NFS=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_CODEPAGE_850=y
 CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
+CONFIG_NLS_ISO8859_15=y
-CONFIG_DEBUG_USER=y
+CONFIG_NLS_UTF8=y
-CONFIG_DEBUG_LL=y
+CONFIG_FTRACE=y
+CONFIG_CRC_CCITT=m
diff --git a/arch/arm/configs/at91sam9263ek_defconfig b/arch/arm/configs/at91sam9263_defconfig
index 8a04d6f4e065..1cf96264cba1 100644
--- a/arch/arm/configs/at91sam9263ek_defconfig
+++ b/arch/arm/configs/at91sam9263_defconfig
@@ -1,9 +1,13 @@
 CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZMA=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
+CONFIG_NAMESPACES=y
+CONFIG_EMBEDDED=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
@@ -13,53 +17,81 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_AT91=y
 CONFIG_ARCH_AT91SAM9263=y
 CONFIG_MACH_AT91SAM9263EK=y
+CONFIG_MACH_USB_A9263=y
+CONFIG_MACH_NEOCORE926=y
 CONFIG_MTD_AT91_DATAFLASH_CARD=y
 # CONFIG_ARM_THUMB is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
-CONFIG_FPE_NWFPE=y
+CONFIG_AUTO_ZRELADDR=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
+CONFIG_NET_KEY=y
 CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_ROUTE_VERBOSE=y
 CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
+CONFIG_IPV6=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
 CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
+CONFIG_NFTL=y
+CONFIG_NFTL_RW=y
 CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_BLOCK2MTD=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_GLUEBI=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_SSC=y
+CONFIG_MISC_DEVICES=y
+CONFIG_ATMEL_PWM=y
+CONFIG_ATMEL_TCLIB=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
+CONFIG_SMSC_PHY=y
+CONFIG_NET_ETHERNET=y
 CONFIG_MACB=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_USB_ZD1201=m
+CONFIG_INPUT_POLLDEV=m
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=240
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320
 CONFIG_INPUT_EVDEV=y
 # CONFIG_KEYBOARD_ATKBD is not set
 CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_ADS7846=y
-# CONFIG_SERIO is not set
+CONFIG_LEGACY_PTY_COUNT=4
 CONFIG_SERIAL_ATMEL=y
 CONFIG_SERIAL_ATMEL_CONSOLE=y
 CONFIG_HW_RANDOM=y
@@ -74,8 +106,25 @@ CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_AT91SAM9X_WATCHDOG=y
 CONFIG_FB=y
 CONFIG_FB_ATMEL=y
-# CONFIG_VGA_CONSOLE is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_USB_HID is not set
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_ATMEL_LCDC=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_LOGO=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SEQUENCER=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+CONFIG_SND_ATMEL_AC97C=y
+# CONFIG_SND_SPI is not set
+CONFIG_SND_USB_AUDIO=m
 CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
 CONFIG_USB_MON=y
@@ -83,24 +132,37 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
 CONFIG_USB_GADGETFS=m
 CONFIG_USB_FILE_STORAGE=m
 CONFIG_USB_G_SERIAL=m
 CONFIG_MMC=y
+CONFIG_SDIO_UART=m
 CONFIG_MMC_AT91=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_ATMEL_PWM=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
+CONFIG_FUSE_FS=m
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
 CONFIG_CRAMFS=y
 CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_CODEPAGE_850=y
 CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
+CONFIG_FTRACE=y
 CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
+CONFIG_XZ_DEC=y
diff --git a/arch/arm/configs/exynos4_defconfig b/arch/arm/configs/exynos4_defconfig
index 2ffba24d2e2a..da53ff3b4d70 100644
--- a/arch/arm/configs/exynos4_defconfig
+++ b/arch/arm/configs/exynos4_defconfig
@@ -8,7 +8,9 @@ CONFIG_ARCH_EXYNOS4=y
 CONFIG_S3C_LOWLEVEL_UART_PORT=1
 CONFIG_MACH_SMDKC210=y
 CONFIG_MACH_SMDKV310=y
+CONFIG_MACH_ARMLEX4210=y
 CONFIG_MACH_UNIVERSAL_C210=y
+CONFIG_MACH_NURI=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_SMP=y
diff --git a/arch/arm/configs/neocore926_defconfig b/arch/arm/configs/neocore926_defconfig
deleted file mode 100644
index 462dd1850d15..000000000000
--- a/arch/arm/configs/neocore926_defconfig
+++ /dev/null
@@ -1,104 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9263=y
-CONFIG_MACH_NEOCORE926=y
-CONFIG_MTD_AT91_DATAFLASH_CARD=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_NET_IPIP=y
-# CONFIG_INET_LRO is not set
-CONFIG_IPV6=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_NFTL=y
-CONFIG_NFTL_RW=y
-CONFIG_MTD_BLOCK2MTD=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ECC_SMC=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_NAND_PLATFORM=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_ATMEL_PWM=y
-CONFIG_ATMEL_TCLIB=y
-CONFIG_SCSI=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_NETDEVICES=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MACB=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ADS7846=y
-CONFIG_VT_HW_CONSOLE_BINDING=y
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_NONSTANDARD=y
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-# CONFIG_SERIAL_ATMEL_PDC is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_VIDEO_OUTPUT_CONTROL=y
-CONFIG_FB=y
-CONFIG_FB_ATMEL=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_ATMEL_LCDC=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_LOGO=y
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=y
-CONFIG_SDIO_UART=y
-CONFIG_MMC_AT91=m
-CONFIG_EXT2_FS=y
-# CONFIG_DNOTIFY is not set
-CONFIG_AUTOFS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_WBUF_VERIFY=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_CRYPTO_HW is not set
diff --git a/arch/arm/configs/s5p6442_defconfig b/arch/arm/configs/s5p6442_defconfig
deleted file mode 100644
index 0e92a784af66..000000000000
--- a/arch/arm/configs/s5p6442_defconfig
+++ /dev/null
@@ -1,65 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S5P6442=y
-CONFIG_S3C_LOWLEVEL_UART_PORT=1
-CONFIG_MACH_SMDK6442=y
-CONFIG_CPU_32v6K=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
-CONFIG_FPE_NWFPE=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_NR_UARTS=3
-CONFIG_SERIAL_SAMSUNG=y
-CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_HW_RANDOM=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_ARM_UNWIND is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_DEBUG_S3C_UART=1
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/usb-a9263_defconfig b/arch/arm/configs/usb-a9263_defconfig
deleted file mode 100644
index ee82d09249c6..000000000000
--- a/arch/arm/configs/usb-a9263_defconfig
+++ /dev/null
@@ -1,106 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9263=y
-CONFIG_MACH_USB_A9263=y
-CONFIG_AT91_SLOW_CLOCK=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-# CONFIG_CRYPTO_HW is not set
diff --git a/arch/arm/include/asm/fiq.h b/arch/arm/include/asm/fiq.h
index 2242ce22ec6c..d493d0b742a1 100644
--- a/arch/arm/include/asm/fiq.h
+++ b/arch/arm/include/asm/fiq.h
@@ -4,6 +4,13 @@
 * Support for FIQ on ARM architectures.
 * Written by Philip Blundell <philb@gnu.org>, 1998
 * Re-written by Russell King
+ *
+ * NOTE: The FIQ mode registers are not magically preserved across
+ * suspend/resume.
+ *
+ * Drivers which require these registers to be preserved across power
+ * management operations must implement appropriate suspend/resume handlers to
+ * save and restore them.
 */
 #ifndef __ASM_FIQ_H
@@ -29,9 +36,21 @@ struct fiq_handler {
 extern int claim_fiq(struct fiq_handler *f);
 extern void release_fiq(struct fiq_handler *f);
 extern void set_fiq_handler(void *start, unsigned int length);
-extern void set_fiq_regs(struct pt_regs *regs);
-extern void get_fiq_regs(struct pt_regs *regs);
 extern void enable_fiq(int fiq);
 extern void disable_fiq(int fiq);
+/* helpers defined in fiqasm.S: */
+extern void __set_fiq_regs(unsigned long const *regs);
+extern void __get_fiq_regs(unsigned long *regs);
+static inline void set_fiq_regs(struct pt_regs const *regs)
+{
+        __set_fiq_regs(&regs->ARM_r8);
+}
+static inline void get_fiq_regs(struct pt_regs *regs)
+{
+        __get_fiq_regs(&regs->ARM_r8);
+}
 #endif
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index bf13b814c1b8..946f4d778f71 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -18,6 +18,8 @@ struct machine_desc {
        unsigned int            nr;             /* architecture number  */
        const char              *name;          /* architecture name    */
        unsigned long           boot_params;    /* tagged list          */
+        const char              **dt_compat;    /* array of device tree
+                                                 * 'compatible' strings */
        unsigned int            nr_irqs;        /* number of IRQs */
@@ -48,6 +50,13 @@ struct machine_desc {
 extern struct machine_desc *machine_desc;
 /*
+ * Machine type table - also only accessible during boot
+ */
+extern struct machine_desc __arch_info_begin[], __arch_info_end[];
+#define for_each_machine_desc(p)                        \
+        for (p = __arch_info_begin; p < __arch_info_end; p++)
+/*
 * Set of macros to define architecture features.  This is built into
 * a table by the linker.
 */
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index f51a69595f6e..ac75d0848889 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -197,7 +197,7 @@ typedef unsigned long pgprot_t;
 typedef struct page *pgtable_t;
-#ifndef CONFIG_SPARSEMEM
+#ifdef CONFIG_HAVE_ARCH_PFN_VALID
 extern int pfn_valid(unsigned long);
 #endif
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
new file mode 100644
index 000000000000..11b8708fc4db
--- /dev/null
+++ b/arch/arm/include/asm/prom.h
@@ -0,0 +1,37 @@
+/*
+ *  arch/arm/include/asm/prom.h
+ *
+ *  Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef __ASMARM_PROM_H
+#define __ASMARM_PROM_H
+#ifdef CONFIG_OF
+#include <asm/setup.h>
+#include <asm/irq.h>
+static inline void irq_dispose_mapping(unsigned int virq)
+{
+        return;
+}
+extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
+extern void arm_dt_memblock_reserve(void);
+#else /* CONFIG_OF */
+static inline struct machine_desc *setup_machine_fdt(unsigned int dt_phys)
+{
+        return NULL;
+}
+static inline void arm_dt_memblock_reserve(void) { }
+#endif /* CONFIG_OF */
+#endif /* ASMARM_PROM_H */
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 95176af3df8c..ee2ad8ae07af 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -217,6 +217,10 @@ extern struct meminfo meminfo;
 #define bank_phys_end(bank)     ((bank)->start + (bank)->size)
 #define bank_phys_size(bank)    (bank)->size
+extern int arm_add_memory(phys_addr_t start, unsigned long size);
+extern void early_print(const char *str, ...);
+extern void dump_machine_table(void);
 #endif  /*  __KERNEL__  */
 #endif
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index d2b514fd76f4..e42d96a45d3e 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -70,6 +70,7 @@ extern void platform_smp_prepare_cpus(unsigned int);
 */
 struct secondary_data {
        unsigned long pgdir;
+        unsigned long swapper_pg_dir;
        void *stack;
 };
 extern struct secondary_data secondary_data;
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 87dbe3e21970..3de689aa6f68 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -400,6 +400,7 @@
 #define __NR_open_by_handle_at          (__NR_SYSCALL_BASE+371)
 #define __NR_clock_adjtime              (__NR_SYSCALL_BASE+372)
 #define __NR_syncfs                     (__NR_SYSCALL_BASE+373)
+#define __NR_sendmmsg                   (__NR_SYSCALL_BASE+374)
 /*
 * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 8d95446150a3..a5b31af5c2b8 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_OC_ETM)		+= etm.o
 obj-$(CONFIG_ISA_DMA_API)       += dma.o
 obj-$(CONFIG_ARCH_ACORN)        += ecard.o 
-obj-$(CONFIG_FIQ)               += fiq.o
+obj-$(CONFIG_FIQ)               += fiq.o fiqasm.o
 obj-$(CONFIG_MODULES)           += armksyms.o module.o
 obj-$(CONFIG_ARTHUR)            += arthur.o
 obj-$(CONFIG_ISA_DMA)           += dma-isa.o
@@ -44,6 +44,7 @@ obj-$(CONFIG_ARM_THUMBEE)	+= thumbee.o
 obj-$(CONFIG_KGDB)              += kgdb.o
 obj-$(CONFIG_ARM_UNWIND)        += unwind.o
 obj-$(CONFIG_HAVE_TCM)          += tcm.o
+obj-$(CONFIG_OF)                += devtree.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump.o
 obj-$(CONFIG_SWP_EMULATE)       += swp_emulate.o
 CFLAGS_swp_emulate.o            := -Wa,-march=armv7-a
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 7fbf28c35bb2..24cdac3ce2e3 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -383,6 +383,7 @@
                CALL(sys_open_by_handle_at)
                CALL(sys_clock_adjtime)
                CALL(sys_syncfs)
+                CALL(sys_sendmmsg)
 #ifndef syscalls_counted
 .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
 #define syscalls_counted
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
new file mode 100644
index 000000000000..a701e4226a6c
--- /dev/null
+++ b/arch/arm/kernel/devtree.c
@@ -0,0 +1,145 @@
+/*
+ *  linux/arch/arm/kernel/devtree.c
+ *
+ *  Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/bootmem.h>
+#include <linux/memblock.h>
+#include <linux/of.h>
+#include <linux/of_fdt.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <asm/setup.h>
+#include <asm/page.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+void __init early_init_dt_add_memory_arch(u64 base, u64 size)
+{
+        arm_add_memory(base, size);
+}
+void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
+{
+        return alloc_bootmem_align(size, align);
+}
+void __init arm_dt_memblock_reserve(void)
+{
+        u64 *reserve_map, base, size;
+        if (!initial_boot_params)
+                return;
+        /* Reserve the dtb region */
+        memblock_reserve(virt_to_phys(initial_boot_params),
+                         be32_to_cpu(initial_boot_params->totalsize));
+        /*
+         * Process the reserve map.  This will probably overlap the initrd
+         * and dtb locations which are already reserved, but overlaping
+         * doesn't hurt anything
+         */
+        reserve_map = ((void*)initial_boot_params) +
+                        be32_to_cpu(initial_boot_params->off_mem_rsvmap);
+        while (1) {
+                base = be64_to_cpup(reserve_map++);
+                size = be64_to_cpup(reserve_map++);
+                if (!size)
+                        break;
+                memblock_reserve(base, size);
+        }
+}
+/**
+ * setup_machine_fdt - Machine setup when an dtb was passed to the kernel
+ * @dt_phys: physical address of dt blob
+ *
+ * If a dtb was passed to the kernel in r2, then use it to choose the
+ * correct machine_desc and to setup the system.
+ */
+struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
+{
+        struct boot_param_header *devtree;
+        struct machine_desc *mdesc, *mdesc_best = NULL;
+        unsigned int score, mdesc_score = ~1;
+        unsigned long dt_root;
+        const char *model;
+        devtree = phys_to_virt(dt_phys);
+        /* check device tree validity */
+        if (be32_to_cpu(devtree->magic) != OF_DT_HEADER)
+                return NULL;
+        /* Search the mdescs for the 'best' compatible value match */
+        initial_boot_params = devtree;
+        dt_root = of_get_flat_dt_root();
+        for_each_machine_desc(mdesc) {
+                score = of_flat_dt_match(dt_root, mdesc->dt_compat);
+                if (score > 0 && score < mdesc_score) {
+                        mdesc_best = mdesc;
+                        mdesc_score = score;
+                }
+        }
+        if (!mdesc_best) {
+                const char *prop;
+                long size;
+                early_print("\nError: unrecognized/unsupported "
+                            "device tree compatible list:\n[ ");
+                prop = of_get_flat_dt_prop(dt_root, "compatible", &size);
+                while (size > 0) {
+                        early_print("'%s' ", prop);
+                        size -= strlen(prop) + 1;
+                        prop += strlen(prop) + 1;
+                }
+                early_print("]\n\n");
+                dump_machine_table(); /* does not return */
+        }
+        model = of_get_flat_dt_prop(dt_root, "model", NULL);
+        if (!model)
+                model = of_get_flat_dt_prop(dt_root, "compatible", NULL);
+        if (!model)
+                model = "<unknown>";
+        pr_info("Machine: %s, model: %s\n", mdesc_best->name, model);
+        /* Retrieve various information from the /chosen node */
+        of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
+        /* Initialize {size,address}-cells info */
+        of_scan_flat_dt(early_init_dt_scan_root, NULL);
+        /* Setup memory, calling early_init_dt_add_memory_arch */
+        of_scan_flat_dt(early_init_dt_scan_memory, NULL);
+        /* Change machine number to match the mdesc we're using */
+        __machine_arch_type = mdesc_best->nr;
+        return mdesc_best;
+}
+/**
+ * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq#
+ *
+ * Currently the mapping mechanism is trivial; simple flat hwirq numbers are
+ * mapped 1:1 onto Linux irq numbers.  Cascaded irq controllers are not
+ * supported.
+ */
+unsigned int irq_create_of_mapping(struct device_node *controller,
+                                   const u32 *intspec, unsigned int intsize)
+{
+        return intspec[0];
+}
+EXPORT_SYMBOL_GPL(irq_create_of_mapping);
diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c
index e72dc34eea1c..4c164ece5891 100644
--- a/arch/arm/kernel/fiq.c
+++ b/arch/arm/kernel/fiq.c
@@ -89,47 +89,6 @@ void set_fiq_handler(void *start, unsigned int length)
                flush_icache_range(0x1c, 0x1c + length);
 }
-/*
- * Taking an interrupt in FIQ mode is death, so both these functions
- * disable irqs for the duration.  Note - these functions are almost
- * entirely coded in assembly.
- */
-void __naked set_fiq_regs(struct pt_regs *regs)
-{
-        register unsigned long tmp;
-        asm volatile (
-        "mov    ip, sp\n\
-        stmfd   sp!, {fp, ip, lr, pc}\n\
-        sub     fp, ip, #4\n\
-        mrs     %0, cpsr\n\
-        msr     cpsr_c, %2      @ select FIQ mode\n\
-        mov     r0, r0\n\
-        ldmia   %1, {r8 - r14}\n\
-        msr     cpsr_c, %0      @ return to SVC mode\n\
-        mov     r0, r0\n\
-        ldmfd   sp, {fp, sp, pc}"
-        : "=&r" (tmp)
-        : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE));
-}
-void __naked get_fiq_regs(struct pt_regs *regs)
-{
-        register unsigned long tmp;
-        asm volatile (
-        "mov    ip, sp\n\
-        stmfd   sp!, {fp, ip, lr, pc}\n\
-        sub     fp, ip, #4\n\
-        mrs     %0, cpsr\n\
-        msr     cpsr_c, %2      @ select FIQ mode\n\
-        mov     r0, r0\n\
-        stmia   %1, {r8 - r14}\n\
-        msr     cpsr_c, %0      @ return to SVC mode\n\
-        mov     r0, r0\n\
-        ldmfd   sp, {fp, sp, pc}"
-        : "=&r" (tmp)
-        : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE));
-}
 int claim_fiq(struct fiq_handler *f)
 {
        int ret = 0;
@@ -174,8 +133,8 @@ void disable_fiq(int fiq)
 }
 EXPORT_SYMBOL(set_fiq_handler);
-EXPORT_SYMBOL(set_fiq_regs);
+EXPORT_SYMBOL(__set_fiq_regs);  /* defined in fiqasm.S */
-EXPORT_SYMBOL(get_fiq_regs);
+EXPORT_SYMBOL(__get_fiq_regs);  /* defined in fiqasm.S */
 EXPORT_SYMBOL(claim_fiq);
 EXPORT_SYMBOL(release_fiq);
 EXPORT_SYMBOL(enable_fiq);
diff --git a/arch/arm/kernel/fiqasm.S b/arch/arm/kernel/fiqasm.S
new file mode 100644
index 000000000000..207f9d652010
--- /dev/null
+++ b/arch/arm/kernel/fiqasm.S
@@ -0,0 +1,49 @@
+/*
+ *  linux/arch/arm/kernel/fiqasm.S
+ *
+ *  Derived from code originally in linux/arch/arm/kernel/fiq.c:
+ *
+ *  Copyright (C) 1998 Russell King
+ *  Copyright (C) 1998, 1999 Phil Blundell
+ *  Copyright (C) 2011, Linaro Limited
+ *
+ *  FIQ support written by Philip Blundell <philb@gnu.org>, 1998.
+ *
+ *  FIQ support re-written by Russell King to be more generic
+ *
+ *  v7/Thumb-2 compatibility modifications by Linaro Limited, 2011.
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+/*
+ * Taking an interrupt in FIQ mode is death, so both these functions
+ * disable irqs for the duration.
+ */
+ENTRY(__set_fiq_regs)
+        mov     r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE
+        mrs     r1, cpsr
+        msr     cpsr_c, r2      @ select FIQ mode
+        mov     r0, r0          @ avoid hazard prior to ARMv4
+        ldmia   r0!, {r8 - r12}
+        ldr     sp, [r0], #4
+        ldr     lr, [r0]
+        msr     cpsr_c, r1      @ return to SVC mode
+        mov     r0, r0          @ avoid hazard prior to ARMv4
+        mov     pc, lr
+ENDPROC(__set_fiq_regs)
+ENTRY(__get_fiq_regs)
+        mov     r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE
+        mrs     r1, cpsr
+        msr     cpsr_c, r2      @ select FIQ mode
+        mov     r0, r0          @ avoid hazard prior to ARMv4
+        stmia   r0!, {r8 - r12}
+        str     sp, [r0], #4
+        str     lr, [r0]
+        msr     cpsr_c, r1      @ return to SVC mode
+        mov     r0, r0          @ avoid hazard prior to ARMv4
+        mov     pc, lr
+ENDPROC(__get_fiq_regs)
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index c84b57d27d07..854bd22380d3 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -15,6 +15,12 @@
 #define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
 #define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2)
+#ifdef CONFIG_CPU_BIG_ENDIAN
+#define OF_DT_MAGIC 0xd00dfeed
+#else
+#define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */
+#endif
 /*
 * Exception handling.  Something went wrong and we can't proceed.  We
 * ought to tell the user, but since we don't have any guarantee that
@@ -28,20 +34,26 @@
 /* Determine validity of the r2 atags pointer.  The heuristic requires
 * that the pointer be aligned, in the first 16k of physical RAM and
- * that the ATAG_CORE marker is first and present.  Future revisions
+ * that the ATAG_CORE marker is first and present.  If CONFIG_OF_FLATTREE
+ * is selected, then it will also accept a dtb pointer.  Future revisions
 * of this function may be more lenient with the physical address and
 * may also be able to move the ATAGS block if necessary.
 *
 * Returns:
- *  r2 either valid atags pointer, or zero
+ *  r2 either valid atags pointer, valid dtb pointer, or zero
 *  r5, r6 corrupted
 */
 __vet_atags:
        tst     r2, #0x3                        @ aligned?
        bne     1f
-        ldr     r5, [r2, #0]                    @ is first tag ATAG_CORE?
+        ldr     r5, [r2, #0]
-        cmp     r5, #ATAG_CORE_SIZE
+#ifdef CONFIG_OF_FLATTREE
+        ldr     r6, =OF_DT_MAGIC                @ is it a DTB?
+        cmp     r5, r6
+        beq     2f
+#endif
+        cmp     r5, #ATAG_CORE_SIZE             @ is first tag ATAG_CORE?
        cmpne   r5, #ATAG_CORE_SIZE_EMPTY
        bne     1f
        ldr     r5, [r2, #4]
@@ -49,7 +61,7 @@ __vet_atags:
        cmp     r5, r6
        bne     1f
-        mov     pc, lr                          @ atag pointer is ok
+2:      mov     pc, lr                          @ atag/dtb pointer is ok
 1:      mov     r2, #0
        mov     pc, lr
@@ -61,7 +73,7 @@ ENDPROC(__vet_atags)
 *
 *  r0  = cp#15 control register
 *  r1  = machine ID
- *  r2  = atags pointer
+ *  r2  = atags/dtb pointer
 *  r9  = processor ID
 */
        __INIT
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index c9173cfbbc74..278c1b0ebb2e 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -59,7 +59,7 @@
 *
 * This is normally called from the decompressor code.  The requirements
 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
- * r1 = machine nr, r2 = atags pointer.
+ * r1 = machine nr, r2 = atags or dtb pointer.
 *
 * This code is mostly position independent, so if you link the kernel at
 * 0xc0008000, you call this at __pa(0xc0008000).
@@ -91,7 +91,7 @@ ENTRY(stext)
 #endif
        /*
-         * r1 = machine no, r2 = atags,
+         * r1 = machine no, r2 = atags or dtb,
         * r8 = phys_offset, r9 = cpuid, r10 = procinfo
         */
        bl      __vet_atags
@@ -113,6 +113,7 @@ ENTRY(stext)
        ldr     r13, =__mmap_switched           @ address to jump to after
                                                @ mmu has been enabled
        adr     lr, BSYM(1f)                    @ return (PIC) address
+        mov     r8, r4                          @ set TTBR1 to swapper_pg_dir
 ARM(   add     pc, r10, #PROCINFO_INITFUNC     )
 THUMB( add     r12, r10, #PROCINFO_INITFUNC    )
 THUMB( mov     pc, r12                         )
@@ -302,8 +303,10 @@ ENTRY(secondary_startup)
         */
        adr     r4, __secondary_data
        ldmia   r4, {r5, r7, r12}               @ address to jump to after
-        sub     r4, r4, r5                      @ mmu has been enabled
+        sub     lr, r4, r5                      @ mmu has been enabled
-        ldr     r4, [r7, r4]                    @ get secondary_data.pgdir
+        ldr     r4, [r7, lr]                    @ get secondary_data.pgdir
+        add     r7, r7, #4
+        ldr     r8, [r7, lr]                    @ get secondary_data.swapper_pg_dir
        adr     lr, BSYM(__enable_mmu)          @ return address
        mov     r13, r12                        @ __secondary_switched address
 ARM(   add     pc, r10, #PROCINFO_INITFUNC     ) @ initialise processor
@@ -339,7 +342,7 @@ __secondary_data:
 *
 *  r0  = cp#15 control register
 *  r1  = machine ID
- *  r2  = atags pointer
+ *  r2  = atags or dtb pointer
 *  r4  = page table pointer
 *  r9  = processor ID
 *  r13 = *virtual* address to jump to upon completion
@@ -376,7 +379,7 @@ ENDPROC(__enable_mmu)
 *
 *  r0  = cp#15 control register
 *  r1  = machine ID
- *  r2  = atags pointer
+ *  r2  = atags or dtb pointer
 *  r9  = processor ID
 *  r13 = *virtual* address to jump to upon completion
 *
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 6dce209a623b..ed11fb08b05a 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -20,6 +20,7 @@
 #include <linux/screen_info.h>
 #include <linux/init.h>
 #include <linux/kexec.h>
+#include <linux/of_fdt.h>
 #include <linux/crash_dump.h>
 #include <linux/root_dev.h>
 #include <linux/cpu.h>
@@ -42,6 +43,7 @@
 #include <asm/cachetype.h>
 #include <asm/tlbflush.h>
+#include <asm/prom.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
@@ -309,7 +311,7 @@ static void __init cacheid_init(void)
 */
 extern struct proc_info_list *lookup_processor_type(unsigned int);
-static void __init early_print(const char *str, ...)
+void __init early_print(const char *str, ...)
 {
        extern void printascii(const char *);
        char buf[256];
@@ -439,25 +441,12 @@ void cpu_init(void)
            : "r14");
 }
-static struct machine_desc * __init setup_machine(unsigned int nr)
+void __init dump_machine_table(void)
 {
-        extern struct machine_desc __arch_info_begin[], __arch_info_end[];
        struct machine_desc *p;
-        /*
+        early_print("Available machine support:\n\nID (hex)\tNAME\n");
-         * locate machine in the list of supported machines.
+        for_each_machine_desc(p)
-         */
-        for (p = __arch_info_begin; p < __arch_info_end; p++)
-                if (nr == p->nr) {
-                        printk("Machine: %s\n", p->name);
-                        return p;
-                }
-        early_print("\n"
-                "Error: unrecognized/unsupported machine ID (r1 = 0x%08x).\n\n"
-                "Available machine support:\n\nID (hex)\tNAME\n", nr);
-        for (p = __arch_info_begin; p < __arch_info_end; p++)
                early_print("%08x\t%s\n", p->nr, p->name);
        early_print("\nPlease check your kernel config and/or bootloader.\n");
@@ -466,7 +455,7 @@ static struct machine_desc * __init setup_machine(unsigned int nr)
                /* can't use cpu_relax() here as it may require MMU setup */;
 }
-static int __init arm_add_memory(phys_addr_t start, unsigned long size)
+int __init arm_add_memory(phys_addr_t start, unsigned long size)
 {
        struct membank *bank = &meminfo.bank[meminfo.nr_banks];
@@ -801,23 +790,29 @@ static void __init squash_mem_tags(struct tag *tag)
                        tag->hdr.tag = ATAG_NONE;
 }
-void __init setup_arch(char **cmdline_p)
+static struct machine_desc * __init setup_machine_tags(unsigned int nr)
 {
        struct tag *tags = (struct tag *)&init_tags;
-        struct machine_desc *mdesc;
+        struct machine_desc *mdesc = NULL, *p;
        char *from = default_command_line;
        init_tags.mem.start = PHYS_OFFSET;
-        unwind_init();
+        /*
+         * locate machine in the list of supported machines.
-        setup_processor();
+         */
-        mdesc = setup_machine(machine_arch_type);
+        for_each_machine_desc(p)
-        machine_desc = mdesc;
+                if (nr == p->nr) {
-        machine_name = mdesc->name;
+                        printk("Machine: %s\n", p->name);
+                        mdesc = p;
+                        break;
+                }
-        if (mdesc->soft_reboot)
+        if (!mdesc) {
-                reboot_setup("s");
+                early_print("\nError: unrecognized/unsupported machine ID"
+                        " (r1 = 0x%08x).\n\n", nr);
+                dump_machine_table(); /* does not return */
+        }
        if (__atags_pointer)
                tags = phys_to_virt(__atags_pointer);
@@ -849,8 +844,17 @@ void __init setup_arch(char **cmdline_p)
        if (tags->hdr.tag != ATAG_CORE)
                convert_to_tag_list(tags);
 #endif
-        if (tags->hdr.tag != ATAG_CORE)
+        if (tags->hdr.tag != ATAG_CORE) {
+#if defined(CONFIG_OF)
+                /*
+                 * If CONFIG_OF is set, then assume this is a reasonably
+                 * modern system that should pass boot parameters
+                 */
+                early_print("Warning: Neither atags nor dtb found\n");
+#endif
                tags = (struct tag *)&init_tags;
+        }
        if (mdesc->fixup)
                mdesc->fixup(mdesc, tags, &from, &meminfo);
@@ -862,14 +866,34 @@ void __init setup_arch(char **cmdline_p)
                parse_tags(tags);
        }
+        /* parse_early_param needs a boot_command_line */
+        strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
+        return mdesc;
+}
+void __init setup_arch(char **cmdline_p)
+{
+        struct machine_desc *mdesc;
+        unwind_init();
+        setup_processor();
+        mdesc = setup_machine_fdt(__atags_pointer);
+        if (!mdesc)
+                mdesc = setup_machine_tags(machine_arch_type);
+        machine_desc = mdesc;
+        machine_name = mdesc->name;
+        if (mdesc->soft_reboot)
+                reboot_setup("s");
        init_mm.start_code = (unsigned long) _text;
        init_mm.end_code   = (unsigned long) _etext;
        init_mm.end_data   = (unsigned long) _edata;
        init_mm.brk        = (unsigned long) _end;
-        /* parse_early_param needs a boot_command_line */
-        strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
        /* populate cmd_line too for later use, preserving boot_command_line */
        strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
        *cmdline_p = cmd_line;
@@ -881,6 +905,8 @@ void __init setup_arch(char **cmdline_p)
        paging_init(mdesc);
        request_standard_resources(mdesc);
+        unflatten_device_tree();
 #ifdef CONFIG_SMP
        if (is_smp())
                smp_init_cpus();
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index d439a8f4c078..344e52b16c8c 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -105,6 +105,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
         */
        secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
        secondary_data.pgdir = virt_to_phys(pgd);
+        secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir);
        __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data));
        outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1));
diff --git a/arch/arm/lib/lib1funcs.S b/arch/arm/lib/lib1funcs.S
index 6dc06487f3c3..c562f649734c 100644
--- a/arch/arm/lib/lib1funcs.S
+++ b/arch/arm/lib/lib1funcs.S
@@ -35,7 +35,7 @@ Boston, MA 02111-1307, USA.  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include <asm/unwind.h>
 .macro ARM_DIV_BODY dividend, divisor, result, curbit
@@ -207,6 +207,7 @@ Boston, MA 02111-1307, USA.  */
 ENTRY(__udivsi3)
 ENTRY(__aeabi_uidiv)
+UNWIND(.fnstart)
        subs    r2, r1, #1
        moveq   pc, lr
@@ -230,10 +231,12 @@ ENTRY(__aeabi_uidiv)
        mov     r0, r0, lsr r2
        mov     pc, lr
+UNWIND(.fnend)
 ENDPROC(__udivsi3)
 ENDPROC(__aeabi_uidiv)
 ENTRY(__umodsi3)
+UNWIND(.fnstart)
        subs    r2, r1, #1                      @ compare divisor with 1
        bcc     Ldiv0
@@ -247,10 +250,12 @@ ENTRY(__umodsi3)
        mov     pc, lr
+UNWIND(.fnend)
 ENDPROC(__umodsi3)
 ENTRY(__divsi3)
 ENTRY(__aeabi_idiv)
+UNWIND(.fnstart)
        cmp     r1, #0
        eor     ip, r0, r1                      @ save the sign of the result.
@@ -287,10 +292,12 @@ ENTRY(__aeabi_idiv)
        rsbmi   r0, r0, #0
        mov     pc, lr
+UNWIND(.fnend)
 ENDPROC(__divsi3)
 ENDPROC(__aeabi_idiv)
 ENTRY(__modsi3)
+UNWIND(.fnstart)
        cmp     r1, #0
        beq     Ldiv0
@@ -310,11 +317,14 @@ ENTRY(__modsi3)
        rsbmi   r0, r0, #0
        mov     pc, lr
+UNWIND(.fnend)
 ENDPROC(__modsi3)
 #ifdef CONFIG_AEABI
 ENTRY(__aeabi_uidivmod)
+UNWIND(.fnstart)
+UNWIND(.save {r0, r1, ip, lr}   )
        stmfd   sp!, {r0, r1, ip, lr}
        bl      __aeabi_uidiv
@@ -323,10 +333,12 @@ ENTRY(__aeabi_uidivmod)
        sub     r1, r1, r3
        mov     pc, lr
+UNWIND(.fnend)
 ENDPROC(__aeabi_uidivmod)
 ENTRY(__aeabi_idivmod)
+UNWIND(.fnstart)
+UNWIND(.save {r0, r1, ip, lr}   )
        stmfd   sp!, {r0, r1, ip, lr}
        bl      __aeabi_idiv
        ldmfd   sp!, {r1, r2, ip, lr}
@@ -334,15 +346,18 @@ ENTRY(__aeabi_idivmod)
        sub     r1, r1, r3
        mov     pc, lr
+UNWIND(.fnend)
 ENDPROC(__aeabi_idivmod)
 #endif
 Ldiv0:
+UNWIND(.fnstart)
+UNWIND(.pad #4)
+UNWIND(.save {lr})
        str     lr, [sp, #-8]!
        bl      __div0
        mov     r0, #0                  @ About as wrong as it could be.
        ldr     pc, [sp], #8
+UNWIND(.fnend)
+ENDPROC(Ldiv0)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 2d299bf5d72f..22484670e7ba 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -3,9 +3,6 @@ if ARCH_AT91
 config HAVE_AT91_DATAFLASH_CARD
        bool
-config HAVE_NAND_ATMEL_BUSWIDTH_16
-        bool
 config HAVE_AT91_USART3
        bool
@@ -85,11 +82,6 @@ config ARCH_AT91CAP9
        select HAVE_FB_ATMEL
        select HAVE_NET_MACB
-config ARCH_AT572D940HF
-        bool "AT572D940HF"
-        select CPU_ARM926T
-        select GENERIC_CLOCKEVENTS
 config ARCH_AT91X40
        bool "AT91x40"
        select ARCH_USES_GETTIMEOFFSET
@@ -209,7 +201,6 @@ comment "AT91SAM9260 / AT91SAM9XE Board Type"
 config MACH_AT91SAM9260EK
        bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit"
        select HAVE_AT91_DATAFLASH_CARD
-        select HAVE_NAND_ATMEL_BUSWIDTH_16
        help
          Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
          <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
@@ -270,7 +261,6 @@ comment "AT91SAM9261 Board Type"
 config MACH_AT91SAM9261EK
        bool "Atmel AT91SAM9261-EK Evaluation Kit"
        select HAVE_AT91_DATAFLASH_CARD
-        select HAVE_NAND_ATMEL_BUSWIDTH_16
        help
          Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
          <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
@@ -286,7 +276,6 @@ comment "AT91SAM9G10 Board Type"
 config MACH_AT91SAM9G10EK
        bool "Atmel AT91SAM9G10-EK Evaluation Kit"
        select HAVE_AT91_DATAFLASH_CARD
-        select HAVE_NAND_ATMEL_BUSWIDTH_16
        help
          Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit.
          <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588>
@@ -302,7 +291,6 @@ comment "AT91SAM9263 Board Type"
 config MACH_AT91SAM9263EK
        bool "Atmel AT91SAM9263-EK Evaluation Kit"
        select HAVE_AT91_DATAFLASH_CARD
-        select HAVE_NAND_ATMEL_BUSWIDTH_16
        help
          Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
          <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
@@ -343,7 +331,6 @@ comment "AT91SAM9G20 Board Type"
 config MACH_AT91SAM9G20EK
        bool "Atmel AT91SAM9G20-EK Evaluation Kit"
        select HAVE_AT91_DATAFLASH_CARD
-        select HAVE_NAND_ATMEL_BUSWIDTH_16
        help
          Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit
          that embeds only one SD/MMC slot.
@@ -351,7 +338,6 @@ config MACH_AT91SAM9G20EK
 config MACH_AT91SAM9G20EK_2MMC
        depends on MACH_AT91SAM9G20EK
        bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots"
-        select HAVE_NAND_ATMEL_BUSWIDTH_16
        help
          Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit
          with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and
@@ -416,7 +402,6 @@ comment "AT91SAM9G45 Board Type"
 config MACH_AT91SAM9M10G45EK
        bool "Atmel AT91SAM9M10G45-EK Evaluation Kits"
-        select HAVE_NAND_ATMEL_BUSWIDTH_16
        help
          Select this if you are using Atmel's AT91SAM9G45-EKES Evaluation Kit.
          "ES" at the end of the name means that this board is an
@@ -433,7 +418,6 @@ comment "AT91CAP9 Board Type"
 config MACH_AT91CAP9ADK
        bool "Atmel AT91CAP9A-DK Evaluation Kit"
        select HAVE_AT91_DATAFLASH_CARD
-        select HAVE_NAND_ATMEL_BUSWIDTH_16
        help
          Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit.
          <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138>
@@ -442,23 +426,6 @@ endif
 # ----------------------------------------------------------
-if ARCH_AT572D940HF
-comment "AT572D940HF Board Type"
-config MACH_AT572D940HFEB
-        bool "AT572D940HF-EK"
-        depends on ARCH_AT572D940HF
-        select HAVE_AT91_DATAFLASH_CARD
-        select HAVE_NAND_ATMEL_BUSWIDTH_16
-        help
-          Select this if you are using Atmel's AT572D940HF-EK evaluation kit.
-          <http://www.atmel.com/products/diopsis/default.asp>
-endif
-# ----------------------------------------------------------
 if ARCH_AT91X40
 comment "AT91X40 Board Type"
@@ -483,13 +450,6 @@ config MTD_AT91_DATAFLASH_CARD
        help
          Enable support for the DataFlash card.
-config MTD_NAND_ATMEL_BUSWIDTH_16
-        bool "Enable 16-bit data bus interface to NAND flash"
-        depends on HAVE_NAND_ATMEL_BUSWIDTH_16
-        help
-          On AT91SAM926x boards both types of NAND flash can be present
-          (8 and 16 bit data bus width).
 # ----------------------------------------------------------
 comment "AT91 Feature Selections"
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index a83835e0c185..96966231920c 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -19,7 +19,6 @@ obj-$(CONFIG_ARCH_AT91SAM9RL)	+= at91sam9rl.o at91sam926x_time.o at91sam9rl_devi
 obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
 obj-$(CONFIG_ARCH_AT91SAM9G45)  += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91CAP9)     += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT572D940HF)  += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91X40)      += at91x40.o at91x40_time.o
 # AT91RM9200 board-specific support
@@ -78,9 +77,6 @@ obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
 # AT91CAP9 board-specific support
 obj-$(CONFIG_MACH_AT91CAP9ADK)  += board-cap9adk.o
-# AT572D940HF board-specific support
-obj-$(CONFIG_MACH_AT572D940HFEB) += board-at572d940hf_ek.o
 # AT91X40 board-specific support
 obj-$(CONFIG_MACH_AT91EB01)     += board-eb01.o
diff --git a/arch/arm/mach-at91/at572d940hf.c b/arch/arm/mach-at91/at572d940hf.c
deleted file mode 100644
index a6b9c68c003a..000000000000
--- a/arch/arm/mach-at91/at572d940hf.c
+++ /dev/null
@@ -1,377 +0,0 @@
-/*
- * arch/arm/mach-at91/at572d940hf.c
- *
- * Antonio R. Costa <costa.antonior@gmail.com>
- * Copyright (C) 2008 Atmel
- *
- * Copyright (C) 2005 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- */
-#include <linux/module.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <mach/at572d940hf.h>
-#include <mach/at91_pmc.h>
-#include <mach/at91_rstc.h>
-#include "generic.h"
-#include "clock.h"
-static struct map_desc at572d940hf_io_desc[] __initdata = {
-        {
-                .virtual        = AT91_VA_BASE_SYS,
-                .pfn            = __phys_to_pfn(AT91_BASE_SYS),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = AT91_IO_VIRT_BASE - AT572D940HF_SRAM_SIZE,
-                .pfn            = __phys_to_pfn(AT572D940HF_SRAM_BASE),
-                .length         = AT572D940HF_SRAM_SIZE,
-                .type           = MT_DEVICE,
-        },
-};
-/* --------------------------------------------------------------------
- *  Clocks
- * -------------------------------------------------------------------- */
-/*
- * The peripheral clocks.
- */
-static struct clk pioA_clk = {
-        .name           = "pioA_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_PIOA,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pioB_clk = {
-        .name           = "pioB_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_PIOB,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pioC_clk = {
-        .name           = "pioC_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_PIOC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk macb_clk = {
-        .name           = "macb_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_EMAC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart0_clk = {
-        .name           = "usart0_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_US0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart1_clk = {
-        .name           = "usart1_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_US1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart2_clk = {
-        .name           = "usart2_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_US2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc_clk = {
-        .name           = "mci_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_MCI,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk udc_clk = {
-        .name           = "udc_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_UDP,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk twi0_clk = {
-        .name           = "twi0_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_TWI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi0_clk = {
-        .name           = "spi0_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_SPI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi1_clk = {
-        .name           = "spi1_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_SPI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ssc0_clk = {
-        .name           = "ssc0_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_SSC0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ssc1_clk = {
-        .name           = "ssc1_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_SSC1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ssc2_clk = {
-        .name           = "ssc2_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_SSC2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk tc0_clk = {
-        .name           = "tc0_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_TC0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk tc1_clk = {
-        .name           = "tc1_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_TC1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk tc2_clk = {
-        .name           = "tc2_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_TC2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ohci_clk = {
-        .name           = "ohci_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_UHP,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ssc3_clk = {
-        .name           = "ssc3_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_SSC3,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk twi1_clk = {
-        .name           = "twi1_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_TWI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk can0_clk = {
-        .name           = "can0_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_CAN0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk can1_clk = {
-        .name           = "can1_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_CAN1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mAgicV_clk = {
-        .name           = "mAgicV_clk",
-        .pmc_mask       = 1 << AT572D940HF_ID_MSIRQ0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk *periph_clocks[] __initdata = {
-        &pioA_clk,
-        &pioB_clk,
-        &pioC_clk,
-        &macb_clk,
-        &usart0_clk,
-        &usart1_clk,
-        &usart2_clk,
-        &mmc_clk,
-        &udc_clk,
-        &twi0_clk,
-        &spi0_clk,
-        &spi1_clk,
-        &ssc0_clk,
-        &ssc1_clk,
-        &ssc2_clk,
-        &tc0_clk,
-        &tc1_clk,
-        &tc2_clk,
-        &ohci_clk,
-        &ssc3_clk,
-        &twi1_clk,
-        &can0_clk,
-        &can1_clk,
-        &mAgicV_clk,
-        /* irq0 .. irq2 */
-};
-/*
- * The five programmable clocks.
- * You must configure pin multiplexing to bring these signals out.
- */
-static struct clk pck0 = {
-        .name           = "pck0",
-        .pmc_mask       = AT91_PMC_PCK0,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 0,
-};
-static struct clk pck1 = {
-        .name           = "pck1",
-        .pmc_mask       = AT91_PMC_PCK1,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 1,
-};
-static struct clk pck2 = {
-        .name           = "pck2",
-        .pmc_mask       = AT91_PMC_PCK2,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 2,
-};
-static struct clk pck3 = {
-        .name           = "pck3",
-        .pmc_mask       = AT91_PMC_PCK3,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 3,
-};
-static struct clk mAgicV_mem_clk = {
-        .name           = "mAgicV_mem_clk",
-        .pmc_mask       = AT91_PMC_PCK4,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 4,
-};
-/* HClocks */
-static struct clk hck0 = {
-        .name           = "hck0",
-        .pmc_mask       = AT91_PMC_HCK0,
-        .type           = CLK_TYPE_SYSTEM,
-        .id             = 0,
-};
-static struct clk hck1 = {
-        .name           = "hck1",
-        .pmc_mask       = AT91_PMC_HCK1,
-        .type           = CLK_TYPE_SYSTEM,
-        .id             = 1,
-};
-static void __init at572d940hf_register_clocks(void)
-{
-        int i;
-        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
-                clk_register(periph_clocks[i]);
-        clk_register(&pck0);
-        clk_register(&pck1);
-        clk_register(&pck2);
-        clk_register(&pck3);
-        clk_register(&mAgicV_mem_clk);
-        clk_register(&hck0);
-        clk_register(&hck1);
-}
-/* --------------------------------------------------------------------
- *  GPIO
- * -------------------------------------------------------------------- */
-static struct at91_gpio_bank at572d940hf_gpio[] = {
-        {
-                .id             = AT572D940HF_ID_PIOA,
-                .offset         = AT91_PIOA,
-                .clock          = &pioA_clk,
-        }, {
-                .id             = AT572D940HF_ID_PIOB,
-                .offset         = AT91_PIOB,
-                .clock          = &pioB_clk,
-        }, {
-                .id             = AT572D940HF_ID_PIOC,
-                .offset         = AT91_PIOC,
-                .clock          = &pioC_clk,
-        }
-};
-static void at572d940hf_reset(void)
-{
-        at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
-}
-/* --------------------------------------------------------------------
- *  AT572D940HF processor initialization
- * -------------------------------------------------------------------- */
-void __init at572d940hf_initialize(unsigned long main_clock)
-{
-        /* Map peripherals */
-        iotable_init(at572d940hf_io_desc, ARRAY_SIZE(at572d940hf_io_desc));
-        at91_arch_reset = at572d940hf_reset;
-        at91_extern_irq = (1 << AT572D940HF_ID_IRQ0) | (1 << AT572D940HF_ID_IRQ1)
-                        | (1 << AT572D940HF_ID_IRQ2);
-        /* Init clock subsystem */
-        at91_clock_init(main_clock);
-        /* Register the processor-specific clocks */
-        at572d940hf_register_clocks();
-        /* Register GPIO subsystem */
-        at91_gpio_init(at572d940hf_gpio, 3);
-}
-/* --------------------------------------------------------------------
- *  Interrupt initialization
- * -------------------------------------------------------------------- */
-/*
- * The default interrupt priority levels (0 = lowest, 7 = highest).
- */
-static unsigned int at572d940hf_default_irq_priority[NR_AIC_IRQS] __initdata = {
-        7,      /* Advanced Interrupt Controller */
-        7,      /* System Peripherals */
-        0,      /* Parallel IO Controller A */
-        0,      /* Parallel IO Controller B */
-        0,      /* Parallel IO Controller C */
-        3,      /* Ethernet */
-        6,      /* USART 0 */
-        6,      /* USART 1 */
-        6,      /* USART 2 */
-        0,      /* Multimedia Card Interface */
-        4,      /* USB Device Port */
-        0,      /* Two-Wire Interface 0 */
-        6,      /* Serial Peripheral Interface 0 */
-        6,      /* Serial Peripheral Interface 1 */
-        5,      /* Serial Synchronous Controller 0 */
-        5,      /* Serial Synchronous Controller 1 */
-        5,      /* Serial Synchronous Controller 2 */
-        0,      /* Timer Counter 0 */
-        0,      /* Timer Counter 1 */
-        0,      /* Timer Counter 2 */
-        3,      /* USB Host port */
-        3,      /* Serial Synchronous Controller 3 */
-        0,      /* Two-Wire Interface 1 */
-        0,      /* CAN Controller 0 */
-        0,      /* CAN Controller 1 */
-        0,      /* mAgicV HALT line */
-        0,      /* mAgicV SIRQ0 line */
-        0,      /* mAgicV exception line */
-        0,      /* mAgicV end of DMA line */
-        0,      /* Advanced Interrupt Controller */
-        0,      /* Advanced Interrupt Controller */
-        0,      /* Advanced Interrupt Controller */
-};
-void __init at572d940hf_init_interrupts(unsigned int priority[NR_AIC_IRQS])
-{
-        if (!priority)
-                priority = at572d940hf_default_irq_priority;
-        /* Initialize the AIC interrupt controller */
-        at91_aic_init(priority);
-        /* Enable GPIO interrupts */
-        at91_gpio_irq_setup();
-}
diff --git a/arch/arm/mach-at91/at572d940hf_devices.c b/arch/arm/mach-at91/at572d940hf_devices.c
deleted file mode 100644
index 0fc20a240782..000000000000
--- a/arch/arm/mach-at91/at572d940hf_devices.c
+++ /dev/null
@@ -1,970 +0,0 @@
-/*
- * arch/arm/mach-at91/at572d940hf_devices.c
- *
- * Copyright (C) 2008 Atmel Antonio R. Costa <costa.antonior@gmail.com>
- * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
- * Copyright (C) 2005 David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- */
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-#include <mach/board.h>
-#include <mach/gpio.h>
-#include <mach/at572d940hf.h>
-#include <mach/at572d940hf_matrix.h>
-#include <mach/at91sam9_smc.h>
-#include "generic.h"
-#include "sam9_smc.h"
-/* --------------------------------------------------------------------
- *  USB Host
- * -------------------------------------------------------------------- */
-#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-static u64 ohci_dmamask = DMA_BIT_MASK(32);
-static struct at91_usbh_data usbh_data;
-static struct resource usbh_resources[] = {
-        [0] = {
-                .start  = AT572D940HF_UHP_BASE,
-                .end    = AT572D940HF_UHP_BASE + SZ_1M - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT572D940HF_ID_UHP,
-                .end    = AT572D940HF_ID_UHP,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device at572d940hf_usbh_device = {
-        .name           = "at91_ohci",
-        .id             = -1,
-        .dev            = {
-                                .dma_mask               = &ohci_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &usbh_data,
-        },
-        .resource       = usbh_resources,
-        .num_resources  = ARRAY_SIZE(usbh_resources),
-};
-void __init at91_add_device_usbh(struct at91_usbh_data *data)
-{
-        if (!data)
-                return;
-        usbh_data = *data;
-        platform_device_register(&at572d940hf_usbh_device);
-}
-#else
-void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
-#endif
-/* --------------------------------------------------------------------
- *  USB Device (Gadget)
- * -------------------------------------------------------------------- */
-#ifdef CONFIG_USB_GADGET_AT91
-static struct at91_udc_data udc_data;
-static struct resource udc_resources[] = {
-        [0] = {
-                .start  = AT572D940HF_BASE_UDP,
-                .end    = AT572D940HF_BASE_UDP + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT572D940HF_ID_UDP,
-                .end    = AT572D940HF_ID_UDP,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device at572d940hf_udc_device = {
-        .name           = "at91_udc",
-        .id             = -1,
-        .dev            = {
-                                .platform_data          = &udc_data,
-        },
-        .resource       = udc_resources,
-        .num_resources  = ARRAY_SIZE(udc_resources),
-};
-void __init at91_add_device_udc(struct at91_udc_data *data)
-{
-        if (!data)
-                return;
-        if (data->vbus_pin) {
-                at91_set_gpio_input(data->vbus_pin, 0);
-                at91_set_deglitch(data->vbus_pin, 1);
-        }
-        /* Pullup pin is handled internally */
-        udc_data = *data;
-        platform_device_register(&at572d940hf_udc_device);
-}
-#else
-void __init at91_add_device_udc(struct at91_udc_data *data) {}
-#endif
-/* --------------------------------------------------------------------
- *  Ethernet
- * -------------------------------------------------------------------- */
-#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
-static u64 eth_dmamask = DMA_BIT_MASK(32);
-static struct at91_eth_data eth_data;
-static struct resource eth_resources[] = {
-        [0] = {
-                .start  = AT572D940HF_BASE_EMAC,
-                .end    = AT572D940HF_BASE_EMAC + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT572D940HF_ID_EMAC,
-                .end    = AT572D940HF_ID_EMAC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device at572d940hf_eth_device = {
-        .name           = "macb",
-        .id             = -1,
-        .dev            = {
-                        .dma_mask               = &eth_dmamask,
-                        .coherent_dma_mask      = DMA_BIT_MASK(32),
-                        .platform_data          = &eth_data,
-        },
-        .resource       = eth_resources,
-        .num_resources  = ARRAY_SIZE(eth_resources),
-};
-void __init at91_add_device_eth(struct at91_eth_data *data)
-{
-        if (!data)
-                return;
-        if (data->phy_irq_pin) {
-                at91_set_gpio_input(data->phy_irq_pin, 0);
-                at91_set_deglitch(data->phy_irq_pin, 1);
-        }
-        /* Only RMII is supported */
-        data->is_rmii = 1;
-        /* Pins used for RMII */
-        at91_set_A_periph(AT91_PIN_PA16, 0);    /* ETXCK_EREFCK */
-        at91_set_A_periph(AT91_PIN_PA17, 0);    /* ERXDV */
-        at91_set_A_periph(AT91_PIN_PA18, 0);    /* ERX0 */
-        at91_set_A_periph(AT91_PIN_PA19, 0);    /* ERX1 */
-        at91_set_A_periph(AT91_PIN_PA20, 0);    /* ERXER */
-        at91_set_A_periph(AT91_PIN_PA23, 0);    /* ETXEN */
-        at91_set_A_periph(AT91_PIN_PA21, 0);    /* ETX0 */
-        at91_set_A_periph(AT91_PIN_PA22, 0);    /* ETX1 */
-        at91_set_A_periph(AT91_PIN_PA13, 0);    /* EMDIO */
-        at91_set_A_periph(AT91_PIN_PA14, 0);    /* EMDC */
-        eth_data = *data;
-        platform_device_register(&at572d940hf_eth_device);
-}
-#else
-void __init at91_add_device_eth(struct at91_eth_data *data) {}
-#endif
-/* --------------------------------------------------------------------
- *  MMC / SD
- * -------------------------------------------------------------------- */
-#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
-static u64 mmc_dmamask = DMA_BIT_MASK(32);
-static struct at91_mmc_data mmc_data;
-static struct resource mmc_resources[] = {
-        [0] = {
-                .start  = AT572D940HF_BASE_MCI,
-                .end    = AT572D940HF_BASE_MCI + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT572D940HF_ID_MCI,
-                .end    = AT572D940HF_ID_MCI,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device at572d940hf_mmc_device = {
-        .name           = "at91_mci",
-        .id             = -1,
-        .dev            = {
-                                .dma_mask               = &mmc_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &mmc_data,
-        },
-        .resource       = mmc_resources,
-        .num_resources  = ARRAY_SIZE(mmc_resources),
-};
-void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
-{
-        if (!data)
-                return;
-        /* input/irq */
-        if (data->det_pin) {
-                at91_set_gpio_input(data->det_pin, 1);
-                at91_set_deglitch(data->det_pin, 1);
-        }
-        if (data->wp_pin)
-                at91_set_gpio_input(data->wp_pin, 1);
-        if (data->vcc_pin)
-                at91_set_gpio_output(data->vcc_pin, 0);
-        /* CLK */
-        at91_set_A_periph(AT91_PIN_PC22, 0);
-        /* CMD */
-        at91_set_A_periph(AT91_PIN_PC23, 1);
-        /* DAT0, maybe DAT1..DAT3 */
-        at91_set_A_periph(AT91_PIN_PC24, 1);
-        if (data->wire4) {
-                at91_set_A_periph(AT91_PIN_PC25, 1);
-                at91_set_A_periph(AT91_PIN_PC26, 1);
-                at91_set_A_periph(AT91_PIN_PC27, 1);
-        }
-        mmc_data = *data;
-        platform_device_register(&at572d940hf_mmc_device);
-}
-#else
-void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
-#endif
-/* --------------------------------------------------------------------
- *  NAND / SmartMedia
- * -------------------------------------------------------------------- */
-#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
-static struct atmel_nand_data nand_data;
-#define NAND_BASE       AT91_CHIPSELECT_3
-static struct resource nand_resources[] = {
-        {
-                .start  = NAND_BASE,
-                .end    = NAND_BASE + SZ_256M - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-static struct platform_device at572d940hf_nand_device = {
-        .name           = "atmel_nand",
-        .id             = -1,
-        .dev            = {
-                                .platform_data  = &nand_data,
-        },
-        .resource       = nand_resources,
-        .num_resources  = ARRAY_SIZE(nand_resources),
-};
-void __init at91_add_device_nand(struct atmel_nand_data *data)
-{
-        unsigned long csa;
-        if (!data)
-                return;
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
-        /* enable pin */
-        if (data->enable_pin)
-                at91_set_gpio_output(data->enable_pin, 1);
-        /* ready/busy pin */
-        if (data->rdy_pin)
-                at91_set_gpio_input(data->rdy_pin, 1);
-        /* card detect pin */
-        if (data->det_pin)
-                at91_set_gpio_input(data->det_pin, 1);
-        at91_set_A_periph(AT91_PIN_PB28, 0);            /* A[22] */
-        at91_set_B_periph(AT91_PIN_PA28, 0);            /* NANDOE */
-        at91_set_B_periph(AT91_PIN_PA29, 0);            /* NANDWE */
-        nand_data = *data;
-        platform_device_register(&at572d940hf_nand_device);
-}
-#else
-void __init at91_add_device_nand(struct atmel_nand_data *data) {}
-#endif
-/* --------------------------------------------------------------------
- *  TWI (i2c)
- * -------------------------------------------------------------------- */
-/*
- * Prefer the GPIO code since the TWI controller isn't robust
- * (gets overruns and underruns under load) and can only issue
- * repeated STARTs in one scenario (the driver doesn't yet handle them).
- */
-#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
-static struct i2c_gpio_platform_data pdata = {
-        .sda_pin                = AT91_PIN_PC7,
-        .sda_is_open_drain      = 1,
-        .scl_pin                = AT91_PIN_PC8,
-        .scl_is_open_drain      = 1,
-        .udelay                 = 2,            /* ~100 kHz */
-};
-static struct platform_device at572d940hf_twi_device {
-        .name                   = "i2c-gpio",
-        .id                     = -1,
-        .dev.platform_data      = &pdata,
-};
-void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
-{
-        at91_set_GPIO_periph(AT91_PIN_PC7, 1);          /* TWD (SDA) */
-        at91_set_multi_drive(AT91_PIN_PC7, 1);
-        at91_set_GPIO_periph(AT91_PIN_PA8, 1);          /* TWCK (SCL) */
-        at91_set_multi_drive(AT91_PIN_PC8, 1);
-        i2c_register_board_info(0, devices, nr_devices);
-        platform_device_register(&at572d940hf_twi_device);
-}
-#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
-static struct resource twi0_resources[] = {
-        [0] = {
-                .start  = AT572D940HF_BASE_TWI0,
-                .end    = AT572D940HF_BASE_TWI0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT572D940HF_ID_TWI0,
-                .end    = AT572D940HF_ID_TWI0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device at572d940hf_twi0_device = {
-        .name           = "at91_i2c",
-        .id             = 0,
-        .resource       = twi0_resources,
-        .num_resources  = ARRAY_SIZE(twi0_resources),
-};
-static struct resource twi1_resources[] = {
-        [0] = {
-                .start  = AT572D940HF_BASE_TWI1,
-                .end    = AT572D940HF_BASE_TWI1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT572D940HF_ID_TWI1,
-                .end    = AT572D940HF_ID_TWI1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device at572d940hf_twi1_device = {
-        .name           = "at91_i2c",
-        .id             = 1,
-        .resource       = twi1_resources,
-        .num_resources  = ARRAY_SIZE(twi1_resources),
-};
-void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
-{
-        /* pins used for TWI0 interface */
-        at91_set_A_periph(AT91_PIN_PC7, 0);             /* TWD */
-        at91_set_multi_drive(AT91_PIN_PC7, 1);
-        at91_set_A_periph(AT91_PIN_PC8, 0);             /* TWCK */
-        at91_set_multi_drive(AT91_PIN_PC8, 1);
-        /* pins used for TWI1 interface */
-        at91_set_A_periph(AT91_PIN_PC20, 0);            /* TWD */
-        at91_set_multi_drive(AT91_PIN_PC20, 1);
-        at91_set_A_periph(AT91_PIN_PC21, 0);            /* TWCK */
-        at91_set_multi_drive(AT91_PIN_PC21, 1);
-        i2c_register_board_info(0, devices, nr_devices);
-        platform_device_register(&at572d940hf_twi0_device);
-        platform_device_register(&at572d940hf_twi1_device);
-}
-#else
-void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
-#endif
-/* --------------------------------------------------------------------
- *  SPI
- * -------------------------------------------------------------------- */
-#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
-static u64 spi_dmamask = DMA_BIT_MASK(32);
-static struct resource spi0_resources[] = {
-        [0] = {
-                .start  = AT572D940HF_BASE_SPI0,
-                .end    = AT572D940HF_BASE_SPI0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT572D940HF_ID_SPI0,
-                .end    = AT572D940HF_ID_SPI0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device at572d940hf_spi0_device = {
-        .name           = "atmel_spi",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = spi0_resources,
-        .num_resources  = ARRAY_SIZE(spi0_resources),
-};
-static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
-static struct resource spi1_resources[] = {
-        [0] = {
-                .start  = AT572D940HF_BASE_SPI1,
-                .end    = AT572D940HF_BASE_SPI1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT572D940HF_ID_SPI1,
-                .end    = AT572D940HF_ID_SPI1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device at572d940hf_spi1_device = {
-        .name           = "atmel_spi",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = spi1_resources,
-        .num_resources  = ARRAY_SIZE(spi1_resources),
-};
-static const unsigned spi1_standard_cs[4] = { AT91_PIN_PC3, AT91_PIN_PC4, AT91_PIN_PC5, AT91_PIN_PC6 };
-void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
-{
-        int i;
-        unsigned long cs_pin;
-        short enable_spi0 = 0;
-        short enable_spi1 = 0;
-        /* Choose SPI chip-selects */
-        for (i = 0; i < nr_devices; i++) {
-                if (devices[i].controller_data)
-                        cs_pin = (unsigned long) devices[i].controller_data;
-                else if (devices[i].bus_num == 0)
-                        cs_pin = spi0_standard_cs[devices[i].chip_select];
-                else
-                        cs_pin = spi1_standard_cs[devices[i].chip_select];
-                if (devices[i].bus_num == 0)
-                        enable_spi0 = 1;
-                else
-                        enable_spi1 = 1;
-                /* enable chip-select pin */
-                at91_set_gpio_output(cs_pin, 1);
-                /* pass chip-select pin to driver */
-                devices[i].controller_data = (void *) cs_pin;
-        }
-        spi_register_board_info(devices, nr_devices);
-        /* Configure SPI bus(es) */
-        if (enable_spi0) {
-                at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
-                at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
-                at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
-                at91_clock_associate("spi0_clk", &at572d940hf_spi0_device.dev, "spi_clk");
-                platform_device_register(&at572d940hf_spi0_device);
-        }
-        if (enable_spi1) {
-                at91_set_A_periph(AT91_PIN_PC0, 0);     /* SPI1_MISO */
-                at91_set_A_periph(AT91_PIN_PC1, 0);     /* SPI1_MOSI */
-                at91_set_A_periph(AT91_PIN_PC2, 0);     /* SPI1_SPCK */
-                at91_clock_associate("spi1_clk", &at572d940hf_spi1_device.dev, "spi_clk");
-                platform_device_register(&at572d940hf_spi1_device);
-        }
-}
-#else
-void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
-#endif
-/* --------------------------------------------------------------------
- *  Timer/Counter blocks
- * -------------------------------------------------------------------- */
-#ifdef CONFIG_ATMEL_TCLIB
-static struct resource tcb_resources[] = {
-        [0] = {
-                .start  = AT572D940HF_BASE_TCB,
-                .end    = AT572D940HF_BASE_TCB + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT572D940HF_ID_TC0,
-                .end    = AT572D940HF_ID_TC0,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                .start  = AT572D940HF_ID_TC1,
-                .end    = AT572D940HF_ID_TC1,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                .start  = AT572D940HF_ID_TC2,
-                .end    = AT572D940HF_ID_TC2,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device at572d940hf_tcb_device = {
-        .name           = "atmel_tcb",
-        .id             = 0,
-        .resource       = tcb_resources,
-        .num_resources  = ARRAY_SIZE(tcb_resources),
-};
-static void __init at91_add_device_tc(void)
-{
-        /* this chip has a separate clock and irq for each TC channel */
-        at91_clock_associate("tc0_clk", &at572d940hf_tcb_device.dev, "t0_clk");
-        at91_clock_associate("tc1_clk", &at572d940hf_tcb_device.dev, "t1_clk");
-        at91_clock_associate("tc2_clk", &at572d940hf_tcb_device.dev, "t2_clk");
-        platform_device_register(&at572d940hf_tcb_device);
-}
-#else
-static void __init at91_add_device_tc(void) { }
-#endif
-/* --------------------------------------------------------------------
- *  RTT
- * -------------------------------------------------------------------- */
-static struct resource rtt_resources[] = {
-        {
-                .start  = AT91_BASE_SYS + AT91_RTT,
-                .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-static struct platform_device at572d940hf_rtt_device = {
-        .name           = "at91_rtt",
-        .id             = 0,
-        .resource       = rtt_resources,
-        .num_resources  = ARRAY_SIZE(rtt_resources),
-};
-static void __init at91_add_device_rtt(void)
-{
-        platform_device_register(&at572d940hf_rtt_device);
-}
-/* --------------------------------------------------------------------
- *  Watchdog
- * -------------------------------------------------------------------- */
-#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
-static struct platform_device at572d940hf_wdt_device = {
-        .name           = "at91_wdt",
-        .id             = -1,
-        .num_resources  = 0,
-};
-static void __init at91_add_device_watchdog(void)
-{
-        platform_device_register(&at572d940hf_wdt_device);
-}
-#else
-static void __init at91_add_device_watchdog(void) {}
-#endif
-/* --------------------------------------------------------------------
- *  UART
- * -------------------------------------------------------------------- */
-#if defined(CONFIG_SERIAL_ATMEL)
-static struct resource dbgu_resources[] = {
-        [0] = {
-                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
-                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91_ID_SYS,
-                .end    = AT91_ID_SYS,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct atmel_uart_data dbgu_data = {
-        .use_dma_tx     = 0,
-        .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
-        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
-};
-static u64 dbgu_dmamask = DMA_BIT_MASK(32);
-static struct platform_device at572d940hf_dbgu_device = {
-        .name           = "atmel_usart",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &dbgu_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &dbgu_data,
-        },
-        .resource       = dbgu_resources,
-        .num_resources  = ARRAY_SIZE(dbgu_resources),
-};
-static inline void configure_dbgu_pins(void)
-{
-        at91_set_A_periph(AT91_PIN_PC31, 1);            /* DTXD */
-        at91_set_A_periph(AT91_PIN_PC30, 0);            /* DRXD */
-}
-static struct resource uart0_resources[] = {
-        [0] = {
-                .start  = AT572D940HF_BASE_US0,
-                .end    = AT572D940HF_BASE_US0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT572D940HF_ID_US0,
-                .end    = AT572D940HF_ID_US0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct atmel_uart_data uart0_data = {
-        .use_dma_tx     = 1,
-        .use_dma_rx     = 1,
-};
-static u64 uart0_dmamask = DMA_BIT_MASK(32);
-static struct platform_device at572d940hf_uart0_device = {
-        .name           = "atmel_usart",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &uart0_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &uart0_data,
-        },
-        .resource       = uart0_resources,
-        .num_resources  = ARRAY_SIZE(uart0_resources),
-};
-static inline void configure_usart0_pins(unsigned pins)
-{
-        at91_set_A_periph(AT91_PIN_PA8, 1);             /* TXD0 */
-        at91_set_A_periph(AT91_PIN_PA7, 0);             /* RXD0 */
-        if (pins & ATMEL_UART_RTS)
-                at91_set_A_periph(AT91_PIN_PA10, 0);    /* RTS0 */
-        if (pins & ATMEL_UART_CTS)
-                at91_set_A_periph(AT91_PIN_PA9, 0);     /* CTS0 */
-}
-static struct resource uart1_resources[] = {
-        [0] = {
-                .start  = AT572D940HF_BASE_US1,
-                .end    = AT572D940HF_BASE_US1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT572D940HF_ID_US1,
-                .end    = AT572D940HF_ID_US1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct atmel_uart_data uart1_data = {
-        .use_dma_tx     = 1,
-        .use_dma_rx     = 1,
-};
-static u64 uart1_dmamask = DMA_BIT_MASK(32);
-static struct platform_device at572d940hf_uart1_device = {
-        .name           = "atmel_usart",
-        .id             = 2,
-        .dev            = {
-                                .dma_mask               = &uart1_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &uart1_data,
-        },
-        .resource       = uart1_resources,
-        .num_resources  = ARRAY_SIZE(uart1_resources),
-};
-static inline void configure_usart1_pins(unsigned pins)
-{
-        at91_set_A_periph(AT91_PIN_PC10, 1);            /* TXD1 */
-        at91_set_A_periph(AT91_PIN_PC9 , 0);            /* RXD1 */
-        if (pins & ATMEL_UART_RTS)
-                at91_set_A_periph(AT91_PIN_PC12, 0);    /* RTS1 */
-        if (pins & ATMEL_UART_CTS)
-                at91_set_A_periph(AT91_PIN_PC11, 0);    /* CTS1 */
-}
-static struct resource uart2_resources[] = {
-        [0] = {
-                .start  = AT572D940HF_BASE_US2,
-                .end    = AT572D940HF_BASE_US2 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT572D940HF_ID_US2,
-                .end    = AT572D940HF_ID_US2,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct atmel_uart_data uart2_data = {
-        .use_dma_tx     = 1,
-        .use_dma_rx     = 1,
-};
-static u64 uart2_dmamask = DMA_BIT_MASK(32);
-static struct platform_device at572d940hf_uart2_device = {
-        .name           = "atmel_usart",
-        .id             = 3,
-        .dev            = {
-                                .dma_mask               = &uart2_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &uart2_data,
-        },
-        .resource       = uart2_resources,
-        .num_resources  = ARRAY_SIZE(uart2_resources),
-};
-static inline void configure_usart2_pins(unsigned pins)
-{
-        at91_set_A_periph(AT91_PIN_PC15, 1);            /* TXD2 */
-        at91_set_A_periph(AT91_PIN_PC14, 0);            /* RXD2 */
-        if (pins & ATMEL_UART_RTS)
-                at91_set_A_periph(AT91_PIN_PC17, 0);    /* RTS2 */
-        if (pins & ATMEL_UART_CTS)
-                at91_set_A_periph(AT91_PIN_PC16, 0);    /* CTS2 */
-}
-static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
-struct platform_device *atmel_default_console_device;   /* the serial console device */
-void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
-{
-        struct platform_device *pdev;
-        switch (id) {
-                case 0:         /* DBGU */
-                        pdev = &at572d940hf_dbgu_device;
-                        configure_dbgu_pins();
-                        at91_clock_associate("mck", &pdev->dev, "usart");
-                        break;
-                case AT572D940HF_ID_US0:
-                        pdev = &at572d940hf_uart0_device;
-                        configure_usart0_pins(pins);
-                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
-                        break;
-                case AT572D940HF_ID_US1:
-                        pdev = &at572d940hf_uart1_device;
-                        configure_usart1_pins(pins);
-                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
-                        break;
-                case AT572D940HF_ID_US2:
-                        pdev = &at572d940hf_uart2_device;
-                        configure_usart2_pins(pins);
-                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
-                        break;
-                default:
-                        return;
-        }
-        pdev->id = portnr;              /* update to mapped ID */
-        if (portnr < ATMEL_MAX_UART)
-                at91_uarts[portnr] = pdev;
-}
-void __init at91_set_serial_console(unsigned portnr)
-{
-        if (portnr < ATMEL_MAX_UART)
-                atmel_default_console_device = at91_uarts[portnr];
-}
-void __init at91_add_device_serial(void)
-{
-        int i;
-        for (i = 0; i < ATMEL_MAX_UART; i++) {
-                if (at91_uarts[i])
-                        platform_device_register(at91_uarts[i]);
-        }
-        if (!atmel_default_console_device)
-                printk(KERN_INFO "AT91: No default serial console defined.\n");
-}
-#else
-void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
-void __init at91_set_serial_console(unsigned portnr) {}
-void __init at91_add_device_serial(void) {}
-#endif
-/* --------------------------------------------------------------------
- *  mAgic
- * -------------------------------------------------------------------- */
-#ifdef CONFIG_MAGICV
-static struct resource mAgic_resources[] = {
-        {
-                .start = AT91_MAGIC_PM_BASE,
-                .end   = AT91_MAGIC_PM_BASE + AT91_MAGIC_PM_SIZE - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        {
-                .start = AT91_MAGIC_DM_I_BASE,
-                .end   = AT91_MAGIC_DM_I_BASE + AT91_MAGIC_DM_I_SIZE - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        {
-                .start = AT91_MAGIC_DM_F_BASE,
-                .end   = AT91_MAGIC_DM_F_BASE + AT91_MAGIC_DM_F_SIZE - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        {
-                .start = AT91_MAGIC_DM_DB_BASE,
-                .end   = AT91_MAGIC_DM_DB_BASE + AT91_MAGIC_DM_DB_SIZE - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        {
-                .start = AT91_MAGIC_REGS_BASE,
-                .end   = AT91_MAGIC_REGS_BASE + AT91_MAGIC_REGS_SIZE - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        {
-                .start = AT91_MAGIC_EXTPAGE_BASE,
-                .end   = AT91_MAGIC_EXTPAGE_BASE + AT91_MAGIC_EXTPAGE_SIZE - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        {
-                .start  = AT572D940HF_ID_MSIRQ0,
-                .end    = AT572D940HF_ID_MSIRQ0,
-                .flags  = IORESOURCE_IRQ,
-        },
-        {
-                .start  = AT572D940HF_ID_MHALT,
-                .end    = AT572D940HF_ID_MHALT,
-                .flags  = IORESOURCE_IRQ,
-        },
-        {
-                .start  = AT572D940HF_ID_MEXC,
-                .end    = AT572D940HF_ID_MEXC,
-                .flags  = IORESOURCE_IRQ,
-        },
-        {
-                .start  = AT572D940HF_ID_MEDMA,
-                .end    = AT572D940HF_ID_MEDMA,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mAgic_device = {
-        .name           = "mAgic",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(mAgic_resources),
-        .resource       = mAgic_resources,
-};
-void __init at91_add_device_mAgic(void)
-{
-        platform_device_register(&mAgic_device);
-}
-#else
-void __init at91_add_device_mAgic(void) {}
-#endif
-/* -------------------------------------------------------------------- */
-/*
- * These devices are always present and don't need any board-specific
- * setup.
- */
-static int __init at91_add_standard_devices(void)
-{
-        at91_add_device_rtt();
-        at91_add_device_watchdog();
-        at91_add_device_tc();
-        return 0;
-}
-arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 73376170fb91..17fae4a42ab5 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -222,6 +222,25 @@ static struct clk *periph_clocks[] __initdata = {
        // irq0 .. irq1
 };
+static struct clk_lookup periph_clocks_lookups[] = {
+        CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk),
+        CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
+        CLKDEV_CON_DEV_ID("ssc", "ssc.0", &ssc0_clk),
+        CLKDEV_CON_DEV_ID("ssc", "ssc.1", &ssc1_clk),
+};
+static struct clk_lookup usart_clocks_lookups[] = {
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+};
 /*
 * The four programmable clocks.
 * You must configure pin multiplexing to bring these signals out.
@@ -258,12 +277,29 @@ static void __init at91cap9_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
+        clkdev_add_table(periph_clocks_lookups,
+                         ARRAY_SIZE(periph_clocks_lookups));
+        clkdev_add_table(usart_clocks_lookups,
+                         ARRAY_SIZE(usart_clocks_lookups));
        clk_register(&pck0);
        clk_register(&pck1);
        clk_register(&pck2);
        clk_register(&pck3);
 }
+static struct clk_lookup console_clock_lookup;
+void __init at91cap9_set_console_clock(int id)
+{
+        if (id >= ARRAY_SIZE(usart_clocks_lookups))
+                return;
+        console_clock_lookup.con_id = "usart";
+        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+        clkdev_add(&console_clock_lookup);
+}
 /* --------------------------------------------------------------------
 *  GPIO
 * -------------------------------------------------------------------- */
@@ -303,11 +339,14 @@ static void at91cap9_poweroff(void)
 *  AT91CAP9 processor initialization
 * -------------------------------------------------------------------- */
-void __init at91cap9_initialize(unsigned long main_clock)
+void __init at91cap9_map_io(void)
 {
        /* Map peripherals */
        iotable_init(at91cap9_io_desc, ARRAY_SIZE(at91cap9_io_desc));
+}
+void __init at91cap9_initialize(unsigned long main_clock)
+{
        at91_arch_reset = at91cap9_reset;
        pm_power_off = at91cap9_poweroff;
        at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index 21020ceb2f3a..cd850ed6f335 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -181,10 +181,6 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
        /* Pullup pin is handled internally by USB device peripheral */
-        /* Clocks */
-        at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
-        at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
        platform_device_register(&at91_usba_udc_device);
 }
 #else
@@ -355,7 +351,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                }
                mmc0_data = *data;
-                at91_clock_associate("mci0_clk", &at91cap9_mmc0_device.dev, "mci_clk");
                platform_device_register(&at91cap9_mmc0_device);
        } else {                        /* MCI1 */
                /* CLK */
@@ -373,7 +368,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                }
                mmc1_data = *data;
-                at91_clock_associate("mci1_clk", &at91cap9_mmc1_device.dev, "mci_clk");
                platform_device_register(&at91cap9_mmc1_device);
        }
 }
@@ -614,7 +608,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
                at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
-                at91_clock_associate("spi0_clk", &at91cap9_spi0_device.dev, "spi_clk");
                platform_device_register(&at91cap9_spi0_device);
        }
        if (enable_spi1) {
@@ -622,7 +615,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
                at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
-                at91_clock_associate("spi1_clk", &at91cap9_spi1_device.dev, "spi_clk");
                platform_device_register(&at91cap9_spi1_device);
        }
 }
@@ -659,8 +651,6 @@ static struct platform_device at91cap9_tcb_device = {
 static void __init at91_add_device_tc(void)
 {
-        /* this chip has one clock and irq for all three TC channels */
-        at91_clock_associate("tcb_clk", &at91cap9_tcb_device.dev, "t0_clk");
        platform_device_register(&at91cap9_tcb_device);
 }
 #else
@@ -1001,12 +991,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91CAP9_ID_SSC0:
                pdev = &at91cap9_ssc0_device;
                configure_ssc0_pins(pins);
-                at91_clock_associate("ssc0_clk", &pdev->dev, "ssc");
                break;
        case AT91CAP9_ID_SSC1:
                pdev = &at91cap9_ssc1_device;
                configure_ssc1_pins(pins);
-                at91_clock_associate("ssc1_clk", &pdev->dev, "ssc");
                break;
        default:
                return;
@@ -1199,32 +1187,30 @@ struct platform_device *atmel_default_console_device;	/* the serial console devi
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
        struct platform_device *pdev;
+        struct atmel_uart_data *pdata;
        switch (id) {
                case 0:         /* DBGU */
                        pdev = &at91cap9_dbgu_device;
                        configure_dbgu_pins();
-                        at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91CAP9_ID_US0:
                        pdev = &at91cap9_uart0_device;
                        configure_usart0_pins(pins);
-                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91CAP9_ID_US1:
                        pdev = &at91cap9_uart1_device;
                        configure_usart1_pins(pins);
-                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91CAP9_ID_US2:
                        pdev = &at91cap9_uart2_device;
                        configure_usart2_pins(pins);
-                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
        }
-        pdev->id = portnr;              /* update to mapped ID */
+        pdata = pdev->dev.platform_data;
+        pdata->num = portnr;            /* update to mapped ID */
        if (portnr < ATMEL_MAX_UART)
                at91_uarts[portnr] = pdev;
@@ -1232,8 +1218,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 void __init at91_set_serial_console(unsigned portnr)
 {
-        if (portnr < ATMEL_MAX_UART)
+        if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+                at91cap9_set_console_clock(portnr);
+        }
 }
 void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 2e9ecad97f3d..b228ce9e21a1 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -18,6 +18,7 @@
 #include <mach/at91rm9200.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_st.h>
+#include <mach/cpu.h>
 #include "generic.h"
 #include "clock.h"
@@ -191,6 +192,26 @@ static struct clk *periph_clocks[] __initdata = {
        // irq0 .. irq6
 };
+static struct clk_lookup periph_clocks_lookups[] = {
+        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+        CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+        CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
+        CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
+        CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
+        CLKDEV_CON_DEV_ID("ssc", "ssc.0", &ssc0_clk),
+        CLKDEV_CON_DEV_ID("ssc", "ssc.1", &ssc1_clk),
+        CLKDEV_CON_DEV_ID("ssc", "ssc.2", &ssc2_clk),
+};
+static struct clk_lookup usart_clocks_lookups[] = {
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
+};
 /*
 * The four programmable clocks.
 * You must configure pin multiplexing to bring these signals out.
@@ -227,12 +248,29 @@ static void __init at91rm9200_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
+        clkdev_add_table(periph_clocks_lookups,
+                         ARRAY_SIZE(periph_clocks_lookups));
+        clkdev_add_table(usart_clocks_lookups,
+                         ARRAY_SIZE(usart_clocks_lookups));
        clk_register(&pck0);
        clk_register(&pck1);
        clk_register(&pck2);
        clk_register(&pck3);
 }
+static struct clk_lookup console_clock_lookup;
+void __init at91rm9200_set_console_clock(int id)
+{
+        if (id >= ARRAY_SIZE(usart_clocks_lookups))
+                return;
+        console_clock_lookup.con_id = "usart";
+        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+        clkdev_add(&console_clock_lookup);
+}
 /* --------------------------------------------------------------------
 *  GPIO
 * -------------------------------------------------------------------- */
@@ -266,15 +304,25 @@ static void at91rm9200_reset(void)
        at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
 }
+int rm9200_type;
+EXPORT_SYMBOL(rm9200_type);
+void __init at91rm9200_set_type(int type)
+{
+        rm9200_type = type;
+}
 /* --------------------------------------------------------------------
 *  AT91RM9200 processor initialization
 * -------------------------------------------------------------------- */
-void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
+void __init at91rm9200_map_io(void)
 {
        /* Map peripherals */
        iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
+}
+void __init at91rm9200_initialize(unsigned long main_clock)
+{
        at91_arch_reset = at91rm9200_reset;
        at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
                        | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
@@ -288,7 +336,8 @@ void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks
        at91rm9200_register_clocks();
        /* Initialize GPIO subsystem */
-        at91_gpio_init(at91rm9200_gpio, banks);
+        at91_gpio_init(at91rm9200_gpio,
+                cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP);
 }
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 7b539228e0ef..a0ba475be04c 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -644,15 +644,7 @@ static struct platform_device at91rm9200_tcb1_device = {
 static void __init at91_add_device_tc(void)
 {
-        /* this chip has a separate clock and irq for each TC channel */
-        at91_clock_associate("tc0_clk", &at91rm9200_tcb0_device.dev, "t0_clk");
-        at91_clock_associate("tc1_clk", &at91rm9200_tcb0_device.dev, "t1_clk");
-        at91_clock_associate("tc2_clk", &at91rm9200_tcb0_device.dev, "t2_clk");
        platform_device_register(&at91rm9200_tcb0_device);
-        at91_clock_associate("tc3_clk", &at91rm9200_tcb1_device.dev, "t0_clk");
-        at91_clock_associate("tc4_clk", &at91rm9200_tcb1_device.dev, "t1_clk");
-        at91_clock_associate("tc5_clk", &at91rm9200_tcb1_device.dev, "t2_clk");
        platform_device_register(&at91rm9200_tcb1_device);
 }
 #else
@@ -849,17 +841,14 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91RM9200_ID_SSC0:
                pdev = &at91rm9200_ssc0_device;
                configure_ssc0_pins(pins);
-                at91_clock_associate("ssc0_clk", &pdev->dev, "ssc");
                break;
        case AT91RM9200_ID_SSC1:
                pdev = &at91rm9200_ssc1_device;
                configure_ssc1_pins(pins);
-                at91_clock_associate("ssc1_clk", &pdev->dev, "ssc");
                break;
        case AT91RM9200_ID_SSC2:
                pdev = &at91rm9200_ssc2_device;
                configure_ssc2_pins(pins);
-                at91_clock_associate("ssc2_clk", &pdev->dev, "ssc");
                break;
        default:
                return;
@@ -1109,37 +1098,34 @@ struct platform_device *atmel_default_console_device;	/* the serial console devi
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
        struct platform_device *pdev;
+        struct atmel_uart_data *pdata;
        switch (id) {
                case 0:         /* DBGU */
                        pdev = &at91rm9200_dbgu_device;
                        configure_dbgu_pins();
-                        at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91RM9200_ID_US0:
                        pdev = &at91rm9200_uart0_device;
                        configure_usart0_pins(pins);
-                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91RM9200_ID_US1:
                        pdev = &at91rm9200_uart1_device;
                        configure_usart1_pins(pins);
-                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91RM9200_ID_US2:
                        pdev = &at91rm9200_uart2_device;
                        configure_usart2_pins(pins);
-                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                case AT91RM9200_ID_US3:
                        pdev = &at91rm9200_uart3_device;
                        configure_usart3_pins(pins);
-                        at91_clock_associate("usart3_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
        }
-        pdev->id = portnr;              /* update to mapped ID */
+        pdata = pdev->dev.platform_data;
+        pdata->num = portnr;            /* update to mapped ID */
        if (portnr < ATMEL_MAX_UART)
                at91_uarts[portnr] = pdev;
@@ -1147,8 +1133,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 void __init at91_set_serial_console(unsigned portnr)
 {
-        if (portnr < ATMEL_MAX_UART)
+        if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+                at91rm9200_set_console_clock(portnr);
+        }
 }
 void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 195208b30024..7d606b04d313 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -231,6 +231,28 @@ static struct clk *periph_clocks[] __initdata = {
        // irq0 .. irq2
 };
+static struct clk_lookup periph_clocks_lookups[] = {
+        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+        CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+        CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
+        CLKDEV_CON_DEV_ID("t3_clk", "atmel_tcb.1", &tc3_clk),
+        CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk),
+        CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
+};
+static struct clk_lookup usart_clocks_lookups[] = {
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.5", &usart4_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.6", &usart5_clk),
+};
 /*
 * The two programmable clocks.
 * You must configure pin multiplexing to bring these signals out.
@@ -255,10 +277,27 @@ static void __init at91sam9260_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
+        clkdev_add_table(periph_clocks_lookups,
+                         ARRAY_SIZE(periph_clocks_lookups));
+        clkdev_add_table(usart_clocks_lookups,
+                         ARRAY_SIZE(usart_clocks_lookups));
        clk_register(&pck0);
        clk_register(&pck1);
 }
+static struct clk_lookup console_clock_lookup;
+void __init at91sam9260_set_console_clock(int id)
+{
+        if (id >= ARRAY_SIZE(usart_clocks_lookups))
+                return;
+        console_clock_lookup.con_id = "usart";
+        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+        clkdev_add(&console_clock_lookup);
+}
 /* --------------------------------------------------------------------
 *  GPIO
 * -------------------------------------------------------------------- */
@@ -289,7 +328,7 @@ static void at91sam9260_poweroff(void)
 *  AT91SAM9260 processor initialization
 * -------------------------------------------------------------------- */
-static void __init at91sam9xe_initialize(void)
+static void __init at91sam9xe_map_io(void)
 {
        unsigned long cidr, sram_size;
@@ -310,18 +349,21 @@ static void __init at91sam9xe_initialize(void)
        iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc));
 }
-void __init at91sam9260_initialize(unsigned long main_clock)
+void __init at91sam9260_map_io(void)
 {
        /* Map peripherals */
        iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
        if (cpu_is_at91sam9xe())
-                at91sam9xe_initialize();
+                at91sam9xe_map_io();
        else if (cpu_is_at91sam9g20())
                iotable_init(at91sam9g20_sram_desc, ARRAY_SIZE(at91sam9g20_sram_desc));
        else
                iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
+}
+void __init at91sam9260_initialize(unsigned long main_clock)
+{
        at91_arch_reset = at91sam9_alt_reset;
        pm_power_off = at91sam9260_poweroff;
        at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 07eb7b07e442..1fdeb9058a76 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -609,7 +609,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
                at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
-                at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
                platform_device_register(&at91sam9260_spi0_device);
        }
        if (enable_spi1) {
@@ -617,7 +616,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
                at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
-                at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
                platform_device_register(&at91sam9260_spi1_device);
        }
 }
@@ -694,15 +692,7 @@ static struct platform_device at91sam9260_tcb1_device = {
 static void __init at91_add_device_tc(void)
 {
-        /* this chip has a separate clock and irq for each TC channel */
-        at91_clock_associate("tc0_clk", &at91sam9260_tcb0_device.dev, "t0_clk");
-        at91_clock_associate("tc1_clk", &at91sam9260_tcb0_device.dev, "t1_clk");
-        at91_clock_associate("tc2_clk", &at91sam9260_tcb0_device.dev, "t2_clk");
        platform_device_register(&at91sam9260_tcb0_device);
-        at91_clock_associate("tc3_clk", &at91sam9260_tcb1_device.dev, "t0_clk");
-        at91_clock_associate("tc4_clk", &at91sam9260_tcb1_device.dev, "t1_clk");
-        at91_clock_associate("tc5_clk", &at91sam9260_tcb1_device.dev, "t2_clk");
        platform_device_register(&at91sam9260_tcb1_device);
 }
 #else
@@ -820,7 +810,6 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91SAM9260_ID_SSC:
                pdev = &at91sam9260_ssc_device;
                configure_ssc_pins(pins);
-                at91_clock_associate("ssc_clk", &pdev->dev, "pclk");
                break;
        default:
                return;
@@ -1139,47 +1128,42 @@ struct platform_device *atmel_default_console_device;	/* the serial console devi
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
        struct platform_device *pdev;
+        struct atmel_uart_data *pdata;
        switch (id) {
                case 0:         /* DBGU */
                        pdev = &at91sam9260_dbgu_device;
                        configure_dbgu_pins();
-                        at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91SAM9260_ID_US0:
                        pdev = &at91sam9260_uart0_device;
                        configure_usart0_pins(pins);
-                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9260_ID_US1:
                        pdev = &at91sam9260_uart1_device;
                        configure_usart1_pins(pins);
-                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9260_ID_US2:
                        pdev = &at91sam9260_uart2_device;
                        configure_usart2_pins(pins);
-                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9260_ID_US3:
                        pdev = &at91sam9260_uart3_device;
                        configure_usart3_pins(pins);
-                        at91_clock_associate("usart3_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9260_ID_US4:
                        pdev = &at91sam9260_uart4_device;
                        configure_usart4_pins();
-                        at91_clock_associate("usart4_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9260_ID_US5:
                        pdev = &at91sam9260_uart5_device;
                        configure_usart5_pins();
-                        at91_clock_associate("usart5_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
        }
-        pdev->id = portnr;              /* update to mapped ID */
+        pdata = pdev->dev.platform_data;
+        pdata->num = portnr;            /* update to mapped ID */
        if (portnr < ATMEL_MAX_UART)
                at91_uarts[portnr] = pdev;
@@ -1187,8 +1171,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 void __init at91_set_serial_console(unsigned portnr)
 {
-        if (portnr < ATMEL_MAX_UART)
+        if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+                at91sam9260_set_console_clock(portnr);
+        }
 }
 void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index fcad88668504..c1483168c97a 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -178,6 +178,24 @@ static struct clk *periph_clocks[] __initdata = {
        // irq0 .. irq2
 };
+static struct clk_lookup periph_clocks_lookups[] = {
+        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+        CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+        CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc1_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
+};
+static struct clk_lookup usart_clocks_lookups[] = {
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+};
 /*
 * The four programmable clocks.
 * You must configure pin multiplexing to bring these signals out.
@@ -228,6 +246,11 @@ static void __init at91sam9261_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
+        clkdev_add_table(periph_clocks_lookups,
+                         ARRAY_SIZE(periph_clocks_lookups));
+        clkdev_add_table(usart_clocks_lookups,
+                         ARRAY_SIZE(usart_clocks_lookups));
        clk_register(&pck0);
        clk_register(&pck1);
        clk_register(&pck2);
@@ -237,6 +260,18 @@ static void __init at91sam9261_register_clocks(void)
        clk_register(&hck1);
 }
+static struct clk_lookup console_clock_lookup;
+void __init at91sam9261_set_console_clock(int id)
+{
+        if (id >= ARRAY_SIZE(usart_clocks_lookups))
+                return;
+        console_clock_lookup.con_id = "usart";
+        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+        clkdev_add(&console_clock_lookup);
+}
 /* --------------------------------------------------------------------
 *  GPIO
 * -------------------------------------------------------------------- */
@@ -267,7 +302,7 @@ static void at91sam9261_poweroff(void)
 *  AT91SAM9261 processor initialization
 * -------------------------------------------------------------------- */
-void __init at91sam9261_initialize(unsigned long main_clock)
+void __init at91sam9261_map_io(void)
 {
        /* Map peripherals */
        iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
@@ -276,8 +311,10 @@ void __init at91sam9261_initialize(unsigned long main_clock)
                iotable_init(at91sam9g10_sram_desc, ARRAY_SIZE(at91sam9g10_sram_desc));
        else
                iotable_init(at91sam9261_sram_desc, ARRAY_SIZE(at91sam9261_sram_desc));
+}
+void __init at91sam9261_initialize(unsigned long main_clock)
+{
        at91_arch_reset = at91sam9_alt_reset;
        pm_power_off = at91sam9261_poweroff;
        at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 59fc48311fb0..3eb4538fceeb 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -426,7 +426,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
                at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
-                at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
                platform_device_register(&at91sam9261_spi0_device);
        }
        if (enable_spi1) {
@@ -434,7 +433,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PB31, 0);    /* SPI1_MOSI */
                at91_set_A_periph(AT91_PIN_PB29, 0);    /* SPI1_SPCK */
-                at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
                platform_device_register(&at91sam9261_spi1_device);
        }
 }
@@ -581,10 +579,6 @@ static struct platform_device at91sam9261_tcb_device = {
 static void __init at91_add_device_tc(void)
 {
-        /* this chip has a separate clock and irq for each TC channel */
-        at91_clock_associate("tc0_clk", &at91sam9261_tcb_device.dev, "t0_clk");
-        at91_clock_associate("tc1_clk", &at91sam9261_tcb_device.dev, "t1_clk");
-        at91_clock_associate("tc2_clk", &at91sam9261_tcb_device.dev, "t2_clk");
        platform_device_register(&at91sam9261_tcb_device);
 }
 #else
@@ -786,17 +780,14 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91SAM9261_ID_SSC0:
                pdev = &at91sam9261_ssc0_device;
                configure_ssc0_pins(pins);
-                at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
                break;
        case AT91SAM9261_ID_SSC1:
                pdev = &at91sam9261_ssc1_device;
                configure_ssc1_pins(pins);
-                at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
                break;
        case AT91SAM9261_ID_SSC2:
                pdev = &at91sam9261_ssc2_device;
                configure_ssc2_pins(pins);
-                at91_clock_associate("ssc2_clk", &pdev->dev, "pclk");
                break;
        default:
                return;
@@ -989,32 +980,30 @@ struct platform_device *atmel_default_console_device;	/* the serial console devi
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
        struct platform_device *pdev;
+        struct atmel_uart_data *pdata;
        switch (id) {
                case 0:         /* DBGU */
                        pdev = &at91sam9261_dbgu_device;
                        configure_dbgu_pins();
-                        at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91SAM9261_ID_US0:
                        pdev = &at91sam9261_uart0_device;
                        configure_usart0_pins(pins);
-                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9261_ID_US1:
                        pdev = &at91sam9261_uart1_device;
                        configure_usart1_pins(pins);
-                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9261_ID_US2:
                        pdev = &at91sam9261_uart2_device;
                        configure_usart2_pins(pins);
-                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
        }
-        pdev->id = portnr;              /* update to mapped ID */
+        pdata = pdev->dev.platform_data;
+        pdata->num = portnr;            /* update to mapped ID */
        if (portnr < ATMEL_MAX_UART)
                at91_uarts[portnr] = pdev;
@@ -1022,8 +1011,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 void __init at91_set_serial_console(unsigned portnr)
 {
-        if (portnr < ATMEL_MAX_UART)
+        if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+                at91sam9261_set_console_clock(portnr);
+        }
 }
 void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 249f900954d8..dc28477d14ff 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -199,6 +199,23 @@ static struct clk *periph_clocks[] __initdata = {
        // irq0 .. irq1
 };
+static struct clk_lookup periph_clocks_lookups[] = {
+        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
+};
+static struct clk_lookup usart_clocks_lookups[] = {
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+};
 /*
 * The four programmable clocks.
 * You must configure pin multiplexing to bring these signals out.
@@ -235,12 +252,29 @@ static void __init at91sam9263_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
+        clkdev_add_table(periph_clocks_lookups,
+                         ARRAY_SIZE(periph_clocks_lookups));
+        clkdev_add_table(usart_clocks_lookups,
+                         ARRAY_SIZE(usart_clocks_lookups));
        clk_register(&pck0);
        clk_register(&pck1);
        clk_register(&pck2);
        clk_register(&pck3);
 }
+static struct clk_lookup console_clock_lookup;
+void __init at91sam9263_set_console_clock(int id)
+{
+        if (id >= ARRAY_SIZE(usart_clocks_lookups))
+                return;
+        console_clock_lookup.con_id = "usart";
+        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+        clkdev_add(&console_clock_lookup);
+}
 /* --------------------------------------------------------------------
 *  GPIO
 * -------------------------------------------------------------------- */
@@ -279,11 +313,14 @@ static void at91sam9263_poweroff(void)
 *  AT91SAM9263 processor initialization
 * -------------------------------------------------------------------- */
-void __init at91sam9263_initialize(unsigned long main_clock)
+void __init at91sam9263_map_io(void)
 {
        /* Map peripherals */
        iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
+}
+void __init at91sam9263_initialize(unsigned long main_clock)
+{
        at91_arch_reset = at91sam9_alt_reset;
        pm_power_off = at91sam9263_poweroff;
        at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index fb5c23af1017..ffe081b77ed0 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -308,7 +308,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                }
                mmc0_data = *data;
-                at91_clock_associate("mci0_clk", &at91sam9263_mmc0_device.dev, "mci_clk");
                platform_device_register(&at91sam9263_mmc0_device);
        } else {                        /* MCI1 */
                /* CLK */
@@ -339,7 +338,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                }
                mmc1_data = *data;
-                at91_clock_associate("mci1_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
                platform_device_register(&at91sam9263_mmc1_device);
        }
 }
@@ -686,7 +684,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
                at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
-                at91_clock_associate("spi0_clk", &at91sam9263_spi0_device.dev, "spi_clk");
                platform_device_register(&at91sam9263_spi0_device);
        }
        if (enable_spi1) {
@@ -694,7 +691,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
                at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
-                at91_clock_associate("spi1_clk", &at91sam9263_spi1_device.dev, "spi_clk");
                platform_device_register(&at91sam9263_spi1_device);
        }
 }
@@ -941,8 +937,6 @@ static struct platform_device at91sam9263_tcb_device = {
 static void __init at91_add_device_tc(void)
 {
-        /* this chip has one clock and irq for all three TC channels */
-        at91_clock_associate("tcb_clk", &at91sam9263_tcb_device.dev, "t0_clk");
        platform_device_register(&at91sam9263_tcb_device);
 }
 #else
@@ -1171,12 +1165,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91SAM9263_ID_SSC0:
                pdev = &at91sam9263_ssc0_device;
                configure_ssc0_pins(pins);
-                at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
                break;
        case AT91SAM9263_ID_SSC1:
                pdev = &at91sam9263_ssc1_device;
                configure_ssc1_pins(pins);
-                at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
                break;
        default:
                return;
@@ -1370,32 +1362,30 @@ struct platform_device *atmel_default_console_device;	/* the serial console devi
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
        struct platform_device *pdev;
+        struct atmel_uart_data *pdata;
        switch (id) {
                case 0:         /* DBGU */
                        pdev = &at91sam9263_dbgu_device;
                        configure_dbgu_pins();
-                        at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91SAM9263_ID_US0:
                        pdev = &at91sam9263_uart0_device;
                        configure_usart0_pins(pins);
-                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9263_ID_US1:
                        pdev = &at91sam9263_uart1_device;
                        configure_usart1_pins(pins);
-                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9263_ID_US2:
                        pdev = &at91sam9263_uart2_device;
                        configure_usart2_pins(pins);
-                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
        }
-        pdev->id = portnr;              /* update to mapped ID */
+        pdata = pdev->dev.platform_data;
+        pdata->num = portnr;            /* update to mapped ID */
        if (portnr < ATMEL_MAX_UART)
                at91_uarts[portnr] = pdev;
@@ -1403,8 +1393,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 void __init at91_set_serial_console(unsigned portnr)
 {
-        if (portnr < ATMEL_MAX_UART)
+        if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+                at91sam9263_set_console_clock(portnr);
+        }
 }
 void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index c67b47f1c0fd..2bb6ff9af1c7 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -184,22 +184,6 @@ static struct clk vdec_clk = {
        .type           = CLK_TYPE_PERIPHERAL,
 };
-/* One additional fake clock for ohci */
-static struct clk ohci_clk = {
-        .name           = "ohci_clk",
-        .pmc_mask       = 0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .parent         = &uhphs_clk,
-};
-/* One additional fake clock for second TC block */
-static struct clk tcb1_clk = {
-        .name           = "tcb1_clk",
-        .pmc_mask       = 0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .parent         = &tcb0_clk,
-};
 static struct clk *periph_clocks[] __initdata = {
        &pioA_clk,
        &pioB_clk,
@@ -228,8 +212,30 @@ static struct clk *periph_clocks[] __initdata = {
        &udphs_clk,
        &mmc1_clk,
        // irq0
-        &ohci_clk,
+};
-        &tcb1_clk,
+static struct clk_lookup periph_clocks_lookups[] = {
+        /* One additional fake clock for ohci */
+        CLKDEV_CON_ID("ohci_clk", &uhphs_clk),
+        CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci.0", &uhphs_clk),
+        CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk),
+        CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb0_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tcb0_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+};
+static struct clk_lookup usart_clocks_lookups[] = {
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
 };
 /*
@@ -256,6 +262,11 @@ static void __init at91sam9g45_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
+        clkdev_add_table(periph_clocks_lookups,
+                         ARRAY_SIZE(periph_clocks_lookups));
+        clkdev_add_table(usart_clocks_lookups,
+                         ARRAY_SIZE(usart_clocks_lookups));
        if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11())
                clk_register(&vdec_clk);
@@ -263,6 +274,18 @@ static void __init at91sam9g45_register_clocks(void)
        clk_register(&pck1);
 }
+static struct clk_lookup console_clock_lookup;
+void __init at91sam9g45_set_console_clock(int id)
+{
+        if (id >= ARRAY_SIZE(usart_clocks_lookups))
+                return;
+        console_clock_lookup.con_id = "usart";
+        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+        clkdev_add(&console_clock_lookup);
+}
 /* --------------------------------------------------------------------
 *  GPIO
 * -------------------------------------------------------------------- */
@@ -306,11 +329,14 @@ static void at91sam9g45_poweroff(void)
 *  AT91SAM9G45 processor initialization
 * -------------------------------------------------------------------- */
-void __init at91sam9g45_initialize(unsigned long main_clock)
+void __init at91sam9g45_map_io(void)
 {
        /* Map peripherals */
        iotable_init(at91sam9g45_io_desc, ARRAY_SIZE(at91sam9g45_io_desc));
+}
+void __init at91sam9g45_initialize(unsigned long main_clock)
+{
        at91_arch_reset = at91sam9g45_reset;
        pm_power_off = at91sam9g45_poweroff;
        at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 5e9f8a4c38df..05674865bc21 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -180,7 +180,6 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
        }
        usbh_ehci_data = *data;
-        at91_clock_associate("uhphs_clk", &at91_usbh_ehci_device.dev, "ehci_clk");
        platform_device_register(&at91_usbh_ehci_device);
 }
 #else
@@ -266,10 +265,6 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
        /* Pullup pin is handled internally by USB device peripheral */
-        /* Clocks */
-        at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
-        at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
        platform_device_register(&at91_usba_udc_device);
 }
 #else
@@ -478,7 +473,6 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
                }
                mmc0_data = *data;
-                at91_clock_associate("mci0_clk", &at91sam9g45_mmc0_device.dev, "mci_clk");
                platform_device_register(&at91sam9g45_mmc0_device);
        } else {                        /* MCI1 */
@@ -504,7 +498,6 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
                }
                mmc1_data = *data;
-                at91_clock_associate("mci1_clk", &at91sam9g45_mmc1_device.dev, "mci_clk");
                platform_device_register(&at91sam9g45_mmc1_device);
        }
@@ -801,7 +794,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI0_MOSI */
                at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI0_SPCK */
-                at91_clock_associate("spi0_clk", &at91sam9g45_spi0_device.dev, "spi_clk");
                platform_device_register(&at91sam9g45_spi0_device);
        }
        if (enable_spi1) {
@@ -809,7 +801,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                at91_set_A_periph(AT91_PIN_PB15, 0);    /* SPI1_MOSI */
                at91_set_A_periph(AT91_PIN_PB16, 0);    /* SPI1_SPCK */
-                at91_clock_associate("spi1_clk", &at91sam9g45_spi1_device.dev, "spi_clk");
                platform_device_register(&at91sam9g45_spi1_device);
        }
 }
@@ -999,10 +990,7 @@ static struct platform_device at91sam9g45_tcb1_device = {
 static void __init at91_add_device_tc(void)
 {
-        /* this chip has one clock and irq for all six TC channels */
-        at91_clock_associate("tcb0_clk", &at91sam9g45_tcb0_device.dev, "t0_clk");
        platform_device_register(&at91sam9g45_tcb0_device);
-        at91_clock_associate("tcb1_clk", &at91sam9g45_tcb1_device.dev, "t0_clk");
        platform_device_register(&at91sam9g45_tcb1_device);
 }
 #else
@@ -1286,12 +1274,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91SAM9G45_ID_SSC0:
                pdev = &at91sam9g45_ssc0_device;
                configure_ssc0_pins(pins);
-                at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
                break;
        case AT91SAM9G45_ID_SSC1:
                pdev = &at91sam9g45_ssc1_device;
                configure_ssc1_pins(pins);
-                at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
                break;
        default:
                return;
@@ -1527,37 +1513,34 @@ struct platform_device *atmel_default_console_device;	/* the serial console devi
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
        struct platform_device *pdev;
+        struct atmel_uart_data *pdata;
        switch (id) {
                case 0:         /* DBGU */
                        pdev = &at91sam9g45_dbgu_device;
                        configure_dbgu_pins();
-                        at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91SAM9G45_ID_US0:
                        pdev = &at91sam9g45_uart0_device;
                        configure_usart0_pins(pins);
-                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9G45_ID_US1:
                        pdev = &at91sam9g45_uart1_device;
                        configure_usart1_pins(pins);
-                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9G45_ID_US2:
                        pdev = &at91sam9g45_uart2_device;
                        configure_usart2_pins(pins);
-                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9G45_ID_US3:
                        pdev = &at91sam9g45_uart3_device;
                        configure_usart3_pins(pins);
-                        at91_clock_associate("usart3_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
        }
-        pdev->id = portnr;              /* update to mapped ID */
+        pdata = pdev->dev.platform_data;
+        pdata->num = portnr;            /* update to mapped ID */
        if (portnr < ATMEL_MAX_UART)
                at91_uarts[portnr] = pdev;
@@ -1565,8 +1548,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 void __init at91_set_serial_console(unsigned portnr)
 {
-        if (portnr < ATMEL_MAX_UART)
+        if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+                at91sam9g45_set_console_clock(portnr);
+        }
 }
 void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 6a9d24e5ed8e..1a40f16b66c8 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -190,6 +190,24 @@ static struct clk *periph_clocks[] __initdata = {
        // irq0
 };
+static struct clk_lookup periph_clocks_lookups[] = {
+        CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk),
+        CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+        CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
+        CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+};
+static struct clk_lookup usart_clocks_lookups[] = {
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
+        CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
+};
 /*
 * The two programmable clocks.
 * You must configure pin multiplexing to bring these signals out.
@@ -214,10 +232,27 @@ static void __init at91sam9rl_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
+        clkdev_add_table(periph_clocks_lookups,
+                         ARRAY_SIZE(periph_clocks_lookups));
+        clkdev_add_table(usart_clocks_lookups,
+                         ARRAY_SIZE(usart_clocks_lookups));
        clk_register(&pck0);
        clk_register(&pck1);
 }
+static struct clk_lookup console_clock_lookup;
+void __init at91sam9rl_set_console_clock(int id)
+{
+        if (id >= ARRAY_SIZE(usart_clocks_lookups))
+                return;
+        console_clock_lookup.con_id = "usart";
+        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+        clkdev_add(&console_clock_lookup);
+}
 /* --------------------------------------------------------------------
 *  GPIO
 * -------------------------------------------------------------------- */
@@ -252,7 +287,7 @@ static void at91sam9rl_poweroff(void)
 *  AT91SAM9RL processor initialization
 * -------------------------------------------------------------------- */
-void __init at91sam9rl_initialize(unsigned long main_clock)
+void __init at91sam9rl_map_io(void)
 {
        unsigned long cidr, sram_size;
@@ -275,7 +310,10 @@ void __init at91sam9rl_initialize(unsigned long main_clock)
        /* Map SRAM */
        iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc));
+}
+void __init at91sam9rl_initialize(unsigned long main_clock)
+{
        at91_arch_reset = at91sam9_alt_reset;
        pm_power_off = at91sam9rl_poweroff;
        at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index c49262bddd85..c296045f2b6a 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -155,10 +155,6 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
        /* Pullup pin is handled internally by USB device peripheral */
-        /* Clocks */
-        at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
-        at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
        platform_device_register(&at91_usba_udc_device);
 }
 #else
@@ -605,10 +601,6 @@ static struct platform_device at91sam9rl_tcb_device = {
 static void __init at91_add_device_tc(void)
 {
-        /* this chip has a separate clock and irq for each TC channel */
-        at91_clock_associate("tc0_clk", &at91sam9rl_tcb_device.dev, "t0_clk");
-        at91_clock_associate("tc1_clk", &at91sam9rl_tcb_device.dev, "t1_clk");
-        at91_clock_associate("tc2_clk", &at91sam9rl_tcb_device.dev, "t2_clk");
        platform_device_register(&at91sam9rl_tcb_device);
 }
 #else
@@ -892,12 +884,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
        case AT91SAM9RL_ID_SSC0:
                pdev = &at91sam9rl_ssc0_device;
                configure_ssc0_pins(pins);
-                at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
                break;
        case AT91SAM9RL_ID_SSC1:
                pdev = &at91sam9rl_ssc1_device;
                configure_ssc1_pins(pins);
-                at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
                break;
        default:
                return;
@@ -1141,37 +1131,34 @@ struct platform_device *atmel_default_console_device;	/* the serial console devi
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
        struct platform_device *pdev;
+        struct atmel_uart_data *pdata;
        switch (id) {
                case 0:         /* DBGU */
                        pdev = &at91sam9rl_dbgu_device;
                        configure_dbgu_pins();
-                        at91_clock_associate("mck", &pdev->dev, "usart");
                        break;
                case AT91SAM9RL_ID_US0:
                        pdev = &at91sam9rl_uart0_device;
                        configure_usart0_pins(pins);
-                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9RL_ID_US1:
                        pdev = &at91sam9rl_uart1_device;
                        configure_usart1_pins(pins);
-                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9RL_ID_US2:
                        pdev = &at91sam9rl_uart2_device;
                        configure_usart2_pins(pins);
-                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
                        break;
                case AT91SAM9RL_ID_US3:
                        pdev = &at91sam9rl_uart3_device;
                        configure_usart3_pins(pins);
-                        at91_clock_associate("usart3_clk", &pdev->dev, "usart");
                        break;
                default:
                        return;
        }
-        pdev->id = portnr;              /* update to mapped ID */
+        pdata = pdev->dev.platform_data;
+        pdata->num = portnr;            /* update to mapped ID */
        if (portnr < ATMEL_MAX_UART)
                at91_uarts[portnr] = pdev;
@@ -1179,8 +1166,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 void __init at91_set_serial_console(unsigned portnr)
 {
-        if (portnr < ATMEL_MAX_UART)
+        if (portnr < ATMEL_MAX_UART) {
                atmel_default_console_device = at91_uarts[portnr];
+                at91sam9rl_set_console_clock(portnr);
+        }
 }
 void __init at91_add_device_serial(void)
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index ad3ec85b2790..56ba3bd035ae 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -37,11 +37,6 @@ unsigned long clk_get_rate(struct clk *clk)
        return AT91X40_MASTER_CLOCK;
 }
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        return NULL;
-}
 void __init at91x40_initialize(unsigned long main_clock)
 {
        at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index 8a3fc84847c1..ab1d463aa47d 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -35,14 +35,18 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/cpu.h>
 #include "generic.h"
-static void __init onearm_map_io(void)
+static void __init onearm_init_early(void)
 {
+        /* Set cpu type: PQFP */
+        at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
        /* Initialize processor: 18.432 MHz crystal */
-        at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+        at91rm9200_initialize(18432000);
        /* DBGU on ttyS0. (Rx & Tx only) */
        at91_register_uart(0, 0, 0);
@@ -92,9 +96,9 @@ static void __init onearm_board_init(void)
 MACHINE_START(ONEARM, "Ajeco 1ARM single board computer")
        /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = onearm_map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = onearm_init_early,
        .init_irq       = onearm_init_irq,
        .init_machine   = onearm_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index cba7f7771fee..a4924de48c36 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -48,7 +48,7 @@
 #include "generic.h"
-static void __init afeb9260_map_io(void)
+static void __init afeb9260_init_early(void)
 {
        /* Initialize processor: 18.432 MHz crystal */
        at91sam9260_initialize(18432000);
@@ -218,9 +218,9 @@ static void __init afeb9260_board_init(void)
 MACHINE_START(AFEB9260, "Custom afeb9260 board")
        /* Maintainer: Sergey Lapin <slapin@ossfans.org> */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = afeb9260_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = afeb9260_init_early,
        .init_irq       = afeb9260_init_irq,
        .init_machine   = afeb9260_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-at572d940hf_ek.c b/arch/arm/mach-at91/board-at572d940hf_ek.c
deleted file mode 100644
index 3929f1c9e4e5..000000000000
--- a/arch/arm/mach-at91/board-at572d940hf_ek.c
+++ /dev/null
@@ -1,326 +0,0 @@
-/*
- * linux/arch/arm/mach-at91/board-at572d940hf_ek.c
- *
- * Copyright (C) 2008 Atmel Antonio R. Costa <costa.antonior@gmail.com>
- * Copyright (C) 2005 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/ds1305.h>
-#include <linux/irq.h>
-#include <linux/mtd/physmap.h>
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-#include <mach/board.h>
-#include <mach/gpio.h>
-#include <mach/at91sam9_smc.h>
-#include "sam9_smc.h"
-#include "generic.h"
-static void __init eb_map_io(void)
-{
-        /* Initialize processor: 12.500 MHz crystal */
-        at572d940hf_initialize(12000000);
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-        /* USART0 on ttyS1. (Rx & Tx only) */
-        at91_register_uart(AT572D940HF_ID_US0, 1, 0);
-        /* USART1 on ttyS2. (Rx & Tx only) */
-        at91_register_uart(AT572D940HF_ID_US1, 2, 0);
-        /* USART2 on ttyS3. (Tx & Rx only */
-        at91_register_uart(AT572D940HF_ID_US2, 3, 0);
-        /* set serial console to ttyS0 (ie, DBGU) */
-        at91_set_serial_console(0);
-}
-static void __init eb_init_irq(void)
-{
-        at572d940hf_init_interrupts(NULL);
-}
-/*
- * USB Host Port
- */
-static struct at91_usbh_data __initdata eb_usbh_data = {
-        .ports          = 2,
-};
-/*
- * USB Device Port
- */
-static struct at91_udc_data __initdata eb_udc_data = {
-        .vbus_pin       = 0,            /* no VBUS detection,UDC always on */
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
-};
-/*
- * MCI (SD/MMC)
- */
-static struct at91_mmc_data __initdata eb_mmc_data = {
-        .wire4          = 1,
-/*      .det_pin        = ... not connected */
-/*      .wp_pin         = ... not connected */
-/*      .vcc_pin        = ... not connected */
-};
-/*
- * MACB Ethernet device
- */
-static struct at91_eth_data __initdata eb_eth_data = {
-        .phy_irq_pin    = AT91_PIN_PB25,
-        .is_rmii        = 1,
-};
-/*
- * NOR flash
- */
-static struct mtd_partition eb_nor_partitions[] = {
-        {
-                .name           = "Raw Environment",
-                .offset         = 0,
-                .size           = SZ_4M,
-                .mask_flags     = 0,
-        },
-        {
-                .name           = "OS FS",
-                .offset         = MTDPART_OFS_APPEND,
-                .size           = 3 * SZ_1M,
-                .mask_flags     = 0,
-        },
-        {
-                .name           = "APP FS",
-                .offset         = MTDPART_OFS_APPEND,
-                .size           = MTDPART_SIZ_FULL,
-                .mask_flags     = 0,
-        },
-};
-static void nor_flash_set_vpp(struct map_info* mi, int i) {
-};
-static struct physmap_flash_data nor_flash_data = {
-        .width          = 4,
-        .parts          = eb_nor_partitions,
-        .nr_parts       = ARRAY_SIZE(eb_nor_partitions),
-        .set_vpp        = nor_flash_set_vpp,
-};
-static struct resource nor_flash_resources[] = {
-        {
-                .start  = AT91_CHIPSELECT_0,
-                .end    = AT91_CHIPSELECT_0 + SZ_16M - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-};
-static struct platform_device nor_flash = {
-        .name           = "physmap-flash",
-        .id             = 0,
-        .dev            = {
-                                .platform_data = &nor_flash_data,
-                        },
-        .resource       = nor_flash_resources,
-        .num_resources  = ARRAY_SIZE(nor_flash_resources),
-};
-static struct sam9_smc_config __initdata eb_nor_smc_config = {
-        .ncs_read_setup         = 1,
-        .nrd_setup              = 1,
-        .ncs_write_setup        = 1,
-        .nwe_setup              = 1,
-        .ncs_read_pulse         = 7,
-        .nrd_pulse              = 7,
-        .ncs_write_pulse        = 7,
-        .nwe_pulse              = 7,
-        .read_cycle             = 9,
-        .write_cycle            = 9,
-        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_32,
-        .tdf_cycles             = 1,
-};
-static void __init eb_add_device_nor(void)
-{
-        /* configure chip-select 0 (NOR) */
-        sam9_smc_configure(0, &eb_nor_smc_config);
-        platform_device_register(&nor_flash);
-}
-/*
- * NAND flash
- */
-static struct mtd_partition __initdata eb_nand_partition[] = {
-        {
-                .name   = "Partition 1",
-                .offset = 0,
-                .size   = SZ_16M,
-        },
-        {
-                .name   = "Partition 2",
-                .offset = MTDPART_OFS_NXTBLK,
-                .size   = MTDPART_SIZ_FULL,
-        }
-};
-static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
-{
-        *num_partitions = ARRAY_SIZE(eb_nand_partition);
-        return eb_nand_partition;
-}
-static struct atmel_nand_data __initdata eb_nand_data = {
-        .ale            = 22,
-        .cle            = 21,
-/*      .det_pin        = ... not connected */
-/*      .rdy_pin        = AT91_PIN_PC16, */
-        .enable_pin     = AT91_PIN_PA15,
-        .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
-};
-static struct sam9_smc_config __initdata eb_nand_smc_config = {
-        .ncs_read_setup         = 0,
-        .nrd_setup              = 0,
-        .ncs_write_setup        = 1,
-        .nwe_setup              = 1,
-        .ncs_read_pulse         = 3,
-        .nrd_pulse              = 3,
-        .ncs_write_pulse        = 3,
-        .nwe_pulse              = 3,
-        .read_cycle             = 5,
-        .write_cycle            = 5,
-        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
-        .tdf_cycles             = 12,
-};
-static void __init eb_add_device_nand(void)
-{
-        /* setup bus-width (8 or 16) */
-        if (eb_nand_data.bus_width_16)
-                eb_nand_smc_config.mode |= AT91_SMC_DBW_16;
-        else
-                eb_nand_smc_config.mode |= AT91_SMC_DBW_8;
-        /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &eb_nand_smc_config);
-        at91_add_device_nand(&eb_nand_data);
-}
-/*
- * SPI devices
- */
-static struct resource rtc_resources[] = {
-        [0] = {
-                .start  = AT572D940HF_ID_IRQ1,
-                .end    = AT572D940HF_ID_IRQ1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct ds1305_platform_data ds1306_data = {
-        .is_ds1306      = true,
-        .en_1hz         = false,
-};
-static struct spi_board_info eb_spi_devices[] = {
-        {       /* RTC Dallas DS1306 */
-                .modalias       = "rtc-ds1305",
-                .chip_select    = 3,
-                .mode           = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA,
-                .max_speed_hz   = 500000,
-                .bus_num        = 0,
-                .irq            = AT572D940HF_ID_IRQ1,
-                .platform_data  = (void *) &ds1306_data,
-        },
-#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
-        {       /* Dataflash card */
-                .modalias       = "mtd_dataflash",
-                .chip_select    = 0,
-                .max_speed_hz   = 15 * 1000 * 1000,
-                .bus_num        = 0,
-        },
-#endif
-};
-static void __init eb_board_init(void)
-{
-        /* Serial */
-        at91_add_device_serial();
-        /* USB Host */
-        at91_add_device_usbh(&eb_usbh_data);
-        /* USB Device */
-        at91_add_device_udc(&eb_udc_data);
-        /* I2C */
-        at91_add_device_i2c(NULL, 0);
-        /* NOR */
-        eb_add_device_nor();
-        /* NAND */
-        eb_add_device_nand();
-        /* SPI */
-        at91_add_device_spi(eb_spi_devices, ARRAY_SIZE(eb_spi_devices));
-        /* MMC */
-        at91_add_device_mmc(0, &eb_mmc_data);
-        /* Ethernet */
-        at91_add_device_eth(&eb_eth_data);
-        /* mAgic */
-        at91_add_device_mAgic();
-}
-MACHINE_START(AT572D940HFEB, "Atmel AT91D940HF-EB")
-        /* Maintainer: Atmel <costa.antonior@gmail.com> */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
-        .timer          = &at91sam926x_timer,
-        .map_io         = eb_map_io,
-        .init_irq       = eb_init_irq,
-        .init_machine   = eb_board_init,
-MACHINE_END
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index b54e3e6fceb6..148fccb9a25a 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -45,7 +45,7 @@
 #include "generic.h"
-static void __init cam60_map_io(void)
+static void __init cam60_init_early(void)
 {
        /* Initialize processor: 10 MHz crystal */
        at91sam9260_initialize(10000000);
@@ -198,9 +198,9 @@ static void __init cam60_board_init(void)
 MACHINE_START(CAM60, "KwikByte CAM60")
        /* Maintainer: KwikByte */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = cam60_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = cam60_init_early,
        .init_irq       = cam60_init_irq,
        .init_machine   = cam60_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index e7274440ead9..1904fdf87613 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -44,12 +44,13 @@
 #include <mach/gpio.h>
 #include <mach/at91cap9_matrix.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/system_rev.h>
 #include "sam9_smc.h"
 #include "generic.h"
-static void __init cap9adk_map_io(void)
+static void __init cap9adk_init_early(void)
 {
        /* Initialize processor: 12 MHz crystal */
        at91cap9_initialize(12000000);
@@ -187,11 +188,6 @@ static struct atmel_nand_data __initdata cap9adk_nand_data = {
 //      .rdy_pin        = ... not connected
        .enable_pin     = AT91_PIN_PD15,
        .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 static struct sam9_smc_config __initdata cap9adk_nand_smc_config = {
@@ -219,6 +215,7 @@ static void __init cap9adk_add_device_nand(void)
        csa = at91_sys_read(AT91_MATRIX_EBICSA);
        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
+        cap9adk_nand_data.bus_width_16 = !board_have_nand_8bit();
        /* setup bus-width (8 or 16) */
        if (cap9adk_nand_data.bus_width_16)
                cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16;
@@ -399,9 +396,9 @@ static void __init cap9adk_board_init(void)
 MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK")
        /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = cap9adk_map_io,
+        .map_io         = at91cap9_map_io,
+        .init_early     = cap9adk_init_early,
        .init_irq       = cap9adk_init_irq,
        .init_machine   = cap9adk_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index 295e1e77fa60..f36b18687494 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -40,10 +40,10 @@
 #include "generic.h"
-static void __init carmeva_map_io(void)
+static void __init carmeva_init_early(void)
 {
        /* Initialize processor: 20.000 MHz crystal */
-        at91rm9200_initialize(20000000, AT91RM9200_BGA);
+        at91rm9200_initialize(20000000);
        /* DBGU on ttyS0. (Rx & Tx only) */
        at91_register_uart(0, 0, 0);
@@ -162,9 +162,9 @@ static void __init carmeva_board_init(void)
 MACHINE_START(CARMEVA, "Carmeva")
        /* Maintainer: Conitec Datasystems */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = carmeva_map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = carmeva_init_early,
        .init_irq       = carmeva_init_irq,
        .init_machine   = carmeva_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 3838594578f3..980511084fe4 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -47,7 +47,7 @@
 #include "sam9_smc.h"
 #include "generic.h"
-static void __init cpu9krea_map_io(void)
+static void __init cpu9krea_init_early(void)
 {
        /* Initialize processor: 18.432 MHz crystal */
        at91sam9260_initialize(18432000);
@@ -375,9 +375,9 @@ MACHINE_START(CPUAT9260, "Eukrea CPU9260")
 MACHINE_START(CPUAT9G20, "Eukrea CPU9G20")
 #endif
        /* Maintainer: Eric Benard - EUKREA Electromatique */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = cpu9krea_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = cpu9krea_init_early,
        .init_irq       = cpu9krea_init_irq,
        .init_machine   = cpu9krea_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index 2f4dd8cdd484..6daabe3907a1 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -38,6 +38,7 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
 #include <mach/at91rm9200_mc.h>
+#include <mach/cpu.h>
 #include "generic.h"
@@ -50,10 +51,13 @@ static struct gpio_led cpuat91_leds[] = {
        },
 };
-static void __init cpuat91_map_io(void)
+static void __init cpuat91_init_early(void)
 {
+        /* Set cpu type: PQFP */
+        at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
        /* Initialize processor: 18.432 MHz crystal */
-        at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+        at91rm9200_initialize(18432000);
        /* DBGU on ttyS0. (Rx & Tx only) */
        at91_register_uart(0, 0, 0);
@@ -175,9 +179,9 @@ static void __init cpuat91_board_init(void)
 MACHINE_START(CPUAT91, "Eukrea")
        /* Maintainer: Eric Benard - EUKREA Electromatique */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = cpuat91_map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = cpuat91_init_early,
        .init_irq       = cpuat91_init_irq,
        .init_machine   = cpuat91_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index 464839dc39bd..d98bcec1dfe0 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -43,10 +43,10 @@
 #include "generic.h"
-static void __init csb337_map_io(void)
+static void __init csb337_init_early(void)
 {
        /* Initialize processor: 3.6864 MHz crystal */
-        at91rm9200_initialize(3686400, AT91RM9200_BGA);
+        at91rm9200_initialize(3686400);
        /* Setup the LEDs */
        at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
@@ -257,9 +257,9 @@ static void __init csb337_board_init(void)
 MACHINE_START(CSB337, "Cogent CSB337")
        /* Maintainer: Bill Gatliff */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = csb337_map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = csb337_init_early,
        .init_irq       = csb337_init_irq,
        .init_machine   = csb337_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index 431688c61412..019aab4e20b0 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -40,10 +40,10 @@
 #include "generic.h"
-static void __init csb637_map_io(void)
+static void __init csb637_init_early(void)
 {
        /* Initialize processor: 3.6864 MHz crystal */
-        at91rm9200_initialize(3686400, AT91RM9200_BGA);
+        at91rm9200_initialize(3686400);
        /* DBGU on ttyS0. (Rx & Tx only) */
        at91_register_uart(0, 0, 0);
@@ -138,9 +138,9 @@ static void __init csb637_board_init(void)
 MACHINE_START(CSB637, "Cogent CSB637")
        /* Maintainer: Bill Gatliff */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = csb637_map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = csb637_init_early,
        .init_irq       = csb637_init_irq,
        .init_machine   = csb637_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-eb01.c b/arch/arm/mach-at91/board-eb01.c
index d8df59a3426d..d2023f27c652 100644
--- a/arch/arm/mach-at91/board-eb01.c
+++ b/arch/arm/mach-at91/board-eb01.c
@@ -35,7 +35,7 @@ static void __init at91eb01_init_irq(void)
        at91x40_init_interrupts(NULL);
 }
-static void __init at91eb01_map_io(void)
+static void __init at91eb01_init_early(void)
 {
        at91x40_initialize(40000000);
 }
@@ -43,7 +43,7 @@ static void __init at91eb01_map_io(void)
 MACHINE_START(AT91EB01, "Atmel AT91 EB01")
        /* Maintainer: Greg Ungerer <gerg@snapgear.com> */
        .timer          = &at91x40_timer,
+        .init_early     = at91eb01_init_early,
        .init_irq       = at91eb01_init_irq,
-        .map_io         = at91eb01_map_io,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index 6cf6566ae346..e9484535cbc8 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -40,10 +40,10 @@
 #include "generic.h"
-static void __init eb9200_map_io(void)
+static void __init eb9200_init_early(void)
 {
        /* Initialize processor: 18.432 MHz crystal */
-        at91rm9200_initialize(18432000, AT91RM9200_BGA);
+        at91rm9200_initialize(18432000);
        /* DBGU on ttyS0. (Rx & Tx only) */
        at91_register_uart(0, 0, 0);
@@ -120,9 +120,9 @@ static void __init eb9200_board_init(void)
 }
 MACHINE_START(ATEB9200, "Embest ATEB9200")
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = eb9200_map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = eb9200_init_early,
        .init_irq       = eb9200_init_irq,
        .init_machine   = eb9200_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index de2fd04e7c8a..a6f57faa10a7 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -38,14 +38,18 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/cpu.h>
 #include "generic.h"
-static void __init ecb_at91map_io(void)
+static void __init ecb_at91init_early(void)
 {
+        /* Set cpu type: PQFP */
+        at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
        /* Initialize processor: 18.432 MHz crystal */
-        at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+        at91rm9200_initialize(18432000);
        /* Setup the LEDs */
        at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7);
@@ -168,9 +172,9 @@ static void __init ecb_at91board_init(void)
 MACHINE_START(ECBAT91, "emQbit's ECB_AT91")
        /* Maintainer: emQbit.com */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = ecb_at91map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = ecb_at91init_early,
        .init_irq       = ecb_at91init_irq,
        .init_machine   = ecb_at91board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index a158a0ce458f..bfc0062d1483 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -26,11 +26,16 @@
 #include <mach/board.h>
 #include <mach/at91rm9200_mc.h>
+#include <mach/cpu.h>
 #include "generic.h"
-static void __init eco920_map_io(void)
+static void __init eco920_init_early(void)
 {
-        at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+        /* Set cpu type: PQFP */
+        at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
+        at91rm9200_initialize(18432000);
        /* Setup the LEDs */
        at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
@@ -86,21 +91,6 @@ static struct platform_device eco920_flash = {
        .num_resources  = 1,
 };
-static struct resource at91_beeper_resources[] = {
-        [0] = {
-                .start          = AT91RM9200_BASE_TC3,
-                .end            = AT91RM9200_BASE_TC3 + 0x39,
-                .flags          = IORESOURCE_MEM,
-        },
-};
-static struct platform_device at91_beeper = {
-        .name           = "at91_beeper",
-        .id             = 0,
-        .resource       = at91_beeper_resources,
-        .num_resources  = ARRAY_SIZE(at91_beeper_resources),
-};
 static struct spi_board_info eco920_spi_devices[] = {
        {       /* CAN controller */
                .modalias       = "tlv5638",
@@ -139,18 +129,14 @@ static void __init eco920_board_init(void)
                AT91_SMC_TDF_(1)        /* float time */
        );
-        at91_clock_associate("tc3_clk", &at91_beeper.dev, "at91_beeper");
-        at91_set_B_periph(AT91_PIN_PB6, 0);
-        platform_device_register(&at91_beeper);
        at91_add_device_spi(eco920_spi_devices, ARRAY_SIZE(eco920_spi_devices));
 }
 MACHINE_START(ECO920, "eco920")
        /* Maintainer: Sascha Hauer */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = eco920_map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = eco920_init_early,
        .init_irq       = eco920_init_irq,
        .init_machine   = eco920_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index c8a62dc8fa65..466c063b8d21 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -37,7 +37,7 @@
 #include "generic.h"
-static void __init flexibity_map_io(void)
+static void __init flexibity_init_early(void)
 {
        /* Initialize processor: 18.432 MHz crystal */
        at91sam9260_initialize(18432000);
@@ -154,9 +154,9 @@ static void __init flexibity_board_init(void)
 MACHINE_START(FLEXIBITY, "Flexibity Connect")
        /* Maintainer: Maxim Osipov */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = flexibity_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = flexibity_init_early,
        .init_irq       = flexibity_init_irq,
        .init_machine   = flexibity_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
index dfc7dfe738e4..e2d1dc9eff45 100644
--- a/arch/arm/mach-at91/board-foxg20.c
+++ b/arch/arm/mach-at91/board-foxg20.c
@@ -57,7 +57,7 @@
 */
-static void __init foxg20_map_io(void)
+static void __init foxg20_init_early(void)
 {
        /* Initialize processor: 18.432 MHz crystal */
        at91sam9260_initialize(18432000);
@@ -266,9 +266,9 @@ static void __init foxg20_board_init(void)
 MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20")
        /* Maintainer: Sergio Tanzilli */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = foxg20_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = foxg20_init_early,
        .init_irq       = foxg20_init_irq,
        .init_machine   = foxg20_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
index bc28136ee249..1d4f36b3cb27 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -38,9 +38,9 @@
 #include "sam9_smc.h"
 #include "generic.h"
-static void __init gsia18s_map_io(void)
+static void __init gsia18s_init_early(void)
 {
-        stamp9g20_map_io();
+        stamp9g20_init_early();
        /*
         * USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI).
@@ -576,9 +576,9 @@ static void __init gsia18s_board_init(void)
 }
 MACHINE_START(GSIA18S, "GS_IA18_S")
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = gsia18s_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = gsia18s_init_early,
        .init_irq       = init_irq,
        .init_machine   = gsia18s_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index d2e1f4ec1fcc..9b003ff744ba 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -35,14 +35,18 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/cpu.h>
 #include "generic.h"
-static void __init kafa_map_io(void)
+static void __init kafa_init_early(void)
 {
+        /* Set cpu type: PQFP */
+        at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
        /* Initialize processor: 18.432 MHz crystal */
-        at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+        at91rm9200_initialize(18432000);
        /* Set up the LEDs */
        at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
@@ -94,9 +98,9 @@ static void __init kafa_board_init(void)
 MACHINE_START(KAFA, "Sperry-Sun KAFA")
        /* Maintainer: Sergei Sharonov */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = kafa_map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = kafa_init_early,
        .init_irq       = kafa_init_irq,
        .init_machine   = kafa_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index a13d2063faff..a813a74b65f9 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -36,16 +36,19 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/cpu.h>
 #include <mach/at91rm9200_mc.h>
 #include "generic.h"
-static void __init kb9202_map_io(void)
+static void __init kb9202_init_early(void)
 {
+        /* Set cpu type: PQFP */
+        at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
        /* Initialize processor: 10 MHz crystal */
-        at91rm9200_initialize(10000000, AT91RM9200_PQFP);
+        at91rm9200_initialize(10000000);
        /* Set up the LEDs */
        at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
@@ -136,9 +139,9 @@ static void __init kb9202_board_init(void)
 MACHINE_START(KB9200, "KB920x")
        /* Maintainer: KwikByte, Inc. */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = kb9202_map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = kb9202_init_early,
        .init_irq       = kb9202_init_irq,
        .init_machine   = kb9202_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index fe5f1d47e6e2..961e805db68c 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -51,7 +51,7 @@
 #include "generic.h"
-static void __init neocore926_map_io(void)
+static void __init neocore926_init_early(void)
 {
        /* Initialize processor: 20 MHz crystal */
        at91sam9263_initialize(20000000);
@@ -387,9 +387,9 @@ static void __init neocore926_board_init(void)
 MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926")
        /* Maintainer: ADENEO */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = neocore926_map_io,
+        .map_io         = at91sam9263_map_io,
+        .init_early     = neocore926_init_early,
        .init_irq       = neocore926_init_irq,
        .init_machine   = neocore926_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index feb65787c30b..21a21af25878 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -37,9 +37,9 @@
 #include "generic.h"
-static void __init pcontrol_g20_map_io(void)
+static void __init pcontrol_g20_init_early(void)
 {
-        stamp9g20_map_io();
+        stamp9g20_init_early();
        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback  A2 */
        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS
@@ -222,9 +222,9 @@ static void __init pcontrol_g20_board_init(void)
 MACHINE_START(PCONTROL_G20, "PControl G20")
        /* Maintainer: pgsellmann@portner-elektronik.at */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = pcontrol_g20_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = pcontrol_g20_init_early,
        .init_irq       = init_irq,
        .init_machine   = pcontrol_g20_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index 55dad3a46547..756cc2a745dd 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -43,10 +43,10 @@
 #include "generic.h"
-static void __init picotux200_map_io(void)
+static void __init picotux200_init_early(void)
 {
        /* Initialize processor: 18.432 MHz crystal */
-        at91rm9200_initialize(18432000, AT91RM9200_BGA);
+        at91rm9200_initialize(18432000);
        /* DBGU on ttyS0. (Rx & Tx only) */
        at91_register_uart(0, 0, 0);
@@ -123,9 +123,9 @@ static void __init picotux200_board_init(void)
 MACHINE_START(PICOTUX2XX, "picotux 200")
        /* Maintainer: Kleinhenz Elektronik GmbH */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = picotux200_map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = picotux200_init_early,
        .init_irq       = picotux200_init_irq,
        .init_machine   = picotux200_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index 69d15a875b66..d1a6001b0bd8 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -48,7 +48,7 @@
 #include "generic.h"
-static void __init ek_map_io(void)
+static void __init ek_init_early(void)
 {
        /* Initialize processor: 12.000 MHz crystal */
        at91sam9260_initialize(12000000);
@@ -268,9 +268,9 @@ static void __init ek_board_init(void)
 MACHINE_START(QIL_A9260, "CALAO QIL_A9260")
        /* Maintainer: calao-systems */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = ek_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = ek_init_early,
        .init_irq       = ek_init_irq,
        .init_machine   = ek_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index 4c1047c8200d..aef9627710b0 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -45,10 +45,10 @@
 #include "generic.h"
-static void __init dk_map_io(void)
+static void __init dk_init_early(void)
 {
        /* Initialize processor: 18.432 MHz crystal */
-        at91rm9200_initialize(18432000, AT91RM9200_BGA);
+        at91rm9200_initialize(18432000);
        /* Setup the LEDs */
        at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
@@ -227,9 +227,9 @@ static void __init dk_board_init(void)
 MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
        /* Maintainer: SAN People/Atmel */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = dk_map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = dk_init_early,
        .init_irq       = dk_init_irq,
        .init_machine   = dk_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 9df1be8818c0..015a02183080 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -45,10 +45,10 @@
 #include "generic.h"
-static void __init ek_map_io(void)
+static void __init ek_init_early(void)
 {
        /* Initialize processor: 18.432 MHz crystal */
-        at91rm9200_initialize(18432000, AT91RM9200_BGA);
+        at91rm9200_initialize(18432000);
        /* Setup the LEDs */
        at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
@@ -193,9 +193,9 @@ static void __init ek_board_init(void)
 MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
        /* Maintainer: SAN People/Atmel */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = ek_map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = ek_init_early,
        .init_irq       = ek_init_irq,
        .init_machine   = ek_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index 25a26beaa728..aaf1bf0989b3 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -44,7 +44,7 @@
 #include "generic.h"
-static void __init ek_map_io(void)
+static void __init ek_init_early(void)
 {
        /* Initialize processor: 18.432 MHz crystal */
        at91sam9260_initialize(18432000);
@@ -212,9 +212,9 @@ static void __init ek_board_init(void)
 MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")
        /* Maintainer: Olimex */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = ek_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = ek_init_early,
        .init_irq       = ek_init_irq,
        .init_machine   = ek_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index de1816e0e1d9..d600dc123227 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -44,12 +44,13 @@
 #include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
+#include <mach/system_rev.h>
 #include "sam9_smc.h"
 #include "generic.h"
-static void __init ek_map_io(void)
+static void __init ek_init_early(void)
 {
        /* Initialize processor: 18.432 MHz crystal */
        at91sam9260_initialize(18432000);
@@ -191,11 +192,6 @@ static struct atmel_nand_data __initdata ek_nand_data = {
        .rdy_pin        = AT91_PIN_PC13,
        .enable_pin     = AT91_PIN_PC14,
        .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 static struct sam9_smc_config __initdata ek_nand_smc_config = {
@@ -218,6 +214,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
 static void __init ek_add_device_nand(void)
 {
+        ek_nand_data.bus_width_16 = !board_have_nand_8bit();
        /* setup bus-width (8 or 16) */
        if (ek_nand_data.bus_width_16)
                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
@@ -356,9 +353,9 @@ static void __init ek_board_init(void)
 MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
        /* Maintainer: Atmel */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = ek_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = ek_init_early,
        .init_irq       = ek_init_irq,
        .init_machine   = ek_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 14acc901e24c..f897f84d43dc 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -48,12 +48,13 @@
 #include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
+#include <mach/system_rev.h>
 #include "sam9_smc.h"
 #include "generic.h"
-static void __init ek_map_io(void)
+static void __init ek_init_early(void)
 {
        /* Initialize processor: 18.432 MHz crystal */
        at91sam9261_initialize(18432000);
@@ -197,11 +198,6 @@ static struct atmel_nand_data __initdata ek_nand_data = {
        .rdy_pin        = AT91_PIN_PC15,
        .enable_pin     = AT91_PIN_PC14,
        .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 static struct sam9_smc_config __initdata ek_nand_smc_config = {
@@ -224,6 +220,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
 static void __init ek_add_device_nand(void)
 {
+        ek_nand_data.bus_width_16 = !board_have_nand_8bit();
        /* setup bus-width (8 or 16) */
        if (ek_nand_data.bus_width_16)
                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
@@ -623,9 +620,9 @@ MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
 MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")
 #endif
        /* Maintainer: Atmel */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = ek_map_io,
+        .map_io         = at91sam9261_map_io,
+        .init_early     = ek_init_early,
        .init_irq       = ek_init_irq,
        .init_machine   = ek_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index bfe490df58be..605b26f40a4c 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -47,12 +47,13 @@
 #include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
+#include <mach/system_rev.h>
 #include "sam9_smc.h"
 #include "generic.h"
-static void __init ek_map_io(void)
+static void __init ek_init_early(void)
 {
        /* Initialize processor: 16.367 MHz crystal */
        at91sam9263_initialize(16367660);
@@ -198,11 +199,6 @@ static struct atmel_nand_data __initdata ek_nand_data = {
        .rdy_pin        = AT91_PIN_PA22,
        .enable_pin     = AT91_PIN_PD15,
        .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 static struct sam9_smc_config __initdata ek_nand_smc_config = {
@@ -225,6 +221,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
 static void __init ek_add_device_nand(void)
 {
+        ek_nand_data.bus_width_16 = !board_have_nand_8bit();
        /* setup bus-width (8 or 16) */
        if (ek_nand_data.bus_width_16)
                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
@@ -454,9 +451,9 @@ static void __init ek_board_init(void)
 MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
        /* Maintainer: Atmel */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = ek_map_io,
+        .map_io         = at91sam9263_map_io,
+        .init_early     = ek_init_early,
        .init_irq       = ek_init_irq,
        .init_machine   = ek_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index ca8198b3c168..7624cf0d006b 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -43,6 +43,7 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/system_rev.h>
 #include "sam9_smc.h"
 #include "generic.h"
@@ -60,7 +61,7 @@ static int inline ek_have_2mmc(void)
 }
-static void __init ek_map_io(void)
+static void __init ek_init_early(void)
 {
        /* Initialize processor: 18.432 MHz crystal */
        at91sam9260_initialize(18432000);
@@ -175,11 +176,6 @@ static struct atmel_nand_data __initdata ek_nand_data = {
        .rdy_pin        = AT91_PIN_PC13,
        .enable_pin     = AT91_PIN_PC14,
        .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 static struct sam9_smc_config __initdata ek_nand_smc_config = {
@@ -202,6 +198,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
 static void __init ek_add_device_nand(void)
 {
+        ek_nand_data.bus_width_16 = !board_have_nand_8bit();
        /* setup bus-width (8 or 16) */
        if (ek_nand_data.bus_width_16)
                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
@@ -406,18 +403,18 @@ static void __init ek_board_init(void)
 MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK")
        /* Maintainer: Atmel */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = ek_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = ek_init_early,
        .init_irq       = ek_init_irq,
        .init_machine   = ek_board_init,
 MACHINE_END
 MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod")
        /* Maintainer: Atmel */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = ek_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = ek_init_early,
        .init_irq       = ek_init_irq,
        .init_machine   = ek_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 6c999dbd2bcf..063c95d0e8f0 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -41,12 +41,13 @@
 #include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
+#include <mach/system_rev.h>
 #include "sam9_smc.h"
 #include "generic.h"
-static void __init ek_map_io(void)
+static void __init ek_init_early(void)
 {
        /* Initialize processor: 12.000 MHz crystal */
        at91sam9g45_initialize(12000000);
@@ -155,11 +156,6 @@ static struct atmel_nand_data __initdata ek_nand_data = {
        .rdy_pin        = AT91_PIN_PC8,
        .enable_pin     = AT91_PIN_PC14,
        .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 static struct sam9_smc_config __initdata ek_nand_smc_config = {
@@ -182,6 +178,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
 static void __init ek_add_device_nand(void)
 {
+        ek_nand_data.bus_width_16 = !board_have_nand_8bit();
        /* setup bus-width (8 or 16) */
        if (ek_nand_data.bus_width_16)
                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
@@ -424,9 +421,9 @@ static void __init ek_board_init(void)
 MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
        /* Maintainer: Atmel */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = ek_map_io,
+        .map_io         = at91sam9g45_map_io,
+        .init_early     = ek_init_early,
        .init_irq       = ek_init_irq,
        .init_machine   = ek_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index 3bf3408e94c1..effb399a80a6 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -38,7 +38,7 @@
 #include "generic.h"
-static void __init ek_map_io(void)
+static void __init ek_init_early(void)
 {
        /* Initialize processor: 12.000 MHz crystal */
        at91sam9rl_initialize(12000000);
@@ -329,9 +329,9 @@ static void __init ek_board_init(void)
 MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
        /* Maintainer: Atmel */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = ek_map_io,
+        .map_io         = at91sam9rl_map_io,
+        .init_early     = ek_init_early,
        .init_irq       = ek_init_irq,
        .init_machine   = ek_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index 17f7d9b32142..3eb0a1153cc8 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -40,7 +40,7 @@
 #define SNAPPER9260_IO_EXP_GPIO(x)      (NR_BUILTIN_GPIO + (x))
-static void __init snapper9260_map_io(void)
+static void __init snapper9260_init_early(void)
 {
        at91sam9260_initialize(18432000);
@@ -178,9 +178,9 @@ static void __init snapper9260_board_init(void)
 }
 MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module")
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = snapper9260_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = snapper9260_init_early,
        .init_irq       = snapper9260_init_irq,
        .init_machine   = snapper9260_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index f8902b118960..5e5c85688f5f 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -32,7 +32,7 @@
 #include "generic.h"
-void __init stamp9g20_map_io(void)
+void __init stamp9g20_init_early(void)
 {
        /* Initialize processor: 18.432 MHz crystal */
        at91sam9260_initialize(18432000);
@@ -44,9 +44,9 @@ void __init stamp9g20_map_io(void)
        at91_set_serial_console(0);
 }
-static void __init stamp9g20evb_map_io(void)
+static void __init stamp9g20evb_init_early(void)
 {
-        stamp9g20_map_io();
+        stamp9g20_init_early();
        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
@@ -54,9 +54,9 @@ static void __init stamp9g20evb_map_io(void)
                                                | ATMEL_UART_DCD | ATMEL_UART_RI);
 }
-static void __init portuxg20_map_io(void)
+static void __init portuxg20_init_early(void)
 {
-        stamp9g20_map_io();
+        stamp9g20_init_early();
        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
@@ -298,18 +298,18 @@ static void __init stamp9g20evb_board_init(void)
 MACHINE_START(PORTUXG20, "taskit PortuxG20")
        /* Maintainer: taskit GmbH */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = portuxg20_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = portuxg20_init_early,
        .init_irq       = init_irq,
        .init_machine   = portuxg20_board_init,
 MACHINE_END
 MACHINE_START(STAMP9G20, "taskit Stamp9G20")
        /* Maintainer: taskit GmbH */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = stamp9g20evb_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = stamp9g20evb_init_early,
        .init_irq       = init_irq,
        .init_machine   = stamp9g20evb_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
index 07784baeae84..0e784e6fedec 100644
--- a/arch/arm/mach-at91/board-usb-a9260.c
+++ b/arch/arm/mach-at91/board-usb-a9260.c
@@ -48,7 +48,7 @@
 #include "generic.h"
-static void __init ek_map_io(void)
+static void __init ek_init_early(void)
 {
        /* Initialize processor: 12.000 MHz crystal */
        at91sam9260_initialize(12000000);
@@ -228,9 +228,9 @@ static void __init ek_board_init(void)
 MACHINE_START(USB_A9260, "CALAO USB_A9260")
        /* Maintainer: calao-systems */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = ek_map_io,
+        .map_io         = at91sam9260_map_io,
+        .init_early     = ek_init_early,
        .init_irq       = ek_init_irq,
        .init_machine   = ek_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
index b614508931fd..cf626dd14b2c 100644
--- a/arch/arm/mach-at91/board-usb-a9263.c
+++ b/arch/arm/mach-at91/board-usb-a9263.c
@@ -47,7 +47,7 @@
 #include "generic.h"
-static void __init ek_map_io(void)
+static void __init ek_init_early(void)
 {
        /* Initialize processor: 12.00 MHz crystal */
        at91sam9263_initialize(12000000);
@@ -244,9 +244,9 @@ static void __init ek_board_init(void)
 MACHINE_START(USB_A9263, "CALAO USB_A9263")
        /* Maintainer: calao-systems */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91sam926x_timer,
-        .map_io         = ek_map_io,
+        .map_io         = at91sam9263_map_io,
+        .init_early     = ek_init_early,
        .init_irq       = ek_init_irq,
        .init_machine   = ek_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index e0f0080eb639..c208cc334d7d 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -45,14 +45,18 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
 #include <mach/at91rm9200_mc.h>
+#include <mach/cpu.h>
 #include "generic.h"
-static void __init yl9200_map_io(void)
+static void __init yl9200_init_early(void)
 {
+        /* Set cpu type: PQFP */
+        at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
        /* Initialize processor: 18.432 MHz crystal */
-        at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+        at91rm9200_initialize(18432000);
        /* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */
        at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17);
@@ -594,9 +598,9 @@ static void __init yl9200_board_init(void)
 MACHINE_START(YL9200, "uCdragon YL-9200")
        /* Maintainer: S.Birtles */
-        .boot_params    = AT91_SDRAM_BASE + 0x100,
        .timer          = &at91rm9200_timer,
-        .map_io         = yl9200_map_io,
+        .map_io         = at91rm9200_map_io,
+        .init_early     = yl9200_init_early,
        .init_irq       = yl9200_init_irq,
        .init_machine   = yl9200_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 9113da6845f1..61873f3aa92d 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -163,7 +163,7 @@ static struct clk udpck = {
        .parent         = &pllb,
        .mode           = pmc_sys_mode,
 };
-static struct clk utmi_clk = {
+struct clk utmi_clk = {
        .name           = "utmi_clk",
        .parent         = &main_clk,
        .pmc_mask       = AT91_PMC_UPLLEN,      /* in CKGR_UCKR */
@@ -182,7 +182,7 @@ static struct clk uhpck = {
 * memory, interfaces to on-chip peripherals, the AIC, and sometimes more
 * (e.g baud rate generation).  It's sourced from one of the primary clocks.
 */
-static struct clk mck = {
+struct clk mck = {
        .name           = "mck",
        .pmc_mask       = AT91_PMC_MCKRDY,      /* in PMC_SR */
 };
@@ -215,43 +215,6 @@ static struct clk __init *at91_css_to_clk(unsigned long css)
        return NULL;
 }
-/*
- * Associate a particular clock with a function (eg, "uart") and device.
- * The drivers can then request the same 'function' with several different
- * devices and not care about which clock name to use.
- */
-void __init at91_clock_associate(const char *id, struct device *dev, const char *func)
-{
-        struct clk *clk = clk_get(NULL, id);
-        if (!dev || !clk || !IS_ERR(clk_get(dev, func)))
-                return;
-        clk->function = func;
-        clk->dev = dev;
-}
-/* clocks cannot be de-registered no refcounting necessary */
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *clk;
-        list_for_each_entry(clk, &clocks, node) {
-                if (strcmp(id, clk->name) == 0)
-                        return clk;
-                if (clk->function && (dev == clk->dev) && strcmp(id, clk->function) == 0)
-                        return clk;
-        }
-        return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
 static void __clk_enable(struct clk *clk)
 {
        if (clk->parent)
@@ -498,32 +461,38 @@ postcore_initcall(at91_clk_debugfs_init);
 /*------------------------------------------------------------------------*/
 /* Register a new clock */
+static void __init at91_clk_add(struct clk *clk)
+{
+        list_add_tail(&clk->node, &clocks);
+        clk->cl.con_id = clk->name;
+        clk->cl.clk = clk;
+        clkdev_add(&clk->cl);
+}
 int __init clk_register(struct clk *clk)
 {
        if (clk_is_peripheral(clk)) {
                if (!clk->parent)
                        clk->parent = &mck;
                clk->mode = pmc_periph_mode;
-                list_add_tail(&clk->node, &clocks);
        }
        else if (clk_is_sys(clk)) {
                clk->parent = &mck;
                clk->mode = pmc_sys_mode;
-                list_add_tail(&clk->node, &clocks);
        }
 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
        else if (clk_is_programmable(clk)) {
                clk->mode = pmc_sys_mode;
                init_programmable_clock(clk);
-                list_add_tail(&clk->node, &clocks);
        }
 #endif
+        at91_clk_add(clk);
        return 0;
 }
 /*------------------------------------------------------------------------*/
 static u32 __init at91_pll_rate(struct clk *pll, u32 freq, u32 reg)
@@ -630,7 +599,7 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock)
                at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
        } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() ||
                   cpu_is_at91sam9263() || cpu_is_at91sam9g20() ||
-                   cpu_is_at91sam9g10() || cpu_is_at572d940hf()) {
+                   cpu_is_at91sam9g10()) {
                uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
                udpck.pmc_mask = AT91SAM926x_PMC_UDP;
        } else if (cpu_is_at91cap9()) {
@@ -754,19 +723,19 @@ int __init at91_clock_init(unsigned long main_clock)
        /* Register the PMC's standard clocks */
        for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
-                list_add_tail(&standard_pmc_clocks[i]->node, &clocks);
+                at91_clk_add(standard_pmc_clocks[i]);
        if (cpu_has_pllb())
-                list_add_tail(&pllb.node, &clocks);
+                at91_clk_add(&pllb);
        if (cpu_has_uhp())
-                list_add_tail(&uhpck.node, &clocks);
+                at91_clk_add(&uhpck);
        if (cpu_has_udpfs())
-                list_add_tail(&udpck.node, &clocks);
+                at91_clk_add(&udpck);
        if (cpu_has_utmi())
-                list_add_tail(&utmi_clk.node, &clocks);
+                at91_clk_add(&utmi_clk);
        /* MCK and CPU clock are "always on" */
        clk_enable(&mck);
diff --git a/arch/arm/mach-at91/clock.h b/arch/arm/mach-at91/clock.h
index 6cf4b78e175d..c2e63e47dcbe 100644
--- a/arch/arm/mach-at91/clock.h
+++ b/arch/arm/mach-at91/clock.h
@@ -6,6 +6,8 @@
 * published by the Free Software Foundation.
 */
+#include <linux/clkdev.h>
 #define CLK_TYPE_PRIMARY        0x1
 #define CLK_TYPE_PLL            0x2
 #define CLK_TYPE_PROGRAMMABLE   0x4
@@ -16,8 +18,7 @@
 struct clk {
        struct list_head node;
        const char      *name;          /* unique clock name */
-        const char      *function;      /* function of the clock */
+        struct clk_lookup cl;
-        struct device   *dev;           /* device associated with function */
        unsigned long   rate_hz;
        struct clk      *parent;
        u32             pmc_mask;
@@ -29,3 +30,18 @@ struct clk {
 extern int __init clk_register(struct clk *clk);
+extern struct clk mck;
+extern struct clk utmi_clk;
+#define CLKDEV_CON_ID(_id, _clk)                        \
+        {                                               \
+                .con_id = _id,                          \
+                .clk = _clk,                            \
+        }
+#define CLKDEV_CON_DEV_ID(_con_id, _dev_id, _clk)       \
+        {                                               \
+                .con_id = _con_id,                      \
+                .dev_id = _dev_id,                      \
+                .clk = _clk,                            \
+        }
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 0c66deb2db39..8ff3418f3430 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -8,8 +8,21 @@
 * published by the Free Software Foundation.
 */
+#include <linux/clkdev.h>
+ /* Map io */
+extern void __init at91rm9200_map_io(void);
+extern void __init at91sam9260_map_io(void);
+extern void __init at91sam9261_map_io(void);
+extern void __init at91sam9263_map_io(void);
+extern void __init at91sam9rl_map_io(void);
+extern void __init at91sam9g45_map_io(void);
+extern void __init at91x40_map_io(void);
+extern void __init at91cap9_map_io(void);
 /* Processors */
-extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
+extern void __init at91rm9200_set_type(int type);
+extern void __init at91rm9200_initialize(unsigned long main_clock);
 extern void __init at91sam9260_initialize(unsigned long main_clock);
 extern void __init at91sam9261_initialize(unsigned long main_clock);
 extern void __init at91sam9263_initialize(unsigned long main_clock);
@@ -17,7 +30,6 @@ extern void __init at91sam9rl_initialize(unsigned long main_clock);
 extern void __init at91sam9g45_initialize(unsigned long main_clock);
 extern void __init at91x40_initialize(unsigned long main_clock);
 extern void __init at91cap9_initialize(unsigned long main_clock);
-extern void __init at572d940hf_initialize(unsigned long main_clock);
 /* Interrupts */
 extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
@@ -28,7 +40,6 @@ extern void __init at91sam9rl_init_interrupts(unsigned int priority[]);
 extern void __init at91sam9g45_init_interrupts(unsigned int priority[]);
 extern void __init at91x40_init_interrupts(unsigned int priority[]);
 extern void __init at91cap9_init_interrupts(unsigned int priority[]);
-extern void __init at572d940hf_init_interrupts(unsigned int priority[]);
 extern void __init at91_aic_init(unsigned int priority[]);
 /* Timer */
@@ -39,8 +50,19 @@ extern struct sys_timer at91x40_timer;
 /* Clocks */
 extern int __init at91_clock_init(unsigned long main_clock);
+/*
+ * function to specify the clock of the default console. As we do not
+ * use the device/driver bus, the dev_name is not intialize. So we need
+ * to link the clock to a specific con_id only "usart"
+ */
+extern void __init at91rm9200_set_console_clock(int id);
+extern void __init at91sam9260_set_console_clock(int id);
+extern void __init at91sam9261_set_console_clock(int id);
+extern void __init at91sam9263_set_console_clock(int id);
+extern void __init at91sam9rl_set_console_clock(int id);
+extern void __init at91sam9g45_set_console_clock(int id);
+extern void __init at91cap9_set_console_clock(int id);
 struct device;
-extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func);
 /* Power Management */
 extern void at91_irq_suspend(void);
diff --git a/arch/arm/mach-at91/include/mach/at572d940hf.h b/arch/arm/mach-at91/include/mach/at572d940hf.h
deleted file mode 100644
index be510cfc56be..000000000000
--- a/arch/arm/mach-at91/include/mach/at572d940hf.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * include/mach/at572d940hf.h
- *
- * Antonio R. Costa <costa.antonior@gmail.com>
- * Copyright (C) 2008 Atmel
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- */
-#ifndef AT572D940HF_H
-#define AT572D940HF_H
-/*
- * Peripheral identifiers/interrupts.
- */
-#define AT91_ID_FIQ             0       /* Advanced Interrupt Controller (FIQ) */
-#define AT91_ID_SYS             1       /* System Peripherals */
-#define AT572D940HF_ID_PIOA     2       /* Parallel IO Controller A */
-#define AT572D940HF_ID_PIOB     3       /* Parallel IO Controller B */
-#define AT572D940HF_ID_PIOC     4       /* Parallel IO Controller C */
-#define AT572D940HF_ID_EMAC     5       /* MACB ethernet controller */
-#define AT572D940HF_ID_US0      6       /* USART 0 */
-#define AT572D940HF_ID_US1      7       /* USART 1 */
-#define AT572D940HF_ID_US2      8       /* USART 2 */
-#define AT572D940HF_ID_MCI      9       /* Multimedia Card Interface */
-#define AT572D940HF_ID_UDP      10      /* USB Device Port */
-#define AT572D940HF_ID_TWI0     11      /* Two-Wire Interface 0 */
-#define AT572D940HF_ID_SPI0     12      /* Serial Peripheral Interface 0 */
-#define AT572D940HF_ID_SPI1     13      /* Serial Peripheral Interface 1 */
-#define AT572D940HF_ID_SSC0     14      /* Serial Synchronous Controller 0 */
-#define AT572D940HF_ID_SSC1     15      /* Serial Synchronous Controller 1 */
-#define AT572D940HF_ID_SSC2     16      /* Serial Synchronous Controller 2 */
-#define AT572D940HF_ID_TC0      17      /* Timer Counter 0 */
-#define AT572D940HF_ID_TC1      18      /* Timer Counter 1 */
-#define AT572D940HF_ID_TC2      19      /* Timer Counter 2 */
-#define AT572D940HF_ID_UHP      20      /* USB Host port */
-#define AT572D940HF_ID_SSC3     21      /* Serial Synchronous Controller 3 */
-#define AT572D940HF_ID_TWI1     22      /* Two-Wire Interface 1 */
-#define AT572D940HF_ID_CAN0     23      /* CAN Controller 0 */
-#define AT572D940HF_ID_CAN1     24      /* CAN Controller 1 */
-#define AT572D940HF_ID_MHALT    25      /* mAgicV HALT line */
-#define AT572D940HF_ID_MSIRQ0   26      /* mAgicV SIRQ0 line */
-#define AT572D940HF_ID_MEXC     27      /* mAgicV exception line */
-#define AT572D940HF_ID_MEDMA    28      /* mAgicV end of DMA line */
-#define AT572D940HF_ID_IRQ0     29      /* External Interrupt Source (IRQ0) */
-#define AT572D940HF_ID_IRQ1     30      /* External Interrupt Source (IRQ1) */
-#define AT572D940HF_ID_IRQ2     31      /* External Interrupt Source (IRQ2) */
-/*
- * User Peripheral physical base addresses.
- */
-#define AT572D940HF_BASE_TCB    0xfffa0000
-#define AT572D940HF_BASE_TC0    0xfffa0000
-#define AT572D940HF_BASE_TC1    0xfffa0040
-#define AT572D940HF_BASE_TC2    0xfffa0080
-#define AT572D940HF_BASE_UDP    0xfffa4000
-#define AT572D940HF_BASE_MCI    0xfffa8000
-#define AT572D940HF_BASE_TWI0   0xfffac000
-#define AT572D940HF_BASE_US0    0xfffb0000
-#define AT572D940HF_BASE_US1    0xfffb4000
-#define AT572D940HF_BASE_US2    0xfffb8000
-#define AT572D940HF_BASE_SSC0   0xfffbc000
-#define AT572D940HF_BASE_SSC1   0xfffc0000
-#define AT572D940HF_BASE_SSC2   0xfffc4000
-#define AT572D940HF_BASE_SPI0   0xfffc8000
-#define AT572D940HF_BASE_SPI1   0xfffcc000
-#define AT572D940HF_BASE_SSC3   0xfffd0000
-#define AT572D940HF_BASE_TWI1   0xfffd4000
-#define AT572D940HF_BASE_EMAC   0xfffd8000
-#define AT572D940HF_BASE_CAN0   0xfffdc000
-#define AT572D940HF_BASE_CAN1   0xfffe0000
-#define AT91_BASE_SYS           0xffffea00
-/*
- * System Peripherals (offset from AT91_BASE_SYS)
- */
-#define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
-#define AT91_SMC        (0xffffec00 - AT91_BASE_SYS)
-#define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
-#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
-#define AT91_DBGU       (0xfffff200 - AT91_BASE_SYS)
-#define AT91_PIOA       (0xfffff400 - AT91_BASE_SYS)
-#define AT91_PIOB       (0xfffff600 - AT91_BASE_SYS)
-#define AT91_PIOC       (0xfffff800 - AT91_BASE_SYS)
-#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_RTT        (0xfffffd20 - AT91_BASE_SYS)
-#define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
-#define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
-#define AT91_USART0     AT572D940HF_ID_US0
-#define AT91_USART1     AT572D940HF_ID_US1
-#define AT91_USART2     AT572D940HF_ID_US2
-/*
- * Internal Memory.
- */
-#define AT572D940HF_SRAM_BASE   0x00300000      /* Internal SRAM base address */
-#define AT572D940HF_SRAM_SIZE   (48 * SZ_1K)    /* Internal SRAM size (48Kb) */
-#define AT572D940HF_ROM_BASE    0x00400000      /* Internal ROM base address */
-#define AT572D940HF_ROM_SIZE    SZ_32K          /* Internal ROM size (32Kb) */
-#define AT572D940HF_UHP_BASE    0x00500000      /* USB Host controller */
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at572d940hf_matrix.h b/arch/arm/mach-at91/include/mach/at572d940hf_matrix.h
deleted file mode 100644
index b6751df09488..000000000000
--- a/arch/arm/mach-at91/include/mach/at572d940hf_matrix.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * include/mach//at572d940hf_matrix.h
- *
- * Antonio R. Costa <costa.antonior@gmail.com>
- * Copyright (C) 2008 Atmel
- *
- * Copyright (C) 2005 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef AT572D940HF_MATRIX_H
-#define AT572D940HF_MATRIX_H
-#define AT91_MATRIX_MCFG0       (AT91_MATRIX + 0x00)    /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1       (AT91_MATRIX + 0x04)    /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
-#define         AT91_MATRIX_ULBT        (7 << 0)        /* Undefined Length Burst Type */
-#define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
-#define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
-#define                 AT91_MATRIX_ULBT_FOUR           (2 << 0)
-#define                 AT91_MATRIX_ULBT_EIGHT          (3 << 0)
-#define                 AT91_MATRIX_ULBT_SIXTEEN        (4 << 0)
-#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x40)    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x44)    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x48)    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x4C)    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x50)    /* Slave Configuration Register 4 */
-#define         AT91_MATRIX_SLOT_CYCLE          (0xff << 0)     /* Maximum Number of Allowed Cycles for a Burst */
-#define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
-#define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
-#define                 AT91_MATRIX_DEFMSTR_TYPE_LAST   (1 << 16)
-#define                 AT91_MATRIX_DEFMSTR_TYPE_FIXED  (2 << 16)
-#define         AT91_MATRIX_FIXED_DEFMSTR       (0x7  << 18)    /* Fixed Index of Default Master */
-#define         AT91_MATRIX_ARBT                (3    << 24)    /* Arbitration Type */
-#define                 AT91_MATRIX_ARBT_ROUND_ROBIN    (0 << 24)
-#define                 AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-#define AT91_MATRIX_PRAS0       (AT91_MATRIX + 0x80)    /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRAS1       (AT91_MATRIX + 0x88)    /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRAS2       (AT91_MATRIX + 0x90)    /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRAS3       (AT91_MATRIX + 0x98)    /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRAS4       (AT91_MATRIX + 0xA0)    /* Priority Register A for Slave 4 */
-#define         AT91_MATRIX_M0PR                (3 << 0)        /* Master 0 Priority */
-#define         AT91_MATRIX_M1PR                (3 << 4)        /* Master 1 Priority */
-#define         AT91_MATRIX_M2PR                (3 << 8)        /* Master 2 Priority */
-#define         AT91_MATRIX_M3PR                (3 << 12)       /* Master 3 Priority */
-#define         AT91_MATRIX_M4PR                (3 << 16)       /* Master 4 Priority */
-#define         AT91_MATRIX_M5PR                (3 << 20)       /* Master 5 Priority */
-#define         AT91_MATRIX_M6PR                (3 << 24)       /* Master 6 Priority */
-#define AT91_MATRIX_MRCR        (AT91_MATRIX + 0x100)   /* Master Remap Control Register */
-#define         AT91_MATRIX_RCB0                (1 << 0)        /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-#define AT91_MATRIX_SFR0        (AT91_MATRIX + 0x110)   /* Special Function Register 0 */
-#define AT91_MATRIX_SFR1        (AT91_MATRIX + 0x114)   /* Special Function Register 1 */
-#define AT91_MATRIX_SFR2        (AT91_MATRIX + 0x118)   /* Special Function Register 2 */
-#define AT91_MATRIX_SFR3        (AT91_MATRIX + 0x11C)   /* Special Function Register 3 */
-#define AT91_MATRIX_SFR4        (AT91_MATRIX + 0x120)   /* Special Function Register 4 */
-#define AT91_MATRIX_SFR5        (AT91_MATRIX + 0x124)   /* Special Function Register 5 */
-#define AT91_MATRIX_SFR6        (AT91_MATRIX + 0x128)   /* Special Function Register 6 */
-#define AT91_MATRIX_SFR7        (AT91_MATRIX + 0x12C)   /* Special Function Register 7 */
-#define AT91_MATRIX_SFR8        (AT91_MATRIX + 0x130)   /* Special Function Register 8 */
-#define AT91_MATRIX_SFR9        (AT91_MATRIX + 0x134)   /* Special Function Register 9 */
-#define AT91_MATRIX_SFR10       (AT91_MATRIX + 0x138)   /* Special Function Register 10 */
-#define AT91_MATRIX_SFR11       (AT91_MATRIX + 0x13C)   /* Special Function Register 11 */
-#define AT91_MATRIX_SFR12       (AT91_MATRIX + 0x140)   /* Special Function Register 12 */
-#define AT91_MATRIX_SFR13       (AT91_MATRIX + 0x144)   /* Special Function Register 13 */
-#define AT91_MATRIX_SFR14       (AT91_MATRIX + 0x148)   /* Special Function Register 14 */
-#define AT91_MATRIX_SFR15       (AT91_MATRIX + 0x14C)   /* Special Function Register 15 */
-/*
- * The following registers / bits are not defined in the Datasheet (Revision A)
- */
-#define AT91_MATRIX_TCR         (AT91_MATRIX + 0x100)   /* TCM Configuration Register */
-#define         AT91_MATRIX_ITCM_SIZE           (0xf << 0)      /* Size of ITCM enabled memory block */
-#define                 AT91_MATRIX_ITCM_0              (0 << 0)
-#define                 AT91_MATRIX_ITCM_16             (5 << 0)
-#define                 AT91_MATRIX_ITCM_32             (6 << 0)
-#define                 AT91_MATRIX_ITCM_64             (7 << 0)
-#define         AT91_MATRIX_DTCM_SIZE           (0xf << 4)      /* Size of DTCM enabled memory block */
-#define                 AT91_MATRIX_DTCM_0              (0 << 4)
-#define                 AT91_MATRIX_DTCM_16             (5 << 4)
-#define                 AT91_MATRIX_DTCM_32             (6 << 4)
-#define                 AT91_MATRIX_DTCM_64             (7 << 4)
-#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x11C)   /* EBI Chip Select Assignment Register */
-#define         AT91_MATRIX_CS1A                (1 << 1)        /* Chip Select 1 Assignment */
-#define                 AT91_MATRIX_CS1A_SMC            (0 << 1)
-#define                 AT91_MATRIX_CS1A_SDRAMC         (1 << 1)
-#define         AT91_MATRIX_CS3A                (1 << 3)        /* Chip Select 3 Assignment */
-#define                 AT91_MATRIX_CS3A_SMC            (0 << 3)
-#define                 AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
-#define         AT91_MATRIX_CS4A                (1 << 4)        /* Chip Select 4 Assignment */
-#define                 AT91_MATRIX_CS4A_SMC            (0 << 4)
-#define                 AT91_MATRIX_CS4A_SMC_CF1        (1 << 4)
-#define         AT91_MATRIX_CS5A                (1 << 5)        /* Chip Select 5 Assignment */
-#define                 AT91_MATRIX_CS5A_SMC            (0 << 5)
-#define                 AT91_MATRIX_CS5A_SMC_CF2        (1 << 5)
-#define         AT91_MATRIX_DBPUC               (1 << 8)        /* Data Bus Pull-up Configuration */
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index 9c6af9737485..665993849a7b 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -20,8 +20,6 @@
 /*
 * Peripheral identifiers/interrupts.
 */
-#define AT91_ID_FIQ             0       /* Advanced Interrupt Controller (FIQ) */
-#define AT91_ID_SYS             1       /* System Peripherals */
 #define AT91CAP9_ID_PIOABCD     2       /* Parallel IO Controller A, B, C and D */
 #define AT91CAP9_ID_MPB0        3       /* MP Block Peripheral 0 */
 #define AT91CAP9_ID_MPB1        4       /* MP Block Peripheral 1 */
@@ -123,6 +121,4 @@
 #define AT91CAP9_UDPHS_FIFO     0x00600000      /* USB High Speed Device Port */
 #define AT91CAP9_UHP_BASE       0x00700000      /* USB Host controller */
-#define CONFIG_DRAM_BASE        AT91_CHIPSELECT_6
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index 78983155a074..99e0f8d02d7b 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -19,8 +19,6 @@
 /*
 * Peripheral identifiers/interrupts.
 */
-#define AT91_ID_FIQ             0       /* Advanced Interrupt Controller (FIQ) */
-#define AT91_ID_SYS             1       /* System Peripheral */
 #define AT91RM9200_ID_PIOA      2       /* Parallel IO Controller A */
 #define AT91RM9200_ID_PIOB      3       /* Parallel IO Controller B */
 #define AT91RM9200_ID_PIOC      4       /* Parallel IO Controller C */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 4e79036d3b80..8b6bf835cd73 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -20,8 +20,6 @@
 /*
 * Peripheral identifiers/interrupts.
 */
-#define AT91_ID_FIQ             0       /* Advanced Interrupt Controller (FIQ) */
-#define AT91_ID_SYS             1       /* System Peripherals */
 #define AT91SAM9260_ID_PIOA     2       /* Parallel IO Controller A */
 #define AT91SAM9260_ID_PIOB     3       /* Parallel IO Controller B */
 #define AT91SAM9260_ID_PIOC     4       /* Parallel IO Controller C */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index 2b5618518129..eafbddaf523c 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -18,8 +18,6 @@
 /*
 * Peripheral identifiers/interrupts.
 */
-#define AT91_ID_FIQ             0       /* Advanced Interrupt Controller (FIQ) */
-#define AT91_ID_SYS             1       /* System Peripherals */
 #define AT91SAM9261_ID_PIOA     2       /* Parallel IO Controller A */
 #define AT91SAM9261_ID_PIOB     3       /* Parallel IO Controller B */
 #define AT91SAM9261_ID_PIOC     4       /* Parallel IO Controller C */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index 2091f1e42d43..e2d348213a7b 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -18,8 +18,6 @@
 /*
 * Peripheral identifiers/interrupts.
 */
-#define AT91_ID_FIQ             0       /* Advanced Interrupt Controller (FIQ) */
-#define AT91_ID_SYS             1       /* System Peripherals */
 #define AT91SAM9263_ID_PIOA     2       /* Parallel IO Controller A */
 #define AT91SAM9263_ID_PIOB     3       /* Parallel IO Controller B */
 #define AT91SAM9263_ID_PIOCDE   4       /* Parallel IO Controller C, D and E */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index a526869aee37..659304aa73d9 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -18,8 +18,6 @@
 /*
 * Peripheral identifiers/interrupts.
 */
-#define AT91_ID_FIQ             0       /* Advanced Interrupt Controller (FIQ) */
-#define AT91_ID_SYS             1       /* System Controller Interrupt */
 #define AT91SAM9G45_ID_PIOA     2       /* Parallel I/O Controller A */
 #define AT91SAM9G45_ID_PIOB     3       /* Parallel I/O Controller B */
 #define AT91SAM9G45_ID_PIOC     4       /* Parallel I/O Controller C */
@@ -131,8 +129,6 @@
 #define AT91SAM9G45_EHCI_BASE   0x00800000      /* USB Host controller (EHCI) */
 #define AT91SAM9G45_VDEC_BASE   0x00900000      /* Video Decoder Controller */
-#define CONFIG_DRAM_BASE        AT91_CHIPSELECT_6
 #define CONSISTENT_DMA_SIZE     SZ_4M
 /*
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 87ba8517ad98..41dbbe61055c 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -17,8 +17,6 @@
 /*
 * Peripheral identifiers/interrupts.
 */
-#define AT91_ID_FIQ             0       /* Advanced Interrupt Controller (FIQ) */
-#define AT91_ID_SYS             1       /* System Controller */
 #define AT91SAM9RL_ID_PIOA      2       /* Parallel IO Controller A */
 #define AT91SAM9RL_ID_PIOB      3       /* Parallel IO Controller B */
 #define AT91SAM9RL_ID_PIOC      4       /* Parallel IO Controller C */
diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h
index 063ac44a0204..a152ff87e688 100644
--- a/arch/arm/mach-at91/include/mach/at91x40.h
+++ b/arch/arm/mach-at91/include/mach/at91x40.h
@@ -15,8 +15,6 @@
 /*
 *      IRQ list.
 */
-#define AT91_ID_FIQ             0       /* FIQ */
-#define AT91_ID_SYS             1       /* System Peripheral */
 #define AT91X40_ID_USART0       2       /* USART port 0 */
 #define AT91X40_ID_USART1       3       /* USART port 1 */
 #define AT91X40_ID_TC0          4       /* Timer/Counter 0 */
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 2b499eb343a1..ed544a0d5a1d 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -90,7 +90,7 @@ struct at91_eth_data {
 extern void __init at91_add_device_eth(struct at91_eth_data *data);
 #if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91SAM9G20) || defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45) || defined(CONFIG_ARCH_AT572D940HF)
+        || defined(CONFIG_ARCH_AT91SAM9G45)
 #define eth_platform_data       at91_eth_data
 #endif
@@ -140,6 +140,7 @@ extern void __init at91_set_serial_console(unsigned portnr);
 extern struct platform_device *atmel_default_console_device;
 struct atmel_uart_data {
+        int                     num;            /* port num */
        short                   use_dma_tx;     /* use transmit DMA? */
        short                   use_dma_rx;     /* use receive DMA? */
        void __iomem            *regs;          /* virt. base address, if any */
@@ -203,9 +204,6 @@ extern void __init at91_init_leds(u8 cpu_led, u8 timer_led);
 extern void __init at91_gpio_leds(struct gpio_led *leds, int nr);
 extern void __init at91_pwm_leds(struct gpio_led *leds, int nr);
- /* AT572D940HF DSP */
-extern void __init at91_add_device_mAgic(void);
 /* FIXME: this needs a better location, but gets stuff building again */
 extern int at91_suspend_entering_slow_clock(void);
diff --git a/arch/arm/mach-at91/include/mach/clkdev.h b/arch/arm/mach-at91/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+#endif
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index 0700f2125305..df966c2bc2d4 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -34,8 +34,6 @@
 #define ARCH_ID_AT91SAM9XE256   0x329a93a0
 #define ARCH_ID_AT91SAM9XE512   0x329aa3a0
-#define ARCH_ID_AT572D940HF     0x0e0303e0
 #define ARCH_ID_AT91M40800      0x14080044
 #define ARCH_ID_AT91R40807      0x44080746
 #define ARCH_ID_AT91M40807      0x14080745
@@ -90,9 +88,16 @@ static inline unsigned long at91cap9_rev_identify(void)
 #endif
 #ifdef CONFIG_ARCH_AT91RM9200
+extern int rm9200_type;
+#define ARCH_REVISON_9200_BGA   (0 << 0)
+#define ARCH_REVISON_9200_PQFP  (1 << 0)
 #define cpu_is_at91rm9200()     (at91_cpu_identify() == ARCH_ID_AT91RM9200)
+#define cpu_is_at91rm9200_bga() (!cpu_is_at91rm9200_pqfp())
+#define cpu_is_at91rm9200_pqfp() (cpu_is_at91rm9200() && rm9200_type & ARCH_REVISON_9200_PQFP)
 #else
 #define cpu_is_at91rm9200()     (0)
+#define cpu_is_at91rm9200_bga() (0)
+#define cpu_is_at91rm9200_pqfp() (0)
 #endif
 #ifdef CONFIG_ARCH_AT91SAM9260
@@ -181,12 +186,6 @@ static inline unsigned long at91cap9_rev_identify(void)
 #define cpu_is_at91cap9_revC()  (0)
 #endif
-#ifdef CONFIG_ARCH_AT572D940HF
-#define cpu_is_at572d940hf() (at91_cpu_identify() == ARCH_ID_AT572D940HF)
-#else
-#define cpu_is_at572d940hf() (0)
-#endif
 /*
 * Since this is ARM, we will never run on any AVR32 CPU. But these
 * definitions may reduce clutter in common drivers.
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 3d64a75e3ed5..1008b9fb5074 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -32,13 +32,17 @@
 #include <mach/at91cap9.h>
 #elif defined(CONFIG_ARCH_AT91X40)
 #include <mach/at91x40.h>
-#elif defined(CONFIG_ARCH_AT572D940HF)
-#include <mach/at572d940hf.h>
 #else
 #error "Unsupported AT91 processor"
 #endif
+/*
+ * Peripheral identifiers/interrupts.
+ */
+#define AT91_ID_FIQ             0       /* Advanced Interrupt Controller (FIQ) */
+#define AT91_ID_SYS             1       /* System Peripherals */
 #ifdef CONFIG_MMU
 /*
 * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF
@@ -82,13 +86,6 @@
 #define AT91_CHIPSELECT_6       0x70000000
 #define AT91_CHIPSELECT_7       0x80000000
-/* SDRAM */
-#ifdef CONFIG_DRAM_BASE
-#define AT91_SDRAM_BASE         CONFIG_DRAM_BASE
-#else
-#define AT91_SDRAM_BASE         AT91_CHIPSELECT_1
-#endif
 /* Clocks */
 #define AT91_SLOW_CLOCK         32768           /* slow clock */
diff --git a/arch/arm/mach-at91/include/mach/memory.h b/arch/arm/mach-at91/include/mach/memory.h
index c2cfe5040642..401c207f2f39 100644
--- a/arch/arm/mach-at91/include/mach/memory.h
+++ b/arch/arm/mach-at91/include/mach/memory.h
@@ -23,6 +23,4 @@
 #include <mach/hardware.h>
-#define PLAT_PHYS_OFFSET        (AT91_SDRAM_BASE)
 #endif
diff --git a/arch/arm/mach-at91/include/mach/stamp9g20.h b/arch/arm/mach-at91/include/mach/stamp9g20.h
index 6120f9c46d59..f62c0abca4b4 100644
--- a/arch/arm/mach-at91/include/mach/stamp9g20.h
+++ b/arch/arm/mach-at91/include/mach/stamp9g20.h
@@ -1,7 +1,7 @@
 #ifndef __MACH_STAMP9G20_H
 #define __MACH_STAMP9G20_H
-void stamp9g20_map_io(void);
+void stamp9g20_init_early(void);
 void stamp9g20_board_init(void);
 #endif
diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h
new file mode 100644
index 000000000000..b855ee75f72c
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/system_rev.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Under GPLv2 only
+ */
+#ifndef __ARCH_SYSTEM_REV_H__
+#define __ARCH_SYSTEM_REV_H__
+/*
+ * board revision encoding
+ * mach specific
+ * the 16-31 bit are reserved for at91 generic information
+ *
+ * bit 31:
+ *      0 => nand 16 bit
+ *      1 => nand 8 bit
+ */
+#define BOARD_HAVE_NAND_8BIT    (1 << 31)
+static int inline board_have_nand_8bit(void)
+{
+        return system_rev & BOARD_HAVE_NAND_8BIT;
+}
+#endif /* __ARCH_SYSTEM_REV_H__ */
diff --git a/arch/arm/mach-at91/include/mach/timex.h b/arch/arm/mach-at91/include/mach/timex.h
index 05a6e8af80c4..31ac2d97f14c 100644
--- a/arch/arm/mach-at91/include/mach/timex.h
+++ b/arch/arm/mach-at91/include/mach/timex.h
@@ -82,11 +82,6 @@
 #define AT91X40_MASTER_CLOCK    40000000
 #define CLOCK_TICK_RATE         (AT91X40_MASTER_CLOCK)
-#elif defined(CONFIG_ARCH_AT572D940HF)
-#define AT572D940HF_MASTER_CLOCK        80000000
-#define CLOCK_TICK_RATE         (AT572D940HF_MASTER_CLOCK/16)
 #endif
 #endif
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index b95b9196deed..133aac405853 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1055,7 +1055,7 @@ int da850_register_pm(struct platform_device *pdev)
        if (!pdata->cpupll_reg_base)
                return -ENOMEM;
-        pdata->ddrpll_reg_base = ioremap(DA8XX_PLL1_BASE, SZ_4K);
+        pdata->ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K);
        if (!pdata->ddrpll_reg_base) {
                ret = -ENOMEM;
                goto no_ddrpll_mem;
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 58a02dc7b15a..4e66881c7aee 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -24,23 +24,25 @@
 #include "clock.h"
 #define DA8XX_TPCC_BASE                 0x01c00000
-#define DA850_MMCSD1_BASE               0x01e1b000
-#define DA850_TPCC1_BASE                0x01e30000
 #define DA8XX_TPTC0_BASE                0x01c08000
 #define DA8XX_TPTC1_BASE                0x01c08400
-#define DA850_TPTC2_BASE                0x01e38000
 #define DA8XX_WDOG_BASE                 0x01c21000 /* DA8XX_TIMER64P1_BASE */
 #define DA8XX_I2C0_BASE                 0x01c22000
-#define DA8XX_RTC_BASE                  0x01C23000
+#define DA8XX_RTC_BASE                  0x01c23000
+#define DA8XX_MMCSD0_BASE               0x01c40000
+#define DA8XX_SPI0_BASE                 0x01c41000
+#define DA830_SPI1_BASE                 0x01e12000
+#define DA8XX_LCD_CNTRL_BASE            0x01e13000
+#define DA850_MMCSD1_BASE               0x01e1b000
 #define DA8XX_EMAC_CPPI_PORT_BASE       0x01e20000
 #define DA8XX_EMAC_CPGMACSS_BASE        0x01e22000
 #define DA8XX_EMAC_CPGMAC_BASE          0x01e23000
 #define DA8XX_EMAC_MDIO_BASE            0x01e24000
-#define DA8XX_GPIO_BASE                 0x01e26000
 #define DA8XX_I2C1_BASE                 0x01e28000
-#define DA8XX_SPI0_BASE                 0x01c41000
+#define DA850_TPCC1_BASE                0x01e30000
-#define DA830_SPI1_BASE                 0x01e12000
+#define DA850_TPTC2_BASE                0x01e38000
 #define DA850_SPI1_BASE                 0x01f0e000
+#define DA8XX_DDR2_CTL_BASE             0xb0000000
 #define DA8XX_EMAC_CTRL_REG_OFFSET      0x3000
 #define DA8XX_EMAC_MOD_REG_OFFSET       0x2000
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 22ebc64bc9d9..8f4f736aa267 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -33,6 +33,9 @@
 #define DM365_MMCSD0_BASE            0x01D11000
 #define DM365_MMCSD1_BASE            0x01D00000
+/* System control register offsets */
+#define DM64XX_VDD3P3V_PWDN     0x48
 static struct resource i2c_resources[] = {
        {
                .start          = DAVINCI_I2C_BASE,
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index e4fc1af8500e..ad64da713fc8 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -64,13 +64,9 @@ extern unsigned int da850_max_speed;
 #define DA8XX_TIMER64P1_BASE    0x01c21000
 #define DA8XX_GPIO_BASE         0x01e26000
 #define DA8XX_PSC1_BASE         0x01e27000
-#define DA8XX_LCD_CNTRL_BASE    0x01e13000
-#define DA8XX_PLL1_BASE         0x01e1a000
-#define DA8XX_MMCSD0_BASE       0x01c40000
 #define DA8XX_AEMIF_CS2_BASE    0x60000000
 #define DA8XX_AEMIF_CS3_BASE    0x62000000
 #define DA8XX_AEMIF_CTL_BASE    0x68000000
-#define DA8XX_DDR2_CTL_BASE     0xb0000000
 #define DA8XX_ARM_RAM_BASE      0xffff0000
 void __init da830_init(void);
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h
index c45ba1f62a11..414e0b93e741 100644
--- a/arch/arm/mach-davinci/include/mach/hardware.h
+++ b/arch/arm/mach-davinci/include/mach/hardware.h
@@ -21,9 +21,6 @@
 */
 #define DAVINCI_SYSTEM_MODULE_BASE        0x01C40000
-/* System control register offsets */
-#define DM64XX_VDD3P3V_PWDN     0x48
 /*
 * I/O mapping
 */
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index 805196207ce8..b92c1e557145 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -169,9 +169,11 @@ config MACH_NURI
        select S3C_DEV_HSMMC2
        select S3C_DEV_HSMMC3
        select S3C_DEV_I2C1
+        select S3C_DEV_I2C3
        select S3C_DEV_I2C5
        select S5P_DEV_USB_EHCI
        select EXYNOS4_SETUP_I2C1
+        select EXYNOS4_SETUP_I2C3
        select EXYNOS4_SETUP_I2C5
        select EXYNOS4_SETUP_SDHCI
        select SAMSUNG_DEV_PWM
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index 777897551e42..683fc387c8af 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_CPU_EXYNOS4210)	+= cpu.o init.o clock.o irq-combiner.o
 obj-$(CONFIG_CPU_EXYNOS4210)    += setup-i2c0.o gpiolib.o irq-eint.o dma.o
 obj-$(CONFIG_PM)                += pm.o sleep.o
 obj-$(CONFIG_CPU_FREQ)          += cpufreq.o
+obj-$(CONFIG_CPU_IDLE)          += cpuidle.o
 obj-$(CONFIG_SMP)               += platsmp.o headsmp.o
diff --git a/arch/arm/mach-exynos4/cpuidle.c b/arch/arm/mach-exynos4/cpuidle.c
new file mode 100644
index 000000000000..bf7e96f2793a
--- /dev/null
+++ b/arch/arm/mach-exynos4/cpuidle.c
@@ -0,0 +1,86 @@
+/* linux/arch/arm/mach-exynos4/cpuidle.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/cpuidle.h>
+#include <linux/io.h>
+#include <asm/proc-fns.h>
+static int exynos4_enter_idle(struct cpuidle_device *dev,
+                              struct cpuidle_state *state);
+static struct cpuidle_state exynos4_cpuidle_set[] = {
+        [0] = {
+                .enter                  = exynos4_enter_idle,
+                .exit_latency           = 1,
+                .target_residency       = 100000,
+                .flags                  = CPUIDLE_FLAG_TIME_VALID,
+                .name                   = "IDLE",
+                .desc                   = "ARM clock gating(WFI)",
+        },
+};
+static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);
+static struct cpuidle_driver exynos4_idle_driver = {
+        .name           = "exynos4_idle",
+        .owner          = THIS_MODULE,
+};
+static int exynos4_enter_idle(struct cpuidle_device *dev,
+                              struct cpuidle_state *state)
+{
+        struct timeval before, after;
+        int idle_time;
+        local_irq_disable();
+        do_gettimeofday(&before);
+        cpu_do_idle();
+        do_gettimeofday(&after);
+        local_irq_enable();
+        idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
+                    (after.tv_usec - before.tv_usec);
+        return idle_time;
+}
+static int __init exynos4_init_cpuidle(void)
+{
+        int i, max_cpuidle_state, cpu_id;
+        struct cpuidle_device *device;
+        cpuidle_register_driver(&exynos4_idle_driver);
+        for_each_cpu(cpu_id, cpu_online_mask) {
+                device = &per_cpu(exynos4_cpuidle_device, cpu_id);
+                device->cpu = cpu_id;
+                device->state_count = (sizeof(exynos4_cpuidle_set) /
+                                               sizeof(struct cpuidle_state));
+                max_cpuidle_state = device->state_count;
+                for (i = 0; i < max_cpuidle_state; i++) {
+                        memcpy(&device->states[i], &exynos4_cpuidle_set[i],
+                                        sizeof(struct cpuidle_state));
+                }
+                if (cpuidle_register_device(device)) {
+                        printk(KERN_ERR "CPUidle register device failed\n,");
+                        return -EIO;
+                }
+        }
+        return 0;
+}
+device_initcall(exynos4_init_cpuidle);
diff --git a/arch/arm/mach-exynos4/mach-nuri.c b/arch/arm/mach-exynos4/mach-nuri.c
index bb5d12f43af8..642702bb5b12 100644
--- a/arch/arm/mach-exynos4/mach-nuri.c
+++ b/arch/arm/mach-exynos4/mach-nuri.c
@@ -12,6 +12,7 @@
 #include <linux/serial_core.h>
 #include <linux/input.h>
 #include <linux/i2c.h>
+#include <linux/i2c/atmel_mxt_ts.h>
 #include <linux/gpio_keys.h>
 #include <linux/gpio.h>
 #include <linux/regulator/machine.h>
@@ -32,6 +33,8 @@
 #include <plat/sdhci.h>
 #include <plat/ehci.h>
 #include <plat/clock.h>
+#include <plat/gpio-cfg.h>
+#include <plat/iic.h>
 #include <mach/map.h>
@@ -259,6 +262,88 @@ static struct i2c_board_info i2c1_devs[] __initdata = {
        /* Gyro, To be updated */
 };
+/* TSP */
+static u8 mxt_init_vals[] = {
+        /* MXT_GEN_COMMAND(6) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        /* MXT_GEN_POWER(7) */
+        0x20, 0xff, 0x32,
+        /* MXT_GEN_ACQUIRE(8) */
+        0x0a, 0x00, 0x05, 0x00, 0x00, 0x00, 0x09, 0x23,
+        /* MXT_TOUCH_MULTI(9) */
+        0x00, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x02, 0x00,
+        0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00,
+        /* MXT_TOUCH_KEYARRAY(15) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
+        0x00,
+        /* MXT_SPT_GPIOPWM(19) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        /* MXT_PROCI_GRIPFACE(20) */
+        0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x28, 0x04,
+        0x0f, 0x0a,
+        /* MXT_PROCG_NOISE(22) */
+        0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x23, 0x00,
+        0x00, 0x05, 0x0f, 0x19, 0x23, 0x2d, 0x03,
+        /* MXT_TOUCH_PROXIMITY(23) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00,
+        /* MXT_PROCI_ONETOUCH(24) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        /* MXT_SPT_SELFTEST(25) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00,
+        /* MXT_PROCI_TWOTOUCH(27) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        /* MXT_SPT_CTECONFIG(28) */
+        0x00, 0x00, 0x02, 0x08, 0x10, 0x00,
+};
+static struct mxt_platform_data mxt_platform_data = {
+        .config                 = mxt_init_vals,
+        .config_length          = ARRAY_SIZE(mxt_init_vals),
+        .x_line                 = 18,
+        .y_line                 = 11,
+        .x_size                 = 1024,
+        .y_size                 = 600,
+        .blen                   = 0x1,
+        .threshold              = 0x28,
+        .voltage                = 2800000,              /* 2.8V */
+        .orient                 = MXT_DIAGONAL_COUNTER,
+        .irqflags               = IRQF_TRIGGER_FALLING,
+};
+static struct s3c2410_platform_i2c i2c3_data __initdata = {
+        .flags          = 0,
+        .bus_num        = 3,
+        .slave_addr     = 0x10,
+        .frequency      = 400 * 1000,
+        .sda_delay      = 100,
+};
+static struct i2c_board_info i2c3_devs[] __initdata = {
+        {
+                I2C_BOARD_INFO("atmel_mxt_ts", 0x4a),
+                .platform_data  = &mxt_platform_data,
+                .irq            = IRQ_EINT(4),
+        },
+};
+static void __init nuri_tsp_init(void)
+{
+        int gpio;
+        /* TOUCH_INT: XEINT_4 */
+        gpio = EXYNOS4_GPX0(4);
+        gpio_request(gpio, "TOUCH_INT");
+        s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
+        s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
+}
 /* GPIO I2C 5 (PMIC) */
 static struct i2c_board_info i2c5_devs[] __initdata = {
        /* max8997, To be updated */
@@ -283,6 +368,7 @@ static struct platform_device *nuri_devices[] __initdata = {
        &s3c_device_wdt,
        &s3c_device_timer[0],
        &s5p_device_ehci,
+        &s3c_device_i2c3,
        /* NURI Devices */
        &nuri_gpio_keys,
@@ -300,8 +386,11 @@ static void __init nuri_map_io(void)
 static void __init nuri_machine_init(void)
 {
        nuri_sdhci_init();
+        nuri_tsp_init();
        i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
+        s3c_i2c3_set_platdata(&i2c3_data);
+        i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
        i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
        nuri_ehci_init();
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c
index 5b84bcd30271..b9913234bbf6 100644
--- a/arch/arm/mach-netx/fb.c
+++ b/arch/arm/mach-netx/fb.c
@@ -103,7 +103,6 @@ static struct amba_device fb_device = {
                .flags  = IORESOURCE_MEM,
        },
        .irq            = { NETX_IRQ_LCD, NO_IRQ },
-        .periphid       = 0x10112400,
 };
 int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel)
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
index 405e62128917..82db072cb836 100644
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -16,7 +16,6 @@
 #include <mach/dma.h>
 #include <mach/map.h>
-#include <mach/gpio-bank-c.h>
 #include <mach/spi-clocks.h>
 #include <mach/irqs.h>
@@ -40,23 +39,15 @@ static char *spi_src_clks[] = {
 */
 static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev)
 {
+        unsigned int base;
        switch (pdev->id) {
        case 0:
-                s3c_gpio_cfgpin(S3C64XX_GPC(0), S3C64XX_GPC0_SPI_MISO0);
+                base = S3C64XX_GPC(0);
-                s3c_gpio_cfgpin(S3C64XX_GPC(1), S3C64XX_GPC1_SPI_CLKO);
-                s3c_gpio_cfgpin(S3C64XX_GPC(2), S3C64XX_GPC2_SPI_MOSIO);
-                s3c_gpio_setpull(S3C64XX_GPC(0), S3C_GPIO_PULL_UP);
-                s3c_gpio_setpull(S3C64XX_GPC(1), S3C_GPIO_PULL_UP);
-                s3c_gpio_setpull(S3C64XX_GPC(2), S3C_GPIO_PULL_UP);
                break;
        case 1:
-                s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_SPI_MISO1);
+                base = S3C64XX_GPC(4);
-                s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_SPI_CLK1);
-                s3c_gpio_cfgpin(S3C64XX_GPC(6), S3C64XX_GPC6_SPI_MOSI1);
-                s3c_gpio_setpull(S3C64XX_GPC(4), S3C_GPIO_PULL_UP);
-                s3c_gpio_setpull(S3C64XX_GPC(5), S3C_GPIO_PULL_UP);
-                s3c_gpio_setpull(S3C64XX_GPC(6), S3C_GPIO_PULL_UP);
                break;
        default:
@@ -64,6 +55,9 @@ static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev)
                return -EINVAL;
        }
+        s3c_gpio_cfgall_range(base, 3,
+                              S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
        return 0;
 }
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
deleted file mode 100644
index 34212e1a7e81..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank A register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPACON                  (S3C64XX_GPA_BASE + 0x00)
-#define S3C64XX_GPADAT                  (S3C64XX_GPA_BASE + 0x04)
-#define S3C64XX_GPAPUD                  (S3C64XX_GPA_BASE + 0x08)
-#define S3C64XX_GPACONSLP               (S3C64XX_GPA_BASE + 0x0c)
-#define S3C64XX_GPAPUDSLP               (S3C64XX_GPA_BASE + 0x10)
-#define S3C64XX_GPA_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPA_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPA_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPA0_UART_RXD0          (0x02 << 0)
-#define S3C64XX_GPA0_EINT_G1_0          (0x07 << 0)
-#define S3C64XX_GPA1_UART_TXD0          (0x02 << 4)
-#define S3C64XX_GPA1_EINT_G1_1          (0x07 << 4)
-#define S3C64XX_GPA2_UART_nCTS0         (0x02 << 8)
-#define S3C64XX_GPA2_EINT_G1_2          (0x07 << 8)
-#define S3C64XX_GPA3_UART_nRTS0         (0x02 << 12)
-#define S3C64XX_GPA3_EINT_G1_3          (0x07 << 12)
-#define S3C64XX_GPA4_UART_RXD1          (0x02 << 16)
-#define S3C64XX_GPA4_EINT_G1_4          (0x07 << 16)
-#define S3C64XX_GPA5_UART_TXD1          (0x02 << 20)
-#define S3C64XX_GPA5_EINT_G1_5          (0x07 << 20)
-#define S3C64XX_GPA6_UART_nCTS1         (0x02 << 24)
-#define S3C64XX_GPA6_EINT_G1_6          (0x07 << 24)
-#define S3C64XX_GPA7_UART_nRTS1         (0x02 << 28)
-#define S3C64XX_GPA7_EINT_G1_7          (0x07 << 28)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
deleted file mode 100644
index 7232c037e642..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank B register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPBCON                  (S3C64XX_GPB_BASE + 0x00)
-#define S3C64XX_GPBDAT                  (S3C64XX_GPB_BASE + 0x04)
-#define S3C64XX_GPBPUD                  (S3C64XX_GPB_BASE + 0x08)
-#define S3C64XX_GPBCONSLP               (S3C64XX_GPB_BASE + 0x0c)
-#define S3C64XX_GPBPUDSLP               (S3C64XX_GPB_BASE + 0x10)
-#define S3C64XX_GPB_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPB_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPB_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPB0_UART_RXD2          (0x02 << 0)
-#define S3C64XX_GPB0_EXTDMA_REQ         (0x03 << 0)
-#define S3C64XX_GPB0_IrDA_RXD           (0x04 << 0)
-#define S3C64XX_GPB0_ADDR_CF0           (0x05 << 0)
-#define S3C64XX_GPB0_EINT_G1_8          (0x07 << 0)
-#define S3C64XX_GPB1_UART_TXD2          (0x02 << 4)
-#define S3C64XX_GPB1_EXTDMA_ACK         (0x03 << 4)
-#define S3C64XX_GPB1_IrDA_TXD           (0x04 << 4)
-#define S3C64XX_GPB1_ADDR_CF1           (0x05 << 4)
-#define S3C64XX_GPB1_EINT_G1_9          (0x07 << 4)
-#define S3C64XX_GPB2_UART_RXD3          (0x02 << 8)
-#define S3C64XX_GPB2_IrDA_RXD           (0x03 << 8)
-#define S3C64XX_GPB2_EXTDMA_REQ         (0x04 << 8)
-#define S3C64XX_GPB2_ADDR_CF2           (0x05 << 8)
-#define S3C64XX_GPB2_I2C_SCL1           (0x06 << 8)
-#define S3C64XX_GPB2_EINT_G1_10         (0x07 << 8)
-#define S3C64XX_GPB3_UART_TXD3          (0x02 << 12)
-#define S3C64XX_GPB3_IrDA_TXD           (0x03 << 12)
-#define S3C64XX_GPB3_EXTDMA_ACK         (0x04 << 12)
-#define S3C64XX_GPB3_I2C_SDA1           (0x06 << 12)
-#define S3C64XX_GPB3_EINT_G1_11         (0x07 << 12)
-#define S3C64XX_GPB4_IrDA_SDBW          (0x02 << 16)
-#define S3C64XX_GPB4_CAM_FIELD          (0x03 << 16)
-#define S3C64XX_GPB4_CF_DATA_DIR        (0x04 << 16)
-#define S3C64XX_GPB4_EINT_G1_12         (0x07 << 16)
-#define S3C64XX_GPB5_I2C_SCL0           (0x02 << 20)
-#define S3C64XX_GPB5_EINT_G1_13         (0x07 << 20)
-#define S3C64XX_GPB6_I2C_SDA0           (0x02 << 24)
-#define S3C64XX_GPB6_EINT_G1_14         (0x07 << 24)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
deleted file mode 100644
index db189ab1639a..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank C register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPCCON                  (S3C64XX_GPC_BASE + 0x00)
-#define S3C64XX_GPCDAT                  (S3C64XX_GPC_BASE + 0x04)
-#define S3C64XX_GPCPUD                  (S3C64XX_GPC_BASE + 0x08)
-#define S3C64XX_GPCCONSLP               (S3C64XX_GPC_BASE + 0x0c)
-#define S3C64XX_GPCPUDSLP               (S3C64XX_GPC_BASE + 0x10)
-#define S3C64XX_GPC_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPC_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPC_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPC0_SPI_MISO0          (0x02 << 0)
-#define S3C64XX_GPC0_EINT_G2_0          (0x07 << 0)
-#define S3C64XX_GPC1_SPI_CLKO           (0x02 << 4)
-#define S3C64XX_GPC1_EINT_G2_1          (0x07 << 4)
-#define S3C64XX_GPC2_SPI_MOSIO          (0x02 << 8)
-#define S3C64XX_GPC2_EINT_G2_2          (0x07 << 8)
-#define S3C64XX_GPC3_SPI_nCSO           (0x02 << 12)
-#define S3C64XX_GPC3_EINT_G2_3          (0x07 << 12)
-#define S3C64XX_GPC4_SPI_MISO1          (0x02 << 16)
-#define S3C64XX_GPC4_MMC2_CMD           (0x03 << 16)
-#define S3C64XX_GPC4_I2S_V40_DO0        (0x05 << 16)
-#define S3C64XX_GPC4_EINT_G2_4          (0x07 << 16)
-#define S3C64XX_GPC5_SPI_CLK1           (0x02 << 20)
-#define S3C64XX_GPC5_MMC2_CLK           (0x03 << 20)
-#define S3C64XX_GPC5_I2S_V40_DO1        (0x05 << 20)
-#define S3C64XX_GPC5_EINT_G2_5          (0x07 << 20)
-#define S3C64XX_GPC6_SPI_MOSI1          (0x02 << 24)
-#define S3C64XX_GPC6_EINT_G2_6          (0x07 << 24)
-#define S3C64XX_GPC7_SPI_nCS1           (0x02 << 28)
-#define S3C64XX_GPC7_I2S_V40_DO2        (0x05 << 28)
-#define S3C64XX_GPC7_EINT_G2_7          (0x07 << 28)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
deleted file mode 100644
index 1a01cee7aca3..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank D register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPDCON                  (S3C64XX_GPD_BASE + 0x00)
-#define S3C64XX_GPDDAT                  (S3C64XX_GPD_BASE + 0x04)
-#define S3C64XX_GPDPUD                  (S3C64XX_GPD_BASE + 0x08)
-#define S3C64XX_GPDCONSLP               (S3C64XX_GPD_BASE + 0x0c)
-#define S3C64XX_GPDPUDSLP               (S3C64XX_GPD_BASE + 0x10)
-#define S3C64XX_GPD_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPD_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPD_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPD0_PCM0_SCLK          (0x02 << 0)
-#define S3C64XX_GPD0_I2S0_CLK           (0x03 << 0)
-#define S3C64XX_GPD0_AC97_BITCLK        (0x04 << 0)
-#define S3C64XX_GPD0_EINT_G3_0          (0x07 << 0)
-#define S3C64XX_GPD1_PCM0_EXTCLK        (0x02 << 4)
-#define S3C64XX_GPD1_I2S0_CDCLK         (0x03 << 4)
-#define S3C64XX_GPD1_AC97_nRESET        (0x04 << 4)
-#define S3C64XX_GPD1_EINT_G3_1          (0x07 << 4)
-#define S3C64XX_GPD2_PCM0_FSYNC         (0x02 << 8)
-#define S3C64XX_GPD2_I2S0_LRCLK         (0x03 << 8)
-#define S3C64XX_GPD2_AC97_SYNC          (0x04 << 8)
-#define S3C64XX_GPD2_EINT_G3_2          (0x07 << 8)
-#define S3C64XX_GPD3_PCM0_SIN           (0x02 << 12)
-#define S3C64XX_GPD3_I2S0_DI            (0x03 << 12)
-#define S3C64XX_GPD3_AC97_SDI           (0x04 << 12)
-#define S3C64XX_GPD3_EINT_G3_3          (0x07 << 12)
-#define S3C64XX_GPD4_PCM0_SOUT          (0x02 << 16)
-#define S3C64XX_GPD4_I2S0_D0            (0x03 << 16)
-#define S3C64XX_GPD4_AC97_SDO           (0x04 << 16)
-#define S3C64XX_GPD4_EINT_G3_4          (0x07 << 16)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
deleted file mode 100644
index f057adb627dd..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank E register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPECON                  (S3C64XX_GPE_BASE + 0x00)
-#define S3C64XX_GPEDAT                  (S3C64XX_GPE_BASE + 0x04)
-#define S3C64XX_GPEPUD                  (S3C64XX_GPE_BASE + 0x08)
-#define S3C64XX_GPECONSLP               (S3C64XX_GPE_BASE + 0x0c)
-#define S3C64XX_GPEPUDSLP               (S3C64XX_GPE_BASE + 0x10)
-#define S3C64XX_GPE_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPE_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPE_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPE0_PCM1_SCLK          (0x02 << 0)
-#define S3C64XX_GPE0_I2S1_CLK           (0x03 << 0)
-#define S3C64XX_GPE0_AC97_BITCLK        (0x04 << 0)
-#define S3C64XX_GPE1_PCM1_EXTCLK        (0x02 << 4)
-#define S3C64XX_GPE1_I2S1_CDCLK         (0x03 << 4)
-#define S3C64XX_GPE1_AC97_nRESET        (0x04 << 4)
-#define S3C64XX_GPE2_PCM1_FSYNC         (0x02 << 8)
-#define S3C64XX_GPE2_I2S1_LRCLK         (0x03 << 8)
-#define S3C64XX_GPE2_AC97_SYNC          (0x04 << 8)
-#define S3C64XX_GPE3_PCM1_SIN           (0x02 << 12)
-#define S3C64XX_GPE3_I2S1_DI            (0x03 << 12)
-#define S3C64XX_GPE3_AC97_SDI           (0x04 << 12)
-#define S3C64XX_GPE4_PCM1_SOUT          (0x02 << 16)
-#define S3C64XX_GPE4_I2S1_D0            (0x03 << 16)
-#define S3C64XX_GPE4_AC97_SDO           (0x04 << 16)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
deleted file mode 100644
index 62ab8f5e7835..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank F register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPFCON                  (S3C64XX_GPF_BASE + 0x00)
-#define S3C64XX_GPFDAT                  (S3C64XX_GPF_BASE + 0x04)
-#define S3C64XX_GPFPUD                  (S3C64XX_GPF_BASE + 0x08)
-#define S3C64XX_GPFCONSLP               (S3C64XX_GPF_BASE + 0x0c)
-#define S3C64XX_GPFPUDSLP               (S3C64XX_GPF_BASE + 0x10)
-#define S3C64XX_GPF_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPF_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPF_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPF0_CAMIF_CLK          (0x02 << 0)
-#define S3C64XX_GPF0_EINT_G4_0          (0x03 << 0)
-#define S3C64XX_GPF1_CAMIF_HREF         (0x02 << 2)
-#define S3C64XX_GPF1_EINT_G4_1          (0x03 << 2)
-#define S3C64XX_GPF2_CAMIF_PCLK         (0x02 << 4)
-#define S3C64XX_GPF2_EINT_G4_2          (0x03 << 4)
-#define S3C64XX_GPF3_CAMIF_nRST         (0x02 << 6)
-#define S3C64XX_GPF3_EINT_G4_3          (0x03 << 6)
-#define S3C64XX_GPF4_CAMIF_VSYNC        (0x02 << 8)
-#define S3C64XX_GPF4_EINT_G4_4          (0x03 << 8)
-#define S3C64XX_GPF5_CAMIF_YDATA0       (0x02 << 10)
-#define S3C64XX_GPF5_EINT_G4_5          (0x03 << 10)
-#define S3C64XX_GPF6_CAMIF_YDATA1       (0x02 << 12)
-#define S3C64XX_GPF6_EINT_G4_6          (0x03 << 12)
-#define S3C64XX_GPF7_CAMIF_YDATA2       (0x02 << 14)
-#define S3C64XX_GPF7_EINT_G4_7          (0x03 << 14)
-#define S3C64XX_GPF8_CAMIF_YDATA3       (0x02 << 16)
-#define S3C64XX_GPF8_EINT_G4_8          (0x03 << 16)
-#define S3C64XX_GPF9_CAMIF_YDATA4       (0x02 << 18)
-#define S3C64XX_GPF9_EINT_G4_9          (0x03 << 18)
-#define S3C64XX_GPF10_CAMIF_YDATA5      (0x02 << 20)
-#define S3C64XX_GPF10_EINT_G4_10        (0x03 << 20)
-#define S3C64XX_GPF11_CAMIF_YDATA6      (0x02 << 22)
-#define S3C64XX_GPF11_EINT_G4_11        (0x03 << 22)
-#define S3C64XX_GPF12_CAMIF_YDATA7      (0x02 << 24)
-#define S3C64XX_GPF12_EINT_G4_12        (0x03 << 24)
-#define S3C64XX_GPF13_PWM_ECLK          (0x02 << 26)
-#define S3C64XX_GPF13_EINT_G4_13        (0x03 << 26)
-#define S3C64XX_GPF14_PWM_TOUT0         (0x02 << 28)
-#define S3C64XX_GPF14_CLKOUT0           (0x03 << 28)
-#define S3C64XX_GPF15_PWM_TOUT1         (0x02 << 30)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
deleted file mode 100644
index b94954af1598..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank G register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPGCON                  (S3C64XX_GPG_BASE + 0x00)
-#define S3C64XX_GPGDAT                  (S3C64XX_GPG_BASE + 0x04)
-#define S3C64XX_GPGPUD                  (S3C64XX_GPG_BASE + 0x08)
-#define S3C64XX_GPGCONSLP               (S3C64XX_GPG_BASE + 0x0c)
-#define S3C64XX_GPGPUDSLP               (S3C64XX_GPG_BASE + 0x10)
-#define S3C64XX_GPG_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPG_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPG_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPG0_MMC0_CLK           (0x02 << 0)
-#define S3C64XX_GPG0_EINT_G5_0          (0x07 << 0)
-#define S3C64XX_GPG1_MMC0_CMD           (0x02 << 4)
-#define S3C64XX_GPG1_EINT_G5_1          (0x07 << 4)
-#define S3C64XX_GPG2_MMC0_DATA0         (0x02 << 8)
-#define S3C64XX_GPG2_EINT_G5_2          (0x07 << 8)
-#define S3C64XX_GPG3_MMC0_DATA1         (0x02 << 12)
-#define S3C64XX_GPG3_EINT_G5_3          (0x07 << 12)
-#define S3C64XX_GPG4_MMC0_DATA2         (0x02 << 16)
-#define S3C64XX_GPG4_EINT_G5_4          (0x07 << 16)
-#define S3C64XX_GPG5_MMC0_DATA3         (0x02 << 20)
-#define S3C64XX_GPG5_EINT_G5_5          (0x07 << 20)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
deleted file mode 100644
index 5d75aaad865e..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank H register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPHCON0                 (S3C64XX_GPH_BASE + 0x00)
-#define S3C64XX_GPHCON1                 (S3C64XX_GPH_BASE + 0x04)
-#define S3C64XX_GPHDAT                  (S3C64XX_GPH_BASE + 0x08)
-#define S3C64XX_GPHPUD                  (S3C64XX_GPH_BASE + 0x0c)
-#define S3C64XX_GPHCONSLP               (S3C64XX_GPH_BASE + 0x10)
-#define S3C64XX_GPHPUDSLP               (S3C64XX_GPH_BASE + 0x14)
-#define S3C64XX_GPH_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPH_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPH_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPH0_MMC1_CLK           (0x02 << 0)
-#define S3C64XX_GPH0_KP_COL0            (0x04 << 0)
-#define S3C64XX_GPH0_EINT_G6_0          (0x07 << 0)
-#define S3C64XX_GPH1_MMC1_CMD           (0x02 << 4)
-#define S3C64XX_GPH1_KP_COL1            (0x04 << 4)
-#define S3C64XX_GPH1_EINT_G6_1          (0x07 << 4)
-#define S3C64XX_GPH2_MMC1_DATA0         (0x02 << 8)
-#define S3C64XX_GPH2_KP_COL2            (0x04 << 8)
-#define S3C64XX_GPH2_EINT_G6_2          (0x07 << 8)
-#define S3C64XX_GPH3_MMC1_DATA1         (0x02 << 12)
-#define S3C64XX_GPH3_KP_COL3            (0x04 << 12)
-#define S3C64XX_GPH3_EINT_G6_3          (0x07 << 12)
-#define S3C64XX_GPH4_MMC1_DATA2         (0x02 << 16)
-#define S3C64XX_GPH4_KP_COL4            (0x04 << 16)
-#define S3C64XX_GPH4_EINT_G6_4          (0x07 << 16)
-#define S3C64XX_GPH5_MMC1_DATA3         (0x02 << 20)
-#define S3C64XX_GPH5_KP_COL5            (0x04 << 20)
-#define S3C64XX_GPH5_EINT_G6_5          (0x07 << 20)
-#define S3C64XX_GPH6_MMC1_DATA4         (0x02 << 24)
-#define S3C64XX_GPH6_MMC2_DATA0         (0x03 << 24)
-#define S3C64XX_GPH6_KP_COL6            (0x04 << 24)
-#define S3C64XX_GPH6_I2S_V40_BCLK       (0x05 << 24)
-#define S3C64XX_GPH6_ADDR_CF0           (0x06 << 24)
-#define S3C64XX_GPH6_EINT_G6_6          (0x07 << 24)
-#define S3C64XX_GPH7_MMC1_DATA5         (0x02 << 28)
-#define S3C64XX_GPH7_MMC2_DATA1         (0x03 << 28)
-#define S3C64XX_GPH7_KP_COL7            (0x04 << 28)
-#define S3C64XX_GPH7_I2S_V40_CDCLK      (0x05 << 28)
-#define S3C64XX_GPH7_ADDR_CF1           (0x06 << 28)
-#define S3C64XX_GPH7_EINT_G6_7          (0x07 << 28)
-#define S3C64XX_GPH8_MMC1_DATA6         (0x02 <<  0)
-#define S3C64XX_GPH8_MMC2_DATA2         (0x03 <<  0)
-#define S3C64XX_GPH8_I2S_V40_LRCLK      (0x05 <<  0)
-#define S3C64XX_GPH8_ADDR_CF2           (0x06 <<  0)
-#define S3C64XX_GPH8_EINT_G6_8          (0x07 <<  0)
-#define S3C64XX_GPH9_OUTPUT             (0x01 <<  4)
-#define S3C64XX_GPH9_MMC1_DATA7         (0x02 <<  4)
-#define S3C64XX_GPH9_MMC2_DATA3         (0x03 <<  4)
-#define S3C64XX_GPH9_I2S_V40_DI         (0x05 <<  4)
-#define S3C64XX_GPH9_EINT_G6_9          (0x07 <<  4)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
deleted file mode 100644
index 4ceaa6098bc7..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank I register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPICON                  (S3C64XX_GPI_BASE + 0x00)
-#define S3C64XX_GPIDAT                  (S3C64XX_GPI_BASE + 0x04)
-#define S3C64XX_GPIPUD                  (S3C64XX_GPI_BASE + 0x08)
-#define S3C64XX_GPICONSLP               (S3C64XX_GPI_BASE + 0x0c)
-#define S3C64XX_GPIPUDSLP               (S3C64XX_GPI_BASE + 0x10)
-#define S3C64XX_GPI_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPI_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPI_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPI0_VD0                (0x02 << 0)
-#define S3C64XX_GPI1_VD1                (0x02 << 2)
-#define S3C64XX_GPI2_VD2                (0x02 << 4)
-#define S3C64XX_GPI3_VD3                (0x02 << 6)
-#define S3C64XX_GPI4_VD4                (0x02 << 8)
-#define S3C64XX_GPI5_VD5                (0x02 << 10)
-#define S3C64XX_GPI6_VD6                (0x02 << 12)
-#define S3C64XX_GPI7_VD7                (0x02 << 14)
-#define S3C64XX_GPI8_VD8                (0x02 << 16)
-#define S3C64XX_GPI9_VD9                (0x02 << 18)
-#define S3C64XX_GPI10_VD10              (0x02 << 20)
-#define S3C64XX_GPI11_VD11              (0x02 << 22)
-#define S3C64XX_GPI12_VD12              (0x02 << 24)
-#define S3C64XX_GPI13_VD13              (0x02 << 26)
-#define S3C64XX_GPI14_VD14              (0x02 << 28)
-#define S3C64XX_GPI15_VD15              (0x02 << 30)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
deleted file mode 100644
index 6f25cd079a40..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank J register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPJCON                  (S3C64XX_GPJ_BASE + 0x00)
-#define S3C64XX_GPJDAT                  (S3C64XX_GPJ_BASE + 0x04)
-#define S3C64XX_GPJPUD                  (S3C64XX_GPJ_BASE + 0x08)
-#define S3C64XX_GPJCONSLP               (S3C64XX_GPJ_BASE + 0x0c)
-#define S3C64XX_GPJPUDSLP               (S3C64XX_GPJ_BASE + 0x10)
-#define S3C64XX_GPJ_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPJ_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPJ_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPJ0_VD16               (0x02 << 0)
-#define S3C64XX_GPJ1_VD17               (0x02 << 2)
-#define S3C64XX_GPJ2_VD18               (0x02 << 4)
-#define S3C64XX_GPJ3_VD19               (0x02 << 6)
-#define S3C64XX_GPJ4_VD20               (0x02 << 8)
-#define S3C64XX_GPJ5_VD21               (0x02 << 10)
-#define S3C64XX_GPJ6_VD22               (0x02 << 12)
-#define S3C64XX_GPJ7_VD23               (0x02 << 14)
-#define S3C64XX_GPJ8_LCD_HSYNC          (0x02 << 16)
-#define S3C64XX_GPJ9_LCD_VSYNC          (0x02 << 18)
-#define S3C64XX_GPJ10_LCD_VDEN          (0x02 << 20)
-#define S3C64XX_GPJ11_LCD_VCLK          (0x02 << 22)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
deleted file mode 100644
index d0aeda1cd9de..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank N register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPNCON                  (S3C64XX_GPN_BASE + 0x00)
-#define S3C64XX_GPNDAT                  (S3C64XX_GPN_BASE + 0x04)
-#define S3C64XX_GPNPUD                  (S3C64XX_GPN_BASE + 0x08)
-#define S3C64XX_GPN_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPN_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPN_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPN0_EINT0              (0x02 << 0)
-#define S3C64XX_GPN0_KP_ROW0            (0x03 << 0)
-#define S3C64XX_GPN1_EINT1              (0x02 << 2)
-#define S3C64XX_GPN1_KP_ROW1            (0x03 << 2)
-#define S3C64XX_GPN2_EINT2              (0x02 << 4)
-#define S3C64XX_GPN2_KP_ROW2            (0x03 << 4)
-#define S3C64XX_GPN3_EINT3              (0x02 << 6)
-#define S3C64XX_GPN3_KP_ROW3            (0x03 << 6)
-#define S3C64XX_GPN4_EINT4              (0x02 << 8)
-#define S3C64XX_GPN4_KP_ROW4            (0x03 << 8)
-#define S3C64XX_GPN5_EINT5              (0x02 << 10)
-#define S3C64XX_GPN5_KP_ROW5            (0x03 << 10)
-#define S3C64XX_GPN6_EINT6              (0x02 << 12)
-#define S3C64XX_GPN6_KP_ROW6            (0x03 << 12)
-#define S3C64XX_GPN7_EINT7              (0x02 << 14)
-#define S3C64XX_GPN7_KP_ROW7            (0x03 << 14)
-#define S3C64XX_GPN8_EINT8              (0x02 << 16)
-#define S3C64XX_GPN9_EINT9              (0x02 << 18)
-#define S3C64XX_GPN10_EINT10            (0x02 << 20)
-#define S3C64XX_GPN11_EINT11            (0x02 << 22)
-#define S3C64XX_GPN12_EINT12            (0x02 << 24)
-#define S3C64XX_GPN13_EINT13            (0x02 << 26)
-#define S3C64XX_GPN14_EINT14            (0x02 << 28)
-#define S3C64XX_GPN15_EINT15            (0x02 << 30)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
deleted file mode 100644
index 21868fa102d0..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank O register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPOCON                  (S3C64XX_GPO_BASE + 0x00)
-#define S3C64XX_GPODAT                  (S3C64XX_GPO_BASE + 0x04)
-#define S3C64XX_GPOPUD                  (S3C64XX_GPO_BASE + 0x08)
-#define S3C64XX_GPOCONSLP               (S3C64XX_GPO_BASE + 0x0c)
-#define S3C64XX_GPOPUDSLP               (S3C64XX_GPO_BASE + 0x10)
-#define S3C64XX_GPO_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPO_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPO_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPO0_MEM0_nCS2          (0x02 << 0)
-#define S3C64XX_GPO0_EINT_G7_0          (0x03 << 0)
-#define S3C64XX_GPO1_MEM0_nCS3          (0x02 << 2)
-#define S3C64XX_GPO1_EINT_G7_1          (0x03 << 2)
-#define S3C64XX_GPO2_MEM0_nCS4          (0x02 << 4)
-#define S3C64XX_GPO2_EINT_G7_2          (0x03 << 4)
-#define S3C64XX_GPO3_MEM0_nCS5          (0x02 << 6)
-#define S3C64XX_GPO3_EINT_G7_3          (0x03 << 6)
-#define S3C64XX_GPO4_EINT_G7_4          (0x03 << 8)
-#define S3C64XX_GPO5_EINT_G7_5          (0x03 << 10)
-#define S3C64XX_GPO6_MEM0_ADDR6         (0x02 << 12)
-#define S3C64XX_GPO6_EINT_G7_6          (0x03 << 12)
-#define S3C64XX_GPO7_MEM0_ADDR7         (0x02 << 14)
-#define S3C64XX_GPO7_EINT_G7_7          (0x03 << 14)
-#define S3C64XX_GPO8_MEM0_ADDR8         (0x02 << 16)
-#define S3C64XX_GPO8_EINT_G7_8          (0x03 << 16)
-#define S3C64XX_GPO9_MEM0_ADDR9         (0x02 << 18)
-#define S3C64XX_GPO9_EINT_G7_9          (0x03 << 18)
-#define S3C64XX_GPO10_MEM0_ADDR10       (0x02 << 20)
-#define S3C64XX_GPO10_EINT_G7_10        (0x03 << 20)
-#define S3C64XX_GPO11_MEM0_ADDR11       (0x02 << 22)
-#define S3C64XX_GPO11_EINT_G7_11        (0x03 << 22)
-#define S3C64XX_GPO12_MEM0_ADDR12       (0x02 << 24)
-#define S3C64XX_GPO12_EINT_G7_12        (0x03 << 24)
-#define S3C64XX_GPO13_MEM0_ADDR13       (0x02 << 26)
-#define S3C64XX_GPO13_EINT_G7_13        (0x03 << 26)
-#define S3C64XX_GPO14_MEM0_ADDR14       (0x02 << 28)
-#define S3C64XX_GPO14_EINT_G7_14        (0x03 << 28)
-#define S3C64XX_GPO15_MEM0_ADDR15       (0x02 << 30)
-#define S3C64XX_GPO15_EINT_G7_15        (0x03 << 30)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
deleted file mode 100644
index 46bcfb63b8de..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank P register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPPCON                  (S3C64XX_GPP_BASE + 0x00)
-#define S3C64XX_GPPDAT                  (S3C64XX_GPP_BASE + 0x04)
-#define S3C64XX_GPPPUD                  (S3C64XX_GPP_BASE + 0x08)
-#define S3C64XX_GPPCONSLP               (S3C64XX_GPP_BASE + 0x0c)
-#define S3C64XX_GPPPUDSLP               (S3C64XX_GPP_BASE + 0x10)
-#define S3C64XX_GPP_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPP_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPP_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPP0_MEM0_ADDRV         (0x02 << 0)
-#define S3C64XX_GPP0_EINT_G8_0          (0x03 << 0)
-#define S3C64XX_GPP1_MEM0_SMCLK         (0x02 << 2)
-#define S3C64XX_GPP1_EINT_G8_1          (0x03 << 2)
-#define S3C64XX_GPP2_MEM0_nWAIT         (0x02 << 4)
-#define S3C64XX_GPP2_EINT_G8_2          (0x03 << 4)
-#define S3C64XX_GPP3_MEM0_RDY0_ALE      (0x02 << 6)
-#define S3C64XX_GPP3_EINT_G8_3          (0x03 << 6)
-#define S3C64XX_GPP4_MEM0_RDY1_CLE      (0x02 << 8)
-#define S3C64XX_GPP4_EINT_G8_4          (0x03 << 8)
-#define S3C64XX_GPP5_MEM0_INTsm0_FWE    (0x02 << 10)
-#define S3C64XX_GPP5_EINT_G8_5          (0x03 << 10)
-#define S3C64XX_GPP6_MEM0_(null)        (0x02 << 12)
-#define S3C64XX_GPP6_EINT_G8_6          (0x03 << 12)
-#define S3C64XX_GPP7_MEM0_INTsm1_FRE    (0x02 << 14)
-#define S3C64XX_GPP7_EINT_G8_7          (0x03 << 14)
-#define S3C64XX_GPP8_MEM0_RPn_RnB       (0x02 << 16)
-#define S3C64XX_GPP8_EINT_G8_8          (0x03 << 16)
-#define S3C64XX_GPP9_MEM0_ATA_RESET     (0x02 << 18)
-#define S3C64XX_GPP9_EINT_G8_9          (0x03 << 18)
-#define S3C64XX_GPP10_MEM0_ATA_INPACK   (0x02 << 20)
-#define S3C64XX_GPP10_EINT_G8_10        (0x03 << 20)
-#define S3C64XX_GPP11_MEM0_ATA_REG      (0x02 << 22)
-#define S3C64XX_GPP11_EINT_G8_11        (0x03 << 22)
-#define S3C64XX_GPP12_MEM0_ATA_WE       (0x02 << 24)
-#define S3C64XX_GPP12_EINT_G8_12        (0x03 << 24)
-#define S3C64XX_GPP13_MEM0_ATA_OE       (0x02 << 26)
-#define S3C64XX_GPP13_EINT_G8_13        (0x03 << 26)
-#define S3C64XX_GPP14_MEM0_ATA_CD       (0x02 << 28)
-#define S3C64XX_GPP14_EINT_G8_14        (0x03 << 28)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
deleted file mode 100644
index 1712223487b0..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank Q register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPQCON                  (S3C64XX_GPQ_BASE + 0x00)
-#define S3C64XX_GPQDAT                  (S3C64XX_GPQ_BASE + 0x04)
-#define S3C64XX_GPQPUD                  (S3C64XX_GPQ_BASE + 0x08)
-#define S3C64XX_GPQCONSLP               (S3C64XX_GPQ_BASE + 0x0c)
-#define S3C64XX_GPQPUDSLP               (S3C64XX_GPQ_BASE + 0x10)
-#define S3C64XX_GPQ_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPQ_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPQ_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPQ0_MEM0_ADDR18_RAS    (0x02 << 0)
-#define S3C64XX_GPQ0_EINT_G9_0          (0x03 << 0)
-#define S3C64XX_GPQ1_MEM0_ADDR19_CAS    (0x02 << 2)
-#define S3C64XX_GPQ1_EINT_G9_1          (0x03 << 2)
-#define S3C64XX_GPQ2_EINT_G9_2          (0x03 << 4)
-#define S3C64XX_GPQ3_EINT_G9_3          (0x03 << 6)
-#define S3C64XX_GPQ4_EINT_G9_4          (0x03 << 8)
-#define S3C64XX_GPQ5_EINT_G9_5          (0x03 << 10)
-#define S3C64XX_GPQ6_EINT_G9_6          (0x03 << 12)
-#define S3C64XX_GPQ7_MEM0_ADDR17_WENDMC (0x02 << 14)
-#define S3C64XX_GPQ7_EINT_G9_7          (0x03 << 14)
-#define S3C64XX_GPQ8_MEM0_ADDR16_APDMC  (0x02 << 16)
-#define S3C64XX_GPQ8_EINT_G9_8          (0x03 << 16)
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 686a4f270b12..2c0353a80906 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -50,7 +50,6 @@
 #include <mach/hardware.h>
 #include <mach/regs-fb.h>
 #include <mach/map.h>
-#include <mach/gpio-bank-f.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index 79412f735a8d..bc1c470b7de6 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -30,26 +30,18 @@
 #include <mach/regs-gpio-memport.h>
 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
-#include <mach/gpio-bank-n.h>
 void s3c_pm_debug_smdkled(u32 set, u32 clear)
 {
        unsigned long flags;
-        u32 reg;
+        int i;
        local_irq_save(flags);
-        reg = __raw_readl(S3C64XX_GPNCON);
+        for (i = 0; i < 4; i++) {
-        reg &= ~(S3C64XX_GPN_CONMASK(12) | S3C64XX_GPN_CONMASK(13) |
+                if (clear & (1 << i))
-                 S3C64XX_GPN_CONMASK(14) | S3C64XX_GPN_CONMASK(15));
+                        gpio_set_value(S3C64XX_GPN(12 + i), 0);
-        reg |= S3C64XX_GPN_OUTPUT(12) | S3C64XX_GPN_OUTPUT(13) |
+                if (set & (1 << i))
-               S3C64XX_GPN_OUTPUT(14) | S3C64XX_GPN_OUTPUT(15);
+                        gpio_set_value(S3C64XX_GPN(12 + i), 1);
-        __raw_writel(reg, S3C64XX_GPNCON);
+        }
-        reg = __raw_readl(S3C64XX_GPNDAT);
-        reg &= ~(clear << 12);
-        reg |= set << 12;
-        __raw_writel(reg, S3C64XX_GPNDAT);
        local_irq_restore(flags);
 }
 #endif
@@ -187,6 +179,18 @@ static int s3c64xx_pm_init(void)
        pm_cpu_prep = s3c64xx_pm_prepare;
        pm_cpu_sleep = s3c64xx_cpu_suspend;
        pm_uart_udivslot = 1;
+#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
+        gpio_request(S3C64XX_GPN(12), "DEBUG_LED0");
+        gpio_request(S3C64XX_GPN(13), "DEBUG_LED1");
+        gpio_request(S3C64XX_GPN(14), "DEBUG_LED2");
+        gpio_request(S3C64XX_GPN(15), "DEBUG_LED3");
+        gpio_direction_output(S3C64XX_GPN(12), 0);
+        gpio_direction_output(S3C64XX_GPN(13), 0);
+        gpio_direction_output(S3C64XX_GPN(14), 0);
+        gpio_direction_output(S3C64XX_GPN(15), 0);
+#endif
        return 0;
 }
diff --git a/arch/arm/mach-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c64xx/setup-i2c0.c
index 406192a43c6e..241af94a9e70 100644
--- a/arch/arm/mach-s3c64xx/setup-i2c0.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c0.c
@@ -18,14 +18,11 @@
 struct platform_device; /* don't need the contents */
-#include <mach/gpio-bank-b.h>
 #include <plat/iic.h>
 #include <plat/gpio-cfg.h>
 void s3c_i2c0_cfg_gpio(struct platform_device *dev)
 {
-        s3c_gpio_cfgpin(S3C64XX_GPB(5), S3C64XX_GPB5_I2C_SCL0);
+        s3c_gpio_cfgall_range(S3C64XX_GPB(5), 2,
-        s3c_gpio_cfgpin(S3C64XX_GPB(6), S3C64XX_GPB6_I2C_SDA0);
+                              S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-        s3c_gpio_setpull(S3C64XX_GPB(5), S3C_GPIO_PULL_UP);
-        s3c_gpio_setpull(S3C64XX_GPB(6), S3C_GPIO_PULL_UP);
 }
diff --git a/arch/arm/mach-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c64xx/setup-i2c1.c
index 1ee62c97cd7f..3d13a961986d 100644
--- a/arch/arm/mach-s3c64xx/setup-i2c1.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c1.c
@@ -18,14 +18,11 @@
 struct platform_device; /* don't need the contents */
-#include <mach/gpio-bank-b.h>
 #include <plat/iic.h>
 #include <plat/gpio-cfg.h>
 void s3c_i2c1_cfg_gpio(struct platform_device *dev)
 {
-        s3c_gpio_cfgpin(S3C64XX_GPB(2), S3C64XX_GPB2_I2C_SCL1);
+        s3c_gpio_cfgall_range(S3C64XX_GPB(2), 2,
-        s3c_gpio_cfgpin(S3C64XX_GPB(3), S3C64XX_GPB3_I2C_SDA1);
+                              S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP);
-        s3c_gpio_setpull(S3C64XX_GPB(2), S3C_GPIO_PULL_UP);
-        s3c_gpio_setpull(S3C64XX_GPB(3), S3C_GPIO_PULL_UP);
 }
diff --git a/arch/arm/mach-s3c64xx/sleep.S b/arch/arm/mach-s3c64xx/sleep.S
index afe5a762f46e..1f87732b2320 100644
--- a/arch/arm/mach-s3c64xx/sleep.S
+++ b/arch/arm/mach-s3c64xx/sleep.S
@@ -20,7 +20,6 @@
 #define S3C64XX_VA_GPIO (0x0)
 #include <mach/regs-gpio.h>
-#include <mach/gpio-bank-n.h>
 #define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT))
@@ -68,6 +67,13 @@ ENTRY(s3c_cpu_resume)
        ldr     r2, =LL_UART            /* for debug */
 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
+#define S3C64XX_GPNCON                  (S3C64XX_GPN_BASE + 0x00)
+#define S3C64XX_GPNDAT                  (S3C64XX_GPN_BASE + 0x04)
+#define S3C64XX_GPN_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
+#define S3C64XX_GPN_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
        /* Initialise the GPIO state if we are debugging via the SMDK LEDs,
         * as the uboot version supplied resets these to inputs during the
         * resume checks.
diff --git a/arch/arm/mach-s5p6442/Kconfig b/arch/arm/mach-s5p6442/Kconfig
deleted file mode 100644
index 33569e4007c4..000000000000
--- a/arch/arm/mach-s5p6442/Kconfig
+++ /dev/null
@@ -1,25 +0,0 @@
-# arch/arm/mach-s5p6442/Kconfig
-#
-# Copyright (c) 2010 Samsung Electronics Co., Ltd.
-#               http://www.samsung.com/
-#
-# Licensed under GPLv2
-# Configuration options for the S5P6442
-if ARCH_S5P6442
-config CPU_S5P6442
-        bool
-        select S3C_PL330_DMA
-        help
-          Enable S5P6442 CPU support
-config MACH_SMDK6442
-        bool "SMDK6442"
-        select CPU_S5P6442
-        select S3C_DEV_WDT
-        help
-          Machine support for Samsung SMDK6442
-endif
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile
deleted file mode 100644
index 90a3d8373416..000000000000
--- a/arch/arm/mach-s5p6442/Makefile
+++ /dev/null
@@ -1,24 +0,0 @@
-# arch/arm/mach-s5p6442/Makefile
-#
-# Copyright (c) 2010 Samsung Electronics Co., Ltd.
-#               http://www.samsung.com/
-#
-# Licensed under GPLv2
-obj-y                           :=
-obj-m                           :=
-obj-n                           :=
-obj-                            :=
-# Core support for S5P6442 system
-obj-$(CONFIG_CPU_S5P6442)       += cpu.o init.o clock.o dma.o
-obj-$(CONFIG_CPU_S5P6442)       += setup-i2c0.o
-# machine support
-obj-$(CONFIG_MACH_SMDK6442)     += mach-smdk6442.o
-# device support
-obj-y                           += dev-audio.o
-obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
diff --git a/arch/arm/mach-s5p6442/Makefile.boot b/arch/arm/mach-s5p6442/Makefile.boot
deleted file mode 100644
index ff90aa13bd67..000000000000
--- a/arch/arm/mach-s5p6442/Makefile.boot
+++ /dev/null
@@ -1,2 +0,0 @@
-   zreladdr-y   := 0x20008000
-params_phys-y   := 0x20000100
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c
deleted file mode 100644
index fbbc7bede685..000000000000
--- a/arch/arm/mach-s5p6442/clock.c
+++ /dev/null
@@ -1,420 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/clock.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - Clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <mach/map.h>
-#include <plat/cpu-freq.h>
-#include <mach/regs-clock.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-#include <plat/pll.h>
-#include <plat/s5p-clock.h>
-#include <plat/clock-clksrc.h>
-#include <plat/s5p6442.h>
-static struct clksrc_clk clk_mout_apll = {
-        .clk    = {
-                .name           = "mout_apll",
-                .id             = -1,
-        },
-        .sources        = &clk_src_apll,
-        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
-};
-static struct clksrc_clk clk_mout_mpll = {
-        .clk = {
-                .name           = "mout_mpll",
-                .id             = -1,
-        },
-        .sources        = &clk_src_mpll,
-        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
-};
-static struct clksrc_clk clk_mout_epll = {
-        .clk    = {
-                .name           = "mout_epll",
-                .id             = -1,
-        },
-        .sources        = &clk_src_epll,
-        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
-};
-/* Possible clock sources for ARM Mux */
-static struct clk *clk_src_arm_list[] = {
-        [1] = &clk_mout_apll.clk,
-        [2] = &clk_mout_mpll.clk,
-};
-static struct clksrc_sources clk_src_arm = {
-        .sources        = clk_src_arm_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_arm_list),
-};
-static struct clksrc_clk clk_mout_arm = {
-        .clk    = {
-                .name           = "mout_arm",
-                .id             = -1,
-        },
-        .sources        = &clk_src_arm,
-        .reg_src        = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 },
-};
-static struct clk clk_dout_a2m = {
-        .name           = "dout_a2m",
-        .id             = -1,
-        .parent         = &clk_mout_apll.clk,
-};
-/* Possible clock sources for D0 Mux */
-static struct clk *clk_src_d0_list[] = {
-        [1] = &clk_mout_mpll.clk,
-        [2] = &clk_dout_a2m,
-};
-static struct clksrc_sources clk_src_d0 = {
-        .sources        = clk_src_d0_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_d0_list),
-};
-static struct clksrc_clk clk_mout_d0 = {
-        .clk = {
-                .name           = "mout_d0",
-                .id             = -1,
-        },
-        .sources        = &clk_src_d0,
-        .reg_src        = { .reg = S5P_CLK_MUX_STAT0, .shift = 20, .size = 3 },
-};
-static struct clk clk_dout_apll = {
-        .name           = "dout_apll",
-        .id             = -1,
-        .parent         = &clk_mout_arm.clk,
-};
-/* Possible clock sources for D0SYNC Mux */
-static struct clk *clk_src_d0sync_list[] = {
-        [1] = &clk_mout_d0.clk,
-        [2] = &clk_dout_apll,
-};
-static struct clksrc_sources clk_src_d0sync = {
-        .sources        = clk_src_d0sync_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_d0sync_list),
-};
-static struct clksrc_clk clk_mout_d0sync = {
-        .clk    = {
-                .name           = "mout_d0sync",
-                .id             = -1,
-        },
-        .sources        = &clk_src_d0sync,
-        .reg_src        = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
-};
-/* Possible clock sources for D1 Mux */
-static struct clk *clk_src_d1_list[] = {
-        [1] = &clk_mout_mpll.clk,
-        [2] = &clk_dout_a2m,
-};
-static struct clksrc_sources clk_src_d1 = {
-        .sources        = clk_src_d1_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_d1_list),
-};
-static struct clksrc_clk clk_mout_d1 = {
-        .clk    = {
-                .name           = "mout_d1",
-                .id             = -1,
-        },
-        .sources        = &clk_src_d1,
-        .reg_src        = { .reg = S5P_CLK_MUX_STAT0, .shift = 24, .size = 3 },
-};
-/* Possible clock sources for D1SYNC Mux */
-static struct clk *clk_src_d1sync_list[] = {
-        [1] = &clk_mout_d1.clk,
-        [2] = &clk_dout_apll,
-};
-static struct clksrc_sources clk_src_d1sync = {
-        .sources        = clk_src_d1sync_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_d1sync_list),
-};
-static struct clksrc_clk clk_mout_d1sync = {
-        .clk    = {
-                .name           = "mout_d1sync",
-                .id             = -1,
-        },
-        .sources        = &clk_src_d1sync,
-        .reg_src        = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
-};
-static struct clk clk_hclkd0 = {
-        .name           = "hclkd0",
-        .id             = -1,
-        .parent         = &clk_mout_d0sync.clk,
-};
-static struct clk clk_hclkd1 = {
-        .name           = "hclkd1",
-        .id             = -1,
-        .parent         = &clk_mout_d1sync.clk,
-};
-static struct clk clk_pclkd0 = {
-        .name           = "pclkd0",
-        .id             = -1,
-        .parent         = &clk_hclkd0,
-};
-static struct clk clk_pclkd1 = {
-        .name           = "pclkd1",
-        .id             = -1,
-        .parent         = &clk_hclkd1,
-};
-int s5p6442_clk_ip0_ctrl(struct clk *clk, int enable)
-{
-        return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable);
-}
-int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable)
-{
-        return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
-}
-static struct clksrc_clk clksrcs[] = {
-        {
-                .clk    = {
-                        .name           = "dout_a2m",
-                        .id             = -1,
-                        .parent         = &clk_mout_apll.clk,
-                },
-                .sources = &clk_src_apll,
-                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
-                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 },
-        }, {
-                .clk    = {
-                        .name           = "dout_apll",
-                        .id             = -1,
-                        .parent         = &clk_mout_arm.clk,
-                },
-                .sources = &clk_src_arm,
-                .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 },
-                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 3 },
-        }, {
-                .clk    = {
-                        .name           = "hclkd1",
-                        .id             = -1,
-                        .parent         = &clk_mout_d1sync.clk,
-                },
-                .sources = &clk_src_d1sync,
-                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
-                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 24, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "hclkd0",
-                        .id             = -1,
-                        .parent         = &clk_mout_d0sync.clk,
-                },
-                .sources = &clk_src_d0sync,
-                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
-                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "pclkd0",
-                        .id             = -1,
-                        .parent         = &clk_hclkd0,
-                },
-                .sources = &clk_src_d0sync,
-                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
-                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 },
-        }, {
-                .clk    = {
-                        .name           = "pclkd1",
-                        .id             = -1,
-                        .parent         = &clk_hclkd1,
-                },
-                .sources = &clk_src_d1sync,
-                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
-                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 },
-        }
-};
-/* Clock initialisation code */
-static struct clksrc_clk *init_parents[] = {
-        &clk_mout_apll,
-        &clk_mout_mpll,
-        &clk_mout_epll,
-        &clk_mout_arm,
-        &clk_mout_d0,
-        &clk_mout_d0sync,
-        &clk_mout_d1,
-        &clk_mout_d1sync,
-};
-void __init_or_cpufreq s5p6442_setup_clocks(void)
-{
-        struct clk *pclkd0_clk;
-        struct clk *pclkd1_clk;
-        unsigned long xtal;
-        unsigned long arm;
-        unsigned long hclkd0 = 0;
-        unsigned long hclkd1 = 0;
-        unsigned long pclkd0 = 0;
-        unsigned long pclkd1 = 0;
-        unsigned long apll;
-        unsigned long mpll;
-        unsigned long epll;
-        unsigned int ptr;
-        printk(KERN_DEBUG "%s: registering clocks\n", __func__);
-        xtal = clk_get_rate(&clk_xtal);
-        printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
-        apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508);
-        mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
-        epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
-        printk(KERN_INFO "S5P6442: PLL settings, A=%ld, M=%ld, E=%ld",
-                        apll, mpll, epll);
-        clk_fout_apll.rate = apll;
-        clk_fout_mpll.rate = mpll;
-        clk_fout_epll.rate = epll;
-        for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
-                s3c_set_clksrc(init_parents[ptr], true);
-        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
-                s3c_set_clksrc(&clksrcs[ptr], true);
-        arm = clk_get_rate(&clk_dout_apll);
-        hclkd0 = clk_get_rate(&clk_hclkd0);
-        hclkd1 = clk_get_rate(&clk_hclkd1);
-        pclkd0_clk = clk_get(NULL, "pclkd0");
-        BUG_ON(IS_ERR(pclkd0_clk));
-        pclkd0 = clk_get_rate(pclkd0_clk);
-        clk_put(pclkd0_clk);
-        pclkd1_clk = clk_get(NULL, "pclkd1");
-        BUG_ON(IS_ERR(pclkd1_clk));
-        pclkd1 = clk_get_rate(pclkd1_clk);
-        clk_put(pclkd1_clk);
-        printk(KERN_INFO "S5P6442: HCLKD0=%ld, HCLKD1=%ld, PCLKD0=%ld, PCLKD1=%ld\n",
-                        hclkd0, hclkd1, pclkd0, pclkd1);
-        /* For backward compatibility */
-        clk_f.rate = arm;
-        clk_h.rate = hclkd1;
-        clk_p.rate = pclkd1;
-        clk_pclkd0.rate = pclkd0;
-        clk_pclkd1.rate = pclkd1;
-}
-static struct clk init_clocks_off[] = {
-        {
-                .name           = "pdma",
-                .id             = -1,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip0_ctrl,
-                .ctrlbit        = (1 << 3),
-        },
-};
-static struct clk init_clocks[] = {
-        {
-                .name           = "systimer",
-                .id             = -1,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip3_ctrl,
-                .ctrlbit        = (1<<16),
-        }, {
-                .name           = "uart",
-                .id             = 0,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip3_ctrl,
-                .ctrlbit        = (1<<17),
-        }, {
-                .name           = "uart",
-                .id             = 1,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip3_ctrl,
-                .ctrlbit        = (1<<18),
-        }, {
-                .name           = "uart",
-                .id             = 2,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip3_ctrl,
-                .ctrlbit        = (1<<19),
-        }, {
-                .name           = "watchdog",
-                .id             = -1,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip3_ctrl,
-                .ctrlbit        = (1 << 22),
-        }, {
-                .name           = "timers",
-                .id             = -1,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip3_ctrl,
-                .ctrlbit        = (1<<23),
-        },
-};
-static struct clk *clks[] __initdata = {
-        &clk_ext,
-        &clk_epll,
-        &clk_mout_apll.clk,
-        &clk_mout_mpll.clk,
-        &clk_mout_epll.clk,
-        &clk_mout_d0.clk,
-        &clk_mout_d0sync.clk,
-        &clk_mout_d1.clk,
-        &clk_mout_d1sync.clk,
-        &clk_hclkd0,
-        &clk_pclkd0,
-        &clk_hclkd1,
-        &clk_pclkd1,
-};
-void __init s5p6442_register_clocks(void)
-{
-        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
-        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
-        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
-        s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-        s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-        s3c_pwmclk_init();
-}
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
deleted file mode 100644
index 842af86bda6d..000000000000
--- a/arch/arm/mach-s5p6442/cpu.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/cpu.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/sysdev.h>
-#include <linux/serial_core.h>
-#include <linux/platform_device.h>
-#include <linux/sched.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-#include <asm/proc-fns.h>
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <asm/irq.h>
-#include <plat/regs-serial.h>
-#include <mach/regs-clock.h>
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/clock.h>
-#include <plat/s5p6442.h>
-/* Initial IO mappings */
-static struct map_desc s5p6442_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_SYSTIMER,
-                .pfn            = __phys_to_pfn(S5P6442_PA_SYSTIMER),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GPIO,
-                .pfn            = __phys_to_pfn(S5P6442_PA_GPIO),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC0,
-                .pfn            = __phys_to_pfn(S5P6442_PA_VIC0),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC1,
-                .pfn            = __phys_to_pfn(S5P6442_PA_VIC1),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC2,
-                .pfn            = __phys_to_pfn(S5P6442_PA_VIC2),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_UART,
-                .pfn            = __phys_to_pfn(S3C_PA_UART),
-                .length         = SZ_512K,
-                .type           = MT_DEVICE,
-        }
-};
-static void s5p6442_idle(void)
-{
-        if (!need_resched())
-                cpu_do_idle();
-        local_irq_enable();
-}
-/*
- * s5p6442_map_io
- *
- * register the standard cpu IO areas
- */
-void __init s5p6442_map_io(void)
-{
-        iotable_init(s5p6442_iodesc, ARRAY_SIZE(s5p6442_iodesc));
-}
-void __init s5p6442_init_clocks(int xtal)
-{
-        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
-        s3c24xx_register_baseclocks(xtal);
-        s5p_register_clocks(xtal);
-        s5p6442_register_clocks();
-        s5p6442_setup_clocks();
-}
-void __init s5p6442_init_irq(void)
-{
-        /* S5P6442 supports 3 VIC */
-        u32 vic[3];
-        /* VIC0, VIC1, and VIC2: some interrupt reserved */
-        vic[0] = 0x7fefffff;
-        vic[1] = 0X7f389c81;
-        vic[2] = 0X1bbbcfff;
-        s5p_init_irq(vic, ARRAY_SIZE(vic));
-}
-struct sysdev_class s5p6442_sysclass = {
-        .name   = "s5p6442-core",
-};
-static struct sys_device s5p6442_sysdev = {
-        .cls    = &s5p6442_sysclass,
-};
-static int __init s5p6442_core_init(void)
-{
-        return sysdev_class_register(&s5p6442_sysclass);
-}
-core_initcall(s5p6442_core_init);
-int __init s5p6442_init(void)
-{
-        printk(KERN_INFO "S5P6442: Initializing architecture\n");
-        /* set idle function */
-        pm_idle = s5p6442_idle;
-        return sysdev_register(&s5p6442_sysdev);
-}
diff --git a/arch/arm/mach-s5p6442/dev-audio.c b/arch/arm/mach-s5p6442/dev-audio.c
deleted file mode 100644
index 8719dc41fe32..000000000000
--- a/arch/arm/mach-s5p6442/dev-audio.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/dev-audio.c
- *
- * Copyright (c) 2010 Samsung Electronics Co. Ltd
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-#include <plat/gpio-cfg.h>
-#include <plat/audio.h>
-#include <mach/map.h>
-#include <mach/dma.h>
-#include <mach/irqs.h>
-static int s5p6442_cfg_i2s(struct platform_device *pdev)
-{
-        unsigned int base;
-        /* configure GPIO for i2s port */
-        switch (pdev->id) {
-        case 1:
-                base = S5P6442_GPC1(0);
-                break;
-        case 0:
-                base = S5P6442_GPC0(0);
-                break;
-        default:
-                printk(KERN_ERR "Invalid Device %d\n", pdev->id);
-                return -EINVAL;
-        }
-        s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2));
-        return 0;
-}
-static const char *rclksrc_v35[] = {
-        [0] = "busclk",
-        [1] = "i2sclk",
-};
-static struct s3c_audio_pdata i2sv35_pdata = {
-        .cfg_gpio = s5p6442_cfg_i2s,
-        .type = {
-                .i2s = {
-                        .quirks = QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR,
-                        .src_clk = rclksrc_v35,
-                },
-        },
-};
-static struct resource s5p6442_iis0_resource[] = {
-        [0] = {
-                .start = S5P6442_PA_I2S0,
-                .end   = S5P6442_PA_I2S0 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_I2S0_TX,
-                .end   = DMACH_I2S0_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_I2S0_RX,
-                .end   = DMACH_I2S0_RX,
-                .flags = IORESOURCE_DMA,
-        },
-        [3] = {
-                .start = DMACH_I2S0S_TX,
-                .end = DMACH_I2S0S_TX,
-                .flags = IORESOURCE_DMA,
-        },
-};
-struct platform_device s5p6442_device_iis0 = {
-        .name = "samsung-i2s",
-        .id = 0,
-        .num_resources    = ARRAY_SIZE(s5p6442_iis0_resource),
-        .resource         = s5p6442_iis0_resource,
-        .dev = {
-                .platform_data = &i2sv35_pdata,
-        },
-};
-static const char *rclksrc_v3[] = {
-        [0] = "iis",
-        [1] = "sclk_audio",
-};
-static struct s3c_audio_pdata i2sv3_pdata = {
-        .cfg_gpio = s5p6442_cfg_i2s,
-        .type = {
-                .i2s = {
-                        .src_clk = rclksrc_v3,
-                },
-        },
-};
-static struct resource s5p6442_iis1_resource[] = {
-        [0] = {
-                .start = S5P6442_PA_I2S1,
-                .end   = S5P6442_PA_I2S1 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_I2S1_TX,
-                .end   = DMACH_I2S1_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_I2S1_RX,
-                .end   = DMACH_I2S1_RX,
-                .flags = IORESOURCE_DMA,
-        },
-};
-struct platform_device s5p6442_device_iis1 = {
-        .name             = "samsung-i2s",
-        .id               = 1,
-        .num_resources    = ARRAY_SIZE(s5p6442_iis1_resource),
-        .resource         = s5p6442_iis1_resource,
-        .dev = {
-                .platform_data = &i2sv3_pdata,
-        },
-};
-/* PCM Controller platform_devices */
-static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev)
-{
-        unsigned int base;
-        switch (pdev->id) {
-        case 0:
-                base = S5P6442_GPC0(0);
-                break;
-        case 1:
-                base = S5P6442_GPC1(0);
-                break;
-        default:
-                printk(KERN_DEBUG "Invalid PCM Controller number!");
-                return -EINVAL;
-        }
-        s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3));
-        return 0;
-}
-static struct s3c_audio_pdata s3c_pcm_pdata = {
-        .cfg_gpio = s5p6442_pcm_cfg_gpio,
-};
-static struct resource s5p6442_pcm0_resource[] = {
-        [0] = {
-                .start = S5P6442_PA_PCM0,
-                .end   = S5P6442_PA_PCM0 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_PCM0_TX,
-                .end   = DMACH_PCM0_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_PCM0_RX,
-                .end   = DMACH_PCM0_RX,
-                .flags = IORESOURCE_DMA,
-        },
-};
-struct platform_device s5p6442_device_pcm0 = {
-        .name             = "samsung-pcm",
-        .id               = 0,
-        .num_resources    = ARRAY_SIZE(s5p6442_pcm0_resource),
-        .resource         = s5p6442_pcm0_resource,
-        .dev = {
-                .platform_data = &s3c_pcm_pdata,
-        },
-};
-static struct resource s5p6442_pcm1_resource[] = {
-        [0] = {
-                .start = S5P6442_PA_PCM1,
-                .end   = S5P6442_PA_PCM1 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_PCM1_TX,
-                .end   = DMACH_PCM1_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_PCM1_RX,
-                .end   = DMACH_PCM1_RX,
-                .flags = IORESOURCE_DMA,
-        },
-};
-struct platform_device s5p6442_device_pcm1 = {
-        .name             = "samsung-pcm",
-        .id               = 1,
-        .num_resources    = ARRAY_SIZE(s5p6442_pcm1_resource),
-        .resource         = s5p6442_pcm1_resource,
-        .dev = {
-                .platform_data = &s3c_pcm_pdata,
-        },
-};
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c
deleted file mode 100644
index cce8c2470709..000000000000
--- a/arch/arm/mach-s5p6442/dev-spi.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/dev-spi.c
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-#include <mach/dma.h>
-#include <mach/map.h>
-#include <mach/irqs.h>
-#include <mach/spi-clocks.h>
-#include <plat/s3c64xx-spi.h>
-#include <plat/gpio-cfg.h>
-static char *spi_src_clks[] = {
-        [S5P6442_SPI_SRCCLK_PCLK] = "pclk",
-        [S5P6442_SPI_SRCCLK_SCLK] = "spi_epll",
-};
-/* SPI Controller platform_devices */
-/* Since we emulate multi-cs capability, we do not touch the CS.
- * The emulated CS is toggled by board specific mechanism, as it can
- * be either some immediate GPIO or some signal out of some other
- * chip in between ... or some yet another way.
- * We simply do not assume anything about CS.
- */
-static int s5p6442_spi_cfg_gpio(struct platform_device *pdev)
-{
-        switch (pdev->id) {
-        case 0:
-                s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2));
-                s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP);
-                s3c_gpio_cfgall_range(S5P6442_GPB(2), 2,
-                                      S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-                break;
-        default:
-                dev_err(&pdev->dev, "Invalid SPI Controller number!");
-                return -EINVAL;
-        }
-        return 0;
-}
-static struct resource s5p6442_spi0_resource[] = {
-        [0] = {
-                .start = S5P6442_PA_SPI,
-                .end   = S5P6442_PA_SPI + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_SPI0_TX,
-                .end   = DMACH_SPI0_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_SPI0_RX,
-                .end   = DMACH_SPI0_RX,
-                .flags = IORESOURCE_DMA,
-        },
-        [3] = {
-                .start = IRQ_SPI0,
-                .end   = IRQ_SPI0,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-static struct s3c64xx_spi_info s5p6442_spi0_pdata = {
-        .cfg_gpio = s5p6442_spi_cfg_gpio,
-        .fifo_lvl_mask = 0x1ff,
-        .rx_lvl_offset = 15,
-};
-static u64 spi_dmamask = DMA_BIT_MASK(32);
-struct platform_device s5p6442_device_spi = {
-        .name             = "s3c64xx-spi",
-        .id               = 0,
-        .num_resources    = ARRAY_SIZE(s5p6442_spi0_resource),
-        .resource         = s5p6442_spi0_resource,
-        .dev = {
-                .dma_mask               = &spi_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                .platform_data = &s5p6442_spi0_pdata,
-        },
-};
-void __init s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
-{
-        struct s3c64xx_spi_info *pd;
-        /* Reject invalid configuration */
-        if (!num_cs || src_clk_nr < 0
-                        || src_clk_nr > S5P6442_SPI_SRCCLK_SCLK) {
-                printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
-                return;
-        }
-        switch (cntrlr) {
-        case 0:
-                pd = &s5p6442_spi0_pdata;
-                break;
-        default:
-                printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
-                                                        __func__, cntrlr);
-                return;
-        }
-        pd->num_cs = num_cs;
-        pd->src_clk_nr = src_clk_nr;
-        pd->src_clk_name = spi_src_clks[src_clk_nr];
-}
diff --git a/arch/arm/mach-s5p6442/dma.c b/arch/arm/mach-s5p6442/dma.c
deleted file mode 100644
index 7dfb13654f8a..000000000000
--- a/arch/arm/mach-s5p6442/dma.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <plat/devs.h>
-#include <plat/irqs.h>
-#include <mach/map.h>
-#include <mach/irqs.h>
-#include <plat/s3c-pl330-pdata.h>
-static u64 dma_dmamask = DMA_BIT_MASK(32);
-static struct resource s5p6442_pdma_resource[] = {
-        [0] = {
-                .start  = S5P6442_PA_PDMA,
-                .end    = S5P6442_PA_PDMA + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_PDMA,
-                .end    = IRQ_PDMA,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct s3c_pl330_platdata s5p6442_pdma_pdata = {
-        .peri = {
-                [0] = DMACH_UART0_RX,
-                [1] = DMACH_UART0_TX,
-                [2] = DMACH_UART1_RX,
-                [3] = DMACH_UART1_TX,
-                [4] = DMACH_UART2_RX,
-                [5] = DMACH_UART2_TX,
-                [6] = DMACH_MAX,
-                [7] = DMACH_MAX,
-                [8] = DMACH_MAX,
-                [9] = DMACH_I2S0_RX,
-                [10] = DMACH_I2S0_TX,
-                [11] = DMACH_I2S0S_TX,
-                [12] = DMACH_I2S1_RX,
-                [13] = DMACH_I2S1_TX,
-                [14] = DMACH_MAX,
-                [15] = DMACH_MAX,
-                [16] = DMACH_SPI0_RX,
-                [17] = DMACH_SPI0_TX,
-                [18] = DMACH_MAX,
-                [19] = DMACH_MAX,
-                [20] = DMACH_PCM0_RX,
-                [21] = DMACH_PCM0_TX,
-                [22] = DMACH_PCM1_RX,
-                [23] = DMACH_PCM1_TX,
-                [24] = DMACH_MAX,
-                [25] = DMACH_MAX,
-                [26] = DMACH_MAX,
-                [27] = DMACH_MSM_REQ0,
-                [28] = DMACH_MSM_REQ1,
-                [29] = DMACH_MSM_REQ2,
-                [30] = DMACH_MSM_REQ3,
-                [31] = DMACH_MAX,
-        },
-};
-static struct platform_device s5p6442_device_pdma = {
-        .name           = "s3c-pl330",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(s5p6442_pdma_resource),
-        .resource       = s5p6442_pdma_resource,
-        .dev            = {
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &s5p6442_pdma_pdata,
-        },
-};
-static struct platform_device *s5p6442_dmacs[] __initdata = {
-        &s5p6442_device_pdma,
-};
-static int __init s5p6442_dma_init(void)
-{
-        platform_add_devices(s5p6442_dmacs, ARRAY_SIZE(s5p6442_dmacs));
-        return 0;
-}
-arch_initcall(s5p6442_dma_init);
diff --git a/arch/arm/mach-s5p6442/include/mach/debug-macro.S b/arch/arm/mach-s5p6442/include/mach/debug-macro.S
deleted file mode 100644
index e2213205d780..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/debug-macro.S
+++ /dev/null
@@ -1,35 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/debug-macro.S
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-/* pull in the relevant register and map files. */
-#include <mach/map.h>
-#include <plat/regs-serial.h>
-        .macro addruart, rp, rv
-                ldr     \rp, = S3C_PA_UART
-                ldr     \rv, = S3C_VA_UART
-#if CONFIG_DEBUG_S3C_UART != 0
-                add     \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART)
-                add     \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART)
-#endif
-        .endm
-#define fifo_full fifo_full_s5pv210
-#define fifo_level fifo_level_s5pv210
-/* include the reset of the code which will do the work, we're only
- * compiling for a single cpu processor type so the default of s3c2440
- * will be fine with us.
- */
-#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6442/include/mach/dma.h b/arch/arm/mach-s5p6442/include/mach/dma.h
deleted file mode 100644
index 81209eb1409b..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/dma.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __MACH_DMA_H
-#define __MACH_DMA_H
-/* This platform uses the common S3C DMA API driver for PL330 */
-#include <plat/s3c-dma-pl330.h>
-#endif /* __MACH_DMA_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/entry-macro.S b/arch/arm/mach-s5p6442/include/mach/entry-macro.S
deleted file mode 100644
index 6d574edbf1ae..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/entry-macro.S
+++ /dev/null
@@ -1,48 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/entry-macro.S
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Low-level IRQ helper macros for the Samsung S5P6442
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <asm/hardware/vic.h>
-#include <mach/map.h>
-#include <plat/irqs.h>
-        .macro  disable_fiq
-        .endm
-        .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =VA_VIC0
-        .endm
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        @ check the vic0
-        mov     \irqnr, # S5P_IRQ_OFFSET + 31
-        ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
-        teq     \irqstat, #0
-        @ otherwise try vic1
-        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-        @ otherwise try vic2
-        addeq   \tmp, \base, #(VA_VIC2 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-        clzne   \irqstat, \irqstat
-        subne   \irqnr, \irqnr, \irqstat
-        .endm
diff --git a/arch/arm/mach-s5p6442/include/mach/gpio.h b/arch/arm/mach-s5p6442/include/mach/gpio.h
deleted file mode 100644
index b8715df2fdab..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/gpio.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/gpio.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - GPIO lib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H __FILE__
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
-/* GPIO bank sizes */
-#define S5P6442_GPIO_A0_NR      (8)
-#define S5P6442_GPIO_A1_NR      (2)
-#define S5P6442_GPIO_B_NR       (4)
-#define S5P6442_GPIO_C0_NR      (5)
-#define S5P6442_GPIO_C1_NR      (5)
-#define S5P6442_GPIO_D0_NR      (2)
-#define S5P6442_GPIO_D1_NR      (6)
-#define S5P6442_GPIO_E0_NR      (8)
-#define S5P6442_GPIO_E1_NR      (5)
-#define S5P6442_GPIO_F0_NR      (8)
-#define S5P6442_GPIO_F1_NR      (8)
-#define S5P6442_GPIO_F2_NR      (8)
-#define S5P6442_GPIO_F3_NR      (6)
-#define S5P6442_GPIO_G0_NR      (7)
-#define S5P6442_GPIO_G1_NR      (7)
-#define S5P6442_GPIO_G2_NR      (7)
-#define S5P6442_GPIO_H0_NR      (8)
-#define S5P6442_GPIO_H1_NR      (8)
-#define S5P6442_GPIO_H2_NR      (8)
-#define S5P6442_GPIO_H3_NR      (8)
-#define S5P6442_GPIO_J0_NR      (8)
-#define S5P6442_GPIO_J1_NR      (6)
-#define S5P6442_GPIO_J2_NR      (8)
-#define S5P6442_GPIO_J3_NR      (8)
-#define S5P6442_GPIO_J4_NR      (5)
-/* GPIO bank numbers */
-/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
- * space for debugging purposes so that any accidental
- * change from one gpio bank to another can be caught.
-*/
-#define S5P6442_GPIO_NEXT(__gpio) \
-        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
-enum s5p_gpio_number {
-        S5P6442_GPIO_A0_START   = 0,
-        S5P6442_GPIO_A1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_A0),
-        S5P6442_GPIO_B_START    = S5P6442_GPIO_NEXT(S5P6442_GPIO_A1),
-        S5P6442_GPIO_C0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_B),
-        S5P6442_GPIO_C1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_C0),
-        S5P6442_GPIO_D0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_C1),
-        S5P6442_GPIO_D1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_D0),
-        S5P6442_GPIO_E0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_D1),
-        S5P6442_GPIO_E1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_E0),
-        S5P6442_GPIO_F0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_E1),
-        S5P6442_GPIO_F1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F0),
-        S5P6442_GPIO_F2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F1),
-        S5P6442_GPIO_F3_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F2),
-        S5P6442_GPIO_G0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F3),
-        S5P6442_GPIO_G1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_G0),
-        S5P6442_GPIO_G2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_G1),
-        S5P6442_GPIO_H0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_G2),
-        S5P6442_GPIO_H1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H0),
-        S5P6442_GPIO_H2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H1),
-        S5P6442_GPIO_H3_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H2),
-        S5P6442_GPIO_J0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H3),
-        S5P6442_GPIO_J1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J0),
-        S5P6442_GPIO_J2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J1),
-        S5P6442_GPIO_J3_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J2),
-        S5P6442_GPIO_J4_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J3),
-};
-/* S5P6442 GPIO number definitions. */
-#define S5P6442_GPA0(_nr)       (S5P6442_GPIO_A0_START + (_nr))
-#define S5P6442_GPA1(_nr)       (S5P6442_GPIO_A1_START + (_nr))
-#define S5P6442_GPB(_nr)        (S5P6442_GPIO_B_START + (_nr))
-#define S5P6442_GPC0(_nr)       (S5P6442_GPIO_C0_START + (_nr))
-#define S5P6442_GPC1(_nr)       (S5P6442_GPIO_C1_START + (_nr))
-#define S5P6442_GPD0(_nr)       (S5P6442_GPIO_D0_START + (_nr))
-#define S5P6442_GPD1(_nr)       (S5P6442_GPIO_D1_START + (_nr))
-#define S5P6442_GPE0(_nr)       (S5P6442_GPIO_E0_START + (_nr))
-#define S5P6442_GPE1(_nr)       (S5P6442_GPIO_E1_START + (_nr))
-#define S5P6442_GPF0(_nr)       (S5P6442_GPIO_F0_START + (_nr))
-#define S5P6442_GPF1(_nr)       (S5P6442_GPIO_F1_START + (_nr))
-#define S5P6442_GPF2(_nr)       (S5P6442_GPIO_F2_START + (_nr))
-#define S5P6442_GPF3(_nr)       (S5P6442_GPIO_F3_START + (_nr))
-#define S5P6442_GPG0(_nr)       (S5P6442_GPIO_G0_START + (_nr))
-#define S5P6442_GPG1(_nr)       (S5P6442_GPIO_G1_START + (_nr))
-#define S5P6442_GPG2(_nr)       (S5P6442_GPIO_G2_START + (_nr))
-#define S5P6442_GPH0(_nr)       (S5P6442_GPIO_H0_START + (_nr))
-#define S5P6442_GPH1(_nr)       (S5P6442_GPIO_H1_START + (_nr))
-#define S5P6442_GPH2(_nr)       (S5P6442_GPIO_H2_START + (_nr))
-#define S5P6442_GPH3(_nr)       (S5P6442_GPIO_H3_START + (_nr))
-#define S5P6442_GPJ0(_nr)       (S5P6442_GPIO_J0_START + (_nr))
-#define S5P6442_GPJ1(_nr)       (S5P6442_GPIO_J1_START + (_nr))
-#define S5P6442_GPJ2(_nr)       (S5P6442_GPIO_J2_START + (_nr))
-#define S5P6442_GPJ3(_nr)       (S5P6442_GPIO_J3_START + (_nr))
-#define S5P6442_GPJ4(_nr)       (S5P6442_GPIO_J4_START + (_nr))
-/* the end of the S5P6442 specific gpios */
-#define S5P6442_GPIO_END        (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + 1)
-#define S3C_GPIO_END            S5P6442_GPIO_END
-/* define the number of gpios we need to the one after the GPJ4() range */
-#define ARCH_NR_GPIOS           (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) +     \
-                                 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
-#include <asm-generic/gpio.h>
-#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/hardware.h b/arch/arm/mach-s5p6442/include/mach/hardware.h
deleted file mode 100644
index 8cd7b67b49d4..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/hardware.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/hardware.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - Hardware support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H __FILE__
-/* currently nothing here, placeholder */
-#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/io.h b/arch/arm/mach-s5p6442/include/mach/io.h
deleted file mode 100644
index 5d2195ad0b67..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/io.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* arch/arm/mach-s5p6442/include/mach/io.h
- *
- * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
- *
- * Default IO routines for S5P6442
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-/* No current ISA/PCI bus support. */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-#endif
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h
deleted file mode 100644
index 3fbc6c3ad2da..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/irqs.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/irqs.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - IRQ definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_IRQS_H
-#define __ASM_ARCH_IRQS_H __FILE__
-#include <plat/irqs.h>
-/* VIC0 */
-#define IRQ_EINT16_31           S5P_IRQ_VIC0(16)
-#define IRQ_BATF                S5P_IRQ_VIC0(17)
-#define IRQ_MDMA                S5P_IRQ_VIC0(18)
-#define IRQ_PDMA                S5P_IRQ_VIC0(19)
-#define IRQ_TIMER0_VIC          S5P_IRQ_VIC0(21)
-#define IRQ_TIMER1_VIC          S5P_IRQ_VIC0(22)
-#define IRQ_TIMER2_VIC          S5P_IRQ_VIC0(23)
-#define IRQ_TIMER3_VIC          S5P_IRQ_VIC0(24)
-#define IRQ_TIMER4_VIC          S5P_IRQ_VIC0(25)
-#define IRQ_SYSTIMER            S5P_IRQ_VIC0(26)
-#define IRQ_WDT                 S5P_IRQ_VIC0(27)
-#define IRQ_RTC_ALARM           S5P_IRQ_VIC0(28)
-#define IRQ_RTC_TIC             S5P_IRQ_VIC0(29)
-#define IRQ_GPIOINT             S5P_IRQ_VIC0(30)
-/* VIC1 */
-#define IRQ_PMU                 S5P_IRQ_VIC1(0)
-#define IRQ_ONENAND             S5P_IRQ_VIC1(7)
-#define IRQ_UART0               S5P_IRQ_VIC1(10)
-#define IRQ_UART1               S5P_IRQ_VIC1(11)
-#define IRQ_UART2               S5P_IRQ_VIC1(12)
-#define IRQ_SPI0                S5P_IRQ_VIC1(15)
-#define IRQ_IIC                 S5P_IRQ_VIC1(19)
-#define IRQ_IIC1                S5P_IRQ_VIC1(20)
-#define IRQ_IIC2                S5P_IRQ_VIC1(21)
-#define IRQ_OTG                 S5P_IRQ_VIC1(24)
-#define IRQ_MSM                 S5P_IRQ_VIC1(25)
-#define IRQ_HSMMC0              S5P_IRQ_VIC1(26)
-#define IRQ_HSMMC1              S5P_IRQ_VIC1(27)
-#define IRQ_HSMMC2              S5P_IRQ_VIC1(28)
-#define IRQ_COMMRX              S5P_IRQ_VIC1(29)
-#define IRQ_COMMTX              S5P_IRQ_VIC1(30)
-/* VIC2 */
-#define IRQ_LCD0                S5P_IRQ_VIC2(0)
-#define IRQ_LCD1                S5P_IRQ_VIC2(1)
-#define IRQ_LCD2                S5P_IRQ_VIC2(2)
-#define IRQ_LCD3                S5P_IRQ_VIC2(3)
-#define IRQ_ROTATOR             S5P_IRQ_VIC2(4)
-#define IRQ_FIMC0               S5P_IRQ_VIC2(5)
-#define IRQ_FIMC1               S5P_IRQ_VIC2(6)
-#define IRQ_FIMC2               S5P_IRQ_VIC2(7)
-#define IRQ_JPEG                S5P_IRQ_VIC2(8)
-#define IRQ_3D                  S5P_IRQ_VIC2(10)
-#define IRQ_Mixer               S5P_IRQ_VIC2(11)
-#define IRQ_MFC                 S5P_IRQ_VIC2(14)
-#define IRQ_TVENC               S5P_IRQ_VIC2(15)
-#define IRQ_I2S0                S5P_IRQ_VIC2(16)
-#define IRQ_I2S1                S5P_IRQ_VIC2(17)
-#define IRQ_RP                  S5P_IRQ_VIC2(19)
-#define IRQ_PCM0                S5P_IRQ_VIC2(20)
-#define IRQ_PCM1                S5P_IRQ_VIC2(21)
-#define IRQ_ADC                 S5P_IRQ_VIC2(23)
-#define IRQ_PENDN               S5P_IRQ_VIC2(24)
-#define IRQ_KEYPAD              S5P_IRQ_VIC2(25)
-#define IRQ_SSS_INT             S5P_IRQ_VIC2(27)
-#define IRQ_SSS_HASH            S5P_IRQ_VIC2(28)
-#define IRQ_VIC_END             S5P_IRQ_VIC2(31)
-#define S5P_IRQ_EINT_BASE       (IRQ_VIC_END + 1)
-#define S5P_EINT_BASE1          (S5P_IRQ_VIC0(0))
-#define S5P_EINT_BASE2          (S5P_IRQ_EINT_BASE)
-/* Set the default NR_IRQS */
-#define NR_IRQS                 (IRQ_EINT(31) + 1)
-#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
deleted file mode 100644
index 058dab4482a1..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/map.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/map.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_MAP_H
-#define __ASM_ARCH_MAP_H __FILE__
-#include <plat/map-base.h>
-#include <plat/map-s5p.h>
-#define S5P6442_PA_SDRAM        0x20000000
-#define S5P6442_PA_I2S0         0xC0B00000
-#define S5P6442_PA_I2S1         0xF2200000
-#define S5P6442_PA_CHIPID       0xE0000000
-#define S5P6442_PA_SYSCON       0xE0100000
-#define S5P6442_PA_GPIO         0xE0200000
-#define S5P6442_PA_VIC0         0xE4000000
-#define S5P6442_PA_VIC1         0xE4100000
-#define S5P6442_PA_VIC2         0xE4200000
-#define S5P6442_PA_SROMC        0xE7000000
-#define S5P6442_PA_MDMA         0xE8000000
-#define S5P6442_PA_PDMA         0xE9000000
-#define S5P6442_PA_TIMER        0xEA000000
-#define S5P6442_PA_SYSTIMER     0xEA100000
-#define S5P6442_PA_WATCHDOG     0xEA200000
-#define S5P6442_PA_UART         0xEC000000
-#define S5P6442_PA_IIC0         0xEC100000
-#define S5P6442_PA_SPI          0xEC300000
-#define S5P6442_PA_PCM0         0xF2400000
-#define S5P6442_PA_PCM1         0xF2500000
-/* Compatibiltiy Defines */
-#define S3C_PA_IIC              S5P6442_PA_IIC0
-#define S3C_PA_WDT              S5P6442_PA_WATCHDOG
-#define S5P_PA_CHIPID           S5P6442_PA_CHIPID
-#define S5P_PA_SDRAM            S5P6442_PA_SDRAM
-#define S5P_PA_SROMC            S5P6442_PA_SROMC
-#define S5P_PA_SYSCON           S5P6442_PA_SYSCON
-#define S5P_PA_TIMER            S5P6442_PA_TIMER
-/* UART */
-#define S3C_PA_UART             S5P6442_PA_UART
-#define S5P_PA_UART(x)          (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
-#define S5P_PA_UART0            S5P_PA_UART(0)
-#define S5P_PA_UART1            S5P_PA_UART(1)
-#define S5P_PA_UART2            S5P_PA_UART(2)
-#define S5P_SZ_UART             SZ_256
-#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/memory.h b/arch/arm/mach-s5p6442/include/mach/memory.h
deleted file mode 100644
index cfe259dded33..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/memory.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/memory.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - Memory definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET                UL(0x20000000)
-#define CONSISTENT_DMA_SIZE     SZ_8M
-#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
deleted file mode 100644
index 2724b37def31..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
- *
- * S5P6442 - pwm clock and timer support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_PWMCLK_H
-#define __ASM_ARCH_PWMCLK_H __FILE__
-/**
- * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
- * @tcfg: The timer TCFG1 register bits shifted down to 0.
- *
- * Return true if the given configuration from TCFG1 is a TCLK instead
- * any of the TDIV clocks.
- */
-static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
-{
-        return tcfg == S3C64XX_TCFG1_MUX_TCLK;
-}
-/**
- * tcfg_to_divisor() - convert tcfg1 setting to a divisor
- * @tcfg1: The tcfg1 setting, shifted down.
- *
- * Get the divisor value for the given tcfg1 setting. We assume the
- * caller has already checked to see if this is not a TCLK source.
- */
-static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
-{
-        return 1 << tcfg1;
-}
-/**
- * pwm_tdiv_has_div1() - does the tdiv setting have a /1
- *
- * Return true if we have a /1 in the tdiv setting.
- */
-static inline unsigned int pwm_tdiv_has_div1(void)
-{
-        return 1;
-}
-/**
- * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
- * @div: The divisor to calculate the bit information for.
- *
- * Turn a divisor into the necessary bit field for TCFG1.
- */
-static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
-{
-        return ilog2(div);
-}
-#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
-#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-clock.h b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
deleted file mode 100644
index 00828a336991..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/regs-clock.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/regs-clock.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - Clock register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_REGS_CLOCK_H
-#define __ASM_ARCH_REGS_CLOCK_H __FILE__
-#include <mach/map.h>
-#define S5P_CLKREG(x)           (S3C_VA_SYS + (x))
-#define S5P_APLL_LOCK           S5P_CLKREG(0x00)
-#define S5P_MPLL_LOCK           S5P_CLKREG(0x08)
-#define S5P_EPLL_LOCK           S5P_CLKREG(0x10)
-#define S5P_VPLL_LOCK           S5P_CLKREG(0x20)
-#define S5P_APLL_CON            S5P_CLKREG(0x100)
-#define S5P_MPLL_CON            S5P_CLKREG(0x108)
-#define S5P_EPLL_CON            S5P_CLKREG(0x110)
-#define S5P_VPLL_CON            S5P_CLKREG(0x120)
-#define S5P_CLK_SRC0            S5P_CLKREG(0x200)
-#define S5P_CLK_SRC1            S5P_CLKREG(0x204)
-#define S5P_CLK_SRC2            S5P_CLKREG(0x208)
-#define S5P_CLK_SRC3            S5P_CLKREG(0x20C)
-#define S5P_CLK_SRC4            S5P_CLKREG(0x210)
-#define S5P_CLK_SRC5            S5P_CLKREG(0x214)
-#define S5P_CLK_SRC6            S5P_CLKREG(0x218)
-#define S5P_CLK_SRC_MASK0       S5P_CLKREG(0x280)
-#define S5P_CLK_SRC_MASK1       S5P_CLKREG(0x284)
-#define S5P_CLK_DIV0            S5P_CLKREG(0x300)
-#define S5P_CLK_DIV1            S5P_CLKREG(0x304)
-#define S5P_CLK_DIV2            S5P_CLKREG(0x308)
-#define S5P_CLK_DIV3            S5P_CLKREG(0x30C)
-#define S5P_CLK_DIV4            S5P_CLKREG(0x310)
-#define S5P_CLK_DIV5            S5P_CLKREG(0x314)
-#define S5P_CLK_DIV6            S5P_CLKREG(0x318)
-#define S5P_CLKGATE_IP0         S5P_CLKREG(0x460)
-#define S5P_CLKGATE_IP3         S5P_CLKREG(0x46C)
-/* CLK_OUT */
-#define S5P_CLK_OUT_SHIFT       (12)
-#define S5P_CLK_OUT_MASK        (0x1F << S5P_CLK_OUT_SHIFT)
-#define S5P_CLK_OUT             S5P_CLKREG(0x500)
-#define S5P_CLK_DIV_STAT0       S5P_CLKREG(0x1000)
-#define S5P_CLK_DIV_STAT1       S5P_CLKREG(0x1004)
-#define S5P_CLK_MUX_STAT0       S5P_CLKREG(0x1100)
-#define S5P_CLK_MUX_STAT1       S5P_CLKREG(0x1104)
-#define S5P_MDNIE_SEL           S5P_CLKREG(0x7008)
-/* Register Bit definition */
-#define S5P_EPLL_EN                     (1<<31)
-#define S5P_EPLL_MASK                   0xffffffff
-#define S5P_EPLLVAL(_m, _p, _s)         ((_m) << 16 | ((_p) << 8) | ((_s)))
-/* CLKDIV0 */
-#define S5P_CLKDIV0_APLL_SHIFT          (0)
-#define S5P_CLKDIV0_APLL_MASK           (0x7 << S5P_CLKDIV0_APLL_SHIFT)
-#define S5P_CLKDIV0_A2M_SHIFT           (4)
-#define S5P_CLKDIV0_A2M_MASK            (0x7 << S5P_CLKDIV0_A2M_SHIFT)
-#define S5P_CLKDIV0_D0CLK_SHIFT         (16)
-#define S5P_CLKDIV0_D0CLK_MASK          (0xF << S5P_CLKDIV0_D0CLK_SHIFT)
-#define S5P_CLKDIV0_P0CLK_SHIFT         (20)
-#define S5P_CLKDIV0_P0CLK_MASK          (0x7 << S5P_CLKDIV0_P0CLK_SHIFT)
-#define S5P_CLKDIV0_D1CLK_SHIFT         (24)
-#define S5P_CLKDIV0_D1CLK_MASK          (0xF << S5P_CLKDIV0_D1CLK_SHIFT)
-#define S5P_CLKDIV0_P1CLK_SHIFT         (28)
-#define S5P_CLKDIV0_P1CLK_MASK          (0x7 << S5P_CLKDIV0_P1CLK_SHIFT)
-/* Clock MUX status Registers */
-#define S5P_CLK_MUX_STAT0_APLL_SHIFT    (0)
-#define S5P_CLK_MUX_STAT0_APLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_APLL_SHIFT)
-#define S5P_CLK_MUX_STAT0_MPLL_SHIFT    (4)
-#define S5P_CLK_MUX_STAT0_MPLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_MPLL_SHIFT)
-#define S5P_CLK_MUX_STAT0_EPLL_SHIFT    (8)
-#define S5P_CLK_MUX_STAT0_EPLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_EPLL_SHIFT)
-#define S5P_CLK_MUX_STAT0_VPLL_SHIFT    (12)
-#define S5P_CLK_MUX_STAT0_VPLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_VPLL_SHIFT)
-#define S5P_CLK_MUX_STAT0_MUXARM_SHIFT  (16)
-#define S5P_CLK_MUX_STAT0_MUXARM_MASK   (0x7 << S5P_CLK_MUX_STAT0_MUXARM_SHIFT)
-#define S5P_CLK_MUX_STAT0_MUXD0_SHIFT   (20)
-#define S5P_CLK_MUX_STAT0_MUXD0_MASK    (0x7 << S5P_CLK_MUX_STAT0_MUXD0_SHIFT)
-#define S5P_CLK_MUX_STAT0_MUXD1_SHIFT   (24)
-#define S5P_CLK_MUX_STAT0_MUXD1_MASK    (0x7 << S5P_CLK_MUX_STAT0_MUXD1_SHIFT)
-#define S5P_CLK_MUX_STAT1_D1SYNC_SHIFT  (24)
-#define S5P_CLK_MUX_STAT1_D1SYNC_MASK   (0x7 << S5P_CLK_MUX_STAT1_D1SYNC_SHIFT)
-#define S5P_CLK_MUX_STAT1_D0SYNC_SHIFT  (28)
-#define S5P_CLK_MUX_STAT1_D0SYNC_MASK   (0x7 << S5P_CLK_MUX_STAT1_D0SYNC_SHIFT)
-#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-irq.h b/arch/arm/mach-s5p6442/include/mach/regs-irq.h
deleted file mode 100644
index 73782b52a83b..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/regs-irq.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/regs-irq.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - IRQ register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_REGS_IRQ_H
-#define __ASM_ARCH_REGS_IRQ_H __FILE__
-#include <asm/hardware/vic.h>
-#include <mach/map.h>
-#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/spi-clocks.h b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
deleted file mode 100644
index 7fd88205a97c..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __S5P6442_PLAT_SPI_CLKS_H
-#define __S5P6442_PLAT_SPI_CLKS_H __FILE__
-#define S5P6442_SPI_SRCCLK_PCLK         0
-#define S5P6442_SPI_SRCCLK_SCLK         1
-#endif /* __S5P6442_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/system.h b/arch/arm/mach-s5p6442/include/mach/system.h
deleted file mode 100644
index c30c1cc1b97e..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/system.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/system.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - system support header
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-#include <plat/system-reset.h>
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
-#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/tick.h b/arch/arm/mach-s5p6442/include/mach/tick.h
deleted file mode 100644
index e1d4cabf8297..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/tick.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/tick.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Based on arch/arm/mach-s3c6400/include/mach/tick.h
- *
- * S5P6442 - Timer tick support definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_TICK_H
-#define __ASM_ARCH_TICK_H __FILE__
-static inline u32 s3c24xx_ostimer_pending(void)
-{
-        u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
-        return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
-}
-#define TICK_MAX        (0xffffffff)
-#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/timex.h b/arch/arm/mach-s5p6442/include/mach/timex.h
deleted file mode 100644
index ff8f2fcadeb7..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/timex.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* arch/arm/mach-s5p6442/include/mach/timex.h
- *
- * Copyright (c) 2003-2010 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S5P6442 - time parameters
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_TIMEX_H
-#define __ASM_ARCH_TIMEX_H
-/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
- * a variable is useless. It seems as long as we make our timers an
- * exact multiple of HZ, any value that makes a 1->1 correspondence
- * for the time conversion functions to/from jiffies is acceptable.
-*/
-#define CLOCK_TICK_RATE 12000000
-#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/uncompress.h b/arch/arm/mach-s5p6442/include/mach/uncompress.h
deleted file mode 100644
index 5ac7cbeeb987..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/uncompress.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/uncompress.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - uncompress code
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_UNCOMPRESS_H
-#define __ASM_ARCH_UNCOMPRESS_H
-#include <mach/map.h>
-#include <plat/uncompress.h>
-static void arch_detect_cpu(void)
-{
-        /* we do not need to do any cpu detection here at the moment. */
-}
-#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/vmalloc.h b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
deleted file mode 100644
index 4aa55e55ac47..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/vmalloc.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* arch/arm/mach-s5p6442/include/mach/vmalloc.h
- *
- * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S5P6442 vmalloc definition
-*/
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-#define VMALLOC_END     0xF6000000UL
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p6442/init.c b/arch/arm/mach-s5p6442/init.c
deleted file mode 100644
index 1874bdb71e1d..000000000000
--- a/arch/arm/mach-s5p6442/init.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/s5p6442-init.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/serial_core.h>
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/s5p6442.h>
-#include <plat/regs-serial.h>
-static struct s3c24xx_uart_clksrc s5p6442_serial_clocks[] = {
-        [0] = {
-                .name           = "pclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-};
-/* uart registration process */
-void __init s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        struct s3c2410_uartcfg *tcfg = cfg;
-        u32 ucnt;
-        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
-                if (!tcfg->clocks) {
-                        tcfg->clocks = s5p6442_serial_clocks;
-                        tcfg->clocks_size = ARRAY_SIZE(s5p6442_serial_clocks);
-                }
-        }
-        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
-}
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c
deleted file mode 100644
index eaf6b9c489ff..000000000000
--- a/arch/arm/mach-s5p6442/mach-smdk6442.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/mach-smdk6442.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/serial_core.h>
-#include <linux/i2c.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <mach/map.h>
-#include <mach/regs-clock.h>
-#include <plat/regs-serial.h>
-#include <plat/s5p6442.h>
-#include <plat/devs.h>
-#include <plat/cpu.h>
-#include <plat/iic.h>
-/* Following are default values for UCON, ULCON and UFCON UART registers */
-#define SMDK6442_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
-                                 S3C2410_UCON_RXILEVEL |        \
-                                 S3C2410_UCON_TXIRQMODE |       \
-                                 S3C2410_UCON_RXIRQMODE |       \
-                                 S3C2410_UCON_RXFIFO_TOI |      \
-                                 S3C2443_UCON_RXERR_IRQEN)
-#define SMDK6442_ULCON_DEFAULT  S3C2410_LCON_CS8
-#define SMDK6442_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
-                                 S5PV210_UFCON_TXTRIG4 |        \
-                                 S5PV210_UFCON_RXTRIG4)
-static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
-        [0] = {
-                .hwport         = 0,
-                .flags          = 0,
-                .ucon           = SMDK6442_UCON_DEFAULT,
-                .ulcon          = SMDK6442_ULCON_DEFAULT,
-                .ufcon          = SMDK6442_UFCON_DEFAULT,
-        },
-        [1] = {
-                .hwport         = 1,
-                .flags          = 0,
-                .ucon           = SMDK6442_UCON_DEFAULT,
-                .ulcon          = SMDK6442_ULCON_DEFAULT,
-                .ufcon          = SMDK6442_UFCON_DEFAULT,
-        },
-        [2] = {
-                .hwport         = 2,
-                .flags          = 0,
-                .ucon           = SMDK6442_UCON_DEFAULT,
-                .ulcon          = SMDK6442_ULCON_DEFAULT,
-                .ufcon          = SMDK6442_UFCON_DEFAULT,
-        },
-};
-static struct platform_device *smdk6442_devices[] __initdata = {
-        &s3c_device_i2c0,
-        &samsung_asoc_dma,
-        &s5p6442_device_iis0,
-        &s3c_device_wdt,
-};
-static struct i2c_board_info smdk6442_i2c_devs0[] __initdata = {
-        { I2C_BOARD_INFO("wm8580", 0x1b), },
-};
-static void __init smdk6442_map_io(void)
-{
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
-        s3c24xx_init_clocks(12000000);
-        s3c24xx_init_uarts(smdk6442_uartcfgs, ARRAY_SIZE(smdk6442_uartcfgs));
-}
-static void __init smdk6442_machine_init(void)
-{
-        s3c_i2c0_set_platdata(NULL);
-        i2c_register_board_info(0, smdk6442_i2c_devs0,
-                        ARRAY_SIZE(smdk6442_i2c_devs0));
-        platform_add_devices(smdk6442_devices, ARRAY_SIZE(smdk6442_devices));
-}
-MACHINE_START(SMDK6442, "SMDK6442")
-        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
-        .boot_params    = S5P_PA_SDRAM + 0x100,
-        .init_irq       = s5p6442_init_irq,
-        .map_io         = smdk6442_map_io,
-        .init_machine   = smdk6442_machine_init,
-        .timer          = &s3c24xx_timer,
-MACHINE_END
diff --git a/arch/arm/mach-s5p6442/setup-i2c0.c b/arch/arm/mach-s5p6442/setup-i2c0.c
deleted file mode 100644
index aad85656b0cc..000000000000
--- a/arch/arm/mach-s5p6442/setup-i2c0.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/setup-i2c0.c
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * I2C0 GPIO configuration.
- *
- * Based on plat-s3c64xx/setup-i2c0.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/gpio.h>
-struct platform_device; /* don't need the contents */
-#include <plat/gpio-cfg.h>
-#include <plat/iic.h>
-void s3c_i2c0_cfg_gpio(struct platform_device *dev)
-{
-        s3c_gpio_cfgall_range(S5P6442_GPD1(0), 2,
-                              S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-}
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index bf0b02414e5b..7c6cb4fa47a9 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -99,8 +99,11 @@ static void sdi0_configure(void)
        gpio_direction_output(sdi0_vsel, 0);
        gpio_direction_output(sdi0_en, 1);
-        /* Add the device */
+        /* Add the device, force v2 to subrevision 1 */
-        db8500_add_sdi0(&mop500_sdi0_data);
+        if (cpu_is_u8500v2())
+                db8500_add_sdi0(&mop500_sdi0_data, 0x10480180);
+        else
+                db8500_add_sdi0(&mop500_sdi0_data, 0);
 }
 void mop500_sdi_tc35892_init(void)
@@ -188,13 +191,18 @@ static struct mmci_platform_data mop500_sdi4_data = {
 void __init mop500_sdi_init(void)
 {
+        u32 periphid = 0;
+        /* v2 has a new version of this block that need to be forced */
+        if (cpu_is_u8500v2())
+                periphid = 0x10480180;
        /* PoP:ed eMMC on top of DB8500 v1.0 has problems with high speed */
        if (!cpu_is_u8500v10())
                mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED;
-        db8500_add_sdi2(&mop500_sdi2_data);
+        db8500_add_sdi2(&mop500_sdi2_data, periphid);
        /* On-board eMMC */
-        db8500_add_sdi4(&mop500_sdi4_data);
+        db8500_add_sdi4(&mop500_sdi4_data, periphid);
        if (machine_is_hrefv60()) {
                mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
diff --git a/arch/arm/mach-ux500/devices-common.h b/arch/arm/mach-ux500/devices-common.h
index c719b5a1d913..7825705033bf 100644
--- a/arch/arm/mach-ux500/devices-common.h
+++ b/arch/arm/mach-ux500/devices-common.h
@@ -28,18 +28,20 @@ dbx500_add_msp_spi(const char *name, resource_size_t base, int irq,
 static inline struct amba_device *
 dbx500_add_spi(const char *name, resource_size_t base, int irq,
-                                   struct spi_master_cntlr *pdata)
+               struct spi_master_cntlr *pdata,
+               u32 periphid)
 {
-        return dbx500_add_amba_device(name, base, irq, pdata, 0);
+        return dbx500_add_amba_device(name, base, irq, pdata, periphid);
 }
 struct mmci_platform_data;
 static inline struct amba_device *
 dbx500_add_sdi(const char *name, resource_size_t base, int irq,
-               struct mmci_platform_data *pdata)
+               struct mmci_platform_data *pdata,
+               u32 periphid)
 {
-        return dbx500_add_amba_device(name, base, irq, pdata, 0);
+        return dbx500_add_amba_device(name, base, irq, pdata, periphid);
 }
 struct amba_pl011_data;
diff --git a/arch/arm/mach-ux500/devices-db5500.h b/arch/arm/mach-ux500/devices-db5500.h
index 94627f7783b0..0c4bccd02b90 100644
--- a/arch/arm/mach-ux500/devices-db5500.h
+++ b/arch/arm/mach-ux500/devices-db5500.h
@@ -38,24 +38,34 @@
        ux500_add_usb(U5500_USBOTG_BASE, IRQ_DB5500_USBOTG, rx_cfg, tx_cfg)
 #define db5500_add_sdi0(pdata) \
-        dbx500_add_sdi("sdi0", U5500_SDI0_BASE, IRQ_DB5500_SDMMC0, pdata)
+        dbx500_add_sdi("sdi0", U5500_SDI0_BASE, IRQ_DB5500_SDMMC0, pdata, \
+                       0x10480180)
 #define db5500_add_sdi1(pdata) \
-        dbx500_add_sdi("sdi1", U5500_SDI1_BASE, IRQ_DB5500_SDMMC1, pdata)
+        dbx500_add_sdi("sdi1", U5500_SDI1_BASE, IRQ_DB5500_SDMMC1, pdata, \
+                       0x10480180)
 #define db5500_add_sdi2(pdata) \
-        dbx500_add_sdi("sdi2", U5500_SDI2_BASE, IRQ_DB5500_SDMMC2, pdata)
+        dbx500_add_sdi("sdi2", U5500_SDI2_BASE, IRQ_DB5500_SDMMC2, pdata \
+                       0x10480180)
 #define db5500_add_sdi3(pdata) \
-        dbx500_add_sdi("sdi3", U5500_SDI3_BASE, IRQ_DB5500_SDMMC3, pdata)
+        dbx500_add_sdi("sdi3", U5500_SDI3_BASE, IRQ_DB5500_SDMMC3, pdata \
+                       0x10480180)
 #define db5500_add_sdi4(pdata) \
-        dbx500_add_sdi("sdi4", U5500_SDI4_BASE, IRQ_DB5500_SDMMC4, pdata)
+        dbx500_add_sdi("sdi4", U5500_SDI4_BASE, IRQ_DB5500_SDMMC4, pdata \
+                       0x10480180)
+/* This one has a bad peripheral ID in the U5500 silicon */
 #define db5500_add_spi0(pdata) \
-        dbx500_add_spi("spi0", U5500_SPI0_BASE, IRQ_DB5500_SPI0, pdata)
+        dbx500_add_spi("spi0", U5500_SPI0_BASE, IRQ_DB5500_SPI0, pdata, \
+                       0x10080023)
 #define db5500_add_spi1(pdata) \
-        dbx500_add_spi("spi1", U5500_SPI1_BASE, IRQ_DB5500_SPI1, pdata)
+        dbx500_add_spi("spi1", U5500_SPI1_BASE, IRQ_DB5500_SPI1, pdata, \
+                       0x10080023)
 #define db5500_add_spi2(pdata) \
-        dbx500_add_spi("spi2", U5500_SPI2_BASE, IRQ_DB5500_SPI2, pdata)
+        dbx500_add_spi("spi2", U5500_SPI2_BASE, IRQ_DB5500_SPI2, pdata \
+                       0x10080023)
 #define db5500_add_spi3(pdata) \
-        dbx500_add_spi("spi3", U5500_SPI3_BASE, IRQ_DB5500_SPI3, pdata)
+        dbx500_add_spi("spi3", U5500_SPI3_BASE, IRQ_DB5500_SPI3, pdata \
+                       0x10080023)
 #define db5500_add_uart0(plat) \
        dbx500_add_uart("uart0", U5500_UART0_BASE, IRQ_DB5500_UART0, plat)
diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h
index 9cc6f8f5d3e6..cbd4a9ae8109 100644
--- a/arch/arm/mach-ux500/devices-db8500.h
+++ b/arch/arm/mach-ux500/devices-db8500.h
@@ -25,7 +25,7 @@ static inline struct amba_device *
 db8500_add_ssp(const char *name, resource_size_t base, int irq,
               struct pl022_ssp_controller *pdata)
 {
-        return dbx500_add_amba_device(name, base, irq, pdata, SSP_PER_ID);
+        return dbx500_add_amba_device(name, base, irq, pdata, 0);
 }
@@ -64,18 +64,18 @@ db8500_add_ssp(const char *name, resource_size_t base, int irq,
 #define db8500_add_usb(rx_cfg, tx_cfg) \
        ux500_add_usb(U8500_USBOTG_BASE, IRQ_DB8500_USBOTG, rx_cfg, tx_cfg)
-#define db8500_add_sdi0(pdata) \
+#define db8500_add_sdi0(pdata, pid) \
-        dbx500_add_sdi("sdi0", U8500_SDI0_BASE, IRQ_DB8500_SDMMC0, pdata)
+        dbx500_add_sdi("sdi0", U8500_SDI0_BASE, IRQ_DB8500_SDMMC0, pdata, pid)
-#define db8500_add_sdi1(pdata) \
+#define db8500_add_sdi1(pdata, pid) \
-        dbx500_add_sdi("sdi1", U8500_SDI1_BASE, IRQ_DB8500_SDMMC1, pdata)
+        dbx500_add_sdi("sdi1", U8500_SDI1_BASE, IRQ_DB8500_SDMMC1, pdata, pid)
-#define db8500_add_sdi2(pdata) \
+#define db8500_add_sdi2(pdata, pid) \
-        dbx500_add_sdi("sdi2", U8500_SDI2_BASE, IRQ_DB8500_SDMMC2, pdata)
+        dbx500_add_sdi("sdi2", U8500_SDI2_BASE, IRQ_DB8500_SDMMC2, pdata, pid)
-#define db8500_add_sdi3(pdata) \
+#define db8500_add_sdi3(pdata, pid) \
-        dbx500_add_sdi("sdi3", U8500_SDI3_BASE, IRQ_DB8500_SDMMC3, pdata)
+        dbx500_add_sdi("sdi3", U8500_SDI3_BASE, IRQ_DB8500_SDMMC3, pdata, pid)
-#define db8500_add_sdi4(pdata) \
+#define db8500_add_sdi4(pdata, pid) \
-        dbx500_add_sdi("sdi4", U8500_SDI4_BASE, IRQ_DB8500_SDMMC4, pdata)
+        dbx500_add_sdi("sdi4", U8500_SDI4_BASE, IRQ_DB8500_SDMMC4, pdata, pid)
-#define db8500_add_sdi5(pdata) \
+#define db8500_add_sdi5(pdata, pid) \
-        dbx500_add_sdi("sdi5", U8500_SDI5_BASE, IRQ_DB8500_SDMMC5, pdata)
+        dbx500_add_sdi("sdi5", U8500_SDI5_BASE, IRQ_DB8500_SDMMC5, pdata, pid)
 #define db8500_add_ssp0(pdata) \
        db8500_add_ssp("ssp0", U8500_SSP0_BASE, IRQ_DB8500_SSP0, pdata)
@@ -83,13 +83,13 @@ db8500_add_ssp(const char *name, resource_size_t base, int irq,
        db8500_add_ssp("ssp1", U8500_SSP1_BASE, IRQ_DB8500_SSP1, pdata)
 #define db8500_add_spi0(pdata) \
-        dbx500_add_spi("spi0", U8500_SPI0_BASE, IRQ_DB8500_SPI0, pdata)
+        dbx500_add_spi("spi0", U8500_SPI0_BASE, IRQ_DB8500_SPI0, pdata, 0)
 #define db8500_add_spi1(pdata) \
-        dbx500_add_spi("spi1", U8500_SPI1_BASE, IRQ_DB8500_SPI1, pdata)
+        dbx500_add_spi("spi1", U8500_SPI1_BASE, IRQ_DB8500_SPI1, pdata, 0)
 #define db8500_add_spi2(pdata) \
-        dbx500_add_spi("spi2", U8500_SPI2_BASE, IRQ_DB8500_SPI2, pdata)
+        dbx500_add_spi("spi2", U8500_SPI2_BASE, IRQ_DB8500_SPI2, pdata, 0)
 #define db8500_add_spi3(pdata) \
-        dbx500_add_spi("spi3", U8500_SPI3_BASE, IRQ_DB8500_SPI3, pdata)
+        dbx500_add_spi("spi3", U8500_SPI3_BASE, IRQ_DB8500_SPI3, pdata, 0)
 #define db8500_add_uart0(pdata) \
        dbx500_add_uart("uart0", U8500_UART0_BASE, IRQ_DB8500_UART0, pdata)
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index 2c6f71049f2e..470ac52663d6 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -29,9 +29,6 @@
 #include <mach/db8500-regs.h>
 #include <mach/db5500-regs.h>
-/* ST-Ericsson modified pl022 id */
-#define SSP_PER_ID              0x01080022
 #ifndef __ASSEMBLY__
 #include <mach/id.h>
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index c96fa1b3f49f..73b4a8b66a57 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -176,6 +176,7 @@ ENDPROC(v6_coherent_kern_range)
 */
 ENTRY(v6_flush_kern_dcache_area)
        add     r1, r0, r1
+        bic     r0, r0, #D_CACHE_LINE_SIZE - 1
 1:
 #ifdef HARVARD_CACHE
        mcr     p15, 0, r0, c7, c14, 1          @ clean & invalidate D line
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index dc18d81ef8ce..d32f02b61866 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -221,6 +221,8 @@ ENDPROC(v7_coherent_user_range)
 ENTRY(v7_flush_kern_dcache_area)
        dcache_line_size r2, r3
        add     r1, r0, r1
+        sub     r3, r2, #1
+        bic     r0, r0, r3
 1:
        mcr     p15, 0, r0, c7, c14, 1          @ clean & invalidate D line / unified line
        add     r0, r0, r2
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index b0ee9ba3cfab..8bfae964b133 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -24,9 +24,7 @@ DEFINE_PER_CPU(struct mm_struct *, current_mm);
 /*
 * We fork()ed a process, and we need a new context for the child
- * to run in.  We reserve version 0 for initial tasks so we will
+ * to run in.
- * always allocate an ASID. The ASID 0 is reserved for the TTBR
- * register changing sequence.
 */
 void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 {
@@ -36,8 +34,11 @@ void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 static void flush_context(void)
 {
-        /* set the reserved ASID before flushing the TLB */
+        u32 ttb;
-        asm("mcr        p15, 0, %0, c13, c0, 1\n" : : "r" (0));
+        /* Copy TTBR1 into TTBR0 */
+        asm volatile("mrc       p15, 0, %0, c2, c0, 1\n"
+                     "mcr       p15, 0, %0, c2, c0, 0"
+                     : "=r" (ttb));
        isb();
        local_flush_tlb_all();
        if (icache_is_vivt_asid_tagged()) {
@@ -93,7 +94,7 @@ static void reset_context(void *info)
                return;
        smp_rmb();
-        asid = cpu_last_asid + cpu + 1;
+        asid = cpu_last_asid + cpu;
        flush_context();
        set_mm_context(mm, asid);
@@ -143,13 +144,13 @@ void __new_context(struct mm_struct *mm)
         * to start a new version and flush the TLB.
         */
        if (unlikely((asid & ~ASID_MASK) == 0)) {
-                asid = cpu_last_asid + smp_processor_id() + 1;
+                asid = cpu_last_asid + smp_processor_id();
                flush_context();
 #ifdef CONFIG_SMP
                smp_wmb();
                smp_call_function(reset_context, NULL, 1);
 #endif
-                cpu_last_asid += NR_CPUS;
+                cpu_last_asid += NR_CPUS - 1;
        }
        set_mm_context(mm, asid);
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 3f17ea146f0e..2c2cce9cd8c8 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -15,12 +15,14 @@
 #include <linux/mman.h>
 #include <linux/nodemask.h>
 #include <linux/initrd.h>
+#include <linux/of_fdt.h>
 #include <linux/highmem.h>
 #include <linux/gfp.h>
 #include <linux/memblock.h>
 #include <linux/sort.h>
 #include <asm/mach-types.h>
+#include <asm/prom.h>
 #include <asm/sections.h>
 #include <asm/setup.h>
 #include <asm/sizes.h>
@@ -71,6 +73,14 @@ static int __init parse_tag_initrd2(const struct tag *tag)
 __tagtable(ATAG_INITRD2, parse_tag_initrd2);
+#ifdef CONFIG_OF_FLATTREE
+void __init early_init_dt_setup_initrd_arch(unsigned long start, unsigned long end)
+{
+        phys_initrd_start = start;
+        phys_initrd_size = end - start;
+}
+#endif /* CONFIG_OF_FLATTREE */
 /*
 * This keeps memory configuration data used by a couple memory
 * initialization functions, as well as show_mem() for the skipping
@@ -273,13 +283,15 @@ static void __init arm_bootmem_free(unsigned long min, unsigned long max_low,
        free_area_init_node(0, zone_size, min, zhole_size);
 }
-#ifndef CONFIG_SPARSEMEM
+#ifdef CONFIG_HAVE_ARCH_PFN_VALID
 int pfn_valid(unsigned long pfn)
 {
        return memblock_is_memory(pfn << PAGE_SHIFT);
 }
 EXPORT_SYMBOL(pfn_valid);
+#endif
+#ifndef CONFIG_SPARSEMEM
 static void arm_memory_present(void)
 {
 }
@@ -334,6 +346,7 @@ void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)
 #endif
        arm_mm_memblock_reserve();
+        arm_dt_memblock_reserve();
        /* reserve any platform specific memblock areas */
        if (mdesc->reserve)
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index d2384106af9c..5b3d7d543659 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -5,14 +5,9 @@ extern pmd_t *top_pmd;
 #define TOP_PTE(x)      pte_offset_kernel(top_pmd, x)
-static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt)
-{
-        return pmd_offset(pud_offset(pgd, virt), virt);
-}
 static inline pmd_t *pmd_off_k(unsigned long virt)
 {
-        return pmd_off(pgd_offset_k(virt), virt);
+        return pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
 }
 struct mem_type {
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 08a92368d9d3..9d9e736c2b4f 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -763,15 +763,12 @@ static void __init sanity_check_meminfo(void)
 {
        int i, j, highmem = 0;
-        lowmem_limit = __pa(vmalloc_min - 1) + 1;
-        memblock_set_current_limit(lowmem_limit);
        for (i = 0, j = 0; i < meminfo.nr_banks; i++) {
                struct membank *bank = &meminfo.bank[j];
                *bank = meminfo.bank[i];
 #ifdef CONFIG_HIGHMEM
-                if (__va(bank->start) > vmalloc_min ||
+                if (__va(bank->start) >= vmalloc_min ||
                    __va(bank->start) < (void *)PAGE_OFFSET)
                        highmem = 1;
@@ -829,6 +826,9 @@ static void __init sanity_check_meminfo(void)
                        bank->size = newsize;
                }
 #endif
+                if (!bank->highmem && bank->start + bank->size > lowmem_limit)
+                        lowmem_limit = bank->start + bank->size;
                j++;
        }
 #ifdef CONFIG_HIGHMEM
@@ -852,6 +852,7 @@ static void __init sanity_check_meminfo(void)
        }
 #endif
        meminfo.nr_banks = j;
+        memblock_set_current_limit(lowmem_limit);
 }
 static inline void prepare_page_table(void)
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index ab17cc0d3fa7..1d2b8451bf25 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -213,7 +213,9 @@ __v6_setup:
        mcr     p15, 0, r0, c2, c0, 2           @ TTB control register
        ALT_SMP(orr     r4, r4, #TTB_FLAGS_SMP)
        ALT_UP(orr      r4, r4, #TTB_FLAGS_UP)
-        mcr     p15, 0, r4, c2, c0, 1           @ load TTB1
+        ALT_SMP(orr     r8, r8, #TTB_FLAGS_SMP)
+        ALT_UP(orr      r8, r8, #TTB_FLAGS_UP)
+        mcr     p15, 0, r8, c2, c0, 1           @ load TTB1
 #endif /* CONFIG_MMU */
        adr     r5, v6_crval
        ldmia   r5, {r5, r6}
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index babfba09c89f..b3b566ec83d3 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -108,18 +108,16 @@ ENTRY(cpu_v7_switch_mm)
 #ifdef CONFIG_ARM_ERRATA_430973
        mcr     p15, 0, r2, c7, c5, 6           @ flush BTAC/BTB
 #endif
-#ifdef CONFIG_ARM_ERRATA_754322
+        mrc     p15, 0, r2, c2, c0, 1           @ load TTB 1
-        dsb
+        mcr     p15, 0, r2, c2, c0, 0           @ into TTB 0
-#endif
-        mcr     p15, 0, r2, c13, c0, 1          @ set reserved context ID
-        isb
-1:      mcr     p15, 0, r0, c2, c0, 0           @ set TTB 0
        isb
 #ifdef CONFIG_ARM_ERRATA_754322
        dsb
 #endif
        mcr     p15, 0, r1, c13, c0, 1          @ set context ID
        isb
+        mcr     p15, 0, r0, c2, c0, 0           @ set TTB 0
+        isb
 #endif
        mov     pc, lr
 ENDPROC(cpu_v7_switch_mm)
@@ -368,7 +366,9 @@ __v7_setup:
        mcr     p15, 0, r10, c2, c0, 2          @ TTB control register
        ALT_SMP(orr     r4, r4, #TTB_FLAGS_SMP)
        ALT_UP(orr      r4, r4, #TTB_FLAGS_UP)
-        mcr     p15, 0, r4, c2, c0, 1           @ load TTB1
+        ALT_SMP(orr     r8, r8, #TTB_FLAGS_SMP)
+        ALT_UP(orr      r8, r8, #TTB_FLAGS_UP)
+        mcr     p15, 0, r8, c2, c0, 1           @ load TTB1
        ldr     r5, =PRRR                       @ PRRR
        ldr     r6, =NMRR                       @ NMRR
        mcr     p15, 0, r5, c10, c2, 0          @ write PRRR
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 6751bcf7b888..e98f5c5c7879 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -7,7 +7,7 @@
 config PLAT_S5P
        bool
-        depends on (ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4)
+        depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4)
        default y
        select ARM_VIC if !ARCH_EXYNOS4
        select ARM_GIC if ARCH_EXYNOS4
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index 5cf5e721e6ca..bbc2aa7449ca 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -21,7 +21,6 @@
 #include <plat/cpu.h>
 #include <plat/s5p6440.h>
-#include <plat/s5p6442.h>
 #include <plat/s5p6450.h>
 #include <plat/s5pc100.h>
 #include <plat/s5pv210.h>
@@ -30,7 +29,6 @@
 /* table of supported CPUs */
 static const char name_s5p6440[] = "S5P6440";
-static const char name_s5p6442[] = "S5P6442";
 static const char name_s5p6450[] = "S5P6450";
 static const char name_s5pc100[] = "S5PC100";
 static const char name_s5pv210[] = "S5PV210/S5PC110";
@@ -46,14 +44,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .init           = s5p64x0_init,
                .name           = name_s5p6440,
        }, {
-                .idcode         = 0x36442000,
-                .idmask         = 0xfffff000,
-                .map_io         = s5p6442_map_io,
-                .init_clocks    = s5p6442_init_clocks,
-                .init_uarts     = s5p6442_init_uarts,
-                .init           = s5p6442_init,
-                .name           = name_s5p6442,
-        }, {
                .idcode         = 0x36450000,
                .idmask         = 0xfffff000,
                .map_io         = s5p6450_map_io,
diff --git a/arch/arm/plat-s5p/include/plat/s5p6442.h b/arch/arm/plat-s5p/include/plat/s5p6442.h
deleted file mode 100644
index 7b8801349c94..000000000000
--- a/arch/arm/plat-s5p/include/plat/s5p6442.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* arch/arm/plat-s5p/include/plat/s5p6442.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Header file for s5p6442 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-/* Common init code for S5P6442 related SoCs */
-extern void s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void s5p6442_register_clocks(void);
-extern void s5p6442_setup_clocks(void);
-#ifdef CONFIG_CPU_S5P6442
-extern  int s5p6442_init(void);
-extern void s5p6442_init_irq(void);
-extern void s5p6442_map_io(void);
-extern void s5p6442_init_clocks(int xtal);
-#define s5p6442_init_uarts s5p6442_common_init_uarts
-#else
-#define s5p6442_init_clocks NULL
-#define s5p6442_init_uarts NULL
-#define s5p6442_map_io NULL
-#define s5p6442_init NULL
-#endif
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 3aedac0034ba..c0a5741b23e6 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -86,7 +86,6 @@ extern struct sysdev_class s3c2443_sysclass;
 extern struct sysdev_class s3c6410_sysclass;
 extern struct sysdev_class s3c64xx_sysclass;
 extern struct sysdev_class s5p64x0_sysclass;
-extern struct sysdev_class s5p6442_sysclass;
 extern struct sysdev_class s5pv210_sysclass;
 extern struct sysdev_class exynos4_sysclass;
diff --git a/arch/arm/plat-samsung/include/plat/debug-macro.S b/arch/arm/plat-samsung/include/plat/debug-macro.S
index dc6efd90e8ff..207e275362a8 100644
--- a/arch/arm/plat-samsung/include/plat/debug-macro.S
+++ b/arch/arm/plat-samsung/include/plat/debug-macro.S
@@ -11,7 +11,7 @@
 #include <plat/regs-serial.h>
-/* The S5PV210/S5PC110 and S5P6442 implementations are as belows. */
+/* The S5PV210/S5PC110 implementations are as belows. */
        .macro fifo_level_s5pv210 rd, rx
                ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 39818d8da420..b61b8ee7cc52 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -111,12 +111,6 @@ extern struct platform_device exynos4_device_spdif;
 extern struct platform_device exynos4_device_pd[];
 extern struct platform_device exynos4_device_ahci;
-extern struct platform_device s5p6442_device_pcm0;
-extern struct platform_device s5p6442_device_pcm1;
-extern struct platform_device s5p6442_device_iis0;
-extern struct platform_device s5p6442_device_iis1;
-extern struct platform_device s5p6442_device_spi;
 extern struct platform_device s5p6440_device_pcm;
 extern struct platform_device s5p6440_device_iis;
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index 788837e99cb3..c151c5f94a87 100644
--- a/arch/arm/plat-samsung/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -194,7 +194,7 @@
 #define S3C64XX_UINTSP          0x34
 #define S3C64XX_UINTM           0x38
-/* Following are specific to S5PV210 and S5P6442 */
+/* Following are specific to S5PV210 */
 #define S5PV210_UCON_CLKMASK    (1<<10)
 #define S5PV210_UCON_PCLK       (0<<10)
 #define S5PV210_UCON_UCLK       (1<<10)
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index ff1a561b326e..0ffe34a21554 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -69,6 +69,5 @@ extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
 extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
 extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
 extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
-extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
 #endif /* __S3C64XX_PLAT_SPI_H */
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index bfc9d071db9b..aa677e2a3823 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -1014,6 +1014,7 @@ static struct platform_device *__initdata at32_usarts[4];
 void __init at32_map_usart(unsigned int hw_id, unsigned int line, int flags)
 {
        struct platform_device *pdev;
+        struct atmel_uart_data *pdata;
        switch (hw_id) {
        case 0:
@@ -1042,7 +1043,8 @@ void __init at32_map_usart(unsigned int hw_id, unsigned int line, int flags)
                data->regs = (void __iomem *)pdev->resource[0].start;
        }
-        pdev->id = line;
+        pdata = pdev->dev.platform_data;
+        pdata->num = portnr;
        at32_usarts[line] = pdev;
 }
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h
index 61740201b311..679458d9a622 100644
--- a/arch/avr32/mach-at32ap/include/mach/board.h
+++ b/arch/avr32/mach-at32ap/include/mach/board.h
@@ -33,6 +33,7 @@ extern struct platform_device *atmel_default_console_device;
 #define ATMEL_USART_CLK         0x04
 struct atmel_uart_data {
+        int             num;            /* port num */
        short           use_dma_tx;     /* use transmit DMA? */
        short           use_dma_rx;     /* use receive DMA? */
        void __iomem    *regs;          /* virtual base address, if any */
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c
index 00ee90f08343..b15cc219b1d9 100644
--- a/arch/microblaze/kernel/prom.c
+++ b/arch/microblaze/kernel/prom.c
@@ -130,7 +130,7 @@ void __init early_init_devtree(void *params)
         * device-tree, including the platform type, initrd location and
         * size, TCE reserve, and more ...
         */
-        of_scan_flat_dt(early_init_dt_scan_chosen, NULL);
+        of_scan_flat_dt(early_init_dt_scan_chosen, cmd_line);
        /* Scan memory nodes and rebuild MEMBLOCKs */
        memblock_init();
diff --git a/arch/mips/include/asm/prom.h b/arch/mips/include/asm/prom.h
index f29b862d9db3..857d9b7858ad 100644
--- a/arch/mips/include/asm/prom.h
+++ b/arch/mips/include/asm/prom.h
@@ -14,9 +14,6 @@
 #ifdef CONFIG_OF
 #include <asm/bootinfo.h>
-/* which is compatible with the flattened device tree (FDT) */
-#define cmd_line arcs_cmdline
 extern int early_init_dt_scan_memory_arch(unsigned long node,
        const char *uname, int depth, void *data);
diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c
index a19811e98a41..5b7eade41fa3 100644
--- a/arch/mips/kernel/prom.c
+++ b/arch/mips/kernel/prom.c
@@ -83,7 +83,8 @@ void __init early_init_devtree(void *params)
         * device-tree, including the platform type, initrd location and
         * size, and more ...
         */
-        of_scan_flat_dt(early_init_dt_scan_chosen, NULL);
+        of_scan_flat_dt(early_init_dt_scan_chosen, arcs_cmdline);
        /* Scan memory nodes */
        of_scan_flat_dt(early_init_dt_scan_root, NULL);
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 48aeb55faae9..f2c906b1d8d3 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -694,7 +694,7 @@ void __init early_init_devtree(void *params)
         * device-tree, including the platform type, initrd location and
         * size, TCE reserve, and more ...
         */
-        of_scan_flat_dt(early_init_dt_scan_chosen_ppc, NULL);
+        of_scan_flat_dt(early_init_dt_scan_chosen_ppc, cmd_line);
        /* Scan memory nodes and rebuild MEMBLOCKs */
        memblock_init();