4 files changed, 67 insertions, 0 deletions

diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index eaa1fc1bc5f5..d98934629604 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -26,6 +26,9 @@
 #include <mach/cp_intc.h>
 #include <mach/da8xx.h>
 
+#define DA850_EVM_PHY_MASK              0x1
+#define DA850_EVM_MDIO_FREQUENCY        2200000 /* PHY bus frequency */
+
 static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
         .bus_freq       = 100,  /* kHz */
         .bus_delay      = 0,    /* usec */
@@ -37,6 +40,7 @@ static struct davinci_uart_config da850_evm_uart_config __initdata = {
 
 static __init void da850_evm_init(void)
 {
+        struct davinci_soc_info *soc_info = &davinci_soc_info;
         int ret;
 
         ret = da8xx_register_edma();
@@ -54,6 +58,20 @@ static __init void da850_evm_init(void)
                 pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
                                 ret);
 
+        soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
+        soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
+        soc_info->emac_pdata->rmii_en = 0;
+
+        ret = da8xx_pinmux_setup(da850_cpgmac_pins);
+        if (ret)
+                pr_warning("da850_evm_init: cpgmac mux setup failed: %d\n",
+                                ret);
+
+        ret = da8xx_register_emac();
+        if (ret)
+                pr_warning("da850_evm_init: emac registration failed: %d\n",
+                                ret);
+
         ret = da8xx_register_watchdog();
         if (ret)
                 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 332cf7fadb1f..4a43ae2bec09 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -283,6 +283,12 @@ static struct clk rmii_clk = {
         .parent         = &pll0_sysclk7,
 };
 
+static struct clk emac_clk = {
+        .name           = "emac",
+        .parent         = &pll0_sysclk4,
+        .lpsc           = DA8XX_LPSC1_CPGMAC,
+};
+
 static struct davinci_clk da850_clks[] = {
         CLK(NULL,               "ref",          &ref_clk),
         CLK(NULL,               "pll0",         &pll0_clk),
@@ -319,6 +325,7 @@ static struct davinci_clk da850_clks[] = {
         CLK(NULL,               "emif3",        &emif3_clk),
         CLK(NULL,               "arm",          &arm_clk),
         CLK(NULL,               "rmii",         &rmii_clk),
+        CLK("davinci_emac.1",   NULL,           &emac_clk),
         CLK(NULL,               NULL,           NULL),
 };
 
@@ -347,6 +354,22 @@ static const struct mux_config da850_pins[] = {
         /* I2C0 function */
         MUX_CFG(DA850, I2C0_SDA,        4,      12,     15,     2,      false)
         MUX_CFG(DA850, I2C0_SCL,        4,      8,      15,     2,      false)
+        /* EMAC function */
+        MUX_CFG(DA850, MII_TXEN,        2,      4,      15,     8,      false)
+        MUX_CFG(DA850, MII_TXCLK,       2,      8,      15,     8,      false)
+        MUX_CFG(DA850, MII_COL,         2,      12,     15,     8,      false)
+        MUX_CFG(DA850, MII_TXD_3,       2,      16,     15,     8,      false)
+        MUX_CFG(DA850, MII_TXD_2,       2,      20,     15,     8,      false)
+        MUX_CFG(DA850, MII_TXD_1,       2,      24,     15,     8,      false)
+        MUX_CFG(DA850, MII_TXD_0,       2,      28,     15,     8,      false)
+        MUX_CFG(DA850, MII_RXCLK,       3,      0,      15,     8,      false)
+        MUX_CFG(DA850, MII_RXDV,        3,      4,      15,     8,      false)
+        MUX_CFG(DA850, MII_RXER,        3,      8,      15,     8,      false)
+        MUX_CFG(DA850, MII_CRS,         3,      12,     15,     8,      false)
+        MUX_CFG(DA850, MII_RXD_3,       3,      16,     15,     8,      false)
+        MUX_CFG(DA850, MII_RXD_2,       3,      20,     15,     8,      false)
+        MUX_CFG(DA850, MII_RXD_1,       3,      24,     15,     8,      false)
+        MUX_CFG(DA850, MII_RXD_0,       3,      28,     15,     8,      false)
 #endif
 };
 
@@ -375,6 +398,14 @@ const short da850_i2c1_pins[] __initdata = {
         -1
 };
 
+const short da850_cpgmac_pins[] __initdata = {
+        DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
+        DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
+        DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
+        DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0,
+        -1
+};
+
 /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
 static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
         [IRQ_DA8XX_COMMTX]              = 7,
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 594f9882e422..a8cb5709848d 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -99,6 +99,7 @@ extern const short da850_uart1_pins[];
 extern const short da850_uart2_pins[];
 extern const short da850_i2c0_pins[];
 extern const short da850_i2c1_pins[];
+extern const short da850_cpgmac_pins[];
 
 int da8xx_pinmux_setup(const short pins[]);
 
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index 3349fa5f82e1..368fca69197d 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -730,6 +730,23 @@ enum davinci_da850_index {
         /* I2C0 function */
         DA850_I2C0_SDA,
         DA850_I2C0_SCL,
+
+        /* EMAC function */
+        DA850_MII_TXEN,
+        DA850_MII_TXCLK,
+        DA850_MII_COL,
+        DA850_MII_TXD_3,
+        DA850_MII_TXD_2,
+        DA850_MII_TXD_1,
+        DA850_MII_TXD_0,
+        DA850_MII_RXER,
+        DA850_MII_CRS,
+        DA850_MII_RXCLK,
+        DA850_MII_RXDV,
+        DA850_MII_RXD_3,
+        DA850_MII_RXD_2,
+        DA850_MII_RXD_1,
+        DA850_MII_RXD_0,
 };
 
 #ifdef CONFIG_DAVINCI_MUX