diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/Kconfig | 2 | ||||
-rw-r--r-- | arch/x86/include/asm/apic.h | 3 | ||||
-rw-r--r-- | arch/x86/kernel/apic/io_apic.c | 29 |
3 files changed, 26 insertions, 8 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 3f27e5c0c9c9..229cf611d6ff 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
@@ -251,6 +251,7 @@ config SMP | |||
251 | config X86_X2APIC | 251 | config X86_X2APIC |
252 | bool "Support x2apic" | 252 | bool "Support x2apic" |
253 | depends on X86_LOCAL_APIC && X86_64 | 253 | depends on X86_LOCAL_APIC && X86_64 |
254 | select INTR_REMAP | ||
254 | ---help--- | 255 | ---help--- |
255 | This enables x2apic support on CPUs that have this feature. | 256 | This enables x2apic support on CPUs that have this feature. |
256 | 257 | ||
@@ -1879,7 +1880,6 @@ config DMAR_FLOPPY_WA | |||
1879 | config INTR_REMAP | 1880 | config INTR_REMAP |
1880 | bool "Support for Interrupt Remapping (EXPERIMENTAL)" | 1881 | bool "Support for Interrupt Remapping (EXPERIMENTAL)" |
1881 | depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL | 1882 | depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL |
1882 | select X86_X2APIC | ||
1883 | ---help--- | 1883 | ---help--- |
1884 | Supports Interrupt remapping for IO-APIC and MSI devices. | 1884 | Supports Interrupt remapping for IO-APIC and MSI devices. |
1885 | To use x2apic mode in the CPU's which support x2APIC enhancements or | 1885 | To use x2apic mode in the CPU's which support x2APIC enhancements or |
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index f9f0866ed6f8..42f2f8377422 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h | |||
@@ -107,11 +107,10 @@ extern u32 native_safe_apic_wait_icr_idle(void); | |||
107 | extern void native_apic_icr_write(u32 low, u32 id); | 107 | extern void native_apic_icr_write(u32 low, u32 id); |
108 | extern u64 native_apic_icr_read(void); | 108 | extern u64 native_apic_icr_read(void); |
109 | 109 | ||
110 | #ifdef CONFIG_X86_X2APIC | ||
111 | |||
112 | #define EIM_8BIT_APIC_ID 0 | 110 | #define EIM_8BIT_APIC_ID 0 |
113 | #define EIM_32BIT_APIC_ID 1 | 111 | #define EIM_32BIT_APIC_ID 1 |
114 | 112 | ||
113 | #ifdef CONFIG_X86_X2APIC | ||
115 | /* | 114 | /* |
116 | * Make previous memory operations globally visible before | 115 | * Make previous memory operations globally visible before |
117 | * sending the IPI through x2apic wrmsr. We need a serializing instruction or | 116 | * sending the IPI through x2apic wrmsr. We need a serializing instruction or |
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 0ad3fe77641a..767fe7e46d68 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -2524,7 +2524,7 @@ static void irq_complete_move(struct irq_desc **descp) | |||
2524 | static inline void irq_complete_move(struct irq_desc **descp) {} | 2524 | static inline void irq_complete_move(struct irq_desc **descp) {} |
2525 | #endif | 2525 | #endif |
2526 | 2526 | ||
2527 | #ifdef CONFIG_INTR_REMAP | 2527 | #ifdef CONFIG_X86_X2APIC |
2528 | static void __eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg) | 2528 | static void __eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg) |
2529 | { | 2529 | { |
2530 | int apic, pin; | 2530 | int apic, pin; |
@@ -2569,7 +2569,6 @@ static void ack_x2apic_edge(unsigned int irq) | |||
2569 | { | 2569 | { |
2570 | ack_x2APIC_irq(); | 2570 | ack_x2APIC_irq(); |
2571 | } | 2571 | } |
2572 | |||
2573 | #endif | 2572 | #endif |
2574 | 2573 | ||
2575 | static void ack_apic_edge(unsigned int irq) | 2574 | static void ack_apic_edge(unsigned int irq) |
@@ -2680,6 +2679,26 @@ static void ack_apic_level(unsigned int irq) | |||
2680 | #endif | 2679 | #endif |
2681 | } | 2680 | } |
2682 | 2681 | ||
2682 | #ifdef CONFIG_INTR_REMAP | ||
2683 | static void ir_ack_apic_edge(unsigned int irq) | ||
2684 | { | ||
2685 | #ifdef CONFIG_X86_X2APIC | ||
2686 | if (x2apic_enabled()) | ||
2687 | return ack_x2apic_edge(irq); | ||
2688 | #endif | ||
2689 | return ack_apic_edge(irq); | ||
2690 | } | ||
2691 | |||
2692 | static void ir_ack_apic_level(unsigned int irq) | ||
2693 | { | ||
2694 | #ifdef CONFIG_X86_X2APIC | ||
2695 | if (x2apic_enabled()) | ||
2696 | return ack_x2apic_level(irq); | ||
2697 | #endif | ||
2698 | return ack_apic_level(irq); | ||
2699 | } | ||
2700 | #endif /* CONFIG_INTR_REMAP */ | ||
2701 | |||
2683 | static struct irq_chip ioapic_chip __read_mostly = { | 2702 | static struct irq_chip ioapic_chip __read_mostly = { |
2684 | .name = "IO-APIC", | 2703 | .name = "IO-APIC", |
2685 | .startup = startup_ioapic_irq, | 2704 | .startup = startup_ioapic_irq, |
@@ -2699,8 +2718,8 @@ static struct irq_chip ir_ioapic_chip __read_mostly = { | |||
2699 | .mask = mask_IO_APIC_irq, | 2718 | .mask = mask_IO_APIC_irq, |
2700 | .unmask = unmask_IO_APIC_irq, | 2719 | .unmask = unmask_IO_APIC_irq, |
2701 | #ifdef CONFIG_INTR_REMAP | 2720 | #ifdef CONFIG_INTR_REMAP |
2702 | .ack = ack_x2apic_edge, | 2721 | .ack = ir_ack_apic_edge, |
2703 | .eoi = ack_x2apic_level, | 2722 | .eoi = ir_ack_apic_level, |
2704 | #ifdef CONFIG_SMP | 2723 | #ifdef CONFIG_SMP |
2705 | .set_affinity = set_ir_ioapic_affinity_irq, | 2724 | .set_affinity = set_ir_ioapic_affinity_irq, |
2706 | #endif | 2725 | #endif |
@@ -3426,7 +3445,7 @@ static struct irq_chip msi_ir_chip = { | |||
3426 | .unmask = unmask_msi_irq, | 3445 | .unmask = unmask_msi_irq, |
3427 | .mask = mask_msi_irq, | 3446 | .mask = mask_msi_irq, |
3428 | #ifdef CONFIG_INTR_REMAP | 3447 | #ifdef CONFIG_INTR_REMAP |
3429 | .ack = ack_x2apic_edge, | 3448 | .ack = ir_ack_apic_edge, |
3430 | #ifdef CONFIG_SMP | 3449 | #ifdef CONFIG_SMP |
3431 | .set_affinity = ir_set_msi_irq_affinity, | 3450 | .set_affinity = ir_set_msi_irq_affinity, |
3432 | #endif | 3451 | #endif |