aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s3c2410/include/mach/map.h2
-rw-r--r--arch/arm/mach-s3c24a0/include/mach/map.h2
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-serial.h6
3 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h
index 6b30361a0805..918e3463297f 100644
--- a/arch/arm/mach-s3c2410/include/mach/map.h
+++ b/arch/arm/mach-s3c2410/include/mach/map.h
@@ -101,4 +101,6 @@
101#define S3C24XX_PA_SDI S3C2410_PA_SDI 101#define S3C24XX_PA_SDI S3C2410_PA_SDI
102#define S3C24XX_PA_NAND S3C2410_PA_NAND 102#define S3C24XX_PA_NAND S3C2410_PA_NAND
103 103
104#define S3C_PA_UART S3C24XX_PA_UART
105
104#endif /* __ASM_ARCH_MAP_H */ 106#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s3c24a0/include/mach/map.h b/arch/arm/mach-s3c24a0/include/mach/map.h
index 2ce1839de4ee..6667355a47a1 100644
--- a/arch/arm/mach-s3c24a0/include/mach/map.h
+++ b/arch/arm/mach-s3c24a0/include/mach/map.h
@@ -80,4 +80,6 @@
80#define S3C24XX_PA_SDI S3C24A0_PA_SDI 80#define S3C24XX_PA_SDI S3C24A0_PA_SDI
81#define S3C24XX_PA_NAND S3C24A0_PA_NAND 81#define S3C24XX_PA_NAND S3C24A0_PA_NAND
82 82
83#define S3C_PA_UART S3C24A0_PA_UART
84
83#endif /* __ASM_ARCH_24A0_MAP_H */ 85#endif /* __ASM_ARCH_24A0_MAP_H */
diff --git a/arch/arm/plat-s3c/include/plat/regs-serial.h b/arch/arm/plat-s3c/include/plat/regs-serial.h
index 18ba31c7174c..3ca28585cf80 100644
--- a/arch/arm/plat-s3c/include/plat/regs-serial.h
+++ b/arch/arm/plat-s3c/include/plat/regs-serial.h
@@ -77,6 +77,12 @@
77#define S3C2440_UCON_FCLK (3<<10) 77#define S3C2440_UCON_FCLK (3<<10)
78#define S3C2443_UCON_EPLL (3<<10) 78#define S3C2443_UCON_EPLL (3<<10)
79 79
80#define S3C6400_UCON_CLKMASK (3<<10)
81#define S3C6400_UCON_PCLK (0<<10)
82#define S3C6400_UCON_PCLK2 (2<<10)
83#define S3C6400_UCON_UCLK0 (1<<10)
84#define S3C6400_UCON_UCLK1 (3<<10)
85
80#define S3C2440_UCON2_FCLK_EN (1<<15) 86#define S3C2440_UCON2_FCLK_EN (1<<15)
81#define S3C2440_UCON0_DIVMASK (15 << 12) 87#define S3C2440_UCON0_DIVMASK (15 << 12)
82#define S3C2440_UCON1_DIVMASK (15 << 12) 88#define S3C2440_UCON1_DIVMASK (15 << 12)