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-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts36
-rw-r--r--arch/powerpc/boot/dts/mpc8555cds.dts36
2 files changed, 72 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 6633e07d9f4d..f3f4d79deb63 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -145,6 +145,42 @@
145 device_type = "open-pic"; 145 device_type = "open-pic";
146 big-endian; 146 big-endian;
147 }; 147 };
148
149 cpm@919c0 {
150 #address-cells = <1>;
151 #size-cells = <1>;
152 compatible = "fsl,mpc8541-cpm", "fsl,cpm2";
153 reg = <919c0 30>;
154 ranges;
155
156 muram@80000 {
157 #address-cells = <1>;
158 #size-cells = <1>;
159 ranges = <0 80000 10000>;
160
161 data@0 {
162 compatible = "fsl,cpm-muram-data";
163 reg = <0 2000 9000 1000>;
164 };
165 };
166
167 brg@919f0 {
168 compatible = "fsl,mpc8541-brg",
169 "fsl,cpm2-brg",
170 "fsl,cpm-brg";
171 reg = <919f0 10 915f0 10>;
172 };
173
174 cpmpic: pic@90c00 {
175 interrupt-controller;
176 #address-cells = <0>;
177 #interrupt-cells = <2>;
178 interrupts = <2e 2>;
179 interrupt-parent = <&mpic>;
180 reg = <90c00 80>;
181 compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic";
182 };
183 };
148 }; 184 };
149 185
150 pci1: pci@e0008000 { 186 pci1: pci@e0008000 {
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 99199295147e..57029cca32b2 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -145,6 +145,42 @@
145 device_type = "open-pic"; 145 device_type = "open-pic";
146 big-endian; 146 big-endian;
147 }; 147 };
148
149 cpm@919c0 {
150 #address-cells = <1>;
151 #size-cells = <1>;
152 compatible = "fsl,mpc8555-cpm", "fsl,cpm2";
153 reg = <919c0 30>;
154 ranges;
155
156 muram@80000 {
157 #address-cells = <1>;
158 #size-cells = <1>;
159 ranges = <0 80000 10000>;
160
161 data@0 {
162 compatible = "fsl,cpm-muram-data";
163 reg = <0 2000 9000 1000>;
164 };
165 };
166
167 brg@919f0 {
168 compatible = "fsl,mpc8555-brg",
169 "fsl,cpm2-brg",
170 "fsl,cpm-brg";
171 reg = <919f0 10 915f0 10>;
172 };
173
174 cpmpic: pic@90c00 {
175 interrupt-controller;
176 #address-cells = <0>;
177 #interrupt-cells = <2>;
178 interrupts = <2e 2>;
179 interrupt-parent = <&mpic>;
180 reg = <90c00 80>;
181 compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic";
182 };
183 };
148 }; 184 };
149 185
150 pci1: pci@e0008000 { 186 pci1: pci@e0008000 {