180 files changed, 3953 insertions, 4363 deletions

diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 440dc62cdc3a..598ca61e7bca 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -13,8 +13,8 @@
 #include <asm/cacheflush.h>
 #include <asm/mach-types.h>
 
-const extern unsigned char relocate_new_kernel[];
-const extern unsigned int relocate_new_kernel_size;
+extern const unsigned char relocate_new_kernel[];
+extern const unsigned int relocate_new_kernel_size;
 
 extern void setup_mm_for_reboot(char mode);
 
diff --git a/arch/arm/mach-pxa/dma.c b/arch/arm/mach-pxa/dma.c
index b1514fb20d3a..7de17fc5d54b 100644
--- a/arch/arm/mach-pxa/dma.c
+++ b/arch/arm/mach-pxa/dma.c
@@ -121,20 +121,22 @@ int __init pxa_init_dma(int num_ch)
         if (dma_channels == NULL)
                 return -ENOMEM;
 
-        ret = request_irq(IRQ_DMA, dma_irq_handler, IRQF_DISABLED, "DMA", NULL);
-        if (ret) {
-                printk (KERN_CRIT "Wow!  Can't register IRQ for DMA\n");
-                kfree(dma_channels);
-                return ret;
-        }
-
         /* dma channel priorities on pxa2xx processors:
          * ch 0 - 3,  16 - 19  <--> (0) DMA_PRIO_HIGH
          * ch 4 - 7,  20 - 23  <--> (1) DMA_PRIO_MEDIUM
          * ch 8 - 15, 24 - 31  <--> (2) DMA_PRIO_LOW
          */
-        for (i = 0; i < num_ch; i++)
+        for (i = 0; i < num_ch; i++) {
+                DCSR(i) = 0;
                 dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW);
+        }
+
+        ret = request_irq(IRQ_DMA, dma_irq_handler, IRQF_DISABLED, "DMA", NULL);
+        if (ret) {
+                printk (KERN_CRIT "Wow!  Can't register IRQ for DMA\n");
+                kfree(dma_channels);
+                return ret;
+        }
 
         num_dma_channels = num_ch;
         return 0;
diff --git a/arch/arm/mach-pxa/include/mach/regs-ac97.h b/arch/arm/mach-pxa/include/mach/regs-ac97.h
index e41b9d202b8c..b8d14bd9ae59 100644
--- a/arch/arm/mach-pxa/include/mach/regs-ac97.h
+++ b/arch/arm/mach-pxa/include/mach/regs-ac97.h
@@ -1,6 +1,8 @@
 #ifndef __ASM_ARCH_REGS_AC97_H
 #define __ASM_ARCH_REGS_AC97_H
 
+#include <mach/hardware.h>
+
 /*
  * AC97 Controller registers
  */
diff --git a/arch/arm/mach-pxa/include/mach/regs-ssp.h b/arch/arm/mach-pxa/include/mach/regs-ssp.h
index 3c04cde2cf1f..cf31986f6f05 100644
--- a/arch/arm/mach-pxa/include/mach/regs-ssp.h
+++ b/arch/arm/mach-pxa/include/mach/regs-ssp.h
@@ -41,6 +41,9 @@
 #elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 #define SSCR0_SCR       (0x000fff00)    /* Serial Clock Rate (mask) */
 #define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */
+#endif
+
+#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 #define SSCR0_EDSS      (1 << 20)       /* Extended data size select */
 #define SSCR0_NCS       (1 << 21)       /* Network clock select */
 #define SSCR0_RIM       (1 << 22)       /* Receive FIFO overrrun interrupt mask */
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index f735e58e6669..83fb609b6eb7 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -88,13 +88,13 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
 static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0);
 
 static struct clk_lookup common_clkregs[] = {
-        INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", "NANDCLK"),
+        INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL),
 };
 
 static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
 
 static struct clk_lookup pxa310_clkregs[] = {
-        INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", "MMCCLK"),
+        INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", NULL),
 };
 
 static int __init pxa300_init(void)
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index effe408c186f..36f066196fa2 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -83,7 +83,7 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
 static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0);
 
 static struct clk_lookup pxa320_clkregs[] = {
-        INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", "NANDCLK"),
+        INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
 };
 
 static int __init pxa320_init(void)
diff --git a/arch/frv/mm/dma-alloc.c b/arch/frv/mm/dma-alloc.c
index dc6522c464d4..44840e73e907 100644
--- a/arch/frv/mm/dma-alloc.c
+++ b/arch/frv/mm/dma-alloc.c
@@ -36,10 +36,10 @@
 #include <linux/vmalloc.h>
 #include <linux/init.h>
 #include <linux/pci.h>
+#include <linux/hardirq.h>
 
 #include <asm/pgalloc.h>
 #include <asm/io.h>
-#include <asm/hardirq.h>
 #include <asm/mmu_context.h>
 #include <asm/pgtable.h>
 #include <asm/mmu.h>
diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
index 1a1f320c30d8..0884947ebe27 100644
--- a/arch/mips/include/asm/spinlock.h
+++ b/arch/mips/include/asm/spinlock.h
@@ -51,6 +51,7 @@ static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
 
         return (((counters >> 14) - counters) & 0x1fff) > 1;
 }
+#define __raw_spin_is_contended __raw_spin_is_contended
 
 static inline void __raw_spin_lock(raw_spinlock_t *lock)
 {
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 909a89cab9ac..3ebf7ec0484c 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -191,7 +191,8 @@
                         interrupts = <37 0x8 36 0x8 35 0x8>;
                         interrupt-parent = <&ipic>;
                         tbi-handle = < &tbi0 >;
-                        phy-handle = < &phy1 >;
+                        /* Vitesse 7385 isn't on the MDIO bus */
+                        fixed-link = <1 1 1000 0 0>;
                         fsl,magic-packet;
 
                         mdio@24520 {
@@ -199,12 +200,6 @@
                                 #size-cells = <0>;
                                 compatible = "fsl,gianfar-mdio";
                                 reg = <0x24520 0x20>;
-                                phy1: ethernet-phy@1 {
-                                        interrupt-parent = <&ipic>;
-                                        interrupts = <19 0x8>;
-                                        reg = <0x1>;
-                                        device_type = "ethernet-phy";
-                                };
                                 phy4: ethernet-phy@4 {
                                         interrupt-parent = <&ipic>;
                                         interrupts = <20 0x8>;
@@ -219,6 +214,8 @@
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
diff --git a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
index 9e47ae957e2e..409d017621a8 100644
--- a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
@@ -651,7 +651,7 @@ CONFIG_CICADA_PHY=y
 # CONFIG_NATIONAL_PHY is not set
 # CONFIG_STE10XP is not set
 # CONFIG_LSI_ET1011C_PHY is not set
-# CONFIG_FIXED_PHY is not set
+CONFIG_FIXED_PHY=y
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index 5355244c99ff..60c60ccf5e3c 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -195,8 +195,9 @@ __ftrace_make_nop(struct module *mod,
                 return -EINVAL;
         }
 
-        offset = (unsigned)((unsigned short)jmp[0]) << 16 |
-                (unsigned)((unsigned short)jmp[1]);
+        /* The bottom half is signed extended */
+        offset = ((unsigned)((unsigned short)jmp[0]) << 16) +
+                (int)((short)jmp[1]);
 
         DEBUGP(" %x ", offset);
 
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 19b12d2cbb4b..0f4181272311 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -561,8 +561,21 @@ int pci_mmap_legacy_page_range(struct pci_bus *bus,
                  (unsigned long long)(offset + size - 1));
 
         if (mmap_state == pci_mmap_mem) {
-                if ((offset + size) > hose->isa_mem_size)
-                        return -ENXIO;
+                /* Hack alert !
+                 *
+                 * Because X is lame and can fail starting if it gets an error trying
+                 * to mmap legacy_mem (instead of just moving on without legacy memory
+                 * access) we fake it here by giving it anonymous memory, effectively
+                 * behaving just like /dev/zero
+                 */
+                if ((offset + size) > hose->isa_mem_size) {
+                        printk(KERN_DEBUG
+                               "Process %s (pid:%d) mapped non-existing PCI legacy memory for 0%04x:%02x\n",
+                               current->comm, current->pid, pci_domain_nr(bus), bus->number);
+                        if (vma->vm_flags & VM_SHARED)
+                                return shmem_zero_setup(vma);
+                        return 0;
+                }
                 offset += hose->isa_mem_phys;
         } else {
                 unsigned long io_offset = (unsigned long)hose->io_base_virt - _IO_BASE;
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 4aae0c387645..13b7d54f185b 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -172,6 +172,8 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
                         }
                         break;
                 case 0x378:     /* orx */
+                        if (instr & 1)
+                                break;
                         rs = (instr >> 21) & 0x1f;
                         rb = (instr >> 11) & 0x1f;
                         if (rs == rb) {         /* mr */
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index 1971e4ee3d6e..ea6e41e39d9f 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -73,7 +73,7 @@ extern unsigned int tlbcam_index;
 /*
  * Return PA for this VA if it is mapped by a CAM, or 0
  */
-unsigned long v_mapped_by_tlbcam(unsigned long va)
+phys_addr_t v_mapped_by_tlbcam(unsigned long va)
 {
         int b;
         for (b = 0; b < tlbcam_index; ++b)
@@ -85,7 +85,7 @@ unsigned long v_mapped_by_tlbcam(unsigned long va)
 /*
  * Return VA for a given PA or 0 if not mapped
  */
-unsigned long p_mapped_by_tlbcam(unsigned long pa)
+unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
 {
         int b;
         for (b = 0; b < tlbcam_index; ++b)
diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/powerpc/mm/hash_low_32.S
index 67850ec9feb3..14af8cedab70 100644
--- a/arch/powerpc/mm/hash_low_32.S
+++ b/arch/powerpc/mm/hash_low_32.S
@@ -320,7 +320,7 @@ _GLOBAL(create_hpte)
         and     r8,r8,r0                /* writable if _RW & _DIRTY */
         rlwimi  r5,r5,32-1,30,30        /* _PAGE_USER -> PP msb */
         rlwimi  r5,r5,32-2,31,31        /* _PAGE_USER -> PP lsb */
-        ori     r8,r8,0xe14             /* clear out reserved bits and M */
+        ori     r8,r8,0xe04             /* clear out reserved bits */
         andc    r8,r5,r8                /* PP = user? (rw&dirty? 2: 3): 0 */
 BEGIN_FTR_SECTION
         rlwinm  r8,r8,0,~_PAGE_COHERENT /* clear M (coherence not required) */
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 22972cd83cc9..58bcaeba728d 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -61,8 +61,8 @@ void setbat(int index, unsigned long virt, phys_addr_t phys,
 
 #ifdef HAVE_TLBCAM
 extern unsigned int tlbcam_index;
-extern unsigned long v_mapped_by_tlbcam(unsigned long va);
-extern unsigned long p_mapped_by_tlbcam(unsigned long pa);
+extern phys_addr_t v_mapped_by_tlbcam(unsigned long va);
+extern unsigned long p_mapped_by_tlbcam(phys_addr_t pa);
 #else /* !HAVE_TLBCAM */
 #define v_mapped_by_tlbcam(x)   (0UL)
 #define p_mapped_by_tlbcam(x)   (0UL)
diff --git a/arch/powerpc/oprofile/cell/spu_profiler.c b/arch/powerpc/oprofile/cell/spu_profiler.c
index 9305ddaac512..b129d007e7fe 100644
--- a/arch/powerpc/oprofile/cell/spu_profiler.c
+++ b/arch/powerpc/oprofile/cell/spu_profiler.c
@@ -16,6 +16,7 @@
 #include <linux/smp.h>
 #include <linux/slab.h>
 #include <asm/cell-pmu.h>
+#include <asm/time.h>
 #include "pr_util.h"
 
 #define SCALE_SHIFT 14
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
index 9876d7e072f4..ddf0bdc0fc8b 100644
--- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -186,7 +186,7 @@ out_unmap_regs:
         iounmap(priv->regs);
 out_free_bootmem:
         free_bootmem((unsigned long)priv,
-                     sizeof(sizeof(struct pq2ads_pci_pic)));
+                     sizeof(struct pq2ads_pci_pic));
         of_node_put(np);
 out_unmap_irq:
         irq_dispose_mapping(irq);
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index a623ad256e9e..9b21ee68ea50 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -14,6 +14,7 @@
 #include <asm/firmware.h>
 #include <asm/machdep.h>
 #include <asm/pSeries_reconfig.h>
+#include <asm/sparsemem.h>
 
 static int pseries_remove_lmb(unsigned long base, unsigned int lmb_size)
 {
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index b16ca3ed65d2..78f1f7cca0a0 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -165,7 +165,7 @@ static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type)
                         edibit = (14 - (src - CPM2_IRQ_EXT1));
         else
                 if (src >= CPM2_IRQ_PORTC15 && src <= CPM2_IRQ_PORTC0)
-                        edibit = (31 - (src - CPM2_IRQ_PORTC15));
+                        edibit = (31 - (CPM2_IRQ_PORTC0 - src));
                 else
                         return (flow_type & IRQ_TYPE_LEVEL_LOW) ? 0 : -EINVAL;
 
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 88a983ece5c9..9a89cd3e80a2 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -890,7 +890,7 @@ unsigned int ipic_get_irq(void)
         return irq_linear_revmap(primary_ipic->irqhost, irq);
 }
 
-#ifdef CONFIG_PM
+#ifdef CONFIG_SUSPEND
 static struct {
         u32 sicfr;
         u32 siprr[2];
diff --git a/arch/s390/defconfig b/arch/s390/defconfig
index a0e748da9909..31e809c77790 100644
--- a/arch/s390/defconfig
+++ b/arch/s390/defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28-rc6
-# Thu Nov 27 11:00:49 2008
+# Linux kernel version: 2.6.29-rc4
+# Wed Feb 11 10:07:16 2009
 #
 CONFIG_SCHED_MC=y
 CONFIG_MMU=y
@@ -14,12 +14,14 @@ CONFIG_RWSEM_XCHGADD_ALGORITHM=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_BUG=y
 CONFIG_NO_IOMEM=y
 CONFIG_NO_DMA=y
 CONFIG_GENERIC_LOCKBREAK=y
 CONFIG_PGSTE=y
+CONFIG_VIRT_CPU_ACCOUNTING=y
 CONFIG_S390=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
@@ -39,20 +41,29 @@ CONFIG_POSIX_MQUEUE=y
 # CONFIG_TASKSTATS is not set
 CONFIG_AUDIT=y
 # CONFIG_AUDITSYSCALL is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=17
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
 CONFIG_CGROUPS=y
 # CONFIG_CGROUP_DEBUG is not set
 CONFIG_CGROUP_NS=y
 # CONFIG_CGROUP_FREEZER is not set
 # CONFIG_CGROUP_DEVICE is not set
 # CONFIG_CPUSETS is not set
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUP_CPUACCT is not set
 # CONFIG_RESOURCE_COUNTERS is not set
 CONFIG_SYSFS_DEPRECATED=y
@@ -63,6 +74,7 @@ CONFIG_UTS_NS=y
 CONFIG_IPC_NS=y
 # CONFIG_USER_NS is not set
 # CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -91,17 +103,17 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_KPROBES=y
+CONFIG_HAVE_SYSCALL_WRAPPERS=y
 CONFIG_KRETPROBES=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -109,7 +121,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 CONFIG_MODVERSIONS=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
+CONFIG_INIT_ALL_POSSIBLE=y
 CONFIG_STOP_MACHINE=y
 CONFIG_BLOCK=y
 # CONFIG_BLK_DEV_IO_TRACE is not set
@@ -130,7 +142,6 @@ CONFIG_DEFAULT_DEADLINE=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="deadline"
 CONFIG_PREEMPT_NOTIFIERS=y
-CONFIG_CLASSIC_RCU=y
 # CONFIG_FREEZER is not set
 
 #
@@ -161,6 +172,7 @@ CONFIG_S390_EXEC_PROTECT=y
 CONFIG_MARCH_Z900=y
 # CONFIG_MARCH_Z990 is not set
 # CONFIG_MARCH_Z9_109 is not set
+# CONFIG_MARCH_Z10 is not set
 CONFIG_PACK_STACK=y
 # CONFIG_SMALL_STACK is not set
 CONFIG_CHECK_STACK=y
@@ -174,7 +186,6 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
 # CONFIG_PREEMPT_NONE is not set
 # CONFIG_PREEMPT_VOLUNTARY is not set
 CONFIG_PREEMPT=y
-# CONFIG_PREEMPT_RCU is not set
 CONFIG_ARCH_SPARSEMEM_ENABLE=y
 CONFIG_ARCH_SPARSEMEM_DEFAULT=y
 CONFIG_ARCH_SELECT_MEMORY_MODEL=y
@@ -195,7 +206,6 @@ CONFIG_MEMORY_HOTREMOVE=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_MIGRATION=y
-CONFIG_RESOURCES_64BIT=y
 CONFIG_PHYS_ADDR_T_64BIT=y
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_BOUNCE=y
@@ -207,7 +217,6 @@ CONFIG_UNEVICTABLE_LRU=y
 #
 CONFIG_MACHCHK_WARNING=y
 CONFIG_QDIO=y
-# CONFIG_QDIO_DEBUG is not set
 CONFIG_CHSC_SCH=m
 
 #
@@ -227,15 +236,13 @@ CONFIG_PFAULT=y
 # CONFIG_SHARED_KERNEL is not set
 # CONFIG_CMM is not set
 # CONFIG_PAGE_STATES is not set
-CONFIG_VIRT_TIMER=y
-CONFIG_VIRT_CPU_ACCOUNTING=y
 # CONFIG_APPLDATA_BASE is not set
 CONFIG_HZ_100=y
 # CONFIG_HZ_250 is not set
 # CONFIG_HZ_300 is not set
 # CONFIG_HZ_1000 is not set
 CONFIG_HZ=100
-# CONFIG_SCHED_HRTICK is not set
+CONFIG_SCHED_HRTICK=y
 CONFIG_S390_HYPFS_FS=y
 CONFIG_KEXEC=y
 # CONFIG_ZFCPDUMP is not set
@@ -245,6 +252,7 @@ CONFIG_NET=y
 #
 # Networking options
 #
+CONFIG_COMPAT_NET_DEV_OPS=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
@@ -383,6 +391,7 @@ CONFIG_NET_SCH_TBF=m
 CONFIG_NET_SCH_GRED=m
 CONFIG_NET_SCH_DSMARK=m
 # CONFIG_NET_SCH_NETEM is not set
+# CONFIG_NET_SCH_DRR is not set
 # CONFIG_NET_SCH_INGRESS is not set
 
 #
@@ -400,6 +409,7 @@ CONFIG_CLS_U32_MARK=y
 CONFIG_NET_CLS_RSVP=m
 CONFIG_NET_CLS_RSVP6=m
 CONFIG_NET_CLS_FLOW=m
+# CONFIG_NET_CLS_CGROUP is not set
 # CONFIG_NET_EMATCH is not set
 CONFIG_NET_CLS_ACT=y
 CONFIG_NET_ACT_POLICE=y
@@ -411,6 +421,7 @@ CONFIG_NET_ACT_NAT=m
 # CONFIG_NET_ACT_SKBEDIT is not set
 # CONFIG_NET_CLS_IND is not set
 CONFIG_NET_SCH_FIFO=y
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -428,6 +439,7 @@ CONFIG_CAN_VCAN=m
 # CONFIG_CAN_DEBUG_DEVICES is not set
 # CONFIG_AF_RXRPC is not set
 # CONFIG_PHONET is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 # CONFIG_PCMCIA is not set
@@ -475,11 +487,15 @@ CONFIG_DASD_DIAG=y
 CONFIG_DASD_EER=y
 CONFIG_VIRTIO_BLK=m
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_C2PORT is not set
 
 #
+# EEPROM support
+#
+# CONFIG_EEPROM_93CX6 is not set
+
+#
 # SCSI device support
 #
 # CONFIG_RAID_ATTRS is not set
@@ -520,6 +536,7 @@ CONFIG_SCSI_FC_ATTRS=y
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
 # CONFIG_SCSI_DEBUG is not set
 CONFIG_ZFCP=y
 CONFIG_SCSI_DH=m
@@ -566,6 +583,10 @@ CONFIG_NET_ETHERNET=y
 CONFIG_NETDEV_1000=y
 CONFIG_NETDEV_10000=y
 # CONFIG_TR is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 # CONFIG_WAN is not set
 
 #
@@ -593,9 +614,11 @@ CONFIG_VIRTIO_NET=m
 #
 CONFIG_DEVKMEM=y
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
 CONFIG_HVC_DRIVER=y
+CONFIG_HVC_IUCV=y
 CONFIG_VIRTIO_CONSOLE=y
 CONFIG_HW_RANDOM=m
 CONFIG_HW_RANDOM_VIRTIO=m
@@ -645,7 +668,6 @@ CONFIG_S390_VMUR=m
 # CONFIG_NEW_LEDS is not set
 CONFIG_ACCESSIBILITY=y
 # CONFIG_STAGING is not set
-CONFIG_STAGING_EXCLUDE_BUILD=y
 
 #
 # File systems
@@ -668,6 +690,7 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -703,10 +726,7 @@ CONFIG_TMPFS_POSIX_ACL=y
 # CONFIG_HUGETLBFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_CONFIGFS_FS=m
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -715,6 +735,7 @@ CONFIG_CONFIGFS_FS=m
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -808,6 +829,7 @@ CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
@@ -818,15 +840,19 @@ CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
 # CONFIG_DYNAMIC_PRINTK_DEBUG is not set
 CONFIG_SAMPLES=y
 # CONFIG_SAMPLE_KOBJECT is not set
@@ -847,11 +873,17 @@ CONFIG_CRYPTO=y
 #
 CONFIG_CRYPTO_FIPS=y
 CONFIG_CRYPTO_ALGAPI=y
-CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_BLKCIPHER=y
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=m
+CONFIG_CRYPTO_RNG2=y
 CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
 CONFIG_CRYPTO_GF128MUL=m
 # CONFIG_CRYPTO_NULL is not set
 # CONFIG_CRYPTO_CRYPTD is not set
@@ -885,7 +917,7 @@ CONFIG_CRYPTO_HMAC=m
 #
 # Digest
 #
-# CONFIG_CRYPTO_CRC32C is not set
+CONFIG_CRYPTO_CRC32C=m
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=m
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -942,6 +974,7 @@ CONFIG_S390_PRNG=m
 # Library routines
 #
 CONFIG_BITREVERSE=m
+CONFIG_GENERIC_FIND_LAST_BIT=y
 # CONFIG_CRC_CCITT is not set
 # CONFIG_CRC16 is not set
 CONFIG_CRC_T10DIF=y
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index ffdef5fe8587..f3720defdd16 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -384,8 +384,8 @@ struct _lowcore
         __u32        panic_magic;              /* 0xe00 */
 
         /* Per cpu primary space access list */
-        __u8         pad_0xe04[0xe3c-0xe04];   /* 0xe04 */
-        __u32        vdso_per_cpu_data;        /* 0xe3c */
+        __u8         pad_0xe04[0xe38-0xe04];   /* 0xe04 */
+        __u64        vdso_per_cpu_data;        /* 0xe38 */
         __u32        paste[16];                /* 0xe40 */
 
         __u8         pad13[0x11b8-0xe80];      /* 0xe80 */
diff --git a/arch/s390/kernel/irq.c b/arch/s390/kernel/irq.c
index e7c5bfb7c755..026a37a94fc9 100644
--- a/arch/s390/kernel/irq.c
+++ b/arch/s390/kernel/irq.c
@@ -95,6 +95,7 @@ asmlinkage void do_softirq(void)
         local_irq_restore(flags);
 }
 
+#ifdef CONFIG_PROC_FS
 void init_irq_proc(void)
 {
         struct proc_dir_entry *root_irq_dir;
@@ -102,3 +103,4 @@ void init_irq_proc(void)
         root_irq_dir = proc_mkdir("irq", NULL);
         create_prof_cpu_mask(root_irq_dir);
 }
+#endif
diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S
index 8ffee714f932..a46c3a21e26d 100644
--- a/arch/sparc/kernel/head_64.S
+++ b/arch/sparc/kernel/head_64.S
@@ -891,10 +891,35 @@ prom_tba:	.xword	0
 tlb_type:       .word   0       /* Must NOT end up in BSS */
         .section        ".fixup",#alloc,#execinstr
 
-        .globl  __ret_efault, __retl_efault
-__ret_efault:
+        .globl  __ret_efault, __retl_efault, __ret_one, __retl_one
+ENTRY(__ret_efault)
         ret
          restore %g0, -EFAULT, %o0
-__retl_efault:
+ENDPROC(__ret_efault)
+
+ENTRY(__retl_efault)
         retl
          mov    -EFAULT, %o0
+ENDPROC(__retl_efault)
+
+ENTRY(__retl_one)
+        retl
+         mov    1, %o0
+ENDPROC(__retl_one)
+
+ENTRY(__ret_one_asi)
+        wr      %g0, ASI_AIUS, %asi
+        ret
+         restore %g0, 1, %o0
+ENDPROC(__ret_one_asi)
+
+ENTRY(__retl_one_asi)
+        wr      %g0, ASI_AIUS, %asi
+        retl
+         mov    1, %o0
+ENDPROC(__retl_one_asi)
+
+ENTRY(__retl_o1)
+        retl
+         mov    %o1, %o0
+ENDPROC(__retl_o1)
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c
index 09f088ed4a64..f3577223c863 100644
--- a/arch/sparc/kernel/nmi.c
+++ b/arch/sparc/kernel/nmi.c
@@ -70,6 +70,7 @@ static void die_nmi(const char *str, struct pt_regs *regs, int do_panic)
         printk(" on CPU%d, ip %08lx, registers:\n",
                smp_processor_id(), regs->tpc);
         show_regs(regs);
+        dump_stack();
 
         bust_spinlocks(0);
 
diff --git a/arch/sparc/kernel/pcr.c b/arch/sparc/kernel/pcr.c
index 92e0dda141a4..1ae8cdd7e703 100644
--- a/arch/sparc/kernel/pcr.c
+++ b/arch/sparc/kernel/pcr.c
@@ -133,11 +133,16 @@ int __init pcr_arch_init(void)
 
         case cheetah:
         case cheetah_plus:
-        case spitfire:
                 pcr_ops = &direct_pcr_ops;
                 pcr_enable = PCR_SUN4U_ENABLE;
                 break;
 
+        case spitfire:
+                /* UltraSPARC-I/II and derivatives lack a profile
+                 * counter overflow interrupt so we can't make use of
+                 * their hardware currently.
+                 */
+                /* fallthrough */
         default:
                 err = -ENODEV;
                 goto out_unregister;
diff --git a/arch/sparc/lib/GENbzero.S b/arch/sparc/lib/GENbzero.S
index 6a4f956a2f7a..8e7a843ddd88 100644
--- a/arch/sparc/lib/GENbzero.S
+++ b/arch/sparc/lib/GENbzero.S
@@ -6,13 +6,9 @@
 
 #define EX_ST(x,y)              \
 98:     x,y;                    \
-        .section .fixup;        \
-        .align 4;               \
-99:     retl;                   \
-         mov    %o1, %o0;       \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __retl_o1;   \
         .text;                  \
         .align 4;
 
diff --git a/arch/sparc/lib/GENcopy_from_user.S b/arch/sparc/lib/GENcopy_from_user.S
index 2b9df99e87f9..b7d0bd6b1406 100644
--- a/arch/sparc/lib/GENcopy_from_user.S
+++ b/arch/sparc/lib/GENcopy_from_user.S
@@ -5,13 +5,9 @@
 
 #define EX_LD(x)                \
 98:     x;                      \
-        .section .fixup;        \
-        .align 4;               \
-99:     retl;                   \
-         mov    1, %o0;         \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __retl_one;  \
         .text;                  \
         .align 4;
 
@@ -27,7 +23,7 @@
 #define PREAMBLE                                        \
         rd              %asi, %g1;                      \
         cmp             %g1, ASI_AIUS;                  \
-        bne,pn          %icc, memcpy_user_stub;         \
+        bne,pn          %icc, ___copy_in_user;          \
          nop
 #endif
 
diff --git a/arch/sparc/lib/GENcopy_to_user.S b/arch/sparc/lib/GENcopy_to_user.S
index bb3f7084daf9..780550e1afc7 100644
--- a/arch/sparc/lib/GENcopy_to_user.S
+++ b/arch/sparc/lib/GENcopy_to_user.S
@@ -5,13 +5,9 @@
 
 #define EX_ST(x)                \
 98:     x;                      \
-        .section .fixup;        \
-        .align 4;               \
-99:     retl;                   \
-         mov    1, %o0;         \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __retl_one;  \
         .text;                  \
         .align 4;
 
@@ -31,7 +27,7 @@
 #define PREAMBLE                                        \
         rd              %asi, %g1;                      \
         cmp             %g1, ASI_AIUS;                  \
-        bne,pn          %icc, memcpy_user_stub;         \
+        bne,pn          %icc, ___copy_in_user;          \
          nop
 #endif
 
diff --git a/arch/sparc/lib/NG2copy_from_user.S b/arch/sparc/lib/NG2copy_from_user.S
index c77ef5f22102..119ccb9a54f4 100644
--- a/arch/sparc/lib/NG2copy_from_user.S
+++ b/arch/sparc/lib/NG2copy_from_user.S
@@ -5,14 +5,9 @@
 
 #define EX_LD(x)                \
 98:     x;                      \
-        .section .fixup;        \
-        .align 4;               \
-99:     wr      %g0, ASI_AIUS, %asi;\
-        retl;                   \
-         mov    1, %o0;         \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __retl_one_asi;\
         .text;                  \
         .align 4;
 
@@ -33,7 +28,7 @@
 #define PREAMBLE                                        \
         rd              %asi, %g1;                      \
         cmp             %g1, ASI_AIUS;                  \
-        bne,pn          %icc, memcpy_user_stub;         \
+        bne,pn          %icc, ___copy_in_user;          \
          nop
 #endif
 
diff --git a/arch/sparc/lib/NG2copy_to_user.S b/arch/sparc/lib/NG2copy_to_user.S
index 4bd4093acbbd..7fe1ccefd9d0 100644
--- a/arch/sparc/lib/NG2copy_to_user.S
+++ b/arch/sparc/lib/NG2copy_to_user.S
@@ -5,14 +5,9 @@
 
 #define EX_ST(x)                \
 98:     x;                      \
-        .section .fixup;        \
-        .align 4;               \
-99:     wr      %g0, ASI_AIUS, %asi;\
-        retl;                   \
-         mov    1, %o0;         \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __retl_one_asi;\
         .text;                  \
         .align 4;
 
@@ -42,7 +37,7 @@
 #define PREAMBLE                                        \
         rd              %asi, %g1;                      \
         cmp             %g1, ASI_AIUS;                  \
-        bne,pn          %icc, memcpy_user_stub;         \
+        bne,pn          %icc, ___copy_in_user;          \
          nop
 #endif
 
diff --git a/arch/sparc/lib/NGbzero.S b/arch/sparc/lib/NGbzero.S
index 814d5f7a45e1..beab29bf419b 100644
--- a/arch/sparc/lib/NGbzero.S
+++ b/arch/sparc/lib/NGbzero.S
@@ -6,13 +6,9 @@
 
 #define EX_ST(x,y)              \
 98:     x,y;                    \
-        .section .fixup;        \
-        .align 4;               \
-99:     retl;                   \
-         mov    %o1, %o0;       \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __retl_o1;   \
         .text;                  \
         .align 4;
 
diff --git a/arch/sparc/lib/NGcopy_from_user.S b/arch/sparc/lib/NGcopy_from_user.S
index e7f433f71b42..5d1e4d1ac21e 100644
--- a/arch/sparc/lib/NGcopy_from_user.S
+++ b/arch/sparc/lib/NGcopy_from_user.S
@@ -5,14 +5,9 @@
 
 #define EX_LD(x)                \
 98:     x;                      \
-        .section .fixup;        \
-        .align 4;               \
-99:     wr      %g0, ASI_AIUS, %asi;\
-        ret;                    \
-         restore %g0, 1, %o0;   \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __ret_one_asi;\
         .text;                  \
         .align 4;
 
@@ -30,7 +25,7 @@
 #define PREAMBLE                                        \
         rd              %asi, %g1;                      \
         cmp             %g1, ASI_AIUS;                  \
-        bne,pn          %icc, memcpy_user_stub;         \
+        bne,pn          %icc, ___copy_in_user;          \
          nop
 #endif
 
diff --git a/arch/sparc/lib/NGcopy_to_user.S b/arch/sparc/lib/NGcopy_to_user.S
index 6ea01c5532a0..ff630dcb273c 100644
--- a/arch/sparc/lib/NGcopy_to_user.S
+++ b/arch/sparc/lib/NGcopy_to_user.S
@@ -5,14 +5,9 @@
 
 #define EX_ST(x)                \
 98:     x;                      \
-        .section .fixup;        \
-        .align 4;               \
-99:     wr      %g0, ASI_AIUS, %asi;\
-        ret;                    \
-         restore %g0, 1, %o0;   \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __ret_one_asi;\
         .text;                  \
         .align 4;
 
@@ -33,7 +28,7 @@
 #define PREAMBLE                                        \
         rd              %asi, %g1;                      \
         cmp             %g1, ASI_AIUS;                  \
-        bne,pn          %icc, memcpy_user_stub;         \
+        bne,pn          %icc, ___copy_in_user;          \
          nop
 #endif
 
diff --git a/arch/sparc/lib/U1copy_from_user.S b/arch/sparc/lib/U1copy_from_user.S
index 3192b0bf4fab..a6ae2ea04bf5 100644
--- a/arch/sparc/lib/U1copy_from_user.S
+++ b/arch/sparc/lib/U1copy_from_user.S
@@ -5,13 +5,9 @@
 
 #define EX_LD(x)                \
 98:     x;                      \
-        .section .fixup;        \
-        .align 4;               \
-99:     retl;                   \
-         mov    1, %o0;         \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __retl_one;  \
         .text;                  \
         .align 4;
 
@@ -27,7 +23,7 @@
 #define PREAMBLE                                        \
         rd              %asi, %g1;                      \
         cmp             %g1, ASI_AIUS;                  \
-        bne,pn          %icc, memcpy_user_stub;         \
+        bne,pn          %icc, ___copy_in_user;          \
          nop;                                           \
 
 #include "U1memcpy.S"
diff --git a/arch/sparc/lib/U1copy_to_user.S b/arch/sparc/lib/U1copy_to_user.S
index d1210ffb0b82..f4b970eeb485 100644
--- a/arch/sparc/lib/U1copy_to_user.S
+++ b/arch/sparc/lib/U1copy_to_user.S
@@ -5,13 +5,9 @@
 
 #define EX_ST(x)                \
 98:     x;                      \
-        .section .fixup;        \
-        .align 4;               \
-99:     retl;                   \
-         mov    1, %o0;         \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __retl_one;  \
         .text;                  \
         .align 4;
 
@@ -27,7 +23,7 @@
 #define PREAMBLE                                        \
         rd              %asi, %g1;                      \
         cmp             %g1, ASI_AIUS;                  \
-        bne,pn          %icc, memcpy_user_stub;         \
+        bne,pn          %icc, ___copy_in_user;          \
          nop;                                           \
 
 #include "U1memcpy.S"
diff --git a/arch/sparc/lib/U3copy_from_user.S b/arch/sparc/lib/U3copy_from_user.S
index f5bfc8d9d216..b1acd1331c33 100644
--- a/arch/sparc/lib/U3copy_from_user.S
+++ b/arch/sparc/lib/U3copy_from_user.S
@@ -5,13 +5,9 @@
 
 #define EX_LD(x)                \
 98:     x;                      \
-        .section .fixup;        \
-        .align 4;               \
-99:     retl;                   \
-         mov    1, %o0;         \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __retl_one;  \
         .text;                  \
         .align 4;
 
diff --git a/arch/sparc/lib/U3copy_to_user.S b/arch/sparc/lib/U3copy_to_user.S
index 2334f111bb0c..ef1e493afdfa 100644
--- a/arch/sparc/lib/U3copy_to_user.S
+++ b/arch/sparc/lib/U3copy_to_user.S
@@ -5,13 +5,9 @@
 
 #define EX_ST(x)                \
 98:     x;                      \
-        .section .fixup;        \
-        .align 4;               \
-99:     retl;                   \
-         mov    1, %o0;         \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __retl_one;  \
         .text;                  \
         .align 4;
 
@@ -27,7 +23,7 @@
 #define PREAMBLE                                        \
         rd              %asi, %g1;                      \
         cmp             %g1, ASI_AIUS;                  \
-        bne,pn          %icc, memcpy_user_stub;         \
+        bne,pn          %icc, ___copy_in_user;          \
          nop;                                           \
 
 #include "U3memcpy.S"
diff --git a/arch/sparc/lib/bzero.S b/arch/sparc/lib/bzero.S
index c7bbae8c590f..b6557297440f 100644
--- a/arch/sparc/lib/bzero.S
+++ b/arch/sparc/lib/bzero.S
@@ -88,13 +88,9 @@ __bzero_done:
 
 #define EX_ST(x,y)              \
 98:     x,y;                    \
-        .section .fixup;        \
-        .align 4;               \
-99:     retl;                   \
-         mov    %o1, %o0;       \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __retl_o1;   \
         .text;                  \
         .align 4;
 
diff --git a/arch/sparc/lib/copy_in_user.S b/arch/sparc/lib/copy_in_user.S
index 650af3f21f78..302c0e60dc2c 100644
--- a/arch/sparc/lib/copy_in_user.S
+++ b/arch/sparc/lib/copy_in_user.S
@@ -3,19 +3,16 @@
  * Copyright (C) 1999, 2000, 2004 David S. Miller (davem@redhat.com)
  */
 
+#include <linux/linkage.h>
 #include <asm/asi.h>
 
 #define XCC xcc
 
 #define EX(x,y)                 \
 98:     x,y;                    \
-        .section .fixup;        \
-        .align 4;               \
-99:     retl;                   \
-         mov 1, %o0;            \
         .section __ex_table,"a";\
         .align 4;               \
-        .word 98b, 99b;         \
+        .word 98b, __retl_one;  \
         .text;                  \
         .align 4;
 
@@ -31,18 +28,7 @@
          * to copy register windows around during thread cloning.
          */
 
-        .globl          ___copy_in_user
-        .type           ___copy_in_user,#function
-___copy_in_user:        /* %o0=dst, %o1=src, %o2=len */
-        /* Writing to %asi is _expensive_ so we hardcode it.
-         * Reading %asi to check for KERNEL_DS is comparatively
-         * cheap.
-         */
-        rd              %asi, %g1
-        cmp             %g1, ASI_AIUS
-        bne,pn          %icc, memcpy_user_stub
-         nop
-
+ENTRY(___copy_in_user)  /* %o0=dst, %o1=src, %o2=len */
         cmp             %o2, 0
         be,pn           %XCC, 85f
          or             %o0, %o1, %o3
@@ -53,22 +39,24 @@ ___copy_in_user:	/* %o0=dst, %o1=src, %o2=len */
         /* 16 < len <= 64 */
         andcc           %o3, 0x7, %g0
         bne,pn          %XCC, 90f
-         sub            %o0, %o1, %o3
+         nop
 
         andn            %o2, 0x7, %o4
         and             %o2, 0x7, %o2
 1:      subcc           %o4, 0x8, %o4
         EX(ldxa [%o1] %asi, %o5)
-        EX(stxa %o5, [%o1 + %o3] ASI_AIUS)
+        EX(stxa %o5, [%o0] %asi)
+        add             %o1, 0x8, %o1
         bgu,pt          %XCC, 1b
-         add            %o1, 0x8, %o1
+         add            %o0, 0x8, %o0
         andcc           %o2, 0x4, %g0
         be,pt           %XCC, 1f
          nop
         sub             %o2, 0x4, %o2
         EX(lduwa [%o1] %asi, %o5)
-        EX(stwa %o5, [%o1 + %o3] ASI_AIUS)
+        EX(stwa %o5, [%o0] %asi)
         add             %o1, 0x4, %o1
+        add             %o0, 0x4, %o0
 1:      cmp             %o2, 0
         be,pt           %XCC, 85f
          nop
@@ -78,14 +66,15 @@ ___copy_in_user:	/* %o0=dst, %o1=src, %o2=len */
 80:     /* 0 < len <= 16 */
         andcc           %o3, 0x3, %g0
         bne,pn          %XCC, 90f
-         sub            %o0, %o1, %o3
+         nop
 
 82:
         subcc           %o2, 4, %o2
         EX(lduwa [%o1] %asi, %g1)
-        EX(stwa %g1, [%o1 + %o3] ASI_AIUS)
+        EX(stwa %g1, [%o0] %asi)
+        add             %o1, 4, %o1
         bgu,pt          %XCC, 82b
-         add            %o1, 4, %o1
+         add            %o0, 4, %o0
 
 85:     retl
          clr            %o0
@@ -94,26 +83,10 @@ ___copy_in_user:	/* %o0=dst, %o1=src, %o2=len */
 90:
         subcc           %o2, 1, %o2
         EX(lduba [%o1] %asi, %g1)
-        EX(stba %g1, [%o1 + %o3] ASI_AIUS)
+        EX(stba %g1, [%o0] %asi)
+        add             %o1, 1, %o1
         bgu,pt          %XCC, 90b
-         add            %o1, 1, %o1
+         add            %o0, 1, %o0
         retl
          clr            %o0
-
-        .size           ___copy_in_user, .-___copy_in_user
-
-        /* Act like copy_{to,in}_user(), ie. return zero instead
-         * of original destination pointer.  This is invoked when
-         * copy_{to,in}_user() finds that %asi is kernel space.
-         */
-        .globl          memcpy_user_stub
-        .type           memcpy_user_stub,#function
-memcpy_user_stub:
-        save            %sp, -192, %sp
-        mov             %i0, %o0
-        mov             %i1, %o1
-        call            memcpy
-         mov            %i2, %o2
-        ret
-         restore        %g0, %g0, %o0
-        .size           memcpy_user_stub, .-memcpy_user_stub
+ENDPROC(___copy_in_user)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index f760a22f95dc..1042d69b267d 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -5,7 +5,7 @@ mainmenu "Linux Kernel Configuration for x86"
 config 64BIT
         bool "64-bit kernel" if ARCH = "x86"
         default ARCH = "x86_64"
-        help
+        ---help---
           Say yes to build a 64-bit kernel - formerly known as x86_64
           Say no to build a 32-bit kernel - formerly known as i386
 
@@ -34,8 +34,8 @@ config X86
         select HAVE_FUNCTION_TRACER
         select HAVE_FUNCTION_GRAPH_TRACER
         select HAVE_FUNCTION_TRACE_MCOUNT_TEST
-        select HAVE_KVM if ((X86_32 && !X86_VOYAGER && !X86_VISWS && !X86_NUMAQ) || X86_64)
-        select HAVE_ARCH_KGDB if !X86_VOYAGER
+        select HAVE_KVM
+        select HAVE_ARCH_KGDB
         select HAVE_ARCH_TRACEHOOK
         select HAVE_GENERIC_DMA_COHERENT if X86_32
         select HAVE_EFFICIENT_UNALIGNED_ACCESS
@@ -140,11 +140,9 @@ config HAVE_CPUMASK_OF_CPU_MAP
 
 config ARCH_HIBERNATION_POSSIBLE
         def_bool y
-        depends on !SMP || !X86_VOYAGER
 
 config ARCH_SUSPEND_POSSIBLE
         def_bool y
-        depends on !X86_VOYAGER
 
 config ZONE_DMA32
         bool
@@ -174,11 +172,6 @@ config GENERIC_PENDING_IRQ
         depends on GENERIC_HARDIRQS && SMP
         default y
 
-config X86_SMP
-        bool
-        depends on SMP && ((X86_32 && !X86_VOYAGER) || X86_64)
-        default y
-
 config USE_GENERIC_SMP_HELPERS
         def_bool y
         depends on SMP
@@ -194,17 +187,11 @@ config X86_64_SMP
 config X86_HT
         bool
         depends on SMP
-        depends on (X86_32 && !X86_VOYAGER) || X86_64
-        default y
-
-config X86_BIOS_REBOOT
-        bool
-        depends on !X86_VOYAGER
         default y
 
 config X86_TRAMPOLINE
         bool
-        depends on X86_SMP || (X86_VOYAGER && SMP) || (64BIT && ACPI_SLEEP)
+        depends on SMP || (64BIT && ACPI_SLEEP)
         default y
 
 config X86_32_LAZY_GS
@@ -248,14 +235,10 @@ config SMP
 
           If you don't know what to do here, say N.
 
-config X86_HAS_BOOT_CPU_ID
-        def_bool y
-        depends on X86_VOYAGER
-
 config SPARSE_IRQ
         bool "Support sparse irq numbering"
         depends on PCI_MSI || HT_IRQ
-        help
+        ---help---
           This enables support for sparse irqs. This is useful for distro
           kernels that want to define a high CONFIG_NR_CPUS value but still
           want to have low kernel memory footprint on smaller machines.
@@ -269,114 +252,114 @@ config NUMA_MIGRATE_IRQ_DESC
         bool "Move irq desc when changing irq smp_affinity"
         depends on SPARSE_IRQ && NUMA
         default n
-        help
+        ---help---
           This enables moving irq_desc to cpu/node that irq will use handled.
 
           If you don't know what to do here, say N.
 
-config X86_FIND_SMP_CONFIG
-        def_bool y
-        depends on X86_MPPARSE || X86_VOYAGER
-
 config X86_MPPARSE
         bool "Enable MPS table" if ACPI
         default y
         depends on X86_LOCAL_APIC
-        help
+        ---help---
           For old smp systems that do not have proper acpi support. Newer systems
           (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
 
-choice
-        prompt "Subarchitecture Type"
-        default X86_PC
+config X86_BIGSMP
+        bool "Support for big SMP systems with more than 8 CPUs"
+        depends on X86_32 && SMP
+        ---help---
+          This option is needed for the systems that have more than 8 CPUs
 
-config X86_PC
-        bool "PC-compatible"
-        help
-          Choose this option if your computer is a standard PC or compatible.
+config X86_EXTENDED_PLATFORM
+        bool "Support for extended (non-PC) x86 platforms"
+        default y
+        ---help---
+          If you disable this option then the kernel will only support
+          standard PC platforms. (which covers the vast majority of
+          systems out there.)
+
+          If you enable this option then you'll be able to select a number
+          of non-PC x86 platforms.
+
+          If you have one of these systems, or if you want to build a
+          generic distribution kernel, say Y here - otherwise say N.
+
+# This is an alphabetically sorted list of 64 bit extended platforms
+# Please maintain the alphabetic order if and when there are additions
+
+config X86_VSMP
+        bool "ScaleMP vSMP"
+        select PARAVIRT
+        depends on X86_64 && PCI
+        depends on X86_EXTENDED_PLATFORM
+        ---help---
+          Support for ScaleMP vSMP systems.  Say 'Y' here if this kernel is
+          supposed to run on these EM64T-based machines.  Only choose this option
+          if you have one of these machines.
+
+config X86_UV
+        bool "SGI Ultraviolet"
+        depends on X86_64
+        depends on X86_EXTENDED_PLATFORM
+        ---help---
+          This option is needed in order to support SGI Ultraviolet systems.
+          If you don't have one of these, you should say N here.
+
+# Following is an alphabetically sorted list of 32 bit extended platforms
+# Please maintain the alphabetic order if and when there are additions
 
 config X86_ELAN
         bool "AMD Elan"
         depends on X86_32
-        help
+        depends on X86_EXTENDED_PLATFORM
+        ---help---
           Select this for an AMD Elan processor.
 
           Do not use this option for K6/Athlon/Opteron processors!
 
           If unsure, choose "PC-compatible" instead.
 
-config X86_VOYAGER
-        bool "Voyager (NCR)"
-        depends on X86_32 && (SMP || BROKEN) && !PCI
-        help
-          Voyager is an MCA-based 32-way capable SMP architecture proprietary
-          to NCR Corp.  Machine classes 345x/35xx/4100/51xx are Voyager-based.
-
-          *** WARNING ***
-
-          If you do not specifically know you have a Voyager based machine,
-          say N here, otherwise the kernel you build will not be bootable.
-
-config X86_GENERICARCH
-       bool "Generic architecture"
+config X86_RDC321X
+        bool "RDC R-321x SoC"
         depends on X86_32
-       help
-          This option compiles in the NUMAQ, Summit, bigsmp, ES7000, default
+        depends on X86_EXTENDED_PLATFORM
+        select M486
+        select X86_REBOOTFIXUPS
+        ---help---
+          This option is needed for RDC R-321x system-on-chip, also known
+          as R-8610-(G).
+          If you don't have one of these chips, you should say N here.
+
+config X86_32_NON_STANDARD
+        bool "Support non-standard 32-bit SMP architectures"
+        depends on X86_32 && SMP
+        depends on X86_EXTENDED_PLATFORM
+        ---help---
+          This option compiles in the NUMAQ, Summit, bigsmp, ES7000, default
           subarchitectures.  It is intended for a generic binary kernel.
           if you select them all, kernel will probe it one by one. and will
           fallback to default.
 
-if X86_GENERICARCH
+# Alphabetically sorted list of Non standard 32 bit platforms
 
 config X86_NUMAQ
         bool "NUMAQ (IBM/Sequent)"
-        depends on SMP && X86_32 && PCI && X86_MPPARSE
+        depends on X86_32_NON_STANDARD
         select NUMA
-        help
+        select X86_MPPARSE
+        ---help---
           This option is used for getting Linux to run on a NUMAQ (IBM/Sequent)
           NUMA multiquad box. This changes the way that processors are
           bootstrapped, and uses Clustered Logical APIC addressing mode instead
           of Flat Logical.  You will need a new lynxer.elf file to flash your
           firmware with - send email to <Martin.Bligh@us.ibm.com>.
 
-config X86_SUMMIT
-        bool "Summit/EXA (IBM x440)"
-        depends on X86_32 && SMP
-        help
-          This option is needed for IBM systems that use the Summit/EXA chipset.
-          In particular, it is needed for the x440.
-
-config X86_ES7000
-        bool "Support for Unisys ES7000 IA32 series"
-        depends on X86_32 && SMP
-        help
-          Support for Unisys ES7000 systems.  Say 'Y' here if this kernel is
-          supposed to run on an IA32-based Unisys ES7000 system.
-
-config X86_BIGSMP
-        bool "Support for big SMP systems with more than 8 CPUs"
-        depends on X86_32 && SMP
-        help
-          This option is needed for the systems that have more than 8 CPUs
-          and if the system is not of any sub-arch type above.
-
-endif
-
-config X86_VSMP
-        bool "Support for ScaleMP vSMP"
-        select PARAVIRT
-        depends on X86_64 && PCI
-        help
-          Support for ScaleMP vSMP systems.  Say 'Y' here if this kernel is
-          supposed to run on these EM64T-based machines.  Only choose this option
-          if you have one of these machines.
-
-endchoice
-
 config X86_VISWS
         bool "SGI 320/540 (Visual Workstation)"
-        depends on X86_32 && PCI && !X86_VOYAGER && X86_MPPARSE && PCI_GODIRECT
-        help
+        depends on X86_32 && PCI && X86_MPPARSE && PCI_GODIRECT
+        depends on X86_32_NON_STANDARD
+        ---help---
           The SGI Visual Workstation series is an IA32-based workstation
           based on SGI systems chips with some legacy PC hardware attached.
 
@@ -385,28 +368,38 @@ config X86_VISWS
           A kernel compiled for the Visual Workstation will run on general
           PCs as well. See <file:Documentation/sgi-visws.txt> for details.
 
-config X86_RDC321X
-        bool "RDC R-321x SoC"
-        depends on X86_32
-        select M486
-        select X86_REBOOTFIXUPS
-        help
-          This option is needed for RDC R-321x system-on-chip, also known
-          as R-8610-(G).
-          If you don't have one of these chips, you should say N here.
+config X86_SUMMIT
+        bool "Summit/EXA (IBM x440)"
+        depends on X86_32_NON_STANDARD
+        ---help---
+          This option is needed for IBM systems that use the Summit/EXA chipset.
+          In particular, it is needed for the x440.
 
-config X86_UV
-        bool "SGI Ultraviolet"
-        depends on X86_64
-        help
-          This option is needed in order to support SGI Ultraviolet systems.
-          If you don't have one of these, you should say N here.
+config X86_ES7000
+        bool "Unisys ES7000 IA32 series"
+        depends on X86_32_NON_STANDARD && X86_BIGSMP
+        ---help---
+          Support for Unisys ES7000 systems.  Say 'Y' here if this kernel is
+          supposed to run on an IA32-based Unisys ES7000 system.
+
+config X86_VOYAGER
+        bool "Voyager (NCR)"
+        depends on SMP && !PCI && BROKEN
+        depends on X86_32_NON_STANDARD
+        ---help---
+          Voyager is an MCA-based 32-way capable SMP architecture proprietary
+          to NCR Corp.  Machine classes 345x/35xx/4100/51xx are Voyager-based.
+
+          *** WARNING ***
+
+          If you do not specifically know you have a Voyager based machine,
+          say N here, otherwise the kernel you build will not be bootable.
 
 config SCHED_OMIT_FRAME_POINTER
         def_bool y
         prompt "Single-depth WCHAN output"
         depends on X86
-        help
+        ---help---
           Calculate simpler /proc/<PID>/wchan values. If this option
           is disabled then wchan values will recurse back to the
           caller function. This provides more accurate wchan values,
@@ -416,7 +409,7 @@ config SCHED_OMIT_FRAME_POINTER
 
 menuconfig PARAVIRT_GUEST
         bool "Paravirtualized guest support"
-        help
+        ---help---
           Say Y here to get to see options related to running Linux under
           various hypervisors.  This option alone does not add any kernel code.
 
@@ -430,8 +423,7 @@ config VMI
         bool "VMI Guest support"
         select PARAVIRT
         depends on X86_32
-        depends on !X86_VOYAGER
-        help
+        ---help---
           VMI provides a paravirtualized interface to the VMware ESX server
           (it could be used by other hypervisors in theory too, but is not
           at the moment), by linking the kernel to a GPL-ed ROM module
@@ -441,8 +433,7 @@ config KVM_CLOCK
         bool "KVM paravirtualized clock"
         select PARAVIRT
         select PARAVIRT_CLOCK
-        depends on !X86_VOYAGER
-        help
+        ---help---
           Turning on this option will allow you to run a paravirtualized clock
           when running over the KVM hypervisor. Instead of relying on a PIT
           (or probably other) emulation by the underlying device model, the host
@@ -452,17 +443,15 @@ config KVM_CLOCK
 config KVM_GUEST
         bool "KVM Guest support"
         select PARAVIRT
-        depends on !X86_VOYAGER
-        help
-         This option enables various optimizations for running under the KVM
-         hypervisor.
+        ---help---
+          This option enables various optimizations for running under the KVM
+          hypervisor.
 
 source "arch/x86/lguest/Kconfig"
 
 config PARAVIRT
         bool "Enable paravirtualization code"
-        depends on !X86_VOYAGER
-        help
+        ---help---
           This changes the kernel so it can modify itself when it is run
           under a hypervisor, potentially improving performance significantly
           over full virtualization.  However, when run without a hypervisor
@@ -475,51 +464,51 @@ config PARAVIRT_CLOCK
 endif
 
 config PARAVIRT_DEBUG
-       bool "paravirt-ops debugging"
-       depends on PARAVIRT && DEBUG_KERNEL
-       help
-         Enable to debug paravirt_ops internals.  Specifically, BUG if
-         a paravirt_op is missing when it is called.
+        bool "paravirt-ops debugging"
+        depends on PARAVIRT && DEBUG_KERNEL
+        ---help---
+          Enable to debug paravirt_ops internals.  Specifically, BUG if
+          a paravirt_op is missing when it is called.
 
 config MEMTEST
         bool "Memtest"
-        help
+        ---help---
           This option adds a kernel parameter 'memtest', which allows memtest
           to be set.
-                memtest=0, mean disabled; -- default
-                memtest=1, mean do 1 test pattern;
-                ...
-                memtest=4, mean do 4 test patterns.
+                memtest=0, mean disabled; -- default
+                memtest=1, mean do 1 test pattern;
+                ...
+                memtest=4, mean do 4 test patterns.
           If you are unsure how to answer this question, answer N.
 
 config X86_SUMMIT_NUMA
         def_bool y
-        depends on X86_32 && NUMA && X86_GENERICARCH
+        depends on X86_32 && NUMA && X86_32_NON_STANDARD
 
 config X86_CYCLONE_TIMER
         def_bool y
-        depends on X86_GENERICARCH
+        depends on X86_32_NON_STANDARD
 
 source "arch/x86/Kconfig.cpu"
 
 config HPET_TIMER
         def_bool X86_64
         prompt "HPET Timer Support" if X86_32
-        help
-         Use the IA-PC HPET (High Precision Event Timer) to manage
-         time in preference to the PIT and RTC, if a HPET is
-         present.
-         HPET is the next generation timer replacing legacy 8254s.
-         The HPET provides a stable time base on SMP
-         systems, unlike the TSC, but it is more expensive to access,
-         as it is off-chip.  You can find the HPET spec at
-         <http://www.intel.com/hardwaredesign/hpetspec_1.pdf>.
+        ---help---
+          Use the IA-PC HPET (High Precision Event Timer) to manage
+          time in preference to the PIT and RTC, if a HPET is
+          present.
+          HPET is the next generation timer replacing legacy 8254s.
+          The HPET provides a stable time base on SMP
+          systems, unlike the TSC, but it is more expensive to access,
+          as it is off-chip.  You can find the HPET spec at
+          <http://www.intel.com/hardwaredesign/hpetspec_1.pdf>.
 
-         You can safely choose Y here.  However, HPET will only be
-         activated if the platform and the BIOS support this feature.
-         Otherwise the 8254 will be used for timing services.
+          You can safely choose Y here.  However, HPET will only be
+          activated if the platform and the BIOS support this feature.
+          Otherwise the 8254 will be used for timing services.
 
-         Choose N to continue using the legacy 8254 timer.
+          Choose N to continue using the legacy 8254 timer.
 
 config HPET_EMULATE_RTC
         def_bool y
@@ -530,7 +519,7 @@ config HPET_EMULATE_RTC
 config DMI
         default y
         bool "Enable DMI scanning" if EMBEDDED
-        help
+        ---help---
           Enabled scanning of DMI to identify machine quirks. Say Y
           here unless you have verified that your setup is not
           affected by entries in the DMI blacklist. Required by PNP
@@ -542,7 +531,7 @@ config GART_IOMMU
         select SWIOTLB
         select AGP
         depends on X86_64 && PCI
-        help
+        ---help---
           Support for full DMA access of devices with 32bit memory access only
           on systems with more than 3GB. This is usually needed for USB,
           sound, many IDE/SATA chipsets and some other devices.
@@ -557,7 +546,7 @@ config CALGARY_IOMMU
         bool "IBM Calgary IOMMU support"
         select SWIOTLB
         depends on X86_64 && PCI && EXPERIMENTAL
-        help
+        ---help---
           Support for hardware IOMMUs in IBM's xSeries x366 and x460
           systems. Needed to run systems with more than 3GB of memory
           properly with 32-bit PCI devices that do not support DAC
@@ -575,7 +564,7 @@ config CALGARY_IOMMU_ENABLED_BY_DEFAULT
         def_bool y
         prompt "Should Calgary be enabled by default?"
         depends on CALGARY_IOMMU
-        help
+        ---help---
           Should Calgary be enabled by default? if you choose 'y', Calgary
           will be used (if it exists). If you choose 'n', Calgary will not be
           used even if it exists. If you choose 'n' and would like to use
@@ -587,7 +576,7 @@ config AMD_IOMMU
         select SWIOTLB
         select PCI_MSI
         depends on X86_64 && PCI && ACPI
-        help
+        ---help---
           With this option you can enable support for AMD IOMMU hardware in
           your system. An IOMMU is a hardware component which provides
           remapping of DMA memory accesses from devices. With an AMD IOMMU you
@@ -602,7 +591,7 @@ config AMD_IOMMU_STATS
         bool "Export AMD IOMMU statistics to debugfs"
         depends on AMD_IOMMU
         select DEBUG_FS
-        help
+        ---help---
           This option enables code in the AMD IOMMU driver to collect various
           statistics about whats happening in the driver and exports that
           information to userspace via debugfs.
@@ -611,7 +600,7 @@ config AMD_IOMMU_STATS
 # need this always selected by IOMMU for the VIA workaround
 config SWIOTLB
         def_bool y if X86_64
-        help
+        ---help---
           Support for software bounce buffers used on x86-64 systems
           which don't have a hardware IOMMU (e.g. the current generation
           of Intel's x86-64 CPUs). Using this PCI devices which can only
@@ -629,7 +618,7 @@ config MAXSMP
         depends on X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL
         select CPUMASK_OFFSTACK
         default n
-        help
+        ---help---
           Configure maximum number of CPUS and NUMA Nodes for this architecture.
           If unsure, say N.
 
@@ -640,7 +629,7 @@ config NR_CPUS
         default "4096" if MAXSMP
         default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000)
         default "8" if SMP
-        help
+        ---help---
           This allows you to specify the maximum number of CPUs which this
           kernel will support.  The maximum supported value is 512 and the
           minimum value which makes sense is 2.
@@ -651,7 +640,7 @@ config NR_CPUS
 config SCHED_SMT
         bool "SMT (Hyperthreading) scheduler support"
         depends on X86_HT
-        help
+        ---help---
           SMT scheduler support improves the CPU scheduler's decision making
           when dealing with Intel Pentium 4 chips with HyperThreading at a
           cost of slightly increased overhead in some places. If unsure say
@@ -661,7 +650,7 @@ config SCHED_MC
         def_bool y
         prompt "Multi-core scheduler support"
         depends on X86_HT
-        help
+        ---help---
           Multi-core scheduler support improves the CPU scheduler's decision
           making when dealing with multi-core CPU chips at a cost of slightly
           increased overhead in some places. If unsure say N here.
@@ -670,8 +659,8 @@ source "kernel/Kconfig.preempt"
 
 config X86_UP_APIC
         bool "Local APIC support on uniprocessors"
-        depends on X86_32 && !SMP && !(X86_VOYAGER || X86_GENERICARCH)
-        help
+        depends on X86_32 && !SMP && !X86_32_NON_STANDARD
+        ---help---
           A local APIC (Advanced Programmable Interrupt Controller) is an
           integrated interrupt controller in the CPU. If you have a single-CPU
           system which has a processor with a local APIC, you can say Y here to
@@ -684,7 +673,7 @@ config X86_UP_APIC
 config X86_UP_IOAPIC
         bool "IO-APIC support on uniprocessors"
         depends on X86_UP_APIC
-        help
+        ---help---
           An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
           SMP-capable replacement for PC-style interrupt controllers. Most
           SMP systems and many recent uniprocessor systems have one.
@@ -695,11 +684,11 @@ config X86_UP_IOAPIC
 
 config X86_LOCAL_APIC
         def_bool y
-        depends on X86_64 || (X86_32 && (X86_UP_APIC || (SMP && !X86_VOYAGER) || X86_GENERICARCH))
+        depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC
 
 config X86_IO_APIC
         def_bool y
-        depends on X86_64 || (X86_32 && (X86_UP_IOAPIC || (SMP && !X86_VOYAGER) || X86_GENERICARCH))
+        depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC
 
 config X86_VISWS_APIC
         def_bool y
@@ -709,7 +698,7 @@ config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
         bool "Reroute for broken boot IRQs"
         default n
         depends on X86_IO_APIC
-        help
+        ---help---
           This option enables a workaround that fixes a source of
           spurious interrupts. This is recommended when threaded
           interrupt handling is used on systems where the generation of
@@ -731,7 +720,6 @@ config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
 
 config X86_MCE
         bool "Machine Check Exception"
-        depends on !X86_VOYAGER
         ---help---
           Machine Check Exception support allows the processor to notify the
           kernel if it detects a problem (e.g. overheating, component failure).
@@ -750,7 +738,7 @@ config X86_MCE_INTEL
         def_bool y
         prompt "Intel MCE features"
         depends on X86_64 && X86_MCE && X86_LOCAL_APIC
-        help
+        ---help---
            Additional support for intel specific MCE features such as
            the thermal monitor.
 
@@ -758,14 +746,14 @@ config X86_MCE_AMD
         def_bool y
         prompt "AMD MCE features"
         depends on X86_64 && X86_MCE && X86_LOCAL_APIC
-        help
+        ---help---
            Additional support for AMD specific MCE features such as
            the DRAM Error Threshold.
 
 config X86_MCE_NONFATAL
         tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4"
         depends on X86_32 && X86_MCE
-        help
+        ---help---
           Enabling this feature starts a timer that triggers every 5 seconds which
           will look at the machine check registers to see if anything happened.
           Non-fatal problems automatically get corrected (but still logged).
@@ -778,7 +766,7 @@ config X86_MCE_NONFATAL
 config X86_MCE_P4THERMAL
         bool "check for P4 thermal throttling interrupt."
         depends on X86_32 && X86_MCE && (X86_UP_APIC || SMP)
-        help
+        ---help---
           Enabling this feature will cause a message to be printed when the P4
           enters thermal throttling.
 
@@ -786,11 +774,11 @@ config VM86
         bool "Enable VM86 support" if EMBEDDED
         default y
         depends on X86_32
-        help
-          This option is required by programs like DOSEMU to run 16-bit legacy
+        ---help---
+          This option is required by programs like DOSEMU to run 16-bit legacy
           code on X86 processors. It also may be needed by software like
-          XFree86 to initialize some video cards via BIOS. Disabling this
-          option saves about 6k.
+          XFree86 to initialize some video cards via BIOS. Disabling this
+          option saves about 6k.
 
 config TOSHIBA
         tristate "Toshiba Laptop support"
@@ -864,33 +852,33 @@ config MICROCODE
           module will be called microcode.
 
 config MICROCODE_INTEL
-       bool "Intel microcode patch loading support"
-       depends on MICROCODE
-       default MICROCODE
-       select FW_LOADER
-       --help---
-         This options enables microcode patch loading support for Intel
-         processors.
-
-         For latest news and information on obtaining all the required
-         Intel ingredients for this driver, check:
-         <http://www.urbanmyth.org/microcode/>.
+        bool "Intel microcode patch loading support"
+        depends on MICROCODE
+        default MICROCODE
+        select FW_LOADER
+        ---help---
+          This options enables microcode patch loading support for Intel
+          processors.
+
+          For latest news and information on obtaining all the required
+          Intel ingredients for this driver, check:
+          <http://www.urbanmyth.org/microcode/>.
 
 config MICROCODE_AMD
-       bool "AMD microcode patch loading support"
-       depends on MICROCODE
-       select FW_LOADER
-       --help---
-         If you select this option, microcode patch loading support for AMD
-         processors will be enabled.
+        bool "AMD microcode patch loading support"
+        depends on MICROCODE
+        select FW_LOADER
+        ---help---
+          If you select this option, microcode patch loading support for AMD
+          processors will be enabled.
 
-   config MICROCODE_OLD_INTERFACE
+config MICROCODE_OLD_INTERFACE
         def_bool y
         depends on MICROCODE
 
 config X86_MSR
         tristate "/dev/cpu/*/msr - Model-specific register support"
-        help
+        ---help---
           This device gives privileged processes access to the x86
           Model-Specific Registers (MSRs).  It is a character device with
           major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.
@@ -899,7 +887,7 @@ config X86_MSR
 
 config X86_CPUID
         tristate "/dev/cpu/*/cpuid - CPU information support"
-        help
+        ---help---
           This device gives processes access to the x86 CPUID instruction to
           be executed on a specific processor.  It is a character device
           with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
@@ -951,7 +939,7 @@ config NOHIGHMEM
 config HIGHMEM4G
         bool "4GB"
         depends on !X86_NUMAQ
-        help
+        ---help---
           Select this if you have a 32-bit processor and between 1 and 4
           gigabytes of physical RAM.
 
@@ -959,7 +947,7 @@ config HIGHMEM64G
         bool "64GB"
         depends on !M386 && !M486
         select X86_PAE
-        help
+        ---help---
           Select this if you have a 32-bit processor and more than 4
           gigabytes of physical RAM.
 
@@ -970,7 +958,7 @@ choice
         prompt "Memory split" if EMBEDDED
         default VMSPLIT_3G
         depends on X86_32
-        help
+        ---help---
           Select the desired split between kernel and user memory.
 
           If the address range available to the kernel is less than the
@@ -1016,20 +1004,20 @@ config HIGHMEM
 config X86_PAE
         bool "PAE (Physical Address Extension) Support"
         depends on X86_32 && !HIGHMEM4G
-        help
+        ---help---
           PAE is required for NX support, and furthermore enables
           larger swapspace support for non-overcommit purposes. It
           has the cost of more pagetable lookup overhead, and also
           consumes more pagetable space per process.
 
 config ARCH_PHYS_ADDR_T_64BIT
-       def_bool X86_64 || X86_PAE
+        def_bool X86_64 || X86_PAE
 
 config DIRECT_GBPAGES
         bool "Enable 1GB pages for kernel pagetables" if EMBEDDED
         default y
         depends on X86_64
-        help
+        ---help---
           Allow the kernel linear mapping to use 1GB pages on CPUs that
           support it. This can improve the kernel's performance a tiny bit by
           reducing TLB pressure. If in doubt, say "Y".
@@ -1039,9 +1027,8 @@ config NUMA
         bool "Numa Memory Allocation and Scheduler Support"
         depends on SMP
         depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL)
-        default n if X86_PC
         default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP)
-        help
+        ---help---
           Enable NUMA (Non Uniform Memory Access) support.
 
           The kernel will try to allocate memory used by a CPU on the
@@ -1064,19 +1051,19 @@ config K8_NUMA
         def_bool y
         prompt "Old style AMD Opteron NUMA detection"
         depends on X86_64 && NUMA && PCI
-        help
-         Enable K8 NUMA node topology detection.  You should say Y here if
-         you have a multi processor AMD K8 system. This uses an old
-         method to read the NUMA configuration directly from the builtin
-         Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA
-         instead, which also takes priority if both are compiled in.
+        ---help---
+          Enable K8 NUMA node topology detection.  You should say Y here if
+          you have a multi processor AMD K8 system. This uses an old
+          method to read the NUMA configuration directly from the builtin
+          Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA
+          instead, which also takes priority if both are compiled in.
 
 config X86_64_ACPI_NUMA
         def_bool y
         prompt "ACPI NUMA detection"
         depends on X86_64 && NUMA && ACPI && PCI
         select ACPI_NUMA
-        help
+        ---help---
           Enable ACPI SRAT based node topology detection.
 
 # Some NUMA nodes have memory ranges that span
@@ -1091,7 +1078,7 @@ config NODES_SPAN_OTHER_NODES
 config NUMA_EMU
         bool "NUMA emulation"
         depends on X86_64 && NUMA
-        help
+        ---help---
           Enable NUMA emulation. A flat machine will be split
           into virtual nodes when booted with "numa=fake=N", where N is the
           number of nodes. This is only useful for debugging.
@@ -1104,7 +1091,7 @@ config NODES_SHIFT
         default "4" if X86_NUMAQ
         default "3"
         depends on NEED_MULTIPLE_NODES
-        help
+        ---help---
           Specify the maximum number of NUMA Nodes available on the target
           system.  Increases memory reserved to accomodate various tables.
 
@@ -1142,7 +1129,7 @@ config ARCH_SPARSEMEM_DEFAULT
 
 config ARCH_SPARSEMEM_ENABLE
         def_bool y
-        depends on X86_64 || NUMA || (EXPERIMENTAL && X86_PC) || X86_GENERICARCH
+        depends on X86_64 || NUMA || (EXPERIMENTAL && X86_32) || X86_32_NON_STANDARD
         select SPARSEMEM_STATIC if X86_32
         select SPARSEMEM_VMEMMAP_ENABLE if X86_64
 
@@ -1159,61 +1146,61 @@ source "mm/Kconfig"
 config HIGHPTE
         bool "Allocate 3rd-level pagetables from highmem"
         depends on X86_32 && (HIGHMEM4G || HIGHMEM64G)
-        help
+        ---help---
           The VM uses one page table entry for each page of physical memory.
           For systems with a lot of RAM, this can be wasteful of precious
           low memory.  Setting this option will put user-space page table
           entries in high memory.
 
 config X86_CHECK_BIOS_CORRUPTION
-        bool "Check for low memory corruption"
-        help
-         Periodically check for memory corruption in low memory, which
-         is suspected to be caused by BIOS.  Even when enabled in the
-         configuration, it is disabled at runtime.  Enable it by
-         setting "memory_corruption_check=1" on the kernel command
-         line.  By default it scans the low 64k of memory every 60
-         seconds; see the memory_corruption_check_size and
-         memory_corruption_check_period parameters in
-         Documentation/kernel-parameters.txt to adjust this.
-
-         When enabled with the default parameters, this option has
-         almost no overhead, as it reserves a relatively small amount
-         of memory and scans it infrequently.  It both detects corruption
-         and prevents it from affecting the running system.
-
-         It is, however, intended as a diagnostic tool; if repeatable
-         BIOS-originated corruption always affects the same memory,
-         you can use memmap= to prevent the kernel from using that
-         memory.
+        bool "Check for low memory corruption"
+        ---help---
+          Periodically check for memory corruption in low memory, which
+          is suspected to be caused by BIOS.  Even when enabled in the
+          configuration, it is disabled at runtime.  Enable it by
+          setting "memory_corruption_check=1" on the kernel command
+          line.  By default it scans the low 64k of memory every 60
+          seconds; see the memory_corruption_check_size and
+          memory_corruption_check_period parameters in
+          Documentation/kernel-parameters.txt to adjust this.
+
+          When enabled with the default parameters, this option has
+          almost no overhead, as it reserves a relatively small amount
+          of memory and scans it infrequently.  It both detects corruption
+          and prevents it from affecting the running system.
+
+          It is, however, intended as a diagnostic tool; if repeatable
+          BIOS-originated corruption always affects the same memory,
+          you can use memmap= to prevent the kernel from using that
+          memory.
 
 config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
-        bool "Set the default setting of memory_corruption_check"
+        bool "Set the default setting of memory_corruption_check"
         depends on X86_CHECK_BIOS_CORRUPTION
         default y
-        help
-         Set whether the default state of memory_corruption_check is
-         on or off.
+        ---help---
+          Set whether the default state of memory_corruption_check is
+          on or off.
 
 config X86_RESERVE_LOW_64K
-        bool "Reserve low 64K of RAM on AMI/Phoenix BIOSen"
+        bool "Reserve low 64K of RAM on AMI/Phoenix BIOSen"
         default y
-        help
-         Reserve the first 64K of physical RAM on BIOSes that are known
-         to potentially corrupt that memory range. A numbers of BIOSes are
-         known to utilize this area during suspend/resume, so it must not
-         be used by the kernel.
+        ---help---
+          Reserve the first 64K of physical RAM on BIOSes that are known
+          to potentially corrupt that memory range. A numbers of BIOSes are
+          known to utilize this area during suspend/resume, so it must not
+          be used by the kernel.
 
-         Set this to N if you are absolutely sure that you trust the BIOS
-         to get all its memory reservations and usages right.
+          Set this to N if you are absolutely sure that you trust the BIOS
+          to get all its memory reservations and usages right.
 
-         If you have doubts about the BIOS (e.g. suspend/resume does not
-         work or there's kernel crashes after certain hardware hotplug
-         events) and it's not AMI or Phoenix, then you might want to enable
-         X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check typical
-         corruption patterns.
+          If you have doubts about the BIOS (e.g. suspend/resume does not
+          work or there's kernel crashes after certain hardware hotplug
+          events) and it's not AMI or Phoenix, then you might want to enable
+          X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check typical
+          corruption patterns.
 
-         Say Y if unsure.
+          Say Y if unsure.
 
 config MATH_EMULATION
         bool
@@ -1279,7 +1266,7 @@ config MTRR_SANITIZER
         def_bool y
         prompt "MTRR cleanup support"
         depends on MTRR
-        help
+        ---help---
           Convert MTRR layout from continuous to discrete, so X drivers can
           add writeback entries.
 
@@ -1294,7 +1281,7 @@ config MTRR_SANITIZER_ENABLE_DEFAULT
         range 0 1
         default "0"
         depends on MTRR_SANITIZER
-        help
+        ---help---
           Enable mtrr cleanup default value
 
 config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
@@ -1302,7 +1289,7 @@ config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
         range 0 7
         default "1"
         depends on MTRR_SANITIZER
-        help
+        ---help---
           mtrr cleanup spare entries default, it can be changed via
           mtrr_spare_reg_nr=N on the kernel command line.
 
@@ -1310,7 +1297,7 @@ config X86_PAT
         bool
         prompt "x86 PAT support"
         depends on MTRR
-        help
+        ---help---
           Use PAT attributes to setup page level cache control.
 
           PATs are the modern equivalents of MTRRs and are much more
@@ -1325,20 +1312,20 @@ config EFI
         bool "EFI runtime service support"
         depends on ACPI
         ---help---
-        This enables the kernel to use EFI runtime services that are
-        available (such as the EFI variable services).
+          This enables the kernel to use EFI runtime services that are
+          available (such as the EFI variable services).
 
-        This option is only useful on systems that have EFI firmware.
-        In addition, you should use the latest ELILO loader available
-        at <http://elilo.sourceforge.net> in order to take advantage
-        of EFI runtime services. However, even with this option, the
-        resultant kernel should continue to boot on existing non-EFI
-        platforms.
+          This option is only useful on systems that have EFI firmware.
+          In addition, you should use the latest ELILO loader available
+          at <http://elilo.sourceforge.net> in order to take advantage
+          of EFI runtime services. However, even with this option, the
+          resultant kernel should continue to boot on existing non-EFI
+          platforms.
 
 config SECCOMP
         def_bool y
         prompt "Enable seccomp to safely compute untrusted bytecode"
-        help
+        ---help---
           This kernel feature is useful for number crunching applications
           that may need to compute untrusted bytecode during their
           execution. By using pipes or other transports made available to
@@ -1357,8 +1344,8 @@ config CC_STACKPROTECTOR_ALL
 config CC_STACKPROTECTOR
         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
         select CC_STACKPROTECTOR_ALL
-        help
-          This option turns on the -fstack-protector GCC feature. This
+        ---help---
+          This option turns on the -fstack-protector GCC feature. This
           feature puts, at the beginning of functions, a canary value on
           the stack just before the return address, and validates
           the value just before actually returning.  Stack based buffer
@@ -1375,8 +1362,7 @@ source kernel/Kconfig.hz
 
 config KEXEC
         bool "kexec system call"
-        depends on X86_BIOS_REBOOT
-        help
+        ---help---
           kexec is a system call that implements the ability to shutdown your
           current kernel, and to start another kernel.  It is like a reboot
           but it is independent of the system firmware.   And like a reboot
@@ -1393,7 +1379,7 @@ config KEXEC
 config CRASH_DUMP
         bool "kernel crash dumps"
         depends on X86_64 || (X86_32 && HIGHMEM)
-        help
+        ---help---
           Generate crash dump after being started by kexec.
           This should be normally only set in special crash dump kernels
           which are loaded in the main kernel with kexec-tools into
@@ -1408,7 +1394,7 @@ config KEXEC_JUMP
         bool "kexec jump (EXPERIMENTAL)"
         depends on EXPERIMENTAL
         depends on KEXEC && HIBERNATION && X86_32
-        help
+        ---help---
           Jump between original kernel and kexeced kernel and invoke
           code in physical address mode via KEXEC
 
@@ -1417,7 +1403,7 @@ config PHYSICAL_START
         default "0x1000000" if X86_NUMAQ
         default "0x200000" if X86_64
         default "0x100000"
-        help
+        ---help---
           This gives the physical address where the kernel is loaded.
 
           If kernel is a not relocatable (CONFIG_RELOCATABLE=n) then
@@ -1458,7 +1444,7 @@ config PHYSICAL_START
 config RELOCATABLE
         bool "Build a relocatable kernel (EXPERIMENTAL)"
         depends on EXPERIMENTAL
-        help
+        ---help---
           This builds a kernel image that retains relocation information
           so it can be loaded someplace besides the default 1MB.
           The relocations tend to make the kernel binary about 10% larger,
@@ -1478,7 +1464,7 @@ config PHYSICAL_ALIGN
         default "0x100000" if X86_32
         default "0x200000" if X86_64
         range 0x2000 0x400000
-        help
+        ---help---
           This value puts the alignment restrictions on physical address
           where kernel is loaded and run from. Kernel is compiled for an
           address which meets above alignment restriction.
@@ -1499,7 +1485,7 @@ config PHYSICAL_ALIGN
 
 config HOTPLUG_CPU
         bool "Support for hot-pluggable CPUs"
-        depends on SMP && HOTPLUG && !X86_VOYAGER
+        depends on SMP && HOTPLUG
         ---help---
           Say Y here to allow turning CPUs off and on. CPUs can be
           controlled through /sys/devices/system/cpu.
@@ -1511,7 +1497,7 @@ config COMPAT_VDSO
         def_bool y
         prompt "Compat VDSO support"
         depends on X86_32 || IA32_EMULATION
-        help
+        ---help---
           Map the 32-bit VDSO to the predictable old-style address too.
         ---help---
           Say N here if you are running a sufficiently recent glibc
@@ -1523,7 +1509,7 @@ config COMPAT_VDSO
 config CMDLINE_BOOL
         bool "Built-in kernel command line"
         default n
-        help
+        ---help---
           Allow for specifying boot arguments to the kernel at
           build time.  On some systems (e.g. embedded ones), it is
           necessary or convenient to provide some or all of the
@@ -1541,7 +1527,7 @@ config CMDLINE
         string "Built-in kernel command string"
         depends on CMDLINE_BOOL
         default ""
-        help
+        ---help---
           Enter arguments here that should be compiled into the kernel
           image and used at boot time.  If the boot loader provides a
           command line at boot time, it is appended to this string to
@@ -1558,7 +1544,7 @@ config CMDLINE_OVERRIDE
         bool "Built-in command line overrides boot loader arguments"
         default n
         depends on CMDLINE_BOOL
-        help
+        ---help---
           Set this option to 'Y' to have the kernel ignore the boot loader
           command line, and use ONLY the built-in command line.
 
@@ -1580,7 +1566,6 @@ config HAVE_ARCH_EARLY_PFN_TO_NID
         depends on NUMA
 
 menu "Power management and ACPI options"
-        depends on !X86_VOYAGER
 
 config ARCH_HIBERNATION_HEADER
         def_bool y
@@ -1658,7 +1643,7 @@ if APM
 
 config APM_IGNORE_USER_SUSPEND
         bool "Ignore USER SUSPEND"
-        help
+        ---help---
           This option will ignore USER SUSPEND requests. On machines with a
           compliant APM BIOS, you want to say N. However, on the NEC Versa M
           series notebooks, it is necessary to say Y because of a BIOS bug.
@@ -1682,7 +1667,7 @@ config APM_DO_ENABLE
 
 config APM_CPU_IDLE
         bool "Make CPU Idle calls when idle"
-        help
+        ---help---
           Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop.
           On some machines, this can activate improved power savings, such as
           a slowed CPU clock rate, when the machine is idle. These idle calls
@@ -1693,7 +1678,7 @@ config APM_CPU_IDLE
 
 config APM_DISPLAY_BLANK
         bool "Enable console blanking using APM"
-        help
+        ---help---
           Enable console blanking using the APM. Some laptops can use this to
           turn off the LCD backlight when the screen blanker of the Linux
           virtual console blanks the screen. Note that this is only used by
@@ -1706,7 +1691,7 @@ config APM_DISPLAY_BLANK
 
 config APM_ALLOW_INTS
         bool "Allow interrupts during APM BIOS calls"
-        help
+        ---help---
           Normally we disable external interrupts while we are making calls to
           the APM BIOS as a measure to lessen the effects of a badly behaving
           BIOS implementation.  The BIOS should reenable interrupts if it
@@ -1731,7 +1716,7 @@ config PCI
         bool "PCI support"
         default y
         select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)
-        help
+        ---help---
           Find out whether you have a PCI motherboard. PCI is the name of a
           bus system, i.e. the way the CPU talks to the other stuff inside
           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
@@ -1802,7 +1787,7 @@ config PCI_MMCONFIG
 config DMAR
         bool "Support for DMA Remapping Devices (EXPERIMENTAL)"
         depends on X86_64 && PCI_MSI && ACPI && EXPERIMENTAL
-        help
+        ---help---
           DMA remapping (DMAR) devices support enables independent address
           translations for Direct Memory Access (DMA) from devices.
           These DMA remapping devices are reported via ACPI tables
@@ -1824,29 +1809,29 @@ config DMAR_GFX_WA
         def_bool y
         prompt "Support for Graphics workaround"
         depends on DMAR
-        help
-         Current Graphics drivers tend to use physical address
-         for DMA and avoid using DMA APIs. Setting this config
-         option permits the IOMMU driver to set a unity map for
-         all the OS-visible memory. Hence the driver can continue
-         to use physical addresses for DMA.
+        ---help---
+          Current Graphics drivers tend to use physical address
+          for DMA and avoid using DMA APIs. Setting this config
+          option permits the IOMMU driver to set a unity map for
+          all the OS-visible memory. Hence the driver can continue
+          to use physical addresses for DMA.
 
 config DMAR_FLOPPY_WA
         def_bool y
         depends on DMAR
-        help
-         Floppy disk drivers are know to bypass DMA API calls
-         thereby failing to work when IOMMU is enabled. This
-         workaround will setup a 1:1 mapping for the first
-         16M to make floppy (an ISA device) work.
+        ---help---
+          Floppy disk drivers are know to bypass DMA API calls
+          thereby failing to work when IOMMU is enabled. This
+          workaround will setup a 1:1 mapping for the first
+          16M to make floppy (an ISA device) work.
 
 config INTR_REMAP
         bool "Support for Interrupt Remapping (EXPERIMENTAL)"
         depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL
-        help
-         Supports Interrupt remapping for IO-APIC and MSI devices.
-         To use x2apic mode in the CPU's which support x2APIC enhancements or
-         to support platforms with CPU's having > 8 bit APIC ID, say Y.
+        ---help---
+          Supports Interrupt remapping for IO-APIC and MSI devices.
+          To use x2apic mode in the CPU's which support x2APIC enhancements or
+          to support platforms with CPU's having > 8 bit APIC ID, say Y.
 
 source "drivers/pci/pcie/Kconfig"
 
@@ -1860,8 +1845,7 @@ if X86_32
 
 config ISA
         bool "ISA support"
-        depends on !X86_VOYAGER
-        help
+        ---help---
           Find out whether you have ISA slots on your motherboard.  ISA is the
           name of a bus system, i.e. the way the CPU talks to the other stuff
           inside your box.  Other bus systems are PCI, EISA, MicroChannel
@@ -1887,9 +1871,8 @@ config EISA
 source "drivers/eisa/Kconfig"
 
 config MCA
-        bool "MCA support" if !X86_VOYAGER
-        default y if X86_VOYAGER
-        help
+        bool "MCA support"
+        ---help---
           MicroChannel Architecture is found in some IBM PS/2 machines and
           laptops.  It is a bus system similar to PCI or ISA. See
           <file:Documentation/mca.txt> (and especially the web page given
@@ -1899,8 +1882,7 @@ source "drivers/mca/Kconfig"
 
 config SCx200
         tristate "NatSemi SCx200 support"
-        depends on !X86_VOYAGER
-        help
+        ---help---
           This provides basic support for National Semiconductor's
           (now AMD's) Geode processors.  The driver probes for the
           PCI-IDs of several on-chip devices, so its a good dependency
@@ -1912,7 +1894,7 @@ config SCx200HR_TIMER
         tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"
         depends on SCx200 && GENERIC_TIME
         default y
-        help
+        ---help---
           This driver provides a clocksource built upon the on-chip
           27MHz high-resolution timer.  Its also a workaround for
           NSC Geode SC-1100's buggy TSC, which loses time when the
@@ -1923,7 +1905,7 @@ config GEODE_MFGPT_TIMER
         def_bool y
         prompt "Geode Multi-Function General Purpose Timer (MFGPT) events"
         depends on MGEODE_LX && GENERIC_TIME && GENERIC_CLOCKEVENTS
-        help
+        ---help---
           This driver provides a clock event source based on the MFGPT
           timer(s) in the CS5535 and CS5536 companion chip for the geode.
           MFGPTs have a better resolution and max interval than the
@@ -1932,7 +1914,7 @@ config GEODE_MFGPT_TIMER
 config OLPC
         bool "One Laptop Per Child support"
         default n
-        help
+        ---help---
           Add support for detecting the unique features of the OLPC
           XO hardware.
 
@@ -1957,16 +1939,16 @@ config IA32_EMULATION
         bool "IA32 Emulation"
         depends on X86_64
         select COMPAT_BINFMT_ELF
-        help
+        ---help---
           Include code to run 32-bit programs under a 64-bit kernel. You should
           likely turn this on, unless you're 100% sure that you don't have any
           32-bit programs left.
 
 config IA32_AOUT
-       tristate "IA32 a.out support"
-       depends on IA32_EMULATION
-       help
-         Support old a.out binaries in the 32bit emulation.
+        tristate "IA32 a.out support"
+        depends on IA32_EMULATION
+        ---help---
+          Support old a.out binaries in the 32bit emulation.
 
 config COMPAT
         def_bool y
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 085fef4d8660..a95eaf0e582a 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -50,7 +50,7 @@ config M386
 config M486
         bool "486"
         depends on X86_32
-        help
+        ---help---
           Select this for a 486 series processor, either Intel or one of the
           compatible processors from AMD, Cyrix, IBM, or Intel.  Includes DX,
           DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
@@ -59,7 +59,7 @@ config M486
 config M586
         bool "586/K5/5x86/6x86/6x86MX"
         depends on X86_32
-        help
+        ---help---
           Select this for an 586 or 686 series processor such as the AMD K5,
           the Cyrix 5x86, 6x86 and 6x86MX.  This choice does not
           assume the RDTSC (Read Time Stamp Counter) instruction.
@@ -67,21 +67,21 @@ config M586
 config M586TSC
         bool "Pentium-Classic"
         depends on X86_32
-        help
+        ---help---
           Select this for a Pentium Classic processor with the RDTSC (Read
           Time Stamp Counter) instruction for benchmarking.
 
 config M586MMX
         bool "Pentium-MMX"
         depends on X86_32
-        help
+        ---help---
           Select this for a Pentium with the MMX graphics/multimedia
           extended instructions.
 
 config M686
         bool "Pentium-Pro"
         depends on X86_32
-        help
+        ---help---
           Select this for Intel Pentium Pro chips.  This enables the use of
           Pentium Pro extended instructions, and disables the init-time guard
           against the f00f bug found in earlier Pentiums.
@@ -89,7 +89,7 @@ config M686
 config MPENTIUMII
         bool "Pentium-II/Celeron(pre-Coppermine)"
         depends on X86_32
-        help
+        ---help---
           Select this for Intel chips based on the Pentium-II and
           pre-Coppermine Celeron core.  This option enables an unaligned
           copy optimization, compiles the kernel with optimization flags
@@ -99,7 +99,7 @@ config MPENTIUMII
 config MPENTIUMIII
         bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
         depends on X86_32
-        help
+        ---help---
           Select this for Intel chips based on the Pentium-III and
           Celeron-Coppermine core.  This option enables use of some
           extended prefetch instructions in addition to the Pentium II
@@ -108,14 +108,14 @@ config MPENTIUMIII
 config MPENTIUMM
         bool "Pentium M"
         depends on X86_32
-        help
+        ---help---
           Select this for Intel Pentium M (not Pentium-4 M)
           notebook chips.
 
 config MPENTIUM4
         bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
         depends on X86_32
-        help
+        ---help---
           Select this for Intel Pentium 4 chips.  This includes the
           Pentium 4, Pentium D, P4-based Celeron and Xeon, and
           Pentium-4 M (not Pentium M) chips.  This option enables compile
@@ -151,7 +151,7 @@ config MPENTIUM4
 config MK6
         bool "K6/K6-II/K6-III"
         depends on X86_32
-        help
+        ---help---
           Select this for an AMD K6-family processor.  Enables use of
           some extended instructions, and passes appropriate optimization
           flags to GCC.
@@ -159,14 +159,14 @@ config MK6
 config MK7
         bool "Athlon/Duron/K7"
         depends on X86_32
-        help
+        ---help---
           Select this for an AMD Athlon K7-family processor.  Enables use of
           some extended instructions, and passes appropriate optimization
           flags to GCC.
 
 config MK8
         bool "Opteron/Athlon64/Hammer/K8"
-        help
+        ---help---
           Select this for an AMD Opteron or Athlon64 Hammer-family processor.
           Enables use of some extended instructions, and passes appropriate
           optimization flags to GCC.
@@ -174,7 +174,7 @@ config MK8
 config MCRUSOE
         bool "Crusoe"
         depends on X86_32
-        help
+        ---help---
           Select this for a Transmeta Crusoe processor.  Treats the processor
           like a 586 with TSC, and sets some GCC optimization flags (like a
           Pentium Pro with no alignment requirements).
@@ -182,13 +182,13 @@ config MCRUSOE
 config MEFFICEON
         bool "Efficeon"
         depends on X86_32
-        help
+        ---help---
           Select this for a Transmeta Efficeon processor.
 
 config MWINCHIPC6
         bool "Winchip-C6"
         depends on X86_32
-        help
+        ---help---
           Select this for an IDT Winchip C6 chip.  Linux and GCC
           treat this chip as a 586TSC with some extended instructions
           and alignment requirements.
@@ -196,7 +196,7 @@ config MWINCHIPC6
 config MWINCHIP3D
         bool "Winchip-2/Winchip-2A/Winchip-3"
         depends on X86_32
-        help
+        ---help---
           Select this for an IDT Winchip-2, 2A or 3.  Linux and GCC
           treat this chip as a 586TSC with some extended instructions
           and alignment requirements.  Also enable out of order memory
@@ -206,19 +206,19 @@ config MWINCHIP3D
 config MGEODEGX1
         bool "GeodeGX1"
         depends on X86_32
-        help
+        ---help---
           Select this for a Geode GX1 (Cyrix MediaGX) chip.
 
 config MGEODE_LX
         bool "Geode GX/LX"
         depends on X86_32
-        help
+        ---help---
           Select this for AMD Geode GX and LX processors.
 
 config MCYRIXIII
         bool "CyrixIII/VIA-C3"
         depends on X86_32
-        help
+        ---help---
           Select this for a Cyrix III or C3 chip.  Presently Linux and GCC
           treat this chip as a generic 586. Whilst the CPU is 686 class,
           it lacks the cmov extension which gcc assumes is present when
@@ -230,7 +230,7 @@ config MCYRIXIII
 config MVIAC3_2
         bool "VIA C3-2 (Nehemiah)"
         depends on X86_32
-        help
+        ---help---
           Select this for a VIA C3 "Nehemiah". Selecting this enables usage
           of SSE and tells gcc to treat the CPU as a 686.
           Note, this kernel will not boot on older (pre model 9) C3s.
@@ -238,14 +238,14 @@ config MVIAC3_2
 config MVIAC7
         bool "VIA C7"
         depends on X86_32
-        help
+        ---help---
           Select this for a VIA C7.  Selecting this uses the correct cache
           shift and tells gcc to treat the CPU as a 686.
 
 config MPSC
         bool "Intel P4 / older Netburst based Xeon"
         depends on X86_64
-        help
+        ---help---
           Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
           Xeon CPUs with Intel 64bit which is compatible with x86-64.
           Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
@@ -255,7 +255,7 @@ config MPSC
 
 config MCORE2
         bool "Core 2/newer Xeon"
-        help
+        ---help---
 
           Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
           53xx) CPUs. You can distinguish newer from older Xeons by the CPU
@@ -265,7 +265,7 @@ config MCORE2
 config GENERIC_CPU
         bool "Generic-x86-64"
         depends on X86_64
-        help
+        ---help---
           Generic x86-64 CPU.
           Run equally well on all x86-64 CPUs.
 
@@ -274,7 +274,7 @@ endchoice
 config X86_GENERIC
         bool "Generic x86 support"
         depends on X86_32
-        help
+        ---help---
           Instead of just including optimizations for the selected
           x86 variant (e.g. PII, Crusoe or Athlon), include some more
           generic optimizations as well. This will make the kernel
@@ -319,7 +319,7 @@ config X86_XADD
 config X86_PPRO_FENCE
         bool "PentiumPro memory ordering errata workaround"
         depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
-        help
+        ---help---
           Old PentiumPro multiprocessor systems had errata that could cause
           memory operations to violate the x86 ordering standard in rare cases.
           Enabling this option will attempt to work around some (but not all)
@@ -412,14 +412,14 @@ config X86_DEBUGCTLMSR
 
 menuconfig PROCESSOR_SELECT
         bool "Supported processor vendors" if EMBEDDED
-        help
+        ---help---
           This lets you choose what x86 vendor support code your kernel
           will include.
 
 config CPU_SUP_INTEL
         default y
         bool "Support Intel processors" if PROCESSOR_SELECT
-        help
+        ---help---
           This enables detection, tunings and quirks for Intel processors
 
           You need this enabled if you want your kernel to run on an
@@ -433,7 +433,7 @@ config CPU_SUP_CYRIX_32
         default y
         bool "Support Cyrix processors" if PROCESSOR_SELECT
         depends on !64BIT
-        help
+        ---help---
           This enables detection, tunings and quirks for Cyrix processors
 
           You need this enabled if you want your kernel to run on a
@@ -446,7 +446,7 @@ config CPU_SUP_CYRIX_32
 config CPU_SUP_AMD
         default y
         bool "Support AMD processors" if PROCESSOR_SELECT
-        help
+        ---help---
           This enables detection, tunings and quirks for AMD processors
 
           You need this enabled if you want your kernel to run on an
@@ -460,7 +460,7 @@ config CPU_SUP_CENTAUR_32
         default y
         bool "Support Centaur processors" if PROCESSOR_SELECT
         depends on !64BIT
-        help
+        ---help---
           This enables detection, tunings and quirks for Centaur processors
 
           You need this enabled if you want your kernel to run on a
@@ -474,7 +474,7 @@ config CPU_SUP_CENTAUR_64
         default y
         bool "Support Centaur processors" if PROCESSOR_SELECT
         depends on 64BIT
-        help
+        ---help---
           This enables detection, tunings and quirks for Centaur processors
 
           You need this enabled if you want your kernel to run on a
@@ -488,7 +488,7 @@ config CPU_SUP_TRANSMETA_32
         default y
         bool "Support Transmeta processors" if PROCESSOR_SELECT
         depends on !64BIT
-        help
+        ---help---
           This enables detection, tunings and quirks for Transmeta processors
 
           You need this enabled if you want your kernel to run on a
@@ -502,7 +502,7 @@ config CPU_SUP_UMC_32
         default y
         bool "Support UMC processors" if PROCESSOR_SELECT
         depends on !64BIT
-        help
+        ---help---
           This enables detection, tunings and quirks for UMC processors
 
           You need this enabled if you want your kernel to run on a
@@ -521,7 +521,7 @@ config X86_PTRACE_BTS
         bool "Branch Trace Store"
         default y
         depends on X86_DEBUGCTLMSR
-        help
+        ---help---
           This adds a ptrace interface to the hardware's branch trace store.
 
           Debuggers may use it to collect an execution trace of the debugged
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index 28f111461ca8..ba4781b93890 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -7,7 +7,7 @@ source "lib/Kconfig.debug"
 
 config STRICT_DEVMEM
         bool "Filter access to /dev/mem"
-        help
+        ---help---
           If this option is disabled, you allow userspace (root) access to all
           of memory, including kernel and userspace memory. Accidental
           access to this is obviously disastrous, but specific access can
@@ -25,7 +25,7 @@ config STRICT_DEVMEM
 config X86_VERBOSE_BOOTUP
         bool "Enable verbose x86 bootup info messages"
         default y
-        help
+        ---help---
           Enables the informational output from the decompression stage
           (e.g. bzImage) of the boot. If you disable this you will still
           see errors. Disable this if you want silent bootup.
@@ -33,7 +33,7 @@ config X86_VERBOSE_BOOTUP
 config EARLY_PRINTK
         bool "Early printk" if EMBEDDED
         default y
-        help
+        ---help---
           Write kernel log output directly into the VGA buffer or to a serial
           port.
 
@@ -47,7 +47,7 @@ config EARLY_PRINTK_DBGP
         bool "Early printk via EHCI debug port"
         default n
         depends on EARLY_PRINTK && PCI
-        help
+        ---help---
           Write kernel log output directly into the EHCI debug port.
 
           This is useful for kernel debugging when your machine crashes very
@@ -59,14 +59,14 @@ config EARLY_PRINTK_DBGP
 config DEBUG_STACKOVERFLOW
         bool "Check for stack overflows"
         depends on DEBUG_KERNEL
-        help
+        ---help---
           This option will cause messages to be printed if free stack space
           drops below a certain limit.
 
 config DEBUG_STACK_USAGE
         bool "Stack utilization instrumentation"
         depends on DEBUG_KERNEL
-        help
+        ---help---
           Enables the display of the minimum amount of free stack which each
           task has ever had available in the sysrq-T and sysrq-P debug output.
 
@@ -75,7 +75,7 @@ config DEBUG_STACK_USAGE
 config DEBUG_PAGEALLOC
         bool "Debug page memory allocations"
         depends on DEBUG_KERNEL
-        help
+        ---help---
           Unmap pages from the kernel linear mapping after free_pages().
           This results in a large slowdown, but helps to find certain types
           of memory corruptions.
@@ -83,9 +83,9 @@ config DEBUG_PAGEALLOC
 config DEBUG_PER_CPU_MAPS
         bool "Debug access to per_cpu maps"
         depends on DEBUG_KERNEL
-        depends on X86_SMP
+        depends on SMP
         default n
-        help
+        ---help---
           Say Y to verify that the per_cpu map being accessed has
           been setup.  Adds a fair amount of code to kernel memory
           and decreases performance.
@@ -96,7 +96,7 @@ config X86_PTDUMP
         bool "Export kernel pagetable layout to userspace via debugfs"
         depends on DEBUG_KERNEL
         select DEBUG_FS
-        help
+        ---help---
           Say Y here if you want to show the kernel pagetable layout in a
           debugfs file. This information is only useful for kernel developers
           who are working in architecture specific areas of the kernel.
@@ -108,7 +108,7 @@ config DEBUG_RODATA
         bool "Write protect kernel read-only data structures"
         default y
         depends on DEBUG_KERNEL
-        help
+        ---help---
           Mark the kernel read-only data as write-protected in the pagetables,
           in order to catch accidental (and incorrect) writes to such const
           data. This is recommended so that we can catch kernel bugs sooner.
@@ -118,7 +118,7 @@ config DEBUG_RODATA_TEST
         bool "Testcase for the DEBUG_RODATA feature"
         depends on DEBUG_RODATA
         default y
-        help
+        ---help---
           This option enables a testcase for the DEBUG_RODATA
           feature as well as for the change_page_attr() infrastructure.
           If in doubt, say "N"
@@ -126,7 +126,7 @@ config DEBUG_RODATA_TEST
 config DEBUG_NX_TEST
         tristate "Testcase for the NX non-executable stack feature"
         depends on DEBUG_KERNEL && m
-        help
+        ---help---
           This option enables a testcase for the CPU NX capability
           and the software setup of this feature.
           If in doubt, say "N"
@@ -134,7 +134,7 @@ config DEBUG_NX_TEST
 config 4KSTACKS
         bool "Use 4Kb for kernel stacks instead of 8Kb"
         depends on X86_32
-        help
+        ---help---
           If you say Y here the kernel will use a 4Kb stacksize for the
           kernel stack attached to each process/thread. This facilitates
           running more threads on a system and also reduces the pressure
@@ -145,7 +145,7 @@ config DOUBLEFAULT
         default y
         bool "Enable doublefault exception handler" if EMBEDDED
         depends on X86_32
-        help
+        ---help---
           This option allows trapping of rare doublefault exceptions that
           would otherwise cause a system to silently reboot. Disabling this
           option saves about 4k and might cause you much additional grey
@@ -155,7 +155,7 @@ config IOMMU_DEBUG
         bool "Enable IOMMU debugging"
         depends on GART_IOMMU && DEBUG_KERNEL
         depends on X86_64
-        help
+        ---help---
           Force the IOMMU to on even when you have less than 4GB of
           memory and add debugging code. On overflow always panic. And
           allow to enable IOMMU leak tracing. Can be disabled at boot
@@ -171,7 +171,7 @@ config IOMMU_LEAK
         bool "IOMMU leak tracing"
         depends on DEBUG_KERNEL
         depends on IOMMU_DEBUG
-        help
+        ---help---
           Add a simple leak tracer to the IOMMU code. This is useful when you
           are debugging a buggy device driver that leaks IOMMU mappings.
 
@@ -224,25 +224,25 @@ choice
 
 config IO_DELAY_0X80
         bool "port 0x80 based port-IO delay [recommended]"
-        help
+        ---help---
           This is the traditional Linux IO delay used for in/out_p.
           It is the most tested hence safest selection here.
 
 config IO_DELAY_0XED
         bool "port 0xed based port-IO delay"
-        help
+        ---help---
           Use port 0xed as the IO delay. This frees up port 0x80 which is
           often used as a hardware-debug port.
 
 config IO_DELAY_UDELAY
         bool "udelay based port-IO delay"
-        help
+        ---help---
           Use udelay(2) as the IO delay method. This provides the delay
           while not having any side-effect on the IO port space.
 
 config IO_DELAY_NONE
         bool "no port-IO delay"
-        help
+        ---help---
           No port-IO delay. Will break on old boxes that require port-IO
           delay for certain operations. Should work on most new machines.
 
@@ -276,18 +276,18 @@ config DEBUG_BOOT_PARAMS
         bool "Debug boot parameters"
         depends on DEBUG_KERNEL
         depends on DEBUG_FS
-        help
+        ---help---
           This option will cause struct boot_params to be exported via debugfs.
 
 config CPA_DEBUG
         bool "CPA self-test code"
         depends on DEBUG_KERNEL
-        help
+        ---help---
           Do change_page_attr() self-tests every 30 seconds.
 
 config OPTIMIZE_INLINING
         bool "Allow gcc to uninline functions marked 'inline'"
-        help
+        ---help---
           This option determines if the kernel forces gcc to inline the functions
           developers have marked 'inline'. Doing so takes away freedom from gcc to
           do what it thinks is best, which is desirable for the gcc 3.x series of
@@ -300,4 +300,3 @@ config OPTIMIZE_INLINING
           If unsure, say N.
 
 endmenu
-
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index ab48ab497e5a..1836191839ee 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -105,29 +105,6 @@ KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
 # prevent gcc from generating any FP code by mistake
 KBUILD_CFLAGS += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,)
 
-###
-# Sub architecture support
-# fcore-y is linked before mcore-y files.
-
-# Default subarch .c files
-mcore-y  := arch/x86/mach-default/
-
-# Voyager subarch support
-mflags-$(CONFIG_X86_VOYAGER)    := -Iarch/x86/include/asm/mach-voyager
-mcore-$(CONFIG_X86_VOYAGER)     := arch/x86/mach-voyager/
-
-# generic subarchitecture
-mflags-$(CONFIG_X86_GENERICARCH):= -Iarch/x86/include/asm/mach-generic
-fcore-$(CONFIG_X86_GENERICARCH) += arch/x86/mach-generic/
-mcore-$(CONFIG_X86_GENERICARCH) := arch/x86/mach-default/
-
-# default subarch .h files
-mflags-y += -Iarch/x86/include/asm/mach-default
-
-# 64 bit does not support subarch support - clear sub arch variables
-fcore-$(CONFIG_X86_64)  :=
-mcore-$(CONFIG_X86_64)  :=
-
 KBUILD_CFLAGS += $(mflags-y)
 KBUILD_AFLAGS += $(mflags-y)
 
@@ -153,9 +130,6 @@ core-$(CONFIG_LGUEST_GUEST) += arch/x86/lguest/
 core-y += arch/x86/kernel/
 core-y += arch/x86/mm/
 
-# Remaining sub architecture files
-core-y += $(mcore-y)
-
 core-y += arch/x86/crypto/
 core-y += arch/x86/vdso/
 core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/
diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig
index edba00d98ac3..739bce993b56 100644
--- a/arch/x86/configs/i386_defconfig
+++ b/arch/x86/configs/i386_defconfig
@@ -188,7 +188,6 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 CONFIG_SMP=y
 CONFIG_X86_FIND_SMP_CONFIG=y
 CONFIG_X86_MPPARSE=y
-CONFIG_X86_PC=y
 # CONFIG_X86_ELAN is not set
 # CONFIG_X86_VOYAGER is not set
 # CONFIG_X86_GENERICARCH is not set
diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig
index 322dd2748fc9..02b514e8f4c4 100644
--- a/arch/x86/configs/x86_64_defconfig
+++ b/arch/x86/configs/x86_64_defconfig
@@ -187,7 +187,6 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 CONFIG_SMP=y
 CONFIG_X86_FIND_SMP_CONFIG=y
 CONFIG_X86_MPPARSE=y
-CONFIG_X86_PC=y
 # CONFIG_X86_ELAN is not set
 # CONFIG_X86_VOYAGER is not set
 # CONFIG_X86_GENERICARCH is not set
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index ab1d51a8855e..fba49f66228f 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -33,7 +33,13 @@
         } while (0)
 
 
+#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
 extern void generic_apic_probe(void);
+#else
+static inline void generic_apic_probe(void)
+{
+}
+#endif
 
 #ifdef CONFIG_X86_LOCAL_APIC
 
@@ -41,6 +47,21 @@ extern unsigned int apic_verbosity;
 extern int local_apic_timer_c2_ok;
 
 extern int disable_apic;
+
+#ifdef CONFIG_SMP
+extern void __inquire_remote_apic(int apicid);
+#else /* CONFIG_SMP */
+static inline void __inquire_remote_apic(int apicid)
+{
+}
+#endif /* CONFIG_SMP */
+
+static inline void default_inquire_remote_apic(int apicid)
+{
+        if (apic_verbosity >= APIC_DEBUG)
+                __inquire_remote_apic(apicid);
+}
+
 /*
  * Basic functions accessing APICs.
  */
@@ -124,12 +145,35 @@ struct apic_ops {
 
 extern struct apic_ops *apic_ops;
 
-#define apic_read (apic_ops->read)
-#define apic_write (apic_ops->write)
-#define apic_icr_read (apic_ops->icr_read)
-#define apic_icr_write (apic_ops->icr_write)
-#define apic_wait_icr_idle (apic_ops->wait_icr_idle)
-#define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle)
+static inline u32 apic_read(u32 reg)
+{
+        return apic_ops->read(reg);
+}
+
+static inline void apic_write(u32 reg, u32 val)
+{
+        apic_ops->write(reg, val);
+}
+
+static inline u64 apic_icr_read(void)
+{
+        return apic_ops->icr_read();
+}
+
+static inline void apic_icr_write(u32 low, u32 high)
+{
+        apic_ops->icr_write(low, high);
+}
+
+static inline void apic_wait_icr_idle(void)
+{
+        apic_ops->wait_icr_idle();
+}
+
+static inline u32 safe_apic_wait_icr_idle(void)
+{
+        return apic_ops->safe_wait_icr_idle();
+}
 
 extern int get_physical_broadcast(void);
 
@@ -196,4 +240,22 @@ static inline void disable_local_APIC(void) { }
 
 #endif /* !CONFIG_X86_LOCAL_APIC */
 
+#ifdef CONFIG_X86_64
+#define SET_APIC_ID(x)          (apic->set_apic_id(x))
+#else
+
+#ifdef CONFIG_X86_LOCAL_APIC
+static inline unsigned default_get_apic_id(unsigned long x)
+{
+        unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
+
+        if (APIC_XAPIC(ver))
+                return (x >> 24) & 0xFF;
+        else
+                return (x >> 24) & 0x0F;
+}
+#endif
+
+#endif
+
 #endif /* _ASM_X86_APIC_H */
diff --git a/arch/x86/include/asm/mach-default/apm.h b/arch/x86/include/asm/apm.h
index 20370c6db74b..20370c6db74b 100644
--- a/arch/x86/include/asm/mach-default/apm.h
+++ b/arch/x86/include/asm/apm.h
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h
deleted file mode 100644
index d8dd9f537911..000000000000
--- a/arch/x86/include/asm/bigsmp/apic.h
+++ /dev/null
@@ -1,155 +0,0 @@
-#ifndef __ASM_MACH_APIC_H
-#define __ASM_MACH_APIC_H
-
-#define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu))
-#define esr_disable (1)
-
-static inline int apic_id_registered(void)
-{
-        return (1);
-}
-
-static inline const cpumask_t *target_cpus(void)
-{
-#ifdef CONFIG_SMP
-        return &cpu_online_map;
-#else
-        return &cpumask_of_cpu(0);
-#endif
-}
-
-#undef APIC_DEST_LOGICAL
-#define APIC_DEST_LOGICAL       0
-#define APIC_DFR_VALUE          (APIC_DFR_FLAT)
-#define INT_DELIVERY_MODE       (dest_Fixed)
-#define INT_DEST_MODE           (0)    /* phys delivery to target proc */
-#define NO_BALANCE_IRQ          (0)
-
-static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
-{
-        return (0);
-}
-
-static inline unsigned long check_apicid_present(int bit)
-{
-        return (1);
-}
-
-static inline unsigned long calculate_ldr(int cpu)
-{
-        unsigned long val, id;
-        val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
-        id = xapic_phys_to_log_apicid(cpu);
-        val |= SET_APIC_LOGICAL_ID(id);
-        return val;
-}
-
-/*
- * Set up the logical destination ID.
- *
- * Intel recommends to set DFR, LDR and TPR before enabling
- * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
- * document number 292116).  So here it goes...
- */
-static inline void init_apic_ldr(void)
-{
-        unsigned long val;
-        int cpu = smp_processor_id();
-
-        apic_write(APIC_DFR, APIC_DFR_VALUE);
-        val = calculate_ldr(cpu);
-        apic_write(APIC_LDR, val);
-}
-
-static inline void setup_apic_routing(void)
-{
-        printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
-                "Physflat", nr_ioapics);
-}
-
-static inline int multi_timer_check(int apic, int irq)
-{
-        return (0);
-}
-
-static inline int apicid_to_node(int logical_apicid)
-{
-        return apicid_2_node[hard_smp_processor_id()];
-}
-
-static inline int cpu_present_to_apicid(int mps_cpu)
-{
-        if (mps_cpu < nr_cpu_ids)
-                return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
-
-        return BAD_APICID;
-}
-
-static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
-{
-        return physid_mask_of_physid(phys_apicid);
-}
-
-extern u8 cpu_2_logical_apicid[];
-/* Mapping from cpu number to logical apicid */
-static inline int cpu_to_logical_apicid(int cpu)
-{
-        if (cpu >= nr_cpu_ids)
-                return BAD_APICID;
-        return cpu_physical_id(cpu);
-}
-
-static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
-{
-        /* For clustered we don't have a good way to do this yet - hack */
-        return physids_promote(0xFFL);
-}
-
-static inline void setup_portio_remap(void)
-{
-}
-
-static inline void enable_apic_mode(void)
-{
-}
-
-static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
-{
-        return (1);
-}
-
-/* As we are using single CPU as destination, pick only one CPU here */
-static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
-{
-        int cpu;
-        int apicid;     
-
-        cpu = first_cpu(*cpumask);
-        apicid = cpu_to_logical_apicid(cpu);
-        return apicid;
-}
-
-static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
-                                                  const struct cpumask *andmask)
-{
-        int cpu;
-
-        /*
-         * We're using fixed IRQ delivery, can only return one phys APIC ID.
-         * May as well be the first.
-         */
-        for_each_cpu_and(cpu, cpumask, andmask)
-                if (cpumask_test_cpu(cpu, cpu_online_mask))
-                        break;
-        if (cpu < nr_cpu_ids)
-                return cpu_to_logical_apicid(cpu);
-
-        return BAD_APICID;
-}
-
-static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
-{
-        return cpuid_apic >> index_msb;
-}
-
-#endif /* __ASM_MACH_APIC_H */
diff --git a/arch/x86/include/asm/bigsmp/apicdef.h b/arch/x86/include/asm/bigsmp/apicdef.h
deleted file mode 100644
index 392c3f5ef2fe..000000000000
--- a/arch/x86/include/asm/bigsmp/apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef __ASM_MACH_APICDEF_H
-#define __ASM_MACH_APICDEF_H
-
-#define         APIC_ID_MASK            (0xFF<<24)
-
-static inline unsigned get_apic_id(unsigned long x)
-{
-        return (((x)>>24)&0xFF);
-}
-
-#define         GET_APIC_ID(x)  get_apic_id(x)
-
-#endif
diff --git a/arch/x86/include/asm/bigsmp/ipi.h b/arch/x86/include/asm/bigsmp/ipi.h
deleted file mode 100644
index 27fcd01b3ae6..000000000000
--- a/arch/x86/include/asm/bigsmp/ipi.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef __ASM_MACH_IPI_H
-#define __ASM_MACH_IPI_H
-
-void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
-void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
-
-static inline void send_IPI_mask(const struct cpumask *mask, int vector)
-{
-        send_IPI_mask_sequence(mask, vector);
-}
-
-static inline void send_IPI_allbutself(int vector)
-{
-        send_IPI_mask_allbutself(cpu_online_mask, vector);
-}
-
-static inline void send_IPI_all(int vector)
-{
-        send_IPI_mask(cpu_online_mask, vector);
-}
-
-#endif /* __ASM_MACH_IPI_H */
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index f03b23e32864..b185091bf19c 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -32,10 +32,6 @@ extern void arch_unregister_cpu(int);
 
 DECLARE_PER_CPU(int, cpu_state);
 
-#ifdef CONFIG_X86_HAS_BOOT_CPU_ID
-extern unsigned char boot_cpu_id;
-#else
-#define boot_cpu_id                             0
-#endif
+extern unsigned int boot_cpu_id;
 
 #endif /* _ASM_X86_CPU_H */
diff --git a/arch/x86/include/asm/mach-default/do_timer.h b/arch/x86/include/asm/do_timer.h
index 23ecda0b28a0..23ecda0b28a0 100644
--- a/arch/x86/include/asm/mach-default/do_timer.h
+++ b/arch/x86/include/asm/do_timer.h
diff --git a/arch/x86/include/asm/mach-default/entry_arch.h b/arch/x86/include/asm/entry_arch.h
index 6fa399ad1de2..854d538ae857 100644
--- a/arch/x86/include/asm/mach-default/entry_arch.h
+++ b/arch/x86/include/asm/entry_arch.h
@@ -9,7 +9,7 @@
  * is no hardware IRQ pin equivalent for them, they are triggered
  * through the ICC by us (IPIs)
  */
-#ifdef CONFIG_X86_SMP
+#ifdef CONFIG_SMP
 BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
 BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
 BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
@@ -41,10 +41,15 @@ BUILD_INTERRUPT3(invalidate_interrupt7,INVALIDATE_TLB_VECTOR_START+7,
  * a much simpler SMP time architecture:
  */
 #ifdef CONFIG_X86_LOCAL_APIC
+
 BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
 BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
 BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
 
+#ifdef CONFIG_PERF_COUNTERS
+BUILD_INTERRUPT(perf_counter_interrupt, LOCAL_PERF_VECTOR)
+#endif
+
 #ifdef CONFIG_X86_MCE_P4THERMAL
 BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
 #endif
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
deleted file mode 100644
index c58b9cc74465..000000000000
--- a/arch/x86/include/asm/es7000/apic.h
+++ /dev/null
@@ -1,242 +0,0 @@
-#ifndef __ASM_ES7000_APIC_H
-#define __ASM_ES7000_APIC_H
-
-#include <linux/gfp.h>
-
-#define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
-#define esr_disable (1)
-
-static inline int apic_id_registered(void)
-{
-                return (1);
-}
-
-static inline const cpumask_t *target_cpus_cluster(void)
-{
-        return &CPU_MASK_ALL;
-}
-
-static inline const cpumask_t *target_cpus(void)
-{
-        return &cpumask_of_cpu(smp_processor_id());
-}
-
-#define APIC_DFR_VALUE_CLUSTER          (APIC_DFR_CLUSTER)
-#define INT_DELIVERY_MODE_CLUSTER       (dest_LowestPrio)
-#define INT_DEST_MODE_CLUSTER           (1) /* logical delivery broadcast to all procs */
-#define NO_BALANCE_IRQ_CLUSTER          (1)
-
-#define APIC_DFR_VALUE          (APIC_DFR_FLAT)
-#define INT_DELIVERY_MODE       (dest_Fixed)
-#define INT_DEST_MODE           (0)    /* phys delivery to target procs */
-#define NO_BALANCE_IRQ          (0)
-#undef  APIC_DEST_LOGICAL
-#define APIC_DEST_LOGICAL       0x0
-
-static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
-{
-        return 0;
-}
-static inline unsigned long check_apicid_present(int bit)
-{
-        return physid_isset(bit, phys_cpu_present_map);
-}
-
-#define apicid_cluster(apicid) (apicid & 0xF0)
-
-static inline unsigned long calculate_ldr(int cpu)
-{
-        unsigned long id;
-        id = xapic_phys_to_log_apicid(cpu);
-        return (SET_APIC_LOGICAL_ID(id));
-}
-
-/*
- * Set up the logical destination ID.
- *
- * Intel recommends to set DFR, LdR and TPR before enabling
- * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
- * document number 292116).  So here it goes...
- */
-static inline void init_apic_ldr_cluster(void)
-{
-        unsigned long val;
-        int cpu = smp_processor_id();
-
-        apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER);
-        val = calculate_ldr(cpu);
-        apic_write(APIC_LDR, val);
-}
-
-static inline void init_apic_ldr(void)
-{
-        unsigned long val;
-        int cpu = smp_processor_id();
-
-        apic_write(APIC_DFR, APIC_DFR_VALUE);
-        val = calculate_ldr(cpu);
-        apic_write(APIC_LDR, val);
-}
-
-extern int apic_version [MAX_APICS];
-static inline void setup_apic_routing(void)
-{
-        int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
-        printk("Enabling APIC mode:  %s. Using %d I/O APICs, target cpus %lx\n",
-                (apic_version[apic] == 0x14) ?
-                        "Physical Cluster" : "Logical Cluster",
-                        nr_ioapics, cpus_addr(*target_cpus())[0]);
-}
-
-static inline int multi_timer_check(int apic, int irq)
-{
-        return 0;
-}
-
-static inline int apicid_to_node(int logical_apicid)
-{
-        return 0;
-}
-
-
-static inline int cpu_present_to_apicid(int mps_cpu)
-{
-        if (!mps_cpu)
-                return boot_cpu_physical_apicid;
-        else if (mps_cpu < nr_cpu_ids)
-                return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
-        else
-                return BAD_APICID;
-}
-
-static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
-{
-        static int id = 0;
-        physid_mask_t mask;
-        mask = physid_mask_of_physid(id);
-        ++id;
-        return mask;
-}
-
-extern u8 cpu_2_logical_apicid[];
-/* Mapping from cpu number to logical apicid */
-static inline int cpu_to_logical_apicid(int cpu)
-{
-#ifdef CONFIG_SMP
-        if (cpu >= nr_cpu_ids)
-                return BAD_APICID;
-        return (int)cpu_2_logical_apicid[cpu];
-#else
-        return logical_smp_processor_id();
-#endif
-}
-
-static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
-{
-        /* For clustered we don't have a good way to do this yet - hack */
-        return physids_promote(0xff);
-}
-
-
-static inline void setup_portio_remap(void)
-{
-}
-
-extern unsigned int boot_cpu_physical_apicid;
-static inline int check_phys_apicid_present(int cpu_physical_apicid)
-{
-        boot_cpu_physical_apicid = read_apic_id();
-        return (1);
-}
-
-static inline unsigned int
-cpu_mask_to_apicid_cluster(const struct cpumask *cpumask)
-{
-        int num_bits_set;
-        int cpus_found = 0;
-        int cpu;
-        int apicid;
-
-        num_bits_set = cpumask_weight(cpumask);
-        /* Return id to all */
-        if (num_bits_set == nr_cpu_ids)
-                return 0xFF;
-        /*
-         * The cpus in the mask must all be on the apic cluster.  If are not
-         * on the same apicid cluster return default value of TARGET_CPUS.
-         */
-        cpu = cpumask_first(cpumask);
-        apicid = cpu_to_logical_apicid(cpu);
-        while (cpus_found < num_bits_set) {
-                if (cpumask_test_cpu(cpu, cpumask)) {
-                        int new_apicid = cpu_to_logical_apicid(cpu);
-                        if (apicid_cluster(apicid) !=
-                                        apicid_cluster(new_apicid)){
-                                printk ("%s: Not a valid mask!\n", __func__);
-                                return 0xFF;
-                        }
-                        apicid = new_apicid;
-                        cpus_found++;
-                }
-                cpu++;
-        }
-        return apicid;
-}
-
-static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
-{
-        int num_bits_set;
-        int cpus_found = 0;
-        int cpu;
-        int apicid;
-
-        num_bits_set = cpus_weight(*cpumask);
-        /* Return id to all */
-        if (num_bits_set == nr_cpu_ids)
-                return cpu_to_logical_apicid(0);
-        /*
-         * The cpus in the mask must all be on the apic cluster.  If are not
-         * on the same apicid cluster return default value of TARGET_CPUS.
-         */
-        cpu = first_cpu(*cpumask);
-        apicid = cpu_to_logical_apicid(cpu);
-        while (cpus_found < num_bits_set) {
-                if (cpu_isset(cpu, *cpumask)) {
-                        int new_apicid = cpu_to_logical_apicid(cpu);
-                        if (apicid_cluster(apicid) !=
-                                        apicid_cluster(new_apicid)){
-                                printk ("%s: Not a valid mask!\n", __func__);
-                                return cpu_to_logical_apicid(0);
-                        }
-                        apicid = new_apicid;
-                        cpus_found++;
-                }
-                cpu++;
-        }
-        return apicid;
-}
-
-
-static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask,
-                                                  const struct cpumask *andmask)
-{
-        int apicid = cpu_to_logical_apicid(0);
-        cpumask_var_t cpumask;
-
-        if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
-                return apicid;
-
-        cpumask_and(cpumask, inmask, andmask);
-        cpumask_and(cpumask, cpumask, cpu_online_mask);
-        apicid = cpu_mask_to_apicid(cpumask);
-
-        free_cpumask_var(cpumask);
-        return apicid;
-}
-
-static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
-{
-        return cpuid_apic >> index_msb;
-}
-
-#endif /* __ASM_ES7000_APIC_H */
diff --git a/arch/x86/include/asm/es7000/apicdef.h b/arch/x86/include/asm/es7000/apicdef.h
deleted file mode 100644
index 8b234a3cb851..000000000000
--- a/arch/x86/include/asm/es7000/apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef __ASM_ES7000_APICDEF_H
-#define __ASM_ES7000_APICDEF_H
-
-#define         APIC_ID_MASK            (0xFF<<24)
-
-static inline unsigned get_apic_id(unsigned long x)
-{
-        return (((x)>>24)&0xFF);
-}
-
-#define         GET_APIC_ID(x)  get_apic_id(x)
-
-#endif
diff --git a/arch/x86/include/asm/es7000/ipi.h b/arch/x86/include/asm/es7000/ipi.h
deleted file mode 100644
index 7e8ed24d4b8a..000000000000
--- a/arch/x86/include/asm/es7000/ipi.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef __ASM_ES7000_IPI_H
-#define __ASM_ES7000_IPI_H
-
-void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
-void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
-
-static inline void send_IPI_mask(const struct cpumask *mask, int vector)
-{
-        send_IPI_mask_sequence(mask, vector);
-}
-
-static inline void send_IPI_allbutself(int vector)
-{
-        send_IPI_mask_allbutself(cpu_online_mask, vector);
-}
-
-static inline void send_IPI_all(int vector)
-{
-        send_IPI_mask(cpu_online_mask, vector);
-}
-
-#endif /* __ASM_ES7000_IPI_H */
diff --git a/arch/x86/include/asm/es7000/mpparse.h b/arch/x86/include/asm/es7000/mpparse.h
deleted file mode 100644
index c1629b090ec2..000000000000
--- a/arch/x86/include/asm/es7000/mpparse.h
+++ /dev/null
@@ -1,29 +0,0 @@
-#ifndef __ASM_ES7000_MPPARSE_H
-#define __ASM_ES7000_MPPARSE_H
-
-#include <linux/acpi.h>
-
-extern int parse_unisys_oem (char *oemptr);
-extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
-extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
-extern void setup_unisys(void);
-
-#ifndef CONFIG_X86_GENERICARCH
-extern int acpi_madt_oem_check(char *oem_id, char *oem_table_id);
-extern int mps_oem_check(struct mpc_table *mpc, char *oem, char *productid);
-#endif
-
-#ifdef CONFIG_ACPI
-
-static inline int es7000_check_dsdt(void)
-{
-        struct acpi_table_header header;
-
-        if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) &&
-            !strncmp(header.oem_id, "UNISYS", 6))
-                return 1;
-        return 0;
-}
-#endif
-
-#endif /* __ASM_MACH_MPPARSE_H */
diff --git a/arch/x86/include/asm/es7000/wakecpu.h b/arch/x86/include/asm/es7000/wakecpu.h
deleted file mode 100644
index 78f0daaee436..000000000000
--- a/arch/x86/include/asm/es7000/wakecpu.h
+++ /dev/null
@@ -1,37 +0,0 @@
-#ifndef __ASM_ES7000_WAKECPU_H
-#define __ASM_ES7000_WAKECPU_H
-
-#define TRAMPOLINE_PHYS_LOW     0x467
-#define TRAMPOLINE_PHYS_HIGH    0x469
-
-static inline void wait_for_init_deassert(atomic_t *deassert)
-{
-#ifndef CONFIG_ES7000_CLUSTERED_APIC
-        while (!atomic_read(deassert))
-                cpu_relax();
-#endif
-        return;
-}
-
-/* Nothing to do for most platforms, since cleared by the INIT cycle */
-static inline void smp_callin_clear_local_apic(void)
-{
-}
-
-static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
-{
-}
-
-static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
-{
-}
-
-extern void __inquire_remote_apic(int apicid);
-
-static inline void inquire_remote_apic(int apicid)
-{
-        if (apic_verbosity >= APIC_DEBUG)
-                __inquire_remote_apic(apicid);
-}
-
-#endif /* __ASM_MACH_WAKECPU_H */
diff --git a/arch/x86/include/asm/genapic.h b/arch/x86/include/asm/genapic.h
index d48bee663a6f..273b99452ae0 100644
--- a/arch/x86/include/asm/genapic.h
+++ b/arch/x86/include/asm/genapic.h
@@ -1,5 +1,263 @@
+#ifndef _ASM_X86_GENAPIC_H
+#define _ASM_X86_GENAPIC_H
+
+#include <linux/cpumask.h>
+
+#include <asm/mpspec.h>
+#include <asm/atomic.h>
+
+/*
+ * Copyright 2004 James Cleverdon, IBM.
+ * Subject to the GNU Public License, v.2
+ *
+ * Generic APIC sub-arch data struct.
+ *
+ * Hacked for x86-64 by James Cleverdon from i386 architecture code by
+ * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
+ * James Cleverdon.
+ */
+struct genapic {
+        char *name;
+
+        int (*probe)(void);
+        int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
+        int (*apic_id_registered)(void);
+
+        u32 irq_delivery_mode;
+        u32 irq_dest_mode;
+
+        const struct cpumask *(*target_cpus)(void);
+
+        int disable_esr;
+
+        int dest_logical;
+        unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
+        unsigned long (*check_apicid_present)(int apicid);
+
+        void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
+        void (*init_apic_ldr)(void);
+
+        physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
+
+        void (*setup_apic_routing)(void);
+        int (*multi_timer_check)(int apic, int irq);
+        int (*apicid_to_node)(int logical_apicid);
+        int (*cpu_to_logical_apicid)(int cpu);
+        int (*cpu_present_to_apicid)(int mps_cpu);
+        physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
+        void (*setup_portio_remap)(void);
+        int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
+        void (*enable_apic_mode)(void);
+        int (*phys_pkg_id)(int cpuid_apic, int index_msb);
+
+        /*
+         * When one of the next two hooks returns 1 the genapic
+         * is switched to this. Essentially they are additional
+         * probe functions:
+         */
+        int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid);
+
+        unsigned int (*get_apic_id)(unsigned long x);
+        unsigned long (*set_apic_id)(unsigned int id);
+        unsigned long apic_id_mask;
+
+        unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
+        unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
+                                               const struct cpumask *andmask);
+
+        /* ipi */
+        void (*send_IPI_mask)(const struct cpumask *mask, int vector);
+        void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
+                                         int vector);
+        void (*send_IPI_allbutself)(int vector);
+        void (*send_IPI_all)(int vector);
+        void (*send_IPI_self)(int vector);
+
+        /* wakeup_secondary_cpu */
+        int (*wakeup_cpu)(int apicid, unsigned long start_eip);
+
+        int trampoline_phys_low;
+        int trampoline_phys_high;
+
+        void (*wait_for_init_deassert)(atomic_t *deassert);
+        void (*smp_callin_clear_local_apic)(void);
+        void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
+        void (*inquire_remote_apic)(int apicid);
+};
+
+extern struct genapic *apic;
+
+/*
+ * Warm reset vector default position:
+ */
+#define DEFAULT_TRAMPOLINE_PHYS_LOW             0x467
+#define DEFAULT_TRAMPOLINE_PHYS_HIGH            0x469
+
 #ifdef CONFIG_X86_32
-# include "genapic_32.h"
+extern void es7000_update_genapic_to_cluster(void);
 #else
-# include "genapic_64.h"
+extern struct genapic apic_flat;
+extern struct genapic apic_physflat;
+extern struct genapic apic_x2apic_cluster;
+extern struct genapic apic_x2apic_phys;
+extern int default_acpi_madt_oem_check(char *, char *);
+
+extern void apic_send_IPI_self(int vector);
+
+extern struct genapic apic_x2apic_uv_x;
+DECLARE_PER_CPU(int, x2apic_extra_bits);
+
+extern void default_setup_apic_routing(void);
+
+extern int default_cpu_present_to_apicid(int mps_cpu);
+extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
 #endif
+
+static inline void default_wait_for_init_deassert(atomic_t *deassert)
+{
+        while (!atomic_read(deassert))
+                cpu_relax();
+        return;
+}
+
+extern void generic_bigsmp_probe(void);
+
+
+#ifdef CONFIG_X86_LOCAL_APIC
+
+#include <asm/smp.h>
+
+#define APIC_DFR_VALUE  (APIC_DFR_FLAT)
+
+static inline const struct cpumask *default_target_cpus(void)
+{
+#ifdef CONFIG_SMP
+        return cpu_online_mask;
+#else
+        return cpumask_of(0);
+#endif
+}
+
+DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
+
+
+static inline unsigned int read_apic_id(void)
+{
+        unsigned int reg;
+
+        reg = apic_read(APIC_ID);
+
+        return apic->get_apic_id(reg);
+}
+
+#ifdef CONFIG_X86_64
+extern void default_setup_apic_routing(void);
+#else
+
+/*
+ * Set up the logical destination ID.
+ *
+ * Intel recommends to set DFR, LDR and TPR before enabling
+ * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
+ * document number 292116).  So here it goes...
+ */
+extern void default_init_apic_ldr(void);
+
+static inline int default_apic_id_registered(void)
+{
+        return physid_isset(read_apic_id(), phys_cpu_present_map);
+}
+
+static inline unsigned int
+default_cpu_mask_to_apicid(const struct cpumask *cpumask)
+{
+        return cpumask_bits(cpumask)[0];
+}
+
+static inline unsigned int
+default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                               const struct cpumask *andmask)
+{
+        unsigned long mask1 = cpumask_bits(cpumask)[0];
+        unsigned long mask2 = cpumask_bits(andmask)[0];
+        unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
+
+        return (unsigned int)(mask1 & mask2 & mask3);
+}
+
+static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
+{
+        return cpuid_apic >> index_msb;
+}
+
+static inline void default_setup_apic_routing(void)
+{
+#ifdef CONFIG_X86_IO_APIC
+        printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
+                                        "Flat", nr_ioapics);
+#endif
+}
+
+extern int default_apicid_to_node(int logical_apicid);
+
+#endif
+
+static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
+{
+        return physid_isset(apicid, bitmap);
+}
+
+static inline unsigned long default_check_apicid_present(int bit)
+{
+        return physid_isset(bit, phys_cpu_present_map);
+}
+
+static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map)
+{
+        return phys_map;
+}
+
+/* Mapping from cpu number to logical apicid */
+static inline int default_cpu_to_logical_apicid(int cpu)
+{
+        return 1 << cpu;
+}
+
+static inline int __default_cpu_present_to_apicid(int mps_cpu)
+{
+        if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
+                return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
+        else
+                return BAD_APICID;
+}
+
+static inline int
+__default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+        return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
+}
+
+#ifdef CONFIG_X86_32
+static inline int default_cpu_present_to_apicid(int mps_cpu)
+{
+        return __default_cpu_present_to_apicid(mps_cpu);
+}
+
+static inline int
+default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+        return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
+}
+#else
+extern int default_cpu_present_to_apicid(int mps_cpu);
+extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
+#endif
+
+static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
+{
+        return physid_mask_of_physid(phys_apicid);
+}
+
+#endif /* CONFIG_X86_LOCAL_APIC */
+
+#endif /* _ASM_X86_GENAPIC_64_H */
diff --git a/arch/x86/include/asm/genapic_32.h b/arch/x86/include/asm/genapic_32.h
deleted file mode 100644
index 4334502d3664..000000000000
--- a/arch/x86/include/asm/genapic_32.h
+++ /dev/null
@@ -1,141 +0,0 @@
-#ifndef _ASM_X86_GENAPIC_32_H
-#define _ASM_X86_GENAPIC_32_H
-
-#include <asm/mpspec.h>
-#include <asm/atomic.h>
-
-/*
- * Generic APIC driver interface.
- *
- * An straight forward mapping of the APIC related parts of the
- * x86 subarchitecture interface to a dynamic object.
- *
- * This is used by the "generic" x86 subarchitecture.
- *
- * Copyright 2003 Andi Kleen, SuSE Labs.
- */
-
-struct mpc_bus;
-struct mpc_table;
-struct mpc_cpu;
-
-struct genapic {
-        char *name;
-        int (*probe)(void);
-
-        int (*apic_id_registered)(void);
-        const struct cpumask *(*target_cpus)(void);
-        int int_delivery_mode;
-        int int_dest_mode;
-        int ESR_DISABLE;
-        int apic_destination_logical;
-        unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
-        unsigned long (*check_apicid_present)(int apicid);
-        int no_balance_irq;
-        int no_ioapic_check;
-        void (*init_apic_ldr)(void);
-        physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
-
-        void (*setup_apic_routing)(void);
-        int (*multi_timer_check)(int apic, int irq);
-        int (*apicid_to_node)(int logical_apicid);
-        int (*cpu_to_logical_apicid)(int cpu);
-        int (*cpu_present_to_apicid)(int mps_cpu);
-        physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
-        void (*setup_portio_remap)(void);
-        int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
-        void (*enable_apic_mode)(void);
-        u32 (*phys_pkg_id)(u32 cpuid_apic, int index_msb);
-
-        /* mpparse */
-        /* When one of the next two hooks returns 1 the genapic
-           is switched to this. Essentially they are additional probe
-           functions. */
-        int (*mps_oem_check)(struct mpc_table *mpc, char *oem,
-                             char *productid);
-        int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
-
-        unsigned (*get_apic_id)(unsigned long x);
-        unsigned long apic_id_mask;
-        unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
-        unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
-                                               const struct cpumask *andmask);
-        void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
-
-#ifdef CONFIG_SMP
-        /* ipi */
-        void (*send_IPI_mask)(const struct cpumask *mask, int vector);
-        void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
-                                         int vector);
-        void (*send_IPI_allbutself)(int vector);
-        void (*send_IPI_all)(int vector);
-#endif
-        int (*wakeup_cpu)(int apicid, unsigned long start_eip);
-        int trampoline_phys_low;
-        int trampoline_phys_high;
-        void (*wait_for_init_deassert)(atomic_t *deassert);
-        void (*smp_callin_clear_local_apic)(void);
-        void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
-        void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
-        void (*inquire_remote_apic)(int apicid);
-};
-
-#define APICFUNC(x) .x = x,
-
-/* More functions could be probably marked IPIFUNC and save some space
-   in UP GENERICARCH kernels, but I don't have the nerve right now
-   to untangle this mess. -AK  */
-#ifdef CONFIG_SMP
-#define IPIFUNC(x) APICFUNC(x)
-#else
-#define IPIFUNC(x)
-#endif
-
-#define APIC_INIT(aname, aprobe)                        \
-{                                                       \
-        .name = aname,                                  \
-        .probe = aprobe,                                \
-        .int_delivery_mode = INT_DELIVERY_MODE,         \
-        .int_dest_mode = INT_DEST_MODE,                 \
-        .no_balance_irq = NO_BALANCE_IRQ,               \
-        .ESR_DISABLE = esr_disable,                     \
-        .apic_destination_logical = APIC_DEST_LOGICAL,  \
-        APICFUNC(apic_id_registered)                    \
-        APICFUNC(target_cpus)                           \
-        APICFUNC(check_apicid_used)                     \
-        APICFUNC(check_apicid_present)                  \
-        APICFUNC(init_apic_ldr)                         \
-        APICFUNC(ioapic_phys_id_map)                    \
-        APICFUNC(setup_apic_routing)                    \
-        APICFUNC(multi_timer_check)                     \
-        APICFUNC(apicid_to_node)                        \
-        APICFUNC(cpu_to_logical_apicid)                 \
-        APICFUNC(cpu_present_to_apicid)                 \
-        APICFUNC(apicid_to_cpu_present)                 \
-        APICFUNC(setup_portio_remap)                    \
-        APICFUNC(check_phys_apicid_present)             \
-        APICFUNC(mps_oem_check)                         \
-        APICFUNC(get_apic_id)                           \
-        .apic_id_mask = APIC_ID_MASK,                   \
-        APICFUNC(cpu_mask_to_apicid)                    \
-        APICFUNC(cpu_mask_to_apicid_and)                \
-        APICFUNC(vector_allocation_domain)              \
-        APICFUNC(acpi_madt_oem_check)                   \
-        IPIFUNC(send_IPI_mask)                          \
-        IPIFUNC(send_IPI_allbutself)                    \
-        IPIFUNC(send_IPI_all)                           \
-        APICFUNC(enable_apic_mode)                      \
-        APICFUNC(phys_pkg_id)                           \
-        .trampoline_phys_low = TRAMPOLINE_PHYS_LOW,             \
-        .trampoline_phys_high = TRAMPOLINE_PHYS_HIGH,           \
-        APICFUNC(wait_for_init_deassert)                \
-        APICFUNC(smp_callin_clear_local_apic)           \
-        APICFUNC(store_NMI_vector)                      \
-        APICFUNC(restore_NMI_vector)                    \
-        APICFUNC(inquire_remote_apic)                   \
-}
-
-extern struct genapic *genapic;
-extern void es7000_update_genapic_to_cluster(void);
-
-#endif /* _ASM_X86_GENAPIC_32_H */
diff --git a/arch/x86/include/asm/genapic_64.h b/arch/x86/include/asm/genapic_64.h
deleted file mode 100644
index 7bb092c59055..000000000000
--- a/arch/x86/include/asm/genapic_64.h
+++ /dev/null
@@ -1,60 +0,0 @@
-#ifndef _ASM_X86_GENAPIC_64_H
-#define _ASM_X86_GENAPIC_64_H
-
-#include <linux/cpumask.h>
-
-/*
- * Copyright 2004 James Cleverdon, IBM.
- * Subject to the GNU Public License, v.2
- *
- * Generic APIC sub-arch data struct.
- *
- * Hacked for x86-64 by James Cleverdon from i386 architecture code by
- * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
- * James Cleverdon.
- */
-
-struct genapic {
-        char *name;
-        int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
-        u32 int_delivery_mode;
-        u32 int_dest_mode;
-        int (*apic_id_registered)(void);
-        const struct cpumask *(*target_cpus)(void);
-        void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
-        void (*init_apic_ldr)(void);
-        /* ipi */
-        void (*send_IPI_mask)(const struct cpumask *mask, int vector);
-        void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
-                                         int vector);
-        void (*send_IPI_allbutself)(int vector);
-        void (*send_IPI_all)(int vector);
-        void (*send_IPI_self)(int vector);
-        /* */
-        unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
-        unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
-                                               const struct cpumask *andmask);
-        unsigned int (*phys_pkg_id)(int index_msb);
-        unsigned int (*get_apic_id)(unsigned long x);
-        unsigned long (*set_apic_id)(unsigned int id);
-        unsigned long apic_id_mask;
-        /* wakeup_secondary_cpu */
-        int (*wakeup_cpu)(int apicid, unsigned long start_eip);
-};
-
-extern struct genapic *genapic;
-
-extern struct genapic apic_flat;
-extern struct genapic apic_physflat;
-extern struct genapic apic_x2apic_cluster;
-extern struct genapic apic_x2apic_phys;
-extern int acpi_madt_oem_check(char *, char *);
-
-extern void apic_send_IPI_self(int vector);
-
-extern struct genapic apic_x2apic_uv_x;
-DECLARE_PER_CPU(int, x2apic_extra_bits);
-
-extern void setup_apic_routing(void);
-
-#endif /* _ASM_X86_GENAPIC_64_H */
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 8de644b6b959..370e1c83bb49 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -25,8 +25,6 @@
 #include <asm/irq.h>
 #include <asm/sections.h>
 
-#define platform_legacy_irq(irq)        ((irq) < 16)
-
 /* Interrupt handlers registered during init_IRQ */
 extern void apic_timer_interrupt(void);
 extern void error_interrupt(void);
@@ -58,7 +56,7 @@ extern void make_8259A_irq(unsigned int irq);
 extern void init_8259A(int aeoi);
 
 /* IOAPIC */
-#define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs))
+#define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1<<(x)) & io_apic_irqs))
 extern unsigned long io_apic_irqs;
 
 extern void init_VISWS_APIC_irqs(void);
@@ -67,15 +65,7 @@ extern void disable_IO_APIC(void);
 extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn);
 extern void setup_ioapic_dest(void);
 
-#ifdef CONFIG_X86_64
 extern void enable_IO_APIC(void);
-#endif
-
-/* IPI functions */
-#ifdef CONFIG_X86_32
-extern void send_IPI_self(int vector);
-#endif
-extern void send_IPI(int dest, int vector);
 
 /* Statistics */
 extern atomic_t irq_err_count;
@@ -84,21 +74,11 @@ extern atomic_t irq_mis_count;
 /* EISA */
 extern void eisa_set_level_irq(unsigned int irq);
 
-/* Voyager functions */
-extern asmlinkage void vic_cpi_interrupt(void);
-extern asmlinkage void vic_sys_interrupt(void);
-extern asmlinkage void vic_cmn_interrupt(void);
-extern asmlinkage void qic_timer_interrupt(void);
-extern asmlinkage void qic_invalidate_interrupt(void);
-extern asmlinkage void qic_reschedule_interrupt(void);
-extern asmlinkage void qic_enable_irq_interrupt(void);
-extern asmlinkage void qic_call_function_interrupt(void);
-
 /* SMP */
 extern void smp_apic_timer_interrupt(struct pt_regs *);
 extern void smp_spurious_interrupt(struct pt_regs *);
 extern void smp_error_interrupt(struct pt_regs *);
-#ifdef CONFIG_X86_SMP
+#ifdef CONFIG_SMP
 extern void smp_reschedule_interrupt(struct pt_regs *);
 extern void smp_call_function_interrupt(struct pt_regs *);
 extern void smp_call_function_single_interrupt(struct pt_regs *);
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index 1dbbdf4be9b4..bcf7ea4e1367 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -91,7 +91,7 @@ extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr);
 
 extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
                                 unsigned long prot_val);
-extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size);
+extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
 
 /*
  * early_ioremap() and early_iounmap() are for temporary early boot-time
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 08ec793aa043..59cb4a1317b7 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -143,15 +143,6 @@ extern int noioapicreroute;
 /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
 extern int timer_through_8259;
 
-static inline void disable_ioapic_setup(void)
-{
-#ifdef CONFIG_PCI
-        noioapicquirk = 1;
-        noioapicreroute = -1;
-#endif
-        skip_ioapic_setup = 1;
-}
-
 /*
  * If we use the IO-APIC for IRQ routing, disable automatic
  * assignment of PCI IRQ's.
@@ -178,6 +169,12 @@ extern void reinit_intr_remapped_IO_APIC(int);
 
 extern void probe_nr_irqs_gsi(void);
 
+extern int setup_ioapic_entry(int apic, int irq,
+                              struct IO_APIC_route_entry *entry,
+                              unsigned int destination, int trigger,
+                              int polarity, int vector);
+extern void ioapic_write_entry(int apic, int pin,
+                               struct IO_APIC_route_entry e);
 #else  /* !CONFIG_X86_IO_APIC */
 #define io_apic_assign_pci_irqs 0
 static const int timer_through_8259 = 0;
diff --git a/arch/x86/include/asm/ipi.h b/arch/x86/include/asm/ipi.h
index c745a306f7d3..5f2efc5d9927 100644
--- a/arch/x86/include/asm/ipi.h
+++ b/arch/x86/include/asm/ipi.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_X86_IPI_H
 #define _ASM_X86_IPI_H
 
+#ifdef CONFIG_X86_LOCAL_APIC
+
 /*
  * Copyright 2004 James Cleverdon, IBM.
  * Subject to the GNU Public License, v.2
@@ -55,8 +57,8 @@ static inline void __xapic_wait_icr_idle(void)
                 cpu_relax();
 }
 
-static inline void __send_IPI_shortcut(unsigned int shortcut, int vector,
-                                       unsigned int dest)
+static inline void
+__default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned int dest)
 {
         /*
          * Subtle. In the case of the 'never do double writes' workaround
@@ -87,8 +89,8 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector,
  * This is used to send an IPI with no shorthand notation (the destination is
  * specified in bits 56 to 63 of the ICR).
  */
-static inline void __send_IPI_dest_field(unsigned int mask, int vector,
-                                         unsigned int dest)
+static inline void
+ __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest)
 {
         unsigned long cfg;
 
@@ -117,41 +119,46 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector,
         native_apic_mem_write(APIC_ICR, cfg);
 }
 
-static inline void send_IPI_mask_sequence(const struct cpumask *mask,
-                                          int vector)
-{
-        unsigned long flags;
-        unsigned long query_cpu;
+extern void default_send_IPI_mask_sequence_phys(const struct cpumask *mask,
+                                                 int vector);
+extern void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
+                                                         int vector);
+#include <asm/genapic.h>
 
-        /*
-         * Hack. The clustered APIC addressing mode doesn't allow us to send
-         * to an arbitrary mask, so I do a unicast to each CPU instead.
-         * - mbligh
-         */
-        local_irq_save(flags);
-        for_each_cpu(query_cpu, mask) {
-                __send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, query_cpu),
-                                      vector, APIC_DEST_PHYSICAL);
-        }
-        local_irq_restore(flags);
+extern void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
+                                                         int vector);
+extern void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask,
+                                                         int vector);
+
+/* Avoid include hell */
+#define NMI_VECTOR 0x02
+
+extern int no_broadcast;
+
+static inline void __default_local_send_IPI_allbutself(int vector)
+{
+        if (no_broadcast || vector == NMI_VECTOR)
+                apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
+        else
+                __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector, apic->dest_logical);
 }
 
-static inline void send_IPI_mask_allbutself(const struct cpumask *mask,
-                                            int vector)
+static inline void __default_local_send_IPI_all(int vector)
 {
-        unsigned long flags;
-        unsigned int query_cpu;
-        unsigned int this_cpu = smp_processor_id();
-
-        /* See Hack comment above */
-
-        local_irq_save(flags);
-        for_each_cpu(query_cpu, mask)
-                if (query_cpu != this_cpu)
-                        __send_IPI_dest_field(
-                                per_cpu(x86_cpu_to_apicid, query_cpu),
-                                vector, APIC_DEST_PHYSICAL);
-        local_irq_restore(flags);
+        if (no_broadcast || vector == NMI_VECTOR)
+                apic->send_IPI_mask(cpu_online_mask, vector);
+        else
+                __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector, apic->dest_logical);
 }
 
+#ifdef CONFIG_X86_32
+extern void default_send_IPI_mask_logical(const struct cpumask *mask,
+                                                 int vector);
+extern void default_send_IPI_allbutself(int vector);
+extern void default_send_IPI_all(int vector);
+extern void default_send_IPI_self(int vector);
+#endif
+
+#endif
+
 #endif /* _ASM_X86_IPI_H */
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index 592688ed04d3..107eb2196691 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -36,9 +36,11 @@ static inline int irq_canonicalize(int irq)
 extern void fixup_irqs(void);
 #endif
 
-extern unsigned int do_IRQ(struct pt_regs *regs);
 extern void init_IRQ(void);
 extern void native_init_IRQ(void);
+extern bool handle_irq(unsigned irq, struct pt_regs *regs);
+
+extern unsigned int do_IRQ(struct pt_regs *regs);
 
 /* Interrupt vector management */
 extern DECLARE_BITMAP(used_vectors, NR_VECTORS);
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index 9a83a10a5d51..b07278c55e9e 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -1,47 +1,69 @@
 #ifndef _ASM_X86_IRQ_VECTORS_H
 #define _ASM_X86_IRQ_VECTORS_H
 
-#include <linux/threads.h>
+/*
+ * Linux IRQ vector layout.
+ *
+ * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
+ * be defined by Linux. They are used as a jump table by the CPU when a
+ * given vector is triggered - by a CPU-external, CPU-internal or
+ * software-triggered event.
+ *
+ * Linux sets the kernel code address each entry jumps to early during
+ * bootup, and never changes them. This is the general layout of the
+ * IDT entries:
+ *
+ *  Vectors   0 ...  31 : system traps and exceptions - hardcoded events
+ *  Vectors  32 ... 127 : device interrupts
+ *  Vector  128         : legacy int80 syscall interface
+ *  Vectors 129 ... 237 : device interrupts
+ *  Vectors 238 ... 255 : special interrupts
+ *
+ * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
+ *
+ * This file enumerates the exact layout of them:
+ */
 
-#define NMI_VECTOR              0x02
+#define NMI_VECTOR                      0x02
 
 /*
  * IDT vectors usable for external interrupt sources start
  * at 0x20:
  */
-#define FIRST_EXTERNAL_VECTOR   0x20
+#define FIRST_EXTERNAL_VECTOR           0x20
 
 #ifdef CONFIG_X86_32
-# define SYSCALL_VECTOR         0x80
+# define SYSCALL_VECTOR                 0x80
 #else
-# define IA32_SYSCALL_VECTOR    0x80
+# define IA32_SYSCALL_VECTOR            0x80
 #endif
 
 /*
  * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
  * cleanup after irq migration.
  */
-#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
+#define IRQ_MOVE_CLEANUP_VECTOR         FIRST_EXTERNAL_VECTOR
 
 /*
  * Vectors 0x30-0x3f are used for ISA interrupts.
  */
-#define IRQ0_VECTOR             (FIRST_EXTERNAL_VECTOR + 0x10)
-#define IRQ1_VECTOR             (IRQ0_VECTOR + 1)
-#define IRQ2_VECTOR             (IRQ0_VECTOR + 2)
-#define IRQ3_VECTOR             (IRQ0_VECTOR + 3)
-#define IRQ4_VECTOR             (IRQ0_VECTOR + 4)
-#define IRQ5_VECTOR             (IRQ0_VECTOR + 5)
-#define IRQ6_VECTOR             (IRQ0_VECTOR + 6)
-#define IRQ7_VECTOR             (IRQ0_VECTOR + 7)
-#define IRQ8_VECTOR             (IRQ0_VECTOR + 8)
-#define IRQ9_VECTOR             (IRQ0_VECTOR + 9)
-#define IRQ10_VECTOR            (IRQ0_VECTOR + 10)
-#define IRQ11_VECTOR            (IRQ0_VECTOR + 11)
-#define IRQ12_VECTOR            (IRQ0_VECTOR + 12)
-#define IRQ13_VECTOR            (IRQ0_VECTOR + 13)
-#define IRQ14_VECTOR            (IRQ0_VECTOR + 14)
-#define IRQ15_VECTOR            (IRQ0_VECTOR + 15)
+#define IRQ0_VECTOR                     (FIRST_EXTERNAL_VECTOR + 0x10)
+
+#define IRQ1_VECTOR                     (IRQ0_VECTOR +  1)
+#define IRQ2_VECTOR                     (IRQ0_VECTOR +  2)
+#define IRQ3_VECTOR                     (IRQ0_VECTOR +  3)
+#define IRQ4_VECTOR                     (IRQ0_VECTOR +  4)
+#define IRQ5_VECTOR                     (IRQ0_VECTOR +  5)
+#define IRQ6_VECTOR                     (IRQ0_VECTOR +  6)
+#define IRQ7_VECTOR                     (IRQ0_VECTOR +  7)
+#define IRQ8_VECTOR                     (IRQ0_VECTOR +  8)
+#define IRQ9_VECTOR                     (IRQ0_VECTOR +  9)
+#define IRQ10_VECTOR                    (IRQ0_VECTOR + 10)
+#define IRQ11_VECTOR                    (IRQ0_VECTOR + 11)
+#define IRQ12_VECTOR                    (IRQ0_VECTOR + 12)
+#define IRQ13_VECTOR                    (IRQ0_VECTOR + 13)
+#define IRQ14_VECTOR                    (IRQ0_VECTOR + 14)
+#define IRQ15_VECTOR                    (IRQ0_VECTOR + 15)
 
 /*
  * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
@@ -50,123 +72,97 @@
  *  into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
  *  TLB, reschedule and local APIC vectors are performance-critical.
  */
-#ifdef CONFIG_X86_32
 
-# define SPURIOUS_APIC_VECTOR           0xff
-# define ERROR_APIC_VECTOR              0xfe
-# define RESCHEDULE_VECTOR              0xfd
-# define CALL_FUNCTION_VECTOR           0xfc
-# define CALL_FUNCTION_SINGLE_VECTOR    0xfb
-# define THERMAL_APIC_VECTOR            0xfa
-/* 0xf8 - 0xf9 : free */
-# define INVALIDATE_TLB_VECTOR_END      0xf7
-# define INVALIDATE_TLB_VECTOR_START    0xf0    /* f0-f7 used for TLB flush */
+#define SPURIOUS_APIC_VECTOR            0xff
+/*
+ * Sanity check
+ */
+#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
+# error SPURIOUS_APIC_VECTOR definition error
+#endif
 
-# define NUM_INVALIDATE_TLB_VECTORS     8
+#define ERROR_APIC_VECTOR               0xfe
+#define RESCHEDULE_VECTOR               0xfd
+#define CALL_FUNCTION_VECTOR            0xfc
+#define CALL_FUNCTION_SINGLE_VECTOR     0xfb
+#define THERMAL_APIC_VECTOR             0xfa
 
+#ifdef CONFIG_X86_32
+/* 0xf8 - 0xf9 : free */
 #else
-
-# define SPURIOUS_APIC_VECTOR           0xff
-# define ERROR_APIC_VECTOR              0xfe
-# define RESCHEDULE_VECTOR              0xfd
-# define CALL_FUNCTION_VECTOR           0xfc
-# define CALL_FUNCTION_SINGLE_VECTOR    0xfb
-# define THERMAL_APIC_VECTOR            0xfa
 # define THRESHOLD_APIC_VECTOR          0xf9
 # define UV_BAU_MESSAGE                 0xf8
-# define INVALIDATE_TLB_VECTOR_END      0xf7
-# define INVALIDATE_TLB_VECTOR_START    0xf0    /* f0-f7 used for TLB flush */
-
-#define NUM_INVALIDATE_TLB_VECTORS      8
-
 #endif
 
+/* f0-f7 used for spreading out TLB flushes: */
+#define INVALIDATE_TLB_VECTOR_END       0xf7
+#define INVALIDATE_TLB_VECTOR_START     0xf0
+#define NUM_INVALIDATE_TLB_VECTORS         8
+
 /*
  * Local APIC timer IRQ vector is on a different priority level,
  * to work around the 'lost local interrupt if more than 2 IRQ
  * sources per level' errata.
  */
-#define LOCAL_TIMER_VECTOR      0xef
+#define LOCAL_TIMER_VECTOR              0xef
+
+/*
+ * Performance monitoring interrupt vector:
+ */
+#define LOCAL_PERF_VECTOR               0xee
 
 /*
  * First APIC vector available to drivers: (vectors 0x30-0xee) we
  * start at 0x31(0x41) to spread out vectors evenly between priority
  * levels. (0x80 is the syscall vector)
  */
-#define FIRST_DEVICE_VECTOR     (IRQ15_VECTOR + 2)
-
-#define NR_VECTORS              256
-
-#define FPU_IRQ                 13
-
-#define FIRST_VM86_IRQ          3
-#define LAST_VM86_IRQ           15
-#define invalid_vm86_irq(irq)   ((irq) < 3 || (irq) > 15)
+#define FIRST_DEVICE_VECTOR             (IRQ15_VECTOR + 2)
 
-#define NR_IRQS_LEGACY          16
+#define NR_VECTORS                       256
 
-#if defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_VOYAGER)
-
-#include <asm/apicnum.h>        /* need MAX_IO_APICS */
-
-#ifndef CONFIG_SPARSE_IRQ
-# if NR_CPUS < MAX_IO_APICS
-#  define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
-# else
-#  define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
-# endif
-#else
+#define FPU_IRQ                           13
 
-# define NR_IRQS                                        \
-        ((8 * NR_CPUS) > (32 * MAX_IO_APICS) ?          \
-                (NR_VECTORS + (8 * NR_CPUS)) :          \
-                (NR_VECTORS + (32 * MAX_IO_APICS)))     \
+#define FIRST_VM86_IRQ                     3
+#define LAST_VM86_IRQ                     15
 
+#ifndef __ASSEMBLY__
+static inline int invalid_vm86_irq(int irq)
+{
+        return irq < 3 || irq > 15;
+}
 #endif
 
-#elif defined(CONFIG_X86_VOYAGER)
-
-# define NR_IRQS                224
+/*
+ * Size the maximum number of interrupts.
+ *
+ * If the irq_desc[] array has a sparse layout, we can size things
+ * generously - it scales up linearly with the maximum number of CPUs,
+ * and the maximum number of IO-APICs, whichever is higher.
+ *
+ * In other cases we size more conservatively, to not create too large
+ * static arrays.
+ */
 
-#else /* IO_APIC || VOYAGER */
+#define NR_IRQS_LEGACY                    16
 
-# define NR_IRQS                16
+#define CPU_VECTOR_LIMIT                (  8 * NR_CPUS      )
+#define IO_APIC_VECTOR_LIMIT            ( 32 * MAX_IO_APICS )
 
+#ifdef CONFIG_X86_IO_APIC
+# ifdef CONFIG_SPARSE_IRQ
+#  define NR_IRQS                                       \
+        (CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ?      \
+                (NR_VECTORS + CPU_VECTOR_LIMIT)  :      \
+                (NR_VECTORS + IO_APIC_VECTOR_LIMIT))
+# else
+#  if NR_CPUS < MAX_IO_APICS
+#   define NR_IRQS                      (NR_VECTORS + 4*CPU_VECTOR_LIMIT)
+#  else
+#   define NR_IRQS                      (NR_VECTORS + IO_APIC_VECTOR_LIMIT)
+#  endif
+# endif
+#else /* !CONFIG_X86_IO_APIC: */
+# define NR_IRQS                        NR_IRQS_LEGACY
 #endif
 
-/* Voyager specific defines */
-/* These define the CPIs we use in linux */
-#define VIC_CPI_LEVEL0                  0
-#define VIC_CPI_LEVEL1                  1
-/* now the fake CPIs */
-#define VIC_TIMER_CPI                   2
-#define VIC_INVALIDATE_CPI              3
-#define VIC_RESCHEDULE_CPI              4
-#define VIC_ENABLE_IRQ_CPI              5
-#define VIC_CALL_FUNCTION_CPI           6
-#define VIC_CALL_FUNCTION_SINGLE_CPI    7
-
-/* Now the QIC CPIs:  Since we don't need the two initial levels,
- * these are 2 less than the VIC CPIs */
-#define QIC_CPI_OFFSET                  1
-#define QIC_TIMER_CPI                   (VIC_TIMER_CPI - QIC_CPI_OFFSET)
-#define QIC_INVALIDATE_CPI              (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
-#define QIC_RESCHEDULE_CPI              (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
-#define QIC_ENABLE_IRQ_CPI              (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
-#define QIC_CALL_FUNCTION_CPI           (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
-#define QIC_CALL_FUNCTION_SINGLE_CPI    (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
-
-#define VIC_START_FAKE_CPI              VIC_TIMER_CPI
-#define VIC_END_FAKE_CPI                VIC_CALL_FUNCTION_SINGLE_CPI
-
-/* this is the SYS_INT CPI. */
-#define VIC_SYS_INT                     8
-#define VIC_CMN_INT                     15
-
-/* This is the boot CPI for alternate processors.  It gets overwritten
- * by the above once the system has activated all available processors */
-#define VIC_CPU_BOOT_CPI                VIC_CPI_LEVEL0
-#define VIC_CPU_BOOT_ERRATA_CPI         (VIC_CPI_LEVEL0 + 8)
-
-
 #endif /* _ASM_X86_IRQ_VECTORS_H */
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
deleted file mode 100644
index cc09cbbee27e..000000000000
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ /dev/null
@@ -1,168 +0,0 @@
-#ifndef _ASM_X86_MACH_DEFAULT_MACH_APIC_H
-#define _ASM_X86_MACH_DEFAULT_MACH_APIC_H
-
-#ifdef CONFIG_X86_LOCAL_APIC
-
-#include <mach_apicdef.h>
-#include <asm/smp.h>
-
-#define APIC_DFR_VALUE  (APIC_DFR_FLAT)
-
-static inline const struct cpumask *target_cpus(void)
-{ 
-#ifdef CONFIG_SMP
-        return cpu_online_mask;
-#else
-        return cpumask_of(0);
-#endif
-} 
-
-#define NO_BALANCE_IRQ (0)
-#define esr_disable (0)
-
-#ifdef CONFIG_X86_64
-#include <asm/genapic.h>
-#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
-#define INT_DEST_MODE (genapic->int_dest_mode)
-#define TARGET_CPUS       (genapic->target_cpus())
-#define apic_id_registered (genapic->apic_id_registered)
-#define init_apic_ldr (genapic->init_apic_ldr)
-#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
-#define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and)
-#define phys_pkg_id     (genapic->phys_pkg_id)
-#define vector_allocation_domain    (genapic->vector_allocation_domain)
-#define read_apic_id()  (GET_APIC_ID(apic_read(APIC_ID)))
-#define send_IPI_self (genapic->send_IPI_self)
-#define wakeup_secondary_cpu (genapic->wakeup_cpu)
-extern void setup_apic_routing(void);
-#else
-#define INT_DELIVERY_MODE dest_LowestPrio
-#define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */
-#define TARGET_CPUS (target_cpus())
-#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
-/*
- * Set up the logical destination ID.
- *
- * Intel recommends to set DFR, LDR and TPR before enabling
- * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
- * document number 292116).  So here it goes...
- */
-static inline void init_apic_ldr(void)
-{
-        unsigned long val;
-
-        apic_write(APIC_DFR, APIC_DFR_VALUE);
-        val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
-        val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
-        apic_write(APIC_LDR, val);
-}
-
-static inline int apic_id_registered(void)
-{
-        return physid_isset(read_apic_id(), phys_cpu_present_map);
-}
-
-static inline unsigned int cpu_mask_to_apicid(const struct cpumask *cpumask)
-{
-        return cpumask_bits(cpumask)[0];
-}
-
-static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
-                                                  const struct cpumask *andmask)
-{
-        unsigned long mask1 = cpumask_bits(cpumask)[0];
-        unsigned long mask2 = cpumask_bits(andmask)[0];
-        unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
-
-        return (unsigned int)(mask1 & mask2 & mask3);
-}
-
-static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
-{
-        return cpuid_apic >> index_msb;
-}
-
-static inline void setup_apic_routing(void)
-{
-#ifdef CONFIG_X86_IO_APIC
-        printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
-                                        "Flat", nr_ioapics);
-#endif
-}
-
-static inline int apicid_to_node(int logical_apicid)
-{
-#ifdef CONFIG_SMP
-        return apicid_2_node[hard_smp_processor_id()];
-#else
-        return 0;
-#endif
-}
-
-static inline void vector_allocation_domain(int cpu, struct cpumask *retmask)
-{
-        /* Careful. Some cpus do not strictly honor the set of cpus
-         * specified in the interrupt destination when using lowest
-         * priority interrupt delivery mode.
-         *
-         * In particular there was a hyperthreading cpu observed to
-         * deliver interrupts to the wrong hyperthread when only one
-         * hyperthread was specified in the interrupt desitination.
-         */
-        *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
-}
-#endif
-
-static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
-{
-        return physid_isset(apicid, bitmap);
-}
-
-static inline unsigned long check_apicid_present(int bit)
-{
-        return physid_isset(bit, phys_cpu_present_map);
-}
-
-static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
-{
-        return phys_map;
-}
-
-static inline int multi_timer_check(int apic, int irq)
-{
-        return 0;
-}
-
-/* Mapping from cpu number to logical apicid */
-static inline int cpu_to_logical_apicid(int cpu)
-{
-        return 1 << cpu;
-}
-
-static inline int cpu_present_to_apicid(int mps_cpu)
-{
-        if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
-                return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
-        else
-                return BAD_APICID;
-}
-
-static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
-{
-        return physid_mask_of_physid(phys_apicid);
-}
-
-static inline void setup_portio_remap(void)
-{
-}
-
-static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
-{
-        return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
-}
-
-static inline void enable_apic_mode(void)
-{
-}
-#endif /* CONFIG_X86_LOCAL_APIC */
-#endif /* _ASM_X86_MACH_DEFAULT_MACH_APIC_H */
diff --git a/arch/x86/include/asm/mach-default/mach_apicdef.h b/arch/x86/include/asm/mach-default/mach_apicdef.h
deleted file mode 100644
index 53179936d6c6..000000000000
--- a/arch/x86/include/asm/mach-default/mach_apicdef.h
+++ /dev/null
@@ -1,24 +0,0 @@
-#ifndef _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H
-#define _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H
-
-#include <asm/apic.h>
-
-#ifdef CONFIG_X86_64
-#define APIC_ID_MASK            (genapic->apic_id_mask)
-#define GET_APIC_ID(x)          (genapic->get_apic_id(x))
-#define SET_APIC_ID(x)          (genapic->set_apic_id(x))
-#else
-#define         APIC_ID_MASK            (0xF<<24)
-static inline unsigned get_apic_id(unsigned long x) 
-{
-        unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
-        if (APIC_XAPIC(ver))
-                return (((x)>>24)&0xFF);
-        else
-                return (((x)>>24)&0xF);
-} 
-
-#define         GET_APIC_ID(x)  get_apic_id(x)
-#endif
-
-#endif /* _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H */
diff --git a/arch/x86/include/asm/mach-default/mach_ipi.h b/arch/x86/include/asm/mach-default/mach_ipi.h
deleted file mode 100644
index 191312d155da..000000000000
--- a/arch/x86/include/asm/mach-default/mach_ipi.h
+++ /dev/null
@@ -1,64 +0,0 @@
-#ifndef _ASM_X86_MACH_DEFAULT_MACH_IPI_H
-#define _ASM_X86_MACH_DEFAULT_MACH_IPI_H
-
-/* Avoid include hell */
-#define NMI_VECTOR 0x02
-
-void send_IPI_mask_bitmask(const struct cpumask *mask, int vector);
-void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
-void __send_IPI_shortcut(unsigned int shortcut, int vector);
-
-extern int no_broadcast;
-
-#ifdef CONFIG_X86_64
-#include <asm/genapic.h>
-#define send_IPI_mask (genapic->send_IPI_mask)
-#define send_IPI_mask_allbutself (genapic->send_IPI_mask_allbutself)
-#else
-static inline void send_IPI_mask(const struct cpumask *mask, int vector)
-{
-        send_IPI_mask_bitmask(mask, vector);
-}
-void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
-#endif
-
-static inline void __local_send_IPI_allbutself(int vector)
-{
-        if (no_broadcast || vector == NMI_VECTOR)
-                send_IPI_mask_allbutself(cpu_online_mask, vector);
-        else
-                __send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
-}
-
-static inline void __local_send_IPI_all(int vector)
-{
-        if (no_broadcast || vector == NMI_VECTOR)
-                send_IPI_mask(cpu_online_mask, vector);
-        else
-                __send_IPI_shortcut(APIC_DEST_ALLINC, vector);
-}
-
-#ifdef CONFIG_X86_64
-#define send_IPI_allbutself (genapic->send_IPI_allbutself)
-#define send_IPI_all (genapic->send_IPI_all)
-#else
-static inline void send_IPI_allbutself(int vector)
-{
-        /*
-         * if there are no other CPUs in the system then we get an APIC send 
-         * error if we try to broadcast, thus avoid sending IPIs in this case.
-         */
-        if (!(num_online_cpus() > 1))
-                return;
-
-        __local_send_IPI_allbutself(vector);
-        return;
-}
-
-static inline void send_IPI_all(int vector)
-{
-        __local_send_IPI_all(vector);
-}
-#endif
-
-#endif /* _ASM_X86_MACH_DEFAULT_MACH_IPI_H */
diff --git a/arch/x86/include/asm/mach-default/mach_mpparse.h b/arch/x86/include/asm/mach-default/mach_mpparse.h
deleted file mode 100644
index c70a263d68cd..000000000000
--- a/arch/x86/include/asm/mach-default/mach_mpparse.h
+++ /dev/null
@@ -1,17 +0,0 @@
-#ifndef _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H
-#define _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H
-
-static inline int
-mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
-{
-        return 0;
-}
-
-/* Hook from generic ACPI tables.c */
-static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        return 0;
-}
-
-
-#endif /* _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H */
diff --git a/arch/x86/include/asm/mach-default/mach_mpspec.h b/arch/x86/include/asm/mach-default/mach_mpspec.h
deleted file mode 100644
index e85ede686be8..000000000000
--- a/arch/x86/include/asm/mach-default/mach_mpspec.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H
-#define _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H
-
-#define MAX_IRQ_SOURCES 256
-
-#if CONFIG_BASE_SMALL == 0
-#define MAX_MP_BUSSES 256
-#else
-#define MAX_MP_BUSSES 32
-#endif
-
-#endif /* _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H */
diff --git a/arch/x86/include/asm/mach-default/mach_wakecpu.h b/arch/x86/include/asm/mach-default/mach_wakecpu.h
deleted file mode 100644
index 89897a6a65b9..000000000000
--- a/arch/x86/include/asm/mach-default/mach_wakecpu.h
+++ /dev/null
@@ -1,41 +0,0 @@
-#ifndef _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H
-#define _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H
-
-#define TRAMPOLINE_PHYS_LOW (0x467)
-#define TRAMPOLINE_PHYS_HIGH (0x469)
-
-static inline void wait_for_init_deassert(atomic_t *deassert)
-{
-        while (!atomic_read(deassert))
-                cpu_relax();
-        return;
-}
-
-/* Nothing to do for most platforms, since cleared by the INIT cycle */
-static inline void smp_callin_clear_local_apic(void)
-{
-}
-
-static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
-{
-}
-
-static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
-{
-}
-
-#ifdef CONFIG_SMP
-extern void __inquire_remote_apic(int apicid);
-#else /* CONFIG_SMP */
-static inline void __inquire_remote_apic(int apicid)
-{
-}
-#endif /* CONFIG_SMP */
-
-static inline void inquire_remote_apic(int apicid)
-{
-        if (apic_verbosity >= APIC_DEBUG)
-                __inquire_remote_apic(apicid);
-}
-
-#endif /* _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H */
diff --git a/arch/x86/include/asm/mach-generic/gpio.h b/arch/x86/include/asm/mach-generic/gpio.h
deleted file mode 100644
index 995c45efdb33..000000000000
--- a/arch/x86/include/asm/mach-generic/gpio.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_GPIO_H
-#define _ASM_X86_MACH_GENERIC_GPIO_H
-
-int gpio_request(unsigned gpio, const char *label);
-void gpio_free(unsigned gpio);
-int gpio_direction_input(unsigned gpio);
-int gpio_direction_output(unsigned gpio, int value);
-int gpio_get_value(unsigned gpio);
-void gpio_set_value(unsigned gpio, int value);
-int gpio_to_irq(unsigned gpio);
-int irq_to_gpio(unsigned irq);
-
-#include <asm-generic/gpio.h>           /* cansleep wrappers */
-
-#endif /* _ASM_X86_MACH_GENERIC_GPIO_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h
deleted file mode 100644
index 48553e958ad5..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_apic.h
+++ /dev/null
@@ -1,35 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_MACH_APIC_H
-#define _ASM_X86_MACH_GENERIC_MACH_APIC_H
-
-#include <asm/genapic.h>
-
-#define esr_disable (genapic->ESR_DISABLE)
-#define NO_BALANCE_IRQ (genapic->no_balance_irq)
-#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
-#define INT_DEST_MODE (genapic->int_dest_mode)
-#undef APIC_DEST_LOGICAL
-#define APIC_DEST_LOGICAL (genapic->apic_destination_logical)
-#define TARGET_CPUS       (genapic->target_cpus())
-#define apic_id_registered (genapic->apic_id_registered)
-#define init_apic_ldr (genapic->init_apic_ldr)
-#define ioapic_phys_id_map (genapic->ioapic_phys_id_map)
-#define setup_apic_routing (genapic->setup_apic_routing)
-#define multi_timer_check (genapic->multi_timer_check)
-#define apicid_to_node (genapic->apicid_to_node)
-#define cpu_to_logical_apicid (genapic->cpu_to_logical_apicid) 
-#define cpu_present_to_apicid (genapic->cpu_present_to_apicid)
-#define apicid_to_cpu_present (genapic->apicid_to_cpu_present)
-#define setup_portio_remap (genapic->setup_portio_remap)
-#define check_apicid_present (genapic->check_apicid_present)
-#define check_phys_apicid_present (genapic->check_phys_apicid_present)
-#define check_apicid_used (genapic->check_apicid_used)
-#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
-#define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and)
-#define vector_allocation_domain (genapic->vector_allocation_domain)
-#define enable_apic_mode (genapic->enable_apic_mode)
-#define phys_pkg_id (genapic->phys_pkg_id)
-#define wakeup_secondary_cpu (genapic->wakeup_cpu)
-
-extern void generic_bigsmp_probe(void);
-
-#endif /* _ASM_X86_MACH_GENERIC_MACH_APIC_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_apicdef.h b/arch/x86/include/asm/mach-generic/mach_apicdef.h
deleted file mode 100644
index 68041f3802f4..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_apicdef.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_MACH_APICDEF_H
-#define _ASM_X86_MACH_GENERIC_MACH_APICDEF_H
-
-#ifndef APIC_DEFINITION
-#include <asm/genapic.h>
-
-#define GET_APIC_ID (genapic->get_apic_id)
-#define APIC_ID_MASK (genapic->apic_id_mask)
-#endif
-
-#endif /* _ASM_X86_MACH_GENERIC_MACH_APICDEF_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_ipi.h b/arch/x86/include/asm/mach-generic/mach_ipi.h
deleted file mode 100644
index ffd637e3c3d9..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_ipi.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_MACH_IPI_H
-#define _ASM_X86_MACH_GENERIC_MACH_IPI_H
-
-#include <asm/genapic.h>
-
-#define send_IPI_mask (genapic->send_IPI_mask)
-#define send_IPI_allbutself (genapic->send_IPI_allbutself)
-#define send_IPI_all (genapic->send_IPI_all)
-
-#endif /* _ASM_X86_MACH_GENERIC_MACH_IPI_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_mpparse.h b/arch/x86/include/asm/mach-generic/mach_mpparse.h
deleted file mode 100644
index 9444ab8dca94..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_mpparse.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H
-#define _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H
-
-
-extern int mps_oem_check(struct mpc_table *, char *, char *);
-
-extern int acpi_madt_oem_check(char *, char *);
-
-#endif /* _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_mpspec.h b/arch/x86/include/asm/mach-generic/mach_mpspec.h
deleted file mode 100644
index 3bc407226578..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_mpspec.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H
-#define _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H
-
-#define MAX_IRQ_SOURCES 256
-
-/* Summit or generic (i.e. installer) kernels need lots of bus entries. */
-/* Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. */
-#define MAX_MP_BUSSES 260
-
-extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
-
-#endif /* _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_wakecpu.h b/arch/x86/include/asm/mach-generic/mach_wakecpu.h
deleted file mode 100644
index 1ab16b168c8a..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_wakecpu.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H
-#define _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H
-
-#define TRAMPOLINE_PHYS_LOW (genapic->trampoline_phys_low)
-#define TRAMPOLINE_PHYS_HIGH (genapic->trampoline_phys_high)
-#define wait_for_init_deassert (genapic->wait_for_init_deassert)
-#define smp_callin_clear_local_apic (genapic->smp_callin_clear_local_apic)
-#define store_NMI_vector (genapic->store_NMI_vector)
-#define restore_NMI_vector (genapic->restore_NMI_vector)
-#define inquire_remote_apic (genapic->inquire_remote_apic)
-
-#endif /* _ASM_X86_MACH_GENERIC_MACH_APIC_H */
diff --git a/arch/x86/include/asm/mach-rdc321x/gpio.h b/arch/x86/include/asm/mach-rdc321x/gpio.h
deleted file mode 100644
index c210ab5788b0..000000000000
--- a/arch/x86/include/asm/mach-rdc321x/gpio.h
+++ /dev/null
@@ -1,60 +0,0 @@
-#ifndef _ASM_X86_MACH_RDC321X_GPIO_H
-#define _ASM_X86_MACH_RDC321X_GPIO_H
-
-#include <linux/kernel.h>
-
-extern int rdc_gpio_get_value(unsigned gpio);
-extern void rdc_gpio_set_value(unsigned gpio, int value);
-extern int rdc_gpio_direction_input(unsigned gpio);
-extern int rdc_gpio_direction_output(unsigned gpio, int value);
-extern int rdc_gpio_request(unsigned gpio, const char *label);
-extern void rdc_gpio_free(unsigned gpio);
-extern void __init rdc321x_gpio_setup(void);
-
-/* Wrappers for the arch-neutral GPIO API */
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-        return rdc_gpio_request(gpio, label);
-}
-
-static inline void gpio_free(unsigned gpio)
-{
-        might_sleep();
-        rdc_gpio_free(gpio);
-}
-
-static inline int gpio_direction_input(unsigned gpio)
-{
-        return rdc_gpio_direction_input(gpio);
-}
-
-static inline int gpio_direction_output(unsigned gpio, int value)
-{
-        return rdc_gpio_direction_output(gpio, value);
-}
-
-static inline int gpio_get_value(unsigned gpio)
-{
-        return rdc_gpio_get_value(gpio);
-}
-
-static inline void gpio_set_value(unsigned gpio, int value)
-{
-        rdc_gpio_set_value(gpio, value);
-}
-
-static inline int gpio_to_irq(unsigned gpio)
-{
-        return gpio;
-}
-
-static inline int irq_to_gpio(unsigned irq)
-{
-        return irq;
-}
-
-/* For cansleep */
-#include <asm-generic/gpio.h>
-
-#endif /* _ASM_X86_MACH_RDC321X_GPIO_H */
diff --git a/arch/x86/include/asm/mach-default/mach_timer.h b/arch/x86/include/asm/mach_timer.h
index 853728519ae9..853728519ae9 100644
--- a/arch/x86/include/asm/mach-default/mach_timer.h
+++ b/arch/x86/include/asm/mach_timer.h
diff --git a/arch/x86/include/asm/mach-default/mach_traps.h b/arch/x86/include/asm/mach_traps.h
index f7920601e472..f7920601e472 100644
--- a/arch/x86/include/asm/mach-default/mach_traps.h
+++ b/arch/x86/include/asm/mach_traps.h
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h
index bd22f2a3713f..5916c8df09d9 100644
--- a/arch/x86/include/asm/mpspec.h
+++ b/arch/x86/include/asm/mpspec.h
@@ -9,7 +9,18 @@ extern int apic_version[MAX_APICS];
 extern int pic_mode;
 
 #ifdef CONFIG_X86_32
-#include <mach_mpspec.h>
+
+/*
+ * Summit or generic (i.e. installer) kernels need lots of bus entries.
+ * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.
+ */
+#if CONFIG_BASE_SMALL == 0
+# define MAX_MP_BUSSES          260
+#else
+# define MAX_MP_BUSSES          32
+#endif
+
+#define MAX_IRQ_SOURCES         256
 
 extern unsigned int def_to_bigsmp;
 extern u8 apicid_2_node[];
@@ -20,15 +31,15 @@ extern int mp_bus_id_to_local[MAX_MP_BUSSES];
 extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
 #endif
 
-#define MAX_APICID 256
+#define MAX_APICID              256
 
-#else
+#else /* CONFIG_X86_64: */
 
-#define MAX_MP_BUSSES 256
+#define MAX_MP_BUSSES           256
 /* Each PCI slot may be a combo card with its own bus.  4 IRQ pins per slot. */
-#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
+#define MAX_IRQ_SOURCES         (MAX_MP_BUSSES * 4)
 
-#endif
+#endif /* CONFIG_X86_64 */
 
 extern void early_find_smp_config(void);
 extern void early_get_smp_config(void);
@@ -45,11 +56,13 @@ extern int smp_found_config;
 extern int mpc_default_type;
 extern unsigned long mp_lapic_addr;
 
-extern void find_smp_config(void);
 extern void get_smp_config(void);
+
 #ifdef CONFIG_X86_MPPARSE
+extern void find_smp_config(void);
 extern void early_reserve_e820_mpc_new(void);
 #else
+static inline void find_smp_config(void) { }
 static inline void early_reserve_e820_mpc_new(void) { }
 #endif
 
@@ -64,6 +77,8 @@ extern int acpi_probe_gsi(void);
 #ifdef CONFIG_X86_IO_APIC
 extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
                                 u32 gsi, int triggering, int polarity);
+extern int mp_find_ioapic(int gsi);
+extern int mp_find_ioapic_pin(int ioapic, int gsi);
 #else
 static inline int
 mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
@@ -148,4 +163,10 @@ static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
 
 extern physid_mask_t phys_cpu_present_map;
 
+extern int generic_mps_oem_check(struct mpc_table *, char *, char *);
+
+extern int default_acpi_madt_oem_check(char *, char *);
+
+extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
+
 #endif /* _ASM_X86_MPSPEC_H */
diff --git a/arch/x86/include/asm/numaq.h b/arch/x86/include/asm/numaq.h
index 1e8bd30b4c16..9f0a5f5d29ec 100644
--- a/arch/x86/include/asm/numaq.h
+++ b/arch/x86/include/asm/numaq.h
@@ -31,6 +31,8 @@
 extern int found_numaq;
 extern int get_memcfg_numaq(void);
 
+extern void *xquad_portio;
+
 /*
  * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the
  */
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h
deleted file mode 100644
index bf37bc49bd8e..000000000000
--- a/arch/x86/include/asm/numaq/apic.h
+++ /dev/null
@@ -1,142 +0,0 @@
-#ifndef __ASM_NUMAQ_APIC_H
-#define __ASM_NUMAQ_APIC_H
-
-#include <asm/io.h>
-#include <linux/mmzone.h>
-#include <linux/nodemask.h>
-
-#define APIC_DFR_VALUE  (APIC_DFR_CLUSTER)
-
-static inline const cpumask_t *target_cpus(void)
-{
-        return &CPU_MASK_ALL;
-}
-
-#define NO_BALANCE_IRQ (1)
-#define esr_disable (1)
-
-#define INT_DELIVERY_MODE dest_LowestPrio
-#define INT_DEST_MODE 0     /* physical delivery on LOCAL quad */
- 
-static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
-{
-        return physid_isset(apicid, bitmap);
-}
-static inline unsigned long check_apicid_present(int bit)
-{
-        return physid_isset(bit, phys_cpu_present_map);
-}
-#define apicid_cluster(apicid) (apicid & 0xF0)
-
-static inline int apic_id_registered(void)
-{
-        return 1;
-}
-
-static inline void init_apic_ldr(void)
-{
-        /* Already done in NUMA-Q firmware */
-}
-
-static inline void setup_apic_routing(void)
-{
-        printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
-                "NUMA-Q", nr_ioapics);
-}
-
-/*
- * Skip adding the timer int on secondary nodes, which causes
- * a small but painful rift in the time-space continuum.
- */
-static inline int multi_timer_check(int apic, int irq)
-{
-        return apic != 0 && irq == 0;
-}
-
-static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
-{
-        /* We don't have a good way to do this yet - hack */
-        return physids_promote(0xFUL);
-}
-
-/* Mapping from cpu number to logical apicid */
-extern u8 cpu_2_logical_apicid[];
-static inline int cpu_to_logical_apicid(int cpu)
-{
-        if (cpu >= nr_cpu_ids)
-                return BAD_APICID;
-        return (int)cpu_2_logical_apicid[cpu];
-}
-
-/*
- * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
- * cpu to APIC ID relation to properly interact with the intelligent
- * mode of the cluster controller.
- */
-static inline int cpu_present_to_apicid(int mps_cpu)
-{
-        if (mps_cpu < 60)
-                return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
-        else
-                return BAD_APICID;
-}
-
-static inline int apicid_to_node(int logical_apicid) 
-{
-        return logical_apicid >> 4;
-}
-
-static inline physid_mask_t apicid_to_cpu_present(int logical_apicid)
-{
-        int node = apicid_to_node(logical_apicid);
-        int cpu = __ffs(logical_apicid & 0xf);
-
-        return physid_mask_of_physid(cpu + 4*node);
-}
-
-extern void *xquad_portio;
-
-static inline void setup_portio_remap(void)
-{
-        int num_quads = num_online_nodes();
-
-        if (num_quads <= 1)
-                return;
-
-        printk("Remapping cross-quad port I/O for %d quads\n", num_quads);
-        xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
-        printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
-                (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
-}
-
-static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
-{
-        return (1);
-}
-
-static inline void enable_apic_mode(void)
-{
-}
-
-/*
- * We use physical apicids here, not logical, so just return the default
- * physical broadcast to stop people from breaking us
- */
-static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
-{
-        return (int) 0xF;
-}
-
-static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
-                                                  const struct cpumask *andmask)
-{
-        return (int) 0xF;
-}
-
-/* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
-static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
-{
-        return cpuid_apic >> index_msb;
-}
-
-#endif /* __ASM_NUMAQ_APIC_H */
diff --git a/arch/x86/include/asm/numaq/apicdef.h b/arch/x86/include/asm/numaq/apicdef.h
deleted file mode 100644
index e012a46cc22a..000000000000
--- a/arch/x86/include/asm/numaq/apicdef.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef __ASM_NUMAQ_APICDEF_H
-#define __ASM_NUMAQ_APICDEF_H
-
-
-#define APIC_ID_MASK (0xF<<24)
-
-static inline unsigned get_apic_id(unsigned long x)
-{
-                return (((x)>>24)&0x0F);
-}
-
-#define         GET_APIC_ID(x)  get_apic_id(x)
-
-#endif
diff --git a/arch/x86/include/asm/numaq/ipi.h b/arch/x86/include/asm/numaq/ipi.h
deleted file mode 100644
index a8374c652778..000000000000
--- a/arch/x86/include/asm/numaq/ipi.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef __ASM_NUMAQ_IPI_H
-#define __ASM_NUMAQ_IPI_H
-
-void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
-void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
-
-static inline void send_IPI_mask(const struct cpumask *mask, int vector)
-{
-        send_IPI_mask_sequence(mask, vector);
-}
-
-static inline void send_IPI_allbutself(int vector)
-{
-        send_IPI_mask_allbutself(cpu_online_mask, vector);
-}
-
-static inline void send_IPI_all(int vector)
-{
-        send_IPI_mask(cpu_online_mask, vector);
-}
-
-#endif /* __ASM_NUMAQ_IPI_H */
diff --git a/arch/x86/include/asm/numaq/mpparse.h b/arch/x86/include/asm/numaq/mpparse.h
deleted file mode 100644
index a2eeefcd1cc7..000000000000
--- a/arch/x86/include/asm/numaq/mpparse.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ASM_NUMAQ_MPPARSE_H
-#define __ASM_NUMAQ_MPPARSE_H
-
-extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
-
-#endif /* __ASM_NUMAQ_MPPARSE_H */
diff --git a/arch/x86/include/asm/numaq/wakecpu.h b/arch/x86/include/asm/numaq/wakecpu.h
deleted file mode 100644
index 6f499df8eddb..000000000000
--- a/arch/x86/include/asm/numaq/wakecpu.h
+++ /dev/null
@@ -1,45 +0,0 @@
-#ifndef __ASM_NUMAQ_WAKECPU_H
-#define __ASM_NUMAQ_WAKECPU_H
-
-/* This file copes with machines that wakeup secondary CPUs by NMIs */
-
-#define TRAMPOLINE_PHYS_LOW (0x8)
-#define TRAMPOLINE_PHYS_HIGH (0xa)
-
-/* We don't do anything here because we use NMI's to boot instead */
-static inline void wait_for_init_deassert(atomic_t *deassert)
-{
-}
-
-/*
- * Because we use NMIs rather than the INIT-STARTUP sequence to
- * bootstrap the CPUs, the APIC may be in a weird state. Kick it.
- */
-static inline void smp_callin_clear_local_apic(void)
-{
-        clear_local_APIC();
-}
-
-static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
-{
-        printk("Storing NMI vector\n");
-        *high =
-          *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH));
-        *low =
-          *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW));
-}
-
-static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
-{
-        printk("Restoring NMI vector\n");
-        *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) =
-                                                                 *high;
-        *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) =
-                                                                 *low;
-}
-
-static inline void inquire_remote_apic(int apicid)
-{
-}
-
-#endif /* __ASM_NUMAQ_WAKECPU_H */
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index ff691736f5e9..1c244b64573f 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -1482,6 +1482,7 @@ static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
 {
         return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
 }
+#define __raw_spin_is_contended __raw_spin_is_contended
 
 static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
 {
diff --git a/arch/x86/include/asm/pat.h b/arch/x86/include/asm/pat.h
index b8493b3b9890..9709fdff6615 100644
--- a/arch/x86/include/asm/pat.h
+++ b/arch/x86/include/asm/pat.h
@@ -5,10 +5,8 @@
 
 #ifdef CONFIG_X86_PAT
 extern int pat_enabled;
-extern void validate_pat_support(struct cpuinfo_x86 *c);
 #else
 static const int pat_enabled;
-static inline void validate_pat_support(struct cpuinfo_x86 *c) { }
 #endif
 
 extern void pat_init(void);
@@ -17,6 +15,4 @@ extern int reserve_memtype(u64 start, u64 end,
                 unsigned long req_type, unsigned long *ret_type);
 extern int free_memtype(u64 start, u64 end);
 
-extern void pat_disable(char *reason);
-
 #endif /* _ASM_X86_PAT_H */
diff --git a/arch/x86/include/asm/mach-default/pci-functions.h b/arch/x86/include/asm/pci-functions.h
index ed0bab427354..ed0bab427354 100644
--- a/arch/x86/include/asm/mach-default/pci-functions.h
+++ b/arch/x86/include/asm/pci-functions.h
diff --git a/arch/x86/include/asm/prctl.h b/arch/x86/include/asm/prctl.h
index a8894647dd9a..3ac5032fae09 100644
--- a/arch/x86/include/asm/prctl.h
+++ b/arch/x86/include/asm/prctl.h
@@ -6,8 +6,4 @@
 #define ARCH_GET_FS 0x1003
 #define ARCH_GET_GS 0x1004
 
-#ifdef CONFIG_X86_64
-extern long sys_arch_prctl(int, unsigned long);
-#endif /* CONFIG_X86_64 */
-
 #endif /* _ASM_X86_PRCTL_H */
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 5a9472104253..a0133838b67c 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -73,7 +73,7 @@ struct cpuinfo_x86 {
         char                    pad0;
 #else
         /* Number of 4K pages in DTLB/ITLB combined(in pages): */
-        int                      x86_tlbsize;
+        int                     x86_tlbsize;
         __u8                    x86_virt_bits;
         __u8                    x86_phys_bits;
 #endif
diff --git a/arch/x86/include/asm/proto.h b/arch/x86/include/asm/proto.h
index d6a22f92ba77..49fb3ecf3bb3 100644
--- a/arch/x86/include/asm/proto.h
+++ b/arch/x86/include/asm/proto.h
@@ -18,11 +18,7 @@ extern void syscall32_cpu_init(void);
 
 extern void check_efer(void);
 
-#ifdef CONFIG_X86_BIOS_REBOOT
 extern int reboot_force;
-#else
-static const int reboot_force = 0;
-#endif
 
 long do_arch_prctl(struct task_struct *task, int code, unsigned long addr);
 
diff --git a/arch/x86/include/asm/mach-rdc321x/rdc321x_defs.h b/arch/x86/include/asm/rdc321x_defs.h
index c8e9c8bed3d0..c8e9c8bed3d0 100644
--- a/arch/x86/include/asm/mach-rdc321x/rdc321x_defs.h
+++ b/arch/x86/include/asm/rdc321x_defs.h
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index 536949749bc2..45b40278b582 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_X86_SETUP_H
 #define _ASM_X86_SETUP_H
 
+#ifdef __KERNEL__
+
 #define COMMAND_LINE_SIZE 2048
 
 #ifndef __ASSEMBLY__
@@ -8,10 +10,8 @@
 /* Interrupt control for vSMPowered x86_64 systems */
 void vsmp_init(void);
 
-
 void setup_bios_corruption_check(void);
 
-
 #ifdef CONFIG_X86_VISWS
 extern void visws_early_detect(void);
 extern int is_visws_box(void);
@@ -43,7 +43,7 @@ struct x86_quirks {
         void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);
         void (*mpc_oem_pci_bus)(struct mpc_bus *m);
         void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable,
-                                    unsigned short oemsize);
+                                unsigned short oemsize);
         int (*setup_ioapic_ids)(void);
         int (*update_genapic)(void);
 };
@@ -56,8 +56,6 @@ extern unsigned long saved_video_mode;
 #endif
 #endif /* __ASSEMBLY__ */
 
-#ifdef __KERNEL__
-
 #ifdef __i386__
 
 #include <linux/pfn.h>
diff --git a/arch/x86/include/asm/mach-default/setup_arch.h b/arch/x86/include/asm/setup_arch.h
index 38846208b548..38846208b548 100644
--- a/arch/x86/include/asm/mach-default/setup_arch.h
+++ b/arch/x86/include/asm/setup_arch.h
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 45ef8a1b9d7c..47d0e21f2b9e 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -182,28 +182,9 @@ static inline int logical_smp_processor_id(void)
         return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));
 }
 
-#include <mach_apicdef.h>
-static inline unsigned int read_apic_id(void)
-{
-        unsigned int reg;
-
-        reg = *(u32 *)(APIC_BASE + APIC_ID);
-
-        return GET_APIC_ID(reg);
-}
 #endif
 
-
-# if defined(APIC_DEFINITION) || defined(CONFIG_X86_64)
 extern int hard_smp_processor_id(void);
-# else
-#include <mach_apicdef.h>
-static inline int hard_smp_processor_id(void)
-{
-        /* we don't want to mark this access volatile - bad code generation */
-        return read_apic_id();
-}
-# endif /* APIC_DEFINITION */
 
 #else /* CONFIG_X86_LOCAL_APIC */
 
diff --git a/arch/x86/include/asm/mach-default/smpboot_hooks.h b/arch/x86/include/asm/smpboot_hooks.h
index 23bf52103b89..1def60114906 100644
--- a/arch/x86/include/asm/mach-default/smpboot_hooks.h
+++ b/arch/x86/include/asm/smpboot_hooks.h
@@ -13,10 +13,10 @@ static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
         CMOS_WRITE(0xa, 0xf);
         local_flush_tlb();
         pr_debug("1.\n");
-        *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) =
+        *((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_high)) =
                                                                  start_eip >> 4;
         pr_debug("2.\n");
-        *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) =
+        *((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_low)) =
                                                          start_eip & 0xf;
         pr_debug("3.\n");
 }
@@ -34,7 +34,7 @@ static inline void smpboot_restore_warm_reset_vector(void)
          */
         CMOS_WRITE(0, 0xf);
 
-        *((volatile long *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0;
+        *((volatile long *)phys_to_virt(apic->trampoline_phys_low)) = 0;
 }
 
 static inline void __init smpboot_setup_io_apic(void)
diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinlock.h
index 2bd6b111a414..3a5696656680 100644
--- a/arch/x86/include/asm/spinlock.h
+++ b/arch/x86/include/asm/spinlock.h
@@ -183,6 +183,7 @@ static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
 {
         return __ticket_spin_is_contended(lock);
 }
+#define __raw_spin_is_contended __raw_spin_is_contended
 
 static __always_inline void __raw_spin_lock(raw_spinlock_t *lock)
 {
@@ -267,8 +268,7 @@ static inline int __raw_read_trylock(raw_rwlock_t *lock)
 {
         atomic_t *count = (atomic_t *)lock;
 
-        atomic_dec(count);
-        if (atomic_read(count) >= 0)
+        if (atomic_dec_return(count) >= 0)
                 return 1;
         atomic_inc(count);
         return 0;
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
deleted file mode 100644
index 93d2c8667cfe..000000000000
--- a/arch/x86/include/asm/summit/apic.h
+++ /dev/null
@@ -1,202 +0,0 @@
-#ifndef __ASM_SUMMIT_APIC_H
-#define __ASM_SUMMIT_APIC_H
-
-#include <asm/smp.h>
-#include <linux/gfp.h>
-
-#define esr_disable (1)
-#define NO_BALANCE_IRQ (0)
-
-/* In clustered mode, the high nibble of APIC ID is a cluster number.
- * The low nibble is a 4-bit bitmap. */
-#define XAPIC_DEST_CPUS_SHIFT   4
-#define XAPIC_DEST_CPUS_MASK    ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
-#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
-
-#define APIC_DFR_VALUE  (APIC_DFR_CLUSTER)
-
-static inline const cpumask_t *target_cpus(void)
-{
-        /* CPU_MASK_ALL (0xff) has undefined behaviour with
-         * dest_LowestPrio mode logical clustered apic interrupt routing
-         * Just start on cpu 0.  IRQ balancing will spread load
-         */
-        return &cpumask_of_cpu(0);
-}
-
-#define INT_DELIVERY_MODE (dest_LowestPrio)
-#define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */
-
-static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
-{
-        return 0;
-}
-
-/* we don't use the phys_cpu_present_map to indicate apicid presence */
-static inline unsigned long check_apicid_present(int bit)
-{
-        return 1;
-}
-
-#define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
-
-extern u8 cpu_2_logical_apicid[];
-
-static inline void init_apic_ldr(void)
-{
-        unsigned long val, id;
-        int count = 0;
-        u8 my_id = (u8)hard_smp_processor_id();
-        u8 my_cluster = (u8)apicid_cluster(my_id);
-#ifdef CONFIG_SMP
-        u8 lid;
-        int i;
-
-        /* Create logical APIC IDs by counting CPUs already in cluster. */
-        for (count = 0, i = nr_cpu_ids; --i >= 0; ) {
-                lid = cpu_2_logical_apicid[i];
-                if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster)
-                        ++count;
-        }
-#endif
-        /* We only have a 4 wide bitmap in cluster mode.  If a deranged
-         * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
-        BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
-        id = my_cluster | (1UL << count);
-        apic_write(APIC_DFR, APIC_DFR_VALUE);
-        val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
-        val |= SET_APIC_LOGICAL_ID(id);
-        apic_write(APIC_LDR, val);
-}
-
-static inline int multi_timer_check(int apic, int irq)
-{
-        return 0;
-}
-
-static inline int apic_id_registered(void)
-{
-        return 1;
-}
-
-static inline void setup_apic_routing(void)
-{
-        printk("Enabling APIC mode:  Summit.  Using %d I/O APICs\n",
-                                                nr_ioapics);
-}
-
-static inline int apicid_to_node(int logical_apicid)
-{
-#ifdef CONFIG_SMP
-        return apicid_2_node[hard_smp_processor_id()];
-#else
-        return 0;
-#endif
-}
-
-/* Mapping from cpu number to logical apicid */
-static inline int cpu_to_logical_apicid(int cpu)
-{
-#ifdef CONFIG_SMP
-        if (cpu >= nr_cpu_ids)
-                return BAD_APICID;
-        return (int)cpu_2_logical_apicid[cpu];
-#else
-        return logical_smp_processor_id();
-#endif
-}
-
-static inline int cpu_present_to_apicid(int mps_cpu)
-{
-        if (mps_cpu < nr_cpu_ids)
-                return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
-        else
-                return BAD_APICID;
-}
-
-static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map)
-{
-        /* For clustered we don't have a good way to do this yet - hack */
-        return physids_promote(0x0F);
-}
-
-static inline physid_mask_t apicid_to_cpu_present(int apicid)
-{
-        return physid_mask_of_physid(0);
-}
-
-static inline void setup_portio_remap(void)
-{
-}
-
-static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
-{
-        return 1;
-}
-
-static inline void enable_apic_mode(void)
-{
-}
-
-static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
-{
-        int num_bits_set;
-        int cpus_found = 0;
-        int cpu;
-        int apicid;
-
-        num_bits_set = cpus_weight(*cpumask);
-        /* Return id to all */
-        if (num_bits_set >= nr_cpu_ids)
-                return (int) 0xFF;
-        /*
-         * The cpus in the mask must all be on the apic cluster.  If are not
-         * on the same apicid cluster return default value of TARGET_CPUS.
-         */
-        cpu = first_cpu(*cpumask);
-        apicid = cpu_to_logical_apicid(cpu);
-        while (cpus_found < num_bits_set) {
-                if (cpu_isset(cpu, *cpumask)) {
-                        int new_apicid = cpu_to_logical_apicid(cpu);
-                        if (apicid_cluster(apicid) !=
-                                        apicid_cluster(new_apicid)){
-                                printk ("%s: Not a valid mask!\n", __func__);
-                                return 0xFF;
-                        }
-                        apicid = apicid | new_apicid;
-                        cpus_found++;
-                }
-                cpu++;
-        }
-        return apicid;
-}
-
-static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask,
-                                                  const struct cpumask *andmask)
-{
-        int apicid = cpu_to_logical_apicid(0);
-        cpumask_var_t cpumask;
-
-        if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
-                return apicid;
-
-        cpumask_and(cpumask, inmask, andmask);
-        cpumask_and(cpumask, cpumask, cpu_online_mask);
-        apicid = cpu_mask_to_apicid(cpumask);
-
-        free_cpumask_var(cpumask);
-        return apicid;
-}
-
-/* cpuid returns the value latched in the HW at reset, not the APIC ID
- * register's value.  For any box whose BIOS changes APIC IDs, like
- * clustered APIC systems, we must use hard_smp_processor_id.
- *
- * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
- */
-static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
-{
-        return hard_smp_processor_id() >> index_msb;
-}
-
-#endif /* __ASM_SUMMIT_APIC_H */
diff --git a/arch/x86/include/asm/summit/apicdef.h b/arch/x86/include/asm/summit/apicdef.h
deleted file mode 100644
index f3fbca1f61c1..000000000000
--- a/arch/x86/include/asm/summit/apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef __ASM_SUMMIT_APICDEF_H
-#define __ASM_SUMMIT_APICDEF_H
-
-#define         APIC_ID_MASK            (0xFF<<24)
-
-static inline unsigned get_apic_id(unsigned long x)
-{
-        return (x>>24)&0xFF;
-}
-
-#define         GET_APIC_ID(x)  get_apic_id(x)
-
-#endif
diff --git a/arch/x86/include/asm/summit/ipi.h b/arch/x86/include/asm/summit/ipi.h
deleted file mode 100644
index a8a2c24f50cc..000000000000
--- a/arch/x86/include/asm/summit/ipi.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef __ASM_SUMMIT_IPI_H
-#define __ASM_SUMMIT_IPI_H
-
-void send_IPI_mask_sequence(const cpumask_t *mask, int vector);
-void send_IPI_mask_allbutself(const cpumask_t *mask, int vector);
-
-static inline void send_IPI_mask(const cpumask_t *mask, int vector)
-{
-        send_IPI_mask_sequence(mask, vector);
-}
-
-static inline void send_IPI_allbutself(int vector)
-{
-        cpumask_t mask = cpu_online_map;
-        cpu_clear(smp_processor_id(), mask);
-
-        if (!cpus_empty(mask))
-                send_IPI_mask(&mask, vector);
-}
-
-static inline void send_IPI_all(int vector)
-{
-        send_IPI_mask(&cpu_online_map, vector);
-}
-
-#endif /* __ASM_SUMMIT_IPI_H */
diff --git a/arch/x86/include/asm/summit/mpparse.h b/arch/x86/include/asm/summit/mpparse.h
deleted file mode 100644
index 380e86c02363..000000000000
--- a/arch/x86/include/asm/summit/mpparse.h
+++ /dev/null
@@ -1,109 +0,0 @@
-#ifndef __ASM_SUMMIT_MPPARSE_H
-#define __ASM_SUMMIT_MPPARSE_H
-
-#include <asm/tsc.h>
-
-extern int use_cyclone;
-
-#ifdef CONFIG_X86_SUMMIT_NUMA
-extern void setup_summit(void);
-#else
-#define setup_summit()  {}
-#endif
-
-static inline int mps_oem_check(struct mpc_table *mpc, char *oem,
-                char *productid)
-{
-        if (!strncmp(oem, "IBM ENSW", 8) &&
-                        (!strncmp(productid, "VIGIL SMP", 9)
-                         || !strncmp(productid, "EXA", 3)
-                         || !strncmp(productid, "RUTHLESS SMP", 12))){
-                mark_tsc_unstable("Summit based system");
-                use_cyclone = 1; /*enable cyclone-timer*/
-                setup_summit();
-                return 1;
-        }
-        return 0;
-}
-
-/* Hook from generic ACPI tables.c */
-static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        if (!strncmp(oem_id, "IBM", 3) &&
-            (!strncmp(oem_table_id, "SERVIGIL", 8)
-             || !strncmp(oem_table_id, "EXA", 3))){
-                mark_tsc_unstable("Summit based system");
-                use_cyclone = 1; /*enable cyclone-timer*/
-                setup_summit();
-                return 1;
-        }
-        return 0;
-}
-
-struct rio_table_hdr {
-        unsigned char version;      /* Version number of this data structure           */
-                                    /* Version 3 adds chassis_num & WP_index           */
-        unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil)   */
-        unsigned char num_rio_dev;  /* # of RIO I/O devices (Cyclones and Winnipegs)   */
-} __attribute__((packed));
-
-struct scal_detail {
-        unsigned char node_id;      /* Scalability Node ID                             */
-        unsigned long CBAR;         /* Address of 1MB register space                   */
-        unsigned char port0node;    /* Node ID port connected to: 0xFF=None            */
-        unsigned char port0port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
-        unsigned char port1node;    /* Node ID port connected to: 0xFF = None          */
-        unsigned char port1port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
-        unsigned char port2node;    /* Node ID port connected to: 0xFF = None          */
-        unsigned char port2port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
-        unsigned char chassis_num;  /* 1 based Chassis number (1 = boot node)          */
-} __attribute__((packed));
-
-struct rio_detail {
-        unsigned char node_id;      /* RIO Node ID                                     */
-        unsigned long BBAR;         /* Address of 1MB register space                   */
-        unsigned char type;         /* Type of device                                  */
-        unsigned char owner_id;     /* For WPEG: Node ID of Cyclone that owns this WPEG*/
-                                    /* For CYC:  Node ID of Twister that owns this CYC */
-        unsigned char port0node;    /* Node ID port connected to: 0xFF=None            */
-        unsigned char port0port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
-        unsigned char port1node;    /* Node ID port connected to: 0xFF=None            */
-        unsigned char port1port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
-        unsigned char first_slot;   /* For WPEG: Lowest slot number below this WPEG    */
-                                    /* For CYC:  0                                     */
-        unsigned char status;       /* For WPEG: Bit 0 = 1 : the XAPIC is used         */
-                                    /*                 = 0 : the XAPIC is not used, ie:*/
-                                    /*                     ints fwded to another XAPIC */
-                                    /*           Bits1:7 Reserved                      */
-                                    /* For CYC:  Bits0:7 Reserved                      */
-        unsigned char WP_index;     /* For WPEG: WPEG instance index - lower ones have */
-                                    /*           lower slot numbers/PCI bus numbers    */
-                                    /* For CYC:  No meaning                            */
-        unsigned char chassis_num;  /* 1 based Chassis number                          */
-                                    /* For LookOut WPEGs this field indicates the      */
-                                    /* Expansion Chassis #, enumerated from Boot       */
-                                    /* Node WPEG external port, then Boot Node CYC     */
-                                    /* external port, then Next Vigil chassis WPEG     */
-                                    /* external port, etc.                             */
-                                    /* Shared Lookouts have only 1 chassis number (the */
-                                    /* first one assigned)                             */
-} __attribute__((packed));
-
-
-typedef enum {
-        CompatTwister = 0,  /* Compatibility Twister               */
-        AltTwister    = 1,  /* Alternate Twister of internal 8-way */
-        CompatCyclone = 2,  /* Compatibility Cyclone               */
-        AltCyclone    = 3,  /* Alternate Cyclone of internal 8-way */
-        CompatWPEG    = 4,  /* Compatibility WPEG                  */
-        AltWPEG       = 5,  /* Second Planar WPEG                  */
-        LookOutAWPEG  = 6,  /* LookOut WPEG                        */
-        LookOutBWPEG  = 7,  /* LookOut WPEG                        */
-} node_type;
-
-static inline int is_WPEG(struct rio_detail *rio){
-        return (rio->type == CompatWPEG || rio->type == AltWPEG ||
-                rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
-}
-
-#endif /* __ASM_SUMMIT_MPPARSE_H */
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h
index 7a80f72bec47..c00bfdbdd456 100644
--- a/arch/x86/include/asm/system.h
+++ b/arch/x86/include/asm/system.h
@@ -130,16 +130,16 @@ do {									\
              "movq "__percpu_arg([current_task])",%%rsi\n\t"              \
              __switch_canary                                              \
              "movq %P[thread_info](%%rsi),%%r8\n\t"                       \
-             LOCK_PREFIX "btr  %[tif_fork],%P[ti_flags](%%r8)\n\t"        \
              "movq %%rax,%%rdi\n\t"                                       \
-             "jc   ret_from_fork\n\t"                                     \
+             "testl  %[_tif_fork],%P[ti_flags](%%r8)\n\t"         \
+             "jnz   ret_from_fork\n\t"                                    \
              RESTORE_CONTEXT                                              \
              : "=a" (last)                                                \
                __switch_canary_oparam                                     \
              : [next] "S" (next), [prev] "D" (prev),                      \
                [threadrsp] "i" (offsetof(struct task_struct, thread.sp)), \
                [ti_flags] "i" (offsetof(struct thread_info, flags)),      \
-               [tif_fork] "i" (TIF_FORK),                                 \
+               [_tif_fork] "i" (_TIF_FORK),                               \
                [thread_info] "i" (offsetof(struct task_struct, stack)),   \
                [current_task] "m" (per_cpu_var(current_task))             \
                __switch_canary_iparam                                     \
diff --git a/arch/x86/include/asm/voyager.h b/arch/x86/include/asm/voyager.h
index b3e647307625..c1635d43616f 100644
--- a/arch/x86/include/asm/voyager.h
+++ b/arch/x86/include/asm/voyager.h
@@ -527,3 +527,45 @@ extern void voyager_smp_intr_init(void);
 #define VOYAGER_PSI_SUBREAD     2
 #define VOYAGER_PSI_SUBWRITE    3
 extern void voyager_cat_psi(__u8, __u16, __u8 *);
+
+/* These define the CPIs we use in linux */
+#define VIC_CPI_LEVEL0                  0
+#define VIC_CPI_LEVEL1                  1
+/* now the fake CPIs */
+#define VIC_TIMER_CPI                   2
+#define VIC_INVALIDATE_CPI              3
+#define VIC_RESCHEDULE_CPI              4
+#define VIC_ENABLE_IRQ_CPI              5
+#define VIC_CALL_FUNCTION_CPI           6
+#define VIC_CALL_FUNCTION_SINGLE_CPI    7
+
+/* Now the QIC CPIs:  Since we don't need the two initial levels,
+ * these are 2 less than the VIC CPIs */
+#define QIC_CPI_OFFSET                  1
+#define QIC_TIMER_CPI                   (VIC_TIMER_CPI - QIC_CPI_OFFSET)
+#define QIC_INVALIDATE_CPI              (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
+#define QIC_RESCHEDULE_CPI              (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
+#define QIC_ENABLE_IRQ_CPI              (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
+#define QIC_CALL_FUNCTION_CPI           (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
+#define QIC_CALL_FUNCTION_SINGLE_CPI    (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
+
+#define VIC_START_FAKE_CPI              VIC_TIMER_CPI
+#define VIC_END_FAKE_CPI                VIC_CALL_FUNCTION_SINGLE_CPI
+
+/* this is the SYS_INT CPI. */
+#define VIC_SYS_INT                     8
+#define VIC_CMN_INT                     15
+
+/* This is the boot CPI for alternate processors.  It gets overwritten
+ * by the above once the system has activated all available processors */
+#define VIC_CPU_BOOT_CPI                VIC_CPI_LEVEL0
+#define VIC_CPU_BOOT_ERRATA_CPI         (VIC_CPI_LEVEL0 + 8)
+
+extern asmlinkage void vic_cpi_interrupt(void);
+extern asmlinkage void vic_sys_interrupt(void);
+extern asmlinkage void vic_cmn_interrupt(void);
+extern asmlinkage void qic_timer_interrupt(void);
+extern asmlinkage void qic_invalidate_interrupt(void);
+extern asmlinkage void qic_reschedule_interrupt(void);
+extern asmlinkage void qic_enable_irq_interrupt(void);
+extern asmlinkage void qic_call_function_interrupt(void);
diff --git a/arch/x86/include/asm/xen/events.h b/arch/x86/include/asm/xen/events.h
index 19144184983a..1df35417c412 100644
--- a/arch/x86/include/asm/xen/events.h
+++ b/arch/x86/include/asm/xen/events.h
@@ -15,10 +15,4 @@ static inline int xen_irqs_disabled(struct pt_regs *regs)
         return raw_irqs_disabled_flags(regs->flags);
 }
 
-static inline void xen_do_IRQ(int irq, struct pt_regs *regs)
-{
-        regs->orig_ax = ~irq;
-        do_IRQ(regs);
-}
-
 #endif /* _ASM_X86_XEN_EVENTS_H */
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 37fa30bada17..24f357e7557a 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -30,7 +30,7 @@ obj-y			+= traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
 obj-y                   += time_$(BITS).o ioport.o ldt.o dumpstack.o
 obj-y                   += setup.o i8259.o irqinit_$(BITS).o
 obj-$(CONFIG_X86_VISWS) += visws_quirks.o
-obj-$(CONFIG_X86_32)    += probe_roms_32.o
+obj-$(CONFIG_X86_32)    += probe_32.o probe_roms_32.o
 obj-$(CONFIG_X86_32)    += sys_i386_32.o i386_ksyms_32.o
 obj-$(CONFIG_X86_64)    += sys_x86_64.o x8664_ksyms_64.o
 obj-$(CONFIG_X86_64)    += syscall_64.o vsyscall_64.o
@@ -50,20 +50,20 @@ obj-y				+= step.o
 obj-$(CONFIG_STACKTRACE)        += stacktrace.o
 obj-y                           += cpu/
 obj-y                           += acpi/
-obj-$(CONFIG_X86_BIOS_REBOOT)   += reboot.o
+obj-y                           += reboot.o
 obj-$(CONFIG_MCA)               += mca_32.o
 obj-$(CONFIG_X86_MSR)           += msr.o
 obj-$(CONFIG_X86_CPUID)         += cpuid.o
 obj-$(CONFIG_PCI)               += early-quirks.o
 apm-y                           := apm_32.o
 obj-$(CONFIG_APM)               += apm.o
-obj-$(CONFIG_X86_SMP)           += smp.o
-obj-$(CONFIG_X86_SMP)           += smpboot.o tsc_sync.o ipi.o
+obj-$(CONFIG_SMP)               += smp.o
+obj-$(CONFIG_SMP)               += smpboot.o tsc_sync.o ipi.o
 obj-$(CONFIG_SMP)               += setup_percpu.o
 obj-$(CONFIG_X86_64_SMP)        += tsc_sync.o
 obj-$(CONFIG_X86_TRAMPOLINE)    += trampoline_$(BITS).o
 obj-$(CONFIG_X86_MPPARSE)       += mpparse.o
-obj-$(CONFIG_X86_LOCAL_APIC)    += apic.o nmi.o
+obj-$(CONFIG_X86_LOCAL_APIC)    += apic.o nmi.o ipi.o
 obj-$(CONFIG_X86_IO_APIC)       += io_apic.o
 obj-$(CONFIG_X86_REBOOTFIXUPS)  += reboot_fixups_32.o
 obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
@@ -71,9 +71,10 @@ obj-$(CONFIG_FUNCTION_GRAPH_TRACER)	+= ftrace.o
 obj-$(CONFIG_KEXEC)             += machine_kexec_$(BITS).o
 obj-$(CONFIG_KEXEC)             += relocate_kernel_$(BITS).o crash.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump_$(BITS).o
+obj-$(CONFIG_X86_BIGSMP)        += bigsmp_32.o
 obj-$(CONFIG_X86_NUMAQ)         += numaq_32.o
 obj-$(CONFIG_X86_ES7000)        += es7000_32.o
-obj-$(CONFIG_X86_SUMMIT_NUMA)   += summit_32.o
+obj-$(CONFIG_X86_SUMMIT)        += summit_32.o
 obj-y                           += vsmp_64.o
 obj-$(CONFIG_KPROBES)           += kprobes.o
 obj-$(CONFIG_MODULES)           += module_$(BITS).o
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index c193ec3c695e..bba162c81d5b 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -42,10 +42,6 @@
 #include <asm/mpspec.h>
 #include <asm/smp.h>
 
-#ifdef CONFIG_X86_LOCAL_APIC
-# include <mach_apic.h>
-#endif
-
 static int __initdata acpi_force = 0;
 u32 acpi_rsdt_forced;
 #ifdef  CONFIG_ACPI
@@ -56,16 +52,7 @@ int acpi_disabled = 1;
 EXPORT_SYMBOL(acpi_disabled);
 
 #ifdef  CONFIG_X86_64
-
-#include <asm/proto.h>
-
-#else                           /* X86 */
-
-#ifdef  CONFIG_X86_LOCAL_APIC
-#include <mach_apic.h>
-#include <mach_mpparse.h>
-#endif                          /* CONFIG_X86_LOCAL_APIC */
-
+# include <asm/proto.h>
 #endif                          /* X86 */
 
 #define BAD_MADT_ENTRY(entry, end) (                                        \
@@ -239,7 +226,8 @@ static int __init acpi_parse_madt(struct acpi_table_header *table)
                        madt->address);
         }
 
-        acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id);
+        default_acpi_madt_oem_check(madt->header.oem_id,
+                                    madt->header.oem_table_id);
 
         return 0;
 }
@@ -884,7 +872,7 @@ static struct {
         DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
 } mp_ioapic_routing[MAX_IO_APICS];
 
-static int mp_find_ioapic(int gsi)
+int mp_find_ioapic(int gsi)
 {
         int i = 0;
 
@@ -899,6 +887,16 @@ static int mp_find_ioapic(int gsi)
         return -1;
 }
 
+int mp_find_ioapic_pin(int ioapic, int gsi)
+{
+        if (WARN_ON(ioapic == -1))
+                return -1;
+        if (WARN_ON(gsi > mp_ioapic_routing[ioapic].gsi_end))
+                return -1;
+
+        return gsi - mp_ioapic_routing[ioapic].gsi_base;
+}
+
 static u8 __init uniq_ioapic_id(u8 id)
 {
 #ifdef CONFIG_X86_32
@@ -1034,7 +1032,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
         ioapic = mp_find_ioapic(gsi);
         if (ioapic < 0)
                 return;
-        pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
+        pin = mp_find_ioapic_pin(ioapic, gsi);
 
         /*
          * TBD: This check is for faulty timer entries, where the override
@@ -1154,7 +1152,7 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
                 return gsi;
         }
 
-        ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
+        ioapic_pin = mp_find_ioapic_pin(ioapic, gsi);
 
 #ifdef CONFIG_X86_32
         if (ioapic_renumber_irq)
@@ -1243,7 +1241,7 @@ int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
         mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
         ioapic = mp_find_ioapic(gsi);
         mp_irq.dstapic = mp_ioapic_routing[ioapic].apic_id;
-        mp_irq.dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base;
+        mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi);
 
         save_mp_irq(&mp_irq);
 #endif
@@ -1370,7 +1368,7 @@ static void __init acpi_process_madt(void)
                 if (!error) {
                         acpi_lapic = 1;
 
-#ifdef CONFIG_X86_GENERICARCH
+#ifdef CONFIG_X86_BIGSMP
                         generic_bigsmp_probe();
 #endif
                         /*
@@ -1382,9 +1380,8 @@ static void __init acpi_process_madt(void)
                                 acpi_ioapic = 1;
 
                                 smp_found_config = 1;
-#ifdef CONFIG_X86_32
-                                setup_apic_routing();
-#endif
+                                if (apic->setup_apic_routing)
+                                        apic->setup_apic_routing();
                         }
                 }
                 if (error == -EINVAL) {
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c
index 383d827eef89..8bd801db24d9 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic.c
@@ -1,7 +1,7 @@
 /*
  *      Local APIC handling, local APIC timers
  *
- *      (c) 1999, 2000 Ingo Molnar <mingo@redhat.com>
+ *      (c) 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
  *
  *      Fixes
  *      Maciej W. Rozycki       :       Bits for genuine 82489DX APICs;
@@ -14,60 +14,62 @@
  *      Mikael Pettersson       :       PM converted to driver model.
  */
 
-#include <linux/init.h>
-
-#include <linux/mm.h>
-#include <linux/delay.h>
-#include <linux/bootmem.h>
-#include <linux/interrupt.h>
-#include <linux/mc146818rtc.h>
 #include <linux/kernel_stat.h>
-#include <linux/sysdev.h>
-#include <linux/ioport.h>
-#include <linux/cpu.h>
-#include <linux/clockchips.h>
+#include <linux/mc146818rtc.h>
 #include <linux/acpi_pmtmr.h>
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/bootmem.h>
+#include <linux/ftrace.h>
+#include <linux/ioport.h>
 #include <linux/module.h>
-#include <linux/dmi.h>
+#include <linux/sysdev.h>
+#include <linux/delay.h>
+#include <linux/timex.h>
 #include <linux/dmar.h>
-#include <linux/ftrace.h>
-#include <linux/smp.h>
+#include <linux/init.h>
+#include <linux/cpu.h>
+#include <linux/dmi.h>
 #include <linux/nmi.h>
-#include <linux/timex.h>
+#include <linux/smp.h>
+#include <linux/mm.h>
 
-#include <asm/atomic.h>
-#include <asm/mtrr.h>
-#include <asm/mpspec.h>
-#include <asm/desc.h>
 #include <asm/arch_hooks.h>
-#include <asm/hpet.h>
 #include <asm/pgalloc.h>
+#include <asm/genapic.h>
+#include <asm/atomic.h>
+#include <asm/mpspec.h>
 #include <asm/i8253.h>
-#include <asm/idle.h>
+#include <asm/i8259.h>
 #include <asm/proto.h>
 #include <asm/apic.h>
-#include <asm/i8259.h>
+#include <asm/desc.h>
+#include <asm/hpet.h>
+#include <asm/idle.h>
+#include <asm/mtrr.h>
 #include <asm/smp.h>
 
-#include <mach_apic.h>
-#include <mach_apicdef.h>
-#include <mach_ipi.h>
-
-/*
- * Sanity check
- */
-#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
-# error SPURIOUS_APIC_VECTOR definition error
-#endif
-
 unsigned int num_processors;
+
 unsigned disabled_cpus __cpuinitdata;
+
 /* Processor that is doing the boot up */
 unsigned int boot_cpu_physical_apicid = -1U;
-EXPORT_SYMBOL(boot_cpu_physical_apicid);
+
+/*
+ * The highest APIC ID seen during enumeration.
+ *
+ * This determines the messaging protocol we can use: if all APIC IDs
+ * are in the 0 ... 7 range, then we can use logical addressing which
+ * has some performance advantages (better broadcasting).
+ *
+ * If there's an APIC ID above 8, we use physical addressing.
+ */
 unsigned int max_physical_apicid;
 
-/* Bitmask of physically existing CPUs */
+/*
+ * Bitmask of physically existing CPUs:
+ */
 physid_mask_t phys_cpu_present_map;
 
 /*
@@ -475,7 +477,7 @@ static void lapic_timer_setup(enum clock_event_mode mode,
 static void lapic_timer_broadcast(const struct cpumask *mask)
 {
 #ifdef CONFIG_SMP
-        send_IPI_mask(mask, LOCAL_TIMER_VECTOR);
+        apic->send_IPI_mask(mask, LOCAL_TIMER_VECTOR);
 #endif
 }
 
@@ -1009,11 +1011,11 @@ int __init verify_local_APIC(void)
          */
         reg0 = apic_read(APIC_ID);
         apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg0);
-        apic_write(APIC_ID, reg0 ^ APIC_ID_MASK);
+        apic_write(APIC_ID, reg0 ^ apic->apic_id_mask);
         reg1 = apic_read(APIC_ID);
         apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg1);
         apic_write(APIC_ID, reg0);
-        if (reg1 != (reg0 ^ APIC_ID_MASK))
+        if (reg1 != (reg0 ^ apic->apic_id_mask))
                 return 0;
 
         /*
@@ -1107,7 +1109,7 @@ static void __cpuinit lapic_setup_esr(void)
                 return;
         }
 
-        if (esr_disable) {
+        if (apic->disable_esr) {
                 /*
                  * Something untraceable is creating bad interrupts on
                  * secondary quads ... for the moment, just leave the
@@ -1149,15 +1151,13 @@ void __cpuinit setup_local_APIC(void)
         int i, j;
 
         if (disable_apic) {
-#ifdef CONFIG_X86_IO_APIC
-                disable_ioapic_setup();
-#endif
+                arch_disable_smp_support();
                 return;
         }
 
 #ifdef CONFIG_X86_32
         /* Pound the ESR really hard over the head with a big hammer - mbligh */
-        if (lapic_is_integrated() && esr_disable) {
+        if (lapic_is_integrated() && apic->disable_esr) {
                 apic_write(APIC_ESR, 0);
                 apic_write(APIC_ESR, 0);
                 apic_write(APIC_ESR, 0);
@@ -1171,7 +1171,7 @@ void __cpuinit setup_local_APIC(void)
          * Double-check whether this APIC is really registered.
          * This is meaningless in clustered apic mode, so we skip it.
          */
-        if (!apic_id_registered())
+        if (!apic->apic_id_registered())
                 BUG();
 
         /*
@@ -1179,7 +1179,7 @@ void __cpuinit setup_local_APIC(void)
          * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
          * document number 292116).  So here it goes...
          */
-        init_apic_ldr();
+        apic->init_apic_ldr();
 
         /*
          * Set Task Priority to 'accept all'. We never change this
@@ -1625,7 +1625,7 @@ int __init APIC_init_uniprocessor(void)
         enable_IR_x2apic();
 #endif
 #ifdef CONFIG_X86_64
-        setup_apic_routing();
+        default_setup_apic_routing();
 #endif
 
         verify_local_APIC();
@@ -1763,7 +1763,8 @@ void __init connect_bsp_APIC(void)
                 outb(0x01, 0x23);
         }
 #endif
-        enable_apic_mode();
+        if (apic->enable_apic_mode)
+                apic->enable_apic_mode();
 }
 
 /**
@@ -1901,7 +1902,7 @@ void __cpuinit generic_processor_info(int apicid, int version)
         }
 #endif
 
-#if defined(CONFIG_X86_SMP) || defined(CONFIG_X86_64)
+#if defined(CONFIG_SMP) || defined(CONFIG_X86_64)
         early_per_cpu(x86_cpu_to_apicid, cpu) = apicid;
         early_per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
 #endif
@@ -1910,11 +1911,30 @@ void __cpuinit generic_processor_info(int apicid, int version)
         set_cpu_present(cpu, true);
 }
 
-#ifdef CONFIG_X86_64
 int hard_smp_processor_id(void)
 {
         return read_apic_id();
 }
+
+void default_init_apic_ldr(void)
+{
+        unsigned long val;
+
+        apic_write(APIC_DFR, APIC_DFR_VALUE);
+        val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
+        val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
+        apic_write(APIC_LDR, val);
+}
+
+#ifdef CONFIG_X86_32
+int default_apicid_to_node(int logical_apicid)
+{
+#ifdef CONFIG_SMP
+        return apicid_2_node[hard_smp_processor_id()];
+#else
+        return 0;
+#endif
+}
 #endif
 
 /*
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index 98807bb095ad..37ba5f85b718 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -301,7 +301,7 @@ extern int (*console_blank_hook)(int);
  */
 #define APM_ZERO_SEGS
 
-#include "apm.h"
+#include <asm/apm.h>
 
 /*
  * Define to re-initialize the interrupt 0 timer to 100 Hz after a suspend.
diff --git a/arch/x86/kernel/bigsmp_32.c b/arch/x86/kernel/bigsmp_32.c
new file mode 100644
index 000000000000..47a62f46afdb
--- /dev/null
+++ b/arch/x86/kernel/bigsmp_32.c
@@ -0,0 +1,266 @@
+/*
+ * APIC driver for "bigsmp" XAPIC machines with more than 8 virtual CPUs.
+ * Drives the local APIC in "clustered mode".
+ */
+#define APIC_DEFINITION 1
+#include <linux/threads.h>
+#include <linux/cpumask.h>
+#include <asm/mpspec.h>
+#include <asm/genapic.h>
+#include <asm/fixmap.h>
+#include <asm/apicdef.h>
+#include <asm/ipi.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/dmi.h>
+#include <linux/smp.h>
+
+
+static inline unsigned bigsmp_get_apic_id(unsigned long x)
+{
+        return (x >> 24) & 0xFF;
+}
+
+#define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu))
+
+static inline int bigsmp_apic_id_registered(void)
+{
+        return 1;
+}
+
+static inline const cpumask_t *bigsmp_target_cpus(void)
+{
+#ifdef CONFIG_SMP
+        return &cpu_online_map;
+#else
+        return &cpumask_of_cpu(0);
+#endif
+}
+
+#define APIC_DFR_VALUE          (APIC_DFR_FLAT)
+
+static inline unsigned long
+bigsmp_check_apicid_used(physid_mask_t bitmap, int apicid)
+{
+        return 0;
+}
+
+static inline unsigned long bigsmp_check_apicid_present(int bit)
+{
+        return 1;
+}
+
+static inline unsigned long calculate_ldr(int cpu)
+{
+        unsigned long val, id;
+        val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
+        id = xapic_phys_to_log_apicid(cpu);
+        val |= SET_APIC_LOGICAL_ID(id);
+        return val;
+}
+
+/*
+ * Set up the logical destination ID.
+ *
+ * Intel recommends to set DFR, LDR and TPR before enabling
+ * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
+ * document number 292116).  So here it goes...
+ */
+static inline void bigsmp_init_apic_ldr(void)
+{
+        unsigned long val;
+        int cpu = smp_processor_id();
+
+        apic_write(APIC_DFR, APIC_DFR_VALUE);
+        val = calculate_ldr(cpu);
+        apic_write(APIC_LDR, val);
+}
+
+static inline void bigsmp_setup_apic_routing(void)
+{
+        printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
+                "Physflat", nr_ioapics);
+}
+
+static inline int bigsmp_apicid_to_node(int logical_apicid)
+{
+        return apicid_2_node[hard_smp_processor_id()];
+}
+
+static inline int bigsmp_cpu_present_to_apicid(int mps_cpu)
+{
+        if (mps_cpu < nr_cpu_ids)
+                return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
+
+        return BAD_APICID;
+}
+
+static inline physid_mask_t bigsmp_apicid_to_cpu_present(int phys_apicid)
+{
+        return physid_mask_of_physid(phys_apicid);
+}
+
+extern u8 cpu_2_logical_apicid[];
+/* Mapping from cpu number to logical apicid */
+static inline int bigsmp_cpu_to_logical_apicid(int cpu)
+{
+        if (cpu >= nr_cpu_ids)
+                return BAD_APICID;
+        return cpu_physical_id(cpu);
+}
+
+static inline physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map)
+{
+        /* For clustered we don't have a good way to do this yet - hack */
+        return physids_promote(0xFFL);
+}
+
+static inline void bigsmp_setup_portio_remap(void)
+{
+}
+
+static inline int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+        return 1;
+}
+
+/* As we are using single CPU as destination, pick only one CPU here */
+static inline unsigned int bigsmp_cpu_mask_to_apicid(const cpumask_t *cpumask)
+{
+        return bigsmp_cpu_to_logical_apicid(first_cpu(*cpumask));
+}
+
+static inline unsigned int
+bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                              const struct cpumask *andmask)
+{
+        int cpu;
+
+        /*
+         * We're using fixed IRQ delivery, can only return one phys APIC ID.
+         * May as well be the first.
+         */
+        for_each_cpu_and(cpu, cpumask, andmask) {
+                if (cpumask_test_cpu(cpu, cpu_online_mask))
+                        break;
+        }
+        if (cpu < nr_cpu_ids)
+                return bigsmp_cpu_to_logical_apicid(cpu);
+
+        return BAD_APICID;
+}
+
+static inline int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb)
+{
+        return cpuid_apic >> index_msb;
+}
+
+static inline void bigsmp_send_IPI_mask(const struct cpumask *mask, int vector)
+{
+        default_send_IPI_mask_sequence_phys(mask, vector);
+}
+
+static inline void bigsmp_send_IPI_allbutself(int vector)
+{
+        default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
+}
+
+static inline void bigsmp_send_IPI_all(int vector)
+{
+        bigsmp_send_IPI_mask(cpu_online_mask, vector);
+}
+
+static int dmi_bigsmp; /* can be set by dmi scanners */
+
+static int hp_ht_bigsmp(const struct dmi_system_id *d)
+{
+        printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
+        dmi_bigsmp = 1;
+        return 0;
+}
+
+
+static const struct dmi_system_id bigsmp_dmi_table[] = {
+        { hp_ht_bigsmp, "HP ProLiant DL760 G2",
+        { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
+        DMI_MATCH(DMI_BIOS_VERSION, "P44-"),}
+        },
+
+        { hp_ht_bigsmp, "HP ProLiant DL740",
+        { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
+        DMI_MATCH(DMI_BIOS_VERSION, "P47-"),}
+        },
+         { }
+};
+
+static void bigsmp_vector_allocation_domain(int cpu, cpumask_t *retmask)
+{
+        cpus_clear(*retmask);
+        cpu_set(cpu, *retmask);
+}
+
+static int probe_bigsmp(void)
+{
+        if (def_to_bigsmp)
+                dmi_bigsmp = 1;
+        else
+                dmi_check_system(bigsmp_dmi_table);
+        return dmi_bigsmp;
+}
+
+struct genapic apic_bigsmp = {
+
+        .name                           = "bigsmp",
+        .probe                          = probe_bigsmp,
+        .acpi_madt_oem_check            = NULL,
+        .apic_id_registered             = bigsmp_apic_id_registered,
+
+        .irq_delivery_mode              = dest_Fixed,
+        /* phys delivery to target CPU: */
+        .irq_dest_mode                  = 0,
+
+        .target_cpus                    = bigsmp_target_cpus,
+        .disable_esr                    = 1,
+        .dest_logical                   = 0,
+        .check_apicid_used              = bigsmp_check_apicid_used,
+        .check_apicid_present           = bigsmp_check_apicid_present,
+
+        .vector_allocation_domain       = bigsmp_vector_allocation_domain,
+        .init_apic_ldr                  = bigsmp_init_apic_ldr,
+
+        .ioapic_phys_id_map             = bigsmp_ioapic_phys_id_map,
+        .setup_apic_routing             = bigsmp_setup_apic_routing,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = bigsmp_apicid_to_node,
+        .cpu_to_logical_apicid          = bigsmp_cpu_to_logical_apicid,
+        .cpu_present_to_apicid          = bigsmp_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = bigsmp_apicid_to_cpu_present,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = bigsmp_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = bigsmp_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = bigsmp_get_apic_id,
+        .set_apic_id                    = NULL,
+        .apic_id_mask                   = 0xFF << 24,
+
+        .cpu_mask_to_apicid             = bigsmp_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = bigsmp_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = bigsmp_send_IPI_mask,
+        .send_IPI_mask_allbutself       = NULL,
+        .send_IPI_allbutself            = bigsmp_send_IPI_allbutself,
+        .send_IPI_all                   = bigsmp_send_IPI_all,
+        .send_IPI_self                  = default_send_IPI_self,
+
+        .wakeup_cpu                     = NULL,
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+
+        .wait_for_init_deassert         = default_wait_for_init_deassert,
+
+        .smp_callin_clear_local_apic    = NULL,
+        .store_NMI_vector               = NULL,
+        .inquire_remote_apic            = default_inquire_remote_apic,
+};
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 2cf23634b6d9..e48640cfac0c 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -7,7 +7,7 @@
 #include <asm/pat.h>
 #include <asm/processor.h>
 
-#include <mach_apic.h>
+#include <asm/genapic.h>
 
 struct cpuid_bit {
         u16 feature;
@@ -69,7 +69,7 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
  */
 void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
 {
-#ifdef CONFIG_X86_SMP
+#ifdef CONFIG_SMP
         unsigned int eax, ebx, ecx, edx, sub_index;
         unsigned int ht_mask_width, core_plus_mask_width;
         unsigned int core_select_mask, core_level_siblings;
@@ -116,22 +116,14 @@ void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
 
         core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
 
-#ifdef CONFIG_X86_32
-        c->cpu_core_id = phys_pkg_id(c->initial_apicid, ht_mask_width)
+        c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, ht_mask_width)
                                                  & core_select_mask;
-        c->phys_proc_id = phys_pkg_id(c->initial_apicid, core_plus_mask_width);
+        c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, core_plus_mask_width);
         /*
          * Reinit the apicid, now that we have extended initial_apicid.
          */
-        c->apicid = phys_pkg_id(c->initial_apicid, 0);
-#else
-        c->cpu_core_id = phys_pkg_id(ht_mask_width) & core_select_mask;
-        c->phys_proc_id = phys_pkg_id(core_plus_mask_width);
-        /*
-         * Reinit the apicid, now that we have extended initial_apicid.
-         */
-        c->apicid = phys_pkg_id(0);
-#endif
+        c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
+
         c->x86_max_cores = (core_level_siblings / smp_num_siblings);
 
 
@@ -143,37 +135,3 @@ void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
         return;
 #endif
 }
-
-#ifdef CONFIG_X86_PAT
-void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
-{
-        if (!cpu_has_pat)
-                pat_disable("PAT not supported by CPU.");
-
-        switch (c->x86_vendor) {
-        case X86_VENDOR_INTEL:
-                /*
-                 * There is a known erratum on Pentium III and Core Solo
-                 * and Core Duo CPUs.
-                 * " Page with PAT set to WC while associated MTRR is UC
-                 *   may consolidate to UC "
-                 * Because of this erratum, it is better to stick with
-                 * setting WC in MTRR rather than using PAT on these CPUs.
-                 *
-                 * Enable PAT WC only on P4, Core 2 or later CPUs.
-                 */
-                if (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 15))
-                        return;
-
-                pat_disable("PAT WC disabled due to known CPU erratum.");
-                return;
-
-        case X86_VENDOR_AMD:
-        case X86_VENDOR_CENTAUR:
-        case X86_VENDOR_TRANSMETA:
-                return;
-        }
-
-        pat_disable("PAT disabled. Not yet verified on this CPU type.");
-}
-#endif
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 7c878f6aa919..ff4d7b9e32e4 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -12,7 +12,7 @@
 # include <asm/cacheflush.h>
 #endif
 
-#include <mach_apic.h>
+#include <asm/genapic.h>
 
 #include "cpu.h"
 
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 260fe4cb2c82..e8f4a386bd9d 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -26,7 +26,7 @@
 #ifdef CONFIG_X86_LOCAL_APIC
 #include <asm/mpspec.h>
 #include <asm/apic.h>
-#include <mach_apic.h>
+#include <asm/genapic.h>
 #include <asm/genapic.h>
 #include <asm/uv/uv.h>
 #endif
@@ -226,6 +226,49 @@ static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
 #endif
 
 /*
+ * Some CPU features depend on higher CPUID levels, which may not always
+ * be available due to CPUID level capping or broken virtualization
+ * software.  Add those features to this table to auto-disable them.
+ */
+struct cpuid_dependent_feature {
+        u32 feature;
+        u32 level;
+};
+static const struct cpuid_dependent_feature __cpuinitconst
+cpuid_dependent_features[] = {
+        { X86_FEATURE_MWAIT,            0x00000005 },
+        { X86_FEATURE_DCA,              0x00000009 },
+        { X86_FEATURE_XSAVE,            0x0000000d },
+        { 0, 0 }
+};
+
+static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn)
+{
+        const struct cpuid_dependent_feature *df;
+        for (df = cpuid_dependent_features; df->feature; df++) {
+                /*
+                 * Note: cpuid_level is set to -1 if unavailable, but
+                 * extended_extended_level is set to 0 if unavailable
+                 * and the legitimate extended levels are all negative
+                 * when signed; hence the weird messing around with
+                 * signs here...
+                 */
+                if (cpu_has(c, df->feature) &&
+                    ((s32)df->feature < 0 ?
+                     (u32)df->feature > (u32)c->extended_cpuid_level :
+                     (s32)df->feature > (s32)c->cpuid_level)) {
+                        clear_cpu_cap(c, df->feature);
+                        if (warn)
+                                printk(KERN_WARNING
+                                       "CPU: CPU feature %s disabled "
+                                       "due to lack of CPUID level 0x%x\n",
+                                       x86_cap_flags[df->feature],
+                                       df->level);
+                }
+        }
+}       
+
+/*
  * Naming convention should be: <Name> [(<Codename>)]
  * This table only is used unless init_<vendor>() below doesn't set it;
  * in particular, if CPUID levels 0x80000002..4 are supported, this isn't used
@@ -407,11 +450,7 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
                 }
 
                 index_msb = get_count_order(smp_num_siblings);
-#ifdef CONFIG_X86_64
-                c->phys_proc_id = phys_pkg_id(index_msb);
-#else
-                c->phys_proc_id = phys_pkg_id(c->initial_apicid, index_msb);
-#endif
+                c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb);
 
                 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
 
@@ -419,13 +458,8 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
 
                 core_bits = get_count_order(c->x86_max_cores);
 
-#ifdef CONFIG_X86_64
-                c->cpu_core_id = phys_pkg_id(index_msb) &
-                                               ((1 << core_bits) - 1);
-#else
-                c->cpu_core_id = phys_pkg_id(c->initial_apicid, index_msb) &
+                c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) &
                                                ((1 << core_bits) - 1);
-#endif
         }
 
 out:
@@ -594,11 +628,10 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
         if (this_cpu->c_early_init)
                 this_cpu->c_early_init(c);
 
-        validate_pat_support(c);
-
 #ifdef CONFIG_SMP
         c->cpu_index = boot_cpu_id;
 #endif
+        filter_cpuid_features(c, false);
 }
 
 void __init early_cpu_init(void)
@@ -661,7 +694,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
                 c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xFF;
 #ifdef CONFIG_X86_32
 # ifdef CONFIG_X86_HT
-                c->apicid = phys_pkg_id(c->initial_apicid, 0);
+                c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
 # else
                 c->apicid = c->initial_apicid;
 # endif
@@ -708,7 +741,7 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
                 this_cpu->c_identify(c);
 
 #ifdef CONFIG_X86_64
-        c->apicid = phys_pkg_id(0);
+        c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
 #endif
 
         /*
@@ -732,6 +765,9 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
          * we do "generic changes."
          */
 
+        /* Filter out anything that depends on CPUID levels we don't have */
+        filter_cpuid_features(c, true);
+
         /* If the model name is still unset, do table lookup. */
         if (!c->x86_model_id[0]) {
                 char *p;
@@ -1062,22 +1098,19 @@ void __cpuinit cpu_init(void)
          */
         if (kgdb_connected && arch_kgdb_ops.correct_hw_break)
                 arch_kgdb_ops.correct_hw_break();
-        else {
+        else
 #endif
-        /*
-         * Clear all 6 debug registers:
-         */
-
-        set_debugreg(0UL, 0);
-        set_debugreg(0UL, 1);
-        set_debugreg(0UL, 2);
-        set_debugreg(0UL, 3);
-        set_debugreg(0UL, 6);
-        set_debugreg(0UL, 7);
-#ifdef CONFIG_KGDB
-        /* If the kgdb is connected no debug regs should be altered. */
+        {
+                /*
+                 * Clear all 6 debug registers:
+                 */
+                set_debugreg(0UL, 0);
+                set_debugreg(0UL, 1);
+                set_debugreg(0UL, 2);
+                set_debugreg(0UL, 3);
+                set_debugreg(0UL, 6);
+                set_debugreg(0UL, 7);
         }
-#endif
 
         fpu_init();
 
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 5c28b37dea11..fb039cd345d8 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -939,10 +939,25 @@ static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
         free_cpumask_var(data->acpi_data.shared_cpu_map);
 }
 
+static int get_transition_latency(struct powernow_k8_data *data)
+{
+        int max_latency = 0;
+        int i;
+        for (i = 0; i < data->acpi_data.state_count; i++) {
+                int cur_latency = data->acpi_data.states[i].transition_latency
+                        + data->acpi_data.states[i].bus_master_latency;
+                if (cur_latency > max_latency)
+                        max_latency = cur_latency;
+        }
+        /* value in usecs, needs to be in nanoseconds */
+        return 1000 * max_latency;
+}
+
 #else
 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; }
 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; }
 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; }
+static int get_transition_latency(struct powernow_k8_data *data) { return 0; }
 #endif /* CONFIG_X86_POWERNOW_K8_ACPI */
 
 /* Take a frequency, and issue the fid/vid transition command */
@@ -1173,7 +1188,13 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
                 if (rc) {
                         goto err_out;
                 }
-        }
+                /* Take a crude guess here.
+                 * That guess was in microseconds, so multiply with 1000 */
+                pol->cpuinfo.transition_latency = (
+                         ((data->rvo + 8) * data->vstable * VST_UNITS_20US) +
+                         ((1 << data->irt) * 30)) * 1000;
+        } else /* ACPI _PSS objects available */
+                pol->cpuinfo.transition_latency = get_transition_latency(data);
 
         /* only run on specific CPU from here on */
         oldmask = current->cpus_allowed;
@@ -1204,11 +1225,6 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
                 cpumask_copy(pol->cpus, &per_cpu(cpu_core_map, pol->cpu));
         data->available_cores = pol->cpus;
 
-        /* Take a crude guess here.
-         * That guess was in microseconds, so multiply with 1000 */
-        pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US)
-            + (3 * (1 << data->irt) * 10)) * 1000;
-
         if (cpu_family == CPU_HW_PSTATE)
                 pol->cur = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
         else
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 24ff26a38ade..1f137a87d4bd 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -24,7 +24,7 @@
 #ifdef CONFIG_X86_LOCAL_APIC
 #include <asm/mpspec.h>
 #include <asm/apic.h>
-#include <mach_apic.h>
+#include <asm/genapic.h>
 #endif
 
 static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
@@ -63,6 +63,18 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
                 set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
         }
 
+        /*
+         * There is a known erratum on Pentium III and Core Solo
+         * and Core Duo CPUs.
+         * " Page with PAT set to WC while associated MTRR is UC
+         *   may consolidate to UC "
+         * Because of this erratum, it is better to stick with
+         * setting WC in MTRR rather than using PAT on these CPUs.
+         *
+         * Enable PAT WC only on P4, Core 2 or later CPUs.
+         */
+        if (c->x86 == 6 && c->x86_model < 15)
+                clear_cpu_cap(c, X86_FEATURE_PAT);
 }
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c
index 11b93cabdf78..ad7f2a696f4a 100644
--- a/arch/x86/kernel/crash.c
+++ b/arch/x86/kernel/crash.c
@@ -28,7 +28,7 @@
 #include <asm/reboot.h>
 #include <asm/virtext.h>
 
-#include <mach_ipi.h>
+#include <asm/genapic.h>
 
 
 #if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC)
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 3de7b5710dc8..e99206831459 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -812,7 +812,7 @@ ENDPROC(name)
 #define BUILD_INTERRUPT(name, nr)       BUILD_INTERRUPT3(name, nr, smp_##name)
 
 /* The include is where all of the SMP etc. interrupts come from */
-#include "entry_arch.h"
+#include <asm/entry_arch.h>
 
 ENTRY(coprocessor_error)
         RING0_INT_FRAME
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 586bed677557..fbcf96b295ff 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -410,6 +410,8 @@ END(save_paranoid)
 ENTRY(ret_from_fork)
         DEFAULT_FRAME
 
+        LOCK ; btr $TIF_FORK,TI_flags(%r8)
+
         push kernel_eflags(%rip)
         CFI_ADJUST_CFA_OFFSET 8
         popf                                    # reset kernel eflags
diff --git a/arch/x86/kernel/es7000_32.c b/arch/x86/kernel/es7000_32.c
index 53699c931ad4..d6184c12a182 100644
--- a/arch/x86/kernel/es7000_32.c
+++ b/arch/x86/kernel/es7000_32.c
@@ -40,7 +40,6 @@
 #include <asm/smp.h>
 #include <asm/atomic.h>
 #include <asm/apicdef.h>
-#include <mach_mpparse.h>
 #include <asm/genapic.h>
 #include <asm/setup.h>
 
@@ -182,20 +181,16 @@ static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
         return 0;
 }
 
-static void noop_wait_for_deassert(atomic_t *deassert_not_used)
-{
-}
-
 static int __init es7000_update_genapic(void)
 {
-        genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
+        apic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
 
         /* MPENTIUMIII */
         if (boot_cpu_data.x86 == 6 &&
             (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) {
                 es7000_update_genapic_to_cluster();
-                genapic->wait_for_init_deassert = noop_wait_for_deassert;
-                genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
+                apic->wait_for_init_deassert = NULL;
+                apic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
         }
 
         return 0;
@@ -359,20 +354,449 @@ es7000_mip_write(struct mip_reg *mip_reg)
         return status;
 }
 
-void __init
-es7000_sw_apic(void)
-{
-        if (es7000_plat) {
-                int mip_status;
-                struct mip_reg es7000_mip_reg;
-
-                printk("ES7000: Enabling APIC mode.\n");
-                memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
-                es7000_mip_reg.off_0 = MIP_SW_APIC;
-                es7000_mip_reg.off_38 = (MIP_VALID);
-                while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0)
-                        printk("es7000_sw_apic: command failed, status = %x\n",
-                                mip_status);
+void __init es7000_enable_apic_mode(void)
+{
+        struct mip_reg es7000_mip_reg;
+        int mip_status;
+
+        if (!es7000_plat)
                 return;
+
+        printk("ES7000: Enabling APIC mode.\n");
+        memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
+        es7000_mip_reg.off_0 = MIP_SW_APIC;
+        es7000_mip_reg.off_38 = MIP_VALID;
+
+        while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0) {
+                printk("es7000_enable_apic_mode: command failed, status = %x\n",
+                        mip_status);
+        }
+}
+
+/*
+ * APIC driver for the Unisys ES7000 chipset.
+ */
+#define APIC_DEFINITION 1
+#include <linux/threads.h>
+#include <linux/cpumask.h>
+#include <asm/mpspec.h>
+#include <asm/genapic.h>
+#include <asm/fixmap.h>
+#include <asm/apicdef.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/acpi.h>
+#include <linux/smp.h>
+#include <asm/ipi.h>
+
+#define APIC_DFR_VALUE_CLUSTER          (APIC_DFR_CLUSTER)
+#define INT_DELIVERY_MODE_CLUSTER       (dest_LowestPrio)
+#define INT_DEST_MODE_CLUSTER           (1) /* logical delivery broadcast to all procs */
+
+#define APIC_DFR_VALUE                  (APIC_DFR_FLAT)
+
+extern void es7000_enable_apic_mode(void);
+extern int apic_version [MAX_APICS];
+extern u8 cpu_2_logical_apicid[];
+extern unsigned int boot_cpu_physical_apicid;
+
+extern int parse_unisys_oem (char *oemptr);
+extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
+extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
+extern void setup_unisys(void);
+
+#define apicid_cluster(apicid)          (apicid & 0xF0)
+#define xapic_phys_to_log_apicid(cpu)   per_cpu(x86_bios_cpu_apicid, cpu)
+
+static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask)
+{
+        /* Careful. Some cpus do not strictly honor the set of cpus
+         * specified in the interrupt destination when using lowest
+         * priority interrupt delivery mode.
+         *
+         * In particular there was a hyperthreading cpu observed to
+         * deliver interrupts to the wrong hyperthread when only one
+         * hyperthread was specified in the interrupt desitination.
+         */
+        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
+}
+
+
+static void es7000_wait_for_init_deassert(atomic_t *deassert)
+{
+#ifndef CONFIG_ES7000_CLUSTERED_APIC
+        while (!atomic_read(deassert))
+                cpu_relax();
+#endif
+        return;
+}
+
+static unsigned int es7000_get_apic_id(unsigned long x)
+{
+        return (x >> 24) & 0xFF;
+}
+
+#ifdef CONFIG_ACPI
+static int es7000_check_dsdt(void)
+{
+        struct acpi_table_header header;
+
+        if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) &&
+            !strncmp(header.oem_id, "UNISYS", 6))
+                return 1;
+        return 0;
+}
+#endif
+
+static void es7000_send_IPI_mask(const struct cpumask *mask, int vector)
+{
+        default_send_IPI_mask_sequence_phys(mask, vector);
+}
+
+static void es7000_send_IPI_allbutself(int vector)
+{
+        default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
+}
+
+static void es7000_send_IPI_all(int vector)
+{
+        es7000_send_IPI_mask(cpu_online_mask, vector);
+}
+
+static int es7000_apic_id_registered(void)
+{
+                return 1;
+}
+
+static const cpumask_t *target_cpus_cluster(void)
+{
+        return &CPU_MASK_ALL;
+}
+
+static const cpumask_t *es7000_target_cpus(void)
+{
+        return &cpumask_of_cpu(smp_processor_id());
+}
+
+static unsigned long
+es7000_check_apicid_used(physid_mask_t bitmap, int apicid)
+{
+        return 0;
+}
+static unsigned long es7000_check_apicid_present(int bit)
+{
+        return physid_isset(bit, phys_cpu_present_map);
+}
+
+static unsigned long calculate_ldr(int cpu)
+{
+        unsigned long id = xapic_phys_to_log_apicid(cpu);
+
+        return (SET_APIC_LOGICAL_ID(id));
+}
+
+/*
+ * Set up the logical destination ID.
+ *
+ * Intel recommends to set DFR, LdR and TPR before enabling
+ * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
+ * document number 292116).  So here it goes...
+ */
+static void es7000_init_apic_ldr_cluster(void)
+{
+        unsigned long val;
+        int cpu = smp_processor_id();
+
+        apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER);
+        val = calculate_ldr(cpu);
+        apic_write(APIC_LDR, val);
+}
+
+static void es7000_init_apic_ldr(void)
+{
+        unsigned long val;
+        int cpu = smp_processor_id();
+
+        apic_write(APIC_DFR, APIC_DFR_VALUE);
+        val = calculate_ldr(cpu);
+        apic_write(APIC_LDR, val);
+}
+
+static void es7000_setup_apic_routing(void)
+{
+        int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
+        printk("Enabling APIC mode:  %s. Using %d I/O APICs, target cpus %lx\n",
+                (apic_version[apic] == 0x14) ?
+                        "Physical Cluster" : "Logical Cluster",
+                        nr_ioapics, cpus_addr(*es7000_target_cpus())[0]);
+}
+
+static int es7000_apicid_to_node(int logical_apicid)
+{
+        return 0;
+}
+
+
+static int es7000_cpu_present_to_apicid(int mps_cpu)
+{
+        if (!mps_cpu)
+                return boot_cpu_physical_apicid;
+        else if (mps_cpu < nr_cpu_ids)
+                return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
+        else
+                return BAD_APICID;
+}
+
+static physid_mask_t es7000_apicid_to_cpu_present(int phys_apicid)
+{
+        static int id = 0;
+        physid_mask_t mask;
+
+        mask = physid_mask_of_physid(id);
+        ++id;
+
+        return mask;
+}
+
+/* Mapping from cpu number to logical apicid */
+static int es7000_cpu_to_logical_apicid(int cpu)
+{
+#ifdef CONFIG_SMP
+        if (cpu >= nr_cpu_ids)
+                return BAD_APICID;
+        return (int)cpu_2_logical_apicid[cpu];
+#else
+        return logical_smp_processor_id();
+#endif
+}
+
+static physid_mask_t es7000_ioapic_phys_id_map(physid_mask_t phys_map)
+{
+        /* For clustered we don't have a good way to do this yet - hack */
+        return physids_promote(0xff);
+}
+
+static int es7000_check_phys_apicid_present(int cpu_physical_apicid)
+{
+        boot_cpu_physical_apicid = read_apic_id();
+        return (1);
+}
+
+static unsigned int
+es7000_cpu_mask_to_apicid_cluster(const struct cpumask *cpumask)
+{
+        int cpus_found = 0;
+        int num_bits_set;
+        int apicid;
+        int cpu;
+
+        num_bits_set = cpumask_weight(cpumask);
+        /* Return id to all */
+        if (num_bits_set == nr_cpu_ids)
+                return 0xFF;
+        /*
+         * The cpus in the mask must all be on the apic cluster.  If are not
+         * on the same apicid cluster return default value of target_cpus():
+         */
+        cpu = cpumask_first(cpumask);
+        apicid = es7000_cpu_to_logical_apicid(cpu);
+
+        while (cpus_found < num_bits_set) {
+                if (cpumask_test_cpu(cpu, cpumask)) {
+                        int new_apicid = es7000_cpu_to_logical_apicid(cpu);
+
+                        if (apicid_cluster(apicid) !=
+                                        apicid_cluster(new_apicid)) {
+                                printk ("%s: Not a valid mask!\n", __func__);
+
+                                return 0xFF;
+                        }
+                        apicid = new_apicid;
+                        cpus_found++;
+                }
+                cpu++;
         }
+        return apicid;
 }
+
+static unsigned int es7000_cpu_mask_to_apicid(const cpumask_t *cpumask)
+{
+        int cpus_found = 0;
+        int num_bits_set;
+        int apicid;
+        int cpu;
+
+        num_bits_set = cpus_weight(*cpumask);
+        /* Return id to all */
+        if (num_bits_set == nr_cpu_ids)
+                return es7000_cpu_to_logical_apicid(0);
+        /*
+         * The cpus in the mask must all be on the apic cluster.  If are not
+         * on the same apicid cluster return default value of target_cpus():
+         */
+        cpu = first_cpu(*cpumask);
+        apicid = es7000_cpu_to_logical_apicid(cpu);
+        while (cpus_found < num_bits_set) {
+                if (cpu_isset(cpu, *cpumask)) {
+                        int new_apicid = es7000_cpu_to_logical_apicid(cpu);
+
+                        if (apicid_cluster(apicid) !=
+                                        apicid_cluster(new_apicid)) {
+                                printk ("%s: Not a valid mask!\n", __func__);
+
+                                return es7000_cpu_to_logical_apicid(0);
+                        }
+                        apicid = new_apicid;
+                        cpus_found++;
+                }
+                cpu++;
+        }
+        return apicid;
+}
+
+static unsigned int
+es7000_cpu_mask_to_apicid_and(const struct cpumask *inmask,
+                              const struct cpumask *andmask)
+{
+        int apicid = es7000_cpu_to_logical_apicid(0);
+        cpumask_var_t cpumask;
+
+        if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
+                return apicid;
+
+        cpumask_and(cpumask, inmask, andmask);
+        cpumask_and(cpumask, cpumask, cpu_online_mask);
+        apicid = es7000_cpu_mask_to_apicid(cpumask);
+
+        free_cpumask_var(cpumask);
+
+        return apicid;
+}
+
+static int es7000_phys_pkg_id(int cpuid_apic, int index_msb)
+{
+        return cpuid_apic >> index_msb;
+}
+
+void __init es7000_update_genapic_to_cluster(void)
+{
+        apic->target_cpus = target_cpus_cluster;
+        apic->irq_delivery_mode = INT_DELIVERY_MODE_CLUSTER;
+        apic->irq_dest_mode = INT_DEST_MODE_CLUSTER;
+
+        apic->init_apic_ldr = es7000_init_apic_ldr_cluster;
+
+        apic->cpu_mask_to_apicid = es7000_cpu_mask_to_apicid_cluster;
+}
+
+static int probe_es7000(void)
+{
+        /* probed later in mptable/ACPI hooks */
+        return 0;
+}
+
+static __init int
+es7000_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
+{
+        if (mpc->oemptr) {
+                struct mpc_oemtable *oem_table =
+                        (struct mpc_oemtable *)mpc->oemptr;
+
+                if (!strncmp(oem, "UNISYS", 6))
+                        return parse_unisys_oem((char *)oem_table);
+        }
+        return 0;
+}
+
+#ifdef CONFIG_ACPI
+/* Hook from generic ACPI tables.c */
+static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
+{
+        unsigned long oem_addr = 0;
+        int check_dsdt;
+        int ret = 0;
+
+        /* check dsdt at first to avoid clear fix_map for oem_addr */
+        check_dsdt = es7000_check_dsdt();
+
+        if (!find_unisys_acpi_oem_table(&oem_addr)) {
+                if (check_dsdt)
+                        ret = parse_unisys_oem((char *)oem_addr);
+                else {
+                        setup_unisys();
+                        ret = 1;
+                }
+                /*
+                 * we need to unmap it
+                 */
+                unmap_unisys_acpi_oem_table(oem_addr);
+        }
+        return ret;
+}
+#else
+static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
+{
+        return 0;
+}
+#endif
+
+
+struct genapic apic_es7000 = {
+
+        .name                           = "es7000",
+        .probe                          = probe_es7000,
+        .acpi_madt_oem_check            = es7000_acpi_madt_oem_check,
+        .apic_id_registered             = es7000_apic_id_registered,
+
+        .irq_delivery_mode              = dest_Fixed,
+        /* phys delivery to target CPUs: */
+        .irq_dest_mode                  = 0,
+
+        .target_cpus                    = es7000_target_cpus,
+        .disable_esr                    = 1,
+        .dest_logical                   = 0,
+        .check_apicid_used              = es7000_check_apicid_used,
+        .check_apicid_present           = es7000_check_apicid_present,
+
+        .vector_allocation_domain       = es7000_vector_allocation_domain,
+        .init_apic_ldr                  = es7000_init_apic_ldr,
+
+        .ioapic_phys_id_map             = es7000_ioapic_phys_id_map,
+        .setup_apic_routing             = es7000_setup_apic_routing,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = es7000_apicid_to_node,
+        .cpu_to_logical_apicid          = es7000_cpu_to_logical_apicid,
+        .cpu_present_to_apicid          = es7000_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = es7000_apicid_to_cpu_present,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = es7000_check_phys_apicid_present,
+        .enable_apic_mode               = es7000_enable_apic_mode,
+        .phys_pkg_id                    = es7000_phys_pkg_id,
+        .mps_oem_check                  = es7000_mps_oem_check,
+
+        .get_apic_id                    = es7000_get_apic_id,
+        .set_apic_id                    = NULL,
+        .apic_id_mask                   = 0xFF << 24,
+
+        .cpu_mask_to_apicid             = es7000_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = es7000_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = es7000_send_IPI_mask,
+        .send_IPI_mask_allbutself       = NULL,
+        .send_IPI_allbutself            = es7000_send_IPI_allbutself,
+        .send_IPI_all                   = es7000_send_IPI_all,
+        .send_IPI_self                  = default_send_IPI_self,
+
+        .wakeup_cpu                     = NULL,
+
+        .trampoline_phys_low            = 0x467,
+        .trampoline_phys_high           = 0x469,
+
+        .wait_for_init_deassert         = es7000_wait_for_init_deassert,
+
+        /* Nothing to do for most platforms, since cleared by the INIT cycle: */
+        .smp_callin_clear_local_apic    = NULL,
+        .store_NMI_vector               = NULL,
+        .inquire_remote_apic            = default_inquire_remote_apic,
+};
diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c
index 1b43086b097a..231bdd3c5b1c 100644
--- a/arch/x86/kernel/ftrace.c
+++ b/arch/x86/kernel/ftrace.c
@@ -488,20 +488,21 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
          * ignore such a protection.
          */
         asm volatile(
-                "1: " _ASM_MOV " (%[parent_old]), %[old]\n"
-                "2: " _ASM_MOV " %[return_hooker], (%[parent_replaced])\n"
+                "1: " _ASM_MOV " (%[parent]), %[old]\n"
+                "2: " _ASM_MOV " %[return_hooker], (%[parent])\n"
                 "   movl $0, %[faulted]\n"
+                "3:\n"
 
                 ".section .fixup, \"ax\"\n"
-                "3: movl $1, %[faulted]\n"
+                "4: movl $1, %[faulted]\n"
+                "   jmp 3b\n"
                 ".previous\n"
 
-                _ASM_EXTABLE(1b, 3b)
-                _ASM_EXTABLE(2b, 3b)
+                _ASM_EXTABLE(1b, 4b)
+                _ASM_EXTABLE(2b, 4b)
 
-                : [parent_replaced] "=r" (parent), [old] "=r" (old),
-                  [faulted] "=r" (faulted)
-                : [parent_old] "0" (parent), [return_hooker] "r" (return_hooker)
+                : [old] "=r" (old), [faulted] "=r" (faulted)
+                : [parent] "r" (parent), [return_hooker] "r" (return_hooker)
                 : "memory"
         );
 
diff --git a/arch/x86/kernel/genapic_64.c b/arch/x86/kernel/genapic_64.c
index e656c2721154..820dea5d0ebe 100644
--- a/arch/x86/kernel/genapic_64.c
+++ b/arch/x86/kernel/genapic_64.c
@@ -29,7 +29,7 @@ extern struct genapic apic_x2xpic_uv_x;
 extern struct genapic apic_x2apic_phys;
 extern struct genapic apic_x2apic_cluster;
 
-struct genapic __read_mostly *genapic = &apic_flat;
+struct genapic __read_mostly *apic = &apic_flat;
 
 static struct genapic *apic_probe[] __initdata = {
 #ifdef CONFIG_X86_UV
@@ -44,17 +44,17 @@ static struct genapic *apic_probe[] __initdata = {
 /*
  * Check the APIC IDs in bios_cpu_apicid and choose the APIC mode.
  */
-void __init setup_apic_routing(void)
+void __init default_setup_apic_routing(void)
 {
-        if (genapic == &apic_x2apic_phys || genapic == &apic_x2apic_cluster) {
+        if (apic == &apic_x2apic_phys || apic == &apic_x2apic_cluster) {
                 if (!intr_remapping_enabled)
-                        genapic = &apic_flat;
+                        apic = &apic_flat;
         }
 
-        if (genapic == &apic_flat) {
+        if (apic == &apic_flat) {
                 if (max_physical_apicid >= 8)
-                        genapic = &apic_physflat;
-                printk(KERN_INFO "Setting APIC routing to %s\n", genapic->name);
+                        apic = &apic_physflat;
+                printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
         }
 
         if (x86_quirks->update_genapic)
@@ -65,18 +65,18 @@ void __init setup_apic_routing(void)
 
 void apic_send_IPI_self(int vector)
 {
-        __send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL);
+        __default_send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL);
 }
 
-int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
+int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 {
         int i;
 
         for (i = 0; apic_probe[i]; ++i) {
                 if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) {
-                        genapic = apic_probe[i];
+                        apic = apic_probe[i];
                         printk(KERN_INFO "Setting APIC routing to %s.\n",
-                                genapic->name);
+                                apic->name);
                         return 1;
                 }
         }
diff --git a/arch/x86/kernel/genapic_flat_64.c b/arch/x86/kernel/genapic_flat_64.c
index 34185488e4fb..249d2d3c034c 100644
--- a/arch/x86/kernel/genapic_flat_64.c
+++ b/arch/x86/kernel/genapic_flat_64.c
@@ -19,7 +19,6 @@
 #include <asm/smp.h>
 #include <asm/ipi.h>
 #include <asm/genapic.h>
-#include <mach_apicdef.h>
 
 #ifdef CONFIG_ACPI
 #include <acpi/acpi_bus.h>
@@ -74,7 +73,7 @@ static inline void _flat_send_IPI_mask(unsigned long mask, int vector)
         unsigned long flags;
 
         local_irq_save(flags);
-        __send_IPI_dest_field(mask, vector, APIC_DEST_LOGICAL);
+        __default_send_IPI_dest_field(mask, vector, apic->dest_logical);
         local_irq_restore(flags);
 }
 
@@ -85,14 +84,15 @@ static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector)
         _flat_send_IPI_mask(mask, vector);
 }
 
-static void flat_send_IPI_mask_allbutself(const struct cpumask *cpumask,
-                                          int vector)
+static void
+ flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector)
 {
         unsigned long mask = cpumask_bits(cpumask)[0];
         int cpu = smp_processor_id();
 
         if (cpu < BITS_PER_LONG)
                 clear_bit(cpu, &mask);
+
         _flat_send_IPI_mask(mask, vector);
 }
 
@@ -114,23 +114,27 @@ static void flat_send_IPI_allbutself(int vector)
                         _flat_send_IPI_mask(mask, vector);
                 }
         } else if (num_online_cpus() > 1) {
-                __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL);
+                __default_send_IPI_shortcut(APIC_DEST_ALLBUT,
+                                            vector, apic->dest_logical);
         }
 }
 
 static void flat_send_IPI_all(int vector)
 {
-        if (vector == NMI_VECTOR)
+        if (vector == NMI_VECTOR) {
                 flat_send_IPI_mask(cpu_online_mask, vector);
-        else
-                __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL);
+        } else {
+                __default_send_IPI_shortcut(APIC_DEST_ALLINC,
+                                            vector, apic->dest_logical);
+        }
 }
 
-static unsigned int get_apic_id(unsigned long x)
+static unsigned int flat_get_apic_id(unsigned long x)
 {
         unsigned int id;
 
         id = (((x)>>24) & 0xFFu);
+
         return id;
 }
 
@@ -146,7 +150,7 @@ static unsigned int read_xapic_id(void)
 {
         unsigned int id;
 
-        id = get_apic_id(apic_read(APIC_ID));
+        id = flat_get_apic_id(apic_read(APIC_ID));
         return id;
 }
 
@@ -169,31 +173,62 @@ static unsigned int flat_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
         return mask1 & mask2;
 }
 
-static unsigned int phys_pkg_id(int index_msb)
+static int flat_phys_pkg_id(int initial_apic_id, int index_msb)
 {
         return hard_smp_processor_id() >> index_msb;
 }
 
 struct genapic apic_flat =  {
-        .name = "flat",
-        .acpi_madt_oem_check = flat_acpi_madt_oem_check,
-        .int_delivery_mode = dest_LowestPrio,
-        .int_dest_mode = (APIC_DEST_LOGICAL != 0),
-        .target_cpus = flat_target_cpus,
-        .vector_allocation_domain = flat_vector_allocation_domain,
-        .apic_id_registered = flat_apic_id_registered,
-        .init_apic_ldr = flat_init_apic_ldr,
-        .send_IPI_all = flat_send_IPI_all,
-        .send_IPI_allbutself = flat_send_IPI_allbutself,
-        .send_IPI_mask = flat_send_IPI_mask,
-        .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself,
-        .send_IPI_self = apic_send_IPI_self,
-        .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
-        .cpu_mask_to_apicid_and = flat_cpu_mask_to_apicid_and,
-        .phys_pkg_id = phys_pkg_id,
-        .get_apic_id = get_apic_id,
-        .set_apic_id = set_apic_id,
-        .apic_id_mask = (0xFFu<<24),
+        .name                           = "flat",
+        .probe                          = NULL,
+        .acpi_madt_oem_check            = flat_acpi_madt_oem_check,
+        .apic_id_registered             = flat_apic_id_registered,
+
+        .irq_delivery_mode              = dest_LowestPrio,
+        .irq_dest_mode                  = 1, /* logical */
+
+        .target_cpus                    = flat_target_cpus,
+        .disable_esr                    = 0,
+        .dest_logical                   = APIC_DEST_LOGICAL,
+        .check_apicid_used              = NULL,
+        .check_apicid_present           = NULL,
+
+        .vector_allocation_domain       = flat_vector_allocation_domain,
+        .init_apic_ldr                  = flat_init_apic_ldr,
+
+        .ioapic_phys_id_map             = NULL,
+        .setup_apic_routing             = NULL,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = NULL,
+        .cpu_to_logical_apicid          = NULL,
+        .cpu_present_to_apicid          = default_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = NULL,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = default_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = flat_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = flat_get_apic_id,
+        .set_apic_id                    = set_apic_id,
+        .apic_id_mask                   = 0xFFu << 24,
+
+        .cpu_mask_to_apicid             = flat_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = flat_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = flat_send_IPI_mask,
+        .send_IPI_mask_allbutself       = flat_send_IPI_mask_allbutself,
+        .send_IPI_allbutself            = flat_send_IPI_allbutself,
+        .send_IPI_all                   = flat_send_IPI_all,
+        .send_IPI_self                  = apic_send_IPI_self,
+
+        .wakeup_cpu                     = NULL,
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+        .wait_for_init_deassert         = NULL,
+        .smp_callin_clear_local_apic    = NULL,
+        .store_NMI_vector               = NULL,
+        .inquire_remote_apic            = NULL,
 };
 
 /*
@@ -232,18 +267,18 @@ static void physflat_vector_allocation_domain(int cpu, struct cpumask *retmask)
 
 static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector)
 {
-        send_IPI_mask_sequence(cpumask, vector);
+        default_send_IPI_mask_sequence_phys(cpumask, vector);
 }
 
 static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask,
                                               int vector)
 {
-        send_IPI_mask_allbutself(cpumask, vector);
+        default_send_IPI_mask_allbutself_phys(cpumask, vector);
 }
 
 static void physflat_send_IPI_allbutself(int vector)
 {
-        send_IPI_mask_allbutself(cpu_online_mask, vector);
+        default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
 }
 
 static void physflat_send_IPI_all(int vector)
@@ -276,32 +311,67 @@ physflat_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
          * We're using fixed IRQ delivery, can only return one phys APIC ID.
          * May as well be the first.
          */
-        for_each_cpu_and(cpu, cpumask, andmask)
+        for_each_cpu_and(cpu, cpumask, andmask) {
                 if (cpumask_test_cpu(cpu, cpu_online_mask))
                         break;
+        }
         if (cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_apicid, cpu);
+
         return BAD_APICID;
 }
 
 struct genapic apic_physflat =  {
-        .name = "physical flat",
-        .acpi_madt_oem_check = physflat_acpi_madt_oem_check,
-        .int_delivery_mode = dest_Fixed,
-        .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
-        .target_cpus = physflat_target_cpus,
-        .vector_allocation_domain = physflat_vector_allocation_domain,
-        .apic_id_registered = flat_apic_id_registered,
-        .init_apic_ldr = flat_init_apic_ldr,/*not needed, but shouldn't hurt*/
-        .send_IPI_all = physflat_send_IPI_all,
-        .send_IPI_allbutself = physflat_send_IPI_allbutself,
-        .send_IPI_mask = physflat_send_IPI_mask,
-        .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself,
-        .send_IPI_self = apic_send_IPI_self,
-        .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
-        .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and,
-        .phys_pkg_id = phys_pkg_id,
-        .get_apic_id = get_apic_id,
-        .set_apic_id = set_apic_id,
-        .apic_id_mask = (0xFFu<<24),
+
+        .name                           = "physical flat",
+        .probe                          = NULL,
+        .acpi_madt_oem_check            = physflat_acpi_madt_oem_check,
+        .apic_id_registered             = flat_apic_id_registered,
+
+        .irq_delivery_mode              = dest_Fixed,
+        .irq_dest_mode                  = 0, /* physical */
+
+        .target_cpus                    = physflat_target_cpus,
+        .disable_esr                    = 0,
+        .dest_logical                   = 0,
+        .check_apicid_used              = NULL,
+        .check_apicid_present           = NULL,
+
+        .vector_allocation_domain       = physflat_vector_allocation_domain,
+        /* not needed, but shouldn't hurt: */
+        .init_apic_ldr                  = flat_init_apic_ldr,
+
+        .ioapic_phys_id_map             = NULL,
+        .setup_apic_routing             = NULL,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = NULL,
+        .cpu_to_logical_apicid          = NULL,
+        .cpu_present_to_apicid          = default_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = NULL,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = default_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = flat_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = flat_get_apic_id,
+        .set_apic_id                    = set_apic_id,
+        .apic_id_mask                   = 0xFFu << 24,
+
+        .cpu_mask_to_apicid             = physflat_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = physflat_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = physflat_send_IPI_mask,
+        .send_IPI_mask_allbutself       = physflat_send_IPI_mask_allbutself,
+        .send_IPI_allbutself            = physflat_send_IPI_allbutself,
+        .send_IPI_all                   = physflat_send_IPI_all,
+        .send_IPI_self                  = apic_send_IPI_self,
+
+        .wakeup_cpu                     = NULL,
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+        .wait_for_init_deassert         = NULL,
+        .smp_callin_clear_local_apic    = NULL,
+        .store_NMI_vector               = NULL,
+        .inquire_remote_apic            = NULL,
 };
diff --git a/arch/x86/kernel/genx2apic_cluster.c b/arch/x86/kernel/genx2apic_cluster.c
index 6ce497cc372d..7c87156b6411 100644
--- a/arch/x86/kernel/genx2apic_cluster.c
+++ b/arch/x86/kernel/genx2apic_cluster.c
@@ -36,8 +36,8 @@ static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
         cpumask_set_cpu(cpu, retmask);
 }
 
-static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
-                                   unsigned int dest)
+static void
+ __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest)
 {
         unsigned long cfg;
 
@@ -57,45 +57,50 @@ static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
  */
 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
 {
-        unsigned long flags;
         unsigned long query_cpu;
+        unsigned long flags;
 
         local_irq_save(flags);
-        for_each_cpu(query_cpu, mask)
+        for_each_cpu(query_cpu, mask) {
                 __x2apic_send_IPI_dest(
                         per_cpu(x86_cpu_to_logical_apicid, query_cpu),
-                        vector, APIC_DEST_LOGICAL);
+                        vector, apic->dest_logical);
+        }
         local_irq_restore(flags);
 }
 
-static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask,
-                                            int vector)
+static void
+ x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
 {
-        unsigned long flags;
-        unsigned long query_cpu;
         unsigned long this_cpu = smp_processor_id();
+        unsigned long query_cpu;
+        unsigned long flags;
 
         local_irq_save(flags);
-        for_each_cpu(query_cpu, mask)
-                if (query_cpu != this_cpu)
-                        __x2apic_send_IPI_dest(
+        for_each_cpu(query_cpu, mask) {
+                if (query_cpu == this_cpu)
+                        continue;
+                __x2apic_send_IPI_dest(
                                 per_cpu(x86_cpu_to_logical_apicid, query_cpu),
-                                vector, APIC_DEST_LOGICAL);
+                                vector, apic->dest_logical);
+        }
         local_irq_restore(flags);
 }
 
 static void x2apic_send_IPI_allbutself(int vector)
 {
-        unsigned long flags;
-        unsigned long query_cpu;
         unsigned long this_cpu = smp_processor_id();
+        unsigned long query_cpu;
+        unsigned long flags;
 
         local_irq_save(flags);
-        for_each_online_cpu(query_cpu)
-                if (query_cpu != this_cpu)
-                        __x2apic_send_IPI_dest(
+        for_each_online_cpu(query_cpu) {
+                if (query_cpu == this_cpu)
+                        continue;
+                __x2apic_send_IPI_dest(
                                 per_cpu(x86_cpu_to_logical_apicid, query_cpu),
-                                vector, APIC_DEST_LOGICAL);
+                                vector, apic->dest_logical);
+        }
         local_irq_restore(flags);
 }
 
@@ -111,21 +116,21 @@ static int x2apic_apic_id_registered(void)
 
 static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
 {
-        int cpu;
-
         /*
          * We're using fixed IRQ delivery, can only return one logical APIC ID.
          * May as well be the first.
          */
-        cpu = cpumask_first(cpumask);
+        int cpu = cpumask_first(cpumask);
+
         if ((unsigned)cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_logical_apicid, cpu);
         else
                 return BAD_APICID;
 }
 
-static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
-                                                  const struct cpumask *andmask)
+static unsigned int
+x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                              const struct cpumask *andmask)
 {
         int cpu;
 
@@ -133,15 +138,18 @@ static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
          * We're using fixed IRQ delivery, can only return one logical APIC ID.
          * May as well be the first.
          */
-        for_each_cpu_and(cpu, cpumask, andmask)
+        for_each_cpu_and(cpu, cpumask, andmask) {
                 if (cpumask_test_cpu(cpu, cpu_online_mask))
                         break;
+        }
+
         if (cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_logical_apicid, cpu);
+
         return BAD_APICID;
 }
 
-static unsigned int get_apic_id(unsigned long x)
+static unsigned int x2apic_cluster_phys_get_apic_id(unsigned long x)
 {
         unsigned int id;
 
@@ -157,7 +165,7 @@ static unsigned long set_apic_id(unsigned int id)
         return x;
 }
 
-static unsigned int phys_pkg_id(int index_msb)
+static int x2apic_cluster_phys_pkg_id(int initial_apicid, int index_msb)
 {
         return current_cpu_data.initial_apicid >> index_msb;
 }
@@ -172,27 +180,58 @@ static void init_x2apic_ldr(void)
         int cpu = smp_processor_id();
 
         per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR);
-        return;
 }
 
 struct genapic apic_x2apic_cluster = {
-        .name = "cluster x2apic",
-        .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
-        .int_delivery_mode = dest_LowestPrio,
-        .int_dest_mode = (APIC_DEST_LOGICAL != 0),
-        .target_cpus = x2apic_target_cpus,
-        .vector_allocation_domain = x2apic_vector_allocation_domain,
-        .apic_id_registered = x2apic_apic_id_registered,
-        .init_apic_ldr = init_x2apic_ldr,
-        .send_IPI_all = x2apic_send_IPI_all,
-        .send_IPI_allbutself = x2apic_send_IPI_allbutself,
-        .send_IPI_mask = x2apic_send_IPI_mask,
-        .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
-        .send_IPI_self = x2apic_send_IPI_self,
-        .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
-        .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
-        .phys_pkg_id = phys_pkg_id,
-        .get_apic_id = get_apic_id,
-        .set_apic_id = set_apic_id,
-        .apic_id_mask = (0xFFFFFFFFu),
+
+        .name                           = "cluster x2apic",
+        .probe                          = NULL,
+        .acpi_madt_oem_check            = x2apic_acpi_madt_oem_check,
+        .apic_id_registered             = x2apic_apic_id_registered,
+
+        .irq_delivery_mode              = dest_LowestPrio,
+        .irq_dest_mode                  = 1, /* logical */
+
+        .target_cpus                    = x2apic_target_cpus,
+        .disable_esr                    = 0,
+        .dest_logical                   = APIC_DEST_LOGICAL,
+        .check_apicid_used              = NULL,
+        .check_apicid_present           = NULL,
+
+        .vector_allocation_domain       = x2apic_vector_allocation_domain,
+        .init_apic_ldr                  = init_x2apic_ldr,
+
+        .ioapic_phys_id_map             = NULL,
+        .setup_apic_routing             = NULL,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = NULL,
+        .cpu_to_logical_apicid          = NULL,
+        .cpu_present_to_apicid          = default_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = NULL,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = default_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = x2apic_cluster_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = x2apic_cluster_phys_get_apic_id,
+        .set_apic_id                    = set_apic_id,
+        .apic_id_mask                   = 0xFFFFFFFFu,
+
+        .cpu_mask_to_apicid             = x2apic_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = x2apic_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = x2apic_send_IPI_mask,
+        .send_IPI_mask_allbutself       = x2apic_send_IPI_mask_allbutself,
+        .send_IPI_allbutself            = x2apic_send_IPI_allbutself,
+        .send_IPI_all                   = x2apic_send_IPI_all,
+        .send_IPI_self                  = x2apic_send_IPI_self,
+
+        .wakeup_cpu                     = NULL,
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+        .wait_for_init_deassert         = NULL,
+        .smp_callin_clear_local_apic    = NULL,
+        .store_NMI_vector               = NULL,
+        .inquire_remote_apic            = NULL,
 };
diff --git a/arch/x86/kernel/genx2apic_phys.c b/arch/x86/kernel/genx2apic_phys.c
index 21bcc0e098ba..5cbae8aa0408 100644
--- a/arch/x86/kernel/genx2apic_phys.c
+++ b/arch/x86/kernel/genx2apic_phys.c
@@ -55,8 +55,8 @@ static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
 
 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
 {
-        unsigned long flags;
         unsigned long query_cpu;
+        unsigned long flags;
 
         local_irq_save(flags);
         for_each_cpu(query_cpu, mask) {
@@ -66,12 +66,12 @@ static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
         local_irq_restore(flags);
 }
 
-static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask,
-                                            int vector)
+static void
+ x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
 {
-        unsigned long flags;
-        unsigned long query_cpu;
         unsigned long this_cpu = smp_processor_id();
+        unsigned long query_cpu;
+        unsigned long flags;
 
         local_irq_save(flags);
         for_each_cpu(query_cpu, mask) {
@@ -85,16 +85,17 @@ static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask,
 
 static void x2apic_send_IPI_allbutself(int vector)
 {
-        unsigned long flags;
-        unsigned long query_cpu;
         unsigned long this_cpu = smp_processor_id();
+        unsigned long query_cpu;
+        unsigned long flags;
 
         local_irq_save(flags);
-        for_each_online_cpu(query_cpu)
-                if (query_cpu != this_cpu)
-                        __x2apic_send_IPI_dest(
-                                per_cpu(x86_cpu_to_apicid, query_cpu),
-                                vector, APIC_DEST_PHYSICAL);
+        for_each_online_cpu(query_cpu) {
+                if (query_cpu == this_cpu)
+                        continue;
+                __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
+                                       vector, APIC_DEST_PHYSICAL);
+        }
         local_irq_restore(flags);
 }
 
@@ -110,21 +111,21 @@ static int x2apic_apic_id_registered(void)
 
 static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
 {
-        int cpu;
-
         /*
          * We're using fixed IRQ delivery, can only return one phys APIC ID.
          * May as well be the first.
          */
-        cpu = cpumask_first(cpumask);
+        int cpu = cpumask_first(cpumask);
+
         if ((unsigned)cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_apicid, cpu);
         else
                 return BAD_APICID;
 }
 
-static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
-                                                  const struct cpumask *andmask)
+static unsigned int
+x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                              const struct cpumask *andmask)
 {
         int cpu;
 
@@ -132,31 +133,28 @@ static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
          * We're using fixed IRQ delivery, can only return one phys APIC ID.
          * May as well be the first.
          */
-        for_each_cpu_and(cpu, cpumask, andmask)
+        for_each_cpu_and(cpu, cpumask, andmask) {
                 if (cpumask_test_cpu(cpu, cpu_online_mask))
                         break;
+        }
+
         if (cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_apicid, cpu);
+
         return BAD_APICID;
 }
 
-static unsigned int get_apic_id(unsigned long x)
+static unsigned int x2apic_phys_get_apic_id(unsigned long x)
 {
-        unsigned int id;
-
-        id = x;
-        return id;
+        return x;
 }
 
 static unsigned long set_apic_id(unsigned int id)
 {
-        unsigned long x;
-
-        x = id;
-        return x;
+        return id;
 }
 
-static unsigned int phys_pkg_id(int index_msb)
+static int x2apic_phys_pkg_id(int initial_apicid, int index_msb)
 {
         return current_cpu_data.initial_apicid >> index_msb;
 }
@@ -168,27 +166,58 @@ static void x2apic_send_IPI_self(int vector)
 
 static void init_x2apic_ldr(void)
 {
-        return;
 }
 
 struct genapic apic_x2apic_phys = {
-        .name = "physical x2apic",
-        .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
-        .int_delivery_mode = dest_Fixed,
-        .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
-        .target_cpus = x2apic_target_cpus,
-        .vector_allocation_domain = x2apic_vector_allocation_domain,
-        .apic_id_registered = x2apic_apic_id_registered,
-        .init_apic_ldr = init_x2apic_ldr,
-        .send_IPI_all = x2apic_send_IPI_all,
-        .send_IPI_allbutself = x2apic_send_IPI_allbutself,
-        .send_IPI_mask = x2apic_send_IPI_mask,
-        .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
-        .send_IPI_self = x2apic_send_IPI_self,
-        .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
-        .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
-        .phys_pkg_id = phys_pkg_id,
-        .get_apic_id = get_apic_id,
-        .set_apic_id = set_apic_id,
-        .apic_id_mask = (0xFFFFFFFFu),
+
+        .name                           = "physical x2apic",
+        .probe                          = NULL,
+        .acpi_madt_oem_check            = x2apic_acpi_madt_oem_check,
+        .apic_id_registered             = x2apic_apic_id_registered,
+
+        .irq_delivery_mode              = dest_Fixed,
+        .irq_dest_mode                  = 0, /* physical */
+
+        .target_cpus                    = x2apic_target_cpus,
+        .disable_esr                    = 0,
+        .dest_logical                   = 0,
+        .check_apicid_used              = NULL,
+        .check_apicid_present           = NULL,
+
+        .vector_allocation_domain       = x2apic_vector_allocation_domain,
+        .init_apic_ldr                  = init_x2apic_ldr,
+
+        .ioapic_phys_id_map             = NULL,
+        .setup_apic_routing             = NULL,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = NULL,
+        .cpu_to_logical_apicid          = NULL,
+        .cpu_present_to_apicid          = default_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = NULL,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = default_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = x2apic_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = x2apic_phys_get_apic_id,
+        .set_apic_id                    = set_apic_id,
+        .apic_id_mask                   = 0xFFFFFFFFu,
+
+        .cpu_mask_to_apicid             = x2apic_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = x2apic_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = x2apic_send_IPI_mask,
+        .send_IPI_mask_allbutself       = x2apic_send_IPI_mask_allbutself,
+        .send_IPI_allbutself            = x2apic_send_IPI_allbutself,
+        .send_IPI_all                   = x2apic_send_IPI_all,
+        .send_IPI_self                  = x2apic_send_IPI_self,
+
+        .wakeup_cpu                     = NULL,
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+        .wait_for_init_deassert         = NULL,
+        .smp_callin_clear_local_apic    = NULL,
+        .store_NMI_vector               = NULL,
+        .inquire_remote_apic            = NULL,
 };
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/genx2apic_uv_x.c
index bfe36249145c..6adb5e6f4d92 100644
--- a/arch/x86/kernel/genx2apic_uv_x.c
+++ b/arch/x86/kernel/genx2apic_uv_x.c
@@ -118,12 +118,13 @@ static void uv_send_IPI_one(int cpu, int vector)
         int pnode;
 
         apicid = per_cpu(x86_cpu_to_apicid, cpu);
-        lapicid = apicid & 0x3f;                /* ZZZ macro needed */
+        lapicid = apicid & 0x3f; /* ZZZ macro needed */
         pnode = uv_apicid_to_pnode(apicid);
-        val =
-            (1UL << UVH_IPI_INT_SEND_SHFT) | (lapicid <<
-                                              UVH_IPI_INT_APIC_ID_SHFT) |
-            (vector << UVH_IPI_INT_VECTOR_SHFT);
+
+        val = (     1UL << UVH_IPI_INT_SEND_SHFT    ) |
+              ( lapicid << UVH_IPI_INT_APIC_ID_SHFT ) |
+              (  vector << UVH_IPI_INT_VECTOR_SHFT  );
+
         uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
 }
 
@@ -137,22 +138,24 @@ static void uv_send_IPI_mask(const struct cpumask *mask, int vector)
 
 static void uv_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
 {
-        unsigned int cpu;
         unsigned int this_cpu = smp_processor_id();
+        unsigned int cpu;
 
-        for_each_cpu(cpu, mask)
+        for_each_cpu(cpu, mask) {
                 if (cpu != this_cpu)
                         uv_send_IPI_one(cpu, vector);
+        }
 }
 
 static void uv_send_IPI_allbutself(int vector)
 {
-        unsigned int cpu;
         unsigned int this_cpu = smp_processor_id();
+        unsigned int cpu;
 
-        for_each_online_cpu(cpu)
+        for_each_online_cpu(cpu) {
                 if (cpu != this_cpu)
                         uv_send_IPI_one(cpu, vector);
+        }
 }
 
 static void uv_send_IPI_all(int vector)
@@ -171,21 +174,21 @@ static void uv_init_apic_ldr(void)
 
 static unsigned int uv_cpu_mask_to_apicid(const struct cpumask *cpumask)
 {
-        int cpu;
-
         /*
          * We're using fixed IRQ delivery, can only return one phys APIC ID.
          * May as well be the first.
          */
-        cpu = cpumask_first(cpumask);
+        int cpu = cpumask_first(cpumask);
+
         if ((unsigned)cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_apicid, cpu);
         else
                 return BAD_APICID;
 }
 
-static unsigned int uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
-                                              const struct cpumask *andmask)
+static unsigned int
+uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                          const struct cpumask *andmask)
 {
         int cpu;
 
@@ -193,15 +196,17 @@ static unsigned int uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
          * We're using fixed IRQ delivery, can only return one phys APIC ID.
          * May as well be the first.
          */
-        for_each_cpu_and(cpu, cpumask, andmask)
+        for_each_cpu_and(cpu, cpumask, andmask) {
                 if (cpumask_test_cpu(cpu, cpu_online_mask))
                         break;
+        }
         if (cpu < nr_cpu_ids)
                 return per_cpu(x86_cpu_to_apicid, cpu);
+
         return BAD_APICID;
 }
 
-static unsigned int get_apic_id(unsigned long x)
+static unsigned int x2apic_get_apic_id(unsigned long x)
 {
         unsigned int id;
 
@@ -223,10 +228,10 @@ static unsigned long set_apic_id(unsigned int id)
 static unsigned int uv_read_apic_id(void)
 {
 
-        return get_apic_id(apic_read(APIC_ID));
+        return x2apic_get_apic_id(apic_read(APIC_ID));
 }
 
-static unsigned int phys_pkg_id(int index_msb)
+static int uv_phys_pkg_id(int initial_apicid, int index_msb)
 {
         return uv_read_apic_id() >> index_msb;
 }
@@ -237,25 +242,57 @@ static void uv_send_IPI_self(int vector)
 }
 
 struct genapic apic_x2apic_uv_x = {
-        .name = "UV large system",
-        .acpi_madt_oem_check = uv_acpi_madt_oem_check,
-        .int_delivery_mode = dest_Fixed,
-        .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
-        .target_cpus = uv_target_cpus,
-        .vector_allocation_domain = uv_vector_allocation_domain,
-        .apic_id_registered = uv_apic_id_registered,
-        .init_apic_ldr = uv_init_apic_ldr,
-        .send_IPI_all = uv_send_IPI_all,
-        .send_IPI_allbutself = uv_send_IPI_allbutself,
-        .send_IPI_mask = uv_send_IPI_mask,
-        .send_IPI_mask_allbutself = uv_send_IPI_mask_allbutself,
-        .send_IPI_self = uv_send_IPI_self,
-        .cpu_mask_to_apicid = uv_cpu_mask_to_apicid,
-        .cpu_mask_to_apicid_and = uv_cpu_mask_to_apicid_and,
-        .phys_pkg_id = phys_pkg_id,
-        .get_apic_id = get_apic_id,
-        .set_apic_id = set_apic_id,
-        .apic_id_mask = (0xFFFFFFFFu),
+
+        .name                           = "UV large system",
+        .probe                          = NULL,
+        .acpi_madt_oem_check            = uv_acpi_madt_oem_check,
+        .apic_id_registered             = uv_apic_id_registered,
+
+        .irq_delivery_mode              = dest_Fixed,
+        .irq_dest_mode                  = 1, /* logical */
+
+        .target_cpus                    = uv_target_cpus,
+        .disable_esr                    = 0,
+        .dest_logical                   = APIC_DEST_LOGICAL,
+        .check_apicid_used              = NULL,
+        .check_apicid_present           = NULL,
+
+        .vector_allocation_domain       = uv_vector_allocation_domain,
+        .init_apic_ldr                  = uv_init_apic_ldr,
+
+        .ioapic_phys_id_map             = NULL,
+        .setup_apic_routing             = NULL,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = NULL,
+        .cpu_to_logical_apicid          = NULL,
+        .cpu_present_to_apicid          = default_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = NULL,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = default_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = uv_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = x2apic_get_apic_id,
+        .set_apic_id                    = set_apic_id,
+        .apic_id_mask                   = 0xFFFFFFFFu,
+
+        .cpu_mask_to_apicid             = uv_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = uv_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = uv_send_IPI_mask,
+        .send_IPI_mask_allbutself       = uv_send_IPI_mask_allbutself,
+        .send_IPI_allbutself            = uv_send_IPI_allbutself,
+        .send_IPI_all                   = uv_send_IPI_all,
+        .send_IPI_self                  = uv_send_IPI_self,
+
+        .wakeup_cpu                     = NULL,
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+        .wait_for_init_deassert         = NULL,
+        .smp_callin_clear_local_apic    = NULL,
+        .store_NMI_vector               = NULL,
+        .inquire_remote_apic            = NULL,
 };
 
 static __cpuinit void set_x2apic_extra_bits(int pnode)
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index cf21fd0cf6ac..2a0aad7718d5 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -567,12 +567,8 @@ early_fault:
         pushl %eax
         pushl %edx              /* trapno */
         pushl $fault_msg
-#ifdef CONFIG_EARLY_PRINTK
-        call early_printk
-#else
         call printk
 #endif
-#endif
         call dump_stack
 hlt_loop:
         hlt
@@ -599,11 +595,10 @@ ignore_int:
         pushl 32(%esp)
         pushl 40(%esp)
         pushl $int_msg
-#ifdef CONFIG_EARLY_PRINTK
-        call early_printk
-#else
         call printk
-#endif
+
+        call dump_stack
+
         addl $(5*4),%esp
         popl %ds
         popl %es
@@ -679,7 +674,7 @@ early_recursion_flag:
         .long 0
 
 int_msg:
-        .asciz "Unknown interrupt or fault at EIP %p %p %p\n"
+        .asciz "Unknown interrupt or fault at: %p %p %p\n"
 
 fault_msg:
 /* fault info: */
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 64d5ad0b8add..388254f69a2a 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -897,7 +897,7 @@ static unsigned long hpet_rtc_flags;
 static int hpet_prev_update_sec;
 static struct rtc_time hpet_alarm_time;
 static unsigned long hpet_pie_count;
-static unsigned long hpet_t1_cmp;
+static u32 hpet_t1_cmp;
 static unsigned long hpet_default_delta;
 static unsigned long hpet_pie_delta;
 static unsigned long hpet_pie_limit;
@@ -905,6 +905,14 @@ static unsigned long hpet_pie_limit;
 static rtc_irq_handler irq_handler;
 
 /*
+ * Check that the hpet counter c1 is ahead of the c2
+ */
+static inline int hpet_cnt_ahead(u32 c1, u32 c2)
+{
+        return (s32)(c2 - c1) < 0;
+}
+
+/*
  * Registers a IRQ handler.
  */
 int hpet_register_irq_handler(rtc_irq_handler handler)
@@ -1075,7 +1083,7 @@ static void hpet_rtc_timer_reinit(void)
                 hpet_t1_cmp += delta;
                 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
                 lost_ints++;
-        } while ((long)(hpet_readl(HPET_COUNTER) - hpet_t1_cmp) > 0);
+        } while (!hpet_cnt_ahead(hpet_t1_cmp, hpet_readl(HPET_COUNTER)));
 
         if (lost_ints) {
                 if (hpet_rtc_flags & RTC_PIE)
diff --git a/arch/x86/kernel/i8237.c b/arch/x86/kernel/i8237.c
index dbd6c1d1b638..b42ca694dc68 100644
--- a/arch/x86/kernel/i8237.c
+++ b/arch/x86/kernel/i8237.c
@@ -28,10 +28,10 @@ static int i8237A_resume(struct sys_device *dev)
 
         flags = claim_dma_lock();
 
-        dma_outb(DMA1_RESET_REG, 0);
-        dma_outb(DMA2_RESET_REG, 0);
+        dma_outb(0, DMA1_RESET_REG);
+        dma_outb(0, DMA2_RESET_REG);
 
-        for (i = 0;i < 8;i++) {
+        for (i = 0; i < 8; i++) {
                 set_dma_addr(i, 0x000000);
                 /* DMA count is a bit weird so this is not 0 */
                 set_dma_count(i, 1);
@@ -51,14 +51,14 @@ static int i8237A_suspend(struct sys_device *dev, pm_message_t state)
 }
 
 static struct sysdev_class i8237_sysdev_class = {
-        .name = "i8237",
-        .suspend = i8237A_suspend,
-        .resume = i8237A_resume,
+        .name           = "i8237",
+        .suspend        = i8237A_suspend,
+        .resume         = i8237A_resume,
 };
 
 static struct sys_device device_i8237A = {
-        .id     = 0,
-        .cls    = &i8237_sysdev_class,
+        .id             = 0,
+        .cls            = &i8237_sysdev_class,
 };
 
 static int __init i8237A_init_sysfs(void)
@@ -68,5 +68,4 @@ static int __init i8237A_init_sysfs(void)
                 error = sysdev_register(&device_i8237A);
         return error;
 }
-
 device_initcall(i8237A_init_sysfs);
diff --git a/arch/x86/kernel/io_apic.c b/arch/x86/kernel/io_apic.c
index 0480d06a12a4..7248ca11bdcd 100644
--- a/arch/x86/kernel/io_apic.c
+++ b/arch/x86/kernel/io_apic.c
@@ -1,7 +1,7 @@
 /*
  *      Intel IO-APIC support for multi-Pentium hosts.
  *
- *      Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar, Hajnalka Szabo
+ *      Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo
  *
  *      Many thanks to Stig Venaas for trying out countless experimental
  *      patches and reporting/debugging problems patiently!
@@ -62,9 +62,7 @@
 #include <asm/uv/uv_hub.h>
 #include <asm/uv/uv_irq.h>
 
-#include <mach_ipi.h>
-#include <mach_apic.h>
-#include <mach_apicdef.h>
+#include <asm/genapic.h>
 
 #define __apicdebuginit(type) static type __init
 
@@ -100,10 +98,19 @@ DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
 
 int skip_ioapic_setup;
 
+void arch_disable_smp_support(void)
+{
+#ifdef CONFIG_PCI
+        noioapicquirk = 1;
+        noioapicreroute = -1;
+#endif
+        skip_ioapic_setup = 1;
+}
+
 static int __init parse_noapic(char *str)
 {
         /* disable IO-APIC */
-        disable_ioapic_setup();
+        arch_disable_smp_support();
         return 0;
 }
 early_param("noapic", parse_noapic);
@@ -479,7 +486,7 @@ __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
         io_apic_write(apic, 0x10 + 2*pin, eu.w1);
 }
 
-static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
+void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
 {
         unsigned long flags;
         spin_lock_irqsave(&ioapic_lock, flags);
@@ -514,11 +521,11 @@ static void send_cleanup_vector(struct irq_cfg *cfg)
                 for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
                         cfg->move_cleanup_count++;
                 for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
-                        send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR);
+                        apic->send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR);
         } else {
                 cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask);
                 cfg->move_cleanup_count = cpumask_weight(cleanup_mask);
-                send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);
+                apic->send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);
                 free_cpumask_var(cleanup_mask);
         }
         cfg->move_in_progress = 0;
@@ -563,8 +570,9 @@ static int
 assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask);
 
 /*
- * Either sets desc->affinity to a valid value, and returns cpu_mask_to_apicid
- * of that, or returns BAD_APICID and leaves desc->affinity untouched.
+ * Either sets desc->affinity to a valid value, and returns
+ * ->cpu_mask_to_apicid of that, or returns BAD_APICID and
+ * leaves desc->affinity untouched.
  */
 static unsigned int
 set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask)
@@ -582,7 +590,8 @@ set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask)
 
         cpumask_and(desc->affinity, cfg->domain, mask);
         set_extra_move_desc(desc, mask);
-        return cpu_mask_to_apicid_and(desc->affinity, cpu_online_mask);
+
+        return apic->cpu_mask_to_apicid_and(desc->affinity, cpu_online_mask);
 }
 
 static void
@@ -797,23 +806,6 @@ static void clear_IO_APIC (void)
                         clear_IO_APIC_pin(apic, pin);
 }
 
-#if !defined(CONFIG_SMP) && defined(CONFIG_X86_32)
-void send_IPI_self(int vector)
-{
-        unsigned int cfg;
-
-        /*
-         * Wait for idle.
-         */
-        apic_wait_icr_idle();
-        cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | APIC_DEST_LOGICAL;
-        /*
-         * Send the IPI. The write to APIC_ICR fires this off.
-         */
-        apic_write(APIC_ICR, cfg);
-}
-#endif /* !CONFIG_SMP && CONFIG_X86_32*/
-
 #ifdef CONFIG_X86_32
 /*
  * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to
@@ -1316,7 +1308,7 @@ __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)
                 int new_cpu;
                 int vector, offset;
 
-                vector_allocation_domain(cpu, tmp_mask);
+                apic->vector_allocation_domain(cpu, tmp_mask);
 
                 vector = current_vector;
                 offset = current_offset;
@@ -1486,10 +1478,10 @@ static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long t
                                               handle_edge_irq, "edge");
 }
 
-static int setup_ioapic_entry(int apic, int irq,
-                              struct IO_APIC_route_entry *entry,
-                              unsigned int destination, int trigger,
-                              int polarity, int vector)
+int setup_ioapic_entry(int apic_id, int irq,
+                       struct IO_APIC_route_entry *entry,
+                       unsigned int destination, int trigger,
+                       int polarity, int vector)
 {
         /*
          * add it to the IO-APIC irq-routing table:
@@ -1498,25 +1490,25 @@ static int setup_ioapic_entry(int apic, int irq,
 
 #ifdef CONFIG_INTR_REMAP
         if (intr_remapping_enabled) {
-                struct intel_iommu *iommu = map_ioapic_to_ir(apic);
+                struct intel_iommu *iommu = map_ioapic_to_ir(apic_id);
                 struct irte irte;
                 struct IR_IO_APIC_route_entry *ir_entry =
                         (struct IR_IO_APIC_route_entry *) entry;
                 int index;
 
                 if (!iommu)
-                        panic("No mapping iommu for ioapic %d\n", apic);
+                        panic("No mapping iommu for ioapic %d\n", apic_id);
 
                 index = alloc_irte(iommu, irq, 1);
                 if (index < 0)
-                        panic("Failed to allocate IRTE for ioapic %d\n", apic);
+                        panic("Failed to allocate IRTE for ioapic %d\n", apic_id);
 
                 memset(&irte, 0, sizeof(irte));
 
                 irte.present = 1;
-                irte.dst_mode = INT_DEST_MODE;
+                irte.dst_mode = apic->irq_dest_mode;
                 irte.trigger_mode = trigger;
-                irte.dlvry_mode = INT_DELIVERY_MODE;
+                irte.dlvry_mode = apic->irq_delivery_mode;
                 irte.vector = vector;
                 irte.dest_id = IRTE_DEST(destination);
 
@@ -1529,8 +1521,8 @@ static int setup_ioapic_entry(int apic, int irq,
         } else
 #endif
         {
-                entry->delivery_mode = INT_DELIVERY_MODE;
-                entry->dest_mode = INT_DEST_MODE;
+                entry->delivery_mode = apic->irq_delivery_mode;
+                entry->dest_mode = apic->irq_dest_mode;
                 entry->dest = destination;
         }
 
@@ -1547,7 +1539,7 @@ static int setup_ioapic_entry(int apic, int irq,
         return 0;
 }
 
-static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_desc *desc,
+static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq_desc *desc,
                               int trigger, int polarity)
 {
         struct irq_cfg *cfg;
@@ -1559,22 +1551,22 @@ static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_de
 
         cfg = desc->chip_data;
 
-        if (assign_irq_vector(irq, cfg, TARGET_CPUS))
+        if (assign_irq_vector(irq, cfg, apic->target_cpus()))
                 return;
 
-        dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);
+        dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
 
         apic_printk(APIC_VERBOSE,KERN_DEBUG
                     "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> "
                     "IRQ %d Mode:%i Active:%i)\n",
-                    apic, mp_ioapics[apic].apicid, pin, cfg->vector,
+                    apic_id, mp_ioapics[apic_id].apicid, pin, cfg->vector,
                     irq, trigger, polarity);
 
 
-        if (setup_ioapic_entry(mp_ioapics[apic].apicid, irq, &entry,
+        if (setup_ioapic_entry(mp_ioapics[apic_id].apicid, irq, &entry,
                                dest, trigger, polarity, cfg->vector)) {
                 printk("Failed to setup ioapic entry for ioapic  %d, pin %d\n",
-                       mp_ioapics[apic].apicid, pin);
+                       mp_ioapics[apic_id].apicid, pin);
                 __clear_irq_vector(irq, cfg);
                 return;
         }
@@ -1583,12 +1575,12 @@ static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_de
         if (irq < NR_IRQS_LEGACY)
                 disable_8259A_irq(irq);
 
-        ioapic_write_entry(apic, pin, entry);
+        ioapic_write_entry(apic_id, pin, entry);
 }
 
 static void __init setup_IO_APIC_irqs(void)
 {
-        int apic, pin, idx, irq;
+        int apic_id, pin, idx, irq;
         int notcon = 0;
         struct irq_desc *desc;
         struct irq_cfg *cfg;
@@ -1596,19 +1588,19 @@ static void __init setup_IO_APIC_irqs(void)
 
         apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");
 
-        for (apic = 0; apic < nr_ioapics; apic++) {
-                for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) {
+        for (apic_id = 0; apic_id < nr_ioapics; apic_id++) {
+                for (pin = 0; pin < nr_ioapic_registers[apic_id]; pin++) {
 
-                        idx = find_irq_entry(apic, pin, mp_INT);
+                        idx = find_irq_entry(apic_id, pin, mp_INT);
                         if (idx == -1) {
                                 if (!notcon) {
                                         notcon = 1;
                                         apic_printk(APIC_VERBOSE,
                                                 KERN_DEBUG " %d-%d",
-                                                mp_ioapics[apic].apicid, pin);
+                                                mp_ioapics[apic_id].apicid, pin);
                                 } else
                                         apic_printk(APIC_VERBOSE, " %d-%d",
-                                                mp_ioapics[apic].apicid, pin);
+                                                mp_ioapics[apic_id].apicid, pin);
                                 continue;
                         }
                         if (notcon) {
@@ -1617,20 +1609,25 @@ static void __init setup_IO_APIC_irqs(void)
                                 notcon = 0;
                         }
 
-                        irq = pin_2_irq(idx, apic, pin);
-#ifdef CONFIG_X86_32
-                        if (multi_timer_check(apic, irq))
+                        irq = pin_2_irq(idx, apic_id, pin);
+
+                        /*
+                         * Skip the timer IRQ if there's a quirk handler
+                         * installed and if it returns 1:
+                         */
+                        if (apic->multi_timer_check &&
+                                        apic->multi_timer_check(apic_id, irq))
                                 continue;
-#endif
+
                         desc = irq_to_desc_alloc_cpu(irq, cpu);
                         if (!desc) {
                                 printk(KERN_INFO "can not get irq_desc for %d\n", irq);
                                 continue;
                         }
                         cfg = desc->chip_data;
-                        add_pin_to_irq_cpu(cfg, cpu, apic, pin);
+                        add_pin_to_irq_cpu(cfg, cpu, apic_id, pin);
 
-                        setup_IO_APIC_irq(apic, pin, irq, desc,
+                        setup_IO_APIC_irq(apic_id, pin, irq, desc,
                                         irq_trigger(idx), irq_polarity(idx));
                 }
         }
@@ -1643,7 +1640,7 @@ static void __init setup_IO_APIC_irqs(void)
 /*
  * Set up the timer pin, possibly with the 8259A-master behind.
  */
-static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
+static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
                                         int vector)
 {
         struct IO_APIC_route_entry entry;
@@ -1659,10 +1656,10 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
          * We use logical delivery to get the timer IRQ
          * to the first CPU.
          */
-        entry.dest_mode = INT_DEST_MODE;
-        entry.mask = 1;                                 /* mask IRQ now */
-        entry.dest = cpu_mask_to_apicid(TARGET_CPUS);
-        entry.delivery_mode = INT_DELIVERY_MODE;
+        entry.dest_mode = apic->irq_dest_mode;
+        entry.mask = 0;                 /* don't mask IRQ for edge */
+        entry.dest = apic->cpu_mask_to_apicid(apic->target_cpus());
+        entry.delivery_mode = apic->irq_delivery_mode;
         entry.polarity = 0;
         entry.trigger = 0;
         entry.vector = vector;
@@ -1676,7 +1673,7 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
         /*
          * Add it to the IO-APIC irq-routing table:
          */
-        ioapic_write_entry(apic, pin, entry);
+        ioapic_write_entry(apic_id, pin, entry);
 }
 
 
@@ -2089,7 +2086,7 @@ static void __init setup_ioapic_ids_from_mpc(void)
 {
         union IO_APIC_reg_00 reg_00;
         physid_mask_t phys_id_present_map;
-        int apic;
+        int apic_id;
         int i;
         unsigned char old_id;
         unsigned long flags;
@@ -2108,26 +2105,26 @@ static void __init setup_ioapic_ids_from_mpc(void)
          * This is broken; anything with a real cpu count has to
          * circumvent this idiocy regardless.
          */
-        phys_id_present_map = ioapic_phys_id_map(phys_cpu_present_map);
+        phys_id_present_map = apic->ioapic_phys_id_map(phys_cpu_present_map);
 
         /*
          * Set the IOAPIC ID to the value stored in the MPC table.
          */
-        for (apic = 0; apic < nr_ioapics; apic++) {
+        for (apic_id = 0; apic_id < nr_ioapics; apic_id++) {
 
                 /* Read the register 0 value */
                 spin_lock_irqsave(&ioapic_lock, flags);
-                reg_00.raw = io_apic_read(apic, 0);
+                reg_00.raw = io_apic_read(apic_id, 0);
                 spin_unlock_irqrestore(&ioapic_lock, flags);
 
-                old_id = mp_ioapics[apic].apicid;
+                old_id = mp_ioapics[apic_id].apicid;
 
-                if (mp_ioapics[apic].apicid >= get_physical_broadcast()) {
+                if (mp_ioapics[apic_id].apicid >= get_physical_broadcast()) {
                         printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n",
-                                apic, mp_ioapics[apic].apicid);
+                                apic_id, mp_ioapics[apic_id].apicid);
                         printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
                                 reg_00.bits.ID);
-                        mp_ioapics[apic].apicid = reg_00.bits.ID;
+                        mp_ioapics[apic_id].apicid = reg_00.bits.ID;
                 }
 
                 /*
@@ -2135,10 +2132,10 @@ static void __init setup_ioapic_ids_from_mpc(void)
                  * system must have a unique ID or we get lots of nice
                  * 'stuck on smp_invalidate_needed IPI wait' messages.
                  */
-                if (check_apicid_used(phys_id_present_map,
-                                        mp_ioapics[apic].apicid)) {
+                if (apic->check_apicid_used(phys_id_present_map,
+                                        mp_ioapics[apic_id].apicid)) {
                         printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n",
-                                apic, mp_ioapics[apic].apicid);
+                                apic_id, mp_ioapics[apic_id].apicid);
                         for (i = 0; i < get_physical_broadcast(); i++)
                                 if (!physid_isset(i, phys_id_present_map))
                                         break;
@@ -2147,13 +2144,13 @@ static void __init setup_ioapic_ids_from_mpc(void)
                         printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
                                 i);
                         physid_set(i, phys_id_present_map);
-                        mp_ioapics[apic].apicid = i;
+                        mp_ioapics[apic_id].apicid = i;
                 } else {
                         physid_mask_t tmp;
-                        tmp = apicid_to_cpu_present(mp_ioapics[apic].apicid);
+                        tmp = apic->apicid_to_cpu_present(mp_ioapics[apic_id].apicid);
                         apic_printk(APIC_VERBOSE, "Setting %d in the "
                                         "phys_id_present_map\n",
-                                        mp_ioapics[apic].apicid);
+                                        mp_ioapics[apic_id].apicid);
                         physids_or(phys_id_present_map, phys_id_present_map, tmp);
                 }
 
@@ -2162,11 +2159,11 @@ static void __init setup_ioapic_ids_from_mpc(void)
                  * We need to adjust the IRQ routing table
                  * if the ID changed.
                  */
-                if (old_id != mp_ioapics[apic].apicid)
+                if (old_id != mp_ioapics[apic_id].apicid)
                         for (i = 0; i < mp_irq_entries; i++)
                                 if (mp_irqs[i].dstapic == old_id)
                                         mp_irqs[i].dstapic
-                                                = mp_ioapics[apic].apicid;
+                                                = mp_ioapics[apic_id].apicid;
 
                 /*
                  * Read the right value from the MPC table and
@@ -2174,20 +2171,20 @@ static void __init setup_ioapic_ids_from_mpc(void)
                  */
                 apic_printk(APIC_VERBOSE, KERN_INFO
                         "...changing IO-APIC physical APIC ID to %d ...",
-                        mp_ioapics[apic].apicid);
+                        mp_ioapics[apic_id].apicid);
 
-                reg_00.bits.ID = mp_ioapics[apic].apicid;
+                reg_00.bits.ID = mp_ioapics[apic_id].apicid;
                 spin_lock_irqsave(&ioapic_lock, flags);
-                io_apic_write(apic, 0, reg_00.raw);
+                io_apic_write(apic_id, 0, reg_00.raw);
                 spin_unlock_irqrestore(&ioapic_lock, flags);
 
                 /*
                  * Sanity check
                  */
                 spin_lock_irqsave(&ioapic_lock, flags);
-                reg_00.raw = io_apic_read(apic, 0);
+                reg_00.raw = io_apic_read(apic_id, 0);
                 spin_unlock_irqrestore(&ioapic_lock, flags);
-                if (reg_00.bits.ID != mp_ioapics[apic].apicid)
+                if (reg_00.bits.ID != mp_ioapics[apic_id].apicid)
                         printk("could not set ID!\n");
                 else
                         apic_printk(APIC_VERBOSE, " ok.\n");
@@ -2290,7 +2287,7 @@ static int ioapic_retrigger_irq(unsigned int irq)
         unsigned long flags;
 
         spin_lock_irqsave(&vector_lock, flags);
-        send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector);
+        apic->send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector);
         spin_unlock_irqrestore(&vector_lock, flags);
 
         return 1;
@@ -2298,7 +2295,7 @@ static int ioapic_retrigger_irq(unsigned int irq)
 #else
 static int ioapic_retrigger_irq(unsigned int irq)
 {
-        send_IPI_self(irq_cfg(irq)->vector);
+        apic->send_IPI_self(irq_cfg(irq)->vector);
 
         return 1;
 }
@@ -2362,7 +2359,7 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
 
         set_extra_move_desc(desc, mask);
 
-        dest = cpu_mask_to_apicid_and(cfg->domain, mask);
+        dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask);
 
         modify_ioapic_rte = desc->status & IRQ_LEVEL;
         if (modify_ioapic_rte) {
@@ -2866,19 +2863,15 @@ static inline void __init check_timer(void)
         int cpu = boot_cpu_id;
         int apic1, pin1, apic2, pin2;
         unsigned long flags;
-        unsigned int ver;
         int no_pin1 = 0;
 
         local_irq_save(flags);
 
-        ver = apic_read(APIC_LVR);
-        ver = GET_APIC_VERSION(ver);
-
         /*
          * get/set the timer IRQ vector:
          */
         disable_8259A_irq(0);
-        assign_irq_vector(0, cfg, TARGET_CPUS);
+        assign_irq_vector(0, cfg, apic->target_cpus());
 
         /*
          * As IRQ0 is to be enabled in the 8259A, the virtual
@@ -2892,7 +2885,13 @@ static inline void __init check_timer(void)
         apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
         init_8259A(1);
 #ifdef CONFIG_X86_32
-        timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver));
+        {
+                unsigned int ver;
+
+                ver = apic_read(APIC_LVR);
+                ver = GET_APIC_VERSION(ver);
+                timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver));
+        }
 #endif
 
         pin1  = find_isa_irq_pin(0, mp_INT);
@@ -2931,8 +2930,17 @@ static inline void __init check_timer(void)
                 if (no_pin1) {
                         add_pin_to_irq_cpu(cfg, cpu, apic1, pin1);
                         setup_timer_IRQ0_pin(apic1, pin1, cfg->vector);
+                } else {
+                        /* for edge trigger, setup_IO_APIC_irq already
+                         * leave it unmasked.
+                         * so only need to unmask if it is level-trigger
+                         * do we really have level trigger timer?
+                         */
+                        int idx;
+                        idx = find_irq_entry(apic1, pin1, mp_INT);
+                        if (idx != -1 && irq_trigger(idx))
+                                unmask_IO_APIC_irq_desc(desc);
                 }
-                unmask_IO_APIC_irq_desc(desc);
                 if (timer_irq_works()) {
                         if (nmi_watchdog == NMI_IO_APIC) {
                                 setup_nmi();
@@ -2946,6 +2954,7 @@ static inline void __init check_timer(void)
                 if (intr_remapping_enabled)
                         panic("timer doesn't work through Interrupt-remapped IO-APIC");
 #endif
+                local_irq_disable();
                 clear_IO_APIC_pin(apic1, pin1);
                 if (!no_pin1)
                         apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: "
@@ -2960,7 +2969,6 @@ static inline void __init check_timer(void)
                  */
                 replace_pin_at_irq_cpu(cfg, cpu, apic1, pin1, apic2, pin2);
                 setup_timer_IRQ0_pin(apic2, pin2, cfg->vector);
-                unmask_IO_APIC_irq_desc(desc);
                 enable_8259A_irq(0);
                 if (timer_irq_works()) {
                         apic_printk(APIC_QUIET, KERN_INFO "....... works.\n");
@@ -2975,6 +2983,7 @@ static inline void __init check_timer(void)
                 /*
                  * Cleanup, just in case ...
                  */
+                local_irq_disable();
                 disable_8259A_irq(0);
                 clear_IO_APIC_pin(apic2, pin2);
                 apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n");
@@ -3000,6 +3009,7 @@ static inline void __init check_timer(void)
                 apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");
                 goto out;
         }
+        local_irq_disable();
         disable_8259A_irq(0);
         apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector);
         apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n");
@@ -3017,6 +3027,7 @@ static inline void __init check_timer(void)
                 apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");
                 goto out;
         }
+        local_irq_disable();
         apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n");
         panic("IO-APIC + timer doesn't work!  Boot with apic=debug and send a "
                 "report.  Then try booting with the 'noapic' option.\n");
@@ -3168,6 +3179,7 @@ static int __init ioapic_init_sysfs(void)
 
 device_initcall(ioapic_init_sysfs);
 
+static int nr_irqs_gsi = NR_IRQS_LEGACY;
 /*
  * Dynamic irq allocate and deallocation
  */
@@ -3182,11 +3194,11 @@ unsigned int create_irq_nr(unsigned int irq_want)
         struct irq_desc *desc_new = NULL;
 
         irq = 0;
+        if (irq_want < nr_irqs_gsi)
+                irq_want = nr_irqs_gsi;
+
         spin_lock_irqsave(&vector_lock, flags);
         for (new = irq_want; new < nr_irqs; new++) {
-                if (platform_legacy_irq(new))
-                        continue;
-
                 desc_new = irq_to_desc_alloc_cpu(new, cpu);
                 if (!desc_new) {
                         printk(KERN_INFO "can not get irq_desc for %d\n", new);
@@ -3196,7 +3208,7 @@ unsigned int create_irq_nr(unsigned int irq_want)
 
                 if (cfg_new->vector != 0)
                         continue;
-                if (__assign_irq_vector(new, cfg_new, TARGET_CPUS) == 0)
+                if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0)
                         irq = new;
                 break;
         }
@@ -3211,7 +3223,6 @@ unsigned int create_irq_nr(unsigned int irq_want)
         return irq;
 }
 
-static int nr_irqs_gsi = NR_IRQS_LEGACY;
 int create_irq(void)
 {
         unsigned int irq_want;
@@ -3262,11 +3273,11 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
                 return -ENXIO;
 
         cfg = irq_cfg(irq);
-        err = assign_irq_vector(irq, cfg, TARGET_CPUS);
+        err = assign_irq_vector(irq, cfg, apic->target_cpus());
         if (err)
                 return err;
 
-        dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);
+        dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
 
 #ifdef CONFIG_INTR_REMAP
         if (irq_remapped(irq)) {
@@ -3280,9 +3291,9 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
                 memset (&irte, 0, sizeof(irte));
 
                 irte.present = 1;
-                irte.dst_mode = INT_DEST_MODE;
+                irte.dst_mode = apic->irq_dest_mode;
                 irte.trigger_mode = 0; /* edge */
-                irte.dlvry_mode = INT_DELIVERY_MODE;
+                irte.dlvry_mode = apic->irq_delivery_mode;
                 irte.vector = cfg->vector;
                 irte.dest_id = IRTE_DEST(dest);
 
@@ -3300,10 +3311,10 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
                 msg->address_hi = MSI_ADDR_BASE_HI;
                 msg->address_lo =
                         MSI_ADDR_BASE_LO |
-                        ((INT_DEST_MODE == 0) ?
+                        ((apic->irq_dest_mode == 0) ?
                                 MSI_ADDR_DEST_MODE_PHYSICAL:
                                 MSI_ADDR_DEST_MODE_LOGICAL) |
-                        ((INT_DELIVERY_MODE != dest_LowestPrio) ?
+                        ((apic->irq_delivery_mode != dest_LowestPrio) ?
                                 MSI_ADDR_REDIRECTION_CPU:
                                 MSI_ADDR_REDIRECTION_LOWPRI) |
                         MSI_ADDR_DEST_ID(dest);
@@ -3311,7 +3322,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
                 msg->data =
                         MSI_DATA_TRIGGER_EDGE |
                         MSI_DATA_LEVEL_ASSERT |
-                        ((INT_DELIVERY_MODE != dest_LowestPrio) ?
+                        ((apic->irq_delivery_mode != dest_LowestPrio) ?
                                 MSI_DATA_DELIVERY_FIXED:
                                 MSI_DATA_DELIVERY_LOWPRI) |
                         MSI_DATA_VECTOR(cfg->vector);
@@ -3482,9 +3493,9 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
         sub_handle = 0;
         list_for_each_entry(msidesc, &dev->msi_list, list) {
                 irq = create_irq_nr(irq_want);
-                irq_want++;
                 if (irq == 0)
                         return -1;
+                irq_want = irq + 1;
 #ifdef CONFIG_INTR_REMAP
                 if (!intr_remapping_enabled)
                         goto no_ir;
@@ -3699,12 +3710,13 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
                 return -ENXIO;
 
         cfg = irq_cfg(irq);
-        err = assign_irq_vector(irq, cfg, TARGET_CPUS);
+        err = assign_irq_vector(irq, cfg, apic->target_cpus());
         if (!err) {
                 struct ht_irq_msg msg;
                 unsigned dest;
 
-                dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);
+                dest = apic->cpu_mask_to_apicid_and(cfg->domain,
+                                                    apic->target_cpus());
 
                 msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest);
 
@@ -3712,11 +3724,11 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
                         HT_IRQ_LOW_BASE |
                         HT_IRQ_LOW_DEST_ID(dest) |
                         HT_IRQ_LOW_VECTOR(cfg->vector) |
-                        ((INT_DEST_MODE == 0) ?
+                        ((apic->irq_dest_mode == 0) ?
                                 HT_IRQ_LOW_DM_PHYSICAL :
                                 HT_IRQ_LOW_DM_LOGICAL) |
                         HT_IRQ_LOW_RQEOI_EDGE |
-                        ((INT_DELIVERY_MODE != dest_LowestPrio) ?
+                        ((apic->irq_delivery_mode != dest_LowestPrio) ?
                                 HT_IRQ_LOW_MT_FIXED :
                                 HT_IRQ_LOW_MT_ARBITRATED) |
                         HT_IRQ_LOW_IRQ_MASKED;
@@ -3764,12 +3776,12 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
         BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
 
         entry->vector = cfg->vector;
-        entry->delivery_mode = INT_DELIVERY_MODE;
-        entry->dest_mode = INT_DEST_MODE;
+        entry->delivery_mode = apic->irq_delivery_mode;
+        entry->dest_mode = apic->irq_dest_mode;
         entry->polarity = 0;
         entry->trigger = 0;
         entry->mask = 0;
-        entry->dest = cpu_mask_to_apicid(eligible_cpu);
+        entry->dest = apic->cpu_mask_to_apicid(eligible_cpu);
 
         mmr_pnode = uv_blade_to_pnode(mmr_blade);
         uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);
@@ -3837,11 +3849,17 @@ int __init arch_probe_nr_irqs(void)
 {
         int nr;
 
-        nr = ((8 * nr_cpu_ids) > (32 * nr_ioapics) ?
-                (NR_VECTORS + (8 * nr_cpu_ids)) :
-                (NR_VECTORS + (32 * nr_ioapics)));
+        if (nr_irqs > (NR_VECTORS * nr_cpu_ids))
+                nr_irqs = NR_VECTORS * nr_cpu_ids;
 
-        if (nr < nr_irqs && nr > nr_irqs_gsi)
+        nr = nr_irqs_gsi + 8 * nr_cpu_ids;
+#if defined(CONFIG_PCI_MSI) || defined(CONFIG_HT_IRQ)
+        /*
+         * for MSI and HT dyn irq
+         */
+        nr += nr_irqs_gsi * 16;
+#endif
+        if (nr < nr_irqs)
                 nr_irqs = nr;
 
         return 0;
@@ -3873,7 +3891,7 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id)
          */
 
         if (physids_empty(apic_id_map))
-                apic_id_map = ioapic_phys_id_map(phys_cpu_present_map);
+                apic_id_map = apic->ioapic_phys_id_map(phys_cpu_present_map);
 
         spin_lock_irqsave(&ioapic_lock, flags);
         reg_00.raw = io_apic_read(ioapic, 0);
@@ -3889,10 +3907,10 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id)
          * Every APIC in a system must have a unique ID or we get lots of nice
          * 'stuck on smp_invalidate_needed IPI wait' messages.
          */
-        if (check_apicid_used(apic_id_map, apic_id)) {
+        if (apic->check_apicid_used(apic_id_map, apic_id)) {
 
                 for (i = 0; i < get_physical_broadcast(); i++) {
-                        if (!check_apicid_used(apic_id_map, i))
+                        if (!apic->check_apicid_used(apic_id_map, i))
                                 break;
                 }
 
@@ -3905,7 +3923,7 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id)
                 apic_id = i;
         }
 
-        tmp = apicid_to_cpu_present(apic_id);
+        tmp = apic->apicid_to_cpu_present(apic_id);
         physids_or(apic_id_map, apic_id_map, tmp);
 
         if (reg_00.bits.ID != apic_id) {
@@ -3998,7 +4016,7 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity)
 /*
  * This function currently is only a helper for the i386 smp boot process where
  * we need to reprogram the ioredtbls to cater for the cpus which have come online
- * so mask in all cases should simply be TARGET_CPUS
+ * so mask in all cases should simply be apic->target_cpus()
  */
 #ifdef CONFIG_SMP
 void __init setup_ioapic_dest(void)
@@ -4039,7 +4057,7 @@ void __init setup_ioapic_dest(void)
                             (IRQ_NO_BALANCING | IRQ_AFFINITY_SET))
                                 mask = desc->affinity;
                         else
-                                mask = TARGET_CPUS;
+                                mask = apic->target_cpus();
 
 #ifdef CONFIG_INTR_REMAP
                         if (intr_remapping_enabled)
diff --git a/arch/x86/kernel/ipi.c b/arch/x86/kernel/ipi.c
index 285bbf8831fa..dbf5445727a9 100644
--- a/arch/x86/kernel/ipi.c
+++ b/arch/x86/kernel/ipi.c
@@ -17,147 +17,121 @@
 #include <asm/mmu_context.h>
 #include <asm/apic.h>
 #include <asm/proto.h>
+#include <asm/ipi.h>
 
-#ifdef CONFIG_X86_32
-#include <mach_apic.h>
-#include <mach_ipi.h>
-
-/*
- * the following functions deal with sending IPIs between CPUs.
- *
- * We use 'broadcast', CPU->CPU IPIs and self-IPIs too.
- */
-
-static inline int __prepare_ICR(unsigned int shortcut, int vector)
+void default_send_IPI_mask_sequence_phys(const struct cpumask *mask, int vector)
 {
-        unsigned int icr = shortcut | APIC_DEST_LOGICAL;
-
-        switch (vector) {
-        default:
-                icr |= APIC_DM_FIXED | vector;
-                break;
-        case NMI_VECTOR:
-                icr |= APIC_DM_NMI;
-                break;
+        unsigned long query_cpu;
+        unsigned long flags;
+
+        /*
+         * Hack. The clustered APIC addressing mode doesn't allow us to send
+         * to an arbitrary mask, so I do a unicast to each CPU instead.
+         * - mbligh
+         */
+        local_irq_save(flags);
+        for_each_cpu(query_cpu, mask) {
+                __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid,
+                                query_cpu), vector, APIC_DEST_PHYSICAL);
         }
-        return icr;
+        local_irq_restore(flags);
 }
 
-static inline int __prepare_ICR2(unsigned int mask)
+void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
+                                                 int vector)
 {
-        return SET_APIC_DEST_FIELD(mask);
-}
+        unsigned int this_cpu = smp_processor_id();
+        unsigned int query_cpu;
+        unsigned long flags;
 
-void __send_IPI_shortcut(unsigned int shortcut, int vector)
-{
-        /*
-         * Subtle. In the case of the 'never do double writes' workaround
-         * we have to lock out interrupts to be safe.  As we don't care
-         * of the value read we use an atomic rmw access to avoid costly
-         * cli/sti.  Otherwise we use an even cheaper single atomic write
-         * to the APIC.
-         */
-        unsigned int cfg;
+        /* See Hack comment above */
 
-        /*
-         * Wait for idle.
-         */
-        apic_wait_icr_idle();
+        local_irq_save(flags);
+        for_each_cpu(query_cpu, mask) {
+                if (query_cpu == this_cpu)
+                        continue;
+                __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid,
+                                 query_cpu), vector, APIC_DEST_PHYSICAL);
+        }
+        local_irq_restore(flags);
+}
 
-        /*
-         * No need to touch the target chip field
-         */
-        cfg = __prepare_ICR(shortcut, vector);
+void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
+                                                 int vector)
+{
+        unsigned long flags;
+        unsigned int query_cpu;
 
         /*
-         * Send the IPI. The write to APIC_ICR fires this off.
+         * Hack. The clustered APIC addressing mode doesn't allow us to send
+         * to an arbitrary mask, so I do a unicasts to each CPU instead. This
+         * should be modified to do 1 message per cluster ID - mbligh
          */
-        apic_write(APIC_ICR, cfg);
-}
 
-void send_IPI_self(int vector)
-{
-        __send_IPI_shortcut(APIC_DEST_SELF, vector);
+        local_irq_save(flags);
+        for_each_cpu(query_cpu, mask)
+                __default_send_IPI_dest_field(
+                        apic->cpu_to_logical_apicid(query_cpu), vector,
+                        apic->dest_logical);
+        local_irq_restore(flags);
 }
 
-/*
- * This is used to send an IPI with no shorthand notation (the destination is
- * specified in bits 56 to 63 of the ICR).
- */
-static inline void __send_IPI_dest_field(unsigned long mask, int vector)
+void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask,
+                                                 int vector)
 {
-        unsigned long cfg;
-
-        /*
-         * Wait for idle.
-         */
-        if (unlikely(vector == NMI_VECTOR))
-                safe_apic_wait_icr_idle();
-        else
-                apic_wait_icr_idle();
-
-        /*
-         * prepare target chip field
-         */
-        cfg = __prepare_ICR2(mask);
-        apic_write(APIC_ICR2, cfg);
+        unsigned long flags;
+        unsigned int query_cpu;
+        unsigned int this_cpu = smp_processor_id();
 
-        /*
-         * program the ICR
-         */
-        cfg = __prepare_ICR(0, vector);
+        /* See Hack comment above */
 
-        /*
-         * Send the IPI. The write to APIC_ICR fires this off.
-         */
-        apic_write(APIC_ICR, cfg);
+        local_irq_save(flags);
+        for_each_cpu(query_cpu, mask) {
+                if (query_cpu == this_cpu)
+                        continue;
+                __default_send_IPI_dest_field(
+                        apic->cpu_to_logical_apicid(query_cpu), vector,
+                        apic->dest_logical);
+                }
+        local_irq_restore(flags);
 }
 
+#ifdef CONFIG_X86_32
+
 /*
  * This is only used on smaller machines.
  */
-void send_IPI_mask_bitmask(const struct cpumask *cpumask, int vector)
+void default_send_IPI_mask_logical(const struct cpumask *cpumask, int vector)
 {
         unsigned long mask = cpumask_bits(cpumask)[0];
         unsigned long flags;
 
         local_irq_save(flags);
         WARN_ON(mask & ~cpumask_bits(cpu_online_mask)[0]);
-        __send_IPI_dest_field(mask, vector);
+        __default_send_IPI_dest_field(mask, vector, apic->dest_logical);
         local_irq_restore(flags);
 }
 
-void send_IPI_mask_sequence(const struct cpumask *mask, int vector)
+void default_send_IPI_allbutself(int vector)
 {
-        unsigned long flags;
-        unsigned int query_cpu;
-
         /*
-         * Hack. The clustered APIC addressing mode doesn't allow us to send
-         * to an arbitrary mask, so I do a unicasts to each CPU instead. This
-         * should be modified to do 1 message per cluster ID - mbligh
+         * if there are no other CPUs in the system then we get an APIC send
+         * error if we try to broadcast, thus avoid sending IPIs in this case.
          */
+        if (!(num_online_cpus() > 1))
+                return;
 
-        local_irq_save(flags);
-        for_each_cpu(query_cpu, mask)
-                __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu), vector);
-        local_irq_restore(flags);
+        __default_local_send_IPI_allbutself(vector);
 }
 
-void send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
+void default_send_IPI_all(int vector)
 {
-        unsigned long flags;
-        unsigned int query_cpu;
-        unsigned int this_cpu = smp_processor_id();
-
-        /* See Hack comment above */
+        __default_local_send_IPI_all(vector);
+}
 
-        local_irq_save(flags);
-        for_each_cpu(query_cpu, mask)
-                if (query_cpu != this_cpu)
-                        __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu),
-                                              vector);
-        local_irq_restore(flags);
+void default_send_IPI_self(int vector)
+{
+        __default_send_IPI_shortcut(APIC_DEST_SELF, vector, apic->dest_logical);
 }
 
 /* must come after the send_IPI functions above for inlining */
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 8b30d0c2512c..f13ca1650aaf 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -6,10 +6,12 @@
 #include <linux/kernel_stat.h>
 #include <linux/seq_file.h>
 #include <linux/smp.h>
+#include <linux/ftrace.h>
 
 #include <asm/apic.h>
 #include <asm/io_apic.h>
 #include <asm/irq.h>
+#include <asm/idle.h>
 
 atomic_t irq_err_count;
 
@@ -188,4 +190,40 @@ u64 arch_irq_stat(void)
         return sum;
 }
 
+
+/*
+ * do_IRQ handles all normal device IRQ's (the special
+ * SMP cross-CPU interrupts have their own specific
+ * handlers).
+ */
+unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
+{
+        struct pt_regs *old_regs = set_irq_regs(regs);
+
+        /* high bit used in ret_from_ code  */
+        unsigned vector = ~regs->orig_ax;
+        unsigned irq;
+
+        exit_idle();
+        irq_enter();
+
+        irq = __get_cpu_var(vector_irq)[vector];
+
+        if (!handle_irq(irq, regs)) {
+#ifdef CONFIG_X86_64
+                if (!disable_apic)
+                        ack_APIC_irq();
+#endif
+
+                if (printk_ratelimit())
+                        printk(KERN_EMERG "%s: %d.%d No irq handler for vector (irq %d)\n",
+                               __func__, smp_processor_id(), vector, irq);
+        }
+
+        irq_exit();
+
+        set_irq_regs(old_regs);
+        return 1;
+}
+
 EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index e0f29be8ab0b..4beb9a13873d 100644
--- a/arch/x86/kernel/irq_32.c
+++ b/arch/x86/kernel/irq_32.c
@@ -191,33 +191,16 @@ static inline int
 execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq) { return 0; }
 #endif
 
-/*
- * do_IRQ handles all normal device IRQ's (the special
- * SMP cross-CPU interrupts have their own specific
- * handlers).
- */
-unsigned int do_IRQ(struct pt_regs *regs)
+bool handle_irq(unsigned irq, struct pt_regs *regs)
 {
-        struct pt_regs *old_regs;
-        /* high bit used in ret_from_ code */
-        int overflow;
-        unsigned vector = ~regs->orig_ax;
         struct irq_desc *desc;
-        unsigned irq;
-
-
-        old_regs = set_irq_regs(regs);
-        irq_enter();
-        irq = __get_cpu_var(vector_irq)[vector];
+        int overflow;
 
         overflow = check_stack_overflow();
 
         desc = irq_to_desc(irq);
-        if (unlikely(!desc)) {
-                printk(KERN_EMERG "%s: cannot handle IRQ %d vector %#x cpu %d\n",
-                                        __func__, irq, vector, smp_processor_id());
-                BUG();
-        }
+        if (unlikely(!desc))
+                return false;
 
         if (!execute_on_irq_stack(overflow, desc, irq)) {
                 if (unlikely(overflow))
@@ -225,13 +208,11 @@ unsigned int do_IRQ(struct pt_regs *regs)
                 desc->handle_irq(irq, desc);
         }
 
-        irq_exit();
-        set_irq_regs(old_regs);
-        return 1;
+        return true;
 }
 
 #ifdef CONFIG_HOTPLUG_CPU
-#include <mach_apic.h>
+#include <asm/genapic.h>
 
 /* A cpu has been removed from cpu_online_mask.  Reset irq affinities. */
 void fixup_irqs(void)
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index 018963aa6ee3..977d8b43a0dd 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -48,42 +48,18 @@ static inline void stack_overflow_check(struct pt_regs *regs)
 #endif
 }
 
-/*
- * do_IRQ handles all normal device IRQ's (the special
- * SMP cross-CPU interrupts have their own specific
- * handlers).
- */
-asmlinkage unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
+bool handle_irq(unsigned irq, struct pt_regs *regs)
 {
-        struct pt_regs *old_regs = set_irq_regs(regs);
         struct irq_desc *desc;
 
-        /* high bit used in ret_from_ code  */
-        unsigned vector = ~regs->orig_ax;
-        unsigned irq;
-
-        exit_idle();
-        irq_enter();
-        irq = __get_cpu_var(vector_irq)[vector];
-
         stack_overflow_check(regs);
 
         desc = irq_to_desc(irq);
-        if (likely(desc))
-                generic_handle_irq_desc(irq, desc);
-        else {
-                if (!disable_apic)
-                        ack_APIC_irq();
-
-                if (printk_ratelimit())
-                        printk(KERN_EMERG "%s: %d.%d No irq handler for vector\n",
-                                __func__, smp_processor_id(), vector);
-        }
-
-        irq_exit();
+        if (unlikely(!desc))
+                return false;
 
-        set_irq_regs(old_regs);
-        return 1;
+        generic_handle_irq_desc(irq, desc);
+        return true;
 }
 
 #ifdef CONFIG_HOTPLUG_CPU
diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c
index 22608ebf831b..bf629cadec1a 100644
--- a/arch/x86/kernel/irqinit_32.c
+++ b/arch/x86/kernel/irqinit_32.c
@@ -78,6 +78,15 @@ void __init init_ISA_irqs(void)
         }
 }
 
+/*
+ * IRQ2 is cascade interrupt to second interrupt controller
+ */
+static struct irqaction irq2 = {
+        .handler = no_action,
+        .mask = CPU_MASK_NONE,
+        .name = "cascade",
+};
+
 DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
         [0 ... IRQ0_VECTOR - 1] = -1,
         [IRQ0_VECTOR] = 0,
@@ -176,6 +185,9 @@ void __init native_init_IRQ(void)
         alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
 #endif
 
+        if (!acpi_ioapic)
+                setup_irq(2, &irq2);
+
         /* setup after call gates are initialised (usually add in
          * the architecture specific gates)
          */
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index 10435a120d22..5c4f55483849 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -46,7 +46,7 @@
 #include <asm/apicdef.h>
 #include <asm/system.h>
 
-#include <mach_ipi.h>
+#include <asm/genapic.h>
 
 /*
  * Put the error code here just in case the user cares:
@@ -347,7 +347,7 @@ void kgdb_post_primary_code(struct pt_regs *regs, int e_vector, int err_code)
  */
 void kgdb_roundup_cpus(unsigned long flags)
 {
-        send_IPI_allbutself(APIC_DM_NMI);
+        apic->send_IPI_allbutself(APIC_DM_NMI);
 }
 #endif
 
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index fa6bb263892e..200764453195 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -3,7 +3,7 @@
  *      compliant MP-table parsing routines.
  *
  *      (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
- *      (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
+ *      (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
  *      (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
  */
 
@@ -29,12 +29,7 @@
 #include <asm/setup.h>
 #include <asm/smp.h>
 
-#include <mach_apic.h>
-#ifdef CONFIG_X86_32
-#include <mach_apicdef.h>
-#include <mach_mpparse.h>
-#endif
-
+#include <asm/genapic.h>
 /*
  * Checksum an MP configuration block.
  */
@@ -292,16 +287,7 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
                 return 0;
 
 #ifdef CONFIG_X86_32
-        /*
-         * need to make sure summit and es7000's mps_oem_check is safe to be
-         * called early via genericarch 's mps_oem_check
-         */
-        if (early) {
-#ifdef CONFIG_X86_NUMAQ
-                numaq_mps_oem_check(mpc, oem, str);
-#endif
-        } else
-                mps_oem_check(mpc, oem, str);
+        generic_mps_oem_check(mpc, oem, str);
 #endif
         /* save the local APIC address, it might be non-default */
         if (!acpi_lapic)
@@ -386,13 +372,13 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
                         (*x86_quirks->mpc_record)++;
         }
 
-#ifdef CONFIG_X86_GENERICARCH
-       generic_bigsmp_probe();
+#ifdef CONFIG_X86_BIGSMP
+        generic_bigsmp_probe();
 #endif
 
-#ifdef CONFIG_X86_32
-        setup_apic_routing();
-#endif
+        if (apic->setup_apic_routing)
+                apic->setup_apic_routing();
+
         if (!num_processors)
                 printk(KERN_ERR "MPTABLE: no processors registered!\n");
         return num_processors;
@@ -706,8 +692,8 @@ static int __init smp_scan_config(unsigned long base, unsigned long length,
 #endif
                         mpf_found = mpf;
 
-                        printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
-                               mpf, virt_to_phys(mpf));
+                        printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
+                               mpf, (u64)virt_to_phys(mpf));
 
                         if (!reserve)
                                 return 1;
@@ -1025,7 +1011,7 @@ static int __init update_mp_table(void)
         if (!smp_check_mpc(mpc, oem, str))
                 return 0;
 
-        printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf));
+        printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf));
         printk(KERN_INFO "physptr: %x\n", mpf->physptr);
 
         if (mpc_new_phys && mpc->length > mpc_new_length) {
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c
index 23b6d9e6e4f5..bdfad80c3cf1 100644
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/nmi.c
@@ -34,7 +34,7 @@
 
 #include <asm/mce.h>
 
-#include <mach_traps.h>
+#include <asm/mach_traps.h>
 
 int unknown_nmi_panic;
 int nmi_watchdog_enabled;
diff --git a/arch/x86/kernel/numaq_32.c b/arch/x86/kernel/numaq_32.c
index f2191d4f2717..0cc41a1d2550 100644
--- a/arch/x86/kernel/numaq_32.c
+++ b/arch/x86/kernel/numaq_32.c
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 2002, IBM Corp.
  *
- * All rights reserved.          
+ * All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -23,17 +23,18 @@
  * Send feedback to <gone@us.ibm.com>
  */
 
-#include <linux/mm.h>
+#include <linux/nodemask.h>
 #include <linux/bootmem.h>
 #include <linux/mmzone.h>
 #include <linux/module.h>
-#include <linux/nodemask.h>
-#include <asm/numaq.h>
-#include <asm/topology.h>
+#include <linux/mm.h>
+
 #include <asm/processor.h>
+#include <asm/topology.h>
 #include <asm/genapic.h>
-#include <asm/e820.h>
+#include <asm/numaq.h>
 #include <asm/setup.h>
+#include <asm/e820.h>
 
 #define MB_TO_PAGES(addr) ((addr) << (20 - PAGE_SHIFT))
 
@@ -91,19 +92,20 @@ static int __init numaq_pre_time_init(void)
 }
 
 int found_numaq;
+
 /*
  * Have to match translation table entries to main table entries by counter
  * hence the mpc_record variable .... can't see a less disgusting way of
  * doing this ....
  */
 struct mpc_config_translation {
-        unsigned char mpc_type;
-        unsigned char trans_len;
-        unsigned char trans_type;
-        unsigned char trans_quad;
-        unsigned char trans_global;
-        unsigned char trans_local;
-        unsigned short trans_reserved;
+        unsigned char           mpc_type;
+        unsigned char           trans_len;
+        unsigned char           trans_type;
+        unsigned char           trans_quad;
+        unsigned char           trans_global;
+        unsigned char           trans_local;
+        unsigned short          trans_reserved;
 };
 
 /* x86_quirks member */
@@ -236,7 +238,7 @@ static int __init numaq_setup_ioapic_ids(void)
 
 static int __init numaq_update_genapic(void)
 {
-        genapic->wakeup_cpu = wakeup_secondary_cpu_via_nmi;
+        apic->wakeup_cpu = wakeup_secondary_cpu_via_nmi;
 
         return 0;
 }
@@ -291,3 +293,280 @@ int __init get_memcfg_numaq(void)
         smp_dump_qct();
         return 1;
 }
+
+/*
+ * APIC driver for the IBM NUMAQ chipset.
+ */
+#define APIC_DEFINITION 1
+#include <linux/threads.h>
+#include <linux/cpumask.h>
+#include <asm/mpspec.h>
+#include <asm/genapic.h>
+#include <asm/fixmap.h>
+#include <asm/apicdef.h>
+#include <asm/ipi.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/numa.h>
+#include <linux/smp.h>
+#include <asm/numaq.h>
+#include <asm/io.h>
+#include <linux/mmzone.h>
+#include <linux/nodemask.h>
+
+#define NUMAQ_APIC_DFR_VALUE    (APIC_DFR_CLUSTER)
+
+static inline unsigned int numaq_get_apic_id(unsigned long x)
+{
+        return (x >> 24) & 0x0F;
+}
+
+static inline void numaq_send_IPI_mask(const struct cpumask *mask, int vector)
+{
+        default_send_IPI_mask_sequence_logical(mask, vector);
+}
+
+static inline void numaq_send_IPI_allbutself(int vector)
+{
+        default_send_IPI_mask_allbutself_logical(cpu_online_mask, vector);
+}
+
+static inline void numaq_send_IPI_all(int vector)
+{
+        numaq_send_IPI_mask(cpu_online_mask, vector);
+}
+
+extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
+
+#define NUMAQ_TRAMPOLINE_PHYS_LOW (0x8)
+#define NUMAQ_TRAMPOLINE_PHYS_HIGH (0xa)
+
+/*
+ * Because we use NMIs rather than the INIT-STARTUP sequence to
+ * bootstrap the CPUs, the APIC may be in a weird state. Kick it:
+ */
+static inline void numaq_smp_callin_clear_local_apic(void)
+{
+        clear_local_APIC();
+}
+
+static inline void
+numaq_store_NMI_vector(unsigned short *high, unsigned short *low)
+{
+        printk("Storing NMI vector\n");
+        *high =
+          *((volatile unsigned short *)phys_to_virt(NUMAQ_TRAMPOLINE_PHYS_HIGH));
+        *low =
+          *((volatile unsigned short *)phys_to_virt(NUMAQ_TRAMPOLINE_PHYS_LOW));
+}
+
+static inline const cpumask_t *numaq_target_cpus(void)
+{
+        return &CPU_MASK_ALL;
+}
+
+static inline unsigned long
+numaq_check_apicid_used(physid_mask_t bitmap, int apicid)
+{
+        return physid_isset(apicid, bitmap);
+}
+
+static inline unsigned long numaq_check_apicid_present(int bit)
+{
+        return physid_isset(bit, phys_cpu_present_map);
+}
+
+#define apicid_cluster(apicid) (apicid & 0xF0)
+
+static inline int numaq_apic_id_registered(void)
+{
+        return 1;
+}
+
+static inline void numaq_init_apic_ldr(void)
+{
+        /* Already done in NUMA-Q firmware */
+}
+
+static inline void numaq_setup_apic_routing(void)
+{
+        printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
+                "NUMA-Q", nr_ioapics);
+}
+
+/*
+ * Skip adding the timer int on secondary nodes, which causes
+ * a small but painful rift in the time-space continuum.
+ */
+static inline int numaq_multi_timer_check(int apic, int irq)
+{
+        return apic != 0 && irq == 0;
+}
+
+static inline physid_mask_t numaq_ioapic_phys_id_map(physid_mask_t phys_map)
+{
+        /* We don't have a good way to do this yet - hack */
+        return physids_promote(0xFUL);
+}
+
+/* Mapping from cpu number to logical apicid */
+extern u8 cpu_2_logical_apicid[];
+
+static inline int numaq_cpu_to_logical_apicid(int cpu)
+{
+        if (cpu >= nr_cpu_ids)
+                return BAD_APICID;
+        return (int)cpu_2_logical_apicid[cpu];
+}
+
+/*
+ * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
+ * cpu to APIC ID relation to properly interact with the intelligent
+ * mode of the cluster controller.
+ */
+static inline int numaq_cpu_present_to_apicid(int mps_cpu)
+{
+        if (mps_cpu < 60)
+                return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
+        else
+                return BAD_APICID;
+}
+
+static inline int numaq_apicid_to_node(int logical_apicid) 
+{
+        return logical_apicid >> 4;
+}
+
+static inline physid_mask_t numaq_apicid_to_cpu_present(int logical_apicid)
+{
+        int node = numaq_apicid_to_node(logical_apicid);
+        int cpu = __ffs(logical_apicid & 0xf);
+
+        return physid_mask_of_physid(cpu + 4*node);
+}
+
+/* Where the IO area was mapped on multiquad, always 0 otherwise */
+void *xquad_portio;
+
+static inline int numaq_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+        return 1;
+}
+
+/*
+ * We use physical apicids here, not logical, so just return the default
+ * physical broadcast to stop people from breaking us
+ */
+static inline unsigned int numaq_cpu_mask_to_apicid(const cpumask_t *cpumask)
+{
+        return 0x0F;
+}
+
+static inline unsigned int
+numaq_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                             const struct cpumask *andmask)
+{
+        return 0x0F;
+}
+
+/* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
+static inline int numaq_phys_pkg_id(int cpuid_apic, int index_msb)
+{
+        return cpuid_apic >> index_msb;
+}
+static int __numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
+{
+        numaq_mps_oem_check(mpc, oem, productid);
+        return found_numaq;
+}
+
+static int probe_numaq(void)
+{
+        /* already know from get_memcfg_numaq() */
+        return found_numaq;
+}
+
+static void numaq_vector_allocation_domain(int cpu, cpumask_t *retmask)
+{
+        /* Careful. Some cpus do not strictly honor the set of cpus
+         * specified in the interrupt destination when using lowest
+         * priority interrupt delivery mode.
+         *
+         * In particular there was a hyperthreading cpu observed to
+         * deliver interrupts to the wrong hyperthread when only one
+         * hyperthread was specified in the interrupt desitination.
+         */
+        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
+}
+
+static void numaq_setup_portio_remap(void)
+{
+        int num_quads = num_online_nodes();
+
+        if (num_quads <= 1)
+                return;
+
+        printk("Remapping cross-quad port I/O for %d quads\n", num_quads);
+        xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
+        printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
+                (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
+}
+
+struct genapic apic_numaq = {
+
+        .name                           = "NUMAQ",
+        .probe                          = probe_numaq,
+        .acpi_madt_oem_check            = NULL,
+        .apic_id_registered             = numaq_apic_id_registered,
+
+        .irq_delivery_mode              = dest_LowestPrio,
+        /* physical delivery on LOCAL quad: */
+        .irq_dest_mode                  = 0,
+
+        .target_cpus                    = numaq_target_cpus,
+        .disable_esr                    = 1,
+        .dest_logical                   = APIC_DEST_LOGICAL,
+        .check_apicid_used              = numaq_check_apicid_used,
+        .check_apicid_present           = numaq_check_apicid_present,
+
+        .vector_allocation_domain       = numaq_vector_allocation_domain,
+        .init_apic_ldr                  = numaq_init_apic_ldr,
+
+        .ioapic_phys_id_map             = numaq_ioapic_phys_id_map,
+        .setup_apic_routing             = numaq_setup_apic_routing,
+        .multi_timer_check              = numaq_multi_timer_check,
+        .apicid_to_node                 = numaq_apicid_to_node,
+        .cpu_to_logical_apicid          = numaq_cpu_to_logical_apicid,
+        .cpu_present_to_apicid          = numaq_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = numaq_apicid_to_cpu_present,
+        .setup_portio_remap             = numaq_setup_portio_remap,
+        .check_phys_apicid_present      = numaq_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = numaq_phys_pkg_id,
+        .mps_oem_check                  = __numaq_mps_oem_check,
+
+        .get_apic_id                    = numaq_get_apic_id,
+        .set_apic_id                    = NULL,
+        .apic_id_mask                   = 0x0F << 24,
+
+        .cpu_mask_to_apicid             = numaq_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = numaq_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = numaq_send_IPI_mask,
+        .send_IPI_mask_allbutself       = NULL,
+        .send_IPI_allbutself            = numaq_send_IPI_allbutself,
+        .send_IPI_all                   = numaq_send_IPI_all,
+        .send_IPI_self                  = default_send_IPI_self,
+
+        .wakeup_cpu                     = NULL,
+        .trampoline_phys_low            = NUMAQ_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = NUMAQ_TRAMPOLINE_PHYS_HIGH,
+
+        /* We don't do anything here because we use NMI's to boot instead */
+        .wait_for_init_deassert         = NULL,
+
+        .smp_callin_clear_local_apic    = numaq_smp_callin_clear_local_apic,
+        .store_NMI_vector               = numaq_store_NMI_vector,
+        .inquire_remote_apic            = NULL,
+};
diff --git a/arch/x86/kernel/probe_32.c b/arch/x86/kernel/probe_32.c
new file mode 100644
index 000000000000..22337b75de62
--- /dev/null
+++ b/arch/x86/kernel/probe_32.c
@@ -0,0 +1,411 @@
+/*
+ * Default generic APIC driver. This handles up to 8 CPUs.
+ *
+ * Copyright 2003 Andi Kleen, SuSE Labs.
+ * Subject to the GNU Public License, v.2
+ *
+ * Generic x86 APIC driver probe layer.
+ */
+#include <linux/threads.h>
+#include <linux/cpumask.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/ctype.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <asm/fixmap.h>
+#include <asm/mpspec.h>
+#include <asm/apicdef.h>
+#include <asm/genapic.h>
+#include <asm/setup.h>
+
+#include <linux/threads.h>
+#include <linux/cpumask.h>
+#include <asm/mpspec.h>
+#include <asm/genapic.h>
+#include <asm/fixmap.h>
+#include <asm/apicdef.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/smp.h>
+#include <linux/init.h>
+#include <asm/genapic.h>
+#include <asm/ipi.h>
+
+#include <linux/smp.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <asm/acpi.h>
+#include <asm/arch_hooks.h>
+#include <asm/e820.h>
+#include <asm/setup.h>
+
+#include <asm/genapic.h>
+
+#ifdef CONFIG_HOTPLUG_CPU
+#define DEFAULT_SEND_IPI        (1)
+#else
+#define DEFAULT_SEND_IPI        (0)
+#endif
+
+int no_broadcast = DEFAULT_SEND_IPI;
+
+#ifdef CONFIG_X86_LOCAL_APIC
+
+static void default_vector_allocation_domain(int cpu, struct cpumask *retmask)
+{
+        /*
+         * Careful. Some cpus do not strictly honor the set of cpus
+         * specified in the interrupt destination when using lowest
+         * priority interrupt delivery mode.
+         *
+         * In particular there was a hyperthreading cpu observed to
+         * deliver interrupts to the wrong hyperthread when only one
+         * hyperthread was specified in the interrupt desitination.
+         */
+        *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
+}
+
+/* should be called last. */
+static int probe_default(void)
+{
+        return 1;
+}
+
+struct genapic apic_default = {
+
+        .name                           = "default",
+        .probe                          = probe_default,
+        .acpi_madt_oem_check            = NULL,
+        .apic_id_registered             = default_apic_id_registered,
+
+        .irq_delivery_mode              = dest_LowestPrio,
+        /* logical delivery broadcast to all CPUs: */
+        .irq_dest_mode                  = 1,
+
+        .target_cpus                    = default_target_cpus,
+        .disable_esr                    = 0,
+        .dest_logical                   = APIC_DEST_LOGICAL,
+        .check_apicid_used              = default_check_apicid_used,
+        .check_apicid_present           = default_check_apicid_present,
+
+        .vector_allocation_domain       = default_vector_allocation_domain,
+        .init_apic_ldr                  = default_init_apic_ldr,
+
+        .ioapic_phys_id_map             = default_ioapic_phys_id_map,
+        .setup_apic_routing             = default_setup_apic_routing,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = default_apicid_to_node,
+        .cpu_to_logical_apicid          = default_cpu_to_logical_apicid,
+        .cpu_present_to_apicid          = default_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = default_apicid_to_cpu_present,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = default_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = default_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = default_get_apic_id,
+        .set_apic_id                    = NULL,
+        .apic_id_mask                   = 0x0F << 24,
+
+        .cpu_mask_to_apicid             = default_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = default_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = default_send_IPI_mask_logical,
+        .send_IPI_mask_allbutself       = default_send_IPI_mask_allbutself_logical,
+        .send_IPI_allbutself            = default_send_IPI_allbutself,
+        .send_IPI_all                   = default_send_IPI_all,
+        .send_IPI_self                  = default_send_IPI_self,
+
+        .wakeup_cpu                     = NULL,
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+
+        .wait_for_init_deassert         = default_wait_for_init_deassert,
+
+        .smp_callin_clear_local_apic    = NULL,
+        .store_NMI_vector               = NULL,
+        .inquire_remote_apic            = default_inquire_remote_apic,
+};
+
+extern struct genapic apic_numaq;
+extern struct genapic apic_summit;
+extern struct genapic apic_bigsmp;
+extern struct genapic apic_es7000;
+extern struct genapic apic_default;
+
+struct genapic *apic = &apic_default;
+
+static struct genapic *apic_probe[] __initdata = {
+#ifdef CONFIG_X86_NUMAQ
+        &apic_numaq,
+#endif
+#ifdef CONFIG_X86_SUMMIT
+        &apic_summit,
+#endif
+#ifdef CONFIG_X86_BIGSMP
+        &apic_bigsmp,
+#endif
+#ifdef CONFIG_X86_ES7000
+        &apic_es7000,
+#endif
+        &apic_default,  /* must be last */
+        NULL,
+};
+
+static int cmdline_apic __initdata;
+static int __init parse_apic(char *arg)
+{
+        int i;
+
+        if (!arg)
+                return -EINVAL;
+
+        for (i = 0; apic_probe[i]; i++) {
+                if (!strcmp(apic_probe[i]->name, arg)) {
+                        apic = apic_probe[i];
+                        cmdline_apic = 1;
+                        return 0;
+                }
+        }
+
+        if (x86_quirks->update_genapic)
+                x86_quirks->update_genapic();
+
+        /* Parsed again by __setup for debug/verbose */
+        return 0;
+}
+early_param("apic", parse_apic);
+
+void __init generic_bigsmp_probe(void)
+{
+#ifdef CONFIG_X86_BIGSMP
+        /*
+         * This routine is used to switch to bigsmp mode when
+         * - There is no apic= option specified by the user
+         * - generic_apic_probe() has chosen apic_default as the sub_arch
+         * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support
+         */
+
+        if (!cmdline_apic && apic == &apic_default) {
+                if (apic_bigsmp.probe()) {
+                        apic = &apic_bigsmp;
+                        if (x86_quirks->update_genapic)
+                                x86_quirks->update_genapic();
+                        printk(KERN_INFO "Overriding APIC driver with %s\n",
+                               apic->name);
+                }
+        }
+#endif
+}
+
+void __init generic_apic_probe(void)
+{
+        if (!cmdline_apic) {
+                int i;
+                for (i = 0; apic_probe[i]; i++) {
+                        if (apic_probe[i]->probe()) {
+                                apic = apic_probe[i];
+                                break;
+                        }
+                }
+                /* Not visible without early console */
+                if (!apic_probe[i])
+                        panic("Didn't find an APIC driver");
+
+                if (x86_quirks->update_genapic)
+                        x86_quirks->update_genapic();
+        }
+        printk(KERN_INFO "Using APIC driver %s\n", apic->name);
+}
+
+/* These functions can switch the APIC even after the initial ->probe() */
+
+int __init
+generic_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
+{
+        int i;
+
+        for (i = 0; apic_probe[i]; ++i) {
+                if (!apic_probe[i]->mps_oem_check)
+                        continue;
+                if (!apic_probe[i]->mps_oem_check(mpc, oem, productid))
+                        continue;
+
+                if (!cmdline_apic) {
+                        apic = apic_probe[i];
+                        if (x86_quirks->update_genapic)
+                                x86_quirks->update_genapic();
+                        printk(KERN_INFO "Switched to APIC driver `%s'.\n",
+                               apic->name);
+                }
+                return 1;
+        }
+        return 0;
+}
+
+int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
+{
+        int i;
+
+        for (i = 0; apic_probe[i]; ++i) {
+                if (!apic_probe[i]->acpi_madt_oem_check)
+                        continue;
+                if (!apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id))
+                        continue;
+
+                if (!cmdline_apic) {
+                        apic = apic_probe[i];
+                        if (x86_quirks->update_genapic)
+                                x86_quirks->update_genapic();
+                        printk(KERN_INFO "Switched to APIC driver `%s'.\n",
+                               apic->name);
+                }
+                return 1;
+        }
+        return 0;
+}
+
+#endif /* CONFIG_X86_LOCAL_APIC */
+
+/**
+ * pre_intr_init_hook - initialisation prior to setting up interrupt vectors
+ *
+ * Description:
+ *      Perform any necessary interrupt initialisation prior to setting up
+ *      the "ordinary" interrupt call gates.  For legacy reasons, the ISA
+ *      interrupts should be initialised here if the machine emulates a PC
+ *      in any way.
+ **/
+void __init pre_intr_init_hook(void)
+{
+        if (x86_quirks->arch_pre_intr_init) {
+                if (x86_quirks->arch_pre_intr_init())
+                        return;
+        }
+        init_ISA_irqs();
+}
+
+/**
+ * intr_init_hook - post gate setup interrupt initialisation
+ *
+ * Description:
+ *      Fill in any interrupts that may have been left out by the general
+ *      init_IRQ() routine.  interrupts having to do with the machine rather
+ *      than the devices on the I/O bus (like APIC interrupts in intel MP
+ *      systems) are started here.
+ **/
+void __init intr_init_hook(void)
+{
+        if (x86_quirks->arch_intr_init) {
+                if (x86_quirks->arch_intr_init())
+                        return;
+        }
+}
+
+/**
+ * pre_setup_arch_hook - hook called prior to any setup_arch() execution
+ *
+ * Description:
+ *      generally used to activate any machine specific identification
+ *      routines that may be needed before setup_arch() runs.  On Voyager
+ *      this is used to get the board revision and type.
+ **/
+void __init pre_setup_arch_hook(void)
+{
+}
+
+/**
+ * trap_init_hook - initialise system specific traps
+ *
+ * Description:
+ *      Called as the final act of trap_init().  Used in VISWS to initialise
+ *      the various board specific APIC traps.
+ **/
+void __init trap_init_hook(void)
+{
+        if (x86_quirks->arch_trap_init) {
+                if (x86_quirks->arch_trap_init())
+                        return;
+        }
+}
+
+static struct irqaction irq0  = {
+        .handler = timer_interrupt,
+        .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL,
+        .mask = CPU_MASK_NONE,
+        .name = "timer"
+};
+
+/**
+ * pre_time_init_hook - do any specific initialisations before.
+ *
+ **/
+void __init pre_time_init_hook(void)
+{
+        if (x86_quirks->arch_pre_time_init)
+                x86_quirks->arch_pre_time_init();
+}
+
+/**
+ * time_init_hook - do any specific initialisations for the system timer.
+ *
+ * Description:
+ *      Must plug the system timer interrupt source at HZ into the IRQ listed
+ *      in irq_vectors.h:TIMER_IRQ
+ **/
+void __init time_init_hook(void)
+{
+        if (x86_quirks->arch_time_init) {
+                /*
+                 * A nonzero return code does not mean failure, it means
+                 * that the architecture quirk does not want any
+                 * generic (timer) setup to be performed after this:
+                 */
+                if (x86_quirks->arch_time_init())
+                        return;
+        }
+
+        irq0.mask = cpumask_of_cpu(0);
+        setup_irq(0, &irq0);
+}
+
+#ifdef CONFIG_MCA
+/**
+ * mca_nmi_hook - hook into MCA specific NMI chain
+ *
+ * Description:
+ *      The MCA (Microchannel Architecture) has an NMI chain for NMI sources
+ *      along the MCA bus.  Use this to hook into that chain if you will need
+ *      it.
+ **/
+void mca_nmi_hook(void)
+{
+        /*
+         * If I recall correctly, there's a whole bunch of other things that
+         * we can do to check for NMI problems, but that's all I know about
+         * at the moment.
+         */
+        pr_warning("NMI generated from unknown source!\n");
+}
+#endif
+
+static __init int no_ipi_broadcast(char *str)
+{
+        get_option(&str, &no_broadcast);
+        pr_info("Using %s mode\n",
+                no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
+        return 1;
+}
+__setup("no_ipi_broadcast=", no_ipi_broadcast);
+
+static int __init print_ipi_mode(void)
+{
+        pr_info("Using IPI %s mode\n",
+                no_broadcast ? "No-Shortcut" : "Shortcut");
+        return 0;
+}
+
+late_initcall(print_ipi_mode);
+
diff --git a/arch/x86/kernel/probe_roms_32.c b/arch/x86/kernel/probe_roms_32.c
index 675a48c404a5..071e7fea42e5 100644
--- a/arch/x86/kernel/probe_roms_32.c
+++ b/arch/x86/kernel/probe_roms_32.c
@@ -18,7 +18,7 @@
 #include <asm/setup.h>
 #include <asm/sections.h>
 #include <asm/io.h>
-#include <setup_arch.h>
+#include <asm/setup_arch.h>
 
 static struct resource system_rom_resource = {
         .name   = "System ROM",
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 6d12f7e37f8c..87b69d4fac16 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -350,7 +350,7 @@ static void c1e_idle(void)
 
 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
 {
-#ifdef CONFIG_X86_SMP
+#ifdef CONFIG_SMP
         if (pm_idle == poll_idle && smp_num_siblings > 1) {
                 printk(KERN_WARNING "WARNING: polling idle and HT enabled,"
                         " performance may degrade.\n");
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index f8536fee5c12..32e8f0af292c 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -24,7 +24,7 @@
 # include <asm/iommu.h>
 #endif
 
-#include <mach_ipi.h>
+#include <asm/genapic.h>
 
 /*
  * Power off function, if any
@@ -651,7 +651,7 @@ static int crash_nmi_callback(struct notifier_block *self,
 
 static void smp_send_nmi_allbutself(void)
 {
-        send_IPI_allbutself(NMI_VECTOR);
+        apic->send_IPI_allbutself(NMI_VECTOR);
 }
 
 static struct notifier_block crash_nmi_nb = {
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index d5d6693b706d..8fce6c714514 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -81,7 +81,7 @@
 #include <asm/io_apic.h>
 #include <asm/ist.h>
 #include <asm/vmi.h>
-#include <setup_arch.h>
+#include <asm/setup_arch.h>
 #include <asm/bios_ebda.h>
 #include <asm/cacheflush.h>
 #include <asm/processor.h>
@@ -97,7 +97,7 @@
 #include <asm/mmu_context.h>
 #include <asm/proto.h>
 
-#include <mach_apic.h>
+#include <asm/genapic.h>
 #include <asm/paravirt.h>
 #include <asm/hypervisor.h>
 
@@ -112,6 +112,20 @@
 #define ARCH_SETUP
 #endif
 
+unsigned int boot_cpu_id __read_mostly;
+
+#ifdef CONFIG_X86_64
+int default_cpu_present_to_apicid(int mps_cpu)
+{
+        return __default_cpu_present_to_apicid(mps_cpu);
+}
+
+int default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+        return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
+}
+#endif
+
 #ifndef CONFIG_DEBUG_BOOT_PARAMS
 struct boot_params __initdata boot_params;
 #else
@@ -588,10 +602,9 @@ early_param("elfcorehdr", setup_elfcorehdr);
 
 static int __init default_update_genapic(void)
 {
-#ifdef CONFIG_X86_SMP
-# if defined(CONFIG_X86_GENERICARCH) || defined(CONFIG_X86_64)
-        genapic->wakeup_cpu = wakeup_secondary_cpu_via_init;
-# endif
+#ifdef CONFIG_SMP
+        if (!apic->wakeup_cpu)
+                apic->wakeup_cpu = wakeup_secondary_cpu_via_init;
 #endif
 
         return 0;
@@ -892,12 +905,11 @@ void __init setup_arch(char **cmdline_p)
          */
         acpi_reserve_bootmem();
 #endif
-#ifdef CONFIG_X86_FIND_SMP_CONFIG
         /*
          * Find and reserve possible boot-time SMP configuration:
          */
         find_smp_config();
-#endif
+
         reserve_crashkernel();
 
 #ifdef CONFIG_X86_64
@@ -924,9 +936,7 @@ void __init setup_arch(char **cmdline_p)
         map_vsyscall();
 #endif
 
-#ifdef CONFIG_X86_GENERICARCH
         generic_apic_probe();
-#endif
 
         early_quirks();
 
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index e6faa3316bd2..eaaffae31cc0 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -2,7 +2,7 @@
  *      Intel SMP support routines.
  *
  *      (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
- *      (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>
+ *      (c) 1998-99, 2000, 2009 Ingo Molnar <mingo@redhat.com>
  *      (c) 2002,2003 Andi Kleen, SuSE Labs.
  *
  *      i386 and x86_64 integration by Glauber Costa <gcosta@redhat.com>
@@ -26,8 +26,7 @@
 #include <asm/tlbflush.h>
 #include <asm/mmu_context.h>
 #include <asm/proto.h>
-#include <mach_ipi.h>
-#include <mach_apic.h>
+#include <asm/genapic.h>
 /*
  *      Some notes on x86 processor bugs affecting SMP operation:
  *
@@ -118,12 +117,12 @@ static void native_smp_send_reschedule(int cpu)
                 WARN_ON(1);
                 return;
         }
-        send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR);
+        apic->send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR);
 }
 
 void native_send_call_func_single_ipi(int cpu)
 {
-        send_IPI_mask(cpumask_of(cpu), CALL_FUNCTION_SINGLE_VECTOR);
+        apic->send_IPI_mask(cpumask_of(cpu), CALL_FUNCTION_SINGLE_VECTOR);
 }
 
 void native_send_call_func_ipi(const struct cpumask *mask)
@@ -131,7 +130,7 @@ void native_send_call_func_ipi(const struct cpumask *mask)
         cpumask_var_t allbutself;
 
         if (!alloc_cpumask_var(&allbutself, GFP_ATOMIC)) {
-                send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
+                apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
                 return;
         }
 
@@ -140,9 +139,9 @@ void native_send_call_func_ipi(const struct cpumask *mask)
 
         if (cpumask_equal(mask, allbutself) &&
             cpumask_equal(cpu_online_mask, cpu_callout_mask))
-                send_IPI_allbutself(CALL_FUNCTION_VECTOR);
+                apic->send_IPI_allbutself(CALL_FUNCTION_VECTOR);
         else
-                send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
+                apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
 
         free_cpumask_var(allbutself);
 }
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 612d3c74f6a3..af57f88186e7 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -2,7 +2,7 @@
  *      x86 SMP booting functions
  *
  *      (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
- *      (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
+ *      (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
  *      Copyright 2001 Andi Kleen, SuSE Labs.
  *
  *      Much of the core SMP work is based on previous work by Thomas Radke, to
@@ -65,9 +65,8 @@
 #include <asm/uv/uv.h>
 #include <linux/mc146818rtc.h>
 
-#include <mach_apic.h>
-#include <mach_wakecpu.h>
-#include <smpboot_hooks.h>
+#include <asm/genapic.h>
+#include <asm/smpboot_hooks.h>
 
 #ifdef CONFIG_X86_32
 u8 apicid_2_node[MAX_APICID];
@@ -163,7 +162,7 @@ static void map_cpu_to_logical_apicid(void)
 {
         int cpu = smp_processor_id();
         int apicid = logical_smp_processor_id();
-        int node = apicid_to_node(apicid);
+        int node = apic->apicid_to_node(apicid);
 
         if (!node_online(node))
                 node = first_online_node;
@@ -196,7 +195,8 @@ static void __cpuinit smp_callin(void)
          * our local APIC.  We have to wait for the IPI or we'll
          * lock up on an APIC access.
          */
-        wait_for_init_deassert(&init_deasserted);
+        if (apic->wait_for_init_deassert)
+                apic->wait_for_init_deassert(&init_deasserted);
 
         /*
          * (This works even if the APIC is not enabled.)
@@ -243,7 +243,8 @@ static void __cpuinit smp_callin(void)
          */
 
         pr_debug("CALLIN, before setup_local_APIC().\n");
-        smp_callin_clear_local_apic();
+        if (apic->smp_callin_clear_local_apic)
+                apic->smp_callin_clear_local_apic();
         setup_local_APIC();
         end_local_APIC_setup();
         map_cpu_to_logical_apicid();
@@ -583,7 +584,7 @@ wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
         /* Target chip */
         /* Boot on the stack */
         /* Kick the second */
-        apic_icr_write(APIC_DM_NMI | APIC_DEST_LOGICAL, logical_apicid);
+        apic_icr_write(APIC_DM_NMI | apic->dest_logical, logical_apicid);
 
         pr_debug("Waiting for send to finish...\n");
         send_status = safe_apic_wait_icr_idle();
@@ -749,7 +750,7 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
 /*
  * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
  * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
- * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
+ * Returns zero if CPU booted OK, else error code from ->wakeup_cpu.
  */
 {
         unsigned long boot_error = 0;
@@ -824,7 +825,8 @@ do_rest:
 
                 pr_debug("Setting warm reset code and vector.\n");
 
-                store_NMI_vector(&nmi_high, &nmi_low);
+                if (apic->store_NMI_vector)
+                        apic->store_NMI_vector(&nmi_high, &nmi_low);
 
                 smpboot_setup_warm_reset_vector(start_ip);
                 /*
@@ -839,7 +841,7 @@ do_rest:
         /*
          * Starting actual IPI sequence...
          */
-        boot_error = wakeup_secondary_cpu(apicid, start_ip);
+        boot_error = apic->wakeup_cpu(apicid, start_ip);
 
         if (!boot_error) {
                 /*
@@ -873,8 +875,8 @@ do_rest:
                         else
                                 /* trampoline code not run */
                                 printk(KERN_ERR "Not responding.\n");
-                        if (get_uv_system_type() != UV_NON_UNIQUE_APIC)
-                                inquire_remote_apic(apicid);
+                        if (apic->inquire_remote_apic)
+                                apic->inquire_remote_apic(apicid);
                 }
         }
 
@@ -905,7 +907,7 @@ do_rest:
 
 int __cpuinit native_cpu_up(unsigned int cpu)
 {
-        int apicid = cpu_present_to_apicid(cpu);
+        int apicid = apic->cpu_present_to_apicid(cpu);
         unsigned long flags;
         int err;
 
@@ -998,14 +1000,14 @@ static int __init smp_sanity_check(unsigned max_cpus)
 {
         preempt_disable();
 
-#if defined(CONFIG_X86_PC) && defined(CONFIG_X86_32)
+#if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)
         if (def_to_bigsmp && nr_cpu_ids > 8) {
                 unsigned int cpu;
                 unsigned nr;
 
                 printk(KERN_WARNING
                        "More than 8 CPUs detected - skipping them.\n"
-                       "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n");
+                       "Use CONFIG_X86_BIGSMP.\n");
 
                 nr = 0;
                 for_each_present_cpu(cpu) {
@@ -1051,7 +1053,7 @@ static int __init smp_sanity_check(unsigned max_cpus)
          * Should not be necessary because the MP table should list the boot
          * CPU too, but we do it for the sake of robustness anyway.
          */
-        if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
+        if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) {
                 printk(KERN_NOTICE
                         "weird, boot CPU (#%d) not listed by the BIOS.\n",
                         boot_cpu_physical_apicid);
@@ -1069,7 +1071,7 @@ static int __init smp_sanity_check(unsigned max_cpus)
                 printk(KERN_ERR "... forcing use of dummy APIC emulation."
                                 "(tell your hw vendor)\n");
                 smpboot_clear_io_apic();
-                disable_ioapic_setup();
+                arch_disable_smp_support();
                 return -1;
         }
 
@@ -1128,7 +1130,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 
 #ifdef CONFIG_X86_64
         enable_IR_x2apic();
-        setup_apic_routing();
+        default_setup_apic_routing();
 #endif
 
         if (smp_sanity_check(max_cpus) < 0) {
@@ -1163,7 +1165,8 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 
         map_cpu_to_logical_apicid();
 
-        setup_portio_remap();
+        if (apic->setup_portio_remap)
+                apic->setup_portio_remap();
 
         smpboot_setup_io_apic();
         /*
diff --git a/arch/x86/kernel/stacktrace.c b/arch/x86/kernel/stacktrace.c
index 10786af95545..f7bddc2e37d1 100644
--- a/arch/x86/kernel/stacktrace.c
+++ b/arch/x86/kernel/stacktrace.c
@@ -1,7 +1,7 @@
 /*
  * Stack trace management functions
  *
- *  Copyright (C) 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com>
+ *  Copyright (C) 2006-2009 Red Hat, Inc., Ingo Molnar <mingo@redhat.com>
  */
 #include <linux/sched.h>
 #include <linux/stacktrace.h>
diff --git a/arch/x86/kernel/summit_32.c b/arch/x86/kernel/summit_32.c
index 7b987852e876..1e733eff9b33 100644
--- a/arch/x86/kernel/summit_32.c
+++ b/arch/x86/kernel/summit_32.c
@@ -30,8 +30,364 @@
 #include <linux/init.h>
 #include <asm/io.h>
 #include <asm/bios_ebda.h>
-#include <asm/summit/mpparse.h>
 
+/*
+ * APIC driver for the IBM "Summit" chipset.
+ */
+#define APIC_DEFINITION 1
+#include <linux/threads.h>
+#include <linux/cpumask.h>
+#include <asm/mpspec.h>
+#include <asm/apic.h>
+#include <asm/smp.h>
+#include <asm/genapic.h>
+#include <asm/fixmap.h>
+#include <asm/apicdef.h>
+#include <asm/ipi.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/gfp.h>
+#include <linux/smp.h>
+
+static inline unsigned summit_get_apic_id(unsigned long x)
+{
+        return (x >> 24) & 0xFF;
+}
+
+static inline void summit_send_IPI_mask(const cpumask_t *mask, int vector)
+{
+        default_send_IPI_mask_sequence_logical(mask, vector);
+}
+
+static inline void summit_send_IPI_allbutself(int vector)
+{
+        cpumask_t mask = cpu_online_map;
+        cpu_clear(smp_processor_id(), mask);
+
+        if (!cpus_empty(mask))
+                summit_send_IPI_mask(&mask, vector);
+}
+
+static inline void summit_send_IPI_all(int vector)
+{
+        summit_send_IPI_mask(&cpu_online_map, vector);
+}
+
+#include <asm/tsc.h>
+
+extern int use_cyclone;
+
+#ifdef CONFIG_X86_SUMMIT_NUMA
+extern void setup_summit(void);
+#else
+#define setup_summit()  {}
+#endif
+
+static inline int
+summit_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
+{
+        if (!strncmp(oem, "IBM ENSW", 8) &&
+                        (!strncmp(productid, "VIGIL SMP", 9)
+                         || !strncmp(productid, "EXA", 3)
+                         || !strncmp(productid, "RUTHLESS SMP", 12))){
+                mark_tsc_unstable("Summit based system");
+                use_cyclone = 1; /*enable cyclone-timer*/
+                setup_summit();
+                return 1;
+        }
+        return 0;
+}
+
+/* Hook from generic ACPI tables.c */
+static inline int summit_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
+{
+        if (!strncmp(oem_id, "IBM", 3) &&
+            (!strncmp(oem_table_id, "SERVIGIL", 8)
+             || !strncmp(oem_table_id, "EXA", 3))){
+                mark_tsc_unstable("Summit based system");
+                use_cyclone = 1; /*enable cyclone-timer*/
+                setup_summit();
+                return 1;
+        }
+        return 0;
+}
+
+struct rio_table_hdr {
+        unsigned char version;      /* Version number of this data structure           */
+                                    /* Version 3 adds chassis_num & WP_index           */
+        unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil)   */
+        unsigned char num_rio_dev;  /* # of RIO I/O devices (Cyclones and Winnipegs)   */
+} __attribute__((packed));
+
+struct scal_detail {
+        unsigned char node_id;      /* Scalability Node ID                             */
+        unsigned long CBAR;         /* Address of 1MB register space                   */
+        unsigned char port0node;    /* Node ID port connected to: 0xFF=None            */
+        unsigned char port0port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
+        unsigned char port1node;    /* Node ID port connected to: 0xFF = None          */
+        unsigned char port1port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
+        unsigned char port2node;    /* Node ID port connected to: 0xFF = None          */
+        unsigned char port2port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
+        unsigned char chassis_num;  /* 1 based Chassis number (1 = boot node)          */
+} __attribute__((packed));
+
+struct rio_detail {
+        unsigned char node_id;      /* RIO Node ID                                     */
+        unsigned long BBAR;         /* Address of 1MB register space                   */
+        unsigned char type;         /* Type of device                                  */
+        unsigned char owner_id;     /* For WPEG: Node ID of Cyclone that owns this WPEG*/
+                                    /* For CYC:  Node ID of Twister that owns this CYC */
+        unsigned char port0node;    /* Node ID port connected to: 0xFF=None            */
+        unsigned char port0port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
+        unsigned char port1node;    /* Node ID port connected to: 0xFF=None            */
+        unsigned char port1port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
+        unsigned char first_slot;   /* For WPEG: Lowest slot number below this WPEG    */
+                                    /* For CYC:  0                                     */
+        unsigned char status;       /* For WPEG: Bit 0 = 1 : the XAPIC is used         */
+                                    /*                 = 0 : the XAPIC is not used, ie:*/
+                                    /*                     ints fwded to another XAPIC */
+                                    /*           Bits1:7 Reserved                      */
+                                    /* For CYC:  Bits0:7 Reserved                      */
+        unsigned char WP_index;     /* For WPEG: WPEG instance index - lower ones have */
+                                    /*           lower slot numbers/PCI bus numbers    */
+                                    /* For CYC:  No meaning                            */
+        unsigned char chassis_num;  /* 1 based Chassis number                          */
+                                    /* For LookOut WPEGs this field indicates the      */
+                                    /* Expansion Chassis #, enumerated from Boot       */
+                                    /* Node WPEG external port, then Boot Node CYC     */
+                                    /* external port, then Next Vigil chassis WPEG     */
+                                    /* external port, etc.                             */
+                                    /* Shared Lookouts have only 1 chassis number (the */
+                                    /* first one assigned)                             */
+} __attribute__((packed));
+
+
+typedef enum {
+        CompatTwister = 0,  /* Compatibility Twister               */
+        AltTwister    = 1,  /* Alternate Twister of internal 8-way */
+        CompatCyclone = 2,  /* Compatibility Cyclone               */
+        AltCyclone    = 3,  /* Alternate Cyclone of internal 8-way */
+        CompatWPEG    = 4,  /* Compatibility WPEG                  */
+        AltWPEG       = 5,  /* Second Planar WPEG                  */
+        LookOutAWPEG  = 6,  /* LookOut WPEG                        */
+        LookOutBWPEG  = 7,  /* LookOut WPEG                        */
+} node_type;
+
+static inline int is_WPEG(struct rio_detail *rio){
+        return (rio->type == CompatWPEG || rio->type == AltWPEG ||
+                rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
+}
+
+
+/* In clustered mode, the high nibble of APIC ID is a cluster number.
+ * The low nibble is a 4-bit bitmap. */
+#define XAPIC_DEST_CPUS_SHIFT   4
+#define XAPIC_DEST_CPUS_MASK    ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
+#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
+
+#define SUMMIT_APIC_DFR_VALUE   (APIC_DFR_CLUSTER)
+
+static inline const cpumask_t *summit_target_cpus(void)
+{
+        /* CPU_MASK_ALL (0xff) has undefined behaviour with
+         * dest_LowestPrio mode logical clustered apic interrupt routing
+         * Just start on cpu 0.  IRQ balancing will spread load
+         */
+        return &cpumask_of_cpu(0);
+}
+
+static inline unsigned long
+summit_check_apicid_used(physid_mask_t bitmap, int apicid)
+{
+        return 0;
+}
+
+/* we don't use the phys_cpu_present_map to indicate apicid presence */
+static inline unsigned long summit_check_apicid_present(int bit)
+{
+        return 1;
+}
+
+#define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
+
+extern u8 cpu_2_logical_apicid[];
+
+static inline void summit_init_apic_ldr(void)
+{
+        unsigned long val, id;
+        int count = 0;
+        u8 my_id = (u8)hard_smp_processor_id();
+        u8 my_cluster = (u8)apicid_cluster(my_id);
+#ifdef CONFIG_SMP
+        u8 lid;
+        int i;
+
+        /* Create logical APIC IDs by counting CPUs already in cluster. */
+        for (count = 0, i = nr_cpu_ids; --i >= 0; ) {
+                lid = cpu_2_logical_apicid[i];
+                if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster)
+                        ++count;
+        }
+#endif
+        /* We only have a 4 wide bitmap in cluster mode.  If a deranged
+         * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
+        BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
+        id = my_cluster | (1UL << count);
+        apic_write(APIC_DFR, SUMMIT_APIC_DFR_VALUE);
+        val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
+        val |= SET_APIC_LOGICAL_ID(id);
+        apic_write(APIC_LDR, val);
+}
+
+static inline int summit_apic_id_registered(void)
+{
+        return 1;
+}
+
+static inline void summit_setup_apic_routing(void)
+{
+        printk("Enabling APIC mode:  Summit.  Using %d I/O APICs\n",
+                                                nr_ioapics);
+}
+
+static inline int summit_apicid_to_node(int logical_apicid)
+{
+#ifdef CONFIG_SMP
+        return apicid_2_node[hard_smp_processor_id()];
+#else
+        return 0;
+#endif
+}
+
+/* Mapping from cpu number to logical apicid */
+static inline int summit_cpu_to_logical_apicid(int cpu)
+{
+#ifdef CONFIG_SMP
+        if (cpu >= nr_cpu_ids)
+                return BAD_APICID;
+        return (int)cpu_2_logical_apicid[cpu];
+#else
+        return logical_smp_processor_id();
+#endif
+}
+
+static inline int summit_cpu_present_to_apicid(int mps_cpu)
+{
+        if (mps_cpu < nr_cpu_ids)
+                return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
+        else
+                return BAD_APICID;
+}
+
+static inline physid_mask_t
+summit_ioapic_phys_id_map(physid_mask_t phys_id_map)
+{
+        /* For clustered we don't have a good way to do this yet - hack */
+        return physids_promote(0x0F);
+}
+
+static inline physid_mask_t summit_apicid_to_cpu_present(int apicid)
+{
+        return physid_mask_of_physid(0);
+}
+
+static inline void summit_setup_portio_remap(void)
+{
+}
+
+static inline int summit_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+        return 1;
+}
+
+static inline unsigned int summit_cpu_mask_to_apicid(const cpumask_t *cpumask)
+{
+        int cpus_found = 0;
+        int num_bits_set;
+        int apicid;
+        int cpu;
+
+        num_bits_set = cpus_weight(*cpumask);
+        /* Return id to all */
+        if (num_bits_set >= nr_cpu_ids)
+                return 0xFF;
+        /*
+         * The cpus in the mask must all be on the apic cluster.  If are not
+         * on the same apicid cluster return default value of target_cpus():
+         */
+        cpu = first_cpu(*cpumask);
+        apicid = summit_cpu_to_logical_apicid(cpu);
+
+        while (cpus_found < num_bits_set) {
+                if (cpu_isset(cpu, *cpumask)) {
+                        int new_apicid = summit_cpu_to_logical_apicid(cpu);
+
+                        if (apicid_cluster(apicid) !=
+                                        apicid_cluster(new_apicid)) {
+                                printk ("%s: Not a valid mask!\n", __func__);
+
+                                return 0xFF;
+                        }
+                        apicid = apicid | new_apicid;
+                        cpus_found++;
+                }
+                cpu++;
+        }
+        return apicid;
+}
+
+static inline unsigned int
+summit_cpu_mask_to_apicid_and(const struct cpumask *inmask,
+                              const struct cpumask *andmask)
+{
+        int apicid = summit_cpu_to_logical_apicid(0);
+        cpumask_var_t cpumask;
+
+        if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
+                return apicid;
+
+        cpumask_and(cpumask, inmask, andmask);
+        cpumask_and(cpumask, cpumask, cpu_online_mask);
+        apicid = summit_cpu_mask_to_apicid(cpumask);
+
+        free_cpumask_var(cpumask);
+
+        return apicid;
+}
+
+/*
+ * cpuid returns the value latched in the HW at reset, not the APIC ID
+ * register's value.  For any box whose BIOS changes APIC IDs, like
+ * clustered APIC systems, we must use hard_smp_processor_id.
+ *
+ * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
+ */
+static inline int summit_phys_pkg_id(int cpuid_apic, int index_msb)
+{
+        return hard_smp_processor_id() >> index_msb;
+}
+
+static int probe_summit(void)
+{
+        /* probed later in mptable/ACPI hooks */
+        return 0;
+}
+
+static void summit_vector_allocation_domain(int cpu, cpumask_t *retmask)
+{
+        /* Careful. Some cpus do not strictly honor the set of cpus
+         * specified in the interrupt destination when using lowest
+         * priority interrupt delivery mode.
+         *
+         * In particular there was a hyperthreading cpu observed to
+         * deliver interrupts to the wrong hyperthread when only one
+         * hyperthread was specified in the interrupt desitination.
+         */
+        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
+}
+
+#ifdef CONFIG_X86_SUMMIT_NUMA
 static struct rio_table_hdr *rio_table_hdr __initdata;
 static struct scal_detail   *scal_devs[MAX_NUMNODES] __initdata;
 static struct rio_detail    *rio_devs[MAX_NUMNODES*4] __initdata;
@@ -186,3 +542,61 @@ void __init setup_summit(void)
                         next_wpeg = 0;
         } while (next_wpeg != 0);
 }
+#endif
+
+struct genapic apic_summit = {
+
+        .name                           = "summit",
+        .probe                          = probe_summit,
+        .acpi_madt_oem_check            = summit_acpi_madt_oem_check,
+        .apic_id_registered             = summit_apic_id_registered,
+
+        .irq_delivery_mode              = dest_LowestPrio,
+        /* logical delivery broadcast to all CPUs: */
+        .irq_dest_mode                  = 1,
+
+        .target_cpus                    = summit_target_cpus,
+        .disable_esr                    = 1,
+        .dest_logical                   = APIC_DEST_LOGICAL,
+        .check_apicid_used              = summit_check_apicid_used,
+        .check_apicid_present           = summit_check_apicid_present,
+
+        .vector_allocation_domain       = summit_vector_allocation_domain,
+        .init_apic_ldr                  = summit_init_apic_ldr,
+
+        .ioapic_phys_id_map             = summit_ioapic_phys_id_map,
+        .setup_apic_routing             = summit_setup_apic_routing,
+        .multi_timer_check              = NULL,
+        .apicid_to_node                 = summit_apicid_to_node,
+        .cpu_to_logical_apicid          = summit_cpu_to_logical_apicid,
+        .cpu_present_to_apicid          = summit_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = summit_apicid_to_cpu_present,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = summit_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = summit_phys_pkg_id,
+        .mps_oem_check                  = summit_mps_oem_check,
+
+        .get_apic_id                    = summit_get_apic_id,
+        .set_apic_id                    = NULL,
+        .apic_id_mask                   = 0xFF << 24,
+
+        .cpu_mask_to_apicid             = summit_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = summit_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = summit_send_IPI_mask,
+        .send_IPI_mask_allbutself       = NULL,
+        .send_IPI_allbutself            = summit_send_IPI_allbutself,
+        .send_IPI_all                   = summit_send_IPI_all,
+        .send_IPI_self                  = default_send_IPI_self,
+
+        .wakeup_cpu                     = NULL,
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+
+        .wait_for_init_deassert         = default_wait_for_init_deassert,
+
+        .smp_callin_clear_local_apic    = NULL,
+        .store_NMI_vector               = NULL,
+        .inquire_remote_apic            = default_inquire_remote_apic,
+};
diff --git a/arch/x86/kernel/time_32.c b/arch/x86/kernel/time_32.c
index 3985cac0ed47..764c74e871f2 100644
--- a/arch/x86/kernel/time_32.c
+++ b/arch/x86/kernel/time_32.c
@@ -38,7 +38,7 @@
 #include <asm/time.h>
 #include <asm/timer.h>
 
-#include "do_timer.h"
+#include <asm/do_timer.h>
 
 int timer_ack;
 
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index f4b2f27d19b9..f396e61bcb34 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -20,7 +20,7 @@
 #include <asm/tsc.h>
 #include <asm/irq_vectors.h>
 
-#include <mach_apic.h>
+#include <asm/genapic.h>
 
 static struct bau_control       **uv_bau_table_bases __read_mostly;
 static int                      uv_bau_retry_limit __read_mostly;
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 71a8f871331e..bde57f0f1616 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -54,7 +54,7 @@
 #include <asm/desc.h>
 #include <asm/i387.h>
 
-#include <mach_traps.h>
+#include <asm/mach_traps.h>
 
 #ifdef CONFIG_X86_64
 #include <asm/pgalloc.h>
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 599e58168631..83d53ce5d4c4 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -773,7 +773,7 @@ __cpuinit int unsynchronized_tsc(void)
         if (!cpu_has_tsc || tsc_unstable)
                 return 1;
 
-#ifdef CONFIG_X86_SMP
+#ifdef CONFIG_SMP
         if (apic_is_clustered_box())
                 return 1;
 #endif
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c
index d801d06af068..4fd646e6dd43 100644
--- a/arch/x86/kernel/visws_quirks.c
+++ b/arch/x86/kernel/visws_quirks.c
@@ -32,9 +32,9 @@
 #include <asm/e820.h>
 #include <asm/io.h>
 
-#include <mach_ipi.h>
+#include <asm/genapic.h>
 
-#include "mach_apic.h"
+#include <asm/genapic.h>
 
 #include <linux/kernel_stat.h>
 
@@ -200,7 +200,7 @@ static void __init MP_processor_info(struct mpc_cpu *m)
                 return;
         }
 
-        apic_cpus = apicid_to_cpu_present(m->apicid);
+        apic_cpus = apic->apicid_to_cpu_present(m->apicid);
         physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus);
         /*
          * Validate version
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index c4c1f9e09402..a4791ef412d1 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -256,7 +256,7 @@ void __devinit vmi_time_bsp_init(void)
          */
         clockevents_notify(CLOCK_EVT_NOTIFY_SUSPEND, NULL);
         local_irq_disable();
-#ifdef CONFIG_X86_SMP
+#ifdef CONFIG_SMP
         /*
          * XXX handle_percpu_irq only defined for SMP; we need to switch over
          * to using it, since this is a local interrupt, which each CPU must
diff --git a/arch/x86/mach-default/Makefile b/arch/x86/mach-default/Makefile
deleted file mode 100644
index 012fe34459e6..000000000000
--- a/arch/x86/mach-default/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-obj-y                           := setup.o
diff --git a/arch/x86/mach-default/setup.c b/arch/x86/mach-default/setup.c
deleted file mode 100644
index a265a7c63190..000000000000
--- a/arch/x86/mach-default/setup.c
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- *      Machine specific setup for generic
- */
-
-#include <linux/smp.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <asm/acpi.h>
-#include <asm/arch_hooks.h>
-#include <asm/e820.h>
-#include <asm/setup.h>
-
-#include <mach_ipi.h>
-
-#ifdef CONFIG_HOTPLUG_CPU
-#define DEFAULT_SEND_IPI        (1)
-#else
-#define DEFAULT_SEND_IPI        (0)
-#endif
-
-int no_broadcast = DEFAULT_SEND_IPI;
-
-/**
- * pre_intr_init_hook - initialisation prior to setting up interrupt vectors
- *
- * Description:
- *      Perform any necessary interrupt initialisation prior to setting up
- *      the "ordinary" interrupt call gates.  For legacy reasons, the ISA
- *      interrupts should be initialised here if the machine emulates a PC
- *      in any way.
- **/
-void __init pre_intr_init_hook(void)
-{
-        if (x86_quirks->arch_pre_intr_init) {
-                if (x86_quirks->arch_pre_intr_init())
-                        return;
-        }
-        init_ISA_irqs();
-}
-
-/*
- * IRQ2 is cascade interrupt to second interrupt controller
- */
-static struct irqaction irq2 = {
-        .handler = no_action,
-        .mask = CPU_MASK_NONE,
-        .name = "cascade",
-};
-
-/**
- * intr_init_hook - post gate setup interrupt initialisation
- *
- * Description:
- *      Fill in any interrupts that may have been left out by the general
- *      init_IRQ() routine.  interrupts having to do with the machine rather
- *      than the devices on the I/O bus (like APIC interrupts in intel MP
- *      systems) are started here.
- **/
-void __init intr_init_hook(void)
-{
-        if (x86_quirks->arch_intr_init) {
-                if (x86_quirks->arch_intr_init())
-                        return;
-        }
-        if (!acpi_ioapic)
-                setup_irq(2, &irq2);
-
-}
-
-/**
- * pre_setup_arch_hook - hook called prior to any setup_arch() execution
- *
- * Description:
- *      generally used to activate any machine specific identification
- *      routines that may be needed before setup_arch() runs.  On Voyager
- *      this is used to get the board revision and type.
- **/
-void __init pre_setup_arch_hook(void)
-{
-}
-
-/**
- * trap_init_hook - initialise system specific traps
- *
- * Description:
- *      Called as the final act of trap_init().  Used in VISWS to initialise
- *      the various board specific APIC traps.
- **/
-void __init trap_init_hook(void)
-{
-        if (x86_quirks->arch_trap_init) {
-                if (x86_quirks->arch_trap_init())
-                        return;
-        }
-}
-
-static struct irqaction irq0  = {
-        .handler = timer_interrupt,
-        .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL,
-        .mask = CPU_MASK_NONE,
-        .name = "timer"
-};
-
-/**
- * pre_time_init_hook - do any specific initialisations before.
- *
- **/
-void __init pre_time_init_hook(void)
-{
-        if (x86_quirks->arch_pre_time_init)
-                x86_quirks->arch_pre_time_init();
-}
-
-/**
- * time_init_hook - do any specific initialisations for the system timer.
- *
- * Description:
- *      Must plug the system timer interrupt source at HZ into the IRQ listed
- *      in irq_vectors.h:TIMER_IRQ
- **/
-void __init time_init_hook(void)
-{
-        if (x86_quirks->arch_time_init) {
-                /*
-                 * A nonzero return code does not mean failure, it means
-                 * that the architecture quirk does not want any
-                 * generic (timer) setup to be performed after this:
-                 */
-                if (x86_quirks->arch_time_init())
-                        return;
-        }
-
-        irq0.mask = cpumask_of_cpu(0);
-        setup_irq(0, &irq0);
-}
-
-#ifdef CONFIG_MCA
-/**
- * mca_nmi_hook - hook into MCA specific NMI chain
- *
- * Description:
- *      The MCA (Microchannel Architecture) has an NMI chain for NMI sources
- *      along the MCA bus.  Use this to hook into that chain if you will need
- *      it.
- **/
-void mca_nmi_hook(void)
-{
-        /*
-         * If I recall correctly, there's a whole bunch of other things that
-         * we can do to check for NMI problems, but that's all I know about
-         * at the moment.
-         */
-        pr_warning("NMI generated from unknown source!\n");
-}
-#endif
-
-static __init int no_ipi_broadcast(char *str)
-{
-        get_option(&str, &no_broadcast);
-        pr_info("Using %s mode\n",
-                no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
-        return 1;
-}
-__setup("no_ipi_broadcast=", no_ipi_broadcast);
-
-static int __init print_ipi_mode(void)
-{
-        pr_info("Using IPI %s mode\n",
-                no_broadcast ? "No-Shortcut" : "Shortcut");
-        return 0;
-}
-
-late_initcall(print_ipi_mode);
-
diff --git a/arch/x86/mach-generic/Makefile b/arch/x86/mach-generic/Makefile
deleted file mode 100644
index 6730f4e7c744..000000000000
--- a/arch/x86/mach-generic/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# Makefile for the generic architecture
-#
-
-EXTRA_CFLAGS                    := -Iarch/x86/kernel
-
-obj-y                           := probe.o default.o
-obj-$(CONFIG_X86_NUMAQ)         += numaq.o
-obj-$(CONFIG_X86_SUMMIT)        += summit.o
-obj-$(CONFIG_X86_BIGSMP)        += bigsmp.o
-obj-$(CONFIG_X86_ES7000)        += es7000.o
diff --git a/arch/x86/mach-generic/bigsmp.c b/arch/x86/mach-generic/bigsmp.c
deleted file mode 100644
index bc4c7840b2a8..000000000000
--- a/arch/x86/mach-generic/bigsmp.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * APIC driver for "bigsmp" XAPIC machines with more than 8 virtual CPUs.
- * Drives the local APIC in "clustered mode".
- */
-#define APIC_DEFINITION 1
-#include <linux/threads.h>
-#include <linux/cpumask.h>
-#include <asm/mpspec.h>
-#include <asm/genapic.h>
-#include <asm/fixmap.h>
-#include <asm/apicdef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/dmi.h>
-#include <asm/bigsmp/apicdef.h>
-#include <linux/smp.h>
-#include <asm/bigsmp/apic.h>
-#include <asm/bigsmp/ipi.h>
-#include <asm/mach-default/mach_mpparse.h>
-#include <asm/mach-default/mach_wakecpu.h>
-
-static int dmi_bigsmp; /* can be set by dmi scanners */
-
-static int hp_ht_bigsmp(const struct dmi_system_id *d)
-{
-        printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
-        dmi_bigsmp = 1;
-        return 0;
-}
-
-
-static const struct dmi_system_id bigsmp_dmi_table[] = {
-        { hp_ht_bigsmp, "HP ProLiant DL760 G2",
-        { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
-        DMI_MATCH(DMI_BIOS_VERSION, "P44-"),}
-        },
-
-        { hp_ht_bigsmp, "HP ProLiant DL740",
-        { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
-        DMI_MATCH(DMI_BIOS_VERSION, "P47-"),}
-        },
-         { }
-};
-
-static void vector_allocation_domain(int cpu, cpumask_t *retmask)
-{
-        cpus_clear(*retmask);
-        cpu_set(cpu, *retmask);
-}
-
-static int probe_bigsmp(void)
-{
-        if (def_to_bigsmp)
-                dmi_bigsmp = 1;
-        else
-                dmi_check_system(bigsmp_dmi_table);
-        return dmi_bigsmp;
-}
-
-struct genapic apic_bigsmp = APIC_INIT("bigsmp", probe_bigsmp);
diff --git a/arch/x86/mach-generic/default.c b/arch/x86/mach-generic/default.c
deleted file mode 100644
index e63a4a76d8cd..000000000000
--- a/arch/x86/mach-generic/default.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Default generic APIC driver. This handles up to 8 CPUs.
- */
-#define APIC_DEFINITION 1
-#include <linux/threads.h>
-#include <linux/cpumask.h>
-#include <asm/mpspec.h>
-#include <asm/mach-default/mach_apicdef.h>
-#include <asm/genapic.h>
-#include <asm/fixmap.h>
-#include <asm/apicdef.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/smp.h>
-#include <linux/init.h>
-#include <asm/mach-default/mach_apic.h>
-#include <asm/mach-default/mach_ipi.h>
-#include <asm/mach-default/mach_mpparse.h>
-#include <asm/mach-default/mach_wakecpu.h>
-
-/* should be called last. */
-static int probe_default(void)
-{
-        return 1;
-}
-
-struct genapic apic_default = APIC_INIT("default", probe_default);
diff --git a/arch/x86/mach-generic/es7000.c b/arch/x86/mach-generic/es7000.c
deleted file mode 100644
index c2ded1448024..000000000000
--- a/arch/x86/mach-generic/es7000.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * APIC driver for the Unisys ES7000 chipset.
- */
-#define APIC_DEFINITION 1
-#include <linux/threads.h>
-#include <linux/cpumask.h>
-#include <asm/mpspec.h>
-#include <asm/genapic.h>
-#include <asm/fixmap.h>
-#include <asm/apicdef.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/init.h>
-#include <asm/es7000/apicdef.h>
-#include <linux/smp.h>
-#include <asm/es7000/apic.h>
-#include <asm/es7000/ipi.h>
-#include <asm/es7000/mpparse.h>
-#include <asm/mach-default/mach_wakecpu.h>
-
-void __init es7000_update_genapic_to_cluster(void)
-{
-        genapic->target_cpus = target_cpus_cluster;
-        genapic->int_delivery_mode = INT_DELIVERY_MODE_CLUSTER;
-        genapic->int_dest_mode = INT_DEST_MODE_CLUSTER;
-        genapic->no_balance_irq = NO_BALANCE_IRQ_CLUSTER;
-
-        genapic->init_apic_ldr = init_apic_ldr_cluster;
-
-        genapic->cpu_mask_to_apicid = cpu_mask_to_apicid_cluster;
-}
-
-static int probe_es7000(void)
-{
-        /* probed later in mptable/ACPI hooks */
-        return 0;
-}
-
-extern void es7000_sw_apic(void);
-static void __init enable_apic_mode(void)
-{
-        es7000_sw_apic();
-        return;
-}
-
-static __init int
-mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
-{
-        if (mpc->oemptr) {
-                struct mpc_oemtable *oem_table =
-                        (struct mpc_oemtable *)mpc->oemptr;
-                if (!strncmp(oem, "UNISYS", 6))
-                        return parse_unisys_oem((char *)oem_table);
-        }
-        return 0;
-}
-
-#ifdef CONFIG_ACPI
-/* Hook from generic ACPI tables.c */
-static int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        unsigned long oem_addr = 0;
-        int check_dsdt;
-        int ret = 0;
-
-        /* check dsdt at first to avoid clear fix_map for oem_addr */
-        check_dsdt = es7000_check_dsdt();
-
-        if (!find_unisys_acpi_oem_table(&oem_addr)) {
-                if (check_dsdt)
-                        ret = parse_unisys_oem((char *)oem_addr);
-                else {
-                        setup_unisys();
-                        ret = 1;
-                }
-                /*
-                 * we need to unmap it
-                 */
-                unmap_unisys_acpi_oem_table(oem_addr);
-        }
-        return ret;
-}
-#else
-static int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        return 0;
-}
-#endif
-
-static void vector_allocation_domain(int cpu, cpumask_t *retmask)
-{
-        /* Careful. Some cpus do not strictly honor the set of cpus
-         * specified in the interrupt destination when using lowest
-         * priority interrupt delivery mode.
-         *
-         * In particular there was a hyperthreading cpu observed to
-         * deliver interrupts to the wrong hyperthread when only one
-         * hyperthread was specified in the interrupt desitination.
-         */
-        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
-}
-
-struct genapic __initdata_refok apic_es7000 = APIC_INIT("es7000", probe_es7000);
diff --git a/arch/x86/mach-generic/numaq.c b/arch/x86/mach-generic/numaq.c
deleted file mode 100644
index 3679e2255645..000000000000
--- a/arch/x86/mach-generic/numaq.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * APIC driver for the IBM NUMAQ chipset.
- */
-#define APIC_DEFINITION 1
-#include <linux/threads.h>
-#include <linux/cpumask.h>
-#include <asm/mpspec.h>
-#include <asm/genapic.h>
-#include <asm/fixmap.h>
-#include <asm/apicdef.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/init.h>
-#include <asm/numaq/apicdef.h>
-#include <linux/smp.h>
-#include <asm/numaq/apic.h>
-#include <asm/numaq/ipi.h>
-#include <asm/numaq/mpparse.h>
-#include <asm/numaq/wakecpu.h>
-#include <asm/numaq.h>
-
-static int mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
-{
-        numaq_mps_oem_check(mpc, oem, productid);
-        return found_numaq;
-}
-
-static int probe_numaq(void)
-{
-        /* already know from get_memcfg_numaq() */
-        return found_numaq;
-}
-
-/* Hook from generic ACPI tables.c */
-static int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        return 0;
-}
-
-static void vector_allocation_domain(int cpu, cpumask_t *retmask)
-{
-        /* Careful. Some cpus do not strictly honor the set of cpus
-         * specified in the interrupt destination when using lowest
-         * priority interrupt delivery mode.
-         *
-         * In particular there was a hyperthreading cpu observed to
-         * deliver interrupts to the wrong hyperthread when only one
-         * hyperthread was specified in the interrupt desitination.
-         */
-        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
-}
-
-struct genapic apic_numaq = APIC_INIT("NUMAQ", probe_numaq);
diff --git a/arch/x86/mach-generic/probe.c b/arch/x86/mach-generic/probe.c
deleted file mode 100644
index 15a38daef1a8..000000000000
--- a/arch/x86/mach-generic/probe.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * Copyright 2003 Andi Kleen, SuSE Labs.
- * Subject to the GNU Public License, v.2
- *
- * Generic x86 APIC driver probe layer.
- */
-#include <linux/threads.h>
-#include <linux/cpumask.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-#include <linux/ctype.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <asm/fixmap.h>
-#include <asm/mpspec.h>
-#include <asm/apicdef.h>
-#include <asm/genapic.h>
-#include <asm/setup.h>
-
-extern struct genapic apic_numaq;
-extern struct genapic apic_summit;
-extern struct genapic apic_bigsmp;
-extern struct genapic apic_es7000;
-extern struct genapic apic_default;
-
-struct genapic *genapic = &apic_default;
-
-static struct genapic *apic_probe[] __initdata = {
-#ifdef CONFIG_X86_NUMAQ
-        &apic_numaq,
-#endif
-#ifdef CONFIG_X86_SUMMIT
-        &apic_summit,
-#endif
-#ifdef CONFIG_X86_BIGSMP
-        &apic_bigsmp,
-#endif
-#ifdef CONFIG_X86_ES7000
-        &apic_es7000,
-#endif
-        &apic_default,  /* must be last */
-        NULL,
-};
-
-static int cmdline_apic __initdata;
-static int __init parse_apic(char *arg)
-{
-        int i;
-
-        if (!arg)
-                return -EINVAL;
-
-        for (i = 0; apic_probe[i]; i++) {
-                if (!strcmp(apic_probe[i]->name, arg)) {
-                        genapic = apic_probe[i];
-                        cmdline_apic = 1;
-                        return 0;
-                }
-        }
-
-        if (x86_quirks->update_genapic)
-                x86_quirks->update_genapic();
-
-        /* Parsed again by __setup for debug/verbose */
-        return 0;
-}
-early_param("apic", parse_apic);
-
-void __init generic_bigsmp_probe(void)
-{
-#ifdef CONFIG_X86_BIGSMP
-        /*
-         * This routine is used to switch to bigsmp mode when
-         * - There is no apic= option specified by the user
-         * - generic_apic_probe() has chosen apic_default as the sub_arch
-         * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support
-         */
-
-        if (!cmdline_apic && genapic == &apic_default) {
-                if (apic_bigsmp.probe()) {
-                        genapic = &apic_bigsmp;
-                        if (x86_quirks->update_genapic)
-                                x86_quirks->update_genapic();
-                        printk(KERN_INFO "Overriding APIC driver with %s\n",
-                               genapic->name);
-                }
-        }
-#endif
-}
-
-void __init generic_apic_probe(void)
-{
-        if (!cmdline_apic) {
-                int i;
-                for (i = 0; apic_probe[i]; i++) {
-                        if (apic_probe[i]->probe()) {
-                                genapic = apic_probe[i];
-                                break;
-                        }
-                }
-                /* Not visible without early console */
-                if (!apic_probe[i])
-                        panic("Didn't find an APIC driver");
-
-                if (x86_quirks->update_genapic)
-                        x86_quirks->update_genapic();
-        }
-        printk(KERN_INFO "Using APIC driver %s\n", genapic->name);
-}
-
-/* These functions can switch the APIC even after the initial ->probe() */
-
-int __init mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
-{
-        int i;
-        for (i = 0; apic_probe[i]; ++i) {
-                if (apic_probe[i]->mps_oem_check(mpc, oem, productid)) {
-                        if (!cmdline_apic) {
-                                genapic = apic_probe[i];
-                                if (x86_quirks->update_genapic)
-                                        x86_quirks->update_genapic();
-                                printk(KERN_INFO "Switched to APIC driver `%s'.\n",
-                                       genapic->name);
-                        }
-                        return 1;
-                }
-        }
-        return 0;
-}
-
-int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
-{
-        int i;
-        for (i = 0; apic_probe[i]; ++i) {
-                if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) {
-                        if (!cmdline_apic) {
-                                genapic = apic_probe[i];
-                                if (x86_quirks->update_genapic)
-                                        x86_quirks->update_genapic();
-                                printk(KERN_INFO "Switched to APIC driver `%s'.\n",
-                                       genapic->name);
-                        }
-                        return 1;
-                }
-        }
-        return 0;
-}
-
-int hard_smp_processor_id(void)
-{
-        return genapic->get_apic_id(*(unsigned long *)(APIC_BASE+APIC_ID));
-}
diff --git a/arch/x86/mach-generic/summit.c b/arch/x86/mach-generic/summit.c
deleted file mode 100644
index 2821ffc188b5..000000000000
--- a/arch/x86/mach-generic/summit.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * APIC driver for the IBM "Summit" chipset.
- */
-#define APIC_DEFINITION 1
-#include <linux/threads.h>
-#include <linux/cpumask.h>
-#include <asm/mpspec.h>
-#include <asm/genapic.h>
-#include <asm/fixmap.h>
-#include <asm/apicdef.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/init.h>
-#include <asm/summit/apicdef.h>
-#include <linux/smp.h>
-#include <asm/summit/apic.h>
-#include <asm/summit/ipi.h>
-#include <asm/summit/mpparse.h>
-#include <asm/mach-default/mach_wakecpu.h>
-
-static int probe_summit(void)
-{
-        /* probed later in mptable/ACPI hooks */
-        return 0;
-}
-
-static void vector_allocation_domain(int cpu, cpumask_t *retmask)
-{
-        /* Careful. Some cpus do not strictly honor the set of cpus
-         * specified in the interrupt destination when using lowest
-         * priority interrupt delivery mode.
-         *
-         * In particular there was a hyperthreading cpu observed to
-         * deliver interrupts to the wrong hyperthread when only one
-         * hyperthread was specified in the interrupt desitination.
-         */
-        *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
-}
-
-struct genapic apic_summit = APIC_INIT("summit", probe_summit);
diff --git a/arch/x86/mach-rdc321x/Makefile b/arch/x86/mach-rdc321x/Makefile
deleted file mode 100644
index 8325b4ca431c..000000000000
--- a/arch/x86/mach-rdc321x/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
-#
-# Makefile for the RDC321x specific parts of the kernel
-#
-obj-$(CONFIG_X86_RDC321X)        := gpio.o platform.o
-
diff --git a/arch/x86/mach-rdc321x/gpio.c b/arch/x86/mach-rdc321x/gpio.c
deleted file mode 100644
index 247f33d3a407..000000000000
--- a/arch/x86/mach-rdc321x/gpio.c
+++ /dev/null
@@ -1,194 +0,0 @@
-/*
- *  GPIO support for RDC SoC R3210/R8610
- *
- *  Copyright (C) 2007, Florian Fainelli <florian@openwrt.org>
- *  Copyright (C) 2008, Volker Weiss <dev@tintuc.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-
-#include <linux/spinlock.h>
-#include <linux/io.h>
-#include <linux/types.h>
-#include <linux/module.h>
-
-#include <asm/gpio.h>
-#include <asm/mach-rdc321x/rdc321x_defs.h>
-
-
-/* spin lock to protect our private copy of GPIO data register plus
-   the access to PCI conf registers. */
-static DEFINE_SPINLOCK(gpio_lock);
-
-/* copy of GPIO data registers */
-static u32 gpio_data_reg1;
-static u32 gpio_data_reg2;
-
-static u32 gpio_request_data[2];
-
-
-static inline void rdc321x_conf_write(unsigned addr, u32 value)
-{
-        outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR);
-        outl(value, RDC3210_CFGREG_DATA);
-}
-
-static inline void rdc321x_conf_or(unsigned addr, u32 value)
-{
-        outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR);
-        value |= inl(RDC3210_CFGREG_DATA);
-        outl(value, RDC3210_CFGREG_DATA);
-}
-
-static inline u32 rdc321x_conf_read(unsigned addr)
-{
-        outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR);
-
-        return inl(RDC3210_CFGREG_DATA);
-}
-
-/* configure pin as GPIO */
-static void rdc321x_configure_gpio(unsigned gpio)
-{
-        unsigned long flags;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-        rdc321x_conf_or(gpio < 32
-                ? RDC321X_GPIO_CTRL_REG1 : RDC321X_GPIO_CTRL_REG2,
-                1 << (gpio & 0x1f));
-        spin_unlock_irqrestore(&gpio_lock, flags);
-}
-
-/* initially setup the 2 copies of the gpio data registers.
-   This function must be called by the platform setup code. */
-void __init rdc321x_gpio_setup()
-{
-        /* this might not be, what others (BIOS, bootloader, etc.)
-           wrote to these registers before, but it's a good guess. Still
-           better than just using 0xffffffff. */
-
-        gpio_data_reg1 = rdc321x_conf_read(RDC321X_GPIO_DATA_REG1);
-        gpio_data_reg2 = rdc321x_conf_read(RDC321X_GPIO_DATA_REG2);
-}
-
-/* determine, if gpio number is valid */
-static inline int rdc321x_is_gpio(unsigned gpio)
-{
-        return gpio <= RDC321X_MAX_GPIO;
-}
-
-/* request GPIO */
-int rdc_gpio_request(unsigned gpio, const char *label)
-{
-        unsigned long flags;
-
-        if (!rdc321x_is_gpio(gpio))
-                return -EINVAL;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-        if (gpio_request_data[(gpio & 0x20) ? 1 : 0] & (1 << (gpio & 0x1f)))
-                goto inuse;
-        gpio_request_data[(gpio & 0x20) ? 1 : 0] |= (1 << (gpio & 0x1f));
-        spin_unlock_irqrestore(&gpio_lock, flags);
-
-        return 0;
-inuse:
-        spin_unlock_irqrestore(&gpio_lock, flags);
-        return -EINVAL;
-}
-EXPORT_SYMBOL(rdc_gpio_request);
-
-/* release previously-claimed GPIO */
-void rdc_gpio_free(unsigned gpio)
-{
-        unsigned long flags;
-
-        if (!rdc321x_is_gpio(gpio))
-                return;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-        gpio_request_data[(gpio & 0x20) ? 1 : 0] &= ~(1 << (gpio & 0x1f));
-        spin_unlock_irqrestore(&gpio_lock, flags);
-}
-EXPORT_SYMBOL(rdc_gpio_free);
-
-/* read GPIO pin */
-int rdc_gpio_get_value(unsigned gpio)
-{
-        u32 reg;
-        unsigned long flags;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-        reg = rdc321x_conf_read(gpio < 32
-                ? RDC321X_GPIO_DATA_REG1 : RDC321X_GPIO_DATA_REG2);
-        spin_unlock_irqrestore(&gpio_lock, flags);
-
-        return (1 << (gpio & 0x1f)) & reg ? 1 : 0;
-}
-EXPORT_SYMBOL(rdc_gpio_get_value);
-
-/* set GPIO pin to value */
-void rdc_gpio_set_value(unsigned gpio, int value)
-{
-        unsigned long flags;
-        u32 reg;
-
-        reg = 1 << (gpio & 0x1f);
-        if (gpio < 32) {
-                spin_lock_irqsave(&gpio_lock, flags);
-                if (value)
-                        gpio_data_reg1 |= reg;
-                else
-                        gpio_data_reg1 &= ~reg;
-                rdc321x_conf_write(RDC321X_GPIO_DATA_REG1, gpio_data_reg1);
-                spin_unlock_irqrestore(&gpio_lock, flags);
-        } else {
-                spin_lock_irqsave(&gpio_lock, flags);
-                if (value)
-                        gpio_data_reg2 |= reg;
-                else
-                        gpio_data_reg2 &= ~reg;
-                rdc321x_conf_write(RDC321X_GPIO_DATA_REG2, gpio_data_reg2);
-                spin_unlock_irqrestore(&gpio_lock, flags);
-        }
-}
-EXPORT_SYMBOL(rdc_gpio_set_value);
-
-/* configure GPIO pin as input */
-int rdc_gpio_direction_input(unsigned gpio)
-{
-        if (!rdc321x_is_gpio(gpio))
-                return -EINVAL;
-
-        rdc321x_configure_gpio(gpio);
-
-        return 0;
-}
-EXPORT_SYMBOL(rdc_gpio_direction_input);
-
-/* configure GPIO pin as output and set value */
-int rdc_gpio_direction_output(unsigned gpio, int value)
-{
-        if (!rdc321x_is_gpio(gpio))
-                return -EINVAL;
-
-        gpio_set_value(gpio, value);
-        rdc321x_configure_gpio(gpio);
-
-        return 0;
-}
-EXPORT_SYMBOL(rdc_gpio_direction_output);
diff --git a/arch/x86/mach-rdc321x/platform.c b/arch/x86/mach-rdc321x/platform.c
deleted file mode 100644
index 4f4e50c3ad3b..000000000000
--- a/arch/x86/mach-rdc321x/platform.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- *  Generic RDC321x platform devices
- *
- *  Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version 2
- *  of the License, or (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the
- *  Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- *  Boston, MA  02110-1301, USA.
- *
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/device.h>
-#include <linux/platform_device.h>
-#include <linux/leds.h>
-
-#include <asm/gpio.h>
-
-/* LEDS */
-static struct gpio_led default_leds[] = {
-        { .name = "rdc:dmz", .gpio = 1, },
-};
-
-static struct gpio_led_platform_data rdc321x_led_data = {
-        .num_leds = ARRAY_SIZE(default_leds),
-        .leds = default_leds,
-};
-
-static struct platform_device rdc321x_leds = {
-        .name = "leds-gpio",
-        .id = -1,
-        .dev = {
-                .platform_data = &rdc321x_led_data,
-        }
-};
-
-/* Watchdog */
-static struct platform_device rdc321x_wdt = {
-        .name = "rdc321x-wdt",
-        .id = -1,
-        .num_resources = 0,
-};
-
-static struct platform_device *rdc321x_devs[] = {
-        &rdc321x_leds,
-        &rdc321x_wdt
-};
-
-static int __init rdc_board_setup(void)
-{
-        rdc321x_gpio_setup();
-
-        return platform_add_devices(rdc321x_devs, ARRAY_SIZE(rdc321x_devs));
-}
-
-arch_initcall(rdc_board_setup);
diff --git a/arch/x86/mm/Makefile b/arch/x86/mm/Makefile
index 9f05157220f5..2b938a384910 100644
--- a/arch/x86/mm/Makefile
+++ b/arch/x86/mm/Makefile
@@ -1,7 +1,7 @@
 obj-y   :=  init_$(BITS).o fault.o ioremap.o extable.o pageattr.o mmap.o \
             pat.o pgtable.o gup.o
 
-obj-$(CONFIG_X86_SMP)           += tlb.o
+obj-$(CONFIG_SMP)               += tlb.o
 
 obj-$(CONFIG_X86_32)            += pgtable_32.o iomap_32.o
 
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 8c3f3113a6ec..2a9ea3aee493 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -420,7 +420,6 @@ static noinline void pgtable_bad(struct pt_regs *regs,
         printk(KERN_ALERT "%s: Corrupted page table at address %lx\n",
                tsk->comm, address);
         dump_pagetable(address);
-        tsk = current;
         tsk->thread.cr2 = address;
         tsk->thread.trap_no = 14;
         tsk->thread.error_code = error_code;
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index af750ab973b6..1448bcb7f22f 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -367,7 +367,7 @@ EXPORT_SYMBOL(ioremap_nocache);
  *
  * Must be freed with iounmap.
  */
-void __iomem *ioremap_wc(unsigned long phys_addr, unsigned long size)
+void __iomem *ioremap_wc(resource_size_t phys_addr, unsigned long size)
 {
         if (pat_enabled)
                 return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WC,
diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c
index 56fe7124fbec..165829600566 100644
--- a/arch/x86/mm/mmap.c
+++ b/arch/x86/mm/mmap.c
@@ -4,7 +4,7 @@
  * Based on code by Ingo Molnar and Andi Kleen, copyrighted
  * as follows:
  *
- * Copyright 2003-2004 Red Hat Inc., Durham, North Carolina.
+ * Copyright 2003-2009 Red Hat Inc.
  * All Rights Reserved.
  * Copyright 2005 Andi Kleen, SUSE Labs.
  * Copyright 2007 Jiri Kosina, SUSE Labs.
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index 7b61036427df..9127e31c7268 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -30,7 +30,7 @@
 #ifdef CONFIG_X86_PAT
 int __read_mostly pat_enabled = 1;
 
-void __cpuinit pat_disable(char *reason)
+void __cpuinit pat_disable(const char *reason)
 {
         pat_enabled = 0;
         printk(KERN_INFO "%s\n", reason);
@@ -42,6 +42,11 @@ static int __init nopat(char *str)
         return 0;
 }
 early_param("nopat", nopat);
+#else
+static inline void pat_disable(const char *reason)
+{
+        (void)reason;
+}
 #endif
 
 
@@ -78,16 +83,20 @@ void pat_init(void)
         if (!pat_enabled)
                 return;
 
-        /* Paranoia check. */
-        if (!cpu_has_pat && boot_pat_state) {
-                /*
-                 * If this happens we are on a secondary CPU, but
-                 * switched to PAT on the boot CPU. We have no way to
-                 * undo PAT.
-                 */
-                printk(KERN_ERR "PAT enabled, "
-                       "but not supported by secondary CPU\n");
-                BUG();
+        if (!cpu_has_pat) {
+                if (!boot_pat_state) {
+                        pat_disable("PAT not supported by CPU.");
+                        return;
+                } else {
+                        /*
+                         * If this happens we are on a secondary CPU, but
+                         * switched to PAT on the boot CPU. We have no way to
+                         * undo PAT.
+                         */
+                        printk(KERN_ERR "PAT enabled, "
+                               "but not supported by secondary CPU\n");
+                        BUG();
+                }
         }
 
         /* Set PWT to Write-Combining. All other bits stay the same */
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 72a6d4ebe34d..14c5af4d11e6 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -14,7 +14,7 @@
 DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate)
                         = { &init_mm, 0, };
 
-#include <mach_ipi.h>
+#include <asm/genapic.h>
 /*
  *      Smarter SMP flushing macros.
  *              c/o Linus Torvalds.
@@ -196,7 +196,7 @@ static void flush_tlb_others_ipi(const struct cpumask *cpumask,
          * We have to send the IPI only to
          * CPUs affected.
          */
-        send_IPI_mask(to_cpumask(f->flush_cpumask),
+        apic->send_IPI_mask(to_cpumask(f->flush_cpumask),
                       INVALIDATE_TLB_VECTOR_START + sender);
 
         while (!cpumask_empty(to_cpumask(f->flush_cpumask)))
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c
index 2089354968a2..5601e829c387 100644
--- a/arch/x86/pci/numaq_32.c
+++ b/arch/x86/pci/numaq_32.c
@@ -5,7 +5,7 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/nodemask.h>
-#include <mach_apic.h>
+#include <asm/genapic.h>
 #include <asm/mpspec.h>
 #include <asm/pci_x86.h>
 
@@ -18,10 +18,6 @@
 
 #define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local])
 
-/* Where the IO area was mapped on multiquad, always 0 otherwise */
-void *xquad_portio;
-EXPORT_SYMBOL(xquad_portio);
-
 #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
 
 #define PCI_CONF1_MQ_ADDRESS(bus, devfn, reg) \
diff --git a/arch/x86/pci/pcbios.c b/arch/x86/pci/pcbios.c
index b82cae970dfd..1c975cc9839e 100644
--- a/arch/x86/pci/pcbios.c
+++ b/arch/x86/pci/pcbios.c
@@ -7,7 +7,7 @@
 #include <linux/module.h>
 #include <linux/uaccess.h>
 #include <asm/pci_x86.h>
-#include <asm/mach-default/pci-functions.h>
+#include <asm/pci-functions.h>
 
 /* BIOS32 signature: "_32_" */
 #define BIOS32_SIGNATURE        (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24))
diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c
index 5a070900ad35..cfd17799bd6d 100644
--- a/arch/x86/xen/irq.c
+++ b/arch/x86/xen/irq.c
@@ -19,21 +19,6 @@ void xen_force_evtchn_callback(void)
         (void)HYPERVISOR_xen_version(0, NULL);
 }
 
-static void __init __xen_init_IRQ(void)
-{
-        int i;
-
-        /* Create identity vector->irq map */
-        for(i = 0; i < NR_VECTORS; i++) {
-                int cpu;
-
-                for_each_possible_cpu(cpu)
-                        per_cpu(vector_irq, cpu)[i] = i;
-        }
-
-        xen_init_IRQ();
-}
-
 static unsigned long xen_save_fl(void)
 {
         struct vcpu_info *vcpu;
@@ -127,7 +112,7 @@ static void xen_halt(void)
 }
 
 static const struct pv_irq_ops xen_irq_ops __initdata = {
-        .init_IRQ = __xen_init_IRQ,
+        .init_IRQ = xen_init_IRQ,
 
         .save_fl = PV_CALLEE_SAVE(xen_save_fl),
         .restore_fl = PV_CALLEE_SAVE(xen_restore_fl),