2 files changed, 135 insertions, 46 deletions

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 8a9f67b62ec1..0fc07b6db749 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -12,18 +12,28 @@ config ARCH_AT91RM9200
 
 config ARCH_AT91SAM9260
         bool "AT91SAM9260 or AT91SAM9XE"
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91SAM9261
         bool "AT91SAM9261"
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91SAM9263
         bool "AT91SAM9263"
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91SAM9RL
         bool "AT91SAM9RL"
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91CAP9
         bool "AT91CAP9"
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91X40
         bool "AT91x40"
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index e38d23770992..5cecbd7de6a6 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -1,23 +1,20 @@
 /*
- * linux/arch/arm/mach-at91/at91sam926x_time.c
+ * at91sam926x_time.c - Periodic Interval Timer (PIT) for at91sam926x
  *
  * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France
  * Revision      2005 M. Nicolas Diremdjian, ATMEL Rousset, France
+ * Converted to ClockSource/ClockEvents by David Brownell.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-
-#include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/time.h>
+#include <linux/clk.h>
+#include <linux/clockchips.h>
 
-#include <asm/hardware.h>
-#include <asm/io.h>
 #include <asm/mach/time.h>
 
 #include <asm/arch/at91_pit.h>
@@ -26,85 +23,167 @@
 #define PIT_CPIV(x)     ((x) & AT91_PIT_CPIV)
 #define PIT_PICNT(x)    (((x) & AT91_PIT_PICNT) >> 20)
 
+static u32 pit_cycle;           /* write-once */
+static u32 pit_cnt;             /* access only w/system irq blocked */
+
+
 /*
- * Returns number of microseconds since last timer interrupt.  Note that interrupts
- * will have been disabled by do_gettimeofday()
- *  'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
+ * Clocksource:  just a monotonic counter of MCK/16 cycles.
+ * We don't care whether or not PIT irqs are enabled.
  */
-static unsigned long at91sam926x_gettimeoffset(void)
+static cycle_t read_pit_clk(void)
 {
-        unsigned long elapsed;
-        unsigned long t = at91_sys_read(AT91_PIT_PIIR);
+        unsigned long flags;
+        u32 elapsed;
+        u32 t;
+
+        raw_local_irq_save(flags);
+        elapsed = pit_cnt;
+        t = at91_sys_read(AT91_PIT_PIIR);
+        raw_local_irq_restore(flags);
+
+        elapsed += PIT_PICNT(t) * pit_cycle;
+        elapsed += PIT_CPIV(t);
+        return elapsed;
+}
+
+static struct clocksource pit_clk = {
+        .name           = "pit",
+        .rating         = 175,
+        .read           = read_pit_clk,
+        .shift          = 20,
+        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+};
 
-        elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t);         /* hardware clock cycles */
 
-        return (unsigned long)(elapsed * jiffies_to_usecs(1)) / LATCH;
+/*
+ * Clockevent device:  interrupts every 1/HZ (== pit_cycles * MCK/16)
+ */
+static void
+pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
+{
+        unsigned long   flags;
+
+        switch (mode) {
+        case CLOCK_EVT_MODE_PERIODIC:
+                /* update clocksource counter, then enable the IRQ */
+                raw_local_irq_save(flags);
+                pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
+                at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
+                                | AT91_PIT_PITIEN);
+                raw_local_irq_restore(flags);
+                break;
+        case CLOCK_EVT_MODE_ONESHOT:
+                BUG();
+                /* FALLTHROUGH */
+        case CLOCK_EVT_MODE_SHUTDOWN:
+        case CLOCK_EVT_MODE_UNUSED:
+                /* disable irq, leaving the clocksource active */
+                at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
+                break;
+        case CLOCK_EVT_MODE_RESUME:
+                break;
+        }
 }
 
+static struct clock_event_device pit_clkevt = {
+        .name           = "pit",
+        .features       = CLOCK_EVT_FEAT_PERIODIC,
+        .shift          = 32,
+        .rating         = 100,
+        .cpumask        = CPU_MASK_CPU0,
+        .set_mode       = pit_clkevt_mode,
+};
+
+
 /*
  * IRQ handler for the timer.
  */
-static irqreturn_t at91sam926x_timer_interrupt(int irq, void *dev_id)
+static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
 {
-        volatile long nr_ticks;
 
-        if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS) {       /* This is a shared interrupt */
-                /* Get number to ticks performed before interrupt and clear PIT interrupt */
+        /* The PIT interrupt may be disabled, and is shared */
+        if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
+                        && (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
+                unsigned nr_ticks;
+
+                /* Get number of ticks performed before irq, and ack it */
                 nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
                 do {
-                        timer_tick();
+                        pit_cnt += pit_cycle;
+                        pit_clkevt.event_handler(&pit_clkevt);
                         nr_ticks--;
                 } while (nr_ticks);
 
                 return IRQ_HANDLED;
-        } else
-                return IRQ_NONE;                /* not handled */
+        }
+
+        return IRQ_NONE;
 }
 
-static struct irqaction at91sam926x_timer_irq = {
+static struct irqaction at91sam926x_pit_irq = {
         .name           = "at91_tick",
         .flags          = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .handler        = at91sam926x_timer_interrupt
+        .handler        = at91sam926x_pit_interrupt
 };
 
-void at91sam926x_timer_reset(void)
+static void at91sam926x_pit_reset(void)
 {
-        /* Disable timer */
+        /* Disable timer and irqs */
         at91_sys_write(AT91_PIT_MR, 0);
 
-        /* Clear any pending interrupts */
-        (void) at91_sys_read(AT91_PIT_PIVR);
+        /* Clear any pending interrupts, wait for PIT to stop counting */
+        while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0)
+                cpu_relax();
 
-        /* Set Period Interval timer and enable its interrupt */
-        at91_sys_write(AT91_PIT_MR, (LATCH & AT91_PIT_PIV) | AT91_PIT_PITIEN | AT91_PIT_PITEN);
+        /* Start PIT but don't enable IRQ */
+        at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
 }
 
 /*
- * Set up timer interrupt.
+ * Set up both clocksource and clockevent support.
  */
-void __init at91sam926x_timer_init(void)
+static void __init at91sam926x_pit_init(void)
 {
-        /* Initialize and enable the timer */
-        at91sam926x_timer_reset();
+        unsigned long   pit_rate;
+        unsigned        bits;
+
+        /*
+         * Use our actual MCK to figure out how many MCK/16 ticks per
+         * 1/HZ period (instead of a compile-time constant LATCH).
+         */
+        pit_rate = clk_get_rate(clk_get(NULL, "mck")) / 16;
+        pit_cycle = (pit_rate + HZ/2) / HZ;
+        WARN_ON(((pit_cycle - 1) & ~AT91_PIT_PIV) != 0);
 
-        /* Make IRQs happen for the system timer. */
-        setup_irq(AT91_ID_SYS, &at91sam926x_timer_irq);
+        /* Initialize and enable the timer */
+        at91sam926x_pit_reset();
+
+        /*
+         * Register clocksource.  The high order bits of PIV are unused,
+         * so this isn't a 32-bit counter unless we get clockevent irqs.
+         */
+        pit_clk.mult = clocksource_hz2mult(pit_rate, pit_clk.shift);
+        bits = 12 /* PICNT */ + ilog2(pit_cycle) /* PIV */;
+        pit_clk.mask = CLOCKSOURCE_MASK(bits);
+        clocksource_register(&pit_clk);
+
+        /* Set up irq handler */
+        setup_irq(AT91_ID_SYS, &at91sam926x_pit_irq);
+
+        /* Set up and register clockevents */
+        pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift);
+        clockevents_register_device(&pit_clkevt);
 }
 
-#ifdef CONFIG_PM
-static void at91sam926x_timer_suspend(void)
+static void at91sam926x_pit_suspend(void)
 {
         /* Disable timer */
         at91_sys_write(AT91_PIT_MR, 0);
 }
-#else
-#define at91sam926x_timer_suspend       NULL
-#endif
 
 struct sys_timer at91sam926x_timer = {
-        .init           = at91sam926x_timer_init,
-        .offset         = at91sam926x_gettimeoffset,
-        .suspend        = at91sam926x_timer_suspend,
-        .resume         = at91sam926x_timer_reset,
+        .init           = at91sam926x_pit_init,
+        .suspend        = at91sam926x_pit_suspend,
+        .resume         = at91sam926x_pit_reset,
 };
-