21 files changed, 50 insertions, 153 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 79c6e5a24456..2a85dc33907c 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -327,6 +327,9 @@ config PCI_DOMAINS
        bool
        default y
+config PCI_SYSCALL
+        def_bool PCI
 config ALPHA_CORE_AGP
        bool
        depends on ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL
diff --git a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c
index 28c84e55feb9..6b07f89a72c7 100644
--- a/arch/alpha/kernel/pci_iommu.c
+++ b/arch/alpha/kernel/pci_iommu.c
@@ -207,6 +207,10 @@ iommu_arena_free(struct pci_iommu_arena *arena, long ofs, long n)
                p[i] = 0;
 }
+/* True if the machine supports DAC addressing, and DEV can
+   make use of it given MASK.  */
+static int pci_dac_dma_supported(struct pci_dev *hwdev, u64 mask);
 /* Map a single buffer of the indicated size for PCI DMA in streaming
   mode.  The 32-bit PCI bus mastering address to use is returned.
   Once the device is given the dma address, the device owns this memory
@@ -897,7 +901,7 @@ iommu_unbind(struct pci_iommu_arena *arena, long pg_start, long pg_count)
 /* True if the machine supports DAC addressing, and DEV can
   make use of it given MASK.  */
-int
+static int
 pci_dac_dma_supported(struct pci_dev *dev, u64 mask)
 {
        dma64_addr_t dac_offset = alpha_mv.pci_dac_offset;
@@ -917,32 +921,6 @@ pci_dac_dma_supported(struct pci_dev *dev, u64 mask)
        return ok;
 }
-EXPORT_SYMBOL(pci_dac_dma_supported);
-dma64_addr_t
-pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page,
-                    unsigned long offset, int direction)
-{
-        return (alpha_mv.pci_dac_offset
-                + __pa(page_address(page)) 
-                + (dma64_addr_t) offset);
-}
-EXPORT_SYMBOL(pci_dac_page_to_dma);
-struct page *
-pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr)
-{
-        unsigned long paddr = (dma_addr & PAGE_MASK) - alpha_mv.pci_dac_offset;
-        return virt_to_page(__va(paddr));
-}
-EXPORT_SYMBOL(pci_dac_dma_to_page);
-unsigned long
-pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr)
-{
-        return (dma_addr & ~PAGE_MASK);
-}
-EXPORT_SYMBOL(pci_dac_dma_to_offset);
 /* Helper for generic DMA-mapping functions. */
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 50d9f3e4e0f1..482d33f9ce5b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -531,6 +531,9 @@ config PCI
          information about which PCI hardware does work under Linux and which
          doesn't.
+config PCI_SYSCALL
+        def_bool PCI
 # Select the host bridge type
 config PCI_HOST_VIA82C505
        bool
diff --git a/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c b/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
index 0d49d73d1b71..66acd5039918 100644
--- a/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
+++ b/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
@@ -391,8 +391,6 @@ static struct cpufreq_driver nforce2_driver = {
 */
 static unsigned int nforce2_detect_chipset(void)
 {
-        u8 revision;
        nforce2_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
                                        PCI_DEVICE_ID_NVIDIA_NFORCE2,
                                        PCI_ANY_ID, PCI_ANY_ID, NULL);
@@ -400,10 +398,8 @@ static unsigned int nforce2_detect_chipset(void)
        if (nforce2_chipset_dev == NULL)
                return -ENODEV;
-        pci_read_config_byte(nforce2_chipset_dev, PCI_REVISION_ID, &revision);
        printk(KERN_INFO "cpufreq: Detected nForce2 chipset revision %X\n",
-               revision);
+               nforce2_chipset_dev->revision);
        printk(KERN_INFO
               "cpufreq: FSB changing is maybe unstable and can lead to crashes and data loss.\n");
diff --git a/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c b/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
index 6667e9cceb9f..194144539a6f 100644
--- a/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
+++ b/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
@@ -115,7 +115,6 @@ struct gxfreq_params {
        u8 pci_suscfg;
        u8 pci_pmer1;
        u8 pci_pmer2;
-        u8 pci_rev;
        struct pci_dev *cs55x0;
 };
@@ -276,7 +275,7 @@ static void gx_set_cpuspeed(unsigned int khz)
                        pci_write_config_byte(gx_params->cs55x0, PCI_VIDTC, 100);/* typical 50 to 100ms */
                        pci_write_config_byte(gx_params->cs55x0, PCI_PMER1, pmer1);
-                        if (gx_params->pci_rev < 0x10) {   /* CS5530(rev 1.2, 1.3) */
+                        if (gx_params->cs55x0->revision < 0x10) {   /* CS5530(rev 1.2, 1.3) */
                                suscfg = gx_params->pci_suscfg | SUSMOD;
                        } else {                           /* CS5530A,B.. */
                                suscfg = gx_params->pci_suscfg | SUSMOD | PWRSVE;
@@ -471,7 +470,6 @@ static int __init cpufreq_gx_init(void)
        pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2));
        pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration));
        pci_read_config_byte(params->cs55x0, PCI_MODOFF, &(params->off_duration));
-        pci_read_config_byte(params->cs55x0, PCI_REVISION_ID, &params->pci_rev);
        if ((ret = cpufreq_register_driver(&gx_suspmod_driver))) {
                kfree(params);
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c b/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c
index 698f980eb443..a5b2346faf1f 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c
@@ -205,7 +205,6 @@ static unsigned int speedstep_detect_chipset (void)
                 * host brige. Abort on these systems.
                 */
                static struct pci_dev *hostbridge;
-                u8 rev = 0;
                hostbridge  = pci_get_subsys(PCI_VENDOR_ID_INTEL,
                              PCI_DEVICE_ID_INTEL_82815_MC,
@@ -216,8 +215,7 @@ static unsigned int speedstep_detect_chipset (void)
                if (!hostbridge)
                        return 2; /* 2-M */
-                pci_read_config_byte(hostbridge, PCI_REVISION_ID, &rev);
+                if (hostbridge->revision < 5) {
-                if (rev < 5) {
                        dprintk("hostbridge does not support speedstep\n");
                        speedstep_chipset_dev = NULL;
                        pci_dev_put(hostbridge);
diff --git a/arch/i386/mach-visws/traps.c b/arch/i386/mach-visws/traps.c
index 5199bd03254a..843b67acf43b 100644
--- a/arch/i386/mach-visws/traps.c
+++ b/arch/i386/mach-visws/traps.c
@@ -23,13 +23,13 @@ static __init void lithium_init(void)
        set_fixmap(FIX_LI_PCIB, LI_PCI_B_PHYS);
        if ((li_pcia_read16(PCI_VENDOR_ID) != PCI_VENDOR_ID_SGI) ||
-            (li_pcia_read16(PCI_DEVICE_ID) != PCI_VENDOR_ID_SGI_LITHIUM)) {
+            (li_pcia_read16(PCI_DEVICE_ID) != PCI_DEVICE_ID_SGI_LITHIUM)) {
                printk(KERN_EMERG "Lithium hostbridge %c not found\n", 'A');
                panic("This machine is not SGI Visual Workstation 320/540");
        }
        if ((li_pcib_read16(PCI_VENDOR_ID) != PCI_VENDOR_ID_SGI) ||
-            (li_pcib_read16(PCI_DEVICE_ID) != PCI_VENDOR_ID_SGI_LITHIUM)) {
+            (li_pcib_read16(PCI_DEVICE_ID) != PCI_DEVICE_ID_SGI_LITHIUM)) {
                printk(KERN_EMERG "Lithium hostbridge %c not found\n", 'B');
                panic("This machine is not SGI Visual Workstation 320/540");
        }
diff --git a/arch/i386/pci/fixup.c b/arch/i386/pci/fixup.c
index b95b42950ed4..e7306dbf6c42 100644
--- a/arch/i386/pci/fixup.c
+++ b/arch/i386/pci/fixup.c
@@ -118,12 +118,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, pci
 static void pci_fixup_via_northbridge_bug(struct pci_dev *d)
 {
        u8 v;
-        u8 revision;
        int where = 0x55;
        int mask = 0x1f; /* clear bits 5, 6, 7 by default */
-        pci_read_config_byte(d, PCI_REVISION_ID, &revision);
        if (d->device == PCI_DEVICE_ID_VIA_8367_0) {
                /* fix pci bus latency issues resulted by NB bios error
                   it appears on bug free^Wreduced kt266x's bios forces
@@ -133,8 +130,8 @@ static void pci_fixup_via_northbridge_bug(struct pci_dev *d)
                where = 0x95; /* the memory write queue timer register is 
                                different for the KT266x's: 0x95 not 0x55 */
        } else if (d->device == PCI_DEVICE_ID_VIA_8363_0 &&
-                        (revision == VIA_8363_KL133_REVISION_ID || 
+                        (d->revision == VIA_8363_KL133_REVISION_ID ||
-                        revision == VIA_8363_KM133_REVISION_ID)) {
+                        d->revision == VIA_8363_KM133_REVISION_ID)) {
                        mask = 0x3f; /* clear only bits 6 and 7; clearing bit 5
                                        causes screen corruption on the KL133/KM133 */
        }
@@ -142,7 +139,7 @@ static void pci_fixup_via_northbridge_bug(struct pci_dev *d)
        pci_read_config_byte(d, where, &v);
        if (v & ~mask) {
                printk(KERN_WARNING "Disabling VIA memory write queue (PCI ID %04x, rev %02x): [%02x] %02x & %02x -> %02x\n", \
-                        d->device, revision, where, v, mask, v & mask);
+                        d->device, d->revision, where, v, mask, v & mask);
                v &= mask;
                pci_write_config_byte(d, where, v);
        }
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index de1bff659969..db9ddff95841 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -520,8 +520,10 @@ config PCI
          here unless you are using a simulator without PCI support.
 config PCI_DOMAINS
-        bool
+        def_bool PCI
-        default PCI
+config PCI_SYSCALL
+        def_bool PCI
 source "drivers/pci/pcie/Kconfig"
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index f26ede001a0b..c58bd3d036f4 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -2,7 +2,7 @@
 # Makefile for the PCI specific kernel interface routines under Linux.
 #
-obj-y                           += pci.o pci-dac.o
+obj-y                           += pci.o
 #
 # PCI bus host bridge specific code
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c
index 7fc475f7eae5..76b4f0ffb1e5 100644
--- a/arch/mips/pci/fixup-cobalt.c
+++ b/arch/mips/pci/fixup-cobalt.c
@@ -58,8 +58,6 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
 static void qube_raq_galileo_fixup(struct pci_dev *dev)
 {
-        unsigned short galileo_id;
        if (dev->devfn != PCI_DEVFN(0, 0))
                return;
@@ -84,16 +82,14 @@ static void qube_raq_galileo_fixup(struct pci_dev *dev)
         * Therefore we must set the disconnect/retry cycle values to
         * something sensible when using the new Galileo.
         */
-        pci_read_config_word(dev, PCI_REVISION_ID, &galileo_id);
-        galileo_id &= 0xff;     /* mask off class info */
-        printk(KERN_INFO "Galileo: revision %u\n", galileo_id);
+        printk(KERN_INFO "Galileo: revision %u\n", dev->revision);
 #if 0
-        if (galileo_id >= 0x10) {
+        if (dev->revision >= 0x10) {
                /* New Galileo, assumes PCI stop line to VIA is connected. */
                GT_WRITE(GT_PCI0_TOR_OFS, 0x4020);
-        } else if (galileo_id == 0x1 || galileo_id == 0x2)
+        } else if (dev->revision == 0x1 || dev->revision == 0x2)
 #endif
        {
                signed int timeo;
diff --git a/arch/mips/pci/pci-dac.c b/arch/mips/pci/pci-dac.c
deleted file mode 100644
index 0f0ea1b7d4dd..000000000000
--- a/arch/mips/pci/pci-dac.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000  Ani Joshi <ajoshi@unixbox.com>
- * Copyright (C) 2000, 2001, 06  Ralf Baechle <ralf@linux-mips.org>
- * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
- */
-#include <linux/types.h>
-#include <linux/dma-mapping.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <asm/cache.h>
-#include <asm/io.h>
-#include <dma-coherence.h>
-#include <linux/pci.h>
-dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
-        struct page *page, unsigned long offset, int direction)
-{
-        struct device *dev = &pdev->dev;
-        BUG_ON(direction == DMA_NONE);
-        if (!plat_device_is_coherent(dev)) {
-                unsigned long addr;
-                addr = (unsigned long) page_address(page) + offset;
-                dma_cache_wback_inv(addr, PAGE_SIZE);
-        }
-        return plat_map_dma_mem_page(dev, page) + offset;
-}
-EXPORT_SYMBOL(pci_dac_page_to_dma);
-struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
-        dma64_addr_t dma_addr)
-{
-        return pfn_to_page(plat_dma_addr_to_phys(dma_addr) >> PAGE_SHIFT);
-}
-EXPORT_SYMBOL(pci_dac_dma_to_page);
-unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
-        dma64_addr_t dma_addr)
-{
-        return dma_addr & ~PAGE_MASK;
-}
-EXPORT_SYMBOL(pci_dac_dma_to_offset);
-void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev,
-        dma64_addr_t dma_addr, size_t len, int direction)
-{
-        BUG_ON(direction == PCI_DMA_NONE);
-        if (!plat_device_is_coherent(&pdev->dev))
-                dma_cache_wback_inv(dma_addr + PAGE_OFFSET, len);
-}
-EXPORT_SYMBOL(pci_dac_dma_sync_single_for_cpu);
-void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
-        dma64_addr_t dma_addr, size_t len, int direction)
-{
-        BUG_ON(direction == PCI_DMA_NONE);
-        if (!plat_device_is_coherent(&pdev->dev))
-                dma_cache_wback_inv(dma_addr + PAGE_OFFSET, len);
-}
-EXPORT_SYMBOL(pci_dac_dma_sync_single_for_device);
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 5eaeafd30bdf..6beee32144c0 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -698,8 +698,10 @@ config PCI
          infrastructure code to support PCI bus devices.
 config PCI_DOMAINS
-        bool
+        def_bool PCI
-        default PCI
+config PCI_SYSCALL
+        def_bool PCI
 config PCI_QSPAN
        bool "QSpan PCI"
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index e66064b5093a..86982112b0dd 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -1047,10 +1047,10 @@ void pcibios_make_OF_bus_map(void)
 #endif /* CONFIG_PPC_OF */
 /* Add sysfs properties */
-void pcibios_add_platform_entries(struct pci_dev *pdev)
+int pcibios_add_platform_entries(struct pci_dev *pdev)
 {
 #ifdef CONFIG_PPC_OF
-        device_create_file(&pdev->dev, &dev_attr_devspec);
+        return device_create_file(&pdev->dev, &dev_attr_devspec);
 #endif /* CONFIG_PPC_OF */
 }
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 249cca27a9b8..e3009a43ac56 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -367,8 +367,10 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
        sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus),
                dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
        dev->class = get_int_prop(node, "class-code", 0);
+        dev->revision = get_int_prop(node, "revision-id", 0);
        DBG("    class: 0x%x\n", dev->class);
+        DBG("    revision: 0x%x\n", dev->revision);
        dev->current_state = 4;         /* unknown power state */
        dev->error_state = pci_channel_io_normal;
@@ -876,9 +878,9 @@ static ssize_t pci_show_devspec(struct device *dev,
 }
 static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
-void pcibios_add_platform_entries(struct pci_dev *pdev)
+int pcibios_add_platform_entries(struct pci_dev *pdev)
 {
-        device_create_file(&pdev->dev, &dev_attr_devspec);
+        return device_create_file(&pdev->dev, &dev_attr_devspec);
 }
 #define ISA_SPACE_MASK 0x1
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index ccce2a4a1522..6bdeeb70b157 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -1237,8 +1237,10 @@ config PCI
          infrastructure code to support PCI bus devices.
 config PCI_DOMAINS
-        bool
+        def_bool PCI
-        default PCI
+config PCI_SYSCALL
+        def_bool PCI
 config MPC83xx_PCI2
        bool "Support for 2nd PCI host controller"
diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c
index 5e723c4c2571..c2ec13bea006 100644
--- a/arch/ppc/kernel/pci.c
+++ b/arch/ppc/kernel/pci.c
@@ -633,12 +633,6 @@ void pcibios_make_OF_bus_map(void)
 {
 }
-/* Add sysfs properties */
-void pcibios_add_platform_entries(struct pci_dev *pdev)
-{
-}
 static int __init
 pcibios_init(void)
 {
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index fbcc00c6c06e..8567cc901942 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -210,6 +210,9 @@ config PCI
          CP-1200, JavaEngine-1, Corona, Red October, and Serengeti SGSC.
          All of these platforms are extremely obscure, so say N if unsure.
+config PCI_SYSCALL
+        def_bool PCI
 source "drivers/pci/Kconfig"
 endif
diff --git a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig
index 89a1b469b93d..6566d13db04f 100644
--- a/arch/sparc64/Kconfig
+++ b/arch/sparc64/Kconfig
@@ -320,8 +320,10 @@ config PCI
          doesn't.
 config PCI_DOMAINS
-        bool
+        def_bool PCI
-        default PCI
+config PCI_SYSCALL
+        def_bool PCI
 source "drivers/pci/Kconfig"
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index 81f4a5ea05f7..55ad1b899bb8 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -448,6 +448,7 @@ struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
                 */
                pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
                dev->class = class >> 8;
+                dev->revision = class & 0xff;
                sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus),
                        dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
diff --git a/arch/x86_64/kernel/pci-dma.c b/arch/x86_64/kernel/pci-dma.c
index 9f80aad3fe2d..90f6315d02d4 100644
--- a/arch/x86_64/kernel/pci-dma.c
+++ b/arch/x86_64/kernel/pci-dma.c
@@ -22,8 +22,7 @@ EXPORT_SYMBOL(bad_dma_address);
 int iommu_bio_merge __read_mostly = 0;
 EXPORT_SYMBOL(iommu_bio_merge);
-int iommu_sac_force __read_mostly = 0;
+static int iommu_sac_force __read_mostly = 0;
-EXPORT_SYMBOL(iommu_sac_force);
 int no_iommu __read_mostly;
 #ifdef CONFIG_IOMMU_DEBUG