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-rw-r--r--arch/alpha/Kconfig2
-rw-r--r--arch/alpha/kernel/alpha_ksyms.c2
-rw-r--r--arch/alpha/kernel/head.S2
-rw-r--r--arch/alpha/kernel/machvec_impl.h2
-rw-r--r--arch/alpha/lib/dbg_stackcheck.S2
-rw-r--r--arch/alpha/lib/dbg_stackkill.S2
-rw-r--r--arch/alpha/lib/memset.S2
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/boot/compressed/head-clps7500.S2
-rw-r--r--arch/arm/common/sa1111.c2
-rw-r--r--arch/arm/mach-imx/leds.c2
-rw-r--r--arch/arm/mach-imx/leds.h2
-rw-r--r--arch/arm/mach-ixp4xx/coyote-pci.c2
-rw-r--r--arch/arm/mach-ixp4xx/ixdpg425-pci.c2
-rw-r--r--arch/arm/mach-lh7a40x/arch-lpd7a40x.c2
-rw-r--r--arch/arm/mach-omap1/serial.c2
-rw-r--r--arch/arm/mach-omap2/board-apollon.c2
-rw-r--r--arch/arm/mach-omap2/board-generic.c2
-rw-r--r--arch/arm/mach-omap2/board-h4.c2
-rw-r--r--arch/arm/mach-omap2/irq.c2
-rw-r--r--arch/arm/mach-omap2/prcm-regs.h2
-rw-r--r--arch/arm/mach-omap2/serial.c2
-rw-r--r--arch/arm/mach-omap2/sram-fn.S2
-rw-r--r--arch/arm/mach-pxa/corgi_lcd.c2
-rw-r--r--arch/arm/mach-pxa/leds.h2
-rw-r--r--arch/arm/mach-s3c2410/Kconfig2
-rw-r--r--arch/arm/mach-s3c2410/s3c2400-gpio.c2
-rw-r--r--arch/arm/mach-s3c2410/s3c2410-clock.c2
-rw-r--r--arch/arm/mach-s3c2410/s3c2410-gpio.c2
-rw-r--r--arch/arm/mach-s3c2410/s3c2442.c2
-rw-r--r--arch/arm/mach-s3c2410/s3c244x-irq.c2
-rw-r--r--arch/arm/mach-s3c2410/s3c244x.h2
-rw-r--r--arch/arm/mach-s3c2410/usb-simtec.h2
-rw-r--r--arch/arm/mach-sa1100/dma.c2
-rw-r--r--arch/arm/mach-shark/leds.c2
-rw-r--r--arch/arm/plat-omap/sram-fn.S2
-rw-r--r--arch/cris/arch-v10/drivers/Kconfig4
-rw-r--r--arch/cris/arch-v32/Kconfig2
-rw-r--r--arch/h8300/kernel/ints.c2
-rw-r--r--arch/i386/Kconfig2
-rw-r--r--arch/i386/kernel/acpi/boot.c9
-rw-r--r--arch/i386/kernel/cpu/common.c3
-rw-r--r--arch/i386/kernel/efi.c3
-rw-r--r--arch/i386/kernel/i8259.c45
-rw-r--r--arch/i386/kernel/io_apic.c495
-rw-r--r--arch/i386/kernel/irq.c19
-rw-r--r--arch/i386/kernel/ldt.c2
-rw-r--r--arch/i386/kernel/smpboot.c2
-rw-r--r--arch/i386/mach-visws/visws_apic.c2
-rw-r--r--arch/i386/mm/discontig.c3
-rw-r--r--arch/i386/mm/init.c3
-rw-r--r--arch/i386/pci/fixup.c2
-rw-r--r--arch/i386/pci/irq.c34
-rw-r--r--arch/ia64/kernel/Makefile1
-rw-r--r--arch/ia64/kernel/acpi-processor.c2
-rw-r--r--arch/ia64/kernel/entry.S2
-rw-r--r--arch/ia64/kernel/irq_ia64.c22
-rw-r--r--arch/ia64/kernel/msi_ia64.c143
-rw-r--r--arch/ia64/pci/pci.c9
-rw-r--r--arch/ia64/sn/kernel/Makefile1
-rw-r--r--arch/ia64/sn/kernel/msi_sn.c230
-rw-r--r--arch/ia64/sn/kernel/xpnet.c2
-rw-r--r--arch/m68k/mm/motorola.c2
-rw-r--r--arch/m68k/sun3/sun3dvma.c2
-rw-r--r--arch/m68knommu/Kconfig6
-rw-r--r--arch/m68knommu/platform/68328/head-pilot.S2
-rw-r--r--arch/mips/dec/prom/call_o32.S2
-rw-r--r--arch/mips/mm/tlbex.c2
-rw-r--r--arch/mips/pci/fixup-vr4133.c2
-rw-r--r--arch/mips/tx4938/common/irq.c2
-rw-r--r--arch/parisc/kernel/entry.S4
-rw-r--r--arch/powerpc/Kconfig4
-rw-r--r--arch/powerpc/boot/Makefile2
-rw-r--r--arch/powerpc/kernel/perfmon_fsl_booke.c2
-rw-r--r--arch/powerpc/oprofile/op_model_7450.c2
-rw-r--r--arch/powerpc/oprofile/op_model_fsl_booke.c2
-rw-r--r--arch/powerpc/platforms/83xx/mpc834x_sys.h2
-rw-r--r--arch/powerpc/platforms/85xx/mpc8540_ads.h2
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx.h2
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_cds.h2
-rw-r--r--arch/powerpc/sysdev/ipic.c2
-rw-r--r--arch/powerpc/sysdev/mpic.c2
-rw-r--r--arch/ppc/Kconfig4
-rw-r--r--arch/ppc/boot/include/mpsc_defs.h2
-rw-r--r--arch/ppc/platforms/4xx/xparameters/xparameters.h2
-rw-r--r--arch/ppc/platforms/85xx/Kconfig14
-rw-r--r--arch/ppc/platforms/lopec.h2
-rw-r--r--arch/ppc/platforms/mpc8272ads_setup.c2
-rw-r--r--arch/ppc/platforms/mpc885ads_setup.c2
-rw-r--r--arch/ppc/platforms/mvme5100.h2
-rw-r--r--arch/ppc/platforms/powerpmc250.h2
-rw-r--r--arch/ppc/platforms/prpmc750.h2
-rw-r--r--arch/ppc/platforms/prpmc800.h2
-rw-r--r--arch/ppc/platforms/spruce.h2
-rw-r--r--arch/sh/boards/bigsur/io.c2
-rw-r--r--arch/sh/boards/bigsur/led.c2
-rw-r--r--arch/sh/boards/ec3104/io.c2
-rw-r--r--arch/sh/boards/hp6xx/setup.c2
-rw-r--r--arch/sh/boards/mpc1211/led.c2
-rw-r--r--arch/sh/boards/mpc1211/setup.c2
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/io.c2
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/pci.c2
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/led.c2
-rw-r--r--arch/sh/boards/renesas/systemh/io.c2
-rw-r--r--arch/sh/boards/renesas/systemh/irq.c2
-rw-r--r--arch/sh/boards/renesas/systemh/setup.c2
-rw-r--r--arch/sh/boards/se/770x/led.c2
-rw-r--r--arch/sh/boards/se/7751/led.c2
-rw-r--r--arch/sh/boards/se/7751/pci.c2
-rw-r--r--arch/sh/boards/superh/microdev/io.c2
-rw-r--r--arch/sh/boards/superh/microdev/led.c2
-rw-r--r--arch/sh/drivers/dma/dma-pvr2.c2
-rw-r--r--arch/sh/drivers/pci/dma-dreamcast.c2
-rw-r--r--arch/sh/drivers/pci/fixups-dreamcast.c2
-rw-r--r--arch/sh/drivers/pci/ops-bigsur.c2
-rw-r--r--arch/sh/drivers/pci/ops-dreamcast.c2
-rw-r--r--arch/sh/drivers/pci/ops-rts7751r2d.c2
-rw-r--r--arch/sh/kernel/cpu/ubc.S2
-rw-r--r--arch/sh64/boot/compressed/misc.c2
-rw-r--r--arch/sh64/kernel/alphanum.c2
-rw-r--r--arch/sh64/lib/c-checksum.c2
-rw-r--r--arch/sh64/mach-cayman/led.c2
-rw-r--r--arch/sh64/oprofile/op_model_null.c2
-rw-r--r--arch/sparc/kernel/sys_solaris.c2
-rw-r--r--arch/um/Kconfig2
-rw-r--r--arch/um/Makefile2
-rw-r--r--arch/um/drivers/line.c2
-rw-r--r--arch/um/include/sysdep-x86_64/ptrace_user.h2
-rw-r--r--arch/v850/kernel/entry.S2
-rw-r--r--arch/x86_64/Kconfig2
-rw-r--r--arch/x86_64/kernel/i8259.c108
-rw-r--r--arch/x86_64/kernel/io_apic.c694
-rw-r--r--arch/x86_64/kernel/irq.c14
-rw-r--r--arch/x86_64/kernel/mpparse.c42
-rw-r--r--arch/xtensa/Kconfig4
-rw-r--r--arch/xtensa/kernel/module.c2
-rw-r--r--arch/xtensa/kernel/pci-dma.c2
-rw-r--r--arch/xtensa/kernel/pci.c2
-rw-r--r--arch/xtensa/kernel/setup.c2
-rw-r--r--arch/xtensa/kernel/syscalls.c2
-rw-r--r--arch/xtensa/lib/pci-auto.c2
-rw-r--r--arch/xtensa/lib/usercopy.S4
-rw-r--r--arch/xtensa/mm/pgtable.c2
-rw-r--r--arch/xtensa/mm/tlb.c2
144 files changed, 1347 insertions, 809 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 2b36afd8e969..7e55ea66c6d4 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -534,7 +534,7 @@ config ARCH_DISCONTIGMEM_ENABLE
534 bool "Discontiguous Memory Support (EXPERIMENTAL)" 534 bool "Discontiguous Memory Support (EXPERIMENTAL)"
535 depends on EXPERIMENTAL 535 depends on EXPERIMENTAL
536 help 536 help
537 Say Y to upport efficient handling of discontiguous physical memory, 537 Say Y to support efficient handling of discontiguous physical memory,
538 for architectures which are either NUMA (Non-Uniform Memory Access) 538 for architectures which are either NUMA (Non-Uniform Memory Access)
539 or have huge holes in the physical address space for other reasons. 539 or have huge holes in the physical address space for other reasons.
540 See <file:Documentation/vm/numa> for more. 540 See <file:Documentation/vm/numa> for more.
diff --git a/arch/alpha/kernel/alpha_ksyms.c b/arch/alpha/kernel/alpha_ksyms.c
index dbe327d32b6f..8b02420f732e 100644
--- a/arch/alpha/kernel/alpha_ksyms.c
+++ b/arch/alpha/kernel/alpha_ksyms.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/alpha/kernel/ksyms.c 2 * linux/arch/alpha/kernel/alpha_ksyms.c
3 * 3 *
4 * Export the alpha-specific functions that are needed for loadable 4 * Export the alpha-specific functions that are needed for loadable
5 * modules. 5 * modules.
diff --git a/arch/alpha/kernel/head.S b/arch/alpha/kernel/head.S
index 1e2a62a1f75f..e27d23c74ba8 100644
--- a/arch/alpha/kernel/head.S
+++ b/arch/alpha/kernel/head.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * alpha/boot/head.S 2 * arch/alpha/kernel/head.S
3 * 3 *
4 * initial boot stuff.. At this point, the bootloader has already 4 * initial boot stuff.. At this point, the bootloader has already
5 * switched into OSF/1 PAL-code, and loaded us at the correct address 5 * switched into OSF/1 PAL-code, and loaded us at the correct address
diff --git a/arch/alpha/kernel/machvec_impl.h b/arch/alpha/kernel/machvec_impl.h
index 08b8302e64ca..0caa45aa128d 100644
--- a/arch/alpha/kernel/machvec_impl.h
+++ b/arch/alpha/kernel/machvec_impl.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/alpha/kernel/machvec.h 2 * linux/arch/alpha/kernel/machvec_impl.h
3 * 3 *
4 * Copyright (C) 1997, 1998 Richard Henderson 4 * Copyright (C) 1997, 1998 Richard Henderson
5 * 5 *
diff --git a/arch/alpha/lib/dbg_stackcheck.S b/arch/alpha/lib/dbg_stackcheck.S
index 3c1f3e6522e5..78f6b924ad8f 100644
--- a/arch/alpha/lib/dbg_stackcheck.S
+++ b/arch/alpha/lib/dbg_stackcheck.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/alpha/lib/stackcheck.S 2 * arch/alpha/lib/dbg_stackcheck.S
3 * Contributed by Richard Henderson (rth@tamu.edu) 3 * Contributed by Richard Henderson (rth@tamu.edu)
4 * 4 *
5 * Verify that we have not overflowed the stack. Oops if we have. 5 * Verify that we have not overflowed the stack. Oops if we have.
diff --git a/arch/alpha/lib/dbg_stackkill.S b/arch/alpha/lib/dbg_stackkill.S
index e9f6a9dcf2b7..c1e40a1a43d5 100644
--- a/arch/alpha/lib/dbg_stackkill.S
+++ b/arch/alpha/lib/dbg_stackkill.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/alpha/lib/killstack.S 2 * arch/alpha/lib/dbg_stackkill.S
3 * Contributed by Richard Henderson (rth@cygnus.com) 3 * Contributed by Richard Henderson (rth@cygnus.com)
4 * 4 *
5 * Clobber the balance of the kernel stack, hoping to catch 5 * Clobber the balance of the kernel stack, hoping to catch
diff --git a/arch/alpha/lib/memset.S b/arch/alpha/lib/memset.S
index 8ff6e7e1773e..311b8cfc6914 100644
--- a/arch/alpha/lib/memset.S
+++ b/arch/alpha/lib/memset.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/alpha/memset.S 2 * linux/arch/alpha/lib/memset.S
3 * 3 *
4 * This is an efficient (and small) implementation of the C library "memset()" 4 * This is an efficient (and small) implementation of the C library "memset()"
5 * function for the alpha. 5 * function for the alpha.
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f9362ee9955f..adb05de40e24 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -629,7 +629,7 @@ config ALIGNMENT_TRAP
629 depends on CPU_CP15_MMU 629 depends on CPU_CP15_MMU
630 default y if !ARCH_EBSA110 630 default y if !ARCH_EBSA110
631 help 631 help
632 ARM processors can not fetch/store information which is not 632 ARM processors cannot fetch/store information which is not
633 naturally aligned on the bus, i.e., a 4 byte fetch must start at an 633 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
634 address divisible by 4. On 32-bit ARM processors, these non-aligned 634 address divisible by 4. On 32-bit ARM processors, these non-aligned
635 fetch/store instructions will be emulated in software if you say 635 fetch/store instructions will be emulated in software if you say
diff --git a/arch/arm/boot/compressed/head-clps7500.S b/arch/arm/boot/compressed/head-clps7500.S
index 941c5f5cbacf..4f3c78ac30a0 100644
--- a/arch/arm/boot/compressed/head-clps7500.S
+++ b/arch/arm/boot/compressed/head-clps7500.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/boot/compressed/head.S 2 * linux/arch/arm/boot/compressed/head-clps7500.S
3 * 3 *
4 * Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd 4 * Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
5 */ 5 */
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 29818bd3248f..30046ad41ced 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-sa1100/sa1111.c 2 * linux/arch/arm/common/sa1111.c
3 * 3 *
4 * SA1111 support 4 * SA1111 support
5 * 5 *
diff --git a/arch/arm/mach-imx/leds.c b/arch/arm/mach-imx/leds.c
index 471c1db7c57f..cf30803e019b 100644
--- a/arch/arm/mach-imx/leds.c
+++ b/arch/arm/mach-imx/leds.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-imx/leds.h 2 * linux/arch/arm/mach-imx/leds.c
3 * 3 *
4 * Copyright (C) 2004 Sascha Hauer <sascha@saschahauer.de> 4 * Copyright (C) 2004 Sascha Hauer <sascha@saschahauer.de>
5 * 5 *
diff --git a/arch/arm/mach-imx/leds.h b/arch/arm/mach-imx/leds.h
index 83fa21e795a9..49dc1c1da338 100644
--- a/arch/arm/mach-imx/leds.h
+++ b/arch/arm/mach-imx/leds.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-arm/arch-imx/leds.h 2 * arch/arm/mach-imx/leds.h
3 * 3 *
4 * Copyright (c) 2004 Sascha Hauer <sascha@saschahauer.de> 4 * Copyright (c) 2004 Sascha Hauer <sascha@saschahauer.de>
5 * 5 *
diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c
index 2cebb2878895..7bc94f3def1c 100644
--- a/arch/arm/mach-ixp4xx/coyote-pci.c
+++ b/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arch/mach-ixp4xx/coyote-pci.c 2 * arch/arm/mach-ixp4xx/coyote-pci.c
3 * 3 *
4 * PCI setup routines for ADI Engineering Coyote platform 4 * PCI setup routines for ADI Engineering Coyote platform
5 * 5 *
diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
index ed5270800217..509a95a692a4 100644
--- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arch/mach-ixp4xx/ixdpg425-pci.c 2 * arch/arm/mach-ixp4xx/ixdpg425-pci.c
3 * 3 *
4 * PCI setup routines for Intel IXDPG425 Platform 4 * PCI setup routines for Intel IXDPG425 Platform
5 * 5 *
diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
index a6910114b24c..a21b12f06c6b 100644
--- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
@@ -164,7 +164,7 @@ static void lh7a40x_ack_cpld_irq (u32 irq)
164 /* CPLD doesn't have ack capability, but some devices may */ 164 /* CPLD doesn't have ack capability, but some devices may */
165 165
166#if defined (CPLD_INTMASK_TOUCH) 166#if defined (CPLD_INTMASK_TOUCH)
167 /* The touch control *must* mask the the interrupt because the 167 /* The touch control *must* mask the interrupt because the
168 * interrupt bit is read by the driver to determine if the pen 168 * interrupt bit is read by the driver to determine if the pen
169 * is still down. */ 169 * is still down. */
170 if (irq == IRQ_TOUCH) 170 if (irq == IRQ_TOUCH)
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 976edfb882e2..c4b790217a5b 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-omap1/id.c 2 * linux/arch/arm/mach-omap1/serial.c
3 * 3 *
4 * OMAP1 CPU identification code 4 * OMAP1 CPU identification code
5 * 5 *
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 2db6b732b084..c37b0e6d1248 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-omap/omap2/board-apollon.c 2 * linux/arch/arm/mach-omap2/board-apollon.c
3 * 3 *
4 * Copyright (C) 2005,2006 Samsung Electronics 4 * Copyright (C) 2005,2006 Samsung Electronics
5 * Author: Kyungmin Park <kyungmin.park@samsung.com> 5 * Author: Kyungmin Park <kyungmin.park@samsung.com>
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index eaecbf422d8c..90938151bcf1 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-omap/omap2/board-generic.c 2 * linux/arch/arm/mach-omap2/board-generic.c
3 * 3 *
4 * Copyright (C) 2005 Nokia Corporation 4 * Copyright (C) 2005 Nokia Corporation
5 * Author: Paul Mundt <paul.mundt@nokia.com> 5 * Author: Paul Mundt <paul.mundt@nokia.com>
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 996aeda1285d..26a95a642ad7 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-omap/omap2/board-h4.c 2 * linux/arch/arm/mach-omap2/board-h4.c
3 * 3 *
4 * Copyright (C) 2005 Nokia Corporation 4 * Copyright (C) 2005 Nokia Corporation
5 * Author: Paul Mundt <paul.mundt@nokia.com> 5 * Author: Paul Mundt <paul.mundt@nokia.com>
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 1ed2fff4691a..11870093d7a1 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-omap/omap2/irq.c 2 * linux/arch/arm/mach-omap2/irq.c
3 * 3 *
4 * Interrupt handler for OMAP2 boards. 4 * Interrupt handler for OMAP2 boards.
5 * 5 *
diff --git a/arch/arm/mach-omap2/prcm-regs.h b/arch/arm/mach-omap2/prcm-regs.h
index 22ac7be4f782..5e1c4b53ee9d 100644
--- a/arch/arm/mach-omap2/prcm-regs.h
+++ b/arch/arm/mach-omap2/prcm-regs.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-omap2/prcm-reg.h 2 * linux/arch/arm/mach-omap2/prcm-regs.h
3 * 3 *
4 * OMAP24XX Power Reset and Clock Management (PRCM) registers 4 * OMAP24XX Power Reset and Clock Management (PRCM) registers
5 * 5 *
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 0884bc7c23b7..aaa5589e8169 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-omap/omap2/serial.c 2 * arch/arm/mach-omap2/serial.c
3 * 3 *
4 * OMAP2 serial support. 4 * OMAP2 serial support.
5 * 5 *
diff --git a/arch/arm/mach-omap2/sram-fn.S b/arch/arm/mach-omap2/sram-fn.S
index a5ef7f611da9..b27576690f8d 100644
--- a/arch/arm/mach-omap2/sram-fn.S
+++ b/arch/arm/mach-omap2/sram-fn.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-omap2/sram.S 2 * linux/arch/arm/mach-omap2/sram-fn.S
3 * 3 *
4 * Omap2 specific functions that need to be run in internal SRAM 4 * Omap2 specific functions that need to be run in internal SRAM
5 * 5 *
diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c
index d7815491b752..a72476c24621 100644
--- a/arch/arm/mach-pxa/corgi_lcd.c
+++ b/arch/arm/mach-pxa/corgi_lcd.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/video/w100fb.c 2 * linux/arch/arm/mach-pxa/corgi_lcd.c
3 * 3 *
4 * Corgi/Spitz LCD Specific Code 4 * Corgi/Spitz LCD Specific Code
5 * 5 *
diff --git a/arch/arm/mach-pxa/leds.h b/arch/arm/mach-pxa/leds.h
index 4f829b8c39dd..7f0dfe01345a 100644
--- a/arch/arm/mach-pxa/leds.h
+++ b/arch/arm/mach-pxa/leds.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-arm/arch-pxa/leds.h 2 * arch/arm/mach-pxa/leds.h
3 * 3 *
4 * Copyright (c) 2001 Jeff Sutherland, Accelent Systems Inc. 4 * Copyright (c) 2001 Jeff Sutherland, Accelent Systems Inc.
5 * 5 *
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index df37594c30f8..63965c78de8c 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -13,7 +13,7 @@ config MACH_ANUBIS
13 bool "Simtec Electronics ANUBIS" 13 bool "Simtec Electronics ANUBIS"
14 select CPU_S3C2440 14 select CPU_S3C2440
15 help 15 help
16 Say Y gere if you are using the Simtec Electronics ANUBIS 16 Say Y here if you are using the Simtec Electronics ANUBIS
17 development system 17 development system
18 18
19config MACH_OSIRIS 19config MACH_OSIRIS
diff --git a/arch/arm/mach-s3c2410/s3c2400-gpio.c b/arch/arm/mach-s3c2410/s3c2400-gpio.c
index f2a78175a70a..1576d01d5f82 100644
--- a/arch/arm/mach-s3c2410/s3c2400-gpio.c
+++ b/arch/arm/mach-s3c2410/s3c2400-gpio.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c2410/gpio.c 1/* linux/arch/arm/mach-s3c2410/s3c2400-gpio.c
2 * 2 *
3 * Copyright (c) 2006 Lucas Correia Villa Real <lucasvr@gobolinux.org> 3 * Copyright (c) 2006 Lucas Correia Villa Real <lucasvr@gobolinux.org>
4 * 4 *
diff --git a/arch/arm/mach-s3c2410/s3c2410-clock.c b/arch/arm/mach-s3c2410/s3c2410-clock.c
index 99718663318e..00abe199a08e 100644
--- a/arch/arm/mach-s3c2410/s3c2410-clock.c
+++ b/arch/arm/mach-s3c2410/s3c2410-clock.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c2410/clock.c 1/* linux/arch/arm/mach-s3c2410/s3c2410-clock.c
2 * 2 *
3 * Copyright (c) 2006 Simtec Electronics 3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/mach-s3c2410/s3c2410-gpio.c b/arch/arm/mach-s3c2410/s3c2410-gpio.c
index 471a71490010..a2098f692d83 100644
--- a/arch/arm/mach-s3c2410/s3c2410-gpio.c
+++ b/arch/arm/mach-s3c2410/s3c2410-gpio.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c2410/gpio.c 1/* linux/arch/arm/mach-s3c2410/s3c2410-gpio.c
2 * 2 *
3 * Copyright (c) 2004-2006 Simtec Electronics 3 * Copyright (c) 2004-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/mach-s3c2410/s3c2442.c b/arch/arm/mach-s3c2410/s3c2442.c
index debae2430557..581667efd13c 100644
--- a/arch/arm/mach-s3c2410/s3c2442.c
+++ b/arch/arm/mach-s3c2410/s3c2442.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c2410/s3c2440.c 1/* linux/arch/arm/mach-s3c2410/s3c2442.c
2 * 2 *
3 * Copyright (c) 2006 Simtec Electronics 3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/mach-s3c2410/s3c244x-irq.c b/arch/arm/mach-s3c2410/s3c244x-irq.c
index 0d13546c3500..ec702f88b299 100644
--- a/arch/arm/mach-s3c2410/s3c244x-irq.c
+++ b/arch/arm/mach-s3c2410/s3c244x-irq.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c2410/s3c2440-irq.c 1/* linux/arch/arm/mach-s3c2410/s3c244x-irq.c
2 * 2 *
3 * Copyright (c) 2003,2004 Simtec Electronics 3 * Copyright (c) 2003,2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/mach-s3c2410/s3c244x.h b/arch/arm/mach-s3c2410/s3c244x.h
index 3e7f5f75134d..1488c1eb37e6 100644
--- a/arch/arm/mach-s3c2410/s3c244x.h
+++ b/arch/arm/mach-s3c2410/s3c244x.h
@@ -1,4 +1,4 @@
1/* arch/arm/mach-s3c2410/s3c2440.h 1/* arch/arm/mach-s3c2410/s3c244x.h
2 * 2 *
3 * Copyright (c) 2004-2005 Simtec Electronics 3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/mach-s3c2410/usb-simtec.h b/arch/arm/mach-s3c2410/usb-simtec.h
index 92c0cc83aeec..d8aa6127dedb 100644
--- a/arch/arm/mach-s3c2410/usb-simtec.h
+++ b/arch/arm/mach-s3c2410/usb-simtec.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c2410/usb-simtec.c 1/* linux/arch/arm/mach-s3c2410/usb-simtec.h
2 * 2 *
3 * Copyright (c) 2004 Simtec Electronics 3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/mach-sa1100/dma.c b/arch/arm/mach-sa1100/dma.c
index 3c6441d4bc59..2ea2a657a034 100644
--- a/arch/arm/mach-sa1100/dma.c
+++ b/arch/arm/mach-sa1100/dma.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/kernel/dma-sa1100.c 2 * arch/arm/mach-sa1100/dma.c
3 * 3 *
4 * Support functions for the SA11x0 internal DMA channels. 4 * Support functions for the SA11x0 internal DMA channels.
5 * 5 *
diff --git a/arch/arm/mach-shark/leds.c b/arch/arm/mach-shark/leds.c
index 7cd86d357a3c..5386a81f796a 100644
--- a/arch/arm/mach-shark/leds.c
+++ b/arch/arm/mach-shark/leds.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/kernel/leds-shark.c 2 * arch/arm/mach-shark/leds.c
3 * by Alexander Schulz 3 * by Alexander Schulz
4 * 4 *
5 * derived from: 5 * derived from:
diff --git a/arch/arm/plat-omap/sram-fn.S b/arch/arm/plat-omap/sram-fn.S
index 85cffe2c6266..9e1813c77e05 100644
--- a/arch/arm/plat-omap/sram-fn.S
+++ b/arch/arm/plat-omap/sram-fn.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/plat-omap/sram.S 2 * linux/arch/arm/plat-omap/sram-fn.S
3 * 3 *
4 * Functions that need to be run in internal SRAM 4 * Functions that need to be run in internal SRAM
5 * 5 *
diff --git a/arch/cris/arch-v10/drivers/Kconfig b/arch/cris/arch-v10/drivers/Kconfig
index 8b50e8402954..734d5f3a5304 100644
--- a/arch/cris/arch-v10/drivers/Kconfig
+++ b/arch/cris/arch-v10/drivers/Kconfig
@@ -550,7 +550,7 @@ config ETRAX_IDE
550 select BLK_DEV_IDEDMA 550 select BLK_DEV_IDEDMA
551 help 551 help
552 Enable this to get support for ATA/IDE. 552 Enable this to get support for ATA/IDE.
553 You can't use paralell ports or SCSI ports 553 You can't use parallel ports or SCSI ports
554 at the same time. 554 at the same time.
555 555
556 556
@@ -744,7 +744,7 @@ config ETRAX_PA_CHANGEABLE_BITS
744 default "FF" 744 default "FF"
745 help 745 help
746 This is a bitmask with information of what bits in PA that a user 746 This is a bitmask with information of what bits in PA that a user
747 can change change the value on using ioctl's. 747 can change the value on using ioctl's.
748 Bit set = changeable. 748 Bit set = changeable.
749 You probably want 00 here. 749 You probably want 00 here.
750 750
diff --git a/arch/cris/arch-v32/Kconfig b/arch/cris/arch-v32/Kconfig
index 22f0ddc04c50..4f79d8ed3e1c 100644
--- a/arch/cris/arch-v32/Kconfig
+++ b/arch/cris/arch-v32/Kconfig
@@ -162,7 +162,7 @@ config ETRAX_SDRAM_GRP1_CONFIG
162 depends on ETRAX_ARCH_V32 162 depends on ETRAX_ARCH_V32
163 default "0" 163 default "0"
164 help 164 help
165 SDRAM configuration for group 1. The defult value is 0 165 SDRAM configuration for group 1. The default value is 0
166 because group 1 is not used in the default configuration, 166 because group 1 is not used in the default configuration,
167 described in the help for SDRAM_GRP0_CONFIG. 167 described in the help for SDRAM_GRP0_CONFIG.
168 168
diff --git a/arch/h8300/kernel/ints.c b/arch/h8300/kernel/ints.c
index 1488b6ace18c..1bfc77e391d5 100644
--- a/arch/h8300/kernel/ints.c
+++ b/arch/h8300/kernel/ints.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/h8300/platform/h8300h/ints.c 2 * linux/arch/h8300/kernel/ints.c
3 * 3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp> 4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 * 5 *
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index af219e51734f..8ff1c6fb5aa1 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -682,7 +682,7 @@ config EFI
682 depends on ACPI 682 depends on ACPI
683 default n 683 default n
684 ---help--- 684 ---help---
685 This enables the the kernel to boot on EFI platforms using 685 This enables the kernel to boot on EFI platforms using
686 system configuration information passed to it from the firmware. 686 system configuration information passed to it from the firmware.
687 This also enables the kernel to use any EFI runtime services that are 687 This also enables the kernel to use any EFI runtime services that are
688 available (such as the EFI variable services). 688 available (such as the EFI variable services).
diff --git a/arch/i386/kernel/acpi/boot.c b/arch/i386/kernel/acpi/boot.c
index 1aaea6ab8c46..92f79cdd9a48 100644
--- a/arch/i386/kernel/acpi/boot.c
+++ b/arch/i386/kernel/acpi/boot.c
@@ -62,8 +62,6 @@ static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) { return
62#include <mach_mpparse.h> 62#include <mach_mpparse.h>
63#endif /* CONFIG_X86_LOCAL_APIC */ 63#endif /* CONFIG_X86_LOCAL_APIC */
64 64
65static inline int gsi_irq_sharing(int gsi) { return gsi; }
66
67#endif /* X86 */ 65#endif /* X86 */
68 66
69#define BAD_MADT_ENTRY(entry, end) ( \ 67#define BAD_MADT_ENTRY(entry, end) ( \
@@ -468,12 +466,7 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
468 466
469int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) 467int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
470{ 468{
471#ifdef CONFIG_X86_IO_APIC 469 *irq = gsi;
472 if (use_pci_vector() && !platform_legacy_irq(gsi))
473 *irq = IO_APIC_VECTOR(gsi);
474 else
475#endif
476 *irq = gsi_irq_sharing(gsi);
477 return 0; 470 return 0;
478} 471}
479 472
diff --git a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c
index b2f24d57fddd..d9f3e3c31f05 100644
--- a/arch/i386/kernel/cpu/common.c
+++ b/arch/i386/kernel/cpu/common.c
@@ -669,8 +669,7 @@ old_gdt:
669 */ 669 */
670 atomic_inc(&init_mm.mm_count); 670 atomic_inc(&init_mm.mm_count);
671 current->active_mm = &init_mm; 671 current->active_mm = &init_mm;
672 if (current->mm) 672 BUG_ON(current->mm);
673 BUG();
674 enter_lazy_tlb(&init_mm, current); 673 enter_lazy_tlb(&init_mm, current);
675 674
676 load_esp0(t, thread); 675 load_esp0(t, thread);
diff --git a/arch/i386/kernel/efi.c b/arch/i386/kernel/efi.c
index f9436989473c..8b40648d0ef0 100644
--- a/arch/i386/kernel/efi.c
+++ b/arch/i386/kernel/efi.c
@@ -498,8 +498,7 @@ void __init efi_enter_virtual_mode(void)
498 check_range_for_systab(md); 498 check_range_for_systab(md);
499 } 499 }
500 500
501 if (!efi.systab) 501 BUG_ON(!efi.systab);
502 BUG();
503 502
504 status = phys_efi_set_virtual_address_map( 503 status = phys_efi_set_virtual_address_map(
505 memmap.desc_size * memmap.nr_map, 504 memmap.desc_size * memmap.nr_map,
diff --git a/arch/i386/kernel/i8259.c b/arch/i386/kernel/i8259.c
index ea5f4e7958d8..d07ed31f11e3 100644
--- a/arch/i386/kernel/i8259.c
+++ b/arch/i386/kernel/i8259.c
@@ -34,35 +34,15 @@
34 * moves to arch independent land 34 * moves to arch independent land
35 */ 35 */
36 36
37DEFINE_SPINLOCK(i8259A_lock);
38
39static void end_8259A_irq (unsigned int irq)
40{
41 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) &&
42 irq_desc[irq].action)
43 enable_8259A_irq(irq);
44}
45
46#define shutdown_8259A_irq disable_8259A_irq
47
48static int i8259A_auto_eoi; 37static int i8259A_auto_eoi;
49 38DEFINE_SPINLOCK(i8259A_lock);
50static void mask_and_ack_8259A(unsigned int); 39static void mask_and_ack_8259A(unsigned int);
51 40
52unsigned int startup_8259A_irq(unsigned int irq) 41static struct irq_chip i8259A_chip = {
53{ 42 .name = "XT-PIC",
54 enable_8259A_irq(irq); 43 .mask = disable_8259A_irq,
55 return 0; /* never anything pending */ 44 .unmask = enable_8259A_irq,
56} 45 .mask_ack = mask_and_ack_8259A,
57
58static struct hw_interrupt_type i8259A_irq_type = {
59 .typename = "XT-PIC",
60 .startup = startup_8259A_irq,
61 .shutdown = shutdown_8259A_irq,
62 .enable = enable_8259A_irq,
63 .disable = disable_8259A_irq,
64 .ack = mask_and_ack_8259A,
65 .end = end_8259A_irq,
66}; 46};
67 47
68/* 48/*
@@ -133,7 +113,7 @@ void make_8259A_irq(unsigned int irq)
133{ 113{
134 disable_irq_nosync(irq); 114 disable_irq_nosync(irq);
135 io_apic_irqs &= ~(1<<irq); 115 io_apic_irqs &= ~(1<<irq);
136 irq_desc[irq].chip = &i8259A_irq_type; 116 set_irq_chip_and_handler(irq, &i8259A_chip, handle_level_irq);
137 enable_irq(irq); 117 enable_irq(irq);
138} 118}
139 119
@@ -327,12 +307,12 @@ void init_8259A(int auto_eoi)
327 outb_p(SLAVE_ICW4_DEFAULT, PIC_SLAVE_IMR); /* (slave's support for AEOI in flat mode is to be investigated) */ 307 outb_p(SLAVE_ICW4_DEFAULT, PIC_SLAVE_IMR); /* (slave's support for AEOI in flat mode is to be investigated) */
328 if (auto_eoi) 308 if (auto_eoi)
329 /* 309 /*
330 * in AEOI mode we just have to mask the interrupt 310 * In AEOI mode we just have to mask the interrupt
331 * when acking. 311 * when acking.
332 */ 312 */
333 i8259A_irq_type.ack = disable_8259A_irq; 313 i8259A_chip.mask_ack = disable_8259A_irq;
334 else 314 else
335 i8259A_irq_type.ack = mask_and_ack_8259A; 315 i8259A_chip.mask_ack = mask_and_ack_8259A;
336 316
337 udelay(100); /* wait for 8259A to initialize */ 317 udelay(100); /* wait for 8259A to initialize */
338 318
@@ -389,12 +369,13 @@ void __init init_ISA_irqs (void)
389 /* 369 /*
390 * 16 old-style INTA-cycle interrupts: 370 * 16 old-style INTA-cycle interrupts:
391 */ 371 */
392 irq_desc[i].chip = &i8259A_irq_type; 372 set_irq_chip_and_handler(i, &i8259A_chip,
373 handle_level_irq);
393 } else { 374 } else {
394 /* 375 /*
395 * 'high' PCI IRQs filled in on demand 376 * 'high' PCI IRQs filled in on demand
396 */ 377 */
397 irq_desc[i].chip = &no_irq_type; 378 irq_desc[i].chip = &no_irq_chip;
398 } 379 }
399 } 380 }
400} 381}
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c
index fd0df75cfbda..b7287fb499f3 100644
--- a/arch/i386/kernel/io_apic.c
+++ b/arch/i386/kernel/io_apic.c
@@ -31,6 +31,9 @@
31#include <linux/acpi.h> 31#include <linux/acpi.h>
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/sysdev.h> 33#include <linux/sysdev.h>
34#include <linux/pci.h>
35#include <linux/msi.h>
36#include <linux/htirq.h>
34 37
35#include <asm/io.h> 38#include <asm/io.h>
36#include <asm/smp.h> 39#include <asm/smp.h>
@@ -38,6 +41,8 @@
38#include <asm/timer.h> 41#include <asm/timer.h>
39#include <asm/i8259.h> 42#include <asm/i8259.h>
40#include <asm/nmi.h> 43#include <asm/nmi.h>
44#include <asm/msidef.h>
45#include <asm/hypertransport.h>
41 46
42#include <mach_apic.h> 47#include <mach_apic.h>
43#include <mach_apicdef.h> 48#include <mach_apicdef.h>
@@ -86,15 +91,6 @@ static struct irq_pin_list {
86 int apic, pin, next; 91 int apic, pin, next;
87} irq_2_pin[PIN_MAP_SIZE]; 92} irq_2_pin[PIN_MAP_SIZE];
88 93
89int vector_irq[NR_VECTORS] __read_mostly = { [0 ... NR_VECTORS - 1] = -1};
90#ifdef CONFIG_PCI_MSI
91#define vector_to_irq(vector) \
92 (platform_legacy_irq(vector) ? vector : vector_irq[vector])
93#else
94#define vector_to_irq(vector) (vector)
95#endif
96
97
98union entry_union { 94union entry_union {
99 struct { u32 w1, w2; }; 95 struct { u32 w1, w2; };
100 struct IO_APIC_route_entry entry; 96 struct IO_APIC_route_entry entry;
@@ -280,7 +276,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask)
280 break; 276 break;
281 entry = irq_2_pin + entry->next; 277 entry = irq_2_pin + entry->next;
282 } 278 }
283 set_irq_info(irq, cpumask); 279 set_native_irq_info(irq, cpumask);
284 spin_unlock_irqrestore(&ioapic_lock, flags); 280 spin_unlock_irqrestore(&ioapic_lock, flags);
285} 281}
286 282
@@ -1181,46 +1177,45 @@ static inline int IO_APIC_irq_trigger(int irq)
1181/* irq_vectors is indexed by the sum of all RTEs in all I/O APICs. */ 1177/* irq_vectors is indexed by the sum of all RTEs in all I/O APICs. */
1182u8 irq_vector[NR_IRQ_VECTORS] __read_mostly = { FIRST_DEVICE_VECTOR , 0 }; 1178u8 irq_vector[NR_IRQ_VECTORS] __read_mostly = { FIRST_DEVICE_VECTOR , 0 };
1183 1179
1184int assign_irq_vector(int irq) 1180static int __assign_irq_vector(int irq)
1185{ 1181{
1186 static int current_vector = FIRST_DEVICE_VECTOR, offset = 0; 1182 static int current_vector = FIRST_DEVICE_VECTOR, offset = 0;
1187 unsigned long flags;
1188 int vector; 1183 int vector;
1189 1184
1190 BUG_ON(irq != AUTO_ASSIGN && (unsigned)irq >= NR_IRQ_VECTORS); 1185 BUG_ON((unsigned)irq >= NR_IRQ_VECTORS);
1191 1186
1192 spin_lock_irqsave(&vector_lock, flags); 1187 if (IO_APIC_VECTOR(irq) > 0)
1193
1194 if (irq != AUTO_ASSIGN && IO_APIC_VECTOR(irq) > 0) {
1195 spin_unlock_irqrestore(&vector_lock, flags);
1196 return IO_APIC_VECTOR(irq); 1188 return IO_APIC_VECTOR(irq);
1197 } 1189
1198next:
1199 current_vector += 8; 1190 current_vector += 8;
1200 if (current_vector == SYSCALL_VECTOR) 1191 if (current_vector == SYSCALL_VECTOR)
1201 goto next; 1192 current_vector += 8;
1202 1193
1203 if (current_vector >= FIRST_SYSTEM_VECTOR) { 1194 if (current_vector >= FIRST_SYSTEM_VECTOR) {
1204 offset++; 1195 offset++;
1205 if (!(offset%8)) { 1196 if (!(offset % 8))
1206 spin_unlock_irqrestore(&vector_lock, flags);
1207 return -ENOSPC; 1197 return -ENOSPC;
1208 }
1209 current_vector = FIRST_DEVICE_VECTOR + offset; 1198 current_vector = FIRST_DEVICE_VECTOR + offset;
1210 } 1199 }
1211 1200
1212 vector = current_vector; 1201 vector = current_vector;
1213 vector_irq[vector] = irq; 1202 IO_APIC_VECTOR(irq) = vector;
1214 if (irq != AUTO_ASSIGN) 1203
1215 IO_APIC_VECTOR(irq) = vector; 1204 return vector;
1205}
1206
1207static int assign_irq_vector(int irq)
1208{
1209 unsigned long flags;
1210 int vector;
1216 1211
1212 spin_lock_irqsave(&vector_lock, flags);
1213 vector = __assign_irq_vector(irq);
1217 spin_unlock_irqrestore(&vector_lock, flags); 1214 spin_unlock_irqrestore(&vector_lock, flags);
1218 1215
1219 return vector; 1216 return vector;
1220} 1217}
1221 1218static struct irq_chip ioapic_chip;
1222static struct hw_interrupt_type ioapic_level_type;
1223static struct hw_interrupt_type ioapic_edge_type;
1224 1219
1225#define IOAPIC_AUTO -1 1220#define IOAPIC_AUTO -1
1226#define IOAPIC_EDGE 0 1221#define IOAPIC_EDGE 0
@@ -1228,16 +1223,14 @@ static struct hw_interrupt_type ioapic_edge_type;
1228 1223
1229static void ioapic_register_intr(int irq, int vector, unsigned long trigger) 1224static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
1230{ 1225{
1231 unsigned idx;
1232
1233 idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq;
1234
1235 if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || 1226 if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
1236 trigger == IOAPIC_LEVEL) 1227 trigger == IOAPIC_LEVEL)
1237 irq_desc[idx].chip = &ioapic_level_type; 1228 set_irq_chip_and_handler(irq, &ioapic_chip,
1229 handle_fasteoi_irq);
1238 else 1230 else
1239 irq_desc[idx].chip = &ioapic_edge_type; 1231 set_irq_chip_and_handler(irq, &ioapic_chip,
1240 set_intr_gate(vector, interrupt[idx]); 1232 handle_edge_irq);
1233 set_intr_gate(vector, interrupt[irq]);
1241} 1234}
1242 1235
1243static void __init setup_IO_APIC_irqs(void) 1236static void __init setup_IO_APIC_irqs(void)
@@ -1346,7 +1339,8 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in
1346 * The timer IRQ doesn't have to know that behind the 1339 * The timer IRQ doesn't have to know that behind the
1347 * scene we have a 8259A-master in AEOI mode ... 1340 * scene we have a 8259A-master in AEOI mode ...
1348 */ 1341 */
1349 irq_desc[0].chip = &ioapic_edge_type; 1342 irq_desc[0].chip = &ioapic_chip;
1343 set_irq_handler(0, handle_edge_irq);
1350 1344
1351 /* 1345 /*
1352 * Add it to the IO-APIC irq-routing table: 1346 * Add it to the IO-APIC irq-routing table:
@@ -1481,17 +1475,12 @@ void __init print_IO_APIC(void)
1481 ); 1475 );
1482 } 1476 }
1483 } 1477 }
1484 if (use_pci_vector())
1485 printk(KERN_INFO "Using vector-based indexing\n");
1486 printk(KERN_DEBUG "IRQ to pin mappings:\n"); 1478 printk(KERN_DEBUG "IRQ to pin mappings:\n");
1487 for (i = 0; i < NR_IRQS; i++) { 1479 for (i = 0; i < NR_IRQS; i++) {
1488 struct irq_pin_list *entry = irq_2_pin + i; 1480 struct irq_pin_list *entry = irq_2_pin + i;
1489 if (entry->pin < 0) 1481 if (entry->pin < 0)
1490 continue; 1482 continue;
1491 if (use_pci_vector() && !platform_legacy_irq(i)) 1483 printk(KERN_DEBUG "IRQ%d ", i);
1492 printk(KERN_DEBUG "IRQ%d ", IO_APIC_VECTOR(i));
1493 else
1494 printk(KERN_DEBUG "IRQ%d ", i);
1495 for (;;) { 1484 for (;;) {
1496 printk("-> %d:%d", entry->apic, entry->pin); 1485 printk("-> %d:%d", entry->apic, entry->pin);
1497 if (!entry->next) 1486 if (!entry->next)
@@ -1918,6 +1907,8 @@ static int __init timer_irq_works(void)
1918 */ 1907 */
1919 1908
1920/* 1909/*
1910 * Startup quirk:
1911 *
1921 * Starting up a edge-triggered IO-APIC interrupt is 1912 * Starting up a edge-triggered IO-APIC interrupt is
1922 * nasty - we need to make sure that we get the edge. 1913 * nasty - we need to make sure that we get the edge.
1923 * If it is already asserted for some reason, we need 1914 * If it is already asserted for some reason, we need
@@ -1925,8 +1916,10 @@ static int __init timer_irq_works(void)
1925 * 1916 *
1926 * This is not complete - we should be able to fake 1917 * This is not complete - we should be able to fake
1927 * an edge even if it isn't on the 8259A... 1918 * an edge even if it isn't on the 8259A...
1919 *
1920 * (We do this for level-triggered IRQs too - it cannot hurt.)
1928 */ 1921 */
1929static unsigned int startup_edge_ioapic_irq(unsigned int irq) 1922static unsigned int startup_ioapic_irq(unsigned int irq)
1930{ 1923{
1931 int was_pending = 0; 1924 int was_pending = 0;
1932 unsigned long flags; 1925 unsigned long flags;
@@ -1943,47 +1936,18 @@ static unsigned int startup_edge_ioapic_irq(unsigned int irq)
1943 return was_pending; 1936 return was_pending;
1944} 1937}
1945 1938
1946/* 1939static void ack_ioapic_irq(unsigned int irq)
1947 * Once we have recorded IRQ_PENDING already, we can mask the
1948 * interrupt for real. This prevents IRQ storms from unhandled
1949 * devices.
1950 */
1951static void ack_edge_ioapic_irq(unsigned int irq)
1952{ 1940{
1953 move_irq(irq); 1941 move_native_irq(irq);
1954 if ((irq_desc[irq].status & (IRQ_PENDING | IRQ_DISABLED))
1955 == (IRQ_PENDING | IRQ_DISABLED))
1956 mask_IO_APIC_irq(irq);
1957 ack_APIC_irq(); 1942 ack_APIC_irq();
1958} 1943}
1959 1944
1960/* 1945static void ack_ioapic_quirk_irq(unsigned int irq)
1961 * Level triggered interrupts can just be masked,
1962 * and shutting down and starting up the interrupt
1963 * is the same as enabling and disabling them -- except
1964 * with a startup need to return a "was pending" value.
1965 *
1966 * Level triggered interrupts are special because we
1967 * do not touch any IO-APIC register while handling
1968 * them. We ack the APIC in the end-IRQ handler, not
1969 * in the start-IRQ-handler. Protection against reentrance
1970 * from the same interrupt is still provided, both by the
1971 * generic IRQ layer and by the fact that an unacked local
1972 * APIC does not accept IRQs.
1973 */
1974static unsigned int startup_level_ioapic_irq (unsigned int irq)
1975{
1976 unmask_IO_APIC_irq(irq);
1977
1978 return 0; /* don't check for pending */
1979}
1980
1981static void end_level_ioapic_irq (unsigned int irq)
1982{ 1946{
1983 unsigned long v; 1947 unsigned long v;
1984 int i; 1948 int i;
1985 1949
1986 move_irq(irq); 1950 move_native_irq(irq);
1987/* 1951/*
1988 * It appears there is an erratum which affects at least version 0x11 1952 * It appears there is an erratum which affects at least version 0x11
1989 * of I/O APIC (that's the 82093AA and cores integrated into various 1953 * of I/O APIC (that's the 82093AA and cores integrated into various
@@ -2018,105 +1982,26 @@ static void end_level_ioapic_irq (unsigned int irq)
2018 } 1982 }
2019} 1983}
2020 1984
2021#ifdef CONFIG_PCI_MSI 1985static int ioapic_retrigger_irq(unsigned int irq)
2022static unsigned int startup_edge_ioapic_vector(unsigned int vector)
2023{
2024 int irq = vector_to_irq(vector);
2025
2026 return startup_edge_ioapic_irq(irq);
2027}
2028
2029static void ack_edge_ioapic_vector(unsigned int vector)
2030{
2031 int irq = vector_to_irq(vector);
2032
2033 move_native_irq(vector);
2034 ack_edge_ioapic_irq(irq);
2035}
2036
2037static unsigned int startup_level_ioapic_vector (unsigned int vector)
2038{
2039 int irq = vector_to_irq(vector);
2040
2041 return startup_level_ioapic_irq (irq);
2042}
2043
2044static void end_level_ioapic_vector (unsigned int vector)
2045{
2046 int irq = vector_to_irq(vector);
2047
2048 move_native_irq(vector);
2049 end_level_ioapic_irq(irq);
2050}
2051
2052static void mask_IO_APIC_vector (unsigned int vector)
2053{
2054 int irq = vector_to_irq(vector);
2055
2056 mask_IO_APIC_irq(irq);
2057}
2058
2059static void unmask_IO_APIC_vector (unsigned int vector)
2060{
2061 int irq = vector_to_irq(vector);
2062
2063 unmask_IO_APIC_irq(irq);
2064}
2065
2066#ifdef CONFIG_SMP
2067static void set_ioapic_affinity_vector (unsigned int vector,
2068 cpumask_t cpu_mask)
2069{
2070 int irq = vector_to_irq(vector);
2071
2072 set_native_irq_info(vector, cpu_mask);
2073 set_ioapic_affinity_irq(irq, cpu_mask);
2074}
2075#endif
2076#endif
2077
2078static int ioapic_retrigger(unsigned int irq)
2079{ 1986{
2080 send_IPI_self(IO_APIC_VECTOR(irq)); 1987 send_IPI_self(IO_APIC_VECTOR(irq));
2081 1988
2082 return 1; 1989 return 1;
2083} 1990}
2084 1991
2085/* 1992static struct irq_chip ioapic_chip __read_mostly = {
2086 * Level and edge triggered IO-APIC interrupts need different handling, 1993 .name = "IO-APIC",
2087 * so we use two separate IRQ descriptors. Edge triggered IRQs can be 1994 .startup = startup_ioapic_irq,
2088 * handled with the level-triggered descriptor, but that one has slightly 1995 .mask = mask_IO_APIC_irq,
2089 * more overhead. Level-triggered interrupts cannot be handled with the 1996 .unmask = unmask_IO_APIC_irq,
2090 * edge-triggered handler, without risking IRQ storms and other ugly 1997 .ack = ack_ioapic_irq,
2091 * races. 1998 .eoi = ack_ioapic_quirk_irq,
2092 */
2093static struct hw_interrupt_type ioapic_edge_type __read_mostly = {
2094 .typename = "IO-APIC-edge",
2095 .startup = startup_edge_ioapic,
2096 .shutdown = shutdown_edge_ioapic,
2097 .enable = enable_edge_ioapic,
2098 .disable = disable_edge_ioapic,
2099 .ack = ack_edge_ioapic,
2100 .end = end_edge_ioapic,
2101#ifdef CONFIG_SMP 1999#ifdef CONFIG_SMP
2102 .set_affinity = set_ioapic_affinity, 2000 .set_affinity = set_ioapic_affinity_irq,
2103#endif 2001#endif
2104 .retrigger = ioapic_retrigger, 2002 .retrigger = ioapic_retrigger_irq,
2105}; 2003};
2106 2004
2107static struct hw_interrupt_type ioapic_level_type __read_mostly = {
2108 .typename = "IO-APIC-level",
2109 .startup = startup_level_ioapic,
2110 .shutdown = shutdown_level_ioapic,
2111 .enable = enable_level_ioapic,
2112 .disable = disable_level_ioapic,
2113 .ack = mask_and_ack_level_ioapic,
2114 .end = end_level_ioapic,
2115#ifdef CONFIG_SMP
2116 .set_affinity = set_ioapic_affinity,
2117#endif
2118 .retrigger = ioapic_retrigger,
2119};
2120 2005
2121static inline void init_IO_APIC_traps(void) 2006static inline void init_IO_APIC_traps(void)
2122{ 2007{
@@ -2135,11 +2020,6 @@ static inline void init_IO_APIC_traps(void)
2135 */ 2020 */
2136 for (irq = 0; irq < NR_IRQS ; irq++) { 2021 for (irq = 0; irq < NR_IRQS ; irq++) {
2137 int tmp = irq; 2022 int tmp = irq;
2138 if (use_pci_vector()) {
2139 if (!platform_legacy_irq(tmp))
2140 if ((tmp = vector_to_irq(tmp)) == -1)
2141 continue;
2142 }
2143 if (IO_APIC_IRQ(tmp) && !IO_APIC_VECTOR(tmp)) { 2023 if (IO_APIC_IRQ(tmp) && !IO_APIC_VECTOR(tmp)) {
2144 /* 2024 /*
2145 * Hmm.. We don't have an entry for this, 2025 * Hmm.. We don't have an entry for this,
@@ -2150,20 +2030,21 @@ static inline void init_IO_APIC_traps(void)
2150 make_8259A_irq(irq); 2030 make_8259A_irq(irq);
2151 else 2031 else
2152 /* Strange. Oh, well.. */ 2032 /* Strange. Oh, well.. */
2153 irq_desc[irq].chip = &no_irq_type; 2033 irq_desc[irq].chip = &no_irq_chip;
2154 } 2034 }
2155 } 2035 }
2156} 2036}
2157 2037
2158static void enable_lapic_irq (unsigned int irq) 2038/*
2159{ 2039 * The local APIC irq-chip implementation:
2160 unsigned long v; 2040 */
2161 2041
2162 v = apic_read(APIC_LVT0); 2042static void ack_apic(unsigned int irq)
2163 apic_write_around(APIC_LVT0, v & ~APIC_LVT_MASKED); 2043{
2044 ack_APIC_irq();
2164} 2045}
2165 2046
2166static void disable_lapic_irq (unsigned int irq) 2047static void mask_lapic_irq (unsigned int irq)
2167{ 2048{
2168 unsigned long v; 2049 unsigned long v;
2169 2050
@@ -2171,21 +2052,19 @@ static void disable_lapic_irq (unsigned int irq)
2171 apic_write_around(APIC_LVT0, v | APIC_LVT_MASKED); 2052 apic_write_around(APIC_LVT0, v | APIC_LVT_MASKED);
2172} 2053}
2173 2054
2174static void ack_lapic_irq (unsigned int irq) 2055static void unmask_lapic_irq (unsigned int irq)
2175{ 2056{
2176 ack_APIC_irq(); 2057 unsigned long v;
2177}
2178 2058
2179static void end_lapic_irq (unsigned int i) { /* nothing */ } 2059 v = apic_read(APIC_LVT0);
2060 apic_write_around(APIC_LVT0, v & ~APIC_LVT_MASKED);
2061}
2180 2062
2181static struct hw_interrupt_type lapic_irq_type __read_mostly = { 2063static struct irq_chip lapic_chip __read_mostly = {
2182 .typename = "local-APIC-edge", 2064 .name = "local-APIC-edge",
2183 .startup = NULL, /* startup_irq() not used for IRQ0 */ 2065 .mask = mask_lapic_irq,
2184 .shutdown = NULL, /* shutdown_irq() not used for IRQ0 */ 2066 .unmask = unmask_lapic_irq,
2185 .enable = enable_lapic_irq, 2067 .eoi = ack_apic,
2186 .disable = disable_lapic_irq,
2187 .ack = ack_lapic_irq,
2188 .end = end_lapic_irq
2189}; 2068};
2190 2069
2191static void setup_nmi (void) 2070static void setup_nmi (void)
@@ -2356,7 +2235,7 @@ static inline void check_timer(void)
2356 printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); 2235 printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ...");
2357 2236
2358 disable_8259A_irq(0); 2237 disable_8259A_irq(0);
2359 irq_desc[0].chip = &lapic_irq_type; 2238 set_irq_chip_and_handler(0, &lapic_chip, handle_fasteoi_irq);
2360 apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ 2239 apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */
2361 enable_8259A_irq(0); 2240 enable_8259A_irq(0);
2362 2241
@@ -2531,6 +2410,238 @@ static int __init ioapic_init_sysfs(void)
2531 2410
2532device_initcall(ioapic_init_sysfs); 2411device_initcall(ioapic_init_sysfs);
2533 2412
2413/*
2414 * Dynamic irq allocate and deallocation
2415 */
2416int create_irq(void)
2417{
2418 /* Allocate an unused irq */
2419 int irq, new, vector;
2420 unsigned long flags;
2421
2422 irq = -ENOSPC;
2423 spin_lock_irqsave(&vector_lock, flags);
2424 for (new = (NR_IRQS - 1); new >= 0; new--) {
2425 if (platform_legacy_irq(new))
2426 continue;
2427 if (irq_vector[new] != 0)
2428 continue;
2429 vector = __assign_irq_vector(new);
2430 if (likely(vector > 0))
2431 irq = new;
2432 break;
2433 }
2434 spin_unlock_irqrestore(&vector_lock, flags);
2435
2436 if (irq >= 0) {
2437 set_intr_gate(vector, interrupt[irq]);
2438 dynamic_irq_init(irq);
2439 }
2440 return irq;
2441}
2442
2443void destroy_irq(unsigned int irq)
2444{
2445 unsigned long flags;
2446
2447 dynamic_irq_cleanup(irq);
2448
2449 spin_lock_irqsave(&vector_lock, flags);
2450 irq_vector[irq] = 0;
2451 spin_unlock_irqrestore(&vector_lock, flags);
2452}
2453
2454/*
2455 * MSI mesage composition
2456 */
2457#ifdef CONFIG_PCI_MSI
2458static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
2459{
2460 int vector;
2461 unsigned dest;
2462
2463 vector = assign_irq_vector(irq);
2464 if (vector >= 0) {
2465 dest = cpu_mask_to_apicid(TARGET_CPUS);
2466
2467 msg->address_hi = MSI_ADDR_BASE_HI;
2468 msg->address_lo =
2469 MSI_ADDR_BASE_LO |
2470 ((INT_DEST_MODE == 0) ?
2471 MSI_ADDR_DEST_MODE_PHYSICAL:
2472 MSI_ADDR_DEST_MODE_LOGICAL) |
2473 ((INT_DELIVERY_MODE != dest_LowestPrio) ?
2474 MSI_ADDR_REDIRECTION_CPU:
2475 MSI_ADDR_REDIRECTION_LOWPRI) |
2476 MSI_ADDR_DEST_ID(dest);
2477
2478 msg->data =
2479 MSI_DATA_TRIGGER_EDGE |
2480 MSI_DATA_LEVEL_ASSERT |
2481 ((INT_DELIVERY_MODE != dest_LowestPrio) ?
2482 MSI_DATA_DELIVERY_FIXED:
2483 MSI_DATA_DELIVERY_LOWPRI) |
2484 MSI_DATA_VECTOR(vector);
2485 }
2486 return vector;
2487}
2488
2489#ifdef CONFIG_SMP
2490static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
2491{
2492 struct msi_msg msg;
2493 unsigned int dest;
2494 cpumask_t tmp;
2495 int vector;
2496
2497 cpus_and(tmp, mask, cpu_online_map);
2498 if (cpus_empty(tmp))
2499 tmp = TARGET_CPUS;
2500
2501 vector = assign_irq_vector(irq);
2502 if (vector < 0)
2503 return;
2504
2505 dest = cpu_mask_to_apicid(mask);
2506
2507 read_msi_msg(irq, &msg);
2508
2509 msg.data &= ~MSI_DATA_VECTOR_MASK;
2510 msg.data |= MSI_DATA_VECTOR(vector);
2511 msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
2512 msg.address_lo |= MSI_ADDR_DEST_ID(dest);
2513
2514 write_msi_msg(irq, &msg);
2515 set_native_irq_info(irq, mask);
2516}
2517#endif /* CONFIG_SMP */
2518
2519/*
2520 * IRQ Chip for MSI PCI/PCI-X/PCI-Express Devices,
2521 * which implement the MSI or MSI-X Capability Structure.
2522 */
2523static struct irq_chip msi_chip = {
2524 .name = "PCI-MSI",
2525 .unmask = unmask_msi_irq,
2526 .mask = mask_msi_irq,
2527 .ack = ack_ioapic_irq,
2528#ifdef CONFIG_SMP
2529 .set_affinity = set_msi_irq_affinity,
2530#endif
2531 .retrigger = ioapic_retrigger_irq,
2532};
2533
2534int arch_setup_msi_irq(unsigned int irq, struct pci_dev *dev)
2535{
2536 struct msi_msg msg;
2537 int ret;
2538 ret = msi_compose_msg(dev, irq, &msg);
2539 if (ret < 0)
2540 return ret;
2541
2542 write_msi_msg(irq, &msg);
2543
2544 set_irq_chip_and_handler(irq, &msi_chip, handle_edge_irq);
2545
2546 return 0;
2547}
2548
2549void arch_teardown_msi_irq(unsigned int irq)
2550{
2551 return;
2552}
2553
2554#endif /* CONFIG_PCI_MSI */
2555
2556/*
2557 * Hypertransport interrupt support
2558 */
2559#ifdef CONFIG_HT_IRQ
2560
2561#ifdef CONFIG_SMP
2562
2563static void target_ht_irq(unsigned int irq, unsigned int dest)
2564{
2565 u32 low, high;
2566 low = read_ht_irq_low(irq);
2567 high = read_ht_irq_high(irq);
2568
2569 low &= ~(HT_IRQ_LOW_DEST_ID_MASK);
2570 high &= ~(HT_IRQ_HIGH_DEST_ID_MASK);
2571
2572 low |= HT_IRQ_LOW_DEST_ID(dest);
2573 high |= HT_IRQ_HIGH_DEST_ID(dest);
2574
2575 write_ht_irq_low(irq, low);
2576 write_ht_irq_high(irq, high);
2577}
2578
2579static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
2580{
2581 unsigned int dest;
2582 cpumask_t tmp;
2583
2584 cpus_and(tmp, mask, cpu_online_map);
2585 if (cpus_empty(tmp))
2586 tmp = TARGET_CPUS;
2587
2588 cpus_and(mask, tmp, CPU_MASK_ALL);
2589
2590 dest = cpu_mask_to_apicid(mask);
2591
2592 target_ht_irq(irq, dest);
2593 set_native_irq_info(irq, mask);
2594}
2595#endif
2596
2597static struct hw_interrupt_type ht_irq_chip = {
2598 .name = "PCI-HT",
2599 .mask = mask_ht_irq,
2600 .unmask = unmask_ht_irq,
2601 .ack = ack_ioapic_irq,
2602#ifdef CONFIG_SMP
2603 .set_affinity = set_ht_irq_affinity,
2604#endif
2605 .retrigger = ioapic_retrigger_irq,
2606};
2607
2608int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
2609{
2610 int vector;
2611
2612 vector = assign_irq_vector(irq);
2613 if (vector >= 0) {
2614 u32 low, high;
2615 unsigned dest;
2616 cpumask_t tmp;
2617
2618 cpus_clear(tmp);
2619 cpu_set(vector >> 8, tmp);
2620 dest = cpu_mask_to_apicid(tmp);
2621
2622 high = HT_IRQ_HIGH_DEST_ID(dest);
2623
2624 low = HT_IRQ_LOW_BASE |
2625 HT_IRQ_LOW_DEST_ID(dest) |
2626 HT_IRQ_LOW_VECTOR(vector) |
2627 ((INT_DEST_MODE == 0) ?
2628 HT_IRQ_LOW_DM_PHYSICAL :
2629 HT_IRQ_LOW_DM_LOGICAL) |
2630 HT_IRQ_LOW_RQEOI_EDGE |
2631 ((INT_DELIVERY_MODE != dest_LowestPrio) ?
2632 HT_IRQ_LOW_MT_FIXED :
2633 HT_IRQ_LOW_MT_ARBITRATED) |
2634 HT_IRQ_LOW_IRQ_MASKED;
2635
2636 write_ht_irq_low(irq, low);
2637 write_ht_irq_high(irq, high);
2638
2639 set_irq_chip_and_handler(irq, &ht_irq_chip, handle_edge_irq);
2640 }
2641 return vector;
2642}
2643#endif /* CONFIG_HT_IRQ */
2644
2534/* -------------------------------------------------------------------------- 2645/* --------------------------------------------------------------------------
2535 ACPI-based IOAPIC Configuration 2646 ACPI-based IOAPIC Configuration
2536 -------------------------------------------------------------------------- */ 2647 -------------------------------------------------------------------------- */
@@ -2684,7 +2795,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
2684 2795
2685 ioapic_write_entry(ioapic, pin, entry); 2796 ioapic_write_entry(ioapic, pin, entry);
2686 spin_lock_irqsave(&ioapic_lock, flags); 2797 spin_lock_irqsave(&ioapic_lock, flags);
2687 set_native_irq_info(use_pci_vector() ? entry.vector : irq, TARGET_CPUS); 2798 set_native_irq_info(irq, TARGET_CPUS);
2688 spin_unlock_irqrestore(&ioapic_lock, flags); 2799 spin_unlock_irqrestore(&ioapic_lock, flags);
2689 2800
2690 return 0; 2801 return 0;
diff --git a/arch/i386/kernel/irq.c b/arch/i386/kernel/irq.c
index 5fe547cd8f9f..3dd2e180151b 100644
--- a/arch/i386/kernel/irq.c
+++ b/arch/i386/kernel/irq.c
@@ -55,6 +55,7 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs)
55{ 55{
56 /* high bit used in ret_from_ code */ 56 /* high bit used in ret_from_ code */
57 int irq = ~regs->orig_eax; 57 int irq = ~regs->orig_eax;
58 struct irq_desc *desc = irq_desc + irq;
58#ifdef CONFIG_4KSTACKS 59#ifdef CONFIG_4KSTACKS
59 union irq_ctx *curctx, *irqctx; 60 union irq_ctx *curctx, *irqctx;
60 u32 *isp; 61 u32 *isp;
@@ -94,7 +95,7 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs)
94 * current stack (which is the irq stack already after all) 95 * current stack (which is the irq stack already after all)
95 */ 96 */
96 if (curctx != irqctx) { 97 if (curctx != irqctx) {
97 int arg1, arg2, ebx; 98 int arg1, arg2, arg3, ebx;
98 99
99 /* build the stack frame on the IRQ stack */ 100 /* build the stack frame on the IRQ stack */
100 isp = (u32*) ((char*)irqctx + sizeof(*irqctx)); 101 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
@@ -110,16 +111,17 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs)
110 (curctx->tinfo.preempt_count & SOFTIRQ_MASK); 111 (curctx->tinfo.preempt_count & SOFTIRQ_MASK);
111 112
112 asm volatile( 113 asm volatile(
113 " xchgl %%ebx,%%esp \n" 114 " xchgl %%ebx,%%esp \n"
114 " call __do_IRQ \n" 115 " call *%%edi \n"
115 " movl %%ebx,%%esp \n" 116 " movl %%ebx,%%esp \n"
116 : "=a" (arg1), "=d" (arg2), "=b" (ebx) 117 : "=a" (arg1), "=d" (arg2), "=c" (arg3), "=b" (ebx)
117 : "0" (irq), "1" (regs), "2" (isp) 118 : "0" (irq), "1" (desc), "2" (regs), "3" (isp),
118 : "memory", "cc", "ecx" 119 "D" (desc->handle_irq)
120 : "memory", "cc"
119 ); 121 );
120 } else 122 } else
121#endif 123#endif
122 __do_IRQ(irq, regs); 124 desc->handle_irq(irq, desc, regs);
123 125
124 irq_exit(); 126 irq_exit();
125 127
@@ -253,7 +255,8 @@ int show_interrupts(struct seq_file *p, void *v)
253 for_each_online_cpu(j) 255 for_each_online_cpu(j)
254 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 256 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
255#endif 257#endif
256 seq_printf(p, " %14s", irq_desc[i].chip->typename); 258 seq_printf(p, " %8s", irq_desc[i].chip->name);
259 seq_printf(p, "-%s", handle_irq_name(irq_desc[i].handle_irq));
257 seq_printf(p, " %s", action->name); 260 seq_printf(p, " %s", action->name);
258 261
259 for (action=action->next; action; action = action->next) 262 for (action=action->next; action; action = action->next)
diff --git a/arch/i386/kernel/ldt.c b/arch/i386/kernel/ldt.c
index 983f95707e11..445211eb2d57 100644
--- a/arch/i386/kernel/ldt.c
+++ b/arch/i386/kernel/ldt.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/kernel/ldt.c 2 * linux/arch/i386/kernel/ldt.c
3 * 3 *
4 * Copyright (C) 1992 Krishna Balasubramanian and Linus Torvalds 4 * Copyright (C) 1992 Krishna Balasubramanian and Linus Torvalds
5 * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com> 5 * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com>
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index 9d93ecf6d999..4bb8b77cd65b 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -648,7 +648,7 @@ static void map_cpu_to_logical_apicid(void)
648{ 648{
649 int cpu = smp_processor_id(); 649 int cpu = smp_processor_id();
650 int apicid = logical_smp_processor_id(); 650 int apicid = logical_smp_processor_id();
651 int node = apicid_to_node(hard_smp_processor_id()); 651 int node = apicid_to_node(apicid);
652 652
653 if (!node_online(node)) 653 if (!node_online(node))
654 node = first_online_node; 654 node = first_online_node;
diff --git a/arch/i386/mach-visws/visws_apic.c b/arch/i386/mach-visws/visws_apic.c
index 828522541a88..5929f884d79b 100644
--- a/arch/i386/mach-visws/visws_apic.c
+++ b/arch/i386/mach-visws/visws_apic.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/i386/mach_visws/visws_apic.c 2 * linux/arch/i386/mach-visws/visws_apic.c
3 * 3 *
4 * Copyright (C) 1999 Bent Hagemark, Ingo Molnar 4 * Copyright (C) 1999 Bent Hagemark, Ingo Molnar
5 * 5 *
diff --git a/arch/i386/mm/discontig.c b/arch/i386/mm/discontig.c
index 51e3739dd227..455597db84df 100644
--- a/arch/i386/mm/discontig.c
+++ b/arch/i386/mm/discontig.c
@@ -153,8 +153,7 @@ static void __init find_max_pfn_node(int nid)
153 */ 153 */
154 if (node_start_pfn[nid] > max_pfn) 154 if (node_start_pfn[nid] > max_pfn)
155 node_start_pfn[nid] = max_pfn; 155 node_start_pfn[nid] = max_pfn;
156 if (node_start_pfn[nid] > node_end_pfn[nid]) 156 BUG_ON(node_start_pfn[nid] > node_end_pfn[nid]);
157 BUG();
158} 157}
159 158
160/* 159/*
diff --git a/arch/i386/mm/init.c b/arch/i386/mm/init.c
index 90089c14c23d..167416155ee4 100644
--- a/arch/i386/mm/init.c
+++ b/arch/i386/mm/init.c
@@ -569,8 +569,7 @@ void __init mem_init(void)
569 int bad_ppro; 569 int bad_ppro;
570 570
571#ifdef CONFIG_FLATMEM 571#ifdef CONFIG_FLATMEM
572 if (!mem_map) 572 BUG_ON(!mem_map);
573 BUG();
574#endif 573#endif
575 574
576 bad_ppro = ppro_with_ram_bug(); 575 bad_ppro = ppro_with_ram_bug();
diff --git a/arch/i386/pci/fixup.c b/arch/i386/pci/fixup.c
index 83c3645ccc43..b60d7e8689ed 100644
--- a/arch/i386/pci/fixup.c
+++ b/arch/i386/pci/fixup.c
@@ -393,7 +393,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video);
393 * We pretend to bring them out of full D3 state, and restore the proper 393 * We pretend to bring them out of full D3 state, and restore the proper
394 * IRQ, PCI cache line size, and BARs, otherwise the device won't function 394 * IRQ, PCI cache line size, and BARs, otherwise the device won't function
395 * properly. In some cases, the device will generate an interrupt on 395 * properly. In some cases, the device will generate an interrupt on
396 * the wrong IRQ line, causing any devices sharing the the line it's 396 * the wrong IRQ line, causing any devices sharing the line it's
397 * *supposed* to use to be disabled by the kernel's IRQ debug code. 397 * *supposed* to use to be disabled by the kernel's IRQ debug code.
398 */ 398 */
399static u16 toshiba_line_size; 399static u16 toshiba_line_size;
diff --git a/arch/i386/pci/irq.c b/arch/i386/pci/irq.c
index 4a8995c9c762..47f02af74be3 100644
--- a/arch/i386/pci/irq.c
+++ b/arch/i386/pci/irq.c
@@ -981,10 +981,6 @@ static void __init pcibios_fixup_irqs(void)
981 pci_name(bridge), 'A' + pin, irq); 981 pci_name(bridge), 'A' + pin, irq);
982 } 982 }
983 if (irq >= 0) { 983 if (irq >= 0) {
984 if (use_pci_vector() &&
985 !platform_legacy_irq(irq))
986 irq = IO_APIC_VECTOR(irq);
987
988 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n", 984 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
989 pci_name(dev), 'A' + pin, irq); 985 pci_name(dev), 'A' + pin, irq);
990 dev->irq = irq; 986 dev->irq = irq;
@@ -1169,33 +1165,3 @@ static int pirq_enable_irq(struct pci_dev *dev)
1169 } 1165 }
1170 return 0; 1166 return 0;
1171} 1167}
1172
1173int pci_vector_resources(int last, int nr_released)
1174{
1175 int count = nr_released;
1176
1177 int next = last;
1178 int offset = (last % 8);
1179
1180 while (next < FIRST_SYSTEM_VECTOR) {
1181 next += 8;
1182#ifdef CONFIG_X86_64
1183 if (next == IA32_SYSCALL_VECTOR)
1184 continue;
1185#else
1186 if (next == SYSCALL_VECTOR)
1187 continue;
1188#endif
1189 count++;
1190 if (next >= FIRST_SYSTEM_VECTOR) {
1191 if (offset%8) {
1192 next = FIRST_DEVICE_VECTOR + offset;
1193 offset++;
1194 continue;
1195 }
1196 count--;
1197 }
1198 }
1199
1200 return count;
1201}
diff --git a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile
index 31497496eb4b..cfa099b04cda 100644
--- a/arch/ia64/kernel/Makefile
+++ b/arch/ia64/kernel/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_IA64_MCA_RECOVERY) += mca_recovery.o
30obj-$(CONFIG_KPROBES) += kprobes.o jprobes.o 30obj-$(CONFIG_KPROBES) += kprobes.o jprobes.o
31obj-$(CONFIG_IA64_UNCACHED_ALLOCATOR) += uncached.o 31obj-$(CONFIG_IA64_UNCACHED_ALLOCATOR) += uncached.o
32obj-$(CONFIG_AUDIT) += audit.o 32obj-$(CONFIG_AUDIT) += audit.o
33obj-$(CONFIG_PCI_MSI) += msi_ia64.o
33mca_recovery-y += mca_drv.o mca_drv_asm.o 34mca_recovery-y += mca_drv.o mca_drv_asm.o
34 35
35obj-$(CONFIG_IA64_ESI) += esi.o 36obj-$(CONFIG_IA64_ESI) += esi.o
diff --git a/arch/ia64/kernel/acpi-processor.c b/arch/ia64/kernel/acpi-processor.c
index e683630c8ce2..4d4993a47e55 100644
--- a/arch/ia64/kernel/acpi-processor.c
+++ b/arch/ia64/kernel/acpi-processor.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/ia64/kernel/cpufreq/processor.c 2 * arch/ia64/kernel/acpi-processor.c
3 * 3 *
4 * Copyright (C) 2005 Intel Corporation 4 * Copyright (C) 2005 Intel Corporation
5 * Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> 5 * Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
diff --git a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S
index e5b1be51b197..3390b7c5a63f 100644
--- a/arch/ia64/kernel/entry.S
+++ b/arch/ia64/kernel/entry.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * ia64/kernel/entry.S 2 * arch/ia64/kernel/entry.S
3 * 3 *
4 * Kernel entry points. 4 * Kernel entry points.
5 * 5 *
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index a041367f043b..ab2d19c3661f 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/ia64/kernel/irq.c 2 * linux/arch/ia64/kernel/irq_ia64.c
3 * 3 *
4 * Copyright (C) 1998-2001 Hewlett-Packard Co 4 * Copyright (C) 1998-2001 Hewlett-Packard Co
5 * Stephane Eranian <eranian@hpl.hp.com> 5 * Stephane Eranian <eranian@hpl.hp.com>
@@ -30,6 +30,7 @@
30#include <linux/smp_lock.h> 30#include <linux/smp_lock.h>
31#include <linux/threads.h> 31#include <linux/threads.h>
32#include <linux/bitops.h> 32#include <linux/bitops.h>
33#include <linux/irq.h>
33 34
34#include <asm/delay.h> 35#include <asm/delay.h>
35#include <asm/intrinsics.h> 36#include <asm/intrinsics.h>
@@ -105,6 +106,25 @@ reserve_irq_vector (int vector)
105 return test_and_set_bit(pos, ia64_vector_mask); 106 return test_and_set_bit(pos, ia64_vector_mask);
106} 107}
107 108
109/*
110 * Dynamic irq allocate and deallocation for MSI
111 */
112int create_irq(void)
113{
114 int vector = assign_irq_vector(AUTO_ASSIGN);
115
116 if (vector >= 0)
117 dynamic_irq_init(vector);
118
119 return vector;
120}
121
122void destroy_irq(unsigned int irq)
123{
124 dynamic_irq_cleanup(irq);
125 free_irq_vector(irq);
126}
127
108#ifdef CONFIG_SMP 128#ifdef CONFIG_SMP
109# define IS_RESCHEDULE(vec) (vec == IA64_IPI_RESCHEDULE) 129# define IS_RESCHEDULE(vec) (vec == IA64_IPI_RESCHEDULE)
110#else 130#else
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
new file mode 100644
index 000000000000..822e59a1b822
--- /dev/null
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -0,0 +1,143 @@
1/*
2 * MSI hooks for standard x86 apic
3 */
4
5#include <linux/pci.h>
6#include <linux/irq.h>
7#include <linux/msi.h>
8#include <asm/smp.h>
9
10/*
11 * Shifts for APIC-based data
12 */
13
14#define MSI_DATA_VECTOR_SHIFT 0
15#define MSI_DATA_VECTOR(v) (((u8)v) << MSI_DATA_VECTOR_SHIFT)
16
17#define MSI_DATA_DELIVERY_SHIFT 8
18#define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_SHIFT)
19#define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_SHIFT)
20
21#define MSI_DATA_LEVEL_SHIFT 14
22#define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT)
23#define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT)
24
25#define MSI_DATA_TRIGGER_SHIFT 15
26#define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT)
27#define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT)
28
29/*
30 * Shift/mask fields for APIC-based bus address
31 */
32
33#define MSI_TARGET_CPU_SHIFT 4
34#define MSI_ADDR_HEADER 0xfee00000
35
36#define MSI_ADDR_DESTID_MASK 0xfff0000f
37#define MSI_ADDR_DESTID_CPU(cpu) ((cpu) << MSI_TARGET_CPU_SHIFT)
38
39#define MSI_ADDR_DESTMODE_SHIFT 2
40#define MSI_ADDR_DESTMODE_PHYS (0 << MSI_ADDR_DESTMODE_SHIFT)
41#define MSI_ADDR_DESTMODE_LOGIC (1 << MSI_ADDR_DESTMODE_SHIFT)
42
43#define MSI_ADDR_REDIRECTION_SHIFT 3
44#define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT)
45#define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
46
47static struct irq_chip ia64_msi_chip;
48
49#ifdef CONFIG_SMP
50static void ia64_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
51{
52 struct msi_msg msg;
53 u32 addr;
54
55 read_msi_msg(irq, &msg);
56
57 addr = msg.address_lo;
58 addr &= MSI_ADDR_DESTID_MASK;
59 addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(first_cpu(cpu_mask)));
60 msg.address_lo = addr;
61
62 write_msi_msg(irq, &msg);
63 set_native_irq_info(irq, cpu_mask);
64}
65#endif /* CONFIG_SMP */
66
67int ia64_setup_msi_irq(unsigned int irq, struct pci_dev *pdev)
68{
69 struct msi_msg msg;
70 unsigned long dest_phys_id;
71 unsigned int vector;
72
73 dest_phys_id = cpu_physical_id(first_cpu(cpu_online_map));
74 vector = irq;
75
76 msg.address_hi = 0;
77 msg.address_lo =
78 MSI_ADDR_HEADER |
79 MSI_ADDR_DESTMODE_PHYS |
80 MSI_ADDR_REDIRECTION_CPU |
81 MSI_ADDR_DESTID_CPU(dest_phys_id);
82
83 msg.data =
84 MSI_DATA_TRIGGER_EDGE |
85 MSI_DATA_LEVEL_ASSERT |
86 MSI_DATA_DELIVERY_FIXED |
87 MSI_DATA_VECTOR(vector);
88
89 write_msi_msg(irq, &msg);
90 set_irq_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq);
91
92 return 0;
93}
94
95void ia64_teardown_msi_irq(unsigned int irq)
96{
97 return; /* no-op */
98}
99
100static void ia64_ack_msi_irq(unsigned int irq)
101{
102 move_native_irq(irq);
103 ia64_eoi();
104}
105
106static int ia64_msi_retrigger_irq(unsigned int irq)
107{
108 unsigned int vector = irq;
109 ia64_resend_irq(vector);
110
111 return 1;
112}
113
114/*
115 * Generic ops used on most IA64 platforms.
116 */
117static struct irq_chip ia64_msi_chip = {
118 .name = "PCI-MSI",
119 .mask = mask_msi_irq,
120 .unmask = unmask_msi_irq,
121 .ack = ia64_ack_msi_irq,
122#ifdef CONFIG_SMP
123 .set_affinity = ia64_set_msi_irq_affinity,
124#endif
125 .retrigger = ia64_msi_retrigger_irq,
126};
127
128
129int arch_setup_msi_irq(unsigned int irq, struct pci_dev *pdev)
130{
131 if (platform_setup_msi_irq)
132 return platform_setup_msi_irq(irq, pdev);
133
134 return ia64_setup_msi_irq(irq, pdev);
135}
136
137void arch_teardown_msi_irq(unsigned int irq)
138{
139 if (platform_teardown_msi_irq)
140 return platform_teardown_msi_irq(irq);
141
142 return ia64_teardown_msi_irq(irq);
143}
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 15c7c670da39..b30be7c48ba8 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -810,12 +810,3 @@ pcibios_prep_mwi (struct pci_dev *dev)
810 } 810 }
811 return rc; 811 return rc;
812} 812}
813
814int pci_vector_resources(int last, int nr_released)
815{
816 int count = nr_released;
817
818 count += (IA64_LAST_DEVICE_VECTOR - last);
819
820 return count;
821}
diff --git a/arch/ia64/sn/kernel/Makefile b/arch/ia64/sn/kernel/Makefile
index ab9c48c88012..2d78f34dd763 100644
--- a/arch/ia64/sn/kernel/Makefile
+++ b/arch/ia64/sn/kernel/Makefile
@@ -19,3 +19,4 @@ xp-y := xp_main.o xp_nofault.o
19obj-$(CONFIG_IA64_SGI_SN_XP) += xpc.o 19obj-$(CONFIG_IA64_SGI_SN_XP) += xpc.o
20xpc-y := xpc_main.o xpc_channel.o xpc_partition.o 20xpc-y := xpc_main.o xpc_channel.o xpc_partition.o
21obj-$(CONFIG_IA64_SGI_SN_XP) += xpnet.o 21obj-$(CONFIG_IA64_SGI_SN_XP) += xpnet.o
22obj-$(CONFIG_PCI_MSI) += msi_sn.o
diff --git a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c
new file mode 100644
index 000000000000..6ffd1f850d41
--- /dev/null
+++ b/arch/ia64/sn/kernel/msi_sn.c
@@ -0,0 +1,230 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006 Silicon Graphics, Inc. All Rights Reserved.
7 */
8
9#include <linux/types.h>
10#include <linux/irq.h>
11#include <linux/pci.h>
12#include <linux/cpumask.h>
13#include <linux/msi.h>
14
15#include <asm/sn/addrs.h>
16#include <asm/sn/intr.h>
17#include <asm/sn/pcibus_provider_defs.h>
18#include <asm/sn/pcidev.h>
19#include <asm/sn/nodepda.h>
20
21struct sn_msi_info {
22 u64 pci_addr;
23 struct sn_irq_info *sn_irq_info;
24};
25
26static struct sn_msi_info sn_msi_info[NR_IRQS];
27
28static struct irq_chip sn_msi_chip;
29
30void sn_teardown_msi_irq(unsigned int irq)
31{
32 nasid_t nasid;
33 int widget;
34 struct pci_dev *pdev;
35 struct pcidev_info *sn_pdev;
36 struct sn_irq_info *sn_irq_info;
37 struct pcibus_bussoft *bussoft;
38 struct sn_pcibus_provider *provider;
39
40 sn_irq_info = sn_msi_info[irq].sn_irq_info;
41 if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
42 return;
43
44 sn_pdev = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
45 pdev = sn_pdev->pdi_linux_pcidev;
46 provider = SN_PCIDEV_BUSPROVIDER(pdev);
47
48 (*provider->dma_unmap)(pdev,
49 sn_msi_info[irq].pci_addr,
50 PCI_DMA_FROMDEVICE);
51 sn_msi_info[irq].pci_addr = 0;
52
53 bussoft = SN_PCIDEV_BUSSOFT(pdev);
54 nasid = NASID_GET(bussoft->bs_base);
55 widget = (nasid & 1) ?
56 TIO_SWIN_WIDGETNUM(bussoft->bs_base) :
57 SWIN_WIDGETNUM(bussoft->bs_base);
58
59 sn_intr_free(nasid, widget, sn_irq_info);
60 sn_msi_info[irq].sn_irq_info = NULL;
61
62 return;
63}
64
65int sn_setup_msi_irq(unsigned int irq, struct pci_dev *pdev)
66{
67 struct msi_msg msg;
68 struct msi_desc *entry;
69 int widget;
70 int status;
71 nasid_t nasid;
72 u64 bus_addr;
73 struct sn_irq_info *sn_irq_info;
74 struct pcibus_bussoft *bussoft = SN_PCIDEV_BUSSOFT(pdev);
75 struct sn_pcibus_provider *provider = SN_PCIDEV_BUSPROVIDER(pdev);
76
77 entry = get_irq_data(irq);
78 if (!entry->msi_attrib.is_64)
79 return -EINVAL;
80
81 if (bussoft == NULL)
82 return -EINVAL;
83
84 if (provider == NULL || provider->dma_map_consistent == NULL)
85 return -EINVAL;
86
87 /*
88 * Set up the vector plumbing. Let the prom (via sn_intr_alloc)
89 * decide which cpu to direct this msi at by default.
90 */
91
92 nasid = NASID_GET(bussoft->bs_base);
93 widget = (nasid & 1) ?
94 TIO_SWIN_WIDGETNUM(bussoft->bs_base) :
95 SWIN_WIDGETNUM(bussoft->bs_base);
96
97 sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
98 if (! sn_irq_info)
99 return -ENOMEM;
100
101 status = sn_intr_alloc(nasid, widget, sn_irq_info, irq, -1, -1);
102 if (status) {
103 kfree(sn_irq_info);
104 return -ENOMEM;
105 }
106
107 sn_irq_info->irq_int_bit = -1; /* mark this as an MSI irq */
108 sn_irq_fixup(pdev, sn_irq_info);
109
110 /* Prom probably should fill these in, but doesn't ... */
111 sn_irq_info->irq_bridge_type = bussoft->bs_asic_type;
112 sn_irq_info->irq_bridge = (void *)bussoft->bs_base;
113
114 /*
115 * Map the xio address into bus space
116 */
117 bus_addr = (*provider->dma_map_consistent)(pdev,
118 sn_irq_info->irq_xtalkaddr,
119 sizeof(sn_irq_info->irq_xtalkaddr),
120 SN_DMA_MSI|SN_DMA_ADDR_XIO);
121 if (! bus_addr) {
122 sn_intr_free(nasid, widget, sn_irq_info);
123 kfree(sn_irq_info);
124 return -ENOMEM;
125 }
126
127 sn_msi_info[irq].sn_irq_info = sn_irq_info;
128 sn_msi_info[irq].pci_addr = bus_addr;
129
130 msg.address_hi = (u32)(bus_addr >> 32);
131 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
132
133 /*
134 * In the SN platform, bit 16 is a "send vector" bit which
135 * must be present in order to move the vector through the system.
136 */
137 msg.data = 0x100 + irq;
138
139#ifdef CONFIG_SMP
140 set_irq_affinity_info(irq, sn_irq_info->irq_cpuid, 0);
141#endif
142
143 write_msi_msg(irq, &msg);
144 set_irq_chip_and_handler(irq, &sn_msi_chip, handle_edge_irq);
145
146 return 0;
147}
148
149#ifdef CONFIG_SMP
150static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
151{
152 struct msi_msg msg;
153 int slice;
154 nasid_t nasid;
155 u64 bus_addr;
156 struct pci_dev *pdev;
157 struct pcidev_info *sn_pdev;
158 struct sn_irq_info *sn_irq_info;
159 struct sn_irq_info *new_irq_info;
160 struct sn_pcibus_provider *provider;
161 unsigned int cpu;
162
163 cpu = first_cpu(cpu_mask);
164 sn_irq_info = sn_msi_info[irq].sn_irq_info;
165 if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
166 return;
167
168 /*
169 * Release XIO resources for the old MSI PCI address
170 */
171
172 read_msi_msg(irq, &msg);
173 sn_pdev = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
174 pdev = sn_pdev->pdi_linux_pcidev;
175 provider = SN_PCIDEV_BUSPROVIDER(pdev);
176
177 bus_addr = (u64)(msg.address_hi) << 32 | (u64)(msg.address_lo);
178 (*provider->dma_unmap)(pdev, bus_addr, PCI_DMA_FROMDEVICE);
179 sn_msi_info[irq].pci_addr = 0;
180
181 nasid = cpuid_to_nasid(cpu);
182 slice = cpuid_to_slice(cpu);
183
184 new_irq_info = sn_retarget_vector(sn_irq_info, nasid, slice);
185 sn_msi_info[irq].sn_irq_info = new_irq_info;
186 if (new_irq_info == NULL)
187 return;
188
189 /*
190 * Map the xio address into bus space
191 */
192
193 bus_addr = (*provider->dma_map_consistent)(pdev,
194 new_irq_info->irq_xtalkaddr,
195 sizeof(new_irq_info->irq_xtalkaddr),
196 SN_DMA_MSI|SN_DMA_ADDR_XIO);
197
198 sn_msi_info[irq].pci_addr = bus_addr;
199 msg.address_hi = (u32)(bus_addr >> 32);
200 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
201
202 write_msi_msg(irq, &msg);
203 set_native_irq_info(irq, cpu_mask);
204}
205#endif /* CONFIG_SMP */
206
207static void sn_ack_msi_irq(unsigned int irq)
208{
209 move_native_irq(irq);
210 ia64_eoi();
211}
212
213static int sn_msi_retrigger_irq(unsigned int irq)
214{
215 unsigned int vector = irq;
216 ia64_resend_irq(vector);
217
218 return 1;
219}
220
221static struct irq_chip sn_msi_chip = {
222 .name = "PCI-MSI",
223 .mask = mask_msi_irq,
224 .unmask = unmask_msi_irq,
225 .ack = sn_ack_msi_irq,
226#ifdef CONFIG_SMP
227 .set_affinity = sn_set_msi_irq_affinity,
228#endif
229 .retrigger = sn_msi_retrigger_irq,
230};
diff --git a/arch/ia64/sn/kernel/xpnet.c b/arch/ia64/sn/kernel/xpnet.c
index 007703c494a4..c8173db0d84f 100644
--- a/arch/ia64/sn/kernel/xpnet.c
+++ b/arch/ia64/sn/kernel/xpnet.c
@@ -225,7 +225,7 @@ xpnet_receive(partid_t partid, int channel, struct xpnet_message *msg)
225 skb_put(skb, (msg->size - msg->leadin_ignore - msg->tailout_ignore)); 225 skb_put(skb, (msg->size - msg->leadin_ignore - msg->tailout_ignore));
226 226
227 /* 227 /*
228 * Move the data over from the the other side. 228 * Move the data over from the other side.
229 */ 229 */
230 if ((XPNET_VERSION_MINOR(msg->version) == 1) && 230 if ((XPNET_VERSION_MINOR(msg->version) == 1) &&
231 (msg->embedded_bytes != 0)) { 231 (msg->embedded_bytes != 0)) {
diff --git a/arch/m68k/mm/motorola.c b/arch/m68k/mm/motorola.c
index 49015e32d8fc..afcccdc6ad45 100644
--- a/arch/m68k/mm/motorola.c
+++ b/arch/m68k/mm/motorola.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/m68k/motorola.c 2 * linux/arch/m68k/mm/motorola.c
3 * 3 *
4 * Routines specific to the Motorola MMU, originally from: 4 * Routines specific to the Motorola MMU, originally from:
5 * linux/arch/m68k/init.c 5 * linux/arch/m68k/init.c
diff --git a/arch/m68k/sun3/sun3dvma.c b/arch/m68k/sun3/sun3dvma.c
index 6c265222cbcd..a2bc2da7f8f0 100644
--- a/arch/m68k/sun3/sun3dvma.c
+++ b/arch/m68k/sun3/sun3dvma.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/m68k/mm/sun3dvma.c 2 * linux/arch/m68k/sun3/sun3dvma.c
3 * 3 *
4 * Copyright (C) 2000 Sam Creasey 4 * Copyright (C) 2000 Sam Creasey
5 * 5 *
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index e767f2ddae72..6d920d4bdc3d 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -161,8 +161,8 @@ config CLOCK_FREQ
161 frequency, it may or may not be the same as the external clock 161 frequency, it may or may not be the same as the external clock
162 crystal fitted to your board. Some processors have an internal 162 crystal fitted to your board. Some processors have an internal
163 PLL and can have their frequency programmed at run time, others 163 PLL and can have their frequency programmed at run time, others
164 use internal dividers. In gernal the kernel won't setup a PLL 164 use internal dividers. In general the kernel won't setup a PLL
165 if it is fitted (there are some expections). This value will be 165 if it is fitted (there are some exceptions). This value will be
166 specific to the exact CPU that you are using. 166 specific to the exact CPU that you are using.
167 167
168config CLOCK_DIV 168config CLOCK_DIV
@@ -495,7 +495,7 @@ config VECTORBASE
495 hex "Address of the base of system vectors" 495 hex "Address of the base of system vectors"
496 default "0" 496 default "0"
497 help 497 help
498 Define the address of the the system vectors. Commonly this is 498 Define the address of the system vectors. Commonly this is
499 put at the start of RAM, but it doesn't have to be. On ColdFire 499 put at the start of RAM, but it doesn't have to be. On ColdFire
500 platforms this address is programmed into the VBR register, thus 500 platforms this address is programmed into the VBR register, thus
501 actually setting the address to use. 501 actually setting the address to use.
diff --git a/arch/m68knommu/platform/68328/head-pilot.S b/arch/m68knommu/platform/68328/head-pilot.S
index 9e07faa3e81d..aecff532b343 100644
--- a/arch/m68knommu/platform/68328/head-pilot.S
+++ b/arch/m68knommu/platform/68328/head-pilot.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/m68knommu/platform/68328/head-rom.S 2 * linux/arch/m68knommu/platform/68328/head-pilot.S
3 * - A startup file for the MC68328 3 * - A startup file for the MC68328
4 * 4 *
5 * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>, 5 * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
diff --git a/arch/mips/dec/prom/call_o32.S b/arch/mips/dec/prom/call_o32.S
index 0dd56db9b3d0..e523454bda3a 100644
--- a/arch/mips/dec/prom/call_o32.S
+++ b/arch/mips/dec/prom/call_o32.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/mips/dec/call_o32.S 2 * arch/mips/dec/prom/call_o32.S
3 * 3 *
4 * O32 interface for the 64 (or N32) ABI. 4 * O32 interface for the 64 (or N32) ABI.
5 * 5 *
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 375e0991505d..6f8b25cfa6f0 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -1211,7 +1211,7 @@ static void __init build_r4000_tlb_refill_handler(void)
1211 * Overflow check: For the 64bit handler, we need at least one 1211 * Overflow check: For the 64bit handler, we need at least one
1212 * free instruction slot for the wrap-around branch. In worst 1212 * free instruction slot for the wrap-around branch. In worst
1213 * case, if the intended insertion point is a delay slot, we 1213 * case, if the intended insertion point is a delay slot, we
1214 * need three, with the the second nop'ed and the third being 1214 * need three, with the second nop'ed and the third being
1215 * unused. 1215 * unused.
1216 */ 1216 */
1217#ifdef CONFIG_32BIT 1217#ifdef CONFIG_32BIT
diff --git a/arch/mips/pci/fixup-vr4133.c b/arch/mips/pci/fixup-vr4133.c
index 8e01d0c1b76b..597b89764ba1 100644
--- a/arch/mips/pci/fixup-vr4133.c
+++ b/arch/mips/pci/fixup-vr4133.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/mips/vr41xx/nec-cmbvr4133/pci_fixup.c 2 * arch/mips/pci/fixup-vr4133.c
3 * 3 *
4 * The NEC CMB-VR4133 Board specific PCI fixups. 4 * The NEC CMB-VR4133 Board specific PCI fixups.
5 * 5 *
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c
index dc30d66123b6..cbfb34221b59 100644
--- a/arch/mips/tx4938/common/irq.c
+++ b/arch/mips/tx4938/common/irq.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/mps/tx4938/common/irq.c 2 * linux/arch/mips/tx4938/common/irq.c
3 * 3 *
4 * Common tx4938 irq handler 4 * Common tx4938 irq handler
5 * Copyright (C) 2000-2001 Toshiba Corporation 5 * Copyright (C) 2000-2001 Toshiba Corporation
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 95c1b8ec4289..192357a3b9fe 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -941,8 +941,8 @@ syscall_exit_rfi:
941 * to "proper" values now (otherwise we'll wind up restoring 941 * to "proper" values now (otherwise we'll wind up restoring
942 * whatever was last stored in the task structure, which might 942 * whatever was last stored in the task structure, which might
943 * be inconsistent if an interrupt occured while on the gateway 943 * be inconsistent if an interrupt occured while on the gateway
944 * page) Note that we may be "trashing" values the user put in 944 * page). Note that we may be "trashing" values the user put in
945 * them, but we don't support the the user changing them. 945 * them, but we don't support the user changing them.
946 */ 946 */
947 947
948 STREG %r0,PT_SR2(%r16) 948 STREG %r0,PT_SR2(%r16)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 2587468eec43..8b6910465578 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -1013,7 +1013,7 @@ config CONSISTENT_START_BOOL
1013 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE 1013 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
1014 help 1014 help
1015 This option allows you to set the base virtual address 1015 This option allows you to set the base virtual address
1016 of the the consistent memory pool. This pool of virtual 1016 of the consistent memory pool. This pool of virtual
1017 memory is used to make consistent memory allocations. 1017 memory is used to make consistent memory allocations.
1018 1018
1019config CONSISTENT_START 1019config CONSISTENT_START
@@ -1024,7 +1024,7 @@ config CONSISTENT_SIZE_BOOL
1024 bool "Set custom consistent memory pool size" 1024 bool "Set custom consistent memory pool size"
1025 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE 1025 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
1026 help 1026 help
1027 This option allows you to set the size of the the 1027 This option allows you to set the size of the
1028 consistent memory pool. This pool of virtual memory 1028 consistent memory pool. This pool of virtual memory
1029 is used to make consistent memory allocations. 1029 is used to make consistent memory allocations.
1030 1030
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index c383d56bbe18..003520b56303 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -113,7 +113,7 @@ endif
113endif 113endif
114 114
115quiet_cmd_wrap = WRAP $@ 115quiet_cmd_wrap = WRAP $@
116 cmd_wrap =$(wrapper) -c -o $@ -p $2 $(CROSSWRAP) vmlinux 116 cmd_wrap =$(CONFIG_SHELL) $(wrapper) -c -o $@ -p $2 $(CROSSWRAP) vmlinux
117quiet_cmd_wrap_initrd = WRAP $@ 117quiet_cmd_wrap_initrd = WRAP $@
118 cmd_wrap_initrd =$(wrapper) -c -o $@ -p $2 $(CROSSWRAP) \ 118 cmd_wrap_initrd =$(wrapper) -c -o $@ -p $2 $(CROSSWRAP) \
119 -i $(obj)/ramdisk.image.gz vmlinux 119 -i $(obj)/ramdisk.image.gz vmlinux
diff --git a/arch/powerpc/kernel/perfmon_fsl_booke.c b/arch/powerpc/kernel/perfmon_fsl_booke.c
index bdc3977a7b06..e0dcf2b41fbe 100644
--- a/arch/powerpc/kernel/perfmon_fsl_booke.c
+++ b/arch/powerpc/kernel/perfmon_fsl_booke.c
@@ -1,4 +1,4 @@
1/* kernel/perfmon_fsl_booke.c 1/* arch/powerpc/kernel/perfmon_fsl_booke.c
2 * Freescale Book-E Performance Monitor code 2 * Freescale Book-E Performance Monitor code
3 * 3 *
4 * Author: Andy Fleming 4 * Author: Andy Fleming
diff --git a/arch/powerpc/oprofile/op_model_7450.c b/arch/powerpc/oprofile/op_model_7450.c
index e0491c3c71f1..d8ee3aea83f8 100644
--- a/arch/powerpc/oprofile/op_model_7450.c
+++ b/arch/powerpc/oprofile/op_model_7450.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * oprofile/op_model_7450.c 2 * arch/powerpc/oprofile/op_model_7450.c
3 * 3 *
4 * Freescale 745x/744x oprofile support, based on fsl_booke support 4 * Freescale 745x/744x oprofile support, based on fsl_booke support
5 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM 5 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
diff --git a/arch/powerpc/oprofile/op_model_fsl_booke.c b/arch/powerpc/oprofile/op_model_fsl_booke.c
index 93d63e62662f..e29dede31423 100644
--- a/arch/powerpc/oprofile/op_model_fsl_booke.c
+++ b/arch/powerpc/oprofile/op_model_fsl_booke.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * oprofile/op_model_e500.c 2 * arch/powerpc/oprofile/op_model_fsl_booke.c
3 * 3 *
4 * Freescale Book-E oprofile support, based on ppc64 oprofile support 4 * Freescale Book-E oprofile support, based on ppc64 oprofile support
5 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM 5 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
diff --git a/arch/powerpc/platforms/83xx/mpc834x_sys.h b/arch/powerpc/platforms/83xx/mpc834x_sys.h
index fedecb73f7ff..7d5bbef084e7 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_sys.h
+++ b/arch/powerpc/platforms/83xx/mpc834x_sys.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/powerppc/platforms/83xx/mpc834x_sys.h 2 * arch/powerpc/platforms/83xx/mpc834x_sys.h
3 * 3 *
4 * MPC834X SYS common board definitions 4 * MPC834X SYS common board definitions
5 * 5 *
diff --git a/arch/powerpc/platforms/85xx/mpc8540_ads.h b/arch/powerpc/platforms/85xx/mpc8540_ads.h
index c0d56d2bb5a5..da82f4c0fdac 100644
--- a/arch/powerpc/platforms/85xx/mpc8540_ads.h
+++ b/arch/powerpc/platforms/85xx/mpc8540_ads.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/mpc8540_ads.h 2 * arch/powerpc/platforms/85xx/mpc8540_ads.h
3 * 3 *
4 * MPC8540ADS board definitions 4 * MPC8540ADS board definitions
5 * 5 *
diff --git a/arch/powerpc/platforms/85xx/mpc85xx.h b/arch/powerpc/platforms/85xx/mpc85xx.h
index b44db6268f3d..83415db33378 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx.h
+++ b/arch/powerpc/platforms/85xx/mpc85xx.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/mpc85xx.h 2 * arch/powerpc/platforms/85xx/mpc85xx.h
3 * 3 *
4 * MPC85xx soc definitions/function decls 4 * MPC85xx soc definitions/function decls
5 * 5 *
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.h b/arch/powerpc/platforms/85xx/mpc85xx_cds.h
index 671f54ff185a..b251c9feb3dc 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.h
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/mpc85xx_cds_common.h 2 * arch/powerpc/platforms/85xx/mpc85xx_cds.h
3 * 3 *
4 * MPC85xx CDS board definitions 4 * MPC85xx CDS board definitions
5 * 5 *
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 0251b7c68d0e..6ebdae8e6f69 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-ppc/ipic.c 2 * arch/powerpc/sysdev/ipic.c
3 * 3 *
4 * IPIC routines implementations. 4 * IPIC routines implementations.
5 * 5 *
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 723972bb5bd9..3ee03a9a98fa 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -341,7 +341,7 @@ static void __init mpic_scan_ht_pic(struct mpic *mpic, u8 __iomem *devbase,
341 u8 id = readb(devbase + pos + PCI_CAP_LIST_ID); 341 u8 id = readb(devbase + pos + PCI_CAP_LIST_ID);
342 if (id == PCI_CAP_ID_HT) { 342 if (id == PCI_CAP_ID_HT) {
343 id = readb(devbase + pos + 3); 343 id = readb(devbase + pos + 3);
344 if (id == 0x80) 344 if (id == HT_CAPTYPE_IRQ)
345 break; 345 break;
346 } 346 }
347 } 347 }
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index fdd9e7b66244..077711e63104 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -1345,7 +1345,7 @@ config CONSISTENT_START_BOOL
1345 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE 1345 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
1346 help 1346 help
1347 This option allows you to set the base virtual address 1347 This option allows you to set the base virtual address
1348 of the the consistent memory pool. This pool of virtual 1348 of the consistent memory pool. This pool of virtual
1349 memory is used to make consistent memory allocations. 1349 memory is used to make consistent memory allocations.
1350 1350
1351config CONSISTENT_START 1351config CONSISTENT_START
@@ -1356,7 +1356,7 @@ config CONSISTENT_SIZE_BOOL
1356 bool "Set custom consistent memory pool size" 1356 bool "Set custom consistent memory pool size"
1357 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE 1357 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
1358 help 1358 help
1359 This option allows you to set the size of the the 1359 This option allows you to set the size of the
1360 consistent memory pool. This pool of virtual memory 1360 consistent memory pool. This pool of virtual memory
1361 is used to make consistent memory allocations. 1361 is used to make consistent memory allocations.
1362 1362
diff --git a/arch/ppc/boot/include/mpsc_defs.h b/arch/ppc/boot/include/mpsc_defs.h
index 2ce7bbba7277..9f37e1355b17 100644
--- a/arch/ppc/boot/include/mpsc_defs.h
+++ b/arch/ppc/boot/include/mpsc_defs.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * drivers/serial/mpsc/mpsc_defs.h 2 * arch/ppc/boot/include/mpsc_defs.h
3 * 3 *
4 * Register definitions for the Marvell Multi-Protocol Serial Controller (MPSC), 4 * Register definitions for the Marvell Multi-Protocol Serial Controller (MPSC),
5 * Serial DMA Controller (SDMA), and Baud Rate Generator (BRG). 5 * Serial DMA Controller (SDMA), and Baud Rate Generator (BRG).
diff --git a/arch/ppc/platforms/4xx/xparameters/xparameters.h b/arch/ppc/platforms/4xx/xparameters/xparameters.h
index cd7d0e7d9863..66ec5f35f306 100644
--- a/arch/ppc/platforms/4xx/xparameters/xparameters.h
+++ b/arch/ppc/platforms/4xx/xparameters/xparameters.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-ppc/xparameters.h 2 * arch/ppc/platforms/4xx/xparameters/xparameters.h
3 * 3 *
4 * This file includes the correct xparameters.h for the CONFIG'ed board plus 4 * This file includes the correct xparameters.h for the CONFIG'ed board plus
5 * fixups to translate board specific XPAR values to a common set of names 5 * fixups to translate board specific XPAR values to a common set of names
diff --git a/arch/ppc/platforms/85xx/Kconfig b/arch/ppc/platforms/85xx/Kconfig
index 7ddd331a7145..6f2d0add7de6 100644
--- a/arch/ppc/platforms/85xx/Kconfig
+++ b/arch/ppc/platforms/85xx/Kconfig
@@ -24,12 +24,12 @@ config MPC8540_ADS
24config MPC8548_CDS 24config MPC8548_CDS
25 bool "Freescale MPC8548 CDS" 25 bool "Freescale MPC8548 CDS"
26 help 26 help
27 This option enablese support for the MPC8548 CDS evaluation board. 27 This option enables support for the MPC8548 CDS evaluation board.
28 28
29config MPC8555_CDS 29config MPC8555_CDS
30 bool "Freescale MPC8555 CDS" 30 bool "Freescale MPC8555 CDS"
31 help 31 help
32 This option enablese support for the MPC8555 CDS evaluation board. 32 This option enables support for the MPC8555 CDS evaluation board.
33 33
34config MPC8560_ADS 34config MPC8560_ADS
35 bool "Freescale MPC8560 ADS" 35 bool "Freescale MPC8560 ADS"
@@ -51,22 +51,22 @@ config STX_GP3
51config TQM8540 51config TQM8540
52 bool "TQ Components TQM8540" 52 bool "TQ Components TQM8540"
53 help 53 help
54 This option enablese support for the TQ Components TQM8540 board. 54 This option enables support for the TQ Components TQM8540 board.
55 55
56config TQM8541 56config TQM8541
57 bool "TQ Components TQM8541" 57 bool "TQ Components TQM8541"
58 help 58 help
59 This option enablese support for the TQ Components TQM8541 board. 59 This option enables support for the TQ Components TQM8541 board.
60 60
61config TQM8555 61config TQM8555
62 bool "TQ Components TQM8555" 62 bool "TQ Components TQM8555"
63 help 63 help
64 This option enablese support for the TQ Components TQM8555 board. 64 This option enables support for the TQ Components TQM8555 board.
65 65
66config TQM8560 66config TQM8560
67 bool "TQ Components TQM8560" 67 bool "TQ Components TQM8560"
68 help 68 help
69 This option enablese support for the TQ Components TQM8560 board. 69 This option enables support for the TQ Components TQM8560 board.
70 70
71endchoice 71endchoice
72 72
@@ -94,7 +94,7 @@ config MPC8560
94 default y 94 default y
95 95
96config 85xx_PCI2 96config 85xx_PCI2
97 bool "Supprt for 2nd PCI host controller" 97 bool "Support for 2nd PCI host controller"
98 depends on MPC8555_CDS 98 depends on MPC8555_CDS
99 default y 99 default y
100 100
diff --git a/arch/ppc/platforms/lopec.h b/arch/ppc/platforms/lopec.h
index 5490edb2d263..d597b6878693 100644
--- a/arch/ppc/platforms/lopec.h
+++ b/arch/ppc/platforms/lopec.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-ppc/lopec_serial.h 2 * arch/ppc/platforms/lopec.h
3 * 3 *
4 * Definitions for Motorola LoPEC board. 4 * Definitions for Motorola LoPEC board.
5 * 5 *
diff --git a/arch/ppc/platforms/mpc8272ads_setup.c b/arch/ppc/platforms/mpc8272ads_setup.c
index d5d36c372c8e..d7b3a6afa78f 100644
--- a/arch/ppc/platforms/mpc8272ads_setup.c
+++ b/arch/ppc/platforms/mpc8272ads_setup.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/ppc/platforms/82xx/pq2ads_pd.c 2 * arch/ppc/platforms/mpc8272ads_setup.c
3 * 3 *
4 * MPC82xx Board-specific PlatformDevice descriptions 4 * MPC82xx Board-specific PlatformDevice descriptions
5 * 5 *
diff --git a/arch/ppc/platforms/mpc885ads_setup.c b/arch/ppc/platforms/mpc885ads_setup.c
index bf388ed04d46..02293141efb5 100644
--- a/arch/ppc/platforms/mpc885ads_setup.c
+++ b/arch/ppc/platforms/mpc885ads_setup.c
@@ -1,4 +1,4 @@
1/*arch/ppc/platforms/mpc885ads-setup.c 1/*arch/ppc/platforms/mpc885ads_setup.c
2 * 2 *
3 * Platform setup for the Freescale mpc885ads board 3 * Platform setup for the Freescale mpc885ads board
4 * 4 *
diff --git a/arch/ppc/platforms/mvme5100.h b/arch/ppc/platforms/mvme5100.h
index edd479439a4e..9e2a09e636ae 100644
--- a/arch/ppc/platforms/mvme5100.h
+++ b/arch/ppc/platforms/mvme5100.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-ppc/platforms/mvme5100.h 2 * arch/ppc/platforms/mvme5100.h
3 * 3 *
4 * Definitions for Motorola MVME5100. 4 * Definitions for Motorola MVME5100.
5 * 5 *
diff --git a/arch/ppc/platforms/powerpmc250.h b/arch/ppc/platforms/powerpmc250.h
index 41a6dc881911..d33ad8dc0439 100644
--- a/arch/ppc/platforms/powerpmc250.h
+++ b/arch/ppc/platforms/powerpmc250.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-ppc/platforms/powerpmc250.h 2 * arch/ppc/platforms/powerpmc250.h
3 * 3 *
4 * Definitions for Force PowerPMC-250 board support 4 * Definitions for Force PowerPMC-250 board support
5 * 5 *
diff --git a/arch/ppc/platforms/prpmc750.h b/arch/ppc/platforms/prpmc750.h
index 015b4f52c3eb..4c7adcc9ae33 100644
--- a/arch/ppc/platforms/prpmc750.h
+++ b/arch/ppc/platforms/prpmc750.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-ppc/platforms/prpmc750.h 2 * arch/ppc/platforms/prpmc750.h
3 * 3 *
4 * Definitions for Motorola PrPMC750 board support 4 * Definitions for Motorola PrPMC750 board support
5 * 5 *
diff --git a/arch/ppc/platforms/prpmc800.h b/arch/ppc/platforms/prpmc800.h
index e53ec9b42a35..26f604e05cfa 100644
--- a/arch/ppc/platforms/prpmc800.h
+++ b/arch/ppc/platforms/prpmc800.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-ppc/platforms/prpmc800.h 2 * arch/ppc/platforms/prpmc800.h
3 * 3 *
4 * Definitions for Motorola PrPMC800 board support 4 * Definitions for Motorola PrPMC800 board support
5 * 5 *
diff --git a/arch/ppc/platforms/spruce.h b/arch/ppc/platforms/spruce.h
index a31ff7ee698f..f1f96f1de72a 100644
--- a/arch/ppc/platforms/spruce.h
+++ b/arch/ppc/platforms/spruce.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-ppc/platforms/spruce.h 2 * arch/ppc/platforms/spruce.h
3 * 3 *
4 * Definitions for IBM Spruce reference board support 4 * Definitions for IBM Spruce reference board support
5 * 5 *
diff --git a/arch/sh/boards/bigsur/io.c b/arch/sh/boards/bigsur/io.c
index 6835381da5fd..23071f97eec3 100644
--- a/arch/sh/boards/bigsur/io.c
+++ b/arch/sh/boards/bigsur/io.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-sh/io_bigsur.c 2 * arch/sh/boards/bigsur/io.c
3 * 3 *
4 * By Dustin McIntire (dustin@sensoria.com) (c)2001 4 * By Dustin McIntire (dustin@sensoria.com) (c)2001
5 * Derived from io_hd64465.h, which bore the message: 5 * Derived from io_hd64465.h, which bore the message:
diff --git a/arch/sh/boards/bigsur/led.c b/arch/sh/boards/bigsur/led.c
index 6b08c0e1c453..d221439aafcc 100644
--- a/arch/sh/boards/bigsur/led.c
+++ b/arch/sh/boards/bigsur/led.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/kernel/led_bigsur.c 2 * linux/arch/sh/boards/bigsur/led.c
3 * 3 *
4 * By Dustin McIntire (dustin@sensoria.com) (c)2001 4 * By Dustin McIntire (dustin@sensoria.com) (c)2001
5 * Derived from led_se.c and led.c, which bore the message: 5 * Derived from led_se.c and led.c, which bore the message:
diff --git a/arch/sh/boards/ec3104/io.c b/arch/sh/boards/ec3104/io.c
index a70928c44753..2f86394b280b 100644
--- a/arch/sh/boards/ec3104/io.c
+++ b/arch/sh/boards/ec3104/io.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/kernel/io_ec3104.c 2 * linux/arch/sh/boards/ec3104/io.c
3 * EC3104 companion chip support 3 * EC3104 companion chip support
4 * 4 *
5 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> 5 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
diff --git a/arch/sh/boards/hp6xx/setup.c b/arch/sh/boards/hp6xx/setup.c
index 60ab17ad6054..2d3a5b4faf58 100644
--- a/arch/sh/boards/hp6xx/setup.c
+++ b/arch/sh/boards/hp6xx/setup.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/boards/hp6xx/hp680/setup.c 2 * linux/arch/sh/boards/hp6xx/setup.c
3 * 3 *
4 * Copyright (C) 2002 Andriy Skulysh 4 * Copyright (C) 2002 Andriy Skulysh
5 * 5 *
diff --git a/arch/sh/boards/mpc1211/led.c b/arch/sh/boards/mpc1211/led.c
index 1fe36927f691..8df1591823d6 100644
--- a/arch/sh/boards/mpc1211/led.c
+++ b/arch/sh/boards/mpc1211/led.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/kernel/led_mpc1211.c 2 * linux/arch/sh/boards/mpc1211/led.c
3 * 3 *
4 * Copyright (C) 2001 Saito.K & Jeanne 4 * Copyright (C) 2001 Saito.K & Jeanne
5 * 5 *
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
index 8eb5d4303972..01c10fa5c058 100644
--- a/arch/sh/boards/mpc1211/setup.c
+++ b/arch/sh/boards/mpc1211/setup.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/board/mpc1211/setup.c 2 * linux/arch/sh/boards/mpc1211/setup.c
3 * 3 *
4 * Copyright (C) 2002 Saito.K & Jeanne, Fujii.Y 4 * Copyright (C) 2002 Saito.K & Jeanne, Fujii.Y
5 * 5 *
diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c
index 9ea1136b219b..51f3f6574210 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/io.c
+++ b/arch/sh/boards/renesas/hs7751rvoip/io.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/kernel/io_hs7751rvoip.c 2 * linux/arch/sh/boards/renesas/hs7751rvoip/io.c
3 * 3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c. 5 * Based largely on io_se.c.
diff --git a/arch/sh/boards/renesas/hs7751rvoip/pci.c b/arch/sh/boards/renesas/hs7751rvoip/pci.c
index 7e5786b58110..1c0ddee30d21 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/pci.c
+++ b/arch/sh/boards/renesas/hs7751rvoip/pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/kernel/pci-hs7751rvoip.c 2 * linux/arch/sh/boards/renesas/hs7751rvoip/pci.c
3 * 3 *
4 * Author: Ian DaSilva (idasilva@mvista.com) 4 * Author: Ian DaSilva (idasilva@mvista.com)
5 * 5 *
diff --git a/arch/sh/boards/renesas/rts7751r2d/led.c b/arch/sh/boards/renesas/rts7751r2d/led.c
index e14a13d12d4a..a7ce66c1e4f0 100644
--- a/arch/sh/boards/renesas/rts7751r2d/led.c
+++ b/arch/sh/boards/renesas/rts7751r2d/led.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/kernel/led_rts7751r2d.c 2 * linux/arch/sh/boards/renesas/rts7751r2d/led.c
3 * 3 *
4 * Copyright (C) Atom Create Engineering Co., Ltd. 4 * Copyright (C) Atom Create Engineering Co., Ltd.
5 * 5 *
diff --git a/arch/sh/boards/renesas/systemh/io.c b/arch/sh/boards/renesas/systemh/io.c
index cde6e5d192c4..1b767e1a1428 100644
--- a/arch/sh/boards/renesas/systemh/io.c
+++ b/arch/sh/boards/renesas/systemh/io.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/boards/systemh/io.c 2 * linux/arch/sh/boards/renesas/systemh/io.c
3 * 3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c. 5 * Based largely on io_se.c.
diff --git a/arch/sh/boards/renesas/systemh/irq.c b/arch/sh/boards/renesas/systemh/irq.c
index 8d016dae2333..0ba2fe674c47 100644
--- a/arch/sh/boards/renesas/systemh/irq.c
+++ b/arch/sh/boards/renesas/systemh/irq.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/boards/systemh/irq.c 2 * linux/arch/sh/boards/renesas/systemh/irq.c
3 * 3 *
4 * Copyright (C) 2000 Kazumoto Kojima 4 * Copyright (C) 2000 Kazumoto Kojima
5 * 5 *
diff --git a/arch/sh/boards/renesas/systemh/setup.c b/arch/sh/boards/renesas/systemh/setup.c
index bab7d3cdc87b..936117659b74 100644
--- a/arch/sh/boards/renesas/systemh/setup.c
+++ b/arch/sh/boards/renesas/systemh/setup.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/boards/systemh/setup.c 2 * linux/arch/sh/boards/renesas/systemh/setup.c
3 * 3 *
4 * Copyright (C) 2000 Kazumoto Kojima 4 * Copyright (C) 2000 Kazumoto Kojima
5 * Copyright (C) 2003 Paul Mundt 5 * Copyright (C) 2003 Paul Mundt
diff --git a/arch/sh/boards/se/770x/led.c b/arch/sh/boards/se/770x/led.c
index daf7b1ee786a..d93dd831b2ad 100644
--- a/arch/sh/boards/se/770x/led.c
+++ b/arch/sh/boards/se/770x/led.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/kernel/led_se.c 2 * linux/arch/sh/boards/se/770x/led.c
3 * 3 *
4 * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com> 4 * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
5 * 5 *
diff --git a/arch/sh/boards/se/7751/led.c b/arch/sh/boards/se/7751/led.c
index ff0355dea81b..de4194d97c88 100644
--- a/arch/sh/boards/se/7751/led.c
+++ b/arch/sh/boards/se/7751/led.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/kernel/led_se.c 2 * linux/arch/sh/boards/se/7751/led.c
3 * 3 *
4 * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com> 4 * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
5 * 5 *
diff --git a/arch/sh/boards/se/7751/pci.c b/arch/sh/boards/se/7751/pci.c
index 3ee03014dea3..203b2923fe7f 100644
--- a/arch/sh/boards/se/7751/pci.c
+++ b/arch/sh/boards/se/7751/pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/kernel/pci-7751se.c 2 * linux/arch/sh/boards/se/7751/pci.c
3 * 3 *
4 * Author: Ian DaSilva (idasilva@mvista.com) 4 * Author: Ian DaSilva (idasilva@mvista.com)
5 * 5 *
diff --git a/arch/sh/boards/superh/microdev/io.c b/arch/sh/boards/superh/microdev/io.c
index 4836b9422e27..83419bf4c834 100644
--- a/arch/sh/boards/superh/microdev/io.c
+++ b/arch/sh/boards/superh/microdev/io.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/kernel/io_microdev.c 2 * linux/arch/sh/boards/superh/microdev/io.c
3 * 3 *
4 * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) 4 * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
5 * Copyright (C) 2003, 2004 SuperH, Inc. 5 * Copyright (C) 2003, 2004 SuperH, Inc.
diff --git a/arch/sh/boards/superh/microdev/led.c b/arch/sh/boards/superh/microdev/led.c
index a38f5351bd16..36e54b47a752 100644
--- a/arch/sh/boards/superh/microdev/led.c
+++ b/arch/sh/boards/superh/microdev/led.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/kernel/led_microdev.c 2 * linux/arch/sh/boards/superh/microdev/led.c
3 * 3 *
4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com> 4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
5 * Copyright (C) 2003 Richard Curnow (Richard.Curnow@superh.com) 5 * Copyright (C) 2003 Richard Curnow (Richard.Curnow@superh.com)
diff --git a/arch/sh/drivers/dma/dma-pvr2.c b/arch/sh/drivers/dma/dma-pvr2.c
index 3b0b0f60bb3c..c1b6bc23c107 100644
--- a/arch/sh/drivers/dma/dma-pvr2.c
+++ b/arch/sh/drivers/dma/dma-pvr2.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh/boards/dreamcast/dma-pvr2.c 2 * arch/sh/drivers/dma/dma-pvr2.c
3 * 3 *
4 * NEC PowerVR 2 (Dreamcast) DMA support 4 * NEC PowerVR 2 (Dreamcast) DMA support
5 * 5 *
diff --git a/arch/sh/drivers/pci/dma-dreamcast.c b/arch/sh/drivers/pci/dma-dreamcast.c
index 6acf02b9375b..230d6ec0d239 100644
--- a/arch/sh/drivers/pci/dma-dreamcast.c
+++ b/arch/sh/drivers/pci/dma-dreamcast.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh/pci/dma-dreamcast.c 2 * arch/sh/drivers/pci/dma-dreamcast.c
3 * 3 *
4 * PCI DMA support for the Sega Dreamcast 4 * PCI DMA support for the Sega Dreamcast
5 * 5 *
diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c
index c0af5f7ef414..6f53f8200dc3 100644
--- a/arch/sh/drivers/pci/fixups-dreamcast.c
+++ b/arch/sh/drivers/pci/fixups-dreamcast.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh/pci/fixups-dreamcast.c 2 * arch/sh/drivers/pci/fixups-dreamcast.c
3 * 3 *
4 * PCI fixups for the Sega Dreamcast 4 * PCI fixups for the Sega Dreamcast
5 * 5 *
diff --git a/arch/sh/drivers/pci/ops-bigsur.c b/arch/sh/drivers/pci/ops-bigsur.c
index 5da501bd77b5..eb31be751524 100644
--- a/arch/sh/drivers/pci/ops-bigsur.c
+++ b/arch/sh/drivers/pci/ops-bigsur.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/kernel/pci-bigsur.c 2 * linux/arch/sh/drivers/pci/ops-bigsur.c
3 * 3 *
4 * By Dustin McIntire (dustin@sensoria.com) (c)2001 4 * By Dustin McIntire (dustin@sensoria.com) (c)2001
5 * 5 *
diff --git a/arch/sh/drivers/pci/ops-dreamcast.c b/arch/sh/drivers/pci/ops-dreamcast.c
index 23d52791917e..381306cf5425 100644
--- a/arch/sh/drivers/pci/ops-dreamcast.c
+++ b/arch/sh/drivers/pci/ops-dreamcast.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh/pci/ops-dreamcast.c 2 * arch/sh/drivers/pci/ops-dreamcast.c
3 * 3 *
4 * PCI operations for the Sega Dreamcast 4 * PCI operations for the Sega Dreamcast
5 * 5 *
diff --git a/arch/sh/drivers/pci/ops-rts7751r2d.c b/arch/sh/drivers/pci/ops-rts7751r2d.c
index 88f44e245424..b68824c8b81e 100644
--- a/arch/sh/drivers/pci/ops-rts7751r2d.c
+++ b/arch/sh/drivers/pci/ops-rts7751r2d.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sh/kernel/pci-rts7751r2d.c 2 * linux/arch/sh/drivers/pci/ops-rts7751r2d.c
3 * 3 *
4 * Author: Ian DaSilva (idasilva@mvista.com) 4 * Author: Ian DaSilva (idasilva@mvista.com)
5 * 5 *
diff --git a/arch/sh/kernel/cpu/ubc.S b/arch/sh/kernel/cpu/ubc.S
index 0c569b20e1c1..81923079fa12 100644
--- a/arch/sh/kernel/cpu/ubc.S
+++ b/arch/sh/kernel/cpu/ubc.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh/kernel/ubc.S 2 * arch/sh/kernel/cpu/ubc.S
3 * 3 *
4 * Set of management routines for the User Break Controller (UBC) 4 * Set of management routines for the User Break Controller (UBC)
5 * 5 *
diff --git a/arch/sh64/boot/compressed/misc.c b/arch/sh64/boot/compressed/misc.c
index ee7a1b6acb83..aea00c53ce29 100644
--- a/arch/sh64/boot/compressed/misc.c
+++ b/arch/sh64/boot/compressed/misc.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/shmedia/boot/compressed/misc.c 2 * arch/sh64/boot/compressed/misc.c
3 * 3 *
4 * This is a collection of several routines from gzip-1.0.3 4 * This is a collection of several routines from gzip-1.0.3
5 * adapted for Linux. 5 * adapted for Linux.
diff --git a/arch/sh64/kernel/alphanum.c b/arch/sh64/kernel/alphanum.c
index 9079d1e94f2b..91707c1acd70 100644
--- a/arch/sh64/kernel/alphanum.c
+++ b/arch/sh64/kernel/alphanum.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh64/kernel/alpanum.c 2 * arch/sh64/kernel/alphanum.c
3 * 3 *
4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com> 4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
5 * 5 *
diff --git a/arch/sh64/lib/c-checksum.c b/arch/sh64/lib/c-checksum.c
index 53c1cabb3428..0e8a742abf8c 100644
--- a/arch/sh64/lib/c-checksum.c
+++ b/arch/sh64/lib/c-checksum.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh/lib/csum_parial.c 2 * arch/sh64/lib/c-checksum.c
3 * 3 *
4 * This file contains network checksum routines that are better done 4 * This file contains network checksum routines that are better done
5 * in an architecture-specific manner due to speed.. 5 * in an architecture-specific manner due to speed..
diff --git a/arch/sh64/mach-cayman/led.c b/arch/sh64/mach-cayman/led.c
index 8b3cc4c78870..b4e122fd9502 100644
--- a/arch/sh64/mach-cayman/led.c
+++ b/arch/sh64/mach-cayman/led.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh64/kernel/led_cayman.c 2 * arch/sh64/mach-cayman/led.c
3 * 3 *
4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com> 4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
5 * 5 *
diff --git a/arch/sh64/oprofile/op_model_null.c b/arch/sh64/oprofile/op_model_null.c
index a845b088edb4..a750ea1fee98 100644
--- a/arch/sh64/oprofile/op_model_null.c
+++ b/arch/sh64/oprofile/op_model_null.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh/oprofile/op_model_null.c 2 * arch/sh64/oprofile/op_model_null.c
3 * 3 *
4 * Copyright (C) 2003 Paul Mundt 4 * Copyright (C) 2003 Paul Mundt
5 * 5 *
diff --git a/arch/sparc/kernel/sys_solaris.c b/arch/sparc/kernel/sys_solaris.c
index c09afd96dd9c..01b07bb440f0 100644
--- a/arch/sparc/kernel/sys_solaris.c
+++ b/arch/sparc/kernel/sys_solaris.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/sparc/sys_solaris.c 2 * linux/arch/sparc/kernel/sys_solaris.c
3 * 3 *
4 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) 4 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
5 */ 5 */
diff --git a/arch/um/Kconfig b/arch/um/Kconfig
index 76e85bbaea55..d75307589d74 100644
--- a/arch/um/Kconfig
+++ b/arch/um/Kconfig
@@ -257,7 +257,7 @@ config UML_REAL_TIME_CLOCK
257 UML and spend long times with UML stopped at a breakpoint. In this 257 UML and spend long times with UML stopped at a breakpoint. In this
258 case, when UML is restarted, it will call the timer enough times to make 258 case, when UML is restarted, it will call the timer enough times to make
259 up for the time spent at the breakpoint. This could result in a 259 up for the time spent at the breakpoint. This could result in a
260 noticable lag. If this is a problem, then disable this option. 260 noticeable lag. If this is a problem, then disable this option.
261 261
262endmenu 262endmenu
263 263
diff --git a/arch/um/Makefile b/arch/um/Makefile
index f6ad832faf13..c8016a98483b 100644
--- a/arch/um/Makefile
+++ b/arch/um/Makefile
@@ -102,7 +102,7 @@ linux: vmlinux
102define archhelp 102define archhelp
103 echo '* linux - Binary kernel image (./linux) - for backward' 103 echo '* linux - Binary kernel image (./linux) - for backward'
104 echo ' compatibility only, this creates a hard link to the' 104 echo ' compatibility only, this creates a hard link to the'
105 echo ' real kernel binary, the the "vmlinux" binary you' 105 echo ' real kernel binary, the "vmlinux" binary you'
106 echo ' find in the kernel root.' 106 echo ' find in the kernel root.'
107endef 107endef
108 108
diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c
index 24747a413785..cfd9f01fd464 100644
--- a/arch/um/drivers/line.c
+++ b/arch/um/drivers/line.c
@@ -497,7 +497,7 @@ void close_lines(struct line *lines, int nlines)
497} 497}
498 498
499/* Common setup code for both startup command line and mconsole initialization. 499/* Common setup code for both startup command line and mconsole initialization.
500 * @lines contains the the array (of size @num) to modify; 500 * @lines contains the array (of size @num) to modify;
501 * @init is the setup string; 501 * @init is the setup string;
502 */ 502 */
503 503
diff --git a/arch/um/include/sysdep-x86_64/ptrace_user.h b/arch/um/include/sysdep-x86_64/ptrace_user.h
index 128faf027364..4cd61a852fab 100644
--- a/arch/um/include/sysdep-x86_64/ptrace_user.h
+++ b/arch/um/include/sysdep-x86_64/ptrace_user.h
@@ -55,7 +55,7 @@
55#define PTRACE_OLDSETOPTIONS 21 55#define PTRACE_OLDSETOPTIONS 21
56#endif 56#endif
57 57
58/* These are before the system call, so the the system call number is RAX 58/* These are before the system call, so the system call number is RAX
59 * rather than ORIG_RAX, and arg4 is R10 rather than RCX 59 * rather than ORIG_RAX, and arg4 is R10 rather than RCX
60 */ 60 */
61#define REGS_SYSCALL_NR PT_INDEX(RAX) 61#define REGS_SYSCALL_NR PT_INDEX(RAX)
diff --git a/arch/v850/kernel/entry.S b/arch/v850/kernel/entry.S
index d991e4547dbb..8bc521ca081f 100644
--- a/arch/v850/kernel/entry.S
+++ b/arch/v850/kernel/entry.S
@@ -195,7 +195,7 @@
195 sst.w lp, PTO+PT_GPR(GPR_LP)[ep]; \ 195 sst.w lp, PTO+PT_GPR(GPR_LP)[ep]; \
196 type ## _STATE_SAVER 196 type ## _STATE_SAVER
197/* Pop a register state pushed by PUSH_STATE, except for the stack pointer, 197/* Pop a register state pushed by PUSH_STATE, except for the stack pointer,
198 from the the stack. */ 198 from the stack. */
199#define POP_STATE(type) \ 199#define POP_STATE(type) \
200 mov sp, ep; \ 200 mov sp, ep; \
201 type ## _STATE_RESTORER; \ 201 type ## _STATE_RESTORER; \
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig
index 0a5d8e659aa4..010d2265f1cf 100644
--- a/arch/x86_64/Kconfig
+++ b/arch/x86_64/Kconfig
@@ -310,7 +310,7 @@ config K8_NUMA
310 help 310 help
311 Enable K8 NUMA node topology detection. You should say Y here if 311 Enable K8 NUMA node topology detection. You should say Y here if
312 you have a multi processor AMD K8 system. This uses an old 312 you have a multi processor AMD K8 system. This uses an old
313 method to read the NUMA configurtion directly from the builtin 313 method to read the NUMA configuration directly from the builtin
314 Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA 314 Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA
315 instead, which also takes priority if both are compiled in. 315 instead, which also takes priority if both are compiled in.
316 316
diff --git a/arch/x86_64/kernel/i8259.c b/arch/x86_64/kernel/i8259.c
index 2dd51f364ea2..0612a33bb896 100644
--- a/arch/x86_64/kernel/i8259.c
+++ b/arch/x86_64/kernel/i8259.c
@@ -43,17 +43,10 @@
43 BI(x,8) BI(x,9) BI(x,a) BI(x,b) \ 43 BI(x,8) BI(x,9) BI(x,a) BI(x,b) \
44 BI(x,c) BI(x,d) BI(x,e) BI(x,f) 44 BI(x,c) BI(x,d) BI(x,e) BI(x,f)
45 45
46#define BUILD_15_IRQS(x) \
47 BI(x,0) BI(x,1) BI(x,2) BI(x,3) \
48 BI(x,4) BI(x,5) BI(x,6) BI(x,7) \
49 BI(x,8) BI(x,9) BI(x,a) BI(x,b) \
50 BI(x,c) BI(x,d) BI(x,e)
51
52/* 46/*
53 * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts: 47 * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
54 * (these are usually mapped to vectors 0x20-0x2f) 48 * (these are usually mapped to vectors 0x20-0x2f)
55 */ 49 */
56BUILD_16_IRQS(0x0)
57 50
58/* 51/*
59 * The IO-APIC gives us many more interrupt sources. Most of these 52 * The IO-APIC gives us many more interrupt sources. Most of these
@@ -65,17 +58,12 @@ BUILD_16_IRQS(0x0)
65 * 58 *
66 * (these are usually mapped into the 0x30-0xff vector range) 59 * (these are usually mapped into the 0x30-0xff vector range)
67 */ 60 */
68 BUILD_16_IRQS(0x1) BUILD_16_IRQS(0x2) BUILD_16_IRQS(0x3) 61 BUILD_16_IRQS(0x2) BUILD_16_IRQS(0x3)
69BUILD_16_IRQS(0x4) BUILD_16_IRQS(0x5) BUILD_16_IRQS(0x6) BUILD_16_IRQS(0x7) 62BUILD_16_IRQS(0x4) BUILD_16_IRQS(0x5) BUILD_16_IRQS(0x6) BUILD_16_IRQS(0x7)
70BUILD_16_IRQS(0x8) BUILD_16_IRQS(0x9) BUILD_16_IRQS(0xa) BUILD_16_IRQS(0xb) 63BUILD_16_IRQS(0x8) BUILD_16_IRQS(0x9) BUILD_16_IRQS(0xa) BUILD_16_IRQS(0xb)
71BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd) 64BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd) BUILD_16_IRQS(0xe) BUILD_16_IRQS(0xf)
72
73#ifdef CONFIG_PCI_MSI
74 BUILD_15_IRQS(0xe)
75#endif
76 65
77#undef BUILD_16_IRQS 66#undef BUILD_16_IRQS
78#undef BUILD_15_IRQS
79#undef BI 67#undef BI
80 68
81 69
@@ -88,29 +76,15 @@ BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd)
88 IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \ 76 IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \
89 IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f) 77 IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f)
90 78
91#define IRQLIST_15(x) \
92 IRQ(x,0), IRQ(x,1), IRQ(x,2), IRQ(x,3), \
93 IRQ(x,4), IRQ(x,5), IRQ(x,6), IRQ(x,7), \
94 IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \
95 IRQ(x,c), IRQ(x,d), IRQ(x,e)
96
97void (*interrupt[NR_IRQS])(void) = { 79void (*interrupt[NR_IRQS])(void) = {
98 IRQLIST_16(0x0), 80 IRQLIST_16(0x2), IRQLIST_16(0x3),
99
100 IRQLIST_16(0x1), IRQLIST_16(0x2), IRQLIST_16(0x3),
101 IRQLIST_16(0x4), IRQLIST_16(0x5), IRQLIST_16(0x6), IRQLIST_16(0x7), 81 IRQLIST_16(0x4), IRQLIST_16(0x5), IRQLIST_16(0x6), IRQLIST_16(0x7),
102 IRQLIST_16(0x8), IRQLIST_16(0x9), IRQLIST_16(0xa), IRQLIST_16(0xb), 82 IRQLIST_16(0x8), IRQLIST_16(0x9), IRQLIST_16(0xa), IRQLIST_16(0xb),
103 IRQLIST_16(0xc), IRQLIST_16(0xd) 83 IRQLIST_16(0xc), IRQLIST_16(0xd), IRQLIST_16(0xe), IRQLIST_16(0xf)
104
105#ifdef CONFIG_PCI_MSI
106 , IRQLIST_15(0xe)
107#endif
108
109}; 84};
110 85
111#undef IRQ 86#undef IRQ
112#undef IRQLIST_16 87#undef IRQLIST_16
113#undef IRQLIST_14
114 88
115/* 89/*
116 * This is the 'legacy' 8259A Programmable Interrupt Controller, 90 * This is the 'legacy' 8259A Programmable Interrupt Controller,
@@ -121,42 +95,15 @@ void (*interrupt[NR_IRQS])(void) = {
121 * moves to arch independent land 95 * moves to arch independent land
122 */ 96 */
123 97
124DEFINE_SPINLOCK(i8259A_lock);
125
126static int i8259A_auto_eoi; 98static int i8259A_auto_eoi;
127 99DEFINE_SPINLOCK(i8259A_lock);
128static void end_8259A_irq (unsigned int irq)
129{
130 if (irq > 256) {
131 char var;
132 printk("return %p stack %p ti %p\n", __builtin_return_address(0), &var, task_thread_info(current));
133
134 BUG();
135 }
136
137 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) &&
138 irq_desc[irq].action)
139 enable_8259A_irq(irq);
140}
141
142#define shutdown_8259A_irq disable_8259A_irq
143
144static void mask_and_ack_8259A(unsigned int); 100static void mask_and_ack_8259A(unsigned int);
145 101
146static unsigned int startup_8259A_irq(unsigned int irq) 102static struct irq_chip i8259A_chip = {
147{ 103 .name = "XT-PIC",
148 enable_8259A_irq(irq); 104 .mask = disable_8259A_irq,
149 return 0; /* never anything pending */ 105 .unmask = enable_8259A_irq,
150} 106 .mask_ack = mask_and_ack_8259A,
151
152static struct hw_interrupt_type i8259A_irq_type = {
153 .typename = "XT-PIC",
154 .startup = startup_8259A_irq,
155 .shutdown = shutdown_8259A_irq,
156 .enable = enable_8259A_irq,
157 .disable = disable_8259A_irq,
158 .ack = mask_and_ack_8259A,
159 .end = end_8259A_irq,
160}; 107};
161 108
162/* 109/*
@@ -231,7 +178,7 @@ void make_8259A_irq(unsigned int irq)
231{ 178{
232 disable_irq_nosync(irq); 179 disable_irq_nosync(irq);
233 io_apic_irqs &= ~(1<<irq); 180 io_apic_irqs &= ~(1<<irq);
234 irq_desc[irq].chip = &i8259A_irq_type; 181 set_irq_chip_and_handler(irq, &i8259A_chip, handle_level_irq);
235 enable_irq(irq); 182 enable_irq(irq);
236} 183}
237 184
@@ -367,9 +314,9 @@ void init_8259A(int auto_eoi)
367 * in AEOI mode we just have to mask the interrupt 314 * in AEOI mode we just have to mask the interrupt
368 * when acking. 315 * when acking.
369 */ 316 */
370 i8259A_irq_type.ack = disable_8259A_irq; 317 i8259A_chip.mask_ack = disable_8259A_irq;
371 else 318 else
372 i8259A_irq_type.ack = mask_and_ack_8259A; 319 i8259A_chip.mask_ack = mask_and_ack_8259A;
373 320
374 udelay(100); /* wait for 8259A to initialize */ 321 udelay(100); /* wait for 8259A to initialize */
375 322
@@ -447,6 +394,26 @@ device_initcall(i8259A_init_sysfs);
447 */ 394 */
448 395
449static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL}; 396static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL};
397DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
398 [0 ... FIRST_EXTERNAL_VECTOR - 1] = -1,
399 [FIRST_EXTERNAL_VECTOR + 0] = 0,
400 [FIRST_EXTERNAL_VECTOR + 1] = 1,
401 [FIRST_EXTERNAL_VECTOR + 2] = 2,
402 [FIRST_EXTERNAL_VECTOR + 3] = 3,
403 [FIRST_EXTERNAL_VECTOR + 4] = 4,
404 [FIRST_EXTERNAL_VECTOR + 5] = 5,
405 [FIRST_EXTERNAL_VECTOR + 6] = 6,
406 [FIRST_EXTERNAL_VECTOR + 7] = 7,
407 [FIRST_EXTERNAL_VECTOR + 8] = 8,
408 [FIRST_EXTERNAL_VECTOR + 9] = 9,
409 [FIRST_EXTERNAL_VECTOR + 10] = 10,
410 [FIRST_EXTERNAL_VECTOR + 11] = 11,
411 [FIRST_EXTERNAL_VECTOR + 12] = 12,
412 [FIRST_EXTERNAL_VECTOR + 13] = 13,
413 [FIRST_EXTERNAL_VECTOR + 14] = 14,
414 [FIRST_EXTERNAL_VECTOR + 15] = 15,
415 [FIRST_EXTERNAL_VECTOR + 16 ... NR_VECTORS - 1] = -1
416};
450 417
451void __init init_ISA_irqs (void) 418void __init init_ISA_irqs (void)
452{ 419{
@@ -464,12 +431,13 @@ void __init init_ISA_irqs (void)
464 /* 431 /*
465 * 16 old-style INTA-cycle interrupts: 432 * 16 old-style INTA-cycle interrupts:
466 */ 433 */
467 irq_desc[i].chip = &i8259A_irq_type; 434 set_irq_chip_and_handler(i, &i8259A_chip,
435 handle_level_irq);
468 } else { 436 } else {
469 /* 437 /*
470 * 'high' PCI IRQs filled in on demand 438 * 'high' PCI IRQs filled in on demand
471 */ 439 */
472 irq_desc[i].chip = &no_irq_type; 440 irq_desc[i].chip = &no_irq_chip;
473 } 441 }
474 } 442 }
475} 443}
@@ -543,8 +511,6 @@ void __init init_IRQ(void)
543 */ 511 */
544 for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) { 512 for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) {
545 int vector = FIRST_EXTERNAL_VECTOR + i; 513 int vector = FIRST_EXTERNAL_VECTOR + i;
546 if (i >= NR_IRQS)
547 break;
548 if (vector != IA32_SYSCALL_VECTOR) 514 if (vector != IA32_SYSCALL_VECTOR)
549 set_intr_gate(vector, interrupt[i]); 515 set_intr_gate(vector, interrupt[i]);
550 } 516 }
@@ -554,7 +520,7 @@ void __init init_IRQ(void)
554 * IRQ0 must be given a fixed assignment and initialized, 520 * IRQ0 must be given a fixed assignment and initialized,
555 * because it's used before the IO-APIC is set up. 521 * because it's used before the IO-APIC is set up.
556 */ 522 */
557 set_intr_gate(FIRST_DEVICE_VECTOR, interrupt[0]); 523 __get_cpu_var(vector_irq)[FIRST_DEVICE_VECTOR] = 0;
558 524
559 /* 525 /*
560 * The reschedule interrupt is a CPU-to-CPU reschedule-helper 526 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index 0491019d4c8d..91728d9d3472 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -26,9 +26,12 @@
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/sched.h> 27#include <linux/sched.h>
28#include <linux/smp_lock.h> 28#include <linux/smp_lock.h>
29#include <linux/pci.h>
29#include <linux/mc146818rtc.h> 30#include <linux/mc146818rtc.h>
30#include <linux/acpi.h> 31#include <linux/acpi.h>
31#include <linux/sysdev.h> 32#include <linux/sysdev.h>
33#include <linux/msi.h>
34#include <linux/htirq.h>
32#ifdef CONFIG_ACPI 35#ifdef CONFIG_ACPI
33#include <acpi/acpi_bus.h> 36#include <acpi/acpi_bus.h>
34#endif 37#endif
@@ -41,6 +44,10 @@
41#include <asm/acpi.h> 44#include <asm/acpi.h>
42#include <asm/dma.h> 45#include <asm/dma.h>
43#include <asm/nmi.h> 46#include <asm/nmi.h>
47#include <asm/msidef.h>
48#include <asm/hypertransport.h>
49
50static int assign_irq_vector(int irq, cpumask_t mask);
44 51
45#define __apicdebuginit __init 52#define __apicdebuginit __init
46 53
@@ -81,14 +88,6 @@ static struct irq_pin_list {
81 short apic, pin, next; 88 short apic, pin, next;
82} irq_2_pin[PIN_MAP_SIZE]; 89} irq_2_pin[PIN_MAP_SIZE];
83 90
84int vector_irq[NR_VECTORS] __read_mostly = { [0 ... NR_VECTORS - 1] = -1};
85#ifdef CONFIG_PCI_MSI
86#define vector_to_irq(vector) \
87 (platform_legacy_irq(vector) ? vector : vector_irq[vector])
88#else
89#define vector_to_irq(vector) (vector)
90#endif
91
92#define __DO_ACTION(R, ACTION, FINAL) \ 91#define __DO_ACTION(R, ACTION, FINAL) \
93 \ 92 \
94{ \ 93{ \
@@ -139,11 +138,35 @@ static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
139} 138}
140 139
141#ifdef CONFIG_SMP 140#ifdef CONFIG_SMP
141static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, u8 vector)
142{
143 int apic, pin;
144 struct irq_pin_list *entry = irq_2_pin + irq;
145
146 BUG_ON(irq >= NR_IRQS);
147 for (;;) {
148 unsigned int reg;
149 apic = entry->apic;
150 pin = entry->pin;
151 if (pin == -1)
152 break;
153 io_apic_write(apic, 0x11 + pin*2, dest);
154 reg = io_apic_read(apic, 0x10 + pin*2);
155 reg &= ~0x000000ff;
156 reg |= vector;
157 io_apic_modify(apic, reg);
158 if (!entry->next)
159 break;
160 entry = irq_2_pin + entry->next;
161 }
162}
163
142static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask) 164static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
143{ 165{
144 unsigned long flags; 166 unsigned long flags;
145 unsigned int dest; 167 unsigned int dest;
146 cpumask_t tmp; 168 cpumask_t tmp;
169 int vector;
147 170
148 cpus_and(tmp, mask, cpu_online_map); 171 cpus_and(tmp, mask, cpu_online_map);
149 if (cpus_empty(tmp)) 172 if (cpus_empty(tmp))
@@ -151,7 +174,13 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
151 174
152 cpus_and(mask, tmp, CPU_MASK_ALL); 175 cpus_and(mask, tmp, CPU_MASK_ALL);
153 176
154 dest = cpu_mask_to_apicid(mask); 177 vector = assign_irq_vector(irq, mask);
178 if (vector < 0)
179 return;
180
181 cpus_clear(tmp);
182 cpu_set(vector >> 8, tmp);
183 dest = cpu_mask_to_apicid(tmp);
155 184
156 /* 185 /*
157 * Only the high 8 bits are valid. 186 * Only the high 8 bits are valid.
@@ -159,14 +188,12 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
159 dest = SET_APIC_LOGICAL_ID(dest); 188 dest = SET_APIC_LOGICAL_ID(dest);
160 189
161 spin_lock_irqsave(&ioapic_lock, flags); 190 spin_lock_irqsave(&ioapic_lock, flags);
162 __DO_ACTION(1, = dest, ) 191 __target_IO_APIC_irq(irq, dest, vector & 0xff);
163 set_irq_info(irq, mask); 192 set_native_irq_info(irq, mask);
164 spin_unlock_irqrestore(&ioapic_lock, flags); 193 spin_unlock_irqrestore(&ioapic_lock, flags);
165} 194}
166#endif 195#endif
167 196
168static u8 gsi_2_irq[NR_IRQ_VECTORS] = { [0 ... NR_IRQ_VECTORS-1] = 0xFF };
169
170/* 197/*
171 * The common case is 1:1 IRQ<->pin mappings. Sometimes there are 198 * The common case is 1:1 IRQ<->pin mappings. Sometimes there are
172 * shared ISA-space IRQs, so we have to support them. We are super 199 * shared ISA-space IRQs, so we have to support them. We are super
@@ -492,64 +519,6 @@ static inline int irq_trigger(int idx)
492 return MPBIOS_trigger(idx); 519 return MPBIOS_trigger(idx);
493} 520}
494 521
495static int next_irq = 16;
496
497/*
498 * gsi_irq_sharing -- Name overload! "irq" can be either a legacy IRQ
499 * in the range 0-15, a linux IRQ in the range 0-223, or a GSI number
500 * from ACPI, which can reach 800 in large boxen.
501 *
502 * Compact the sparse GSI space into a sequential IRQ series and reuse
503 * vectors if possible.
504 */
505int gsi_irq_sharing(int gsi)
506{
507 int i, tries, vector;
508
509 BUG_ON(gsi >= NR_IRQ_VECTORS);
510
511 if (platform_legacy_irq(gsi))
512 return gsi;
513
514 if (gsi_2_irq[gsi] != 0xFF)
515 return (int)gsi_2_irq[gsi];
516
517 tries = NR_IRQS;
518 try_again:
519 vector = assign_irq_vector(gsi);
520
521 /*
522 * Sharing vectors means sharing IRQs, so scan irq_vectors for previous
523 * use of vector and if found, return that IRQ. However, we never want
524 * to share legacy IRQs, which usually have a different trigger mode
525 * than PCI.
526 */
527 for (i = 0; i < NR_IRQS; i++)
528 if (IO_APIC_VECTOR(i) == vector)
529 break;
530 if (platform_legacy_irq(i)) {
531 if (--tries >= 0) {
532 IO_APIC_VECTOR(i) = 0;
533 goto try_again;
534 }
535 panic("gsi_irq_sharing: didn't find an IRQ using vector 0x%02X for GSI %d", vector, gsi);
536 }
537 if (i < NR_IRQS) {
538 gsi_2_irq[gsi] = i;
539 printk(KERN_INFO "GSI %d sharing vector 0x%02X and IRQ %d\n",
540 gsi, vector, i);
541 return i;
542 }
543
544 i = next_irq++;
545 BUG_ON(i >= NR_IRQS);
546 gsi_2_irq[gsi] = i;
547 IO_APIC_VECTOR(i) = vector;
548 printk(KERN_INFO "GSI %d assigned vector 0x%02X and IRQ %d\n",
549 gsi, vector, i);
550 return i;
551}
552
553static int pin_2_irq(int idx, int apic, int pin) 522static int pin_2_irq(int idx, int apic, int pin)
554{ 523{
555 int irq, i; 524 int irq, i;
@@ -571,7 +540,6 @@ static int pin_2_irq(int idx, int apic, int pin)
571 while (i < apic) 540 while (i < apic)
572 irq += nr_ioapic_registers[i++]; 541 irq += nr_ioapic_registers[i++];
573 irq += pin; 542 irq += pin;
574 irq = gsi_irq_sharing(irq);
575 } 543 }
576 BUG_ON(irq >= NR_IRQS); 544 BUG_ON(irq >= NR_IRQS);
577 return irq; 545 return irq;
@@ -595,46 +563,83 @@ static inline int IO_APIC_irq_trigger(int irq)
595} 563}
596 564
597/* irq_vectors is indexed by the sum of all RTEs in all I/O APICs. */ 565/* irq_vectors is indexed by the sum of all RTEs in all I/O APICs. */
598u8 irq_vector[NR_IRQ_VECTORS] __read_mostly = { FIRST_DEVICE_VECTOR , 0 }; 566unsigned int irq_vector[NR_IRQ_VECTORS] __read_mostly = { FIRST_EXTERNAL_VECTOR, 0 };
599 567
600int assign_irq_vector(int irq) 568static int __assign_irq_vector(int irq, cpumask_t mask)
601{ 569{
602 static int current_vector = FIRST_DEVICE_VECTOR, offset = 0; 570 /*
603 unsigned long flags; 571 * NOTE! The local APIC isn't very good at handling
604 int vector; 572 * multiple interrupts at the same interrupt level.
605 573 * As the interrupt level is determined by taking the
606 BUG_ON(irq != AUTO_ASSIGN && (unsigned)irq >= NR_IRQ_VECTORS); 574 * vector number and shifting that right by 4, we
607 575 * want to spread these out a bit so that they don't
608 spin_lock_irqsave(&vector_lock, flags); 576 * all fall in the same interrupt level.
609 577 *
610 if (irq != AUTO_ASSIGN && IO_APIC_VECTOR(irq) > 0) { 578 * Also, we've got to be careful not to trash gate
611 spin_unlock_irqrestore(&vector_lock, flags); 579 * 0x80, because int 0x80 is hm, kind of importantish. ;)
612 return IO_APIC_VECTOR(irq); 580 */
581 static struct {
582 int vector;
583 int offset;
584 } pos[NR_CPUS] = { [ 0 ... NR_CPUS - 1] = {FIRST_DEVICE_VECTOR, 0} };
585 int old_vector = -1;
586 int cpu;
587
588 BUG_ON((unsigned)irq >= NR_IRQ_VECTORS);
589
590 if (IO_APIC_VECTOR(irq) > 0)
591 old_vector = IO_APIC_VECTOR(irq);
592 if ((old_vector > 0) && cpu_isset(old_vector >> 8, mask)) {
593 return old_vector;
613 } 594 }
595
596 for_each_cpu_mask(cpu, mask) {
597 int vector, offset;
598 vector = pos[cpu].vector;
599 offset = pos[cpu].offset;
614next: 600next:
615 current_vector += 8; 601 vector += 8;
616 if (current_vector == IA32_SYSCALL_VECTOR) 602 if (vector >= FIRST_SYSTEM_VECTOR) {
617 goto next; 603 /* If we run out of vectors on large boxen, must share them. */
618 604 offset = (offset + 1) % 8;
619 if (current_vector >= FIRST_SYSTEM_VECTOR) { 605 vector = FIRST_DEVICE_VECTOR + offset;
620 /* If we run out of vectors on large boxen, must share them. */ 606 }
621 offset = (offset + 1) % 8; 607 if (unlikely(pos[cpu].vector == vector))
622 current_vector = FIRST_DEVICE_VECTOR + offset; 608 continue;
609 if (vector == IA32_SYSCALL_VECTOR)
610 goto next;
611 if (per_cpu(vector_irq, cpu)[vector] != -1)
612 goto next;
613 /* Found one! */
614 pos[cpu].vector = vector;
615 pos[cpu].offset = offset;
616 if (old_vector >= 0) {
617 int old_cpu = old_vector >> 8;
618 old_vector &= 0xff;
619 per_cpu(vector_irq, old_cpu)[old_vector] = -1;
620 }
621 per_cpu(vector_irq, cpu)[vector] = irq;
622 vector |= cpu << 8;
623 IO_APIC_VECTOR(irq) = vector;
624 return vector;
623 } 625 }
626 return -ENOSPC;
627}
624 628
625 vector = current_vector; 629static int assign_irq_vector(int irq, cpumask_t mask)
626 vector_irq[vector] = irq; 630{
627 if (irq != AUTO_ASSIGN) 631 int vector;
628 IO_APIC_VECTOR(irq) = vector; 632 unsigned long flags;
629 633
634 spin_lock_irqsave(&vector_lock, flags);
635 vector = __assign_irq_vector(irq, mask);
630 spin_unlock_irqrestore(&vector_lock, flags); 636 spin_unlock_irqrestore(&vector_lock, flags);
631
632 return vector; 637 return vector;
633} 638}
634 639
635extern void (*interrupt[NR_IRQS])(void); 640extern void (*interrupt[NR_IRQS])(void);
636static struct hw_interrupt_type ioapic_level_type; 641
637static struct hw_interrupt_type ioapic_edge_type; 642static struct irq_chip ioapic_chip;
638 643
639#define IOAPIC_AUTO -1 644#define IOAPIC_AUTO -1
640#define IOAPIC_EDGE 0 645#define IOAPIC_EDGE 0
@@ -642,16 +647,13 @@ static struct hw_interrupt_type ioapic_edge_type;
642 647
643static void ioapic_register_intr(int irq, int vector, unsigned long trigger) 648static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
644{ 649{
645 unsigned idx;
646
647 idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq;
648
649 if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || 650 if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
650 trigger == IOAPIC_LEVEL) 651 trigger == IOAPIC_LEVEL)
651 irq_desc[idx].chip = &ioapic_level_type; 652 set_irq_chip_and_handler(irq, &ioapic_chip,
653 handle_fasteoi_irq);
652 else 654 else
653 irq_desc[idx].chip = &ioapic_edge_type; 655 set_irq_chip_and_handler(irq, &ioapic_chip,
654 set_intr_gate(vector, interrupt[idx]); 656 handle_edge_irq);
655} 657}
656 658
657static void __init setup_IO_APIC_irqs(void) 659static void __init setup_IO_APIC_irqs(void)
@@ -701,8 +703,15 @@ static void __init setup_IO_APIC_irqs(void)
701 continue; 703 continue;
702 704
703 if (IO_APIC_IRQ(irq)) { 705 if (IO_APIC_IRQ(irq)) {
704 vector = assign_irq_vector(irq); 706 cpumask_t mask;
705 entry.vector = vector; 707 vector = assign_irq_vector(irq, TARGET_CPUS);
708 if (vector < 0)
709 continue;
710
711 cpus_clear(mask);
712 cpu_set(vector >> 8, mask);
713 entry.dest.logical.logical_dest = cpu_mask_to_apicid(mask);
714 entry.vector = vector & 0xff;
706 715
707 ioapic_register_intr(irq, vector, IOAPIC_AUTO); 716 ioapic_register_intr(irq, vector, IOAPIC_AUTO);
708 if (!apic && (irq < 16)) 717 if (!apic && (irq < 16))
@@ -752,7 +761,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in
752 * The timer IRQ doesn't have to know that behind the 761 * The timer IRQ doesn't have to know that behind the
753 * scene we have a 8259A-master in AEOI mode ... 762 * scene we have a 8259A-master in AEOI mode ...
754 */ 763 */
755 irq_desc[0].chip = &ioapic_edge_type; 764 set_irq_chip_and_handler(0, &ioapic_chip, handle_edge_irq);
756 765
757 /* 766 /*
758 * Add it to the IO-APIC irq-routing table: 767 * Add it to the IO-APIC irq-routing table:
@@ -868,17 +877,12 @@ void __apicdebuginit print_IO_APIC(void)
868 ); 877 );
869 } 878 }
870 } 879 }
871 if (use_pci_vector())
872 printk(KERN_INFO "Using vector-based indexing\n");
873 printk(KERN_DEBUG "IRQ to pin mappings:\n"); 880 printk(KERN_DEBUG "IRQ to pin mappings:\n");
874 for (i = 0; i < NR_IRQS; i++) { 881 for (i = 0; i < NR_IRQS; i++) {
875 struct irq_pin_list *entry = irq_2_pin + i; 882 struct irq_pin_list *entry = irq_2_pin + i;
876 if (entry->pin < 0) 883 if (entry->pin < 0)
877 continue; 884 continue;
878 if (use_pci_vector() && !platform_legacy_irq(i)) 885 printk(KERN_DEBUG "IRQ%d ", i);
879 printk(KERN_DEBUG "IRQ%d ", IO_APIC_VECTOR(i));
880 else
881 printk(KERN_DEBUG "IRQ%d ", i);
882 for (;;) { 886 for (;;) {
883 printk("-> %d:%d", entry->apic, entry->pin); 887 printk("-> %d:%d", entry->apic, entry->pin);
884 if (!entry->next) 888 if (!entry->next)
@@ -1185,7 +1189,7 @@ static int __init timer_irq_works(void)
1185 * an edge even if it isn't on the 8259A... 1189 * an edge even if it isn't on the 8259A...
1186 */ 1190 */
1187 1191
1188static unsigned int startup_edge_ioapic_irq(unsigned int irq) 1192static unsigned int startup_ioapic_irq(unsigned int irq)
1189{ 1193{
1190 int was_pending = 0; 1194 int was_pending = 0;
1191 unsigned long flags; 1195 unsigned long flags;
@@ -1202,107 +1206,16 @@ static unsigned int startup_edge_ioapic_irq(unsigned int irq)
1202 return was_pending; 1206 return was_pending;
1203} 1207}
1204 1208
1205/* 1209static int ioapic_retrigger_irq(unsigned int irq)
1206 * Once we have recorded IRQ_PENDING already, we can mask the
1207 * interrupt for real. This prevents IRQ storms from unhandled
1208 * devices.
1209 */
1210static void ack_edge_ioapic_irq(unsigned int irq)
1211{
1212 move_irq(irq);
1213 if ((irq_desc[irq].status & (IRQ_PENDING | IRQ_DISABLED))
1214 == (IRQ_PENDING | IRQ_DISABLED))
1215 mask_IO_APIC_irq(irq);
1216 ack_APIC_irq();
1217}
1218
1219/*
1220 * Level triggered interrupts can just be masked,
1221 * and shutting down and starting up the interrupt
1222 * is the same as enabling and disabling them -- except
1223 * with a startup need to return a "was pending" value.
1224 *
1225 * Level triggered interrupts are special because we
1226 * do not touch any IO-APIC register while handling
1227 * them. We ack the APIC in the end-IRQ handler, not
1228 * in the start-IRQ-handler. Protection against reentrance
1229 * from the same interrupt is still provided, both by the
1230 * generic IRQ layer and by the fact that an unacked local
1231 * APIC does not accept IRQs.
1232 */
1233static unsigned int startup_level_ioapic_irq (unsigned int irq)
1234{
1235 unmask_IO_APIC_irq(irq);
1236
1237 return 0; /* don't check for pending */
1238}
1239
1240static void end_level_ioapic_irq (unsigned int irq)
1241{
1242 move_irq(irq);
1243 ack_APIC_irq();
1244}
1245
1246#ifdef CONFIG_PCI_MSI
1247static unsigned int startup_edge_ioapic_vector(unsigned int vector)
1248{
1249 int irq = vector_to_irq(vector);
1250
1251 return startup_edge_ioapic_irq(irq);
1252}
1253
1254static void ack_edge_ioapic_vector(unsigned int vector)
1255{
1256 int irq = vector_to_irq(vector);
1257
1258 move_native_irq(vector);
1259 ack_edge_ioapic_irq(irq);
1260}
1261
1262static unsigned int startup_level_ioapic_vector (unsigned int vector)
1263{ 1210{
1264 int irq = vector_to_irq(vector); 1211 cpumask_t mask;
1212 unsigned vector;
1265 1213
1266 return startup_level_ioapic_irq (irq); 1214 vector = irq_vector[irq];
1267} 1215 cpus_clear(mask);
1268 1216 cpu_set(vector >> 8, mask);
1269static void end_level_ioapic_vector (unsigned int vector)
1270{
1271 int irq = vector_to_irq(vector);
1272
1273 move_native_irq(vector);
1274 end_level_ioapic_irq(irq);
1275}
1276
1277static void mask_IO_APIC_vector (unsigned int vector)
1278{
1279 int irq = vector_to_irq(vector);
1280
1281 mask_IO_APIC_irq(irq);
1282}
1283 1217
1284static void unmask_IO_APIC_vector (unsigned int vector) 1218 send_IPI_mask(mask, vector & 0xff);
1285{
1286 int irq = vector_to_irq(vector);
1287
1288 unmask_IO_APIC_irq(irq);
1289}
1290
1291#ifdef CONFIG_SMP
1292static void set_ioapic_affinity_vector (unsigned int vector,
1293 cpumask_t cpu_mask)
1294{
1295 int irq = vector_to_irq(vector);
1296
1297 set_native_irq_info(vector, cpu_mask);
1298 set_ioapic_affinity_irq(irq, cpu_mask);
1299}
1300#endif // CONFIG_SMP
1301#endif // CONFIG_PCI_MSI
1302
1303static int ioapic_retrigger(unsigned int irq)
1304{
1305 send_IPI_self(IO_APIC_VECTOR(irq));
1306 1219
1307 return 1; 1220 return 1;
1308} 1221}
@@ -1316,32 +1229,47 @@ static int ioapic_retrigger(unsigned int irq)
1316 * races. 1229 * races.
1317 */ 1230 */
1318 1231
1319static struct hw_interrupt_type ioapic_edge_type __read_mostly = { 1232static void ack_apic_edge(unsigned int irq)
1320 .typename = "IO-APIC-edge", 1233{
1321 .startup = startup_edge_ioapic, 1234 move_native_irq(irq);
1322 .shutdown = shutdown_edge_ioapic, 1235 ack_APIC_irq();
1323 .enable = enable_edge_ioapic, 1236}
1324 .disable = disable_edge_ioapic, 1237
1325 .ack = ack_edge_ioapic, 1238static void ack_apic_level(unsigned int irq)
1326 .end = end_edge_ioapic, 1239{
1327#ifdef CONFIG_SMP 1240 int do_unmask_irq = 0;
1328 .set_affinity = set_ioapic_affinity, 1241
1242#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
1243 /* If we are moving the irq we need to mask it */
1244 if (unlikely(irq_desc[irq].status & IRQ_MOVE_PENDING)) {
1245 do_unmask_irq = 1;
1246 mask_IO_APIC_irq(irq);
1247 }
1329#endif 1248#endif
1330 .retrigger = ioapic_retrigger,
1331};
1332 1249
1333static struct hw_interrupt_type ioapic_level_type __read_mostly = { 1250 /*
1334 .typename = "IO-APIC-level", 1251 * We must acknowledge the irq before we move it or the acknowledge will
1335 .startup = startup_level_ioapic, 1252 * not propogate properly.
1336 .shutdown = shutdown_level_ioapic, 1253 */
1337 .enable = enable_level_ioapic, 1254 ack_APIC_irq();
1338 .disable = disable_level_ioapic, 1255
1339 .ack = mask_and_ack_level_ioapic, 1256 /* Now we can move and renable the irq */
1340 .end = end_level_ioapic, 1257 move_masked_irq(irq);
1258 if (unlikely(do_unmask_irq))
1259 unmask_IO_APIC_irq(irq);
1260}
1261
1262static struct irq_chip ioapic_chip __read_mostly = {
1263 .name = "IO-APIC",
1264 .startup = startup_ioapic_irq,
1265 .mask = mask_IO_APIC_irq,
1266 .unmask = unmask_IO_APIC_irq,
1267 .ack = ack_apic_edge,
1268 .eoi = ack_apic_level,
1341#ifdef CONFIG_SMP 1269#ifdef CONFIG_SMP
1342 .set_affinity = set_ioapic_affinity, 1270 .set_affinity = set_ioapic_affinity_irq,
1343#endif 1271#endif
1344 .retrigger = ioapic_retrigger, 1272 .retrigger = ioapic_retrigger_irq,
1345}; 1273};
1346 1274
1347static inline void init_IO_APIC_traps(void) 1275static inline void init_IO_APIC_traps(void)
@@ -1361,11 +1289,6 @@ static inline void init_IO_APIC_traps(void)
1361 */ 1289 */
1362 for (irq = 0; irq < NR_IRQS ; irq++) { 1290 for (irq = 0; irq < NR_IRQS ; irq++) {
1363 int tmp = irq; 1291 int tmp = irq;
1364 if (use_pci_vector()) {
1365 if (!platform_legacy_irq(tmp))
1366 if ((tmp = vector_to_irq(tmp)) == -1)
1367 continue;
1368 }
1369 if (IO_APIC_IRQ(tmp) && !IO_APIC_VECTOR(tmp)) { 1292 if (IO_APIC_IRQ(tmp) && !IO_APIC_VECTOR(tmp)) {
1370 /* 1293 /*
1371 * Hmm.. We don't have an entry for this, 1294 * Hmm.. We don't have an entry for this,
@@ -1376,7 +1299,7 @@ static inline void init_IO_APIC_traps(void)
1376 make_8259A_irq(irq); 1299 make_8259A_irq(irq);
1377 else 1300 else
1378 /* Strange. Oh, well.. */ 1301 /* Strange. Oh, well.. */
1379 irq_desc[irq].chip = &no_irq_type; 1302 irq_desc[irq].chip = &no_irq_chip;
1380 } 1303 }
1381 } 1304 }
1382} 1305}
@@ -1495,8 +1418,6 @@ static inline void unlock_ExtINT_logic(void)
1495 spin_unlock_irqrestore(&ioapic_lock, flags); 1418 spin_unlock_irqrestore(&ioapic_lock, flags);
1496} 1419}
1497 1420
1498int timer_uses_ioapic_pin_0;
1499
1500/* 1421/*
1501 * This code may look a bit paranoid, but it's supposed to cooperate with 1422 * This code may look a bit paranoid, but it's supposed to cooperate with
1502 * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ 1423 * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ
@@ -1514,8 +1435,7 @@ static inline void check_timer(void)
1514 * get/set the timer IRQ vector: 1435 * get/set the timer IRQ vector:
1515 */ 1436 */
1516 disable_8259A_irq(0); 1437 disable_8259A_irq(0);
1517 vector = assign_irq_vector(0); 1438 vector = assign_irq_vector(0, TARGET_CPUS);
1518 set_intr_gate(vector, interrupt[0]);
1519 1439
1520 /* 1440 /*
1521 * Subtle, code in do_timer_interrupt() expects an AEOI 1441 * Subtle, code in do_timer_interrupt() expects an AEOI
@@ -1534,9 +1454,6 @@ static inline void check_timer(void)
1534 pin2 = ioapic_i8259.pin; 1454 pin2 = ioapic_i8259.pin;
1535 apic2 = ioapic_i8259.apic; 1455 apic2 = ioapic_i8259.apic;
1536 1456
1537 if (pin1 == 0)
1538 timer_uses_ioapic_pin_0 = 1;
1539
1540 apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n", 1457 apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
1541 vector, apic1, pin1, apic2, pin2); 1458 vector, apic1, pin1, apic2, pin2);
1542 1459
@@ -1740,6 +1657,253 @@ static int __init ioapic_init_sysfs(void)
1740 1657
1741device_initcall(ioapic_init_sysfs); 1658device_initcall(ioapic_init_sysfs);
1742 1659
1660/*
1661 * Dynamic irq allocate and deallocation
1662 */
1663int create_irq(void)
1664{
1665 /* Allocate an unused irq */
1666 int irq;
1667 int new;
1668 int vector = 0;
1669 unsigned long flags;
1670
1671 irq = -ENOSPC;
1672 spin_lock_irqsave(&vector_lock, flags);
1673 for (new = (NR_IRQS - 1); new >= 0; new--) {
1674 if (platform_legacy_irq(new))
1675 continue;
1676 if (irq_vector[new] != 0)
1677 continue;
1678 vector = __assign_irq_vector(new, TARGET_CPUS);
1679 if (likely(vector > 0))
1680 irq = new;
1681 break;
1682 }
1683 spin_unlock_irqrestore(&vector_lock, flags);
1684
1685 if (irq >= 0) {
1686 dynamic_irq_init(irq);
1687 }
1688 return irq;
1689}
1690
1691void destroy_irq(unsigned int irq)
1692{
1693 unsigned long flags;
1694
1695 dynamic_irq_cleanup(irq);
1696
1697 spin_lock_irqsave(&vector_lock, flags);
1698 irq_vector[irq] = 0;
1699 spin_unlock_irqrestore(&vector_lock, flags);
1700}
1701
1702/*
1703 * MSI mesage composition
1704 */
1705#ifdef CONFIG_PCI_MSI
1706static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
1707{
1708 int vector;
1709 unsigned dest;
1710
1711 vector = assign_irq_vector(irq, TARGET_CPUS);
1712 if (vector >= 0) {
1713 cpumask_t tmp;
1714
1715 cpus_clear(tmp);
1716 cpu_set(vector >> 8, tmp);
1717 dest = cpu_mask_to_apicid(tmp);
1718
1719 msg->address_hi = MSI_ADDR_BASE_HI;
1720 msg->address_lo =
1721 MSI_ADDR_BASE_LO |
1722 ((INT_DEST_MODE == 0) ?
1723 MSI_ADDR_DEST_MODE_PHYSICAL:
1724 MSI_ADDR_DEST_MODE_LOGICAL) |
1725 ((INT_DELIVERY_MODE != dest_LowestPrio) ?
1726 MSI_ADDR_REDIRECTION_CPU:
1727 MSI_ADDR_REDIRECTION_LOWPRI) |
1728 MSI_ADDR_DEST_ID(dest);
1729
1730 msg->data =
1731 MSI_DATA_TRIGGER_EDGE |
1732 MSI_DATA_LEVEL_ASSERT |
1733 ((INT_DELIVERY_MODE != dest_LowestPrio) ?
1734 MSI_DATA_DELIVERY_FIXED:
1735 MSI_DATA_DELIVERY_LOWPRI) |
1736 MSI_DATA_VECTOR(vector);
1737 }
1738 return vector;
1739}
1740
1741#ifdef CONFIG_SMP
1742static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
1743{
1744 struct msi_msg msg;
1745 unsigned int dest;
1746 cpumask_t tmp;
1747 int vector;
1748
1749 cpus_and(tmp, mask, cpu_online_map);
1750 if (cpus_empty(tmp))
1751 tmp = TARGET_CPUS;
1752
1753 cpus_and(mask, tmp, CPU_MASK_ALL);
1754
1755 vector = assign_irq_vector(irq, mask);
1756 if (vector < 0)
1757 return;
1758
1759 cpus_clear(tmp);
1760 cpu_set(vector >> 8, tmp);
1761 dest = cpu_mask_to_apicid(tmp);
1762
1763 read_msi_msg(irq, &msg);
1764
1765 msg.data &= ~MSI_DATA_VECTOR_MASK;
1766 msg.data |= MSI_DATA_VECTOR(vector);
1767 msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
1768 msg.address_lo |= MSI_ADDR_DEST_ID(dest);
1769
1770 write_msi_msg(irq, &msg);
1771 set_native_irq_info(irq, mask);
1772}
1773#endif /* CONFIG_SMP */
1774
1775/*
1776 * IRQ Chip for MSI PCI/PCI-X/PCI-Express Devices,
1777 * which implement the MSI or MSI-X Capability Structure.
1778 */
1779static struct irq_chip msi_chip = {
1780 .name = "PCI-MSI",
1781 .unmask = unmask_msi_irq,
1782 .mask = mask_msi_irq,
1783 .ack = ack_apic_edge,
1784#ifdef CONFIG_SMP
1785 .set_affinity = set_msi_irq_affinity,
1786#endif
1787 .retrigger = ioapic_retrigger_irq,
1788};
1789
1790int arch_setup_msi_irq(unsigned int irq, struct pci_dev *dev)
1791{
1792 struct msi_msg msg;
1793 int ret;
1794 ret = msi_compose_msg(dev, irq, &msg);
1795 if (ret < 0)
1796 return ret;
1797
1798 write_msi_msg(irq, &msg);
1799
1800 set_irq_chip_and_handler(irq, &msi_chip, handle_edge_irq);
1801
1802 return 0;
1803}
1804
1805void arch_teardown_msi_irq(unsigned int irq)
1806{
1807 return;
1808}
1809
1810#endif /* CONFIG_PCI_MSI */
1811
1812/*
1813 * Hypertransport interrupt support
1814 */
1815#ifdef CONFIG_HT_IRQ
1816
1817#ifdef CONFIG_SMP
1818
1819static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector)
1820{
1821 u32 low, high;
1822 low = read_ht_irq_low(irq);
1823 high = read_ht_irq_high(irq);
1824
1825 low &= ~(HT_IRQ_LOW_VECTOR_MASK | HT_IRQ_LOW_DEST_ID_MASK);
1826 high &= ~(HT_IRQ_HIGH_DEST_ID_MASK);
1827
1828 low |= HT_IRQ_LOW_VECTOR(vector) | HT_IRQ_LOW_DEST_ID(dest);
1829 high |= HT_IRQ_HIGH_DEST_ID(dest);
1830
1831 write_ht_irq_low(irq, low);
1832 write_ht_irq_high(irq, high);
1833}
1834
1835static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
1836{
1837 unsigned int dest;
1838 cpumask_t tmp;
1839 int vector;
1840
1841 cpus_and(tmp, mask, cpu_online_map);
1842 if (cpus_empty(tmp))
1843 tmp = TARGET_CPUS;
1844
1845 cpus_and(mask, tmp, CPU_MASK_ALL);
1846
1847 vector = assign_irq_vector(irq, mask);
1848 if (vector < 0)
1849 return;
1850
1851 cpus_clear(tmp);
1852 cpu_set(vector >> 8, tmp);
1853 dest = cpu_mask_to_apicid(tmp);
1854
1855 target_ht_irq(irq, dest, vector & 0xff);
1856 set_native_irq_info(irq, mask);
1857}
1858#endif
1859
1860static struct hw_interrupt_type ht_irq_chip = {
1861 .name = "PCI-HT",
1862 .mask = mask_ht_irq,
1863 .unmask = unmask_ht_irq,
1864 .ack = ack_apic_edge,
1865#ifdef CONFIG_SMP
1866 .set_affinity = set_ht_irq_affinity,
1867#endif
1868 .retrigger = ioapic_retrigger_irq,
1869};
1870
1871int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
1872{
1873 int vector;
1874
1875 vector = assign_irq_vector(irq, TARGET_CPUS);
1876 if (vector >= 0) {
1877 u32 low, high;
1878 unsigned dest;
1879 cpumask_t tmp;
1880
1881 cpus_clear(tmp);
1882 cpu_set(vector >> 8, tmp);
1883 dest = cpu_mask_to_apicid(tmp);
1884
1885 high = HT_IRQ_HIGH_DEST_ID(dest);
1886
1887 low = HT_IRQ_LOW_BASE |
1888 HT_IRQ_LOW_DEST_ID(dest) |
1889 HT_IRQ_LOW_VECTOR(vector) |
1890 ((INT_DEST_MODE == 0) ?
1891 HT_IRQ_LOW_DM_PHYSICAL :
1892 HT_IRQ_LOW_DM_LOGICAL) |
1893 HT_IRQ_LOW_RQEOI_EDGE |
1894 ((INT_DELIVERY_MODE != dest_LowestPrio) ?
1895 HT_IRQ_LOW_MT_FIXED :
1896 HT_IRQ_LOW_MT_ARBITRATED);
1897
1898 write_ht_irq_low(irq, low);
1899 write_ht_irq_high(irq, high);
1900
1901 set_irq_chip_and_handler(irq, &ht_irq_chip, handle_edge_irq);
1902 }
1903 return vector;
1904}
1905#endif /* CONFIG_HT_IRQ */
1906
1743/* -------------------------------------------------------------------------- 1907/* --------------------------------------------------------------------------
1744 ACPI-based IOAPIC Configuration 1908 ACPI-based IOAPIC Configuration
1745 -------------------------------------------------------------------------- */ 1909 -------------------------------------------------------------------------- */
@@ -1765,6 +1929,8 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int p
1765{ 1929{
1766 struct IO_APIC_route_entry entry; 1930 struct IO_APIC_route_entry entry;
1767 unsigned long flags; 1931 unsigned long flags;
1932 int vector;
1933 cpumask_t mask;
1768 1934
1769 if (!IO_APIC_IRQ(irq)) { 1935 if (!IO_APIC_IRQ(irq)) {
1770 apic_printk(APIC_QUIET,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n", 1936 apic_printk(APIC_QUIET,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n",
@@ -1773,6 +1939,20 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int p
1773 } 1939 }
1774 1940
1775 /* 1941 /*
1942 * IRQs < 16 are already in the irq_2_pin[] map
1943 */
1944 if (irq >= 16)
1945 add_pin_to_irq(irq, ioapic, pin);
1946
1947
1948 vector = assign_irq_vector(irq, TARGET_CPUS);
1949 if (vector < 0)
1950 return vector;
1951
1952 cpus_clear(mask);
1953 cpu_set(vector >> 8, mask);
1954
1955 /*
1776 * Generate a PCI IRQ routing entry and program the IOAPIC accordingly. 1956 * Generate a PCI IRQ routing entry and program the IOAPIC accordingly.
1777 * Note that we mask (disable) IRQs now -- these get enabled when the 1957 * Note that we mask (disable) IRQs now -- these get enabled when the
1778 * corresponding device driver registers for this IRQ. 1958 * corresponding device driver registers for this IRQ.
@@ -1782,19 +1962,11 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int p
1782 1962
1783 entry.delivery_mode = INT_DELIVERY_MODE; 1963 entry.delivery_mode = INT_DELIVERY_MODE;
1784 entry.dest_mode = INT_DEST_MODE; 1964 entry.dest_mode = INT_DEST_MODE;
1785 entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS); 1965 entry.dest.logical.logical_dest = cpu_mask_to_apicid(mask);
1786 entry.trigger = triggering; 1966 entry.trigger = triggering;
1787 entry.polarity = polarity; 1967 entry.polarity = polarity;
1788 entry.mask = 1; /* Disabled (masked) */ 1968 entry.mask = 1; /* Disabled (masked) */
1789 1969 entry.vector = vector & 0xff;
1790 irq = gsi_irq_sharing(irq);
1791 /*
1792 * IRQs < 16 are already in the irq_2_pin[] map
1793 */
1794 if (irq >= 16)
1795 add_pin_to_irq(irq, ioapic, pin);
1796
1797 entry.vector = assign_irq_vector(irq);
1798 1970
1799 apic_printk(APIC_VERBOSE,KERN_DEBUG "IOAPIC[%d]: Set PCI routing entry (%d-%d -> 0x%x -> " 1971 apic_printk(APIC_VERBOSE,KERN_DEBUG "IOAPIC[%d]: Set PCI routing entry (%d-%d -> 0x%x -> "
1800 "IRQ %d Mode:%i Active:%i)\n", ioapic, 1972 "IRQ %d Mode:%i Active:%i)\n", ioapic,
@@ -1809,7 +1981,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int p
1809 ioapic_write_entry(ioapic, pin, entry); 1981 ioapic_write_entry(ioapic, pin, entry);
1810 1982
1811 spin_lock_irqsave(&ioapic_lock, flags); 1983 spin_lock_irqsave(&ioapic_lock, flags);
1812 set_native_irq_info(use_pci_vector() ? entry.vector : irq, TARGET_CPUS); 1984 set_native_irq_info(irq, TARGET_CPUS);
1813 spin_unlock_irqrestore(&ioapic_lock, flags); 1985 spin_unlock_irqrestore(&ioapic_lock, flags);
1814 1986
1815 return 0; 1987 return 0;
diff --git a/arch/x86_64/kernel/irq.c b/arch/x86_64/kernel/irq.c
index b3677e6ccc6e..506f27c85ca5 100644
--- a/arch/x86_64/kernel/irq.c
+++ b/arch/x86_64/kernel/irq.c
@@ -74,7 +74,8 @@ int show_interrupts(struct seq_file *p, void *v)
74 for_each_online_cpu(j) 74 for_each_online_cpu(j)
75 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 75 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
76#endif 76#endif
77 seq_printf(p, " %14s", irq_desc[i].chip->typename); 77 seq_printf(p, " %8s", irq_desc[i].chip->name);
78 seq_printf(p, "-%s", handle_irq_name(irq_desc[i].handle_irq));
78 79
79 seq_printf(p, " %s", action->name); 80 seq_printf(p, " %s", action->name);
80 for (action=action->next; action; action = action->next) 81 for (action=action->next; action; action = action->next)
@@ -104,7 +105,12 @@ skip:
104asmlinkage unsigned int do_IRQ(struct pt_regs *regs) 105asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
105{ 106{
106 /* high bit used in ret_from_ code */ 107 /* high bit used in ret_from_ code */
107 unsigned irq = ~regs->orig_rax; 108 unsigned vector = ~regs->orig_rax;
109 unsigned irq;
110
111 exit_idle();
112 irq_enter();
113 irq = __get_cpu_var(vector_irq)[vector];
108 114
109 if (unlikely(irq >= NR_IRQS)) { 115 if (unlikely(irq >= NR_IRQS)) {
110 printk(KERN_EMERG "%s: cannot handle IRQ %d\n", 116 printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
@@ -112,12 +118,10 @@ asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
112 BUG(); 118 BUG();
113 } 119 }
114 120
115 exit_idle();
116 irq_enter();
117#ifdef CONFIG_DEBUG_STACKOVERFLOW 121#ifdef CONFIG_DEBUG_STACKOVERFLOW
118 stack_overflow_check(regs); 122 stack_overflow_check(regs);
119#endif 123#endif
120 __do_IRQ(irq, regs); 124 generic_handle_irq(irq, regs);
121 irq_exit(); 125 irq_exit();
122 126
123 return 1; 127 return 1;
diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c
index b8d53dfa9931..b147ab19fbd4 100644
--- a/arch/x86_64/kernel/mpparse.c
+++ b/arch/x86_64/kernel/mpparse.c
@@ -790,20 +790,11 @@ void __init mp_config_acpi_legacy_irqs(void)
790 } 790 }
791} 791}
792 792
793#define MAX_GSI_NUM 4096
794
795int mp_register_gsi(u32 gsi, int triggering, int polarity) 793int mp_register_gsi(u32 gsi, int triggering, int polarity)
796{ 794{
797 int ioapic = -1; 795 int ioapic = -1;
798 int ioapic_pin = 0; 796 int ioapic_pin = 0;
799 int idx, bit = 0; 797 int idx, bit = 0;
800 static int pci_irq = 16;
801 /*
802 * Mapping between Global System Interrupts, which
803 * represent all possible interrupts, to the IRQs
804 * assigned to actual devices.
805 */
806 static int gsi_to_irq[MAX_GSI_NUM];
807 798
808 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) 799 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
809 return gsi; 800 return gsi;
@@ -836,42 +827,11 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
836 if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) { 827 if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
837 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n", 828 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
838 mp_ioapic_routing[ioapic].apic_id, ioapic_pin); 829 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
839 return gsi_to_irq[gsi]; 830 return gsi;
840 } 831 }
841 832
842 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit); 833 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
843 834
844 if (triggering == ACPI_LEVEL_SENSITIVE) {
845 /*
846 * For PCI devices assign IRQs in order, avoiding gaps
847 * due to unused I/O APIC pins.
848 */
849 int irq = gsi;
850 if (gsi < MAX_GSI_NUM) {
851 /*
852 * Retain the VIA chipset work-around (gsi > 15), but
853 * avoid a problem where the 8254 timer (IRQ0) is setup
854 * via an override (so it's not on pin 0 of the ioapic),
855 * and at the same time, the pin 0 interrupt is a PCI
856 * type. The gsi > 15 test could cause these two pins
857 * to be shared as IRQ0, and they are not shareable.
858 * So test for this condition, and if necessary, avoid
859 * the pin collision.
860 */
861 if (gsi > 15 || (gsi == 0 && !timer_uses_ioapic_pin_0))
862 gsi = pci_irq++;
863 /*
864 * Don't assign IRQ used by ACPI SCI
865 */
866 if (gsi == acpi_fadt.sci_int)
867 gsi = pci_irq++;
868 gsi_to_irq[irq] = gsi;
869 } else {
870 printk(KERN_ERR "GSI %u is too high\n", gsi);
871 return gsi;
872 }
873 }
874
875 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, 835 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
876 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1, 836 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
877 polarity == ACPI_ACTIVE_HIGH ? 0 : 1); 837 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 848f173db257..c1e69a1f92a4 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -206,7 +206,7 @@ source "drivers/pci/hotplug/Kconfig"
206 206
207endmenu 207endmenu
208 208
209menu "Exectuable file formats" 209menu "Executable file formats"
210 210
211# only elf supported 211# only elf supported
212config KCORE_ELF 212config KCORE_ELF
@@ -241,7 +241,7 @@ menu "Xtensa initrd options"
241 bool "Embed root filesystem ramdisk into the kernel" 241 bool "Embed root filesystem ramdisk into the kernel"
242 242
243config EMBEDDED_RAMDISK_IMAGE 243config EMBEDDED_RAMDISK_IMAGE
244 string "Filename of gziped ramdisk image" 244 string "Filename of gzipped ramdisk image"
245 depends on EMBEDDED_RAMDISK 245 depends on EMBEDDED_RAMDISK
246 default "ramdisk.gz" 246 default "ramdisk.gz"
247 help 247 help
diff --git a/arch/xtensa/kernel/module.c b/arch/xtensa/kernel/module.c
index d1683cfa19a2..2ea1755a0858 100644
--- a/arch/xtensa/kernel/module.c
+++ b/arch/xtensa/kernel/module.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/xtensa/kernel/platform.c 2 * arch/xtensa/kernel/module.c
3 * 3 *
4 * Module support. 4 * Module support.
5 * 5 *
diff --git a/arch/xtensa/kernel/pci-dma.c b/arch/xtensa/kernel/pci-dma.c
index 1ff82268e8ea..6648fa9d9192 100644
--- a/arch/xtensa/kernel/pci-dma.c
+++ b/arch/xtensa/kernel/pci-dma.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/xtensa/pci-dma.c 2 * arch/xtensa/kernel/pci-dma.c
3 * 3 *
4 * DMA coherent memory allocation. 4 * DMA coherent memory allocation.
5 * 5 *
diff --git a/arch/xtensa/kernel/pci.c b/arch/xtensa/kernel/pci.c
index 8709f8249d02..45571ccb72d6 100644
--- a/arch/xtensa/kernel/pci.c
+++ b/arch/xtensa/kernel/pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/xtensa/pcibios.c 2 * arch/xtensa/kernel/pci.c
3 * 3 *
4 * PCI bios-type initialisation for PCI machines 4 * PCI bios-type initialisation for PCI machines
5 * 5 *
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 82684d05910a..c99ab72b41b6 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/xtensa/setup.c 2 * arch/xtensa/kernel/setup.c
3 * 3 *
4 * This file is subject to the terms and conditions of the GNU General Public 4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive 5 * License. See the file "COPYING" in the main directory of this archive
diff --git a/arch/xtensa/kernel/syscalls.c b/arch/xtensa/kernel/syscalls.c
index d9285d4d5565..f49cb239e603 100644
--- a/arch/xtensa/kernel/syscalls.c
+++ b/arch/xtensa/kernel/syscalls.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/xtensa/kernel/syscall.c 2 * arch/xtensa/kernel/syscalls.c
3 * 3 *
4 * This file is subject to the terms and conditions of the GNU General Public 4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive 5 * License. See the file "COPYING" in the main directory of this archive
diff --git a/arch/xtensa/lib/pci-auto.c b/arch/xtensa/lib/pci-auto.c
index 90c790f6123b..a71733ae1193 100644
--- a/arch/xtensa/lib/pci-auto.c
+++ b/arch/xtensa/lib/pci-auto.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/xtensa/kernel/pci-auto.c 2 * arch/xtensa/lib/pci-auto.c
3 * 3 *
4 * PCI autoconfiguration library 4 * PCI autoconfiguration library
5 * 5 *
diff --git a/arch/xtensa/lib/usercopy.S b/arch/xtensa/lib/usercopy.S
index 265db2693cbd..4641ef510f0e 100644
--- a/arch/xtensa/lib/usercopy.S
+++ b/arch/xtensa/lib/usercopy.S
@@ -5,10 +5,10 @@
5 * 5 *
6 * DO NOT COMBINE this function with <arch/xtensa/lib/hal/memcopy.S>. 6 * DO NOT COMBINE this function with <arch/xtensa/lib/hal/memcopy.S>.
7 * It needs to remain separate and distinct. The hal files are part 7 * It needs to remain separate and distinct. The hal files are part
8 * of the the Xtensa link-time HAL, and those files may differ per 8 * of the Xtensa link-time HAL, and those files may differ per
9 * processor configuration. Patching the kernel for another 9 * processor configuration. Patching the kernel for another
10 * processor configuration includes replacing the hal files, and we 10 * processor configuration includes replacing the hal files, and we
11 * could loose the special functionality for accessing user-space 11 * could lose the special functionality for accessing user-space
12 * memory during such a patch. We sacrifice a little code space here 12 * memory during such a patch. We sacrifice a little code space here
13 * in favor to simplify code maintenance. 13 * in favor to simplify code maintenance.
14 * 14 *
diff --git a/arch/xtensa/mm/pgtable.c b/arch/xtensa/mm/pgtable.c
index 7d28914d11cb..697992738205 100644
--- a/arch/xtensa/mm/pgtable.c
+++ b/arch/xtensa/mm/pgtable.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/xtensa/mm/fault.c 2 * arch/xtensa/mm/pgtable.c
3 * 3 *
4 * This file is subject to the terms and conditions of the GNU General Public 4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive 5 * License. See the file "COPYING" in the main directory of this archive
diff --git a/arch/xtensa/mm/tlb.c b/arch/xtensa/mm/tlb.c
index d3bd3bfc3b3b..0fefb8666874 100644
--- a/arch/xtensa/mm/tlb.c
+++ b/arch/xtensa/mm/tlb.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/xtensa/mm/mmu.c 2 * arch/xtensa/mm/tlb.c
3 * 3 *
4 * Logic that manipulates the Xtensa MMU. Derived from MIPS. 4 * Logic that manipulates the Xtensa MMU. Derived from MIPS.
5 * 5 *
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-30 14:05:23 -0500