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-rw-r--r--arch/arm/boot/compressed/.gitignore3
-rw-r--r--arch/arm/common/dmabounce.c56
-rw-r--r--arch/arm/configs/orion5x_defconfig13
-rw-r--r--arch/arm/include/asm/dma-mapping.h86
-rw-r--r--arch/arm/include/asm/memory.h22
-rw-r--r--arch/arm/include/asm/mtd-xip.h2
-rw-r--r--arch/arm/include/asm/processor.h4
-rw-r--r--arch/arm/include/asm/tlbflush.h7
-rw-r--r--arch/arm/include/asm/unistd.h6
-rw-r--r--arch/arm/kernel/.gitignore1
-rw-r--r--arch/arm/kernel/calls.S10
-rw-r--r--arch/arm/kernel/setup.c13
-rw-r--r--arch/arm/kernel/traps.c31
-rw-r--r--arch/arm/mach-footbridge/cats-pci.c3
-rw-r--r--arch/arm/mach-integrator/cpu.c2
-rw-r--r--arch/arm/mach-integrator/include/mach/platform.h2
-rw-r--r--arch/arm/mach-kirkwood/common.c247
-rw-r--r--arch/arm/mach-kirkwood/common.h3
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h9
-rw-r--r--arch/arm/mach-kirkwood/irq.c2
-rw-r--r--arch/arm/mach-kirkwood/pcie.c2
-rw-r--r--arch/arm/mach-kirkwood/rd88f6192-nas-setup.c23
-rw-r--r--arch/arm/mach-kirkwood/rd88f6281-setup.c2
-rw-r--r--arch/arm/mach-lh7a40x/include/mach/ssp.h1
-rw-r--r--arch/arm/mach-lh7a40x/lcd-panel.h1
-rw-r--r--arch/arm/mach-loki/common.c4
-rw-r--r--arch/arm/mach-loki/irq.c2
-rw-r--r--arch/arm/mach-mv78xx0/common.c8
-rw-r--r--arch/arm/mach-mv78xx0/irq.c2
-rw-r--r--arch/arm/mach-mv78xx0/pcie.c2
-rw-r--r--arch/arm/mach-orion5x/common.c115
-rw-r--r--arch/arm/mach-orion5x/common.h1
-rw-r--r--arch/arm/mach-orion5x/db88f5281-setup.c2
-rw-r--r--arch/arm/mach-orion5x/include/mach/orion5x.h5
-rw-r--r--arch/arm/mach-orion5x/irq.c2
-rw-r--r--arch/arm/mach-orion5x/kurobox_pro-setup.c3
-rw-r--r--arch/arm/mach-orion5x/mss2-setup.c1
-rw-r--r--arch/arm/mach-orion5x/mv2120-setup.c1
-rw-r--r--arch/arm/mach-orion5x/pci.c2
-rw-r--r--arch/arm/mach-orion5x/rd88f5182-setup.c1
-rw-r--r--arch/arm/mach-orion5x/ts209-setup.c5
-rw-r--r--arch/arm/mach-orion5x/ts409-setup.c48
-rw-r--r--arch/arm/mach-orion5x/ts78xx-setup.c1
-rw-r--r--arch/arm/mach-pxa/include/mach/mtd-xip.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/poodle.h6
-rw-r--r--arch/arm/mach-pxa/include/mach/pxafb.h10
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-clock.h2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-gpio.h2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-irq.h2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-lcd.h2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-mem.h2
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-smdk2410.c1
-rw-r--r--arch/arm/mach-s3c2410/mach-vr1000.c2
-rw-r--r--arch/arm/mach-s3c2412/mach-jive.c3
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-osiris.c2
-rw-r--r--arch/arm/mach-sa1100/cpu-sa1110.c2
-rw-r--r--arch/arm/mach-sa1100/include/mach/mtd-xip.h2
-rw-r--r--arch/arm/mm/cache-feroceon-l2.c2
-rw-r--r--arch/arm/mm/mmu.c50
-rw-r--r--arch/arm/mm/proc-arm940.S1
-rw-r--r--arch/arm/mm/proc-arm946.S1
-rw-r--r--arch/arm/plat-omap/include/mach/memory.h15
-rw-r--r--arch/arm/plat-orion/include/plat/cache-feroceon-l2.h11
-rw-r--r--arch/arm/plat-orion/include/plat/ehci-orion.h19
-rw-r--r--arch/arm/plat-orion/include/plat/irq.h17
-rw-r--r--arch/arm/plat-orion/include/plat/mv_xor.h30
-rw-r--r--arch/arm/plat-orion/include/plat/orion_nand.h25
-rw-r--r--arch/arm/plat-orion/include/plat/pcie.h32
-rw-r--r--arch/arm/plat-orion/include/plat/time.h17
-rw-r--r--arch/arm/plat-orion/irq.c2
-rw-r--r--arch/arm/plat-orion/pcie.c2
-rw-r--r--arch/arm/plat-s3c24xx/cpu.c4
-rw-r--r--arch/arm/tools/mach-types53
-rw-r--r--arch/sparc64/mm/init.c30
-rw-r--r--arch/x86/Kconfig6
-rw-r--r--arch/x86/boot/boot.h8
-rw-r--r--arch/x86/boot/cpu.c3
-rw-r--r--arch/x86/boot/cpucheck.c10
-rw-r--r--arch/x86/boot/main.c5
-rw-r--r--arch/x86/kernel/acpi/boot.c16
-rw-r--r--arch/x86/kernel/acpi/sleep.c2
-rw-r--r--arch/x86/kernel/amd_iommu.c19
-rw-r--r--arch/x86/kernel/amd_iommu_init.c24
-rw-r--r--arch/x86/kernel/apic_32.c8
-rw-r--r--arch/x86/kernel/apic_64.c7
-rw-r--r--arch/x86/kernel/cpu/perfctr-watchdog.c8
-rw-r--r--arch/x86/kernel/genx2apic_uv_x.c2
-rw-r--r--arch/x86/kernel/head64.c1
-rw-r--r--arch/x86/kernel/hpet.c24
-rw-r--r--arch/x86/kernel/mfgpt_32.c52
-rw-r--r--arch/x86/kernel/msr.c2
-rw-r--r--arch/x86/kernel/nmi.c28
-rw-r--r--arch/x86/kernel/process_32.c5
-rw-r--r--arch/x86/kernel/process_64.c5
-rw-r--r--arch/x86/kernel/setup.c2
-rw-r--r--arch/x86/kernel/signal_64.c11
-rw-r--r--arch/x86/kernel/smpboot.c52
-rw-r--r--arch/x86/kernel/smpcommon.c17
-rw-r--r--arch/x86/kernel/traps_64.c9
-rw-r--r--arch/x86/kernel/visws_quirks.c6
-rw-r--r--arch/x86/mm/init_64.c12
-rw-r--r--arch/x86/mm/pageattr-test.c3
-rw-r--r--arch/x86/mm/pageattr.c21
-rw-r--r--arch/x86/mm/srat_32.c12
-rw-r--r--arch/x86/pci/mmconfig-shared.c2
107 files changed, 1199 insertions, 294 deletions
diff --git a/arch/arm/boot/compressed/.gitignore b/arch/arm/boot/compressed/.gitignore
index b15f927a5926..ab204db594d3 100644
--- a/arch/arm/boot/compressed/.gitignore
+++ b/arch/arm/boot/compressed/.gitignore
@@ -1,2 +1,3 @@
1piggy.gz
2font.c 1font.c
2piggy.gz
3vmlinux.lds
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index 69130f365904..aecc6c3f908f 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -246,9 +246,9 @@ map_single(struct device *dev, void *ptr, size_t size,
246 } 246 }
247 247
248 dev_dbg(dev, 248 dev_dbg(dev,
249 "%s: unsafe buffer %p (phy=%p) mapped to %p (phy=%p)\n", 249 "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",
250 __func__, buf->ptr, (void *) virt_to_dma(dev, buf->ptr), 250 __func__, buf->ptr, virt_to_dma(dev, buf->ptr),
251 buf->safe, (void *) buf->safe_dma_addr); 251 buf->safe, buf->safe_dma_addr);
252 252
253 if ((dir == DMA_TO_DEVICE) || 253 if ((dir == DMA_TO_DEVICE) ||
254 (dir == DMA_BIDIRECTIONAL)) { 254 (dir == DMA_BIDIRECTIONAL)) {
@@ -292,9 +292,9 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
292 BUG_ON(buf->size != size); 292 BUG_ON(buf->size != size);
293 293
294 dev_dbg(dev, 294 dev_dbg(dev,
295 "%s: unsafe buffer %p (phy=%p) mapped to %p (phy=%p)\n", 295 "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",
296 __func__, buf->ptr, (void *) virt_to_dma(dev, buf->ptr), 296 __func__, buf->ptr, virt_to_dma(dev, buf->ptr),
297 buf->safe, (void *) buf->safe_dma_addr); 297 buf->safe, buf->safe_dma_addr);
298 298
299 DO_STATS ( device_info->bounce_count++ ); 299 DO_STATS ( device_info->bounce_count++ );
300 300
@@ -321,9 +321,8 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
321 } 321 }
322} 322}
323 323
324static inline void 324static int sync_single(struct device *dev, dma_addr_t dma_addr, size_t size,
325sync_single(struct device *dev, dma_addr_t dma_addr, size_t size, 325 enum dma_data_direction dir)
326 enum dma_data_direction dir)
327{ 326{
328 struct dmabounce_device_info *device_info = dev->archdata.dmabounce; 327 struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
329 struct safe_buffer *buf = NULL; 328 struct safe_buffer *buf = NULL;
@@ -355,9 +354,9 @@ sync_single(struct device *dev, dma_addr_t dma_addr, size_t size,
355 */ 354 */
356 355
357 dev_dbg(dev, 356 dev_dbg(dev,
358 "%s: unsafe buffer %p (phy=%p) mapped to %p (phy=%p)\n", 357 "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",
359 __func__, buf->ptr, (void *) virt_to_dma(dev, buf->ptr), 358 __func__, buf->ptr, virt_to_dma(dev, buf->ptr),
360 buf->safe, (void *) buf->safe_dma_addr); 359 buf->safe, buf->safe_dma_addr);
361 360
362 DO_STATS ( device_info->bounce_count++ ); 361 DO_STATS ( device_info->bounce_count++ );
363 362
@@ -383,8 +382,9 @@ sync_single(struct device *dev, dma_addr_t dma_addr, size_t size,
383 * No need to sync the safe buffer - it was allocated 382 * No need to sync the safe buffer - it was allocated
384 * via the coherent allocators. 383 * via the coherent allocators.
385 */ 384 */
385 return 0;
386 } else { 386 } else {
387 dma_cache_maint(dma_to_virt(dev, dma_addr), size, dir); 387 return 1;
388 } 388 }
389} 389}
390 390
@@ -474,25 +474,29 @@ dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
474 } 474 }
475} 475}
476 476
477void 477void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_addr,
478dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_addr, size_t size, 478 unsigned long offset, size_t size,
479 enum dma_data_direction dir) 479 enum dma_data_direction dir)
480{ 480{
481 dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", 481 dev_dbg(dev, "%s(dma=%#x,off=%#lx,size=%zx,dir=%x)\n",
482 __func__, (void *) dma_addr, size, dir); 482 __func__, dma_addr, offset, size, dir);
483 483
484 sync_single(dev, dma_addr, size, dir); 484 if (sync_single(dev, dma_addr, offset + size, dir))
485 dma_cache_maint(dma_to_virt(dev, dma_addr) + offset, size, dir);
485} 486}
487EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
486 488
487void 489void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_addr,
488dma_sync_single_for_device(struct device *dev, dma_addr_t dma_addr, size_t size, 490 unsigned long offset, size_t size,
489 enum dma_data_direction dir) 491 enum dma_data_direction dir)
490{ 492{
491 dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", 493 dev_dbg(dev, "%s(dma=%#x,off=%#lx,size=%zx,dir=%x)\n",
492 __func__, (void *) dma_addr, size, dir); 494 __func__, dma_addr, offset, size, dir);
493 495
494 sync_single(dev, dma_addr, size, dir); 496 if (sync_single(dev, dma_addr, offset + size, dir))
497 dma_cache_maint(dma_to_virt(dev, dma_addr) + offset, size, dir);
495} 498}
499EXPORT_SYMBOL(dma_sync_single_range_for_device);
496 500
497void 501void
498dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, 502dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
@@ -644,8 +648,6 @@ EXPORT_SYMBOL(dma_map_single);
644EXPORT_SYMBOL(dma_unmap_single); 648EXPORT_SYMBOL(dma_unmap_single);
645EXPORT_SYMBOL(dma_map_sg); 649EXPORT_SYMBOL(dma_map_sg);
646EXPORT_SYMBOL(dma_unmap_sg); 650EXPORT_SYMBOL(dma_unmap_sg);
647EXPORT_SYMBOL(dma_sync_single_for_cpu);
648EXPORT_SYMBOL(dma_sync_single_for_device);
649EXPORT_SYMBOL(dma_sync_sg_for_cpu); 651EXPORT_SYMBOL(dma_sync_sg_for_cpu);
650EXPORT_SYMBOL(dma_sync_sg_for_device); 652EXPORT_SYMBOL(dma_sync_sg_for_device);
651EXPORT_SYMBOL(dmabounce_register_dev); 653EXPORT_SYMBOL(dmabounce_register_dev);
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig
index 9578b5d9f9c7..1464ffe71717 100644
--- a/arch/arm/configs/orion5x_defconfig
+++ b/arch/arm/configs/orion5x_defconfig
@@ -757,7 +757,14 @@ CONFIG_INPUT_EVDEV=y
757# 757#
758# Input Device Drivers 758# Input Device Drivers
759# 759#
760# CONFIG_INPUT_KEYBOARD is not set 760CONFIG_INPUT_KEYBOARD=y
761# CONFIG_KEYBOARD_ATKBD is not set
762# CONFIG_KEYBOARD_SUNKBD is not set
763# CONFIG_KEYBOARD_LKKBD is not set
764# CONFIG_KEYBOARD_XTKBD is not set
765# CONFIG_KEYBOARD_NEWTON is not set
766# CONFIG_KEYBOARD_STOWAWAY is not set
767CONFIG_KEYBOARD_GPIO=y
761# CONFIG_INPUT_MOUSE is not set 768# CONFIG_INPUT_MOUSE is not set
762# CONFIG_INPUT_JOYSTICK is not set 769# CONFIG_INPUT_JOYSTICK is not set
763# CONFIG_INPUT_TABLET is not set 770# CONFIG_INPUT_TABLET is not set
@@ -1111,11 +1118,11 @@ CONFIG_RTC_DRV_DS1307=y
1111CONFIG_RTC_DRV_RS5C372=y 1118CONFIG_RTC_DRV_RS5C372=y
1112# CONFIG_RTC_DRV_ISL1208 is not set 1119# CONFIG_RTC_DRV_ISL1208 is not set
1113# CONFIG_RTC_DRV_X1205 is not set 1120# CONFIG_RTC_DRV_X1205 is not set
1114# CONFIG_RTC_DRV_PCF8563 is not set 1121CONFIG_RTC_DRV_PCF8563=y
1115# CONFIG_RTC_DRV_PCF8583 is not set 1122# CONFIG_RTC_DRV_PCF8583 is not set
1116CONFIG_RTC_DRV_M41T80=y 1123CONFIG_RTC_DRV_M41T80=y
1117# CONFIG_RTC_DRV_M41T80_WDT is not set 1124# CONFIG_RTC_DRV_M41T80_WDT is not set
1118# CONFIG_RTC_DRV_S35390A is not set 1125CONFIG_RTC_DRV_S35390A=y
1119 1126
1120# 1127#
1121# SPI RTC drivers 1128# SPI RTC drivers
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 45329fca1b64..7b95d2058395 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -3,11 +3,48 @@
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
6#include <linux/mm.h> /* need struct page */ 6#include <linux/mm_types.h>
7
8#include <linux/scatterlist.h> 7#include <linux/scatterlist.h>
9 8
10#include <asm-generic/dma-coherent.h> 9#include <asm-generic/dma-coherent.h>
10#include <asm/memory.h>
11
12/*
13 * page_to_dma/dma_to_virt/virt_to_dma are architecture private functions
14 * used internally by the DMA-mapping API to provide DMA addresses. They
15 * must not be used by drivers.
16 */
17#ifndef __arch_page_to_dma
18static inline dma_addr_t page_to_dma(struct device *dev, struct page *page)
19{
20 return (dma_addr_t)__virt_to_bus((unsigned long)page_address(page));
21}
22
23static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
24{
25 return (void *)__bus_to_virt(addr);
26}
27
28static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
29{
30 return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
31}
32#else
33static inline dma_addr_t page_to_dma(struct device *dev, struct page *page)
34{
35 return __arch_page_to_dma(dev, page);
36}
37
38static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
39{
40 return __arch_dma_to_virt(dev, addr);
41}
42
43static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
44{
45 return __arch_virt_to_dma(dev, addr);
46}
47#endif
11 48
12/* 49/*
13 * DMA-consistent mapping functions. These allocate/free a region of 50 * DMA-consistent mapping functions. These allocate/free a region of
@@ -169,7 +206,7 @@ dma_map_single(struct device *dev, void *cpu_addr, size_t size,
169 if (!arch_is_coherent()) 206 if (!arch_is_coherent())
170 dma_cache_maint(cpu_addr, size, dir); 207 dma_cache_maint(cpu_addr, size, dir);
171 208
172 return virt_to_dma(dev, (unsigned long)cpu_addr); 209 return virt_to_dma(dev, cpu_addr);
173} 210}
174#else 211#else
175extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction); 212extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction);
@@ -195,7 +232,7 @@ dma_map_page(struct device *dev, struct page *page,
195 unsigned long offset, size_t size, 232 unsigned long offset, size_t size,
196 enum dma_data_direction dir) 233 enum dma_data_direction dir)
197{ 234{
198 return dma_map_single(dev, page_address(page) + offset, size, (int)dir); 235 return dma_map_single(dev, page_address(page) + offset, size, dir);
199} 236}
200 237
201/** 238/**
@@ -241,7 +278,7 @@ static inline void
241dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size, 278dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size,
242 enum dma_data_direction dir) 279 enum dma_data_direction dir)
243{ 280{
244 dma_unmap_single(dev, handle, size, (int)dir); 281 dma_unmap_single(dev, handle, size, dir);
245} 282}
246 283
247/** 284/**
@@ -314,11 +351,12 @@ extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_da
314 351
315 352
316/** 353/**
317 * dma_sync_single_for_cpu 354 * dma_sync_single_range_for_cpu
318 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices 355 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
319 * @handle: DMA address of buffer 356 * @handle: DMA address of buffer
320 * @size: size of buffer to map 357 * @offset: offset of region to start sync
321 * @dir: DMA transfer direction 358 * @size: size of region to sync
359 * @dir: DMA transfer direction (same as passed to dma_map_single)
322 * 360 *
323 * Make physical memory consistent for a single streaming mode DMA 361 * Make physical memory consistent for a single streaming mode DMA
324 * translation after a transfer. 362 * translation after a transfer.
@@ -332,25 +370,41 @@ extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_da
332 */ 370 */
333#ifndef CONFIG_DMABOUNCE 371#ifndef CONFIG_DMABOUNCE
334static inline void 372static inline void
335dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size, 373dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t handle,
336 enum dma_data_direction dir) 374 unsigned long offset, size_t size,
375 enum dma_data_direction dir)
337{ 376{
338 if (!arch_is_coherent()) 377 if (!arch_is_coherent())
339 dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir); 378 dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir);
340} 379}
341 380
342static inline void 381static inline void
343dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size, 382dma_sync_single_range_for_device(struct device *dev, dma_addr_t handle,
344 enum dma_data_direction dir) 383 unsigned long offset, size_t size,
384 enum dma_data_direction dir)
345{ 385{
346 if (!arch_is_coherent()) 386 if (!arch_is_coherent())
347 dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir); 387 dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir);
348} 388}
349#else 389#else
350extern void dma_sync_single_for_cpu(struct device*, dma_addr_t, size_t, enum dma_data_direction); 390extern void dma_sync_single_range_for_cpu(struct device *, dma_addr_t, unsigned long, size_t, enum dma_data_direction);
351extern void dma_sync_single_for_device(struct device*, dma_addr_t, size_t, enum dma_data_direction); 391extern void dma_sync_single_range_for_device(struct device *, dma_addr_t, unsigned long, size_t, enum dma_data_direction);
352#endif 392#endif
353 393
394static inline void
395dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size,
396 enum dma_data_direction dir)
397{
398 dma_sync_single_range_for_cpu(dev, handle, 0, size, dir);
399}
400
401static inline void
402dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size,
403 enum dma_data_direction dir)
404{
405 dma_sync_single_range_for_device(dev, handle, 0, size, dir);
406}
407
354 408
355/** 409/**
356 * dma_sync_sg_for_cpu 410 * dma_sync_sg_for_cpu
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 1e070a2b561a..bf7c737c9226 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -150,6 +150,14 @@
150#endif 150#endif
151 151
152/* 152/*
153 * Amount of memory reserved for the vmalloc() area, and minimum
154 * address for vmalloc mappings.
155 */
156extern unsigned long vmalloc_reserve;
157
158#define VMALLOC_MIN (void *)(VMALLOC_END - vmalloc_reserve)
159
160/*
153 * PFNs are used to describe any physical page; this means 161 * PFNs are used to describe any physical page; this means
154 * PFN 0 == physical address 0. 162 * PFN 0 == physical address 0.
155 * 163 *
@@ -306,20 +314,6 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
306#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) 314#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
307 315
308/* 316/*
309 * Optional device DMA address remapping. Do _not_ use directly!
310 * We should really eliminate virt_to_bus() here - it's deprecated.
311 */
312#ifndef __arch_page_to_dma
313#define page_to_dma(dev, page) ((dma_addr_t)__virt_to_bus((unsigned long)page_address(page)))
314#define dma_to_virt(dev, addr) ((void *)__bus_to_virt(addr))
315#define virt_to_dma(dev, addr) ((dma_addr_t)__virt_to_bus((unsigned long)(addr)))
316#else
317#define page_to_dma(dev, page) (__arch_page_to_dma(dev, page))
318#define dma_to_virt(dev, addr) (__arch_dma_to_virt(dev, addr))
319#define virt_to_dma(dev, addr) (__arch_virt_to_dma(dev, addr))
320#endif
321
322/*
323 * Optional coherency support. Currently used only by selected 317 * Optional coherency support. Currently used only by selected
324 * Intel XSC3-based systems. 318 * Intel XSC3-based systems.
325 */ 319 */
diff --git a/arch/arm/include/asm/mtd-xip.h b/arch/arm/include/asm/mtd-xip.h
index 4225372a26f3..d8fbe2d9b8b9 100644
--- a/arch/arm/include/asm/mtd-xip.h
+++ b/arch/arm/include/asm/mtd-xip.h
@@ -10,8 +10,6 @@
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 *
14 * $Id: xip.h,v 1.2 2004/12/01 15:49:10 nico Exp $
15 */ 13 */
16 14
17#ifndef __ARM_MTD_XIP_H__ 15#ifndef __ARM_MTD_XIP_H__
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index b01d5e7e3d5a..517a4d6ffc74 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -112,9 +112,9 @@ extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
112static inline void prefetch(const void *ptr) 112static inline void prefetch(const void *ptr)
113{ 113{
114 __asm__ __volatile__( 114 __asm__ __volatile__(
115 "pld\t%0" 115 "pld\t%a0"
116 : 116 :
117 : "o" (*(char *)ptr) 117 : "p" (ptr)
118 : "cc"); 118 : "cc");
119} 119}
120 120
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index 0d0d40f1b599..b543a054a17e 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -54,6 +54,7 @@
54 * v4wbi - ARMv4 with write buffer with I TLB flush entry instruction 54 * v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
55 * fr - Feroceon (v4wbi with non-outer-cacheable page table walks) 55 * fr - Feroceon (v4wbi with non-outer-cacheable page table walks)
56 * v6wbi - ARMv6 with write buffer with I TLB flush entry instruction 56 * v6wbi - ARMv6 with write buffer with I TLB flush entry instruction
57 * v7wbi - identical to v6wbi
57 */ 58 */
58#undef _TLB 59#undef _TLB
59#undef MULTI_TLB 60#undef MULTI_TLB
@@ -266,14 +267,16 @@ extern struct cpu_tlb_fns cpu_tlb;
266 v4wbi_possible_flags | \ 267 v4wbi_possible_flags | \
267 fr_possible_flags | \ 268 fr_possible_flags | \
268 v4wb_possible_flags | \ 269 v4wb_possible_flags | \
269 v6wbi_possible_flags) 270 v6wbi_possible_flags | \
271 v7wbi_possible_flags)
270 272
271#define always_tlb_flags (v3_always_flags & \ 273#define always_tlb_flags (v3_always_flags & \
272 v4_always_flags & \ 274 v4_always_flags & \
273 v4wbi_always_flags & \ 275 v4wbi_always_flags & \
274 fr_always_flags & \ 276 fr_always_flags & \
275 v4wb_always_flags & \ 277 v4wb_always_flags & \
276 v6wbi_always_flags) 278 v6wbi_always_flags & \
279 v7wbi_always_flags)
277 280
278#define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f))) 281#define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f)))
279 282
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index f95fbb2fcb5f..010618487cf1 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -381,6 +381,12 @@
381#define __NR_fallocate (__NR_SYSCALL_BASE+352) 381#define __NR_fallocate (__NR_SYSCALL_BASE+352)
382#define __NR_timerfd_settime (__NR_SYSCALL_BASE+353) 382#define __NR_timerfd_settime (__NR_SYSCALL_BASE+353)
383#define __NR_timerfd_gettime (__NR_SYSCALL_BASE+354) 383#define __NR_timerfd_gettime (__NR_SYSCALL_BASE+354)
384#define __NR_signalfd4 (__NR_SYSCALL_BASE+355)
385#define __NR_eventfd2 (__NR_SYSCALL_BASE+356)
386#define __NR_epoll_create1 (__NR_SYSCALL_BASE+357)
387#define __NR_dup3 (__NR_SYSCALL_BASE+358)
388#define __NR_pipe2 (__NR_SYSCALL_BASE+359)
389#define __NR_inotify_init1 (__NR_SYSCALL_BASE+360)
384 390
385/* 391/*
386 * The following SWIs are ARM private. 392 * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/.gitignore b/arch/arm/kernel/.gitignore
new file mode 100644
index 000000000000..c5f676c3c224
--- /dev/null
+++ b/arch/arm/kernel/.gitignore
@@ -0,0 +1 @@
vmlinux.lds
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 30a67a5a40a8..09a061cb7838 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -262,10 +262,10 @@
262/* 250 */ CALL(sys_epoll_create) 262/* 250 */ CALL(sys_epoll_create)
263 CALL(ABI(sys_epoll_ctl, sys_oabi_epoll_ctl)) 263 CALL(ABI(sys_epoll_ctl, sys_oabi_epoll_ctl))
264 CALL(ABI(sys_epoll_wait, sys_oabi_epoll_wait)) 264 CALL(ABI(sys_epoll_wait, sys_oabi_epoll_wait))
265 CALL(sys_remap_file_pages) 265 CALL(sys_remap_file_pages)
266 CALL(sys_ni_syscall) /* sys_set_thread_area */ 266 CALL(sys_ni_syscall) /* sys_set_thread_area */
267/* 255 */ CALL(sys_ni_syscall) /* sys_get_thread_area */ 267/* 255 */ CALL(sys_ni_syscall) /* sys_get_thread_area */
268 CALL(sys_set_tid_address) 268 CALL(sys_set_tid_address)
269 CALL(sys_timer_create) 269 CALL(sys_timer_create)
270 CALL(sys_timer_settime) 270 CALL(sys_timer_settime)
271 CALL(sys_timer_gettime) 271 CALL(sys_timer_gettime)
@@ -364,6 +364,12 @@
364 CALL(sys_fallocate) 364 CALL(sys_fallocate)
365 CALL(sys_timerfd_settime) 365 CALL(sys_timerfd_settime)
366 CALL(sys_timerfd_gettime) 366 CALL(sys_timerfd_gettime)
367/* 355 */ CALL(sys_signalfd4)
368 CALL(sys_eventfd2)
369 CALL(sys_epoll_create1)
370 CALL(sys_dup3)
371 CALL(sys_pipe2)
372/* 360 */ CALL(sys_inotify_init1)
367#ifndef syscalls_counted 373#ifndef syscalls_counted
368.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 374.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
369#define syscalls_counted 375#define syscalls_counted
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 38f0e7940a13..2ca7038b67a7 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -81,6 +81,8 @@ EXPORT_SYMBOL(system_serial_high);
81unsigned int elf_hwcap; 81unsigned int elf_hwcap;
82EXPORT_SYMBOL(elf_hwcap); 82EXPORT_SYMBOL(elf_hwcap);
83 83
84unsigned long __initdata vmalloc_reserve = 128 << 20;
85
84 86
85#ifdef MULTI_CPU 87#ifdef MULTI_CPU
86struct processor processor; 88struct processor processor;
@@ -501,6 +503,17 @@ static void __init early_mem(char **p)
501__early_param("mem=", early_mem); 503__early_param("mem=", early_mem);
502 504
503/* 505/*
506 * vmalloc=size forces the vmalloc area to be exactly 'size'
507 * bytes. This can be used to increase (or decrease) the vmalloc
508 * area - the default is 128m.
509 */
510static void __init early_vmalloc(char **arg)
511{
512 vmalloc_reserve = memparse(*arg, arg);
513}
514__early_param("vmalloc=", early_vmalloc);
515
516/*
504 * Initial parsing of the command line. 517 * Initial parsing of the command line.
505 */ 518 */
506static void __init parse_cmdline(char **cmdline_p, char *from) 519static void __init parse_cmdline(char **cmdline_p, char *from)
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 7277aef83098..872f1f8fbb57 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -288,14 +288,28 @@ void unregister_undef_hook(struct undef_hook *hook)
288 spin_unlock_irqrestore(&undef_lock, flags); 288 spin_unlock_irqrestore(&undef_lock, flags);
289} 289}
290 290
291static int call_undef_hook(struct pt_regs *regs, unsigned int instr)
292{
293 struct undef_hook *hook;
294 unsigned long flags;
295 int (*fn)(struct pt_regs *regs, unsigned int instr) = NULL;
296
297 spin_lock_irqsave(&undef_lock, flags);
298 list_for_each_entry(hook, &undef_hook, node)
299 if ((instr & hook->instr_mask) == hook->instr_val &&
300 (regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val)
301 fn = hook->fn;
302 spin_unlock_irqrestore(&undef_lock, flags);
303
304 return fn ? fn(regs, instr) : 1;
305}
306
291asmlinkage void __exception do_undefinstr(struct pt_regs *regs) 307asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
292{ 308{
293 unsigned int correction = thumb_mode(regs) ? 2 : 4; 309 unsigned int correction = thumb_mode(regs) ? 2 : 4;
294 unsigned int instr; 310 unsigned int instr;
295 struct undef_hook *hook;
296 siginfo_t info; 311 siginfo_t info;
297 void __user *pc; 312 void __user *pc;
298 unsigned long flags;
299 313
300 /* 314 /*
301 * According to the ARM ARM, PC is 2 or 4 bytes ahead, 315 * According to the ARM ARM, PC is 2 or 4 bytes ahead,
@@ -325,17 +339,8 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
325 } 339 }
326#endif 340#endif
327 341
328 spin_lock_irqsave(&undef_lock, flags); 342 if (call_undef_hook(regs, instr) == 0)
329 list_for_each_entry(hook, &undef_hook, node) { 343 return;
330 if ((instr & hook->instr_mask) == hook->instr_val &&
331 (regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val) {
332 if (hook->fn(regs, instr) == 0) {
333 spin_unlock_irqrestore(&undef_lock, flags);
334 return;
335 }
336 }
337 }
338 spin_unlock_irqrestore(&undef_lock, flags);
339 344
340#ifdef CONFIG_DEBUG_USER 345#ifdef CONFIG_DEBUG_USER
341 if (user_debug & UDBG_UNDEFINED) { 346 if (user_debug & UDBG_UNDEFINED) {
diff --git a/arch/arm/mach-footbridge/cats-pci.c b/arch/arm/mach-footbridge/cats-pci.c
index 35eb232a649a..ae3e1c8c7583 100644
--- a/arch/arm/mach-footbridge/cats-pci.c
+++ b/arch/arm/mach-footbridge/cats-pci.c
@@ -18,6 +18,9 @@ static int irqmap_cats[] __initdata = { IRQ_PCI, IRQ_IN0, IRQ_IN1, IRQ_IN3 };
18 18
19static int __init cats_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 19static int __init cats_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
20{ 20{
21 if (dev->irq >= 255)
22 return -1; /* not a valid interrupt. */
23
21 if (dev->irq >= 128) 24 if (dev->irq >= 128)
22 return dev->irq & 0x1f; 25 return dev->irq & 0x1f;
23 26
diff --git a/arch/arm/mach-integrator/cpu.c b/arch/arm/mach-integrator/cpu.c
index ce5ea7c26675..7c49d55e6b27 100644
--- a/arch/arm/mach-integrator/cpu.c
+++ b/arch/arm/mach-integrator/cpu.c
@@ -3,8 +3,6 @@
3 * 3 *
4 * Copyright (C) 2001-2002 Deep Blue Solutions Ltd. 4 * Copyright (C) 2001-2002 Deep Blue Solutions Ltd.
5 * 5 *
6 * $Id: cpu.c,v 1.6 2002/07/18 13:58:51 rmk Exp $
7 *
8 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h
index 83c4c1ceb411..028b87839c0f 100644
--- a/arch/arm/mach-integrator/include/mach/platform.h
+++ b/arch/arm/mach-integrator/include/mach/platform.h
@@ -26,8 +26,6 @@
26 * NOTE: This is a multi-hosted header file for use with uHAL and 26 * NOTE: This is a multi-hosted header file for use with uHAL and
27 * supported debuggers. 27 * supported debuggers.
28 * 28 *
29 * $Id: platform.s,v 1.32 2000/02/18 10:51:39 asims Exp $
30 *
31 * ***********************************************************************/ 29 * ***********************************************************************/
32 30
33#ifndef __address_h 31#ifndef __address_h
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 0e509b8ad56e..189f16f3619d 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -15,15 +15,17 @@
15#include <linux/mbus.h> 15#include <linux/mbus.h>
16#include <linux/mv643xx_eth.h> 16#include <linux/mv643xx_eth.h>
17#include <linux/ata_platform.h> 17#include <linux/ata_platform.h>
18#include <linux/spi/orion_spi.h>
18#include <asm/page.h> 19#include <asm/page.h>
19#include <asm/timex.h> 20#include <asm/timex.h>
20#include <asm/mach/map.h> 21#include <asm/mach/map.h>
21#include <asm/mach/time.h> 22#include <asm/mach/time.h>
22#include <mach/kirkwood.h> 23#include <mach/kirkwood.h>
23#include <asm/plat-orion/cache-feroceon-l2.h> 24#include <plat/cache-feroceon-l2.h>
24#include <asm/plat-orion/ehci-orion.h> 25#include <plat/ehci-orion.h>
25#include <asm/plat-orion/orion_nand.h> 26#include <plat/mv_xor.h>
26#include <asm/plat-orion/time.h> 27#include <plat/orion_nand.h>
28#include <plat/time.h>
27#include "common.h" 29#include "common.h"
28 30
29/***************************************************************************** 31/*****************************************************************************
@@ -196,6 +198,37 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
196 198
197 199
198/***************************************************************************** 200/*****************************************************************************
201 * SPI
202 ****************************************************************************/
203static struct orion_spi_info kirkwood_spi_plat_data = {
204 .tclk = KIRKWOOD_TCLK,
205};
206
207static struct resource kirkwood_spi_resources[] = {
208 {
209 .start = SPI_PHYS_BASE,
210 .end = SPI_PHYS_BASE + SZ_512 - 1,
211 .flags = IORESOURCE_MEM,
212 },
213};
214
215static struct platform_device kirkwood_spi = {
216 .name = "orion_spi",
217 .id = 0,
218 .resource = kirkwood_spi_resources,
219 .dev = {
220 .platform_data = &kirkwood_spi_plat_data,
221 },
222 .num_resources = ARRAY_SIZE(kirkwood_spi_resources),
223};
224
225void __init kirkwood_spi_init()
226{
227 platform_device_register(&kirkwood_spi);
228}
229
230
231/*****************************************************************************
199 * UART0 232 * UART0
200 ****************************************************************************/ 233 ****************************************************************************/
201static struct plat_serial8250_port kirkwood_uart0_data[] = { 234static struct plat_serial8250_port kirkwood_uart0_data[] = {
@@ -284,6 +317,212 @@ void __init kirkwood_uart1_init(void)
284 317
285 318
286/***************************************************************************** 319/*****************************************************************************
320 * XOR
321 ****************************************************************************/
322static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
323 .dram = &kirkwood_mbus_dram_info,
324};
325
326static u64 kirkwood_xor_dmamask = DMA_32BIT_MASK;
327
328
329/*****************************************************************************
330 * XOR0
331 ****************************************************************************/
332static struct resource kirkwood_xor0_shared_resources[] = {
333 {
334 .name = "xor 0 low",
335 .start = XOR0_PHYS_BASE,
336 .end = XOR0_PHYS_BASE + 0xff,
337 .flags = IORESOURCE_MEM,
338 }, {
339 .name = "xor 0 high",
340 .start = XOR0_HIGH_PHYS_BASE,
341 .end = XOR0_HIGH_PHYS_BASE + 0xff,
342 .flags = IORESOURCE_MEM,
343 },
344};
345
346static struct platform_device kirkwood_xor0_shared = {
347 .name = MV_XOR_SHARED_NAME,
348 .id = 0,
349 .dev = {
350 .platform_data = &kirkwood_xor_shared_data,
351 },
352 .num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
353 .resource = kirkwood_xor0_shared_resources,
354};
355
356static struct resource kirkwood_xor00_resources[] = {
357 [0] = {
358 .start = IRQ_KIRKWOOD_XOR_00,
359 .end = IRQ_KIRKWOOD_XOR_00,
360 .flags = IORESOURCE_IRQ,
361 },
362};
363
364static struct mv_xor_platform_data kirkwood_xor00_data = {
365 .shared = &kirkwood_xor0_shared,
366 .hw_id = 0,
367 .pool_size = PAGE_SIZE,
368};
369
370static struct platform_device kirkwood_xor00_channel = {
371 .name = MV_XOR_NAME,
372 .id = 0,
373 .num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
374 .resource = kirkwood_xor00_resources,
375 .dev = {
376 .dma_mask = &kirkwood_xor_dmamask,
377 .coherent_dma_mask = DMA_64BIT_MASK,
378 .platform_data = (void *)&kirkwood_xor00_data,
379 },
380};
381
382static struct resource kirkwood_xor01_resources[] = {
383 [0] = {
384 .start = IRQ_KIRKWOOD_XOR_01,
385 .end = IRQ_KIRKWOOD_XOR_01,
386 .flags = IORESOURCE_IRQ,
387 },
388};
389
390static struct mv_xor_platform_data kirkwood_xor01_data = {
391 .shared = &kirkwood_xor0_shared,
392 .hw_id = 1,
393 .pool_size = PAGE_SIZE,
394};
395
396static struct platform_device kirkwood_xor01_channel = {
397 .name = MV_XOR_NAME,
398 .id = 1,
399 .num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
400 .resource = kirkwood_xor01_resources,
401 .dev = {
402 .dma_mask = &kirkwood_xor_dmamask,
403 .coherent_dma_mask = DMA_64BIT_MASK,
404 .platform_data = (void *)&kirkwood_xor01_data,
405 },
406};
407
408void __init kirkwood_xor0_init(void)
409{
410 platform_device_register(&kirkwood_xor0_shared);
411
412 /*
413 * two engines can't do memset simultaneously, this limitation
414 * satisfied by removing memset support from one of the engines.
415 */
416 dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
417 dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
418 platform_device_register(&kirkwood_xor00_channel);
419
420 dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
421 dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
422 dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
423 platform_device_register(&kirkwood_xor01_channel);
424}
425
426
427/*****************************************************************************
428 * XOR1
429 ****************************************************************************/
430static struct resource kirkwood_xor1_shared_resources[] = {
431 {
432 .name = "xor 1 low",
433 .start = XOR1_PHYS_BASE,
434 .end = XOR1_PHYS_BASE + 0xff,
435 .flags = IORESOURCE_MEM,
436 }, {
437 .name = "xor 1 high",
438 .start = XOR1_HIGH_PHYS_BASE,
439 .end = XOR1_HIGH_PHYS_BASE + 0xff,
440 .flags = IORESOURCE_MEM,
441 },
442};
443
444static struct platform_device kirkwood_xor1_shared = {
445 .name = MV_XOR_SHARED_NAME,
446 .id = 1,
447 .dev = {
448 .platform_data = &kirkwood_xor_shared_data,
449 },
450 .num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
451 .resource = kirkwood_xor1_shared_resources,
452};
453
454static struct resource kirkwood_xor10_resources[] = {
455 [0] = {
456 .start = IRQ_KIRKWOOD_XOR_10,
457 .end = IRQ_KIRKWOOD_XOR_10,
458 .flags = IORESOURCE_IRQ,
459 },
460};
461
462static struct mv_xor_platform_data kirkwood_xor10_data = {
463 .shared = &kirkwood_xor1_shared,
464 .hw_id = 0,
465 .pool_size = PAGE_SIZE,
466};
467
468static struct platform_device kirkwood_xor10_channel = {
469 .name = MV_XOR_NAME,
470 .id = 2,
471 .num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
472 .resource = kirkwood_xor10_resources,
473 .dev = {
474 .dma_mask = &kirkwood_xor_dmamask,
475 .coherent_dma_mask = DMA_64BIT_MASK,
476 .platform_data = (void *)&kirkwood_xor10_data,
477 },
478};
479
480static struct resource kirkwood_xor11_resources[] = {
481 [0] = {
482 .start = IRQ_KIRKWOOD_XOR_11,
483 .end = IRQ_KIRKWOOD_XOR_11,
484 .flags = IORESOURCE_IRQ,
485 },
486};
487
488static struct mv_xor_platform_data kirkwood_xor11_data = {
489 .shared = &kirkwood_xor1_shared,
490 .hw_id = 1,
491 .pool_size = PAGE_SIZE,
492};
493
494static struct platform_device kirkwood_xor11_channel = {
495 .name = MV_XOR_NAME,
496 .id = 3,
497 .num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
498 .resource = kirkwood_xor11_resources,
499 .dev = {
500 .dma_mask = &kirkwood_xor_dmamask,
501 .coherent_dma_mask = DMA_64BIT_MASK,
502 .platform_data = (void *)&kirkwood_xor11_data,
503 },
504};
505
506void __init kirkwood_xor1_init(void)
507{
508 platform_device_register(&kirkwood_xor1_shared);
509
510 /*
511 * two engines can't do memset simultaneously, this limitation
512 * satisfied by removing memset support from one of the engines.
513 */
514 dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
515 dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
516 platform_device_register(&kirkwood_xor10_channel);
517
518 dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
519 dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
520 dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
521 platform_device_register(&kirkwood_xor11_channel);
522}
523
524
525/*****************************************************************************
287 * Time handling 526 * Time handling
288 ****************************************************************************/ 527 ****************************************************************************/
289static void kirkwood_timer_init(void) 528static void kirkwood_timer_init(void)
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 5dee2f6b40a5..69cd113af03a 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -33,8 +33,11 @@ void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data);
33void kirkwood_pcie_init(void); 33void kirkwood_pcie_init(void);
34void kirkwood_rtc_init(void); 34void kirkwood_rtc_init(void);
35void kirkwood_sata_init(struct mv_sata_platform_data *sata_data); 35void kirkwood_sata_init(struct mv_sata_platform_data *sata_data);
36void kirkwood_spi_init(void);
36void kirkwood_uart0_init(void); 37void kirkwood_uart0_init(void);
37void kirkwood_uart1_init(void); 38void kirkwood_uart1_init(void);
39void kirkwood_xor0_init(void);
40void kirkwood_xor1_init(void);
38 41
39extern struct sys_timer kirkwood_timer; 42extern struct sys_timer kirkwood_timer;
40 43
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index d1336b41f0fb..5c69992295e8 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -88,6 +88,15 @@
88 88
89#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000) 89#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000)
90 90
91#define XOR0_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60800)
92#define XOR0_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60800)
93#define XOR1_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60900)
94#define XOR1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60900)
95#define XOR0_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60A00)
96#define XOR0_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60A00)
97#define XOR1_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60B00)
98#define XOR1_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60B00)
99
91#define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x70000) 100#define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x70000)
92#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000) 101#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000)
93 102
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
index 302bb2cf6669..5790643ffe07 100644
--- a/arch/arm/mach-kirkwood/irq.c
+++ b/arch/arm/mach-kirkwood/irq.c
@@ -12,7 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <asm/plat-orion/irq.h> 15#include <plat/irq.h>
16#include "common.h" 16#include "common.h"
17 17
18void __init kirkwood_init_irq(void) 18void __init kirkwood_init_irq(void)
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index 8282d0ff84bf..2195fa31f6b7 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -12,7 +12,7 @@
12#include <linux/pci.h> 12#include <linux/pci.h>
13#include <linux/mbus.h> 13#include <linux/mbus.h>
14#include <asm/mach/pci.h> 14#include <asm/mach/pci.h>
15#include <asm/plat-orion/pcie.h> 15#include <plat/pcie.h>
16#include "common.h" 16#include "common.h"
17 17
18 18
diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
index 182230a5d198..a3012d445971 100644
--- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
@@ -18,6 +18,9 @@
18#include <linux/timer.h> 18#include <linux/timer.h>
19#include <linux/ata_platform.h> 19#include <linux/ata_platform.h>
20#include <linux/mv643xx_eth.h> 20#include <linux/mv643xx_eth.h>
21#include <linux/spi/flash.h>
22#include <linux/spi/spi.h>
23#include <linux/spi/orion_spi.h>
21#include <asm/mach-types.h> 24#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
23#include <asm/mach/pci.h> 26#include <asm/mach/pci.h>
@@ -34,6 +37,21 @@ static struct mv_sata_platform_data rd88f6192_sata_data = {
34 .n_ports = 2, 37 .n_ports = 2,
35}; 38};
36 39
40static const struct flash_platform_data rd88F6192_spi_slave_data = {
41 .type = "m25p128",
42};
43
44static struct spi_board_info __initdata rd88F6192_spi_slave_info[] = {
45 {
46 .modalias = "m25p80",
47 .platform_data = &rd88F6192_spi_slave_data,
48 .irq = -1,
49 .max_speed_hz = 20000000,
50 .bus_num = 0,
51 .chip_select = 0,
52 },
53};
54
37static void __init rd88f6192_init(void) 55static void __init rd88f6192_init(void)
38{ 56{
39 /* 57 /*
@@ -45,7 +63,12 @@ static void __init rd88f6192_init(void)
45 kirkwood_ge00_init(&rd88f6192_ge00_data); 63 kirkwood_ge00_init(&rd88f6192_ge00_data);
46 kirkwood_rtc_init(); 64 kirkwood_rtc_init();
47 kirkwood_sata_init(&rd88f6192_sata_data); 65 kirkwood_sata_init(&rd88f6192_sata_data);
66 spi_register_board_info(rd88F6192_spi_slave_info,
67 ARRAY_SIZE(rd88F6192_spi_slave_info));
68 kirkwood_spi_init();
48 kirkwood_uart0_init(); 69 kirkwood_uart0_init();
70 kirkwood_xor0_init();
71 kirkwood_xor1_init();
49} 72}
50 73
51static int __init rd88f6192_pci_init(void) 74static int __init rd88f6192_pci_init(void)
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index d8a43018c7d3..d96487a0f18b 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -23,7 +23,7 @@
23#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
24#include <asm/mach/pci.h> 24#include <asm/mach/pci.h>
25#include <mach/kirkwood.h> 25#include <mach/kirkwood.h>
26#include <asm/plat-orion/orion_nand.h> 26#include <plat/orion_nand.h>
27#include "common.h" 27#include "common.h"
28 28
29static struct mtd_partition rd88f6281_nand_parts[] = { 29static struct mtd_partition rd88f6281_nand_parts[] = {
diff --git a/arch/arm/mach-lh7a40x/include/mach/ssp.h b/arch/arm/mach-lh7a40x/include/mach/ssp.h
index 132b1c4d5ce6..509916182e34 100644
--- a/arch/arm/mach-lh7a40x/include/mach/ssp.h
+++ b/arch/arm/mach-lh7a40x/include/mach/ssp.h
@@ -1,5 +1,4 @@
1/* ssp.h 1/* ssp.h
2 $Id$
3 2
4 written by Marc Singer 3 written by Marc Singer
5 6 Dec 2004 4 6 Dec 2004
diff --git a/arch/arm/mach-lh7a40x/lcd-panel.h b/arch/arm/mach-lh7a40x/lcd-panel.h
index df6e38ed425b..a7f5027b2f78 100644
--- a/arch/arm/mach-lh7a40x/lcd-panel.h
+++ b/arch/arm/mach-lh7a40x/lcd-panel.h
@@ -1,5 +1,4 @@
1/* lcd-panel.h 1/* lcd-panel.h
2 $Id$
3 2
4 written by Marc Singer 3 written by Marc Singer
5 18 Jul 2005 4 18 Jul 2005
diff --git a/arch/arm/mach-loki/common.c b/arch/arm/mach-loki/common.c
index e20cdbca1ebe..c0d2d9d12e74 100644
--- a/arch/arm/mach-loki/common.c
+++ b/arch/arm/mach-loki/common.c
@@ -19,8 +19,8 @@
19#include <asm/mach/map.h> 19#include <asm/mach/map.h>
20#include <asm/mach/time.h> 20#include <asm/mach/time.h>
21#include <mach/loki.h> 21#include <mach/loki.h>
22#include <asm/plat-orion/orion_nand.h> 22#include <plat/orion_nand.h>
23#include <asm/plat-orion/time.h> 23#include <plat/time.h>
24#include "common.h" 24#include "common.h"
25 25
26/***************************************************************************** 26/*****************************************************************************
diff --git a/arch/arm/mach-loki/irq.c b/arch/arm/mach-loki/irq.c
index d839af91fe03..5a487930cb2f 100644
--- a/arch/arm/mach-loki/irq.c
+++ b/arch/arm/mach-loki/irq.c
@@ -12,7 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <asm/io.h> 14#include <asm/io.h>
15#include <asm/plat-orion/irq.h> 15#include <plat/irq.h>
16#include "common.h" 16#include "common.h"
17 17
18void __init loki_init_irq(void) 18void __init loki_init_irq(void)
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index e633f9cb239f..953a26c469cb 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -18,10 +18,10 @@
18#include <asm/mach/map.h> 18#include <asm/mach/map.h>
19#include <asm/mach/time.h> 19#include <asm/mach/time.h>
20#include <mach/mv78xx0.h> 20#include <mach/mv78xx0.h>
21#include <asm/plat-orion/cache-feroceon-l2.h> 21#include <plat/cache-feroceon-l2.h>
22#include <asm/plat-orion/ehci-orion.h> 22#include <plat/ehci-orion.h>
23#include <asm/plat-orion/orion_nand.h> 23#include <plat/orion_nand.h>
24#include <asm/plat-orion/time.h> 24#include <plat/time.h>
25#include "common.h" 25#include "common.h"
26 26
27 27
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 3198abf54c90..28248d37b999 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -12,7 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/pci.h> 13#include <linux/pci.h>
14#include <mach/mv78xx0.h> 14#include <mach/mv78xx0.h>
15#include <asm/plat-orion/irq.h> 15#include <plat/irq.h>
16#include "common.h" 16#include "common.h"
17 17
18void __init mv78xx0_init_irq(void) 18void __init mv78xx0_init_irq(void)
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index b78e1443159f..430ea84d587d 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -12,7 +12,7 @@
12#include <linux/pci.h> 12#include <linux/pci.h>
13#include <linux/mbus.h> 13#include <linux/mbus.h>
14#include <asm/mach/pci.h> 14#include <asm/mach/pci.h>
15#include <asm/plat-orion/pcie.h> 15#include <plat/pcie.h>
16#include "common.h" 16#include "common.h"
17 17
18struct pcie_port { 18struct pcie_port {
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 168eeacaa4c0..7b11e552bc5a 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -26,9 +26,10 @@
26#include <asm/mach/time.h> 26#include <asm/mach/time.h>
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/orion5x.h> 28#include <mach/orion5x.h>
29#include <asm/plat-orion/ehci-orion.h> 29#include <plat/ehci-orion.h>
30#include <asm/plat-orion/orion_nand.h> 30#include <plat/mv_xor.h>
31#include <asm/plat-orion/time.h> 31#include <plat/orion_nand.h>
32#include <plat/time.h>
32#include "common.h" 33#include "common.h"
33 34
34/***************************************************************************** 35/*****************************************************************************
@@ -355,6 +356,103 @@ void __init orion5x_uart1_init(void)
355 356
356 357
357/***************************************************************************** 358/*****************************************************************************
359 * XOR engine
360 ****************************************************************************/
361static struct resource orion5x_xor_shared_resources[] = {
362 {
363 .name = "xor low",
364 .start = ORION5X_XOR_PHYS_BASE,
365 .end = ORION5X_XOR_PHYS_BASE + 0xff,
366 .flags = IORESOURCE_MEM,
367 }, {
368 .name = "xor high",
369 .start = ORION5X_XOR_PHYS_BASE + 0x200,
370 .end = ORION5X_XOR_PHYS_BASE + 0x2ff,
371 .flags = IORESOURCE_MEM,
372 },
373};
374
375static struct platform_device orion5x_xor_shared = {
376 .name = MV_XOR_SHARED_NAME,
377 .id = 0,
378 .num_resources = ARRAY_SIZE(orion5x_xor_shared_resources),
379 .resource = orion5x_xor_shared_resources,
380};
381
382static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
383
384static struct resource orion5x_xor0_resources[] = {
385 [0] = {
386 .start = IRQ_ORION5X_XOR0,
387 .end = IRQ_ORION5X_XOR0,
388 .flags = IORESOURCE_IRQ,
389 },
390};
391
392static struct mv_xor_platform_data orion5x_xor0_data = {
393 .shared = &orion5x_xor_shared,
394 .hw_id = 0,
395 .pool_size = PAGE_SIZE,
396};
397
398static struct platform_device orion5x_xor0_channel = {
399 .name = MV_XOR_NAME,
400 .id = 0,
401 .num_resources = ARRAY_SIZE(orion5x_xor0_resources),
402 .resource = orion5x_xor0_resources,
403 .dev = {
404 .dma_mask = &orion5x_xor_dmamask,
405 .coherent_dma_mask = DMA_64BIT_MASK,
406 .platform_data = (void *)&orion5x_xor0_data,
407 },
408};
409
410static struct resource orion5x_xor1_resources[] = {
411 [0] = {
412 .start = IRQ_ORION5X_XOR1,
413 .end = IRQ_ORION5X_XOR1,
414 .flags = IORESOURCE_IRQ,
415 },
416};
417
418static struct mv_xor_platform_data orion5x_xor1_data = {
419 .shared = &orion5x_xor_shared,
420 .hw_id = 1,
421 .pool_size = PAGE_SIZE,
422};
423
424static struct platform_device orion5x_xor1_channel = {
425 .name = MV_XOR_NAME,
426 .id = 1,
427 .num_resources = ARRAY_SIZE(orion5x_xor1_resources),
428 .resource = orion5x_xor1_resources,
429 .dev = {
430 .dma_mask = &orion5x_xor_dmamask,
431 .coherent_dma_mask = DMA_64BIT_MASK,
432 .platform_data = (void *)&orion5x_xor1_data,
433 },
434};
435
436void __init orion5x_xor_init(void)
437{
438 platform_device_register(&orion5x_xor_shared);
439
440 /*
441 * two engines can't do memset simultaneously, this limitation
442 * satisfied by removing memset support from one of the engines.
443 */
444 dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
445 dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
446 platform_device_register(&orion5x_xor0_channel);
447
448 dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
449 dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
450 dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
451 platform_device_register(&orion5x_xor1_channel);
452}
453
454
455/*****************************************************************************
358 * Time handling 456 * Time handling
359 ****************************************************************************/ 457 ****************************************************************************/
360static void orion5x_timer_init(void) 458static void orion5x_timer_init(void)
@@ -382,6 +480,8 @@ static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
382 *dev_name = "MV88F5281-D2"; 480 *dev_name = "MV88F5281-D2";
383 } else if (*rev == MV88F5281_REV_D1) { 481 } else if (*rev == MV88F5281_REV_D1) {
384 *dev_name = "MV88F5281-D1"; 482 *dev_name = "MV88F5281-D1";
483 } else if (*rev == MV88F5281_REV_D0) {
484 *dev_name = "MV88F5281-D0";
385 } else { 485 } else {
386 *dev_name = "MV88F5281-Rev-Unsupported"; 486 *dev_name = "MV88F5281-Rev-Unsupported";
387 } 487 }
@@ -416,6 +516,15 @@ void __init orion5x_init(void)
416 * Setup Orion address map 516 * Setup Orion address map
417 */ 517 */
418 orion5x_setup_cpu_mbus_bridge(); 518 orion5x_setup_cpu_mbus_bridge();
519
520 /*
521 * Don't issue "Wait for Interrupt" instruction if we are
522 * running on D0 5281 silicon.
523 */
524 if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
525 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
526 disable_hlt();
527 }
419} 528}
420 529
421/* 530/*
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index f72cf0e77544..e75bd7004b94 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -32,6 +32,7 @@ void orion5x_i2c_init(void);
32void orion5x_sata_init(struct mv_sata_platform_data *sata_data); 32void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
33void orion5x_uart0_init(void); 33void orion5x_uart0_init(void);
34void orion5x_uart1_init(void); 34void orion5x_uart1_init(void);
35void orion5x_xor_init(void);
35 36
36/* 37/*
37 * PCIe/PCI functions. 38 * PCIe/PCI functions.
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index 48ce6d0e0020..ff13e9060b18 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -25,7 +25,7 @@
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
26#include <asm/mach/pci.h> 26#include <asm/mach/pci.h>
27#include <mach/orion5x.h> 27#include <mach/orion5x.h>
28#include <asm/plat-orion/orion_nand.h> 28#include <plat/orion_nand.h>
29#include "common.h" 29#include "common.h"
30#include "mpp.h" 30#include "mpp.h"
31 31
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index f52a7d65bec2..61eb74a88862 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -73,6 +73,7 @@
73#define MV88F5182_REV_A2 2 73#define MV88F5182_REV_A2 2
74/* Orion-2 (88F5281) */ 74/* Orion-2 (88F5281) */
75#define MV88F5281_DEV_ID 0x5281 75#define MV88F5281_DEV_ID 0x5281
76#define MV88F5281_REV_D0 4
76#define MV88F5281_REV_D1 5 77#define MV88F5281_REV_D1 5
77#define MV88F5281_REV_D2 6 78#define MV88F5281_REV_D2 6
78 79
@@ -105,6 +106,10 @@
105#define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x50000) 106#define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x50000)
106#define ORION5X_USB0_REG(x) (ORION5X_USB0_VIRT_BASE | (x)) 107#define ORION5X_USB0_REG(x) (ORION5X_USB0_VIRT_BASE | (x))
107 108
109#define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x60900)
110#define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x60900)
111#define ORION5X_XOR_REG(x) (ORION5X_XOR_VIRT_BASE | (x))
112
108#define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x70000) 113#define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x70000)
109#define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x70000) 114#define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x70000)
110#define ORION5X_ETH_REG(x) (ORION5X_ETH_VIRT_BASE | (x)) 115#define ORION5X_ETH_REG(x) (ORION5X_ETH_VIRT_BASE | (x))
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index cc2a017fd2a9..2545ff9e5830 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -16,7 +16,7 @@
16#include <asm/gpio.h> 16#include <asm/gpio.h>
17#include <asm/io.h> 17#include <asm/io.h>
18#include <mach/orion5x.h> 18#include <mach/orion5x.h>
19#include <asm/plat-orion/irq.h> 19#include <plat/irq.h>
20#include "common.h" 20#include "common.h"
21 21
22/***************************************************************************** 22/*****************************************************************************
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index 0caaaac74bc1..cb72f1bb9cb7 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -25,7 +25,7 @@
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
26#include <asm/mach/pci.h> 26#include <asm/mach/pci.h>
27#include <mach/orion5x.h> 27#include <mach/orion5x.h>
28#include <asm/plat-orion/orion_nand.h> 28#include <plat/orion_nand.h>
29#include "common.h" 29#include "common.h"
30#include "mpp.h" 30#include "mpp.h"
31 31
@@ -356,6 +356,7 @@ static void __init kurobox_pro_init(void)
356 orion5x_sata_init(&kurobox_pro_sata_data); 356 orion5x_sata_init(&kurobox_pro_sata_data);
357 orion5x_uart0_init(); 357 orion5x_uart0_init();
358 orion5x_uart1_init(); 358 orion5x_uart1_init();
359 orion5x_xor_init();
359 360
360 orion5x_setup_dev_boot_win(KUROBOX_PRO_NOR_BOOT_BASE, 361 orion5x_setup_dev_boot_win(KUROBOX_PRO_NOR_BOOT_BASE,
361 KUROBOX_PRO_NOR_BOOT_SIZE); 362 KUROBOX_PRO_NOR_BOOT_SIZE);
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
index 4403cc963d66..53ff1893b883 100644
--- a/arch/arm/mach-orion5x/mss2-setup.c
+++ b/arch/arm/mach-orion5x/mss2-setup.c
@@ -239,6 +239,7 @@ static void __init mss2_init(void)
239 orion5x_i2c_init(); 239 orion5x_i2c_init();
240 orion5x_sata_init(&mss2_sata_data); 240 orion5x_sata_init(&mss2_sata_data);
241 orion5x_uart0_init(); 241 orion5x_uart0_init();
242 orion5x_xor_init();
242 243
243 orion5x_setup_dev_boot_win(MSS2_NOR_BOOT_BASE, MSS2_NOR_BOOT_SIZE); 244 orion5x_setup_dev_boot_win(MSS2_NOR_BOOT_BASE, MSS2_NOR_BOOT_SIZE);
244 platform_device_register(&mss2_nor_flash); 245 platform_device_register(&mss2_nor_flash);
diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c
index 67b2c0df615f..978d4d599396 100644
--- a/arch/arm/mach-orion5x/mv2120-setup.c
+++ b/arch/arm/mach-orion5x/mv2120-setup.c
@@ -203,6 +203,7 @@ static void __init mv2120_init(void)
203 orion5x_i2c_init(); 203 orion5x_i2c_init();
204 orion5x_sata_init(&mv2120_sata_data); 204 orion5x_sata_init(&mv2120_sata_data);
205 orion5x_uart0_init(); 205 orion5x_uart0_init();
206 orion5x_xor_init();
206 207
207 orion5x_setup_dev_boot_win(MV2120_NOR_BOOT_BASE, MV2120_NOR_BOOT_SIZE); 208 orion5x_setup_dev_boot_win(MV2120_NOR_BOOT_BASE, MV2120_NOR_BOOT_SIZE);
208 platform_device_register(&mv2120_nor_flash); 209 platform_device_register(&mv2120_nor_flash);
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 256a4f680935..fbceecc4b7ec 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -14,7 +14,7 @@
14#include <linux/pci.h> 14#include <linux/pci.h>
15#include <linux/mbus.h> 15#include <linux/mbus.h>
16#include <asm/mach/pci.h> 16#include <asm/mach/pci.h>
17#include <asm/plat-orion/pcie.h> 17#include <plat/pcie.h>
18#include "common.h" 18#include "common.h"
19 19
20/***************************************************************************** 20/*****************************************************************************
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index 8771cb76f0dc..4c3bcd76ac85 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -292,6 +292,7 @@ static void __init rd88f5182_init(void)
292 orion5x_i2c_init(); 292 orion5x_i2c_init();
293 orion5x_sata_init(&rd88f5182_sata_data); 293 orion5x_sata_init(&rd88f5182_sata_data);
294 orion5x_uart0_init(); 294 orion5x_uart0_init();
295 orion5x_xor_init();
295 296
296 orion5x_setup_dev_boot_win(RD88F5182_NOR_BOOT_BASE, 297 orion5x_setup_dev_boot_win(RD88F5182_NOR_BOOT_BASE,
297 RD88F5182_NOR_BOOT_SIZE); 298 RD88F5182_NOR_BOOT_SIZE);
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 809132de31d2..dd657163cd8d 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -207,12 +207,12 @@ static struct i2c_board_info __initdata qnap_ts209_i2c_rtc = {
207 207
208static struct gpio_keys_button qnap_ts209_buttons[] = { 208static struct gpio_keys_button qnap_ts209_buttons[] = {
209 { 209 {
210 .code = KEY_RESTART, 210 .code = KEY_COPY,
211 .gpio = QNAP_TS209_GPIO_KEY_MEDIA, 211 .gpio = QNAP_TS209_GPIO_KEY_MEDIA,
212 .desc = "USB Copy Button", 212 .desc = "USB Copy Button",
213 .active_low = 1, 213 .active_low = 1,
214 }, { 214 }, {
215 .code = KEY_POWER, 215 .code = KEY_RESTART,
216 .gpio = QNAP_TS209_GPIO_KEY_RESET, 216 .gpio = QNAP_TS209_GPIO_KEY_RESET,
217 .desc = "Reset Button", 217 .desc = "Reset Button",
218 .active_low = 1, 218 .active_low = 1,
@@ -296,6 +296,7 @@ static void __init qnap_ts209_init(void)
296 orion5x_i2c_init(); 296 orion5x_i2c_init();
297 orion5x_sata_init(&qnap_ts209_sata_data); 297 orion5x_sata_init(&qnap_ts209_sata_data);
298 orion5x_uart0_init(); 298 orion5x_uart0_init();
299 orion5x_xor_init();
299 300
300 orion5x_setup_dev_boot_win(QNAP_TS209_NOR_BOOT_BASE, 301 orion5x_setup_dev_boot_win(QNAP_TS209_NOR_BOOT_BASE,
301 QNAP_TS209_NOR_BOOT_SIZE); 302 QNAP_TS209_NOR_BOOT_SIZE);
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index 6053e76ac967..b27d2b762081 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -3,6 +3,9 @@
3 * 3 *
4 * Maintainer: Sylver Bruneau <sylver.bruneau@gmail.com> 4 * Maintainer: Sylver Bruneau <sylver.bruneau@gmail.com>
5 * 5 *
6 * Copyright (C) 2008 Sylver Bruneau <sylver.bruneau@gmail.com>
7 * Copyright (C) 2008 Martin Michlmayr <tbm@cyrius.com>
8 *
6 * This program is free software; you can redistribute it and/or 9 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License 10 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 11 * as published by the Free Software Foundation; either version
@@ -16,6 +19,7 @@
16#include <linux/irq.h> 19#include <linux/irq.h>
17#include <linux/mtd/physmap.h> 20#include <linux/mtd/physmap.h>
18#include <linux/mv643xx_eth.h> 21#include <linux/mv643xx_eth.h>
22#include <linux/leds.h>
19#include <linux/gpio_keys.h> 23#include <linux/gpio_keys.h>
20#include <linux/input.h> 24#include <linux/input.h>
21#include <linux/i2c.h> 25#include <linux/i2c.h>
@@ -162,16 +166,59 @@ static struct i2c_board_info __initdata qnap_ts409_i2c_rtc = {
162 I2C_BOARD_INFO("s35390a", 0x30), 166 I2C_BOARD_INFO("s35390a", 0x30),
163}; 167};
164 168
169/*****************************************************************************
170 * LEDs attached to GPIO
171 ****************************************************************************/
172
173static struct gpio_led ts409_led_pins[] = {
174 {
175 .name = "ts409:red:sata1",
176 .gpio = 4,
177 .active_low = 1,
178 }, {
179 .name = "ts409:red:sata2",
180 .gpio = 5,
181 .active_low = 1,
182 }, {
183 .name = "ts409:red:sata3",
184 .gpio = 6,
185 .active_low = 1,
186 }, {
187 .name = "ts409:red:sata4",
188 .gpio = 7,
189 .active_low = 1,
190 },
191};
192
193static struct gpio_led_platform_data ts409_led_data = {
194 .leds = ts409_led_pins,
195 .num_leds = ARRAY_SIZE(ts409_led_pins),
196};
197
198static struct platform_device ts409_leds = {
199 .name = "leds-gpio",
200 .id = -1,
201 .dev = {
202 .platform_data = &ts409_led_data,
203 },
204};
205
165/**************************************************************************** 206/****************************************************************************
166 * GPIO Attached Keys 207 * GPIO Attached Keys
167 * Power button is attached to the PIC microcontroller 208 * Power button is attached to the PIC microcontroller
168 ****************************************************************************/ 209 ****************************************************************************/
169 210
211#define QNAP_TS409_GPIO_KEY_RESET 14
170#define QNAP_TS409_GPIO_KEY_MEDIA 15 212#define QNAP_TS409_GPIO_KEY_MEDIA 15
171 213
172static struct gpio_keys_button qnap_ts409_buttons[] = { 214static struct gpio_keys_button qnap_ts409_buttons[] = {
173 { 215 {
174 .code = KEY_RESTART, 216 .code = KEY_RESTART,
217 .gpio = QNAP_TS409_GPIO_KEY_RESET,
218 .desc = "Reset Button",
219 .active_low = 1,
220 }, {
221 .code = KEY_COPY,
175 .gpio = QNAP_TS409_GPIO_KEY_MEDIA, 222 .gpio = QNAP_TS409_GPIO_KEY_MEDIA,
176 .desc = "USB Copy Button", 223 .desc = "USB Copy Button",
177 .active_low = 1, 224 .active_low = 1,
@@ -255,6 +302,7 @@ static void __init qnap_ts409_init(void)
255 if (qnap_ts409_i2c_rtc.irq == 0) 302 if (qnap_ts409_i2c_rtc.irq == 0)
256 pr_warning("qnap_ts409_init: failed to get RTC IRQ\n"); 303 pr_warning("qnap_ts409_init: failed to get RTC IRQ\n");
257 i2c_register_board_info(0, &qnap_ts409_i2c_rtc, 1); 304 i2c_register_board_info(0, &qnap_ts409_i2c_rtc, 1);
305 platform_device_register(&ts409_leds);
258 306
259 /* register tsx09 specific power-off method */ 307 /* register tsx09 specific power-off method */
260 pm_power_off = qnap_tsx09_power_off; 308 pm_power_off = qnap_tsx09_power_off;
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index 014916a28fdc..ae0a5dccd2a1 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -256,6 +256,7 @@ static void __init ts78xx_init(void)
256 orion5x_sata_init(&ts78xx_sata_data); 256 orion5x_sata_init(&ts78xx_sata_data);
257 orion5x_uart0_init(); 257 orion5x_uart0_init();
258 orion5x_uart1_init(); 258 orion5x_uart1_init();
259 orion5x_xor_init();
259 260
260 orion5x_setup_dev_boot_win(TS78XX_NOR_BOOT_BASE, 261 orion5x_setup_dev_boot_win(TS78XX_NOR_BOOT_BASE,
261 TS78XX_NOR_BOOT_SIZE); 262 TS78XX_NOR_BOOT_SIZE);
diff --git a/arch/arm/mach-pxa/include/mach/mtd-xip.h b/arch/arm/mach-pxa/include/mach/mtd-xip.h
index 351f32f13ce4..4d452fcb1508 100644
--- a/arch/arm/mach-pxa/include/mach/mtd-xip.h
+++ b/arch/arm/mach-pxa/include/mach/mtd-xip.h
@@ -10,8 +10,6 @@
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 *
14 * $Id: xip.h,v 1.2 2004/12/01 15:49:10 nico Exp $
15 */ 13 */
16 14
17#ifndef __ARCH_PXA_MTD_XIP_H__ 15#ifndef __ARCH_PXA_MTD_XIP_H__
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
index 8956afe8195e..67debc47e8c6 100644
--- a/arch/arm/mach-pxa/include/mach/poodle.h
+++ b/arch/arm/mach-pxa/include/mach/poodle.h
@@ -70,6 +70,12 @@
70#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) 70#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
71#define POODLE_SCOOP_IO_OUT ( 0 ) 71#define POODLE_SCOOP_IO_OUT ( 0 )
72 72
73#define POODLE_LOCOMO_GPIO_AMP_ON LOCOMO_GPIO(8)
74#define POODLE_LOCOMO_GPIO_MUTE_L LOCOMO_GPIO(10)
75#define POODLE_LOCOMO_GPIO_MUTE_R LOCOMO_GPIO(11)
76#define POODLE_LOCOMO_GPIO_232VCC_ON LOCOMO_GPIO(12)
77#define POODLE_LOCOMO_GPIO_JK_B LOCOMO_GPIO(13)
78
73extern struct platform_device poodle_locomo_device; 79extern struct platform_device poodle_locomo_device;
74 80
75#endif /* __ASM_ARCH_POODLE_H */ 81#endif /* __ASM_ARCH_POODLE_H */
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
index 65447549616f..8e591118371e 100644
--- a/arch/arm/mach-pxa/include/mach/pxafb.h
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -28,6 +28,7 @@
28 * bits 10-17 : for AC Bias Pin Frequency 28 * bits 10-17 : for AC Bias Pin Frequency
29 * bit 18 : for output enable polarity 29 * bit 18 : for output enable polarity
30 * bit 19 : for pixel clock edge 30 * bit 19 : for pixel clock edge
31 * bit 20 : for output pixel format when base is RGBT16
31 */ 32 */
32#define LCD_CONN_TYPE(_x) ((_x) & 0x0f) 33#define LCD_CONN_TYPE(_x) ((_x) & 0x0f)
33#define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f) 34#define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f)
@@ -53,10 +54,11 @@
53#define LCD_SMART_PANEL_18BPP ((18 << 4) | LCD_TYPE_SMART_PANEL) 54#define LCD_SMART_PANEL_18BPP ((18 << 4) | LCD_TYPE_SMART_PANEL)
54 55
55#define LCD_AC_BIAS_FREQ(x) (((x) & 0xff) << 10) 56#define LCD_AC_BIAS_FREQ(x) (((x) & 0xff) << 10)
56#define LCD_BIAS_ACTIVE_HIGH (0 << 17) 57#define LCD_BIAS_ACTIVE_HIGH (0 << 18)
57#define LCD_BIAS_ACTIVE_LOW (1 << 17) 58#define LCD_BIAS_ACTIVE_LOW (1 << 18)
58#define LCD_PCLK_EDGE_RISE (0 << 18) 59#define LCD_PCLK_EDGE_RISE (0 << 19)
59#define LCD_PCLK_EDGE_FALL (1 << 18) 60#define LCD_PCLK_EDGE_FALL (1 << 19)
61#define LCD_ALTERNATE_MAPPING (1 << 20)
60 62
61/* 63/*
62 * This structure describes the machine which we are running on. 64 * This structure describes the machine which we are running on.
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-clock.h
index d583688458a4..b3f90aa78076 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-clock.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-clock.h
@@ -11,7 +11,7 @@
11*/ 11*/
12 12
13#ifndef __ASM_ARM_REGS_CLOCK 13#ifndef __ASM_ARM_REGS_CLOCK
14#define __ASM_ARM_REGS_CLOCK "$Id: clock.h,v 1.4 2003/04/30 14:50:51 ben Exp $" 14#define __ASM_ARM_REGS_CLOCK
15 15
16#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) 16#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR)
17 17
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
index 30bec027f5fa..528080ceac44 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
@@ -12,7 +12,7 @@
12 12
13 13
14#ifndef __ASM_ARCH_REGS_GPIO_H 14#ifndef __ASM_ARCH_REGS_GPIO_H
15#define __ASM_ARCH_REGS_GPIO_H "$Id: gpio.h,v 1.5 2003/05/19 12:51:08 ben Exp $" 15#define __ASM_ARCH_REGS_GPIO_H
16 16
17#define S3C2410_GPIONO(bank,offset) ((bank) + (offset)) 17#define S3C2410_GPIONO(bank,offset) ((bank) + (offset))
18 18
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-irq.h b/arch/arm/mach-s3c2410/include/mach/regs-irq.h
index b057c06d167a..de86ee8812bd 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-irq.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-irq.h
@@ -10,7 +10,7 @@
10 10
11 11
12#ifndef ___ASM_ARCH_REGS_IRQ_H 12#ifndef ___ASM_ARCH_REGS_IRQ_H
13#define ___ASM_ARCH_REGS_IRQ_H "$Id: irq.h,v 1.3 2003/03/25 21:29:06 ben Exp $" 13#define ___ASM_ARCH_REGS_IRQ_H
14 14
15/* interrupt controller */ 15/* interrupt controller */
16 16
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-lcd.h b/arch/arm/mach-s3c2410/include/mach/regs-lcd.h
index 893b8742f954..ee8f040aff5f 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-lcd.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-lcd.h
@@ -10,7 +10,7 @@
10 10
11 11
12#ifndef ___ASM_ARCH_REGS_LCD_H 12#ifndef ___ASM_ARCH_REGS_LCD_H
13#define ___ASM_ARCH_REGS_LCD_H "$Id: lcd.h,v 1.3 2003/06/26 13:25:06 ben Exp $" 13#define ___ASM_ARCH_REGS_LCD_H
14 14
15#define S3C2410_LCDREG(x) (x) 15#define S3C2410_LCDREG(x) (x)
16 16
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-mem.h b/arch/arm/mach-s3c2410/include/mach/regs-mem.h
index f9926abd5cde..57759804e2fa 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-mem.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-mem.h
@@ -11,7 +11,7 @@
11*/ 11*/
12 12
13#ifndef __ASM_ARM_MEMREGS_H 13#ifndef __ASM_ARM_MEMREGS_H
14#define __ASM_ARM_MEMREGS_H "$Id: regs.h,v 1.8 2003/05/01 15:55:41 ben Exp $" 14#define __ASM_ARM_MEMREGS_H
15 15
16#ifndef S3C2410_MEMREG 16#ifndef S3C2410_MEMREG
17#define S3C2410_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) 17#define S3C2410_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x))
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index fb1e78e28e50..24c6334fac89 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -562,7 +562,7 @@ static struct platform_device *bast_devices[] __initdata = {
562 &bast_sio, 562 &bast_sio,
563}; 563};
564 564
565static struct clk *bast_clocks[] = { 565static struct clk *bast_clocks[] __initdata = {
566 &s3c24xx_dclk0, 566 &s3c24xx_dclk0,
567 &s3c24xx_dclk1, 567 &s3c24xx_dclk1,
568 &s3c24xx_clkout0, 568 &s3c24xx_clkout0,
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index c9040080727e..b88939d72282 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -5,7 +5,6 @@
5 * Copyright (C) 2004 by FS Forth-Systeme GmbH 5 * Copyright (C) 2004 by FS Forth-Systeme GmbH
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * $Id: mach-smdk2410.c,v 1.1 2004/05/11 14:15:38 mpietrek Exp $
9 * @Author: Jonas Dietsche 8 * @Author: Jonas Dietsche
10 * 9 *
11 * This program is free software; you can redistribute it and/or 10 * This program is free software; you can redistribute it and/or
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 12cbca68f57d..fbc0213d5485 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -344,7 +344,7 @@ static struct platform_device *vr1000_devices[] __initdata = {
344 &vr1000_led3, 344 &vr1000_led3,
345}; 345};
346 346
347static struct clk *vr1000_clocks[] = { 347static struct clk *vr1000_clocks[] __initdata = {
348 &s3c24xx_dclk0, 348 &s3c24xx_dclk0,
349 &s3c24xx_dclk1, 349 &s3c24xx_dclk1,
350 &s3c24xx_clkout0, 350 &s3c24xx_clkout0,
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index 30f613a79bfe..4c061d29463c 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -26,9 +26,6 @@
26 26
27#include <linux/spi/spi.h> 27#include <linux/spi/spi.h>
28 28
29#include <linux/mtd/mtd.h>
30#include <linux/mtd/partitions.h>
31
32#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
33#include <asm/mach/map.h> 30#include <asm/mach/map.h>
34#include <asm/mach/irq.h> 31#include <asm/mach/irq.h>
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 265c77dec9d7..441f4bc09472 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -414,7 +414,7 @@ static struct platform_device *anubis_devices[] __initdata = {
414 &anubis_device_sm501, 414 &anubis_device_sm501,
415}; 415};
416 416
417static struct clk *anubis_clocks[] = { 417static struct clk *anubis_clocks[] __initdata = {
418 &s3c24xx_dclk0, 418 &s3c24xx_dclk0,
419 &s3c24xx_dclk1, 419 &s3c24xx_dclk1,
420 &s3c24xx_clkout0, 420 &s3c24xx_clkout0,
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index d2ee0cd148c6..8b83f93b6102 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -341,7 +341,7 @@ static struct platform_device *osiris_devices[] __initdata = {
341 &osiris_pcmcia, 341 &osiris_pcmcia,
342}; 342};
343 343
344static struct clk *osiris_clocks[] = { 344static struct clk *osiris_clocks[] __initdata = {
345 &s3c24xx_dclk0, 345 &s3c24xx_dclk0,
346 &s3c24xx_dclk1, 346 &s3c24xx_dclk1,
347 &s3c24xx_clkout0, 347 &s3c24xx_clkout0,
diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c
index 39d38c801736..029dbfbbafcf 100644
--- a/arch/arm/mach-sa1100/cpu-sa1110.c
+++ b/arch/arm/mach-sa1100/cpu-sa1110.c
@@ -3,8 +3,6 @@
3 * 3 *
4 * Copyright (C) 2001 Russell King 4 * Copyright (C) 2001 Russell King
5 * 5 *
6 * $Id: cpu-sa1110.c,v 1.9 2002/07/06 16:53:18 rmk Exp $
7 *
8 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
diff --git a/arch/arm/mach-sa1100/include/mach/mtd-xip.h b/arch/arm/mach-sa1100/include/mach/mtd-xip.h
index 80cfdac2b944..eaa09e86ad16 100644
--- a/arch/arm/mach-sa1100/include/mach/mtd-xip.h
+++ b/arch/arm/mach-sa1100/include/mach/mtd-xip.h
@@ -10,8 +10,6 @@
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 *
14 * $Id: xip.h,v 1.2 2004/12/01 15:49:10 nico Exp $
15 */ 13 */
16 14
17#ifndef __ARCH_SA1100_MTD_XIP_H__ 15#ifndef __ARCH_SA1100_MTD_XIP_H__
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 20eec4ba173f..7b5a25d81576 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -14,7 +14,7 @@
14 14
15#include <linux/init.h> 15#include <linux/init.h>
16#include <asm/cacheflush.h> 16#include <asm/cacheflush.h>
17#include <asm/plat-orion/cache-feroceon-l2.h> 17#include <plat/cache-feroceon-l2.h>
18 18
19 19
20/* 20/*
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 2d6d682c206a..25d9a11eb617 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -568,6 +568,55 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
568 create_mapping(io_desc + i); 568 create_mapping(io_desc + i);
569} 569}
570 570
571static int __init check_membank_valid(struct membank *mb)
572{
573 /*
574 * Check whether this memory region has non-zero size.
575 */
576 if (mb->size == 0)
577 return 0;
578
579 /*
580 * Check whether this memory region would entirely overlap
581 * the vmalloc area.
582 */
583 if (phys_to_virt(mb->start) >= VMALLOC_MIN) {
584 printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx "
585 "(vmalloc region overlap).\n",
586 mb->start, mb->start + mb->size - 1);
587 return 0;
588 }
589
590 /*
591 * Check whether this memory region would partially overlap
592 * the vmalloc area.
593 */
594 if (phys_to_virt(mb->start + mb->size) < phys_to_virt(mb->start) ||
595 phys_to_virt(mb->start + mb->size) > VMALLOC_MIN) {
596 unsigned long newsize = VMALLOC_MIN - phys_to_virt(mb->start);
597
598 printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx "
599 "to -%.8lx (vmalloc region overlap).\n",
600 mb->start, mb->start + mb->size - 1,
601 mb->start + newsize - 1);
602 mb->size = newsize;
603 }
604
605 return 1;
606}
607
608static void __init sanity_check_meminfo(struct meminfo *mi)
609{
610 int i;
611 int j;
612
613 for (i = 0, j = 0; i < mi->nr_banks; i++) {
614 if (check_membank_valid(&mi->bank[i]))
615 mi->bank[j++] = mi->bank[i];
616 }
617 mi->nr_banks = j;
618}
619
571static inline void prepare_page_table(struct meminfo *mi) 620static inline void prepare_page_table(struct meminfo *mi)
572{ 621{
573 unsigned long addr; 622 unsigned long addr;
@@ -753,6 +802,7 @@ void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
753 void *zero_page; 802 void *zero_page;
754 803
755 build_mem_type_table(); 804 build_mem_type_table();
805 sanity_check_meminfo(mi);
756 prepare_page_table(mi); 806 prepare_page_table(mi);
757 bootmem_init(mi); 807 bootmem_init(mi);
758 devicemaps_init(mdesc); 808 devicemaps_init(mdesc);
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index 1a3d63df8e90..551244d5ca19 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -15,6 +15,7 @@
15#include <asm/pgtable-hwdef.h> 15#include <asm/pgtable-hwdef.h>
16#include <asm/pgtable.h> 16#include <asm/pgtable.h>
17#include <asm/ptrace.h> 17#include <asm/ptrace.h>
18#include "proc-macros.S"
18 19
19/* ARM940T has a 4KB DCache comprising 256 lines of 4 words */ 20/* ARM940T has a 4KB DCache comprising 256 lines of 4 words */
20#define CACHE_DLINESIZE 16 21#define CACHE_DLINESIZE 16
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index 82d579ac9b98..6168c6160dee 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -17,6 +17,7 @@
17#include <asm/pgtable-hwdef.h> 17#include <asm/pgtable-hwdef.h>
18#include <asm/pgtable.h> 18#include <asm/pgtable.h>
19#include <asm/ptrace.h> 19#include <asm/ptrace.h>
20#include "proc-macros.S"
20 21
21/* 22/*
22 * ARM946E-S is synthesizable to have 0KB to 1MB sized D-Cache, 23 * ARM946E-S is synthesizable to have 0KB to 1MB sized D-Cache,
diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h
index 037486c5f4a4..a325caf80d04 100644
--- a/arch/arm/plat-omap/include/mach/memory.h
+++ b/arch/arm/plat-omap/include/mach/memory.h
@@ -76,13 +76,14 @@
76 (dma_addr_t)virt_to_lbus(page_address(page)) : \ 76 (dma_addr_t)virt_to_lbus(page_address(page)) : \
77 (dma_addr_t)__virt_to_bus(page_address(page));}) 77 (dma_addr_t)__virt_to_bus(page_address(page));})
78 78
79#define __arch_dma_to_virt(dev, addr) ({is_lbus_device(dev) ? \ 79#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \
80 lbus_to_virt(addr) : \ 80 lbus_to_virt(addr) : \
81 __bus_to_virt(addr);}) 81 __bus_to_virt(addr)); })
82 82
83#define __arch_virt_to_dma(dev, addr) ({is_lbus_device(dev) ? \ 83#define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \
84 virt_to_lbus(addr) : \ 84 (dma_addr_t) (is_lbus_device(dev) ? \
85 __virt_to_bus(addr);}) 85 virt_to_lbus(__addr) : \
86 __virt_to_bus(__addr)); })
86 87
87#endif /* CONFIG_ARCH_OMAP15XX */ 88#endif /* CONFIG_ARCH_OMAP15XX */
88 89
diff --git a/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h b/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
new file mode 100644
index 000000000000..06f982d55697
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
@@ -0,0 +1,11 @@
1/*
2 * arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
3 *
4 * Copyright (C) 2008 Marvell Semiconductor
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11extern void __init feroceon_l2_init(int l2_wt_override);
diff --git a/arch/arm/plat-orion/include/plat/ehci-orion.h b/arch/arm/plat-orion/include/plat/ehci-orion.h
new file mode 100644
index 000000000000..64343051095a
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/ehci-orion.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/plat-orion/include/plat/ehci-orion.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __PLAT_EHCI_ORION_H
10#define __PLAT_EHCI_ORION_H
11
12#include <linux/mbus.h>
13
14struct orion_ehci_data {
15 struct mbus_dram_target_info *dram;
16};
17
18
19#endif
diff --git a/arch/arm/plat-orion/include/plat/irq.h b/arch/arm/plat-orion/include/plat/irq.h
new file mode 100644
index 000000000000..f05eeab94968
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/irq.h
@@ -0,0 +1,17 @@
1/*
2 * arch/arm/plat-orion/include/plat/irq.h
3 *
4 * Marvell Orion SoC IRQ handling.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __PLAT_IRQ_H
12#define __PLAT_IRQ_H
13
14void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr);
15
16
17#endif
diff --git a/arch/arm/plat-orion/include/plat/mv_xor.h b/arch/arm/plat-orion/include/plat/mv_xor.h
new file mode 100644
index 000000000000..bd5f3bdb4ae3
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/mv_xor.h
@@ -0,0 +1,30 @@
1/*
2 * arch/arm/plat-orion/include/plat/mv_xor.h
3 *
4 * Marvell XOR platform device data definition file.
5 */
6
7#ifndef __PLAT_MV_XOR_H
8#define __PLAT_MV_XOR_H
9
10#include <linux/dmaengine.h>
11#include <linux/mbus.h>
12
13#define MV_XOR_SHARED_NAME "mv_xor_shared"
14#define MV_XOR_NAME "mv_xor"
15
16struct mbus_dram_target_info;
17
18struct mv_xor_platform_shared_data {
19 struct mbus_dram_target_info *dram;
20};
21
22struct mv_xor_platform_data {
23 struct platform_device *shared;
24 int hw_id;
25 dma_cap_mask_t cap_mask;
26 size_t pool_size;
27};
28
29
30#endif
diff --git a/arch/arm/plat-orion/include/plat/orion_nand.h b/arch/arm/plat-orion/include/plat/orion_nand.h
new file mode 100644
index 000000000000..d6a4cfa37785
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/orion_nand.h
@@ -0,0 +1,25 @@
1/*
2 * arch/arm/plat-orion/include/plat/orion_nand.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __PLAT_ORION_NAND_H
10#define __PLAT_ORION_NAND_H
11
12/*
13 * Device bus NAND private data
14 */
15struct orion_nand_data {
16 struct mtd_partition *parts;
17 u32 nr_parts;
18 u8 ale; /* address line number connected to ALE */
19 u8 cle; /* address line number connected to CLE */
20 u8 width; /* buswidth */
21 u8 chip_delay;
22};
23
24
25#endif
diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h
new file mode 100644
index 000000000000..3ebfef72b4e7
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/pcie.h
@@ -0,0 +1,32 @@
1/*
2 * arch/arm/plat-orion/include/plat/pcie.h
3 *
4 * Marvell Orion SoC PCIe handling.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __PLAT_PCIE_H
12#define __PLAT_PCIE_H
13
14u32 orion_pcie_dev_id(void __iomem *base);
15u32 orion_pcie_rev(void __iomem *base);
16int orion_pcie_link_up(void __iomem *base);
17int orion_pcie_x4_mode(void __iomem *base);
18int orion_pcie_get_local_bus_nr(void __iomem *base);
19void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
20void orion_pcie_setup(void __iomem *base,
21 struct mbus_dram_target_info *dram);
22int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
23 u32 devfn, int where, int size, u32 *val);
24int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus,
25 u32 devfn, int where, int size, u32 *val);
26int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus,
27 u32 devfn, int where, int size, u32 *val);
28int orion_pcie_wr_conf(void __iomem *base, struct pci_bus *bus,
29 u32 devfn, int where, int size, u32 val);
30
31
32#endif
diff --git a/arch/arm/plat-orion/include/plat/time.h b/arch/arm/plat-orion/include/plat/time.h
new file mode 100644
index 000000000000..c06ca35f3613
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/time.h
@@ -0,0 +1,17 @@
1/*
2 * arch/arm/plat-orion/include/plat/time.h
3 *
4 * Marvell Orion SoC time handling.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __PLAT_TIME_H
12#define __PLAT_TIME_H
13
14void orion_time_init(unsigned int irq, unsigned int tclk);
15
16
17#endif
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index fe66a1835169..3f9d34fc738c 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -12,7 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <asm/plat-orion/irq.h> 15#include <plat/irq.h>
16 16
17static void orion_irq_mask(u32 irq) 17static void orion_irq_mask(u32 irq)
18{ 18{
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index ca32c60e14d7..883902fead89 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -12,7 +12,7 @@
12#include <linux/pci.h> 12#include <linux/pci.h>
13#include <linux/mbus.h> 13#include <linux/mbus.h>
14#include <asm/mach/pci.h> 14#include <asm/mach/pci.h>
15#include <asm/plat-orion/pcie.h> 15#include <plat/pcie.h>
16 16
17/* 17/*
18 * PCIe unit register offsets. 18 * PCIe unit register offsets.
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 6d60f0476bb8..89ce60eabd5b 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -169,9 +169,7 @@ static struct map_desc s3c_iodesc[] __initdata = {
169 IODESC_ENT(UART) 169 IODESC_ENT(UART)
170}; 170};
171 171
172 172static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode)
173static struct cpu_table *
174s3c_lookup_cpu(unsigned long idcode)
175{ 173{
176 struct cpu_table *tab; 174 struct cpu_table *tab;
177 int count; 175 int count;
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 8b8f564c3aa2..56281c030a7b 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Sun Jul 13 12:04:05 2008 15# Last update: Wed Aug 13 21:56:02 2008
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -843,7 +843,7 @@ borzoi MACH_BORZOI BORZOI 831
843gecko MACH_GECKO GECKO 832 843gecko MACH_GECKO GECKO 832
844ds101 MACH_DS101 DS101 833 844ds101 MACH_DS101 DS101 833
845omap_palmtt2 MACH_OMAP_PALMTT2 OMAP_PALMTT2 834 845omap_palmtt2 MACH_OMAP_PALMTT2 OMAP_PALMTT2 834
846xscale_palmld MACH_XSCALE_PALMLD XSCALE_PALMLD 835 846palmld MACH_PALMLD PALMLD 835
847cc9c MACH_CC9C CC9C 836 847cc9c MACH_CC9C CC9C 836
848sbc1670 MACH_SBC1670 SBC1670 837 848sbc1670 MACH_SBC1670 SBC1670 837
849ixdp28x5 MACH_IXDP28X5 IXDP28X5 838 849ixdp28x5 MACH_IXDP28X5 IXDP28X5 838
@@ -852,7 +852,7 @@ ml696k MACH_ML696K ML696K 840
852arcom_zeus MACH_ARCOM_ZEUS ARCOM_ZEUS 841 852arcom_zeus MACH_ARCOM_ZEUS ARCOM_ZEUS 841
853osiris MACH_OSIRIS OSIRIS 842 853osiris MACH_OSIRIS OSIRIS 842
854maestro MACH_MAESTRO MAESTRO 843 854maestro MACH_MAESTRO MAESTRO 843
855tunge2 MACH_TUNGE2 TUNGE2 844 855palmte2 MACH_PALMTE2 PALMTE2 844
856ixbbm MACH_IXBBM IXBBM 845 856ixbbm MACH_IXBBM IXBBM 845
857mx27ads MACH_MX27ADS MX27ADS 846 857mx27ads MACH_MX27ADS MX27ADS 846
858ax8004 MACH_AX8004 AX8004 847 858ax8004 MACH_AX8004 AX8004 847
@@ -916,7 +916,7 @@ nxdb500 MACH_NXDB500 NXDB500 905
916apf9328 MACH_APF9328 APF9328 906 916apf9328 MACH_APF9328 APF9328 906
917omap_wipoq MACH_OMAP_WIPOQ OMAP_WIPOQ 907 917omap_wipoq MACH_OMAP_WIPOQ OMAP_WIPOQ 907
918omap_twip MACH_OMAP_TWIP OMAP_TWIP 908 918omap_twip MACH_OMAP_TWIP OMAP_TWIP 908
919palmtreo650 MACH_PALMTREO650 PALMTREO650 909 919palmt650 MACH_PALMT650 PALMT650 909
920acumen MACH_ACUMEN ACUMEN 910 920acumen MACH_ACUMEN ACUMEN 910
921xp100 MACH_XP100 XP100 911 921xp100 MACH_XP100 XP100 911
922fs2410 MACH_FS2410 FS2410 912 922fs2410 MACH_FS2410 FS2410 912
@@ -1096,7 +1096,7 @@ atc6 MACH_ATC6 ATC6 1086
1096multmdw MACH_MULTMDW MULTMDW 1087 1096multmdw MACH_MULTMDW MULTMDW 1087
1097mba2440 MACH_MBA2440 MBA2440 1088 1097mba2440 MACH_MBA2440 MBA2440 1088
1098ecsd MACH_ECSD ECSD 1089 1098ecsd MACH_ECSD ECSD 1089
1099zire31 MACH_ZIRE31 ZIRE31 1090 1099palmz31 MACH_PALMZ31 PALMZ31 1090
1100fsg MACH_FSG FSG 1091 1100fsg MACH_FSG FSG 1091
1101razor101 MACH_RAZOR101 RAZOR101 1092 1101razor101 MACH_RAZOR101 RAZOR101 1092
1102opera_tdm MACH_OPERA_TDM OPERA_TDM 1093 1102opera_tdm MACH_OPERA_TDM OPERA_TDM 1093
@@ -1810,7 +1810,7 @@ kriss_sensor MACH_KRISS_SENSOR KRISS_SENSOR 1819
1810pilz_pmi5 MACH_PILZ_PMI5 PILZ_PMI5 1820 1810pilz_pmi5 MACH_PILZ_PMI5 PILZ_PMI5 1820
1811jade MACH_JADE JADE 1821 1811jade MACH_JADE JADE 1821
1812ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822 1812ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822
1813gprisc4 MACH_GPRISC4 GPRISC4 1823 1813gprisc3 MACH_GPRISC4 GPRISC4 1823
1814stamp9260 MACH_STAMP9260 STAMP9260 1824 1814stamp9260 MACH_STAMP9260 STAMP9260 1824
1815smdk6430 MACH_SMDK6430 SMDK6430 1825 1815smdk6430 MACH_SMDK6430 SMDK6430 1825
1816smdkc100 MACH_SMDKC100 SMDKC100 1826 1816smdkc100 MACH_SMDKC100 SMDKC100 1826
@@ -1820,3 +1820,44 @@ deister_eyecam MACH_DEISTER_EYECAM DEISTER_EYECAM 1829
1820at91sam9m10ek MACH_AT91SAM9M10EK AT91SAM9M10EK 1830 1820at91sam9m10ek MACH_AT91SAM9M10EK AT91SAM9M10EK 1830
1821linkstation_produo MACH_LINKSTATION_PRODUO LINKSTATION_PRODUO 1831 1821linkstation_produo MACH_LINKSTATION_PRODUO LINKSTATION_PRODUO 1831
1822hit_b0 MACH_HIT_B0 HIT_B0 1832 1822hit_b0 MACH_HIT_B0 HIT_B0 1832
1823adx_rmu MACH_ADX_RMU ADX_RMU 1833
1824xg_cpe_main MACH_XG_CPE_MAIN XG_CPE_MAIN 1834
1825edb9407a MACH_EDB9407A EDB9407A 1835
1826dtb9608 MACH_DTB9608 DTB9608 1836
1827em104v1 MACH_EM104V1 EM104V1 1837
1828demo MACH_DEMO DEMO 1838
1829logi9260 MACH_LOGI9260 LOGI9260 1839
1830mx31_exm32 MACH_MX31_EXM32 MX31_EXM32 1840
1831usb_a9g20 MACH_USB_A9G20 USB_A9G20 1841
1832picproje2008 MACH_PICPROJE2008 PICPROJE2008 1842
1833cs_e9315 MACH_CS_E9315 CS_E9315 1843
1834qil_a9g20 MACH_QIL_A9G20 QIL_A9G20 1844
1835sha_pon020 MACH_SHA_PON020 SHA_PON020 1845
1836nad MACH_NAD NAD 1846
1837sbc35_a9260 MACH_SBC35_A9260 SBC35_A9260 1847
1838sbc35_a9g20 MACH_SBC35_A9G20 SBC35_A9G20 1848
1839davinci_beginning MACH_DAVINCI_BEGINNING DAVINCI_BEGINNING 1849
1840uwc MACH_UWC UWC 1850
1841mxlads MACH_MXLADS MXLADS 1851
1842htcnike MACH_HTCNIKE HTCNIKE 1852
1843deister_pxa270 MACH_DEISTER_PXA270 DEISTER_PXA270 1853
1844cme9210js MACH_CME9210JS CME9210JS 1854
1845cc9p9360 MACH_CC9P9360 CC9P9360 1855
1846mocha MACH_MOCHA MOCHA 1856
1847wapd170ag MACH_WAPD170AG WAPD170AG 1857
1848linkstation_mini MACH_LINKSTATION_MINI LINKSTATION_MINI 1858
1849afeb9260 MACH_AFEB9260 AFEB9260 1859
1850w90x900 MACH_W90X900 W90X900 1860
1851w90x700 MACH_W90X700 W90X700 1861
1852kt300ip MACH_KT300IP KT300IP 1862
1853kt300ip_g20 MACH_KT300IP_G20 KT300IP_G20 1863
1854srcm MACH_SRCM SRCM 1864
1855wlnx_9260 MACH_WLNX_9260 WLNX_9260 1865
1856openmoko_gta03 MACH_OPENMOKO_GTA03 OPENMOKO_GTA03 1866
1857osprey2 MACH_OSPREY2 OSPREY2 1867
1858kbio9260 MACH_KBIO9260 KBIO9260 1868
1859ginza MACH_GINZA GINZA 1869
1860a636n MACH_A636N A636N 1870
1861imx27ipcam MACH_IMX27IPCAM IMX27IPCAM 1871
1862nenoc MACH_NEMOC NEMOC 1872
1863geneva MACH_GENEVA GENEVA 1873
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index 217de3ea29e8..b4aeb0f696dc 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -796,6 +796,9 @@ static unsigned long nid_range(unsigned long start, unsigned long end,
796 start += PAGE_SIZE; 796 start += PAGE_SIZE;
797 } 797 }
798 798
799 if (start > end)
800 start = end;
801
799 return start; 802 return start;
800} 803}
801#else 804#else
@@ -1723,8 +1726,7 @@ void __init paging_init(void)
1723 1726
1724 find_ramdisk(phys_base); 1727 find_ramdisk(phys_base);
1725 1728
1726 if (cmdline_memory_size) 1729 lmb_enforce_memory_limit(cmdline_memory_size);
1727 lmb_enforce_memory_limit(phys_base + cmdline_memory_size);
1728 1730
1729 lmb_analyze(); 1731 lmb_analyze();
1730 lmb_dump_all(); 1732 lmb_dump_all();
@@ -1961,6 +1963,15 @@ void __init mem_init(void)
1961void free_initmem(void) 1963void free_initmem(void)
1962{ 1964{
1963 unsigned long addr, initend; 1965 unsigned long addr, initend;
1966 int do_free = 1;
1967
1968 /* If the physical memory maps were trimmed by kernel command
1969 * line options, don't even try freeing this initmem stuff up.
1970 * The kernel image could have been in the trimmed out region
1971 * and if so the freeing below will free invalid page structs.
1972 */
1973 if (cmdline_memory_size)
1974 do_free = 0;
1964 1975
1965 /* 1976 /*
1966 * The init section is aligned to 8k in vmlinux.lds. Page align for >8k pagesizes. 1977 * The init section is aligned to 8k in vmlinux.lds. Page align for >8k pagesizes.
@@ -1975,13 +1986,16 @@ void free_initmem(void)
1975 ((unsigned long) __va(kern_base)) - 1986 ((unsigned long) __va(kern_base)) -
1976 ((unsigned long) KERNBASE)); 1987 ((unsigned long) KERNBASE));
1977 memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE); 1988 memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE);
1978 p = virt_to_page(page);
1979 1989
1980 ClearPageReserved(p); 1990 if (do_free) {
1981 init_page_count(p); 1991 p = virt_to_page(page);
1982 __free_page(p); 1992
1983 num_physpages++; 1993 ClearPageReserved(p);
1984 totalram_pages++; 1994 init_page_count(p);
1995 __free_page(p);
1996 num_physpages++;
1997 totalram_pages++;
1998 }
1985 } 1999 }
1986} 2000}
1987 2001
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index ac2fb0641a04..68d91c8233f4 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -951,9 +951,9 @@ config NUMA
951 local memory controller of the CPU and add some more 951 local memory controller of the CPU and add some more
952 NUMA awareness to the kernel. 952 NUMA awareness to the kernel.
953 953
954 For i386 this is currently highly experimental and should be only 954 For 32-bit this is currently highly experimental and should be only
955 used for kernel development. It might also cause boot failures. 955 used for kernel development. It might also cause boot failures.
956 For x86_64 this is recommended on all multiprocessor Opteron systems. 956 For 64-bit this is recommended on all multiprocessor Opteron systems.
957 If the system is EM64T, you should say N unless your system is 957 If the system is EM64T, you should say N unless your system is
958 EM64T NUMA. 958 EM64T NUMA.
959 959
@@ -1263,7 +1263,7 @@ config KEXEC
1263 strongly in flux, so no good recommendation can be made. 1263 strongly in flux, so no good recommendation can be made.
1264 1264
1265config CRASH_DUMP 1265config CRASH_DUMP
1266 bool "kernel crash dumps (EXPERIMENTAL)" 1266 bool "kernel crash dumps"
1267 depends on X86_64 || (X86_32 && HIGHMEM) 1267 depends on X86_64 || (X86_32 && HIGHMEM)
1268 help 1268 help
1269 Generate crash dump after being started by kexec. 1269 Generate crash dump after being started by kexec.
diff --git a/arch/x86/boot/boot.h b/arch/x86/boot/boot.h
index a34b9982c7cb..616b804a2295 100644
--- a/arch/x86/boot/boot.h
+++ b/arch/x86/boot/boot.h
@@ -24,6 +24,8 @@
24#include <linux/edd.h> 24#include <linux/edd.h>
25#include <asm/boot.h> 25#include <asm/boot.h>
26#include <asm/setup.h> 26#include <asm/setup.h>
27#include "bitops.h"
28#include <asm/cpufeature.h>
27 29
28/* Useful macros */ 30/* Useful macros */
29#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) 31#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)]))
@@ -242,6 +244,12 @@ int cmdline_find_option(const char *option, char *buffer, int bufsize);
242int cmdline_find_option_bool(const char *option); 244int cmdline_find_option_bool(const char *option);
243 245
244/* cpu.c, cpucheck.c */ 246/* cpu.c, cpucheck.c */
247struct cpu_features {
248 int level; /* Family, or 64 for x86-64 */
249 int model;
250 u32 flags[NCAPINTS];
251};
252extern struct cpu_features cpu;
245int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr); 253int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr);
246int validate_cpu(void); 254int validate_cpu(void);
247 255
diff --git a/arch/x86/boot/cpu.c b/arch/x86/boot/cpu.c
index 92d6fd73dc7d..75298fe2edca 100644
--- a/arch/x86/boot/cpu.c
+++ b/arch/x86/boot/cpu.c
@@ -16,9 +16,6 @@
16 */ 16 */
17 17
18#include "boot.h" 18#include "boot.h"
19#include "bitops.h"
20#include <asm/cpufeature.h>
21
22#include "cpustr.h" 19#include "cpustr.h"
23 20
24static char *cpu_name(int level) 21static char *cpu_name(int level)
diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c
index 7804389ee005..4b9ae7c56748 100644
--- a/arch/x86/boot/cpucheck.c
+++ b/arch/x86/boot/cpucheck.c
@@ -22,21 +22,13 @@
22 22
23#ifdef _SETUP 23#ifdef _SETUP
24# include "boot.h" 24# include "boot.h"
25# include "bitops.h"
26#endif 25#endif
27#include <linux/types.h> 26#include <linux/types.h>
28#include <asm/cpufeature.h>
29#include <asm/processor-flags.h> 27#include <asm/processor-flags.h>
30#include <asm/required-features.h> 28#include <asm/required-features.h>
31#include <asm/msr-index.h> 29#include <asm/msr-index.h>
32 30
33struct cpu_features { 31struct cpu_features cpu;
34 int level; /* Family, or 64 for x86-64 */
35 int model;
36 u32 flags[NCAPINTS];
37};
38
39static struct cpu_features cpu;
40static u32 cpu_vendor[3]; 32static u32 cpu_vendor[3];
41static u32 err_flags[NCAPINTS]; 33static u32 err_flags[NCAPINTS];
42 34
diff --git a/arch/x86/boot/main.c b/arch/x86/boot/main.c
index 2296164b54d2..197421db1af1 100644
--- a/arch/x86/boot/main.c
+++ b/arch/x86/boot/main.c
@@ -73,6 +73,11 @@ static void keyboard_set_repeat(void)
73 */ 73 */
74static void query_ist(void) 74static void query_ist(void)
75{ 75{
76 /* Some older BIOSes apparently crash on this call, so filter
77 it from machines too old to have SpeedStep at all. */
78 if (cpu.level < 6)
79 return;
80
76 asm("int $0x15" 81 asm("int $0x15"
77 : "=a" (boot_params.ist_info.signature), 82 : "=a" (boot_params.ist_info.signature),
78 "=b" (boot_params.ist_info.command), 83 "=b" (boot_params.ist_info.command),
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index fa88a1d71290..bfd10fd211cd 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -97,6 +97,8 @@ static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
97#warning ACPI uses CMPXCHG, i486 and later hardware 97#warning ACPI uses CMPXCHG, i486 and later hardware
98#endif 98#endif
99 99
100static int acpi_mcfg_64bit_base_addr __initdata = FALSE;
101
100/* -------------------------------------------------------------------------- 102/* --------------------------------------------------------------------------
101 Boot-time Configuration 103 Boot-time Configuration
102 -------------------------------------------------------------------------- */ 104 -------------------------------------------------------------------------- */
@@ -158,6 +160,14 @@ char *__init __acpi_map_table(unsigned long phys, unsigned long size)
158struct acpi_mcfg_allocation *pci_mmcfg_config; 160struct acpi_mcfg_allocation *pci_mmcfg_config;
159int pci_mmcfg_config_num; 161int pci_mmcfg_config_num;
160 162
163static int __init acpi_mcfg_oem_check(struct acpi_table_mcfg *mcfg)
164{
165 if (!strcmp(mcfg->header.oem_id, "SGI"))
166 acpi_mcfg_64bit_base_addr = TRUE;
167
168 return 0;
169}
170
161int __init acpi_parse_mcfg(struct acpi_table_header *header) 171int __init acpi_parse_mcfg(struct acpi_table_header *header)
162{ 172{
163 struct acpi_table_mcfg *mcfg; 173 struct acpi_table_mcfg *mcfg;
@@ -190,8 +200,12 @@ int __init acpi_parse_mcfg(struct acpi_table_header *header)
190 } 200 }
191 201
192 memcpy(pci_mmcfg_config, &mcfg[1], config_size); 202 memcpy(pci_mmcfg_config, &mcfg[1], config_size);
203
204 acpi_mcfg_oem_check(mcfg);
205
193 for (i = 0; i < pci_mmcfg_config_num; ++i) { 206 for (i = 0; i < pci_mmcfg_config_num; ++i) {
194 if (pci_mmcfg_config[i].address > 0xFFFFFFFF) { 207 if ((pci_mmcfg_config[i].address > 0xFFFFFFFF) &&
208 !acpi_mcfg_64bit_base_addr) {
195 printk(KERN_ERR PREFIX 209 printk(KERN_ERR PREFIX
196 "MMCONFIG not in low 4GB of memory\n"); 210 "MMCONFIG not in low 4GB of memory\n");
197 kfree(pci_mmcfg_config); 211 kfree(pci_mmcfg_config);
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index fa2161d5003b..81e5ab6542d8 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -20,7 +20,7 @@ unsigned long acpi_realmode_flags;
20/* address in low memory of the wakeup routine. */ 20/* address in low memory of the wakeup routine. */
21static unsigned long acpi_realmode; 21static unsigned long acpi_realmode;
22 22
23#ifdef CONFIG_64BIT 23#if defined(CONFIG_SMP) && defined(CONFIG_64BIT)
24static char temp_stack[10240]; 24static char temp_stack[10240];
25#endif 25#endif
26 26
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 22d7d050905d..de39e1f2ede5 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -101,16 +101,13 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
101 */ 101 */
102static int iommu_completion_wait(struct amd_iommu *iommu) 102static int iommu_completion_wait(struct amd_iommu *iommu)
103{ 103{
104 int ret; 104 int ret, ready = 0;
105 unsigned status = 0;
105 struct iommu_cmd cmd; 106 struct iommu_cmd cmd;
106 volatile u64 ready = 0;
107 unsigned long ready_phys = virt_to_phys(&ready);
108 unsigned long i = 0; 107 unsigned long i = 0;
109 108
110 memset(&cmd, 0, sizeof(cmd)); 109 memset(&cmd, 0, sizeof(cmd));
111 cmd.data[0] = LOW_U32(ready_phys) | CMD_COMPL_WAIT_STORE_MASK; 110 cmd.data[0] = CMD_COMPL_WAIT_INT_MASK;
112 cmd.data[1] = upper_32_bits(ready_phys);
113 cmd.data[2] = 1; /* value written to 'ready' */
114 CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT); 111 CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT);
115 112
116 iommu->need_sync = 0; 113 iommu->need_sync = 0;
@@ -122,9 +119,15 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
122 119
123 while (!ready && (i < EXIT_LOOP_COUNT)) { 120 while (!ready && (i < EXIT_LOOP_COUNT)) {
124 ++i; 121 ++i;
125 cpu_relax(); 122 /* wait for the bit to become one */
123 status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
124 ready = status & MMIO_STATUS_COM_WAIT_INT_MASK;
126 } 125 }
127 126
127 /* set bit back to zero */
128 status &= ~MMIO_STATUS_COM_WAIT_INT_MASK;
129 writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET);
130
128 if (unlikely((i == EXIT_LOOP_COUNT) && printk_ratelimit())) 131 if (unlikely((i == EXIT_LOOP_COUNT) && printk_ratelimit()))
129 printk(KERN_WARNING "AMD IOMMU: Completion wait loop failed\n"); 132 printk(KERN_WARNING "AMD IOMMU: Completion wait loop failed\n");
130 133
@@ -161,7 +164,7 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
161 address &= PAGE_MASK; 164 address &= PAGE_MASK;
162 CMD_SET_TYPE(&cmd, CMD_INV_IOMMU_PAGES); 165 CMD_SET_TYPE(&cmd, CMD_INV_IOMMU_PAGES);
163 cmd.data[1] |= domid; 166 cmd.data[1] |= domid;
164 cmd.data[2] = LOW_U32(address); 167 cmd.data[2] = lower_32_bits(address);
165 cmd.data[3] = upper_32_bits(address); 168 cmd.data[3] = upper_32_bits(address);
166 if (s) /* size bit - we flush more than one 4kb page */ 169 if (s) /* size bit - we flush more than one 4kb page */
167 cmd.data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; 170 cmd.data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index d9a9da597e79..a69cc0f52042 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -801,6 +801,21 @@ static int __init init_memory_definitions(struct acpi_table_header *table)
801} 801}
802 802
803/* 803/*
804 * Init the device table to not allow DMA access for devices and
805 * suppress all page faults
806 */
807static void init_device_table(void)
808{
809 u16 devid;
810
811 for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) {
812 set_dev_entry_bit(devid, DEV_ENTRY_VALID);
813 set_dev_entry_bit(devid, DEV_ENTRY_TRANSLATION);
814 set_dev_entry_bit(devid, DEV_ENTRY_NO_PAGE_FAULT);
815 }
816}
817
818/*
804 * This function finally enables all IOMMUs found in the system after 819 * This function finally enables all IOMMUs found in the system after
805 * they have been initialized 820 * they have been initialized
806 */ 821 */
@@ -931,6 +946,9 @@ int __init amd_iommu_init(void)
931 if (amd_iommu_pd_alloc_bitmap == NULL) 946 if (amd_iommu_pd_alloc_bitmap == NULL)
932 goto free; 947 goto free;
933 948
949 /* init the device table */
950 init_device_table();
951
934 /* 952 /*
935 * let all alias entries point to itself 953 * let all alias entries point to itself
936 */ 954 */
@@ -954,15 +972,15 @@ int __init amd_iommu_init(void)
954 if (acpi_table_parse("IVRS", init_memory_definitions) != 0) 972 if (acpi_table_parse("IVRS", init_memory_definitions) != 0)
955 goto free; 973 goto free;
956 974
957 ret = amd_iommu_init_dma_ops(); 975 ret = sysdev_class_register(&amd_iommu_sysdev_class);
958 if (ret) 976 if (ret)
959 goto free; 977 goto free;
960 978
961 ret = sysdev_class_register(&amd_iommu_sysdev_class); 979 ret = sysdev_register(&device_amd_iommu);
962 if (ret) 980 if (ret)
963 goto free; 981 goto free;
964 982
965 ret = sysdev_register(&device_amd_iommu); 983 ret = amd_iommu_init_dma_ops();
966 if (ret) 984 if (ret)
967 goto free; 985 goto free;
968 986
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 039a8d4aaf62..f88bd0d982b0 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -1454,8 +1454,6 @@ void disconnect_bsp_APIC(int virt_wire_setup)
1454 } 1454 }
1455} 1455}
1456 1456
1457unsigned int __cpuinitdata maxcpus = NR_CPUS;
1458
1459void __cpuinit generic_processor_info(int apicid, int version) 1457void __cpuinit generic_processor_info(int apicid, int version)
1460{ 1458{
1461 int cpu; 1459 int cpu;
@@ -1482,12 +1480,6 @@ void __cpuinit generic_processor_info(int apicid, int version)
1482 return; 1480 return;
1483 } 1481 }
1484 1482
1485 if (num_processors >= maxcpus) {
1486 printk(KERN_WARNING "WARNING: maxcpus limit of %i reached."
1487 " Processor ignored.\n", maxcpus);
1488 return;
1489 }
1490
1491 num_processors++; 1483 num_processors++;
1492 cpus_complement(tmp_map, cpu_present_map); 1484 cpus_complement(tmp_map, cpu_present_map);
1493 cpu = first_cpu(tmp_map); 1485 cpu = first_cpu(tmp_map);
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 7f1f030da7ee..446c062e831c 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -90,7 +90,6 @@ static unsigned long apic_phys;
90 90
91unsigned long mp_lapic_addr; 91unsigned long mp_lapic_addr;
92 92
93unsigned int __cpuinitdata maxcpus = NR_CPUS;
94/* 93/*
95 * Get the LAPIC version 94 * Get the LAPIC version
96 */ 95 */
@@ -1062,12 +1061,6 @@ void __cpuinit generic_processor_info(int apicid, int version)
1062 return; 1061 return;
1063 } 1062 }
1064 1063
1065 if (num_processors >= maxcpus) {
1066 printk(KERN_WARNING "WARNING: maxcpus limit of %i reached."
1067 " Processor ignored.\n", maxcpus);
1068 return;
1069 }
1070
1071 num_processors++; 1064 num_processors++;
1072 cpus_complement(tmp_map, cpu_present_map); 1065 cpus_complement(tmp_map, cpu_present_map);
1073 cpu = first_cpu(tmp_map); 1066 cpu = first_cpu(tmp_map);
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index de7439f82b92..05cc22dbd4ff 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -478,7 +478,13 @@ static int setup_p4_watchdog(unsigned nmi_hz)
478 perfctr_msr = MSR_P4_IQ_PERFCTR1; 478 perfctr_msr = MSR_P4_IQ_PERFCTR1;
479 evntsel_msr = MSR_P4_CRU_ESCR0; 479 evntsel_msr = MSR_P4_CRU_ESCR0;
480 cccr_msr = MSR_P4_IQ_CCCR1; 480 cccr_msr = MSR_P4_IQ_CCCR1;
481 cccr_val = P4_CCCR_OVF_PMI1 | P4_CCCR_ESCR_SELECT(4); 481
482 /* Pentium 4 D processors don't support P4_CCCR_OVF_PMI1 */
483 if (boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_mask == 4)
484 cccr_val = P4_CCCR_OVF_PMI0;
485 else
486 cccr_val = P4_CCCR_OVF_PMI1;
487 cccr_val |= P4_CCCR_ESCR_SELECT(4);
482 } 488 }
483 489
484 evntsel = P4_ESCR_EVENT_SELECT(0x3F) 490 evntsel = P4_ESCR_EVENT_SELECT(0x3F)
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/genx2apic_uv_x.c
index 2cfcbded888a..2d7e307c7779 100644
--- a/arch/x86/kernel/genx2apic_uv_x.c
+++ b/arch/x86/kernel/genx2apic_uv_x.c
@@ -222,7 +222,7 @@ static __init void map_low_mmrs(void)
222 222
223enum map_type {map_wb, map_uc}; 223enum map_type {map_wb, map_uc};
224 224
225static void map_high(char *id, unsigned long base, int shift, enum map_type map_type) 225static __init void map_high(char *id, unsigned long base, int shift, enum map_type map_type)
226{ 226{
227 unsigned long bytes, paddr; 227 unsigned long bytes, paddr;
228 228
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 1b318e903bf6..9bfc4d72fb2e 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -88,6 +88,7 @@ void __init x86_64_start_kernel(char * real_mode_data)
88 BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL)); 88 BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL));
89 BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) == 89 BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) ==
90 (__START_KERNEL & PGDIR_MASK))); 90 (__START_KERNEL & PGDIR_MASK)));
91 BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <= MODULES_END);
91 92
92 /* clear bss before set_intr_gate with early_idt_handler */ 93 /* clear bss before set_intr_gate with early_idt_handler */
93 clear_bss(); 94 clear_bss();
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index ad2b15a1334d..59fd3b6b1303 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -359,6 +359,7 @@ static int hpet_clocksource_register(void)
359int __init hpet_enable(void) 359int __init hpet_enable(void)
360{ 360{
361 unsigned long id; 361 unsigned long id;
362 int i;
362 363
363 if (!is_hpet_capable()) 364 if (!is_hpet_capable())
364 return 0; 365 return 0;
@@ -369,6 +370,29 @@ int __init hpet_enable(void)
369 * Read the period and check for a sane value: 370 * Read the period and check for a sane value:
370 */ 371 */
371 hpet_period = hpet_readl(HPET_PERIOD); 372 hpet_period = hpet_readl(HPET_PERIOD);
373
374 /*
375 * AMD SB700 based systems with spread spectrum enabled use a
376 * SMM based HPET emulation to provide proper frequency
377 * setting. The SMM code is initialized with the first HPET
378 * register access and takes some time to complete. During
379 * this time the config register reads 0xffffffff. We check
380 * for max. 1000 loops whether the config register reads a non
381 * 0xffffffff value to make sure that HPET is up and running
382 * before we go further. A counting loop is safe, as the HPET
383 * access takes thousands of CPU cycles. On non SB700 based
384 * machines this check is only done once and has no side
385 * effects.
386 */
387 for (i = 0; hpet_readl(HPET_CFG) == 0xFFFFFFFF; i++) {
388 if (i == 1000) {
389 printk(KERN_WARNING
390 "HPET config register value = 0xFFFFFFFF. "
391 "Disabling HPET\n");
392 goto out_nohpet;
393 }
394 }
395
372 if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD) 396 if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
373 goto out_nohpet; 397 goto out_nohpet;
374 398
diff --git a/arch/x86/kernel/mfgpt_32.c b/arch/x86/kernel/mfgpt_32.c
index 07c0f828f488..3b599518c322 100644
--- a/arch/x86/kernel/mfgpt_32.c
+++ b/arch/x86/kernel/mfgpt_32.c
@@ -33,6 +33,8 @@
33#include <linux/module.h> 33#include <linux/module.h>
34#include <asm/geode.h> 34#include <asm/geode.h>
35 35
36#define MFGPT_DEFAULT_IRQ 7
37
36static struct mfgpt_timer_t { 38static struct mfgpt_timer_t {
37 unsigned int avail:1; 39 unsigned int avail:1;
38} mfgpt_timers[MFGPT_MAX_TIMERS]; 40} mfgpt_timers[MFGPT_MAX_TIMERS];
@@ -157,29 +159,48 @@ int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable)
157} 159}
158EXPORT_SYMBOL_GPL(geode_mfgpt_toggle_event); 160EXPORT_SYMBOL_GPL(geode_mfgpt_toggle_event);
159 161
160int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable) 162int geode_mfgpt_set_irq(int timer, int cmp, int *irq, int enable)
161{ 163{
162 u32 val, dummy; 164 u32 zsel, lpc, dummy;
163 int offset; 165 int shift;
164 166
165 if (timer < 0 || timer >= MFGPT_MAX_TIMERS) 167 if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
166 return -EIO; 168 return -EIO;
167 169
168 if (geode_mfgpt_toggle_event(timer, cmp, MFGPT_EVENT_IRQ, enable)) 170 /*
171 * Unfortunately, MFGPTs come in pairs sharing their IRQ lines. If VSA
172 * is using the same CMP of the timer's Siamese twin, the IRQ is set to
173 * 2, and we mustn't use nor change it.
174 * XXX: Likewise, 2 Linux drivers might clash if the 2nd overwrites the
175 * IRQ of the 1st. This can only happen if forcing an IRQ, calling this
176 * with *irq==0 is safe. Currently there _are_ no 2 drivers.
177 */
178 rdmsr(MSR_PIC_ZSEL_LOW, zsel, dummy);
179 shift = ((cmp == MFGPT_CMP1 ? 0 : 4) + timer % 4) * 4;
180 if (((zsel >> shift) & 0xF) == 2)
169 return -EIO; 181 return -EIO;
170 182
171 rdmsr(MSR_PIC_ZSEL_LOW, val, dummy); 183 /* Choose IRQ: if none supplied, keep IRQ already set or use default */
184 if (!*irq)
185 *irq = (zsel >> shift) & 0xF;
186 if (!*irq)
187 *irq = MFGPT_DEFAULT_IRQ;
172 188
173 offset = (timer % 4) * 4; 189 /* Can't use IRQ if it's 0 (=disabled), 2, or routed to LPC */
174 190 if (*irq < 1 || *irq == 2 || *irq > 15)
175 val &= ~((0xF << offset) | (0xF << (offset + 16))); 191 return -EIO;
192 rdmsr(MSR_PIC_IRQM_LPC, lpc, dummy);
193 if (lpc & (1 << *irq))
194 return -EIO;
176 195
196 /* All chosen and checked - go for it */
197 if (geode_mfgpt_toggle_event(timer, cmp, MFGPT_EVENT_IRQ, enable))
198 return -EIO;
177 if (enable) { 199 if (enable) {
178 val |= (irq & 0x0F) << (offset); 200 zsel = (zsel & ~(0xF << shift)) | (*irq << shift);
179 val |= (irq & 0x0F) << (offset + 16); 201 wrmsr(MSR_PIC_ZSEL_LOW, zsel, dummy);
180 } 202 }
181 203
182 wrmsr(MSR_PIC_ZSEL_LOW, val, dummy);
183 return 0; 204 return 0;
184} 205}
185 206
@@ -242,7 +263,7 @@ EXPORT_SYMBOL_GPL(geode_mfgpt_alloc_timer);
242static unsigned int mfgpt_tick_mode = CLOCK_EVT_MODE_SHUTDOWN; 263static unsigned int mfgpt_tick_mode = CLOCK_EVT_MODE_SHUTDOWN;
243static u16 mfgpt_event_clock; 264static u16 mfgpt_event_clock;
244 265
245static int irq = 7; 266static int irq;
246static int __init mfgpt_setup(char *str) 267static int __init mfgpt_setup(char *str)
247{ 268{
248 get_option(&str, &irq); 269 get_option(&str, &irq);
@@ -346,7 +367,7 @@ int __init mfgpt_timer_setup(void)
346 mfgpt_event_clock = timer; 367 mfgpt_event_clock = timer;
347 368
348 /* Set up the IRQ on the MFGPT side */ 369 /* Set up the IRQ on the MFGPT side */
349 if (geode_mfgpt_setup_irq(mfgpt_event_clock, MFGPT_CMP2, irq)) { 370 if (geode_mfgpt_setup_irq(mfgpt_event_clock, MFGPT_CMP2, &irq)) {
350 printk(KERN_ERR "mfgpt-timer: Could not set up IRQ %d\n", irq); 371 printk(KERN_ERR "mfgpt-timer: Could not set up IRQ %d\n", irq);
351 return -EIO; 372 return -EIO;
352 } 373 }
@@ -374,13 +395,14 @@ int __init mfgpt_timer_setup(void)
374 &mfgpt_clockevent); 395 &mfgpt_clockevent);
375 396
376 printk(KERN_INFO 397 printk(KERN_INFO
377 "mfgpt-timer: registering the MFGPT timer as a clock event.\n"); 398 "mfgpt-timer: Registering MFGPT timer %d as a clock event, using IRQ %d\n",
399 timer, irq);
378 clockevents_register_device(&mfgpt_clockevent); 400 clockevents_register_device(&mfgpt_clockevent);
379 401
380 return 0; 402 return 0;
381 403
382err: 404err:
383 geode_mfgpt_release_irq(mfgpt_event_clock, MFGPT_CMP2, irq); 405 geode_mfgpt_release_irq(mfgpt_event_clock, MFGPT_CMP2, &irq);
384 printk(KERN_ERR 406 printk(KERN_ERR
385 "mfgpt-timer: Unable to set up the MFGPT clock source\n"); 407 "mfgpt-timer: Unable to set up the MFGPT clock source\n");
386 return -EIO; 408 return -EIO;
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 9fd809552447..e43938086885 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -131,7 +131,7 @@ static int msr_open(struct inode *inode, struct file *file)
131 ret = -EIO; /* MSR not supported */ 131 ret = -EIO; /* MSR not supported */
132out: 132out:
133 unlock_kernel(); 133 unlock_kernel();
134 return 0; 134 return ret;
135} 135}
136 136
137/* 137/*
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c
index ac6d51222e7d..abb78a2cc4ad 100644
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/nmi.c
@@ -114,6 +114,23 @@ static __init void nmi_cpu_busy(void *data)
114} 114}
115#endif 115#endif
116 116
117static void report_broken_nmi(int cpu, int *prev_nmi_count)
118{
119 printk(KERN_CONT "\n");
120
121 printk(KERN_WARNING
122 "WARNING: CPU#%d: NMI appears to be stuck (%d->%d)!\n",
123 cpu, prev_nmi_count[cpu], get_nmi_count(cpu));
124
125 printk(KERN_WARNING
126 "Please report this to bugzilla.kernel.org,\n");
127 printk(KERN_WARNING
128 "and attach the output of the 'dmesg' command.\n");
129
130 per_cpu(wd_enabled, cpu) = 0;
131 atomic_dec(&nmi_active);
132}
133
117int __init check_nmi_watchdog(void) 134int __init check_nmi_watchdog(void)
118{ 135{
119 unsigned int *prev_nmi_count; 136 unsigned int *prev_nmi_count;
@@ -141,15 +158,8 @@ int __init check_nmi_watchdog(void)
141 for_each_online_cpu(cpu) { 158 for_each_online_cpu(cpu) {
142 if (!per_cpu(wd_enabled, cpu)) 159 if (!per_cpu(wd_enabled, cpu))
143 continue; 160 continue;
144 if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5) { 161 if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5)
145 printk(KERN_WARNING "WARNING: CPU#%d: NMI " 162 report_broken_nmi(cpu, prev_nmi_count);
146 "appears to be stuck (%d->%d)!\n",
147 cpu,
148 prev_nmi_count[cpu],
149 get_nmi_count(cpu));
150 per_cpu(wd_enabled, cpu) = 0;
151 atomic_dec(&nmi_active);
152 }
153 } 163 }
154 endflag = 1; 164 endflag = 1;
155 if (!atomic_read(&nmi_active)) { 165 if (!atomic_read(&nmi_active)) {
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 53bc653ed5ca..3b7a1ddcc0bc 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -95,7 +95,6 @@ static inline void play_dead(void)
95{ 95{
96 /* This must be done before dead CPU ack */ 96 /* This must be done before dead CPU ack */
97 cpu_exit_clear(); 97 cpu_exit_clear();
98 wbinvd();
99 mb(); 98 mb();
100 /* Ack it */ 99 /* Ack it */
101 __get_cpu_var(cpu_state) = CPU_DEAD; 100 __get_cpu_var(cpu_state) = CPU_DEAD;
@@ -104,8 +103,8 @@ static inline void play_dead(void)
104 * With physical CPU hotplug, we should halt the cpu 103 * With physical CPU hotplug, we should halt the cpu
105 */ 104 */
106 local_irq_disable(); 105 local_irq_disable();
107 while (1) 106 /* mask all interrupts, flush any and all caches, and halt */
108 halt(); 107 wbinvd_halt();
109} 108}
110#else 109#else
111static inline void play_dead(void) 110static inline void play_dead(void)
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 3fb62a7d9a16..71553b664e2a 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -93,14 +93,13 @@ DECLARE_PER_CPU(int, cpu_state);
93static inline void play_dead(void) 93static inline void play_dead(void)
94{ 94{
95 idle_task_exit(); 95 idle_task_exit();
96 wbinvd();
97 mb(); 96 mb();
98 /* Ack it */ 97 /* Ack it */
99 __get_cpu_var(cpu_state) = CPU_DEAD; 98 __get_cpu_var(cpu_state) = CPU_DEAD;
100 99
101 local_irq_disable(); 100 local_irq_disable();
102 while (1) 101 /* mask all interrupts, flush any and all caches, and halt */
103 halt(); 102 wbinvd_halt();
104} 103}
105#else 104#else
106static inline void play_dead(void) 105static inline void play_dead(void)
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 68b48e3fbcbd..a4656adab53b 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -445,7 +445,7 @@ static void __init reserve_early_setup_data(void)
445 * @size: Size of the crashkernel memory to reserve. 445 * @size: Size of the crashkernel memory to reserve.
446 * Returns the base address on success, and -1ULL on failure. 446 * Returns the base address on success, and -1ULL on failure.
447 */ 447 */
448unsigned long long find_and_reserve_crashkernel(unsigned long long size) 448unsigned long long __init find_and_reserve_crashkernel(unsigned long long size)
449{ 449{
450 const unsigned long long alignment = 16<<20; /* 16M */ 450 const unsigned long long alignment = 16<<20; /* 16M */
451 unsigned long long start = 0LL; 451 unsigned long long start = 0LL;
diff --git a/arch/x86/kernel/signal_64.c b/arch/x86/kernel/signal_64.c
index b45ef8ddd651..ca316b5b742c 100644
--- a/arch/x86/kernel/signal_64.c
+++ b/arch/x86/kernel/signal_64.c
@@ -104,7 +104,16 @@ static inline int restore_i387(struct _fpstate __user *buf)
104 clts(); 104 clts();
105 task_thread_info(current)->status |= TS_USEDFPU; 105 task_thread_info(current)->status |= TS_USEDFPU;
106 } 106 }
107 return restore_fpu_checking((__force struct i387_fxsave_struct *)buf); 107 err = restore_fpu_checking((__force struct i387_fxsave_struct *)buf);
108 if (unlikely(err)) {
109 /*
110 * Encountered an error while doing the restore from the
111 * user buffer, clear the fpu state.
112 */
113 clear_fpu(tsk);
114 clear_used_math();
115 }
116 return err;
108} 117}
109 118
110/* 119/*
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 91055d7fc1b0..a8fb8a980fae 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -994,17 +994,7 @@ int __cpuinit native_cpu_up(unsigned int cpu)
994 flush_tlb_all(); 994 flush_tlb_all();
995 low_mappings = 1; 995 low_mappings = 1;
996 996
997#ifdef CONFIG_X86_PC
998 if (def_to_bigsmp && apicid > 8) {
999 printk(KERN_WARNING
1000 "More than 8 CPUs detected - skipping them.\n"
1001 "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n");
1002 err = -1;
1003 } else
1004 err = do_boot_cpu(apicid, cpu);
1005#else
1006 err = do_boot_cpu(apicid, cpu); 997 err = do_boot_cpu(apicid, cpu);
1007#endif
1008 998
1009 zap_low_mappings(); 999 zap_low_mappings();
1010 low_mappings = 0; 1000 low_mappings = 0;
@@ -1058,6 +1048,34 @@ static __init void disable_smp(void)
1058static int __init smp_sanity_check(unsigned max_cpus) 1048static int __init smp_sanity_check(unsigned max_cpus)
1059{ 1049{
1060 preempt_disable(); 1050 preempt_disable();
1051
1052#if defined(CONFIG_X86_PC) && defined(CONFIG_X86_32)
1053 if (def_to_bigsmp && nr_cpu_ids > 8) {
1054 unsigned int cpu;
1055 unsigned nr;
1056
1057 printk(KERN_WARNING
1058 "More than 8 CPUs detected - skipping them.\n"
1059 "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n");
1060
1061 nr = 0;
1062 for_each_present_cpu(cpu) {
1063 if (nr >= 8)
1064 cpu_clear(cpu, cpu_present_map);
1065 nr++;
1066 }
1067
1068 nr = 0;
1069 for_each_possible_cpu(cpu) {
1070 if (nr >= 8)
1071 cpu_clear(cpu, cpu_possible_map);
1072 nr++;
1073 }
1074
1075 nr_cpu_ids = 8;
1076 }
1077#endif
1078
1061 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) { 1079 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
1062 printk(KERN_WARNING "weird, boot CPU (#%d) not listed" 1080 printk(KERN_WARNING "weird, boot CPU (#%d) not listed"
1063 "by the BIOS.\n", hard_smp_processor_id()); 1081 "by the BIOS.\n", hard_smp_processor_id());
@@ -1386,17 +1404,3 @@ void __cpu_die(unsigned int cpu)
1386 BUG(); 1404 BUG();
1387} 1405}
1388#endif 1406#endif
1389
1390/*
1391 * If the BIOS enumerates physical processors before logical,
1392 * maxcpus=N at enumeration-time can be used to disable HT.
1393 */
1394static int __init parse_maxcpus(char *arg)
1395{
1396 extern unsigned int maxcpus;
1397
1398 if (arg)
1399 maxcpus = simple_strtoul(arg, NULL, 0);
1400 return 0;
1401}
1402early_param("maxcpus", parse_maxcpus);
diff --git a/arch/x86/kernel/smpcommon.c b/arch/x86/kernel/smpcommon.c
index 99941b37eca0..397e309839dd 100644
--- a/arch/x86/kernel/smpcommon.c
+++ b/arch/x86/kernel/smpcommon.c
@@ -8,18 +8,21 @@
8DEFINE_PER_CPU(unsigned long, this_cpu_off); 8DEFINE_PER_CPU(unsigned long, this_cpu_off);
9EXPORT_PER_CPU_SYMBOL(this_cpu_off); 9EXPORT_PER_CPU_SYMBOL(this_cpu_off);
10 10
11/* Initialize the CPU's GDT. This is either the boot CPU doing itself 11/*
12 (still using the master per-cpu area), or a CPU doing it for a 12 * Initialize the CPU's GDT. This is either the boot CPU doing itself
13 secondary which will soon come up. */ 13 * (still using the master per-cpu area), or a CPU doing it for a
14 * secondary which will soon come up.
15 */
14__cpuinit void init_gdt(int cpu) 16__cpuinit void init_gdt(int cpu)
15{ 17{
16 struct desc_struct *gdt = get_cpu_gdt_table(cpu); 18 struct desc_struct gdt;
17 19
18 pack_descriptor(&gdt[GDT_ENTRY_PERCPU], 20 pack_descriptor(&gdt, __per_cpu_offset[cpu], 0xFFFFF,
19 __per_cpu_offset[cpu], 0xFFFFF,
20 0x2 | DESCTYPE_S, 0x8); 21 0x2 | DESCTYPE_S, 0x8);
22 gdt.s = 1;
21 23
22 gdt[GDT_ENTRY_PERCPU].s = 1; 24 write_gdt_entry(get_cpu_gdt_table(cpu),
25 GDT_ENTRY_PERCPU, &gdt, DESCTYPE_S);
23 26
24 per_cpu(this_cpu_off, cpu) = __per_cpu_offset[cpu]; 27 per_cpu(this_cpu_off, cpu) = __per_cpu_offset[cpu];
25 per_cpu(cpu_number, cpu) = cpu; 28 per_cpu(cpu_number, cpu) = cpu;
diff --git a/arch/x86/kernel/traps_64.c b/arch/x86/kernel/traps_64.c
index 3f18d73f420c..513caaca7115 100644
--- a/arch/x86/kernel/traps_64.c
+++ b/arch/x86/kernel/traps_64.c
@@ -1131,7 +1131,14 @@ asmlinkage void math_state_restore(void)
1131 } 1131 }
1132 1132
1133 clts(); /* Allow maths ops (or we recurse) */ 1133 clts(); /* Allow maths ops (or we recurse) */
1134 restore_fpu_checking(&me->thread.xstate->fxsave); 1134 /*
1135 * Paranoid restore. send a SIGSEGV if we fail to restore the state.
1136 */
1137 if (unlikely(restore_fpu_checking(&me->thread.xstate->fxsave))) {
1138 stts();
1139 force_sig(SIGSEGV, me);
1140 return;
1141 }
1135 task_thread_info(me)->status |= TS_USEDFPU; 1142 task_thread_info(me)->status |= TS_USEDFPU;
1136 me->fpu_counter++; 1143 me->fpu_counter++;
1137} 1144}
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c
index 41e01b145c48..594ef47f0a63 100644
--- a/arch/x86/kernel/visws_quirks.c
+++ b/arch/x86/kernel/visws_quirks.c
@@ -184,8 +184,6 @@ static int __init visws_get_smp_config(unsigned int early)
184 return 1; 184 return 1;
185} 185}
186 186
187extern unsigned int __cpuinitdata maxcpus;
188
189/* 187/*
190 * The Visual Workstation is Intel MP compliant in the hardware 188 * The Visual Workstation is Intel MP compliant in the hardware
191 * sense, but it doesn't have a BIOS(-configuration table). 189 * sense, but it doesn't have a BIOS(-configuration table).
@@ -244,8 +242,8 @@ static int __init visws_find_smp_config(unsigned int reserve)
244 ncpus = CO_CPU_MAX; 242 ncpus = CO_CPU_MAX;
245 } 243 }
246 244
247 if (ncpus > maxcpus) 245 if (ncpus > setup_max_cpus)
248 ncpus = maxcpus; 246 ncpus = setup_max_cpus;
249 247
250#ifdef CONFIG_X86_LOCAL_APIC 248#ifdef CONFIG_X86_LOCAL_APIC
251 smp_found_config = 1; 249 smp_found_config = 1;
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 129618ca0ea2..a87ea0e4b3dc 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -60,7 +60,7 @@ static unsigned long dma_reserve __initdata;
60 60
61DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 61DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
62 62
63int direct_gbpages __meminitdata 63int direct_gbpages
64#ifdef CONFIG_DIRECT_GBPAGES 64#ifdef CONFIG_DIRECT_GBPAGES
65 = 1 65 = 1
66#endif 66#endif
@@ -88,7 +88,11 @@ early_param("gbpages", parse_direct_gbpages_on);
88 88
89int after_bootmem; 89int after_bootmem;
90 90
91static __init void *spp_getpage(void) 91/*
92 * NOTE: This function is marked __ref because it calls __init function
93 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
94 */
95static __ref void *spp_getpage(void)
92{ 96{
93 void *ptr; 97 void *ptr;
94 98
@@ -314,6 +318,7 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
314{ 318{
315 unsigned long pages = 0; 319 unsigned long pages = 0;
316 unsigned long last_map_addr = end; 320 unsigned long last_map_addr = end;
321 unsigned long start = address;
317 322
318 int i = pmd_index(address); 323 int i = pmd_index(address);
319 324
@@ -334,6 +339,9 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
334 if (!pmd_large(*pmd)) 339 if (!pmd_large(*pmd))
335 last_map_addr = phys_pte_update(pmd, address, 340 last_map_addr = phys_pte_update(pmd, address,
336 end); 341 end);
342 /* Count entries we're using from level2_ident_pgt */
343 if (start == 0)
344 pages++;
337 continue; 345 continue;
338 } 346 }
339 347
diff --git a/arch/x86/mm/pageattr-test.c b/arch/x86/mm/pageattr-test.c
index 0dcd42eb94e6..d4aa503caaa2 100644
--- a/arch/x86/mm/pageattr-test.c
+++ b/arch/x86/mm/pageattr-test.c
@@ -221,8 +221,7 @@ static int pageattr_test(void)
221 failed += print_split(&sc); 221 failed += print_split(&sc);
222 222
223 if (failed) { 223 if (failed) {
224 printk(KERN_ERR "NOT PASSED. Please report.\n"); 224 WARN(1, KERN_ERR "NOT PASSED. Please report.\n");
225 WARN_ON(1);
226 return -EINVAL; 225 return -EINVAL;
227 } else { 226 } else {
228 if (print) 227 if (print)
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 65c6e46bf059..f5f5154ea11e 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -55,13 +55,19 @@ static void split_page_count(int level)
55 55
56int arch_report_meminfo(char *page) 56int arch_report_meminfo(char *page)
57{ 57{
58 int n = sprintf(page, "DirectMap4k: %8lu\n" 58 int n = sprintf(page, "DirectMap4k: %8lu kB\n",
59 "DirectMap2M: %8lu\n", 59 direct_pages_count[PG_LEVEL_4K] << 2);
60 direct_pages_count[PG_LEVEL_4K], 60#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
61 direct_pages_count[PG_LEVEL_2M]); 61 n += sprintf(page + n, "DirectMap2M: %8lu kB\n",
62 direct_pages_count[PG_LEVEL_2M] << 11);
63#else
64 n += sprintf(page + n, "DirectMap4M: %8lu kB\n",
65 direct_pages_count[PG_LEVEL_2M] << 12);
66#endif
62#ifdef CONFIG_X86_64 67#ifdef CONFIG_X86_64
63 n += sprintf(page + n, "DirectMap1G: %8lu\n", 68 if (direct_gbpages)
64 direct_pages_count[PG_LEVEL_1G]); 69 n += sprintf(page + n, "DirectMap1G: %8lu kB\n",
70 direct_pages_count[PG_LEVEL_1G] << 20);
65#endif 71#endif
66 return n; 72 return n;
67} 73}
@@ -592,10 +598,9 @@ repeat:
592 if (!pte_val(old_pte)) { 598 if (!pte_val(old_pte)) {
593 if (!primary) 599 if (!primary)
594 return 0; 600 return 0;
595 printk(KERN_WARNING "CPA: called for zero pte. " 601 WARN(1, KERN_WARNING "CPA: called for zero pte. "
596 "vaddr = %lx cpa->vaddr = %lx\n", address, 602 "vaddr = %lx cpa->vaddr = %lx\n", address,
597 cpa->vaddr); 603 cpa->vaddr);
598 WARN_ON(1);
599 return -EINVAL; 604 return -EINVAL;
600 } 605 }
601 606
diff --git a/arch/x86/mm/srat_32.c b/arch/x86/mm/srat_32.c
index 1eb2973a301c..16ae70fc57e7 100644
--- a/arch/x86/mm/srat_32.c
+++ b/arch/x86/mm/srat_32.c
@@ -178,7 +178,7 @@ void acpi_numa_arch_fixup(void)
178 * start of the node, and that the current "end" address is after 178 * start of the node, and that the current "end" address is after
179 * the previous one. 179 * the previous one.
180 */ 180 */
181static __init void node_read_chunk(int nid, struct node_memory_chunk_s *memory_chunk) 181static __init int node_read_chunk(int nid, struct node_memory_chunk_s *memory_chunk)
182{ 182{
183 /* 183 /*
184 * Only add present memory as told by the e820. 184 * Only add present memory as told by the e820.
@@ -189,10 +189,10 @@ static __init void node_read_chunk(int nid, struct node_memory_chunk_s *memory_c
189 if (memory_chunk->start_pfn >= max_pfn) { 189 if (memory_chunk->start_pfn >= max_pfn) {
190 printk(KERN_INFO "Ignoring SRAT pfns: %08lx - %08lx\n", 190 printk(KERN_INFO "Ignoring SRAT pfns: %08lx - %08lx\n",
191 memory_chunk->start_pfn, memory_chunk->end_pfn); 191 memory_chunk->start_pfn, memory_chunk->end_pfn);
192 return; 192 return -1;
193 } 193 }
194 if (memory_chunk->nid != nid) 194 if (memory_chunk->nid != nid)
195 return; 195 return -1;
196 196
197 if (!node_has_online_mem(nid)) 197 if (!node_has_online_mem(nid))
198 node_start_pfn[nid] = memory_chunk->start_pfn; 198 node_start_pfn[nid] = memory_chunk->start_pfn;
@@ -202,6 +202,8 @@ static __init void node_read_chunk(int nid, struct node_memory_chunk_s *memory_c
202 202
203 if (node_end_pfn[nid] < memory_chunk->end_pfn) 203 if (node_end_pfn[nid] < memory_chunk->end_pfn)
204 node_end_pfn[nid] = memory_chunk->end_pfn; 204 node_end_pfn[nid] = memory_chunk->end_pfn;
205
206 return 0;
205} 207}
206 208
207int __init get_memcfg_from_srat(void) 209int __init get_memcfg_from_srat(void)
@@ -259,7 +261,9 @@ int __init get_memcfg_from_srat(void)
259 printk(KERN_DEBUG 261 printk(KERN_DEBUG
260 "chunk %d nid %d start_pfn %08lx end_pfn %08lx\n", 262 "chunk %d nid %d start_pfn %08lx end_pfn %08lx\n",
261 j, chunk->nid, chunk->start_pfn, chunk->end_pfn); 263 j, chunk->nid, chunk->start_pfn, chunk->end_pfn);
262 node_read_chunk(chunk->nid, chunk); 264 if (node_read_chunk(chunk->nid, chunk))
265 continue;
266
263 e820_register_active_regions(chunk->nid, chunk->start_pfn, 267 e820_register_active_regions(chunk->nid, chunk->start_pfn,
264 min(chunk->end_pfn, max_pfn)); 268 min(chunk->end_pfn, max_pfn));
265 } 269 }
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 23faaa890ffc..2bd5c53f6386 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -365,7 +365,7 @@ static void __init pci_mmcfg_reject_broken(int early)
365 return; 365 return;
366 366
367reject: 367reject:
368 printk(KERN_ERR "PCI: Not using MMCONFIG.\n"); 368 printk(KERN_INFO "PCI: Not using MMCONFIG.\n");
369 pci_mmcfg_arch_free(); 369 pci_mmcfg_arch_free();
370 kfree(pci_mmcfg_config); 370 kfree(pci_mmcfg_config);
371 pci_mmcfg_config = NULL; 371 pci_mmcfg_config = NULL;