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-rw-r--r--arch/alpha/mm/numa.c2
-rw-r--r--arch/arm/common/scoop.c2
-rw-r--r--arch/arm/mach-bcmring/include/csp/reg.h2
-rw-r--r--arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h2
-rw-r--r--arch/arm/mach-bcmring/include/mach/csp/mm_addr.h2
-rw-r--r--arch/arm/mach-bcmring/include/mach/dma.h2
-rw-r--r--arch/arm/mach-lh7a40x/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-orion5x/pci.c2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmld.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmt5.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtc.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmte2.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtx.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmz72.h2
-rw-r--r--arch/arm/mach-s3c2400/Kconfig6
-rw-r--r--arch/arm/mach-s3c2410/Kconfig2
-rw-r--r--arch/arm/mach-s3c2412/Kconfig4
-rw-r--r--arch/arm/mach-s3c2440/Kconfig3
-rw-r--r--arch/arm/mach-s3c2442/Kconfig4
-rw-r--r--arch/arm/mach-s3c2443/Kconfig2
-rw-r--r--arch/arm/mach-s3c6400/Kconfig2
-rw-r--r--arch/arm/mach-s3c6400/setup-sdhci.c2
-rw-r--r--arch/arm/mach-s3c6410/Kconfig2
-rw-r--r--arch/arm/mach-s3c6410/setup-sdhci.c2
-rw-r--r--arch/arm/mach-s5pc100/Kconfig2
-rw-r--r--arch/arm/mach-sa1100/dma.c2
-rw-r--r--arch/arm/mach-u300/include/mach/u300-regs.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx3.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mxc91231.h2
-rw-r--r--arch/arm/plat-mxc/pwm.c2
-rw-r--r--arch/arm/plat-omap/dma.c2
-rw-r--r--arch/arm/plat-omap/include/plat/omap16xx.h2
-rw-r--r--arch/arm/plat-s3c/Kconfig2
-rw-r--r--arch/arm/plat-s3c24xx/Kconfig2
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/map.h2
-rw-r--r--arch/arm/plat-s3c64xx/Kconfig2
-rw-r--r--arch/arm/plat-s5pc1xx/Kconfig2
-rw-r--r--arch/avr32/boards/hammerhead/Kconfig2
-rw-r--r--arch/blackfin/kernel/traps.c2
-rw-r--r--arch/blackfin/mach-bf518/include/mach/defBF51x_base.h4
-rw-r--r--arch/blackfin/mach-bf527/include/mach/defBF52x_base.h4
-rw-r--r--arch/blackfin/mach-bf537/include/mach/defBF534.h4
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF544.h4
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF547.h4
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF548.h4
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF549.h4
-rw-r--r--arch/cris/arch-v10/mm/fault.c3
-rw-r--r--arch/cris/arch-v10/mm/tlb.c22
-rw-r--r--arch/cris/mm/fault.c2
-rw-r--r--arch/ia64/hp/common/sba_iommu.c2
-rw-r--r--arch/ia64/ia32/ia32_entry.S2
-rw-r--r--arch/ia64/include/asm/perfmon_default_smpl.h2
-rw-r--r--arch/ia64/include/asm/sn/shubio.h2
-rw-r--r--arch/ia64/kernel/esi.c2
-rw-r--r--arch/ia64/kernel/perfmon.c2
-rw-r--r--arch/m68k/ifpsp060/src/fpsp.S28
-rw-r--r--arch/m68k/ifpsp060/src/pfpsp.S26
-rw-r--r--arch/m68k/include/asm/bootinfo.h2
-rw-r--r--arch/microblaze/lib/memcpy.c2
-rw-r--r--arch/microblaze/lib/memmove.c2
-rw-r--r--arch/microblaze/lib/memset.c2
-rw-r--r--arch/mips/include/asm/mach-pnx833x/gpio.h2
-rw-r--r--arch/mips/include/asm/sgi/ioc.h2
-rw-r--r--arch/mips/include/asm/sibyte/sb1250_mac.h2
-rw-r--r--arch/mips/include/asm/sn/sn0/hubio.h2
-rw-r--r--arch/mips/kernel/smtc.c2
-rw-r--r--arch/mips/math-emu/dp_sub.c2
-rw-r--r--arch/mips/txx9/generic/smsc_fdc37m81x.c2
-rw-r--r--arch/parisc/kernel/perf.c2
-rw-r--r--arch/powerpc/include/asm/reg_fsl_emb.h2
-rw-r--r--arch/powerpc/kernel/kgdb.c2
-rw-r--r--arch/powerpc/kernel/tau_6xx.c2
-rw-r--r--arch/powerpc/kernel/vdso.c2
-rw-r--r--arch/powerpc/oprofile/op_model_cell.c6
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pci.c2
-rw-r--r--arch/powerpc/platforms/powermac/pci.c2
-rw-r--r--arch/powerpc/sysdev/dart_iommu.c2
-rw-r--r--arch/s390/math-emu/math.c4
-rw-r--r--arch/sh/include/mach-common/mach/titan.h2
-rw-r--r--arch/x86/include/asm/desc_defs.h4
-rw-r--r--arch/x86/include/asm/mmzone_32.h2
-rw-r--r--arch/x86/include/asm/sigcontext.h4
-rw-r--r--arch/x86/include/asm/uv/uv_bau.h2
-rw-r--r--arch/x86/kernel/acpi/boot.c2
-rw-r--r--arch/x86/kernel/amd_iommu.c4
-rw-r--r--arch/x86/kernel/cpu/perf_event.c2
-rw-r--r--arch/x86/kernel/kprobes.c4
-rw-r--r--arch/x86/mm/kmmio.c4
88 files changed, 114 insertions, 172 deletions
diff --git a/arch/alpha/mm/numa.c b/arch/alpha/mm/numa.c
index 10b403554b65..7b2c56d8f930 100644
--- a/arch/alpha/mm/numa.c
+++ b/arch/alpha/mm/numa.c
@@ -197,7 +197,7 @@ setup_memory_node(int nid, void *kernel_end)
197 } 197 }
198 198
199 if (bootmap_start == -1) 199 if (bootmap_start == -1)
200 panic("couldn't find a contigous place for the bootmap"); 200 panic("couldn't find a contiguous place for the bootmap");
201 201
202 /* Allocate the bootmap and mark the whole MM as reserved. */ 202 /* Allocate the bootmap and mark the whole MM as reserved. */
203 bootmap_size = init_bootmem_node(NODE_DATA(nid), bootmap_start, 203 bootmap_size = init_bootmem_node(NODE_DATA(nid), bootmap_start,
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c
index 7713a08bb10c..37bda5f3dde3 100644
--- a/arch/arm/common/scoop.c
+++ b/arch/arm/common/scoop.c
@@ -82,7 +82,7 @@ static int scoop_gpio_get(struct gpio_chip *chip, unsigned offset)
82{ 82{
83 struct scoop_dev *sdev = container_of(chip, struct scoop_dev, gpio); 83 struct scoop_dev *sdev = container_of(chip, struct scoop_dev, gpio);
84 84
85 /* XXX: I'm usure, but it seems so */ 85 /* XXX: I'm unsure, but it seems so */
86 return ioread16(sdev->base + SCOOP_GPRR) & (1 << (offset + 1)); 86 return ioread16(sdev->base + SCOOP_GPRR) & (1 << (offset + 1));
87} 87}
88 88
diff --git a/arch/arm/mach-bcmring/include/csp/reg.h b/arch/arm/mach-bcmring/include/csp/reg.h
index e5f60bf5a1f3..56654d23c3d7 100644
--- a/arch/arm/mach-bcmring/include/csp/reg.h
+++ b/arch/arm/mach-bcmring/include/csp/reg.h
@@ -16,7 +16,7 @@
16/** 16/**
17* @file reg.h 17* @file reg.h
18* 18*
19* @brief Generic register defintions used in CSP 19* @brief Generic register definitions used in CSP
20*/ 20*/
21/****************************************************************************/ 21/****************************************************************************/
22 22
diff --git a/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h b/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h
index 375066ad0186..cbf334d1c761 100644
--- a/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h
+++ b/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h
@@ -83,7 +83,7 @@ typedef struct {
83* @brief Get next available transaction width 83* @brief Get next available transaction width
84* 84*
85* 85*
86* @return On sucess : Next avail able transaction width 86* @return On success : Next available transaction width
87* On failure : dmacHw_TRANSACTION_WIDTH_8 87* On failure : dmacHw_TRANSACTION_WIDTH_8
88* 88*
89* @note 89* @note
diff --git a/arch/arm/mach-bcmring/include/mach/csp/mm_addr.h b/arch/arm/mach-bcmring/include/mach/csp/mm_addr.h
index 86bb58d4f58c..ad58cf873377 100644
--- a/arch/arm/mach-bcmring/include/mach/csp/mm_addr.h
+++ b/arch/arm/mach-bcmring/include/mach/csp/mm_addr.h
@@ -16,7 +16,7 @@
16/** 16/**
17* @file mm_addr.h 17* @file mm_addr.h
18* 18*
19* @brief Memory Map address defintions 19* @brief Memory Map address definitions
20* 20*
21* @note 21* @note
22* None 22* None
diff --git a/arch/arm/mach-bcmring/include/mach/dma.h b/arch/arm/mach-bcmring/include/mach/dma.h
index 847980c85c88..1f2c5319c056 100644
--- a/arch/arm/mach-bcmring/include/mach/dma.h
+++ b/arch/arm/mach-bcmring/include/mach/dma.h
@@ -651,7 +651,7 @@ int dma_map_add_region(DMA_MemMap_t *memMap, /* Stores state information about t
651/** 651/**
652* Creates a descriptor ring from a memory mapping. 652* Creates a descriptor ring from a memory mapping.
653* 653*
654* @return 0 on sucess, error code otherwise. 654* @return 0 on success, error code otherwise.
655*/ 655*/
656/****************************************************************************/ 656/****************************************************************************/
657 657
diff --git a/arch/arm/mach-lh7a40x/include/mach/hardware.h b/arch/arm/mach-lh7a40x/include/mach/hardware.h
index 48e827d2fa56..59d2ace35217 100644
--- a/arch/arm/mach-lh7a40x/include/mach/hardware.h
+++ b/arch/arm/mach-lh7a40x/include/mach/hardware.h
@@ -31,7 +31,7 @@
31/* 31/*
32 * This __REG() version gives the same results as the one above, except 32 * This __REG() version gives the same results as the one above, except
33 * that we are fooling gcc somehow so it generates far better and smaller 33 * that we are fooling gcc somehow so it generates far better and smaller
34 * assembly code for access to contigous registers. It's a shame that gcc 34 * assembly code for access to contiguous registers. It's a shame that gcc
35 * doesn't guess this by itself. 35 * doesn't guess this by itself.
36 */ 36 */
37#include <asm/types.h> 37#include <asm/types.h>
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 36dc5413cc97..bdf96eb523bc 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -463,7 +463,7 @@ static void __init orion5x_setup_pci_wins(struct mbus_dram_target_info *dram)
463 writel(win_enable, PCI_BAR_ENABLE); 463 writel(win_enable, PCI_BAR_ENABLE);
464 464
465 /* 465 /*
466 * Disable automatic update of address remaping when writing to BARs. 466 * Disable automatic update of address remapping when writing to BARs.
467 */ 467 */
468 orion5x_setbits(PCI_ADDR_DECODE_CTRL, 1); 468 orion5x_setbits(PCI_ADDR_DECODE_CTRL, 1);
469} 469}
diff --git a/arch/arm/mach-pxa/include/mach/palmld.h b/arch/arm/mach-pxa/include/mach/palmld.h
index 8721b8010221..ae536e86d8e8 100644
--- a/arch/arm/mach-pxa/include/mach/palmld.h
+++ b/arch/arm/mach-pxa/include/mach/palmld.h
@@ -91,7 +91,7 @@
91/* BATTERY */ 91/* BATTERY */
92#define PALMLD_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */ 92#define PALMLD_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */
93#define PALMLD_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */ 93#define PALMLD_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */
94#define PALMLD_BAT_MAX_CURRENT 0 /* unknokn */ 94#define PALMLD_BAT_MAX_CURRENT 0 /* unknown */
95#define PALMLD_BAT_MIN_CURRENT 0 /* unknown */ 95#define PALMLD_BAT_MIN_CURRENT 0 /* unknown */
96#define PALMLD_BAT_MAX_CHARGE 1 /* unknown */ 96#define PALMLD_BAT_MAX_CHARGE 1 /* unknown */
97#define PALMLD_BAT_MIN_CHARGE 1 /* unknown */ 97#define PALMLD_BAT_MIN_CHARGE 1 /* unknown */
diff --git a/arch/arm/mach-pxa/include/mach/palmt5.h b/arch/arm/mach-pxa/include/mach/palmt5.h
index d15662aba008..6baf7469d4ec 100644
--- a/arch/arm/mach-pxa/include/mach/palmt5.h
+++ b/arch/arm/mach-pxa/include/mach/palmt5.h
@@ -66,7 +66,7 @@
66/* BATTERY */ 66/* BATTERY */
67#define PALMT5_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ 67#define PALMT5_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
68#define PALMT5_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ 68#define PALMT5_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
69#define PALMT5_BAT_MAX_CURRENT 0 /* unknokn */ 69#define PALMT5_BAT_MAX_CURRENT 0 /* unknown */
70#define PALMT5_BAT_MIN_CURRENT 0 /* unknown */ 70#define PALMT5_BAT_MIN_CURRENT 0 /* unknown */
71#define PALMT5_BAT_MAX_CHARGE 1 /* unknown */ 71#define PALMT5_BAT_MAX_CHARGE 1 /* unknown */
72#define PALMT5_BAT_MIN_CHARGE 1 /* unknown */ 72#define PALMT5_BAT_MIN_CHARGE 1 /* unknown */
diff --git a/arch/arm/mach-pxa/include/mach/palmtc.h b/arch/arm/mach-pxa/include/mach/palmtc.h
index 3dc9b074ab46..3f9dd3fd4638 100644
--- a/arch/arm/mach-pxa/include/mach/palmtc.h
+++ b/arch/arm/mach-pxa/include/mach/palmtc.h
@@ -68,7 +68,7 @@
68/* BATTERY */ 68/* BATTERY */
69#define PALMTC_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */ 69#define PALMTC_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */
70#define PALMTC_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */ 70#define PALMTC_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */
71#define PALMTC_BAT_MAX_CURRENT 0 /* unknokn */ 71#define PALMTC_BAT_MAX_CURRENT 0 /* unknown */
72#define PALMTC_BAT_MIN_CURRENT 0 /* unknown */ 72#define PALMTC_BAT_MIN_CURRENT 0 /* unknown */
73#define PALMTC_BAT_MAX_CHARGE 1 /* unknown */ 73#define PALMTC_BAT_MAX_CHARGE 1 /* unknown */
74#define PALMTC_BAT_MIN_CHARGE 1 /* unknown */ 74#define PALMTC_BAT_MIN_CHARGE 1 /* unknown */
diff --git a/arch/arm/mach-pxa/include/mach/palmte2.h b/arch/arm/mach-pxa/include/mach/palmte2.h
index 12361341f9d8..f89e989a7637 100644
--- a/arch/arm/mach-pxa/include/mach/palmte2.h
+++ b/arch/arm/mach-pxa/include/mach/palmte2.h
@@ -59,7 +59,7 @@
59/* BATTERY */ 59/* BATTERY */
60#define PALMTE2_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ 60#define PALMTE2_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
61#define PALMTE2_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ 61#define PALMTE2_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
62#define PALMTE2_BAT_MAX_CURRENT 0 /* unknokn */ 62#define PALMTE2_BAT_MAX_CURRENT 0 /* unknown */
63#define PALMTE2_BAT_MIN_CURRENT 0 /* unknown */ 63#define PALMTE2_BAT_MIN_CURRENT 0 /* unknown */
64#define PALMTE2_BAT_MAX_CHARGE 1 /* unknown */ 64#define PALMTE2_BAT_MAX_CHARGE 1 /* unknown */
65#define PALMTE2_BAT_MIN_CHARGE 1 /* unknown */ 65#define PALMTE2_BAT_MIN_CHARGE 1 /* unknown */
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index 1be0db6ed55e..10abc4f2e8e4 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -94,7 +94,7 @@
94/* BATTERY */ 94/* BATTERY */
95#define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ 95#define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
96#define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ 96#define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
97#define PALMTX_BAT_MAX_CURRENT 0 /* unknokn */ 97#define PALMTX_BAT_MAX_CURRENT 0 /* unknown */
98#define PALMTX_BAT_MIN_CURRENT 0 /* unknown */ 98#define PALMTX_BAT_MIN_CURRENT 0 /* unknown */
99#define PALMTX_BAT_MAX_CHARGE 1 /* unknown */ 99#define PALMTX_BAT_MAX_CHARGE 1 /* unknown */
100#define PALMTX_BAT_MIN_CHARGE 1 /* unknown */ 100#define PALMTX_BAT_MIN_CHARGE 1 /* unknown */
diff --git a/arch/arm/mach-pxa/include/mach/palmz72.h b/arch/arm/mach-pxa/include/mach/palmz72.h
index 2806ef69ba5a..2bbcf70dd935 100644
--- a/arch/arm/mach-pxa/include/mach/palmz72.h
+++ b/arch/arm/mach-pxa/include/mach/palmz72.h
@@ -49,7 +49,7 @@
49/* Battery */ 49/* Battery */
50#define PALMZ72_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ 50#define PALMZ72_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
51#define PALMZ72_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ 51#define PALMZ72_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
52#define PALMZ72_BAT_MAX_CURRENT 0 /* unknokn */ 52#define PALMZ72_BAT_MAX_CURRENT 0 /* unknown */
53#define PALMZ72_BAT_MIN_CURRENT 0 /* unknown */ 53#define PALMZ72_BAT_MIN_CURRENT 0 /* unknown */
54#define PALMZ72_BAT_MAX_CHARGE 1 /* unknown */ 54#define PALMZ72_BAT_MAX_CHARGE 1 /* unknown */
55#define PALMZ72_BAT_MIN_CHARGE 1 /* unknown */ 55#define PALMZ72_BAT_MIN_CHARGE 1 /* unknown */
diff --git a/arch/arm/mach-s3c2400/Kconfig b/arch/arm/mach-s3c2400/Kconfig
index deab0722836e..fdd8f5e96faf 100644
--- a/arch/arm/mach-s3c2400/Kconfig
+++ b/arch/arm/mach-s3c2400/Kconfig
@@ -1,13 +1,7 @@
1# arch/arm/mach-s3c2400/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
6 4
7
8
9menu "S3C2400 Machines" 5menu "S3C2400 Machines"
10 6
11
12endmenu 7endmenu
13
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index dd1fcc7e6708..554731868b07 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c2410/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index c2bdc4635d12..9a8c0657ae50 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c2412/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
@@ -90,6 +88,4 @@ config MACH_VSTMS
90 help 88 help
91 Say Y here if you are using an VSTMS board 89 Say Y here if you are using an VSTMS board
92 90
93
94endmenu 91endmenu
95
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index cf10e14b7b49..80879358eb2f 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c2440/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
@@ -122,4 +120,3 @@ config MACH_MINI2440
122 available via various sources. It can come with a 3.5" or 7" touch LCD. 120 available via various sources. It can come with a 3.5" or 7" touch LCD.
123 121
124endmenu 122endmenu
125
diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig
index 103e913f2258..8d3811852fc7 100644
--- a/arch/arm/mach-s3c2442/Kconfig
+++ b/arch/arm/mach-s3c2442/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c2442/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
@@ -36,6 +34,4 @@ config MACH_NEO1973_GTA02
36 help 34 help
37 Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone 35 Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
38 36
39
40endmenu 37endmenu
41
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig
index 212141baebec..4314c4424909 100644
--- a/arch/arm/mach-s3c2443/Kconfig
+++ b/arch/arm/mach-s3c2443/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c2443/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
diff --git a/arch/arm/mach-s3c6400/Kconfig b/arch/arm/mach-s3c6400/Kconfig
index 770b72067e3d..a250bf68709f 100644
--- a/arch/arm/mach-s3c6400/Kconfig
+++ b/arch/arm/mach-s3c6400/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c6400/Kconfig
2#
3# Copyright 2008 Openmoko, Inc. 1# Copyright 2008 Openmoko, Inc.
4# Simtec Electronics, Ben Dooks <ben@simtec.co.uk> 2# Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
5# 3#
diff --git a/arch/arm/mach-s3c6400/setup-sdhci.c b/arch/arm/mach-s3c6400/setup-sdhci.c
index b93dafbee1f4..1039937403be 100644
--- a/arch/arm/mach-s3c6400/setup-sdhci.c
+++ b/arch/arm/mach-s3c6400/setup-sdhci.c
@@ -30,7 +30,7 @@ char *s3c6400_hsmmc_clksrcs[4] = {
30 [0] = "hsmmc", 30 [0] = "hsmmc",
31 [1] = "hsmmc", 31 [1] = "hsmmc",
32 [2] = "mmc_bus", 32 [2] = "mmc_bus",
33 /* [3] = "48m", - note not succesfully used yet */ 33 /* [3] = "48m", - note not successfully used yet */
34}; 34};
35 35
36void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, 36void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
diff --git a/arch/arm/mach-s3c6410/Kconfig b/arch/arm/mach-s3c6410/Kconfig
index 72d4b11b2077..162f4561f80f 100644
--- a/arch/arm/mach-s3c6410/Kconfig
+++ b/arch/arm/mach-s3c6410/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s3c6410/Kconfig
2#
3# Copyright 2008 Openmoko, Inc. 1# Copyright 2008 Openmoko, Inc.
4# Copyright 2008 Simtec Electronics 2# Copyright 2008 Simtec Electronics
5# 3#
diff --git a/arch/arm/mach-s3c6410/setup-sdhci.c b/arch/arm/mach-s3c6410/setup-sdhci.c
index 20666f3bd478..816d2d9f9ef8 100644
--- a/arch/arm/mach-s3c6410/setup-sdhci.c
+++ b/arch/arm/mach-s3c6410/setup-sdhci.c
@@ -30,7 +30,7 @@ char *s3c6410_hsmmc_clksrcs[4] = {
30 [0] = "hsmmc", 30 [0] = "hsmmc",
31 [1] = "hsmmc", 31 [1] = "hsmmc",
32 [2] = "mmc_bus", 32 [2] = "mmc_bus",
33 /* [3] = "48m", - note not succesfully used yet */ 33 /* [3] = "48m", - note not successfully used yet */
34}; 34};
35 35
36 36
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index 0dd2b8c6eabe..27ec167d2808 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/mach-s5pc100/Kconfig
2#
3# Copyright 2009 Samsung Electronics Co. 1# Copyright 2009 Samsung Electronics Co.
4# Byungho Min <bhmin@samsung.com> 2# Byungho Min <bhmin@samsung.com>
5# 3#
diff --git a/arch/arm/mach-sa1100/dma.c b/arch/arm/mach-sa1100/dma.c
index cb4521a6f42d..ad660350c296 100644
--- a/arch/arm/mach-sa1100/dma.c
+++ b/arch/arm/mach-sa1100/dma.c
@@ -65,7 +65,7 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
65 65
66 66
67/** 67/**
68 * sa1100_request_dma - allocate one of the SA11x0's DMA chanels 68 * sa1100_request_dma - allocate one of the SA11x0's DMA channels
69 * @device: The SA11x0 peripheral targeted by this request 69 * @device: The SA11x0 peripheral targeted by this request
70 * @device_id: An ascii name for the claiming device 70 * @device_id: An ascii name for the claiming device
71 * @callback: Function to be called when the DMA completes 71 * @callback: Function to be called when the DMA completes
diff --git a/arch/arm/mach-u300/include/mach/u300-regs.h b/arch/arm/mach-u300/include/mach/u300-regs.h
index 88333dfb19fc..56721a0cd2af 100644
--- a/arch/arm/mach-u300/include/mach/u300-regs.h
+++ b/arch/arm/mach-u300/include/mach/u300-regs.h
@@ -6,7 +6,7 @@
6 * Copyright (C) 2006-2009 ST-Ericsson AB 6 * Copyright (C) 2006-2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2 7 * License terms: GNU General Public License (GPL) version 2
8 * Basic register address definitions in physical memory and 8 * Basic register address definitions in physical memory and
9 * some block defintions for core devices like the timer. 9 * some block definitions for core devices like the timer.
10 * Author: Linus Walleij <linus.walleij@stericsson.com> 10 * Author: Linus Walleij <linus.walleij@stericsson.com>
11 */ 11 */
12 12
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
index eaabd4e96925..e1fc6da1cd10 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
@@ -112,7 +112,7 @@ enum iomux_gp_func {
112 * setups a single pin: 112 * setups a single pin:
113 * - reserves the pin so that it is not claimed by another driver 113 * - reserves the pin so that it is not claimed by another driver
114 * - setups the iomux according to the configuration 114 * - setups the iomux according to the configuration
115 * - if the pin is configured as a GPIO, we claim it throug kernel gpiolib 115 * - if the pin is configured as a GPIO, we claim it through kernel gpiolib
116 */ 116 */
117int mxc_iomux_alloc_pin(const unsigned int pin, const char *label); 117int mxc_iomux_alloc_pin(const unsigned int pin, const char *label);
118/* 118/*
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mxc91231.h b/arch/arm/plat-mxc/include/mach/iomux-mxc91231.h
index 9f13061192c8..3887f3fe29d4 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mxc91231.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mxc91231.h
@@ -48,7 +48,7 @@
48 * setups a single pin: 48 * setups a single pin:
49 * - reserves the pin so that it is not claimed by another driver 49 * - reserves the pin so that it is not claimed by another driver
50 * - setups the iomux according to the configuration 50 * - setups the iomux according to the configuration
51 * - if the pin is configured as a GPIO, we claim it throug kernel gpiolib 51 * - if the pin is configured as a GPIO, we claim it through kernel gpiolib
52 */ 52 */
53int mxc_iomux_alloc_pin(const unsigned int pin_mode, const char *label); 53int mxc_iomux_alloc_pin(const unsigned int pin_mode, const char *label);
54/* 54/*
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 5cdbd605ac05..4ff6dfe04283 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -94,7 +94,7 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
94 * register to follow the ratio of duty_ns vs. period_ns 94 * register to follow the ratio of duty_ns vs. period_ns
95 * accordingly. 95 * accordingly.
96 * 96 *
97 * This is good enought for programming the brightness of 97 * This is good enough for programming the brightness of
98 * the LCD backlight. 98 * the LCD backlight.
99 * 99 *
100 * The real implementation would divide PERCLK[0] first by 100 * The real implementation would divide PERCLK[0] first by
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index be4ce070fb4c..d17375e06a1e 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1252,7 +1252,7 @@ static void create_dma_lch_chain(int lch_head, int lch_queue)
1252 * OMAP_DMA_DYNAMIC_CHAIN 1252 * OMAP_DMA_DYNAMIC_CHAIN
1253 * @params - Channel parameters 1253 * @params - Channel parameters
1254 * 1254 *
1255 * @return - Succes : 0 1255 * @return - Success : 0
1256 * Failure: -EINVAL/-ENOMEM 1256 * Failure: -EINVAL/-ENOMEM
1257 */ 1257 */
1258int omap_request_dma_chain(int dev_id, const char *dev_name, 1258int omap_request_dma_chain(int dev_id, const char *dev_name,
diff --git a/arch/arm/plat-omap/include/plat/omap16xx.h b/arch/arm/plat-omap/include/plat/omap16xx.h
index 0e69b504c25f..7560b4d583a3 100644
--- a/arch/arm/plat-omap/include/plat/omap16xx.h
+++ b/arch/arm/plat-omap/include/plat/omap16xx.h
@@ -124,7 +124,7 @@
124#define TIPB_SWITCH_BASE (0xfffbc800) 124#define TIPB_SWITCH_BASE (0xfffbc800)
125#define OMAP16XX_MMCSD2_SSW_MPU_CONF (TIPB_SWITCH_BASE + 0x160) 125#define OMAP16XX_MMCSD2_SSW_MPU_CONF (TIPB_SWITCH_BASE + 0x160)
126 126
127/* UART3 Registers Maping through MPU bus */ 127/* UART3 Registers Mapping through MPU bus */
128#define UART3_RHR (OMAP_UART3_BASE + 0) 128#define UART3_RHR (OMAP_UART3_BASE + 0)
129#define UART3_THR (OMAP_UART3_BASE + 0) 129#define UART3_THR (OMAP_UART3_BASE + 0)
130#define UART3_DLL (OMAP_UART3_BASE + 0) 130#define UART3_DLL (OMAP_UART3_BASE + 0)
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
index e139a72c2149..9e9d0286e48f 100644
--- a/arch/arm/plat-s3c/Kconfig
+++ b/arch/arm/plat-s3c/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/plat-s3c/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index 20fbf936bb93..342647eb91d8 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/plat-s3c24xx/Kconfig
2#
3# Copyright 2007 Simtec Electronics 1# Copyright 2007 Simtec Electronics
4# 2#
5# Licensed under GPLv2 3# Licensed under GPLv2
diff --git a/arch/arm/plat-s3c24xx/include/plat/map.h b/arch/arm/plat-s3c24xx/include/plat/map.h
index c4d133436fc7..bd534d32b993 100644
--- a/arch/arm/plat-s3c24xx/include/plat/map.h
+++ b/arch/arm/plat-s3c24xx/include/plat/map.h
@@ -64,7 +64,7 @@
64/* the calculation for the VA of this must ensure that 64/* the calculation for the VA of this must ensure that
65 * it is the same distance apart from the UART in the 65 * it is the same distance apart from the UART in the
66 * phsyical address space, as the initial mapping for the IO 66 * phsyical address space, as the initial mapping for the IO
67 * is done as a 1:1 maping. This puts it (currently) at 67 * is done as a 1:1 mapping. This puts it (currently) at
68 * 0xFA800000, which is not in the way of any current mapping 68 * 0xFA800000, which is not in the way of any current mapping
69 * by the base system. 69 * by the base system.
70*/ 70*/
diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig
index bcfa778614d8..e6da87a5885c 100644
--- a/arch/arm/plat-s3c64xx/Kconfig
+++ b/arch/arm/plat-s3c64xx/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/plat-s3c64xx/Kconfig
2#
3# Copyright 2008 Openmoko, Inc. 1# Copyright 2008 Openmoko, Inc.
4# Copyright 2008 Simtec Electronics 2# Copyright 2008 Simtec Electronics
5# Ben Dooks <ben@simtec.co.uk> 3# Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
index 1608e62b0c9d..b7b9e91c0243 100644
--- a/arch/arm/plat-s5pc1xx/Kconfig
+++ b/arch/arm/plat-s5pc1xx/Kconfig
@@ -1,5 +1,3 @@
1# arch/arm/plat-s5pc1xx/Kconfig
2#
3# Copyright 2009 Samsung Electronics Co. 1# Copyright 2009 Samsung Electronics Co.
4# Byungho Min <bhmin@samsung.com> 2# Byungho Min <bhmin@samsung.com>
5# 3#
diff --git a/arch/avr32/boards/hammerhead/Kconfig b/arch/avr32/boards/hammerhead/Kconfig
index fda2331f9789..5c13d785cc70 100644
--- a/arch/avr32/boards/hammerhead/Kconfig
+++ b/arch/avr32/boards/hammerhead/Kconfig
@@ -24,7 +24,7 @@ config BOARD_HAMMERHEAD_SND
24 bool "Atmel AC97 Sound support" 24 bool "Atmel AC97 Sound support"
25 help 25 help
26 This enables Sound support for the Hammerhead board. You may 26 This enables Sound support for the Hammerhead board. You may
27 also go trough the ALSA settings to get it working. 27 also go through the ALSA settings to get it working.
28 28
29 Choose 'Y' here if you have ordered a Corona daugther board and 29 Choose 'Y' here if you have ordered a Corona daugther board and
30 want to make your board funky. 30 want to make your board funky.
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index 6b7325d634af..78cb3d38f899 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -619,7 +619,7 @@ asmlinkage notrace void trap_c(struct pt_regs *fp)
619 619
620/* 620/*
621 * Similar to get_user, do some address checking, then dereference 621 * Similar to get_user, do some address checking, then dereference
622 * Return true on sucess, false on bad address 622 * Return true on success, false on bad address
623 */ 623 */
624static bool get_instruction(unsigned short *val, unsigned short *address) 624static bool get_instruction(unsigned short *val, unsigned short *address)
625{ 625{
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
index e06f4112c695..f9fd2b2a2956 100644
--- a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
+++ b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
@@ -542,7 +542,7 @@
542#define HMDMA0_CONTROL 0xFFC03300 /* Handshake MDMA0 Control Register */ 542#define HMDMA0_CONTROL 0xFFC03300 /* Handshake MDMA0 Control Register */
543#define HMDMA0_ECINIT 0xFFC03304 /* HMDMA0 Initial Edge Count Register */ 543#define HMDMA0_ECINIT 0xFFC03304 /* HMDMA0 Initial Edge Count Register */
544#define HMDMA0_BCINIT 0xFFC03308 /* HMDMA0 Initial Block Count Register */ 544#define HMDMA0_BCINIT 0xFFC03308 /* HMDMA0 Initial Block Count Register */
545#define HMDMA0_ECURGENT 0xFFC0330C /* HMDMA0 Urgent Edge Count Threshhold Register */ 545#define HMDMA0_ECURGENT 0xFFC0330C /* HMDMA0 Urgent Edge Count Threshold Register */
546#define HMDMA0_ECOVERFLOW 0xFFC03310 /* HMDMA0 Edge Count Overflow Interrupt Register */ 546#define HMDMA0_ECOVERFLOW 0xFFC03310 /* HMDMA0 Edge Count Overflow Interrupt Register */
547#define HMDMA0_ECOUNT 0xFFC03314 /* HMDMA0 Current Edge Count Register */ 547#define HMDMA0_ECOUNT 0xFFC03314 /* HMDMA0 Current Edge Count Register */
548#define HMDMA0_BCOUNT 0xFFC03318 /* HMDMA0 Current Block Count Register */ 548#define HMDMA0_BCOUNT 0xFFC03318 /* HMDMA0 Current Block Count Register */
@@ -550,7 +550,7 @@
550#define HMDMA1_CONTROL 0xFFC03340 /* Handshake MDMA1 Control Register */ 550#define HMDMA1_CONTROL 0xFFC03340 /* Handshake MDMA1 Control Register */
551#define HMDMA1_ECINIT 0xFFC03344 /* HMDMA1 Initial Edge Count Register */ 551#define HMDMA1_ECINIT 0xFFC03344 /* HMDMA1 Initial Edge Count Register */
552#define HMDMA1_BCINIT 0xFFC03348 /* HMDMA1 Initial Block Count Register */ 552#define HMDMA1_BCINIT 0xFFC03348 /* HMDMA1 Initial Block Count Register */
553#define HMDMA1_ECURGENT 0xFFC0334C /* HMDMA1 Urgent Edge Count Threshhold Register */ 553#define HMDMA1_ECURGENT 0xFFC0334C /* HMDMA1 Urgent Edge Count Threshold Register */
554#define HMDMA1_ECOVERFLOW 0xFFC03350 /* HMDMA1 Edge Count Overflow Interrupt Register */ 554#define HMDMA1_ECOVERFLOW 0xFFC03350 /* HMDMA1 Edge Count Overflow Interrupt Register */
555#define HMDMA1_ECOUNT 0xFFC03354 /* HMDMA1 Current Edge Count Register */ 555#define HMDMA1_ECOUNT 0xFFC03354 /* HMDMA1 Current Edge Count Register */
556#define HMDMA1_BCOUNT 0xFFC03358 /* HMDMA1 Current Block Count Register */ 556#define HMDMA1_BCOUNT 0xFFC03358 /* HMDMA1 Current Block Count Register */
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
index f821700716ee..b9dbb73d7ef0 100644
--- a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
@@ -544,7 +544,7 @@
544#define HMDMA0_CONTROL 0xFFC03300 /* Handshake MDMA0 Control Register */ 544#define HMDMA0_CONTROL 0xFFC03300 /* Handshake MDMA0 Control Register */
545#define HMDMA0_ECINIT 0xFFC03304 /* HMDMA0 Initial Edge Count Register */ 545#define HMDMA0_ECINIT 0xFFC03304 /* HMDMA0 Initial Edge Count Register */
546#define HMDMA0_BCINIT 0xFFC03308 /* HMDMA0 Initial Block Count Register */ 546#define HMDMA0_BCINIT 0xFFC03308 /* HMDMA0 Initial Block Count Register */
547#define HMDMA0_ECURGENT 0xFFC0330C /* HMDMA0 Urgent Edge Count Threshhold Register */ 547#define HMDMA0_ECURGENT 0xFFC0330C /* HMDMA0 Urgent Edge Count Threshold Register */
548#define HMDMA0_ECOVERFLOW 0xFFC03310 /* HMDMA0 Edge Count Overflow Interrupt Register */ 548#define HMDMA0_ECOVERFLOW 0xFFC03310 /* HMDMA0 Edge Count Overflow Interrupt Register */
549#define HMDMA0_ECOUNT 0xFFC03314 /* HMDMA0 Current Edge Count Register */ 549#define HMDMA0_ECOUNT 0xFFC03314 /* HMDMA0 Current Edge Count Register */
550#define HMDMA0_BCOUNT 0xFFC03318 /* HMDMA0 Current Block Count Register */ 550#define HMDMA0_BCOUNT 0xFFC03318 /* HMDMA0 Current Block Count Register */
@@ -552,7 +552,7 @@
552#define HMDMA1_CONTROL 0xFFC03340 /* Handshake MDMA1 Control Register */ 552#define HMDMA1_CONTROL 0xFFC03340 /* Handshake MDMA1 Control Register */
553#define HMDMA1_ECINIT 0xFFC03344 /* HMDMA1 Initial Edge Count Register */ 553#define HMDMA1_ECINIT 0xFFC03344 /* HMDMA1 Initial Edge Count Register */
554#define HMDMA1_BCINIT 0xFFC03348 /* HMDMA1 Initial Block Count Register */ 554#define HMDMA1_BCINIT 0xFFC03348 /* HMDMA1 Initial Block Count Register */
555#define HMDMA1_ECURGENT 0xFFC0334C /* HMDMA1 Urgent Edge Count Threshhold Register */ 555#define HMDMA1_ECURGENT 0xFFC0334C /* HMDMA1 Urgent Edge Count Threshold Register */
556#define HMDMA1_ECOVERFLOW 0xFFC03350 /* HMDMA1 Edge Count Overflow Interrupt Register */ 556#define HMDMA1_ECOVERFLOW 0xFFC03350 /* HMDMA1 Edge Count Overflow Interrupt Register */
557#define HMDMA1_ECOUNT 0xFFC03354 /* HMDMA1 Current Edge Count Register */ 557#define HMDMA1_ECOUNT 0xFFC03354 /* HMDMA1 Current Edge Count Register */
558#define HMDMA1_BCOUNT 0xFFC03358 /* HMDMA1 Current Block Count Register */ 558#define HMDMA1_BCOUNT 0xFFC03358 /* HMDMA1 Current Block Count Register */
diff --git a/arch/blackfin/mach-bf537/include/mach/defBF534.h b/arch/blackfin/mach-bf537/include/mach/defBF534.h
index cebb14feb1ba..a6d20ca57683 100644
--- a/arch/blackfin/mach-bf537/include/mach/defBF534.h
+++ b/arch/blackfin/mach-bf537/include/mach/defBF534.h
@@ -934,7 +934,7 @@
934#define HMDMA0_CONTROL 0xFFC03300 /* Handshake MDMA0 Control Register */ 934#define HMDMA0_CONTROL 0xFFC03300 /* Handshake MDMA0 Control Register */
935#define HMDMA0_ECINIT 0xFFC03304 /* HMDMA0 Initial Edge Count Register */ 935#define HMDMA0_ECINIT 0xFFC03304 /* HMDMA0 Initial Edge Count Register */
936#define HMDMA0_BCINIT 0xFFC03308 /* HMDMA0 Initial Block Count Register */ 936#define HMDMA0_BCINIT 0xFFC03308 /* HMDMA0 Initial Block Count Register */
937#define HMDMA0_ECURGENT 0xFFC0330C /* HMDMA0 Urgent Edge Count Threshhold Register */ 937#define HMDMA0_ECURGENT 0xFFC0330C /* HMDMA0 Urgent Edge Count Threshold Register */
938#define HMDMA0_ECOVERFLOW 0xFFC03310 /* HMDMA0 Edge Count Overflow Interrupt Register */ 938#define HMDMA0_ECOVERFLOW 0xFFC03310 /* HMDMA0 Edge Count Overflow Interrupt Register */
939#define HMDMA0_ECOUNT 0xFFC03314 /* HMDMA0 Current Edge Count Register */ 939#define HMDMA0_ECOUNT 0xFFC03314 /* HMDMA0 Current Edge Count Register */
940#define HMDMA0_BCOUNT 0xFFC03318 /* HMDMA0 Current Block Count Register */ 940#define HMDMA0_BCOUNT 0xFFC03318 /* HMDMA0 Current Block Count Register */
@@ -942,7 +942,7 @@
942#define HMDMA1_CONTROL 0xFFC03340 /* Handshake MDMA1 Control Register */ 942#define HMDMA1_CONTROL 0xFFC03340 /* Handshake MDMA1 Control Register */
943#define HMDMA1_ECINIT 0xFFC03344 /* HMDMA1 Initial Edge Count Register */ 943#define HMDMA1_ECINIT 0xFFC03344 /* HMDMA1 Initial Edge Count Register */
944#define HMDMA1_BCINIT 0xFFC03348 /* HMDMA1 Initial Block Count Register */ 944#define HMDMA1_BCINIT 0xFFC03348 /* HMDMA1 Initial Block Count Register */
945#define HMDMA1_ECURGENT 0xFFC0334C /* HMDMA1 Urgent Edge Count Threshhold Register */ 945#define HMDMA1_ECURGENT 0xFFC0334C /* HMDMA1 Urgent Edge Count Threshold Register */
946#define HMDMA1_ECOVERFLOW 0xFFC03350 /* HMDMA1 Edge Count Overflow Interrupt Register */ 946#define HMDMA1_ECOVERFLOW 0xFFC03350 /* HMDMA1 Edge Count Overflow Interrupt Register */
947#define HMDMA1_ECOUNT 0xFFC03354 /* HMDMA1 Current Edge Count Register */ 947#define HMDMA1_ECOUNT 0xFFC03354 /* HMDMA1 Current Edge Count Register */
948#define HMDMA1_BCOUNT 0xFFC03358 /* HMDMA1 Current Block Count Register */ 948#define HMDMA1_BCOUNT 0xFFC03358 /* HMDMA1 Current Block Count Register */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF544.h b/arch/blackfin/mach-bf548/include/mach/defBF544.h
index dd414ae4ba4c..39f588dcd382 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF544.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF544.h
@@ -491,7 +491,7 @@
491#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */ 491#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */
492#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */ 492#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */
493#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */ 493#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */
494#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshhold Register */ 494#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshold Register */
495#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */ 495#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */
496#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */ 496#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */
497#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */ 497#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */
@@ -501,7 +501,7 @@
501#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */ 501#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */
502#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */ 502#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */
503#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */ 503#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */
504#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshhold Register */ 504#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshold Register */
505#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */ 505#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */
506#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */ 506#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */
507#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */ 507#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF547.h b/arch/blackfin/mach-bf548/include/mach/defBF547.h
index 5a9dbabe0a68..c4dcf302d9f5 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF547.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF547.h
@@ -470,7 +470,7 @@
470#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */ 470#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */
471#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */ 471#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */
472#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */ 472#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */
473#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshhold Register */ 473#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshold Register */
474#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */ 474#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */
475#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */ 475#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */
476#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */ 476#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */
@@ -480,7 +480,7 @@
480#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */ 480#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */
481#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */ 481#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */
482#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */ 482#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */
483#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshhold Register */ 483#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshold Register */
484#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */ 484#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */
485#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */ 485#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */
486#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */ 486#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF548.h b/arch/blackfin/mach-bf548/include/mach/defBF548.h
index 82cd593f7391..a5079980968c 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF548.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF548.h
@@ -853,7 +853,7 @@
853#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */ 853#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */
854#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */ 854#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */
855#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */ 855#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */
856#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshhold Register */ 856#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshold Register */
857#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */ 857#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */
858#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */ 858#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */
859#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */ 859#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */
@@ -863,7 +863,7 @@
863#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */ 863#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */
864#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */ 864#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */
865#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */ 865#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */
866#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshhold Register */ 866#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshold Register */
867#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */ 867#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */
868#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */ 868#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */
869#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */ 869#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF549.h b/arch/blackfin/mach-bf548/include/mach/defBF549.h
index 6fc6e39ab61b..f7f043560c6f 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF549.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF549.h
@@ -1024,7 +1024,7 @@
1024#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */ 1024#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */
1025#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */ 1025#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */
1026#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */ 1026#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */
1027#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshhold Register */ 1027#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshold Register */
1028#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */ 1028#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */
1029#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */ 1029#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */
1030#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */ 1030#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */
@@ -1034,7 +1034,7 @@
1034#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */ 1034#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */
1035#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */ 1035#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */
1036#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */ 1036#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */
1037#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshhold Register */ 1037#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshold Register */
1038#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */ 1038#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */
1039#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */ 1039#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */
1040#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */ 1040#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */
diff --git a/arch/cris/arch-v10/mm/fault.c b/arch/cris/arch-v10/mm/fault.c
index 087a2096f221..ed60588f8467 100644
--- a/arch/cris/arch-v10/mm/fault.c
+++ b/arch/cris/arch-v10/mm/fault.c
@@ -80,8 +80,7 @@ handle_mmu_bus_fault(struct pt_regs *regs)
80 * do_page_fault may have flushed the TLB so we have to restore 80 * do_page_fault may have flushed the TLB so we have to restore
81 * the MMU registers. 81 * the MMU registers.
82 */ 82 */
83 local_save_flags(flags); 83 local_irq_save(flags);
84 local_irq_disable();
85 pmd = (pmd_t *)(pgd + pgd_index(address)); 84 pmd = (pmd_t *)(pgd + pgd_index(address));
86 if (pmd_none(*pmd)) 85 if (pmd_none(*pmd))
87 goto exit; 86 goto exit;
diff --git a/arch/cris/arch-v10/mm/tlb.c b/arch/cris/arch-v10/mm/tlb.c
index 4a496e4ffacc..21d78c599bab 100644
--- a/arch/cris/arch-v10/mm/tlb.c
+++ b/arch/cris/arch-v10/mm/tlb.c
@@ -134,28 +134,6 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
134 local_irq_restore(flags); 134 local_irq_restore(flags);
135} 135}
136 136
137/* dump the entire TLB for debug purposes */
138
139#if 0
140void
141dump_tlb_all(void)
142{
143 int i;
144 unsigned long flags;
145
146 printk("TLB dump. LO is: pfn | reserved | global | valid | kernel | we |\n");
147
148 local_save_flags(flags);
149 local_irq_disable();
150 for(i = 0; i < NUM_TLB_ENTRIES; i++) {
151 *R_TLB_SELECT = ( IO_FIELD(R_TLB_SELECT, index, i) );
152 printk("Entry %d: HI 0x%08lx, LO 0x%08lx\n",
153 i, *R_TLB_HI, *R_TLB_LO);
154 }
155 local_irq_restore(flags);
156}
157#endif
158
159/* 137/*
160 * Initialize the context related info for a new mm_struct 138 * Initialize the context related info for a new mm_struct
161 * instance. 139 * instance.
diff --git a/arch/cris/mm/fault.c b/arch/cris/mm/fault.c
index 4a7cdd9ea1ee..380df1a73a6e 100644
--- a/arch/cris/mm/fault.c
+++ b/arch/cris/mm/fault.c
@@ -209,7 +209,7 @@ do_page_fault(unsigned long address, struct pt_regs *regs,
209 /* Are we prepared to handle this kernel fault? 209 /* Are we prepared to handle this kernel fault?
210 * 210 *
211 * (The kernel has valid exception-points in the source 211 * (The kernel has valid exception-points in the source
212 * when it acesses user-memory. When it fails in one 212 * when it accesses user-memory. When it fails in one
213 * of those points, we find it in a table and do a jump 213 * of those points, we find it in a table and do a jump
214 * to some fixup code that loads an appropriate error 214 * to some fixup code that loads an appropriate error
215 * code) 215 * code)
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
index 674a8374c6d9..f332e3fe4237 100644
--- a/arch/ia64/hp/common/sba_iommu.c
+++ b/arch/ia64/hp/common/sba_iommu.c
@@ -1381,7 +1381,7 @@ sba_coalesce_chunks(struct ioc *ioc, struct device *dev,
1381#endif 1381#endif
1382 1382
1383 /* 1383 /*
1384 ** Not virtually contigous. 1384 ** Not virtually contiguous.
1385 ** Terminate prev chunk. 1385 ** Terminate prev chunk.
1386 ** Start a new chunk. 1386 ** Start a new chunk.
1387 ** 1387 **
diff --git a/arch/ia64/ia32/ia32_entry.S b/arch/ia64/ia32/ia32_entry.S
index 10c37510f4b4..2fd7479aa216 100644
--- a/arch/ia64/ia32/ia32_entry.S
+++ b/arch/ia64/ia32/ia32_entry.S
@@ -79,7 +79,7 @@ GLOBAL_ENTRY(ia32_ret_from_clone)
79(p6) br.cond.spnt .ia32_strace_check_retval 79(p6) br.cond.spnt .ia32_strace_check_retval
80 ;; // prevent RAW on r8 80 ;; // prevent RAW on r8
81END(ia32_ret_from_clone) 81END(ia32_ret_from_clone)
82 // fall thrugh 82 // fall through
83GLOBAL_ENTRY(ia32_ret_from_syscall) 83GLOBAL_ENTRY(ia32_ret_from_syscall)
84 PT_REGS_UNWIND_INFO(0) 84 PT_REGS_UNWIND_INFO(0)
85 85
diff --git a/arch/ia64/include/asm/perfmon_default_smpl.h b/arch/ia64/include/asm/perfmon_default_smpl.h
index 48822c0811d8..74724b24c2b7 100644
--- a/arch/ia64/include/asm/perfmon_default_smpl.h
+++ b/arch/ia64/include/asm/perfmon_default_smpl.h
@@ -67,7 +67,7 @@ typedef struct {
67 unsigned long ip; /* where did the overflow interrupt happened */ 67 unsigned long ip; /* where did the overflow interrupt happened */
68 unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */ 68 unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */
69 69
70 unsigned short cpu; /* cpu on which the overfow occured */ 70 unsigned short cpu; /* cpu on which the overflow occured */
71 unsigned short set; /* event set active when overflow ocurred */ 71 unsigned short set; /* event set active when overflow ocurred */
72 int tgid; /* thread group id (for NPTL, this is getpid()) */ 72 int tgid; /* thread group id (for NPTL, this is getpid()) */
73} pfm_default_smpl_entry_t; 73} pfm_default_smpl_entry_t;
diff --git a/arch/ia64/include/asm/sn/shubio.h b/arch/ia64/include/asm/sn/shubio.h
index 22a6f18a5313..6052422a22b3 100644
--- a/arch/ia64/include/asm/sn/shubio.h
+++ b/arch/ia64/include/asm/sn/shubio.h
@@ -3289,7 +3289,7 @@ typedef ii_icrb0_e_u_t icrbe_t;
3289#define IIO_IIDSR_LVL_SHIFT 0 3289#define IIO_IIDSR_LVL_SHIFT 0
3290#define IIO_IIDSR_LVL_MASK 0x000000ff 3290#define IIO_IIDSR_LVL_MASK 0x000000ff
3291 3291
3292/* Xtalk timeout threshhold register (IIO_IXTT) */ 3292/* Xtalk timeout threshold register (IIO_IXTT) */
3293#define IXTT_RRSP_TO_SHFT 55 /* read response timeout */ 3293#define IXTT_RRSP_TO_SHFT 55 /* read response timeout */
3294#define IXTT_RRSP_TO_MASK (0x1FULL << IXTT_RRSP_TO_SHFT) 3294#define IXTT_RRSP_TO_MASK (0x1FULL << IXTT_RRSP_TO_SHFT)
3295#define IXTT_RRSP_PS_SHFT 32 /* read responsed TO prescalar */ 3295#define IXTT_RRSP_PS_SHFT 32 /* read responsed TO prescalar */
diff --git a/arch/ia64/kernel/esi.c b/arch/ia64/kernel/esi.c
index d5764a3d74af..b091111270cb 100644
--- a/arch/ia64/kernel/esi.c
+++ b/arch/ia64/kernel/esi.c
@@ -84,7 +84,7 @@ static int __init esi_init (void)
84 case ESI_DESC_ENTRY_POINT: 84 case ESI_DESC_ENTRY_POINT:
85 break; 85 break;
86 default: 86 default:
87 printk(KERN_WARNING "Unkown table type %d found in " 87 printk(KERN_WARNING "Unknown table type %d found in "
88 "ESI table, ignoring rest of table\n", *p); 88 "ESI table, ignoring rest of table\n", *p);
89 return -ENODEV; 89 return -ENODEV;
90 } 90 }
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 402698b6689f..599b233bef75 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -3517,7 +3517,7 @@ pfm_use_debug_registers(struct task_struct *task)
3517 * IA64_THREAD_DBG_VALID set. This indicates a task which was 3517 * IA64_THREAD_DBG_VALID set. This indicates a task which was
3518 * able to use the debug registers for debugging purposes via 3518 * able to use the debug registers for debugging purposes via
3519 * ptrace(). Therefore we know it was not using them for 3519 * ptrace(). Therefore we know it was not using them for
3520 * perfmormance monitoring, so we only decrement the number 3520 * performance monitoring, so we only decrement the number
3521 * of "ptraced" debug register users to keep the count up to date 3521 * of "ptraced" debug register users to keep the count up to date
3522 */ 3522 */
3523int 3523int
diff --git a/arch/m68k/ifpsp060/src/fpsp.S b/arch/m68k/ifpsp060/src/fpsp.S
index 6c1a9a217887..73613b5f1ee5 100644
--- a/arch/m68k/ifpsp060/src/fpsp.S
+++ b/arch/m68k/ifpsp060/src/fpsp.S
@@ -753,7 +753,7 @@ fovfl_ovfl_on:
753 753
754 bra.l _real_ovfl 754 bra.l _real_ovfl
755 755
756# overflow occurred but is disabled. meanwhile, inexact is enabled. therefore, 756# overflow occurred but is disabled. meanwhile, inexact is enabled. Therefore,
757# we must jump to real_inex(). 757# we must jump to real_inex().
758fovfl_inex_on: 758fovfl_inex_on:
759 759
@@ -1015,7 +1015,7 @@ funfl_unfl_on2:
1015 1015
1016 bra.l _real_unfl 1016 bra.l _real_unfl
1017 1017
1018# undeflow occurred but is disabled. meanwhile, inexact is enabled. therefore, 1018# underflow occurred but is disabled. meanwhile, inexact is enabled. Therefore,
1019# we must jump to real_inex(). 1019# we must jump to real_inex().
1020funfl_inex_on: 1020funfl_inex_on:
1021 1021
@@ -2963,7 +2963,7 @@ iea_disabled:
2963 2963
2964 tst.w %d0 # is instr fmovm? 2964 tst.w %d0 # is instr fmovm?
2965 bmi.b iea_dis_fmovm # yes 2965 bmi.b iea_dis_fmovm # yes
2966# instruction is using an extended precision immediate operand. therefore, 2966# instruction is using an extended precision immediate operand. Therefore,
2967# the total instruction length is 16 bytes. 2967# the total instruction length is 16 bytes.
2968iea_dis_immed: 2968iea_dis_immed:
2969 mov.l &0x10,%d0 # 16 bytes of instruction 2969 mov.l &0x10,%d0 # 16 bytes of instruction
@@ -9624,7 +9624,7 @@ sok_dnrm:
9624 bge.b sok_norm2 # thank goodness no 9624 bge.b sok_norm2 # thank goodness no
9625 9625
9626# the multiply factor that we're trying to create should be a denorm 9626# the multiply factor that we're trying to create should be a denorm
9627# for the multiply to work. therefore, we're going to actually do a 9627# for the multiply to work. Therefore, we're going to actually do a
9628# multiply with a denorm which will cause an unimplemented data type 9628# multiply with a denorm which will cause an unimplemented data type
9629# exception to be put into the machine which will be caught and corrected 9629# exception to be put into the machine which will be caught and corrected
9630# later. we don't do this with the DENORMs above because this method 9630# later. we don't do this with the DENORMs above because this method
@@ -12216,7 +12216,7 @@ fin_sd_unfl_dis:
12216 12216
12217# 12217#
12218# operand will underflow AND underflow or inexact is enabled. 12218# operand will underflow AND underflow or inexact is enabled.
12219# therefore, we must return the result rounded to extended precision. 12219# Therefore, we must return the result rounded to extended precision.
12220# 12220#
12221fin_sd_unfl_ena: 12221fin_sd_unfl_ena:
12222 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 12222 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -12746,7 +12746,7 @@ fdiv_zero_load_p:
12746 12746
12747# 12747#
12748# The destination was In Range and the source was a ZERO. The result, 12748# The destination was In Range and the source was a ZERO. The result,
12749# therefore, is an INF w/ the proper sign. 12749# Therefore, is an INF w/ the proper sign.
12750# So, determine the sign and return a new INF (w/ the j-bit cleared). 12750# So, determine the sign and return a new INF (w/ the j-bit cleared).
12751# 12751#
12752 global fdiv_inf_load # global for fsgldiv 12752 global fdiv_inf_load # global for fsgldiv
@@ -12996,7 +12996,7 @@ fneg_sd_unfl_dis:
12996 12996
12997# 12997#
12998# operand will underflow AND underflow is enabled. 12998# operand will underflow AND underflow is enabled.
12999# therefore, we must return the result rounded to extended precision. 12999# Therefore, we must return the result rounded to extended precision.
13000# 13000#
13001fneg_sd_unfl_ena: 13001fneg_sd_unfl_ena:
13002 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 13002 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -13611,7 +13611,7 @@ fabs_sd_unfl_dis:
13611 13611
13612# 13612#
13613# operand will underflow AND underflow is enabled. 13613# operand will underflow AND underflow is enabled.
13614# therefore, we must return the result rounded to extended precision. 13614# Therefore, we must return the result rounded to extended precision.
13615# 13615#
13616fabs_sd_unfl_ena: 13616fabs_sd_unfl_ena:
13617 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 13617 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -14973,7 +14973,7 @@ fadd_zero_2:
14973 14973
14974# 14974#
14975# the ZEROes have opposite signs: 14975# the ZEROes have opposite signs:
14976# - therefore, we return +ZERO if the rounding modes are RN,RZ, or RP. 14976# - Therefore, we return +ZERO if the rounding modes are RN,RZ, or RP.
14977# - -ZERO is returned in the case of RM. 14977# - -ZERO is returned in the case of RM.
14978# 14978#
14979fadd_zero_2_chk_rm: 14979fadd_zero_2_chk_rm:
@@ -15425,7 +15425,7 @@ fsub_zero_2:
15425 15425
15426# 15426#
15427# the ZEROes have the same signs: 15427# the ZEROes have the same signs:
15428# - therefore, we return +ZERO if the rounding mode is RN,RZ, or RP 15428# - Therefore, we return +ZERO if the rounding mode is RN,RZ, or RP
15429# - -ZERO is returned in the case of RM. 15429# - -ZERO is returned in the case of RM.
15430# 15430#
15431fsub_zero_2_chk_rm: 15431fsub_zero_2_chk_rm:
@@ -15693,7 +15693,7 @@ fsqrt_sd_unfl_dis:
15693 15693
15694# 15694#
15695# operand will underflow AND underflow is enabled. 15695# operand will underflow AND underflow is enabled.
15696# therefore, we must return the result rounded to extended precision. 15696# Therefore, we must return the result rounded to extended precision.
15697# 15697#
15698fsqrt_sd_unfl_ena: 15698fsqrt_sd_unfl_ena:
15699 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 15699 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -21000,7 +21000,7 @@ fout_pack_type:
21000 tst.l %d0 21000 tst.l %d0
21001 bne.b fout_pack_set 21001 bne.b fout_pack_set
21002# "mantissa" is all zero which means that the answer is zero. but, the '040 21002# "mantissa" is all zero which means that the answer is zero. but, the '040
21003# algorithm allows the exponent to be non-zero. the 881/2 do not. therefore, 21003# algorithm allows the exponent to be non-zero. the 881/2 do not. Therefore,
21004# if the mantissa is zero, I will zero the exponent, too. 21004# if the mantissa is zero, I will zero the exponent, too.
21005# the question now is whether the exponents sign bit is allowed to be non-zero 21005# the question now is whether the exponents sign bit is allowed to be non-zero
21006# for a zero, also... 21006# for a zero, also...
@@ -21743,7 +21743,7 @@ denorm_set_stky:
21743 rts 21743 rts
21744 21744
21745# # 21745# #
21746# dnrm_lp(): normalize exponent/mantissa to specified threshhold # 21746# dnrm_lp(): normalize exponent/mantissa to specified threshold #
21747# # 21747# #
21748# INPUT: # 21748# INPUT: #
21749# %a0 : points to the operand to be denormalized # 21749# %a0 : points to the operand to be denormalized #
@@ -22402,7 +22402,7 @@ unnorm_shift:
22402 bgt.b unnorm_nrm_zero # yes; denorm only until exp = 0 22402 bgt.b unnorm_nrm_zero # yes; denorm only until exp = 0
22403 22403
22404# 22404#
22405# exponent would not go < 0. therefore, number stays normalized 22405# exponent would not go < 0. Therefore, number stays normalized
22406# 22406#
22407 sub.w %d0, %d1 # shift exponent value 22407 sub.w %d0, %d1 # shift exponent value
22408 mov.w FTEMP_EX(%a0), %d0 # load old exponent 22408 mov.w FTEMP_EX(%a0), %d0 # load old exponent
diff --git a/arch/m68k/ifpsp060/src/pfpsp.S b/arch/m68k/ifpsp060/src/pfpsp.S
index 51b9f7d879dd..e71ba0ab013c 100644
--- a/arch/m68k/ifpsp060/src/pfpsp.S
+++ b/arch/m68k/ifpsp060/src/pfpsp.S
@@ -752,7 +752,7 @@ fovfl_ovfl_on:
752 752
753 bra.l _real_ovfl 753 bra.l _real_ovfl
754 754
755# overflow occurred but is disabled. meanwhile, inexact is enabled. therefore, 755# overflow occurred but is disabled. meanwhile, inexact is enabled. Therefore,
756# we must jump to real_inex(). 756# we must jump to real_inex().
757fovfl_inex_on: 757fovfl_inex_on:
758 758
@@ -1014,7 +1014,7 @@ funfl_unfl_on2:
1014 1014
1015 bra.l _real_unfl 1015 bra.l _real_unfl
1016 1016
1017# undeflow occurred but is disabled. meanwhile, inexact is enabled. therefore, 1017# underflow occurred but is disabled. meanwhile, inexact is enabled. Therefore,
1018# we must jump to real_inex(). 1018# we must jump to real_inex().
1019funfl_inex_on: 1019funfl_inex_on:
1020 1020
@@ -2962,7 +2962,7 @@ iea_disabled:
2962 2962
2963 tst.w %d0 # is instr fmovm? 2963 tst.w %d0 # is instr fmovm?
2964 bmi.b iea_dis_fmovm # yes 2964 bmi.b iea_dis_fmovm # yes
2965# instruction is using an extended precision immediate operand. therefore, 2965# instruction is using an extended precision immediate operand. Therefore,
2966# the total instruction length is 16 bytes. 2966# the total instruction length is 16 bytes.
2967iea_dis_immed: 2967iea_dis_immed:
2968 mov.l &0x10,%d0 # 16 bytes of instruction 2968 mov.l &0x10,%d0 # 16 bytes of instruction
@@ -5865,7 +5865,7 @@ denorm_set_stky:
5865 rts 5865 rts
5866 5866
5867# # 5867# #
5868# dnrm_lp(): normalize exponent/mantissa to specified threshhold # 5868# dnrm_lp(): normalize exponent/mantissa to specified threshold #
5869# # 5869# #
5870# INPUT: # 5870# INPUT: #
5871# %a0 : points to the operand to be denormalized # 5871# %a0 : points to the operand to be denormalized #
@@ -6524,7 +6524,7 @@ unnorm_shift:
6524 bgt.b unnorm_nrm_zero # yes; denorm only until exp = 0 6524 bgt.b unnorm_nrm_zero # yes; denorm only until exp = 0
6525 6525
6526# 6526#
6527# exponent would not go < 0. therefore, number stays normalized 6527# exponent would not go < 0. Therefore, number stays normalized
6528# 6528#
6529 sub.w %d0, %d1 # shift exponent value 6529 sub.w %d0, %d1 # shift exponent value
6530 mov.w FTEMP_EX(%a0), %d0 # load old exponent 6530 mov.w FTEMP_EX(%a0), %d0 # load old exponent
@@ -7901,7 +7901,7 @@ fout_pack_type:
7901 tst.l %d0 7901 tst.l %d0
7902 bne.b fout_pack_set 7902 bne.b fout_pack_set
7903# "mantissa" is all zero which means that the answer is zero. but, the '040 7903# "mantissa" is all zero which means that the answer is zero. but, the '040
7904# algorithm allows the exponent to be non-zero. the 881/2 do not. therefore, 7904# algorithm allows the exponent to be non-zero. the 881/2 do not. Therefore,
7905# if the mantissa is zero, I will zero the exponent, too. 7905# if the mantissa is zero, I will zero the exponent, too.
7906# the question now is whether the exponents sign bit is allowed to be non-zero 7906# the question now is whether the exponents sign bit is allowed to be non-zero
7907# for a zero, also... 7907# for a zero, also...
@@ -8647,7 +8647,7 @@ fin_sd_unfl_dis:
8647 8647
8648# 8648#
8649# operand will underflow AND underflow or inexact is enabled. 8649# operand will underflow AND underflow or inexact is enabled.
8650# therefore, we must return the result rounded to extended precision. 8650# Therefore, we must return the result rounded to extended precision.
8651# 8651#
8652fin_sd_unfl_ena: 8652fin_sd_unfl_ena:
8653 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 8653 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -9177,7 +9177,7 @@ fdiv_zero_load_p:
9177 9177
9178# 9178#
9179# The destination was In Range and the source was a ZERO. The result, 9179# The destination was In Range and the source was a ZERO. The result,
9180# therefore, is an INF w/ the proper sign. 9180# Therefore, is an INF w/ the proper sign.
9181# So, determine the sign and return a new INF (w/ the j-bit cleared). 9181# So, determine the sign and return a new INF (w/ the j-bit cleared).
9182# 9182#
9183 global fdiv_inf_load # global for fsgldiv 9183 global fdiv_inf_load # global for fsgldiv
@@ -9427,7 +9427,7 @@ fneg_sd_unfl_dis:
9427 9427
9428# 9428#
9429# operand will underflow AND underflow is enabled. 9429# operand will underflow AND underflow is enabled.
9430# therefore, we must return the result rounded to extended precision. 9430# Therefore, we must return the result rounded to extended precision.
9431# 9431#
9432fneg_sd_unfl_ena: 9432fneg_sd_unfl_ena:
9433 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 9433 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -10042,7 +10042,7 @@ fabs_sd_unfl_dis:
10042 10042
10043# 10043#
10044# operand will underflow AND underflow is enabled. 10044# operand will underflow AND underflow is enabled.
10045# therefore, we must return the result rounded to extended precision. 10045# Therefore, we must return the result rounded to extended precision.
10046# 10046#
10047fabs_sd_unfl_ena: 10047fabs_sd_unfl_ena:
10048 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 10048 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
@@ -11404,7 +11404,7 @@ fadd_zero_2:
11404 11404
11405# 11405#
11406# the ZEROes have opposite signs: 11406# the ZEROes have opposite signs:
11407# - therefore, we return +ZERO if the rounding modes are RN,RZ, or RP. 11407# - Therefore, we return +ZERO if the rounding modes are RN,RZ, or RP.
11408# - -ZERO is returned in the case of RM. 11408# - -ZERO is returned in the case of RM.
11409# 11409#
11410fadd_zero_2_chk_rm: 11410fadd_zero_2_chk_rm:
@@ -11856,7 +11856,7 @@ fsub_zero_2:
11856 11856
11857# 11857#
11858# the ZEROes have the same signs: 11858# the ZEROes have the same signs:
11859# - therefore, we return +ZERO if the rounding mode is RN,RZ, or RP 11859# - Therefore, we return +ZERO if the rounding mode is RN,RZ, or RP
11860# - -ZERO is returned in the case of RM. 11860# - -ZERO is returned in the case of RM.
11861# 11861#
11862fsub_zero_2_chk_rm: 11862fsub_zero_2_chk_rm:
@@ -12124,7 +12124,7 @@ fsqrt_sd_unfl_dis:
12124 12124
12125# 12125#
12126# operand will underflow AND underflow is enabled. 12126# operand will underflow AND underflow is enabled.
12127# therefore, we must return the result rounded to extended precision. 12127# Therefore, we must return the result rounded to extended precision.
12128# 12128#
12129fsqrt_sd_unfl_ena: 12129fsqrt_sd_unfl_ena:
12130 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6) 12130 mov.l FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
diff --git a/arch/m68k/include/asm/bootinfo.h b/arch/m68k/include/asm/bootinfo.h
index fb8a06b9ab6a..67e7a78ad96b 100644
--- a/arch/m68k/include/asm/bootinfo.h
+++ b/arch/m68k/include/asm/bootinfo.h
@@ -145,7 +145,7 @@ struct bi_record {
145 145
146 /* 146 /*
147 * Macintosh hardware profile data - unused, see macintosh.h for 147 * Macintosh hardware profile data - unused, see macintosh.h for
148 * resonable type values 148 * reasonable type values
149 */ 149 */
150 150
151#define BI_MAC_VIA1BASE 0x8010 /* Mac VIA1 base address (always present) */ 151#define BI_MAC_VIA1BASE 0x8010 /* Mac VIA1 base address (always present) */
diff --git a/arch/microblaze/lib/memcpy.c b/arch/microblaze/lib/memcpy.c
index 6a907c58a4bc..cc2108b6b260 100644
--- a/arch/microblaze/lib/memcpy.c
+++ b/arch/microblaze/lib/memcpy.c
@@ -9,7 +9,7 @@
9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from 9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from
10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567 10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567
11 * 11 *
12 * Attempts were made, unsuccesfully, to contact the original 12 * Attempts were made, unsuccessfully, to contact the original
13 * author of this code (Michael Morrow, Intel). Below is the original 13 * author of this code (Michael Morrow, Intel). Below is the original
14 * copyright notice. 14 * copyright notice.
15 * 15 *
diff --git a/arch/microblaze/lib/memmove.c b/arch/microblaze/lib/memmove.c
index d4e9f49a71f7..0929198c5e68 100644
--- a/arch/microblaze/lib/memmove.c
+++ b/arch/microblaze/lib/memmove.c
@@ -9,7 +9,7 @@
9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from 9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from
10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567 10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567
11 * 11 *
12 * Attempts were made, unsuccesfully, to contact the original 12 * Attempts were made, unsuccessfully, to contact the original
13 * author of this code (Michael Morrow, Intel). Below is the original 13 * author of this code (Michael Morrow, Intel). Below is the original
14 * copyright notice. 14 * copyright notice.
15 * 15 *
diff --git a/arch/microblaze/lib/memset.c b/arch/microblaze/lib/memset.c
index 941dc8f94b03..4df851d41a29 100644
--- a/arch/microblaze/lib/memset.c
+++ b/arch/microblaze/lib/memset.c
@@ -9,7 +9,7 @@
9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from 9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from
10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567 10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567
11 * 11 *
12 * Attempts were made, unsuccesfully, to contact the original 12 * Attempts were made, unsuccessfully, to contact the original
13 * author of this code (Michael Morrow, Intel). Below is the original 13 * author of this code (Michael Morrow, Intel). Below is the original
14 * copyright notice. 14 * copyright notice.
15 * 15 *
diff --git a/arch/mips/include/asm/mach-pnx833x/gpio.h b/arch/mips/include/asm/mach-pnx833x/gpio.h
index 8de0eb9c98a3..ed3a88da70f6 100644
--- a/arch/mips/include/asm/mach-pnx833x/gpio.h
+++ b/arch/mips/include/asm/mach-pnx833x/gpio.h
@@ -24,7 +24,7 @@
24 24
25/* BIG FAT WARNING: races danger! 25/* BIG FAT WARNING: races danger!
26 No protections exist here. Current users are only early init code, 26 No protections exist here. Current users are only early init code,
27 when locking is not needed because no cuncurency yet exists there, 27 when locking is not needed because no concurrency yet exists there,
28 and GPIO IRQ dispatcher, which does locking. 28 and GPIO IRQ dispatcher, which does locking.
29 However, if many uses will ever happen, proper locking will be needed 29 However, if many uses will ever happen, proper locking will be needed
30 - including locking between different uses 30 - including locking between different uses
diff --git a/arch/mips/include/asm/sgi/ioc.h b/arch/mips/include/asm/sgi/ioc.h
index 343ed15f8dc4..57a971904cfe 100644
--- a/arch/mips/include/asm/sgi/ioc.h
+++ b/arch/mips/include/asm/sgi/ioc.h
@@ -164,7 +164,7 @@ struct sgioc_regs {
164 u32 _unused5; 164 u32 _unused5;
165 u8 _write[3]; 165 u8 _write[3];
166 volatile u8 write; 166 volatile u8 write;
167#define SGIOC_WRITE_NTHRESH 0x01 /* use 4.5db threshhold */ 167#define SGIOC_WRITE_NTHRESH 0x01 /* use 4.5db threshold */
168#define SGIOC_WRITE_TPSPEED 0x02 /* use 100ohm TP speed */ 168#define SGIOC_WRITE_TPSPEED 0x02 /* use 100ohm TP speed */
169#define SGIOC_WRITE_EPSEL 0x04 /* force cable mode: 1=AUI 0=TP */ 169#define SGIOC_WRITE_EPSEL 0x04 /* force cable mode: 1=AUI 0=TP */
170#define SGIOC_WRITE_EASEL 0x08 /* 1=autoselect 0=manual cable selection */ 170#define SGIOC_WRITE_EASEL 0x08 /* 1=autoselect 0=manual cable selection */
diff --git a/arch/mips/include/asm/sibyte/sb1250_mac.h b/arch/mips/include/asm/sibyte/sb1250_mac.h
index b6faf08ca81d..591b9061fd8e 100644
--- a/arch/mips/include/asm/sibyte/sb1250_mac.h
+++ b/arch/mips/include/asm/sibyte/sb1250_mac.h
@@ -212,7 +212,7 @@
212#define G_MAC_TXD_WEIGHT1(x) _SB_GETVALUE(x, S_MAC_TXD_WEIGHT1, M_MAC_TXD_WEIGHT1) 212#define G_MAC_TXD_WEIGHT1(x) _SB_GETVALUE(x, S_MAC_TXD_WEIGHT1, M_MAC_TXD_WEIGHT1)
213 213
214/* 214/*
215 * MAC Fifo Threshhold registers (Table 9-14) 215 * MAC Fifo Threshold registers (Table 9-14)
216 * Register: MAC_THRSH_CFG_0 216 * Register: MAC_THRSH_CFG_0
217 * Register: MAC_THRSH_CFG_1 217 * Register: MAC_THRSH_CFG_1
218 * Register: MAC_THRSH_CFG_2 218 * Register: MAC_THRSH_CFG_2
diff --git a/arch/mips/include/asm/sn/sn0/hubio.h b/arch/mips/include/asm/sn/sn0/hubio.h
index d0c29d4de084..31c76c021bb6 100644
--- a/arch/mips/include/asm/sn/sn0/hubio.h
+++ b/arch/mips/include/asm/sn/sn0/hubio.h
@@ -825,7 +825,7 @@ typedef union iprb_u {
825 struct { 825 struct {
826 u64 rsvd1: 15, 826 u64 rsvd1: 15,
827 error: 1, /* Widget rcvd wr resp pkt w/ error */ 827 error: 1, /* Widget rcvd wr resp pkt w/ error */
828 ovflow: 5, /* Over flow count. perf measurement */ 828 ovflow: 5, /* Overflow count. perf measurement */
829 fire_and_forget: 1, /* Launch Write without response */ 829 fire_and_forget: 1, /* Launch Write without response */
830 mode: 2, /* Widget operation Mode */ 830 mode: 2, /* Widget operation Mode */
831 rsvd2: 2, 831 rsvd2: 2,
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 24630fd8ef60..a38e3ee95515 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -1331,7 +1331,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
1331 if (!((asid += ASID_INC) & ASID_MASK) ) { 1331 if (!((asid += ASID_INC) & ASID_MASK) ) {
1332 if (cpu_has_vtag_icache) 1332 if (cpu_has_vtag_icache)
1333 flush_icache_all(); 1333 flush_icache_all();
1334 /* Traverse all online CPUs (hack requires contigous range) */ 1334 /* Traverse all online CPUs (hack requires contiguous range) */
1335 for_each_online_cpu(i) { 1335 for_each_online_cpu(i) {
1336 /* 1336 /*
1337 * We don't need to worry about our own CPU, nor those of 1337 * We don't need to worry about our own CPU, nor those of
diff --git a/arch/mips/math-emu/dp_sub.c b/arch/mips/math-emu/dp_sub.c
index b30c5b1f1a2c..a2127d685a0d 100644
--- a/arch/mips/math-emu/dp_sub.c
+++ b/arch/mips/math-emu/dp_sub.c
@@ -110,7 +110,7 @@ ieee754dp ieee754dp_sub(ieee754dp x, ieee754dp y)
110 110
111 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM): 111 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
112 DPDNORMX; 112 DPDNORMX;
113 /* FAAL THOROUGH */ 113 /* FALL THROUGH */
114 114
115 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM): 115 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
116 /* normalize ym,ye */ 116 /* normalize ym,ye */
diff --git a/arch/mips/txx9/generic/smsc_fdc37m81x.c b/arch/mips/txx9/generic/smsc_fdc37m81x.c
index a2b2d62d88e3..8ebc3848f3ac 100644
--- a/arch/mips/txx9/generic/smsc_fdc37m81x.c
+++ b/arch/mips/txx9/generic/smsc_fdc37m81x.c
@@ -117,7 +117,7 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port)
117 if (chip_id == SMSC_FDC37M81X_CHIP_ID) 117 if (chip_id == SMSC_FDC37M81X_CHIP_ID)
118 smsc_fdc37m81x_config_end(); 118 smsc_fdc37m81x_config_end();
119 else { 119 else {
120 printk(KERN_WARNING "%s: unknow chip id 0x%02x\n", __func__, 120 printk(KERN_WARNING "%s: unknown chip id 0x%02x\n", __func__,
121 chip_id); 121 chip_id);
122 g_smsc_fdc37m81x_base = 0; 122 g_smsc_fdc37m81x_base = 0;
123 } 123 }
diff --git a/arch/parisc/kernel/perf.c b/arch/parisc/kernel/perf.c
index 75099efb3bf3..f9f6783e4bdd 100644
--- a/arch/parisc/kernel/perf.c
+++ b/arch/parisc/kernel/perf.c
@@ -24,7 +24,7 @@
24 * 24 *
25 * This driver programs the PCX-U/PCX-W performance counters 25 * This driver programs the PCX-U/PCX-W performance counters
26 * on the PA-RISC 2.0 chips. The driver keeps all images now 26 * on the PA-RISC 2.0 chips. The driver keeps all images now
27 * internally to the kernel to hopefully eliminate the possiblity 27 * internally to the kernel to hopefully eliminate the possibility
28 * of a bad image halting the CPU. Also, there are different 28 * of a bad image halting the CPU. Also, there are different
29 * images for the PCX-W and later chips vs the PCX-U chips. 29 * images for the PCX-W and later chips vs the PCX-U chips.
30 * 30 *
diff --git a/arch/powerpc/include/asm/reg_fsl_emb.h b/arch/powerpc/include/asm/reg_fsl_emb.h
index 1e180a594589..0de404dfee8b 100644
--- a/arch/powerpc/include/asm/reg_fsl_emb.h
+++ b/arch/powerpc/include/asm/reg_fsl_emb.h
@@ -39,7 +39,7 @@
39#define PMRN_PMLCB2 0x112 /* PM Local Control B2 */ 39#define PMRN_PMLCB2 0x112 /* PM Local Control B2 */
40#define PMRN_PMLCB3 0x113 /* PM Local Control B3 */ 40#define PMRN_PMLCB3 0x113 /* PM Local Control B3 */
41 41
42#define PMLCB_THRESHMUL_MASK 0x0700 /* Threshhold Multiple Field */ 42#define PMLCB_THRESHMUL_MASK 0x0700 /* Threshold Multiple Field */
43#define PMLCB_THRESHMUL_SHIFT 8 43#define PMLCB_THRESHMUL_SHIFT 8
44 44
45#define PMLCB_THRESHOLD_MASK 0x003f /* Threshold Field */ 45#define PMLCB_THRESHOLD_MASK 0x003f /* Threshold Field */
diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c
index 641c74bb8e27..b6bd1eaa1c24 100644
--- a/arch/powerpc/kernel/kgdb.c
+++ b/arch/powerpc/kernel/kgdb.c
@@ -52,7 +52,7 @@ static struct hard_trap_info
52 { 0x2030, 0x08 /* SIGFPE */ }, /* spe fp data */ 52 { 0x2030, 0x08 /* SIGFPE */ }, /* spe fp data */
53 { 0x2040, 0x08 /* SIGFPE */ }, /* spe fp data */ 53 { 0x2040, 0x08 /* SIGFPE */ }, /* spe fp data */
54 { 0x2050, 0x08 /* SIGFPE */ }, /* spe fp round */ 54 { 0x2050, 0x08 /* SIGFPE */ }, /* spe fp round */
55 { 0x2060, 0x0e /* SIGILL */ }, /* performace monitor */ 55 { 0x2060, 0x0e /* SIGILL */ }, /* performance monitor */
56 { 0x2900, 0x08 /* SIGFPE */ }, /* apu unavailable */ 56 { 0x2900, 0x08 /* SIGFPE */ }, /* apu unavailable */
57 { 0x3100, 0x0e /* SIGALRM */ }, /* fixed interval timer */ 57 { 0x3100, 0x0e /* SIGALRM */ }, /* fixed interval timer */
58 { 0x3200, 0x02 /* SIGINT */ }, /* watchdog */ 58 { 0x3200, 0x02 /* SIGINT */ }, /* watchdog */
diff --git a/arch/powerpc/kernel/tau_6xx.c b/arch/powerpc/kernel/tau_6xx.c
index c3a56d65c5a9..a753b72efbc0 100644
--- a/arch/powerpc/kernel/tau_6xx.c
+++ b/arch/powerpc/kernel/tau_6xx.c
@@ -59,7 +59,7 @@ void set_thresholds(unsigned long cpu)
59 mtspr(SPRN_THRM1, THRM1_THRES(tau[cpu].low) | THRM1_V | THRM1_TIE | THRM1_TID); 59 mtspr(SPRN_THRM1, THRM1_THRES(tau[cpu].low) | THRM1_V | THRM1_TIE | THRM1_TID);
60 60
61 /* setup THRM2, 61 /* setup THRM2,
62 * threshold, valid bit, enable interrupts, interrupt when above threshhold 62 * threshold, valid bit, enable interrupts, interrupt when above threshold
63 */ 63 */
64 mtspr (SPRN_THRM2, THRM1_THRES(tau[cpu].high) | THRM1_V | THRM1_TIE); 64 mtspr (SPRN_THRM2, THRM1_THRES(tau[cpu].high) | THRM1_V | THRM1_TIE);
65#else 65#else
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index 137dc22afa42..d84d19224a95 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -721,7 +721,7 @@ static int __init vdso_init(void)
721 721
722#ifdef CONFIG_PPC64 722#ifdef CONFIG_PPC64
723 /* 723 /*
724 * Fill up the "systemcfg" stuff for backward compatiblity 724 * Fill up the "systemcfg" stuff for backward compatibility
725 */ 725 */
726 strcpy((char *)vdso_data->eye_catcher, "SYSTEMCFG:PPC64"); 726 strcpy((char *)vdso_data->eye_catcher, "SYSTEMCFG:PPC64");
727 vdso_data->version.major = SYSTEMCFG_MAJOR; 727 vdso_data->version.major = SYSTEMCFG_MAJOR;
diff --git a/arch/powerpc/oprofile/op_model_cell.c b/arch/powerpc/oprofile/op_model_cell.c
index ae06c6236d9c..2c9e52267292 100644
--- a/arch/powerpc/oprofile/op_model_cell.c
+++ b/arch/powerpc/oprofile/op_model_cell.c
@@ -248,7 +248,7 @@ static int pm_rtas_activate_signals(u32 node, u32 count)
248 * There is no debug setup required for the cycles event. 248 * There is no debug setup required for the cycles event.
249 * Note that only events in the same group can be used. 249 * Note that only events in the same group can be used.
250 * Otherwise, there will be conflicts in correctly routing 250 * Otherwise, there will be conflicts in correctly routing
251 * the signals on the debug bus. It is the responsiblity 251 * the signals on the debug bus. It is the responsibility
252 * of the OProfile user tool to check the events are in 252 * of the OProfile user tool to check the events are in
253 * the same group. 253 * the same group.
254 */ 254 */
@@ -1594,7 +1594,7 @@ static void cell_handle_interrupt_spu(struct pt_regs *regs,
1594 * to a latch. The new values (interrupt setting bits, reset 1594 * to a latch. The new values (interrupt setting bits, reset
1595 * counter value etc.) are not copied to the actual registers 1595 * counter value etc.) are not copied to the actual registers
1596 * until the performance monitor is enabled. In order to get 1596 * until the performance monitor is enabled. In order to get
1597 * this to work as desired, the permormance monitor needs to 1597 * this to work as desired, the performance monitor needs to
1598 * be disabled while writing to the latches. This is a 1598 * be disabled while writing to the latches. This is a
1599 * HW design issue. 1599 * HW design issue.
1600 */ 1600 */
@@ -1668,7 +1668,7 @@ static void cell_handle_interrupt_ppu(struct pt_regs *regs,
1668 * to a latch. The new values (interrupt setting bits, reset 1668 * to a latch. The new values (interrupt setting bits, reset
1669 * counter value etc.) are not copied to the actual registers 1669 * counter value etc.) are not copied to the actual registers
1670 * until the performance monitor is enabled. In order to get 1670 * until the performance monitor is enabled. In order to get
1671 * this to work as desired, the permormance monitor needs to 1671 * this to work as desired, the performance monitor needs to
1672 * be disabled while writing to the latches. This is a 1672 * be disabled while writing to the latches. This is a
1673 * HW design issue. 1673 * HW design issue.
1674 */ 1674 */
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index dd43114e9684..da110bd88346 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -100,7 +100,7 @@ const struct of_device_id mpc52xx_pci_ids[] __initdata = {
100}; 100};
101 101
102/* ======================================================================== */ 102/* ======================================================================== */
103/* PCI configuration acess */ 103/* PCI configuration access */
104/* ======================================================================== */ 104/* ======================================================================== */
105 105
106static int 106static int
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index e81403b245b5..ab2027cdf893 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -302,7 +302,7 @@ static void __init setup_chaos(struct pci_controller *hose,
302 * 1 -> Skip the device but act as if the access was successfull 302 * 1 -> Skip the device but act as if the access was successfull
303 * (return 0xff's on reads, eventually, cache config space 303 * (return 0xff's on reads, eventually, cache config space
304 * accesses in a later version) 304 * accesses in a later version)
305 * -1 -> Hide the device (unsuccessful acess) 305 * -1 -> Hide the device (unsuccessful access)
306 */ 306 */
307static int u3_ht_skip_device(struct pci_controller *hose, 307static int u3_ht_skip_device(struct pci_controller *hose,
308 struct pci_bus *bus, unsigned int devfn) 308 struct pci_bus *bus, unsigned int devfn)
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index ae3c4db86fe8..bafc3f85360d 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -160,7 +160,7 @@ static int dart_build(struct iommu_table *tbl, long index,
160 160
161 dp = ((unsigned int*)tbl->it_base) + index; 161 dp = ((unsigned int*)tbl->it_base) + index;
162 162
163 /* On U3, all memory is contigous, so we can move this 163 /* On U3, all memory is contiguous, so we can move this
164 * out of the loop. 164 * out of the loop.
165 */ 165 */
166 l = npages; 166 l = npages;
diff --git a/arch/s390/math-emu/math.c b/arch/s390/math-emu/math.c
index 3ee78ccb617d..cd4e9c168dd7 100644
--- a/arch/s390/math-emu/math.c
+++ b/arch/s390/math-emu/math.c
@@ -2088,7 +2088,7 @@ int math_emu_ldr(__u8 *opcode) {
2088 __u16 opc = *((__u16 *) opcode); 2088 __u16 opc = *((__u16 *) opcode);
2089 2089
2090 if ((opc & 0x90) == 0) { /* test if rx in {0,2,4,6} */ 2090 if ((opc & 0x90) == 0) { /* test if rx in {0,2,4,6} */
2091 /* we got an exception therfore ry can't be in {0,2,4,6} */ 2091 /* we got an exception therefore ry can't be in {0,2,4,6} */
2092 asm volatile( /* load rx from fp_regs.fprs[ry] */ 2092 asm volatile( /* load rx from fp_regs.fprs[ry] */
2093 " bras 1,0f\n" 2093 " bras 1,0f\n"
2094 " ld 0,0(%1)\n" 2094 " ld 0,0(%1)\n"
@@ -2118,7 +2118,7 @@ int math_emu_ler(__u8 *opcode) {
2118 __u16 opc = *((__u16 *) opcode); 2118 __u16 opc = *((__u16 *) opcode);
2119 2119
2120 if ((opc & 0x90) == 0) { /* test if rx in {0,2,4,6} */ 2120 if ((opc & 0x90) == 0) { /* test if rx in {0,2,4,6} */
2121 /* we got an exception therfore ry can't be in {0,2,4,6} */ 2121 /* we got an exception therefore ry can't be in {0,2,4,6} */
2122 asm volatile( /* load rx from fp_regs.fprs[ry] */ 2122 asm volatile( /* load rx from fp_regs.fprs[ry] */
2123 " bras 1,0f\n" 2123 " bras 1,0f\n"
2124 " le 0,0(%1)\n" 2124 " le 0,0(%1)\n"
diff --git a/arch/sh/include/mach-common/mach/titan.h b/arch/sh/include/mach-common/mach/titan.h
index 03f3583c8918..4a674d27cbb8 100644
--- a/arch/sh/include/mach-common/mach/titan.h
+++ b/arch/sh/include/mach-common/mach/titan.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Platform defintions for Titan 2 * Platform definitions for Titan
3 */ 3 */
4#ifndef _ASM_SH_TITAN_H 4#ifndef _ASM_SH_TITAN_H
5#define _ASM_SH_TITAN_H 5#define _ASM_SH_TITAN_H
diff --git a/arch/x86/include/asm/desc_defs.h b/arch/x86/include/asm/desc_defs.h
index 9d6684849fd9..278441f39856 100644
--- a/arch/x86/include/asm/desc_defs.h
+++ b/arch/x86/include/asm/desc_defs.h
@@ -12,9 +12,9 @@
12#include <linux/types.h> 12#include <linux/types.h>
13 13
14/* 14/*
15 * FIXME: Acessing the desc_struct through its fields is more elegant, 15 * FIXME: Accessing the desc_struct through its fields is more elegant,
16 * and should be the one valid thing to do. However, a lot of open code 16 * and should be the one valid thing to do. However, a lot of open code
17 * still touches the a and b acessors, and doing this allow us to do it 17 * still touches the a and b accessors, and doing this allow us to do it
18 * incrementally. We keep the signature as a struct, rather than an union, 18 * incrementally. We keep the signature as a struct, rather than an union,
19 * so we can get rid of it transparently in the future -- glommer 19 * so we can get rid of it transparently in the future -- glommer
20 */ 20 */
diff --git a/arch/x86/include/asm/mmzone_32.h b/arch/x86/include/asm/mmzone_32.h
index ede6998bd92c..91df7c51806c 100644
--- a/arch/x86/include/asm/mmzone_32.h
+++ b/arch/x86/include/asm/mmzone_32.h
@@ -47,7 +47,7 @@ static inline void resume_map_numa_kva(pgd_t *pgd) {}
47/* 47/*
48 * generic node memory support, the following assumptions apply: 48 * generic node memory support, the following assumptions apply:
49 * 49 *
50 * 1) memory comes in 64Mb contigious chunks which are either present or not 50 * 1) memory comes in 64Mb contiguous chunks which are either present or not
51 * 2) we will not have more than 64Gb in total 51 * 2) we will not have more than 64Gb in total
52 * 52 *
53 * for now assume that 64Gb is max amount of RAM for whole system 53 * for now assume that 64Gb is max amount of RAM for whole system
diff --git a/arch/x86/include/asm/sigcontext.h b/arch/x86/include/asm/sigcontext.h
index 72e5a4491661..04459d25e66e 100644
--- a/arch/x86/include/asm/sigcontext.h
+++ b/arch/x86/include/asm/sigcontext.h
@@ -124,7 +124,7 @@ struct sigcontext {
124 * fpstate is really (struct _fpstate *) or (struct _xstate *) 124 * fpstate is really (struct _fpstate *) or (struct _xstate *)
125 * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved 125 * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved
126 * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end 126 * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end
127 * of extended memory layout. See comments at the defintion of 127 * of extended memory layout. See comments at the definition of
128 * (struct _fpx_sw_bytes) 128 * (struct _fpx_sw_bytes)
129 */ 129 */
130 void __user *fpstate; /* zero when no FPU/extended context */ 130 void __user *fpstate; /* zero when no FPU/extended context */
@@ -219,7 +219,7 @@ struct sigcontext {
219 * fpstate is really (struct _fpstate *) or (struct _xstate *) 219 * fpstate is really (struct _fpstate *) or (struct _xstate *)
220 * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved 220 * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved
221 * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end 221 * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end
222 * of extended memory layout. See comments at the defintion of 222 * of extended memory layout. See comments at the definition of
223 * (struct _fpx_sw_bytes) 223 * (struct _fpx_sw_bytes)
224 */ 224 */
225 void __user *fpstate; /* zero when no FPU/extended context */ 225 void __user *fpstate; /* zero when no FPU/extended context */
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
index 80e2984f521c..b414d2b401f6 100644
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ b/arch/x86/include/asm/uv/uv_bau.h
@@ -55,7 +55,7 @@
55#define DESC_STATUS_SOURCE_TIMEOUT 3 55#define DESC_STATUS_SOURCE_TIMEOUT 3
56 56
57/* 57/*
58 * source side threshholds at which message retries print a warning 58 * source side thresholds at which message retries print a warning
59 */ 59 */
60#define SOURCE_TIMEOUT_LIMIT 20 60#define SOURCE_TIMEOUT_LIMIT 20
61#define DESTINATION_TIMEOUT_LIMIT 20 61#define DESTINATION_TIMEOUT_LIMIT 20
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 87eee07da21f..fb1035cd9a6a 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -1123,7 +1123,7 @@ static int __init acpi_parse_madt_ioapic_entries(void)
1123 if (!acpi_sci_override_gsi) 1123 if (!acpi_sci_override_gsi)
1124 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0); 1124 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0);
1125 1125
1126 /* Fill in identity legacy mapings where no override */ 1126 /* Fill in identity legacy mappings where no override */
1127 mp_config_acpi_legacy_irqs(); 1127 mp_config_acpi_legacy_irqs();
1128 1128
1129 count = 1129 count =
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 32fb09102a13..1c0fb4d4ad55 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -1783,7 +1783,7 @@ retry:
1783 goto out; 1783 goto out;
1784 1784
1785 /* 1785 /*
1786 * aperture was sucessfully enlarged by 128 MB, try 1786 * aperture was successfully enlarged by 128 MB, try
1787 * allocation again 1787 * allocation again
1788 */ 1788 */
1789 goto retry; 1789 goto retry;
@@ -2490,7 +2490,7 @@ int __init amd_iommu_init_passthrough(void)
2490 struct pci_dev *dev = NULL; 2490 struct pci_dev *dev = NULL;
2491 u16 devid; 2491 u16 devid;
2492 2492
2493 /* allocate passthroug domain */ 2493 /* allocate passthrough domain */
2494 pt_domain = protection_domain_alloc(); 2494 pt_domain = protection_domain_alloc();
2495 if (!pt_domain) 2495 if (!pt_domain)
2496 return -ENOMEM; 2496 return -ENOMEM;
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index c1bbed1021d9..ab1a8a89b984 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1286,7 +1286,7 @@ x86_perf_event_set_period(struct perf_event *event,
1286 return 0; 1286 return 0;
1287 1287
1288 /* 1288 /*
1289 * If we are way outside a reasoable range then just skip forward: 1289 * If we are way outside a reasonable range then just skip forward:
1290 */ 1290 */
1291 if (unlikely(left <= -period)) { 1291 if (unlikely(left <= -period)) {
1292 left = period; 1292 left = period;
diff --git a/arch/x86/kernel/kprobes.c b/arch/x86/kernel/kprobes.c
index 1f3186ce213c..5b8c7505b3bc 100644
--- a/arch/x86/kernel/kprobes.c
+++ b/arch/x86/kernel/kprobes.c
@@ -481,7 +481,7 @@ static int __kprobes reenter_kprobe(struct kprobe *p, struct pt_regs *regs,
481 481
482/* 482/*
483 * Interrupts are disabled on entry as trap3 is an interrupt gate and they 483 * Interrupts are disabled on entry as trap3 is an interrupt gate and they
484 * remain disabled thorough out this function. 484 * remain disabled throughout this function.
485 */ 485 */
486static int __kprobes kprobe_handler(struct pt_regs *regs) 486static int __kprobes kprobe_handler(struct pt_regs *regs)
487{ 487{
@@ -818,7 +818,7 @@ no_change:
818 818
819/* 819/*
820 * Interrupts are disabled on entry as trap1 is an interrupt gate and they 820 * Interrupts are disabled on entry as trap1 is an interrupt gate and they
821 * remain disabled thoroughout this function. 821 * remain disabled throughout this function.
822 */ 822 */
823static int __kprobes post_kprobe_handler(struct pt_regs *regs) 823static int __kprobes post_kprobe_handler(struct pt_regs *regs)
824{ 824{
diff --git a/arch/x86/mm/kmmio.c b/arch/x86/mm/kmmio.c
index 11a4ad4d6253..07bcc309cfda 100644
--- a/arch/x86/mm/kmmio.c
+++ b/arch/x86/mm/kmmio.c
@@ -203,7 +203,7 @@ static void disarm_kmmio_fault_page(struct kmmio_fault_page *f)
203 */ 203 */
204/* 204/*
205 * Interrupts are disabled on entry as trap3 is an interrupt gate 205 * Interrupts are disabled on entry as trap3 is an interrupt gate
206 * and they remain disabled thorough out this function. 206 * and they remain disabled throughout this function.
207 */ 207 */
208int kmmio_handler(struct pt_regs *regs, unsigned long addr) 208int kmmio_handler(struct pt_regs *regs, unsigned long addr)
209{ 209{
@@ -302,7 +302,7 @@ no_kmmio:
302 302
303/* 303/*
304 * Interrupts are disabled on entry as trap1 is an interrupt gate 304 * Interrupts are disabled on entry as trap1 is an interrupt gate
305 * and they remain disabled thorough out this function. 305 * and they remain disabled throughout this function.
306 * This must always get called as the pair to kmmio_handler(). 306 * This must always get called as the pair to kmmio_handler().
307 */ 307 */
308static int post_kmmio_handler(unsigned long condition, struct pt_regs *regs) 308static int post_kmmio_handler(unsigned long condition, struct pt_regs *regs)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 10:46:55 -0500