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-rw-r--r--arch/blackfin/kernel/bfin_dma_5xx.c2
-rw-r--r--arch/blackfin/mach-bf527/dma.c4
-rw-r--r--arch/blackfin/mach-bf533/dma.c4
-rw-r--r--arch/blackfin/mach-bf537/dma.c4
-rw-r--r--arch/blackfin/mach-bf548/dma.c4
-rw-r--r--arch/blackfin/mach-bf561/dma.c4
6 files changed, 11 insertions, 11 deletions
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index 8fd5d22cec34..18fc8a835944 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -67,7 +67,7 @@ static int __init blackfin_dma_init(void)
67 67
68 for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) { 68 for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) {
69 dma_ch[i].chan_status = DMA_CHANNEL_FREE; 69 dma_ch[i].chan_status = DMA_CHANNEL_FREE;
70 dma_ch[i].regs = base_addr[i]; 70 dma_ch[i].regs = dma_io_base_addr[i];
71 mutex_init(&(dma_ch[i].dmalock)); 71 mutex_init(&(dma_ch[i].dmalock));
72 } 72 }
73 /* Mark MEMDMA Channel 0 as requested since we're using it internally */ 73 /* Mark MEMDMA Channel 0 as requested since we're using it internally */
diff --git a/arch/blackfin/mach-bf527/dma.c b/arch/blackfin/mach-bf527/dma.c
index 0a82b154c082..dfd080cda787 100644
--- a/arch/blackfin/mach-bf527/dma.c
+++ b/arch/blackfin/mach-bf527/dma.c
@@ -31,7 +31,7 @@
31#include <asm/blackfin.h> 31#include <asm/blackfin.h>
32#include <asm/dma.h> 32#include <asm/dma.h>
33 33
34struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { 34struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
35 (struct dma_register *) DMA0_NEXT_DESC_PTR, 35 (struct dma_register *) DMA0_NEXT_DESC_PTR,
36 (struct dma_register *) DMA1_NEXT_DESC_PTR, 36 (struct dma_register *) DMA1_NEXT_DESC_PTR,
37 (struct dma_register *) DMA2_NEXT_DESC_PTR, 37 (struct dma_register *) DMA2_NEXT_DESC_PTR,
@@ -49,7 +49,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
49 (struct dma_register *) MDMA_D1_NEXT_DESC_PTR, 49 (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
50 (struct dma_register *) MDMA_S1_NEXT_DESC_PTR, 50 (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
51}; 51};
52EXPORT_SYMBOL(base_addr); 52EXPORT_SYMBOL(dma_io_base_addr);
53 53
54int channel2irq(unsigned int channel) 54int channel2irq(unsigned int channel)
55{ 55{
diff --git a/arch/blackfin/mach-bf533/dma.c b/arch/blackfin/mach-bf533/dma.c
index 8d80efce396e..28655c1cb7dc 100644
--- a/arch/blackfin/mach-bf533/dma.c
+++ b/arch/blackfin/mach-bf533/dma.c
@@ -31,7 +31,7 @@
31#include <asm/blackfin.h> 31#include <asm/blackfin.h>
32#include <asm/dma.h> 32#include <asm/dma.h>
33 33
34struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { 34struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
35 (struct dma_register *) DMA0_NEXT_DESC_PTR, 35 (struct dma_register *) DMA0_NEXT_DESC_PTR,
36 (struct dma_register *) DMA1_NEXT_DESC_PTR, 36 (struct dma_register *) DMA1_NEXT_DESC_PTR,
37 (struct dma_register *) DMA2_NEXT_DESC_PTR, 37 (struct dma_register *) DMA2_NEXT_DESC_PTR,
@@ -45,7 +45,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
45 (struct dma_register *) MDMA_D1_NEXT_DESC_PTR, 45 (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
46 (struct dma_register *) MDMA_S1_NEXT_DESC_PTR, 46 (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
47}; 47};
48EXPORT_SYMBOL(base_addr); 48EXPORT_SYMBOL(dma_io_base_addr);
49 49
50int channel2irq(unsigned int channel) 50int channel2irq(unsigned int channel)
51{ 51{
diff --git a/arch/blackfin/mach-bf537/dma.c b/arch/blackfin/mach-bf537/dma.c
index 992b19f400e7..4edb363ff99c 100644
--- a/arch/blackfin/mach-bf537/dma.c
+++ b/arch/blackfin/mach-bf537/dma.c
@@ -31,7 +31,7 @@
31#include <asm/blackfin.h> 31#include <asm/blackfin.h>
32#include <asm/dma.h> 32#include <asm/dma.h>
33 33
34struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { 34struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
35 (struct dma_register *) DMA0_NEXT_DESC_PTR, 35 (struct dma_register *) DMA0_NEXT_DESC_PTR,
36 (struct dma_register *) DMA1_NEXT_DESC_PTR, 36 (struct dma_register *) DMA1_NEXT_DESC_PTR,
37 (struct dma_register *) DMA2_NEXT_DESC_PTR, 37 (struct dma_register *) DMA2_NEXT_DESC_PTR,
@@ -49,7 +49,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
49 (struct dma_register *) MDMA_D1_NEXT_DESC_PTR, 49 (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
50 (struct dma_register *) MDMA_S1_NEXT_DESC_PTR, 50 (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
51}; 51};
52EXPORT_SYMBOL(base_addr); 52EXPORT_SYMBOL(dma_io_base_addr);
53 53
54int channel2irq(unsigned int channel) 54int channel2irq(unsigned int channel)
55{ 55{
diff --git a/arch/blackfin/mach-bf548/dma.c b/arch/blackfin/mach-bf548/dma.c
index e78a88331495..74730eb8ae1b 100644
--- a/arch/blackfin/mach-bf548/dma.c
+++ b/arch/blackfin/mach-bf548/dma.c
@@ -32,7 +32,7 @@
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33#include <asm/dma.h> 33#include <asm/dma.h>
34 34
35struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { 35struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
36 (struct dma_register *) DMA0_NEXT_DESC_PTR, 36 (struct dma_register *) DMA0_NEXT_DESC_PTR,
37 (struct dma_register *) DMA1_NEXT_DESC_PTR, 37 (struct dma_register *) DMA1_NEXT_DESC_PTR,
38 (struct dma_register *) DMA2_NEXT_DESC_PTR, 38 (struct dma_register *) DMA2_NEXT_DESC_PTR,
@@ -66,7 +66,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
66 (struct dma_register *) MDMA_D3_NEXT_DESC_PTR, 66 (struct dma_register *) MDMA_D3_NEXT_DESC_PTR,
67 (struct dma_register *) MDMA_S3_NEXT_DESC_PTR, 67 (struct dma_register *) MDMA_S3_NEXT_DESC_PTR,
68}; 68};
69EXPORT_SYMBOL(base_addr); 69EXPORT_SYMBOL(dma_io_base_addr);
70 70
71int channel2irq(unsigned int channel) 71int channel2irq(unsigned int channel)
72{ 72{
diff --git a/arch/blackfin/mach-bf561/dma.c b/arch/blackfin/mach-bf561/dma.c
index 9863ae4fb8a4..24415eb82698 100644
--- a/arch/blackfin/mach-bf561/dma.c
+++ b/arch/blackfin/mach-bf561/dma.c
@@ -31,7 +31,7 @@
31#include <asm/blackfin.h> 31#include <asm/blackfin.h>
32#include <asm/dma.h> 32#include <asm/dma.h>
33 33
34struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { 34struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
35 (struct dma_register *) DMA1_0_NEXT_DESC_PTR, 35 (struct dma_register *) DMA1_0_NEXT_DESC_PTR,
36 (struct dma_register *) DMA1_1_NEXT_DESC_PTR, 36 (struct dma_register *) DMA1_1_NEXT_DESC_PTR,
37 (struct dma_register *) DMA1_2_NEXT_DESC_PTR, 37 (struct dma_register *) DMA1_2_NEXT_DESC_PTR,
@@ -69,7 +69,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
69 (struct dma_register *) IMDMA_D1_NEXT_DESC_PTR, 69 (struct dma_register *) IMDMA_D1_NEXT_DESC_PTR,
70 (struct dma_register *) IMDMA_S1_NEXT_DESC_PTR, 70 (struct dma_register *) IMDMA_S1_NEXT_DESC_PTR,
71}; 71};
72EXPORT_SYMBOL(base_addr); 72EXPORT_SYMBOL(dma_io_base_addr);
73 73
74int channel2irq(unsigned int channel) 74int channel2irq(unsigned int channel)
75{ 75{