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-rw-r--r--arch/m68knommu/Kconfig4
-rw-r--r--arch/m68knommu/Makefile22
-rw-r--r--arch/m68knommu/kernel/time.c81
-rw-r--r--arch/m68knommu/platform/5206/config.c76
-rw-r--r--arch/m68knommu/platform/5206e/config.c80
-rw-r--r--arch/m68knommu/platform/520x/config.c101
-rw-r--r--arch/m68knommu/platform/523x/config.c75
-rw-r--r--arch/m68knommu/platform/5249/config.c77
-rw-r--r--arch/m68knommu/platform/5272/config.c85
-rw-r--r--arch/m68knommu/platform/527x/config.c87
-rw-r--r--arch/m68knommu/platform/528x/config.c86
-rw-r--r--arch/m68knommu/platform/5307/Makefile14
-rw-r--r--arch/m68knommu/platform/5307/config.c85
-rw-r--r--arch/m68knommu/platform/532x/config.c94
-rw-r--r--arch/m68knommu/platform/5407/config.c83
-rw-r--r--arch/m68knommu/platform/68328/timers.c56
-rw-r--r--arch/m68knommu/platform/68360/config.c5
-rw-r--r--arch/m68knommu/platform/coldfire/Makefile32
-rw-r--r--arch/m68knommu/platform/coldfire/dma.c39
-rw-r--r--arch/m68knommu/platform/coldfire/entry.S (renamed from arch/m68knommu/platform/5307/entry.S)0
-rw-r--r--arch/m68knommu/platform/coldfire/head.S (renamed from arch/m68knommu/platform/5307/head.S)0
-rw-r--r--arch/m68knommu/platform/coldfire/pit.c (renamed from arch/m68knommu/platform/5307/pit.c)86
-rw-r--r--arch/m68knommu/platform/coldfire/timers.c (renamed from arch/m68knommu/platform/5307/timers.c)68
-rw-r--r--arch/m68knommu/platform/coldfire/vectors.c (renamed from arch/m68knommu/platform/5307/vectors.c)0
-rw-r--r--arch/powerpc/platforms/pasemi/iommu.c2
25 files changed, 951 insertions, 387 deletions
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index f4b582cbb567..bd9213749ac2 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -53,6 +53,10 @@ config GENERIC_CALIBRATE_DELAY
53 bool 53 bool
54 default y 54 default y
55 55
56config GENERIC_TIME
57 bool
58 default y
59
56config TIME_LOW_RES 60config TIME_LOW_RES
57 bool 61 bool
58 default y 62 default y
diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile
index 30aa2553693d..e0b5f62e395c 100644
--- a/arch/m68knommu/Makefile
+++ b/arch/m68knommu/Makefile
@@ -61,17 +61,17 @@ MODEL := $(model-y)
61# for the selected cpu. ONLY need to define this for the non-base member 61# for the selected cpu. ONLY need to define this for the non-base member
62# of the family. 62# of the family.
63# 63#
64cpuclass-$(CONFIG_M5206) := 5307 64cpuclass-$(CONFIG_M5206) := coldfire
65cpuclass-$(CONFIG_M5206e) := 5307 65cpuclass-$(CONFIG_M5206e) := coldfire
66cpuclass-$(CONFIG_M520x) := 5307 66cpuclass-$(CONFIG_M520x) := coldfire
67cpuclass-$(CONFIG_M523x) := 5307 67cpuclass-$(CONFIG_M523x) := coldfire
68cpuclass-$(CONFIG_M5249) := 5307 68cpuclass-$(CONFIG_M5249) := coldfire
69cpuclass-$(CONFIG_M527x) := 5307 69cpuclass-$(CONFIG_M527x) := coldfire
70cpuclass-$(CONFIG_M5272) := 5307 70cpuclass-$(CONFIG_M5272) := coldfire
71cpuclass-$(CONFIG_M528x) := 5307 71cpuclass-$(CONFIG_M528x) := coldfire
72cpuclass-$(CONFIG_M5307) := 5307 72cpuclass-$(CONFIG_M5307) := coldfire
73cpuclass-$(CONFIG_M532x) := 5307 73cpuclass-$(CONFIG_M532x) := coldfire
74cpuclass-$(CONFIG_M5407) := 5307 74cpuclass-$(CONFIG_M5407) := coldfire
75cpuclass-$(CONFIG_M68328) := 68328 75cpuclass-$(CONFIG_M68328) := 68328
76cpuclass-$(CONFIG_M68EZ328) := 68328 76cpuclass-$(CONFIG_M68EZ328) := 68328
77cpuclass-$(CONFIG_M68VZ328) := 68328 77cpuclass-$(CONFIG_M68VZ328) := 68328
diff --git a/arch/m68knommu/kernel/time.c b/arch/m68knommu/kernel/time.c
index 77e5375a2dd5..89cdbcaeb45f 100644
--- a/arch/m68knommu/kernel/time.c
+++ b/arch/m68knommu/kernel/time.c
@@ -22,7 +22,6 @@
22#include <linux/timex.h> 22#include <linux/timex.h>
23 23
24#include <asm/machdep.h> 24#include <asm/machdep.h>
25#include <asm/io.h>
26#include <asm/irq_regs.h> 25#include <asm/irq_regs.h>
27 26
28#define TICK_SIZE (tick_nsec / 1000) 27#define TICK_SIZE (tick_nsec / 1000)
@@ -66,29 +65,6 @@ irqreturn_t arch_timer_interrupt(int irq, void *dummy)
66 else 65 else
67 last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */ 66 last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
68 } 67 }
69#ifdef CONFIG_HEARTBEAT
70 /* use power LED as a heartbeat instead -- much more useful
71 for debugging -- based on the version for PReP by Cort */
72 /* acts like an actual heart beat -- ie thump-thump-pause... */
73 if (mach_heartbeat) {
74 static unsigned cnt = 0, period = 0, dist = 0;
75
76 if (cnt == 0 || cnt == dist)
77 mach_heartbeat( 1 );
78 else if (cnt == 7 || cnt == dist+7)
79 mach_heartbeat( 0 );
80
81 if (++cnt > period) {
82 cnt = 0;
83 /* The hyperbolic function below modifies the heartbeat period
84 * length in dependency of the current (5min) load. It goes
85 * through the points f(0)=126, f(1)=86, f(5)=51,
86 * f(inf)->30. */
87 period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
88 dist = period / 4;
89 }
90 }
91#endif /* CONFIG_HEARTBEAT */
92 68
93 write_sequnlock(&xtime_lock); 69 write_sequnlock(&xtime_lock);
94 return(IRQ_HANDLED); 70 return(IRQ_HANDLED);
@@ -112,60 +88,3 @@ void time_init(void)
112 hw_timer_init(); 88 hw_timer_init();
113} 89}
114 90
115/*
116 * This version of gettimeofday has near microsecond resolution.
117 */
118void do_gettimeofday(struct timeval *tv)
119{
120 unsigned long flags;
121 unsigned long seq;
122 unsigned long usec, sec;
123
124 do {
125 seq = read_seqbegin_irqsave(&xtime_lock, flags);
126 usec = hw_timer_offset();
127 sec = xtime.tv_sec;
128 usec += (xtime.tv_nsec / 1000);
129 } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
130
131 while (usec >= 1000000) {
132 usec -= 1000000;
133 sec++;
134 }
135
136 tv->tv_sec = sec;
137 tv->tv_usec = usec;
138}
139
140EXPORT_SYMBOL(do_gettimeofday);
141
142int do_settimeofday(struct timespec *tv)
143{
144 time_t wtm_sec, sec = tv->tv_sec;
145 long wtm_nsec, nsec = tv->tv_nsec;
146
147 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
148 return -EINVAL;
149
150 write_seqlock_irq(&xtime_lock);
151 /*
152 * This is revolting. We need to set the xtime.tv_usec
153 * correctly. However, the value in this location is
154 * is value at the last tick.
155 * Discover what correction gettimeofday
156 * would have done, and then undo it!
157 */
158 nsec -= (hw_timer_offset() * 1000);
159
160 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
161 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
162
163 set_normalized_timespec(&xtime, sec, nsec);
164 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
165
166 ntp_clear();
167 write_sequnlock_irq(&xtime_lock);
168 clock_was_set();
169 return 0;
170}
171EXPORT_SYMBOL(do_settimeofday);
diff --git a/arch/m68knommu/platform/5206/config.c b/arch/m68knommu/platform/5206/config.c
index b3c4dd4cc135..53a5920c2b71 100644
--- a/arch/m68knommu/platform/5206/config.c
+++ b/arch/m68knommu/platform/5206/config.c
@@ -13,12 +13,11 @@
13#include <linux/param.h> 13#include <linux/param.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <asm/dma.h> 16#include <linux/io.h>
17#include <asm/machdep.h> 17#include <asm/machdep.h>
18#include <asm/coldfire.h> 18#include <asm/coldfire.h>
19#include <asm/mcftimer.h>
20#include <asm/mcfsim.h> 19#include <asm/mcfsim.h>
21#include <asm/mcfdma.h> 20#include <asm/mcfuart.h>
22 21
23/***************************************************************************/ 22/***************************************************************************/
24 23
@@ -26,15 +25,51 @@ void coldfire_reset(void);
26 25
27/***************************************************************************/ 26/***************************************************************************/
28 27
29/* 28static struct mcf_platform_uart m5206_uart_platform[] = {
30 * DMA channel base address table. 29 {
31 */ 30 .mapbase = MCF_MBAR + MCFUART_BASE1,
32unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { 31 .irq = 73,
33 MCF_MBAR + MCFDMA_BASE0, 32 },
34 MCF_MBAR + MCFDMA_BASE1, 33 {
34 .mapbase = MCF_MBAR + MCFUART_BASE2,
35 .irq = 74,
36 },
37 { },
38};
39
40static struct platform_device m5206_uart = {
41 .name = "mcfuart",
42 .id = 0,
43 .dev.platform_data = m5206_uart_platform,
44};
45
46static struct platform_device *m5206_devices[] __initdata = {
47 &m5206_uart,
35}; 48};
36 49
37unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; 50/***************************************************************************/
51
52static void __init m5206_uart_init_line(int line, int irq)
53{
54 if (line == 0) {
55 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
56 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
57 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
58 } else if (line == 1) {
59 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
60 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
61 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
62 }
63}
64
65static void __init m5206_uarts_init(void)
66{
67 const int nrlines = ARRAY_SIZE(m5206_uart_platform);
68 int line;
69
70 for (line = 0; (line < nrlines); line++)
71 m5206_uart_init_line(line, m5206_uart_platform[line].irq);
72}
38 73
39/***************************************************************************/ 74/***************************************************************************/
40 75
@@ -74,24 +109,21 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
74 109
75/***************************************************************************/ 110/***************************************************************************/
76 111
77int mcf_timerirqpending(int timer) 112void __init config_BSP(char *commandp, int size)
78{ 113{
79 unsigned int imr = 0; 114 mcf_setimr(MCFSIM_IMR_MASKALL);
80 115 mach_reset = coldfire_reset;
81 switch (timer) {
82 case 1: imr = MCFSIM_IMR_TIMER1; break;
83 case 2: imr = MCFSIM_IMR_TIMER2; break;
84 default: break;
85 }
86 return (mcf_getipr() & imr);
87} 116}
88 117
89/***************************************************************************/ 118/***************************************************************************/
90 119
91void config_BSP(char *commandp, int size) 120static int __init init_BSP(void)
92{ 121{
93 mcf_setimr(MCFSIM_IMR_MASKALL); 122 m5206_uarts_init();
94 mach_reset = coldfire_reset; 123 platform_add_devices(m5206_devices, ARRAY_SIZE(m5206_devices));
124 return 0;
95} 125}
96 126
127arch_initcall(init_BSP);
128
97/***************************************************************************/ 129/***************************************************************************/
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c
index f84a4aea8cb6..a6692e958f6b 100644
--- a/arch/m68knommu/platform/5206e/config.c
+++ b/arch/m68knommu/platform/5206e/config.c
@@ -10,8 +10,9 @@
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/param.h> 12#include <linux/param.h>
13#include <linux/init.h>
13#include <linux/interrupt.h> 14#include <linux/interrupt.h>
14#include <asm/dma.h> 15#include <linux/io.h>
15#include <asm/machdep.h> 16#include <asm/machdep.h>
16#include <asm/coldfire.h> 17#include <asm/coldfire.h>
17#include <asm/mcfsim.h> 18#include <asm/mcfsim.h>
@@ -23,15 +24,51 @@ void coldfire_reset(void);
23 24
24/***************************************************************************/ 25/***************************************************************************/
25 26
26/* 27static struct mcf_platform_uart m5206e_uart_platform[] = {
27 * DMA channel base address table. 28 {
28 */ 29 .mapbase = MCF_MBAR + MCFUART_BASE1,
29unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { 30 .irq = 73,
30 MCF_MBAR + MCFDMA_BASE0, 31 },
31 MCF_MBAR + MCFDMA_BASE1, 32 {
33 .mapbase = MCF_MBAR + MCFUART_BASE2,
34 .irq = 74,
35 },
36 { },
37};
38
39static struct platform_device m5206e_uart = {
40 .name = "mcfuart",
41 .id = 0,
42 .dev.platform_data = m5206e_uart_platform,
32}; 43};
33 44
34unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; 45static struct platform_device *m5206e_devices[] __initdata = {
46 &m5206e_uart,
47};
48
49/***************************************************************************/
50
51static void __init m5206_uart_init_line(int line, int irq)
52{
53 if (line == 0) {
54 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
55 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
56 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
57 } else if (line == 1) {
58 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
59 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
60 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
61 }
62}
63
64static void __init m5206e_uarts_init(void)
65{
66 const int nrlines = ARRAY_SIZE(m5206e_uart_platform);
67 int line;
68
69 for (line = 0; (line < nrlines); line++)
70 m5206e_uart_init_line(line, m5206e_uart_platform[line].irq);
71}
35 72
36/***************************************************************************/ 73/***************************************************************************/
37 74
@@ -71,21 +108,7 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
71 108
72/***************************************************************************/ 109/***************************************************************************/
73 110
74int mcf_timerirqpending(int timer) 111void __init config_BSP(char *commandp, int size)
75{
76 unsigned int imr = 0;
77
78 switch (timer) {
79 case 1: imr = MCFSIM_IMR_TIMER1; break;
80 case 2: imr = MCFSIM_IMR_TIMER2; break;
81 default: break;
82 }
83 return (mcf_getipr() & imr);
84}
85
86/***************************************************************************/
87
88void config_BSP(char *commandp, int size)
89{ 112{
90 mcf_setimr(MCFSIM_IMR_MASKALL); 113 mcf_setimr(MCFSIM_IMR_MASKALL);
91 114
@@ -99,3 +122,14 @@ void config_BSP(char *commandp, int size)
99} 122}
100 123
101/***************************************************************************/ 124/***************************************************************************/
125
126static int __init init_BSP(void)
127{
128 m5206e_uarts_init();
129 platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));
130 return 0;
131}
132
133arch_initcall(init_BSP);
134
135/***************************************************************************/
diff --git a/arch/m68knommu/platform/520x/config.c b/arch/m68knommu/platform/520x/config.c
index 6edbd41261cc..06d887cdcbfb 100644
--- a/arch/m68knommu/platform/520x/config.c
+++ b/arch/m68knommu/platform/520x/config.c
@@ -5,7 +5,7 @@
5 * 5 *
6 * Copyright (C) 2005, Freescale (www.freescale.com) 6 * Copyright (C) 2005, Freescale (www.freescale.com)
7 * Copyright (C) 2005, Intec Automation (mike@steroidmicros.com) 7 * Copyright (C) 2005, Intec Automation (mike@steroidmicros.com)
8 * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com) 8 * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com)
9 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com) 9 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
10 */ 10 */
11 11
@@ -13,21 +13,93 @@
13 13
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/param.h> 15#include <linux/param.h>
16#include <linux/init.h>
16#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/io.h>
17#include <asm/machdep.h> 19#include <asm/machdep.h>
18#include <asm/dma.h> 20#include <asm/coldfire.h>
21#include <asm/mcfsim.h>
22#include <asm/mcfuart.h>
19 23
20/***************************************************************************/ 24/***************************************************************************/
21 25
22/* 26void coldfire_reset(void);
23 * DMA channel base address table.
24 */
25unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS];
26unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
27 27
28/***************************************************************************/ 28/***************************************************************************/
29 29
30void coldfire_reset(void); 30static struct mcf_platform_uart m520x_uart_platform[] = {
31 {
32 .mapbase = MCF_MBAR + MCFUART_BASE1,
33 .irq = MCFINT_VECBASE + MCFINT_UART0,
34 },
35 {
36 .mapbase = MCF_MBAR + MCFUART_BASE2,
37 .irq = MCFINT_VECBASE + MCFINT_UART1,
38 },
39 {
40 .mapbase = MCF_MBAR + MCFUART_BASE3,
41 .irq = MCFINT_VECBASE + MCFINT_UART2,
42 },
43 { },
44};
45
46static struct platform_device m520x_uart = {
47 .name = "mcfuart",
48 .id = 0,
49 .dev.platform_data = m520x_uart_platform,
50};
51
52static struct platform_device *m520x_devices[] __initdata = {
53 &m520x_uart,
54};
55
56/***************************************************************************/
57
58#define INTC0 (MCF_MBAR + MCFICM_INTC0)
59
60static void __init m520x_uart_init_line(int line, int irq)
61{
62 u32 imr;
63 u16 par;
64 u8 par2;
65
66 writeb(0x03, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
67
68 imr = readl(INTC0 + MCFINTC_IMRL);
69 imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
70 writel(imr, INTC0 + MCFINTC_IMRL);
71
72 switch (line) {
73 case 0:
74 par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
75 par |= MCF_GPIO_PAR_UART_PAR_UTXD0 |
76 MCF_GPIO_PAR_UART_PAR_URXD0;
77 writew(par, MCF_IPSBAR + MCF_GPIO_PAR_UART);
78 break;
79 case 1:
80 par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
81 par |= MCF_GPIO_PAR_UART_PAR_UTXD1 |
82 MCF_GPIO_PAR_UART_PAR_URXD1;
83 writew(par, MCF_IPSBAR + MCF_GPIO_PAR_UART);
84 break;
85 case 2:
86 par2 = readb(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
87 par2 &= ~0x0F;
88 par2 |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 |
89 MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2;
90 writeb(par2, MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
91 break;
92 }
93}
94
95static void __init m520x_uarts_init(void)
96{
97 const int nrlines = ARRAY_SIZE(m520x_uart_platform);
98 int line;
99
100 for (line = 0; (line < nrlines); line++)
101 m520x_uart_init_line(line, m520x_uart_platform[line].irq);
102}
31 103
32/***************************************************************************/ 104/***************************************************************************/
33 105
@@ -42,9 +114,20 @@ void mcf_autovector(unsigned int vec)
42 114
43/***************************************************************************/ 115/***************************************************************************/
44 116
45void config_BSP(char *commandp, int size) 117void __init config_BSP(char *commandp, int size)
46{ 118{
47 mach_reset = coldfire_reset; 119 mach_reset = coldfire_reset;
120 m520x_uarts_init();
48} 121}
49 122
50/***************************************************************************/ 123/***************************************************************************/
124
125static int __init init_BSP(void)
126{
127 platform_add_devices(m520x_devices, ARRAY_SIZE(m520x_devices));
128 return 0;
129}
130
131arch_initcall(init_BSP);
132
133/***************************************************************************/
diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68knommu/platform/523x/config.c
index e7f80c8e8636..13f02611ea23 100644
--- a/arch/m68knommu/platform/523x/config.c
+++ b/arch/m68knommu/platform/523x/config.c
@@ -16,11 +16,11 @@
16#include <linux/param.h> 16#include <linux/param.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <asm/dma.h> 19#include <linux/io.h>
20#include <asm/machdep.h> 20#include <asm/machdep.h>
21#include <asm/coldfire.h> 21#include <asm/coldfire.h>
22#include <asm/mcfsim.h> 22#include <asm/mcfsim.h>
23#include <asm/mcfdma.h> 23#include <asm/mcfuart.h>
24 24
25/***************************************************************************/ 25/***************************************************************************/
26 26
@@ -28,14 +28,58 @@ void coldfire_reset(void);
28 28
29/***************************************************************************/ 29/***************************************************************************/
30 30
31/* 31static struct mcf_platform_uart m523x_uart_platform[] = {
32 * DMA channel base address table. 32 {
33 */ 33 .mapbase = MCF_MBAR + MCFUART_BASE1,
34unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { 34 .irq = MCFINT_VECBASE + MCFINT_UART0,
35 MCF_MBAR + MCFDMA_BASE0, 35 },
36 {
37 .mapbase = MCF_MBAR + MCFUART_BASE2,
38 .irq = MCFINT_VECBASE + MCFINT_UART0 + 1,
39 },
40 {
41 .mapbase = MCF_MBAR + MCFUART_BASE3,
42 .irq = MCFINT_VECBASE + MCFINT_UART0 + 2,
43 },
44 { },
45};
46
47static struct platform_device m523x_uart = {
48 .name = "mcfuart",
49 .id = 0,
50 .dev.platform_data = m523x_uart_platform,
51};
52
53static struct platform_device *m523x_devices[] __initdata = {
54 &m523x_uart,
36}; 55};
37 56
38unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; 57/***************************************************************************/
58
59#define INTC0 (MCF_MBAR + MCFICM_INTC0)
60
61static void __init m523x_uart_init_line(int line, int irq)
62{
63 u32 imr;
64
65 if ((line < 0) || (line > 2))
66 return;
67
68 writeb(0x30+line, (INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line));
69
70 imr = readl(INTC0 + MCFINTC_IMRL);
71 imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
72 writel(imr, INTC0 + MCFINTC_IMRL);
73}
74
75static void __init m523x_uarts_init(void)
76{
77 const int nrlines = ARRAY_SIZE(m523x_uart_platform);
78 int line;
79
80 for (line = 0; (line < nrlines); line++)
81 m523x_uart_init_line(line, m523x_uart_platform[line].irq);
82}
39 83
40/***************************************************************************/ 84/***************************************************************************/
41 85
@@ -49,15 +93,26 @@ void mcf_disableall(void)
49 93
50void mcf_autovector(unsigned int vec) 94void mcf_autovector(unsigned int vec)
51{ 95{
52 /* Everything is auto-vectored on the 5272 */ 96 /* Everything is auto-vectored on the 523x */
53} 97}
54 98
55/***************************************************************************/ 99/***************************************************************************/
56 100
57void config_BSP(char *commandp, int size) 101void __init config_BSP(char *commandp, int size)
58{ 102{
59 mcf_disableall(); 103 mcf_disableall();
60 mach_reset = coldfire_reset; 104 mach_reset = coldfire_reset;
105 m523x_uarts_init();
61} 106}
62 107
63/***************************************************************************/ 108/***************************************************************************/
109
110static int __init init_BSP(void)
111{
112 platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices));
113 return 0;
114}
115
116arch_initcall(init_BSP);
117
118/***************************************************************************/
diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68knommu/platform/5249/config.c
index d4d39435cb15..d299f7b8768a 100644
--- a/arch/m68knommu/platform/5249/config.c
+++ b/arch/m68knommu/platform/5249/config.c
@@ -12,11 +12,11 @@
12#include <linux/param.h> 12#include <linux/param.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <asm/dma.h> 15#include <linux/io.h>
16#include <asm/machdep.h> 16#include <asm/machdep.h>
17#include <asm/coldfire.h> 17#include <asm/coldfire.h>
18#include <asm/mcfsim.h> 18#include <asm/mcfsim.h>
19#include <asm/mcfdma.h> 19#include <asm/mcfuart.h>
20 20
21/***************************************************************************/ 21/***************************************************************************/
22 22
@@ -24,17 +24,51 @@ void coldfire_reset(void);
24 24
25/***************************************************************************/ 25/***************************************************************************/
26 26
27/* 27static struct mcf_platform_uart m5249_uart_platform[] = {
28 * DMA channel base address table. 28 {
29 */ 29 .mapbase = MCF_MBAR + MCFUART_BASE1,
30unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { 30 .irq = 73,
31 MCF_MBAR + MCFDMA_BASE0, 31 },
32 MCF_MBAR + MCFDMA_BASE1, 32 {
33 MCF_MBAR + MCFDMA_BASE2, 33 .mapbase = MCF_MBAR + MCFUART_BASE2,
34 MCF_MBAR + MCFDMA_BASE3, 34 .irq = 74,
35 }
36};
37
38static struct platform_device m5249_uart = {
39 .name = "mcfuart",
40 .id = 0,
41 .dev.platform_data = m5249_uart_platform,
42};
43
44static struct platform_device *m5249_devices[] __initdata = {
45 &m5249_uart,
35}; 46};
36 47
37unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; 48/***************************************************************************/
49
50static void __init m5249_uart_init_line(int line, int irq)
51{
52 if (line == 0) {
53 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
54 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
55 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
56 } else if (line == 1) {
57 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
58 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
59 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
60 }
61}
62
63static void __init m5249_uarts_init(void)
64{
65 const int nrlines = ARRAY_SIZE(m5249_uart_platform);
66 int line;
67
68 for (line = 0; (line < nrlines); line++)
69 m5249_uart_init_line(line, m5249_uart_platform[line].irq);
70}
71
38 72
39/***************************************************************************/ 73/***************************************************************************/
40 74
@@ -71,24 +105,21 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
71 105
72/***************************************************************************/ 106/***************************************************************************/
73 107
74int mcf_timerirqpending(int timer) 108void __init config_BSP(char *commandp, int size)
75{ 109{
76 unsigned int imr = 0; 110 mcf_setimr(MCFSIM_IMR_MASKALL);
77 111 mach_reset = coldfire_reset;
78 switch (timer) {
79 case 1: imr = MCFSIM_IMR_TIMER1; break;
80 case 2: imr = MCFSIM_IMR_TIMER2; break;
81 default: break;
82 }
83 return (mcf_getipr() & imr);
84} 112}
85 113
86/***************************************************************************/ 114/***************************************************************************/
87 115
88void config_BSP(char *commandp, int size) 116static int __init init_BSP(void)
89{ 117{
90 mcf_setimr(MCFSIM_IMR_MASKALL); 118 m5249_uarts_init();
91 mach_reset = coldfire_reset; 119 platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
120 return 0;
92} 121}
93 122
123arch_initcall(init_BSP);
124
94/***************************************************************************/ 125/***************************************************************************/
diff --git a/arch/m68knommu/platform/5272/config.c b/arch/m68knommu/platform/5272/config.c
index 634a6375e4a5..2aca599a1ca7 100644
--- a/arch/m68knommu/platform/5272/config.c
+++ b/arch/m68knommu/platform/5272/config.c
@@ -13,11 +13,11 @@
13#include <linux/param.h> 13#include <linux/param.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <asm/dma.h> 16#include <linux/io.h>
17#include <asm/machdep.h> 17#include <asm/machdep.h>
18#include <asm/coldfire.h> 18#include <asm/coldfire.h>
19#include <asm/mcfsim.h> 19#include <asm/mcfsim.h>
20#include <asm/mcfdma.h> 20#include <asm/mcfuart.h>
21 21
22/***************************************************************************/ 22/***************************************************************************/
23 23
@@ -37,14 +37,57 @@ unsigned char ledbank = 0xff;
37 37
38/***************************************************************************/ 38/***************************************************************************/
39 39
40/* 40static struct mcf_platform_uart m5272_uart_platform[] = {
41 * DMA channel base address table. 41 {
42 */ 42 .mapbase = MCF_MBAR + MCFUART_BASE1,
43unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { 43 .irq = 73,
44 MCF_MBAR + MCFDMA_BASE0, 44 },
45 {
46 .mapbase = MCF_MBAR + MCFUART_BASE2,
47 .irq = 74,
48 },
49 { },
45}; 50};
46 51
47unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; 52static struct platform_device m5272_uart = {
53 .name = "mcfuart",
54 .id = 0,
55 .dev.platform_data = m5272_uart_platform,
56};
57
58static struct platform_device *m5272_devices[] __initdata = {
59 &m5272_uart,
60};
61
62/***************************************************************************/
63
64static void __init m5272_uart_init_line(int line, int irq)
65{
66 u32 v;
67
68 if ((line >= 0) && (line < 2)) {
69 v = (line) ? 0x0e000000 : 0xe0000000;
70 writel(v, MCF_MBAR + MCFSIM_ICR2);
71
72 /* Enable the output lines for the serial ports */
73 v = readl(MCF_MBAR + MCFSIM_PBCNT);
74 v = (v & ~0x000000ff) | 0x00000055;
75 writel(v, MCF_MBAR + MCFSIM_PBCNT);
76
77 v = readl(MCF_MBAR + MCFSIM_PDCNT);
78 v = (v & ~0x000003fc) | 0x000002a8;
79 writel(v, MCF_MBAR + MCFSIM_PDCNT);
80 }
81}
82
83static void __init m5272_uarts_init(void)
84{
85 const int nrlines = ARRAY_SIZE(m5272_uart_platform);
86 int line;
87
88 for (line = 0; (line < nrlines); line++)
89 m5272_uart_init_line(line, m5272_uart_platform[line].irq);
90}
48 91
49/***************************************************************************/ 92/***************************************************************************/
50 93
@@ -80,20 +123,7 @@ void mcf_settimericr(int timer, int level)
80 123
81/***************************************************************************/ 124/***************************************************************************/
82 125
83int mcf_timerirqpending(int timer) 126void __init config_BSP(char *commandp, int size)
84{
85 volatile unsigned long *icrp;
86
87 if ((timer >= 1 ) && (timer <= 4)) {
88 icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
89 return (*icrp & (0x8 << ((4 - timer) * 4)));
90 }
91 return 0;
92}
93
94/***************************************************************************/
95
96void config_BSP(char *commandp, int size)
97{ 127{
98#if defined (CONFIG_MOD5272) 128#if defined (CONFIG_MOD5272)
99 volatile unsigned char *pivrp; 129 volatile unsigned char *pivrp;
@@ -125,3 +155,14 @@ void config_BSP(char *commandp, int size)
125} 155}
126 156
127/***************************************************************************/ 157/***************************************************************************/
158
159static int __init init_BSP(void)
160{
161 m5272_uarts_init();
162 platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices));
163 return 0;
164}
165
166arch_initcall(init_BSP);
167
168/***************************************************************************/
diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68knommu/platform/527x/config.c
index 9cbfbc68ae4f..73cd1aef4a90 100644
--- a/arch/m68knommu/platform/527x/config.c
+++ b/arch/m68knommu/platform/527x/config.c
@@ -16,11 +16,11 @@
16#include <linux/param.h> 16#include <linux/param.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <asm/dma.h> 19#include <linux/io.h>
20#include <asm/machdep.h> 20#include <asm/machdep.h>
21#include <asm/coldfire.h> 21#include <asm/coldfire.h>
22#include <asm/mcfsim.h> 22#include <asm/mcfsim.h>
23#include <asm/mcfdma.h> 23#include <asm/mcfuart.h>
24 24
25/***************************************************************************/ 25/***************************************************************************/
26 26
@@ -28,14 +28,72 @@ void coldfire_reset(void);
28 28
29/***************************************************************************/ 29/***************************************************************************/
30 30
31/* 31static struct mcf_platform_uart m527x_uart_platform[] = {
32 * DMA channel base address table. 32 {
33 */ 33 .mapbase = MCF_MBAR + MCFUART_BASE1,
34unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { 34 .irq = MCFINT_VECBASE + MCFINT_UART0,
35 MCF_MBAR + MCFDMA_BASE0, 35 },
36 {
37 .mapbase = MCF_MBAR + MCFUART_BASE2,
38 .irq = MCFINT_VECBASE + MCFINT_UART1,
39 },
40 {
41 .mapbase = MCF_MBAR + MCFUART_BASE3,
42 .irq = MCFINT_VECBASE + MCFINT_UART2,
43 },
44 { },
36}; 45};
37 46
38unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; 47static struct platform_device m527x_uart = {
48 .name = "mcfuart",
49 .id = 0,
50 .dev.platform_data = m527x_uart_platform,
51};
52
53static struct platform_device *m527x_devices[] __initdata = {
54 &m527x_uart,
55};
56
57/***************************************************************************/
58
59#define INTC0 (MCF_MBAR + MCFICM_INTC0)
60
61static void __init m527x_uart_init_line(int line, int irq)
62{
63 u16 sepmask;
64 u32 imr;
65
66 if ((line < 0) || (line > 2))
67 return;
68
69 /* level 6, line based priority */
70 writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
71
72 imr = readl(INTC0 + MCFINTC_IMRL);
73 imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
74 writel(imr, INTC0 + MCFINTC_IMRL);
75
76 /*
77 * External Pin Mask Setting & Enable External Pin for Interface
78 */
79 sepmask = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
80 if (line == 0)
81 sepmask |= UART0_ENABLE_MASK;
82 else if (line == 1)
83 sepmask |= UART1_ENABLE_MASK;
84 else if (line == 2)
85 sepmask |= UART2_ENABLE_MASK;
86 writew(sepmask, MCF_IPSBAR + MCF_GPIO_PAR_UART);
87}
88
89static void __init m527x_uarts_init(void)
90{
91 const int nrlines = ARRAY_SIZE(m527x_uart_platform);
92 int line;
93
94 for (line = 0; (line < nrlines); line++)
95 m527x_uart_init_line(line, m527x_uart_platform[line].irq);
96}
39 97
40/***************************************************************************/ 98/***************************************************************************/
41 99
@@ -54,10 +112,21 @@ void mcf_autovector(unsigned int vec)
54 112
55/***************************************************************************/ 113/***************************************************************************/
56 114
57void config_BSP(char *commandp, int size) 115void __init config_BSP(char *commandp, int size)
58{ 116{
59 mcf_disableall(); 117 mcf_disableall();
60 mach_reset = coldfire_reset; 118 mach_reset = coldfire_reset;
61} 119}
62 120
63/***************************************************************************/ 121/***************************************************************************/
122
123static int __init init_BSP(void)
124{
125 m527x_uarts_init();
126 platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices));
127 return 0;
128}
129
130arch_initcall(init_BSP);
131
132/***************************************************************************/
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c
index acbd43486d97..036e1b73d944 100644
--- a/arch/m68knommu/platform/528x/config.c
+++ b/arch/m68knommu/platform/528x/config.c
@@ -16,11 +16,15 @@
16#include <linux/param.h> 16#include <linux/param.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <asm/dma.h> 19#include <linux/platform_device.h>
20#include <linux/spi/spi.h>
21#include <linux/spi/flash.h>
22#include <linux/io.h>
20#include <asm/machdep.h> 23#include <asm/machdep.h>
21#include <asm/coldfire.h> 24#include <asm/coldfire.h>
22#include <asm/mcfsim.h> 25#include <asm/mcfsim.h>
23#include <asm/mcfdma.h> 26#include <asm/mcfuart.h>
27#include <asm/mcfqspi.h>
24 28
25/***************************************************************************/ 29/***************************************************************************/
26 30
@@ -28,14 +32,67 @@ void coldfire_reset(void);
28 32
29/***************************************************************************/ 33/***************************************************************************/
30 34
31/* 35static struct mcf_platform_uart m528x_uart_platform[] = {
32 * DMA channel base address table. 36 {
33 */ 37 .mapbase = MCF_MBAR + MCFUART_BASE1,
34unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { 38 .irq = MCFINT_VECBASE + MCFINT_UART0,
35 MCF_MBAR + MCFDMA_BASE0, 39 },
40 {
41 .mapbase = MCF_MBAR + MCFUART_BASE2,
42 .irq = MCFINT_VECBASE + MCFINT_UART0 + 1,
43 },
44 {
45 .mapbase = MCF_MBAR + MCFUART_BASE3,
46 .irq = MCFINT_VECBASE + MCFINT_UART0 + 2,
47 },
48 { },
36}; 49};
37 50
38unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; 51static struct platform_device m528x_uart = {
52 .name = "mcfuart",
53 .id = 0,
54 .dev.platform_data = m528x_uart_platform,
55};
56
57static struct platform_device *m528x_devices[] __initdata = {
58 &m528x_uart,
59};
60
61/***************************************************************************/
62
63#define INTC0 (MCF_MBAR + MCFICM_INTC0)
64
65static void __init m528x_uart_init_line(int line, int irq)
66{
67 u8 port;
68 u32 imr;
69
70 if ((line < 0) || (line > 2))
71 return;
72
73 /* level 6, line based priority */
74 writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
75
76 imr = readl(INTC0 + MCFINTC_IMRL);
77 imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
78 writel(imr, INTC0 + MCFINTC_IMRL);
79
80 /* make sure PUAPAR is set for UART0 and UART1 */
81 if (line < 2) {
82 port = readb(MCF_MBAR + MCF5282_GPIO_PUAPAR);
83 port |= (0x03 << (line * 2));
84 writeb(port, MCF_MBAR + MCF5282_GPIO_PUAPAR);
85 }
86}
87
88static void __init m528x_uarts_init(void)
89{
90 const int nrlines = ARRAY_SIZE(m528x_uart_platform);
91 int line;
92
93 for (line = 0; (line < nrlines); line++)
94 m528x_uart_init_line(line, m528x_uart_platform[line].irq);
95}
39 96
40/***************************************************************************/ 97/***************************************************************************/
41 98
@@ -54,10 +111,21 @@ void mcf_autovector(unsigned int vec)
54 111
55/***************************************************************************/ 112/***************************************************************************/
56 113
57void config_BSP(char *commandp, int size) 114void __init config_BSP(char *commandp, int size)
58{ 115{
59 mcf_disableall(); 116 mcf_disableall();
60 mach_reset = coldfire_reset; 117 mach_reset = coldfire_reset;
61} 118}
62 119
63/***************************************************************************/ 120/***************************************************************************/
121
122static int __init init_BSP(void)
123{
124 m528x_uarts_init();
125 platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices));
126 return 0;
127}
128
129arch_initcall(init_BSP);
130
131/***************************************************************************/
diff --git a/arch/m68knommu/platform/5307/Makefile b/arch/m68knommu/platform/5307/Makefile
index 5b600530c8d2..580fd6658d7c 100644
--- a/arch/m68knommu/platform/5307/Makefile
+++ b/arch/m68knommu/platform/5307/Makefile
@@ -16,17 +16,5 @@ ifdef CONFIG_FULLDEBUG
16EXTRA_AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1 16EXTRA_AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1
17endif 17endif
18 18
19obj-$(CONFIG_COLDFIRE) += entry.o vectors.o 19obj-y += config.o
20obj-$(CONFIG_M5206) += timers.o
21obj-$(CONFIG_M5206e) += timers.o
22obj-$(CONFIG_M520x) += pit.o
23obj-$(CONFIG_M523x) += pit.o
24obj-$(CONFIG_M5249) += timers.o
25obj-$(CONFIG_M527x) += pit.o
26obj-$(CONFIG_M5272) += timers.o
27obj-$(CONFIG_M5307) += config.o timers.o
28obj-$(CONFIG_M532x) += timers.o
29obj-$(CONFIG_M528x) += pit.o
30obj-$(CONFIG_M5407) += timers.o
31 20
32extra-y := head.o
diff --git a/arch/m68knommu/platform/5307/config.c b/arch/m68knommu/platform/5307/config.c
index 6040821e637d..92dc862fa826 100644
--- a/arch/m68knommu/platform/5307/config.c
+++ b/arch/m68knommu/platform/5307/config.c
@@ -13,11 +13,11 @@
13#include <linux/param.h> 13#include <linux/param.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <asm/dma.h> 16#include <linux/io.h>
17#include <asm/machdep.h> 17#include <asm/machdep.h>
18#include <asm/coldfire.h> 18#include <asm/coldfire.h>
19#include <asm/mcfsim.h> 19#include <asm/mcfsim.h>
20#include <asm/mcfdma.h> 20#include <asm/mcfuart.h>
21#include <asm/mcfwdebug.h> 21#include <asm/mcfwdebug.h>
22 22
23/***************************************************************************/ 23/***************************************************************************/
@@ -38,17 +38,51 @@ unsigned char ledbank = 0xff;
38 38
39/***************************************************************************/ 39/***************************************************************************/
40 40
41/* 41static struct mcf_platform_uart m5307_uart_platform[] = {
42 * DMA channel base address table. 42 {
43 */ 43 .mapbase = MCF_MBAR + MCFUART_BASE1,
44unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { 44 .irq = 73,
45 MCF_MBAR + MCFDMA_BASE0, 45 },
46 MCF_MBAR + MCFDMA_BASE1, 46 {
47 MCF_MBAR + MCFDMA_BASE2, 47 .mapbase = MCF_MBAR + MCFUART_BASE2,
48 MCF_MBAR + MCFDMA_BASE3, 48 .irq = 74,
49 },
50 { },
51};
52
53static struct platform_device m5307_uart = {
54 .name = "mcfuart",
55 .id = 0,
56 .dev.platform_data = m5307_uart_platform,
49}; 57};
50 58
51unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; 59static struct platform_device *m5307_devices[] __initdata = {
60 &m5307_uart,
61};
62
63/***************************************************************************/
64
65static void __init m5307_uart_init_line(int line, int irq)
66{
67 if (line == 0) {
68 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
69 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
70 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
71 } else if (line == 1) {
72 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
73 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
74 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
75 }
76}
77
78static void __init m5307_uarts_init(void)
79{
80 const int nrlines = ARRAY_SIZE(m5307_uart_platform);
81 int line;
82
83 for (line = 0; (line < nrlines); line++)
84 m5307_uart_init_line(line, m5307_uart_platform[line].irq);
85}
52 86
53/***************************************************************************/ 87/***************************************************************************/
54 88
@@ -85,21 +119,7 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
85 119
86/***************************************************************************/ 120/***************************************************************************/
87 121
88int mcf_timerirqpending(int timer) 122void __init config_BSP(char *commandp, int size)
89{
90 unsigned int imr = 0;
91
92 switch (timer) {
93 case 1: imr = MCFSIM_IMR_TIMER1; break;
94 case 2: imr = MCFSIM_IMR_TIMER2; break;
95 default: break;
96 }
97 return (mcf_getipr() & imr);
98}
99
100/***************************************************************************/
101
102void config_BSP(char *commandp, int size)
103{ 123{
104 mcf_setimr(MCFSIM_IMR_MASKALL); 124 mcf_setimr(MCFSIM_IMR_MASKALL);
105 125
@@ -117,7 +137,7 @@ void config_BSP(char *commandp, int size)
117 137
118 mach_reset = coldfire_reset; 138 mach_reset = coldfire_reset;
119 139
120#ifdef MCF_BDM_DISABLE 140#ifdef CONFIG_BDM_DISABLE
121 /* 141 /*
122 * Disable the BDM clocking. This also turns off most of the rest of 142 * Disable the BDM clocking. This also turns off most of the rest of
123 * the BDM device. This is good for EMC reasons. This option is not 143 * the BDM device. This is good for EMC reasons. This option is not
@@ -128,3 +148,14 @@ void config_BSP(char *commandp, int size)
128} 148}
129 149
130/***************************************************************************/ 150/***************************************************************************/
151
152static int __init init_BSP(void)
153{
154 m5307_uarts_init();
155 platform_add_devices(m5307_devices, ARRAY_SIZE(m5307_devices));
156 return 0;
157}
158
159arch_initcall(init_BSP);
160
161/***************************************************************************/
diff --git a/arch/m68knommu/platform/532x/config.c b/arch/m68knommu/platform/532x/config.c
index f77328b7b6db..4f44b632045b 100644
--- a/arch/m68knommu/platform/532x/config.c
+++ b/arch/m68knommu/platform/532x/config.c
@@ -21,10 +21,11 @@
21#include <linux/param.h> 21#include <linux/param.h>
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <asm/dma.h> 24#include <linux/io.h>
25#include <asm/machdep.h> 25#include <asm/machdep.h>
26#include <asm/coldfire.h> 26#include <asm/coldfire.h>
27#include <asm/mcfsim.h> 27#include <asm/mcfsim.h>
28#include <asm/mcfuart.h>
28#include <asm/mcfdma.h> 29#include <asm/mcfdma.h>
29#include <asm/mcfwdebug.h> 30#include <asm/mcfwdebug.h>
30 31
@@ -38,11 +39,60 @@ extern unsigned int mcf_timerlevel;
38 39
39/***************************************************************************/ 40/***************************************************************************/
40 41
41/* 42static struct mcf_platform_uart m532x_uart_platform[] = {
42 * DMA channel base address table. 43 {
43 */ 44 .mapbase = MCF_MBAR + MCFUART_BASE1,
44unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { }; 45 .irq = MCFINT_VECBASE + MCFINT_UART0,
45unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; 46 },
47 {
48 .mapbase = MCF_MBAR + MCFUART_BASE2,
49 .irq = MCFINT_VECBASE + MCFINT_UART1,
50 },
51 {
52 .mapbase = MCF_MBAR + MCFUART_BASE3,
53 .irq = MCFINT_VECBASE + MCFINT_UART2,
54 },
55 { },
56};
57
58static struct platform_device m532x_uart = {
59 .name = "mcfuart",
60 .id = 0,
61 .dev.platform_data = m532x_uart_platform,
62};
63
64static struct platform_device *m532x_devices[] __initdata = {
65 &m532x_uart,
66};
67
68/***************************************************************************/
69
70static void __init m532x_uart_init_line(int line, int irq)
71{
72 if (line == 0) {
73 MCF_INTC0_ICR26 = 0x3;
74 MCF_INTC0_CIMR = 26;
75 /* GPIO initialization */
76 MCF_GPIO_PAR_UART |= 0x000F;
77 } else if (line == 1) {
78 MCF_INTC0_ICR27 = 0x3;
79 MCF_INTC0_CIMR = 27;
80 /* GPIO initialization */
81 MCF_GPIO_PAR_UART |= 0x0FF0;
82 } else if (line == 2) {
83 MCF_INTC0_ICR28 = 0x3;
84 MCF_INTC0_CIMR = 28;
85 }
86}
87
88static void __init m532x_uarts_init(void)
89{
90 const int nrlines = ARRAY_SIZE(m532x_uart_platform);
91 int line;
92
93 for (line = 0; (line < nrlines); line++)
94 m532x_uart_init_line(line, m532x_uart_platform[line].irq);
95}
46 96
47/***************************************************************************/ 97/***************************************************************************/
48 98
@@ -66,21 +116,7 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
66 116
67/***************************************************************************/ 117/***************************************************************************/
68 118
69int mcf_timerirqpending(int timer) 119void __init config_BSP(char *commandp, int size)
70{
71 unsigned int imr = 0;
72
73 switch (timer) {
74 case 1: imr = 0x1; break;
75 case 2: imr = 0x2; break;
76 default: break;
77 }
78 return (mcf_getiprh() & imr);
79}
80
81/***************************************************************************/
82
83void config_BSP(char *commandp, int size)
84{ 120{
85 mcf_setimr(MCFSIM_IMR_MASKALL); 121 mcf_setimr(MCFSIM_IMR_MASKALL);
86 122
@@ -99,7 +135,7 @@ void config_BSP(char *commandp, int size)
99 mcf_profilevector = 64+33; 135 mcf_profilevector = 64+33;
100 mach_reset = coldfire_reset; 136 mach_reset = coldfire_reset;
101 137
102#ifdef MCF_BDM_DISABLE 138#ifdef CONFIG_BDM_DISABLE
103 /* 139 /*
104 * Disable the BDM clocking. This also turns off most of the rest of 140 * Disable the BDM clocking. This also turns off most of the rest of
105 * the BDM device. This is good for EMC reasons. This option is not 141 * the BDM device. This is good for EMC reasons. This option is not
@@ -110,9 +146,19 @@ void config_BSP(char *commandp, int size)
110} 146}
111 147
112/***************************************************************************/ 148/***************************************************************************/
113/* Board initialization */
114 149
115/********************************************************************/ 150static int __init init_BSP(void)
151{
152 m532x_uarts_init();
153 platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices));
154 return 0;
155}
156
157arch_initcall(init_BSP);
158
159/***************************************************************************/
160/* Board initialization */
161/***************************************************************************/
116/* 162/*
117 * PLL min/max specifications 163 * PLL min/max specifications
118 */ 164 */
diff --git a/arch/m68knommu/platform/5407/config.c b/arch/m68knommu/platform/5407/config.c
index 2d3b62eba7ca..648b8b778211 100644
--- a/arch/m68knommu/platform/5407/config.c
+++ b/arch/m68knommu/platform/5407/config.c
@@ -13,11 +13,11 @@
13#include <linux/param.h> 13#include <linux/param.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <asm/dma.h> 16#include <linux/io.h>
17#include <asm/machdep.h> 17#include <asm/machdep.h>
18#include <asm/coldfire.h> 18#include <asm/coldfire.h>
19#include <asm/mcfsim.h> 19#include <asm/mcfsim.h>
20#include <asm/mcfdma.h> 20#include <asm/mcfuart.h>
21 21
22/***************************************************************************/ 22/***************************************************************************/
23 23
@@ -29,17 +29,51 @@ extern unsigned int mcf_timerlevel;
29 29
30/***************************************************************************/ 30/***************************************************************************/
31 31
32/* 32static struct mcf_platform_uart m5407_uart_platform[] = {
33 * DMA channel base address table. 33 {
34 */ 34 .mapbase = MCF_MBAR + MCFUART_BASE1,
35unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { 35 .irq = 73,
36 MCF_MBAR + MCFDMA_BASE0, 36 },
37 MCF_MBAR + MCFDMA_BASE1, 37 {
38 MCF_MBAR + MCFDMA_BASE2, 38 .mapbase = MCF_MBAR + MCFUART_BASE2,
39 MCF_MBAR + MCFDMA_BASE3, 39 .irq = 74,
40 },
41 { },
42};
43
44static struct platform_device m5407_uart = {
45 .name = "mcfuart",
46 .id = 0,
47 .dev.platform_data = m5407_uart_platform,
40}; 48};
41 49
42unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; 50static struct platform_device *m5407_devices[] __initdata = {
51 &m5407_uart,
52};
53
54/***************************************************************************/
55
56static void __init m5407_uart_init_line(int line, int irq)
57{
58 if (line == 0) {
59 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
60 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
61 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
62 } else if (line == 1) {
63 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
64 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
65 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
66 }
67}
68
69static void __init m5407_uarts_init(void)
70{
71 const int nrlines = ARRAY_SIZE(m5407_uart_platform);
72 int line;
73
74 for (line = 0; (line < nrlines); line++)
75 m5407_uart_init_line(line, m5407_uart_platform[line].irq);
76}
43 77
44/***************************************************************************/ 78/***************************************************************************/
45 79
@@ -76,21 +110,7 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
76 110
77/***************************************************************************/ 111/***************************************************************************/
78 112
79int mcf_timerirqpending(int timer) 113void __init config_BSP(char *commandp, int size)
80{
81 unsigned int imr = 0;
82
83 switch (timer) {
84 case 1: imr = MCFSIM_IMR_TIMER1; break;
85 case 2: imr = MCFSIM_IMR_TIMER2; break;
86 default: break;
87 }
88 return (mcf_getipr() & imr);
89}
90
91/***************************************************************************/
92
93void config_BSP(char *commandp, int size)
94{ 114{
95 mcf_setimr(MCFSIM_IMR_MASKALL); 115 mcf_setimr(MCFSIM_IMR_MASKALL);
96 116
@@ -105,3 +125,14 @@ void config_BSP(char *commandp, int size)
105} 125}
106 126
107/***************************************************************************/ 127/***************************************************************************/
128
129static int __init init_BSP(void)
130{
131 m5407_uarts_init();
132 platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices));
133 return 0;
134}
135
136arch_initcall(init_BSP);
137
138/***************************************************************************/
diff --git a/arch/m68knommu/platform/68328/timers.c b/arch/m68knommu/platform/68328/timers.c
index 04cbc661d4bd..9159fd05c9ac 100644
--- a/arch/m68knommu/platform/68328/timers.c
+++ b/arch/m68knommu/platform/68328/timers.c
@@ -19,6 +19,7 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/clocksource.h>
22#include <asm/setup.h> 23#include <asm/setup.h>
23#include <asm/system.h> 24#include <asm/system.h>
24#include <asm/pgtable.h> 25#include <asm/pgtable.h>
@@ -51,6 +52,19 @@
51#define TICKS_PER_JIFFY 10 52#define TICKS_PER_JIFFY 10
52#endif 53#endif
53 54
55static u32 m68328_tick_cnt;
56
57/***************************************************************************/
58
59static irqreturn_t hw_tick(int irq, void *dummy)
60{
61 /* Reset Timer1 */
62 TSTAT &= 0;
63
64 m68328_tick_cnt += TICKS_PER_JIFFY;
65 return arch_timer_interrupt(irq, dummy);
66}
67
54/***************************************************************************/ 68/***************************************************************************/
55 69
56static irqreturn_t hw_tick(int irq, void *dummy) 70static irqreturn_t hw_tick(int irq, void *dummy)
@@ -69,6 +83,33 @@ static struct irqaction m68328_timer_irq = {
69 .handler = hw_tick, 83 .handler = hw_tick,
70}; 84};
71 85
86/***************************************************************************/
87
88static cycle_t m68328_read_clk(void)
89{
90 unsigned long flags;
91 u32 cycles;
92
93 local_irq_save(flags);
94 cycles = m68328_tick_cnt + TCN;
95 local_irq_restore(flags);
96
97 return cycles;
98}
99
100/***************************************************************************/
101
102static struct clocksource m68328_clk = {
103 .name = "timer",
104 .rating = 250,
105 .read = m68328_read_clk,
106 .shift = 20,
107 .mask = CLOCKSOURCE_MASK(32),
108 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
109};
110
111/***************************************************************************/
112
72void hw_timer_init(void) 113void hw_timer_init(void)
73{ 114{
74 /* disable timer 1 */ 115 /* disable timer 1 */
@@ -84,19 +125,8 @@ void hw_timer_init(void)
84 125
85 /* Enable timer 1 */ 126 /* Enable timer 1 */
86 TCTL |= TCTL_TEN; 127 TCTL |= TCTL_TEN;
87} 128 m68328_clk.mult = clocksource_hz2mult(TICKS_PER_JIFFY*HZ, m68328_clk.shift);
88 129 clocksource_register(&m68328_clk);
89/***************************************************************************/
90
91unsigned long hw_timer_offset(void)
92{
93 unsigned long ticks = TCN, offset = 0;
94
95 /* check for pending interrupt */
96 if (ticks < (TICKS_PER_JIFFY >> 1) && (ISR & (1 << TMR_IRQ_NUM)))
97 offset = 1000000 / HZ;
98 ticks = (ticks * 1000000 / HZ) / TICKS_PER_JIFFY;
99 return ticks + offset;
100} 130}
101 131
102/***************************************************************************/ 132/***************************************************************************/
diff --git a/arch/m68knommu/platform/68360/config.c b/arch/m68knommu/platform/68360/config.c
index 2b3196af811f..ac629fa30099 100644
--- a/arch/m68knommu/platform/68360/config.c
+++ b/arch/m68knommu/platform/68360/config.c
@@ -103,11 +103,6 @@ void hw_timer_init(void)
103 pquicc->timer_tgcr = tgcr_save; 103 pquicc->timer_tgcr = tgcr_save;
104} 104}
105 105
106unsigned long hw_timer_offset(void)
107{
108 return 0;
109}
110
111void BSP_gettod (int *yearp, int *monp, int *dayp, 106void BSP_gettod (int *yearp, int *monp, int *dayp,
112 int *hourp, int *minp, int *secp) 107 int *hourp, int *minp, int *secp)
113{ 108{
diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile
new file mode 100644
index 000000000000..e5fff297ae01
--- /dev/null
+++ b/arch/m68knommu/platform/coldfire/Makefile
@@ -0,0 +1,32 @@
1#
2# Makefile for the m68knommu kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT
12# EXTRA_AFLAGS += -DTRAP_DBG_INTERRUPT
13#
14
15ifdef CONFIG_FULLDEBUG
16AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1
17endif
18
19obj-$(CONFIG_COLDFIRE) += dma.o entry.o vectors.o
20obj-$(CONFIG_M5206) += timers.o
21obj-$(CONFIG_M5206e) += timers.o
22obj-$(CONFIG_M520x) += pit.o
23obj-$(CONFIG_M523x) += pit.o
24obj-$(CONFIG_M5249) += timers.o
25obj-$(CONFIG_M527x) += pit.o
26obj-$(CONFIG_M5272) += timers.o
27obj-$(CONFIG_M528x) += pit.o
28obj-$(CONFIG_M5307) += timers.o
29obj-$(CONFIG_M532x) += timers.o
30obj-$(CONFIG_M5407) += timers.o
31
32extra-y := head.o
diff --git a/arch/m68knommu/platform/coldfire/dma.c b/arch/m68knommu/platform/coldfire/dma.c
new file mode 100644
index 000000000000..2b30cf1b8f77
--- /dev/null
+++ b/arch/m68knommu/platform/coldfire/dma.c
@@ -0,0 +1,39 @@
1/***************************************************************************/
2
3/*
4 * dma.c -- Freescale ColdFire DMA support
5 *
6 * Copyright (C) 2007, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <asm/dma.h>
13#include <asm/coldfire.h>
14#include <asm/mcfsim.h>
15#include <asm/mcfdma.h>
16
17/***************************************************************************/
18
19/*
20 * DMA channel base address table.
21 */
22unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
23#ifdef MCFDMA_BASE0
24 MCF_MBAR + MCFDMA_BASE0,
25#endif
26#ifdef MCFDMA_BASE1
27 MCF_MBAR + MCFDMA_BASE1,
28#endif
29#ifdef MCFDMA_BASE2
30 MCF_MBAR + MCFDMA_BASE2,
31#endif
32#ifdef MCFDMA_BASE3
33 MCF_MBAR + MCFDMA_BASE3,
34#endif
35};
36
37unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
38
39/***************************************************************************/
diff --git a/arch/m68knommu/platform/5307/entry.S b/arch/m68knommu/platform/coldfire/entry.S
index b333731b875a..b333731b875a 100644
--- a/arch/m68knommu/platform/5307/entry.S
+++ b/arch/m68knommu/platform/coldfire/entry.S
diff --git a/arch/m68knommu/platform/5307/head.S b/arch/m68knommu/platform/coldfire/head.S
index b9aa0ca29bfb..b9aa0ca29bfb 100644
--- a/arch/m68knommu/platform/5307/head.S
+++ b/arch/m68knommu/platform/coldfire/head.S
diff --git a/arch/m68knommu/platform/5307/pit.c b/arch/m68knommu/platform/coldfire/pit.c
index 173b754d1cda..4290638012e0 100644
--- a/arch/m68knommu/platform/5307/pit.c
+++ b/arch/m68knommu/platform/coldfire/pit.c
@@ -3,9 +3,10 @@
3/* 3/*
4 * pit.c -- Freescale ColdFire PIT timer. Currently this type of 4 * pit.c -- Freescale ColdFire PIT timer. Currently this type of
5 * hardware timer only exists in the Freescale ColdFire 5 * hardware timer only exists in the Freescale ColdFire
6 * 5270/5271, 5282 and other CPUs. 6 * 5270/5271, 5282 and 5208 CPUs. No doubt newer ColdFire
7 * family members will probably use it too.
7 * 8 *
8 * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com) 9 * Copyright (C) 1999-2008, Greg Ungerer (gerg@snapgear.com)
9 * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com) 10 * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
10 */ 11 */
11 12
@@ -17,6 +18,7 @@
17#include <linux/init.h> 18#include <linux/init.h>
18#include <linux/interrupt.h> 19#include <linux/interrupt.h>
19#include <linux/irq.h> 20#include <linux/irq.h>
21#include <linux/clocksource.h>
20#include <asm/machdep.h> 22#include <asm/machdep.h>
21#include <asm/io.h> 23#include <asm/io.h>
22#include <asm/coldfire.h> 24#include <asm/coldfire.h>
@@ -28,70 +30,84 @@
28/* 30/*
29 * By default use timer1 as the system clock timer. 31 * By default use timer1 as the system clock timer.
30 */ 32 */
33#define FREQ ((MCF_CLK / 2) / 64)
31#define TA(a) (MCF_IPSBAR + MCFPIT_BASE1 + (a)) 34#define TA(a) (MCF_IPSBAR + MCFPIT_BASE1 + (a))
35#define INTC0 (MCF_IPSBAR + MCFICM_INTC0)
36
37static u32 pit_cycles_per_jiffy;
38static u32 pit_cnt;
32 39
33/***************************************************************************/ 40/***************************************************************************/
34 41
35static irqreturn_t hw_tick(int irq, void *dummy) 42static irqreturn_t pit_tick(int irq, void *dummy)
36{ 43{
37 unsigned short pcsr; 44 u16 pcsr;
38 45
39 /* Reset the ColdFire timer */ 46 /* Reset the ColdFire timer */
40 pcsr = __raw_readw(TA(MCFPIT_PCSR)); 47 pcsr = __raw_readw(TA(MCFPIT_PCSR));
41 __raw_writew(pcsr | MCFPIT_PCSR_PIF, TA(MCFPIT_PCSR)); 48 __raw_writew(pcsr | MCFPIT_PCSR_PIF, TA(MCFPIT_PCSR));
42 49
50 pit_cnt += pit_cycles_per_jiffy;
43 return arch_timer_interrupt(irq, dummy); 51 return arch_timer_interrupt(irq, dummy);
44} 52}
45 53
46/***************************************************************************/ 54/***************************************************************************/
47 55
48static struct irqaction coldfire_pit_irq = { 56static struct irqaction pit_irq = {
49 .name = "timer", 57 .name = "timer",
50 .flags = IRQF_DISABLED | IRQF_TIMER, 58 .flags = IRQF_DISABLED | IRQF_TIMER,
51 .handler = hw_tick, 59 .handler = pit_tick,
52}; 60};
53 61
54void hw_timer_init(void) 62/***************************************************************************/
63
64static cycle_t pit_read_clk(void)
55{ 65{
56 volatile unsigned char *icrp; 66 unsigned long flags;
57 volatile unsigned long *imrp; 67 u32 cycles;
68 u16 pcntr;
58 69
59 setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &coldfire_pit_irq); 70 local_irq_save(flags);
71 pcntr = __raw_readw(TA(MCFPIT_PCNTR));
72 cycles = pit_cnt;
73 local_irq_restore(flags);
60 74
61 icrp = (volatile unsigned char *) (MCF_IPSBAR + MCFICM_INTC0 + 75 return cycles + pit_cycles_per_jiffy - pcntr;
62 MCFINTC_ICR0 + MCFINT_PIT1); 76}
63 *icrp = ICR_INTRCONF;
64 77
65 imrp = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFPIT_IMR); 78/***************************************************************************/
66 *imrp &= ~MCFPIT_IMR_IBIT;
67 79
68 /* Set up PIT timer 1 as poll clock */ 80static struct clocksource pit_clk = {
69 __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR)); 81 .name = "pit",
70 __raw_writew(((MCF_CLK / 2) / 64) / HZ, TA(MCFPIT_PMR)); 82 .rating = 250,
71 __raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | MCFPIT_PCSR_OVW | 83 .read = pit_read_clk,
72 MCFPIT_PCSR_RLD | MCFPIT_PCSR_CLK64, TA(MCFPIT_PCSR)); 84 .shift = 20,
73} 85 .mask = CLOCKSOURCE_MASK(32),
86 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
87};
74 88
75/***************************************************************************/ 89/***************************************************************************/
76 90
77unsigned long hw_timer_offset(void) 91void hw_timer_init(void)
78{ 92{
79 volatile unsigned long *ipr; 93 u32 imr;
80 unsigned long pmr, pcntr, offset;
81 94
82 ipr = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFPIT_IMR); 95 setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &pit_irq);
83 96
84 pmr = __raw_readw(TA(MCFPIT_PMR)); 97 __raw_writeb(ICR_INTRCONF, INTC0 + MCFINTC_ICR0 + MCFINT_PIT1);
85 pcntr = __raw_readw(TA(MCFPIT_PCNTR)); 98 imr = __raw_readl(INTC0 + MCFPIT_IMR);
99 imr &= ~MCFPIT_IMR_IBIT;
100 __raw_writel(imr, INTC0 + MCFPIT_IMR);
101
102 /* Set up PIT timer 1 as poll clock */
103 pit_cycles_per_jiffy = FREQ / HZ;
104 __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));
105 __raw_writew(pit_cycles_per_jiffy, TA(MCFPIT_PMR));
106 __raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | MCFPIT_PCSR_OVW |
107 MCFPIT_PCSR_RLD | MCFPIT_PCSR_CLK64, TA(MCFPIT_PCSR));
86 108
87 /* 109 pit_clk.mult = clocksource_hz2mult(FREQ, pit_clk.shift);
88 * If we are still in the first half of the upcount and a 110 clocksource_register(&pit_clk);
89 * timer interrupt is pending, then add on a ticks worth of time.
90 */
91 offset = ((pmr - pcntr) * (1000000 / HZ)) / pmr;
92 if ((offset < (1000000 / HZ / 2)) && (*ipr & MCFPIT_IMR_IBIT))
93 offset += 1000000 / HZ;
94 return offset;
95} 111}
96 112
97/***************************************************************************/ 113/***************************************************************************/
diff --git a/arch/m68knommu/platform/5307/timers.c b/arch/m68knommu/platform/coldfire/timers.c
index 489dec85c859..a60213e877ef 100644
--- a/arch/m68knommu/platform/5307/timers.c
+++ b/arch/m68knommu/platform/coldfire/timers.c
@@ -3,7 +3,7 @@
3/* 3/*
4 * timers.c -- generic ColdFire hardware timer support. 4 * timers.c -- generic ColdFire hardware timer support.
5 * 5 *
6 * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com) 6 * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
7 */ 7 */
8 8
9/***************************************************************************/ 9/***************************************************************************/
@@ -13,6 +13,8 @@
13#include <linux/sched.h> 13#include <linux/sched.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <linux/profile.h>
17#include <linux/clocksource.h>
16#include <asm/io.h> 18#include <asm/io.h>
17#include <asm/traps.h> 19#include <asm/traps.h>
18#include <asm/machdep.h> 20#include <asm/machdep.h>
@@ -25,6 +27,7 @@
25/* 27/*
26 * By default use timer1 as the system clock timer. 28 * By default use timer1 as the system clock timer.
27 */ 29 */
30#define FREQ (MCF_BUSCLK / 16)
28#define TA(a) (MCF_MBAR + MCFTIMER_BASE1 + (a)) 31#define TA(a) (MCF_MBAR + MCFTIMER_BASE1 + (a))
29 32
30/* 33/*
@@ -41,7 +44,7 @@ unsigned int mcf_timerlevel = 5;
41 * Unfortunately it is a little different on each ColdFire. 44 * Unfortunately it is a little different on each ColdFire.
42 */ 45 */
43extern void mcf_settimericr(int timer, int level); 46extern void mcf_settimericr(int timer, int level);
44extern int mcf_timerirqpending(int timer); 47void coldfire_profile_init(void);
45 48
46#if defined(CONFIG_M532x) 49#if defined(CONFIG_M532x)
47#define __raw_readtrr __raw_readl 50#define __raw_readtrr __raw_readl
@@ -51,38 +54,70 @@ extern int mcf_timerirqpending(int timer);
51#define __raw_writetrr __raw_writew 54#define __raw_writetrr __raw_writew
52#endif 55#endif
53 56
57static u32 mcftmr_cycles_per_jiffy;
58static u32 mcftmr_cnt;
59
54/***************************************************************************/ 60/***************************************************************************/
55 61
56static irqreturn_t hw_tick(int irq, void *dummy) 62static irqreturn_t mcftmr_tick(int irq, void *dummy)
57{ 63{
58 /* Reset the ColdFire timer */ 64 /* Reset the ColdFire timer */
59 __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER)); 65 __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
60 66
67 mcftmr_cnt += mcftmr_cycles_per_jiffy;
61 return arch_timer_interrupt(irq, dummy); 68 return arch_timer_interrupt(irq, dummy);
62} 69}
63 70
64/***************************************************************************/ 71/***************************************************************************/
65 72
66static struct irqaction coldfire_timer_irq = { 73static struct irqaction mcftmr_timer_irq = {
67 .name = "timer", 74 .name = "timer",
68 .flags = IRQF_DISABLED | IRQF_TIMER, 75 .flags = IRQF_DISABLED | IRQF_TIMER,
69 .handler = hw_tick, 76 .handler = mcftmr_tick,
70}; 77};
71 78
72/***************************************************************************/ 79/***************************************************************************/
73 80
74static int ticks_per_intr; 81static cycle_t mcftmr_read_clk(void)
82{
83 unsigned long flags;
84 u32 cycles;
85 u16 tcn;
86
87 local_irq_save(flags);
88 tcn = __raw_readw(TA(MCFTIMER_TCN));
89 cycles = mcftmr_cnt;
90 local_irq_restore(flags);
91
92 return cycles + tcn;
93}
94
95/***************************************************************************/
96
97static struct clocksource mcftmr_clk = {
98 .name = "tmr",
99 .rating = 250,
100 .read = mcftmr_read_clk,
101 .shift = 20,
102 .mask = CLOCKSOURCE_MASK(32),
103 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
104};
105
106/***************************************************************************/
75 107
76void hw_timer_init(void) 108void hw_timer_init(void)
77{ 109{
78 setup_irq(mcf_timervector, &coldfire_timer_irq); 110 setup_irq(mcf_timervector, &mcftmr_timer_irq);
79 111
80 __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR)); 112 __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
81 ticks_per_intr = (MCF_BUSCLK / 16) / HZ; 113 mcftmr_cycles_per_jiffy = FREQ / HZ;
82 __raw_writetrr(ticks_per_intr - 1, TA(MCFTIMER_TRR)); 114 __raw_writetrr(mcftmr_cycles_per_jiffy, TA(MCFTIMER_TRR));
83 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | 115 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
84 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR)); 116 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
85 117
118 mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift);
119 clocksource_register(&mcftmr_clk);
120
86 mcf_settimericr(1, mcf_timerlevel); 121 mcf_settimericr(1, mcf_timerlevel);
87 122
88#ifdef CONFIG_HIGHPROFILE 123#ifdef CONFIG_HIGHPROFILE
@@ -91,21 +126,6 @@ void hw_timer_init(void)
91} 126}
92 127
93/***************************************************************************/ 128/***************************************************************************/
94
95unsigned long hw_timer_offset(void)
96{
97 unsigned long tcn, offset;
98
99 tcn = __raw_readw(TA(MCFTIMER_TCN));
100 offset = ((tcn + 1) * (1000000 / HZ)) / ticks_per_intr;
101
102 /* Check if we just wrapped the counters and maybe missed a tick */
103 if ((offset < (1000000 / HZ / 2)) && mcf_timerirqpending(1))
104 offset += 1000000 / HZ;
105 return offset;
106}
107
108/***************************************************************************/
109#ifdef CONFIG_HIGHPROFILE 129#ifdef CONFIG_HIGHPROFILE
110/***************************************************************************/ 130/***************************************************************************/
111 131
diff --git a/arch/m68knommu/platform/5307/vectors.c b/arch/m68knommu/platform/coldfire/vectors.c
index 6cf894620234..6cf894620234 100644
--- a/arch/m68knommu/platform/5307/vectors.c
+++ b/arch/m68knommu/platform/coldfire/vectors.c
diff --git a/arch/powerpc/platforms/pasemi/iommu.c b/arch/powerpc/platforms/pasemi/iommu.c
index c5cfd4b04a83..5803f11c77fc 100644
--- a/arch/powerpc/platforms/pasemi/iommu.c
+++ b/arch/powerpc/platforms/pasemi/iommu.c
@@ -184,7 +184,7 @@ static void pci_dma_dev_setup_pasemi(struct pci_dev *dev)
184 if (dev->vendor == 0x1959 && dev->device == 0xa007 && 184 if (dev->vendor == 0x1959 && dev->device == 0xa007 &&
185 !firmware_has_feature(FW_FEATURE_LPAR)) { 185 !firmware_has_feature(FW_FEATURE_LPAR)) {
186 dev->dev.archdata.dma_ops = &dma_direct_ops; 186 dev->dev.archdata.dma_ops = &dma_direct_ops;
187 dev->dev.archdata.dma_data = 0; 187 return;
188 } 188 }
189#endif 189#endif
190 190
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-10 02:58:08 -0500